date:20231117

[edk2-devel] [edk2-platforms][PATCH v1] PurleyOpenBoardPkg: Replace Python Interpreter Name

2023-11-17 Thread Nate DeSimone

Removes the assumption that the python interpreter will have the name
python.

Cc: Chasel Chiu 
Signed-off-by: Nate DeSimone 
---
 .../PurleyOpenBoardPkg/BoardMtOlympus/build_board.py   |  8 
 .../PurleyOpenBoardPkg/BoardTiogaPass/build_board.py   | 10 +-
 2 files changed, 9 insertions(+), 9 deletions(-)

diff --git a/Platform/Intel/PurleyOpenBoardPkg/BoardMtOlympus/build_board.py 
b/Platform/Intel/PurleyOpenBoardPkg/BoardMtOlympus/build_board.py
index 2ba615d3e4..ffe762e289 100644
--- a/Platform/Intel/PurleyOpenBoardPkg/BoardMtOlympus/build_board.py
+++ b/Platform/Intel/PurleyOpenBoardPkg/BoardMtOlympus/build_board.py
@@ -1,7 +1,7 @@
 # @ build_board.py
 # This adds additional functions to the build_bios.py
 #
-# Copyright (c) 2019, Intel Corporation. All rights reserved.
+# Copyright (c) 2019 - 2023, Intel Corporation. All rights reserved.
 # SPDX-License-Identifier: BSD-2-Clause-Patent
 #
 
@@ -48,7 +48,7 @@ def pre_build_ex(config, functions):
 print("AML_FILTER= ", config.get("AML_FILTER"))
 
 # build the command with arguments
-command = ["python",
+command = [sys.executable,
os.path.join(config["MIN_PACKAGE_TOOLS"],
 "AmlGenOffset",
 "AmlGenOffset.py"),
@@ -110,7 +110,7 @@ def post_build_ex(config, functions):
 print("post_build_ex Error")
 sys.exit(1)
 
-common_patch_command = [os.path.join(config["PYTHON_HOME"], "python"),
+common_patch_command = [sys.executable,
 os.path.join(config["MIN_PACKAGE_TOOLS"],
  "PatchFv", "PatchBinFv.py"),
 config["TARGET"],
@@ -131,7 +131,7 @@ def post_build_ex(config, functions):
 print("Patch Error!")
 sys.exit(1)
 
-common_rebase_command = [os.path.join(config["PYTHON_HOME"], "python"),
+common_rebase_command = [sys.executable,
  os.path.join(config["MIN_PACKAGE_TOOLS"],
   "PatchFv", "RebaseBinFv.py"),
  config["TARGET"],
diff --git a/Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/build_board.py 
b/Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/build_board.py
index 46fd389ef1..3b66df7115 100644
--- a/Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/build_board.py
+++ b/Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/build_board.py
@@ -1,7 +1,7 @@
 # @ build_board.py
 # This adds additional functions to the build_bios.py
 #
-# Copyright (c) 2018, Intel Corporation. All rights reserved.
+# Copyright (c) 2018 - 2023, Intel Corporation. All rights reserved.
 # Copyright (c) 2021, American Megatrends International LLC.
 # SPDX-License-Identifier: BSD-2-Clause-Patent
 #
@@ -49,7 +49,7 @@ def pre_build_ex(config, functions):
 print("AML_FILTER= ", config.get("AML_FILTER"))
 
 # build the command with arguments
-command = ["python",
+command = [sys.executable,
os.path.join(config["MIN_PACKAGE_TOOLS"],
 "AmlGenOffset",
 "AmlGenOffset.py"),
@@ -111,7 +111,7 @@ def post_build_ex(config, functions):
 print("post_build_ex Error")
 sys.exit(1)
 
-common_patch_command = [os.path.join(config["PYTHON_HOME"], "python"),
+common_patch_command = [sys.executable,
 os.path.join(config["MIN_PACKAGE_TOOLS"],
  "PatchFv", "PatchBinFv.py"),
 config["TARGET"],
@@ -132,7 +132,7 @@ def post_build_ex(config, functions):
 print("Patch Error!")
 sys.exit(1)
 
-common_rebase_command = [os.path.join(config["PYTHON_HOME"], "python"),
+common_rebase_command = [sys.executable,
  os.path.join(config["MIN_PACKAGE_TOOLS"],
   "PatchFv", "RebaseBinFv.py"),
  config["TARGET"],
@@ -161,7 +161,7 @@ def post_build_ex(config, functions):
 print("Patch Error!")
 sys.exit(1)
 
-common_patchbfv_command = [os.path.join(config["PYTHON_HOME"], "python"),
+common_patchbfv_command = [sys.executable,
os.path.join(config["MIN_PACKAGE_TOOLS"],
   "PatchFv", "PatchBfv.py"),
os.path.join(config["BUILD_DIR_PATH"],
-- 
2.34.1



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[edk2-devel] [edk2-platforms][PATCH v1] WhitleyOpenBoardPkg: Replace Python Interpreter Name

2023-11-17 Thread Nate DeSimone

Removes the assumption that the python interpreter will have the name
python.

Cc: Chasel Chiu 
Signed-off-by: Nate DeSimone 
+# Copyright (c) 2021 - 2023, Intel Corporation. All rights reserved.
 # Copyright (c) 2022, American Megatrends International LLC. 
 # SPDX-License-Identifier: BSD-2-Clause-Patent
 #
@@ -107,7 +107,7 @@ def pre_build_ex(config, functions):
 if not os.path.exists(out_file_dir):
 os.mkdir(out_file_dir)
 
-command = ["python",
+command = [sys.executable,
os.path.join(config["MIN_PACKAGE_TOOLS"], "AmlGenOffset", 
"AmlGenOffset.py"),
"-d", "--aml_filter", config["AML_FILTER"],
"-o", out_file_path,
diff --git a/Platform/Intel/WhitleyOpenBoardPkg/JunctionCity/build_board.py 
b/Platform/Intel/WhitleyOpenBoardPkg/JunctionCity/build_board.py
index ccf7a8c55a..61b893686c 100644
--- a/Platform/Intel/WhitleyOpenBoardPkg/JunctionCity/build_board.py
+++ b/Platform/Intel/WhitleyOpenBoardPkg/JunctionCity/build_board.py
@@ -2,7 +2,7 @@
 # Extensions for building JunctionCity using build_bios.py
 #
 #
-# Copyright (c) 2021, Intel Corporation. All rights reserved.
+# Copyright (c) 2021 - 2023, Intel Corporation. All rights reserved.
 # Copyright (c) 2021, American Megatrends International LLC. 
 # SPDX-License-Identifier: BSD-2-Clause-Patent
 #
@@ -107,7 +107,7 @@ def pre_build_ex(config, functions):
 if not os.path.exists(out_file_dir):
 os.mkdir(out_file_dir)
 
-command = ["python",
+command = [sys.executable,
os.path.join(config["MIN_PACKAGE_TOOLS"], "AmlGenOffset", 
"AmlGenOffset.py"),
"-d", "--aml_filter", config["AML_FILTER"],
"-o", out_file_path,
diff --git a/Platform/Intel/WhitleyOpenBoardPkg/WilsonCityRvp/build_board.py 
b/Platform/Intel/WhitleyOpenBoardPkg/WilsonCityRvp/build_board.py
index e2d32d3e13..8d62dd43b8 100644
--- a/Platform/Intel/WhitleyOpenBoardPkg/WilsonCityRvp/build_board.py
+++ b/Platform/Intel/WhitleyOpenBoardPkg/WilsonCityRvp/build_board.py
@@ -1,7 +1,7 @@
 # @ build_board.py
 # Extensions for building WilsonCityRvp using build_bios.py
 #
-# Copyright (c) 2021, Intel Corporation. All rights reserved.
+# Copyright (c) 2021 - 2023, Intel Corporation. All rights reserved.
 # SPDX-License-Identifier: BSD-2-Clause-Patent
 #
 
@@ -105,7 +105,7 @@ def pre_build_ex(config, functions):
 if not os.path.exists(out_file_dir):
 os.mkdir(out_file_dir)
 
-command = ["python",
+command = [sys.executable,
os.path.join(config["MIN_PACKAGE_TOOLS"], "AmlGenOffset", 
"AmlGenOffset.py"),
"-d", "--aml_filter", config["AML_FILTER"],
"-o", out_file_path,
-- 
2.34.1



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[edk2-devel] [edk2-platforms][PATCH v1] MinPlatformPkg: Remove usage of PYTHON_HOME

2023-11-17 Thread Nate DeSimone

Removes usage PYTHON_HOME from RebaseFspBinBaseAddress.py

Cc: Chasel Chiu 
Cc: Liming Gao 
Cc: Eric Dong 
Signed-off-by: Nate DeSimone 
---
 .../MinPlatformPkg/Tools/Fsp/RebaseFspBinBaseAddress.py   | 8 ++--
 1 file changed, 2 insertions(+), 6 deletions(-)

diff --git a/Platform/Intel/MinPlatformPkg/Tools/Fsp/RebaseFspBinBaseAddress.py 
b/Platform/Intel/MinPlatformPkg/Tools/Fsp/RebaseFspBinBaseAddress.py
index b7e4bcf5f9..32db9eb1c4 100644
--- a/Platform/Intel/MinPlatformPkg/Tools/Fsp/RebaseFspBinBaseAddress.py
+++ b/Platform/Intel/MinPlatformPkg/Tools/Fsp/RebaseFspBinBaseAddress.py
@@ -1,6 +1,6 @@
 ## @ RebaseFspBinBaseAddress.py
 #
-# Copyright (c) 2019 - 2021, Intel Corporation. All rights reserved.
+# Copyright (c) 2019 - 2023, Intel Corporation. All rights reserved.
 # SPDX-License-Identifier: BSD-2-Clause-Patent
 #
 
@@ -65,11 +65,7 @@ file.close()
 # Get FSP-M Size, in order to calculate the FSP-T Base. Used SplitFspBin.py 
script
 # to dump the header, and get the ImageSize in FSP-M section
 #
-pythontool = 'python'
-if 'PYTHON_HOME' in os.environ:
-pythontool = os.environ['PYTHON_HOME'] + os.sep + 'python'
-else:
-pythontool = sys.executable
+pythontool = sys.executable
 Process = subprocess.Popen([pythontool, splitFspBinPath, 
"info","-f",fspBinFilePath], stdout=subprocess.PIPE)
 Output = Process.communicate()[0]
 FsptInfo = Output.rsplit(b"FSP_M", 1);
-- 
2.34.1



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Re: [edk2-devel] [PATCH v1] MinPlatformPkg: If BaseTools doesn't build, try a clean build

2023-11-17 Thread Nate DeSimone

Pushed as 787154b

-Original Message-
From: devel@edk2.groups.io  On Behalf Of Nate DeSimone
Sent: Monday, September 25, 2023 5:47 PM
To: devel@edk2.groups.io
Cc: Chiu, Chasel ; Isaac Oram ; 
Gao, Liming ; Dong, Eric 
Subject: [edk2-devel] [PATCH v1] MinPlatformPkg: If BaseTools doesn't build, 
try a clean build

Cc: Chasel Chiu 
Cc: Isaac Oram 
Cc: Liming Gao 
Cc: Eric Dong 
Signed-off-by: Nate DeSimone 
---
 Platform/Intel/build_bios.py | 17 -
 1 file changed, 16 insertions(+), 1 deletion(-)

diff --git a/Platform/Intel/build_bios.py b/Platform/Intel/build_bios.py index 
9c95cfff76..b396017c8c 100755
--- a/Platform/Intel/build_bios.py
+++ b/Platform/Intel/build_bios.py
@@ -207,7 +207,22 @@ def pre_build(build_config, build_type="DEBUG", 
silent=False, toolchain=None):
 
 _, _, result, return_code = execute_script(command, config, shell=shell)
 if return_code != 0:
-build_failed(config)
+#
+# If the BaseTools build fails, then run a clean build and retry
+#
+clean_command = ["nmake", "-f",
+ os.path.join(config["BASE_TOOLS_PATH"], "Makefile"),
+ "clean"]
+if os.name == "posix":
+clean_command = ["make", "-C",
+ os.path.join(config["BASE_TOOLS_PATH"]), "clean"]
+_, _, result, return_code = execute_script(clean_command, config,
+   shell=shell)
+if return_code != 0:
+build_failed(config)
+_, _, result, return_code = execute_script(command, config, 
shell=shell)
+if return_code != 0:
+build_failed(config)
 
 #
 # build platform silicon tools
--
2.39.2.windows.1








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Re: [edk2-devel] [PATCH v1] MinPlatformPkg: If BaseTools doesn't build, try a clean build

2023-11-17 Thread Chiu, Chasel



Reviewed-by: Chasel Chiu 

Thanks,
Chasel



> -Original Message-
> From: Desimone, Nathaniel L 
> Sent: Monday, September 25, 2023 5:47 PM
> To: devel@edk2.groups.io
> Cc: Chiu, Chasel ; Isaac Oram
> ; Gao, Liming ; Dong,
> Eric 
> Subject: [PATCH v1] MinPlatformPkg: If BaseTools doesn't build, try a clean 
> build
> 
> Cc: Chasel Chiu 
> Cc: Isaac Oram 
> Cc: Liming Gao 
> Cc: Eric Dong 
> Signed-off-by: Nate DeSimone 
> ---
>  Platform/Intel/build_bios.py | 17 -
>  1 file changed, 16 insertions(+), 1 deletion(-)
> 
> diff --git a/Platform/Intel/build_bios.py b/Platform/Intel/build_bios.py index
> 9c95cfff76..b396017c8c 100755
> --- a/Platform/Intel/build_bios.py
> +++ b/Platform/Intel/build_bios.py
> @@ -207,7 +207,22 @@ def pre_build(build_config, build_type="DEBUG",
> silent=False, toolchain=None):
> 
>  _, _, result, return_code = execute_script(command, config, shell=shell)
>  if return_code != 0:
> -build_failed(config)
> +#
> +# If the BaseTools build fails, then run a clean build and retry
> +#
> +clean_command = ["nmake", "-f",
> + os.path.join(config["BASE_TOOLS_PATH"], "Makefile"),
> + "clean"]
> +if os.name == "posix":
> +clean_command = ["make", "-C",
> + os.path.join(config["BASE_TOOLS_PATH"]), 
> "clean"]
> +_, _, result, return_code = execute_script(clean_command, config,
> +   shell=shell)
> +if return_code != 0:
> +build_failed(config)
> +_, _, result, return_code = execute_script(command, config, 
> shell=shell)
> +if return_code != 0:
> +build_failed(config)
> 
>  #
>  # build platform silicon tools
> --
> 2.39.2.windows.1



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Re: [edk2-devel] [PATCH] DynamicTablesPkg: Fix ETE _UID Creation

2023-11-17 Thread Ashish Singhal via groups.io

It seems like my BZ account has been disabled and I am not able to create an 
issue there myself. Can one of you create it so that the bug can be fixed? I am 
meanwhile working to restore my account.

From: Laszlo Ersek 
Sent: Friday, November 17, 2023 1:30 PM
To: Ashish Singhal ; devel@edk2.groups.io 
; quic_llind...@quicinc.com ; 
ardb+tianoc...@kernel.org ; sami.muja...@arm.com 
; Jeff Brasen 
Cc: Michael Kinney ; Liming Gao (Byosoft address) 

Subject: Re: [edk2-devel] [PATCH] DynamicTablesPkg: Fix ETE _UID Creation

External email: Use caution opening links or attachments


On 11/17/23 17:37, Ashish Singhal wrote:
>
>
> 
> *From:* Laszlo Ersek 
> *Sent:* Friday, November 17, 2023 2:20 AM
> *To:* devel@edk2.groups.io ; Ashish Singhal
> ; quic_llind...@quicinc.com
> ; ardb+tianoc...@kernel.org
> ; sami.muja...@arm.com
> ; Jeff Brasen 
> *Cc:* Michael Kinney ; Liming Gao (Byosoft
> address) 
> *Subject:* Re: [edk2-devel] [PATCH] DynamicTablesPkg: Fix ETE _UID Creation
>
> External email: Use caution opening links or attachments
>
>
> On 11/15/23 04:19, Ashish Singhal via groups.io wrote:
>> Just like CPU _UID, ETE UID also needs to be unique so
>> use AcpiProcessorUid instead of CpuName
>>
>> Signed-off-by: Ashish Singhal 
>> ---
>>  .../Arm/AcpiSsdtCpuTopologyLibArm/SsdtCpuTopologyGenerator.c | 5 -
>>  1 file changed, 4 insertions(+), 1 deletion(-)
>
> Is this a fixup for the recent feature
>
> [PATCH v3 00/11] Update MADT for ACPI 6.5, and add TRBE & ETE support
> https://edk2.groups.io/g/devel/message/108996
> 
>
> ?
>
> If so, then I *think* this qualifies to be merged during the hard
> feature freeze (+Liming +Mike), but:
>
> - I think we should have a "Fixes:" tag in the commit message (for
> pointing out the commit that should have contained the code being
> added/updated now)
>
> - I think we should have a BZ too (also linked into the commit message).
>
> Laszlo
>
> Hello Laszlo,
>
> The issue was indeed introduced in the patch series you pointed to and
> precisely in the commit
> https://github.com/tianocore/edk2/commit/3ee23713e1ce09faa6fa66ee6799e3e336deb58b
>  
> .
>  This is indeed a bug and should ideally be fixed as soon as possible. Do you 
> need me to file BZ bug and link that in commit message?

A BZ ticket would be great, yes. It helps with the release notes
(determining the contents of a release).

If/when you file the new BZ, please add the old BZ's URL to the See Also
field. ... Oh, wait, the original series didn't have a BZ. That's a pity.

Thanks
Laszlo

>
> Thanks
> Ashish
>
>>
>> diff --git 
>> a/DynamicTablesPkg/Library/Acpi/Arm/AcpiSsdtCpuTopologyLibArm/SsdtCpuTopologyGenerator.c
>>  
>> b/DynamicTablesPkg/Library/Acpi/Arm/AcpiSsdtCpuTopologyLibArm/SsdtCpuTopologyGenerator.c
>> index 8228c7845a..724f33c660 100644
>> --- 
>> a/DynamicTablesPkg/Library/Acpi/Arm/AcpiSsdtCpuTopologyLibArm/SsdtCpuTopologyGenerator.c
>> +++ 
>> b/DynamicTablesPkg/Library/Acpi/Arm/AcpiSsdtCpuTopologyLibArm/SsdtCpuTopologyGenerator.c
>> @@ -359,6 +359,7 @@ CreateAmlCpcNode (
>>
>>@param [in]  GeneratorThe SSDT Cpu Topology generator.
>>@param [in]  ParentNode   Parent node to attach the Cpu node to.
>> +  @param [in]  GicCInfo CM_ARM_GICC_INFO object used to create the node.
>>@param [in]  CpuName  Value used to generate the node name.
>>@param [out] EtNodePtr   If not NULL, return the created Cpu node.
>>
>> @@ -372,6 +373,7 @@ EFIAPI
>>  CreateAmlEtd (
>>IN   ACPI_CPU_TOPOLOGY_GENERATOR  *Generator,
>>IN   AML_NODE_HANDLE  ParentNode,
>> +  IN   CM_ARM_GICC_INFO *GicCInfo,
>>IN   UINT32   CpuName,
>>OUT  AML_OBJECT_NODE_HANDLE   *EtNodePtr OPTIONAL
>>)
>> @@ -397,7 +399,7 @@ CreateAmlEtd (
>>
>>Status = AmlCodeGenNameInteger (
>>   "_UID",
>> - CpuName,
>> + GicCInfo->AcpiProcessorUid,
>>   EtNode,
>>   NULL
>>   );
>> @@ -474,6 +476,7 @@ CreateAmlEtNode (
>>Status = CreateAmlEtd (
>>   Generator,
>>   Node,
>> + GicCInfo,
>>   CpuName,
>>   NULL
>>   );
>



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Re: [edk2-devel] [PATCH v2 1/1] MdeModulePkg: Fix issue with ACPI table creation

2023-11-17 Thread Laszlo Ersek

On 11/17/23 18:50, Chiu, Chasel wrote:
> 
> Hi Dhaval,
> 
> Just a small feedback,
> the only difference will be TableToInstall between XDsdt and Dsdt, could we 
> optimize the code flow to reduce duplicate lines?

since a v3 is being requested, let me ask for even more:

- can we specify the precise ACPI spec location in the commit message?

- s/abscent/absent/

thanks!
Laszlo

> 
> Thanks,
> Chasel
> 
> 
>> -Original Message-
>> From: devel@edk2.groups.io  On Behalf Of Dhaval
>> Sharma
>> Sent: Friday, November 17, 2023 3:35 AM
>> To: devel@edk2.groups.io
>> Cc: Gao, Liming ; Liu, Zhiguang
>> ; Bi, Dandan 
>> Subject: [edk2-devel] [PATCH v2 1/1] MdeModulePkg: Fix issue with ACPI table
>> creation
>>
>> As per spec if xDSDT is avaialble, it should be used first.
>> Handle required flow when xDSDT is abscent or present.
>>
>> Test: Tested on RISCV64 Qemu platform with xDSDT and booted to linux kernel.
>>
>> Cc: Liming Gao 
>> Cc: Zhiguang Liu 
>> Cc: Dandan Bi 
>> Signed-off-by: Dhaval Sharma 
>> ---
>>
>> Notes:
>> v2:
>> - Added proper indentation for else if
>>
>>  MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableProtocol.c | 13
>> -
>>  1 file changed, 12 insertions(+), 1 deletion(-)
>>
>> diff --git a/MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableProtocol.c
>> b/MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableProtocol.c
>> index e09bc9b704f5..11097ed4c3be 100644
>> --- a/MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableProtocol.c
>> +++ b/MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableProtocol.c
>> @@ -1892,7 +1892,18 @@ InstallAcpiTableFromHob (
>>} } -if 
>> (((EFI_ACPI_3_0_FIXED_ACPI_DESCRIPTION_TABLE
>> *)ChildTable)->Dsdt != 0) {+//+// First check if xDSDT is 
>> available that is
>> preferred+//+if (((EFI_ACPI_3_0_FIXED_ACPI_DESCRIPTION_TABLE
>> *)ChildTable)->XDsdt != 0) {+  TableToInstall = (VOID
>> *)(UINTN)((EFI_ACPI_3_0_FIXED_ACPI_DESCRIPTION_TABLE *)ChildTable)-
>>> XDsdt;+  Status = AddTableToList (AcpiTableInstance, 
>>> TableToInstall,
>> TRUE, Version, TRUE, );+  if (EFI_ERROR (Status)) {+
>> DEBUG
>> ((DEBUG_ERROR, "InstallAcpiTableFromHob: Fail to add ACPI table xDSDT\n"));+
>> ASSERT_EFI_ERROR (Status);+break;+  }+} else if
>> (((EFI_ACPI_3_0_FIXED_ACPI_DESCRIPTION_TABLE *)ChildTable)->Dsdt != 0)
>> {   TableToInstall = (VOID
>> *)(UINTN)((EFI_ACPI_3_0_FIXED_ACPI_DESCRIPTION_TABLE *)ChildTable)-
>>> Dsdt;   Status = AddTableToList (AcpiTableInstance, 
>>> TableToInstall,
>> TRUE, Version, TRUE, );   if (EFI_ERROR (Status)) {--
>> 2.39.2
>>
>>
>>
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>>
> 
> 
> 
> 
> 
> 



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Re: [edk2-devel] [PATCH] CloudHv: Add CI for CloudHv on AArch64

2023-11-17 Thread Laszlo Ersek

On 11/15/23 07:20, Jianyong Wu wrote:
> Add the long lost CI for CloudHv on AArch64.
> 
> Signed-off-by: Jianyong Wu 
> ---
>  .../.azurepipelines/Ubuntu-GCC5.yml   | 13 
>  ArmVirtPkg/PlatformCI/CloudHvBuild.py | 32 +++
>  2 files changed, 45 insertions(+)
>  create mode 100644 ArmVirtPkg/PlatformCI/CloudHvBuild.py

Please format and document patches such that they are easier to review.
Otherwise reviewers have to dig too much.

> 
> diff --git a/ArmVirtPkg/PlatformCI/.azurepipelines/Ubuntu-GCC5.yml 
> b/ArmVirtPkg/PlatformCI/.azurepipelines/Ubuntu-GCC5.yml
> index d1772a65fc..ab8a2db530 100644
> --- a/ArmVirtPkg/PlatformCI/.azurepipelines/Ubuntu-GCC5.yml
> +++ b/ArmVirtPkg/PlatformCI/.azurepipelines/Ubuntu-GCC5.yml
> @@ -140,6 +140,19 @@ jobs:
>  Build.Target: "RELEASE"
>  Run: false
>  
> +  CLOUDHV_AARCH64_DEBUG:
> +Build.File: "$(package)/PlatformCI/CloudHvBuild.py"
> +Build.Arch: "AARCH64"
> +Build.Flags: ""
> +Build.Target: "DEBUG"
> +Run: false
> +  CLOUDHV_AARCH64_RELEASE:
> +Build.File: "$(package)/PlatformCI/CloudHvBuild.py"
> +Build.Arch: "AARCH64"
> +Build.Flags: ""
> +Build.Target: "RELEASE"
> +Run: false
> +
>  workspace:
>clean: all
>  

This seems like a copy of the KVMTOOL stanzas, except with (a) ARM
removed, (b) KVMTOOL replaced by CLOUDHV, (c) KvmToolBuild.py replaced
with CloudHvBuild.py.

OK.

> diff --git a/ArmVirtPkg/PlatformCI/CloudHvBuild.py 
> b/ArmVirtPkg/PlatformCI/CloudHvBuild.py
> new file mode 100644
> index 00..0192cd6577
> --- /dev/null
> +++ b/ArmVirtPkg/PlatformCI/CloudHvBuild.py
> @@ -0,0 +1,32 @@
> +# @file
> +# Script to Build ArmVirtPkg UEFI firmware
> +#
> +# Copyright (c) Microsoft Corporation.
> +# SPDX-License-Identifier: BSD-2-Clause-Patent
> +##
> +import os
> +import sys
> +
> +sys.path.append(os.path.dirname(os.path.abspath(__file__)))
> +from PlatformBuildLib import SettingsManager
> +from PlatformBuildLib import PlatformBuilder
> +
> +# 
> ###
>  #
> +#Common Configuration
>  #
> +# 
> ###
>  #
> +class CommonPlatform():
> +''' Common settings for this platform.  Define static data here and use
> +for the different parts of stuart
> +'''
> +PackagesSupported = ("ArmVirtPkg",)
> +ArchSupported = ("AARCH64", "ARM")
> +TargetsSupported = ("DEBUG", "RELEASE")
> +Scopes = ('armvirt', 'edk2-build')
> +WorkspaceRoot = os.path.realpath(os.path.join(
> +os.path.dirname(os.path.abspath(__file__)), "..", ".."))
> +
> +DscName = os.path.join("ArmVirtPkg", "ArmVirtCloudHv.dsc")
> +FvQemuArg = "" # ignored
> +
> +import PlatformBuildLib
> +PlatformBuildLib.CommonPlatform = CommonPlatform

According to

  git show --find-copies-harder

this is a nearly identical copy of
"ArmVirtPkg/PlatformCI/KvmToolBuild.py", the only difference is:

-DscName = os.path.join("ArmVirtPkg", "ArmVirtKvmTool.dsc")
+DscName = os.path.join("ArmVirtPkg", "ArmVirtCloudHv.dsc")

It makes sense to me, but (a) this could have been documented in the
commit message; (b) the patch could have been formatted with
--find-copies-harder (and, indeed that option does not interfere with
patch application, as long as the --base=master option is also given to
git-format-patch -- then we know exactly where to check out a local
branch for applying the patch, and to rebase from.)

Anyway:

Reviewed-by: Laszlo Ersek 



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Re: [edk2-devel] [PATCH 0/2] SEV-SNP guest support fixes

2023-11-17 Thread Lendacky, Thomas via groups.io





On 11/7/23 03:55, Gerd Hoffmann wrote:

On Mon, Nov 06, 2023 at 04:45:29PM -0600, Tom Lendacky wrote:

This patch series provides fixes around AP startup and sorting:

- The CPUID_EXTENDED_TOPOLOGY CPUID leaf takes a sub-leaf as input. The
   current SEV-SNP support is attempting to retrieve the this leaf with
   sub-leaf 0, but is calling AsmCpuid(), which does not clear ECX before
   invoking the CPUID instruction. Therefore, because of the calling
   convention, the leaf value becomes the sub-leaf value and ends up
   returning incorrect information. Change the call from AsmCpuid() to
   AsmCpuidEx().

- When sorting the CPUs by APIC ID, the VMSA associated with the vCPU
   should follow the APIC ID. Update the sorting code to swap the VMSA
   pointer during the sort.


Series:
Acked-by: Gerd Hoffmann 



Eric/Ray/Rahul,

Have you had a chance to review this series? These bug fixes would be good 
to get in for the next/latest release...


Thanks,
Tom


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Re: [edk2-devel] [PATCH v2] OvmfPkg/MemEncryptSevLib: Fix address overflow during PVALIDATE

2023-11-17 Thread Laszlo Ersek

On 11/17/23 12:42, Gerd Hoffmann wrote:
> On Fri, Nov 17, 2023 at 10:16:10AM +0100, Laszlo Ersek wrote:
>> (+Liming +Mike)
>>
>> On 11/16/23 10:01, Gerd Hoffmann wrote:
>>> On Wed, Nov 15, 2023 at 11:51:53AM -0600, Michael Roth wrote:
 The struct used for GHCB-based page-state change requests uses a 40-bit
 bit-field for the GFN, which is shifted by PAGE_SHIFT to generate a
 64-bit address. However, anything beyond 40-bits simply gets shifted off
 when doing this, which will cause issues when dealing with 1TB+
 addresses. Fix this by casting the 40-bit GFN values to 64-bit ones
 prior to shifting it by PAGE_SHIFT.

 Fixes: ade62c18f474 ("OvmfPkg/MemEncryptSevLib: add support to validate 
 system RAM")
 Signed-off-by: Michael Roth 
>>>
>>> Reviewed-by: Gerd Hoffmann 
>>>
>>> take care,
>>>   Gerd
>>
>> Is this hard feature freeze material?
> 
> It is a clear bugfix, so IMHO it qualifies.
> 
>> Also, the patch looks garbled to me on-list (superfluous line breaks).
> 
> Patch applies fine here.  I see mutt breaking the long line, but
> that is just the local display rendering, the mail good.

Can you check the raw message? I did that and it seems broken.
Superfluous newlines. I see *double* CRLFs.

Laszlo



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Re: [edk2-devel] [PATCH v2 3/3] UefiCpuPkg/PiSmmCpuDxeSmm: Use processor extended information

2023-11-17 Thread Laszlo Ersek

On 11/16/23 02:30, Ni, Ray wrote:
> I cannot remember if CPUID.0B and CPUID.1F return the same value for
> package ID.
> 
> And I am not sure about the benefit if we get the package id from location2.

Isn't the benefit that Location2 / CPUID leaf 1F is fully specified,
while leaf 0B isn't? From the commit message it seems we should always
prefer leaf 1F and Location2, even if we're not aware of concrete
problems with leaf 0B.

Do you think we should only merge patches #1 and #2?

Thanks,
Laszlo

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Re: [edk2-devel] [PATCH] DynamicTablesPkg: Fix ETE _UID Creation

2023-11-17 Thread Laszlo Ersek

On 11/17/23 17:37, Ashish Singhal wrote:
> 
> 
> 
> *From:* Laszlo Ersek 
> *Sent:* Friday, November 17, 2023 2:20 AM
> *To:* devel@edk2.groups.io ; Ashish Singhal
> ; quic_llind...@quicinc.com
> ; ardb+tianoc...@kernel.org
> ; sami.muja...@arm.com
> ; Jeff Brasen 
> *Cc:* Michael Kinney ; Liming Gao (Byosoft
> address) 
> *Subject:* Re: [edk2-devel] [PATCH] DynamicTablesPkg: Fix ETE _UID Creation
>  
> External email: Use caution opening links or attachments
> 
> 
> On 11/15/23 04:19, Ashish Singhal via groups.io wrote:
>> Just like CPU _UID, ETE UID also needs to be unique so
>> use AcpiProcessorUid instead of CpuName
>>
>> Signed-off-by: Ashish Singhal 
>> ---
>>  .../Arm/AcpiSsdtCpuTopologyLibArm/SsdtCpuTopologyGenerator.c | 5 -
>>  1 file changed, 4 insertions(+), 1 deletion(-)
> 
> Is this a fixup for the recent feature
> 
> [PATCH v3 00/11] Update MADT for ACPI 6.5, and add TRBE & ETE support
> https://edk2.groups.io/g/devel/message/108996
> 
> 
> ?
> 
> If so, then I *think* this qualifies to be merged during the hard
> feature freeze (+Liming +Mike), but:
> 
> - I think we should have a "Fixes:" tag in the commit message (for
> pointing out the commit that should have contained the code being
> added/updated now)
> 
> - I think we should have a BZ too (also linked into the commit message).
> 
> Laszlo
> 
> Hello Laszlo,
> 
> The issue was indeed introduced in the patch series you pointed to and
> precisely in the commit
> https://github.com/tianocore/edk2/commit/3ee23713e1ce09faa6fa66ee6799e3e336deb58b
>  
> .
>  This is indeed a bug and should ideally be fixed as soon as possible. Do you 
> need me to file BZ bug and link that in commit message?

A BZ ticket would be great, yes. It helps with the release notes
(determining the contents of a release).

If/when you file the new BZ, please add the old BZ's URL to the See Also
field. ... Oh, wait, the original series didn't have a BZ. That's a pity.

Thanks
Laszlo

> 
> Thanks
> Ashish
> 
>>
>> diff --git 
>> a/DynamicTablesPkg/Library/Acpi/Arm/AcpiSsdtCpuTopologyLibArm/SsdtCpuTopologyGenerator.c
>>  
>> b/DynamicTablesPkg/Library/Acpi/Arm/AcpiSsdtCpuTopologyLibArm/SsdtCpuTopologyGenerator.c
>> index 8228c7845a..724f33c660 100644
>> --- 
>> a/DynamicTablesPkg/Library/Acpi/Arm/AcpiSsdtCpuTopologyLibArm/SsdtCpuTopologyGenerator.c
>> +++ 
>> b/DynamicTablesPkg/Library/Acpi/Arm/AcpiSsdtCpuTopologyLibArm/SsdtCpuTopologyGenerator.c
>> @@ -359,6 +359,7 @@ CreateAmlCpcNode (
>>
>>    @param [in]  Generator    The SSDT Cpu Topology generator.
>>    @param [in]  ParentNode   Parent node to attach the Cpu node to.
>> +  @param [in]  GicCInfo CM_ARM_GICC_INFO object used to create the node.
>>    @param [in]  CpuName  Value used to generate the node name.
>>    @param [out] EtNodePtr   If not NULL, return the created Cpu node.
>>
>> @@ -372,6 +373,7 @@ EFIAPI
>>  CreateAmlEtd (
>>    IN   ACPI_CPU_TOPOLOGY_GENERATOR  *Generator,
>>    IN   AML_NODE_HANDLE  ParentNode,
>> +  IN   CM_ARM_GICC_INFO *GicCInfo,
>>    IN   UINT32   CpuName,
>>    OUT  AML_OBJECT_NODE_HANDLE   *EtNodePtr OPTIONAL
>>    )
>> @@ -397,7 +399,7 @@ CreateAmlEtd (
>>
>>    Status = AmlCodeGenNameInteger (
>>   "_UID",
>> - CpuName,
>> + GicCInfo->AcpiProcessorUid,
>>   EtNode,
>>   NULL
>>   );
>> @@ -474,6 +476,7 @@ CreateAmlEtNode (
>>    Status = CreateAmlEtd (
>>   Generator,
>>   Node,
>> + GicCInfo,
>>   CpuName,
>>   NULL
>>   );
> 



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Re: [edk2-devel] [PATCH v3 13/39] UefiCpuPkg: Add CpuMmuLib.h to UefiCpuPkg

2023-11-17 Thread Andrei Warkentin

+Tuan as a heads-up.

This seems reasonable to me. What does the "Uint" mean in 
ConfigureMemoryManagementUint?

Did you intend to say "Unit"?

Reviewed-by: Andrei Warkentin 

> -Original Message-
> From: Chao Li 
> Sent: Friday, November 17, 2023 4:00 AM
> To: devel@edk2.groups.io
> Cc: Dong, Eric ; Ni, Ray ; Kumar,
> Rahul R ; Gerd Hoffmann ;
> Leif Lindholm ; Ard Biesheuvel
> ; Sami Mujawar ;
> Sunil V L ; Warkentin, Andrei
> 
> Subject: [PATCH v3 13/39] UefiCpuPkg: Add CpuMmuLib.h to UefiCpuPkg
> 
> Add a new header file CpuMmuLib.h, whitch is referenced from
> ArmPkg/Include/Library/ArmMmuLib.h. Currently, only support for
> LoongArch64 is added, and more architectures can be accommodated in the
> future.
> 
> BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4584
> 
> Cc: Eric Dong 
> Cc: Ray Ni 
> Cc: Rahul Kumar 
> Cc: Gerd Hoffmann 
> Cc: Leif Lindholm 
> Cc: Ard Biesheuvel 
> Cc: Sami Mujawar 
> Cc: Sunil V L 
> Cc: Andrei Warkentin 
> Signed-off-by: Chao Li 
> ---
>  UefiCpuPkg/Include/Library/CpuMmuLib.h | 155
> +
>  UefiCpuPkg/UefiCpuPkg.dec  |   4 +
>  2 files changed, 159 insertions(+)
>  create mode 100644 UefiCpuPkg/Include/Library/CpuMmuLib.h
> 
> diff --git a/UefiCpuPkg/Include/Library/CpuMmuLib.h
> b/UefiCpuPkg/Include/Library/CpuMmuLib.h
> new file mode 100644
> index 00..23b2fe34ac
> --- /dev/null
> +++ b/UefiCpuPkg/Include/Library/CpuMmuLib.h
> @@ -0,0 +1,155 @@
> +/** @file
> +
> +  Copyright (c) 2023 Loongson Technology Corporation Limited. All
> + rights reserved.
> +
> +  SPDX-License-Identifier: BSD-2-Clause-Patent
> +
> +**/
> +
> +#ifndef CPU_MMU_LIB_H_
> +#define CPU_MMU_LIB_H_
> +
> +#include 
> +
> +#define EFI_MEMORY_CACHETYPE_MASK  (EFI_MEMORY_UC  | \
> +EFI_MEMORY_WC  | \
> +EFI_MEMORY_WT  | \
> +EFI_MEMORY_WB  | \
> +EFI_MEMORY_UCE   \
> +)
> +
> +typedef struct {
> +  EFI_PHYSICAL_ADDRESSPhysicalBase;
> +  EFI_VIRTUAL_ADDRESS VirtualBase;
> +  UINTN   Length;
> +  UINTN   Attributes;
> +} MEMORY_REGION_DESCRIPTOR;
> +
> +/**
> +  Converts EFI Attributes to corresponding architecture Attributes.
> +
> +  @param[in]  EfiAttributes Efi Attributes.
> +
> +  @retval  Corresponding architecture attributes.
> +**/
> +UINTN
> +EfiAttributeConverse (
> +  IN UINTN  EfiAttributes
> +  );
> +
> +/**
> +  Finds the length and memory properties of the memory region
> corresponding to the specified base address.
> +
> +  @param[in]  BaseAddressTo find the base address of the memory
> region.
> +  @param[in]  EndAddress To find the end address of the memory region.
> +  @param[out]  RegionLengthThe length of the memory region found.
> +  @param[out]  RegionAttributesProperties of the memory region found.
> +
> +  @retval  EFI_SUCCESSThe corresponding memory area was successfully
> found
> +   EFI_NOT_FOUNDNo memory area found
> +**/
> +EFI_STATUS
> +GetMemoryRegionAttribute (
> +  IN UINTN  BaseAddress,
> +  IN UINTN  EndAddress,
> +  OUTUINTN  *RegionLength,
> +  OUTUINTN  *RegionAttributes
> +  );
> +
> +/**
> +  Sets the Attributes  of the specified memory region
> +
> +  @param[in]  BaseAddressThe base address of the memory region to set
> the Attributes.
> +  @param[in]  Length The length of the memory region to set the
> Attributes.
> +  @param[in]  Attributes The Attributes to be set.
> +  @param[in]  AttributeMask  Mask of memory attributes to take into
> account.
> +
> +  @retval  EFI_SUCCESSThe Attributes was set successfully
> +**/
> +EFI_STATUS
> +SetMemoryRegionAttributes (
> +  IN EFI_PHYSICAL_ADDRESS  BaseAddress,
> +  IN UINTN Length,
> +  IN UINTN Attributes,
> +  IN UINT64AttributeMask
> +  );
> +
> +/**
> +  Sets the non-executable Attributes for the specified memory region
> +
> +  @param[in]  BaseAddress  The base address of the memory region to set
> the Attributes.
> +  @param[in]  Length   The length of the memory region to set the
> Attributes.
> +
> +  @retval  EFI_SUCCESSThe Attributes was set successfully
> +**/
> +EFI_STATUS
> +SetMemoryRegionNoExec (
> +  IN  EFI_PHYSICAL_ADDRESS  BaseAddress,
> +  IN  UINTN Length
> +  );
> +
> +/**
> +  Clears the non-executable Attributes for the specified memory region
> +
> +  @param[in]  BaseAddress  The base address of the memory region to clear
> the Attributes.
> +  @param[in]  Length   The length of the memory region to clear the
> Attributes.
> +
> +  @retval  EFI_SUCCESSThe Attributes was clear successfully
> +**/
> +EFI_STATUS
> +EFIAPI
> +ClearMemoryRegionNoExec (
> +  IN  EFI_PHYSICAL_ADDRESS  BaseAddress,
> +  IN  UINT64Length
> +  );
> +
> +/**
> +  Sets the read-only

Re: [edk2-devel] [PATCH v3 23/39] OvmfPkg/RiscVVirt: Enable UefiCpuPkg version CpuIo2Dxe

2023-11-17 Thread Andrei Warkentin

So are you saying the UefiCpuPkg version of CpuIo2 is equivalent in function to 
the OvmfPkg one?

> -Original Message-
> From: Chao Li 
> Sent: Friday, November 17, 2023 4:02 AM
> To: devel@edk2.groups.io
> Cc: Sunil V L ; Warkentin, Andrei
> 
> Subject: [PATCH v3 23/39] OvmfPkg/RiscVVirt: Enable UefiCpuPkg version
> CpuIo2Dxe
> 
> Since the UefiCpuPkg/CpuIo2Dxe already supports MMIO, it is enabled at
> this thime.
> 
> Build-tested only (with "RiscVVirtQemu.dsc").
> 
> BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4584
> 
> Cc: Sunil V L 
> Cc: Andrei Warkentin 
> ---
>  OvmfPkg/RiscVVirt/RiscVVirtQemu.dsc | 4 +++-
> OvmfPkg/RiscVVirt/RiscVVirtQemu.fdf | 2 +-
>  2 files changed, 4 insertions(+), 2 deletions(-)
> 
> diff --git a/OvmfPkg/RiscVVirt/RiscVVirtQemu.dsc
> b/OvmfPkg/RiscVVirt/RiscVVirtQemu.dsc
> index 34b2037824..499902e445 100644
> --- a/OvmfPkg/RiscVVirt/RiscVVirtQemu.dsc
> +++ b/OvmfPkg/RiscVVirt/RiscVVirtQemu.dsc
> @@ -143,6 +143,8 @@
> 
>gEfiMdeModulePkgTokenSpaceGuid.PcdTurnOffUsbLegacySupport|TRUE
> 
> +  gEfiMdePkgTokenSpaceGuid.PcdPciIoTranslationIsEnabled|TRUE
> +
>  [PcdsFixedAtBuild.common]
>gEfiMdeModulePkgTokenSpaceGuid.PcdMaxVariableSize|0x2000
>gEfiMdeModulePkgTokenSpaceGuid.PcdMaxAuthVariableSize|0x2800
> @@ -445,7 +447,7 @@
>#
># PCI support
>#
> -  OvmfPkg/RiscVVirt/PciCpuIo2Dxe/PciCpuIo2Dxe.inf {
> +  UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.inf {
>  
>NULL|OvmfPkg/Fdt/FdtPciPcdProducerLib/FdtPciPcdProducerLib.inf
>}
> diff --git a/OvmfPkg/RiscVVirt/RiscVVirtQemu.fdf
> b/OvmfPkg/RiscVVirt/RiscVVirtQemu.fdf
> index 40d12e0f4c..dd138957a0 100644
> --- a/OvmfPkg/RiscVVirt/RiscVVirtQemu.fdf
> +++ b/OvmfPkg/RiscVVirt/RiscVVirtQemu.fdf
> @@ -184,7 +184,7 @@ INF  OvmfPkg/AcpiPlatformDxe/AcpiPlatformDxe.inf
>  #
>  # PCI support
>  #
> -INF  OvmfPkg/RiscVVirt/PciCpuIo2Dxe/PciCpuIo2Dxe.inf
> +INF  UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.inf
>  INF  MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridgeDxe.inf
>  INF  MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf
>  INF  OvmfPkg/PciHotPlugInitDxe/PciHotPlugInit.inf
> --
> 2.27.0



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Re: [edk2-devel] [Patch V2 1/3] UefiCpuPkg: Create MpInformation.h in UefiCpuPkg

2023-11-17 Thread Laszlo Ersek

On 11/17/23 10:39, duntan wrote:
> Copy MpInformation.h and gMpInformationHobGuid to
> UefiCpuPkg.
> Previously, the HOB is defined, created and consumed
> only in StandaloneMmPkg. The HOB contains the number
> of processors and EFI_PROCESSOR_INFORMATION structure.
> This is the same as the information that PiSmmCpuDxeSmm
> uses EfiMpServiceProtocolGuid to get.
> The incoming plan is to create gMpInformationHobGuid
> for both StandaloneMm and legacy DXE_SMM in early
> phase. Then PiSmmCpuDxeSmm can consume the hob, which can
> simplified code logic about consuming MpService Protocol.
> So move this HOB definition to UefiCpuPkg.
> 
> Signed-off-by: Dun Tan 
> Cc: Eric Dong 
> Cc: Ray Ni 
> Cc: Rahul Kumar 
> Cc: Gerd Hoffmann 
> Cc: Laszlo Ersek 
> ---
>  UefiCpuPkg/Include/Guid/MpInformation.h | 39 
> +++
>  UefiCpuPkg/UefiCpuPkg.dec   |  3 +++
>  2 files changed, 42 insertions(+)
> 
> diff --git a/UefiCpuPkg/Include/Guid/MpInformation.h 
> b/UefiCpuPkg/Include/Guid/MpInformation.h
> new file mode 100644
> index 00..29da80d4df
> --- /dev/null
> +++ b/UefiCpuPkg/Include/Guid/MpInformation.h
> @@ -0,0 +1,39 @@
> +/** @file
> +  EFI MP information protocol provides a lightweight MP_SERVICES_PROTOCOL.
> +
> +  MP information protocol only provides static information of MP processor.
> +
> +  If SwitchBSP or Enable/DisableAP in MP service is called between the HOB
> +  production and HOB consumption, EFI_PROCESSOR_INFORMATION.StatusFlag and
> +  NumberOfEnabledProcessors fields in this HOB may be invalidated.

Thanks for the update.

Acked-by: Laszlo Ersek 



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Re: [edk2-devel] [PATCH edk2-platforms 1/1] IpmiFeaturePkg/IpmiRedirFru: Switch to AfterConsole event for callback

2023-11-17 Thread Nate DeSimone

Pushed as 937e87b.

-Original Message-
From: Gong, Zhen  
Sent: Thursday, November 16, 2023 3:42 PM
To: devel@edk2.groups.io
Cc: Gong, Zhen ; Desimone, Nathaniel L 
; Gao, Liming 
Subject: [PATCH edk2-platforms 1/1] IpmiFeaturePkg/IpmiRedirFru: Switch to 
AfterConsole event for callback

Use AfterConsole event instead of ReadyToBoot for callback so the driver  can 
update SMBIOS table before booting to setup menu.

Cc: Nate DeSimone 
Cc: Liming Gao 

Change-Id: Ife697f4c78449b90f17ffa7b7bc5a6a5f77d9436
Signed-off-by: Zhen Gong 
---
 .../IpmiFeaturePkg/IpmiRedirFru/IpmiRedirFru.inf |  3 ++-
 .../IpmiFeaturePkg/IpmiRedirFru/IpmiRedirFru.h   |  1 -
 .../IpmiFeaturePkg/IpmiRedirFru/FruSmbios.c  | 16 +---
 3 files changed, 11 insertions(+), 9 deletions(-)

diff --git 
a/Features/Intel/OutOfBandManagement/IpmiFeaturePkg/IpmiRedirFru/IpmiRedirFru.inf
 
b/Features/Intel/OutOfBandManagement/IpmiFeaturePkg/IpmiRedirFru/IpmiRedirFru.inf
index 24fbc94128da..814f595b5abe 100644
--- 
a/Features/Intel/OutOfBandManagement/IpmiFeaturePkg/IpmiRedirFru/IpmiRedirFru.inf
+++ b/Features/Intel/OutOfBandManagement/IpmiFeaturePkg/IpmiRedirFru/Ipm
+++ iRedirFru.inf
@@ -25,6 +25,7 @@ [Packages]
   IpmiFeaturePkg/IpmiFeaturePkg.dec
   MdePkg/MdePkg.dec
   MdeModulePkg/MdeModulePkg.dec
+  MinPlatformPkg/MinPlatformPkg.dec
 
 [LibraryClasses]
   UefiDriverEntryPoint
@@ -32,12 +33,12 @@ [LibraryClasses]
   UefiBootServicesTableLib
   BaseMemoryLib
   MemoryAllocationLib
-  UefiLib
   IpmiBaseLib
 
 [Guids]
   gEfiIpmiFormatFruGuid
   gEfiSystemTypeFruGuid
+  gBdsEventAfterConsoleReadyBeforeBootOptionGuid
 
 [Protocols]
   gEfiSmbiosProtocolGuid
diff --git 
a/Features/Intel/OutOfBandManagement/IpmiFeaturePkg/IpmiRedirFru/IpmiRedirFru.h 
b/Features/Intel/OutOfBandManagement/IpmiFeaturePkg/IpmiRedirFru/IpmiRedirFru.h
index 9fd0067973a6..b5ffe1ad0518 100644
--- 
a/Features/Intel/OutOfBandManagement/IpmiFeaturePkg/IpmiRedirFru/IpmiRedirFru.h
+++ b/Features/Intel/OutOfBandManagement/IpmiFeaturePkg/IpmiRedirFru/Ipm
+++ iRedirFru.h
@@ -12,7 +12,6 @@ SPDX-License-Identifier: BSD-2-Clause-Patent  #include 
  #include   #include  -#include 

 
 #include 
 #include  diff --git 
a/Features/Intel/OutOfBandManagement/IpmiFeaturePkg/IpmiRedirFru/FruSmbios.c 
b/Features/Intel/OutOfBandManagement/IpmiFeaturePkg/IpmiRedirFru/FruSmbios.c
index bd4b35ba5793..9c63fae42678 100644
--- a/Features/Intel/OutOfBandManagement/IpmiFeaturePkg/IpmiRedirFru/FruSmbios.c
+++ b/Features/Intel/OutOfBandManagement/IpmiFeaturePkg/IpmiRedirFru/Fru
+++ Smbios.c
@@ -454,15 +454,17 @@ GenerateFruSmbiosData (
 
   mFruRedirProtocol = This;
 
-  Status = EfiCreateEventReadyToBootEx (
- TPL_CALLBACK,
- GenerateFruSmbiosType123DataNotified,
- NULL,
- 
- );
+  Status = gBS->CreateEventEx (
+  EVT_NOTIFY_SIGNAL,
+  TPL_CALLBACK,
+  GenerateFruSmbiosType123DataNotified,
+  NULL,
+  ,
+  
+  );
 
   if (EFI_ERROR (Status)) {
-DEBUG ((DEBUG_ERROR, "GenerateFruSmbiosData(): EfiCreateEventReadyToBootEx 
failed with return value: %r\n", Status));
+DEBUG ((DEBUG_ERROR, "GenerateFruSmbiosData(): Create AfterConsole 
+ event failed with return value: %r\n", Status));
   }
 
   return;
--
2.39.2.windows.1



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Re: [edk2-devel] [PATCH v1 1/1] OvmfPkg/Bhyve: use a proper PCI IO range

2023-11-17 Thread Rebecca Cran


On 11/17/2023 5:43 AM, Corvin Köhne wrote:

Bhyve uses an io port range of [ 0x2000, 0x1 ] [1]. At the moment,
EDKII is using a subset of this range [ 0xC000, 0x1 ] [2]. Even
though the EDKII range doesn't exeed the bhyve range, it's causing
issues on some guests like OpenBSD. We don't know why it's causing
issues yet. However, using the same IO port range in EDKII fixes the
issue and is a good idea anyway.


Reviewed-by: Rebecca Cran 



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Re: [edk2-devel] [PATCH] IntelFsp2Pkg/FspMultiPhaseLib: Remove EFIAPI for local function

2023-11-17 Thread Nate DeSimone

Reviewed-by: Nate DeSimone 

-Original Message-
From: Ni, Ray  
Sent: Sunday, November 12, 2023 11:39 PM
To: devel@edk2.groups.io
Cc: Chiu, Chasel ; Desimone, Nathaniel L 
; Duggapu, Chinni B 
; Ng, Ray Han Lim ; Zeng, 
Star ; Kuo, Ted ; S, Ashraf Ali 
; Mohapatra, Susovan 
Subject: [PATCH] IntelFsp2Pkg/FspMultiPhaseLib: Remove EFIAPI for local function

FspMultiPhaseWorker() is a local function that's called from
FspMultiPhaseMemInitApiHandler()
and FspMultiPhaseSiInitApiHandlerV2().

Remove "EFIAPI" from its function header.

Signed-off-by: Ray Ni 
Cc: Chasel Chiu 
Cc: Nate DeSimone 
Cc: Duggapu Chinni B 
Cc: Ray Han Lim Ng 
Cc: Star Zeng 
Cc: Ted Kuo 
Cc: Ashraf Ali S 
Cc: Susovan Mohapatra 
---
 IntelFsp2Pkg/Library/BaseFspMultiPhaseLib/FspMultiPhaseLib.c | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/IntelFsp2Pkg/Library/BaseFspMultiPhaseLib/FspMultiPhaseLib.c 
b/IntelFsp2Pkg/Library/BaseFspMultiPhaseLib/FspMultiPhaseLib.c
index 3786da91b1..4fc4104226 100644
--- a/IntelFsp2Pkg/Library/BaseFspMultiPhaseLib/FspMultiPhaseLib.c
+++ b/IntelFsp2Pkg/Library/BaseFspMultiPhaseLib/FspMultiPhaseLib.c
@@ -1,7 +1,7 @@
 /** @file

   FSP MultiPhase library.

 

-  Copyright (c) 2022, Intel Corporation. All rights reserved.

+  Copyright (c) 2022 - 2023, Intel Corporation. All rights reserved.

   SPDX-License-Identifier: BSD-2-Clause-Patent

 

 **/

@@ -58,7 +58,6 @@ FspVariableRequestSwitchStack (
   @retval EFI_DEVICE_ERRORFSP initialization failed.

 **/

 EFI_STATUS

-EFIAPI

 FspMultiPhaseWorker (

   IN UINT32  ApiIdx,

   IN VOID*ApiParam

-- 
2.39.1.windows.1



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Re: [edk2-devel] [PATCH edk2-platforms 1/1] IpmiFeaturePkg/IpmiRedirFru: Switch to AfterConsole event for callback

2023-11-17 Thread Nate DeSimone

Reviewed-by: Nate DeSimone 

-Original Message-
From: Gong, Zhen  
Sent: Thursday, November 16, 2023 3:42 PM
To: devel@edk2.groups.io
Cc: Gong, Zhen ; Desimone, Nathaniel L 
; Gao, Liming 
Subject: [PATCH edk2-platforms 1/1] IpmiFeaturePkg/IpmiRedirFru: Switch to 
AfterConsole event for callback

Use AfterConsole event instead of ReadyToBoot for callback so the driver  can 
update SMBIOS table before booting to setup menu.

Cc: Nate DeSimone 
Cc: Liming Gao 

Change-Id: Ife697f4c78449b90f17ffa7b7bc5a6a5f77d9436
Signed-off-by: Zhen Gong 
---
 .../IpmiFeaturePkg/IpmiRedirFru/IpmiRedirFru.inf |  3 ++-
 .../IpmiFeaturePkg/IpmiRedirFru/IpmiRedirFru.h   |  1 -
 .../IpmiFeaturePkg/IpmiRedirFru/FruSmbios.c  | 16 +---
 3 files changed, 11 insertions(+), 9 deletions(-)

diff --git 
a/Features/Intel/OutOfBandManagement/IpmiFeaturePkg/IpmiRedirFru/IpmiRedirFru.inf
 
b/Features/Intel/OutOfBandManagement/IpmiFeaturePkg/IpmiRedirFru/IpmiRedirFru.inf
index 24fbc94128da..814f595b5abe 100644
--- 
a/Features/Intel/OutOfBandManagement/IpmiFeaturePkg/IpmiRedirFru/IpmiRedirFru.inf
+++ b/Features/Intel/OutOfBandManagement/IpmiFeaturePkg/IpmiRedirFru/Ipm
+++ iRedirFru.inf
@@ -25,6 +25,7 @@ [Packages]
   IpmiFeaturePkg/IpmiFeaturePkg.dec
   MdePkg/MdePkg.dec
   MdeModulePkg/MdeModulePkg.dec
+  MinPlatformPkg/MinPlatformPkg.dec
 
 [LibraryClasses]
   UefiDriverEntryPoint
@@ -32,12 +33,12 @@ [LibraryClasses]
   UefiBootServicesTableLib
   BaseMemoryLib
   MemoryAllocationLib
-  UefiLib
   IpmiBaseLib
 
 [Guids]
   gEfiIpmiFormatFruGuid
   gEfiSystemTypeFruGuid
+  gBdsEventAfterConsoleReadyBeforeBootOptionGuid
 
 [Protocols]
   gEfiSmbiosProtocolGuid
diff --git 
a/Features/Intel/OutOfBandManagement/IpmiFeaturePkg/IpmiRedirFru/IpmiRedirFru.h 
b/Features/Intel/OutOfBandManagement/IpmiFeaturePkg/IpmiRedirFru/IpmiRedirFru.h
index 9fd0067973a6..b5ffe1ad0518 100644
--- 
a/Features/Intel/OutOfBandManagement/IpmiFeaturePkg/IpmiRedirFru/IpmiRedirFru.h
+++ b/Features/Intel/OutOfBandManagement/IpmiFeaturePkg/IpmiRedirFru/Ipm
+++ iRedirFru.h
@@ -12,7 +12,6 @@ SPDX-License-Identifier: BSD-2-Clause-Patent  #include 
  #include   #include  -#include 

 
 #include 
 #include  diff --git 
a/Features/Intel/OutOfBandManagement/IpmiFeaturePkg/IpmiRedirFru/FruSmbios.c 
b/Features/Intel/OutOfBandManagement/IpmiFeaturePkg/IpmiRedirFru/FruSmbios.c
index bd4b35ba5793..9c63fae42678 100644
--- a/Features/Intel/OutOfBandManagement/IpmiFeaturePkg/IpmiRedirFru/FruSmbios.c
+++ b/Features/Intel/OutOfBandManagement/IpmiFeaturePkg/IpmiRedirFru/Fru
+++ Smbios.c
@@ -454,15 +454,17 @@ GenerateFruSmbiosData (
 
   mFruRedirProtocol = This;
 
-  Status = EfiCreateEventReadyToBootEx (
- TPL_CALLBACK,
- GenerateFruSmbiosType123DataNotified,
- NULL,
- 
- );
+  Status = gBS->CreateEventEx (
+  EVT_NOTIFY_SIGNAL,
+  TPL_CALLBACK,
+  GenerateFruSmbiosType123DataNotified,
+  NULL,
+  ,
+  
+  );
 
   if (EFI_ERROR (Status)) {
-DEBUG ((DEBUG_ERROR, "GenerateFruSmbiosData(): EfiCreateEventReadyToBootEx 
failed with return value: %r\n", Status));
+DEBUG ((DEBUG_ERROR, "GenerateFruSmbiosData(): Create AfterConsole 
+ event failed with return value: %r\n", Status));
   }
 
   return;
--
2.39.2.windows.1



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Re: [edk2-devel] [PATCH v2 1/1] MdeModulePkg: Fix issue with ACPI table creation

2023-11-17 Thread Chiu, Chasel



Hi Dhaval,

Just a small feedback,
the only difference will be TableToInstall between XDsdt and Dsdt, could we 
optimize the code flow to reduce duplicate lines?

Thanks,
Chasel


> -Original Message-
> From: devel@edk2.groups.io  On Behalf Of Dhaval
> Sharma
> Sent: Friday, November 17, 2023 3:35 AM
> To: devel@edk2.groups.io
> Cc: Gao, Liming ; Liu, Zhiguang
> ; Bi, Dandan 
> Subject: [edk2-devel] [PATCH v2 1/1] MdeModulePkg: Fix issue with ACPI table
> creation
> 
> As per spec if xDSDT is avaialble, it should be used first.
> Handle required flow when xDSDT is abscent or present.
> 
> Test: Tested on RISCV64 Qemu platform with xDSDT and booted to linux kernel.
> 
> Cc: Liming Gao 
> Cc: Zhiguang Liu 
> Cc: Dandan Bi 
> Signed-off-by: Dhaval Sharma 
> ---
> 
> Notes:
> v2:
> - Added proper indentation for else if
> 
>  MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableProtocol.c | 13
> -
>  1 file changed, 12 insertions(+), 1 deletion(-)
> 
> diff --git a/MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableProtocol.c
> b/MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableProtocol.c
> index e09bc9b704f5..11097ed4c3be 100644
> --- a/MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableProtocol.c
> +++ b/MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableProtocol.c
> @@ -1892,7 +1892,18 @@ InstallAcpiTableFromHob (
>} } -if 
> (((EFI_ACPI_3_0_FIXED_ACPI_DESCRIPTION_TABLE
> *)ChildTable)->Dsdt != 0) {+//+// First check if xDSDT is 
> available that is
> preferred+//+if (((EFI_ACPI_3_0_FIXED_ACPI_DESCRIPTION_TABLE
> *)ChildTable)->XDsdt != 0) {+  TableToInstall = (VOID
> *)(UINTN)((EFI_ACPI_3_0_FIXED_ACPI_DESCRIPTION_TABLE *)ChildTable)-
> >XDsdt;+  Status = AddTableToList (AcpiTableInstance, 
> >TableToInstall,
> TRUE, Version, TRUE, );+  if (EFI_ERROR (Status)) {+ 
>DEBUG
> ((DEBUG_ERROR, "InstallAcpiTableFromHob: Fail to add ACPI table xDSDT\n"));+
> ASSERT_EFI_ERROR (Status);+break;+  }+} else if
> (((EFI_ACPI_3_0_FIXED_ACPI_DESCRIPTION_TABLE *)ChildTable)->Dsdt != 0)
> {   TableToInstall = (VOID
> *)(UINTN)((EFI_ACPI_3_0_FIXED_ACPI_DESCRIPTION_TABLE *)ChildTable)-
> >Dsdt;   Status = AddTableToList (AcpiTableInstance, 
> >TableToInstall,
> TRUE, Version, TRUE, );   if (EFI_ERROR (Status)) {--
> 2.39.2
> 
> 
> 
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Re: [edk2-devel] [PATCH] DynamicTablesPkg: Fix ETE _UID Creation

2023-11-17 Thread Ashish Singhal via groups.io




From: Laszlo Ersek 
Sent: Friday, November 17, 2023 2:20 AM
To: devel@edk2.groups.io ; Ashish Singhal 
; quic_llind...@quicinc.com 
; ardb+tianoc...@kernel.org 
; sami.muja...@arm.com ; Jeff 
Brasen 
Cc: Michael Kinney ; Liming Gao (Byosoft address) 

Subject: Re: [edk2-devel] [PATCH] DynamicTablesPkg: Fix ETE _UID Creation

External email: Use caution opening links or attachments


On 11/15/23 04:19, Ashish Singhal via groups.io wrote:
> Just like CPU _UID, ETE UID also needs to be unique so
> use AcpiProcessorUid instead of CpuName
>
> Signed-off-by: Ashish Singhal 
> ---
>  .../Arm/AcpiSsdtCpuTopologyLibArm/SsdtCpuTopologyGenerator.c | 5 -
>  1 file changed, 4 insertions(+), 1 deletion(-)

Is this a fixup for the recent feature

[PATCH v3 00/11] Update MADT for ACPI 6.5, and add TRBE & ETE support
https://edk2.groups.io/g/devel/message/108996

?

If so, then I *think* this qualifies to be merged during the hard
feature freeze (+Liming +Mike), but:

- I think we should have a "Fixes:" tag in the commit message (for
pointing out the commit that should have contained the code being
added/updated now)

- I think we should have a BZ too (also linked into the commit message).

Laszlo

Hello Laszlo,

The issue was indeed introduced in the patch series you pointed to and 
precisely in the commit 
https://github.com/tianocore/edk2/commit/3ee23713e1ce09faa6fa66ee6799e3e336deb58b.
 This is indeed a bug and should ideally be fixed as soon as possible. Do you 
need me to file BZ bug and link that in commit message?

Thanks
Ashish

>
> diff --git 
> a/DynamicTablesPkg/Library/Acpi/Arm/AcpiSsdtCpuTopologyLibArm/SsdtCpuTopologyGenerator.c
>  
> b/DynamicTablesPkg/Library/Acpi/Arm/AcpiSsdtCpuTopologyLibArm/SsdtCpuTopologyGenerator.c
> index 8228c7845a..724f33c660 100644
> --- 
> a/DynamicTablesPkg/Library/Acpi/Arm/AcpiSsdtCpuTopologyLibArm/SsdtCpuTopologyGenerator.c
> +++ 
> b/DynamicTablesPkg/Library/Acpi/Arm/AcpiSsdtCpuTopologyLibArm/SsdtCpuTopologyGenerator.c
> @@ -359,6 +359,7 @@ CreateAmlCpcNode (
>
>@param [in]  GeneratorThe SSDT Cpu Topology generator.
>@param [in]  ParentNode   Parent node to attach the Cpu node to.
> +  @param [in]  GicCInfo CM_ARM_GICC_INFO object used to create the node.
>@param [in]  CpuName  Value used to generate the node name.
>@param [out] EtNodePtr   If not NULL, return the created Cpu node.
>
> @@ -372,6 +373,7 @@ EFIAPI
>  CreateAmlEtd (
>IN   ACPI_CPU_TOPOLOGY_GENERATOR  *Generator,
>IN   AML_NODE_HANDLE  ParentNode,
> +  IN   CM_ARM_GICC_INFO *GicCInfo,
>IN   UINT32   CpuName,
>OUT  AML_OBJECT_NODE_HANDLE   *EtNodePtr OPTIONAL
>)
> @@ -397,7 +399,7 @@ CreateAmlEtd (
>
>Status = AmlCodeGenNameInteger (
>   "_UID",
> - CpuName,
> + GicCInfo->AcpiProcessorUid,
>   EtNode,
>   NULL
>   );
> @@ -474,6 +476,7 @@ CreateAmlEtNode (
>Status = CreateAmlEtd (
>   Generator,
>   Node,
> + GicCInfo,
>   CpuName,
>   NULL
>   );



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Re: [edk2-devel] [PATCH v1 1/1] OvmfPkg/Bhyve: use a proper PCI IO range

2023-11-17 Thread Laszlo Ersek

On 11/17/23 13:43, Corvin Köhne wrote:
> Bhyve uses an io port range of [ 0x2000, 0x1 ] [1]. At the moment,
> EDKII is using a subset of this range [ 0xC000, 0x1 ] [2]. Even
> though the EDKII range doesn't exeed the bhyve range, it's causing

s/exeed/exceed/

> issues on some guests like OpenBSD. We don't know why it's causing
> issues yet. However, using the same IO port range in EDKII fixes the
> issue and is a good idea anyway.
> 
> [1] 
> https://github.com/freebsd/freebsd-src/blob/82ea0132c8b17a7a6067c8a36c6434e587ede6de/usr.sbin/bhyve/pci_emul.c#L133-L134
> [2] 
> https://github.com/tianocore/edk2/blob/fb044b7fe893a4545995bfe2701fd38e593355d9/OvmfPkg/Bhyve/PlatformPei/Platform.c#L156-L157
> 
> Signed-off-by: Corvin Köhne 
> Cc: Ard Biesheuvel 
> Cc: Gerd Hoffmann 
> Cc: Jiewen Yao 
> Cc: Rebecca Cran 
> ---
>  OvmfPkg/Bhyve/PlatformPei/Platform.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/OvmfPkg/Bhyve/PlatformPei/Platform.c 
> b/OvmfPkg/Bhyve/PlatformPei/Platform.c
> index f6d9a9038e12..bd1b22a9476e 100644
> --- a/OvmfPkg/Bhyve/PlatformPei/Platform.c
> +++ b/OvmfPkg/Bhyve/PlatformPei/Platform.c
> @@ -153,8 +153,8 @@ MemMapInitialization (
>UINT64 PciIoSize;
>RETURN_STATUS  PcdStatus;
>  
> -  PciIoBase = 0xC000;
> -  PciIoSize = 0x4000;
> +  PciIoBase = 0x2000;
> +  PciIoSize = 0xE000;
>  
>//
>// Create Memory Type Information HOB

Reviewed-by: Laszlo Ersek 

Can you create a BZ for this issue? With that, I think this should be
possible to merge during the hard feature freeze. Adding Liming.

(For the typo fix in the commit message, either post v2, or ask Liming
to fix it up upon merge.)

Thanks
Laszlo



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Re: [edk2-devel] [Bug] Building NetworkPkg fails due to missing SynchronizationLib dependency of BaseCryptLib

2023-11-17 Thread Laszlo Ersek

On 11/17/23 13:49, CrossedCarpet wrote:
> Steps to reproduce:
> - download and setup edk2
> - run:
> build -a X64 -b DEBUG -t GCC -p NetworkPkg/NetworkPkg.dsc
> 
> Get the error:
> build.py...
> /.../edk2/NetworkPkg/NetworkPkg.dsc(...): error 4000: Instance of
> library class [SynchronizationLib] is not found
> in [/.../edk2/CryptoPkg/Library/BaseCryptLib/BaseCryptLib.inf] [X64]
> consumed by module [/.../edk2/NetworkPkg/TlsDxe/TlsDxe.inf]
> 
> Adding this LibClass to NetworkPkg.dsc solves it:
>  
> SynchronizationLib|MdePkg/Library/BaseSynchronizationLib/BaseSynchronizationLib.inf

This is a regression from commit 5d5be45bd111 ("CryptPkg: Enable CryptoPkg 
BaseCryptLib ParallelHash for PEI and DXE", 2022-12-02), which was made for 
.

It added a new lib class dependency to "BaseCryptLib.inf", but it didn't ensure 
that all DSC files in the tree that employed the "BaseCryptLib.inf" instance 
had a resolution for the new lib class.

Indeed it is not just NetworkPkg.dsc but also FmpDevicePkg.dsc that's affected:

$ git grep -l -F CryptoPkg/Library/BaseCryptLib/BaseCryptLib.inf -- '**dsc*' \
  | xargs -- grep --files-without-match -w SynchronizationLib --

FmpDevicePkg/FmpDevicePkg.dsc
NetworkPkg/NetworkPkg.dsc

It also *seems* to affect at least one platform in edk2-platforms:

Platform/Intel/MinPlatformPkg/Include/Dsc/CoreDxeLib.dsc

(although I realize this last DSC file is an "include" DSC, so the missing 
dependency could be resolved in the DSC file that includes this one.)

Either way, thanks for catching this; the edk2 issue should be fixed preferably 
during the current hard feature freeze (for NetworkPkg and FmpDevicePkg).

> I tried to open a bug in bugzilla but I wasn't able to log in or create
> an account. How should I do it next time?

I think the bugzilla account creation was disabled due to spammer accounts.

The way to request an account is described here (linked from the 
bugzilla.tianocore.org landing page under link "Reporting issues"):

  https://github.com/tianocore/tianocore.github.io/wiki/Reporting-Issues

(I've added Liming to the CC list of this email.)

Laszlo

> 

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Re: [edk2-devel] question about PrmPkg

2023-11-17 Thread Michael Kubacki


On 11/17/2023 3:42 AM, Laszlo Ersek wrote:

On 11/17/23 03:15, Yoshinoya wrote:

Hi,
I find there is a PrmPkg in udk source code.
Based on its Readme.md, its goal is to offload smm code to sci os
mechanisms.

So, is there any actual use case on real platform now?

It seems it's just a conceptional prototype.


It's way too big for it to be unused.

The original BZ was .

I'm sure Microsoft uses it in production. Client code for this
infrastructure may be present in Project Mu (I didn't try to check), or
in proprietary repositories. Perhaps Michael (CC'd) can share some details.

I can't speak to how it is being used everywhere but it is used in 
production. Other vendors have been involved (at least at various points 
in time).


The ACPI 6.4 spec reserved the PRMT table signature. The ACPI 6.5 spec 
defined the _SB._OSC bit for an OS to declare PRM compatibility and 
define a PRM OpRegion identifier. Support has been in iasl since 20200528.


The PRM spec is on uefi.org. I believe this was ultimately pushed there 
by Intel.


https://uefi.org/sites/default/files/resources/Platform%20Runtime%20Mechanism%20-%20with%20legal%20notice.pdf

It was added to edk2 to provide code for specifications on uefi.org, 
make it available to vendors that do not use Mu but use it, and 
similarly, in response to interest from others.


The Code in PrmPkg is infrastructure to support loading custom handlers 
so it is not expected to receive a large amount of churn.



Laszlo








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Re: 回复: [edk2-devel] [PATCH v6 0/2] Fix and optimize the issue if IPv4 installed after RestEx

2023-11-17 Thread Igor Kulchytskyy via groups.io

Liming,
I fixed the uncrustify issues.
Thank you,
Igor

-Original Message-
From: gaoliming 
Sent: Friday, November 17, 2023 5:05 AM
To: devel@edk2.groups.io; Igor Kulchytskyy ; 'Chang, Abner' 
; 'Leif Lindholm' 
Subject: [EXTERNAL] 回复: [edk2-devel] [PATCH v6 0/2] Fix and optimize the issue 
if IPv4 installed after RestEx


**CAUTION: The e-mail below is from an external source. Please exercise caution 
before opening attachments, clicking links, or following guidance.**

Igor:
  I re-create pull request https://github.com/tianocore/edk2/pull/5052 to 
revert previous commits and append new commits.

Thanks
Liming
> -邮件原件-
> 发件人: devel@edk2.groups.io  代表 Igor
> Kulchytskyy via groups.io
> 发送时间: 2023年11月16日 21:45
> 收件人: Chang, Abner ; devel@edk2.groups.io; Leif
> Lindholm 
> 抄送: Gao, Liming 
> 主题: Re: [edk2-devel] [PATCH v6 0/2] Fix and optimize the issue if IPv4
> installed after RestEx
>
> Hi Liming,
> I created PR for the final v6 patch:
> https://github.com/tianocore/edk2/pull/5050
> Could you please merge those changes?
> Thank you,
> Igor
>
> -Original Message-
> From: Chang, Abner 
> Sent: Thursday, November 16, 2023 8:03 AM
> To: devel@edk2.groups.io; Igor Kulchytskyy ; Leif Lindholm
> 
> Subject: [EXTERNAL] RE: [edk2-devel] [PATCH v6 0/2] Fix and optimize the
> issue if IPv4 installed after RestEx
>
>
> **CAUTION: The e-mail below is from an external source. Please exercise
> caution before opening attachments, clicking links, or following guidance.**
>
> [AMD Official Use Only - General]
>
> Great and happy ending! 
>
> Hi Igor, could you please inform Liming he can merge this change.
> Thanks
> Abner
>
> > -Original Message-
> > From: devel@edk2.groups.io  On Behalf Of Igor
> > Kulchytskyy via groups.io
> > Sent: Thursday, November 16, 2023 8:31 PM
> > To: Leif Lindholm ; devel@edk2.groups.io
> > Subject: Re: [edk2-devel] [PATCH v6 0/2] Fix and optimize the issue if IPv4
> > installed after RestEx
> >
> > Caution: This message originated from an External Source. Use proper
> caution
> > when opening attachments, clicking links, or responding.
> >
> >
> > Thank you all for the reviews!
> >
> > -Original Message-
> > From: Leif Lindholm 
> > Sent: Thursday, November 16, 2023 7:29 AM
> > To: devel@edk2.groups.io; Igor Kulchytskyy 
> > Subject: [EXTERNAL] Re: [edk2-devel] [PATCH v6 0/2] Fix and optimize the
> > issue if IPv4 installed after RestEx
> >
> >
> > **CAUTION: The e-mail below is from an external source. Please exercise
> > caution before opening attachments, clicking links, or following guidance.**
> >
> > On Wed, Nov 15, 2023 at 22:12:34 +, Igor Kulchytskyy via groups.io
> > wrote:
> > > Igor Kulchytskyy (2):
> > >   RedfishPkg: RedfishDiscoverDxe: Fix issue if IPv4 installed after
> > > RestEx
> > >   RedfishPkg: RedfishDiscoverDxe: Optimize the Redfish Discover flow
> > >
> > >  .../RedfishDiscoverDxe/RedfishDiscoverDxe.c   | 225
> --
> > >  .../RedfishDiscoverInternal.h |   4 +
> > >  2 files changed, 158 insertions(+), 71 deletions(-)
> >
> > Happy with this. Many thanks for the rework.
> >
> > For the series:
> > Acked-by: Leif Lindholm 
> >
> >
> > > --
> > > 2.37.1.windows.1
> > > -The information contained in this message may be confidential and
> > proprietary to American Megatrends (AMI). This communication is intended
> > to be read only by the individual or entity to whom it is addressed or by 
> > their
> > designee. If the reader of this message is not the intended recipient, you 
> > are
> > on notice that any distribution of this message, in any form, is strictly
> > prohibited. Please promptly notify the sender by reply e-mail or by
> telephone
> > at 770-246-8600, and then delete or destroy all copies of the transmission.
> > >
> > >
> > >
> > >
> > >
> > -The information contained in this message may be confidential and
> > proprietary to American Megatrends (AMI). This communication is intended
> > to be read only by the individual or entity to whom it is addressed or by 
> > their
> > designee. If the reader of this message is not the intended recipient, you 
> > are
> > on notice that any distribution of this message, in any form, is strictly
> > prohibited. Please promptly notify the sender by reply e-mail or by
> telephone
> > at 770-246-8600, and then delete or destroy all copies of the transmission.
> >
> >
> >
> >
>
> -The information contained in this message may be confidential and
> proprietary to American Megatrends (AMI). This communication is intended to
> be read only by the individual or entity to whom it is addressed or by their
> designee. If the reader of this message is not the intended recipient, you are
> on notice that any distribution of this message, in any form, is strictly
> prohibited. Please promptly notify the sender by reply e-mail or by telephone
> at 770-246-8600, and then delete or destroy all copies of the transmission.
>
>
> 
>



-The information

Re: [edk2-devel] [PATCH v3 22/39] ArmPkg: Remove ArmPciCpuIo2Dxe from ArmPkg

2023-11-17 Thread Leif Lindholm

On Fri, Nov 17, 2023 at 18:01:39 +0800, Chao Li wrote:
> ArmPciCpuIo2Dxe has been merged into CpuIo2Dxe, and CpuIo2Dxe is already
> used by all ARM virtual platforms, so remove it.

This does affect 15 platforms in edk2-platforms.
You should ping the maintainers of the affected platforms, or even
better write a patch yourself, so we don't end up with sudden
mass-breakage.

It might be worth splitting this patch out of the rest of the set in
order to permit a more graceful switchover.

/
Leif

> BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4584
> 
> Cc: Leif Lindholm 
> Cc: Ard Biesheuvel 
> Cc: Sami Mujawar 
> ---
>  ArmPkg/ArmPkg.dsc |   1 -
>  .../Drivers/ArmPciCpuIo2Dxe/ArmPciCpuIo2Dxe.c | 556 --
>  .../ArmPciCpuIo2Dxe/ArmPciCpuIo2Dxe.inf   |  47 --
>  3 files changed, 604 deletions(-)
>  delete mode 100644 ArmPkg/Drivers/ArmPciCpuIo2Dxe/ArmPciCpuIo2Dxe.c
>  delete mode 100644 ArmPkg/Drivers/ArmPciCpuIo2Dxe/ArmPciCpuIo2Dxe.inf
> 
> diff --git a/ArmPkg/ArmPkg.dsc b/ArmPkg/ArmPkg.dsc
> index 6dd91e6941..7af25a91a1 100644
> --- a/ArmPkg/ArmPkg.dsc
> +++ b/ArmPkg/ArmPkg.dsc
> @@ -143,7 +143,6 @@
>  
>ArmPkg/Library/ArmMmuLib/ArmMmuBaseLib.inf
>  
> -  ArmPkg/Drivers/ArmPciCpuIo2Dxe/ArmPciCpuIo2Dxe.inf
>ArmPkg/Library/ArmArchTimerLib/ArmArchTimerLib.inf
>ArmPkg/Library/ArmGicArchLib/ArmGicArchLib.inf
>ArmPkg/Library/ArmGicArchSecLib/ArmGicArchSecLib.inf
> diff --git a/ArmPkg/Drivers/ArmPciCpuIo2Dxe/ArmPciCpuIo2Dxe.c 
> b/ArmPkg/Drivers/ArmPciCpuIo2Dxe/ArmPciCpuIo2Dxe.c
> deleted file mode 100644
> index 5a2866ccd8..00
> --- a/ArmPkg/Drivers/ArmPciCpuIo2Dxe/ArmPciCpuIo2Dxe.c
> +++ /dev/null
> @@ -1,556 +0,0 @@
> -/** @file
> -  Produces the CPU I/O 2 Protocol.
> -
> -Copyright (c) 2009 - 2012, Intel Corporation. All rights reserved.
> -Copyright (c) 2016, Linaro Ltd. All rights reserved.
> -
> -SPDX-License-Identifier: BSD-2-Clause-Patent
> -
> -**/
> -
> -#include 
> -
> -#include 
> -
> -#include 
> -#include 
> -#include 
> -#include 
> -#include 
> -
> -#define MAX_IO_PORT_ADDRESS  0x
> -
> -//
> -// Handle for the CPU I/O 2 Protocol
> -//
> -STATIC EFI_HANDLE  mHandle = NULL;
> -
> -//
> -// Lookup table for increment values based on transfer widths
> -//
> -STATIC CONST UINT8  mInStride[] = {
> -  1, // EfiCpuIoWidthUint8
> -  2, // EfiCpuIoWidthUint16
> -  4, // EfiCpuIoWidthUint32
> -  8, // EfiCpuIoWidthUint64
> -  0, // EfiCpuIoWidthFifoUint8
> -  0, // EfiCpuIoWidthFifoUint16
> -  0, // EfiCpuIoWidthFifoUint32
> -  0, // EfiCpuIoWidthFifoUint64
> -  1, // EfiCpuIoWidthFillUint8
> -  2, // EfiCpuIoWidthFillUint16
> -  4, // EfiCpuIoWidthFillUint32
> -  8  // EfiCpuIoWidthFillUint64
> -};
> -
> -//
> -// Lookup table for increment values based on transfer widths
> -//
> -STATIC CONST UINT8  mOutStride[] = {
> -  1, // EfiCpuIoWidthUint8
> -  2, // EfiCpuIoWidthUint16
> -  4, // EfiCpuIoWidthUint32
> -  8, // EfiCpuIoWidthUint64
> -  1, // EfiCpuIoWidthFifoUint8
> -  2, // EfiCpuIoWidthFifoUint16
> -  4, // EfiCpuIoWidthFifoUint32
> -  8, // EfiCpuIoWidthFifoUint64
> -  0, // EfiCpuIoWidthFillUint8
> -  0, // EfiCpuIoWidthFillUint16
> -  0, // EfiCpuIoWidthFillUint32
> -  0  // EfiCpuIoWidthFillUint64
> -};
> -
> -/**
> -  Check parameters to a CPU I/O 2 Protocol service request.
> -
> -  The I/O operations are carried out exactly as requested. The caller is 
> responsible
> -  for satisfying any alignment and I/O width restrictions that a PI System 
> on a
> -  platform might require. For example on some platforms, width requests of
> -  EfiCpuIoWidthUint64 do not work. Misaligned buffers, on the other hand, 
> will
> -  be handled by the driver.
> -
> -  @param[in] MmioOperation  TRUE for an MMIO operation, FALSE for I/O Port 
> operation.
> -  @param[in] Width  Signifies the width of the I/O or Memory 
> operation.
> -  @param[in] AddressThe base address of the I/O operation.
> -  @param[in] Count  The number of I/O operations to perform. The 
> number of
> -bytes moved is Width size * Count, starting at 
> Address.
> -  @param[in] Buffer For read operations, the destination buffer to 
> store the results.
> -For write operations, the source buffer from 
> which to write data.
> -
> -  @retval EFI_SUCCESSThe parameters for this request pass the 
> checks.
> -  @retval EFI_INVALID_PARAMETER  Width is invalid for this PI system.
> -  @retval EFI_INVALID_PARAMETER  Buffer is NULL.
> -  @retval EFI_UNSUPPORTEDThe Buffer is not aligned for the given 
> Width.
> -  @retval EFI_UNSUPPORTEDThe address range specified by Address, 
> Width,
> - and Count is not valid for this PI system.
> -
> -**/
> -STATIC
> -EFI_STATUS
> -CpuIoCheckParameter (
> -  IN BOOLEANMmioOperation,
> -  IN EFI_CPU_IO_PROTOCOL_WIDTH  Width,
> -  IN UINT64

[edk2-devel] [Bug] Building NetworkPkg fails due to missing SynchronizationLib dependency of BaseCryptLib

2023-11-17 Thread CrossedCarpet

Steps to reproduce:
- download and setup edk2
- run:
build -a X64 -b DEBUG -t GCC -p NetworkPkg/NetworkPkg.dsc

Get the error:
build.py...
/.../edk2/NetworkPkg/NetworkPkg.dsc(...): error 4000: Instance of library class 
[SynchronizationLib] is not found
in [/.../edk2/CryptoPkg/Library/BaseCryptLib/BaseCryptLib.inf] [X64]
consumed by module [/.../edk2/NetworkPkg/TlsDxe/TlsDxe.inf]

Adding this LibClass to NetworkPkg.dsc solves it:
SynchronizationLib|MdePkg/Library/BaseSynchronizationLib/BaseSynchronizationLib.inf

I tried to open a bug in bugzilla but I wasn't able to log in or create an 
account. How should I do it next time?


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[edk2-devel] [PATCH v1 1/1] OvmfPkg/Bhyve: use a proper PCI IO range

2023-11-17 Thread Corvin Köhne

Bhyve uses an io port range of [ 0x2000, 0x1 ] [1]. At the moment,
EDKII is using a subset of this range [ 0xC000, 0x1 ] [2]. Even
though the EDKII range doesn't exeed the bhyve range, it's causing
issues on some guests like OpenBSD. We don't know why it's causing
issues yet. However, using the same IO port range in EDKII fixes the
issue and is a good idea anyway.

[1] 
https://github.com/freebsd/freebsd-src/blob/82ea0132c8b17a7a6067c8a36c6434e587ede6de/usr.sbin/bhyve/pci_emul.c#L133-L134
[2] 
https://github.com/tianocore/edk2/blob/fb044b7fe893a4545995bfe2701fd38e593355d9/OvmfPkg/Bhyve/PlatformPei/Platform.c#L156-L157

Signed-off-by: Corvin Köhne 
Cc: Ard Biesheuvel 
Cc: Gerd Hoffmann 
Cc: Jiewen Yao 
Cc: Rebecca Cran 
---
 OvmfPkg/Bhyve/PlatformPei/Platform.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/OvmfPkg/Bhyve/PlatformPei/Platform.c 
b/OvmfPkg/Bhyve/PlatformPei/Platform.c
index f6d9a9038e12..bd1b22a9476e 100644
--- a/OvmfPkg/Bhyve/PlatformPei/Platform.c
+++ b/OvmfPkg/Bhyve/PlatformPei/Platform.c
@@ -153,8 +153,8 @@ MemMapInitialization (
   UINT64 PciIoSize;
   RETURN_STATUS  PcdStatus;
 
-  PciIoBase = 0xC000;
-  PciIoSize = 0x4000;
+  PciIoBase = 0x2000;
+  PciIoSize = 0xE000;
 
   //
   // Create Memory Type Information HOB
-- 
2.42.0



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Re: [edk2-devel] [PATCH v2] OvmfPkg/MemEncryptSevLib: Fix address overflow during PVALIDATE

2023-11-17 Thread Gerd Hoffmann

On Fri, Nov 17, 2023 at 10:16:10AM +0100, Laszlo Ersek wrote:
> (+Liming +Mike)
> 
> On 11/16/23 10:01, Gerd Hoffmann wrote:
> > On Wed, Nov 15, 2023 at 11:51:53AM -0600, Michael Roth wrote:
> >> The struct used for GHCB-based page-state change requests uses a 40-bit
> >> bit-field for the GFN, which is shifted by PAGE_SHIFT to generate a
> >> 64-bit address. However, anything beyond 40-bits simply gets shifted off
> >> when doing this, which will cause issues when dealing with 1TB+
> >> addresses. Fix this by casting the 40-bit GFN values to 64-bit ones
> >> prior to shifting it by PAGE_SHIFT.
> >>
> >> Fixes: ade62c18f474 ("OvmfPkg/MemEncryptSevLib: add support to validate 
> >> system RAM")
> >> Signed-off-by: Michael Roth 
> > 
> > Reviewed-by: Gerd Hoffmann 
> > 
> > take care,
> >   Gerd
> 
> Is this hard feature freeze material?

It is a clear bugfix, so IMHO it qualifies.

> Also, the patch looks garbled to me on-list (superfluous line breaks).

Patch applies fine here.  I see mutt breaking the long line, but
that is just the local display rendering, the mail good.

take care,
  Gerd



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[edk2-devel] [PATCH v2 1/1] MdeModulePkg: Fix issue with ACPI table creation

2023-11-17 Thread Dhaval Sharma

As per spec if xDSDT is avaialble, it should be used first.
Handle required flow when xDSDT is abscent or present.

Test: Tested on RISCV64 Qemu platform with xDSDT and booted to
linux kernel.

Cc: Liming Gao 
Cc: Zhiguang Liu 
Cc: Dandan Bi 
Signed-off-by: Dhaval Sharma 
---

Notes:
v2:
- Added proper indentation for else if

 MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableProtocol.c | 13 -
 1 file changed, 12 insertions(+), 1 deletion(-)

diff --git a/MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableProtocol.c 
b/MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableProtocol.c
index e09bc9b704f5..11097ed4c3be 100644
--- a/MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableProtocol.c
+++ b/MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableProtocol.c
@@ -1892,7 +1892,18 @@ InstallAcpiTableFromHob (
   }
 }
 
-if (((EFI_ACPI_3_0_FIXED_ACPI_DESCRIPTION_TABLE *)ChildTable)->Dsdt != 
0) {
+//
+// First check if xDSDT is available that is preferred
+//
+if (((EFI_ACPI_3_0_FIXED_ACPI_DESCRIPTION_TABLE *)ChildTable)->XDsdt 
!= 0) {
+  TableToInstall = (VOID 
*)(UINTN)((EFI_ACPI_3_0_FIXED_ACPI_DESCRIPTION_TABLE *)ChildTable)->XDsdt;
+  Status = AddTableToList (AcpiTableInstance, TableToInstall, 
TRUE, Version, TRUE, );
+  if (EFI_ERROR (Status)) {
+DEBUG ((DEBUG_ERROR, "InstallAcpiTableFromHob: Fail to add ACPI 
table xDSDT\n"));
+ASSERT_EFI_ERROR (Status);
+break;
+  }
+} else if (((EFI_ACPI_3_0_FIXED_ACPI_DESCRIPTION_TABLE 
*)ChildTable)->Dsdt != 0) {
   TableToInstall = (VOID 
*)(UINTN)((EFI_ACPI_3_0_FIXED_ACPI_DESCRIPTION_TABLE *)ChildTable)->Dsdt;
   Status = AddTableToList (AcpiTableInstance, TableToInstall, 
TRUE, Version, TRUE, );
   if (EFI_ERROR (Status)) {
-- 
2.39.2



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[edk2-devel] [PATCH v2 0/1] Add support for XDSDT table

2023-11-17 Thread Dhaval Sharma

Enable detection of XDSDT table from ACPI HOB and use it
if it is available: https://github.com/tianocore/edk2/pull/5051

Dhaval (1):
  MdeModulePkg: Fix issue with ACPI table creation

 MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableProtocol.c | 13 -
 1 file changed, 12 insertions(+), 1 deletion(-)

-- 
2.39.2



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Re: [edk2-devel] [PATCH v3 09/39] MdePkg: Add a new library named PeiServicesTablePointerLibReg

2023-11-17 Thread Leif Lindholm

Not my package, just spotted a typo below:

On Fri, Nov 17, 2023 at 17:59:49 +0800, Chao Li wrote:
> Since some ARCH or platform not require execute code on memory during
> PEI phase, some values may transferred via CPU registers.
> 
> Adding PeiServcieTablePointerLibReg to allow set and get the PEI service
> table pointer depend by a CPU register, this library can accommodate lot
> of platforms who not require execte code on memory during PEI phase.
> 
> Adding PeiServiceTablePointerLibReg to allows setting and getting the
> PEI service table pointer via CPU registers, and the library can
> accommodate many platforms that do not need to execute code on memory
> during the PEI phase.
> 
> The idea of this library is derived from
> ArmPkg/Library/PeiServicesTablePointerLib/
> 
> BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4584
> 
> Cc: Michael D Kinney 
> Cc: Liming Gao 
> Cc: Zhiguang Liu 
> Cc: Leif Lindholm 
> Cc: Ard Biesheuvel 
> Cc: Sami Mujawar 
> Cc: Laszlo Ersek 
> Cc: Sunil V L 
> Signed-off-by: Chao Li 
> ---
>  .../Library/PeiServicesTablePointerLib.h  | 37 +++-
>  .../PeiServicesTablePointer.c | 86 +++
>  .../PeiServicesTablePointerLib.uni| 20 +
>  .../PeiServicesTablePointerLibReg.inf | 40 +
>  MdePkg/MdePkg.dsc |  1 +
>  5 files changed, 180 insertions(+), 4 deletions(-)
>  create mode 100644 
> MdePkg/Library/PeiServicesTablePointerLibReg/PeiServicesTablePointer.c
>  create mode 100644 
> MdePkg/Library/PeiServicesTablePointerLibReg/PeiServicesTablePointerLib.uni
>  create mode 100644 
> MdePkg/Library/PeiServicesTablePointerLibReg/PeiServicesTablePointerLibReg.inf
> 
> diff --git a/MdePkg/Include/Library/PeiServicesTablePointerLib.h 
> b/MdePkg/Include/Library/PeiServicesTablePointerLib.h
> index 61635eff00..f5c764cb13 100644
> --- a/MdePkg/Include/Library/PeiServicesTablePointerLib.h
> +++ b/MdePkg/Include/Library/PeiServicesTablePointerLib.h
> @@ -52,10 +52,11 @@ SetPeiServicesTablePointer (
>immediately preceding the Interrupt Descriptor Table (IDT) in memory.
>For X64 CPUs, the PEI Services Table pointer is stored in the 8 bytes
>immediately preceding the Interrupt Descriptor Table (IDT) in memory.
> -  For Itanium and ARM CPUs, a the PEI Services Table Pointer is stored in
> -  a dedicated CPU register.  This means that there is no memory storage
> -  associated with storing the PEI Services Table pointer, so no additional
> -  migration actions are required for Itanium or ARM CPUs.
> +  For Itanium, ARM and LoongArch CPUs, a the PEI Services Table Pointer
> +  is stored in a dedicated CPU register.  This means that there is no
> +  memory storage associated with storing the PEI Services Table pointer,
> +  so no additional migration actions are required for Itanium, ARM and
> +  LoongArch CPUs.
>  
>  **/
>  VOID
> @@ -64,4 +65,32 @@ MigratePeiServicesTablePointer (
>VOID
>);
>  
> +/**
> +  Retrieves the cached value of the PEI Services Table pointer from a CPU 
> register.
> +
> +  Returns the cached value of the PEI Services Table pointer in a CPU 
> specific manner
> +  as specified in the CPU binding section of the Platform Initialization 
> Pre-EFI
> +  Initialization Core Interface Specification.
> +
> +  @return  The pointer to PeiServices.
> +**/
> +CONST EFI_PEI_SERVICES **
> +EFIAPI
> +GetPeiServicesTablePointerFromRegister (
> +  VOID
> +  );
> +
> +/**
> +  Set the pointer PEI Service Table to a CPU register.
> +
> +  Caches the pointer to the PEI Services Table specified by 
> PeiServicesTablePointer
> +  in a platform specific manner.
> +
> +  @paramPeiServicesTablePointer   The address of PeiServices.
> +**/
> +VOID
> +EFIAPI
> +SetPeiServicesTablePointerToRegester (

SetPeiServicesTablePointerToRegester ->
SetPeiServicesTablePointerToRegister

Regester -> Register.

/
Leif

> +  IN UINTN  PeiServicesTablePointer
> +  );
>  #endif
> diff --git 
> a/MdePkg/Library/PeiServicesTablePointerLibReg/PeiServicesTablePointer.c 
> b/MdePkg/Library/PeiServicesTablePointerLibReg/PeiServicesTablePointer.c
> new file mode 100644
> index 00..0227f98871
> --- /dev/null
> +++ b/MdePkg/Library/PeiServicesTablePointerLibReg/PeiServicesTablePointer.c
> @@ -0,0 +1,86 @@
> +/** @file
> +  PEI Services Table Pointer Library For Reigseter Mechanism.
> +
> +  This library is used for PEIM which does executed from flash device 
> directly but
> +  executed in memory.
> +
> +  Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.
> +  Copyright (c) 2011 Hewlett-Packard Corporation. All rights reserved.
> +  Copyright (c) 2023 Loongson Technology Corporation Limited. All rights 
> reserved.
> +
> +  SPDX-License-Identifier: BSD-2-Clause-Patent
> +
> +**/
> +
> +#include 
> +#include 
> +#include 
> +
> +/**
> +  Caches a pointer PEI Services Table.
> +
> +  Caches the pointer to the PEI Services Table specified by 
> PeiServicesTablePointer
>

回复: [edk2-devel] [PATCH v6 0/2] Fix and optimize the issue if IPv4 installed after RestEx

2023-11-17 Thread gaoliming via groups.io

Igor:
  I re-create pull request https://github.com/tianocore/edk2/pull/5052 to 
revert previous commits and append new commits. 

Thanks
Liming
> -邮件原件-
> 发件人: devel@edk2.groups.io  代表 Igor
> Kulchytskyy via groups.io
> 发送时间: 2023年11月16日 21:45
> 收件人: Chang, Abner ; devel@edk2.groups.io; Leif
> Lindholm 
> 抄送: Gao, Liming 
> 主题: Re: [edk2-devel] [PATCH v6 0/2] Fix and optimize the issue if IPv4
> installed after RestEx
> 
> Hi Liming,
> I created PR for the final v6 patch:
> https://github.com/tianocore/edk2/pull/5050
> Could you please merge those changes?
> Thank you,
> Igor
> 
> -Original Message-
> From: Chang, Abner 
> Sent: Thursday, November 16, 2023 8:03 AM
> To: devel@edk2.groups.io; Igor Kulchytskyy ; Leif Lindholm
> 
> Subject: [EXTERNAL] RE: [edk2-devel] [PATCH v6 0/2] Fix and optimize the
> issue if IPv4 installed after RestEx
> 
> 
> **CAUTION: The e-mail below is from an external source. Please exercise
> caution before opening attachments, clicking links, or following guidance.**
> 
> [AMD Official Use Only - General]
> 
> Great and happy ending! 
> 
> Hi Igor, could you please inform Liming he can merge this change.
> Thanks
> Abner
> 
> > -Original Message-
> > From: devel@edk2.groups.io  On Behalf Of Igor
> > Kulchytskyy via groups.io
> > Sent: Thursday, November 16, 2023 8:31 PM
> > To: Leif Lindholm ; devel@edk2.groups.io
> > Subject: Re: [edk2-devel] [PATCH v6 0/2] Fix and optimize the issue if IPv4
> > installed after RestEx
> >
> > Caution: This message originated from an External Source. Use proper
> caution
> > when opening attachments, clicking links, or responding.
> >
> >
> > Thank you all for the reviews!
> >
> > -Original Message-
> > From: Leif Lindholm 
> > Sent: Thursday, November 16, 2023 7:29 AM
> > To: devel@edk2.groups.io; Igor Kulchytskyy 
> > Subject: [EXTERNAL] Re: [edk2-devel] [PATCH v6 0/2] Fix and optimize the
> > issue if IPv4 installed after RestEx
> >
> >
> > **CAUTION: The e-mail below is from an external source. Please exercise
> > caution before opening attachments, clicking links, or following guidance.**
> >
> > On Wed, Nov 15, 2023 at 22:12:34 +, Igor Kulchytskyy via groups.io
> > wrote:
> > > Igor Kulchytskyy (2):
> > >   RedfishPkg: RedfishDiscoverDxe: Fix issue if IPv4 installed after
> > > RestEx
> > >   RedfishPkg: RedfishDiscoverDxe: Optimize the Redfish Discover flow
> > >
> > >  .../RedfishDiscoverDxe/RedfishDiscoverDxe.c   | 225
> --
> > >  .../RedfishDiscoverInternal.h |   4 +
> > >  2 files changed, 158 insertions(+), 71 deletions(-)
> >
> > Happy with this. Many thanks for the rework.
> >
> > For the series:
> > Acked-by: Leif Lindholm 
> >
> >
> > > --
> > > 2.37.1.windows.1
> > > -The information contained in this message may be confidential and
> > proprietary to American Megatrends (AMI). This communication is intended
> > to be read only by the individual or entity to whom it is addressed or by 
> > their
> > designee. If the reader of this message is not the intended recipient, you 
> > are
> > on notice that any distribution of this message, in any form, is strictly
> > prohibited. Please promptly notify the sender by reply e-mail or by
> telephone
> > at 770-246-8600, and then delete or destroy all copies of the transmission.
> > >
> > >
> > >
> > >
> > >
> > -The information contained in this message may be confidential and
> > proprietary to American Megatrends (AMI). This communication is intended
> > to be read only by the individual or entity to whom it is addressed or by 
> > their
> > designee. If the reader of this message is not the intended recipient, you 
> > are
> > on notice that any distribution of this message, in any form, is strictly
> > prohibited. Please promptly notify the sender by reply e-mail or by
> telephone
> > at 770-246-8600, and then delete or destroy all copies of the transmission.
> >
> >
> >
> >
> 
> -The information contained in this message may be confidential and
> proprietary to American Megatrends (AMI). This communication is intended to
> be read only by the individual or entity to whom it is addressed or by their
> designee. If the reader of this message is not the intended recipient, you are
> on notice that any distribution of this message, in any form, is strictly
> prohibited. Please promptly notify the sender by reply e-mail or by telephone
> at 770-246-8600, and then delete or destroy all copies of the transmission.
> 
> 
> 
> 





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[edk2-devel] [PATCH v3 39/39] OvmfPkg/LoongArchVirt: Add self introduction file

2023-11-17 Thread Chao Li

Add self introduction file for LoongArch virtual machine.

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4584

Cc: Ard Biesheuvel 
Cc: Jiewen Yao 
Cc: Jordan Justen 
Cc: Gerd Hoffmann 
Signed-off-by: Chao Li 
---
 OvmfPkg/LoongArchVirt/Readme.md | 67 +
 1 file changed, 67 insertions(+)
 create mode 100644 OvmfPkg/LoongArchVirt/Readme.md

diff --git a/OvmfPkg/LoongArchVirt/Readme.md b/OvmfPkg/LoongArchVirt/Readme.md
new file mode 100644
index 00..57fc74c296
--- /dev/null
+++ b/OvmfPkg/LoongArchVirt/Readme.md
@@ -0,0 +1,67 @@
+# LoongArch QEMU virt platform
+
+## Overview
+
+  LoongArch QEMU virt is a generic platform that dose not require any actual 
hardware.
+  The minimum required QEMU version is 
[8.1](https://gitlab.com/qemu-project/qemu/-/tags), the minimum required GCC 
version is [GCC13](https://gcc.gnu.org/gcc-13/), the minimum required Binutils 
version is [2.40](https://ftp.gnu.org/gnu/binutils/).
+
+## Prepare (X86 Linux Environment)
+
+### Fedora39
+Install LoongArch64 cross compiler, LoongArch system QEMU.
+
+yum install gcc-loongarch64-linux-gnu
+yum install qemu-system-loongarch64
+
+### Others X86 OS ENV
+ Configure cross-tools
+
+**Download:**
+
+wget 
https://github.com/loongson/build-tools/releases/download/2023.08.08/x86_64-cross-tools-loongarch64-binutils_2.41-gcc_13.2.0.tar.xz
+
+**Configure the cross-tools environment:**
+
+mkdir /opt/loongarch64_cross-toolchain/
+tar -vxf x86_64-cross-tools-loongarch64-binutils_2.41-gcc_13.2.0.tar.xz -C 
/opt/loongarch64_cross-toolchain/
+export PATH=/opt/loongarch64_cross-toolchain/cross-tools/bin:$PATH
+
+Note: Please obtain [the latest 
cross-compilation](https://github.com/loongson/build-tools) toolchains.
+
+ Build QEMU
+
+git clone https://gitlab.com/qemu-project/qemu.git
+
+Note: Please refer to QEMU compilation rules, located in 
qemu/doc/system/loongarch/virt.rst.
+
+
+## Build LoongArch QEMU virtual machine firmware
+ Get edk2 resouces
+
+git clone --recurse-submodule https://github.com/tianocore/edk2.git
+
+ Building LoongArch QEMU virt FW with GCC
+
+export WORKSPACE=`pwd`
+export GCC5_LOONGARCH64_PREFIX=loongarch64-unknown-linux-gnu-
+export PACKAGES_PATH=$WORKSPACE/edk2
+export EDK_TOOLS_PATH=$WORKSPACE/edk2/BaseTools
+source edk2/edksetup.sh --reconfig
+make -C edk2/BaseTools
+source edk2/edksetup.sh BaseTools
+build -b RELEASE -t GCC5 -a LOONGARCH64 -p 
OvmfPkg/LoongArchVirt/LoongArchVirtQemu.dsc
+
+## Test LoongArch QEMU virtual machine firmware
+qemu-system-loongarch64 \
+-m 4G \
+-M virt \
+-smp 2 \
+-cpu la464 \
+-bios Build/LoongArchVirtQemu/RELEASE_GCC5/FV/QEMU_EFI.fd \
+-serial stdio
+
+## Test LoongArch QEMU virtual machine OS
+
+* Download ArchLinux QCOW 
[images](https://mirrors.pku.edu.cn/loongarch/archlinux/images) for LoongArch.
+
+* [Running LoongArch ArchLinux on virtual 
machine](https://mirrors.pku.edu.cn/loongarch/archlinux/images/README.html).
-- 
2.27.0



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[edk2-devel] [PATCH v3 38/39] OvmfPkg/LoongArchVirt: Add build file

2023-11-17 Thread Chao Li

Add infrastructure files to build edk2 for LoongArch QEMU virtual
machine.

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4584

Cc: Ard Biesheuvel 
Cc: Jiewen Yao 
Cc: Jordan Justen 
Cc: Gerd Hoffmann 
Signed-off-by: Chao Li 
Co-authored-by: Xianglai Li 
Co-authored-by: Bibo Mao 
---
 OvmfPkg/LoongArchVirt/LoongArchVirt.fdf.inc |  34 +
 OvmfPkg/LoongArchVirt/LoongArchVirtQemu.dsc | 679 
 OvmfPkg/LoongArchVirt/LoongArchVirtQemu.fdf | 313 +
 OvmfPkg/LoongArchVirt/VarStore.fdf.inc  |  67 ++
 4 files changed, 1093 insertions(+)
 create mode 100644 OvmfPkg/LoongArchVirt/LoongArchVirt.fdf.inc
 create mode 100644 OvmfPkg/LoongArchVirt/LoongArchVirtQemu.dsc
 create mode 100644 OvmfPkg/LoongArchVirt/LoongArchVirtQemu.fdf
 create mode 100644 OvmfPkg/LoongArchVirt/VarStore.fdf.inc

diff --git a/OvmfPkg/LoongArchVirt/LoongArchVirt.fdf.inc 
b/OvmfPkg/LoongArchVirt/LoongArchVirt.fdf.inc
new file mode 100644
index 00..47bd1e0a05
--- /dev/null
+++ b/OvmfPkg/LoongArchVirt/LoongArchVirt.fdf.inc
@@ -0,0 +1,34 @@
+## @file
+#
+#  Copyright (c) 2023 Loongson Technology Corporation Limited. All rights 
reserved.
+#
+#  SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+##
+
+DEFINE BLOCK_SIZE = 0x1000
+
+
+# FW total
+DEFINE FW_BASE_ADDRESS= 0x1c00
+DEFINE FW_BLOCKS  = 0x400
+DEFINE FW_SIZE= 0x40
+
+
+#Flash code layout
+#Set Sec size in flash
+DEFINE SECFV_SIZE = 0x0001
+
+#Set Pei size in flash
+DEFINE PEIFV_SIZE = 0x0004
+
+#Set Dxe size in flash
+DEFINE DXEFV_SIZE = 0x0035
+
+#Set FVMAIN size
+DEFINE FVMAIN_SIZE= $(SECFV_SIZE) + $(PEIFV_SIZE) 
+$(DXEFV_SIZE)
+
+#Set Memory layout
+DEFINE SEC_PEI_TEMP_RAM_BASE  = 0x1
+DEFINE SEC_PEI_TEMP_RAM_SIZE  = 0x8
+DEFINE DEVICE_TREE_RAM_BASE   = 0x10
diff --git a/OvmfPkg/LoongArchVirt/LoongArchVirtQemu.dsc 
b/OvmfPkg/LoongArchVirt/LoongArchVirtQemu.dsc
new file mode 100644
index 00..c4524f33f7
--- /dev/null
+++ b/OvmfPkg/LoongArchVirt/LoongArchVirtQemu.dsc
@@ -0,0 +1,679 @@
+## @file
+#
+#  Copyright (c) 2023 Loongson Technology Corporation Limited. All rights 
reserved.
+#
+#  SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+##
+
+
+#
+# Defines Section - statements that will be processed to create a Makefile.
+#
+###
+[Defines]
+  PLATFORM_NAME  = LoongArchVirtQemu
+  PLATFORMPKG_NAME   = LoongArchVirtQemu
+  PLATFORM_GUID  = 7926ea52-b0dc-4ee8-ac63-341eebd84ed4
+  PLATFORM_VERSION   = 0.1
+  DSC_SPECIFICATION  = 0x00010005
+  OUTPUT_DIRECTORY   = Build/$(PLATFORM_NAME)
+  SUPPORTED_ARCHITECTURES= LOONGARCH64
+  BUILD_TARGETS  = DEBUG|RELEASE
+  SKUID_IDENTIFIER   = DEFAULT
+  FLASH_DEFINITION   = OvmfPkg/LoongArchVirt/LoongArchVirtQemu.fdf
+  TTY_TERMINAL   = FALSE
+
+!include LoongArchVirt.fdf.inc
+
+  #
+  # Defines for default states.  These can be changed on the command line.
+  # -D FLAG=VALUE
+  DEFINE TTY_TERMINAL= FALSE
+  DEFINE SECURE_BOOT_ENABLE  = FALSE
+  DEFINE TPM2_ENABLE = FALSE
+  DEFINE TPM2_CONFIG_ENABLE  = FALSE
+
+  #
+  # Network definition
+  #
+  DEFINE NETWORK_IP6_ENABLE  = FALSE
+  DEFINE NETWORK_HTTP_BOOT_ENABLE= FALSE
+  DEFINE NETWORK_SNP_ENABLE  = FALSE
+  DEFINE NETWORK_TLS_ENABLE  = FALSE
+  DEFINE NETWORK_ALLOW_HTTP_CONNECTIONS  = TRUE
+  DEFINE NETWORK_ISCSI_ENABLE= FALSE
+
+!include NetworkPkg/NetworkDefines.dsc.inc
+
+#
+# Defines for default states.  These can be changed on the command line.
+# -D FLAG=VALUE
+
+[BuildOptions]
+  GCC:RELEASE_*_*_CC_FLAGS   = -DSPEEDUP
+
+  #
+  # Disable deprecated APIs.
+  #
+  GCC:*_*_*_CC_FLAGS = -D DISABLE_NEW_DEPRECATED_INTERFACES
+
+!include NetworkPkg/NetworkBuildOptions.dsc.inc
+
+[BuildOptions.LOONGARCH64.EDKII.SEC]
+  *_*_*_CC_FLAGS =
+
+#
+# Default page size is 16K for loongarch qemu tcg
+# code section separated with data section with 16K page alignment, else data
+# write operation in the same page with code section will cause qemu TB flush.
+#
+[BuildOptions.common.EDKII.DXE_CORE,BuildOptions.common.EDKII.DXE_DRIVER,BuildOptions.common.EDKII.UEFI_DRIVER,BuildOptions.common.EDKII.UEFI_APPLICATION]
+  GCC:*_*_*_DLINK_FLAGS = -z common-page-size=0x4000
+

[edk2-devel] [PATCH v3 37/39] OvmfPkg/LoongArchVirt: Support PEI phase

2023-11-17 Thread Chao Li

Platfrom PEI module for LoongArch platfrom initialization.

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4584

Cc: Ard Biesheuvel 
Cc: Jiewen Yao 
Cc: Jordan Justen 
Cc: Gerd Hoffmann 
Signed-off-by: Chao Li 
Co-authored-by: Xianglai Li 
Co-authored-by: Bibo Mao 
---
 OvmfPkg/LoongArchVirt/PlatformPei/Fv.c|  40 ++
 OvmfPkg/LoongArchVirt/PlatformPei/MemDetect.c | 201 +
 OvmfPkg/LoongArchVirt/PlatformPei/Platform.c  | 393 ++
 OvmfPkg/LoongArchVirt/PlatformPei/Platform.h  | 127 ++
 .../LoongArchVirt/PlatformPei/PlatformPei.inf |  72 
 5 files changed, 833 insertions(+)
 create mode 100644 OvmfPkg/LoongArchVirt/PlatformPei/Fv.c
 create mode 100644 OvmfPkg/LoongArchVirt/PlatformPei/MemDetect.c
 create mode 100644 OvmfPkg/LoongArchVirt/PlatformPei/Platform.c
 create mode 100644 OvmfPkg/LoongArchVirt/PlatformPei/Platform.h
 create mode 100644 OvmfPkg/LoongArchVirt/PlatformPei/PlatformPei.inf

diff --git a/OvmfPkg/LoongArchVirt/PlatformPei/Fv.c 
b/OvmfPkg/LoongArchVirt/PlatformPei/Fv.c
new file mode 100644
index 00..eb9e29d580
--- /dev/null
+++ b/OvmfPkg/LoongArchVirt/PlatformPei/Fv.c
@@ -0,0 +1,40 @@
+/** @file
+  Build FV related hobs for platform.
+
+  Copyright (c) 2023 Loongson Technology Corporation Limited. All rights 
reserved.
+
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include "PiPei.h"
+#include "Platform.h"
+#include 
+#include 
+#include 
+#include 
+
+/**
+  Publish PEI & DXE (Decompressed) Memory based FVs to let PEI
+  and DXE know about them.
+
+  @retval EFI_SUCCESS   Platform PEI FVs were initialized successfully.
+**/
+EFI_STATUS
+PeiFvInitialization (
+  VOID
+  )
+{
+  DEBUG ((DEBUG_INFO, "Platform PEI Firmware Volume Initialization\n"));
+
+  //
+  // Create a memory allocation HOB for the PEI FV.
+  //
+  BuildMemoryAllocationHob (
+FixedPcdGet64 (PcdOvmfSecPeiTempRamBase),
+FixedPcdGet32 (PcdOvmfSecPeiTempRamSize),
+EfiBootServicesData
+);
+
+  return EFI_SUCCESS;
+}
diff --git a/OvmfPkg/LoongArchVirt/PlatformPei/MemDetect.c 
b/OvmfPkg/LoongArchVirt/PlatformPei/MemDetect.c
new file mode 100644
index 00..347a070423
--- /dev/null
+++ b/OvmfPkg/LoongArchVirt/PlatformPei/MemDetect.c
@@ -0,0 +1,201 @@
+/** @file
+  Memory Detection for Virtual Machines.
+
+  Copyright (c) 2023 Loongson Technology Corporation Limited. All rights 
reserved.
+
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+//
+// The package level header files this module uses
+//
+#include 
+
+//
+// The Library classes this module consumes
+//
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include "Platform.h"
+
+#define MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS  (128)
+#define LOONGARCH_FW_RAM_TOPBASE_256MB
+
+/**
+  Publish PEI core memory
+
+  @return EFI_SUCCESS The PEIM initialized successfully.
+**/
+EFI_STATUS
+PublishPeiMemory (
+  VOID
+  )
+{
+  EFI_STATUS  Status;
+  UINT64  Base;
+  UINT64  Size;
+  UINT64  RamTop;
+
+  //
+  // Determine the range of memory to use during PEI
+  //
+  Base   = FixedPcdGet64 (PcdOvmfSecPeiTempRamBase) + FixedPcdGet32 
(PcdOvmfSecPeiTempRamSize);
+  RamTop = LOONGARCH_FW_RAM_TOP;
+  Size   = RamTop - Base;
+
+  //
+  // Publish this memory to the PEI Core
+  //
+  Status = PublishSystemMemory (Base, Size);
+  ASSERT_EFI_ERROR (Status);
+
+  DEBUG ((DEBUG_INFO, "Publish Memory Initialize done.\n"));
+  return Status;
+}
+
+/**
+  Peform Memory Detection
+  Publish system RAM and reserve memory regions
+**/
+VOID
+InitializeRamRegions (
+  VOID
+  )
+{
+  EFI_STATUSStatus;
+  FIRMWARE_CONFIG_ITEM  FwCfgItem;
+  UINTN FwCfgSize;
+  MEMMAP_ENTRY  MemoryMapEntry;
+  MEMMAP_ENTRY  *StartEntry;
+  MEMMAP_ENTRY  *pEntry;
+  UINTN Processed;
+
+  Status = QemuFwCfgFindFile ("etc/memmap", , );
+  if (EFI_ERROR (Status)) {
+DEBUG ((DEBUG_ERROR, "%a %d read etc/memmap error Status %d \n", __func__, 
__LINE__, Status));
+return;
+  }
+
+  if (FwCfgSize % sizeof MemoryMapEntry != 0) {
+DEBUG ((DEBUG_ERROR, "no MemoryMapEntry FwCfgSize:%d\n", FwCfgSize));
+return;
+  }
+
+  QemuFwCfgSelectItem (FwCfgItem);
+  StartEntry = AllocatePages (EFI_SIZE_TO_PAGES (FwCfgSize));
+  QemuFwCfgReadBytes (FwCfgSize, StartEntry);
+  for (Processed = 0; Processed < (FwCfgSize / sizeof MemoryMapEntry); 
Processed++) {
+pEntry = StartEntry + Processed;
+if (pEntry->Length == 0) {
+  continue;
+}
+
+DEBUG ((DEBUG_INFO, "MemmapEntry Base %p length %p  type %d\n", 
pEntry->BaseAddr, pEntry->Length, pEntry->Type));
+if (pEntry->Type != EfiAcpiAddressRangeMemory) {
+  continue;
+}
+
+AddMemoryRangeHob (pEntry->BaseAddr, pEntry->BaseAddr + pEntry->Length);
+  }
+
+  //
+  // When 0 address protection is enabled,
+  // 0-4k memory needs to be preallocated to prevent UEFI applications from 
allocating use,
+  //

[edk2-devel] [PATCH v3 36/39] OvmfPkg/LoongArchVirt: Support SEC phase

2023-11-17 Thread Chao Li

Add SEC code for LoongArch virtual machine.

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4584

Cc: Ard Biesheuvel 
Cc: Jiewen Yao 
Cc: Jordan Justen 
Cc: Gerd Hoffmann 
Signed-off-by: Chao Li 
Co-authored-by: Xianglai Li 
Co-authored-by: Bibo Mao 
---
 OvmfPkg/LoongArchVirt/Sec/LoongArch64/Start.S | 176 ++
 OvmfPkg/LoongArchVirt/Sec/SecMain.c   | 507 ++
 OvmfPkg/LoongArchVirt/Sec/SecMain.inf |  53 ++
 3 files changed, 736 insertions(+)
 create mode 100644 OvmfPkg/LoongArchVirt/Sec/LoongArch64/Start.S
 create mode 100644 OvmfPkg/LoongArchVirt/Sec/SecMain.c
 create mode 100644 OvmfPkg/LoongArchVirt/Sec/SecMain.inf

diff --git a/OvmfPkg/LoongArchVirt/Sec/LoongArch64/Start.S 
b/OvmfPkg/LoongArchVirt/Sec/LoongArch64/Start.S
new file mode 100644
index 00..21cc9f3388
--- /dev/null
+++ b/OvmfPkg/LoongArchVirt/Sec/LoongArch64/Start.S
@@ -0,0 +1,176 @@
+#--
+#
+# Start for Loongson LoongArch processor
+#
+# Copyright (c) 2023 Loongson Technology Corporation Limited. All rights 
reserved.
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+#  @par Glossary:
+#- CSR - CPU Status Register
+#- EBASE - Exception Base Address
+#--
+#ifndef __ASSEMBLY__
+#define __ASSEMBLY__
+#endif
+
+#include 
+#include 
+#include 
+
+#define BOOTCORE_ID 0
+
+ASM_GLOBAL ASM_PFX(_ModuleEntryPoint)
+ASM_PFX(_ModuleEntryPoint):
+  /* Disable interrupt */
+  li.d $t0, (1 << 2)
+  csrxchg  $zero, $t0, LOONGARCH_CSR_CRMD
+
+  /* Read physical cpu number id */
+  bl   GetApicId
+  li.d $t0, BOOTCORE_ID  //0
+  bne  $a0, $t0, SlaveMain
+
+  /* Configure BSP reset ebase */
+  li.d $a0, FixedPcdGet64(PcdCpuExceptionVectorBaseAddress)
+  bl   SetExceptionBaseAddress
+  move $t1, $a0
+
+  /* Set BSP stack */
+  li.d $t0, FixedPcdGet64(PcdOvmfSecPeiTempRamBase) + 
FixedPcdGet32(PcdOvmfSecPeiTempRamSize)  # stack base
+  move $sp, $t0
+  addi.d   $sp, $sp, -0x8
+
+  /* Construct SEC and PEI step exception environment */
+  la.pcrel $a1, ExceptionEntryStart
+  la.pcrel $t0, ExceptionEntryEnd
+  sub.d$a2, $t0, $a1
+  li.w $t0, (MAX_LOONGARCH_EXCEPTION +  MAX_LOONGARCH_INTERRUPT) * 512
+  bgeu $a2, $t0, DeadLoop
+  move $a0, $t1
+  bl   CopyMem
+
+CallEntry:
+  /* Call C function make sure parameter true */
+  li.d $a0, FixedPcdGet64(PcdOvmfFdBaseAddress) # FW base
+  addi.d   $a1, $sp, 0x8
+  bl   SecCoreStartupWithStack
+# End of _ModuleEntryPoint
+
+ASM_PFX(ClearMailBox):
+  /* Clear mailbox */
+  li.d  $t1, LOONGARCH_IOCSR_MBUF3
+  iocsrwr.d $zero, $t1
+  li.d  $t1, LOONGARCH_IOCSR_MBUF2
+  iocsrwr.d $zero, $t1
+  li.d  $t1, LOONGARCH_IOCSR_MBUF1
+  iocsrwr.d $zero, $t1
+  li.d  $t1, LOONGARCH_IOCSR_MBUF0
+  iocsrwr.d $zero, $t1
+  jirl  $zero, $ra, 0
+# End of ClearMailBox
+
+ASM_PFX(EnableIPI):
+  /* Enable IPI interrupt */
+  li.d  $t1, (1 << 12)
+  csrxchg   $t1, $t1, LOONGARCH_CSR_ECFG
+
+  addi.d$t2, $zero, -1
+  li.d  $t1, LOONGARCH_IOCSR_IPI_EN
+  iocsrwr.w $t2, $t1
+  jirl  $zero, $ra, 0
+# End of EeableIPI
+
+#/**
+#   Get APIC ID for every CPU.
+#
+#   @param   NULL
+#   @return  APICID
+#
+#   UINTN
+#   EFI_API
+#   GetApicId (
+# VOID
+# )
+#**/
+ASM_PFX(GetApicId):
+  csrrd $a0, LOONGARCH_CSR_CPUNUM
+  andi  $a0, $a0, 0x3ff
+  jirl  $zero, $ra, 0
+# End of GetApicId
+
+ASM_PFX(ApInitStack):
+  li.d   $t1, SIZE_1KB 
+  csrrd  $t0, LOONGARCH_CSR_TMID
+  mul.d  $t1, $t0, $t1
+  li.d   $t2, FixedPcdGet32(PcdCpuMaxLogicalProcessorNumber)
+  bgeu   $t0, $t2, DeadLoop
+  li.d   $t0, FixedPcdGet64(PcdOvmfSecPeiTempRamBase) + 
FixedPcdGet32(PcdOvmfSecPeiTempRamSize) - SIZE_64KB
+  sub.d  $sp, $t0, $t1
+  addi.d $sp, $sp, -0x8
+  jirl   $zero, $ra, 0
+# End of ApInitStack
+
+ASM_PFX(SlaveMain):
+  /* Set AP exception handle in flash */
+  la.pcrel  $a0, ApException
+  blSetExceptionBaseAddress
+
+  /* Clean up local mail box and open INT */
+  blClearMailBox
+  blEnableIPI
+  blEnableInterrupts
+
+WaitForWake:
+  /* Wait for wakeup */
+  blCpuSleep
+  li.d  $t1, LOONGARCH_IOCSR_MBUF0
+  iocsrrd.w $t2, $t1
+  beqz  $t2, WaitForWake
+
+  /* Disable global interrupt */
+  blDisableInterrupts
+
+  /* Disable IPI interrupt */
+  li.d  $t0, (1 << 12)
+  csrxchg   $zero, $t0, LOONGARCH_CSR_ECFG
+
+  /* Read mail buf and jump to specified entry */
+  li.d  $t1, LOONGARCH_IOCSR_MBUF0
+  iocsrrd.d $t0, $t1
+  li.d  $t1, LOONGARCH_IOCSR_MBUF3
+  iocsrrd.d $a1, $t1
+  blClearMailBox
+  beqz  $a1, NoParameterCall
+
+  //
+  // If the parameters are not NULL, then calling happened in FW ENV.
+  // Set the EBASE to be the same as BSP.
+  //
+  li.d  $a0, FixedPcdGet64(PcdCpuExceptionVectorBaseAddress)
+  blSetExceptionBaseAddress
+
+  bl

[edk2-devel] [PATCH v3 35/39] OvmfPkg/LoongArchVirt: Add reset system library

2023-11-17 Thread Chao Li

This library provides interface related to restart and shudown the
LoongArch64 virtual machine.

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4584

Cc: Ard Biesheuvel 
Cc: Jiewen Yao 
Cc: Jordan Justen 
Cc: Gerd Hoffmann 
Signed-off-by: Chao Li 
Co-authored-by: Xianglai Li 
Co-authored-by: Bibo Mao 
---
 .../BaseResetSystemAcpiGed.c  | 148 ++
 .../BaseResetSystemAcpiGedLib.inf |  37 +++
 .../DxeResetSystemAcpiGed.c   | 259 ++
 .../DxeResetSystemAcpiGedLib.inf  |  41 +++
 .../ResetSystemAcpiLib/ResetSystemAcpiGed.c   | 128 +
 .../ResetSystemAcpiLib/ResetSystemAcpiGed.h   |  23 ++
 6 files changed, 636 insertions(+)
 create mode 100644 
OvmfPkg/LoongArchVirt/Library/ResetSystemAcpiLib/BaseResetSystemAcpiGed.c
 create mode 100644 
OvmfPkg/LoongArchVirt/Library/ResetSystemAcpiLib/BaseResetSystemAcpiGedLib.inf
 create mode 100644 
OvmfPkg/LoongArchVirt/Library/ResetSystemAcpiLib/DxeResetSystemAcpiGed.c
 create mode 100644 
OvmfPkg/LoongArchVirt/Library/ResetSystemAcpiLib/DxeResetSystemAcpiGedLib.inf
 create mode 100644 
OvmfPkg/LoongArchVirt/Library/ResetSystemAcpiLib/ResetSystemAcpiGed.c
 create mode 100644 
OvmfPkg/LoongArchVirt/Library/ResetSystemAcpiLib/ResetSystemAcpiGed.h

diff --git 
a/OvmfPkg/LoongArchVirt/Library/ResetSystemAcpiLib/BaseResetSystemAcpiGed.c 
b/OvmfPkg/LoongArchVirt/Library/ResetSystemAcpiLib/BaseResetSystemAcpiGed.c
new file mode 100644
index 00..adb66f365a
--- /dev/null
+++ b/OvmfPkg/LoongArchVirt/Library/ResetSystemAcpiLib/BaseResetSystemAcpiGed.c
@@ -0,0 +1,148 @@
+/** @file
+  Base ResetSystem library implementation.
+
+  Copyright (c) 2023 Loongson Technology Corporation Limited. All rights 
reserved.
+
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include 
+#include 
+#include 
+#include 
+#include "ResetSystemAcpiGed.h"
+#include 
+
+/**
+  Get configuration item data by the firmware configuration file name.
+
+  @param[in]  Name - Name of file to look up.
+
+  @returnVOID*   The Pointer of Value of Firmware Configuration item 
read.
+**/
+VOID *
+GetFwCfgData (
+  CONST CHAR8  *Name
+  )
+{
+  FIRMWARE_CONFIG_ITEM  FwCfgItem;
+  EFI_STATUSStatus;
+  UINTN FwCfgSize;
+  VOID  *Data;
+
+  Status = QemuFwCfgFindFile (Name, , );
+  if (EFI_ERROR (Status)) {
+DEBUG ((DEBUG_ERROR, "%a %d read  %s error Status %d \n", __func__, 
__LINE__, Name, Status));
+return NULL;
+  }
+
+  Data = AllocatePool (FwCfgSize);
+  if (Data == NULL) {
+return NULL;
+  }
+
+  QemuFwCfgSelectItem (FwCfgItem);
+  QemuFwCfgReadBytes (FwCfgSize, Data);
+
+  return Data;
+}
+
+/**
+  Find the power manager related info from ACPI table
+
+  @retval RETURN_SUCCESS Successfully find out all the required 
information.
+  @retval RETURN_NOT_FOUND   Failed to find the required info.
+**/
+STATIC EFI_STATUS
+GetPowerManagerByParseAcpiInfo (
+  VOID
+  )
+{
+  EFI_ACPI_5_0_FIXED_ACPI_DESCRIPTION_TABLE *Fadt   = NULL;
+  EFI_ACPI_3_0_ROOT_SYSTEM_DESCRIPTION_POINTER  *Rsdp   = NULL;
+  EFI_ACPI_DESCRIPTION_HEADER   *Xsdt   = NULL;
+  EFI_ACPI_DESCRIPTION_HEADER   *Rsdt   = NULL;
+  VOID  *AcpiTables = NULL;
+  UINT32*Entry32= NULL;
+  UINTN Entry32Num;
+  UINT32*Signature = NULL;
+  UINTN Idx;
+
+  Rsdp = GetFwCfgData ("etc/acpi/rsdp");
+  if (Rsdp == NULL) {
+DEBUG ((DEBUG_ERROR, "%a %d read etc/acpi/rsdp error \n", __func__, 
__LINE__));
+return RETURN_NOT_FOUND;
+  }
+
+  AcpiTables = GetFwCfgData ("etc/acpi/tables");
+  if (AcpiTables == NULL) {
+DEBUG ((DEBUG_ERROR, "%a %d read etc/acpi/tables error \n", __func__, 
__LINE__));
+FreePool (Rsdp);
+return RETURN_NOT_FOUND;
+  }
+
+  Rsdt   = (EFI_ACPI_DESCRIPTION_HEADER *)((UINTN)AcpiTables +  
Rsdp->RsdtAddress);
+  Entry32= (UINT32 *)(Rsdt + 1);
+  Entry32Num = (Rsdt->Length - sizeof (EFI_ACPI_DESCRIPTION_HEADER)) >> 2;
+  for (Idx = 0; Idx < Entry32Num; Idx++) {
+Signature = (UINT32 *)((UINTN)Entry32[Idx] + (UINTN)AcpiTables);
+if (*Signature == EFI_ACPI_5_0_FIXED_ACPI_DESCRIPTION_TABLE_SIGNATURE) {
+  Fadt = (EFI_ACPI_5_0_FIXED_ACPI_DESCRIPTION_TABLE *)Signature;
+  DEBUG ((DEBUG_INFO, "Found Fadt in Rsdt\n"));
+  goto Done;
+}
+  }
+
+  Xsdt   = (EFI_ACPI_DESCRIPTION_HEADER *)((UINTN)AcpiTables +  
Rsdp->XsdtAddress);
+  Entry32= (UINT32 *)(Xsdt + 1);
+  Entry32Num = (Xsdt->Length - sizeof (EFI_ACPI_DESCRIPTION_HEADER)) >> 2;
+  for (Idx = 0; Idx < Entry32Num; Idx++) {
+Signature = (UINT32 *)((UINTN)Entry32[Idx] + (UINTN)AcpiTables);
+if (*Signature == EFI_ACPI_5_0_FIXED_ACPI_DESCRIPTION_TABLE_SIGNATURE) {
+  Fadt = (EFI_ACPI_5_0_FIXED_ACPI_DESCRIPTION_TABLE

[edk2-devel] [PATCH v3 34/39] OvmfPkg/LoongArchVirt: Add FdtQemuFwCfgLib

2023-11-17 Thread Chao Li

This library for PEI phase, and obtains the QemuFwCfg base address by
directly parsing the FDT, reads and writes the data in QemuFwCfg by
operating on the QemuFwCfg base address.

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4584

Cc: Ard Biesheuvel 
Cc: Jiewen Yao 
Cc: Jordan Justen 
Cc: Gerd Hoffmann 
Signed-off-by: Chao Li 
Co-authored-by: Xianglai Li 
Co-authored-by: Bibo Mao 
---
 .../FdtQemuFwCfgLib/FdtQemuFwCfgPeiLib.c  | 505 ++
 .../FdtQemuFwCfgLib/FdtQemuFwCfgPeiLib.inf|  42 ++
 .../FdtQemuFwCfgLib/QemuFwCfgLibInternal.h|  73 +++
 .../Library/FdtQemuFwCfgLib/QemuFwCfgPei.c| 117 
 4 files changed, 737 insertions(+)
 create mode 100644 
OvmfPkg/LoongArchVirt/Library/FdtQemuFwCfgLib/FdtQemuFwCfgPeiLib.c
 create mode 100644 
OvmfPkg/LoongArchVirt/Library/FdtQemuFwCfgLib/FdtQemuFwCfgPeiLib.inf
 create mode 100644 
OvmfPkg/LoongArchVirt/Library/FdtQemuFwCfgLib/QemuFwCfgLibInternal.h
 create mode 100644 OvmfPkg/LoongArchVirt/Library/FdtQemuFwCfgLib/QemuFwCfgPei.c

diff --git a/OvmfPkg/LoongArchVirt/Library/FdtQemuFwCfgLib/FdtQemuFwCfgPeiLib.c 
b/OvmfPkg/LoongArchVirt/Library/FdtQemuFwCfgLib/FdtQemuFwCfgPeiLib.c
new file mode 100644
index 00..4009a76a80
--- /dev/null
+++ b/OvmfPkg/LoongArchVirt/Library/FdtQemuFwCfgLib/FdtQemuFwCfgPeiLib.c
@@ -0,0 +1,505 @@
+/** @file
+
+  Copyright (c) 2023 Loongson Technology Corporation Limited. All rights 
reserved.
+
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+  @par Glossary:
+- FwCfg   - firmWare  Configure
+- CTL   - Control
+**/
+
+#include "Uefi.h"
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include "QemuFwCfgLibInternal.h"
+
+EFI_GUID  mFwCfgSelectorAddressGuid = FW_CONFIG_SELECTOR_ADDRESS_HOB_GUID;
+EFI_GUID  mFwCfgDataAddressGuid = FW_CONFIG_DATA_ADDRESS_HOB_GUID;
+
+STATIC UINTN  mFwCfgSelectorAddress;
+STATIC UINTN  mFwCfgDataAddress;
+
+/**
+  To get firmware configure selector address.
+
+  @param VOID
+
+  @retval  firmware configure selector address
+**/
+UINTN
+EFIAPI
+QemuGetFwCfgSelectorAddress (
+  VOID
+  )
+{
+  UINTN  FwCfgSelectorAddress;
+  EFI_HOB_GUID_TYPE  *GuidHob;
+  VOID   *DataInHob;
+
+  FwCfgSelectorAddress = mFwCfgSelectorAddress;
+  GuidHob  = NULL;
+  DataInHob= NULL;
+
+  if (FwCfgSelectorAddress == 0) {
+GuidHob  = GetFirstGuidHob ();
+DataInHob= GET_GUID_HOB_DATA (GuidHob);
+FwCfgSelectorAddress = (UINT64)(*(UINTN *)DataInHob);
+  }
+
+  return FwCfgSelectorAddress;
+}
+
+/**
+  To get firmware configure Data address.
+
+  @param VOID
+
+  @retval  firmware configure data address
+**/
+UINTN
+EFIAPI
+QemuGetFwCfgDataAddress (
+  VOID
+  )
+{
+  UINTN  FwCfgDataAddress;
+  EFI_HOB_GUID_TYPE  *GuidHob;
+  VOID   *DataInHob;
+
+  FwCfgDataAddress = mFwCfgDataAddress;
+  GuidHob  = NULL;
+  DataInHob= NULL;
+
+  if (FwCfgDataAddress == 0) {
+GuidHob  = GetFirstGuidHob ();
+DataInHob= GET_GUID_HOB_DATA (GuidHob);
+FwCfgDataAddress = (UINT64)(*(UINTN *)DataInHob);
+  }
+
+  return FwCfgDataAddress;
+}
+
+/**
+  Selects a firmware configuration item for reading.
+
+  Following this call, any data read from this item will start from
+  the beginning of the configuration item's data.
+
+  @param[in] QemuFwCfgItem - Firmware Configuration item to read
+**/
+VOID
+EFIAPI
+QemuFwCfgSelectItem (
+  IN FIRMWARE_CONFIG_ITEM  QemuFwCfgItem
+  )
+{
+  UINTN  FwCfgSelectorAddress;
+
+  FwCfgSelectorAddress = QemuGetFwCfgSelectorAddress ();
+  MmioWrite16 (FwCfgSelectorAddress, SwapBytes16 
((UINT16)(UINTN)QemuFwCfgItem));
+}
+
+/**
+  Slow READ_BYTES_FUNCTION.
+
+  @param[in]  The size of the data to be read.
+  @param[in]  BufferThe buffer that stores the readout data.
+**/
+VOID
+EFIAPI
+MmioReadBytes (
+  IN UINTN  Size,
+  IN VOID   *Buffer OPTIONAL
+  )
+{
+  UINTN  Left;
+  UINT8  *Ptr;
+  UINT8  *End;
+  UINTN  FwCfgDataAddress;
+
+  Left = Size & 7;
+
+  Size -= Left;
+  Ptr   = Buffer;
+  End   = Ptr + Size;
+
+  FwCfgDataAddress = QemuGetFwCfgDataAddress ();
+  while (Ptr < End) {
+*(UINT64 *)Ptr = MmioRead64 (FwCfgDataAddress);
+Ptr   += 8;
+  }
+
+  if (Left & 4) {
+*(UINT32 *)Ptr = MmioRead32 (FwCfgDataAddress);
+Ptr   += 4;
+  }
+
+  if (Left & 2) {
+*(UINT16 *)Ptr = MmioRead16 (FwCfgDataAddress);
+Ptr   += 2;
+  }
+
+  if (Left & 1) {
+*Ptr = MmioRead8 (FwCfgDataAddress);
+  }
+}
+
+/**
+  Slow WRITE_BYTES_FUNCTION.
+
+  @param[in]  The size of the data to be write.
+  @param[in]  BufferThe buffer that stores the writein data.
+**/
+VOID
+EFIAPI
+MmioWriteBytes (
+  IN UINTN  Size,
+  IN VOID   *Buffer OPTIONAL
+  )
+{
+  UINTN  Idx;
+  UINTN  FwCfgDataAddress;
+
+  FwCfgDataAddress = QemuGetFwCfgDataAddress ();
+  for (Idx = 0; Idx < Size; ++Idx) {
+MmioWrite8

[edk2-devel] [PATCH v3 33/39] OvmfPkg/LoongArchVirt: Add NorFlashQemuLib

2023-11-17 Thread Chao Li

Add NorFlashQemuLib for LoongArch, it is referenced from ArmVirtPkg.

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4584

Cc: Ard Biesheuvel 
Cc: Jiewen Yao 
Cc: Jordan Justen 
Cc: Gerd Hoffmann 
Signed-off-by: Chao Li 
Co-authored-by: Xianglai Li 
Co-authored-by: Bibo Mao 
---
 .../Library/NorFlashQemuLib/NorFlashQemuLib.c | 140 ++
 .../NorFlashQemuLib/NorFlashQemuLib.inf   |  43 ++
 2 files changed, 183 insertions(+)
 create mode 100644 
OvmfPkg/LoongArchVirt/Library/NorFlashQemuLib/NorFlashQemuLib.c
 create mode 100644 
OvmfPkg/LoongArchVirt/Library/NorFlashQemuLib/NorFlashQemuLib.inf

diff --git a/OvmfPkg/LoongArchVirt/Library/NorFlashQemuLib/NorFlashQemuLib.c 
b/OvmfPkg/LoongArchVirt/Library/NorFlashQemuLib/NorFlashQemuLib.c
new file mode 100644
index 00..578735a7c6
--- /dev/null
+++ b/OvmfPkg/LoongArchVirt/Library/NorFlashQemuLib/NorFlashQemuLib.c
@@ -0,0 +1,140 @@
+/** @file
+
+  Copyright (c) 2023 Loongson Technology Corporation Limited. All rights 
reserved.
+
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include 
+#include 
+#include 
+#include 
+
+#include 
+
+#define QEMU_NOR_BLOCK_SIZE  SIZE_128KB
+
+EFI_STATUS
+VirtNorFlashPlatformInitialization (
+  VOID
+  )
+{
+  return EFI_SUCCESS;
+}
+
+STATIC VIRT_NOR_FLASH_DESCRIPTION  mNorFlashDevices;
+
+EFI_STATUS
+VirtNorFlashPlatformGetDevices (
+  OUT VIRT_NOR_FLASH_DESCRIPTION  **NorFlashDescriptions,
+  OUT UINT32  *Count
+  )
+{
+  FDT_CLIENT_PROTOCOL  *FdtClient;
+  INT32Node;
+  EFI_STATUS   Status;
+  EFI_STATUS   FindNodeStatus;
+  CONST UINT32 *Reg;
+  UINT32   PropSize;
+  UINT64   Base;
+  UINT64   Size;
+
+  Status = gBS->LocateProtocol (
+  ,
+  NULL,
+  (VOID **)
+  );
+  ASSERT_EFI_ERROR (Status);
+
+  FindNodeStatus = FdtClient->FindCompatibleNode (
+FdtClient,
+"cfi-flash",
+
+);
+  ASSERT_EFI_ERROR (FindNodeStatus);
+
+  Status = FdtClient->GetNodeProperty (
+FdtClient,
+Node,
+"reg",
+(CONST VOID **),
+
+);
+  if (EFI_ERROR (Status)) {
+DEBUG ((
+  DEBUG_ERROR,
+  "%a: GetNodeProperty () failed (Status == %r)\n",
+  __FUNCTION__,
+  Status
+  ));
+return Status;
+  }
+
+  ASSERT ((PropSize % (4 * sizeof (UINT32))) == 0);
+
+  if (PropSize < (4 * sizeof (UINT32))) {
+DEBUG ((
+  DEBUG_ERROR,
+  "%a: reg node size(%d) is too small \n",
+  __FUNCTION__,
+  PropSize
+  ));
+return EFI_NOT_FOUND;
+  }
+
+  Base = SwapBytes64 (ReadUnaligned64 ((VOID *)[0]));
+  Size = SwapBytes64 (ReadUnaligned64 ((VOID *)[2]));
+
+  mNorFlashDevices.DeviceBaseAddress = (UINTN)Base;
+  mNorFlashDevices.RegionBaseAddress = (UINTN)Base;
+  mNorFlashDevices.Size  = (UINTN)Size;
+  mNorFlashDevices.BlockSize = QEMU_NOR_BLOCK_SIZE;
+
+  Status = PcdSet32S (PcdFlashNvStorageVariableBase, Base);
+  ASSERT_EFI_ERROR (Status);
+
+  /*
+   * Base is the value of PcdFlashNvStorageVariableBase,
+   * PcdFlashNvStorageFtwWorkingBase can be got by
+   *   PcdFlashNvStorageVariableBase + PcdFlashNvStorageVariableSize
+   */
+  Base  += PcdGet32 (PcdFlashNvStorageVariableSize);
+  Status = PcdSet32S (PcdFlashNvStorageFtwWorkingBase, Base);
+  ASSERT_EFI_ERROR (Status);
+
+  /*
+   * Now,Base is the value of PcdFlashNvStorageFtwWorkingBase,
+   * PcdFlashNvStorageFtwSpareBase can be got by
+   *   PcdFlashNvStorageFtwWorkingBase + PcdFlashNvStorageFtwWorkingSize.
+   */
+  Base  += PcdGet32 (PcdFlashNvStorageFtwWorkingSize);
+  Status = PcdSet32S (PcdFlashNvStorageFtwSpareBase, Base);
+  ASSERT_EFI_ERROR (Status);
+
+  //
+  // UEFI takes ownership of the NOR flash, and exposes its functionality
+  // through the UEFI Runtime Services GetVariable, SetVariable, etc. This
+  // means we need to disable it in the device tree to prevent the OS from
+  // attaching its device driver as well.
+  // Note that this also hides other flash banks, but the only other flash
+  // bank we expect to encounter is the one that carries the UEFI executable
+  // code, which is not intended to be guest updatable, and is usually backed
+  // in a readonly manner by QEMU anyway.
+  //
+  Status = FdtClient->SetNodeProperty (
+FdtClient,
+Node,
+"status",
+"disabled",
+sizeof ("disabled")
+);
+  if (EFI_ERROR (Status)) {
+DEBUG ((DEBUG_WARN, "Failed to set NOR flash status to 'disabled'\n"));
+  }
+
+  *NorFlashDescriptions = 
+  *Count= 1;
+
+  return EFI_SUCCESS;
+}
diff --git

[edk2-devel] [PATCH v3 32/39] OvmfPkg/LoongArchVirt: Add real time clock library

2023-11-17 Thread Chao Li

This library is provides real time clock for LoongArch virtual machine.

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4584

Cc: Ard Biesheuvel 
Cc: Jiewen Yao 
Cc: Jordan Justen 
Cc: Gerd Hoffmann 
Signed-off-by: Chao Li 
Co-authored-by: Baoqi Zhang 
Co-authored-by: Xianglai Li 
---
 .../DxeLsRealTimeClockLib.c   | 333 ++
 .../DxeLsRealTimeClockLib.inf |  42 +++
 .../LsRealTimeClockLib/LsRealTimeClock.h  |  47 +++
 .../PeiLsRealTimeClockLib.c   |  31 ++
 .../PeiLsRealTimeClockLib.inf |  29 ++
 5 files changed, 482 insertions(+)
 create mode 100644 
OvmfPkg/LoongArchVirt/Library/LsRealTimeClockLib/DxeLsRealTimeClockLib.c
 create mode 100644 
OvmfPkg/LoongArchVirt/Library/LsRealTimeClockLib/DxeLsRealTimeClockLib.inf
 create mode 100644 
OvmfPkg/LoongArchVirt/Library/LsRealTimeClockLib/LsRealTimeClock.h
 create mode 100644 
OvmfPkg/LoongArchVirt/Library/LsRealTimeClockLib/PeiLsRealTimeClockLib.c
 create mode 100644 
OvmfPkg/LoongArchVirt/Library/LsRealTimeClockLib/PeiLsRealTimeClockLib.inf

diff --git 
a/OvmfPkg/LoongArchVirt/Library/LsRealTimeClockLib/DxeLsRealTimeClockLib.c 
b/OvmfPkg/LoongArchVirt/Library/LsRealTimeClockLib/DxeLsRealTimeClockLib.c
new file mode 100644
index 00..d634d30fd1
--- /dev/null
+++ b/OvmfPkg/LoongArchVirt/Library/LsRealTimeClockLib/DxeLsRealTimeClockLib.c
@@ -0,0 +1,333 @@
+/** @file
+  Implement EFI RealTimeClock runtime services via RTC Lib.
+
+  Copyright (c) 2023 Loongson Technology Corporation Limited. All rights 
reserved.
+
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include 
+#include 
+
+#include 
+#include 
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include "LsRealTimeClock.h"
+
+STATIC BOOLEANmInitialized = FALSE;
+STATIC EFI_EVENT  mRtcVirtualAddrChangeEvent;
+STATIC UINTN  mRtcBase;
+
+/*
+  Enable Real-time clock.
+
+  @param VOID
+
+  @retval  VOID
+ */
+VOID
+InitRtc (
+  VOID
+  )
+{
+  UINTN  Val;
+  EFI_HOB_GUID_TYPE  *GuidHob   = NULL;
+  VOID   *DataInHob = NULL;
+
+  if (!mInitialized) {
+/* Enable rtc */
+GuidHob = GetFirstGuidHob ();
+if (GuidHob) {
+  DataInHob = GET_GUID_HOB_DATA (GuidHob);
+  mRtcBase  = (UINT64)(*(UINTN *)DataInHob);
+  Val   = MmioRead32 (mRtcBase + RTC_CTRL_REG);
+  Val  |= TOY_ENABLE_BIT | OSC_ENABLE_BIT;
+  MmioWrite32 (mRtcBase + RTC_CTRL_REG, Val);
+  mInitialized = TRUE;
+} else {
+  DebugPrint (EFI_D_INFO, "RTC register address not found!\n");
+  ASSERT (FALSE);
+}
+  }
+}
+
+/**
+  Returns the current time and date information, and the time-keeping 
capabilities
+  of the hardware platform.
+
+  @param  Time   A pointer to storage to receive a snapshot of 
the current time.
+  @param  Capabilities   An optional pointer to a buffer to receive 
the real time clock
+ device's capabilities.
+
+  @retval EFI_SUCCESSThe operation completed successfully.
+  @retval EFI_INVALID_PARAMETER  Time is NULL.
+  @retval EFI_DEVICE_ERROR   The time could not be retrieved due to 
hardware error.
+  @retval EFI_SECURITY_VIOLATION The time could not be retrieved due to an 
authentication failure.
+**/
+EFI_STATUS
+EFIAPI
+LibGetTime (
+  OUT EFI_TIME   *Time,
+  OUT EFI_TIME_CAPABILITIES  *Capabilities
+  )
+{
+  UINT32  Val;
+
+  // Ensure Time is a valid pointer
+  if (Time == NULL) {
+return EFI_INVALID_PARAMETER;
+  }
+
+  Val= MmioRead32 (mRtcBase + TOY_READ1_REG);
+  Time->Year = Val + 1900;
+
+  Val  = MmioRead32 (mRtcBase + TOY_READ0_REG);
+  Time->Month  = (Val >> TOY_MON_SHIFT) & TOY_MON_MASK;
+  Time->Day= (Val >> TOY_DAY_SHIFT) & TOY_DAY_MASK;
+  Time->Hour   = (Val >> TOY_HOUR_SHIFT) & TOY_HOUR_MASK;
+  Time->Minute = (Val >> TOY_MIN_SHIFT) & TOY_MIN_MASK;
+  Time->Second = (Val >> TOY_SEC_SHIFT) & TOY_SEC_MASK;
+  Time->Nanosecond = 0;
+  return EFI_SUCCESS;
+}
+
+/**
+  Sets the current local time and date information.
+
+  @param  Time  A pointer to the current time.
+
+  @retval EFI_SUCCESS   The operation completed successfully.
+  @retval EFI_INVALID_PARAMETER A time field is out of range.
+  @retval EFI_DEVICE_ERROR  The time could not be set due due to hardware 
error.
+**/
+EFI_STATUS
+EFIAPI
+LibSetTime (
+  IN  EFI_TIME  *Time
+  )
+{
+  UINT32  Val;
+
+  // Initialize the hardware if not already done
+
+  Val  = 0;
+  Val |= (Time->Second << TOY_SEC_SHIFT);
+  Val |= (Time->Minute << TOY_MIN_SHIFT);
+  Val |= (Time->Hour   << TOY_HOUR_SHIFT);
+  Val |= (Time->Day<< TOY_DAY_SHIFT);
+  Val |= (Time->Month  << TOY_MON_SHIFT);
+  MmioWrite32 (mRtcBase + TOY_WRITE0_REG, Val);
+
+  Val = Time->Year - 1900;
+  MmioWrite32 (mRtcBase + TOY_WRITE1_REG, Val);
+  return

[edk2-devel] [PATCH v3 31/39] OvmfPkg/LoongArchVirt: Add the early serial port output library

2023-11-17 Thread Chao Li

Add a early serial port output library into LoongArchVirt that named
EarlyFdtSerialPortLib16550, this library is referenced from
MdeModulePkg.

This library is used in the PEI phase. Since the serial port address can
not be saved in memory of the LoongArch QEMU virtual machine in the PEI
phase, the serial prot base address will be obtained from the FDT before
each output.

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4584

Cc: Ard Biesheuvel 
Cc: Jiewen Yao 
Cc: Jordan Justen 
Cc: Gerd Hoffmann 
Signed-off-by: Chao Li 
Co-authored-by: Xianglai Li 
---
 .../EarlyFdtSerialPortLib16550.c  | 816 ++
 .../EarlyFdtSerialPortLib16550.inf|  47 +
 2 files changed, 863 insertions(+)
 create mode 100644 
OvmfPkg/LoongArchVirt/Library/EarlyFdtSerialPortLib16550/EarlyFdtSerialPortLib16550.c
 create mode 100644 
OvmfPkg/LoongArchVirt/Library/EarlyFdtSerialPortLib16550/EarlyFdtSerialPortLib16550.inf

diff --git 
a/OvmfPkg/LoongArchVirt/Library/EarlyFdtSerialPortLib16550/EarlyFdtSerialPortLib16550.c
 
b/OvmfPkg/LoongArchVirt/Library/EarlyFdtSerialPortLib16550/EarlyFdtSerialPortLib16550.c
new file mode 100644
index 00..4a4d365cd2
--- /dev/null
+++ 
b/OvmfPkg/LoongArchVirt/Library/EarlyFdtSerialPortLib16550/EarlyFdtSerialPortLib16550.c
@@ -0,0 +1,816 @@
+/** @file
+  16550 UART Serial Port library functions
+
+  Copyright (c) 2023, Loongson Technology Corporation Limited. All rights 
reserved.
+
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+//
+// PCI Defintions.
+//
+#define PCI_BRIDGE_32_BIT_IO_SPACE  0x01
+
+//
+// 16550 UART register offsets and bitfields
+//
+#define R_UART_RXBUF   0// LCR_DLAB = 0
+#define R_UART_TXBUF   0// LCR_DLAB = 0
+#define R_UART_BAUD_LOW0// LCR_DLAB = 1
+#define R_UART_BAUD_HIGH   1// LCR_DLAB = 1
+#define R_UART_IER 1// LCR_DLAB = 0
+#define R_UART_FCR 2
+#define B_UART_FCR_FIFOE   BIT0
+#define B_UART_FCR_FIFO64  BIT5
+#define R_UART_LCR 3
+#define B_UART_LCR_DLABBIT7
+#define R_UART_MCR 4
+#define B_UART_MCR_DTRCBIT0
+#define B_UART_MCR_RTS BIT1
+#define R_UART_LSR 5
+#define B_UART_LSR_RXRDY   BIT0
+#define B_UART_LSR_TXRDY   BIT5
+#define B_UART_LSR_TEMTBIT6
+#define R_UART_MSR 6
+#define B_UART_MSR_CTS BIT4
+#define B_UART_MSR_DSR BIT5
+#define B_UART_MSR_RI  BIT6
+#define B_UART_MSR_DCD BIT7
+
+/**
+  Read an 8-bit 16550 register.  If PcdSerialUseMmio is TRUE, then the value 
is read from
+  MMIO space.  If PcdSerialUseMmio is FALSE, then the value is read from I/O 
space.  The
+  parameter Offset is added to the base address of the 16550 registers that is 
specified
+  by PcdSerialRegisterBase. PcdSerialRegisterAccessWidth specifies the MMIO 
space access
+  width and defaults to 8 bit access, and supports 8 or 32 bit access.
+
+  @param  BaseThe base address register of UART device.
+  @param  Offset  The offset of the 16550 register to read.
+
+  @return The value read from the 16550 register.
+**/
+UINT8
+SerialPortReadRegister (
+  UINTN  Base,
+  UINTN  Offset
+  )
+{
+  if (PcdGetBool (PcdSerialUseMmio)) {
+if (PcdGet8 (PcdSerialRegisterAccessWidth) == 32) {
+  return (UINT8)MmioRead32 (Base + Offset * PcdGet32 
(PcdSerialRegisterStride));
+}
+
+return MmioRead8 (Base + Offset * PcdGet32 (PcdSerialRegisterStride));
+  } else {
+return IoRead8 (Base + Offset * PcdGet32 (PcdSerialRegisterStride));
+  }
+}
+
+/**
+  Write an 8-bit 16550 register.  If PcdSerialUseMmio is TRUE, then the value 
is written to
+  MMIO space.  If PcdSerialUseMmio is FALSE, then the value is written to I/O 
space.  The
+  parameter Offset is added to the base address of the 16550 registers that is 
specified
+  by PcdSerialRegisterBase. PcdSerialRegisterAccessWidth specifies the MMIO 
space access
+  width and defaults to 8 bit access, and supports 8 or 32 bit access.
+
+  @param  BaseThe base address register of UART device.
+  @param  Offset  The offset of the 16550 register to write.
+  @param  Value   The value to write to the 16550 register specified by Offset.
+
+  @return The value written to the 16550 register.
+**/
+UINT8
+SerialPortWriteRegister (
+  UINTN  Base,
+  UINTN  Offset,
+  UINT8  Value
+  )
+{
+  if (PcdGetBool (PcdSerialUseMmio)) {
+if (PcdGet8 (PcdSerialRegisterAccessWidth) == 32) {
+  return (UINT8)MmioWrite32 (Base + Offset * PcdGet32 
(PcdSerialRegisterStride), (UINT8)Value);
+}
+
+return MmioWrite8 (Base + Offset * PcdGet32 (PcdSerialRegisterStride), 
Value);
+  } else {
+return IoWrite8 (Base + Offset * PcdGet32 (PcdSerialRegisterStride), 
Value);
+  }
+}
+
+/**
+  Retrieve the I/O or MMIO base address register for the PCI UART device.
+
+  This function assumes Root Bus Numer is Zero, and enables I/O and MMIO in 
PCI UART
+  Device if they are not already enabled.
+
+  @return

[edk2-devel] [PATCH v3 30/39] OvmfPkg/LoongArchVirt: Add serial port hook library

2023-11-17 Thread Chao Li

Add a serial port hook library in LoongArchVirt named
Fdt16550SerialProtHookLib, this library is referenced from ArmVirtPkg.

LoongArch QEMU virtual machine uses register of LOONGARCH_CSR_KS1 to
transfer serial port base addres from the PEI phase to the DXE phase.

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4584

Cc: Ard Biesheuvel 
Cc: Jiewen Yao 
Cc: Jordan Justen 
Cc: Gerd Hoffmann 
Signed-off-by: Chao Li 
---
 .../EarlyFdt16550SerialPortHookLib.c  | 55 +++
 .../EarlyFdt16550SerialPortHookLib.inf| 37 +
 .../Fdt16550SerialPortHookLib.c   | 41 ++
 .../Fdt16550SerialPortHookLib.inf | 33 +++
 .../Fdt16550SerialPortHookLib.uni | 13 +
 5 files changed, 179 insertions(+)
 create mode 100644 
OvmfPkg/LoongArchVirt/Library/Fdt16550SerialPortHookLib/EarlyFdt16550SerialPortHookLib.c
 create mode 100644 
OvmfPkg/LoongArchVirt/Library/Fdt16550SerialPortHookLib/EarlyFdt16550SerialPortHookLib.inf
 create mode 100644 
OvmfPkg/LoongArchVirt/Library/Fdt16550SerialPortHookLib/Fdt16550SerialPortHookLib.c
 create mode 100644 
OvmfPkg/LoongArchVirt/Library/Fdt16550SerialPortHookLib/Fdt16550SerialPortHookLib.inf
 create mode 100644 
OvmfPkg/LoongArchVirt/Library/Fdt16550SerialPortHookLib/Fdt16550SerialPortHookLib.uni

diff --git 
a/OvmfPkg/LoongArchVirt/Library/Fdt16550SerialPortHookLib/EarlyFdt16550SerialPortHookLib.c
 
b/OvmfPkg/LoongArchVirt/Library/Fdt16550SerialPortHookLib/EarlyFdt16550SerialPortHookLib.c
new file mode 100644
index 00..b819b42d56
--- /dev/null
+++ 
b/OvmfPkg/LoongArchVirt/Library/Fdt16550SerialPortHookLib/EarlyFdt16550SerialPortHookLib.c
@@ -0,0 +1,55 @@
+/** @file
+  PEI Phase Early Platform Hook Library instance for 16550 Uart.
+
+  Copyright (c) 2020 - 2023, Arm Ltd. All rights reserved.
+  Copyright (c) 2023 Loongson Technology Corporation Limited. All rights 
reserved.
+
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+/** Platform hook to retrieve the 16550 UART base address from the platform
+Device tree and store it in the reigster LOONGARCH_CSR_KS1.
+
+  @retval RETURN_SUCCESSSuccess.
+  @retval RETURN_INVALID_PARAMETER  A parameter was invalid.
+  @retval RETURN_NOT_FOUND  Serial port information not found.
+
+**/
+RETURN_STATUS
+EFIAPI
+PlatformHookSerialPortInitialize (
+  VOID
+  )
+{
+  RETURN_STATUS  Status;
+  VOID   *DeviceTreeBase;
+  UINT64 SerialConsoleAddress;
+
+  if (PcdGet64 (PcdSerialRegisterBase) != 0) {
+return RETURN_SUCCESS;
+  }
+
+  DeviceTreeBase = (VOID *)(UINTN)PcdGet64 (PcdDeviceTreeInitialBaseAddress);
+  if (DeviceTreeBase == NULL) {
+return RETURN_NOT_FOUND;
+  }
+
+  Status = FdtSerialGetConsolePort (DeviceTreeBase, );
+  if (RETURN_ERROR (Status)) {
+return Status;
+  }
+
+  CsrWrite (LOONGARCH_CSR_KS1, (UINTN)SerialConsoleAddress);
+
+  return RETURN_SUCCESS;
+}
diff --git 
a/OvmfPkg/LoongArchVirt/Library/Fdt16550SerialPortHookLib/EarlyFdt16550SerialPortHookLib.inf
 
b/OvmfPkg/LoongArchVirt/Library/Fdt16550SerialPortHookLib/EarlyFdt16550SerialPortHookLib.inf
new file mode 100644
index 00..9a8819dbeb
--- /dev/null
+++ 
b/OvmfPkg/LoongArchVirt/Library/Fdt16550SerialPortHookLib/EarlyFdt16550SerialPortHookLib.inf
@@ -0,0 +1,37 @@
+## @file
+#  PEI Phase Early Platform Hook Library instance for 16550 Uart.
+#
+#  Copyright (c) 2020, ARM Ltd. All rights reserved.
+#  Copyright (c) 2023 Loongson Technology Corporation Limited. All rights 
reserved.
+#
+#  SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+##
+
+[Defines]
+  INF_VERSION= 0x0001001B
+  BASE_NAME  = EarlyFdt16550SerialPortHookLib
+  MODULE_UNI_FILE= Fdt16550SerialPortHookLib.uni
+  FILE_GUID  = 6A5FEBCB-C676-A7C1-A96C-B79D4860EEC5
+  MODULE_TYPE= PEIM
+  VERSION_STRING = 1.0
+  LIBRARY_CLASS  = PlatformHookLib|SEC PEI_CORE PEIM
+
+[Sources]
+  EarlyFdt16550SerialPortHookLib.c
+
+[LibraryClasses]
+  BaseLib
+  PcdLib
+  FdtLib
+  FdtSerialPortAddressLib
+
+[Packages]
+  EmbeddedPkg/EmbeddedPkg.dec
+  MdeModulePkg/MdeModulePkg.dec
+  MdePkg/MdePkg.dec
+  OvmfPkg/OvmfPkg.dec
+
+[Pcd]
+  gUefiOvmfPkgTokenSpaceGuid.PcdDeviceTreeInitialBaseAddress
+  gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterBase
diff --git 
a/OvmfPkg/LoongArchVirt/Library/Fdt16550SerialPortHookLib/Fdt16550SerialPortHookLib.c
 
b/OvmfPkg/LoongArchVirt/Library/Fdt16550SerialPortHookLib/Fdt16550SerialPortHookLib.c
new file mode 100644
index 00..46e159d7c2
--- /dev/null
+++ 
b/OvmfPkg/LoongArchVirt/Library/Fdt16550SerialPortHookLib/Fdt16550SerialPortHookLib.c
@@ -0,0 +1,41 @@
+/** @file
+  Platform Hook Library instance for 16550 Uart.
+
+  Copyright (c) 2020, ARM Ltd. All rights reserved.
+  Copyright (c) 2023 Loongson Technology

[edk2-devel] [PATCH v3 29/39] OvmfPkg/LoongArchVirt: Add a NULL library named CollectApResouceLibNull

2023-11-17 Thread Chao Li

This Library is used to collect APs resources, but is currently NULL
for OvmfPkg, because it is not used by the LoongArch virtual machine.

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4584

Cc: Ard Biesheuvel 
Cc: Jiewen Yao 
Cc: Jordan Justen 
Cc: Gerd Hoffmann 
Signed-off-by: Chao Li 
---
 .../CollectApResourceLibNull.c| 35 +++
 .../CollectApResourceLibNull.inf  | 32 +
 .../CollectApResourceLibNull.uni  |  9 +
 3 files changed, 76 insertions(+)
 create mode 100644 
OvmfPkg/LoongArchVirt/Library/CollectApResouceLibNull/CollectApResourceLibNull.c
 create mode 100644 
OvmfPkg/LoongArchVirt/Library/CollectApResouceLibNull/CollectApResourceLibNull.inf
 create mode 100644 
OvmfPkg/LoongArchVirt/Library/CollectApResouceLibNull/CollectApResourceLibNull.uni

diff --git 
a/OvmfPkg/LoongArchVirt/Library/CollectApResouceLibNull/CollectApResourceLibNull.c
 
b/OvmfPkg/LoongArchVirt/Library/CollectApResouceLibNull/CollectApResourceLibNull.c
new file mode 100644
index 00..528914973e
--- /dev/null
+++ 
b/OvmfPkg/LoongArchVirt/Library/CollectApResouceLibNull/CollectApResourceLibNull.c
@@ -0,0 +1,35 @@
+/** @file
+  LoongArch64 CPU Collect AP resource NULL Library functions.
+
+  Copyright (c) 2023, Loongson Technology Corporation Limited. All rights 
reserved.
+
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include 
+#include 
+#include "../../../UefiCpuPkg/Library/LoongArch64MpInitLib/MpLib.h"
+
+VOID
+SaveProcessorResourceData (
+  IN PROCESSOR_RESOURCE_DATA *
+  );
+
+VOID
+EFIAPI
+SaveProcessorResource (
+  PROCESSOR_RESOURCE_DATA  *mProcessorResource
+  )
+{
+  SaveProcessorResourceData (mProcessorResource);
+}
+
+VOID
+EFIAPI
+CollectAllProcessorResource (
+  VOID
+  )
+{
+  return;
+}
diff --git 
a/OvmfPkg/LoongArchVirt/Library/CollectApResouceLibNull/CollectApResourceLibNull.inf
 
b/OvmfPkg/LoongArchVirt/Library/CollectApResouceLibNull/CollectApResourceLibNull.inf
new file mode 100644
index 00..d8d281421c
--- /dev/null
+++ 
b/OvmfPkg/LoongArchVirt/Library/CollectApResouceLibNull/CollectApResourceLibNull.inf
@@ -0,0 +1,32 @@
+## @file
+#  LoongArch64 CPU Collect AP resource NULL Library.
+#
+#  Copyright (c) 2023, Loongson Technology Corporation Limited. All rights 
reserved.
+#  SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+##
+
+[Defines]
+  INF_VERSION= 0x00010005
+  BASE_NAME  = CollectApResourceLibNull
+  MODULE_UNI_FILE= CollectApResourceLibNull.uni
+  FILE_GUID  = 8C3B54BF-6A9F-E8B4-4D57-67B3AB578DD6
+  MODULE_TYPE= BASE
+  VERSION_STRING = 1.1
+  LIBRARY_CLASS  = BaseLib
+
+[Sources.common]
+  CollectApResourceLibNull.c
+
+[Packages]
+  MdePkg/MdePkg.dec
+  UefiCpuPkg/UefiCpuPkg.dec
+
+[LibraryClasses]
+  BaseLib
+  MemoryAllocationLib
+  HobLib
+  SynchronizationLib
+
+[Pcd]
+  gUefiCpuPkgTokenSpaceGuid.PcdCpuMaxLogicalProcessorNumber
diff --git 
a/OvmfPkg/LoongArchVirt/Library/CollectApResouceLibNull/CollectApResourceLibNull.uni
 
b/OvmfPkg/LoongArchVirt/Library/CollectApResouceLibNull/CollectApResourceLibNull.uni
new file mode 100644
index 00..701e2d7e6b
--- /dev/null
+++ 
b/OvmfPkg/LoongArchVirt/Library/CollectApResouceLibNull/CollectApResourceLibNull.uni
@@ -0,0 +1,9 @@
+// @file
+//  LoongArch64 CPU Collect AP resource NULL Library.
+//
+//  Copyright (c) 2023, Loongson Technology Corporation Limited. All rights 
reserved.
+//  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+#string STR_MODULE_ABSTRACT #language en-US "CPU Collect AP 
resource NULL Library."
+
+#string STR_MODULE_DESCRIPTION  #language en-US "CPU Collect AP 
resource NULL Library."
-- 
2.27.0



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[edk2-devel] [PATCH v3 28/39] OvmfPkg/LoongArchVirt: Add stable timer driver

2023-11-17 Thread Chao Li

Add a CPU timer driver named StableTimerDxe, which proviedes
EFI_TIMER_ARCH_PROTOCOL for LoongArch.

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4584

Cc: Ard Biesheuvel 
Cc: Jiewen Yao 
Cc: Jordan Justen 
Cc: Gerd Hoffmann 
Signed-off-by: Chao Li 
Co-authored-by: Baoqi Zhang 
---
 .../Drivers/StableTimerDxe/Timer.c| 381 ++
 .../Drivers/StableTimerDxe/Timer.h| 127 ++
 .../Drivers/StableTimerDxe/TimerDxe.inf   |  41 ++
 3 files changed, 549 insertions(+)
 create mode 100644 OvmfPkg/LoongArchVirt/Drivers/StableTimerDxe/Timer.c
 create mode 100644 OvmfPkg/LoongArchVirt/Drivers/StableTimerDxe/Timer.h
 create mode 100644 OvmfPkg/LoongArchVirt/Drivers/StableTimerDxe/TimerDxe.inf

diff --git a/OvmfPkg/LoongArchVirt/Drivers/StableTimerDxe/Timer.c 
b/OvmfPkg/LoongArchVirt/Drivers/StableTimerDxe/Timer.c
new file mode 100644
index 00..9f0feaa786
--- /dev/null
+++ b/OvmfPkg/LoongArchVirt/Drivers/StableTimerDxe/Timer.c
@@ -0,0 +1,381 @@
+/** @file
+  Timer Architectural Protocol as defined in the DXE CIS
+
+  Copyright (c) 2023 Loongson Technology Corporation Limited. All rights 
reserved.
+
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include "Timer.h"
+
+//
+// The handle onto which the Timer Architectural Protocol will be installed
+//
+EFI_HANDLE  mTimerHandle = NULL;
+EFI_EVENT   EfiExitBootServicesEvent = (EFI_EVENT)NULL;
+
+//
+// The Timer Architectural Protocol that this driver produces
+//
+EFI_TIMER_ARCH_PROTOCOL  mTimer = {
+  TimerDriverRegisterHandler,
+  TimerDriverSetTimerPeriod,
+  TimerDriverGetTimerPeriod,
+  TimerDriverGenerateSoftInterrupt
+};
+
+//
+// Pointer to the CPU Architectural Protocol instance
+//
+EFI_CPU_ARCH_PROTOCOL  *mCpu;
+
+//
+// The notification function to call on every timer interrupt.
+// A bug in the compiler prevents us from initializing this here.
+//
+EFI_TIMER_NOTIFY  mTimerNotifyFunction;
+
+/**
+  Sets the counter value for timer.
+
+  @param CountThe 16-bit counter value to program into stable timer.
+
+  @retval VOID
+**/
+VOID
+SetPitCount (
+  IN UINT64  Count
+  )
+{
+  if (Count <= 4) {
+return;
+  }
+
+  Count &= LOONGARCH_CSR_TMCFG_TIMEVAL;
+  Count |= LOONGARCH_CSR_TMCFG_EN | LOONGARCH_CSR_TMCFG_PERIOD;
+  CsrWrite (LOONGARCH_CSR_TMCFG, Count);
+}
+
+/**
+  Timer Interrupt Handler.
+
+  @param InterruptTypeThe type of interrupt that occurred
+  @param SystemContextA pointer to the system context when the interrupt 
occurred
+
+  @retval VOID
+**/
+VOID
+EFIAPI
+TimerInterruptHandler (
+  IN EFI_EXCEPTION_TYPE  InterruptType,
+  IN EFI_SYSTEM_CONTEXT  SystemContext
+  )
+{
+  EFI_TPL  OriginalTPL;
+
+  OriginalTPL = gBS->RaiseTPL (TPL_HIGH_LEVEL);
+
+  //
+  // Clear interrupt.
+  //
+  CsrWrite (LOONGARCH_CSR_TINTCLR, 0x1);
+
+  if (mTimerNotifyFunction != NULL) {
+//
+// @bug : This does not handle missed timer interrupts
+//
+mTimerNotifyFunction (mTimerPeriod);
+  }
+
+  gBS->RestoreTPL (OriginalTPL);
+}
+
+/**
+  This function registers the handler NotifyFunction so it is called every time
+  the timer interrupt fires.  It also passes the amount of time since the last
+  handler call to the NotifyFunction.  If NotifyFunction is NULL, then the
+  handler is unregistered.  If the handler is registered, then EFI_SUCCESS is
+  returned.  If the CPU does not support registering a timer interrupt handler,
+  then EFI_UNSUPPORTED is returned.  If an attempt is made to register a 
handler
+  when a handler is already registered, then EFI_ALREADY_STARTED is returned.
+  If an attempt is made to unregister a handler when a handler is not 
registered,
+  then EFI_INVALID_PARAMETER is returned.  If an error occurs attempting to
+  register the NotifyFunction with the timer interrupt, then EFI_DEVICE_ERROR
+  is returned.
+
+  @param This The EFI_TIMER_ARCH_PROTOCOL instance.
+  @param NotifyFunction   The function to call when a timer interrupt fires.  
This
+  function executes at TPL_HIGH_LEVEL.  The DXE Core 
will
+  register a handler for the timer interrupt, so it 
can know
+  how much time has passed.  This information is used 
to
+  signal timer based events.  NULL will unregister the 
handler.
+
+  @retvalEFI_SUCCESSThe timer handler was registered.
+  @retvalEFI_UNSUPPORTEDThe platform does not support timer 
interrupts.
+  @retvalEFI_ALREADY_STARTEDNotifyFunction is not NULL, and a 
handler is already
+registered.
+  @retvalEFI_INVALID_PARAMETER  NotifyFunction is NULL, and a handler 
was not
+previously registered.
+  @retvalEFI_DEVICE_ERROR   The timer handler could not be 
registered.
+**/
+EFI_STATUS
+EFIAPI

[edk2-devel] [PATCH v3 27/39] ArmVirtPkg: Move PlatformBootManagerLib to OvmfPkg

2023-11-17 Thread Chao Li

Moved the PlatformBootManagerLib to OvmfPkg and renamed to
PlatformBootManagerLibLight for easy use by other ARCH.

Build-tested only (with "ArmVirtQemu.dsc").

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4584

Cc: Ard Biesheuvel 
Cc: Leif Lindholm 
Cc: Sami Mujawar 
Cc: Gerd Hoffmann 
Cc: Jiewen Yao 
Cc: Lazlo Ersek 
Signed-off-by: Chao Li 
---
 ArmPkg/ArmPkg.dsc   | 1 -
 ArmVirtPkg/ArmVirtCloudHv.dsc   | 2 +-
 ArmVirtPkg/ArmVirtKvmTool.dsc   | 2 +-
 ArmVirtPkg/ArmVirtQemu.dsc  | 2 +-
 ArmVirtPkg/ArmVirtQemuKernel.dsc| 2 +-
 ArmVirtPkg/ArmVirtXen.dsc   | 2 +-
 .../Library/PlatformBootManagerLibLight}/PlatformBm.c   | 0
 .../Library/PlatformBootManagerLibLight}/PlatformBm.h   | 0
 .../PlatformBootManagerLibLight}/PlatformBootManagerLib.inf | 2 +-
 .../Library/PlatformBootManagerLibLight}/QemuKernel.c   | 0
 10 files changed, 6 insertions(+), 7 deletions(-)
 rename {ArmVirtPkg/Library/PlatformBootManagerLib => 
OvmfPkg/Library/PlatformBootManagerLibLight}/PlatformBm.c (100%)
 rename {ArmVirtPkg/Library/PlatformBootManagerLib => 
OvmfPkg/Library/PlatformBootManagerLibLight}/PlatformBm.h (100%)
 rename {ArmVirtPkg/Library/PlatformBootManagerLib => 
OvmfPkg/Library/PlatformBootManagerLibLight}/PlatformBootManagerLib.inf (93%)
 rename {ArmVirtPkg/Library/PlatformBootManagerLib => 
OvmfPkg/Library/PlatformBootManagerLibLight}/QemuKernel.c (100%)

diff --git a/ArmPkg/ArmPkg.dsc b/ArmPkg/ArmPkg.dsc
index 7af25a91a1..f0667c72f8 100644
--- a/ArmPkg/ArmPkg.dsc
+++ b/ArmPkg/ArmPkg.dsc
@@ -151,7 +151,6 @@
   ArmPkg/Library/ArmSoftFloatLib/ArmSoftFloatLib.inf
   ArmPkg/Library/ArmSmcPsciResetSystemLib/ArmSmcPsciResetSystemLib.inf
   ArmPkg/Library/PeiServicesTablePointerLib/PeiServicesTablePointerLib.inf
-  ArmPkg/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf
   ArmPkg/Library/LinuxBootBootManagerLib/LinuxBootBootManagerLib.inf
 
   ArmPkg/Drivers/ArmCrashDumpDxe/ArmCrashDumpDxe.inf
diff --git a/ArmVirtPkg/ArmVirtCloudHv.dsc b/ArmVirtPkg/ArmVirtCloudHv.dsc
index 0f80fb34cc..aeed77ffcb 100644
--- a/ArmVirtPkg/ArmVirtCloudHv.dsc
+++ b/ArmVirtPkg/ArmVirtCloudHv.dsc
@@ -43,7 +43,7 @@
   TimerLib|ArmPkg/Library/ArmArchTimerLib/ArmArchTimerLib.inf
   CapsuleLib|MdeModulePkg/Library/DxeCapsuleLibNull/DxeCapsuleLibNull.inf
   BootLogoLib|MdeModulePkg/Library/BootLogoLib/BootLogoLib.inf
-  
PlatformBootManagerLib|ArmPkg/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf
+  
PlatformBootManagerLib|OvmfPkg/Library/PlatformBootManagerLibLight/PlatformBootManagerLib.inf
   
PlatformBmPrintScLib|OvmfPkg/Library/PlatformBmPrintScLib/PlatformBmPrintScLib.inf
   
CustomizedDisplayLib|MdeModulePkg/Library/CustomizedDisplayLib/CustomizedDisplayLib.inf
   
FrameBufferBltLib|MdeModulePkg/Library/FrameBufferBltLib/FrameBufferBltLib.inf
diff --git a/ArmVirtPkg/ArmVirtKvmTool.dsc b/ArmVirtPkg/ArmVirtKvmTool.dsc
index 31d5bc13cf..e2b90e000f 100644
--- a/ArmVirtPkg/ArmVirtKvmTool.dsc
+++ b/ArmVirtPkg/ArmVirtKvmTool.dsc
@@ -56,7 +56,7 @@
 
   # BDS Libraries
   
UefiBootManagerLib|MdeModulePkg/Library/UefiBootManagerLib/UefiBootManagerLib.inf
-  
PlatformBootManagerLib|ArmPkg/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf
+  
PlatformBootManagerLib|OvmfPkg/Library/PlatformBootManagerLibLight/PlatformBootManagerLib.inf
   BootLogoLib|MdeModulePkg/Library/BootLogoLib/BootLogoLib.inf
 
   
CustomizedDisplayLib|MdeModulePkg/Library/CustomizedDisplayLib/CustomizedDisplayLib.inf
diff --git a/ArmVirtPkg/ArmVirtQemu.dsc b/ArmVirtPkg/ArmVirtQemu.dsc
index 6b2b4d1086..ac980a2736 100644
--- a/ArmVirtPkg/ArmVirtQemu.dsc
+++ b/ArmVirtPkg/ArmVirtQemu.dsc
@@ -70,7 +70,7 @@
 
   CapsuleLib|MdeModulePkg/Library/DxeCapsuleLibNull/DxeCapsuleLibNull.inf
   BootLogoLib|MdeModulePkg/Library/BootLogoLib/BootLogoLib.inf
-  
PlatformBootManagerLib|ArmVirtPkg/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf
+  
PlatformBootManagerLib|OvmfPkg/Library/PlatformBootManagerLibLight/PlatformBootManagerLib.inf
   
PlatformBmPrintScLib|OvmfPkg/Library/PlatformBmPrintScLib/PlatformBmPrintScLib.inf
   
CustomizedDisplayLib|MdeModulePkg/Library/CustomizedDisplayLib/CustomizedDisplayLib.inf
   
FrameBufferBltLib|MdeModulePkg/Library/FrameBufferBltLib/FrameBufferBltLib.inf
diff --git a/ArmVirtPkg/ArmVirtQemuKernel.dsc b/ArmVirtPkg/ArmVirtQemuKernel.dsc
index 34fdf5d5a9..b8867ea6fe 100644
--- a/ArmVirtPkg/ArmVirtQemuKernel.dsc
+++ b/ArmVirtPkg/ArmVirtQemuKernel.dsc
@@ -69,7 +69,7 @@
 
   CapsuleLib|MdeModulePkg/Library/DxeCapsuleLibNull/DxeCapsuleLibNull.inf
   BootLogoLib|MdeModulePkg/Library/BootLogoLib/BootLogoLib.inf
-  
PlatformBootManagerLib|ArmVirtPkg/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf
+

[edk2-devel] [PATCH v3 26/39] ArmVirtPkg: Move the PcdTerminalTypeGuidBuffer into OvmfPkg

2023-11-17 Thread Chao Li

Move the PcdTerminalTypeGuidBuffer into OvmfPkg so other ARCH can easily
use it.

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4584

Cc: Ard Biesheuvel 
Cc: Leif Lindholm 
Cc: Sami Mujawar 
Cc: Gerd Hoffmann 
Cc: Jiewen Yao 
Signed-off-by: Chao Li 
---
 ArmVirtPkg/ArmVirtPkg.dec  | 7 ---
 ArmVirtPkg/ArmVirtQemu.dsc | 2 +-
 ArmVirtPkg/ArmVirtQemuKernel.dsc   | 2 +-
 .../PlatformBootManagerLib/PlatformBootManagerLib.inf  | 2 +-
 OvmfPkg/OvmfPkg.dec| 7 +++
 5 files changed, 10 insertions(+), 10 deletions(-)

diff --git a/ArmVirtPkg/ArmVirtPkg.dec b/ArmVirtPkg/ArmVirtPkg.dec
index 2451644844..315db4e8ea 100644
--- a/ArmVirtPkg/ArmVirtPkg.dec
+++ b/ArmVirtPkg/ArmVirtPkg.dec
@@ -42,13 +42,6 @@
   gArmVirtTokenSpaceGuid.PcdTpm2SupportEnabled|FALSE|BOOLEAN|0x0004
 
 [PcdsFixedAtBuild, PcdsPatchableInModule]
-  #
-  # Binary representation of the GUID that determines the terminal type. The
-  # size must be exactly 16 bytes. The default value corresponds to
-  # EFI_VT_100_GUID.
-  #
-  gArmVirtTokenSpaceGuid.PcdTerminalTypeGuidBuffer|{0x65, 0x60, 0xA6, 0xDF, 
0x19, 0xB4, 0xD3, 0x11, 0x9A, 0x2D, 0x00, 0x90, 0x27, 0x3F, 0xC1, 
0x4D}|VOID*|0x0007
-
   ##
   # This is the physical address of Rsdp which is the core struct of Acpi.
   # Cloud Hypervisor has no other way to pass Rsdp address to the guest except 
use a PCD.
diff --git a/ArmVirtPkg/ArmVirtQemu.dsc b/ArmVirtPkg/ArmVirtQemu.dsc
index 204344ea0b..6b2b4d1086 100644
--- a/ArmVirtPkg/ArmVirtQemu.dsc
+++ b/ArmVirtPkg/ArmVirtQemu.dsc
@@ -184,7 +184,7 @@
 !if $(TTY_TERMINAL) == TRUE
   gEfiMdePkgTokenSpaceGuid.PcdDefaultTerminalType|4
   # Set terminal type to TtyTerm, the value encoded is EFI_TTY_TERM_GUID
-  gArmVirtTokenSpaceGuid.PcdTerminalTypeGuidBuffer|{0x80, 0x6d, 0x91, 0x7d, 
0xb1, 0x5b, 0x8c, 0x45, 0xa4, 0x8f, 0xe2, 0x5f, 0xdd, 0x51, 0xef, 0x94}
+  gUefiOvmfPkgTokenSpaceGuid.PcdTerminalTypeGuidBuffer|{0x80, 0x6d, 0x91, 
0x7d, 0xb1, 0x5b, 0x8c, 0x45, 0xa4, 0x8f, 0xe2, 0x5f, 0xdd, 0x51, 0xef, 0x94}
 !else
   gEfiMdePkgTokenSpaceGuid.PcdDefaultTerminalType|1
 !endif
diff --git a/ArmVirtPkg/ArmVirtQemuKernel.dsc b/ArmVirtPkg/ArmVirtQemuKernel.dsc
index c2938883d8..34fdf5d5a9 100644
--- a/ArmVirtPkg/ArmVirtQemuKernel.dsc
+++ b/ArmVirtPkg/ArmVirtQemuKernel.dsc
@@ -149,7 +149,7 @@
 !if $(TTY_TERMINAL) == TRUE
   gEfiMdePkgTokenSpaceGuid.PcdDefaultTerminalType|4
   # Set terminal type to TtyTerm, the value encoded is EFI_TTY_TERM_GUID
-  gArmVirtTokenSpaceGuid.PcdTerminalTypeGuidBuffer|{0x80, 0x6d, 0x91, 0x7d, 
0xb1, 0x5b, 0x8c, 0x45, 0xa4, 0x8f, 0xe2, 0x5f, 0xdd, 0x51, 0xef, 0x94}
+  gUefiOvmfPkgTokenSpaceGuid.PcdTerminalTypeGuidBuffer|{0x80, 0x6d, 0x91, 
0x7d, 0xb1, 0x5b, 0x8c, 0x45, 0xa4, 0x8f, 0xe2, 0x5f, 0xdd, 0x51, 0xef, 0x94}
 !else
   gEfiMdePkgTokenSpaceGuid.PcdDefaultTerminalType|1
 !endif
diff --git 
a/ArmVirtPkg/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf 
b/ArmVirtPkg/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf
index 997eb1a442..9d3ccd815a 100644
--- a/ArmVirtPkg/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf
+++ b/ArmVirtPkg/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf
@@ -61,7 +61,7 @@
   gEfiMdePkgTokenSpaceGuid.PcdUartDefaultStopBits
 
 [Pcd]
-  gArmVirtTokenSpaceGuid.PcdTerminalTypeGuidBuffer
+  gUefiOvmfPkgTokenSpaceGuid.PcdTerminalTypeGuidBuffer
   gEfiMdePkgTokenSpaceGuid.PcdPlatformBootTimeOut
 
 [Guids]
diff --git a/OvmfPkg/OvmfPkg.dec b/OvmfPkg/OvmfPkg.dec
index 89091e8bf1..f9a40bad7c 100644
--- a/OvmfPkg/OvmfPkg.dec
+++ b/OvmfPkg/OvmfPkg.dec
@@ -496,6 +496,13 @@
   #
   gUefiOvmfPkgTokenSpaceGuid.PcdDeviceTreeAllocationPadding|256|UINT32|0x6f
 
+  #
+  # Binary representation of the GUID that determines the terminal type. The
+  # size must be exactly 16 bytes. The default value corresponds to
+  # EFI_VT_100_GUID.
+  #
+  gUefiOvmfPkgTokenSpaceGuid.PcdTerminalTypeGuidBuffer|{0x65, 0x60, 0xA6, 
0xDF, 0x19, 0xB4, 0xD3, 0x11, 0x9A, 0x2D, 0x00, 0x90, 0x27, 0x3F, 0xC1, 
0x4D}|VOID*|0x66
+
 [PcdsFeatureFlag]
   gUefiOvmfPkgTokenSpaceGuid.PcdQemuBootOrderPciTranslation|TRUE|BOOLEAN|0x1c
   gUefiOvmfPkgTokenSpaceGuid.PcdQemuBootOrderMmioTranslation|FALSE|BOOLEAN|0x1d
-- 
2.27.0



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[edk2-devel] [PATCH v3 25/39] ArmVirtPkg: Move the FdtSerialPortAddressLib to OvmfPkg

2023-11-17 Thread Chao Li

Move the FdtSerialPortAddressLib to Ovmfpkg so that other ARCH can
easily use it.

Build-tested only (with "ArmVirtQemu.dsc").

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4584

Cc: Ard Biesheuvel 
Cc: Leif Lindholm 
Cc: Sami Mujawar 
Cc: Gerd Hoffmann 
Cc: Jiewen Yao 
Cc: Laszlo Ersek 
Signed-off-by: Chao Li 
---
 ArmVirtPkg/ArmVirt.dsc.inc  | 2 +-
 .../Include/Library/FdtSerialPortAddressLib.h   | 0
 .../Library/FdtSerialPortAddressLib/FdtSerialPortAddressLib.c   | 0
 .../Library/FdtSerialPortAddressLib/FdtSerialPortAddressLib.inf | 2 +-
 4 files changed, 2 insertions(+), 2 deletions(-)
 rename {ArmVirtPkg => OvmfPkg}/Include/Library/FdtSerialPortAddressLib.h (100%)
 rename {ArmVirtPkg => 
OvmfPkg}/Library/FdtSerialPortAddressLib/FdtSerialPortAddressLib.c (100%)
 rename {ArmVirtPkg => 
OvmfPkg}/Library/FdtSerialPortAddressLib/FdtSerialPortAddressLib.inf (90%)

diff --git a/ArmVirtPkg/ArmVirt.dsc.inc b/ArmVirtPkg/ArmVirt.dsc.inc
index fe6488ee99..034523b271 100644
--- a/ArmVirtPkg/ArmVirt.dsc.inc
+++ b/ArmVirtPkg/ArmVirt.dsc.inc
@@ -121,7 +121,7 @@
   # ARM PL011 UART Driver
   PL011UartLib|ArmPlatformPkg/Library/PL011UartLib/PL011UartLib.inf
   
SerialPortLib|ArmVirtPkg/Library/FdtPL011SerialPortLib/FdtPL011SerialPortLib.inf
-  
FdtSerialPortAddressLib|ArmVirtPkg/Library/FdtSerialPortAddressLib/FdtSerialPortAddressLib.inf
+  
FdtSerialPortAddressLib|OvmfPkg/Library/FdtSerialPortAddressLib/FdtSerialPortAddressLib.inf
 
   
PeCoffExtraActionLib|ArmPkg/Library/DebugPeCoffExtraActionLib/DebugPeCoffExtraActionLib.inf
   
#PeCoffExtraActionLib|MdePkg/Library/BasePeCoffExtraActionLibNull/BasePeCoffExtraActionLibNull.inf
diff --git a/ArmVirtPkg/Include/Library/FdtSerialPortAddressLib.h 
b/OvmfPkg/Include/Library/FdtSerialPortAddressLib.h
similarity index 100%
rename from ArmVirtPkg/Include/Library/FdtSerialPortAddressLib.h
rename to OvmfPkg/Include/Library/FdtSerialPortAddressLib.h
diff --git 
a/ArmVirtPkg/Library/FdtSerialPortAddressLib/FdtSerialPortAddressLib.c 
b/OvmfPkg/Library/FdtSerialPortAddressLib/FdtSerialPortAddressLib.c
similarity index 100%
rename from ArmVirtPkg/Library/FdtSerialPortAddressLib/FdtSerialPortAddressLib.c
rename to OvmfPkg/Library/FdtSerialPortAddressLib/FdtSerialPortAddressLib.c
diff --git 
a/ArmVirtPkg/Library/FdtSerialPortAddressLib/FdtSerialPortAddressLib.inf 
b/OvmfPkg/Library/FdtSerialPortAddressLib/FdtSerialPortAddressLib.inf
similarity index 90%
rename from 
ArmVirtPkg/Library/FdtSerialPortAddressLib/FdtSerialPortAddressLib.inf
rename to OvmfPkg/Library/FdtSerialPortAddressLib/FdtSerialPortAddressLib.inf
index ae6d0d374b..e27742e9fa 100644
--- a/ArmVirtPkg/Library/FdtSerialPortAddressLib/FdtSerialPortAddressLib.inf
+++ b/OvmfPkg/Library/FdtSerialPortAddressLib/FdtSerialPortAddressLib.inf
@@ -18,9 +18,9 @@
   FdtSerialPortAddressLib.c
 
 [Packages]
-  ArmVirtPkg/ArmVirtPkg.dec
   EmbeddedPkg/EmbeddedPkg.dec
   MdePkg/MdePkg.dec
+  OvmfPkg/OvmfPkg.dec
 
 [LibraryClasses]
   BaseLib
-- 
2.27.0



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[edk2-devel] [PATCH v3 24/39] OvmfPkg/RiscVVirt: Remove PciCpuIo2Dxe from RiscVVirt

2023-11-17 Thread Chao Li

CpuIo2Dxe is already used by RiscVVirt, so remove it.

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4584

Cc: Sunil V L 
Cc: Andrei Warkentin 
Signed-off-by: Chao Li 
---
 OvmfPkg/RiscVVirt/PciCpuIo2Dxe/PciCpuIo2Dxe.c | 557 --
 .../RiscVVirt/PciCpuIo2Dxe/PciCpuIo2Dxe.inf   |  48 --
 2 files changed, 605 deletions(-)
 delete mode 100644 OvmfPkg/RiscVVirt/PciCpuIo2Dxe/PciCpuIo2Dxe.c
 delete mode 100644 OvmfPkg/RiscVVirt/PciCpuIo2Dxe/PciCpuIo2Dxe.inf

diff --git a/OvmfPkg/RiscVVirt/PciCpuIo2Dxe/PciCpuIo2Dxe.c 
b/OvmfPkg/RiscVVirt/PciCpuIo2Dxe/PciCpuIo2Dxe.c
deleted file mode 100644
index f3bf07e631..00
--- a/OvmfPkg/RiscVVirt/PciCpuIo2Dxe/PciCpuIo2Dxe.c
+++ /dev/null
@@ -1,557 +0,0 @@
-/** @file
-  Produces the CPU I/O 2 Protocol.
-
-Copyright (c) 2009 - 2012, Intel Corporation. All rights reserved.
-Copyright (c) 2016, Linaro Ltd. All rights reserved.
-Copyright (c) 2022, Ventana Micro Systems Inc. All rights reserved.
-
-SPDX-License-Identifier: BSD-2-Clause-Patent
-
-**/
-
-#include 
-
-#include 
-
-#include 
-#include 
-#include 
-#include 
-#include 
-
-#define MAX_IO_PORT_ADDRESS  0x
-
-//
-// Handle for the CPU I/O 2 Protocol
-//
-STATIC EFI_HANDLE  mHandle = NULL;
-
-//
-// Lookup table for increment values based on transfer widths
-//
-STATIC CONST UINT8  mInStride[] = {
-  1, // EfiCpuIoWidthUint8
-  2, // EfiCpuIoWidthUint16
-  4, // EfiCpuIoWidthUint32
-  8, // EfiCpuIoWidthUint64
-  0, // EfiCpuIoWidthFifoUint8
-  0, // EfiCpuIoWidthFifoUint16
-  0, // EfiCpuIoWidthFifoUint32
-  0, // EfiCpuIoWidthFifoUint64
-  1, // EfiCpuIoWidthFillUint8
-  2, // EfiCpuIoWidthFillUint16
-  4, // EfiCpuIoWidthFillUint32
-  8  // EfiCpuIoWidthFillUint64
-};
-
-//
-// Lookup table for increment values based on transfer widths
-//
-STATIC CONST UINT8  mOutStride[] = {
-  1, // EfiCpuIoWidthUint8
-  2, // EfiCpuIoWidthUint16
-  4, // EfiCpuIoWidthUint32
-  8, // EfiCpuIoWidthUint64
-  1, // EfiCpuIoWidthFifoUint8
-  2, // EfiCpuIoWidthFifoUint16
-  4, // EfiCpuIoWidthFifoUint32
-  8, // EfiCpuIoWidthFifoUint64
-  0, // EfiCpuIoWidthFillUint8
-  0, // EfiCpuIoWidthFillUint16
-  0, // EfiCpuIoWidthFillUint32
-  0  // EfiCpuIoWidthFillUint64
-};
-
-/**
-  Check parameters to a CPU I/O 2 Protocol service request.
-
-  The I/O operations are carried out exactly as requested. The caller is 
responsible
-  for satisfying any alignment and I/O width restrictions that a PI System on a
-  platform might require. For example on some platforms, width requests of
-  EfiCpuIoWidthUint64 do not work. Misaligned buffers, on the other hand, will
-  be handled by the driver.
-
-  @param[in] MmioOperation  TRUE for an MMIO operation, FALSE for I/O Port 
operation.
-  @param[in] Width  Signifies the width of the I/O or Memory operation.
-  @param[in] AddressThe base address of the I/O operation.
-  @param[in] Count  The number of I/O operations to perform. The 
number of
-bytes moved is Width size * Count, starting at 
Address.
-  @param[in] Buffer For read operations, the destination buffer to 
store the results.
-For write operations, the source buffer from which 
to write data.
-
-  @retval EFI_SUCCESSThe parameters for this request pass the 
checks.
-  @retval EFI_INVALID_PARAMETER  Width is invalid for this PI system.
-  @retval EFI_INVALID_PARAMETER  Buffer is NULL.
-  @retval EFI_UNSUPPORTEDThe Buffer is not aligned for the given Width.
-  @retval EFI_UNSUPPORTEDThe address range specified by Address, Width,
- and Count is not valid for this PI system.
-
-**/
-STATIC
-EFI_STATUS
-CpuIoCheckParameter (
-  IN BOOLEANMmioOperation,
-  IN EFI_CPU_IO_PROTOCOL_WIDTH  Width,
-  IN UINT64 Address,
-  IN UINTN  Count,
-  IN VOID   *Buffer
-  )
-{
-  UINT64  MaxCount;
-  UINT64  Limit;
-
-  //
-  // Check to see if Buffer is NULL
-  //
-  if (Buffer == NULL) {
-return EFI_INVALID_PARAMETER;
-  }
-
-  //
-  // Check to see if Width is in the valid range
-  //
-  if ((UINT32)Width >= EfiCpuIoWidthMaximum) {
-return EFI_INVALID_PARAMETER;
-  }
-
-  //
-  // For FIFO type, the target address won't increase during the access,
-  // so treat Count as 1
-  //
-  if ((Width >= EfiCpuIoWidthFifoUint8) && (Width <= EfiCpuIoWidthFifoUint64)) 
{
-Count = 1;
-  }
-
-  //
-  // Check to see if Width is in the valid range for I/O Port operations
-  //
-  Width = (EFI_CPU_IO_PROTOCOL_WIDTH)(Width & 0x03);
-  if (!MmioOperation && (Width == EfiCpuIoWidthUint64)) {
-return EFI_INVALID_PARAMETER;
-  }
-
-  //
-  // Check to see if Address is aligned
-  //
-  if ((Address & (UINT64)(mInStride[Width] - 1)) != 0) {
-return EFI_UNSUPPORTED;
-  }
-
-  //
-  // Check to see if any address associated with this transfer exceeds the 
maximum
-  // allowed address.  The maximum address

[edk2-devel] [PATCH v3 22/39] ArmPkg: Remove ArmPciCpuIo2Dxe from ArmPkg

2023-11-17 Thread Chao Li

ArmPciCpuIo2Dxe has been merged into CpuIo2Dxe, and CpuIo2Dxe is already
used by all ARM virtual platforms, so remove it.

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4584

Cc: Leif Lindholm 
Cc: Ard Biesheuvel 
Cc: Sami Mujawar 
---
 ArmPkg/ArmPkg.dsc |   1 -
 .../Drivers/ArmPciCpuIo2Dxe/ArmPciCpuIo2Dxe.c | 556 --
 .../ArmPciCpuIo2Dxe/ArmPciCpuIo2Dxe.inf   |  47 --
 3 files changed, 604 deletions(-)
 delete mode 100644 ArmPkg/Drivers/ArmPciCpuIo2Dxe/ArmPciCpuIo2Dxe.c
 delete mode 100644 ArmPkg/Drivers/ArmPciCpuIo2Dxe/ArmPciCpuIo2Dxe.inf

diff --git a/ArmPkg/ArmPkg.dsc b/ArmPkg/ArmPkg.dsc
index 6dd91e6941..7af25a91a1 100644
--- a/ArmPkg/ArmPkg.dsc
+++ b/ArmPkg/ArmPkg.dsc
@@ -143,7 +143,6 @@
 
   ArmPkg/Library/ArmMmuLib/ArmMmuBaseLib.inf
 
-  ArmPkg/Drivers/ArmPciCpuIo2Dxe/ArmPciCpuIo2Dxe.inf
   ArmPkg/Library/ArmArchTimerLib/ArmArchTimerLib.inf
   ArmPkg/Library/ArmGicArchLib/ArmGicArchLib.inf
   ArmPkg/Library/ArmGicArchSecLib/ArmGicArchSecLib.inf
diff --git a/ArmPkg/Drivers/ArmPciCpuIo2Dxe/ArmPciCpuIo2Dxe.c 
b/ArmPkg/Drivers/ArmPciCpuIo2Dxe/ArmPciCpuIo2Dxe.c
deleted file mode 100644
index 5a2866ccd8..00
--- a/ArmPkg/Drivers/ArmPciCpuIo2Dxe/ArmPciCpuIo2Dxe.c
+++ /dev/null
@@ -1,556 +0,0 @@
-/** @file
-  Produces the CPU I/O 2 Protocol.
-
-Copyright (c) 2009 - 2012, Intel Corporation. All rights reserved.
-Copyright (c) 2016, Linaro Ltd. All rights reserved.
-
-SPDX-License-Identifier: BSD-2-Clause-Patent
-
-**/
-
-#include 
-
-#include 
-
-#include 
-#include 
-#include 
-#include 
-#include 
-
-#define MAX_IO_PORT_ADDRESS  0x
-
-//
-// Handle for the CPU I/O 2 Protocol
-//
-STATIC EFI_HANDLE  mHandle = NULL;
-
-//
-// Lookup table for increment values based on transfer widths
-//
-STATIC CONST UINT8  mInStride[] = {
-  1, // EfiCpuIoWidthUint8
-  2, // EfiCpuIoWidthUint16
-  4, // EfiCpuIoWidthUint32
-  8, // EfiCpuIoWidthUint64
-  0, // EfiCpuIoWidthFifoUint8
-  0, // EfiCpuIoWidthFifoUint16
-  0, // EfiCpuIoWidthFifoUint32
-  0, // EfiCpuIoWidthFifoUint64
-  1, // EfiCpuIoWidthFillUint8
-  2, // EfiCpuIoWidthFillUint16
-  4, // EfiCpuIoWidthFillUint32
-  8  // EfiCpuIoWidthFillUint64
-};
-
-//
-// Lookup table for increment values based on transfer widths
-//
-STATIC CONST UINT8  mOutStride[] = {
-  1, // EfiCpuIoWidthUint8
-  2, // EfiCpuIoWidthUint16
-  4, // EfiCpuIoWidthUint32
-  8, // EfiCpuIoWidthUint64
-  1, // EfiCpuIoWidthFifoUint8
-  2, // EfiCpuIoWidthFifoUint16
-  4, // EfiCpuIoWidthFifoUint32
-  8, // EfiCpuIoWidthFifoUint64
-  0, // EfiCpuIoWidthFillUint8
-  0, // EfiCpuIoWidthFillUint16
-  0, // EfiCpuIoWidthFillUint32
-  0  // EfiCpuIoWidthFillUint64
-};
-
-/**
-  Check parameters to a CPU I/O 2 Protocol service request.
-
-  The I/O operations are carried out exactly as requested. The caller is 
responsible
-  for satisfying any alignment and I/O width restrictions that a PI System on a
-  platform might require. For example on some platforms, width requests of
-  EfiCpuIoWidthUint64 do not work. Misaligned buffers, on the other hand, will
-  be handled by the driver.
-
-  @param[in] MmioOperation  TRUE for an MMIO operation, FALSE for I/O Port 
operation.
-  @param[in] Width  Signifies the width of the I/O or Memory operation.
-  @param[in] AddressThe base address of the I/O operation.
-  @param[in] Count  The number of I/O operations to perform. The 
number of
-bytes moved is Width size * Count, starting at 
Address.
-  @param[in] Buffer For read operations, the destination buffer to 
store the results.
-For write operations, the source buffer from which 
to write data.
-
-  @retval EFI_SUCCESSThe parameters for this request pass the 
checks.
-  @retval EFI_INVALID_PARAMETER  Width is invalid for this PI system.
-  @retval EFI_INVALID_PARAMETER  Buffer is NULL.
-  @retval EFI_UNSUPPORTEDThe Buffer is not aligned for the given Width.
-  @retval EFI_UNSUPPORTEDThe address range specified by Address, Width,
- and Count is not valid for this PI system.
-
-**/
-STATIC
-EFI_STATUS
-CpuIoCheckParameter (
-  IN BOOLEANMmioOperation,
-  IN EFI_CPU_IO_PROTOCOL_WIDTH  Width,
-  IN UINT64 Address,
-  IN UINTN  Count,
-  IN VOID   *Buffer
-  )
-{
-  UINT64  MaxCount;
-  UINT64  Limit;
-
-  //
-  // Check to see if Buffer is NULL
-  //
-  if (Buffer == NULL) {
-return EFI_INVALID_PARAMETER;
-  }
-
-  //
-  // Check to see if Width is in the valid range
-  //
-  if ((UINT32)Width >= EfiCpuIoWidthMaximum) {
-return EFI_INVALID_PARAMETER;
-  }
-
-  //
-  // For FIFO type, the target address won't increase during the access,
-  // so treat Count as 1
-  //
-  if ((Width >= EfiCpuIoWidthFifoUint8) && (Width <= EfiCpuIoWidthFifoUint64)) 
{
-Count = 1;
-  }
-
-  //
-  // Check to see if Width is in

[edk2-devel] [PATCH v3 21/39] ArmVirtPkg: Enable UefiCpuPkg version CpuIo2Dxe

2023-11-17 Thread Chao Li

Since the UefiCpuPkg/CpuIo2Dxe already supports MMIO, it is enabled at
this thime.

Build-tested only (with "ArmVirtQemu.dsc").

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4584

Cc: Ard Biesheuvel 
Cc: Leif Lindholm 
Cc: Sami Mujawar 
Cc: Gerd Hoffmann 
Signed-off-by: Chao Li 
---
 ArmVirtPkg/ArmVirtCloudHv.dsc| 4 +++-
 ArmVirtPkg/ArmVirtCloudHv.fdf| 2 +-
 ArmVirtPkg/ArmVirtKvmTool.dsc| 4 +++-
 ArmVirtPkg/ArmVirtKvmTool.fdf| 2 +-
 ArmVirtPkg/ArmVirtQemu.dsc   | 4 +++-
 ArmVirtPkg/ArmVirtQemuFvMain.fdf.inc | 2 +-
 ArmVirtPkg/ArmVirtQemuKernel.dsc | 4 +++-
 7 files changed, 15 insertions(+), 7 deletions(-)

diff --git a/ArmVirtPkg/ArmVirtCloudHv.dsc b/ArmVirtPkg/ArmVirtCloudHv.dsc
index 76c0d28544..0f80fb34cc 100644
--- a/ArmVirtPkg/ArmVirtCloudHv.dsc
+++ b/ArmVirtPkg/ArmVirtCloudHv.dsc
@@ -85,6 +85,8 @@
 
   gEfiMdeModulePkgTokenSpaceGuid.PcdTurnOffUsbLegacySupport|TRUE
 
+  gEfiMdePkgTokenSpaceGuid.PcdPciIoTranslationIsEnabled|TRUE
+
 [PcdsFixedAtBuild.common]
 !if $(ARCH) == AARCH64
   gArmTokenSpaceGuid.PcdVFPEnabled|1
@@ -341,7 +343,7 @@
   #
   # PCI support
   #
-  ArmPkg/Drivers/ArmPciCpuIo2Dxe/ArmPciCpuIo2Dxe.inf {
+  UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.inf {
 
   NULL|OvmfPkg/Fdt/FdtPciPcdProducerLib/FdtPciPcdProducerLib.inf
   }
diff --git a/ArmVirtPkg/ArmVirtCloudHv.fdf b/ArmVirtPkg/ArmVirtCloudHv.fdf
index 56d1ea6e8c..9c59433c5f 100644
--- a/ArmVirtPkg/ArmVirtCloudHv.fdf
+++ b/ArmVirtPkg/ArmVirtCloudHv.fdf
@@ -201,7 +201,7 @@ READ_LOCK_STATUS   = TRUE
   #
   # PCI support
   #
-  INF ArmPkg/Drivers/ArmPciCpuIo2Dxe/ArmPciCpuIo2Dxe.inf
+  INF UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.inf
   INF MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridgeDxe.inf
   INF MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf
   INF OvmfPkg/PciHotPlugInitDxe/PciHotPlugInit.inf
diff --git a/ArmVirtPkg/ArmVirtKvmTool.dsc b/ArmVirtPkg/ArmVirtKvmTool.dsc
index cac4fe06d3..31d5bc13cf 100644
--- a/ArmVirtPkg/ArmVirtKvmTool.dsc
+++ b/ArmVirtPkg/ArmVirtKvmTool.dsc
@@ -128,6 +128,8 @@
 
   gArmTokenSpaceGuid.PcdMonitorConduitHvc|TRUE
 
+  gEfiMdePkgTokenSpaceGuid.PcdPciIoTranslationIsEnabled|TRUE
+
 [PcdsFixedAtBuild.common]
   gEfiMdePkgTokenSpaceGuid.PcdDebugPrintErrorLevel|0x800F
 
@@ -372,7 +374,7 @@
   #
   # PCI support
   #
-  ArmPkg/Drivers/ArmPciCpuIo2Dxe/ArmPciCpuIo2Dxe.inf {
+  UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.inf {
 
   NULL|OvmfPkg/Fdt/FdtPciPcdProducerLib/FdtPciPcdProducerLib.inf
   
NULL|OvmfPkg/Library/BaseCachingPciExpressLib/BaseCachingPciExpressLib.inf
diff --git a/ArmVirtPkg/ArmVirtKvmTool.fdf b/ArmVirtPkg/ArmVirtKvmTool.fdf
index 82aff47673..8d5c3c83b1 100644
--- a/ArmVirtPkg/ArmVirtKvmTool.fdf
+++ b/ArmVirtPkg/ArmVirtKvmTool.fdf
@@ -195,7 +195,7 @@ READ_LOCK_STATUS   = TRUE
   #
   # PCI support
   #
-  INF ArmPkg/Drivers/ArmPciCpuIo2Dxe/ArmPciCpuIo2Dxe.inf
+  INF UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.inf
   INF MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridgeDxe.inf
   INF MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf
   INF OvmfPkg/VirtioPciDeviceDxe/VirtioPciDeviceDxe.inf
diff --git a/ArmVirtPkg/ArmVirtQemu.dsc b/ArmVirtPkg/ArmVirtQemu.dsc
index cf306cac08..204344ea0b 100644
--- a/ArmVirtPkg/ArmVirtQemu.dsc
+++ b/ArmVirtPkg/ArmVirtQemu.dsc
@@ -149,6 +149,8 @@
 
   gArmVirtTokenSpaceGuid.PcdTpm2SupportEnabled|$(TPM2_ENABLE)
 
+  gEfiMdePkgTokenSpaceGuid.PcdPciIoTranslationIsEnabled|TRUE
+
 [PcdsFixedAtBuild.common]
 !if $(ARCH) == AARCH64
   gArmTokenSpaceGuid.PcdVFPEnabled|1
@@ -526,7 +528,7 @@
   #
   # PCI support
   #
-  ArmPkg/Drivers/ArmPciCpuIo2Dxe/ArmPciCpuIo2Dxe.inf {
+  UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.inf {
 
   NULL|OvmfPkg/Fdt/FdtPciPcdProducerLib/FdtPciPcdProducerLib.inf
   }
diff --git a/ArmVirtPkg/ArmVirtQemuFvMain.fdf.inc 
b/ArmVirtPkg/ArmVirtQemuFvMain.fdf.inc
index 9b3e37d5c9..b44d72158d 100644
--- a/ArmVirtPkg/ArmVirtQemuFvMain.fdf.inc
+++ b/ArmVirtPkg/ArmVirtQemuFvMain.fdf.inc
@@ -153,7 +153,7 @@ READ_LOCK_STATUS   = TRUE
   #
   # PCI support
   #
-  INF ArmPkg/Drivers/ArmPciCpuIo2Dxe/ArmPciCpuIo2Dxe.inf
+  INF UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.inf
   INF MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridgeDxe.inf
   INF MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf
   INF OvmfPkg/PciHotPlugInitDxe/PciHotPlugInit.inf
diff --git a/ArmVirtPkg/ArmVirtQemuKernel.dsc b/ArmVirtPkg/ArmVirtQemuKernel.dsc
index c0d079e28d..c2938883d8 100644
--- a/ArmVirtPkg/ArmVirtQemuKernel.dsc
+++ b/ArmVirtPkg/ArmVirtQemuKernel.dsc
@@ -115,6 +115,8 @@
 
   gEfiMdeModulePkgTokenSpaceGuid.PcdTurnOffUsbLegacySupport|TRUE
 
+  gEfiMdePkgTokenSpaceGuid.PcdPciIoTranslationIsEnabled|TRUE
+
 [PcdsFixedAtBuild.common]
 !if $(ARCH) == AARCH64
   gArmTokenSpaceGuid.PcdVFPEnabled|1
@@ -431,7 +433,7 @@
   #
   # PCI support
   #
-  ArmPkg/Drivers/ArmPciCpuIo2Dxe/ArmPciCpuIo2Dxe.inf {
+  UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.inf {
 
   NULL|OvmfPkg/Fdt/FdtPciPcdProducerLib/FdtPciPcdProducerLib.inf
   }
-- 
2.27.0



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[edk2-devel] [PATCH v3 20/39] UefiCpuPkg: Add MMIO method in CpuIo2Dxe

2023-11-17 Thread Chao Li

CpuIo2Dxe only supports IO to access PCI IO. Some ARCH requires
MMIO to access PCI IO, add the MMIO access method in CpuIo2Dxe.

The MMIO methods depend on PcdPciIoTranslationIsEnabled and
PcdPciIoTransLation. The code is referenced from ArmPkg.

Build-tested only (with "OvmfPkgX64.dsc").

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4584

Cc: Ray Ni 
Cc: Rahul Kumar 
Cc: Gerd Hoffmann 
Cc: Leif Lindholm 
Cc: Ard Biesheuvel 
Cc: Sami Mujawar 
Signed-off-by: Chao Li 
---
 UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.c   | 147 +++--
 UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.h   |   2 +
 UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.inf |   8 +-
 UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.uni |   2 +
 4 files changed, 109 insertions(+), 50 deletions(-)

diff --git a/UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.c b/UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.c
index 87f4f805ca..8b0967793c 100644
--- a/UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.c
+++ b/UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.c
@@ -3,6 +3,8 @@
 
 Copyright (c) 2009 - 2018, Intel Corporation. All rights reserved.
 Copyright (c) 2017, AMD Incorporated. All rights reserved.
+Copyright (c) 2016, Linaro Ltd. All rights reserved.
+Copyright (c) 2023 Loongson Technology Corporation Limited. All rights 
reserved.
 
 SPDX-License-Identifier: BSD-2-Clause-Patent
 
@@ -149,7 +151,7 @@ CpuIoCheckParameter (
   //
   // Since MAX_ADDRESS can be the maximum integer value supported by the CPU 
and Count
   // can also be the maximum integer value supported by the CPU, this range
-  // check must be adjusted to avoid all oveflow conditions.
+  // check must be adjusted to avoid all overflow conditions.
   //
   // The following form of the range check is equivalent but assumes that
   // MAX_ADDRESS and MAX_IO_PORT_ADDRESS are of the form (2^n - 1).
@@ -398,6 +400,18 @@ CpuIoServiceRead (
   EFI_CPU_IO_PROTOCOL_WIDTH  OperationWidth;
   UINT8  *Uint8Buffer;
 
+  UINT8 EFIAPI  (*CpuIoRead8) (
+UINTN
+);
+
+  UINT16 EFIAPI  (*CpuIoRead16) (
+UINTN
+);
+
+  UINT32 EFIAPI  (*CpuIoRead32) (
+UINTN
+);
+
   Status = CpuIoCheckParameter (FALSE, Width, Address, Count, Buffer);
   if (EFI_ERROR (Status)) {
 return Status;
@@ -410,37 +424,47 @@ CpuIoServiceRead (
   OutStride  = mOutStride[Width];
   OperationWidth = (EFI_CPU_IO_PROTOCOL_WIDTH)(Width & 0x03);
 
-  //
-  // Fifo operations supported for (mInStride[Width] == 0)
-  //
-  if (InStride == 0) {
-switch (OperationWidth) {
-  case EfiCpuIoWidthUint8:
-IoReadFifo8 ((UINTN)Address, Count, Buffer);
-return EFI_SUCCESS;
-  case EfiCpuIoWidthUint16:
-IoReadFifo16 ((UINTN)Address, Count, Buffer);
-return EFI_SUCCESS;
-  case EfiCpuIoWidthUint32:
-IoReadFifo32 ((UINTN)Address, Count, Buffer);
-return EFI_SUCCESS;
-  default:
-//
-// The CpuIoCheckParameter call above will ensure that this
-// path is not taken.
-//
-ASSERT (FALSE);
-break;
+  if (FeaturePcdGet (PcdPciIoTranslationIsEnabled) == FALSE) {
+//
+// Fifo operations supported for (mInStride[Width] == 0)
+//
+if (InStride == 0) {
+  switch (OperationWidth) {
+case EfiCpuIoWidthUint8:
+  IoReadFifo8 ((UINTN)Address, Count, Buffer);
+  return EFI_SUCCESS;
+case EfiCpuIoWidthUint16:
+  IoReadFifo16 ((UINTN)Address, Count, Buffer);
+  return EFI_SUCCESS;
+case EfiCpuIoWidthUint32:
+  IoReadFifo32 ((UINTN)Address, Count, Buffer);
+  return EFI_SUCCESS;
+default:
+  //
+  // The CpuIoCheckParameter call above will ensure that this
+  // path is not taken.
+  //
+  ASSERT (FALSE);
+  break;
+  }
 }
+CpuIoRead8  = IoRead8;
+CpuIoRead16 = IoRead16;
+CpuIoRead32 = IoRead32;
+  } else {
+Address+= PcdGet64 (PcdPciIoTranslation);
+CpuIoRead8  = MmioRead8;
+CpuIoRead16 = MmioRead16;
+CpuIoRead32 = MmioRead32;
   }
 
   for (Uint8Buffer = Buffer; Count > 0; Address += InStride, Uint8Buffer += 
OutStride, Count--) {
 if (OperationWidth == EfiCpuIoWidthUint8) {
-  *Uint8Buffer = IoRead8 ((UINTN)Address);
+  *Uint8Buffer = CpuIoRead8 ((UINTN)Address);
 } else if (OperationWidth == EfiCpuIoWidthUint16) {
-  *((UINT16 *)Uint8Buffer) = IoRead16 ((UINTN)Address);
+  *((UINT16 *)Uint8Buffer) = CpuIoRead16 ((UINTN)Address);
 } else if (OperationWidth == EfiCpuIoWidthUint32) {
-  *((UINT32 *)Uint8Buffer) = IoRead32 ((UINTN)Address);
+  *((UINT32 *)Uint8Buffer) = CpuIoRead32 ((UINTN)Address);
 }
   }
 
@@ -502,6 +526,21 @@ CpuIoServiceWrite (
   EFI_CPU_IO_PROTOCOL_WIDTH  OperationWidth;
   UINT8  *Uint8Buffer;
 
+  UINT8 EFIAPI  (*CpuIoWrite8) (
+UINTN,
+UINT8
+);
+
+  UINT16 EFIAPI  (*CpuIoWrite16) (
+UINTN,
+UINT16
+);
+
+  UINT32 EFIAPI  (*CpuIoWrite32) (
+UINTN,
+UINT32
+);
+
   //
   // Make sure the

[edk2-devel] [PATCH v3 19/39] MdePkg: Add a PCD feature flag named PcdPciIoTranslationIsEnabled

2023-11-17 Thread Chao Li

Some ARCH need to use MMIO to access PCI IO, such as ARM AARCH64 RISC-V
and LOONGARCH64. In some drivers, a PCD value is added to determine
whether to use MMIO.

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4584

Cc: Michael D Kinney 
Cc: Liming Gao 
Cc: Zhiguang Liu 
Signed-off-by: Chao Li 
---
 MdePkg/MdePkg.dec | 6 ++
 1 file changed, 6 insertions(+)

diff --git a/MdePkg/MdePkg.dec b/MdePkg/MdePkg.dec
index ac54338089..55f5230c31 100644
--- a/MdePkg/MdePkg.dec
+++ b/MdePkg/MdePkg.dec
@@ -2018,6 +2018,12 @@
   # @Prompt Validate ORDERED_COLLECTION structure
   
gEfiMdePkgTokenSpaceGuid.PcdValidateOrderedCollection|FALSE|BOOLEAN|0x002a
 
+  ## Indicates if PCI IO translation is used.
+  #   TRUE  - PCI IO translation is enable.
+  #   FALSE - PCI IO translation is disable.
+  # @Prompt Pci Io Translation Is Enabled.
+  
gEfiMdePkgTokenSpaceGuid.PcdPciIoTranslationIsEnabled|FALSE|BOOLEAN|0x0043
+
 [PcdsFixedAtBuild]
   ## Status code value for indicating a watchdog timer has expired.
   # EFI_COMPUTING_UNIT_HOST_PROCESSOR | EFI_CU_HP_EC_TIMER_EXPIRED
-- 
2.27.0



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[edk2-devel] [PATCH v3 18/39] ArmVirtPkg: Move PCD of FDT base address and FDT padding to OvmfPkg

2023-11-17 Thread Chao Li

Moved PcdDeviceTreeInitialBaseAddress and PcdDeviceTreeAllocationPadding
to OvmfPkg for easier use by other architectures.

Build-tested only (with "ArmVirtQemu.dsc").

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4584

Cc: Ard Biesheuvel 
Cc: Leif Lindholm 
Cc: Sami Mujawar 
Cc: Gerd Hoffmann 
Cc: Jiewen Yao 
Cc: Jordan Justen 
Signed-off-by: Chao Li 
Acked-by: Gerd Hoffmann 
Reviewed-by: Sami Mujawar 
---
 ArmVirtPkg/ArmVirtCloudHv.dsc |  2 +-
 ArmVirtPkg/ArmVirtKvmTool.dsc |  2 +-
 ArmVirtPkg/ArmVirtPkg.dec | 14 --
 ArmVirtPkg/ArmVirtQemu.dsc|  2 +-
 ArmVirtPkg/ArmVirtQemuKernel.dsc  |  2 +-
 ArmVirtPkg/ArmVirtXen.dsc |  2 +-
 .../ArmVirtPsciResetSystemPeiLib.inf  |  3 ++-
 .../CloudHvVirtMemInfoPeiLib.inf  |  3 ++-
 .../DebugLibFdtPL011UartFlash.inf |  3 ++-
 .../EarlyFdt16550SerialPortHookLib.inf|  3 ++-
 .../EarlyFdtPL011SerialPortLib.inf|  3 ++-
 .../KvmtoolPlatformPeiLib.inf |  5 +++--
 .../Library/PlatformPeiLib/PlatformPeiLib.inf | 10 +-
 .../QemuVirtMemInfoLib/QemuVirtMemInfoPeiLib.inf  |  3 ++-
 .../PrePi/ArmVirtPrePiUniCoreRelocatable.inf  |  3 ++-
 OvmfPkg/OvmfPkg.dec   | 15 +++
 16 files changed, 42 insertions(+), 33 deletions(-)

diff --git a/ArmVirtPkg/ArmVirtCloudHv.dsc b/ArmVirtPkg/ArmVirtCloudHv.dsc
index 2cb89ce10c..76c0d28544 100644
--- a/ArmVirtPkg/ArmVirtCloudHv.dsc
+++ b/ArmVirtPkg/ArmVirtCloudHv.dsc
@@ -129,7 +129,7 @@
   gArmTokenSpaceGuid.PcdSystemMemoryBase|0x4000
 
   # initial location of the device tree blob passed by Cloud Hypervisor -- 
base of DRAM
-  gArmVirtTokenSpaceGuid.PcdDeviceTreeInitialBaseAddress|0x4000
+  gUefiOvmfPkgTokenSpaceGuid.PcdDeviceTreeInitialBaseAddress|0x4000
 
   gEfiMdeModulePkgTokenSpaceGuid.PcdResetOnMemoryTypeInformationChange|FALSE
   gEfiMdeModulePkgTokenSpaceGuid.PcdBootManagerMenuFile|{ 0x21, 0xaa, 0x2c, 
0x46, 0x14, 0x76, 0x03, 0x45, 0x83, 0x6e, 0x8a, 0xb6, 0xf4, 0x66, 0x23, 0x31 }
diff --git a/ArmVirtPkg/ArmVirtKvmTool.dsc b/ArmVirtPkg/ArmVirtKvmTool.dsc
index f50d53bf15..cac4fe06d3 100644
--- a/ArmVirtPkg/ArmVirtKvmTool.dsc
+++ b/ArmVirtPkg/ArmVirtKvmTool.dsc
@@ -179,7 +179,7 @@
   # We are booting from RAM using the Linux kernel boot protocol,
   # x0 will point to the DTB image in memory.
   #
-  gArmVirtTokenSpaceGuid.PcdDeviceTreeInitialBaseAddress|0x0
+  gUefiOvmfPkgTokenSpaceGuid.PcdDeviceTreeInitialBaseAddress|0x0
 
   gArmTokenSpaceGuid.PcdFdBaseAddress|0x0
   gArmTokenSpaceGuid.PcdFvBaseAddress|0x0
diff --git a/ArmVirtPkg/ArmVirtPkg.dec b/ArmVirtPkg/ArmVirtPkg.dec
index 0f2d787327..2451644844 100644
--- a/ArmVirtPkg/ArmVirtPkg.dec
+++ b/ArmVirtPkg/ArmVirtPkg.dec
@@ -42,20 +42,6 @@
   gArmVirtTokenSpaceGuid.PcdTpm2SupportEnabled|FALSE|BOOLEAN|0x0004
 
 [PcdsFixedAtBuild, PcdsPatchableInModule]
-  #
-  # This is the physical address where the device tree is expected to be stored
-  # upon first entry into UEFI. This needs to be a FixedAtBuild PCD, so that we
-  # can do a first pass over the device tree in the SEC phase to discover the
-  # UART base address.
-  #
-  gArmVirtTokenSpaceGuid.PcdDeviceTreeInitialBaseAddress|0x0|UINT64|0x0001
-
-  #
-  # Padding in bytes to add to the device tree allocation, so that the DTB can
-  # be modified in place (default: 256 bytes)
-  #
-  gArmVirtTokenSpaceGuid.PcdDeviceTreeAllocationPadding|256|UINT32|0x0002
-
   #
   # Binary representation of the GUID that determines the terminal type. The
   # size must be exactly 16 bytes. The default value corresponds to
diff --git a/ArmVirtPkg/ArmVirtQemu.dsc b/ArmVirtPkg/ArmVirtQemu.dsc
index 30e3cfc8b9..cf306cac08 100644
--- a/ArmVirtPkg/ArmVirtQemu.dsc
+++ b/ArmVirtPkg/ArmVirtQemu.dsc
@@ -201,7 +201,7 @@
   gArmTokenSpaceGuid.PcdSystemMemoryBase|0x4000
 
   # initial location of the device tree blob passed by QEMU -- base of DRAM
-  gArmVirtTokenSpaceGuid.PcdDeviceTreeInitialBaseAddress|0x4000
+  gUefiOvmfPkgTokenSpaceGuid.PcdDeviceTreeInitialBaseAddress|0x4000
 
   gEfiMdeModulePkgTokenSpaceGuid.PcdResetOnMemoryTypeInformationChange|FALSE
   gEfiMdeModulePkgTokenSpaceGuid.PcdBootManagerMenuFile|{ 0x21, 0xaa, 0x2c, 
0x46, 0x14, 0x76, 0x03, 0x45, 0x83, 0x6e, 0x8a, 0xb6, 0xf4, 0x66, 0x23, 0x31 }
diff --git a/ArmVirtPkg/ArmVirtQemuKernel.dsc b/ArmVirtPkg/ArmVirtQemuKernel.dsc
index b50f8e84a3..c0d079e28d 100644
--- a/ArmVirtPkg/ArmVirtQemuKernel.dsc
+++ b/ArmVirtPkg/ArmVirtQemuKernel.dsc
@@ -198,7 +198,7 @@
   # Define a default initial address for the device tree.
   # Ignored if x0 != 0 at entry.
   #
-  gArmVirtTokenSpaceGuid.PcdDeviceTreeInitialBaseAddress|0x4000
+  gUefiOvmfPkgTokenSpaceGuid.PcdDeviceTreeInitialBaseAddress|0x4000
 
   gArmTokenSpaceGuid.PcdFdBaseAddress|0x0
   gArmTokenSpaceGuid.PcdFvBaseAddress|0x0

[edk2-devel] [PATCH v3 17/39] EmbeddedPkg: Add PcdPrePiCpuIoSize width for LOONGARCH64

2023-11-17 Thread Chao Li

Added LoongArch64 architecture CPU IO width.

https://bugzilla.tianocore.org/show_bug.cgi?id=4584

Cc: Leif Lindholm 
Cc: Ard Biesheuvel 
Cc: Abner Chang 
Cc: Daniel Schaefer 
Signed-off-by: Chao Li 
Reviewed-by: Leif Lindholm 
---
 EmbeddedPkg/EmbeddedPkg.dec | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/EmbeddedPkg/EmbeddedPkg.dec b/EmbeddedPkg/EmbeddedPkg.dec
index 341ef5e6a6..241d4f3acc 100644
--- a/EmbeddedPkg/EmbeddedPkg.dec
+++ b/EmbeddedPkg/EmbeddedPkg.dec
@@ -165,6 +165,9 @@
 [PcdsFixedAtBuild.X64]
   gEmbeddedTokenSpaceGuid.PcdPrePiCpuIoSize|16|UINT8|0x0011
 
+[PcdsFixedAtBuild.LOONGARCH64]
+  gEmbeddedTokenSpaceGuid.PcdPrePiCpuIoSize|16|UINT8|0x0011
+
 [PcdsFixedAtBuild.common, PcdsDynamic.common]
   #
   # Value to add to a host address to obtain a device address, using
-- 
2.27.0



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[edk2-devel] [PATCH v3 16/39] UefiCpuPkg: Add CpuDxe driver for LoongArch64

2023-11-17 Thread Chao Li

Added a new DXE driver named CpuDxeLoongArch64.

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4584

Cc: Eric Dong 
Cc: Ray Ni 
Cc: Rahul Kumar 
Cc: Gerd Hoffmann 
Signed-off-by: Chao Li 
Co-authored-by: Baoqi Zhang 
Co-authored-by: Dongyan Qian 
---
 UefiCpuPkg/CpuDxeLoongArch64/CpuDxe.c| 440 ++
 UefiCpuPkg/CpuDxeLoongArch64/CpuDxe.h| 261 +++
 UefiCpuPkg/CpuDxeLoongArch64/CpuDxe.inf  |  60 +++
 UefiCpuPkg/CpuDxeLoongArch64/CpuDxe.uni  |  15 +
 UefiCpuPkg/CpuDxeLoongArch64/CpuMp.c | 544 +++
 UefiCpuPkg/CpuDxeLoongArch64/CpuMp.h | 471 
 UefiCpuPkg/CpuDxeLoongArch64/Exception.c | 150 +++
 UefiCpuPkg/UefiCpuPkg.dsc|   1 +
 8 files changed, 1942 insertions(+)
 create mode 100644 UefiCpuPkg/CpuDxeLoongArch64/CpuDxe.c
 create mode 100644 UefiCpuPkg/CpuDxeLoongArch64/CpuDxe.h
 create mode 100644 UefiCpuPkg/CpuDxeLoongArch64/CpuDxe.inf
 create mode 100644 UefiCpuPkg/CpuDxeLoongArch64/CpuDxe.uni
 create mode 100644 UefiCpuPkg/CpuDxeLoongArch64/CpuMp.c
 create mode 100644 UefiCpuPkg/CpuDxeLoongArch64/CpuMp.h
 create mode 100644 UefiCpuPkg/CpuDxeLoongArch64/Exception.c

diff --git a/UefiCpuPkg/CpuDxeLoongArch64/CpuDxe.c 
b/UefiCpuPkg/CpuDxeLoongArch64/CpuDxe.c
new file mode 100644
index 00..b26e6bc3f7
--- /dev/null
+++ b/UefiCpuPkg/CpuDxeLoongArch64/CpuDxe.c
@@ -0,0 +1,440 @@
+/** @file CpuDxe.c
+
+  CPU DXE Module to produce CPU ARCH Protocol.
+
+  Copyright (c) 2023, Loongson Technology Corporation Limited. All rights 
reserved.
+
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+**/
+
+#include "CpuDxe.h"
+#include "CpuMp.h"
+#include 
+#include 
+#include 
+
+//
+// Globals used to initialize the protocol
+//
+EFI_HANDLE mCpuHandle = NULL;
+EFI_CPU_ARCH_PROTOCOL  gCpu   = {
+  CpuFlushCpuDataCache,
+  CpuEnableInterrupt,
+  CpuDisableInterrupt,
+  CpuGetInterruptState,
+  CpuInit,
+  CpuRegisterInterruptHandler,
+  CpuGetTimerValue,
+  CpuSetMemoryAttributes,
+  0,  // NumberOfTimers
+  4,  // DmaBufferAlignment
+};
+
+/**
+  This function flushes the range of addresses from Start to Start+Length
+  from the processor's data cache. If Start is not aligned to a cache line
+  boundary, then the bytes before Start to the preceding cache line boundary
+  are also flushed. If Start+Length is not aligned to a cache line boundary,
+  then the bytes past Start+Length to the end of the next cache line boundary
+  are also flushed. The FlushType of EfiCpuFlushTypeWriteBackInvalidate must be
+  supported. If the data cache is fully coherent with all DMA operations, then
+  this function can just return EFI_SUCCESS. If the processor does not support
+  flushing a range of the data cache, then the entire data cache can be 
flushed.
+
+  @param  This The EFI_CPU_ARCH_PROTOCOL instance.
+  @param  StartThe beginning physical address to flush from the 
processor's data
+   cache.
+  @param  Length   The number of bytes to flush from the processor's 
data cache. This
+   function may flush more bytes than Length specifies 
depending upon
+   the granularity of the flush operation that the 
processor supports.
+  @param  FlushTypeSpecifies the type of flush operation to perform.
+
+  @retval EFI_SUCCESS   The address range from Start to Start+Length 
was flushed from
+the processor's data cache.
+  @retval EFI_INVALID_PARAMETER The processor does not support the cache flush 
type specified
+by FlushType.
+
+**/
+EFI_STATUS
+EFIAPI
+CpuFlushCpuDataCache (
+  IN EFI_CPU_ARCH_PROTOCOL  *This,
+  IN EFI_PHYSICAL_ADDRESS   Start,
+  IN UINT64 Length,
+  IN EFI_CPU_FLUSH_TYPE FlushType
+  )
+{
+  switch (FlushType) {
+case EfiCpuFlushTypeWriteBack:
+  WriteBackDataCacheRange ((VOID *)(UINTN)Start, (UINTN)Length);
+  break;
+case EfiCpuFlushTypeInvalidate:
+  InvalidateDataCacheRange ((VOID *)(UINTN)Start, (UINTN)Length);
+  break;
+case EfiCpuFlushTypeWriteBackInvalidate:
+  WriteBackInvalidateDataCacheRange ((VOID *)(UINTN)Start, (UINTN)Length);
+  break;
+default:
+  return EFI_INVALID_PARAMETER;
+  }
+
+  return EFI_SUCCESS;
+}
+
+/**
+  This function enables interrupt processing by the processor.
+
+  @param  This The EFI_CPU_ARCH_PROTOCOL instance.
+
+  @retval EFI_SUCCESS   Interrupts are enabled on the processor.
+  @retval EFI_DEVICE_ERROR  Interrupts could not be enabled on the 
processor.
+
+**/
+EFI_STATUS
+EFIAPI
+CpuEnableInterrupt (
+  IN EFI_CPU_ARCH_PROTOCOL  *This
+  )
+{
+  EnableInterrupts ();
+
+  return EFI_SUCCESS;
+}
+
+/**
+  This function disables interrupt processing by the processor.
+
+  @param  This The EFI_CPU_ARCH_PROTOCOL instance.
+
+  @retval EFI_SUCCESS   Interrupts are

[edk2-devel] [PATCH v3 15/39] UefiCpuPkg: Add multiprocessor library for LoongArch64

2023-11-17 Thread Chao Li

Added a new library named LoongArch64MpInitLib.

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4584

Cc: Eric Dong 
Cc: Ray Ni 
Cc: Rahul Kumar 
Cc: Gerd Hoffmann 
Signed-off-by: Chao Li 
Acked-by: Ray Ni 
---
 .../LoongArch64MpInitLib/DxeMpInitLib.inf |   45 +
 .../LoongArch64MpInitLib/DxeMpInitLib.uni |   15 +
 .../Library/LoongArch64MpInitLib/DxeMpLib.c   |  481 +
 .../Library/LoongArch64MpInitLib/MpLib.c  | 1596 +
 .../Library/LoongArch64MpInitLib/MpLib.h  |  361 
 .../LoongArch64MpInitLib/PeiMpInitLib.inf |   37 +
 .../LoongArch64MpInitLib/PeiMpInitLib.uni |   15 +
 .../Library/LoongArch64MpInitLib/PeiMpLib.c   |  404 +
 UefiCpuPkg/UefiCpuPkg.dsc |2 +
 9 files changed, 2956 insertions(+)
 create mode 100644 UefiCpuPkg/Library/LoongArch64MpInitLib/DxeMpInitLib.inf
 create mode 100644 UefiCpuPkg/Library/LoongArch64MpInitLib/DxeMpInitLib.uni
 create mode 100644 UefiCpuPkg/Library/LoongArch64MpInitLib/DxeMpLib.c
 create mode 100644 UefiCpuPkg/Library/LoongArch64MpInitLib/MpLib.c
 create mode 100644 UefiCpuPkg/Library/LoongArch64MpInitLib/MpLib.h
 create mode 100644 UefiCpuPkg/Library/LoongArch64MpInitLib/PeiMpInitLib.inf
 create mode 100644 UefiCpuPkg/Library/LoongArch64MpInitLib/PeiMpInitLib.uni
 create mode 100644 UefiCpuPkg/Library/LoongArch64MpInitLib/PeiMpLib.c

diff --git a/UefiCpuPkg/Library/LoongArch64MpInitLib/DxeMpInitLib.inf 
b/UefiCpuPkg/Library/LoongArch64MpInitLib/DxeMpInitLib.inf
new file mode 100644
index 00..48086ce0a3
--- /dev/null
+++ b/UefiCpuPkg/Library/LoongArch64MpInitLib/DxeMpInitLib.inf
@@ -0,0 +1,45 @@
+## @file
+#  LoongArch64 MP initialize support functions for DXE phase.
+#
+#  Copyright (c) 2023, Loongson Technology Corporation Limited. All rights 
reserved.
+#  SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+##
+
+
+[Defines]
+  INF_VERSION= 0x00010005
+  BASE_NAME  = DxeMpInitLib
+  MODULE_UNI_FILE= DxeMpInitLib.uni
+  FILE_GUID  = C3B9ACAA-B67C-D3E0-E70D-7982B6EA2931
+  MODULE_TYPE= DXE_DRIVER
+  VERSION_STRING = 1.1
+  LIBRARY_CLASS  = MpInitLib|DXE_DRIVER
+
+[Sources.common]
+  DxeMpLib.c
+  MpLib.c
+  MpLib.h
+
+[Packages]
+  MdePkg/MdePkg.dec
+  MdeModulePkg/MdeModulePkg.dec
+  UefiCpuPkg/UefiCpuPkg.dec
+
+[LibraryClasses]
+  BaseLib
+  MemoryAllocationLib
+  HobLib
+  CpuLib
+  UefiBootServicesTableLib
+  DebugAgentLib
+  SynchronizationLib
+  TimerLib
+
+[Protocols]
+  gEfiTimerArchProtocolGuid ## SOMETIMES_CONSUMES
+
+[Pcd]
+  gUefiCpuPkgTokenSpaceGuid.PcdCpuMaxLogicalProcessorNumber   ## 
CONSUMES
+  gUefiCpuPkgTokenSpaceGuid.PcdCpuApInitTimeOutInMicroSeconds ## 
CONSUMES
+  gUefiCpuPkgTokenSpaceGuid.PcdCpuApStatusCheckIntervalInMicroSeconds ## 
CONSUMES
diff --git a/UefiCpuPkg/Library/LoongArch64MpInitLib/DxeMpInitLib.uni 
b/UefiCpuPkg/Library/LoongArch64MpInitLib/DxeMpInitLib.uni
new file mode 100644
index 00..aebbdbbb0e
--- /dev/null
+++ b/UefiCpuPkg/Library/LoongArch64MpInitLib/DxeMpInitLib.uni
@@ -0,0 +1,15 @@
+// /** @file
+// MP Initialize Library instance for DXE driver.
+//
+// MP Initialize Library instance for DXE driver.
+//
+// Copyright (c) 2023, Loongson Technology Corporation Limited. All rights 
reserved.
+//
+// SPDX-License-Identifier: BSD-2-Clause-Patent
+//
+// **/
+
+
+#string STR_MODULE_ABSTRACT #language en-US "MP Initialize Library 
instance for DXE driver."
+
+#string STR_MODULE_DESCRIPTION  #language en-US "MP Initialize Library 
instance for DXE driver."
diff --git a/UefiCpuPkg/Library/LoongArch64MpInitLib/DxeMpLib.c 
b/UefiCpuPkg/Library/LoongArch64MpInitLib/DxeMpLib.c
new file mode 100644
index 00..008016b225
--- /dev/null
+++ b/UefiCpuPkg/Library/LoongArch64MpInitLib/DxeMpLib.c
@@ -0,0 +1,481 @@
+/** @file
+  LoongArch64 MP initialize support functions for DXE phase.
+
+  Copyright (c) 2023, Loongson Technology Corporation Limited. All rights 
reserved.
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include "MpLib.h"
+
+#include 
+#include 
+#include 
+#include 
+
+#include 
+
+CPU_MP_DATA   *mCpuMpData= NULL;
+EFI_EVENT mCheckAllApsEvent  = NULL;
+volatile BOOLEAN  mStopCheckAllApsStatus = TRUE;
+
+/**
+  Enable Debug Agent to support source debugging on AP function.
+
+**/
+VOID
+EnableDebugAgent (
+  VOID
+  )
+{
+  //
+  // Initialize Debug Agent to support source level debug in DXE phase
+  //
+  InitializeDebugAgent (DEBUG_AGENT_INIT_DXE_AP, NULL, NULL);
+}
+
+/**
+  Get the pointer to CPU MP Data structure.
+
+  @return  The pointer to CPU MP Data structure.
+**/
+CPU_MP_DATA *
+GetCpuMpData (
+  VOID
+  )
+{
+  ASSERT (mCpuMpData != NULL);
+  return mCpuMpData;
+}
+
+/**
+  Save the pointer to CPU MP Data structure.
+
+  @param[in] CpuMpData  The pointer to CPU MP Data structure will be saved.
+**/

[edk2-devel] [PATCH v3 14/39] UefiCpuPkg: Add LoongArch64CpuMmuLib to UefiCpuPkg

2023-11-17 Thread Chao Li

Add a new library LoongArch64CpuMmuLib. It provides two-stage MMU library
instances, PEI and DXE.

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4584

Cc: Eric Dong 
Cc: Ray Ni 
Cc: Rahul Kumar 
Cc: Gerd Hoffmann 
Signed-off-by: Chao Li 
Co-authored-by: Baoqi Zhang 
Co-authored-by: Dongyan Qian 
Co-authored-by: Xianglai Li 
Co-authored-by: Bibo Mao 
---
 .../LoongArch64CpuMmuLib/CommonMmuLib.c   | 965 ++
 .../LoongArch64CpuMmuLib/CommonMmuLib.h   |  43 +
 .../LoongArch64CpuMmuLib/DxeCpuMmuLib.inf |  37 +
 .../LoongArch64CpuMmuLib/DxeCpuMmuLib.uni |  14 +
 .../LoongArch64CpuMmuLib/CommonMmuLib.c   | 964 +
 .../LoongArch64CpuMmuLib/CommonMmuLib.h   |  43 +
 .../LoongArch64CpuMmuLib/DxeCpuMmuLib.inf |  37 +
 .../LoongArch64CpuMmuLib/DxeCpuMmuLib.uni |  14 +
 .../LoongArch64CpuMmuLib/Page.h   | 279 +
 .../LoongArch64CpuMmuLib/PeiCpuMmuLib.c   | 165 +++
 .../LoongArch64CpuMmuLib/PeiCpuMmuLib.inf |  44 +
 .../LoongArch64CpuMmuLib/PeiCpuMmuLib.uni |  14 +
 .../LoongArch64CpuMmuLib/Tlb.h|  48 +
 .../LoongArch64CpuMmuLib/TlbOperation.S   |  44 +
 .../Library/LoongArch64CpuMmuLib/Page.h   | 279 +
 .../LoongArch64CpuMmuLib/PeiCpuMmuLib.c   | 165 +++
 .../LoongArch64CpuMmuLib/PeiCpuMmuLib.inf |  44 +
 .../LoongArch64CpuMmuLib/PeiCpuMmuLib.uni |  14 +
 UefiCpuPkg/Library/LoongArch64CpuMmuLib/Tlb.h |  48 +
 .../LoongArch64CpuMmuLib/TlbOperation.S   |  44 +
 UefiCpuPkg/UefiCpuPkg.dsc |   2 +
 21 files changed, 3307 insertions(+)
 create mode 100644 UefiCpuPkg/Library/LoongArch64CpuMmuLib/CommonMmuLib.c
 create mode 100644 UefiCpuPkg/Library/LoongArch64CpuMmuLib/CommonMmuLib.h
 create mode 100644 UefiCpuPkg/Library/LoongArch64CpuMmuLib/DxeCpuMmuLib.inf
 create mode 100644 UefiCpuPkg/Library/LoongArch64CpuMmuLib/DxeCpuMmuLib.uni
 create mode 100644 
UefiCpuPkg/Library/LoongArch64CpuMmuLib/LoongArch64CpuMmuLib/CommonMmuLib.c
 create mode 100644 
UefiCpuPkg/Library/LoongArch64CpuMmuLib/LoongArch64CpuMmuLib/CommonMmuLib.h
 create mode 100644 
UefiCpuPkg/Library/LoongArch64CpuMmuLib/LoongArch64CpuMmuLib/DxeCpuMmuLib.inf
 create mode 100644 
UefiCpuPkg/Library/LoongArch64CpuMmuLib/LoongArch64CpuMmuLib/DxeCpuMmuLib.uni
 create mode 100644 
UefiCpuPkg/Library/LoongArch64CpuMmuLib/LoongArch64CpuMmuLib/Page.h
 create mode 100644 
UefiCpuPkg/Library/LoongArch64CpuMmuLib/LoongArch64CpuMmuLib/PeiCpuMmuLib.c
 create mode 100644 
UefiCpuPkg/Library/LoongArch64CpuMmuLib/LoongArch64CpuMmuLib/PeiCpuMmuLib.inf
 create mode 100644 
UefiCpuPkg/Library/LoongArch64CpuMmuLib/LoongArch64CpuMmuLib/PeiCpuMmuLib.uni
 create mode 100644 
UefiCpuPkg/Library/LoongArch64CpuMmuLib/LoongArch64CpuMmuLib/Tlb.h
 create mode 100644 
UefiCpuPkg/Library/LoongArch64CpuMmuLib/LoongArch64CpuMmuLib/TlbOperation.S
 create mode 100644 UefiCpuPkg/Library/LoongArch64CpuMmuLib/Page.h
 create mode 100644 UefiCpuPkg/Library/LoongArch64CpuMmuLib/PeiCpuMmuLib.c
 create mode 100644 UefiCpuPkg/Library/LoongArch64CpuMmuLib/PeiCpuMmuLib.inf
 create mode 100644 UefiCpuPkg/Library/LoongArch64CpuMmuLib/PeiCpuMmuLib.uni
 create mode 100644 UefiCpuPkg/Library/LoongArch64CpuMmuLib/Tlb.h
 create mode 100644 UefiCpuPkg/Library/LoongArch64CpuMmuLib/TlbOperation.S

diff --git a/UefiCpuPkg/Library/LoongArch64CpuMmuLib/CommonMmuLib.c 
b/UefiCpuPkg/Library/LoongArch64CpuMmuLib/CommonMmuLib.c
new file mode 100644
index 00..bd5c7e55b6
--- /dev/null
+++ b/UefiCpuPkg/Library/LoongArch64CpuMmuLib/CommonMmuLib.c
@@ -0,0 +1,965 @@
+/** @file
+
+  CPU Memory Map Unit Handler Library common functions.
+
+  Copyright (c) 2023 Loongson Technology Corporation Limited. All rights 
reserved.
+
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+  @par Glossary:
+- Pgd or Pgd or PGD- Page Global Directory
+- Pud or Pud or PUD- Page Upper Directory
+- Pmd or Pmd or PMD- Page Middle Directory
+- Pte or pte or PTE- Page Table Entry
+- Val or VAL or val- Value
+- Dir- Directory
+**/
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include "Tlb.h"
+#include "Page.h"
+
+BOOLEAN  mMmuInited = FALSE;
+#define  SWAP_PAGE_DIR  CsrRead(LOONGARCH_CSR_PGDL)
+
+/**
+  Check to see if mmu successfully initializes.
+
+  @param  VOID.
+
+  @retval  TRUE  Initialization has been completed.
+   FALSE Initialization did not complete.
+**/
+BOOLEAN
+MmuIsInit (
+  VOID
+  )
+{
+  if (mMmuInited || (SWAP_PAGE_DIR != 0)) {
+return TRUE;
+  }
+
+  return FALSE;
+}
+
+/**
+  Iterates through the page directory to initialize it.
+
+  @param  Dst  A pointer to the directory of the page to initialize.
+  @param  Num  The number of page directories to initialize.
+  @param  Src  A pointer to the data used to initialize the page directory.
+
+  @return VOID.
+**/
+VOID
+PageDirInit (
+  IN VOID   *Dst,
+  IN UINTN  Num,
+  IN VOID   *Src
+  )
+{
+  UINTN  *Ptr;
+  UINTN  *End;
+

[edk2-devel] [PATCH v3 13/39] UefiCpuPkg: Add CpuMmuLib.h to UefiCpuPkg

2023-11-17 Thread Chao Li

Add a new header file CpuMmuLib.h, whitch is referenced from
ArmPkg/Include/Library/ArmMmuLib.h. Currently, only support for
LoongArch64 is added, and more architectures can be accommodated in the
future.

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4584

Cc: Eric Dong 
Cc: Ray Ni 
Cc: Rahul Kumar 
Cc: Gerd Hoffmann 
Cc: Leif Lindholm 
Cc: Ard Biesheuvel 
Cc: Sami Mujawar 
Cc: Sunil V L 
Cc: Andrei Warkentin 
Signed-off-by: Chao Li 
---
 UefiCpuPkg/Include/Library/CpuMmuLib.h | 155 +
 UefiCpuPkg/UefiCpuPkg.dec  |   4 +
 2 files changed, 159 insertions(+)
 create mode 100644 UefiCpuPkg/Include/Library/CpuMmuLib.h

diff --git a/UefiCpuPkg/Include/Library/CpuMmuLib.h 
b/UefiCpuPkg/Include/Library/CpuMmuLib.h
new file mode 100644
index 00..23b2fe34ac
--- /dev/null
+++ b/UefiCpuPkg/Include/Library/CpuMmuLib.h
@@ -0,0 +1,155 @@
+/** @file
+
+  Copyright (c) 2023 Loongson Technology Corporation Limited. All rights 
reserved.
+
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#ifndef CPU_MMU_LIB_H_
+#define CPU_MMU_LIB_H_
+
+#include 
+
+#define EFI_MEMORY_CACHETYPE_MASK  (EFI_MEMORY_UC  | \
+EFI_MEMORY_WC  | \
+EFI_MEMORY_WT  | \
+EFI_MEMORY_WB  | \
+EFI_MEMORY_UCE   \
+)
+
+typedef struct {
+  EFI_PHYSICAL_ADDRESSPhysicalBase;
+  EFI_VIRTUAL_ADDRESS VirtualBase;
+  UINTN   Length;
+  UINTN   Attributes;
+} MEMORY_REGION_DESCRIPTOR;
+
+/**
+  Converts EFI Attributes to corresponding architecture Attributes.
+
+  @param[in]  EfiAttributes Efi Attributes.
+
+  @retval  Corresponding architecture attributes.
+**/
+UINTN
+EfiAttributeConverse (
+  IN UINTN  EfiAttributes
+  );
+
+/**
+  Finds the length and memory properties of the memory region corresponding to 
the specified base address.
+
+  @param[in]  BaseAddressTo find the base address of the memory region.
+  @param[in]  EndAddress To find the end address of the memory region.
+  @param[out]  RegionLengthThe length of the memory region found.
+  @param[out]  RegionAttributesProperties of the memory region found.
+
+  @retval  EFI_SUCCESSThe corresponding memory area was successfully found
+   EFI_NOT_FOUNDNo memory area found
+**/
+EFI_STATUS
+GetMemoryRegionAttribute (
+  IN UINTN  BaseAddress,
+  IN UINTN  EndAddress,
+  OUTUINTN  *RegionLength,
+  OUTUINTN  *RegionAttributes
+  );
+
+/**
+  Sets the Attributes  of the specified memory region
+
+  @param[in]  BaseAddressThe base address of the memory region to set the 
Attributes.
+  @param[in]  Length The length of the memory region to set the 
Attributes.
+  @param[in]  Attributes The Attributes to be set.
+  @param[in]  AttributeMask  Mask of memory attributes to take into account.
+
+  @retval  EFI_SUCCESSThe Attributes was set successfully
+**/
+EFI_STATUS
+SetMemoryRegionAttributes (
+  IN EFI_PHYSICAL_ADDRESS  BaseAddress,
+  IN UINTN Length,
+  IN UINTN Attributes,
+  IN UINT64AttributeMask
+  );
+
+/**
+  Sets the non-executable Attributes for the specified memory region
+
+  @param[in]  BaseAddress  The base address of the memory region to set the 
Attributes.
+  @param[in]  Length   The length of the memory region to set the 
Attributes.
+
+  @retval  EFI_SUCCESSThe Attributes was set successfully
+**/
+EFI_STATUS
+SetMemoryRegionNoExec (
+  IN  EFI_PHYSICAL_ADDRESS  BaseAddress,
+  IN  UINTN Length
+  );
+
+/**
+  Clears the non-executable Attributes for the specified memory region
+
+  @param[in]  BaseAddress  The base address of the memory region to clear the 
Attributes.
+  @param[in]  Length   The length of the memory region to clear the 
Attributes.
+
+  @retval  EFI_SUCCESSThe Attributes was clear successfully
+**/
+EFI_STATUS
+EFIAPI
+ClearMemoryRegionNoExec (
+  IN  EFI_PHYSICAL_ADDRESS  BaseAddress,
+  IN  UINT64Length
+  );
+
+/**
+  Sets the read-only Attributes for the specified memory region
+
+  @param[in]  BaseAddress  The base address of the memory region to set the 
Attributes.
+  @param[in]  Length   The length of the memory region to set the 
Attributes.
+
+  @retval  EFI_SUCCESSThe Attributes was set successfully
+**/
+EFI_STATUS
+EFIAPI
+SetMemoryRegionReadOnly (
+  IN  EFI_PHYSICAL_ADDRESS  BaseAddress,
+  IN  UINT64Length
+  );
+
+/**
+  Clears the read-only Attributes for the specified memory region
+
+  @param[in]  BaseAddress  The base address of the memory region to clear the 
Attributes.
+  @param[in]  Length   The length of the memory region to clear the 
Attributes.
+
+  @retval  EFI_SUCCESSThe Attributes was clear successfully
+**/
+EFI_STATUS
+EFIAPI
+ClearMemoryRegionReadOnly (
+  IN

[edk2-devel] [PATCH v3 12/39] UefiCpuPkg: Add CPU exception library for LoongArch

2023-11-17 Thread Chao Li

Added a new library named LoongArch64CpuExceptionHandlerLib, and
modified the way LoongArch exceptions are expressed.

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4584

Cc: Eric Dong 
Cc: Ray Ni 
Cc: Rahul Kumar 
Cc: Gerd Hoffmann 
Signed-off-by: Chao Li 
Co-authored-by: Baoqi Zhang 
---
 MdePkg/Include/Protocol/DebugSupport.h|  76 +++--
 .../DxeCpuExceptionHandlerLib.inf |  45 +++
 .../DxeCpuExceptionHandlerLib.uni |  15 +
 .../DxeExceptionLib.c | 202 +++
 .../ExceptionCommon.c | 170 ++
 .../ExceptionCommon.h | 111 ++
 .../LoongArch64/ArchExceptionHandler.c| 214 
 .../LoongArch64/ExceptionHandlerAsm.S | 320 ++
 .../SecPeiCpuExceptionHandlerLib.inf  |  45 +++
 .../SecPeiCpuExceptionHandlerLib.uni  |  15 +
 .../SecPeiExceptionLib.c  |  90 +
 UefiCpuPkg/UefiCpuPkg.dec |   6 +
 UefiCpuPkg/UefiCpuPkg.dsc |   2 +
 13 files changed, 1279 insertions(+), 32 deletions(-)
 create mode 100644 
UefiCpuPkg/Library/LoongArch64CpuExceptionHandlerLib/DxeCpuExceptionHandlerLib.inf
 create mode 100644 
UefiCpuPkg/Library/LoongArch64CpuExceptionHandlerLib/DxeCpuExceptionHandlerLib.uni
 create mode 100644 
UefiCpuPkg/Library/LoongArch64CpuExceptionHandlerLib/DxeExceptionLib.c
 create mode 100644 
UefiCpuPkg/Library/LoongArch64CpuExceptionHandlerLib/ExceptionCommon.c
 create mode 100644 
UefiCpuPkg/Library/LoongArch64CpuExceptionHandlerLib/ExceptionCommon.h
 create mode 100644 
UefiCpuPkg/Library/LoongArch64CpuExceptionHandlerLib/LoongArch64/ArchExceptionHandler.c
 create mode 100644 
UefiCpuPkg/Library/LoongArch64CpuExceptionHandlerLib/LoongArch64/ExceptionHandlerAsm.S
 create mode 100644 
UefiCpuPkg/Library/LoongArch64CpuExceptionHandlerLib/SecPeiCpuExceptionHandlerLib.inf
 create mode 100644 
UefiCpuPkg/Library/LoongArch64CpuExceptionHandlerLib/SecPeiCpuExceptionHandlerLib.uni
 create mode 100644 
UefiCpuPkg/Library/LoongArch64CpuExceptionHandlerLib/SecPeiExceptionLib.c

diff --git a/MdePkg/Include/Protocol/DebugSupport.h 
b/MdePkg/Include/Protocol/DebugSupport.h
index 9742663619..cc4828 100644
--- a/MdePkg/Include/Protocol/DebugSupport.h
+++ b/MdePkg/Include/Protocol/DebugSupport.h
@@ -680,33 +680,45 @@ typedef struct {
   UINT32STVAL;
 } EFI_SYSTEM_CONTEXT_RISCV64;
 
-//
-// LoongArch processor exception types.
-//
-#define EXCEPT_LOONGARCH_INT   0
-#define EXCEPT_LOONGARCH_PIL   1
-#define EXCEPT_LOONGARCH_PIS   2
-#define EXCEPT_LOONGARCH_PIF   3
-#define EXCEPT_LOONGARCH_PME   4
-#define EXCEPT_LOONGARCH_PNR   5
-#define EXCEPT_LOONGARCH_PNX   6
-#define EXCEPT_LOONGARCH_PPI   7
-#define EXCEPT_LOONGARCH_ADE   8
-#define EXCEPT_LOONGARCH_ALE   9
-#define EXCEPT_LOONGARCH_BCE   10
-#define EXCEPT_LOONGARCH_SYS   11
-#define EXCEPT_LOONGARCH_BRK   12
-#define EXCEPT_LOONGARCH_INE   13
-#define EXCEPT_LOONGARCH_IPE   14
-#define EXCEPT_LOONGARCH_FPD   15
-#define EXCEPT_LOONGARCH_SXD   16
-#define EXCEPT_LOONGARCH_ASXD  17
-#define EXCEPT_LOONGARCH_FPE   18
-#define EXCEPT_LOONGARCH_TBR   64 // For code only, there is no such type in 
the ISA spec, the TLB refill is defined for an independent exception.
-
-//
-// LoongArch processor Interrupt types.
-//
+///
+/// LoongArch processor exception types.
+///
+#define EXCEPT_LOONGARCH_ECODE_SHIFT  16
+#define EXCEPT_LOONGARCH_INT  (0 << EXCEPT_LOONGARCH_ECODE_SHIFT)
+#define EXCEPT_LOONGARCH_PIL  (1 << EXCEPT_LOONGARCH_ECODE_SHIFT)
+#define EXCEPT_LOONGARCH_PIS  (2 << EXCEPT_LOONGARCH_ECODE_SHIFT)
+#define EXCEPT_LOONGARCH_PIF  (3 << EXCEPT_LOONGARCH_ECODE_SHIFT)
+#define EXCEPT_LOONGARCH_PME  (4 << EXCEPT_LOONGARCH_ECODE_SHIFT)
+#define EXCEPT_LOONGARCH_PNR  (5 << EXCEPT_LOONGARCH_ECODE_SHIFT)
+#define EXCEPT_LOONGARCH_PNX  (6 << EXCEPT_LOONGARCH_ECODE_SHIFT)
+#define EXCEPT_LOONGARCH_PPI  (7 << EXCEPT_LOONGARCH_ECODE_SHIFT)
+#define EXCEPT_LOONGARCH_ADE  (8 << EXCEPT_LOONGARCH_ECODE_SHIFT)
+#define EXCEPT_LOONGARCH_ALE  (9 << EXCEPT_LOONGARCH_ECODE_SHIFT)
+#define EXCEPT_LOONGARCH_BCE  (10  << EXCEPT_LOONGARCH_ECODE_SHIFT)
+#define EXCEPT_LOONGARCH_SYS  (11  << EXCEPT_LOONGARCH_ECODE_SHIFT)
+#define EXCEPT_LOONGARCH_BRK  (12  << EXCEPT_LOONGARCH_ECODE_SHIFT)
+#define EXCEPT_LOONGARCH_INE  (13  << EXCEPT_LOONGARCH_ECODE_SHIFT)
+#define EXCEPT_LOONGARCH_IPE  (14  << EXCEPT_LOONGARCH_ECODE_SHIFT)
+#define EXCEPT_LOONGARCH_FPD  (15  << EXCEPT_LOONGARCH_ECODE_SHIFT)
+#define EXCEPT_LOONGARCH_SXD  (16  << EXCEPT_LOONGARCH_ECODE_SHIFT)
+#define EXCEPT_LOONGARCH_ASXD (17  << EXCEPT_LOONGARCH_ECODE_SHIFT)
+#define EXCEPT_LOONGARCH_FPE  (18  << EXCEPT_LOONGARCH_ECODE_SHIFT)
+#define EXCEPT_LOONGARCH_WPE  (19  << EXCEPT_LOONGARCH_ECODE_SHIFT)
+#define

[edk2-devel] [PATCH v3 11/39] UefiCpuPkg: Add LoongArch64 CPU Timer library

2023-11-17 Thread Chao Li

Add the LoongArch64 CPU Timer library, using CPUCFG 0x4 and 0x5 for
Stable Counter frequency.

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4584

Cc: Eric Dong 
Cc: Ray Ni 
Cc: Rahul Kumar 
Cc: Gerd Hoffmann 
Signed-off-by: Chao Li 
---
 .../BaseLoongArch64CpuTimerLib.inf|  30 +++
 .../BaseLoongArch64CpuTimerLib.uni|  15 ++
 .../BaseLoongArch64CpuTimerLib/CpuTimerLib.c  | 226 ++
 UefiCpuPkg/UefiCpuPkg.dsc |   3 +
 4 files changed, 274 insertions(+)
 create mode 100644 
UefiCpuPkg/Library/BaseLoongArch64CpuTimerLib/BaseLoongArch64CpuTimerLib.inf
 create mode 100644 
UefiCpuPkg/Library/BaseLoongArch64CpuTimerLib/BaseLoongArch64CpuTimerLib.uni
 create mode 100644 UefiCpuPkg/Library/BaseLoongArch64CpuTimerLib/CpuTimerLib.c

diff --git 
a/UefiCpuPkg/Library/BaseLoongArch64CpuTimerLib/BaseLoongArch64CpuTimerLib.inf 
b/UefiCpuPkg/Library/BaseLoongArch64CpuTimerLib/BaseLoongArch64CpuTimerLib.inf
new file mode 100644
index 00..c00c215aec
--- /dev/null
+++ 
b/UefiCpuPkg/Library/BaseLoongArch64CpuTimerLib/BaseLoongArch64CpuTimerLib.inf
@@ -0,0 +1,30 @@
+## @file
+#  Base CPU Timer Library
+#
+#  Provides base timer support using CPUCFG 0x4 and 0x5 stable counter 
frequency.
+#
+#  Copyright (c) 2023, Loongson Technology Corporation Limited. All rights 
reserved.
+#  SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+##
+
+[Defines]
+  INF_VERSION   = 0x00010005
+  BASE_NAME = BaseLoongArch64CpuTimerLib
+  FILE_GUID = 740389C7-CC44-4A2F-88DC-89D97D312E7C
+  MODULE_TYPE   = BASE
+  VERSION_STRING= 1.0
+  LIBRARY_CLASS = TimerLib
+  MODULE_UNI_FILE   = BaseLoongArch64CpuTimerLib.uni
+
+[Sources.common]
+  CpuTimerLib.c
+
+[Packages]
+  MdePkg/MdePkg.dec
+  UefiCpuPkg/UefiCpuPkg.dec
+
+[LibraryClasses]
+  BaseLib
+  PcdLib
+  DebugLib
diff --git 
a/UefiCpuPkg/Library/BaseLoongArch64CpuTimerLib/BaseLoongArch64CpuTimerLib.uni 
b/UefiCpuPkg/Library/BaseLoongArch64CpuTimerLib/BaseLoongArch64CpuTimerLib.uni
new file mode 100644
index 00..72d38ec679
--- /dev/null
+++ 
b/UefiCpuPkg/Library/BaseLoongArch64CpuTimerLib/BaseLoongArch64CpuTimerLib.uni
@@ -0,0 +1,15 @@
+// /** @file
+// Base CPU Timer Library
+//
+// Provides base timer support using CPUCFG 0x4 and 0x5 stable counter 
frequency.
+//
+// Copyright (c) 2023, Loongson Technology Corporation Limited. All rights 
reserved.
+//
+// SPDX-License-Identifier: BSD-2-Clause-Patent
+//
+// **/
+
+
+#string STR_MODULE_ABSTRACT #language en-US "LOONGARCH CPU Timer 
Library"
+
+#string STR_MODULE_DESCRIPTION  #language en-US "Provides basic timer 
support using CPUCFG 0x4 and 0x5 stable counter frequency."
diff --git a/UefiCpuPkg/Library/BaseLoongArch64CpuTimerLib/CpuTimerLib.c 
b/UefiCpuPkg/Library/BaseLoongArch64CpuTimerLib/CpuTimerLib.c
new file mode 100644
index 00..349b881cbc
--- /dev/null
+++ b/UefiCpuPkg/Library/BaseLoongArch64CpuTimerLib/CpuTimerLib.c
@@ -0,0 +1,226 @@
+/** @file
+  CPUCFG 0x4 and 0x5 for Stable Counter frequency instance of Timer Library.
+
+  Copyright (c) 2023, Loongson Technology Corporation Limited. All rights 
reserved.
+
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+**/
+
+#include 
+#include 
+#include 
+#include 
+#include 
+
+/**
+  Calculate clock frequency using CPUCFG 0x4 and 0x5 registers.
+
+  @param  VOID.
+
+  @return The frequency in Hz.
+
+**/
+UINT32
+EFIAPI
+CalcConstFreq (
+  VOID
+  )
+{
+  UINT32 BaseFreq;
+  UINT32 ClockMultiplier;
+  UINT32 ClockDivide;
+  CPUCFG_REG4_INFO_DATA  CCFreq;
+  CPUCFG_REG5_INFO_DATA  CpucfgReg5Data;
+  UINT32 StableTimerFreq;
+
+  //
+  // Get the the crystal frequency corresponding to the constant
+  // frequency timer and the clock used by the timer.
+  //
+  AsmCpucfg (CPUCFG_REG4_INFO, );
+
+  //
+  // Get the multiplication factor and frequency division factor
+  // corresponding to the constant frequency timer and the clock
+  // used by the timer.
+  //
+  AsmCpucfg (CPUCFG_REG5_INFO, );
+
+  BaseFreq= CCFreq.Bits.CC_FREQ;
+  ClockMultiplier = CpucfgReg5Data.Bits.CC_MUL & 0xULL;
+  ClockDivide = CpucfgReg5Data.Bits.CC_DIV & 0xULL;
+
+  if (!BaseFreq || !ClockMultiplier || !ClockDivide) {
+DEBUG ((DEBUG_ERROR, "LoongArch Stable Timer is not available in the CPU, 
hence this library cannot be used.\n"));
+StableTimerFreq = 0;
+ASSERT (0);
+  } else {
+StableTimerFreq = (BaseFreq * ClockMultiplier / ClockDivide);
+  }
+
+  return StableTimerFreq;
+}
+
+/**
+  Stalls the CPU for at least the given number of microseconds.
+
+  Stalls the CPU for the number of microseconds specified by MicroSeconds.
+
+  @param  MicroSeconds  The minimum number of microseconds to delay.
+
+  @return MicroSeconds
+
+**/
+UINTN
+EFIAPI
+MicroSecondDelay (
+  IN UINTN

[edk2-devel] [PATCH v3 10/39] MdePkg: Add method of LoongArch64 to PeiServicesTablePointerLibReg

2023-11-17 Thread Chao Li

LoongArch uses the reigster LOONGARCH_CSR_KS0 in the PEI stage to set
and get the PEI service table pointer. Add this method to
PeiServiceTablePointerLibReg.

This is a code first phase, I will update the PI specification next.

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4584

Cc: Michael D Kinney 
Cc: Liming Gao 
Cc: Zhiguang Liu 
Cc: Leif Lindholm 
Cc: Ard Biesheuvel 
Cc: Sami Mujawar 
Cc: Laszlo Ersek 
Signed-off-by: Chao Li 
---
 .../LoongArch64/PeiServicesTablePointerReg.c  | 47 +++
 .../PeiServicesTablePointerLibReg.inf |  3 ++
 2 files changed, 50 insertions(+)
 create mode 100644 
MdePkg/Library/PeiServicesTablePointerLibReg/LoongArch64/PeiServicesTablePointerReg.c

diff --git 
a/MdePkg/Library/PeiServicesTablePointerLibReg/LoongArch64/PeiServicesTablePointerReg.c
 
b/MdePkg/Library/PeiServicesTablePointerLibReg/LoongArch64/PeiServicesTablePointerReg.c
new file mode 100644
index 00..368c907992
--- /dev/null
+++ 
b/MdePkg/Library/PeiServicesTablePointerLibReg/LoongArch64/PeiServicesTablePointerReg.c
@@ -0,0 +1,47 @@
+/** @file
+  PEI Services Table Pointer Library For LoongArch.
+
+  Used Register Mechanism.
+
+  Copyright (c) 2023 Loongson Technology Corporation Limited. All rights 
reserved.
+
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include 
+
+/**
+  Set the pointer PEI Service Table to a CPU register.
+
+  Caches the pointer to the PEI Services Table specified by 
PeiServicesTablePointer
+  in a platform specific manner.
+
+  @paramPeiServicesTablePointer   The address of PeiServices.
+**/
+VOID
+EFIAPI
+SetPeiServicesTablePointerToRegester (
+  IN UINTN  PeiServicesTablePointer
+  )
+{
+  CsrWrite (LOONGARCH_CSR_KS0, (UINTN)PeiServicesTablePointer);
+}
+
+/**
+  Retrieves the cached value of the PEI Services Table pointer from a CPU 
register.
+
+  Returns the cached value of the PEI Services Table pointer in a CPU specific 
manner
+  as specified in the CPU binding section of the Platform Initialization 
Pre-EFI
+  Initialization Core Interface Specification.
+
+  @return  The pointer to PeiServices.
+**/
+CONST EFI_PEI_SERVICES **
+EFIAPI
+GetPeiServicesTablePointerFromRegister (
+  VOID
+  )
+{
+  return (CONST EFI_PEI_SERVICES **)(CsrRead (LOONGARCH_CSR_KS0));
+}
diff --git 
a/MdePkg/Library/PeiServicesTablePointerLibReg/PeiServicesTablePointerLibReg.inf
 
b/MdePkg/Library/PeiServicesTablePointerLibReg/PeiServicesTablePointerLibReg.inf
index 22499e22ad..b26a970b12 100644
--- 
a/MdePkg/Library/PeiServicesTablePointerLibReg/PeiServicesTablePointerLibReg.inf
+++ 
b/MdePkg/Library/PeiServicesTablePointerLibReg/PeiServicesTablePointerLibReg.inf
@@ -30,6 +30,9 @@
 [Sources]
   PeiServicesTablePointer.c
 
+[Sources.LOONGARCH64]
+  LoongArch64/PeiServicesTablePointerReg.c
+
 [Packages]
   MdePkg/MdePkg.dec
 
-- 
2.27.0



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[edk2-devel] [PATCH v3 09/39] MdePkg: Add a new library named PeiServicesTablePointerLibReg

2023-11-17 Thread Chao Li

Since some ARCH or platform not require execute code on memory during
PEI phase, some values may transferred via CPU registers.

Adding PeiServcieTablePointerLibReg to allow set and get the PEI service
table pointer depend by a CPU register, this library can accommodate lot
of platforms who not require execte code on memory during PEI phase.

Adding PeiServiceTablePointerLibReg to allows setting and getting the
PEI service table pointer via CPU registers, and the library can
accommodate many platforms that do not need to execute code on memory
during the PEI phase.

The idea of this library is derived from
ArmPkg/Library/PeiServicesTablePointerLib/

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4584

Cc: Michael D Kinney 
Cc: Liming Gao 
Cc: Zhiguang Liu 
Cc: Leif Lindholm 
Cc: Ard Biesheuvel 
Cc: Sami Mujawar 
Cc: Laszlo Ersek 
Cc: Sunil V L 
Signed-off-by: Chao Li 
---
 .../Library/PeiServicesTablePointerLib.h  | 37 +++-
 .../PeiServicesTablePointer.c | 86 +++
 .../PeiServicesTablePointerLib.uni| 20 +
 .../PeiServicesTablePointerLibReg.inf | 40 +
 MdePkg/MdePkg.dsc |  1 +
 5 files changed, 180 insertions(+), 4 deletions(-)
 create mode 100644 
MdePkg/Library/PeiServicesTablePointerLibReg/PeiServicesTablePointer.c
 create mode 100644 
MdePkg/Library/PeiServicesTablePointerLibReg/PeiServicesTablePointerLib.uni
 create mode 100644 
MdePkg/Library/PeiServicesTablePointerLibReg/PeiServicesTablePointerLibReg.inf

diff --git a/MdePkg/Include/Library/PeiServicesTablePointerLib.h 
b/MdePkg/Include/Library/PeiServicesTablePointerLib.h
index 61635eff00..f5c764cb13 100644
--- a/MdePkg/Include/Library/PeiServicesTablePointerLib.h
+++ b/MdePkg/Include/Library/PeiServicesTablePointerLib.h
@@ -52,10 +52,11 @@ SetPeiServicesTablePointer (
   immediately preceding the Interrupt Descriptor Table (IDT) in memory.
   For X64 CPUs, the PEI Services Table pointer is stored in the 8 bytes
   immediately preceding the Interrupt Descriptor Table (IDT) in memory.
-  For Itanium and ARM CPUs, a the PEI Services Table Pointer is stored in
-  a dedicated CPU register.  This means that there is no memory storage
-  associated with storing the PEI Services Table pointer, so no additional
-  migration actions are required for Itanium or ARM CPUs.
+  For Itanium, ARM and LoongArch CPUs, a the PEI Services Table Pointer
+  is stored in a dedicated CPU register.  This means that there is no
+  memory storage associated with storing the PEI Services Table pointer,
+  so no additional migration actions are required for Itanium, ARM and
+  LoongArch CPUs.
 
 **/
 VOID
@@ -64,4 +65,32 @@ MigratePeiServicesTablePointer (
   VOID
   );
 
+/**
+  Retrieves the cached value of the PEI Services Table pointer from a CPU 
register.
+
+  Returns the cached value of the PEI Services Table pointer in a CPU specific 
manner
+  as specified in the CPU binding section of the Platform Initialization 
Pre-EFI
+  Initialization Core Interface Specification.
+
+  @return  The pointer to PeiServices.
+**/
+CONST EFI_PEI_SERVICES **
+EFIAPI
+GetPeiServicesTablePointerFromRegister (
+  VOID
+  );
+
+/**
+  Set the pointer PEI Service Table to a CPU register.
+
+  Caches the pointer to the PEI Services Table specified by 
PeiServicesTablePointer
+  in a platform specific manner.
+
+  @paramPeiServicesTablePointer   The address of PeiServices.
+**/
+VOID
+EFIAPI
+SetPeiServicesTablePointerToRegester (
+  IN UINTN  PeiServicesTablePointer
+  );
 #endif
diff --git 
a/MdePkg/Library/PeiServicesTablePointerLibReg/PeiServicesTablePointer.c 
b/MdePkg/Library/PeiServicesTablePointerLibReg/PeiServicesTablePointer.c
new file mode 100644
index 00..0227f98871
--- /dev/null
+++ b/MdePkg/Library/PeiServicesTablePointerLibReg/PeiServicesTablePointer.c
@@ -0,0 +1,86 @@
+/** @file
+  PEI Services Table Pointer Library For Reigseter Mechanism.
+
+  This library is used for PEIM which does executed from flash device directly 
but
+  executed in memory.
+
+  Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.
+  Copyright (c) 2011 Hewlett-Packard Corporation. All rights reserved.
+  Copyright (c) 2023 Loongson Technology Corporation Limited. All rights 
reserved.
+
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include 
+#include 
+#include 
+
+/**
+  Caches a pointer PEI Services Table.
+
+  Caches the pointer to the PEI Services Table specified by 
PeiServicesTablePointer
+  in a platform specific manner.
+
+  If PeiServicesTablePointer is NULL, then ASSERT().
+
+  @paramPeiServicesTablePointer   The address of PeiServices pointer.
+**/
+VOID
+EFIAPI
+SetPeiServicesTablePointer (
+  IN CONST EFI_PEI_SERVICES  **PeiServicesTablePointer
+  )
+{
+  ASSERT (PeiServicesTablePointer != NULL);
+  SetPeiServicesTablePointerToRegester ((UINTN)PeiServicesTablePointer);
+}
+
+/**
+  Retrieves the cached value of the PEI Services Table pointer.
+

[edk2-devel] [PATCH v3 08/39] MdePkg: Add IOCSR operation for LoongArch

2023-11-17 Thread Chao Li

Add IoCsrRead8, IoCsrRead16, IoCsrRead32, IoCsrRead64, IoCsrWrite8,
IoCsrWrite16, IoCsrWrite32, IoCsrWrite64 to operate the IOCSR registers
of LoongArch architecture.

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4584

Cc: Michael D Kinney 
Cc: Liming Gao 
Cc: Zhiguang Liu 
Signed-off-by: Chao Li 
Acked-by: Michael D Kinney 
---
 MdePkg/Include/Library/BaseLib.h   | 112 +++
 MdePkg/Library/BaseLib/BaseLib.inf |   1 +
 MdePkg/Library/BaseLib/LoongArch64/IoCsr.S | 120 +
 3 files changed, 233 insertions(+)
 create mode 100644 MdePkg/Library/BaseLib/LoongArch64/IoCsr.S

diff --git a/MdePkg/Include/Library/BaseLib.h b/MdePkg/Include/Library/BaseLib.h
index 234f3065c2..88ee6e9d51 100644
--- a/MdePkg/Include/Library/BaseLib.h
+++ b/MdePkg/Include/Library/BaseLib.h
@@ -338,6 +338,118 @@ CsrXChg (
   IN UINTN   Mask
   );
 
+/**
+  IO CSR read byte operation.
+
+  @param[in]  Select   IO CSR read instruction select values.
+
+  @return The return value of iocsrrd.b instruction.
+
+**/
+UINT8
+IoCsrRead8 (
+  IN UINTN  Select
+  );
+
+/**
+  IO CSR read half word operation.
+
+  @param[in]  Select   IO CSR read instruction select values.
+
+  @return The return value of iocsrrd.h instruction.
+
+**/
+UINT16
+IoCsrRead16 (
+  IN UINTN  Select
+  );
+
+/**
+  IO CSR read word operation.
+
+  @param[in]  Select   IO CSR read instruction select values.
+
+  @return The return value of iocsrrd.w instruction.
+
+**/
+UINT32
+IoCsrRead32 (
+  IN UINTN  Select
+  );
+
+/**
+  IO CSR read double word operation. Only for LoongArch64.
+
+  @param[in]  Select   IO CSR read instruction select values.
+
+  @return The return value of iocsrrd.d instruction.
+
+**/
+UINT64
+IoCsrRead64 (
+  IN UINTN  Select
+  );
+
+/**
+  IO CSR write byte operation.
+
+  @param[in]  Select   IO CSR write instruction select values.
+  @param[in]  ValueThe iocsrwr.b will write the value.
+
+  @return VOID.
+
+**/
+VOID
+IoCsrWrite8 (
+  IN UINTN  Select,
+  IN UINT8  Value
+  );
+
+/**
+  IO CSR write half word operation.
+
+  @param[in]  Select   IO CSR write instruction select values.
+  @param[in]  ValueThe iocsrwr.h will write the value.
+
+  @return VOID.
+
+**/
+VOID
+IoCsrWrite16 (
+  IN UINTN   Select,
+  IN UINT16  Value
+  );
+
+/**
+  IO CSR write word operation.
+
+  @param[in]  Select   IO CSR write instruction select values.
+  @param[in]  ValueThe iocsrwr.w will write the value.
+
+  @return VOID.
+
+**/
+VOID
+IoCsrWrite32 (
+  IN UINTN   Select,
+  IN UINT32  Value
+  );
+
+/**
+  IO CSR write double word operation. Only for LoongArch64.
+
+  @param[in]  Select   IO CSR write instruction select values.
+  @param[in]  ValueThe iocsrwr.d will write the value.
+
+  @return VOID.
+
+**/
+VOID
+IoCsrWrite64 (
+  IN UINTN   Select,
+  IN UINT64  Value
+  );
+
 #endif // defined (MDE_CPU_LOONGARCH64)
 
 //
diff --git a/MdePkg/Library/BaseLib/BaseLib.inf 
b/MdePkg/Library/BaseLib/BaseLib.inf
index 74a323c798..e72724c1c1 100644
--- a/MdePkg/Library/BaseLib/BaseLib.inf
+++ b/MdePkg/Library/BaseLib/BaseLib.inf
@@ -412,6 +412,7 @@
   LoongArch64/Csr.c
   LoongArch64/InternalSwitchStack.c
   LoongArch64/AsmCsr.S  | GCC
+  LoongArch64/IoCsr.S   | GCC
   LoongArch64/GetInterruptState.S   | GCC
   LoongArch64/EnableInterrupts.S| GCC
   LoongArch64/DisableInterrupts.S   | GCC
diff --git a/MdePkg/Library/BaseLib/LoongArch64/IoCsr.S 
b/MdePkg/Library/BaseLib/LoongArch64/IoCsr.S
new file mode 100644
index 00..4c0009b93a
--- /dev/null
+++ b/MdePkg/Library/BaseLib/LoongArch64/IoCsr.S
@@ -0,0 +1,120 @@
+#--
+#
+# LoongArch ASM IO CSR operation functions
+#
+# Copyright (c) 2023, Loongson Technology Corporation Limited. All rights 
reserved.
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+#--
+
+ASM_GLOBAL ASM_PFX (IoCsrRead8)
+ASM_GLOBAL ASM_PFX (IoCsrRead16)
+ASM_GLOBAL ASM_PFX (IoCsrRead32)
+ASM_GLOBAL ASM_PFX (IoCsrRead64)
+
+ASM_GLOBAL ASM_PFX (IoCsrWrite8)
+ASM_GLOBAL ASM_PFX (IoCsrWrite16)
+ASM_GLOBAL ASM_PFX (IoCsrWrite32)
+ASM_GLOBAL ASM_PFX (IoCsrWrite64)
+
+#/**
+#  IO CSR read byte operation.
+#
+#  @param[in]  Select   IO CSR read instruction select values.
+#
+#  @return The return value of iocsrrd.b instruction.
+#
+#**/
+ASM_PFX (IoCsrRead8):
+  iocsrrd.b   $a0, $a0
+  jirl$zero, $ra, 0
+
+#/**
+#  IO CSR read half word operation.
+#
+#  @param[in]  Select   IO CSR read instruction select values.
+#
+#  @return The return value of iocsrrd.h instruction.
+#
+#**/
+ASM_PFX (IoCsrRead16):
+  iocsrrd.h   $a0, $a0
+  jirl$zero, $ra, 0
+
+#/**
+#  IO CSR read word operation.
+#
+#  @param[in]  Select   IO CSR read instruction select values.
+#
+#  @return The return value of iocsrrd.w instruction.
+#
+#**/
+ASM_PFX

[edk2-devel] [PATCH v3 07/39] MdePkg: Add CSR operation for LoongArch

2023-11-17 Thread Chao Li

Add CsrRead, CsrWrite and CsrXChg functions for LoongArch, and use them
to operate the CSR register of LoongArch architecture.

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4584

Cc: Michael D Kinney 
Cc: Liming Gao 
Cc: Zhiguang Liu 
Signed-off-by: Chao Li 
Co-authored-by: Bibo Mao 
Acked-by: Michael D Kinney 
---
 MdePkg/Include/Library/BaseLib.h|  45 +++
 MdePkg/Library/BaseLib/BaseLib.inf  |   2 +
 MdePkg/Library/BaseLib/LoongArch64/AsmCsr.S | 422 
 MdePkg/Library/BaseLib/LoongArch64/Csr.c|  81 
 4 files changed, 550 insertions(+)
 create mode 100644 MdePkg/Library/BaseLib/LoongArch64/AsmCsr.S
 create mode 100644 MdePkg/Library/BaseLib/LoongArch64/Csr.c

diff --git a/MdePkg/Include/Library/BaseLib.h b/MdePkg/Include/Library/BaseLib.h
index 55d53c75a0..234f3065c2 100644
--- a/MdePkg/Include/Library/BaseLib.h
+++ b/MdePkg/Include/Library/BaseLib.h
@@ -293,6 +293,51 @@ AsmReadStableCounter (
   VOID
   );
 
+/**
+  CSR read operation.
+
+  @param[in]  Select   CSR read instruction select values.
+
+  @return The return value of csrrd instruction, return -1 means no CSR 
instruction
+  is found.
+**/
+UINTN
+CsrRead (
+  IN UINT16  Select
+  );
+
+/**
+  CSR write operation.
+
+  @param[in]  Select   CSR write instruction select values.
+  @param[in]  ValueThe csrwr will write the value.
+
+  @return The return value of csrwr instruction, that is, store the old 
value of
+  the register, return -1 means no CSR instruction is found.
+**/
+UINTN
+CsrWrite (
+  IN UINT16  Select,
+  IN UINTN   Value
+  );
+
+/**
+  CSR exchange operation.
+
+  @param[in]  Select   CSR exchange instruction select values.
+  @param[in]  ValueThe csrxchg will write the value.
+  @param[in]  Mask The csrxchg mask value.
+
+  @return The return value of csrxchg instruction, that is, store the old 
value of
+  the register, return -1 means no CSR instruction is found.
+**/
+UINTN
+CsrXChg (
+  IN UINT16  Select,
+  IN UINTN   Value,
+  IN UINTN   Mask
+  );
+
 #endif // defined (MDE_CPU_LOONGARCH64)
 
 //
diff --git a/MdePkg/Library/BaseLib/BaseLib.inf 
b/MdePkg/Library/BaseLib/BaseLib.inf
index aaf221822b..74a323c798 100644
--- a/MdePkg/Library/BaseLib/BaseLib.inf
+++ b/MdePkg/Library/BaseLib/BaseLib.inf
@@ -409,7 +409,9 @@
 [Sources.LOONGARCH64]
   Math64.c
   Unaligned.c
+  LoongArch64/Csr.c
   LoongArch64/InternalSwitchStack.c
+  LoongArch64/AsmCsr.S  | GCC
   LoongArch64/GetInterruptState.S   | GCC
   LoongArch64/EnableInterrupts.S| GCC
   LoongArch64/DisableInterrupts.S   | GCC
diff --git a/MdePkg/Library/BaseLib/LoongArch64/AsmCsr.S 
b/MdePkg/Library/BaseLib/LoongArch64/AsmCsr.S
new file mode 100644
index 00..25dd060ede
--- /dev/null
+++ b/MdePkg/Library/BaseLib/LoongArch64/AsmCsr.S
@@ -0,0 +1,422 @@
+#--
+#
+# LoongArch ASM CSR operation functions
+#
+# Copyright (c) 2023, Loongson Technology Corporation Limited. All rights 
reserved.
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+#--
+
+#include 
+
+ASM_GLOBAL ASM_PFX (AsmCsrRead)
+ASM_GLOBAL ASM_PFX (AsmCsrWrite)
+ASM_GLOBAL ASM_PFX (AsmCsrXChg)
+
+.macro AsmCsrRd Sel
+  csrrd   $a0, \Sel
+  jirl$zero, $ra, 0
+.endm
+
+.macro AsmCsrWr Sel
+  csrwr   $a0, \Sel
+  jirl$zero, $ra, 0
+.endm
+
+.macro AsmCsrXChange Sel
+  csrxchg $a0, $a1, \Sel
+  jirl$zero, $ra, 0
+.endm
+
+ASM_PFX(AsmCsrRead):
+  blt  $a0, $zero, ReadSelNumErr
+  li.w $t0, LOONGARCH_CSR_EBASE
+  bltu $t0, $a0, TlbCsrRd
+
+BasicCsrRd:
+  la.pcrel $t0, BasicCsrRead
+  alsl.d   $t0, $a0, $t0, 3
+  jirl $zero, $t0, 0
+
+TlbCsrRd:
+  li.w $t0, LOONGARCH_CSR_TLBIDX
+  bltu $a0, $t0, ReadSelNumErr 
+  li.w $t0, LOONGARCH_CSR_RVACFG
+  bltu $t0, $a0, CfgCsrRd
+  la.pcrel $t0, TlbCsrRead
+  addi.w   $t1, $a0, -LOONGARCH_CSR_TLBIDX
+  alsl.d   $t0, $t1, $t0, 3
+  jirl $zero, $t0, 0
+
+CfgCsrRd:
+  li.w $t0, LOONGARCH_CSR_CPUNUM
+  bltu $a0, $t0, ReadSelNumErr 
+  li.w $t0, LOONGARCH_CSR_PRCFG3
+  bltu $t0, $a0, KcsCsrRd
+  la.pcrel $t0, CfgCsrRead
+  addi.w   $t1, $a0, -LOONGARCH_CSR_CPUNUM
+  alsl.d   $t0, $t1, $t0, 3
+  jirl $zero, $t0, 0
+
+KcsCsrRd:
+  li.w $t0, LOONGARCH_CSR_KS0
+  bltu $a0, $t0, ReadSelNumErr 
+  li.w $t0, LOONGARCH_CSR_KS8
+  bltu $t0, $a0, StableTimerCsrRd
+  la.pcrel $t0, KcsCsrRead
+  addi.w   $t1, $a0, -LOONGARCH_CSR_KS0
+  alsl.d   $t0, $t1, $t0, 3
+  jirl $zero, $t0, 0
+
+StableTimerCsrRd:
+  li.w $t0, LOONGARCH_CSR_TMID
+  bltu $a0, $t0, ReadSelNumErr 
+  li.w $t0, LOONGARCH_CSR_TINTCLR
+  bltu $t0, $a0, TlbRefillCsrRd
+  la.pcrel $t0, StableTimerCsrRead
+  addi.w   $t1, $a0, -LOONGARCH_CSR_TMID
+  alsl.d   $t0, $t1, $t0, 3
+  jirl $zero, $t0, 0
+
+TlbRefillCsrRd:
+  li.w $t0,

[edk2-devel] [PATCH v3 06/39] MdePkg: Add read stable counter operation for LoongArch

2023-11-17 Thread Chao Li

Add LoongArch gets stable counter ASM function.

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4584

Cc: Michael D Kinney 
Cc: Liming Gao 
Cc: Zhiguang Liu 
Signed-off-by: Chao Li 
Acked-by: Michael D Kinney 
---
 MdePkg/Include/Library/BaseLib.h  | 12 ++
 MdePkg/Library/BaseLib/BaseLib.inf|  1 +
 .../BaseLib/LoongArch64/ReadStableCounter.S   | 24 +++
 3 files changed, 37 insertions(+)
 create mode 100644 MdePkg/Library/BaseLib/LoongArch64/ReadStableCounter.S

diff --git a/MdePkg/Include/Library/BaseLib.h b/MdePkg/Include/Library/BaseLib.h
index 3adf4d0042..55d53c75a0 100644
--- a/MdePkg/Include/Library/BaseLib.h
+++ b/MdePkg/Include/Library/BaseLib.h
@@ -281,6 +281,18 @@ AsmCpucfg (
   OUT UINT32  *Data
   );
 
+/**
+  Gets the timer count value.
+
+  @param[] VOID
+  @retval  timer count value.
+
+**/
+UINTN
+AsmReadStableCounter (
+  VOID
+  );
+
 #endif // defined (MDE_CPU_LOONGARCH64)
 
 //
diff --git a/MdePkg/Library/BaseLib/BaseLib.inf 
b/MdePkg/Library/BaseLib/BaseLib.inf
index a427aa9359..aaf221822b 100644
--- a/MdePkg/Library/BaseLib/BaseLib.inf
+++ b/MdePkg/Library/BaseLib/BaseLib.inf
@@ -421,6 +421,7 @@
   LoongArch64/SwitchStack.S | GCC
   LoongArch64/ExceptionBase.S   | GCC
   LoongArch64/Cpucfg.S  | GCC
+  LoongArch64/ReadStableCounter.S   | GCC
 
 [Packages]
   MdePkg/MdePkg.dec
diff --git a/MdePkg/Library/BaseLib/LoongArch64/ReadStableCounter.S 
b/MdePkg/Library/BaseLib/LoongArch64/ReadStableCounter.S
new file mode 100644
index 00..59c877211d
--- /dev/null
+++ b/MdePkg/Library/BaseLib/LoongArch64/ReadStableCounter.S
@@ -0,0 +1,24 @@
+#--
+#
+# LoongArch Read Stable Counter
+#
+# Copyright (c) 2023, Loongson Technology Corporation Limited. All rights 
reserved.
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+#--
+
+ASM_GLOBAL ASM_PFX(AsmReadStableCounter)
+
+#/**
+#  Gets the timer count value.
+#
+#  @param[] VOID
+#  @retval  timer count value.
+#
+#**/
+
+ASM_PFX(AsmReadStableCounter):
+  rdtime.d   $a0, $zero
+  jirl   $zero, $ra, 0
+  .end
-- 
2.27.0



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[edk2-devel] [PATCH v3 05/39] MdePkg: Add LoongArch Cpucfg function

2023-11-17 Thread Chao Li

Add LoongArch AsmCpucfg function and Cpucfg definitions.

Also added Include/Register/LoongArch64/Cpucfg.h to IgnoreFiles of
EccCheck.

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4584

Cc: Michael D Kinney 
Cc: Liming Gao 
Cc: Zhiguang Liu 
Signed-off-by: Chao Li 
Acked-by: Michael D Kinney 
---
 MdePkg/Include/Library/BaseLib.h |  12 +
 MdePkg/Include/Register/LoongArch64/Cpucfg.h | 565 +++
 MdePkg/Library/BaseLib/BaseLib.inf   |   1 +
 MdePkg/Library/BaseLib/LoongArch64/Cpucfg.S  |  26 +
 MdePkg/MdePkg.ci.yaml|   3 +-
 5 files changed, 606 insertions(+), 1 deletion(-)
 create mode 100644 MdePkg/Include/Register/LoongArch64/Cpucfg.h
 create mode 100644 MdePkg/Library/BaseLib/LoongArch64/Cpucfg.S

diff --git a/MdePkg/Include/Library/BaseLib.h b/MdePkg/Include/Library/BaseLib.h
index 93a014cd49..3adf4d0042 100644
--- a/MdePkg/Include/Library/BaseLib.h
+++ b/MdePkg/Include/Library/BaseLib.h
@@ -269,6 +269,18 @@ DisableLocalInterrupts (
   IN UINT16
   );
 
+/**
+  Read CPUCFG register.
+
+  @param  Index  Specifies the register number of the CPUCFG to read the data.
+  @param  Data   A pointer to the variable used to store the CPUCFG register 
value.
+**/
+VOID
+AsmCpucfg (
+  IN  UINT32  Index,
+  OUT UINT32  *Data
+  );
+
 #endif // defined (MDE_CPU_LOONGARCH64)
 
 //
diff --git a/MdePkg/Include/Register/LoongArch64/Cpucfg.h 
b/MdePkg/Include/Register/LoongArch64/Cpucfg.h
new file mode 100644
index 00..841885dc70
--- /dev/null
+++ b/MdePkg/Include/Register/LoongArch64/Cpucfg.h
@@ -0,0 +1,565 @@
+/** @file
+  CPUCFG definitions.
+
+  Copyright (c) 2023, Loongson Technology Corporation Limited. All rights 
reserved.
+
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+**/
+
+#ifndef CPUCFG_H_
+#define CPUCFG_H_
+
+/**
+  CPUCFG REG0 Information
+
+  @code
+  CPUCFG_REG0_INFO_DATA
+ **/
+#define CPUCFG_REG0_INFO  0x0
+
+/**
+  CPUCFG REG0 Information returned data.
+  #CPUCFG_REG0_INFO
+ **/
+typedef union {
+  struct {
+///
+/// [Bit 31:0] Processor Identity.
+///
+UINT32PRID : 32;
+  } Bits;
+  ///
+  /// All bit fields as a 32-bit value
+  ///
+  UINT32Uint32;
+} CPUCFG_REG0_INFO_DATA;
+
+/**
+  CPUCFG REG1 Information
+
+  @code
+  CPUCFG_REG1_INFO_DATA
+ **/
+#define CPUCFG_REG1_INFO  0x1
+
+/**
+  CPUCFG REG1 Information returned data.
+  #CPUCFG_REG1_INFO
+ **/
+typedef union {
+  struct {
+///
+/// [Bit 1:0] Architecture:
+///   2'b00 indicates the implementation of simplified 
LoongAarch32;
+///   2'b01 indicates the implementation of LoongAarch32;
+///   2'b10 indicates the implementation of LoongAarch64;
+///   2'b11 reserved;
+///
+UINT32ARCH  : 2;
+///
+/// [Bit 2] Paging mapping mode. A value of 1 indicates the processor MMU 
supports
+/// page mapping mode.
+///
+UINT32PGMMU : 1;
+///
+/// [Bit 3] A value of 1 indicates the processor supports the IOCSR 
instruction.
+///
+UINT32IOCSR : 1;
+///
+/// [Bit 11:4] Physical address bits. The supported physical address bits 
PALEN value
+/// minus 1.
+///
+UINT32PALEN : 8;
+///
+/// [Bit 19:12] Virtual address bits. The supported virtual address bits 
VALEN value
+/// minus 1.
+///
+UINT32VALEN : 8;
+///
+/// [Bit 20] Non-aligned Memory Access. A value of 1 indicates the 
processor supports
+/// non-aligned memory access.
+///
+UINT32UAL   : 1;
+///
+/// [Bit 21] Page Read Inhibit. A value of 1 indicates the processor 
supports page
+/// attribute of "Read Inhibit".
+///
+UINT32RI: 1;
+///
+/// [Bit 22] Page Execution Protection. A value of 1 indicates the 
processor supports
+/// page attribute of "Execution Protection".
+///
+UINT32EP: 1;
+///
+/// [Bit 23] A value of 1 indicates the processor supports for page 
attributes of RPLV.
+///
+UINT32RPLV  : 1;
+///
+/// [Bit 24] Huge Page. A value of 1 indicates the processor supports page 
attribute
+/// of huge page.
+///
+UINT32HP: 1;
+///
+/// [Bit 25] A value of 1 indicates that the string of processor product 
information
+/// is recorded at address 0 of the IOCSR access space.
+///
+UINT32IOCSR_BRD : 1;
+///
+/// [Bit 26] A value of 1 indicates that the external interrupt uses the 
message
+/// interrupt mode, otherwise it is the level interrupt line mode.
+///
+UINT32MSG_INT   : 1;
+///
+/// [Bit 31:27] Reserved.
+///
+UINT32Reserved  : 5;
+  } Bits;
+  ///
+  /// All bit fields as a 32-bit value
+  ///
+  UINT32Uint32;
+} CPUCFG_REG1_INFO_DATA;
+
+/**
+  CPUCFG REG2 Information
+
+  @code
+  CPUCFG_REG2_INFO_DATA
+ **/
+#define CPUCFG_REG2_INFO  0x2
+
+/**
+  CPUCFG REG2 Information returned data.
+

[edk2-devel] [PATCH v3 04/39] MdePkg: Add LoongArch64 local interrupt function set into BaseLib

2023-11-17 Thread Chao Li

Adding LoongArch local interrupt function set, which is used to control
the opening or closing of the local interrupt when the global interrupt
is enabled.

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4584

Cc: Michael D Kinney 
Cc: Liming Gao 
Cc: Zhiguang Liu 
Signed-off-by: Chao Li 
Acked-by: Michael D Kinney 
---
 MdePkg/Include/Library/BaseLib.h  | 20 +
 .../BaseLib/LoongArch64/DisableInterrupts.S   | 22 ++-
 .../BaseLib/LoongArch64/EnableInterrupts.S| 22 ++-
 3 files changed, 54 insertions(+), 10 deletions(-)

diff --git a/MdePkg/Include/Library/BaseLib.h b/MdePkg/Include/Library/BaseLib.h
index a9a69c734c..93a014cd49 100644
--- a/MdePkg/Include/Library/BaseLib.h
+++ b/MdePkg/Include/Library/BaseLib.h
@@ -249,6 +249,26 @@ SetTlbRebaseAddress (
   IN UINT64
   );
 
+/**
+  Enables local CPU interrupts.
+
+  @param  Needs to enable local interrupt bit.
+**/
+VOID
+EnableLocalInterrupts (
+  IN UINT16
+  );
+
+/**
+  Disables local CPU interrupts.
+
+  @param  Needs to disable local interrupt bit.
+**/
+VOID
+DisableLocalInterrupts (
+  IN UINT16
+  );
+
 #endif // defined (MDE_CPU_LOONGARCH64)
 
 //
diff --git a/MdePkg/Library/BaseLib/LoongArch64/DisableInterrupts.S 
b/MdePkg/Library/BaseLib/LoongArch64/DisableInterrupts.S
index 0f228339af..5de10e9e7a 100644
--- a/MdePkg/Library/BaseLib/LoongArch64/DisableInterrupts.S
+++ b/MdePkg/Library/BaseLib/LoongArch64/DisableInterrupts.S
@@ -1,21 +1,33 @@
 #--
 #
-# LoongArch interrupt disable
+# LoongArch interrupt disable operations
 #
-# Copyright (c) 2022, Loongson Technology Corporation Limited. All rights 
reserved.
+# Copyright (c) 2023, Loongson Technology Corporation Limited. All rights 
reserved.
 #
 # SPDX-License-Identifier: BSD-2-Clause-Patent
 #
 #--
 
+#include 
+#include 
+
+ASM_GLOBAL ASM_PFX(DisableLocalInterrupts)
 ASM_GLOBAL ASM_PFX(DisableInterrupts)
 
 #/**
-#  Disables CPU interrupts.
+#  Disables local CPU interrupts.
+#
+#  @param  Needs to disable local interrupt bit.
 #**/
+ASM_PFX(DisableLocalInterrupts):
+  csrxchg $zero, $a0, LOONGARCH_CSR_ECFG
+  jirl$zero, $ra, 0
 
+#/**
+#  Disables global CPU interrupts.
+#**/
 ASM_PFX(DisableInterrupts):
-  li.w$t0, 0x4
-  csrxchg $zero, $t0, 0x0
+  li.w$t0, BIT2
+  csrxchg $zero, $t0, LOONGARCH_CSR_CRMD
   jirl$zero, $ra, 0
   .end
diff --git a/MdePkg/Library/BaseLib/LoongArch64/EnableInterrupts.S 
b/MdePkg/Library/BaseLib/LoongArch64/EnableInterrupts.S
index 3c34fb2cdd..73adcd7b0c 100644
--- a/MdePkg/Library/BaseLib/LoongArch64/EnableInterrupts.S
+++ b/MdePkg/Library/BaseLib/LoongArch64/EnableInterrupts.S
@@ -1,21 +1,33 @@
 #--
 #
-# LoongArch interrupt enable
+# LoongArch interrupt enable operations
 #
-# Copyright (c) 2022, Loongson Technology Corporation Limited. All rights 
reserved.
+# Copyright (c) 2023, Loongson Technology Corporation Limited. All rights 
reserved.
 #
 # SPDX-License-Identifier: BSD-2-Clause-Patent
 #
 #--
 
+#include 
+#include 
+
+ASM_GLOBAL ASM_PFX(EnableLocalInterrupts)
 ASM_GLOBAL ASM_PFX(EnableInterrupts)
 
 #/**
-#  Enables CPU interrupts.
+#  Enables local CPU interrupts.
+#
+#  @param  Needs to enable local interrupt bit.
 #**/
+ASM_PFX(EnableLocalInterrupts):
+  csrxchg $a0, $a0, LOONGARCH_CSR_ECFG
+  jirl$zero, $ra, 0
 
+#/**
+#  Enables global CPU interrupts.
+#**/
 ASM_PFX(EnableInterrupts):
-  li.w$t0, 0x4
-  csrxchg $t0, $t0, 0x0
+  li.w$t0, BIT2
+  csrxchg $t0, $t0, LOONGARCH_CSR_CRMD
   jirl$zero, $ra, 0
   .end
-- 
2.27.0



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[edk2-devel] [PATCH v3 03/39] MdePkg: Add LoongArch64 exception function set into BaseLib

2023-11-17 Thread Chao Li

Adding SetExceptionBaseAddress and SetTlbRebaseAddress functions
for LoongArch64.

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4584

Cc: Michael D Kinney 
Cc: Liming Gao 
Cc: Zhiguang Liu 
Signed-off-by: Chao Li 
Acked-by: Michael D Kinney 
---
 MdePkg/Include/Library/BaseLib.h  | 20 +
 MdePkg/Library/BaseLib/BaseLib.inf|  1 +
 .../BaseLib/LoongArch64/ExceptionBase.S   | 41 +++
 3 files changed, 62 insertions(+)
 create mode 100644 MdePkg/Library/BaseLib/LoongArch64/ExceptionBase.S

diff --git a/MdePkg/Include/Library/BaseLib.h b/MdePkg/Include/Library/BaseLib.h
index 5d7067ee85..a9a69c734c 100644
--- a/MdePkg/Include/Library/BaseLib.h
+++ b/MdePkg/Include/Library/BaseLib.h
@@ -229,6 +229,26 @@ typedef struct {
 
 #define BASE_LIBRARY_JUMP_BUFFER_ALIGNMENT  8
 
+/*
+ * Set the exception base address for LoongArch.
+ *
+ * @param  ExceptionBaseAddress   The exception base address, must be aligned 
greater than or qeual to 4K .
+ */
+VOID
+SetExceptionBaseAddress (
+  IN UINT64
+  );
+
+/*
+ * Set the TlbRebase address for LoongArch.
+ *
+ * @param  TlbRebaseAddress   The TlbRebase address, must be aligned greater 
than or qeual to 4K .
+ */
+VOID
+SetTlbRebaseAddress (
+  IN UINT64
+  );
+
 #endif // defined (MDE_CPU_LOONGARCH64)
 
 //
diff --git a/MdePkg/Library/BaseLib/BaseLib.inf 
b/MdePkg/Library/BaseLib/BaseLib.inf
index 03c7b02e82..a18fe5efb4 100644
--- a/MdePkg/Library/BaseLib/BaseLib.inf
+++ b/MdePkg/Library/BaseLib/BaseLib.inf
@@ -419,6 +419,7 @@
   LoongArch64/CpuPause.S| GCC
   LoongArch64/SetJumpLongJump.S | GCC
   LoongArch64/SwitchStack.S | GCC
+  LoongArch64/ExceptionBase.S   | GCC
 
 [Packages]
   MdePkg/MdePkg.dec
diff --git a/MdePkg/Library/BaseLib/LoongArch64/ExceptionBase.S 
b/MdePkg/Library/BaseLib/LoongArch64/ExceptionBase.S
new file mode 100644
index 00..36c6ca7ca8
--- /dev/null
+++ b/MdePkg/Library/BaseLib/LoongArch64/ExceptionBase.S
@@ -0,0 +1,41 @@
+#--
+#
+# LoongArch set exception base address operations
+#
+# Copyright (c) 2023, Loongson Technology Corporation Limited. All rights 
reserved.
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+#--
+
+#include 
+#include 
+
+ASM_GLOBAL ASM_PFX(SetExceptionBaseAddress)
+ASM_GLOBAL ASM_PFX(SetTlbRebaseAddress)
+
+#/**
+#  Set the exception base address for LoongArch.
+#
+#  @param  ExceptionBaseAddress   The exception base address, must be aligned 
greater than or qeual to 4K .
+#**/
+ASM_PFX(SetExceptionBaseAddress):
+  csrrd   $t0, LOONGARCH_CSR_ECFG
+  li.d$t1, ~(BIT16 | BIT17 | BIT18)
+  and $t0, $t0, $t1
+  csrwr   $t0, LOONGARCH_CSR_ECFG
+
+  move$t0, $a0
+  csrwr   $t0, LOONGARCH_CSR_EBASE
+  jirl$zero, $ra, 0
+
+#/**
+#  Set the TlbRebase address for LoongArch.
+#
+#  @param  TlbRebaseAddress   The TlbRebase address, must be aligned greater 
than or qeual to 4K .
+#**/
+ASM_PFX(SetTlbRebaseAddress):
+  move$t0, $a0
+  csrwr   $t0, LOONGARCH_CSR_TLBREBASE
+  jirl$zero, $ra, 0
+.end
-- 
2.27.0



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[edk2-devel] [PATCH v3 02/39] MdePkg: Add LoongArch64 FPU function set into BaseCpuLib

2023-11-17 Thread Chao Li

Adding InitializeFloatingPointUnits, EnableFloatingPointUnits and
DisableFloatingPointUnits functions for LoongArch64.

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4584

Cc: Michael D Kinney 
Cc: Liming Gao 
Cc: Zhiguang Liu 
Signed-off-by: Chao Li 
Acked-by: Michael D Kinney 
---
 MdePkg/Include/Library/CpuLib.h   | 37 +++---
 MdePkg/Library/BaseCpuLib/BaseCpuLib.inf  |  7 ++-
 .../Library/BaseCpuLib/LoongArch/DisableFpu.S | 17 +++
 .../Library/BaseCpuLib/LoongArch/EnableFpu.S  | 17 +++
 .../BaseCpuLib/LoongArch/InitializeFpu.S  | 51 +++
 5 files changed, 121 insertions(+), 8 deletions(-)
 create mode 100644 MdePkg/Library/BaseCpuLib/LoongArch/DisableFpu.S
 create mode 100644 MdePkg/Library/BaseCpuLib/LoongArch/EnableFpu.S
 create mode 100644 MdePkg/Library/BaseCpuLib/LoongArch/InitializeFpu.S

diff --git a/MdePkg/Include/Library/CpuLib.h b/MdePkg/Include/Library/CpuLib.h
index 3f29937dc7..42da55ca69 100644
--- a/MdePkg/Include/Library/CpuLib.h
+++ b/MdePkg/Include/Library/CpuLib.h
@@ -8,6 +8,7 @@
   As a result, these services could not be defined in the Base Library.
 
 Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.
+Copyright (c) 2023, Loongson Technology Corporation Limited. All rights 
reserved.
 SPDX-License-Identifier: BSD-2-Clause-Patent
 
 **/
@@ -41,14 +42,14 @@ CpuFlushTlb (
   VOID
   );
 
-#if defined (MDE_CPU_IA32) || defined (MDE_CPU_X64)
-
 /**
+  Initialize the CPU floating point units.
+
   Initializes floating point units for requirement of UEFI specification.
-  This function initializes floating-point control word to 0x027F (all 
exceptions
-  masked,double-precision, round-to-nearest) and multimedia-extensions control 
word
-  (if supported) to 0x1F80 (all exceptions masked, round-to-nearest, flush to 
zero
-  for masked underflow).
+  For IA32 and X64, this function initializes floating-point control word to 
0x027F
+  (all exceptions masked,double-precision, round-to-nearest) and 
multimedia-extensions
+  control word (if supported) to 0x1F80 (all exceptions masked, 
round-to-nearest,
+  flush to zero for masked underflow).
 **/
 VOID
 EFIAPI
@@ -56,6 +57,30 @@ InitializeFloatingPointUnits (
   VOID
   );
 
+/**
+  Enable the CPU floating point units.
+
+  Enable the CPU floating point units.
+**/
+VOID
+EFIAPI
+EnableFloatingPointUnits (
+  VOID
+  );
+
+/**
+  Disable the CPU floating point units.
+
+  Disable the CPU floating point units.
+**/
+VOID
+EFIAPI
+DisableFloatingPointUnits (
+  VOID
+  );
+
+#if defined (MDE_CPU_IA32) || defined (MDE_CPU_X64)
+
 /**
   Determine if the standard CPU signature is "AuthenticAMD".
   @retval TRUE  The CPU signature matches.
diff --git a/MdePkg/Library/BaseCpuLib/BaseCpuLib.inf 
b/MdePkg/Library/BaseCpuLib/BaseCpuLib.inf
index 9a162afe6d..89f6272f11 100644
--- a/MdePkg/Library/BaseCpuLib/BaseCpuLib.inf
+++ b/MdePkg/Library/BaseCpuLib/BaseCpuLib.inf
@@ -65,8 +65,11 @@
   RiscV/Cpu.S
 
 [Sources.LOONGARCH64]
-  LoongArch/CpuFlushTlb.S | GCC
-  LoongArch/CpuSleep.S| GCC
+  LoongArch/CpuFlushTlb.S   | GCC
+  LoongArch/CpuSleep.S  | GCC
+  LoongArch/InitializeFpu.S | GCC
+  LoongArch/EnableFpu.S | GCC
+  LoongArch/DisableFpu.S| GCC
 
 [Packages]
   MdePkg/MdePkg.dec
diff --git a/MdePkg/Library/BaseCpuLib/LoongArch/DisableFpu.S 
b/MdePkg/Library/BaseCpuLib/LoongArch/DisableFpu.S
new file mode 100644
index 00..6cb253a416
--- /dev/null
+++ b/MdePkg/Library/BaseCpuLib/LoongArch/DisableFpu.S
@@ -0,0 +1,17 @@
+#--
+#
+# DisableFloatingPointUnits() for LoongArch64
+#
+# Copyright (c) 2023, Loongson Technology Corporation Limited. All rights 
reserved.
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+#--
+ASM_GLOBAL ASM_PFX(DisableFloatingPointUnits)
+
+ASM_PFX(DisableFloatingPointUnits):
+  li.w$t0, 0x1
+  csrxchg $zero, $t0, 0x2
+
+  jirl $zero, $ra, 0
+  .end
diff --git a/MdePkg/Library/BaseCpuLib/LoongArch/EnableFpu.S 
b/MdePkg/Library/BaseCpuLib/LoongArch/EnableFpu.S
new file mode 100644
index 00..27d8243a59
--- /dev/null
+++ b/MdePkg/Library/BaseCpuLib/LoongArch/EnableFpu.S
@@ -0,0 +1,17 @@
+#--
+#
+# EnableFloatingPointUnits() for LoongArch64
+#
+# Copyright (c) 2023, Loongson Technology Corporation Limited. All rights 
reserved.
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+#--
+ASM_GLOBAL ASM_PFX(EnableFloatingPointUnits)
+
+ASM_PFX(EnableFloatingPointUnits):
+  li.w$t0, 0x1
+  csrxchg $t0, $t0, 0x2
+
+  jirl $zero, $ra, 0
+  .end
diff --git a/MdePkg/Library/BaseCpuLib/LoongArch/InitializeFpu.S 
b/MdePkg/Library/BaseCpuLib/LoongArch/InitializeFpu.S
new file mode 100644
index 00..1b9d01c2c1

[edk2-devel] [PATCH v3 01/39] MdePkg: Add the header file named Csr.h for LoongArch64

2023-11-17 Thread Chao Li

Adding Csr.h for LoongArch64, it is use for accessing the CSR registers.

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4584

Cc: Michael D Kinney 
Cc: Liming Gao 
Cc: Zhiguang Liu 
Signed-off-by: Chao Li 
Acked-by: Michael D Kinney 
---
 MdePkg/Include/Register/LoongArch64/Csr.h | 263 ++
 1 file changed, 263 insertions(+)
 create mode 100644 MdePkg/Include/Register/LoongArch64/Csr.h

diff --git a/MdePkg/Include/Register/LoongArch64/Csr.h 
b/MdePkg/Include/Register/LoongArch64/Csr.h
new file mode 100644
index 00..96ea0cc8a8
--- /dev/null
+++ b/MdePkg/Include/Register/LoongArch64/Csr.h
@@ -0,0 +1,263 @@
+/** @file
+
+  Copyright (c) 2023 Loongson Technology Corporation Limited. All rights 
reserved.
+
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+  @par Glossary:
+- EXC - Exception
+- CSR - CPU Status Register
+**/
+
+#ifndef LOONGARCH_CSR_H_
+#define LOONGARCH_CSR_H_
+
+#include 
+
+//
+// CSR register numbers
+//
+
+//
+// Basic CSR registers
+//
+#define LOONGARCH_CSR_CRMD 0x0
+#define LOONGARCH_CSR_PRMD 0x1
+#define LOONGARCH_CSR_EUEN 0x2
+#define CSR_EUEN_LBTEN_SHIFT   3
+#define CSR_EUEN_LBTEN (0x1ULL << CSR_EUEN_LBTEN_SHIFT)
+#define CSR_EUEN_LASXEN_SHIFT  2
+#define CSR_EUEN_LASXEN(0x1ULL << CSR_EUEN_LASXEN_SHIFT)
+#define CSR_EUEN_LSXEN_SHIFT   1
+#define CSR_EUEN_LSXEN (0x1ULL << CSR_EUEN_LSXEN_SHIFT)
+#define CSR_EUEN_FPEN_SHIFT0
+#define CSR_EUEN_FPEN  (0x1ULL << CSR_EUEN_FPEN_SHIFT)
+#define LOONGARCH_CSR_MISC 0x3
+#define LOONGARCH_CSR_ECFG 0x4
+
+#define LOONGARCH_CSR_ESTAT   0x5
+#define CSR_ESTAT_ESUBCODE_SHIFT  22
+#define CSR_ESTAT_ESUBCODE_WIDTH  9
+#define CSR_ESTAT_ESUBCODE(0x1ffULL << CSR_ESTAT_ESUBCODE_SHIFT)
+#define CSR_ESTAT_EXC_SHIFT   16
+#define CSR_ESTAT_EXC_WIDTH   6
+#define CSR_ESTAT_EXC (0x3FULL << CSR_ESTAT_EXC_SHIFT)
+#define CSR_ESTAT_IS_SHIFT0
+#define CSR_ESTAT_IS_WIDTH15
+#define CSR_ESTAT_IS  (0x7FFFULL << CSR_ESTAT_IS_SHIFT)
+
+#define LOONGARCH_CSR_ERA0x6
+#define LOONGARCH_CSR_BADV   0x7
+#define LOONGARCH_CSR_BADI   0x8
+#define LOONGARCH_CSR_EBASE  0xC // Exception entry base address
+
+//
+// TLB related CSR registers
+//
+#define LOONGARCH_CSR_TLBIDX  0x10  // TLB Index, EHINV, PageSize, NP
+#define LOONGARCH_CSR_TLBEHI  0x11  // TLB EntryHi
+#define LOONGARCH_CSR_TLBELO0 0x12  // TLB EntryLo0
+#define LOONGARCH_CSR_TLBELO1 0x13  // TLB EntryLo1
+#define LOONGARCH_CSR_ASID0x18  // ASID
+#define LOONGARCH_CSR_PGDL0x19  // Page table base address when 
VA[47] = 0
+#define LOONGARCH_CSR_PGDH0x1A  // Page table base address when 
VA[47] = 1
+#define LOONGARCH_CSR_PGD 0x1B  // Page table base
+#define LOONGARCH_CSR_PWCTL0  0x1C  // PWCtl0
+#define LOONGARCH_CSR_PWCTL1  0x1D  // PWCtl1
+#define LOONGARCH_CSR_STLBPGSIZE  0x1E
+#define LOONGARCH_CSR_RVACFG  0x1F
+
+///
+/// Page table property definitions
+///
+#define PAGE_VALID_SHIFT   0
+#define PAGE_DIRTY_SHIFT   1
+#define PAGE_PLV_SHIFT 2  // 2~3, two bits
+#define CACHE_SHIFT4  // 4~5, two bits
+#define PAGE_GLOBAL_SHIFT  6
+#define PAGE_HUGE_SHIFT6  // HUGE is a PMD bit
+
+#define PAGE_HGLOBAL_SHIFT  12 // HGlobal is a PMD bit
+#define PAGE_PFN_SHIFT  12
+#define PAGE_PFN_END_SHIFT  48
+#define PAGE_NO_READ_SHIFT  61
+#define PAGE_NO_EXEC_SHIFT  62
+#define PAGE_RPLV_SHIFT 63
+
+///
+/// Used by TLB hardware (placed in EntryLo*)
+///
+#define PAGE_VALID((UINTN)(1) << PAGE_VALID_SHIFT)
+#define PAGE_DIRTY((UINTN)(1) << PAGE_DIRTY_SHIFT)
+#define PAGE_PLV  ((UINTN)(3) << PAGE_PLV_SHIFT)
+#define PAGE_GLOBAL   ((UINTN)(1) << PAGE_GLOBAL_SHIFT)
+#define PAGE_HUGE ((UINTN)(1) << PAGE_HUGE_SHIFT)
+#define PAGE_HGLOBAL  ((UINTN)(1) << PAGE_HGLOBAL_SHIFT)
+#define PAGE_NO_READ  ((UINTN)(1) << PAGE_NO_READ_SHIFT)
+#define PAGE_NO_EXEC  ((UINTN)(1) << PAGE_NO_EXEC_SHIFT)
+#define PAGE_RPLV ((UINTN)(1) << PAGE_RPLV_SHIFT)
+#define CACHE_MASK((UINTN)(3) << CACHE_SHIFT)
+#define PFN_SHIFT (EFI_PAGE_SHIFT - 12 + PAGE_PFN_SHIFT)
+
+#define PLV_KERNEL  0
+#define PLV_USER3
+
+#define PAGE_USER(PLV_USER << PAGE_PLV_SHIFT)
+#define PAGE_KERNEL  (PLV_KERN << PAGE_PLV_SHIFT)
+
+#define CACHE_SUC  (0 << CACHE_SHIFT) // Strong-ordered UnCached
+#define CACHE_CC   (1 << CACHE_SHIFT) // Coherent Cached
+#define CACHE_WUC  (2 << CACHE_SHIFT) // Weak-ordered UnCached
+
+//
+// Config CSR registers
+//
+#define LOONGARCH_CSR_CPUNUM  0x20// CPU core number
+#define LOONGARCH_CSR_PRCFG1  0x21// Config1
+#define LOONGARCH_CSR_PRCFG2  0x22// Config2
+#define LOONGARCH_CSR_PRCFG3  0x23// Config3
+
+//
+// Kscratch registers
+//
+#define LOONGARCH_CSR_KS0  0x30
+#define LOONGARCH_CSR_KS1  0x31
+#define LOONGARCH_CSR_KS2  0x32
+#define LOONGARCH_CSR_KS3  0x33
+#define LOONGARCH_CSR_KS4  0x34

[edk2-devel] [PATCH v3 00/39] Enable LoongArch virtual machine in edk2

2023-11-17 Thread Chao Li

This patch set will enable LoongArch virtual machine in edk2, the new
LoongArch virtual machine is located in OvmfPkg/LoongArchVirt/, it is a
generic platform that dose not require any actual hardware.

Patch1-Patch14: Submit the common library and driver for LoongArch
virtual machine and real hardware. Such as base help functions,
exception handel, MMU library, multiprocessor library etc.

Patch15-Patch16: Add PrePiCpuIoSize for LoongArch64. and move ArmVirtPkg
two PCDs into OvmfPkg for easier use by other architectures.

Patch17-Patch29: LoongArch virtual machine private code, include SEC and
PEI phase code, some library and drivers.

Patch30: Add LoongArchVirt's self introduction-file.

Modfied modues: MdePkg, UefiCpuPkg, EmbeddedPkg, ArmVirtPkg, OvmfPkg.

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4584

**Changes from V1 to V2:**
1. Add Ray's Ack signature to patch 13.
2. Add LoongArchVirt's self introduction-file. And made a standalone
patch for this change.

**Changes from V2 to V3:**
Compared with V2, there are 9 more patches, removed 2 libraries and 1
driver from OvmfPkg/LoongArchVrt.

New patches:
MdePkg: Add a new library named PeiServicesTablePointerLibReg
MdePkg: Add method of LoongArch64 to PeiServicesTablePointerLibReg
MdePkg: Add a PCD feature flag named PcdPciIoTranslationIsEnabled
UefiCpuPkg: Add MMIO method in CpuIo2Dxe
ArmVirtPkg: Enable UefiCpuPkg version CpuIo2Dxe
ArmPkg: Remove ArmPciCpuIo2Dxe from ArmPkg
OvmfPkg/RiscVVirt: Enable UefiCpuPkg version CpuIo2Dxe
OvmfPkg/RiscVVirt: Remove PciCpuIo2Dxe from RiscVVirt
ArmVirtPkg: Move the FdtSerialPortAddressLib to OvmfPkg
ArmVirtPkg: Move the PcdTerminalTypeGuidBuffer into OvmfPkg
ArmVirtPkg: Move PlatformBootManagerLib to OvmfPkg

For the review opinion:
1. Add MMIO method to CpuIo2Dxe driver to accommodate more ARCH that
require MMIO method, enable it on ARM, RISCV64 and LOONGARCH64.
Questioner: Gerd, Sunil.

2. Move the FdtSerialProtAddressLib to OvmfPkg and enabled it on ARM and
LOONGARCH64. Questioner: Gerd, Laszlo.

3. Add a new library in MdePkg named PeiServiceTablePointerLibReg for
the Register Mechanism and enabled it on LOONGARCH64. Questioner: Laszlo.

4. Moved the ARM version of PlatformBootManagerLib to OvmfPkg/Library, and
enabled it on ARM and LOONGARCH64. Questioner: Laszlo, Gerd.

5. Adjust the order of some inf file in ArmVirtPkg. Questioner: Sami.

6. Move the CpuMmuLib.h some architecture-specific PTE #defines into
Csr.h. Questioner: Andrei.

Cc: Michael D Kinney 
Cc: Liming Gao 
Cc: Zhiguang Liu 
Cc: Eric Dong 
Cc: Ray Ni 
Cc: Rahul Kumar 
Cc: Gerd Hoffmann 
Cc: Leif Lindholm 
Cc: Ard Biesheuvel 
Cc: Abner Chang 
Cc: Daniel Schaefer 
Cc: Sami Mujawar 
Cc: Jiewen Yao 
Cc: Jordan Justen 
Cc: Andrei Warkentin 
Cc: Laszlo Ersek 
Cc: Sunil V L 

Chao Li (39):
  MdePkg: Add the header file named Csr.h for LoongArch64
  MdePkg: Add LoongArch64 FPU function set into BaseCpuLib
  MdePkg: Add LoongArch64 exception function set into BaseLib
  MdePkg: Add LoongArch64 local interrupt function set into BaseLib
  MdePkg: Add LoongArch Cpucfg function
  MdePkg: Add read stable counter operation for LoongArch
  MdePkg: Add CSR operation for LoongArch
  MdePkg: Add IOCSR operation for LoongArch
  MdePkg: Add a new library named PeiServicesTablePointerLibReg
  MdePkg: Add method of LoongArch64 to PeiServicesTablePointerLibReg
  UefiCpuPkg: Add LoongArch64 CPU Timer library
  UefiCpuPkg: Add CPU exception library for LoongArch
  UefiCpuPkg: Add CpuMmuLib.h to UefiCpuPkg
  UefiCpuPkg: Add LoongArch64CpuMmuLib to UefiCpuPkg
  UefiCpuPkg: Add multiprocessor library for LoongArch64
  UefiCpuPkg: Add CpuDxe driver for LoongArch64
  EmbeddedPkg: Add PcdPrePiCpuIoSize width for LOONGARCH64
  ArmVirtPkg: Move PCD of FDT base address and FDT padding to OvmfPkg
  MdePkg: Add a PCD feature flag named PcdPciIoTranslationIsEnabled
  UefiCpuPkg: Add MMIO method in CpuIo2Dxe
  ArmVirtPkg: Enable UefiCpuPkg version CpuIo2Dxe
  ArmPkg: Remove ArmPciCpuIo2Dxe from ArmPkg
  OvmfPkg/RiscVVirt: Enable UefiCpuPkg version CpuIo2Dxe
  OvmfPkg/RiscVVirt: Remove PciCpuIo2Dxe from RiscVVirt
  ArmVirtPkg: Move the FdtSerialPortAddressLib to OvmfPkg
  ArmVirtPkg: Move the PcdTerminalTypeGuidBuffer into OvmfPkg
  ArmVirtPkg: Move PlatformBootManagerLib to OvmfPkg
  OvmfPkg/LoongArchVirt: Add stable timer driver
  OvmfPkg/LoongArchVirt: Add a NULL library named
CollectApResouceLibNull
  OvmfPkg/LoongArchVirt: Add serial port hook library
  OvmfPkg/LoongArchVirt: Add the early serial port output library
  OvmfPkg/LoongArchVirt: Add real time clock library
  OvmfPkg/LoongArchVirt: Add NorFlashQemuLib
  OvmfPkg/LoongArchVirt: Add FdtQemuFwCfgLib
  OvmfPkg/LoongArchVirt: Add reset system library
  OvmfPkg/LoongArchVirt: Support SEC phase
  OvmfPkg/LoongArchVirt: Support PEI phase
  OvmfPkg/LoongArchVirt: Add build file
  OvmfPkg/LoongArchVirt: Add self introduction file

 ArmPkg/ArmPkg.dsc |2 -

Re: [edk2-devel] [Patch V2 0/3] Move gMpInformationHobGuid from StandaloneMmPkg to UefiCpuPkg.

2023-11-17 Thread duntan

Hi Ard, 

I'm working on moving gMpInformationHobGuid from StandaloneMmPkg to UefiCpuPkg 
in this patch series. Currently in Edk2, the HOB is only consumed by 
StandaloneMmCpu.inf.

As we know that this HOB is used to provide a lightweight static information of 
MP processor. However, there might be a concern that the maximum HOB size 64KB 
is not large enough when CPU number is 1~2000 or bigger.

May I know if you considered this situation or is there any solution to avoid 
this issue on Arm?

Thanks, 
Dun

-Original Message-
From: devel@edk2.groups.io  On Behalf Of duntan
Sent: Friday, November 17, 2023 5:40 PM
To: devel@edk2.groups.io
Subject: [edk2-devel] [Patch V2 0/3] Move gMpInformationHobGuid from 
StandaloneMmPkg to UefiCpuPkg.

In the V2 patch set: Added more comments in the new MpInformation.h to document 
that some fields in this HOB may be invalidated.

Move gMpInformationHobGuid from StandaloneMmPkg to UefiCpuPkg.

Previously, the HOB is defined, created and consumed only in StandaloneMmPkg. 
The HOB contains the number of processors and EFI_PROCESSOR_INFORMATION 
structure. This is the same as the information that PiSmmCpuDxeSmm uses 
EfiMpServiceProtocolGuid to get.

The incoming plan is to create gMpInformationHobGuid for both StandaloneMm and 
legacy DXE_SMM in early phase(for example in CpuMpPei). Then PiSmmCpuDxeSmm can 
consume the hob, which can simplify code logic in PiSmmCpuDxeSmm driver.

So move this HOB definition to UefiCpuPkg in this patch series.

Dun Tan (3):
  UefiCpuPkg: Create MpInformation.h in UefiCpuPkg
  StandaloneMmPkg:Add UefiCpuPkg.dec in DependencyCheck
  StandaloneMmPkg:Remove MpInformation.h

 StandaloneMmPkg/Drivers/StandaloneMmCpu/StandaloneMmCpu.inf
   | 1 +
 
StandaloneMmPkg/Library/StandaloneMmCoreEntryPoint/StandaloneMmCoreEntryPoint.inf
 | 1 +
 StandaloneMmPkg/StandaloneMmPkg.ci.yaml
   | 3 ++-
 StandaloneMmPkg/StandaloneMmPkg.dec
   | 1 -
 {StandaloneMmPkg => UefiCpuPkg}/Include/Guid/MpInformation.h   
   | 6 +-
 UefiCpuPkg/UefiCpuPkg.dec  
   | 3 +++
 6 files changed, 12 insertions(+), 3 deletions(-)  rename {StandaloneMmPkg => 
UefiCpuPkg}/Include/Guid/MpInformation.h (71%)

--
2.31.1.windows.1








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回复: [edk2-devel] [PATCH v6 0/2] Fix and optimize the issue if IPv4 installed after RestEx

2023-11-17 Thread gaoliming via groups.io

Laszlo:
  I agree to highlight this critical bug fix. 

Igor:
  If no BZ, please help submit it. I will help merge your patch set. 

Thanks
Liming
> -邮件原件-
> 发件人: devel@edk2.groups.io  代表 Laszlo Ersek
> 发送时间: 2023年11月17日 17:11
> 收件人: devel@edk2.groups.io; ig...@ami.com; Abner Chang
> 
> 主题: Re: [edk2-devel] [PATCH v6 0/2] Fix and optimize the issue if IPv4
> installed after RestEx
> 
> On 11/15/23 23:12, Igor Kulchytskyy via groups.io wrote:
> > Igor Kulchytskyy (2):
> >   RedfishPkg: RedfishDiscoverDxe: Fix issue if IPv4 installed after
> > RestEx
> >   RedfishPkg: RedfishDiscoverDxe: Optimize the Redfish Discover flow
> >
> >  .../RedfishDiscoverDxe/RedfishDiscoverDxe.c   | 225
> --
> >  .../RedfishDiscoverInternal.h |   4 +
> >  2 files changed, 158 insertions(+), 71 deletions(-)
> 
> Should this patch series be highlighted in the release plan? Is there a BZ?
> 
> Laszlo
> 
> 
> 
> 
> 





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[edk2-devel] [Patch V2 2/3] StandaloneMmPkg:Add UefiCpuPkg.dec in DependencyCheck

2023-11-17 Thread duntan

Add UefiCpuPkg.dec in DependencyCheck section of
StandaloneMmPkg.ci.yaml to allow StandaloneMmPkg
depend on UefiCpuPkg.

Signed-off-by: Dun Tan 
Cc: Ard Biesheuvel 
Cc: Sami Mujawar 
Reviewed-by: Ray Ni 
Acked-by: Laszlo Ersek 
Cc: Gerd Hoffmann 
---
 StandaloneMmPkg/StandaloneMmPkg.ci.yaml | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/StandaloneMmPkg/StandaloneMmPkg.ci.yaml 
b/StandaloneMmPkg/StandaloneMmPkg.ci.yaml
index 4777532a7e..ebd35f515e 100644
--- a/StandaloneMmPkg/StandaloneMmPkg.ci.yaml
+++ b/StandaloneMmPkg/StandaloneMmPkg.ci.yaml
@@ -39,7 +39,8 @@
 "EmbeddedPkg/EmbeddedPkg.dec",
 "StandaloneMmPkg/StandaloneMmPkg.dec",
 "MdeModulePkg/MdeModulePkg.dec",
-"MdePkg/MdePkg.dec"
+"MdePkg/MdePkg.dec",
+"UefiCpuPkg/UefiCpuPkg.dec"
 ],
 # For host based unit tests
 "AcceptableDependencies-HOST_APPLICATION":[
-- 
2.31.1.windows.1



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[edk2-devel] [Patch V2 3/3] StandaloneMmPkg:Remove MpInformation.h

2023-11-17 Thread duntan

Remove MpInformation.h in StandaloneMmPkg since
it has been moved to UefiCpuPkg

Signed-off-by: Dun Tan 
Cc: Ard Biesheuvel 
Cc: Sami Mujawar 
Reviewed-by: Ray Ni 
Acked-by: Laszlo Ersek 
Cc: Gerd Hoffmann 
---
 StandaloneMmPkg/Drivers/StandaloneMmCpu/StandaloneMmCpu.inf
   |  1 +
 StandaloneMmPkg/Include/Guid/MpInformation.h   
   | 35 ---
 
StandaloneMmPkg/Library/StandaloneMmCoreEntryPoint/StandaloneMmCoreEntryPoint.inf
 |  1 +
 StandaloneMmPkg/StandaloneMmPkg.dec
   |  1 -
 4 files changed, 2 insertions(+), 36 deletions(-)

diff --git a/StandaloneMmPkg/Drivers/StandaloneMmCpu/StandaloneMmCpu.inf 
b/StandaloneMmPkg/Drivers/StandaloneMmCpu/StandaloneMmCpu.inf
index 1fcb17d89d..4ed0e395c8 100644
--- a/StandaloneMmPkg/Drivers/StandaloneMmCpu/StandaloneMmCpu.inf
+++ b/StandaloneMmPkg/Drivers/StandaloneMmCpu/StandaloneMmCpu.inf
@@ -27,6 +27,7 @@
   MdePkg/MdePkg.dec
   MdeModulePkg/MdeModulePkg.dec
   StandaloneMmPkg/StandaloneMmPkg.dec
+  UefiCpuPkg/UefiCpuPkg.dec
 
 [LibraryClasses]
   ArmLib
diff --git a/StandaloneMmPkg/Include/Guid/MpInformation.h 
b/StandaloneMmPkg/Include/Guid/MpInformation.h
deleted file mode 100644
index dbf88d12de..00
--- a/StandaloneMmPkg/Include/Guid/MpInformation.h
+++ /dev/null
@@ -1,35 +0,0 @@
-/** @file
-  EFI MP information protocol provides a lightweight MP_SERVICES_PROTOCOL.
-
-  MP information protocol only provides static information of MP processor.
-
-  Copyright (c) 2009, Intel Corporation. All rights reserved.
-  Copyright (c) 2016 - 2018, ARM Limited. All rights reserved.
-
-  SPDX-License-Identifier: BSD-2-Clause-Patent
-
-**/
-
-#ifndef _MP_INFORMATION_H_
-#define _MP_INFORMATION_H_
-
-#include 
-#include 
-#include 
-
-#define MP_INFORMATION_GUID \
-  { \
-0xba33f15d, 0x4000, 0x45c1, {0x8e, 0x88, 0xf9, 0x16, 0x92, 0xd4, 0x57, 
0xe3}  \
-  }
-
-#pragma pack(1)
-typedef struct {
-  UINT64   NumberOfProcessors;
-  UINT64   NumberOfEnabledProcessors;
-  EFI_PROCESSOR_INFORMATIONProcessorInfoBuffer[];
-} MP_INFORMATION_HOB_DATA;
-#pragma pack()
-
-extern EFI_GUID  gMpInformationHobGuid;
-
-#endif
diff --git 
a/StandaloneMmPkg/Library/StandaloneMmCoreEntryPoint/StandaloneMmCoreEntryPoint.inf
 
b/StandaloneMmPkg/Library/StandaloneMmCoreEntryPoint/StandaloneMmCoreEntryPoint.inf
index 75cfb98c0e..1fc31360ce 100644
--- 
a/StandaloneMmPkg/Library/StandaloneMmCoreEntryPoint/StandaloneMmCoreEntryPoint.inf
+++ 
b/StandaloneMmPkg/Library/StandaloneMmCoreEntryPoint/StandaloneMmCoreEntryPoint.inf
@@ -33,6 +33,7 @@
   MdePkg/MdePkg.dec
   MdeModulePkg/MdeModulePkg.dec
   StandaloneMmPkg/StandaloneMmPkg.dec
+  UefiCpuPkg/UefiCpuPkg.dec
 
 [Packages.ARM, Packages.AARCH64]
   ArmPkg/ArmPkg.dec
diff --git a/StandaloneMmPkg/StandaloneMmPkg.dec 
b/StandaloneMmPkg/StandaloneMmPkg.dec
index 46784d94e4..01f37deebb 100644
--- a/StandaloneMmPkg/StandaloneMmPkg.dec
+++ b/StandaloneMmPkg/StandaloneMmPkg.dec
@@ -36,7 +36,6 @@
 
 [Guids]
   gStandaloneMmPkgTokenSpaceGuid   = { 0x18fe7632, 0xf5c8, 0x4e63, { 
0x8d, 0xe8, 0x17, 0xa5, 0x5c, 0x59, 0x13, 0xbd }}
-  gMpInformationHobGuid= { 0xba33f15d, 0x4000, 0x45c1, { 
0x8e, 0x88, 0xf9, 0x16, 0x92, 0xd4, 0x57, 0xe3 }}
   gMmFvDispatchGuid= { 0xb65694cc, 0x09e3, 0x4c3b, { 
0xb5, 0xcd, 0x05, 0xf4, 0x4d, 0x3c, 0xdb, 0xff }}
 
   ## Include/Guid/MmCoreData.h
-- 
2.31.1.windows.1



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[edk2-devel] [Patch V2 0/3] Move gMpInformationHobGuid from StandaloneMmPkg to UefiCpuPkg.

2023-11-17 Thread duntan

In the V2 patch set: Added more comments in the new MpInformation.h to document 
that some fields in this HOB may be invalidated.

Move gMpInformationHobGuid from StandaloneMmPkg to UefiCpuPkg.

Previously, the HOB is defined, created and consumed only in StandaloneMmPkg. 
The HOB contains the number
of processors and EFI_PROCESSOR_INFORMATION structure. This is the same as the 
information that PiSmmCpuDxeSmm
uses EfiMpServiceProtocolGuid to get.

The incoming plan is to create gMpInformationHobGuid for both StandaloneMm and 
legacy DXE_SMM in early
phase(for example in CpuMpPei). Then PiSmmCpuDxeSmm can consume the hob, which 
can simplify code logic
in PiSmmCpuDxeSmm driver.

So move this HOB definition to UefiCpuPkg in this patch series.

Dun Tan (3):
  UefiCpuPkg: Create MpInformation.h in UefiCpuPkg
  StandaloneMmPkg:Add UefiCpuPkg.dec in DependencyCheck
  StandaloneMmPkg:Remove MpInformation.h

 StandaloneMmPkg/Drivers/StandaloneMmCpu/StandaloneMmCpu.inf
   | 1 +
 
StandaloneMmPkg/Library/StandaloneMmCoreEntryPoint/StandaloneMmCoreEntryPoint.inf
 | 1 +
 StandaloneMmPkg/StandaloneMmPkg.ci.yaml
   | 3 ++-
 StandaloneMmPkg/StandaloneMmPkg.dec
   | 1 -
 {StandaloneMmPkg => UefiCpuPkg}/Include/Guid/MpInformation.h   
   | 6 +-
 UefiCpuPkg/UefiCpuPkg.dec  
   | 3 +++
 6 files changed, 12 insertions(+), 3 deletions(-)
 rename {StandaloneMmPkg => UefiCpuPkg}/Include/Guid/MpInformation.h (71%)

-- 
2.31.1.windows.1



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[edk2-devel] [Patch V2 1/3] UefiCpuPkg: Create MpInformation.h in UefiCpuPkg

2023-11-17 Thread duntan

Copy MpInformation.h and gMpInformationHobGuid to
UefiCpuPkg.
Previously, the HOB is defined, created and consumed
only in StandaloneMmPkg. The HOB contains the number
of processors and EFI_PROCESSOR_INFORMATION structure.
This is the same as the information that PiSmmCpuDxeSmm
uses EfiMpServiceProtocolGuid to get.
The incoming plan is to create gMpInformationHobGuid
for both StandaloneMm and legacy DXE_SMM in early
phase. Then PiSmmCpuDxeSmm can consume the hob, which can
simplified code logic about consuming MpService Protocol.
So move this HOB definition to UefiCpuPkg.

Signed-off-by: Dun Tan 
Cc: Eric Dong 
Cc: Ray Ni 
Cc: Rahul Kumar 
Cc: Gerd Hoffmann 
Cc: Laszlo Ersek 
---
 UefiCpuPkg/Include/Guid/MpInformation.h | 39 
+++
 UefiCpuPkg/UefiCpuPkg.dec   |  3 +++
 2 files changed, 42 insertions(+)

diff --git a/UefiCpuPkg/Include/Guid/MpInformation.h 
b/UefiCpuPkg/Include/Guid/MpInformation.h
new file mode 100644
index 00..29da80d4df
--- /dev/null
+++ b/UefiCpuPkg/Include/Guid/MpInformation.h
@@ -0,0 +1,39 @@
+/** @file
+  EFI MP information protocol provides a lightweight MP_SERVICES_PROTOCOL.
+
+  MP information protocol only provides static information of MP processor.
+
+  If SwitchBSP or Enable/DisableAP in MP service is called between the HOB
+  production and HOB consumption, EFI_PROCESSOR_INFORMATION.StatusFlag and
+  NumberOfEnabledProcessors fields in this HOB may be invalidated.
+
+  Copyright (c) 2009 - 2023, Intel Corporation. All rights reserved.
+  Copyright (c) 2016 - 2018, ARM Limited. All rights reserved.
+
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#ifndef _MP_INFORMATION_H_
+#define _MP_INFORMATION_H_
+
+#include 
+#include 
+#include 
+
+#define MP_INFORMATION_GUID \
+  { \
+0xba33f15d, 0x4000, 0x45c1, {0x8e, 0x88, 0xf9, 0x16, 0x92, 0xd4, 0x57, 
0xe3}  \
+  }
+
+#pragma pack(1)
+typedef struct {
+  UINT64   NumberOfProcessors;
+  UINT64   NumberOfEnabledProcessors;
+  EFI_PROCESSOR_INFORMATIONProcessorInfoBuffer[];
+} MP_INFORMATION_HOB_DATA;
+#pragma pack()
+
+extern EFI_GUID  gMpInformationHobGuid;
+
+#endif
diff --git a/UefiCpuPkg/UefiCpuPkg.dec b/UefiCpuPkg/UefiCpuPkg.dec
index 0b5431dbf7..92860b4c6e 100644
--- a/UefiCpuPkg/UefiCpuPkg.dec
+++ b/UefiCpuPkg/UefiCpuPkg.dec
@@ -85,6 +85,9 @@
   ## Include/Guid/SmmBaseHob.h
   gSmmBaseHobGuid  = { 0xc2217ba7, 0x03bb, 0x4f63, {0xa6, 0x47, 0x7c, 
0x25, 0xc5, 0xfc, 0x9d, 0x73 }}
 
+  ## Include/Guid/MpInformation.h
+  gMpInformationHobGuid  = { 0xba33f15d, 0x4000, 0x45c1, { 0x8e, 0x88, 
0xf9, 0x16, 0x92, 0xd4, 0x57, 0xe3 }}
+
 [Protocols]
   ## Include/Protocol/SmmCpuService.h
   gEfiSmmCpuServiceProtocolGuid   = { 0x1d202cab, 0xc8ab, 0x4d5c, { 0x94, 
0xf7, 0x3c, 0xfc, 0xc0, 0xd3, 0xd3, 0x35 }}
-- 
2.31.1.windows.1



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Re: [edk2-devel] [PATCH] DynamicTablesPkg: Fix ETE _UID Creation

2023-11-17 Thread Laszlo Ersek

On 11/15/23 04:19, Ashish Singhal via groups.io wrote:
> Just like CPU _UID, ETE UID also needs to be unique so
> use AcpiProcessorUid instead of CpuName
> 
> Signed-off-by: Ashish Singhal 
> ---
>  .../Arm/AcpiSsdtCpuTopologyLibArm/SsdtCpuTopologyGenerator.c | 5 -
>  1 file changed, 4 insertions(+), 1 deletion(-)

Is this a fixup for the recent feature

[PATCH v3 00/11] Update MADT for ACPI 6.5, and add TRBE & ETE support
https://edk2.groups.io/g/devel/message/108996

?

If so, then I *think* this qualifies to be merged during the hard
feature freeze (+Liming +Mike), but:

- I think we should have a "Fixes:" tag in the commit message (for
pointing out the commit that should have contained the code being
added/updated now)

- I think we should have a BZ too (also linked into the commit message).

Laszlo

> 
> diff --git 
> a/DynamicTablesPkg/Library/Acpi/Arm/AcpiSsdtCpuTopologyLibArm/SsdtCpuTopologyGenerator.c
>  
> b/DynamicTablesPkg/Library/Acpi/Arm/AcpiSsdtCpuTopologyLibArm/SsdtCpuTopologyGenerator.c
> index 8228c7845a..724f33c660 100644
> --- 
> a/DynamicTablesPkg/Library/Acpi/Arm/AcpiSsdtCpuTopologyLibArm/SsdtCpuTopologyGenerator.c
> +++ 
> b/DynamicTablesPkg/Library/Acpi/Arm/AcpiSsdtCpuTopologyLibArm/SsdtCpuTopologyGenerator.c
> @@ -359,6 +359,7 @@ CreateAmlCpcNode (
>  
>@param [in]  GeneratorThe SSDT Cpu Topology generator.
>@param [in]  ParentNode   Parent node to attach the Cpu node to.
> +  @param [in]  GicCInfo CM_ARM_GICC_INFO object used to create the node.
>@param [in]  CpuName  Value used to generate the node name.
>@param [out] EtNodePtr   If not NULL, return the created Cpu node.
>  
> @@ -372,6 +373,7 @@ EFIAPI
>  CreateAmlEtd (
>IN   ACPI_CPU_TOPOLOGY_GENERATOR  *Generator,
>IN   AML_NODE_HANDLE  ParentNode,
> +  IN   CM_ARM_GICC_INFO *GicCInfo,
>IN   UINT32   CpuName,
>OUT  AML_OBJECT_NODE_HANDLE   *EtNodePtr OPTIONAL
>)
> @@ -397,7 +399,7 @@ CreateAmlEtd (
>  
>Status = AmlCodeGenNameInteger (
>   "_UID",
> - CpuName,
> + GicCInfo->AcpiProcessorUid,
>   EtNode,
>   NULL
>   );
> @@ -474,6 +476,7 @@ CreateAmlEtNode (
>Status = CreateAmlEtd (
>   Generator,
>   Node,
> + GicCInfo,
>   CpuName,
>   NULL
>   );



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Re: [edk2-devel] [PATCH v2] OvmfPkg/MemEncryptSevLib: Fix address overflow during PVALIDATE

2023-11-17 Thread Laszlo Ersek

(+Liming +Mike)

On 11/16/23 10:01, Gerd Hoffmann wrote:
> On Wed, Nov 15, 2023 at 11:51:53AM -0600, Michael Roth wrote:
>> The struct used for GHCB-based page-state change requests uses a 40-bit
>> bit-field for the GFN, which is shifted by PAGE_SHIFT to generate a
>> 64-bit address. However, anything beyond 40-bits simply gets shifted off
>> when doing this, which will cause issues when dealing with 1TB+
>> addresses. Fix this by casting the 40-bit GFN values to 64-bit ones
>> prior to shifting it by PAGE_SHIFT.
>>
>> Fixes: ade62c18f474 ("OvmfPkg/MemEncryptSevLib: add support to validate 
>> system RAM")
>> Signed-off-by: Michael Roth 
> 
> Reviewed-by: Gerd Hoffmann 
> 
> take care,
>   Gerd

Is this hard feature freeze material?

Do we have a BZ?

Also, the patch looks garbled to me on-list (superfluous line breaks).
Michael's git setup may not be perfect. Michael, can you compare
gitconfigs with Tom?

Laszlo



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Re: [edk2-devel] [PATCH v6 0/2] Fix and optimize the issue if IPv4 installed after RestEx

2023-11-17 Thread Laszlo Ersek

On 11/15/23 23:12, Igor Kulchytskyy via groups.io wrote:
> Igor Kulchytskyy (2):
>   RedfishPkg: RedfishDiscoverDxe: Fix issue if IPv4 installed after
> RestEx
>   RedfishPkg: RedfishDiscoverDxe: Optimize the Redfish Discover flow
> 
>  .../RedfishDiscoverDxe/RedfishDiscoverDxe.c   | 225 --
>  .../RedfishDiscoverInternal.h |   4 +
>  2 files changed, 158 insertions(+), 71 deletions(-)

Should this patch series be highlighted in the release plan? Is there a BZ?

Laszlo



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Re: [edk2-devel] edk2 uncrustify update (73.0.8)?

2023-11-17 Thread Laszlo Ersek

On 11/16/23 09:29, Pedro Falcato wrote:
> On Tue, Nov 14, 2023 at 3:01 PM Laszlo Ersek  wrote:
>>
>> On 11/13/23 22:33, Pedro Falcato wrote:
>>> On Mon, Nov 13, 2023 at 8:37 PM Rebecca Cran  wrote:

 On 11/13/2023 1:08 PM, Michael Kubacki wrote:
> Yes. I just did it. It is relatively minor and impacts expected code
> areas.
>
> https://github.com/tianocore/edk2/pull/5043/files


 Could you update .git-blame-ignore-revs please?
>>>
>>> You can't do that until the merge is done, since we use
>>> rebase-and-merge for tianocore (and rebases do not keep stable commit
>>> hashes).
>>> But I would plead that this should not get merged in general :/
>>
> 
> Laszlo!
> 
> Sorry for the delay.
> 
>> Seeing the cumulative diff in that PR, do you have specific
>> counter-arguments?
> 
> Well, my counter-argument is that formatting is becoming a topic of
> its own. I used to be very pro-formatter but if this leads to either
> 1) eyesore or 2) weird churn every now and then,
> I feel like we should reconsider the current approach. I feel like all
> formatting (manual or automated) is fine as long as it's:
> 1) Visually consistent with the codebase's style
> 2) Not horrendous to look at

That was what we did first, for several years. It wasn't working well.

An edk2 coding style document had always existed, but it had sufficient
corner cases that formatting had *always* been a topic of its own. In
particular, point (2) "not horrendous to look at" is impossible to define.

- edk2 mainly uses a Windows-like coding style, which is immediately
horrendous to anyone coming from a Linux background, at first

- edk2 uses extremely long lines in some modules (200+ characters). I
personally use 80 character lines (for good reason -- not the greatest
eyesight, so I need to use a relatively large font, and I like to place
two columns of source code on my screen side-by-side, for diffing or
comparing otherwise). I've received multiple "buy a larger monitor" or
"use two monitors at the same time", and those don't work for me either.
Some people are super productive with 30" monitors, I'm not. Therefore,
"long lines or not" can never be decided by democracy, only by decree.
uncrustify is decree.

- somewhat as a consequence of my avoidance of long lines, I tended to
break up long function calls earlier / more frequently than other
developers. In order to conserve *vertical* screen real estate, I used a
"condensed" multi-line argument style for function calls, in OvmfPkg and
ArmVirtPkg. (The official multi-line style is more wasteful.) That
wasn't working for other project participants. Uncrustify now does not
permit my preferred (condensed) style, but at least there are no more
debates about it.

Your premise is that those two points form a stable foundation, but they
don't. We tried.


> and switching back and forth because 'magic indentation tool' says so
> just seems silly to me.

I don't perceive this update as switching back and forth; it seems like
a minor tweak.


>> The diff is trivial, IMO. You mentioned "error prone" and "much churn",
>> which are very valid concerns, but they don't seem to apply here. We can
>> review a diff of this size (especially if it's split up on Pkg
>> boundaries), and the github view indicates the change is only in
>> whitespace amount.
>>
>> The change in
>> "OvmfPkg/IncompatiblePciDeviceSupportDxe/IncompatiblePciDeviceSupport.c"
>> is a net win; the current formatting is really distracting.
>>
>> Furthermore, this diff actually highlights some inexplicable syntax in
>> "EmulatorPkg/FvbServicesRuntimeDxe/FvbInfo.c": those backslashes (not
>> parts of any macro definition) are an eyesore. They should be fixed
>> regardless of re-uncrustification.
>>
>> The version N vs. N+1 concern shouldn't be one; the authoritative
>> version is what the YAML file in edk2 says.
> 
> Well, I fear it's not that simple. EDK2's uncrustify has historically
> been a PITA, I've had to convince people to give it a try, I myself
> don't even know how I installed it (IIRC, some weird random
> combination of unzip + the NuGet...).

(1) The following file in edk2:

  .pytool/Plugin/UncrustifyCheck/Readme.md

highlights the "Project Mu Uncrustify fork source code and documentation":

  https://dev.azure.com/projectmu/Uncrustify

(This file is easy to find in edk2 just by grepping for "uncrustify".)

(2) The "Repos" link in the sidebar of that page leads to:

  https://dev.azure.com/projectmu/_git/Uncrustify

A Clone button appears then, with the project URL being

  https://projec...@dev.azure.com/projectmu/Uncrustify/_git/Uncrustify

(3) This project can be cloned, and built on Linux very easily. It has a
top-level README.md file with instructions. It needs "cmake" and "make".

(4) The actual version to check out and build -- in order to match the
github CI -- is captured in edk2's file

  .pytool/Plugin/UncrustifyCheck/uncrustify_ext_dep.yaml

(5) A bit of digging in edk2's

Re: [edk2-devel] [PATCH 0/3] Maintainers.txt: add Laszlo Ersek as an ArmVirt, Ovmf, UefiCpu Pkg "M"

2023-11-17 Thread Gerd Hoffmann

On Thu, Nov 16, 2023 at 10:50:55PM +0100, Laszlo Ersek wrote:
> I'm offering to restore a subset of my earlier ArmVirtPkg and OvmfPkg
> maintainer responsibilities.
> 
> I'm both offering and requesting an escalation of my earlier UefiCpuPkg
> role.
> 
> The commit messages contain lists of files and directories that I intend
> to assist with.
> 
> Under ArmVirtPkg, my focus is the ArmVirtQemu platform.
> 
> Under OvmfPkg and UefiCpuPkg, my focus is the traditional three OVMF
> platforms (IA32, IA32X64, X64) and their dependencies; in particular I
> refrain from Confidential Computing technologies. Under OvmfPkg, I may
> also not be the primary reviewer of those nontrivial device drivers and
> libraries that I neither wrote nor reviewed.
> 
> Finally, I'm interested in reviewing patches for most of the edk2 core,
> and patches for the RISC-V architecture; but it's too early to formalize
> those interests even as some "R" lines.
> 
> Cc: Andrew Fish 
> Cc: Ard Biesheuvel 
> Cc: Gerd Hoffmann 
> Cc: Jiewen Yao 
> Cc: Leif Lindholm 
> Cc: Michael D Kinney 
> Cc: Rahul Kumar 
> Cc: Ray Ni 
> Cc: Sami Mujawar 
> 
> Thanks,
> Laszlo
> 
> Laszlo Ersek (3):
>   Maintainers.txt: add Laszlo Ersek as an ArmVirtPkg maintainer
>   Maintainers.txt: add Laszlo Ersek as an OvmfPkg maintainer
>   Maintainers.txt: add Laszlo Ersek as a UefiCpuPkg maintainer

Acked-by: Gerd Hoffmann 

take care,
  Gerd



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Re: [edk2-devel] question about PrmPkg

2023-11-17 Thread Laszlo Ersek

On 11/17/23 03:15, Yoshinoya wrote:
> Hi,
> I find there is a PrmPkg in udk source code.
> Based on its Readme.md, its goal is to offload smm code to sci os
> mechanisms.
> 
> So, is there any actual use case on real platform now?
> 
> It seems it's just a conceptional prototype.

It's way too big for it to be unused.

The original BZ was .

I'm sure Microsoft uses it in production. Client code for this
infrastructure may be present in Project Mu (I didn't try to check), or
in proprietary repositories. Perhaps Michael (CC'd) can share some details.

Laszlo



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Re: [edk2-devel] [Patch V4] UefiCpuPkg/MpInitLib: Enable execute disable bit.

2023-11-17 Thread Laszlo Ersek

On 11/17/23 08:01, Ni, Ray wrote:
> Laszlo,
> I agree that the BSP's XD status is saved in both CpuMpData and
> ExchangeInfo.
> But, thinking from another perspective, ExchangeInfo is "only" used by
> the assembly
> code. That's why the BSP code needs to save the XD status in CpuMpData
> and ExchangeInfo.
> 
> If we remove the XD status field in ExchangeInfo, then the assembly code
> has to understand
> the structure layout of CpuMpData, which is what I prefer to avoid.
> 
> If you compare all fields in ExchangeInfo and CpuMpData, following
> fields are already duplicated:
> * CpuMpData.CpuInfoHob <-> MpExchangeInfo.CpuInfo
> * InitFlag
> * SevEsIsEnabled
> * SevSnpIsEnabled
> * GhcbBase
> 
> 
> So, I prefer to keep the current change proposed in Yuanhao's patch.

Very good explanation, thank you.

Can we perhaps document, in an additional patch:

- in "UefiCpuPkg/Library/MpInitLib/MpEqu.inc", that the assembly
routines are not supposed to access the internals of CPU_MP_DATA,

- the same statement above "struct _CPU_MP_DATA" in
"UefiCpuPkg/Library/MpInitLib/MpLib.h"?

A number of structures in "UefiCpuPkg/Library/MpInitLib/MpLib.h"
document whether they are to be used by assembly code vs. C code (vs.
both), but CPU_MP_DATA doesn't seem to have such comments.

For the current patch:

Reviewed-by: Laszlo Ersek 

Thanks!
Laszlo



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Re: [edk2-devel] [PATCH V3 0/4] Add New Memory Attributes

2023-11-17 Thread Laszlo Ersek

On 11/17/23 09:07, Dhaval Sharma wrote:
> Hi,
> I wanted to revisit this thread and I am maintaining the context as
> there are a lot of details already mentioned here regarding EFI_MEMORY_SP.
> Other than what has been addressed here, we also would like to have an
> option in edk2 to *avoid* using this type of memory for its own
> purposes. This seems like one of the motivations for original request
> and is being honored by OS today but not edk2 as it does not have any
> specific implementation today which takes this attribute into consideration.
> I would like to add PCD based implementation which informs edk2 NOT to
> use this memory for its own purposes and leave it alone (as still
> available memory to OS).
> 
> Specific-purpose memory (SPM). The memory is earmarked for
> specific purposes such as for specific device drivers or applications.
> The SPM attribute serves as a hint to the OS to avoid allocating this
> memory for core OS data or code that can not be relocated.
> Prolonged use of this memory for purposes other than the intended
> purpose may result in suboptimal platform performance.
> 
> Some more context:
> https://lwn.net/Articles/784971/

Why was EFI_MEMORY_SP introduced as a memory attribute, rather than its
own memory type?

Laszlo



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Re: [edk2-devel] Hard Feature Freeze starts now for edk2-stable202311

2023-11-17 Thread Laszlo Ersek

(-announce)

On 11/13/23 15:57, gaoliming via groups.io wrote:
> Hi, all
> 
>   Today, we enter into Hard Feature Freeze phase until edk2-stable202311 tag
> 
> is created at 2023-11-24. In this phase, there is no feature to be pushed.
> 
> The critical bug fix or the approved change is still allowed.
> 
>  
> 
>   If the patch is sent after Hard Feature Freeze, and plans to catch this
> 
> stable tag, please add edk2-stable202311 key words in the patch title and
> 
> BZ, and also cc to Tianocore Stewards, then Stewards can give the comments.
> 
>  
> 
> Below is edk2-stable202311 tag planning.
> 
> https://github.com/tianocore/tianocore.github.io/wiki/EDK-II-Release-Planning 
> 

I've refreshed the bugfix/feature list up to edk2 commit 3db76e6476e4
(wiki commit bbcacb2a60d7).

If something is missing, please let me know.

Laszlo



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Re: [edk2-devel] [PATCH V3 0/4] Add New Memory Attributes

2023-11-17 Thread Dhaval Sharma

Hi,
I wanted to revisit this thread and I am maintaining the context as there are a 
lot of details already mentioned here regarding EFI_MEMORY_SP.
Other than what has been addressed here, we also would like to have an option 
in edk2 to *avoid* using this type of memory for its own purposes. This seems 
like one of the motivations for original request and is being honored by OS 
today but not edk2 as it does not have any specific implementation today which 
takes this attribute into consideration.
I would like to add PCD based implementation which informs edk2 NOT to use this 
memory for its own purposes and leave it alone (as still available memory to 
OS).

Specific-purpose memory (SPM). The memory is earmarked for
specific purposes such as for specific device drivers or applications.
The SPM attribute serves as a hint to the OS to avoid allocating this
memory for core OS data or code that can not be relocated.
Prolonged use of this memory for purposes other than the intended
purpose may result in suboptimal platform performance.

Some more context:
https://lwn.net/Articles/784971/


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