[Patch 2/3_v2]: [DRM/I915] : Sync the panel fitting property with 2D driver

2009-03-23 Thread yakui_zhao
Subject: DRM/I915: Sync the panel fitting property with 2D driver
From: Zhao Yakui yakui.z...@intel.com

 Sync the panel fitting property with 2D driver
 This covers:
 a. create the scaling mode property and attach it to LVDS
 b. add the support of panel fitting property for LVDS
 c. update the display mode according to the panel fitting mode

Fix the code-style based on Eric's suggestion.

Signed-off-by: Zhao Yakui yakui.z...@intel.com
---
 drivers/gpu/drm/i915/i915_reg.h   |   16 ++
 drivers/gpu/drm/i915/intel_lvds.c |  282 +++---
 2 files changed, 277 insertions(+), 21 deletions(-)

Index: linux-2.6/drivers/gpu/drm/i915/i915_reg.h
===
--- linux-2.6.orig/drivers/gpu/drm/i915/i915_reg.h  2009-03-23 
11:08:45.0 +0800
+++ linux-2.6/drivers/gpu/drm/i915/i915_reg.h   2009-03-23 11:09:37.0 
+0800
@@ -808,9 +808,25 @@
 #define   HORIZ_INTERP_MASK(3  6)
 #define   HORIZ_AUTO_SCALE (1  5)
 #define   PANEL_8TO6_DITHER_ENABLE (1  3)
+#define   PFIT_FILTER_FUZZY(0  24)
+#define   PFIT_SCALING_AUTO(0  26)
+#define   PFIT_SCALING_PROGRAMMED (1  26)
+#define   PFIT_SCALING_PILLAR  (2  26)
+#define   PFIT_SCALING_LETTER  (3  26)
 #define PFIT_PGM_RATIOS0x61234
 #define   PFIT_VERT_SCALE_MASK 0xfff0
 #define   PFIT_HORIZ_SCALE_MASK0xfff0
+/* Pre-965 */
+#definePFIT_VERT_SCALE_SHIFT   20
+#definePFIT_VERT_SCALE_MASK0xfff0
+#definePFIT_HORIZ_SCALE_SHIFT  4
+#definePFIT_HORIZ_SCALE_MASK   0xfff0
+/* 965+ */
+#definePFIT_VERT_SCALE_SHIFT_965   16
+#definePFIT_VERT_SCALE_MASK_9650x1fff
+#definePFIT_HORIZ_SCALE_SHIFT_965  0
+#definePFIT_HORIZ_SCALE_MASK_965   0x1fff
+
 #define PFIT_AUTO_RATIOS 0x61238
 
 /* Backlight control */
Index: linux-2.6/drivers/gpu/drm/i915/intel_lvds.c
===
--- linux-2.6.orig/drivers/gpu/drm/i915/intel_lvds.c2009-03-23 
11:08:45.0 +0800
+++ linux-2.6/drivers/gpu/drm/i915/intel_lvds.c 2009-03-23 11:19:40.0 
+0800
@@ -37,6 +37,21 @@
 #include i915_drm.h
 #include i915_drv.h
 
+/*
+ * the following four scaling options are defined.
+ * #define DRM_MODE_SCALE_NON_GPU  0
+ * #define DRM_MODE_SCALE_FULLSCREEN   1
+ * #define DRM_MODE_SCALE_NO_SCALE 2
+ * #define DRM_MODE_SCALE_ASPECT   3
+ */
+
+/* Private structure for the integrated LVDS support */
+struct intel_lvds_priv {
+   int fitting_mode;
+   u32 pfit_control;
+   u32 pfit_pgm_ratios;
+};
+
 /**
  * Sets the backlight level.
  *
@@ -160,10 +175,24 @@
  struct drm_display_mode *mode,
  struct drm_display_mode *adjusted_mode)
 {
+   /*
+* float point operation is not supported . So the PANEL_RATIO_FACTOR
+* is defined, which can avoid the float point computation when
+* calculating the panel ratio.
+*/
+#define PANEL_RATIO_FACTOR 8192
struct drm_device *dev = encoder-dev;
struct drm_i915_private *dev_priv = dev-dev_private;
struct intel_crtc *intel_crtc = to_intel_crtc(encoder-crtc);
struct drm_encoder *tmp_encoder;
+   struct intel_output *intel_output = enc_to_intel_output(encoder);
+   struct intel_lvds_priv *lvds_priv = intel_output-dev_priv;
+   u32 pfit_control = 0, pfit_pgm_ratios = 0;
+   int left_border = 0, right_border = 0, top_border = 0;
+   int bottom_border = 0;
+   bool border = 0;
+   int panel_ratio, desired_ratio, vert_scale, horiz_scale;
+   int horiz_ratio, vert_ratio;
 
/* Should never happen!! */
if (!IS_I965G(dev)  intel_crtc-pipe == 0) {
@@ -179,7 +208,9 @@
return false;
}
}
-
+   /* If we don't have a panel mode, there is nothing we can do */
+   if (dev_priv-panel_fixed_mode == NULL)
+   return true;
/*
 * If we have timings from the BIOS for the panel, put them in
 * to the adjusted mode.  The CRTC will be set up for this mode,
@@ -203,6 +234,191 @@
drm_mode_set_crtcinfo(adjusted_mode, CRTC_INTERLACE_HALVE_V);
}
 
+   /* Make sure pre-965s set dither correctly */
+   if (!IS_I965G(dev)) {
+   if (dev_priv-panel_wants_dither || dev_priv-lvds_dither)
+   pfit_control |= PANEL_8TO6_DITHER_ENABLE;
+   }
+
+   /* Native modes don't need fitting */
+   if (adjusted_mode-hdisplay == mode-hdisplay 
+   adjusted_mode-vdisplay == mode-vdisplay) {
+   pfit_pgm_ratios = 0;
+   border = 0;
+   goto out;
+   }
+
+   /* 

[Patch 1/3_v2]: [DRM/I915] : Sync the mode validation for INTERLACE/DBLSCAN

2009-03-23 Thread yakui_zhao
Subject: [DRM/I915]: Sync the mode validation for INTERLACE/DBLSCAN
From: Zhao Yakui yakui.z...@intel.com

 Sync the mode validation for INTERLACE/DBLSCAN
 This covers:
 Check whether the INTERLACE/DBLSCAN is supported by output device. If
not, the mode containing the flag of INTERLACE/DBLSCAN will be marked
as unsupported.
 
 Fix the code-style based on Eric's suggestion
Signed-off-by: Zhao Yakui yakui.z...@intel.com
---
 drivers/gpu/drm/drm_crtc_helper.c |   29 +
 1 file changed, 29 insertions(+)

Index: linux-2.6/drivers/gpu/drm/drm_crtc_helper.c
===
--- linux-2.6.orig/drivers/gpu/drm/drm_crtc_helper.c2009-03-23 
09:29:59.0 +0800
+++ linux-2.6/drivers/gpu/drm/drm_crtc_helper.c 2009-03-23 11:13:43.0 
+0800
@@ -42,6 +42,25 @@
   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
 };
 
+static void drm_mode_validate_flag(struct drm_connector *connector,
+  int flags)
+{
+   struct drm_display_mode *mode, *t;
+   if (flags == (DRM_MODE_FLAG_DBLSCAN | DRM_MODE_FLAG_INTERLACE))
+   return;
+
+   list_for_each_entry_safe(mode, t, connector-modes, head) {
+   if ((mode-flags  DRM_MODE_FLAG_INTERLACE) 
+   !(flags  DRM_MODE_FLAG_INTERLACE))
+   mode-status = MODE_NO_INTERLACE;
+   if ((mode-flags  DRM_MODE_FLAG_DBLSCAN) 
+   !(flags  DRM_MODE_FLAG_DBLSCAN))
+   mode-status = MODE_NO_DBLESCAN;
+   }
+
+   return;
+}
+
 /**
  * drm_helper_probe_connector_modes - get complete set of display modes
  * @dev: DRM device
@@ -72,6 +91,7 @@
struct drm_connector_helper_funcs *connector_funcs =
connector-helper_private;
int count = 0;
+   int mode_flags = 0;
 
DRM_DEBUG(%s\n, drm_get_connector_name(connector));
/* set all modes to the unverified state */
@@ -96,6 +116,15 @@
if (maxX  maxY)
drm_mode_validate_size(dev, connector-modes, maxX,
   maxY, 0);
+
+   {
+   if (connector-interlace_allowed)
+   mode_flags |= DRM_MODE_FLAG_INTERLACE;
+   if (connector-doublescan_allowed)
+   mode_flags |= DRM_MODE_FLAG_DBLSCAN;
+   drm_mode_validate_flag(connector, mode_flags);
+   }
+
list_for_each_entry_safe(mode, t, connector-modes, head) {
if (mode-status == MODE_OK)
mode-status = connector_funcs-mode_valid(connector,



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[Patch 3/3_v2]: [DRM/I915] : Sync the default modes for LVDS output device

2009-03-23 Thread yakui_zhao
Subject: [DRM/I915]: Sync the default modes for LVDS output device
From: Zhao Yakui yakui.z...@intel.com

Sync the default modes for the LVDS output device
This covers:
Add the default modes for the LVDS output device.
The bit of edid-feature.msc indicates whether the display device is not
continous-frequency. And it is used to determine whether the default modes will
be added to the output device.
But for the LVDS output device the edid-feature.msc will always be set.Even
when there is no edid, the correponding bit in the fake edid will be set.
In such case the default modes will be added to LVDS output device.
If not, the different modes are obtained by using KMS/UMS.

Signed-off-by: Zhao Yakui yakui.z...@intel.com
---
 drivers/gpu/drm/i915/intel_lvds.c |  425 +-
 1 file changed, 416 insertions(+), 9 deletions(-)

Index: linux-2.6/drivers/gpu/drm/i915/intel_lvds.c
===
--- linux-2.6.orig/drivers/gpu/drm/i915/intel_lvds.c2009-03-23 
11:19:40.0 +0800
+++ linux-2.6/drivers/gpu/drm/i915/intel_lvds.c 2009-03-23 11:25:28.0 
+0800
@@ -36,6 +36,381 @@
 #include intel_drv.h
 #include i915_drm.h
 #include i915_drv.h
+/*
+ * the default modes, which is based on the file of
+ * xserver/xfree86/common/xf86DefModeSet.c.
+ */
+static struct drm_display_mode default_modes[] = {
+   /* 640x...@85hz */
+   { DRM_MODE(640x350, DRM_MODE_TYPE_DRIVER, 31500, 640, 672,
+  736, 832, 0, 350, 382, 385, 445, 0,
+  DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
+   /* 320x...@85hz */
+   { DRM_MODE(320x175, DRM_MODE_TYPE_DRIVER, 15750, 320, 336,
+  368, 416, 0, 175, 191, 192, 222, 0,
+  DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC |
+   DRM_MODE_FLAG_DBLSCAN) },
+   /* 640x...@85hz */
+   { DRM_MODE(640x400, DRM_MODE_TYPE_DRIVER, 31500, 640, 672,
+  736, 832, 0, 400, 401, 405, 445, 0,
+  DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
+   /* 320x...@85hz */
+   { DRM_MODE(320x200, DRM_MODE_TYPE_DRIVER, 15750, 320, 336,
+  368, 416, 0, 200, 200, 202, 222, 0,
+  DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC |
+   DRM_MODE_FLAG_DBLSCAN) },
+   /* 720x...@85hz */
+   { DRM_MODE(720x400, DRM_MODE_TYPE_DRIVER, 35500, 720, 756,
+  828, 936, 0, 400, 401, 405, 446, 0,
+  DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
+   /* 360x...@85hz */
+   { DRM_MODE(360x200, DRM_MODE_TYPE_DRIVER, 17750, 360, 378,
+  414, 468, 0, 200, 200, 202, 223, 0,
+  DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC |
+   DRM_MODE_FLAG_DBLSCAN) },
+   /* 640x...@60hz */
+   { DRM_MODE(640x480, DRM_MODE_TYPE_DRIVER, 25175, 600, 656,
+  752, 800, 0, 480, 490, 492, 525, 0,
+  DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
+   /* 320x...@60hz */
+   { DRM_MODE(320x240, DRM_MODE_TYPE_DRIVER, 12587, 320, 328,
+  376, 400, 0, 240, 245, 246, 262, 0,
+  DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC |
+   DRM_MODE_FLAG_DBLSCAN) },
+   /* 640x...@72hz */
+   { DRM_MODE(640x480, DRM_MODE_TYPE_DRIVER, 31500, 640, 664,
+  704, 832, 0, 480, 489, 492, 520, 0,
+  DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
+   /* 320x...@72hz */
+   { DRM_MODE(320x240, DRM_MODE_TYPE_DRIVER, 15750, 320, 332,
+  352, 416, 0, 240, 244, 246, 260, 0,
+  DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC |
+   DRM_MODE_FLAG_DBLSCAN) },
+   /* 640x...@75hz */
+   { DRM_MODE(640x480, DRM_MODE_TYPE_DRIVER, 31500, 640, 656,
+  720, 840, 0, 480, 481, 484, 500, 0,
+  DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
+   /* 320x...@75hz */
+   { DRM_MODE(320x240, DRM_MODE_TYPE_DRIVER, 15750, 320, 328,
+  360, 420, 0, 240, 240, 242, 250, 0,
+  DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC |
+   DRM_MODE_FLAG_DBLSCAN) },
+   /* 640x...@85hz */
+   { DRM_MODE(640x480, DRM_MODE_TYPE_DRIVER, 36000, 640, 696,
+  752, 832, 0, 480, 481, 484, 509, 0,
+  DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
+   /* 320x...@85hz */
+   { DRM_MODE(320x240, DRM_MODE_TYPE_DRIVER, 18000, 320, 348,
+  376, 416, 0, 240, 240, 242, 254, 0,
+  DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC |
+   DRM_MODE_FLAG_DBLSCAN) },
+   /* 800x...@56hz */
+   { DRM_MODE(800x600, DRM_MODE_TYPE_DRIVER, 36000, 800, 824,
+

Re: 2.6.29-rc breaks STD using Intel 945

2009-03-23 Thread Rolf Eike Beer
Sitsofe Wheeler wrote:
 On Sun, Mar 08, 2009 at 07:02:17PM +0100, Rolf Eike Beer wrote:
  Sitsofe Wheeler wrote:
   On Wed, Mar 04, 2009 at 08:20:56PM +0100, Rolf Eike Beer wrote:
I tested several snapshots post 2.6.28 and all of them show one
severe problem: resume from disk is not always successful. Only about
50% of the resume attempts work, in the other cases I just get a
completely black screen, can't switch to text console or anything.
What I often get is a line like this in the logs directly before
suspend:
  
   Does this happen when X hasn't been started and you suspend to disk
   then resume?
 
  I tested several times without X, with X running only in backgroud (i.e.
  me initiating the suspend from console) and from xdm only. Never it
  froze. That leads me to the conclusion that it is probably related to
  composite. I'm

 Hmm. Does switching to and then back from a virtual terminal also break?

Nope, works fine (testing current git).

Eike


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Re: [Patch 3/3]: [DRM/I915] : Sync the default modes for LVDS output device

2009-03-23 Thread yakui_zhao
On Sat, 2009-03-21 at 03:59 +0800, Eric Anholt wrote:
 On Fri, 2009-03-20 at 14:13 +0800, yakui_zhao wrote:
  Subject: [DRM/I915]: Sync the default modes for LVDS output device
  From: Zhao Yakui yakui.z...@intel.com
  
  Sync the default modes for the LVDS output device
  This covers:
  Add the default modes for the LVDS output device.
  The bit of edid-feature.msc indicates whether the display device is not
  continous-frequency. And it is used to determine whether the default modes 
  will
  be added to the output device.
  But for the LVDS output device the edid-feature.msc will always be 
  set.Even
  when there is no edid, the corresponding bit in the fake edid will be set.
  In such case the default modes will be added to LVDS output device.
  If not, the modes obtained by using KMS/UMS will be different.
 
 Similar whitespace concerns in this and the previous patch as the first,
 plus a couple of review comments below.
 
  Signed-off-by: Zhao Yakui yakui.z...@intel.com
  ---
   drivers/gpu/drm/i915/intel_lvds.c |  422 
  +-
   1 file changed, 412 insertions(+), 10 deletions(-)
  
  Index: linux-2.6/drivers/gpu/drm/i915/intel_lvds.c
  ===
  --- linux-2.6.orig/drivers/gpu/drm/i915/intel_lvds.c2009-03-20 
  11:51:53.0 +0800
  +++ linux-2.6/drivers/gpu/drm/i915/intel_lvds.c 2009-03-20 
  13:36:03.0 +0800
  @@ -36,6 +36,381 @@
   #include intel_drv.h
   #include i915_drm.h
   #include i915_drv.h
  +/*
  + * the default modes, which is based on the file of
  + * xserver/xfree86/common/xf86DefModeSet.c.
  + */
  +static struct drm_display_mode default_modes[] = {
  +   /* 640x...@85hz */
  +   { DRM_MODE(640x350, DRM_MODE_TYPE_DRIVER, 31500, 640, 672,
  +  736, 832, 0, 350, 382, 385, 445, 0,
  +  DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  +   /* 320x...@85hz */
  +   { DRM_MODE(320x175, DRM_MODE_TYPE_DRIVER, 15750, 320, 336,
  +  368, 416, 0, 175, 191, 192, 222, 0,
  +  DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC |
  +   DRM_MODE_FLAG_DBLSCAN) },
  +   /* 640x...@85hz */
  +   { DRM_MODE(640x400, DRM_MODE_TYPE_DRIVER, 31500, 640, 672,
  +  736, 832, 0, 400, 401, 405, 445, 0,
  +  DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  +   /* 320x...@85hz */
  +   { DRM_MODE(320x200, DRM_MODE_TYPE_DRIVER, 15750, 320, 336,
  +  368, 416, 0, 200, 200, 202, 222, 0,
  +  DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC |
  +   DRM_MODE_FLAG_DBLSCAN) },
  +   /* 720x...@85hz */
  +   { DRM_MODE(720x400, DRM_MODE_TYPE_DRIVER, 35500, 720, 756,
  +  828, 936, 0, 400, 401, 405, 446, 0,
  +  DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  +   /* 360x...@85hz */
  +   { DRM_MODE(360x200, DRM_MODE_TYPE_DRIVER, 17750, 360, 378,
  +  414, 468, 0, 200, 200, 202, 223, 0,
  +  DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC |
  +   DRM_MODE_FLAG_DBLSCAN) },
  +   /* 640x...@60hz */
  +   { DRM_MODE(640x480, DRM_MODE_TYPE_DRIVER, 25175, 600, 656,
  +  752, 800, 0, 480, 490, 492, 525, 0,
  +  DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  +   /* 320x...@60hz */
  +   { DRM_MODE(320x240, DRM_MODE_TYPE_DRIVER, 12587, 320, 328,
  +  376, 400, 0, 240, 245, 246, 262, 0,
  +  DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC |
  +   DRM_MODE_FLAG_DBLSCAN) },
  +   /* 640x...@72hz */
  +   { DRM_MODE(640x480, DRM_MODE_TYPE_DRIVER, 31500, 640, 664,
  +  704, 832, 0, 480, 489, 492, 520, 0,
  +  DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  +   /* 320x...@72hz */
  +   { DRM_MODE(320x240, DRM_MODE_TYPE_DRIVER, 15750, 320, 332,
  +  352, 416, 0, 240, 244, 246, 260, 0,
  +  DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC |
  +   DRM_MODE_FLAG_DBLSCAN) },
  +   /* 640x...@75hz */
  +   { DRM_MODE(640x480, DRM_MODE_TYPE_DRIVER, 31500, 640, 656,
  +  720, 840, 0, 480, 481, 484, 500, 0,
  +  DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  +   /* 320x...@75hz */
  +   { DRM_MODE(320x240, DRM_MODE_TYPE_DRIVER, 15750, 320, 328,
  +  360, 420, 0, 240, 240, 242, 250, 0,
  +  DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC |
  +   DRM_MODE_FLAG_DBLSCAN) },
  +   /* 640x...@85hz */
  +   { DRM_MODE(640x480, DRM_MODE_TYPE_DRIVER, 36000, 640, 696,
  +  752, 832, 0, 480, 481, 484, 509, 0,
  +  DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  +   /* 320x...@85hz */
  +   { DRM_MODE(320x240, DRM_MODE_TYPE_DRIVER, 18000, 320, 348,
  +  376, 416, 0, 240, 240, 242, 254, 0,
  +  

[PATCH resend] drm/intel: only set TV mode when any property changed

2009-03-23 Thread Zhenyu Wang
If there's no real property change, don't need to set TV mode again.
(Fixed one checkpatch warning.)

Signed-off-by: Zhenyu Wang zhenyu.z.w...@intel.com
---
 drivers/gpu/drm/i915/intel_tv.c |   27 ---
 1 files changed, 20 insertions(+), 7 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_tv.c b/drivers/gpu/drm/i915/intel_tv.c
index ceca947..5d9ca77 100644
--- a/drivers/gpu/drm/i915/intel_tv.c
+++ b/drivers/gpu/drm/i915/intel_tv.c
@@ -1571,32 +1571,45 @@ intel_tv_set_property(struct drm_connector *connector, 
struct drm_property *prop
struct intel_output *intel_output = to_intel_output(connector);
struct intel_tv_priv *tv_priv = intel_output-dev_priv;
int ret = 0;
+   bool changed = false;
 
ret = drm_connector_property_set_value(connector, property, val);
if (ret  0)
goto out;
 
-   if (property == dev-mode_config.tv_left_margin_property)
+   if (property == dev-mode_config.tv_left_margin_property 
+   tv_priv-margin[TV_MARGIN_LEFT] != val) {
tv_priv-margin[TV_MARGIN_LEFT] = val;
-   else if (property == dev-mode_config.tv_right_margin_property)
+   changed = true;
+   } else if (property == dev-mode_config.tv_right_margin_property 
+   tv_priv-margin[TV_MARGIN_RIGHT] != val) {
tv_priv-margin[TV_MARGIN_RIGHT] = val;
-   else if (property == dev-mode_config.tv_top_margin_property)
+   changed = true;
+   } else if (property == dev-mode_config.tv_top_margin_property 
+   tv_priv-margin[TV_MARGIN_TOP] != val) {
tv_priv-margin[TV_MARGIN_TOP] = val;
-   else if (property == dev-mode_config.tv_bottom_margin_property)
+   changed = true;
+   } else if (property == dev-mode_config.tv_bottom_margin_property 
+   tv_priv-margin[TV_MARGIN_BOTTOM] != val) {
tv_priv-margin[TV_MARGIN_BOTTOM] = val;
-   else if (property == dev-mode_config.tv_mode_property) {
+   changed = true;
+   } else if (property == dev-mode_config.tv_mode_property) {
if (val = NUM_TV_MODES) {
ret = -EINVAL;
goto out;
}
+   if (!strcmp(tv_priv-tv_format, tv_modes[val].name))
+   goto out;
+
tv_priv-tv_format = tv_modes[val].name;
-   intel_tv_mode_set(intel_output-enc, NULL, NULL);
+   changed = true;
} else {
ret = -EINVAL;
goto out;
}
 
-   intel_tv_mode_set(intel_output-enc, NULL, NULL);
+   if (changed)
+   intel_tv_mode_set(intel_output-enc, NULL, NULL);
 out:
return ret;
 }
-- 
1.5.6.5


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[PATCH] drm/intel: fix TV mode setting in property change

2009-03-23 Thread Zhenyu Wang
Only set TV DAC in property change seems doesn't work, we have to
setup whole crtc pipe which assigned to TV alone.

Signed-off-by: Zhenyu Wang zhenyu.z.w...@intel.com
---
 drivers/gpu/drm/i915/intel_tv.c |7 +--
 1 files changed, 5 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_tv.c b/drivers/gpu/drm/i915/intel_tv.c
index 5d9ca77..d2c3298 100644
--- a/drivers/gpu/drm/i915/intel_tv.c
+++ b/drivers/gpu/drm/i915/intel_tv.c
@@ -1570,6 +1570,8 @@ intel_tv_set_property(struct drm_connector *connector, 
struct drm_property *prop
struct drm_device *dev = connector-dev;
struct intel_output *intel_output = to_intel_output(connector);
struct intel_tv_priv *tv_priv = intel_output-dev_priv;
+   struct drm_encoder *encoder = intel_output-enc;
+   struct drm_crtc *crtc = encoder-crtc;
int ret = 0;
bool changed = false;
 
@@ -1608,8 +1610,9 @@ intel_tv_set_property(struct drm_connector *connector, 
struct drm_property *prop
goto out;
}
 
-   if (changed)
-   intel_tv_mode_set(intel_output-enc, NULL, NULL);
+   if (changed  crtc)
+   drm_crtc_helper_set_mode(crtc, crtc-mode, crtc-x,
+   crtc-y, crtc-fb);
 out:
return ret;
 }
-- 
1.5.6.5


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Re: radeon-rewrite branch merging.

2009-03-23 Thread Michel Dänzer

Another issue starting qtdemo from Qt 4.5:

qtdemo: radeon_lock.c:66: radeonGetLock: Assertion `drawable != ((void *)0)' 
failed.

Program received signal SIGABRT, Aborted.
0x0ec9542c in *__GI_raise (sig=6) at ../nptl/sysdeps/unix/sysv/linux/raise.c:64
64  ../nptl/sysdeps/unix/sysv/linux/raise.c: No such file or directory.
in ../nptl/sysdeps/unix/sysv/linux/raise.c
(gdb) bt
#0  0x0ec9542c in *__GI_raise (sig=6) at 
../nptl/sysdeps/unix/sysv/linux/raise.c:64
#1  0x0ec970c4 in *__GI_abort () at abort.c:88
#2  0x0ec8c328 in *__GI___assert_fail (assertion=0xde7f744 drawable != ((void 
*)0), file=0xde7f75c radeon_lock.c, line=66, function=0xde7f734 
radeonGetLock) at assert.c:78
#3  0x0dcb42b4 in radeonGetLock (rmesa=0x100f0d20, flags=value optimized out) 
at radeon_lock.c:66
#4  0x0dcb4348 in radeon_lock_hardware (radeon=value optimized out) at 
radeon_lock.c:112
#5  0x0dcb113c in rcommonFlushCmdBuf (rmesa=0x100f0d20, caller=0xde79854 
r300DestroyContext) at radeon_common.c:997
#6  0x0dc8168c in r300DestroyContext (driContextPriv=value optimized out) at 
r300_context.c:496
#7  0x0dc80124 in radeonDestroyContext (driContextPriv=value optimized out) 
at radeon_screen.c:1393
#8  0x0dc78f8c in driDestroyContext (pcp=0x100ebcc8) at ../common/dri_util.c:531
#9  0x0e8e8804 in driDestroyContext (context=0x100b5d08, psc=value optimized 
out, dpy=value optimized out) at dri_glx.c:444
#10 0x0e8b7ac8 in DestroyContext (dpy=0x10078c50, gc=0x100a7e38) at 
glxcmds.c:528
#11 0x0fe7e8e4 in QGLContext::reset (this=0x100a85b8) at qgl_x11.cpp:640
#12 0x0fe47098 in ~QGLContext (this=0x100a85b8) at qgl.cpp:1532
#13 0x0fe40c3c in ~QGLWidget (this=0x6f8281b8) at qgl.cpp:2795
#14 0x1002f2d0 in ?? ()
#15 0x10030190 in ?? ()
#16 0x1000b344 in ?? ()
#17 0x0ec7cae4 in generic_start_main (main=0x1000b2f0 _init+448, argc=1, 
ubp_av=0x6f828644, auxvec=0x6f828758, init=0x10034160, fini=value optimized 
out, rtld_fini=value optimized out, 
stack_end=value optimized out) at ../csu/libc-start.c:222
#18 0x0ec7cca0 in __libc_start_main (argc=value optimized out, ubp_av=value 
optimized out, ubp_ev=value optimized out, auxvec=value optimized out, 
rtld_fini=value optimized out, 
stinfo=value optimized out, stack_on_entry=value optimized out) at 
../sysdeps/unix/sysv/linux/powerpc/libc-start.c:92
#19 0x in ?? ()


Works with master.


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[Bug 14076] GL_OUT_OF_MEMORY crash with R300 driver and Lineage II under Wine

2009-03-23 Thread bugzilla-daemon
http://bugs.freedesktop.org/show_bug.cgi?id=14076


Maciej Cencora m.cenc...@gmail.com changed:

   What|Removed |Added

 Status|NEW |RESOLVED
 Resolution||NOTOURBUG




--- Comment #4 from Maciej Cencora m.cenc...@gmail.com  2009-03-23 01:44:37 
PST ---
It is wine's bug. Closing


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Re: 2.6.28-rc1: [drm:i915] *ERROR* ... Disabling tiling

2009-03-23 Thread Alan Jenkins
On 10/27/08, Eric Anholt e...@anholt.net wrote:
 On Mon, 2008-10-27 at 14:27 +, Alan Jenkins wrote:
 What does this mean, should I do anything about it?  Is tiling nice to
 have?

 It sounds like GEM broke something - though maybe it just added a more
 verbose error report.

 System: EeePC 701
 Kernel: v2.6.28-rc1-5-g23cf24c
 Chipset: Intel mobile 915G-something
 Regretably necessary kernel boot option: noapic


 [1.438441] Linux agpgart interface v0.103
 [1.438441] agpgart-intel :00:00.0: Intel 915GM Chipset
 [1.438441] agpgart-intel :00:00.0: detected 7932K stolen memory
 [1.443353] agpgart-intel :00:00.0: AGP aperture is 256M @
 0xd000
 [1.443353] [drm] Initialized drm 1.1.0 20060810
 [1.443353] pci :00:02.0: PCI INT A - Link[LNKA] - GSI 5
 (level, low) - IRQ 5
 [1.443353] pci :00:02.0: setting latency timer to 64
 [1.443353] [drm:i915_gem_detect_bit_6_swizzle] *ERROR* Couldn't read
 from MCHBAR.  Disabling
 tiling.

 This means that something went wrong with our detection of the
 CPU-versus-GPU tiling swizzling mode, and object tiling under GEM will
 be disabled as a result.  I should get access to an eee 7xx on Thursday
 to see what's up with it -- it's supposed to be just a normal 915gm as
 far as I know.

Any news about this tiling error?

It's already been reported as a bug in Ubuntu Jaunty, in the belief
that it reduces video performance [1], and is also mentioned on a
similar bug in Fedora [2].

[1] https://bugzilla.redhat.com/show_bug.cgi?id=444328#c37
[2] 
https://bugs.launchpad.net/ubuntu/+source/xserver-xorg-video-intel/+bug/329266

Thanks
Alan

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Re: 2.6.28-rc1: [drm:i915] *ERROR* ... Disabling tiling

2009-03-23 Thread Alan Jenkins
On 3/23/09, Alan Jenkins sourcejedi.l...@googlemail.com wrote:
 On 10/27/08, Eric Anholt e...@anholt.net wrote:
 On Mon, 2008-10-27 at 14:27 +, Alan Jenkins wrote:
 What does this mean, should I do anything about it?  Is tiling nice to
 have?

 It sounds like GEM broke something - though maybe it just added a more
 verbose error report.

 System: EeePC 701
 Kernel: v2.6.28-rc1-5-g23cf24c
 Chipset: Intel mobile 915G-something
 Regretably necessary kernel boot option: noapic


 [1.438441] Linux agpgart interface v0.103
 [1.438441] agpgart-intel :00:00.0: Intel 915GM Chipset
 [1.438441] agpgart-intel :00:00.0: detected 7932K stolen memory
 [1.443353] agpgart-intel :00:00.0: AGP aperture is 256M @
 0xd000
 [1.443353] [drm] Initialized drm 1.1.0 20060810
 [1.443353] pci :00:02.0: PCI INT A - Link[LNKA] - GSI 5
 (level, low) - IRQ 5
 [1.443353] pci :00:02.0: setting latency timer to 64
 [1.443353] [drm:i915_gem_detect_bit_6_swizzle] *ERROR* Couldn't read
 from MCHBAR.  Disabling
 tiling.

 This means that something went wrong with our detection of the
 CPU-versus-GPU tiling swizzling mode, and object tiling under GEM will
 be disabled as a result.  I should get access to an eee 7xx on Thursday
 to see what's up with it -- it's supposed to be just a normal 915gm as
 far as I know.

 Any news about this tiling error?

 It's already been reported as a bug in Ubuntu Jaunty, in the belief
 that it reduces video performance [1], and is also mentioned on a
 similar bug in Fedora [2].

 [1] https://bugzilla.redhat.com/show_bug.cgi?id=444328#c37
 [2]
 https://bugs.launchpad.net/ubuntu/+source/xserver-xorg-video-intel/+bug/329266

Ah, I should also mention that I still see the error on the latest RC,
2.6.29-rc8.

Alan

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[Bug 11877] [i965 texture_srgb] texture_srgb glGetTexImage failed for internalFormat GL_SRGB_EXT

2009-03-23 Thread bugzilla-daemon
http://bugs.freedesktop.org/show_bug.cgi?id=11877





--- Comment #18 from Roland Scheidegger srol...@tungstengraphics.com  
2009-03-23 06:58:46 PST ---
(In reply to comment #17)
 Mesa:(mesa_7_4_branch)a8528a2e8653b5237c1d1d66fe98c6e031d007f9

should be fixed in mesa master however.


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[Bug 12920] New: savage: mmap2 of /dev/dri/card0 fails with EAGAIN since 2.6.29-rc6

2009-03-23 Thread bugme-daemon
http://bugzilla.kernel.org/show_bug.cgi?id=12920

   Summary: savage: mmap2 of /dev/dri/card0 fails with EAGAIN since
2.6.29-rc6
   Product: Drivers
   Version: 2.5
 KernelVersion: 2.6.29-rc6
  Platform: All
OS/Version: Linux
  Tree: Mainline
Status: NEW
  Severity: normal
  Priority: P1
 Component: Video(DRI)
AssignedTo: drivers_video-...@kernel-bugs.osdl.org
ReportedBy: avill...@ceibo.fiec.espol.edu.ec


Latest working kernel version: 2.6.29-rc5
Earliest failing kernel version: 2.6.29-rc6
Distribution: Fedora 10 i386
Hardware Environment:

/proc/cpuinfo:
processor   : 0
vendor_id   : GenuineIntel
cpu family  : 15
model   : 1
model name  : Intel(R) Pentium(R) 4 CPU 1.70GHz
stepping: 2
cpu MHz : 1700.047
cache size  : 256 KB
fdiv_bug: no
hlt_bug : no
f00f_bug: no
coma_bug: no
fpu : yes
fpu_exception   : yes
cpuid level : 2
wp  : yes
flags   : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov
pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pebs bts
bogomips: 3400.09
clflush size: 64
power management:

/proc/iomem:
- : reserved
0001-0009fbff : System RAM
0009fc00-0009 : reserved
000a-000b : Video RAM area
000c-000cbfff : Video ROM
000f-000f : reserved
  000f-000f : System ROM
0010-1f7e : System RAM
  0040-0068676c : Kernel code
  0068676d-007eca67 : Kernel data
  00838000-00c3fd83 : Kernel bss
1f7f-1f7f7fff : ACPI Tables
1f7f8000-1f7f : ACPI Non-volatile Storage
ceb0-debf : PCI Bus :01
  d000-d7ff : :01:00.0
d000-d06e : vesafb
ded0-deef : PCI Bus :01
  dee7-dee7 : :01:00.0
  dee8-deef : :01:00.0
df00-df7f : :00:09.0
dffe-dffe7fff : :00:09.0
dfffee00-dfffeeff : :00:12.0
  dfffee00-dfffeeff : via-rhine
dfffef00-dfffefff : :00:10.3
  dfffef00-dfffefff : ehci_hcd
d000-dfff : :00:09.0
e000-efff : :00:00.0
fec0-fec00fff : reserved
fee0-fee00fff : Local APIC
  fee0-fee00fff : reserved
fff8- : reserved

/proc/ioports:
-001f : dma1
0020-0021 : pic1
0040-0043 : timer0
0050-0053 : timer1
0060-0060 : keyboard
0064-0064 : keyboard
0070-0071 : rtc0
0080-008f : dma page reg
00a0-00a1 : pic2
00c0-00df : dma2
00f0-00ff : fpu
0170-0177 : :00:11.1
  0170-0177 : pata_via
01f0-01f7 : :00:11.1
  01f0-01f7 : pata_via
0201-0208 : ns558-pnp
0295-0296 : it87
  0295-0296 : it87
0330-0331 : MPU401 UART
0376-0376 : :00:11.1
  0376-0376 : pata_via
0378-037a : parport0
03c0-03df : vesafb
03f2-03f2 : floppy
03f4-03f5 : floppy
03f6-03f6 : :00:11.1
  03f6-03f6 : pata_via
03f7-03f7 : floppy
03f8-03ff : serial
0400-040f : :00:11.0
  0400-0407 : vt596_smbus
0800-087f : :00:11.0
  0800-0803 : ACPI PM1a_EVT_BLK
  0804-0805 : ACPI PM1a_CNT_BLK
  0808-080b : ACPI PM_TMR
  0810-0815 : ACPI CPU throttle
  0820-0823 : ACPI GPE0_BLK
0cf8-0cff : PCI conf1
cc00-ccff : :00:12.0
  cc00-ccff : via-rhine
d000-d0ff : :00:11.5
  d000-d0ff : VIA8233
d400-d41f : :00:10.0
  d400-d41f : uhci_hcd
d800-d81f : :00:10.1
  d800-d81f : uhci_hcd
dc00-dc1f : :00:10.2
  dc00-dc1f : uhci_hcd
e000-e007 : :00:0b.0
e400-e407 : :00:0b.0
  e400-e402 : parport1
  e403-e407 : parport1
e800-e81f : :00:0b.0
  e800-e807 : serial
  e808-e80f : serial
ec00-ecff : :00:09.0
fc00-fc0f : :00:11.1
  fc00-fc0f : pata_via

lspci -vvv
00:00.0 Host bridge: VIA Technologies, Inc. P4M266 Host Bridge
Subsystem: VIA Technologies, Inc. Device 
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr-
Stepping- SERR- FastB2B- DisINTx-
Status: Cap+ 66MHz+ UDF- FastB2B- ParErr- DEVSEL=medium TAbort-
TAbort- MAbort+ SERR- PERR- INTx-
Latency: 8
Region 0: Memory at e000 (32-bit, prefetchable) [size=256M]
Capabilities: [a0] AGP version 2.0
Status: RQ=32 Iso- ArqSz=0 Cal=0 SBA+ ITACoh- GART64- HTrans-
64bit- FW- AGP3- Rate=x1,x2,x4
Command: RQ=1 ArqSz=0 Cal=0 SBA- AGP+ GART64- 64bit- FW-
Rate=x4
Capabilities: [c0] Power Management version 2
Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA
PME(D0-,D1-,D2-,D3hot-,D3cold-)
Status: D0 PME-Enable- DSel=0 DScale=0 PME-
Kernel driver in use: agpgart-via
Kernel modules: via-agp

00:01.0 PCI bridge: VIA Technologies, Inc. VT8633 [Apollo Pro266 AGP] (prog-if
00 [Normal decode])
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr-
Stepping- SERR+ FastB2B- DisINTx-
Status: Cap+ 66MHz+ UDF- FastB2B- ParErr- DEVSEL=medium TAbort-
TAbort- MAbort+ SERR- PERR+ INTx-
Latency: 0
Bus: primary=00, secondary=01, subordinate=01, 

[Bug 12920] savage: mmap2 of /dev/dri/card0 fails with EAGAIN since 2.6.29-rc6

2009-03-23 Thread bugme-daemon
http://bugzilla.kernel.org/show_bug.cgi?id=12920


avill...@ceibo.fiec.espol.edu.ec changed:

   What|Removed |Added

 Regression|0   |1




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[Bug 12920] savage: mmap2 of /dev/dri/card0 fails with EAGAIN since 2.6.29-rc6

2009-03-23 Thread bugme-daemon
http://bugzilla.kernel.org/show_bug.cgi?id=12920





--- Comment #2 from avill...@ceibo.fiec.espol.edu.ec  2009-03-23 09:01 
---
Created an attachment (id=20643)
 -- (http://bugzilla.kernel.org/attachment.cgi?id=20643action=view)
dmesg output for 2.6.29-rc8 which also shows the bug.

I do not see any message that could point to some particular problem, because
similar messages appear in rc5, but I could be wrong.


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[Bug 12920] savage: mmap2 of /dev/dri/card0 fails with EAGAIN since 2.6.29-rc6

2009-03-23 Thread bugme-daemon
http://bugzilla.kernel.org/show_bug.cgi?id=12920


avill...@ceibo.fiec.espol.edu.ec changed:

   What|Removed |Added

  Attachment #20644|application/octet-stream|text/plain
  mime type||




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[Bug 12920] savage: mmap2 of /dev/dri/card0 fails with EAGAIN since 2.6.29-rc6

2009-03-23 Thread bugme-daemon
http://bugzilla.kernel.org/show_bug.cgi?id=12920





--- Comment #3 from avill...@ceibo.fiec.espol.edu.ec  2009-03-23 09:01 
---
Created an attachment (id=20644)
 -- (http://bugzilla.kernel.org/attachment.cgi?id=20644action=view)
Full xorg log when bug happens.


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[Bug 12920] savage: mmap2 of /dev/dri/card0 fails with EAGAIN since 2.6.29-rc6

2009-03-23 Thread bugme-daemon
http://bugzilla.kernel.org/show_bug.cgi?id=12920





--- Comment #5 from avill...@ceibo.fiec.espol.edu.ec  2009-03-23 09:07 
---
Created an attachment (id=20646)
 -- (http://bugzilla.kernel.org/attachment.cgi?id=20646action=view)
strace output that shows EAGAIN as error from mmap2


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[Bug 12920] savage: mmap2 of /dev/dri/card0 fails with EAGAIN since 2.6.29-rc6

2009-03-23 Thread bugme-daemon
http://bugzilla.kernel.org/show_bug.cgi?id=12920





--- Comment #6 from avill...@ceibo.fiec.espol.edu.ec  2009-03-23 09:08 
---
Sorry for double-posting the attachment. 

I attempted to bisect this bug over the weekend. This is what I got so far:

git bisect start
# bad: [fec6c6fec3e20637bee5d276fb61dd8b49a3f9cc] Linux 2.6.29-rc7
git bisect bad fec6c6fec3e20637bee5d276fb61dd8b49a3f9cc
# good: [d2f8d7ee1a9b4650b4e43325b321801264f7c37a] Linux 2.6.29-rc5
git bisect good d2f8d7ee1a9b4650b4e43325b321801264f7c37a
# bad: [ddf9499b3d1e655f212f22b0a703506fcac90b25] x86, Voyager: fix compile by
lifting the degeneracy of phys_cpu_present_map
git bisect bad ddf9499b3d1e655f212f22b0a703506fcac90b25
# bad: [ba95fd47d177d46743ad94055908d22840370e06] Merge branch 'for-linus' of
git://git.kernel.dk/linux-2.6-block
git bisect bad ba95fd47d177d46743ad94055908d22840370e06
# good: [48c0d9ece360ff6001e2ae36aa9b34446d0388a8] Merge
git://git.kernel.org/pub/scm/linux/kernel/git/mason/btrfs-unstable
git bisect good 48c0d9ece360ff6001e2ae36aa9b34446d0388a8
# bad: [82eb03cfd862a65363fa2826de0dbd5474cfe5e2] cciss: PCI power management
reset for kexec
git bisect bad 82eb03cfd862a65363fa2826de0dbd5474cfe5e2
# good: [8ce9a75a307e142a8871c649627555e0e4a1eefb] Merge branch
'core-fixes-for-linus' of
git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip
git bisect good 8ce9a75a307e142a8871c649627555e0e4a1eefb


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[Bug 12920] savage: mmap2 of /dev/dri/card0 fails with EAGAIN since 2.6.29-rc6

2009-03-23 Thread bugme-daemon
http://bugzilla.kernel.org/show_bug.cgi?id=12920





--- Comment #4 from avill...@ceibo.fiec.espol.edu.ec  2009-03-23 09:05 
---
Created an attachment (id=20645)
 -- (http://bugzilla.kernel.org/attachment.cgi?id=20645action=view)
strace output that shows EAGAIN as error from mmap2


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[Bug 12920] savage: mmap2 of /dev/dri/card0 fails with EAGAIN since 2.6.29-rc6

2009-03-23 Thread bugme-daemon
http://bugzilla.kernel.org/show_bug.cgi?id=12920





--- Comment #1 from avill...@ceibo.fiec.espol.edu.ec  2009-03-23 08:59 
---
Created an attachment (id=20642)
 -- (http://bugzilla.kernel.org/attachment.cgi?id=20642action=view)
Kernel configuration which succeeds in 2.6.29-rc5 and fails in 2.6.29-rc6 and
up.


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[Bug 12920] savage: mmap2 of /dev/dri/card0 fails with EAGAIN since 2.6.29-rc6

2009-03-23 Thread bugme-daemon
http://bugzilla.kernel.org/show_bug.cgi?id=12920





--- Comment #7 from a...@lxorguk.ukuu.org.uk  2009-03-23 10:44 ---
I'd take a bet on this being the PAT/mmap breakage again


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[Bug 12419] possible circular locking dependency on i915 dma

2009-03-23 Thread bugme-daemon
http://bugzilla.kernel.org/show_bug.cgi?id=12419


a...@lxorguk.ukuu.org.uk changed:

   What|Removed |Added

 Status|NEW |CLOSED
 Resolution||CODE_FIX




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[Bug 8427] Kernel Panic on shuting down with Xserver using i810 driver

2009-03-23 Thread bugme-daemon
http://bugzilla.kernel.org/show_bug.cgi?id=8427


a...@lxorguk.ukuu.org.uk changed:

   What|Removed |Added

 Status|NEW |REJECTED
 Resolution||INSUFFICIENT_DATA




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[Bug 11877] [i965 texture_srgb] texture_srgb glGetTexImage failed for internalFormat GL_SRGB_EXT

2009-03-23 Thread bugzilla-daemon
http://bugs.freedesktop.org/show_bug.cgi?id=11877





--- Comment #19 from Ian Romanick i...@freedesktop.org  2009-03-23 12:53:55 
PST ---
(In reply to comment #18)
 (In reply to comment #17)
  Mesa:(mesa_7_4_branch)a8528a2e8653b5237c1d1d66fe98c6e031d007f9
 
 should be fixed in mesa master however.

I believe that it is.  I was going to cherry-pick a few related commits to
mesa_7_4_branch, but they all had many conflicts.  I didn't feel like sorting
out all the conflicts, but I wouldn't stop someone else from doing it. ;)


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[PATCH] KMS: do a faster EDID

2009-03-23 Thread Arjan van de Ven
From a121507f31e37a809dfa21c9756aa83f36d7acbf Mon Sep 17 00:00:00 2001
From: Arjan van de Ven ar...@linux.intel.com
Date: Mon, 23 Mar 2009 13:37:20 -0700
Subject: [PATCH] KMS: do a faster EDID

for some outputs (like LVDS), the current delays in the EDID reader are way
overkill.

This patch makes the EDID reader try twice; first with a 5x faster probe, and
if that fails, it probes at the current speed. This reduces probe time on my 
LVDS
panel significantly.

Signed-off-by: Arjan van de Ven ar...@linux.intel.com
---
 drivers/gpu/drm/drm_edid.c |   22 +-
 1 files changed, 13 insertions(+), 9 deletions(-)

diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
index a839a28..069b189 100644
--- a/drivers/gpu/drm/drm_edid.c
+++ b/drivers/gpu/drm/drm_edid.c
@@ -588,20 +588,22 @@ static unsigned char *drm_ddc_read(struct i2c_adapter 
*adapter)
 {
struct i2c_algo_bit_data *algo_data = adapter-algo_data;
unsigned char *edid = NULL;
+   int divider = 5;
int i, j;
 
algo_data-setscl(algo_data-data, 1);
 
-   for (i = 0; i  1; i++) {
+   for (i = 0; i  2; i++) {
/* For some old monitors we need the
 * following process to initialize/stop DDC
 */
+
algo_data-setsda(algo_data-data, 1);
-   msleep(13);
+   msleep(13 / divider);
 
algo_data-setscl(algo_data-data, 1);
for (j = 0; j  5; j++) {
-   msleep(10);
+   msleep(10 / divider);
if (algo_data-getscl(algo_data-data))
break;
}
@@ -609,31 +611,33 @@ static unsigned char *drm_ddc_read(struct i2c_adapter 
*adapter)
continue;
 
algo_data-setsda(algo_data-data, 0);
-   msleep(15);
+   msleep(15 / divider);
algo_data-setscl(algo_data-data, 0);
-   msleep(15);
+   msleep(15  / divider);
algo_data-setsda(algo_data-data, 1);
-   msleep(15);
+   msleep(15 / divider);
 
/* Do the real work */
edid = drm_do_probe_ddc_edid(adapter);
algo_data-setsda(algo_data-data, 0);
algo_data-setscl(algo_data-data, 0);
-   msleep(15);
+   msleep(15 / divider);
 
algo_data-setscl(algo_data-data, 1);
for (j = 0; j  10; j++) {
-   msleep(10);
+   msleep(10 / divider);
if (algo_data-getscl(algo_data-data))
break;
}
 
algo_data-setsda(algo_data-data, 1);
-   msleep(15);
+   msleep(15 / divider);
algo_data-setscl(algo_data-data, 0);
algo_data-setsda(algo_data-data, 0);
+
if (edid)
break;
+   divider = 1;
}
/* Release the DDC lines when done or the Apple Cinema HD display
 * will switch off
-- 
1.6.0.6




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[PATCH] KMS: cache the EDID information of the LVDS

2009-03-23 Thread Arjan van de Ven
From eb512d6d953c8acc8abe1048862a92cec58d9791 Mon Sep 17 00:00:00 2001
From: Arjan van de Ven ar...@linux.intel.com
Date: Mon, 23 Mar 2009 13:38:49 -0700
Subject: [PATCH] KMS: cache the EDID information of the LVDS

you're not going to replace your LVDS at runtime. so this patch
caches the EDID information of the LVDS. An LVDS probe can easily take
200 milliseconds, and we do this multiple times during a system startup.

Signed-off-by: Arjan van de Ven ar...@linux.intel.com
---
 drivers/gpu/drm/i915/intel_drv.h   |1 +
 drivers/gpu/drm/i915/intel_lvds.c  |2 ++
 drivers/gpu/drm/i915/intel_modes.c |8 +++-
 3 files changed, 10 insertions(+), 1 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index 957daef..22a74bd 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -81,6 +81,7 @@ struct intel_output {
int type;
struct intel_i2c_chan *i2c_bus; /* for control functions */
struct intel_i2c_chan *ddc_bus; /* for DDC only stuff */
+   struct edid *edid;
bool load_detect_temp;
bool needs_tv_clock;
void *dev_priv;
diff --git a/drivers/gpu/drm/i915/intel_lvds.c 
b/drivers/gpu/drm/i915/intel_lvds.c
index 0d211af..dc4fecc 100644
--- a/drivers/gpu/drm/i915/intel_lvds.c
+++ b/drivers/gpu/drm/i915/intel_lvds.c
@@ -336,6 +336,7 @@ static void intel_lvds_destroy(struct drm_connector 
*connector)
intel_i2c_destroy(intel_output-ddc_bus);
drm_sysfs_connector_remove(connector);
drm_connector_cleanup(connector);
+   kfree(intel_output-edid);
kfree(connector);
 }
 
@@ -516,5 +517,6 @@ failed:
if (intel_output-ddc_bus)
intel_i2c_destroy(intel_output-ddc_bus);
drm_connector_cleanup(connector);
+   kfree(intel_output-edid);
kfree(connector);
 }
diff --git a/drivers/gpu/drm/i915/intel_modes.c 
b/drivers/gpu/drm/i915/intel_modes.c
index e42019e..83816a4 100644
--- a/drivers/gpu/drm/i915/intel_modes.c
+++ b/drivers/gpu/drm/i915/intel_modes.c
@@ -70,13 +70,19 @@ int intel_ddc_get_modes(struct intel_output *intel_output)
struct edid *edid;
int ret = 0;
 
+   if (intel_output-edid)
+   return ret;
+
edid = drm_get_edid(intel_output-base,
intel_output-ddc_bus-adapter);
if (edid) {
drm_mode_connector_update_edid_property(intel_output-base,
edid);
ret = drm_add_edid_modes(intel_output-base, edid);
-   kfree(edid);
+   if (intel_output-type == INTEL_OUTPUT_LVDS)
+   intel_output-edid = edid;
+   else
+   kfree(edid);
}
 
return ret;
-- 
1.6.0.6



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[PATCH] KMS: Do the actual mode setting from asynchronous context

2009-03-23 Thread Arjan van de Ven
From dfe256fc9d28f240f1a84fb4c3dfed4a4e18d5d4 Mon Sep 17 00:00:00 2001
From: Arjan van de Ven ar...@linux.intel.com
Date: Mon, 23 Mar 2009 13:32:47 -0700
Subject: [PATCH] KMS: Do the actual mode setting from asynchronous context

The mode setting (and the expensive part of mode detection) can take
quite a bit of time, and will delay the kernel boot quite a bit.

This patch puts these two parts into async context, so that the
normal execution of the system continues while the slow hardware
probing and poking happens.

Signed-off-by: Arjan van de Ven ar...@linux.intel.com
---
 drivers/gpu/drm/drm_crtc_helper.c |   50 ++--
 drivers/gpu/drm/drm_drv.c |4 +++
 include/drm/drmP.h|1 +
 3 files changed, 52 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/drm_crtc_helper.c 
b/drivers/gpu/drm/drm_crtc_helper.c
index 1c3a8c5..7aa3107 100644
--- a/drivers/gpu/drm/drm_crtc_helper.c
+++ b/drivers/gpu/drm/drm_crtc_helper.c
@@ -29,6 +29,8 @@
  *  Jesse Barnes jesse.bar...@intel.com
  */
 
+#include linux/async.h
+
 #include drmP.h
 #include drm_crtc.h
 #include drm_crtc_helper.h
@@ -42,6 +44,8 @@ static struct drm_display_mode std_modes[] = {
   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
 };
 
+LIST_HEAD(drm_async_list);
+
 /**
  * drm_helper_probe_connector_modes - get complete set of display modes
  * @dev: DRM device
@@ -137,6 +141,26 @@ int drm_helper_probe_connector_modes(struct drm_device 
*dev, uint32_t maxX,
 }
 EXPORT_SYMBOL(drm_helper_probe_connector_modes);
 
+int drm_helper_probe_connector_modes_fast(struct drm_device *dev, uint32_t 
maxX,
+ uint32_t maxY)
+{
+   struct drm_connector *connector;
+   int count = 0;
+
+   list_for_each_entry(connector, dev-mode_config.connector_list, head) {
+   count += drm_helper_probe_single_connector_modes(connector,
+maxX, maxY);
+   /*
+* If we found a 'good' connector, we stop probing futher.
+*/
+   if (count  0)
+   break;
+   }
+
+   return count;
+}
+EXPORT_SYMBOL(drm_helper_probe_connector_modes_fast);
+
 static void drm_helper_add_std_modes(struct drm_device *dev,
 struct drm_connector *connector)
 {
@@ -882,6 +906,24 @@ bool drm_helper_plugged_event(struct drm_device *dev)
/* FIXME: send hotplug event */
return true;
 }
+
+static void async_notify_fb_changed(void *data, async_cookie_t cookie)
+{
+   struct drm_device *dev = data;
+   /* Need to wait for async_probe_hard be done */
+   async_synchronize_cookie_domain(cookie, drm_async_list);
+   dev-mode_config.funcs-fb_changed(dev);
+}
+
+static void async_probe_hard(void *data, async_cookie_t cookie)
+{
+   struct drm_device *dev = data;
+   drm_helper_probe_connector_modes(dev,
+   dev-mode_config.max_width,
+   dev-mode_config.max_height);
+}
+
+
 /**
  * drm_initial_config - setup a sane initial connector configuration
  * @dev: DRM device
@@ -902,7 +944,7 @@ bool drm_helper_initial_config(struct drm_device *dev, bool 
can_grow)
struct drm_connector *connector;
int count = 0;
 
-   count = drm_helper_probe_connector_modes(dev,
+   count = drm_helper_probe_connector_modes_fast(dev,
 dev-mode_config.max_width,
 dev-mode_config.max_height);
 
@@ -920,8 +962,10 @@ bool drm_helper_initial_config(struct drm_device *dev, 
bool can_grow)
 
drm_setup_crtcs(dev);
 
-   /* alert the driver fb layer */
-   dev-mode_config.funcs-fb_changed(dev);
+   /* probe further outputs asynchronously */
+   async_schedule_domain(async_probe_hard, dev, drm_async_list);
+   /* alert the driver fb layer to actually change the mode */
+   async_schedule_domain(async_notify_fb_changed, dev, drm_async_list);
 
return 0;
 }
diff --git a/drivers/gpu/drm/drm_drv.c b/drivers/gpu/drm/drm_drv.c
index 14c7a23..ef52021 100644
--- a/drivers/gpu/drm/drm_drv.c
+++ b/drivers/gpu/drm/drm_drv.c
@@ -48,6 +48,7 @@
 
 #include drmP.h
 #include drm_core.h
+#include linux/async.h
 
 static int drm_version(struct drm_device *dev, void *data,
   struct drm_file *file_priv);
@@ -345,6 +346,9 @@ void drm_exit(struct drm_driver *driver)
struct drm_device *dev, *tmp;
DRM_DEBUG(\n);
 
+   /* make sure all async DRM operations are finished */
+   async_synchronize_full_domain(drm_async_list);
+
list_for_each_entry_safe(dev, tmp, driver-device_list, driver_item)
drm_cleanup(dev);
 
diff --git a/include/drm/drmP.h b/include/drm/drmP.h
index e5f4ae9..69ce4f4 100644
--- a/include/drm/drmP.h
+++ 

[PATCH] KMS: register the LVDS before the CRT

2009-03-23 Thread Arjan van de Ven
From 785bb9f968ead288395ead4f921d7c1fb794ee71 Mon Sep 17 00:00:00 2001
From: Arjan van de Ven ar...@linux.intel.com
Date: Mon, 23 Mar 2009 13:34:46 -0700
Subject: [PATCH] KMS: register the LVDS before the CRT

for the cases where the user only really cares about lighting up one output,
or only one output at first, lighting up the LVDS (which only gets detected
with lid-up) rather than the CRT is the right answer.

This patch flips their order of registration so that this becomes possible.

Signed-off-by: Arjan van de Ven ar...@linux.intel.com
---
 drivers/gpu/drm/i915/intel_display.c |6 +++---
 1 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_display.c 
b/drivers/gpu/drm/i915/intel_display.c
index a283427..c0ab079 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -1466,12 +1466,12 @@ static void intel_setup_outputs(struct drm_device *dev)
struct drm_i915_private *dev_priv = dev-dev_private;
struct drm_connector *connector;
 
-   intel_crt_init(dev);
-
-   /* Set up integrated LVDS */
+   /* Set up integrated LVDS -- will skip if the lid is closed */
if (IS_MOBILE(dev)  !IS_I830(dev))
intel_lvds_init(dev);
 
+   intel_crt_init(dev);
+
if (IS_I9XX(dev)) {
int found;
 
-- 
1.6.0.6




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[PATCH] KMS: clean up udelay usage

2009-03-23 Thread Arjan van de Ven
From 04795556b9ef5cd036a182535d04c4c853b61c96 Mon Sep 17 00:00:00 2001
From: Arjan van de Ven ar...@linux.intel.com
Date: Mon, 23 Mar 2009 13:36:25 -0700
Subject: [PATCH] KMS: clean up udelay usage

udelay() of 20 milliseconds really ought to just use mdelay(), that avoids
the various wrap scenarios and also is more readable

Signed-off-by: Arjan van de Ven ar...@linux.intel.com
---
 drivers/gpu/drm/i915/intel_display.c |2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_display.c 
b/drivers/gpu/drm/i915/intel_display.c
index c0ab079..6f2eced 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -319,7 +319,7 @@ void
 intel_wait_for_vblank(struct drm_device *dev)
 {
/* Wait for 20ms, i.e. one cycle at 50hz. */
-   udelay(2);
+   mdelay(20);
 }
 
 static int
-- 
1.6.0.6




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[Bug 12419] possible circular locking dependency on i915 dma

2009-03-23 Thread bugme-daemon
http://bugzilla.kernel.org/show_bug.cgi?id=12419





--- Comment #15 from r...@sisk.pl  2009-03-23 15:19 ---
On Monday 23 March 2009, Wang Chen wrote:
 Rafael J. Wysocki said the following on 2009-3-22 0:28:
  This message has been generated automatically as a part of a report
  of recent regressions.
  
  The following bug entry is on the current list of known regressions
  from 2.6.28.  Please verify if it still should be listed and let me know
  (either way).
  
  
  Bug-Entry   : http://bugzilla.kernel.org/show_bug.cgi?id=12419
  Subject : possible circular locking dependency on i915 dma
  Submitter   : Wang Chen wangc...@cn.fujitsu.com
  Date: 2009-01-08 14:11 (73 days old)
 
 not yet fixed :)


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[Bug 12634] video distortion and lockup with i830 video chip and 2.6.28.3

2009-03-23 Thread bugme-daemon
http://bugzilla.kernel.org/show_bug.cgi?id=12634





--- Comment #21 from r...@sisk.pl  2009-03-23 15:20 ---
On Saturday 21 March 2009, Robert Raitz wrote:
 
 Yes, this bug remains for the i830. I'd like go get it fixed, if at all 
 possible.
 
 
 --- On Sat, 3/21/09, Rafael J. Wysocki r...@sisk.pl wrote:
 
  From: Rafael J. Wysocki r...@sisk.pl
  Subject: [Bug #12634] video distortion and lockup with i830 video chip and 
  2.6.28.3
  To: Linux Kernel Mailing List linux-ker...@vger.kernel.org
  Cc: Kernel Testers List kernel-test...@vger.kernel.org, Bob Raitz 
  pappy_mc...@yahoo.com
  Date: Saturday, March 21, 2009, 12:07 PM
  This message has been generated automatically as a part of a
  report
  of regressions introduced between 2.6.27 and 2.6.28.
  
  The following bug entry is on the current list of known
  regressions
  introduced between 2.6.27 and 2.6.28.  Please verify if it
  still should
  be listed and let me know (either way).
  
  
  Bug-Entry   :
  http://bugzilla.kernel.org/show_bug.cgi?id=12634
  Subject : video distortion and lockup with i830 video chip
  and 2.6.28.3
  Submitter   : Bob Raitz pappy_mc...@yahoo.com
  Date: 2009-02-04 21:10 (46 days old)


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[Bug 19591] intel driver doesn't build against 2.6.28 drm headers

2009-03-23 Thread bugzilla-daemon
http://bugs.freedesktop.org/show_bug.cgi?id=19591


Sérgio M. B. ser...@sergiomb.no-ip.org changed:

   What|Removed |Added

 CC||ser...@sergiomb.no-ip.org




--- Comment #6 from Sérgio M. B. ser...@sergiomb.no-ip.org  2009-03-23 
15:42:35 PST ---


I still need this patch for xf86-video-intel-2.6.3 and drm headers of  
kernel-2.6.29-0.258.rc8.git2.fc11.i586. 

(In reply to comment #5)
 the original one has been committed, so this can be closed.
 

but just committed in 2.7 branch ? 


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[Bug 12705] X200: Brightness broken since 2.6.29-rc4-58-g4c098bc

2009-03-23 Thread bugme-daemon
http://bugzilla.kernel.org/show_bug.cgi?id=12705


len.br...@intel.com changed:

   What|Removed |Added

 AssignedTo|drivers_video-...@kernel-   |e...@anholt.net
   |bugs.osdl.org   |




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drm radeon patch

2009-03-23 Thread Maciej Cencora
Hi,

this simple patch adds regs required for implementing occlusion queries 
support. I also changed R500_SU_REG_DEST to R300_* as it exists on R300 cards 
too.

Maciej Cencora
From 47b6fab19665a823a89c90e4987e1a0b281f658b Mon Sep 17 00:00:00 2001
From: Maciej Cencora m.cenc...@gmail.com
Date: Tue, 24 Mar 2009 01:48:50 +0100
Subject: [PATCH] drm/radeon: add regs required for occlusion queries support

Signed-off-by: Maciej Cencora m.cenc...@gmail.com
---
 drivers/gpu/drm/radeon/r300_cmdbuf.c |6 +-
 drivers/gpu/drm/radeon/radeon_reg.h  |8 ++--
 2 files changed, 11 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/radeon/r300_cmdbuf.c b/drivers/gpu/drm/radeon/r300_cmdbuf.c
index e093532..d907b71 100644
--- a/drivers/gpu/drm/radeon/r300_cmdbuf.c
+++ b/drivers/gpu/drm/radeon/r300_cmdbuf.c
@@ -205,6 +205,10 @@ void r300_init_reg_flags(struct drm_device *dev)
 	ADD_RANGE(R300_RE_OCCLUSION_CNTL, 1);
 	ADD_RANGE(R300_RE_CULL_CNTL, 1);
 	ADD_RANGE(0x42C0, 2);
+	ADD_RANGE(R300_SU_REG_DEST, 1);
+	if ((dev_priv-flags  RADEON_FAMILY_MASK) == CHIP_RV530) {
+	ADD_RANGE(RV530_FG_ZBREG_DEST, 1);
+	}
 	ADD_RANGE(R300_RS_CNTL_0, 2);
 
 	ADD_RANGE(0x43A4, 2);
@@ -234,6 +238,7 @@ void r300_init_reg_flags(struct drm_device *dev)
 	ADD_RANGE(0x4F30, 2);
 	ADD_RANGE(0x4F44, 1);
 	ADD_RANGE(0x4F54, 1);
+	ADD_RANGE(R300_ZB_ZPASS_DATA, 2); /* ZB_ZPASS_DATA, ZB_ZPASS_ADDR */
 
 	ADD_RANGE(R300_TX_FILTER_0, 16);
 	ADD_RANGE(R300_TX_FILTER1_0, 16);
@@ -251,7 +256,6 @@ void r300_init_reg_flags(struct drm_device *dev)
 	ADD_RANGE(R300_VAP_INPUT_ROUTE_0_0, 8);
 	ADD_RANGE(R300_VAP_INPUT_ROUTE_1_0, 8);
 
-	ADD_RANGE(R500_SU_REG_DEST, 1);
 	if ((dev_priv-flags  RADEON_FAMILY_MASK) = CHIP_R420) {
 		ADD_RANGE(R300_DST_PIPE_CONFIG, 1);
 	}
diff --git a/drivers/gpu/drm/radeon/radeon_reg.h b/drivers/gpu/drm/radeon/radeon_reg.h
index 0edb592..b3b3d24 100644
--- a/drivers/gpu/drm/radeon/radeon_reg.h
+++ b/drivers/gpu/drm/radeon/radeon_reg.h
@@ -4086,8 +4086,6 @@
 #   define R300_ALPHA3_SHADING_GOURAUD  (2  14)
 #define R300_GA_OFFSET0x4290
 
-#define R500_SU_REG_DEST0x42c8
-
 #define R300_VAP_CNTL_STATUS0x2140
 #   define R300_PVS_BYPASS  (1  8)
 #define R300_VAP_PVS_STATE_FLUSH_REG		0x2284
@@ -4350,6 +4348,12 @@
 #   define R300_FACE_NEG(1  2)
 #define R300_SU_DEPTH_SCALE0x42c0
 #define R300_SU_DEPTH_OFFSET			0x42c4
+#define R300_SU_REG_DEST0x42c8
+#define RV530_FG_ZBREG_DEST0x4be8
+
+#define R300_ZB_ZPASS_DATA0x4f58
+#define R300_ZB_ZPASS_ADDR0x4f5c
+
 
 #define R300_RS_COUNT0x4300
 #	define R300_RS_COUNT_IT_COUNT_SHIFT		0
-- 
1.5.6.3

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