Re: [PSES] low voltage insulation coordination

[Peter Tarver]

It’s important to remember that, while conformal coatings do have incidental 
insulative functions, test houses (in general) only accept them for the 
purposes of keeping the underlying surface clean, thereby reducing the PD.

Some solder masks have been tested in end-products as conformal coatings, but 
not many have certifications for that application.


Peter Tarver

From: Richard Nute
Sent: Wednesday, May 17, 2017 12:43

Solder mask is, necessarily, a reasonable solid insulator.  The trace-to-trace 
insulation construction is

trace - solder mask - air - solder mask - trace

The solder mask is thin, so there is a depression between the traces.  This 
depression makes air a part of the insulation between the traces.

The construction is three capacitors in series.  Assuming the areas of each 
capacitor plate is the same, the capacitance of each is a function of the 
dielectric constant (and the distance through the dielectric).  The dielectric 
constant of air is 1; the dielectric constant of the solder mask is greater 
than 1.  The voltage divides according to the capacitance of each capacitor.  
The air is the weakest link, and will break down.  The heat of the arc may 
damage the solder mask.

A conformal coating is thicker, and would not have as much depression between 
traces; its dielectric strength would be higher than a solder resist coating 
scheme.

Rich

The information contained in this message may be privileged and confidential. 
It is intended to be read only by the individual or entity to whom it is 
addressed or by their designee. If the reader of this message is not the 
intended recipient, you are on notice that any distribution of this message, in 
any form, is strictly prohibited. If you have received this message in error, 
please immediately notify the sender and delete or destroy any copy of this 
message!

-

This message is from the IEEE Product Safety Engineering Society emc-pstc 
discussion list. To post a message to the list, send your e-mail to 


All emc-pstc postings are archived and searchable on the web at:
http://www.ieee-pses.org/emc-pstc.html

Attachments are not permitted but the IEEE PSES Online Communities site at 
http://product-compliance.oc.ieee.org/ can be used for graphics (in well-used 
formats), large files, etc.

Website:  http://www.ieee-pses.org/
Instructions:  http://www.ieee-pses.org/list.html (including how to unsubscribe)
List rules: http://www.ieee-pses.org/listrules.html

For help, send mail to the list administrators:
Scott Douglas 
Mike Cantwell 

For policy questions, send mail to:
Jim Bacher:  
David Heald: 

Re: [PSES] low voltage insulation coordination

[Richard Nute]

The only time I’ve seen trace-trace breakdown was on a PV combiner circuit 
board, where the creepage distance was about ¼ of what was called out by the 
standard.  The resulting failure was repeatable using impulse voltage withstand 
testing, which suggested that it was a clearance failure rather than creepage.  
The board was not conformal coated, although there was solder mask.


Solder mask is, necessarily, a reasonable solid insulator.  The 
trace-to-trace insulation construction is


trace - solder mask - air - solder mask - trace

The solder mask is thin, so there is a depression between the traces.  
This depression makes air a part of the insulation between the traces.


The construction is three capacitors in series.  Assuming the areas of 
each capacitor plate is the same, the capacitance of each is a function 
of the dielectric constant (and the distance through the dielectric).  
The dielectric constant of air is 1; the dielectric constant of the 
solder mask is greater than 1.  The voltage divides according to the 
capacitance of each capacitor. The air is the weakest link, and will 
break down.  The heat of the arc may damage the solder mask.


A conformal coating is thicker, and would not have as much depression 
between traces; its dielectric strength would be higher than a solder 
resist coating scheme.


Rich





-

This message is from the IEEE Product Safety Engineering Society emc-pstc discussion 
list. To post a message to the list, send your e-mail to 

All emc-pstc postings are archived and searchable on the web at:
http://www.ieee-pses.org/emc-pstc.html

Attachments are not permitted but the IEEE PSES Online Communities site at 
http://product-compliance.oc.ieee.org/ can be used for graphics (in well-used 
formats), large files, etc.

Website:  http://www.ieee-pses.org/
Instructions:  http://www.ieee-pses.org/list.html (including how to unsubscribe)
List rules: http://www.ieee-pses.org/listrules.html

For help, send mail to the list administrators:
Scott Douglas 
Mike Cantwell 

For policy questions, send mail to:
Jim Bacher:  
David Heald: 

Re: [PSES] low voltage insulation coordination

[Ralph McDiarmid]

A classic reference.  We have a copy in our library here.

The only time I’ve seen trace-trace breakdown was on a PV combiner circuit 
board, where the creepage distance was about ¼ of what was called out by the 
standard.  The resulting failure was repeatable using impulse voltage withstand 
testing, which suggested that it was a clearance failure rather than creepage.  
The board was not conformal coated, although there was solder mask.

I’ve long assumed that creepage distance requirements in 60664 have lots of 
margin built in.  Pollution degree microenvironments are defined in a way which 
makes distinction a little vague.

Pollution degree 2
Only non-conductive pollution occurs except that occasionally a temporary 
conductivity
caused by condensation is to be expected

Pollution degree 3
Conductive pollution occurs or dry non-conductive pollution occurs which becomes
conductive due to condensation which is to be expected.

PD2 likely a suitable assumption for any used at home, at an office, a 
classroom, a retail store in mall,  or in a well air-conditioned building.  
However, I wouldn't expect condensation in those environments.  

PD3 likely a suitable assumption for equipment in a garage, a shed, a workshop, 
or inside buildings which are neither air-conditioned nor heated, or in 
bathrooms, change rooms and the like.  Accumulation on surface of the PCBs and 
on components could be conductive when dry.  (e.g. soot or carbon dust)  And, 
condensation would be expected.


Ralph McDiarmid
Product Compliance
Engineering
Solar Business
Schneider Electric


From: Richard Nute [mailto:ri...@ieee.org] 
Sent: Wednesday, May 17, 2017 10:53 AM
To: EMC-PSTC@LISTSERV.IEEE.ORG
Subject: [PSES] low voltage insulation coordination


With the help of Dan Roman (thanks!), the research into clearance and creepage 
distance by Klaus Stimper, "The physical fundamentals of LOW-VOLTAGE INSULATION 
CO-ORDINATION" is now available at:

http://www.ieee-pses.org/Downloads/low_voltage_insulation_coordination.pdf

This classic research is the basis for IEC 664 and IEC 60664-1 standards.  If 
you have ever wondered why our spacings are what they are, this treatise is for 
you.  Enjoy.

Best regards,
Rich

-

This message is from the IEEE Product Safety Engineering Society emc-pstc 
discussion list. To post a message to the list, send your e-mail to 
<emc-p...@ieee.org>

All emc-pstc postings are archived and searchable on the web at:
http://www.ieee-pses.org/emc-pstc.html

Attachments are not permitted but the IEEE PSES Online Communities site at 
http://product-compliance.oc.ieee.org/ can be used for graphics (in well-used 
formats), large files, etc.

Website:  http://www.ieee-pses.org/
Instructions:  http://www.ieee-pses.org/list.html (including how to unsubscribe)
List rules: http://www.ieee-pses.org/listrules.html

For help, send mail to the list administrators:
Scott Douglas <sdoug...@ieee.org>
Mike Cantwell <mcantw...@ieee.org>

For policy questions, send mail to:
Jim Bacher:  <j.bac...@ieee.org>
David Heald: <dhe...@gmail.com>

[PSES] low voltage insulation coordination

[Richard Nute]

With the help of Dan Roman (thanks!), the research into clearance and 
creepage distance by Klaus Stimper, "The physical fundamentals of 
LOW-VOLTAGE INSULATION CO-ORDINATION" is now available at:


http://www.ieee-pses.org/Downloads/low_voltage_insulation_coordination.pdf

This classic research is the basis for IEC 664 and IEC 60664-1 
standards.  If you have ever wondered why our spacings are what they 
are, this treatise is for you.  Enjoy.


Best regards,
Rich



-

This message is from the IEEE Product Safety Engineering Society emc-pstc discussion 
list. To post a message to the list, send your e-mail to 

All emc-pstc postings are archived and searchable on the web at:
http://www.ieee-pses.org/emc-pstc.html

Attachments are not permitted but the IEEE PSES Online Communities site at 
http://product-compliance.oc.ieee.org/ can be used for graphics (in well-used 
formats), large files, etc.

Website:  http://www.ieee-pses.org/
Instructions:  http://www.ieee-pses.org/list.html (including how to unsubscribe)
List rules: http://www.ieee-pses.org/listrules.html

For help, send mail to the list administrators:
Scott Douglas 
Mike Cantwell 

For policy questions, send mail to:
Jim Bacher:  
David Heald: