Re: [PATCH] Fix thread_prologue_and_epilogue_insns (PR middle-end/79499)

[Richard Biener]

On August 1, 2017 10:35:43 PM GMT+02:00, Jakub Jelinek  wrote:
>Hi!
>
>In this function we insert 0-2 prologue sequences (which can sometimes
>contain jumps and other insns that need to end basic blocks) on edges,
>then commit edge insertions and then finally attempts to find out
>into which basic blocks the sequences were inserted and calls
>find_many_sub_basic_blocks on those blocks.
>
>As the testcase shows, the guess is sometimes wrong,
>commit_one_edge_insertion doesn't always insert on edge->dest,
>sometimes
>it inserts on edge->src and in other cases splits edge and inserts into
>a
>new basic block.
>
>What is certain though is that all the real insns in the sequences are
>added
>somewhere together.  So, what this patch does is finds the first
>NONDEBUG_INSN_P, (if there are none, then we shouldn't need
>find_many_sub_basic_blocks), and checks in which block it is using
>BLOCK_FOR_INSN.
>
>Bootstrapped/regtested on x86_64-linux and i686-linux, ok for
>trunk/7.2?

OK.

Thanks,
Richard.

>2017-08-01  Jakub Jelinek  
>
>   PR middle-end/79499
>   * function.c (thread_prologue_and_epilogue_insns): Determine blocks
>   for find_many_sub_basic_blocks bitmap by looking up BLOCK_FOR_INSN
>   of first NONDEBUG_INSN_P in each of the split_prologue_seq and
>   prologue_seq sequences - if any.
>
>--- gcc/function.c.jj  2017-07-26 13:37:45.0 +0200
>+++ gcc/function.c 2017-08-01 14:10:26.909836163 +0200
>@@ -6048,20 +6048,42 @@ thread_prologue_and_epilogue_insns (void
> 
>   if (split_prologue_seq || prologue_seq)
> {
>+  rtx_insn *split_prologue_insn = split_prologue_seq;
>   if (split_prologue_seq)
>-  insert_insn_on_edge (split_prologue_seq, orig_entry_edge);
>+  {
>+while (split_prologue_insn && !NONDEBUG_INSN_P
>(split_prologue_insn))
>+  split_prologue_insn = NEXT_INSN (split_prologue_insn);
>+insert_insn_on_edge (split_prologue_seq, orig_entry_edge);
>+  }
> 
>+  rtx_insn *prologue_insn = prologue_seq;
>   if (prologue_seq)
>-  insert_insn_on_edge (prologue_seq, entry_edge);
>+  {
>+while (prologue_insn && !NONDEBUG_INSN_P (prologue_insn))
>+  prologue_insn = NEXT_INSN (prologue_insn);
>+insert_insn_on_edge (prologue_seq, entry_edge);
>+  }
> 
>   commit_edge_insertions ();
> 
>   /* Look for basic blocks within the prologue insns.  */
>-  auto_sbitmap blocks (last_basic_block_for_fn (cfun));
>-  bitmap_clear (blocks);
>-  bitmap_set_bit (blocks, entry_edge->dest->index);
>-  bitmap_set_bit (blocks, orig_entry_edge->dest->index);
>-  find_many_sub_basic_blocks (blocks);
>+  if (split_prologue_insn
>+&& BLOCK_FOR_INSN (split_prologue_insn) == NULL)
>+  split_prologue_insn = NULL;
>+  if (prologue_insn
>+&& BLOCK_FOR_INSN (prologue_insn) == NULL)
>+  prologue_insn = NULL;
>+  if (split_prologue_insn || prologue_insn)
>+  {
>+auto_sbitmap blocks (last_basic_block_for_fn (cfun));
>+bitmap_clear (blocks);
>+if (split_prologue_insn)
>+  bitmap_set_bit (blocks,
>+  BLOCK_FOR_INSN (split_prologue_insn)->index);
>+if (prologue_insn)
>+  bitmap_set_bit (blocks, BLOCK_FOR_INSN (prologue_insn)->index);
>+find_many_sub_basic_blocks (blocks);
>+  }
> }
> 
>   default_rtl_profile ();
>--- gcc/testsuite/gcc.dg/pr79499.c.jj  2017-08-01 13:57:36.120485689
>+0200
>+++ gcc/testsuite/gcc.dg/pr79499.c 2017-08-01 13:57:26.0 +0200
>@@ -0,0 +1,13 @@
>+/* PR middle-end/79499 */
>+/* { dg-do compile { target split_stack } } */
>+/* { dg-options "-O2 -fsplit-stack -fno-omit-frame-pointer" } */
>+
>+struct S { struct S *a, *b; };
>+
>+void
>+foo (struct S *x)
>+{
>+  do
>+x->b = x->a;
>+  while (x = x->a);
>+}
>
>   Jakub

Re: [PATCH][2/2] early LTO debug, main part

[Jason Merrill]

On 05/19/2017 06:42 AM, Richard Biener wrote:

+ /* ???  In some cases the C++ FE (at least) fails to
+set DECL_CONTEXT properly.  Simply globalize stuff
+in this case.  For example
+__dso_handle created via iostream line 74 col 25.  */
+ parent = comp_unit_die ();


I've now fixed __dso_handle, so that can be removed from the comment, 
but it still makes sense to have this fall-back for the (permitted) case 
of null DECL_CONTEXT.



+   /* ???  LANG issue - DW_TAG_module for fortran.  Either look
+at the input language (if we have enough DECL_CONTEXT to follow)
+or use a bit in tree_decl_with_vis to record the distinction.  */


Sure, you should be able to look at TRANSLATION_UNIT_LANGUAGE.


! /* ???  We cannot unconditionally output die_offset if
!non-zero - at least -feliminate-dwarf2-dups will
!create references to those DIEs via symbols.  And we
!do not clear its DIE offset after outputting it
!(and the label refers to the actual DIEs, not the
!DWARF CU unit header which is when using label + offset
!would be the correct thing to do).


As in our previous discussion, I think -feliminate-dwarf2-dups can go 
away now.  But this is a more general issue: die_offset has meant the 
offset from the beginning of the CU, but if with_offset is set it means 
an offset from die_symbol.  Since with_offset changes the meaning of 
die_symbol and die_offset, having different code here depending on that 
flag makes sense.


It seems likely that when -fEDD goes away, we will never again want to 
do direct symbolic references to DIEs, in which case we could drop the 
current meaning of die_symbol, and so we wouldn't need the with_offset flag.



!   unit_die->comdat_type_p = comdat_p;
! }
! 
! static void

! compute_section_prefix (dw_die_ref unit_die)
! {
!   compute_section_prefix_1 (unit_die, true);
!   comdat_symbol_id = unit_die->die_id.die_symbol;
comdat_symbol_number = 0;
  }


Let's set the comdat_type_p flag in this function rather than add a 
parameter to the existing function.  And when -fEDD goes away, we don't 
need this entry point at all.


Also, for LTO debug, it seems you aren't actually using the symbol as a 
section prefix, so the name becomes inaccurate.  Maybe 
compute_comp_unit_symbol rather than compute_section_prefix_1?



+   /* For LTO cross unit DIE refs we want a symbol on the start of the
+  debuginfo section, not on the CU DIE.
+  ???  We could simply use the symbol as it would be output by output_die
+  and account for the extra offset produced by the CU header which has 
fixed
+  size.  OTOH it currently only supports linkonce globals which would
+  be less than ideal?.  */


I think the way you're doing it now is better than this alternative, 
since die_offset is relative to the beginning of the CU header.



!   /* Don't output the symbol twice.  For LTO we want the label
!  on the section beginning, not on the actual DIE.  */
!   && (!flag_generate_lto
! || die->die_tag != DW_TAG_compile_unit))


I think this check should just be !with_offset; if that flag is set the 
DIE doesn't actually have its own symbol.



!   if (old_die
! && (c = get_AT_ref (old_die, DW_AT_abstract_origin))
! /* ???  In LTO all origin DIEs still refer to the early
!debug copy.  Detect that.  */
! && get_AT (c, DW_AT_inline))

...

!   /* "Unwrap" the decls DIE which we put in the imported unit context.
!   ???  If we finish dwarf2out_function_decl refactoring we can
! do this in a better way from the start and only lazily emit
! the early DIE references.  */


It seems like in gen_subprogram_die you deliberately avoid reusing the 
DIE from dwarf2out_register_external_die (since it doesn't have 
DW_AT_inline), and then in add_abstract_origin_attribute you need to 
look through that redundant die.  Why not reuse it?



! /* ???  In LTO we do not see any of the location attributes.  */
!  && ((DECL_ARTIFICIAL (decl) || in_lto_p)


Perhaps get_AT_ref (old_die, DW_AT_abstract_origin) instead of in_lto_p?

And you don't need the added parentheses here.


 if (parm_die && parm_die->die_parent != context_die)
{
! /* ???  The DIE parent is the "abstract" copy and the context_die
!is the specification "copy".  */
! if (!DECL_ABSTRACT_P (node) && !in_lto_p)


And a bit below in the current source,

  /* FIXME: Reuse DIE even with a differing context.   
   
 This can happen when calling  
 

Re: [PATCH 1/2] add unique_ptr header

[Trevor Saunders]

On Tue, Aug 01, 2017 at 10:40:53AM -0400, David Malcolm wrote:
> On Mon, 2017-07-31 at 19:46 -0400, tbsaunde+...@tbsaunde.org wrote:
> > From: Trevor Saunders 
> > 
> > For most of the history of this see 
> > https://sourceware.org/ml/gdb-patches/2016-10/msg00223.html
> > The changes are mostly s/gdb/gtl/g
> > 
> > include/ChangeLog:
> > 
> > 2017-07-29  Trevor Saunders  
> > 
> > * unique-ptr.h: New file.
> > ---
> >  include/unique-ptr.h | 386
> > +++
> >  1 file changed, 386 insertions(+)
> >  create mode 100644 include/unique-ptr.h
> > 
> > diff --git a/include/unique-ptr.h b/include/unique-ptr.h
> > new file mode 100644
> > index 000..7903a5abefe
> > --- /dev/null
> > +++ b/include/unique-ptr.h
> > @@ -0,0 +1,386 @@
> > +/* gtl::unique_ptr, a simple std::unique_ptr replacement for C++03.
> > +
> > +   Copyright (C) 2007-2016 Free Software Foundation, Inc.
> > +
> > +   This file is part of GCC.
> > +
> > +   This program is free software; you can redistribute it and/or
> > modify
> > +   it under the terms of the GNU General Public License as published
> > by
> > +   the Free Software Foundation; either version 3 of the License, or
> > +   (at your option) any later version.
> > +
> > +   This program is distributed in the hope that it will be useful,
> > +   but WITHOUT ANY WARRANTY; without even the implied warranty of
> > +   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> > +   GNU General Public License for more details.
> > +
> > +   You should have received a copy of the GNU General Public License
> > +   along with this program.  If not, see  > s/>.  */
> > +
> > +/* gtl::unique_ptr defines a C++ owning smart pointer that exposes a
> > +   subset of the std::unique_ptr API.
> > +
> > +   In fact, when compiled with a C++11 compiler, gtl::unique_ptr
> > +   actually _is_ std::unique_ptr.  When compiled with a C++03
> > compiler
> > +   OTOH, it's an hand coded std::unique_ptr emulation that assumes
> > +   code is correct and doesn't try to be too smart.
> 
> The comments talk about C++03 (presumably due to the gdb heritage of
> this code), but gcc's minimum requirement is for C++98.
> 
> Does this code work with C++98?  If so, presumably this comment should
> state that (presumably by just writing "C++98 or C++03" wherever you
> say "C++03").

aiui C++03 is C++98 with a few additions to the stl.  Yes this doesn't
build with -std=c++98 I haven't tried any of the strange c++ compilers
out there, but its not very fancy so I expect its fine.

> Could the patch add a set of selftests for the new code?  (e.g. assert
> the number of times that a destructor is called, for various test
> classes in various situations).  This would also give a handy way to
> run the pertinent code relatively quickly under valgrind (via "make
> selftest-valgrind").

Its possible, but I'm not sure it would provide much value.  I think
we're unlikely to change this code much since it already more or less
completely implements the API it is shimming.  It also is fairly
trivial, so I doubt anyone would want to run valgrind on just the
unique_ptr code.  Of course I may just be being lazy here.

thanks

Trev

> 
> I'm not a global reviewer, so treat these as suggestions.
> 
> Hope this is helpful
> Dave

Re: [PATCH 0/3 v2] C/C++: show pertinent open token when missing a close token

[Trevor Saunders]

On Tue, Aug 01, 2017 at 04:21:41PM -0400, David Malcolm wrote:
> On Wed, 2017-07-12 at 09:13 -0400, Trevor Saunders wrote:
> > On Tue, Jul 11, 2017 at 11:24:45AM -0400, David Malcolm wrote:
> > > + public:
> > > +  /* token_pair's ctor.  */
> > > +  token_pair () : m_open_loc (UNKNOWN_LOCATION) {}
> > 
> > What do you think of passing the parser to the ctor, and dropping it
> > from the other arguments?  It doesn't seem to make sense to support
> > passing in different parsers?
> 
> I'm in two minds about this:
> 
> (a) yes: the parser ptr is always going to unchanged, and could be
> passed in to the ctor, which would avoid needing to pass it in
> everywhere the token_pair instancd is used
> 
> (b) is the optimizer good enough to realize this, and avoid storing
> a second copy of the parser ptr on the stack?  (presumably to
> optimize away the 2nd copy of the parser ptr, every call to methods
> of the class would need to be inlined, and then the two on-stack
> member fields be split up into individual fields, and then copy
> propagation could eliminate it).

I think storing an extra copy of the parser ptr is the wrong thing to
worry about, its only going to be 8 bytes or so, and you aren't going to
have *that* many of these objects on the stack at any one point.  On the
other hand it might be worth considering which is faster, but I'd be
pretty shocked if these methods are called nearly enough to move this
out of the noise.  I'm not really sure what would be faster in theory,
and can believe it depends on the host arch.  On x86 I could see the
instructions to deal with the parser arg on the stack are slower than
copying the parser pointer into the object.

> In this version of the kit I opted to keep passing in the parser ptr
> at all the usage sites, but I'm open to making it a field of the
> class.
> 
> I'm hoping for input on this from the C/C++ frontend maintainers.

Fair enough, part of me thinks if there is a performance problem its
something we should fix by making gcc optimize better.

So I'd tend to think its better to go for clearer code, but we already
have a ton of explicit parser arguments, so no big deal either way.

Trev

Re: C PATCH to further improve diagnostic for -Wsign-compare (PR c/81417)

[Martin Sebor]

I'm wondering if the messages could use a slight rewording, to give a
clue to the user about the reason *why* the expression has changed
signedness.  The old message "signed and unsigned type in conditional
expression" gave the clue (but failed to underline the subexpression
changing sign, and tell what the old/new types were).

A horribly verbose way to put it would be something like:

"operand of conditional expression with mixed signedness changes
signedness from %qT to %qT due to promotion to unsigned to match
unsignedness of other operand" (ugh)

(assuming I'm understanding the logic correctly)

or something like:

"operand of conditional expression changes signedness from %qT to %qT
due to unsignedness of other operand"

or somesuch (am not 100% happy with that either).


If I can make an observation I'd say (since you're not happy with
the wordiness) that mentioning signedness in addition to the types
of the operands is superfluous: it should be sufficiently clear
from the "from 'T' to 'unsigned T'" part.

That being said, what might be helpful is mentioning which operand's
type changes: the second or third.  That could be viewed as redundant
as well thanks to the underlining but only as long as the underlining
is correct and as long as it's not disabled by some option.

With that I'd suggest to consider the simple:

  second operand of conditional expression changes type from %qT to %qT

Martin

[PATCH] minor readability tweaks to print_node

[Martin Sebor]

This is a small readability tweak to the tree printer to have
it consistently use dashes and colons in tree attribute names
in favor of spaces.  It's been tested on x86_64-linux.

The tree printer tends to avoid using spaces to separate tree
attribute names (not the __attribute__ kind but things like
needs-constructing or pointer_to_this).  Instead it uses dashes
and underscores to separate words, and colons to separate integer
values from the attribute names.

In a small number of cases it does use a space which can make it
harder to read.  For instance a FUNCTION_DECL might be rendered
like so:

  
 public external QI file /build/tmp/a.c line 14 col 13 user align 256>

In the last three attributes "user align 256" it's not completely
clear whether it's user, followed by align, followed by 256, or
user-align:256.

The attached patch replaces the handful of spaces between words
I noticed with dashes, and between words and numbers with colons.
It also fixes the above location to use the prevalent
file:line:column notation.

Martin
gcc/ChangeLog:

	* print-tree.c (print_node): Print location using the established
	format %s:%i%i.
	Replace spaces with colons.
	(debug_raw, debug): Ditto.

diff --git a/gcc/print-tree.c b/gcc/print-tree.c
index 6a237cc..30c8d72 100644
--- a/gcc/print-tree.c
+++ b/gcc/print-tree.c
@@ -444,13 +444,13 @@ print_node (FILE *file, const char *prefix, tree node, int indent,
 
 
   xloc = expand_location (DECL_SOURCE_LOCATION (node));
-  fprintf (file, " file %s line %d col %d", xloc.file, xloc.line,
+  fprintf (file, " %s:%d:%d", xloc.file, xloc.line,
 	   xloc.column);
 
   if (CODE_CONTAINS_STRUCT (code, TS_DECL_COMMON))
 	{
 	  print_node (file, "size", DECL_SIZE (node), indent + 4);
-	  print_node (file, "unit size", DECL_SIZE_UNIT (node), indent + 4);
+	  print_node (file, "unit-size", DECL_SIZE_UNIT (node), indent + 4);
 
 	  if (code != FUNCTION_DECL || DECL_BUILT_IN (node))
 	indent_to (file, indent + 3);
@@ -458,7 +458,7 @@ print_node (FILE *file, const char *prefix, tree node, int indent,
 	  if (DECL_USER_ALIGN (node))
 	fprintf (file, " user");
 
-	  fprintf (file, " align %d", DECL_ALIGN (node));
+	  fprintf (file, " align:%d", DECL_ALIGN (node));
 	  if (code == FIELD_DECL)
 	fprintf (file, " offset_align " HOST_WIDE_INT_PRINT_UNSIGNED,
 		 DECL_OFFSET_ALIGN (node));
@@ -466,9 +466,9 @@ print_node (FILE *file, const char *prefix, tree node, int indent,
 	  if (code == FUNCTION_DECL && DECL_BUILT_IN (node))
 	{
 	  if (DECL_BUILT_IN_CLASS (node) == BUILT_IN_MD)
-		fprintf (file, " built-in BUILT_IN_MD %d", DECL_FUNCTION_CODE (node));
+		fprintf (file, " built-in: BUILT_IN_MD:%d", DECL_FUNCTION_CODE (node));
 	  else
-		fprintf (file, " built-in %s:%s",
+		fprintf (file, " built-in: %s:%s",
 			 built_in_class_names[(int) DECL_BUILT_IN_CLASS (node)],
 			 built_in_names[(int) DECL_FUNCTION_CODE (node)]);
 	}
@@ -476,7 +476,7 @@ print_node (FILE *file, const char *prefix, tree node, int indent,
   if (code == FIELD_DECL)
 	{
 	  print_node (file, "offset", DECL_FIELD_OFFSET (node), indent + 4);
-	  print_node (file, "bit offset", DECL_FIELD_BIT_OFFSET (node),
+	  print_node (file, "bit-offset", DECL_FIELD_BIT_OFFSET (node),
 		  indent + 4);
 	  if (DECL_BIT_FIELD_TYPE (node))
 	print_node (file, "bit_field_type", DECL_BIT_FIELD_TYPE (node),
@@ -597,27 +597,27 @@ print_node (FILE *file, const char *prefix, tree node, int indent,
   fprintf (file, " %s", GET_MODE_NAME (mode));
 
   print_node (file, "size", TYPE_SIZE (node), indent + 4);
-  print_node (file, "unit size", TYPE_SIZE_UNIT (node), indent + 4);
+  print_node (file, "unit-size", TYPE_SIZE_UNIT (node), indent + 4);
   indent_to (file, indent + 3);
 
   if (TYPE_USER_ALIGN (node))
 	fprintf (file, " user");
 
-  fprintf (file, " align %d symtab %d alias set " HOST_WIDE_INT_PRINT_DEC,
+  fprintf (file, " align:%d symtab:%d alias-set " HOST_WIDE_INT_PRINT_DEC,
 	   TYPE_ALIGN (node), TYPE_SYMTAB_ADDRESS (node),
 	   (HOST_WIDE_INT) TYPE_ALIAS_SET (node));
 
   if (TYPE_STRUCTURAL_EQUALITY_P (node))
-	fprintf (file, " structural equality");
+	fprintf (file, " structural-equality");
   else
-	dump_addr (file, " canonical type ", TYPE_CANONICAL (node));
+	dump_addr (file, " canonical-type ", TYPE_CANONICAL (node));
 
   print_node (file, "attributes", TYPE_ATTRIBUTES (node), indent + 4);
 
   if (INTEGRAL_TYPE_P (node) || code == REAL_TYPE
 	  || code == FIXED_POINT_TYPE)
 	{
-	  fprintf (file, " precision %d", TYPE_PRECISION (node));
+	  fprintf (file, " precision:%d", TYPE_PRECISION (node));
 	  print_node_brief (file, "min", TYPE_MIN_VALUE (node), indent + 4);
 	  print_node_brief (file, "max", TYPE_MAX_VALUE (node), indent + 4);
 	}
@@ -627,7 +627,7 @@ print_node (FILE *file, const char *prefix, tree node, int indent,
   else if (code == ARRAY_TYPE)
 	print_node (file, "domain", TYPE_DOMAIN 

Re: [PATCH] Switch vec_init and vec_extract optabs to 2 mode optab to allow extraction of vector from vector or initialization of vector from smaller vectors (PR target/80846)

[Segher Boessenkool]

On Tue, Aug 01, 2017 at 06:21:34PM +0200, Jakub Jelinek wrote:
> Apparently I broke power bootstrap with this, because two new spots were
> introduced after I wrote the patch and my cross-compiler which didn't have
> HAVE_AS_POWER9 defined didn't reveal that.  Fixed thusly, committed as
> obvious to trunk:

Thanks!


Segher

Restore proper operation of -fdump-ada-spec in C++

[Eric Botcazou]

It was broken by the recent removal of TYPE_METHODS.

Bootstrapped/regtested on x86_64-suse-linux, applied on the mainline.


2017-08-01  Eric Botcazou  

c-family/
* c-ada-spec.c (has_static_fields): Look only into fields.
(dump_generic_ada_node): Small tweak.
(dump_nested_types): Look only into fields.
(print_ada_declaration): Look only into methods.  Small tweak.
(print_ada_struct_decl): Look only into fields.  Use DECL_VIRTUAL_P.

-- 
Eric BotcazouIndex: c-ada-spec.c
===
--- c-ada-spec.c	(revision 250797)
+++ c-ada-spec.c	(working copy)
@@ -1052,13 +1052,11 @@ get_underlying_decl (tree type)
 static bool
 has_static_fields (const_tree type)
 {
-  tree tmp;
-
   if (!type || !RECORD_OR_UNION_TYPE_P (type))
 return false;
 
-  for (tmp = TYPE_FIELDS (type); tmp; tmp = TREE_CHAIN (tmp))
-if (DECL_NAME (tmp) && TREE_STATIC (tmp))
+  for (tree fld = TYPE_FIELDS (type); fld; fld = TREE_CHAIN (fld))
+if (TREE_CODE (fld) == FIELD_DECL && DECL_NAME (fld) && TREE_STATIC (fld))
   return true;
 
   return false;
@@ -2384,13 +2382,14 @@ dump_generic_ada_node (pretty_printer *buffer, tre
 	{
 	  if (is_tagged_type (TREE_TYPE (node)))
 	{
-	  tree tmp = TYPE_FIELDS (TREE_TYPE (node));
 	  int first = 1;
 
 	  /* Look for ancestors.  */
-	  for (; tmp; tmp = TREE_CHAIN (tmp))
+	  for (tree fld = TYPE_FIELDS (TREE_TYPE (node));
+		   fld;
+		   fld = TREE_CHAIN (fld))
 		{
-		  if (!DECL_NAME (tmp) && is_tagged_type (TREE_TYPE (tmp)))
+		  if (!DECL_NAME (fld) && is_tagged_type (TREE_TYPE (fld)))
 		{
 		  if (first)
 			{
@@ -2400,8 +2399,8 @@ dump_generic_ada_node (pretty_printer *buffer, tre
 		  else
 			pp_string (buffer, " and ");
 
-		  dump_ada_decl_name
-			(buffer, TYPE_NAME (TREE_TYPE (tmp)), false);
+		  dump_ada_decl_name (buffer, TYPE_NAME (TREE_TYPE (fld)),
+	  false);
 		}
 		}
 
@@ -2504,7 +2503,7 @@ dump_nested_types (pretty_printer *buffer, tree t,
   dump_nested_type (buffer, field, t, parent, spc);
 
   for (field = TYPE_FIELDS (type); field; field = TREE_CHAIN (field))
-if (!TYPE_NAME (TREE_TYPE (field)))
+if (TREE_CODE (field) == FIELD_DECL && !TYPE_NAME (TREE_TYPE (field)))
   dump_nested_type (buffer, field, t, parent, spc);
 
   TREE_VISITED (t) = 1;
@@ -2955,7 +2954,8 @@ print_ada_declaration (pretty_printer *buffer, tre
 
   if (is_constructor && RECORD_OR_UNION_TYPE_P (type))
 	for (tree fld = TYPE_FIELDS (type); fld; fld = DECL_CHAIN (fld))
-	  if (cpp_check (fld, IS_ABSTRACT))
+	  if (TREE_CODE (TREE_TYPE (fld)) == METHOD_TYPE
+	  && cpp_check (fld, IS_ABSTRACT))
 	{
 	  is_abstract_class = true;
 	  break;
@@ -3020,18 +3020,20 @@ print_ada_declaration (pretty_printer *buffer, tre
   if (cpp_check
 	  && RECORD_OR_UNION_TYPE_P (TREE_TYPE (t)))
 	{
-	  is_interface = -1;
+	  bool has_fields = false;
 
 	  /* Check that there are no fields other than the virtual table.  */
 	  for (tree fld = TYPE_FIELDS (TREE_TYPE (t));
-	   fld; fld = TREE_CHAIN (fld))
+	   fld;
+	   fld = TREE_CHAIN (fld))
 	{
 	  if (TREE_CODE (fld) == FIELD_DECL)
 		{
-		  if (is_interface < 0 && DECL_VIRTUAL_P (fld))
+		  if (!has_fields && DECL_VIRTUAL_P (fld))
 		is_interface = 1;
 		  else
 		is_interface = 0;
+		  has_fields = true;
 		}
 	  else if (TREE_CODE (TREE_TYPE (fld)) == METHOD_TYPE
 		   && !DECL_ARTIFICIAL (fld))
@@ -3212,10 +3214,10 @@ print_ada_struct_decl (pretty_printer *buffer, tre
 		  field_num++;
 		}
 	}
-	  else if (TREE_CODE (tmp) != TYPE_DECL && !TREE_STATIC (tmp))
+	  else if (TREE_CODE (tmp) == FIELD_DECL && !TREE_STATIC (tmp))
 	{
 	  /* Skip internal virtual table field.  */
-	  if (strncmp (IDENTIFIER_POINTER (DECL_NAME (tmp)), "_vptr", 5))
+	  if (!DECL_VIRTUAL_P (tmp))
 		{
 		  if (is_union)
 		{
@@ -3306,7 +3308,9 @@ print_ada_struct_decl (pretty_printer *buffer, tre
   /* Print the static fields of the structure, if any.  */
   for (tmp = TYPE_FIELDS (node); tmp; tmp = TREE_CHAIN (tmp))
 {
-  if (DECL_NAME (tmp) && TREE_STATIC (tmp))
+  if (TREE_CODE (tmp) == FIELD_DECL
+	  && DECL_NAME (tmp)
+	  && TREE_STATIC (tmp))
 	{
 	  if (need_semicolon)
 	{

Re: [PATCH] i386: Add some naked attribute tests

[Uros Bizjak]

On Tue, Aug 1, 2017 at 11:35 PM, H.J. Lu  wrote:
> On Tue, Aug 1, 2017 at 2:25 PM, Uros Bizjak  wrote:
>> On Tue, Aug 1, 2017 at 11:23 PM, H.J. Lu  wrote:
>>> On Tue, Aug 1, 2017 at 2:11 PM, Uros Bizjak  wrote:
 On Tue, Aug 1, 2017 at 11:05 PM, H.J. Lu  wrote:
> On Tue, Aug 1, 2017 at 1:49 PM, Uros Bizjak  wrote:
>> On Tue, Aug 1, 2017 at 9:46 PM, H.J. Lu  wrote:
>>> Add some tests for implementing interrupt handlers with naked attribute.
>>>
>>> OK for trunk?
>>>
>>> H.J.
>>> ---
>>> * gcc.dg/guality/pr25967-1.c: New test.
>>> * gcc.dg/guality/pr25967-2.c: Likewise.
>>> * gcc.dg/torture/pr25967-1.c: Likewise.
>>> * gcc.dg/torture/pr25967-2.c: Likewise.
>>
>> OK with a small change below.
>>
>
>>> +void
>>> +fn (void)
>>> +{
>>> +  struct interrupt_frame *frame;
>>> +  uword_t error;
>>> +  asm ("lea " WORD_SIZE "(%%" STACK_POINTER "), %0" : "=r" (frame) : );
>>> +  asm ("mov (%%" STACK_POINTER "), %0" : "=r" (error) : );
>>
>> The above two asm needs to be volatile. They are not "simple" asm, and
>> access stack pointer behind the compilers back. And please merge them
>> to one multi-line volatile asm statement.
>>
>
>
> This is what I am checking in.

 OTOH, these asms can be avoided with something like:

 --cut here--
 typedef unsigned int uword_t __attribute__ ((mode (__word__)));

 struct interrupt_frame
 {
   uword_t ip;
   uword_t cs;
   uword_t flags;
   uword_t sp;
   uword_t ss;
 };

 void
 __attribute__((naked))
 test (void)
 {
   register uword_t sp __asm__("sp");

   long *error = (long *) sp;
   struct interrupt_frame *frame
 = (struct interrupt_frame *) (sp + sizeof (uword_t));

   ...

>>>
>>> How about this?  OK for trunk?
>>
>> Even better.
>>
>> Can we introduce asm_goto to the jmp in the main asm?
>>
>
> asm goto doesn't work since it only takes labels.  But interrupt handler
> must be a function.

Ah, indeed.

OK then.

Thanks,
Uros.

Re: [PATCH] i386: Add some naked attribute tests

[H.J. Lu]

On Tue, Aug 1, 2017 at 2:25 PM, Uros Bizjak  wrote:
> On Tue, Aug 1, 2017 at 11:23 PM, H.J. Lu  wrote:
>> On Tue, Aug 1, 2017 at 2:11 PM, Uros Bizjak  wrote:
>>> On Tue, Aug 1, 2017 at 11:05 PM, H.J. Lu  wrote:
 On Tue, Aug 1, 2017 at 1:49 PM, Uros Bizjak  wrote:
> On Tue, Aug 1, 2017 at 9:46 PM, H.J. Lu  wrote:
>> Add some tests for implementing interrupt handlers with naked attribute.
>>
>> OK for trunk?
>>
>> H.J.
>> ---
>> * gcc.dg/guality/pr25967-1.c: New test.
>> * gcc.dg/guality/pr25967-2.c: Likewise.
>> * gcc.dg/torture/pr25967-1.c: Likewise.
>> * gcc.dg/torture/pr25967-2.c: Likewise.
>
> OK with a small change below.
>

>> +void
>> +fn (void)
>> +{
>> +  struct interrupt_frame *frame;
>> +  uword_t error;
>> +  asm ("lea " WORD_SIZE "(%%" STACK_POINTER "), %0" : "=r" (frame) : );
>> +  asm ("mov (%%" STACK_POINTER "), %0" : "=r" (error) : );
>
> The above two asm needs to be volatile. They are not "simple" asm, and
> access stack pointer behind the compilers back. And please merge them
> to one multi-line volatile asm statement.
>


 This is what I am checking in.
>>>
>>> OTOH, these asms can be avoided with something like:
>>>
>>> --cut here--
>>> typedef unsigned int uword_t __attribute__ ((mode (__word__)));
>>>
>>> struct interrupt_frame
>>> {
>>>   uword_t ip;
>>>   uword_t cs;
>>>   uword_t flags;
>>>   uword_t sp;
>>>   uword_t ss;
>>> };
>>>
>>> void
>>> __attribute__((naked))
>>> test (void)
>>> {
>>>   register uword_t sp __asm__("sp");
>>>
>>>   long *error = (long *) sp;
>>>   struct interrupt_frame *frame
>>> = (struct interrupt_frame *) (sp + sizeof (uword_t));
>>>
>>>   ...
>>>
>>
>> How about this?  OK for trunk?
>
> Even better.
>
> Can we introduce asm_goto to the jmp in the main asm?
>

asm goto doesn't work since it only takes labels.  But interrupt handler
must be a function.

-- 
H.J.

Re: [PATCH] i386: Add some naked attribute tests

[Uros Bizjak]

On Tue, Aug 1, 2017 at 11:23 PM, H.J. Lu  wrote:
> On Tue, Aug 1, 2017 at 2:11 PM, Uros Bizjak  wrote:
>> On Tue, Aug 1, 2017 at 11:05 PM, H.J. Lu  wrote:
>>> On Tue, Aug 1, 2017 at 1:49 PM, Uros Bizjak  wrote:
 On Tue, Aug 1, 2017 at 9:46 PM, H.J. Lu  wrote:
> Add some tests for implementing interrupt handlers with naked attribute.
>
> OK for trunk?
>
> H.J.
> ---
> * gcc.dg/guality/pr25967-1.c: New test.
> * gcc.dg/guality/pr25967-2.c: Likewise.
> * gcc.dg/torture/pr25967-1.c: Likewise.
> * gcc.dg/torture/pr25967-2.c: Likewise.

 OK with a small change below.

>>>
> +void
> +fn (void)
> +{
> +  struct interrupt_frame *frame;
> +  uword_t error;
> +  asm ("lea " WORD_SIZE "(%%" STACK_POINTER "), %0" : "=r" (frame) : );
> +  asm ("mov (%%" STACK_POINTER "), %0" : "=r" (error) : );

 The above two asm needs to be volatile. They are not "simple" asm, and
 access stack pointer behind the compilers back. And please merge them
 to one multi-line volatile asm statement.

>>>
>>>
>>> This is what I am checking in.
>>
>> OTOH, these asms can be avoided with something like:
>>
>> --cut here--
>> typedef unsigned int uword_t __attribute__ ((mode (__word__)));
>>
>> struct interrupt_frame
>> {
>>   uword_t ip;
>>   uword_t cs;
>>   uword_t flags;
>>   uword_t sp;
>>   uword_t ss;
>> };
>>
>> void
>> __attribute__((naked))
>> test (void)
>> {
>>   register uword_t sp __asm__("sp");
>>
>>   long *error = (long *) sp;
>>   struct interrupt_frame *frame
>> = (struct interrupt_frame *) (sp + sizeof (uword_t));
>>
>>   ...
>>
>
> How about this?  OK for trunk?

Even better.

Can we introduce asm_goto to the jmp in the main asm?

Uros.

Re: [PATCH] i386: Add some naked attribute tests

[H.J. Lu]

On Tue, Aug 1, 2017 at 2:11 PM, Uros Bizjak  wrote:
> On Tue, Aug 1, 2017 at 11:05 PM, H.J. Lu  wrote:
>> On Tue, Aug 1, 2017 at 1:49 PM, Uros Bizjak  wrote:
>>> On Tue, Aug 1, 2017 at 9:46 PM, H.J. Lu  wrote:
 Add some tests for implementing interrupt handlers with naked attribute.

 OK for trunk?

 H.J.
 ---
 * gcc.dg/guality/pr25967-1.c: New test.
 * gcc.dg/guality/pr25967-2.c: Likewise.
 * gcc.dg/torture/pr25967-1.c: Likewise.
 * gcc.dg/torture/pr25967-2.c: Likewise.
>>>
>>> OK with a small change below.
>>>
>>
 +void
 +fn (void)
 +{
 +  struct interrupt_frame *frame;
 +  uword_t error;
 +  asm ("lea " WORD_SIZE "(%%" STACK_POINTER "), %0" : "=r" (frame) : );
 +  asm ("mov (%%" STACK_POINTER "), %0" : "=r" (error) : );
>>>
>>> The above two asm needs to be volatile. They are not "simple" asm, and
>>> access stack pointer behind the compilers back. And please merge them
>>> to one multi-line volatile asm statement.
>>>
>>
>>
>> This is what I am checking in.
>
> OTOH, these asms can be avoided with something like:
>
> --cut here--
> typedef unsigned int uword_t __attribute__ ((mode (__word__)));
>
> struct interrupt_frame
> {
>   uword_t ip;
>   uword_t cs;
>   uword_t flags;
>   uword_t sp;
>   uword_t ss;
> };
>
> void
> __attribute__((naked))
> test (void)
> {
>   register uword_t sp __asm__("sp");
>
>   long *error = (long *) sp;
>   struct interrupt_frame *frame
> = (struct interrupt_frame *) (sp + sizeof (uword_t));
>
>   ...
>

How about this?  OK for trunk?

-- 
H.J.
From b197de39efeac72489188dd2383abb87ff229048 Mon Sep 17 00:00:00 2001
From: "H.J. Lu" 
Date: Tue, 1 Aug 2017 14:21:07 -0700
Subject: [PATCH] i386: Add more naked attribute tests

Add some tests for implementing interrupt handlers with naked attribute
and without asm statements.

	* gcc.dg/guality/pr25967-3.c: New test.
	* gcc.dg/guality/pr25967-4.c: Likewise.
	* gcc.dg/torture/pr25967-3.c: Likewise.
	* gcc.dg/torture/pr25967-4.c: Likewise.
---
 gcc/testsuite/gcc.dg/guality/pr25967-3.c | 70 
 gcc/testsuite/gcc.dg/guality/pr25967-4.c | 64 +
 gcc/testsuite/gcc.dg/torture/pr25967-3.c | 63 
 gcc/testsuite/gcc.dg/torture/pr25967-4.c | 58 ++
 4 files changed, 255 insertions(+)
 create mode 100644 gcc/testsuite/gcc.dg/guality/pr25967-3.c
 create mode 100644 gcc/testsuite/gcc.dg/guality/pr25967-4.c
 create mode 100644 gcc/testsuite/gcc.dg/torture/pr25967-3.c
 create mode 100644 gcc/testsuite/gcc.dg/torture/pr25967-4.c

diff --git a/gcc/testsuite/gcc.dg/guality/pr25967-3.c b/gcc/testsuite/gcc.dg/guality/pr25967-3.c
new file mode 100644
index 000..0924d1c03c1
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/guality/pr25967-3.c
@@ -0,0 +1,70 @@
+/* { dg-do run { target i?86-*-* x86_64-*-* } } */
+/* { dg-options "-g -mgeneral-regs-only" } */
+
+extern void exit (int);
+
+typedef unsigned int uword_t __attribute__ ((mode (__word__)));
+
+#define ERROR		0x12345670
+#define IP		0x12345671
+#define CS		0x12345672
+#define FLAGS		0x12345673
+#define SP		0x12345674
+#define SS		0x12345675
+
+#define STRING(x)	XSTRING(x)
+#define XSTRING(x)	#x
+#define ASMNAME(cname)  ASMNAME2 (__USER_LABEL_PREFIX__, cname)
+#define ASMNAME2(prefix, cname) XSTRING (prefix) cname
+
+struct interrupt_frame
+{
+  uword_t ip;
+  uword_t cs;
+  uword_t flags;
+  uword_t sp;
+  uword_t ss;
+};
+
+__attribute__((naked, used))
+void
+fn (void)
+{
+  register uword_t *sp __asm__("sp");
+  uword_t error = *sp;
+  struct interrupt_frame *frame = (struct interrupt_frame *) (sp + 1);
+  if (ERROR != error)		/* BREAK */
+__builtin_abort ();
+  if (IP != frame->ip)
+__builtin_abort ();
+  if (CS != frame->cs)
+__builtin_abort ();
+  if (FLAGS != frame->flags)
+__builtin_abort ();
+  if (SP != frame->sp)
+__builtin_abort ();
+  if (SS != frame->ss)
+__builtin_abort ();
+
+  exit (0);
+}
+
+int
+main ()
+{
+  asm ("push	$" STRING (SS) ";		\
+	push	$" STRING (SP) ";		\
+	push	$" STRING (FLAGS) ";		\
+	push	$" STRING (CS) ";		\
+	push	$" STRING (IP) ";		\
+	push	$" STRING (ERROR) ";		\
+	jmp	 " ASMNAME ("fn"));
+  return 0;
+}
+
+/* { dg-final { gdb-test 36 "error" "0x12345670" } } */
+/* { dg-final { gdb-test 36 "frame->ip" "0x12345671" } } */
+/* { dg-final { gdb-test 36 "frame->cs" "0x12345672" } } */
+/* { dg-final { gdb-test 36 "frame->flags" "0x12345673" } } */
+/* { dg-final { gdb-test 36 "frame->sp" "0x12345674" } } */
+/* { dg-final { gdb-test 36 "frame->ss" "0x12345675" } } */
diff --git a/gcc/testsuite/gcc.dg/guality/pr25967-4.c b/gcc/testsuite/gcc.dg/guality/pr25967-4.c
new file mode 100644
index 000..c3b59e21251
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/guality/pr25967-4.c
@@ -0,0 +1,64 @@
+/* { dg-do run { target i?86-*-* 

Re: [PATCH] i386: Add some naked attribute tests

[Uros Bizjak]

On Tue, Aug 1, 2017 at 11:05 PM, H.J. Lu  wrote:
> On Tue, Aug 1, 2017 at 1:49 PM, Uros Bizjak  wrote:
>> On Tue, Aug 1, 2017 at 9:46 PM, H.J. Lu  wrote:
>>> Add some tests for implementing interrupt handlers with naked attribute.
>>>
>>> OK for trunk?
>>>
>>> H.J.
>>> ---
>>> * gcc.dg/guality/pr25967-1.c: New test.
>>> * gcc.dg/guality/pr25967-2.c: Likewise.
>>> * gcc.dg/torture/pr25967-1.c: Likewise.
>>> * gcc.dg/torture/pr25967-2.c: Likewise.
>>
>> OK with a small change below.
>>
>
>>> +void
>>> +fn (void)
>>> +{
>>> +  struct interrupt_frame *frame;
>>> +  uword_t error;
>>> +  asm ("lea " WORD_SIZE "(%%" STACK_POINTER "), %0" : "=r" (frame) : );
>>> +  asm ("mov (%%" STACK_POINTER "), %0" : "=r" (error) : );
>>
>> The above two asm needs to be volatile. They are not "simple" asm, and
>> access stack pointer behind the compilers back. And please merge them
>> to one multi-line volatile asm statement.
>>
>
>
> This is what I am checking in.

OTOH, these asms can be avoided with something like:

--cut here--
typedef unsigned int uword_t __attribute__ ((mode (__word__)));

struct interrupt_frame
{
  uword_t ip;
  uword_t cs;
  uword_t flags;
  uword_t sp;
  uword_t ss;
};

void
__attribute__((naked))
test (void)
{
  register uword_t sp __asm__("sp");

  long *error = (long *) sp;
  struct interrupt_frame *frame
= (struct interrupt_frame *) (sp + sizeof (uword_t));

  ...
}

Uros.

Re: [PATCH] i386: Add some naked attribute tests

[H.J. Lu]

On Tue, Aug 1, 2017 at 1:49 PM, Uros Bizjak  wrote:
> On Tue, Aug 1, 2017 at 9:46 PM, H.J. Lu  wrote:
>> Add some tests for implementing interrupt handlers with naked attribute.
>>
>> OK for trunk?
>>
>> H.J.
>> ---
>> * gcc.dg/guality/pr25967-1.c: New test.
>> * gcc.dg/guality/pr25967-2.c: Likewise.
>> * gcc.dg/torture/pr25967-1.c: Likewise.
>> * gcc.dg/torture/pr25967-2.c: Likewise.
>
> OK with a small change below.
>

>> +void
>> +fn (void)
>> +{
>> +  struct interrupt_frame *frame;
>> +  uword_t error;
>> +  asm ("lea " WORD_SIZE "(%%" STACK_POINTER "), %0" : "=r" (frame) : );
>> +  asm ("mov (%%" STACK_POINTER "), %0" : "=r" (error) : );
>
> The above two asm needs to be volatile. They are not "simple" asm, and
> access stack pointer behind the compilers back. And please merge them
> to one multi-line volatile asm statement.
>


This is what I am checking in.

Thanks.


-- 
H.J.
From de294f8dd290c9c8c458ffcb4755a1aff99e336a Mon Sep 17 00:00:00 2001
From: "H.J. Lu" 
Date: Tue, 1 Aug 2017 12:42:12 -0700
Subject: [PATCH] i386: Add some naked attribute tests

Add some tests for implementing interrupt handlers with naked attribute.

	* gcc.dg/guality/pr25967-1.c: New test.
	* gcc.dg/guality/pr25967-2.c: Likewise.
	* gcc.dg/torture/pr25967-1.c: Likewise.
	* gcc.dg/torture/pr25967-2.c: Likewise.
---
 gcc/testsuite/gcc.dg/guality/pr25967-1.c | 80 
 gcc/testsuite/gcc.dg/guality/pr25967-2.c | 72 
 gcc/testsuite/gcc.dg/torture/pr25967-1.c | 73 +
 gcc/testsuite/gcc.dg/torture/pr25967-2.c | 66 ++
 4 files changed, 291 insertions(+)
 create mode 100644 gcc/testsuite/gcc.dg/guality/pr25967-1.c
 create mode 100644 gcc/testsuite/gcc.dg/guality/pr25967-2.c
 create mode 100644 gcc/testsuite/gcc.dg/torture/pr25967-1.c
 create mode 100644 gcc/testsuite/gcc.dg/torture/pr25967-2.c

diff --git a/gcc/testsuite/gcc.dg/guality/pr25967-1.c b/gcc/testsuite/gcc.dg/guality/pr25967-1.c
new file mode 100644
index 000..01d97fe612e
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/guality/pr25967-1.c
@@ -0,0 +1,80 @@
+/* { dg-do run { target i?86-*-* x86_64-*-* } } */
+/* { dg-options "-g -mgeneral-regs-only" } */
+
+extern void exit (int);
+
+typedef unsigned int uword_t __attribute__ ((mode (__word__)));
+
+#define ERROR		0x12345670
+#define IP		0x12345671
+#define CS		0x12345672
+#define FLAGS		0x12345673
+#define SP		0x12345674
+#define SS		0x12345675
+
+#ifdef __x86_64__
+# define STACK_POINTER	"rsp"
+# define WORD_SIZE	"8"
+#else
+# define STACK_POINTER	"esp"
+# define WORD_SIZE	"4"
+#endif
+
+#define STRING(x)	XSTRING(x)
+#define XSTRING(x)	#x
+#define ASMNAME(cname)  ASMNAME2 (__USER_LABEL_PREFIX__, cname)
+#define ASMNAME2(prefix, cname) XSTRING (prefix) cname
+
+struct interrupt_frame
+{
+  uword_t ip;
+  uword_t cs;
+  uword_t flags;
+  uword_t sp;
+  uword_t ss;
+};
+
+__attribute__((naked, used))
+void
+fn (void)
+{
+  struct interrupt_frame *frame;
+  uword_t error;
+  asm volatile ("lea " WORD_SIZE "(%%" STACK_POINTER "), %0\n\t"
+		"mov (%%" STACK_POINTER "), %1" 
+		: "=r" (frame), "=r" (error) :); 
+  if (ERROR != error)		/* BREAK */
+__builtin_abort ();
+  if (IP != frame->ip)
+__builtin_abort ();
+  if (CS != frame->cs)
+__builtin_abort ();
+  if (FLAGS != frame->flags)
+__builtin_abort ();
+  if (SP != frame->sp)
+__builtin_abort ();
+  if (SS != frame->ss)
+__builtin_abort ();
+
+  exit (0);
+}
+
+int
+main ()
+{
+  asm ("push	$" STRING (SS) ";		\
+	push	$" STRING (SP) ";		\
+	push	$" STRING (FLAGS) ";		\
+	push	$" STRING (CS) ";		\
+	push	$" STRING (IP) ";		\
+	push	$" STRING (ERROR) ";		\
+	jmp	 " ASMNAME ("fn"));
+  return 0;
+}
+
+/* { dg-final { gdb-test 46 "error" "0x12345670" } } */
+/* { dg-final { gdb-test 46 "frame->ip" "0x12345671" } } */
+/* { dg-final { gdb-test 46 "frame->cs" "0x12345672" } } */
+/* { dg-final { gdb-test 46 "frame->flags" "0x12345673" } } */
+/* { dg-final { gdb-test 46 "frame->sp" "0x12345674" } } */
+/* { dg-final { gdb-test 46 "frame->ss" "0x12345675" } } */
diff --git a/gcc/testsuite/gcc.dg/guality/pr25967-2.c b/gcc/testsuite/gcc.dg/guality/pr25967-2.c
new file mode 100644
index 000..a8bdf9f546d
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/guality/pr25967-2.c
@@ -0,0 +1,72 @@
+/* { dg-do run { target i?86-*-* x86_64-*-* } } */
+/* { dg-options "-g -mgeneral-regs-only" } */
+
+extern void exit (int);
+
+typedef unsigned int uword_t __attribute__ ((mode (__word__)));
+
+#define IP		0x12345671
+#define CS		0x12345672
+#define FLAGS		0x12345673
+#define SP		0x12345674
+#define SS		0x12345675
+
+#ifdef __x86_64__
+# define STACK_POINTER	"rsp"
+# define WORD_SIZE	"8"
+#else
+# define STACK_POINTER	"esp"
+# define WORD_SIZE	"4"
+#endif
+
+#define STRING(x)	XSTRING(x)
+#define XSTRING(x)	#x
+#define ASMNAME(cname)  ASMNAME2 (__USER_LABEL_PREFIX__, cname)

Re: C PATCH to further improve diagnostic for -Wsign-compare (PR c/81417)

[David Malcolm]

On Tue, 2017-08-01 at 16:15 +0200, Marek Polacek wrote:
> On Mon, Jul 31, 2017 at 11:31:44AM -0400, David Malcolm wrote:
> > On Mon, 2017-07-31 at 16:14 +0200, Marek Polacek wrote:
> > > This patch improves the diagnostic of -Wsign-compare for ?: by
> > > also
> > > printing
> > > the types, similarly to my recent patch.  But we can do even
> > > better
> > > here if we
> > > actually point to the operand in question, so I passed the
> > > locations
> > > of the
> > > operands from the parser.
> > 
> > Thanks for updating the patch.
> > 
> > >   So instead of 
> > > 
> > > x.c:8:16: warning: signed and unsigned type in conditional
> > > expression
> > > [-Wsign-compare]
> > >return x ? y : -1;
> > > ^
> > > you'll now see:
> > > 
> > > x.c:8:18: warning: operand of conditional expression changes
> > > signedness: 'int' to 'unsigned int' [-Wsign-compare]
> > >return x ? y : -1;
> > >   ^
> > 
> > That's an improvement, but I would have expected it to underline
> > the
> > whole of the pertinent subexpression e.g.:
> > 
> >return x ? y : -1;
> >   ^~
> > 
> > rather than just:
> > 
> >return x ? y : -1;
> >   ^
> > 
> > From my reading of the patch, it's capturing just the location of
> > the
> > first token within the subexpression (hence e.g. just the minus
> > token
> > in the example above, which happens to make some sense for this
> > case,
> > but wouldn't in general).
> 
> Right.
> 
> > Hopefully you can get at the location_t for the whole of the
> > subexpression using c_expr, rather than peeking at the first token.
> 
> It didn't seem obvious to me how to do that, but I've spent more time
> on this now.  I believe we need to use make_location (I've introduced
> a new overload), as in the patch below.  Or did you in mind anything
> else?

I think I was confused with the C++ frontend, where cp_expr has a
location_t representing all three of (caret, start, finish), whereas in
the C frontend c_expr has a source_range, representing just (start,
finish).

New overload looks reasonable.

> > > Bootstrapped/regtested on x86_64-linux, ok for trunk?
> > 
> > The patch doesn't have a testcase for the location information;
> > please
> > add one, using -fdiagnostics-show-caret and dg-begin-multiline-
> > output/
> > dg-end-multiline-output.  Please ensure that the pertinent
> > expressions
> > are more than one character wide, so that the test properly
> > verifies
> > the underlining.
> 
> Done.
> 
> Bootstrapped/regtested on x86_64-linux, ok for trunk?

Thanks for updating the patch.

I'm wondering if the messages could use a slight rewording, to give a
clue to the user about the reason *why* the expression has changed
signedness.  The old message "signed and unsigned type in conditional
expression" gave the clue (but failed to underline the subexpression
changing sign, and tell what the old/new types were).

A horribly verbose way to put it would be something like:

"operand of conditional expression with mixed signedness changes
signedness from %qT to %qT due to promotion to unsigned to match
unsignedness of other operand" (ugh)

(assuming I'm understanding the logic correctly)

or something like:

"operand of conditional expression changes signedness from %qT to %qT
due to unsignedness of other operand"

or somesuch (am not 100% happy with that either).


Other than than, LGTM.


> 2017-08-01  Marek Polacek  
> 
>   PR c/81417
>   * c-array-notation.c (fix_builtin_array_notation_fn): Update
> calls to
>   build_conditional_expr. 
>   * c-parser.c (c_parser_conditional_expression): Create
> locations for
>   EXP1 and EXP2 from their source ranges.  Pass the locations
> down to
>   build_conditional_expr.
>   * c-tree.h (build_conditional_expr): Update declaration.
>   * c-typeck.c (build_conditional_expr): Add location_t
> parameters.
>   For -Wsign-compare, also print the types.
> 
>   * input.c (make_location): New overload.
>   * input.h (make_location): Declare.
> 
>   * objc-next-runtime-abi-02.c (build_v2_build_objc_method_call):
> Update
>   a call to build_conditional_expr.
> 
>   * Wsign-compare-1.c: New test.
>   * gcc.dg/compare1.c: Adjust dg-bogus.
>   * gcc.dg/compare2.c: Likewise.
>   * gcc.dg/compare3.c: Likewise.
>   * gcc.dg/compare7.c: Likewise.
>   * gcc.dg/compare8.c: Likewise.
>   * gcc.dg/compare9.c: Likewise.
>   * gcc.dg/pr11492.c: Likewise.
> 
> diff --git gcc/c/c-array-notation.c gcc/c/c-array-notation.c
> index e430f5c681b..40f1cfdabb8 100644
> --- gcc/c/c-array-notation.c
> +++ gcc/c/c-array-notation.c
> @@ -355,8 +355,9 @@ fix_builtin_array_notation_fn (tree
> an_builtin_fn, tree *new_var)
>new_cond_expr = build2 (NE_EXPR, TREE_TYPE (func_parm),
> func_parm,
> build_zero_cst (TREE_TYPE
> (func_parm)));
>new_expr = build_conditional_expr
> - 

Add support for const-qualified variables to -fdump-ada-spec

[Eric Botcazou]

Plus a couple of minor tweaks left and right.

Bootstrapped/regtested on x86_64-suse-linux, applied on the mainline.


2017-08-01  Eric Botcazou  

c-family/
* c-ada-spec.c (print_generic_ada_decl):Pass correctly-typed constant
(dump_ada_function_declaration): Likewise.
(dump_generic_ada_node): Likewise.
(print_ada_declaration): Add support for const-qualified variables.

-- 
Eric BotcazouIndex: c-family/c-ada-spec.c
===
--- c-family/c-ada-spec.c	(revision 250718)
+++ c-family/c-ada-spec.c	(working copy)
@@ -858,7 +858,7 @@ print_generic_ada_decl (pretty_printer *pp, tree d
 {
   source_file_base = source_file;
 
-  if (print_ada_declaration (pp, decl, 0, INDENT_INCR))
+  if (print_ada_declaration (pp, decl, NULL_TREE, INDENT_INCR))
 {
   pp_newline (pp);
   pp_newline (pp);
@@ -1655,7 +1655,8 @@ dump_ada_function_declaration (pretty_printer *buf
 	  if (DECL_NAME (arg))
 	{
 	  check_name (buffer, arg);
-	  pp_ada_tree_identifier (buffer, DECL_NAME (arg), 0, false);
+	  pp_ada_tree_identifier (buffer, DECL_NAME (arg), NULL_TREE,
+  false);
 	  pp_string (buffer, " : ");
 	}
 	  else
@@ -2096,7 +2097,7 @@ dump_generic_ada_node (pretty_printer *buffer, tre
 	  {
 	if (DECL_NAME (node))
 	  pp_ada_tree_identifier
-		(buffer, DECL_NAME (node), 0, limited_access);
+		(buffer, DECL_NAME (node), NULL_TREE, limited_access);
 	else
 	  pp_string (buffer, "");
 	  }
@@ -3097,6 +3098,9 @@ print_ada_declaration (pretty_printer *buffer, tre
 	{
 	  pp_string (buffer, "aliased ");
 
+	  if (TREE_READONLY (t))
+		pp_string (buffer, "constant ");
+
 	  if (TYPE_NAME (TREE_TYPE (t)))
 		dump_generic_ada_node
 		  (buffer, TREE_TYPE (t), t, spc, false, true);
@@ -3110,6 +3114,9 @@ print_ada_declaration (pretty_printer *buffer, tre
 		  || TREE_CODE (TREE_TYPE (t)) != INTEGER_TYPE))
 		pp_string (buffer, "aliased ");
 
+	  if (TREE_READONLY (t))
+		pp_string (buffer, "constant ");
+
 	  dump_generic_ada_node
 		(buffer, TREE_TYPE (t), TREE_TYPE (t), spc, false, true);
 	}

Re: [PATCH] i386: Add some naked attribute tests

[Uros Bizjak]

On Tue, Aug 1, 2017 at 9:46 PM, H.J. Lu  wrote:
> Add some tests for implementing interrupt handlers with naked attribute.
>
> OK for trunk?
>
> H.J.
> ---
> * gcc.dg/guality/pr25967-1.c: New test.
> * gcc.dg/guality/pr25967-2.c: Likewise.
> * gcc.dg/torture/pr25967-1.c: Likewise.
> * gcc.dg/torture/pr25967-2.c: Likewise.

OK with a small change below.

Thanks,
Uros.

>  gcc/testsuite/gcc.dg/guality/pr25967-1.c | 79 
> 
>  gcc/testsuite/gcc.dg/guality/pr25967-2.c | 72 +
>  gcc/testsuite/gcc.dg/torture/pr25967-1.c | 72 +
>  gcc/testsuite/gcc.dg/torture/pr25967-2.c | 66 ++
>  4 files changed, 289 insertions(+)
>  create mode 100644 gcc/testsuite/gcc.dg/guality/pr25967-1.c
>  create mode 100644 gcc/testsuite/gcc.dg/guality/pr25967-2.c
>  create mode 100644 gcc/testsuite/gcc.dg/torture/pr25967-1.c
>  create mode 100644 gcc/testsuite/gcc.dg/torture/pr25967-2.c
>
> diff --git a/gcc/testsuite/gcc.dg/guality/pr25967-1.c 
> b/gcc/testsuite/gcc.dg/guality/pr25967-1.c
> new file mode 100644
> index 000..1100aa638a4
> --- /dev/null
> +++ b/gcc/testsuite/gcc.dg/guality/pr25967-1.c
> @@ -0,0 +1,79 @@
> +/* { dg-do run { target i?86-*-* x86_64-*-* } } */
> +/* { dg-options "-g -mgeneral-regs-only" } */
> +
> +extern void exit (int);
> +
> +typedef unsigned int uword_t __attribute__ ((mode (__word__)));
> +
> +#define ERROR  0x12345670
> +#define IP 0x12345671
> +#define CS 0x12345672
> +#define FLAGS  0x12345673
> +#define SP 0x12345674
> +#define SS 0x12345675
> +
> +#ifdef __x86_64__
> +# define STACK_POINTER "rsp"
> +# define WORD_SIZE "8"
> +#else
> +# define STACK_POINTER "esp"
> +# define WORD_SIZE "4"
> +#endif
> +
> +#define STRING(x)  XSTRING(x)
> +#define XSTRING(x) #x
> +#define ASMNAME(cname)  ASMNAME2 (__USER_LABEL_PREFIX__, cname)
> +#define ASMNAME2(prefix, cname) XSTRING (prefix) cname
> +
> +struct interrupt_frame
> +{
> +  uword_t ip;
> +  uword_t cs;
> +  uword_t flags;
> +  uword_t sp;
> +  uword_t ss;
> +};
> +
> +__attribute__((naked, used))
> +void
> +fn (void)
> +{
> +  struct interrupt_frame *frame;
> +  uword_t error;
> +  asm ("lea " WORD_SIZE "(%%" STACK_POINTER "), %0" : "=r" (frame) : );
> +  asm ("mov (%%" STACK_POINTER "), %0" : "=r" (error) : );

The above two asm needs to be volatile. They are not "simple" asm, and
access stack pointer behind the compilers back. And please merge them
to one multi-line volatile asm statement.

> +  if (ERROR != error)  /* BREAK */
> +__builtin_abort ();
> +  if (IP != frame->ip)
> +__builtin_abort ();
> +  if (CS != frame->cs)
> +__builtin_abort ();
> +  if (FLAGS != frame->flags)
> +__builtin_abort ();
> +  if (SP != frame->sp)
> +__builtin_abort ();
> +  if (SS != frame->ss)
> +__builtin_abort ();
> +
> +  exit (0);
> +}
> +
> +int
> +main ()
> +{
> +  asm ("push   $" STRING (SS) ";   \
> +   push$" STRING (SP) ";   \
> +   push$" STRING (FLAGS) ";\
> +   push$" STRING (CS) ";   \
> +   push$" STRING (IP) ";   \
> +   push$" STRING (ERROR) ";\
> +   jmp  " ASMNAME ("fn"));
> +  return 0;
> +}
> +
> +/* { dg-final { gdb-test 45 "error" "0x12345670" } } */
> +/* { dg-final { gdb-test 45 "frame->ip" "0x12345671" } } */
> +/* { dg-final { gdb-test 45 "frame->cs" "0x12345672" } } */
> +/* { dg-final { gdb-test 45 "frame->flags" "0x12345673" } } */
> +/* { dg-final { gdb-test 45 "frame->sp" "0x12345674" } } */
> +/* { dg-final { gdb-test 45 "frame->ss" "0x12345675" } } */
> diff --git a/gcc/testsuite/gcc.dg/guality/pr25967-2.c 
> b/gcc/testsuite/gcc.dg/guality/pr25967-2.c
> new file mode 100644
> index 000..dde31e82d43
> --- /dev/null
> +++ b/gcc/testsuite/gcc.dg/guality/pr25967-2.c
> @@ -0,0 +1,72 @@
> +/* { dg-do run { target i?86-*-* x86_64-*-* } } */
> +/* { dg-options "-g -mgeneral-regs-only" } */
> +
> +extern void exit (int);
> +
> +typedef unsigned int uword_t __attribute__ ((mode (__word__)));
> +
> +#define IP 0x12345671
> +#define CS 0x12345672
> +#define FLAGS  0x12345673
> +#define SP 0x12345674
> +#define SS 0x12345675
> +
> +#ifdef __x86_64__
> +# define STACK_POINTER "rsp"
> +# define WORD_SIZE "8"
> +#else
> +# define STACK_POINTER "esp"
> +# define WORD_SIZE "4"
> +#endif
> +
> +#define STRING(x)  XSTRING(x)
> +#define XSTRING(x) #x
> +#define ASMNAME(cname)  ASMNAME2 (__USER_LABEL_PREFIX__, cname)
> +#define ASMNAME2(prefix, cname) XSTRING (prefix) cname
> +
> +struct interrupt_frame
> +{
> +  uword_t ip;
> +  uword_t cs;
> +  uword_t flags;
> +  uword_t sp;
> +  uword_t ss;
> +};
> +
> +__attribute__((naked, used))
> +void
> +fn (void)
> +{
> +  struct 

Re: [PATCH] Make mempcpy more optimal (PR middle-end/70140).

[H.J. Lu]

On Tue, Aug 1, 2017 at 12:50 PM, Jakub Jelinek  wrote:
> On Thu, Jul 20, 2017 at 08:59:29AM +0200, Martin Liška wrote:
>> Hello.
>>
>> Following patch does sharing of expansion for mem{p,}cpy and also strpcy 
>> (with a known constant as source)
>> so that we use same type of expansion (direct insns emission, direct 
>> emission with a loop instruction and
>> library call). As mentioned in the PR, glibc does not provide an optimized 
>> version for majority of targets.
>>
>> Patch can bootstrap on ppc64le-redhat-linux and survives regression tests.
>
> This broke e.g.
> FAIL: gcc.dg/20050503-1.c scan-assembler-not call
> on i686-linux, the result is significantly worse.
> Also, while perhaps majority of targets don't provide optimized version,
> some targets do, including i?86/x86_64, and if the memcpy would be expanded
> as a call, it is much better to just emit mempcpy call instead.
> Just look at the testcase, because of this misoptimization we suddenly can't
> use a tail call.
>
> Jakub

I opened:

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=81657

-- 
H.J.

[PATCH] Fix thread_prologue_and_epilogue_insns (PR middle-end/79499)

[Jakub Jelinek]

Hi!

In this function we insert 0-2 prologue sequences (which can sometimes
contain jumps and other insns that need to end basic blocks) on edges,
then commit edge insertions and then finally attempts to find out
into which basic blocks the sequences were inserted and calls
find_many_sub_basic_blocks on those blocks.

As the testcase shows, the guess is sometimes wrong,
commit_one_edge_insertion doesn't always insert on edge->dest, sometimes
it inserts on edge->src and in other cases splits edge and inserts into a
new basic block.

What is certain though is that all the real insns in the sequences are added
somewhere together.  So, what this patch does is finds the first
NONDEBUG_INSN_P, (if there are none, then we shouldn't need
find_many_sub_basic_blocks), and checks in which block it is using
BLOCK_FOR_INSN.

Bootstrapped/regtested on x86_64-linux and i686-linux, ok for trunk/7.2?

2017-08-01  Jakub Jelinek  

PR middle-end/79499
* function.c (thread_prologue_and_epilogue_insns): Determine blocks
for find_many_sub_basic_blocks bitmap by looking up BLOCK_FOR_INSN
of first NONDEBUG_INSN_P in each of the split_prologue_seq and
prologue_seq sequences - if any.

--- gcc/function.c.jj   2017-07-26 13:37:45.0 +0200
+++ gcc/function.c  2017-08-01 14:10:26.909836163 +0200
@@ -6048,20 +6048,42 @@ thread_prologue_and_epilogue_insns (void
 
   if (split_prologue_seq || prologue_seq)
 {
+  rtx_insn *split_prologue_insn = split_prologue_seq;
   if (split_prologue_seq)
-   insert_insn_on_edge (split_prologue_seq, orig_entry_edge);
+   {
+ while (split_prologue_insn && !NONDEBUG_INSN_P (split_prologue_insn))
+   split_prologue_insn = NEXT_INSN (split_prologue_insn);
+ insert_insn_on_edge (split_prologue_seq, orig_entry_edge);
+   }
 
+  rtx_insn *prologue_insn = prologue_seq;
   if (prologue_seq)
-   insert_insn_on_edge (prologue_seq, entry_edge);
+   {
+ while (prologue_insn && !NONDEBUG_INSN_P (prologue_insn))
+   prologue_insn = NEXT_INSN (prologue_insn);
+ insert_insn_on_edge (prologue_seq, entry_edge);
+   }
 
   commit_edge_insertions ();
 
   /* Look for basic blocks within the prologue insns.  */
-  auto_sbitmap blocks (last_basic_block_for_fn (cfun));
-  bitmap_clear (blocks);
-  bitmap_set_bit (blocks, entry_edge->dest->index);
-  bitmap_set_bit (blocks, orig_entry_edge->dest->index);
-  find_many_sub_basic_blocks (blocks);
+  if (split_prologue_insn
+ && BLOCK_FOR_INSN (split_prologue_insn) == NULL)
+   split_prologue_insn = NULL;
+  if (prologue_insn
+ && BLOCK_FOR_INSN (prologue_insn) == NULL)
+   prologue_insn = NULL;
+  if (split_prologue_insn || prologue_insn)
+   {
+ auto_sbitmap blocks (last_basic_block_for_fn (cfun));
+ bitmap_clear (blocks);
+ if (split_prologue_insn)
+   bitmap_set_bit (blocks,
+   BLOCK_FOR_INSN (split_prologue_insn)->index);
+ if (prologue_insn)
+   bitmap_set_bit (blocks, BLOCK_FOR_INSN (prologue_insn)->index);
+ find_many_sub_basic_blocks (blocks);
+   }
 }
 
   default_rtl_profile ();
--- gcc/testsuite/gcc.dg/pr79499.c.jj   2017-08-01 13:57:36.120485689 +0200
+++ gcc/testsuite/gcc.dg/pr79499.c  2017-08-01 13:57:26.0 +0200
@@ -0,0 +1,13 @@
+/* PR middle-end/79499 */
+/* { dg-do compile { target split_stack } } */
+/* { dg-options "-O2 -fsplit-stack -fno-omit-frame-pointer" } */
+
+struct S { struct S *a, *b; };
+
+void
+foo (struct S *x)
+{
+  do
+x->b = x->a;
+  while (x = x->a);
+}

Jakub

Re: [PATCH] 386: Disallow naked attribute with interrupt attribute

[Uros Bizjak]

On Tue, Aug 1, 2017 at 10:20 PM, H.J. Lu  wrote:
> OK for trunk?
>
> H.J.
> ---
> gcc/
>
> PR target/81654
> * config/i386/i386.c (ix86_set_func_type): Disallow naked
> attribute with interrupt attribute.
>
> gcc/testsuite/
>
> PR target/81654
> * gcc.target/i386/pr81654.c: New test.

OK.

Thanks,
Uros.

>  gcc/config/i386/i386.c  | 4 
>  gcc/testsuite/gcc.target/i386/pr81654.c | 8 
>  2 files changed, 12 insertions(+)
>  create mode 100644 gcc/testsuite/gcc.target/i386/pr81654.c
>
> diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
> index 494a18a2cd1..587dbe61e8b 100644
> --- a/gcc/config/i386/i386.c
> +++ b/gcc/config/i386/i386.c
> @@ -7523,6 +7523,10 @@ ix86_set_func_type (tree fndecl)
>if (lookup_attribute ("interrupt",
> TYPE_ATTRIBUTES (TREE_TYPE (fndecl
> {
> + if (ix86_function_naked (fndecl))
> +   error_at (DECL_SOURCE_LOCATION (fndecl),
> + "interrupt and naked attributes are not compatible");
> +
>   int nargs = 0;
>   for (tree arg = DECL_ARGUMENTS (fndecl);
>arg;
> diff --git a/gcc/testsuite/gcc.target/i386/pr81654.c 
> b/gcc/testsuite/gcc.target/i386/pr81654.c
> new file mode 100644
> index 000..2a1a4b72f1e
> --- /dev/null
> +++ b/gcc/testsuite/gcc.target/i386/pr81654.c
> @@ -0,0 +1,8 @@
> +/* { dg-do compile } */
> +/* { dg-options "-O2 -mgeneral-regs-only" } */
> +
> +__attribute__((interrupt, naked))
> +void
> +fn (void *frame) /* { dg-error "not compatible" } */
> +{
> +}
> --
> 2.13.3
>

[PATCH] 386: Disallow naked attribute with interrupt attribute

[H.J. Lu]

OK for trunk?

H.J.
---
gcc/

PR target/81654
* config/i386/i386.c (ix86_set_func_type): Disallow naked
attribute with interrupt attribute.

gcc/testsuite/

PR target/81654
* gcc.target/i386/pr81654.c: New test.
---
 gcc/config/i386/i386.c  | 4 
 gcc/testsuite/gcc.target/i386/pr81654.c | 8 
 2 files changed, 12 insertions(+)
 create mode 100644 gcc/testsuite/gcc.target/i386/pr81654.c

diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
index 494a18a2cd1..587dbe61e8b 100644
--- a/gcc/config/i386/i386.c
+++ b/gcc/config/i386/i386.c
@@ -7523,6 +7523,10 @@ ix86_set_func_type (tree fndecl)
   if (lookup_attribute ("interrupt",
TYPE_ATTRIBUTES (TREE_TYPE (fndecl
{
+ if (ix86_function_naked (fndecl))
+   error_at (DECL_SOURCE_LOCATION (fndecl),
+ "interrupt and naked attributes are not compatible");
+
  int nargs = 0;
  for (tree arg = DECL_ARGUMENTS (fndecl);
   arg;
diff --git a/gcc/testsuite/gcc.target/i386/pr81654.c 
b/gcc/testsuite/gcc.target/i386/pr81654.c
new file mode 100644
index 000..2a1a4b72f1e
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr81654.c
@@ -0,0 +1,8 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -mgeneral-regs-only" } */
+
+__attribute__((interrupt, naked))
+void
+fn (void *frame) /* { dg-error "not compatible" } */
+{
+}
-- 
2.13.3

Re: C PATCH to further improve diagnostic for -Wsign-compare (PR c/81417)

[David Malcolm]

On Mon, 2017-07-31 at 18:05 +0200, Marek Polacek wrote:
> On Mon, Jul 31, 2017 at 09:54:03AM -0600, Martin Sebor wrote:
> > On 07/31/2017 08:14 AM, Marek Polacek wrote:
> > > This patch improves the diagnostic of -Wsign-compare for ?: by
> > > also printing
> > > the types, similarly to my recent patch.  But we can do even
> > > better here if we
> > > actually point to the operand in question, so I passed the
> > > locations of the
> > > operands from the parser.  So instead of
> > > 
> > > x.c:8:16: warning: signed and unsigned type in conditional
> > > expression [-Wsign-compare]
> > >return x ? y : -1;
> > > ^
> > > you'll now see:
> > > 
> > > x.c:8:18: warning: operand of conditional expression changes
> > > signedness: 'int' to 'unsigned int' [-Wsign-compare]
> > >return x ? y : -1;
> > >   ^
> > 
> > I like that this is more informative than the last warning you
> > committed for this bug: it says what type the operand is converted
> > to.  The last one only shows what the types of the operands are but
> > leaves users guessing as to what that might mean (integer promotion
> > rules are often poorly understood).  Where the last warning prints
> > 
> >   comparison of integer expressions of different signedness: ‘int’
> > and
> > ‘unsigned int’
> > 
> > it would be nice to go back and add this detail to it as well, and
> > have it print something like this instead:
> > 
> >   comparison of integer expressions of different signedness changes
> > type of
> > the second operand from ‘int’ to ‘unsigned int’
> > 
> > Where constant expressions are involved it would also be helpful
> > to show the result of the conversion.  For instance:
> > 
> >   comparison between ‘int’ and ‘unsigned int’ changes the value of
> > the
> > second operand from ‘-1’ to ‘4294967296’
> 
> Hmm, interesting.  I could do that.  How do other people feel about
> this?
> 
>   Marek

I think that printing values is very helpful for convincing the user
that they need to listen to the compiler.

That said, we could do a better job of printing values (and boundary
values), especially for large values near a power of two; Martin filed
that as PR 80437; I've added some thoughts on that to that PR.

Re: [PATCH] Make mempcpy more optimal (PR middle-end/70140).

[Jakub Jelinek]

On Thu, Jul 20, 2017 at 08:59:29AM +0200, Martin Liška wrote:
> Hello.
> 
> Following patch does sharing of expansion for mem{p,}cpy and also strpcy 
> (with a known constant as source)
> so that we use same type of expansion (direct insns emission, direct emission 
> with a loop instruction and
> library call). As mentioned in the PR, glibc does not provide an optimized 
> version for majority of targets.
> 
> Patch can bootstrap on ppc64le-redhat-linux and survives regression tests.

This broke e.g.
FAIL: gcc.dg/20050503-1.c scan-assembler-not call
on i686-linux, the result is significantly worse.
Also, while perhaps majority of targets don't provide optimized version,
some targets do, including i?86/x86_64, and if the memcpy would be expanded
as a call, it is much better to just emit mempcpy call instead.
Just look at the testcase, because of this misoptimization we suddenly can't
use a tail call.

Jakub

[PATCH 3/3] matching tokens: C++ parts (v2)

[David Malcolm]

Changed in v2:

* Renamed template argument to traits_t; eliminated subclasses, just
  using traits struct.
* Moved constants into struct bodies.
* Fixed typo.

OK for trunk?

gcc/cp/ChangeLog:
* parser.c (cp_parser_error): Update for new param to
c_parse_error.
(class token_pair): New class.
(struct matching_paren_traits): New struct.
(matching_parens): New typedef.
(struct matching_brace_traits): New struct.
(matching_braces): New typedef.
(cp_parser_statement_expr): Convert explicit parsing of
CPP_OPEN_PAREN and CPP_CLOSE_PAREN to use of
class matching_parens, so that the pertinent open parenthesis is
highlighted when there are problems locating the close
parenthesis.
(cp_parser_primary_expression): Likewise.
(cp_parser_postfix_expression): Likewise.
(cp_parser_parenthesized_expression_list): Likewise.
(cp_parser_unary_expression): Likewise.
(cp_parser_new_expression): Likewise.
(cp_parser_cast_expression): Likewise.
(cp_parser_builtin_offsetof): Likewise.
(cp_parser_trait_expr): Likewise.
(cp_parser_lambda_declarator_opt): Likewise.
(cp_parser_lambda_body): Likewise, for matching_braces.
(cp_parser_compound_statement): Likewise.
(cp_parser_selection_statement): Likewise, for matching_parens.
(cp_parser_iteration_statement): Likewise.
(cp_parser_already_scoped_statement): Likewise, for
matching_braces.
(cp_parser_linkage_specification): Likewise.
(cp_parser_static_assert): Likewise, for matching_parens.
(cp_parser_decltype): Likewise.
(cp_parser_operator): Likewise.
(cp_parser_enum_specifier): Likewise.
(cp_parser_namespace_definition): Likewise.
(cp_parser_direct_declarator): Likewise.
(cp_parser_braced_list): Likewise.
(cp_parser_class_specifier_1): Likewise, for matching_braces.
(cp_parser_constant_initializer): Likewise.
(cp_parser_noexcept_specification_opt): Likewise, for
matching_parens.
(cp_parser_exception_specification_opt): Likewise.
(cp_parser_handler): Likewise.
(cp_parser_asm_specification_opt): Likewise.
(cp_parser_asm_operand_list): Likewise.
(cp_parser_gnu_attributes_opt): Likewise.
(cp_parser_std_attribute_spec): Likewise.
(cp_parser_requirement_parameter_list): Likewise.
(cp_parser_requirement_body): Likewise, for matching_braces.
(cp_parser_compound_requirement): Likewise.
(cp_parser_template_introduction): Likewise.
(cp_parser_sizeof_pack): Likewise, for matching_parens.
(cp_parser_sizeof_operand): Likewise.
(get_matching_symbol): New function.
(cp_parser_required_error): Add param "matching_location".  Remove
calls to cp_parser_error, instead setting a non-NULL gmsgid, and
handling it if set by calling c_parse_error, potentially with a
secondary location if matching_location was set.
(cp_parser_require): Add param "matching_location", with a default
value of UNKNOWN_LOCATION.
(cp_parser_require_keyword): Update for new param of
cp_parser_required_error.
(cp_parser_objc_encode_expression): Update to class matching_parens
as above.
(cp_parser_objc_defs_expression): Likewise.
(cp_parser_objc_protocol_expression): Likewise.
(cp_parser_objc_selector_expression): Likewise.
(cp_parser_objc_typename): Likewise.
(cp_parser_objc_superclass_or_category): Likewise.
(cp_parser_objc_try_catch_finally_statement): Likewise.
(cp_parser_objc_synchronized_statement): Likewise.
(cp_parser_objc_at_property_declaration): Likewise.
(cp_parser_oacc_single_int_clause): Likewise.
(cp_parser_oacc_shape_clause): Likewise.
(cp_parser_omp_clause_collapse): Likewise.
(cp_parser_omp_clause_default): Likewise.
(cp_parser_omp_clause_final): Likewise.
(cp_parser_omp_clause_if): Likewise.
(cp_parser_omp_clause_num_threads): Likewise.
(cp_parser_omp_clause_num_tasks): Likewise.
(cp_parser_omp_clause_grainsize): Likewise.
(cp_parser_omp_clause_priority): Likewise.
(cp_parser_omp_clause_hint): Likewise.
(cp_parser_omp_clause_defaultmap): Likewise.
(cp_parser_omp_clause_ordered): Likewise.
(cp_parser_omp_clause_schedule): Likewise.
(cp_parser_omp_clause_num_teams): Likewise.
(cp_parser_omp_clause_thread_limit): Likewise.
(cp_parser_omp_clause_aligned): Likewise.
(cp_parser_omp_clause_linear): Likewise.
(cp_parser_omp_clause_safelen): Likewise.
(cp_parser_omp_clause_simdlen): Likewise.
(cp_parser_omp_clause_depend): Likewise.
(cp_parser_omp_clause_device): Likewise.

[PATCH 2/3] Matching tokens: C parts (v2)

[David Malcolm]

Changed in v2:

* Renamed template argument to traits_t; eliminated subclasses, just
  using traits struct.
* Moved enum constants into struct bodies (string constants can't be
  without constexpr, which isn't available in C++98).
* Fixed typo.

OK for trunk?

gcc/c/ChangeLog:
* c-parser.c (c_parser_error): Rename to...
(c_parser_error_richloc): ...this, making static, and adding
"richloc" parameter, passing it to the c_parse_error call,
rather than calling c_parser_set_source_position_from_token.
(c_parser_error): Reintroduce, reimplementing in terms of the
above, converting return type from void to bool.
(class token_pair): New class.
(struct matching_paren_traits): New struct.
(matching_parens): New typedef.
(struct matching_brace_traits): New struct.
(matching_braces): New typedef.
(get_matching_symbol): New function.
(c_parser_require): Add param MATCHING_LOCATION, using it to
highlight matching "opening" tokens for missing "closing" tokens.
(c_parser_skip_until_found): Likewise.
(c_parser_static_assert_declaration_no_semi): Convert explicit
parsing of CPP_OPEN_PAREN and CPP_CLOSE_PAREN to use of
class matching_parens, so that the pertinent open parenthesis is
highlighted when there are problems locating the close
parenthesis.
(c_parser_struct_or_union_specifier): Likewise.
(c_parser_typeof_specifier): Likewise.
(c_parser_alignas_specifier): Likewise.
(c_parser_simple_asm_expr): Likewise.
(c_parser_braced_init): Likewise, for matching_braces.
(c_parser_paren_condition): Likewise, for matching_parens.
(c_parser_switch_statement): Likewise.
(c_parser_for_statement): Likewise.
(c_parser_asm_statement): Likewise.
(c_parser_asm_operands): Likewise.
(c_parser_cast_expression): Likewise.
(c_parser_sizeof_expression): Likewise.
(c_parser_alignof_expression): Likewise.
(c_parser_generic_selection): Likewise.
(c_parser_postfix_expression): Likewise for cases RID_VA_ARG,
RID_OFFSETOF, RID_TYPES_COMPATIBLE_P, RID_AT_SELECTOR,
RID_AT_PROTOCOL, RID_AT_ENCODE, reindenting as necessary.
In case CPP_OPEN_PAREN, pass loc_open_paren to the
c_parser_skip_until_found call.
(c_parser_objc_class_definition): Use class matching_parens as
above.
(c_parser_objc_method_decl): Likewise.
(c_parser_objc_try_catch_finally_statement): Likewise.
(c_parser_objc_synchronized_statement): Likewise.
(c_parser_objc_at_property_declaration): Likewise.
(c_parser_oacc_wait_list): Likewise.
(c_parser_omp_var_list_parens): Likewise.
(c_parser_omp_clause_collapse): Likewise.
(c_parser_omp_clause_default): Likewise.
(c_parser_omp_clause_if): Likewise.
(c_parser_omp_clause_num_threads): Likewise.
(c_parser_omp_clause_num_tasks): Likewise.
(c_parser_omp_clause_grainsize): Likewise.
(c_parser_omp_clause_priority): Likewise.
(c_parser_omp_clause_hint): Likewise.
(c_parser_omp_clause_defaultmap): Likewise.
(c_parser_oacc_single_int_clause): Likewise.
(c_parser_omp_clause_ordered): Likewise.
(c_parser_omp_clause_reduction): Likewise.
(c_parser_omp_clause_schedule): Likewise.
(c_parser_omp_clause_num_teams): Likewise.
(c_parser_omp_clause_thread_limit): Likewise.
(c_parser_omp_clause_aligned): Likewise.
(c_parser_omp_clause_linear): Likewise.
(c_parser_omp_clause_safelen): Likewise.
(c_parser_omp_clause_simdlen): Likewise.
(c_parser_omp_clause_depend): Likewise.
(c_parser_omp_clause_map): Likewise.
(c_parser_omp_clause_device): Likewise.
(c_parser_omp_clause_dist_schedule): Likewise.
(c_parser_omp_clause_proc_bind): Likewise.
(c_parser_omp_clause_uniform): Likewise.
(c_parser_omp_for_loop): Likewise.
(c_parser_cilk_clause_vectorlength): Likewise.
(c_parser_cilk_clause_linear): Likewise.
(c_parser_transaction_expression): Likewise.
* c-parser.h (c_parser_require): Add param matching_location with
default UNKNOWN_LOCATION.
(c_parser_error): Convert return type from void to bool.
(c_parser_skip_until_found): Add param matching_location with
default UNKNOWN_LOCATION.

gcc/testsuite/ChangeLog:
* gcc.dg/unclosed-init.c: New test case.
---
 gcc/c/c-parser.c | 644 +++
 gcc/c/c-parser.h |   8 +-
 gcc/testsuite/gcc.dg/unclosed-init.c |   3 +
 3 files changed, 438 insertions(+), 217 deletions(-)
 create mode 100644 gcc/testsuite/gcc.dg/unclosed-init.c

diff --git a/gcc/c/c-parser.c b/gcc/c/c-parser.c
index 16cd357..3803154 100644
--- 

[PATCH 0/3 v2] C/C++: show pertinent open token when missing a close token

[David Malcolm]

On Wed, 2017-07-12 at 09:13 -0400, Trevor Saunders wrote:
> On Tue, Jul 11, 2017 at 11:24:45AM -0400, David Malcolm wrote:
> > +/* Some tokens naturally come in pairs e.g.'(' and ')'.
> > +   This class is for tracking such a matching pair of symbols.
> > +   In particular, it tracks the location of the first token,
> > +   so that if the second token is missing, we can highlight the
> > +   location of the first token when notifying the user about the
> > +   problem.  */
> > +
> > +template 
> 
> the style guide says template arguments should be in mixed case, so
> TokenPairTraits, and the _t looks odd to my eyes.

My thinking here was to have a way to refer to the template arg
in other locations, but, yes, it turns out not to be necessary.

> > +class token_pair
> > +{
> > + private:
> > +  typedef token_pair_traits_t traits_t;
> 
> I'm not really sure what this is about, you can name it whatever you
> like as a template argument, and this name seems less descriptive of
> what its about.

Fixed by renaming the arg to just "traits_t".

> > + public:
> > +  /* token_pair's ctor.  */
> > +  token_pair () : m_open_loc (UNKNOWN_LOCATION) {}
> 
> What do you think of passing the parser to the ctor, and dropping it
> from the other arguments?  It doesn't seem to make sense to support
> passing in different parsers?

I'm in two minds about this:

(a) yes: the parser ptr is always going to unchanged, and could be
passed in to the ctor, which would avoid needing to pass it in
everywhere the token_pair instancd is used

(b) is the optimizer good enough to realize this, and avoid storing
a second copy of the parser ptr on the stack?  (presumably to
optimize away the 2nd copy of the parser ptr, every call to methods
of the class would need to be inlined, and then the two on-stack
member fields be split up into individual fields, and then copy
propagation could eliminate it).

In this version of the kit I opted to keep passing in the parser ptr
at all the usage sites, but I'm open to making it a field of the
class.

I'm hoping for input on this from the C/C++ frontend maintainers.

> > +  /* If the next token is the closing symbol for this pair,
> > consume it
> > + and return it.
> > + Otherwise, issue an error, highlighting the location of the
> > + corrsponding opening token, and return NULL.  */
> 
> typo.

Thanks; fixed (in both C and C++ frontends).

> > +/* A subclass of token_pair for tracking matching pairs of
> > parentheses.  */
> > +
> > +class matching_parens : public token_pair
> 
> It seems a little strange for this class to both subclass and be the
> traits, given that the token_pair class doesn't need objeects of the
> template argument type.  I'd consider writing this as
> 
> struct matching_paren_traits
> {
>   static const cpp_ttype open_token_type = CPP_OPEN_PAREN;
>   ...
> };
> 
> typedef token_pair matching_parens;

Done (for both C and C++ frontends).

> > +{
> > + public:
> > +  static const enum cpp_ttype open_token_type;
> > +  static const enum required_token required_token_open;
> > +  static const enum cpp_ttype close_token_type;
> > +  static const enum required_token required_token_close;
> 
> Given that these are static consts of integer type I think its fine
> to
> define them inline in the class.

Done, though in the C frontend there are some const char * static
consts which have to be defined outside (since constexpr is guaranteed
to be available to us).

> > +class matching_braces : public token_pair
> 
> same comments here.
> 
> thanks
> 
> Trev

Thanks.

Updated patch kit follows.

Successfully bootstrapped the combination of the patches
on x86_64-pc-linux-gnu (as before I've split up the patches for
ease-of-review; they're not independent of each other).

Patch 1 is already approved; are patches 2 and 3 OK for trunk?

Thanks
Dave


David Malcolm (3):
  matching tokens: c-family parts
  Matching tokens: C parts (v2)
  matching tokens: C++ parts (v2)

 gcc/c-family/c-common.c|  17 +-
 gcc/c-family/c-common.h|   3 +-
 gcc/c/c-parser.c   | 644 ++--
 gcc/c/c-parser.h   |   8 +-
 gcc/cp/parser.c| 811 +
 gcc/testsuite/c-c++-common/missing-close-symbol.c  |  33 +
 gcc/testsuite/c-c++-common/missing-symbol.c|  50 ++
 .../g++.dg/diagnostic/unclosed-extern-c.C  |   3 +
 .../g++.dg/diagnostic/unclosed-function.C  |   3 +
 .../g++.dg/diagnostic/unclosed-namespace.C |   2 +
 gcc/testsuite/g++.dg/diagnostic/unclosed-struct.C  |   3 +
 gcc/testsuite/g++.dg/parse/pragma2.C   |   4 +-
 gcc/testsuite/gcc.dg/unclosed-init.c   |   3 +
 13 files changed, 1071 insertions(+), 513 deletions(-)
 create mode 100644 gcc/testsuite/c-c++-common/missing-close-symbol.c
 create mode 100644 

[PATCH 1/3] matching tokens: c-family parts

[David Malcolm]

(Unchanged since v1; already approved by Marek, assuming rest is approved)

gcc/c-family/ChangeLog:
* c-common.c (c_parse_error): Add rich_location * param, using it
rather implicitly using input_location.
* c-common.h (c_parse_error): Add rich_location * param.

gcc/testsuite/ChangeLog:
* c-c++-common/missing-close-symbol.c: New test case.
* c-c++-common/missing-symbol.c: New test case.
---
 gcc/c-family/c-common.c   | 17 
 gcc/c-family/c-common.h   |  3 +-
 gcc/testsuite/c-c++-common/missing-close-symbol.c | 33 +++
 gcc/testsuite/c-c++-common/missing-symbol.c   | 50 +++
 4 files changed, 94 insertions(+), 9 deletions(-)
 create mode 100644 gcc/testsuite/c-c++-common/missing-close-symbol.c
 create mode 100644 gcc/testsuite/c-c++-common/missing-symbol.c

diff --git a/gcc/c-family/c-common.c b/gcc/c-family/c-common.c
index feb0904..30b0603 100644
--- a/gcc/c-family/c-common.c
+++ b/gcc/c-family/c-common.c
@@ -5949,12 +5949,13 @@ catenate_strings (const char *lhs, const char 
*rhs_start, int rhs_size)
   return result;
 }
 
-/* Issue the error given by GMSGID, indicating that it occurred before
-   TOKEN, which had the associated VALUE.  */
+/* Issue the error given by GMSGID at RICHLOC, indicating that it occurred
+   before TOKEN, which had the associated VALUE.  */
 
 void
 c_parse_error (const char *gmsgid, enum cpp_ttype token_type,
-  tree value, unsigned char token_flags)
+  tree value, unsigned char token_flags,
+  rich_location *richloc)
 {
 #define catenate_messages(M1, M2) catenate_strings ((M1), (M2), sizeof (M2))
 
@@ -5995,7 +5996,7 @@ c_parse_error (const char *gmsgid, enum cpp_ttype 
token_type,
   else
message = catenate_messages (gmsgid, " before %s'\\x%x'");
 
-  error (message, prefix, val);
+  error_at_rich_loc (richloc, message, prefix, val);
   free (message);
   message = NULL;
 }
@@ -6023,7 +6024,7 @@ c_parse_error (const char *gmsgid, enum cpp_ttype 
token_type,
   else if (token_type == CPP_NAME)
 {
   message = catenate_messages (gmsgid, " before %qE");
-  error (message, value);
+  error_at_rich_loc (richloc, message, value);
   free (message);
   message = NULL;
 }
@@ -6036,16 +6037,16 @@ c_parse_error (const char *gmsgid, enum cpp_ttype 
token_type,
   else if (token_type < N_TTYPES)
 {
   message = catenate_messages (gmsgid, " before %qs token");
-  error (message, cpp_type2name (token_type, token_flags));
+  error_at_rich_loc (richloc, message, cpp_type2name (token_type, 
token_flags));
   free (message);
   message = NULL;
 }
   else
-error (gmsgid);
+error_at_rich_loc (richloc, gmsgid);
 
   if (message)
 {
-  error (message);
+  error_at_rich_loc (richloc, message);
   free (message);
 }
 #undef catenate_messages
diff --git a/gcc/c-family/c-common.h b/gcc/c-family/c-common.h
index a29f1ad..63fe845 100644
--- a/gcc/c-family/c-common.h
+++ b/gcc/c-family/c-common.h
@@ -1124,7 +1124,8 @@ extern void builtin_define_with_int_value (const char *, 
HOST_WIDE_INT);
 extern void builtin_define_type_sizeof (const char *, tree);
 extern void c_stddef_cpp_builtins (void);
 extern void fe_file_change (const line_map_ordinary *);
-extern void c_parse_error (const char *, enum cpp_ttype, tree, unsigned char);
+extern void c_parse_error (const char *, enum cpp_ttype, tree, unsigned char,
+  rich_location *richloc);
 
 /* In c-ppoutput.c  */
 extern void init_pp_output (FILE *);
diff --git a/gcc/testsuite/c-c++-common/missing-close-symbol.c 
b/gcc/testsuite/c-c++-common/missing-close-symbol.c
new file mode 100644
index 000..85b96f28
--- /dev/null
+++ b/gcc/testsuite/c-c++-common/missing-close-symbol.c
@@ -0,0 +1,33 @@
+/* { dg-options "-fdiagnostics-show-caret" } */
+
+/* Verify that the C/C++ frontends show the pertinent opening symbol when
+   a closing symbol is missing.  */
+
+/* Verify that, when they are on the same line, that the opening symbol is
+   shown as a secondary range within the main diagnostic.  */
+
+void test_static_assert_same_line (void)
+{
+  _Static_assert(sizeof(int) >= sizeof(char), "msg"; /* { dg-error "expected 
'\\)' before ';' token" } */
+  /* { dg-begin-multiline-output "" }
+   _Static_assert(sizeof(int) >= sizeof(char), "msg";
+ ~  ^
+ { dg-end-multiline-output "" } */
+}
+
+/* Verify that, when they are on different lines, that the opening symbol is
+   shown via a secondary diagnostic.  */
+
+void test_static_assert_different_line (void)
+{
+  _Static_assert(sizeof(int) >= sizeof(char), /* { dg-message "to match this 
'\\('" } */
+"msg"; /* { dg-error "expected '\\)' before ';' token" } */
+  /* { dg-begin-multiline-output "" }
+"msg";
+ ^
+ { 

[PATCH] i386: Add some naked attribute tests

[H.J. Lu]

Add some tests for implementing interrupt handlers with naked attribute.

OK for trunk?

H.J.
---
* gcc.dg/guality/pr25967-1.c: New test.
* gcc.dg/guality/pr25967-2.c: Likewise.
* gcc.dg/torture/pr25967-1.c: Likewise.
* gcc.dg/torture/pr25967-2.c: Likewise.
---
 gcc/testsuite/gcc.dg/guality/pr25967-1.c | 79 
 gcc/testsuite/gcc.dg/guality/pr25967-2.c | 72 +
 gcc/testsuite/gcc.dg/torture/pr25967-1.c | 72 +
 gcc/testsuite/gcc.dg/torture/pr25967-2.c | 66 ++
 4 files changed, 289 insertions(+)
 create mode 100644 gcc/testsuite/gcc.dg/guality/pr25967-1.c
 create mode 100644 gcc/testsuite/gcc.dg/guality/pr25967-2.c
 create mode 100644 gcc/testsuite/gcc.dg/torture/pr25967-1.c
 create mode 100644 gcc/testsuite/gcc.dg/torture/pr25967-2.c

diff --git a/gcc/testsuite/gcc.dg/guality/pr25967-1.c 
b/gcc/testsuite/gcc.dg/guality/pr25967-1.c
new file mode 100644
index 000..1100aa638a4
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/guality/pr25967-1.c
@@ -0,0 +1,79 @@
+/* { dg-do run { target i?86-*-* x86_64-*-* } } */
+/* { dg-options "-g -mgeneral-regs-only" } */
+
+extern void exit (int);
+
+typedef unsigned int uword_t __attribute__ ((mode (__word__)));
+
+#define ERROR  0x12345670
+#define IP 0x12345671
+#define CS 0x12345672
+#define FLAGS  0x12345673
+#define SP 0x12345674
+#define SS 0x12345675
+
+#ifdef __x86_64__
+# define STACK_POINTER "rsp"
+# define WORD_SIZE "8"
+#else
+# define STACK_POINTER "esp"
+# define WORD_SIZE "4"
+#endif
+
+#define STRING(x)  XSTRING(x)
+#define XSTRING(x) #x
+#define ASMNAME(cname)  ASMNAME2 (__USER_LABEL_PREFIX__, cname)
+#define ASMNAME2(prefix, cname) XSTRING (prefix) cname
+
+struct interrupt_frame
+{
+  uword_t ip;
+  uword_t cs;
+  uword_t flags;
+  uword_t sp;
+  uword_t ss;
+};
+
+__attribute__((naked, used))
+void
+fn (void)
+{
+  struct interrupt_frame *frame;
+  uword_t error;
+  asm ("lea " WORD_SIZE "(%%" STACK_POINTER "), %0" : "=r" (frame) : ); 
+  asm ("mov (%%" STACK_POINTER "), %0" : "=r" (error) : ); 
+  if (ERROR != error)  /* BREAK */
+__builtin_abort ();
+  if (IP != frame->ip)
+__builtin_abort ();
+  if (CS != frame->cs)
+__builtin_abort ();
+  if (FLAGS != frame->flags)
+__builtin_abort ();
+  if (SP != frame->sp)
+__builtin_abort ();
+  if (SS != frame->ss)
+__builtin_abort ();
+
+  exit (0);
+}
+
+int
+main ()
+{
+  asm ("push   $" STRING (SS) ";   \
+   push$" STRING (SP) ";   \
+   push$" STRING (FLAGS) ";\
+   push$" STRING (CS) ";   \
+   push$" STRING (IP) ";   \
+   push$" STRING (ERROR) ";\
+   jmp  " ASMNAME ("fn"));
+  return 0;
+}
+
+/* { dg-final { gdb-test 45 "error" "0x12345670" } } */
+/* { dg-final { gdb-test 45 "frame->ip" "0x12345671" } } */
+/* { dg-final { gdb-test 45 "frame->cs" "0x12345672" } } */
+/* { dg-final { gdb-test 45 "frame->flags" "0x12345673" } } */
+/* { dg-final { gdb-test 45 "frame->sp" "0x12345674" } } */
+/* { dg-final { gdb-test 45 "frame->ss" "0x12345675" } } */
diff --git a/gcc/testsuite/gcc.dg/guality/pr25967-2.c 
b/gcc/testsuite/gcc.dg/guality/pr25967-2.c
new file mode 100644
index 000..dde31e82d43
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/guality/pr25967-2.c
@@ -0,0 +1,72 @@
+/* { dg-do run { target i?86-*-* x86_64-*-* } } */
+/* { dg-options "-g -mgeneral-regs-only" } */
+
+extern void exit (int);
+
+typedef unsigned int uword_t __attribute__ ((mode (__word__)));
+
+#define IP 0x12345671
+#define CS 0x12345672
+#define FLAGS  0x12345673
+#define SP 0x12345674
+#define SS 0x12345675
+
+#ifdef __x86_64__
+# define STACK_POINTER "rsp"
+# define WORD_SIZE "8"
+#else
+# define STACK_POINTER "esp"
+# define WORD_SIZE "4"
+#endif
+
+#define STRING(x)  XSTRING(x)
+#define XSTRING(x) #x
+#define ASMNAME(cname)  ASMNAME2 (__USER_LABEL_PREFIX__, cname)
+#define ASMNAME2(prefix, cname) XSTRING (prefix) cname
+
+struct interrupt_frame
+{
+  uword_t ip;
+  uword_t cs;
+  uword_t flags;
+  uword_t sp;
+  uword_t ss;
+};
+
+__attribute__((naked, used))
+void
+fn (void)
+{
+  struct interrupt_frame *frame;
+  asm ("lea (%%" STACK_POINTER "), %0" : "=r" (frame) : ); 
+  if (IP != frame->ip) /* BREAK */
+__builtin_abort ();
+  if (CS != frame->cs)
+__builtin_abort ();
+  if (FLAGS != frame->flags)
+__builtin_abort ();
+  if (SP != frame->sp)
+__builtin_abort ();
+  if (SS != frame->ss)
+__builtin_abort ();
+
+  exit (0);
+}
+
+int
+main ()
+{
+  asm ("push   $" STRING (SS) ";   \
+   push$" STRING (SP) ";   \
+   push$" STRING (FLAGS) ";\
+   push$" STRING (CS) ";   \
+   push$" 

Re: [PATCH v2 9/13] D: D2 Testsuite Dejagnu files.

[Mike Stump]

On Jun 24, 2017, at 10:52 AM, Iain Buclaw  wrote:
> Added a few extra comments for procedures, altering dmd2dg to write
> out flags converted to dejagnu in-place, instead on newlines.
> 
> In the other testsuite patch, added new tests to accompany fixes that
> have been made since the last patch.

Ok.  From here on out, you can self-approve the usual and customary testsuite 
changes as you become maintainer for the front-end.

If you want any extra testsuite reviews, you can always ask.

[PATCH] Rewrite mklog in Python

[Yury Gribov]

Hi all,

This is a rewrite of contrib/mklog in Python.  I started adding features 
suggested by Trevor some time ago but this quickly turned into a full 
rewrite of existing Perl mklog and then I decided to just fully rewrite 
it in Python (given that this has been requested several times).


The code is mostly similar to existing version, except that I now 
separate parsing and generation of ChangeLog text (for clarity).  New 
script will also (try to) detect changes in prototypes, macro and 
supermacro.


I have a local testsuite for mklog which I used to verify functionality. 
 In all cases it was similar or better compared to Perl version.  And 
I'll obviously be around to fix regressions.


I suggest to replace existing contrib/mklog with this (Perl version can 
be moved to contrib/mklog.pl).


-Y
#!/usr/bin/python

# Copyright (C) 2017 Free Software Foundation, Inc.
#
# This file is part of GCC.
#
# GCC is free software; you can redistribute it and/or modify
# it under the terms of the GNU General Public License as published by
# the Free Software Foundation; either version 3, or (at your option)
# any later version.
#
# GCC is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with GCC; see the file COPYING.  If not, write to
# the Free Software Foundation, 51 Franklin Street, Fifth Floor,
# Boston, MA 02110-1301, USA.

# This script parses a .diff file generated with 'diff -up' or 'diff -cp'
# and adds a skeleton ChangeLog file to the file. It does not try to be
# too smart when parsing function names, but it produces a reasonable
# approximation.
#
# This is a straightforward adaptation of original Perl script.
#
# Author: Yury Gribov 

import sys
import re
import os.path
import os
import getopt
import tempfile
import time
import shutil
from subprocess import Popen, PIPE

me = os.path.basename(sys.argv[0])

def error(msg):
  sys.stderr.write("%s: error: %s\n" % (me, msg))
  sys.exit(1)

def warn(msg):
  sys.stderr.write("%s: warning: %s\n" % (me, msg))

class RegexCache(object):
  """Simple trick to Perl-like combined match-and-bind."""

  def __init__(self):
self.last_match = None

  def match(self, p, s):
self.last_match = re.match(p, s) if isinstance(p, str) else p.match(s)
return self.last_match

  def search(self, p, s):
self.last_match = re.search(p, s) if isinstance(p, str) else p.search(s)
return self.last_match

  def group(self, n):
return self.last_match.group(n)

cache = RegexCache()

def print_help_and_exit():
print """\
Usage: %s [-i | --inline] [PATCH]
Generate ChangeLog template for PATCH.
PATCH must be generated using diff(1)'s -up or -cp options
(or their equivalent in Subversion/git).

When PATCH is - or missing, read standard input.

When -i is used, prepends ChangeLog to PATCH.
If PATCH is not stdin, modifies PATCH in-place, otherwise writes
to stdout.
""" % me
sys.exit(1)

def run(cmd, die_on_error):
  """Simple wrapper for Popen."""
  proc = Popen(cmd.split(' '), stderr = PIPE, stdout = PIPE)
  (out, err) = proc.communicate()
  if die_on_error and proc.returncode != 0:
error("`%s` failed:\n" % (cmd, proc.stderr))
  return proc.returncode, out, err

def read_user_info():
  dot_mklog_format_msg = """\
The .mklog format is:
NAME = ...
EMAIL = ...
"""

  # First try to read .mklog config
  mklog_conf = os.path.expanduser('~/.mklog')
  if os.path.exists(mklog_conf):
attrs = {}
f = open(mklog_conf, 'rb')
for s in f:
  if cache.match(r'^\s*([a-zA-Z0-9_]+)\s*=\s*(.*?)\s*$', s):
attrs[cache.group(1)] = cache.group(2)
f.close()
if 'NAME' not in attrs:
  error("'NAME' not present in .mklog")
if 'EMAIL' not in attrs:
  error("'EMAIL' not present in .mklog")
return attrs['NAME'], attrs['EMAIL']

  # Otherwise go with git

  rc1, name, _ = run('git config user.name', False)
  name = name.rstrip()
  rc2, email, _ = run('git config user.email', False)
  email = email.rstrip()

  if rc1 != 0 or rc2 != 0:
error("""\
Could not read git user.name and user.email settings.
Please add missing git settings, or create a %s.
""" % mklog_conf)

  return name, email

def get_parent_changelog (s):
  """See which ChangeLog this file change should go to."""

  if s.find('\\') == -1 and s.find('/') == -1:
return "ChangeLog", s

  gcc_root = os.path.dirname(os.path.dirname(os.path.realpath(__file__)))

  d = s
  while d:
clname = d + "/ChangeLog"
if os.path.exists(gcc_root + '/' + clname) or os.path.exists(clname):
  relname = s[len(d)+1:]
  return clname, relname
d, _ = os.path.split(d)

  return "Unknown ChangeLog", s

class FileDiff:
  """Class to represent changes in a single file."""

  def __init__(self, filename):

Re: [patch, fortran] Generate C prototypes from Fortran code

[Thomas Koenig]

HI Paul,


This reminds me of project that I once started to translate fortran
into C using a similar option. I gave up in the end because I found it
more convenient to use a tree dump and modify the declarations by
hand. In respect of your query about suggestions, how about outputting
non_interop array descriptors?


Hmm... definitely something to think about.  I predict the
imminent death of TS 29113 if we do that :-)


Anyway, it looks good to me - OK for trunk.


Thanks - committed as r250791.

Regards

Thomas

Re: *ping* [patch, fortran] Fix PR 79312, find invalid typespec for empty array constructors

[Paul Richard Thomas]

Hi Thomas,

This is 'obvious, I think. Yes, OK for trunk.

Thanks

Paul


On 1 August 2017 at 16:09, Thomas Koenig  wrote:
> Am 24.07.2017 um 23:27 schrieb Thomas Koenig:
>>
>> Hello world,
>>
>> the attached patch fixes the PR; patch and test case are rather
>> self-explanatory.
>>
>> Regression-testing as I write this.  OK for trunk if it passes?
>>
>> Regards
>>
>>  Thomas
>
>
> OK?
>
> Regards
>
> Thomas



-- 
"If you can't explain it simply, you don't understand it well enough"
- Albert Einstein

Re: [patch, fortran] Generate C prototypes from Fortran code

[Paul Richard Thomas]

Hi Thomas,

This reminds me of project that I once started to translate fortran
into C using a similar option. I gave up in the end because I found it
more convenient to use a tree dump and modify the declarations by
hand. In respect of your query about suggestions, how about outputting
non_interop array descriptors?

Anyway, it looks good to me - OK for trunk.

Thanks

Paul


On 1 August 2017 at 16:08, Thomas Koenig  wrote:
> Hello world,
>
> here is a slight update on the patch, with the following changes:
>
> Fixed one ICE (yes, there was one)
>
> Added a bit to the documentation to recommend to edit
> function pointers
>
> Translates c_size_t into ssize_t now - we only have a signed
> type, unsigned makes little sense.
>
>
> OK for trunk?
>
> Regards
>
> Thomas
>
>> 2017-07-28  Thomas Koenig 
>>
>>  PR fortran/45435
>>  * lang.opt (fc-prototypes): Add option.
>>  * gfortran.h (gfc_typespec): Add interop_kind to struct.
>>  (gfc_dump_c_prototypes): Add prototype.
>>  * decl.c (gfc_match_kind_spec): Copy symbol used for kind to
>> typespec.
>>  * parse.c (gfc_parse_file): Call gfc_dump_prototypes.
>>  * dump-parse-tree.c (gfc_dump_c_prototypes): New function.
>>  (type_return): New enum.
>>  (get_c_type_name): New function.
>>  (write_decl): New function.
>>  (write_type): New function.
>>  (write_variable): New function.
>>  (write_proc): New function.
>>  (write_interop_decl): New function.
>>  * invoke.texi: Document -fc-prototypes.
>
>



-- 
"If you can't explain it simply, you don't understand it well enough"
- Albert Einstein

Small C++ PATCH to set DECL_CONTEXT in declare_global_var

[Jason Merrill]

richi's LTO debug patch mentioned in a comment that __dso_handle
didn't have a proper DECL_CONTEXT; this fixes that.

Tested x86_64-pc-linux-gnu, applying to trunk.
commit b96b9abccb1afd301fb907dcfb327ffac05998b1
Author: Jason Merrill 
Date:   Mon Jul 31 16:46:46 2017 -0400

* decl.c (declare_global_var): Set DECL_CONTEXT.

diff --git a/gcc/cp/decl.c b/gcc/cp/decl.c
index 4ec38b8..aab2019 100644
--- a/gcc/cp/decl.c
+++ b/gcc/cp/decl.c
@@ -7583,6 +7583,7 @@ declare_global_var (tree name, tree type)
   TREE_PUBLIC (decl) = 1;
   DECL_EXTERNAL (decl) = 1;
   DECL_ARTIFICIAL (decl) = 1;
+  DECL_CONTEXT (decl) = FROB_CONTEXT (global_namespace);
   /* If the user has explicitly declared this variable (perhaps
  because the code we are compiling is part of a low-level runtime
  library), then it is possible that our declaration will be merged

Re: ping [PATCH] [MSP430] Fix PR78849: ICE on initialization of global struct containing __int20 array

[Jozef Lawrynowicz]

On 01/08/2017 00:08, Joseph Myers wrote:

On Wed, 26 Jul 2017, Jeff Law wrote:


TYPE_SIZE, according to my understanding, should be a tree for the size
of the expression in bits.

The problem is for msp430 that size varies depending on where it's used.
  ie, in a register an object might have a bitsize of 20 bits, but in
memory its size is 32 bits.

I don't think that TYPE_SIZE has any concept that the use context is
relevant to selecting the proper size.


TYPE_SIZE_UNIT is unambiguously the memory size, including padding; it's
used for sizeof.  TYPE_SIZE may be less clear.  We've had issues before
with unions with x87 long double, which has 80-bit precision in registers
but is 12-byte or 16-byte in memory; that was wrong code (bug 71522)
rather than an ICE, but the long double case may be useful for comparison
of what various type properties are set to in such cases.



Thanks for the responses.

Could it be possible to use "variable_size" to help the compiler choose
which size to use for TYPE_SIZE? Although the problem I see with this
right away is that variable_size is never executed on an INTEGER_CST,
perhaps this is part of the problem?

Zooming out a bit from TYPE_SIZE, the value that ends up being incorrect
as a result of TYPE_SIZE is rli->bitpos, this value is used a lot in
stor_layout.c:place_field, perhaps I need to look deeper in there.

For this specific bug, rli->bitpos is 20*ARRAY_SIZE, if I modify it in
a GDB session to be 32*ARRAY_SIZE, the case no longer ICEs.

Any suggestions on where I should be looking given this information?
Is this fix for this likely to be in the back-end?

Re: [PATCH] Switch vec_init and vec_extract optabs to 2 mode optab to allow extraction of vector from vector or initialization of vector from smaller vectors (PR target/80846)

[Jakub Jelinek]

On Wed, Jul 26, 2017 at 06:41:23AM -0500, Segher Boessenkool wrote:
> > That is to follow aarch64 iterator naming convention, where they have
> 
> Ugh, for some reason I thought this was in rs6000/ as well.  I have
> fresh coffee now.  Sorry.

Apparently I broke power bootstrap with this, because two new spots were
introduced after I wrote the patch and my cross-compiler which didn't have
HAVE_AS_POWER9 defined didn't reveal that.  Fixed thusly, committed as
obvious to trunk:

2017-08-01  Jakub Jelinek  

PR target/80846
* config/rs6000/vsx.md (vextract_fp_from_shorth,
vextract_fp_from_shortl): Add element mode after mode in gen_vec_init*
calls.

--- gcc/config/rs6000/vsx.md.jj 2017-07-28 09:10:49.0 +0200
+++ gcc/config/rs6000/vsx.md2017-08-01 18:04:50.0 +0200
@@ -4523,7 +4523,7 @@ (define_expand "vextract_fp_from_shorth"
  inputs in half words 1,3,5,7 (IBM numbering).  Use xxperm to move
  src half words 0,1,2,3 for the conversion instruction.  */
   v = gen_rtvec_v (16, rvals);
-  emit_insn (gen_vec_initv16qi (mask, gen_rtx_PARALLEL (V16QImode, v)));
+  emit_insn (gen_vec_initv16qiqi (mask, gen_rtx_PARALLEL (V16QImode, v)));
   emit_insn (gen_altivec_vperm_v8hiv16qi (tmp, operands[1],
  operands[1], mask));
   emit_insn (gen_vsx_xvcvhpsp (operands[0], tmp));
@@ -4552,7 +4552,7 @@ (define_expand "vextract_fp_from_shortl"
  inputs in half words 1,3,5,7 (IBM numbering).  Use xxperm to move
  src half words 4,5,6,7 for the conversion instruction.  */
   v = gen_rtvec_v (16, rvals);
-  emit_insn (gen_vec_initv16qi (mask, gen_rtx_PARALLEL (V16QImode, v)));
+  emit_insn (gen_vec_initv16qiqi (mask, gen_rtx_PARALLEL (V16QImode, v)));
   emit_insn (gen_altivec_vperm_v8hiv16qi (tmp, operands[1],
  operands[1], mask));
   emit_insn (gen_vsx_xvcvhpsp (operands[0], tmp));


Jakub

Re: [PATCH, rs6000] altivec_resolve_overloaded_builtin fixes (PR target/81622)

[Segher Boessenkool]

On Tue, Aug 01, 2017 at 08:40:28AM +0200, Jakub Jelinek wrote:
> Here is the variant patch.  In addition to fixing the ICE for vec_ld, for
> vec_st it just moves the premature computation of aligned to the point where
> it is used and that is after we've also verified that the types of the call
> arguments match the builtin argument types, it fixes ICE on vec_cmpne, where
> for -mpower9 it accesses TYPE_MODE (TREE_TYPE (arg0_type)) without checking
> that arg0_type is actually VECTOR_TYPE (if it is e.g. INTEGRAL_TYPE, it will
> segfault) and has some formatting fixes too.
> 
> Bootstrapped/regtested on powerpc64{,le}-linux, ok for
> trunk/7.2 (for the latter it applies without the 2 formatting fix hunks
> with while (desc->code && desc->code == fcode &&)?

This is okay.  Thanks!

> Note, there is diagnostic message in that routine starting with "Builtin,
> that is something that should be fixed too, GCC diagnostic messages
> (except for Fortran) don't start with a capital letter.  But this change
> requires to adjust quite a lot of testcases in gcc.target/powerpc :(. 

That is not for 7, then :-)


Segher


> 2017-07-31  Jakub Jelinek  
> 
>   PR target/81622
>   * config/rs6000/rs6000-c.c (altivec_resolve_overloaded_builtin): For
>   __builtin_vec_cmpne verify both arguments are compatible vectors
>   before looking at TYPE_MODE on the element type.  For __builtin_vec_ld
>   verify arg1_type is a pointer or array type.  For __builtin_vec_st,
>   move computation of aligned to after checking the argument types.
>   Formatting fixes.
> 
>   * gcc.target/powerpc/pr81622.c: New test.

Re: [PATCH] Fix PR81354 (rewrite gimple_split_edge)

[Bill Schmidt]

On Aug 1, 2017, at 8:50 AM, Bill Schmidt  wrote:
> 
> On Aug 1, 2017, at 7:44 AM, Bill Schmidt  wrote:
>> 
>>> 
>>> On Aug 1, 2017, at 3:46 AM, Richard Biener  
>>> wrote:
>>> 
>>> On Mon, Jul 31, 2017 at 4:03 PM, Bill Schmidt
>>>  wrote:
 
> On Jul 31, 2017, at 8:19 AM, Bill Schmidt  
> wrote:
> 
> That would certainly be much simpler!  I'll regstrap it and test it on 
> the other
> occurrence I've found to be certain.
 
 Unfortunately, this fails bootstrap:
 
 /home/wschmidt/gcc/gcc-mainline-test/gcc/calls.c: In function 'rtx_def* 
 emit_library_call_value_1(int, rtx, rtx, libcall_type, machine_mode, int, 
 va_list)':
 /home/wschmidt/gcc/gcc-mainline-test/gcc/calls.c:4362:1: error: definition 
 in block 214 does not dominate use in block 14
 emit_library_call_value_1 (int retval, rtx orgfun, rtx value,
 ^
 for SSA_NAME: slsr_772 in statement:
 slsr_749 = PHI <_17(26), slsr_772(14), slsr_334(214)>
 PHI argument
 slsr_772
 for PHI node
 slsr_749 = PHI <_17(26), slsr_772(14), slsr_334(214)>
 during GIMPLE pass: slsr
 /home/wschmidt/gcc/gcc-mainline-test/gcc/calls.c:4362:1: internal compiler 
 error: verify_ssa failed
 0x11567cf3 verify_ssa(bool, bool)
  /home/wschmidt/gcc/gcc-mainline-test/gcc/tree-ssa.c:1186
 0x10fc3fff execute_function_todo
  /home/wschmidt/gcc/gcc-mainline-test/gcc/passes.c:1997
 0x10fc277f do_per_function
  /home/wschmidt/gcc/gcc-mainline-test/gcc/passes.c:1655
 0x10fc42a3 execute_todo
  /home/wschmidt/gcc/gcc-mainline-test/gcc/passes.c:2044
 Please submit a full bug report,
 with preprocessed source if appropriate.
 Please include the complete backtrace with any bug report.
 See  for instructions.
 
 Not terribly surprising given how sensitive this stuff is.  I can look 
 into why
 this fails, but looks like it can't be quite this simple, sadly.
>>> 
>>> Intersting ... a dg-torture.exp run was clean for me (all I
>>> tested...).  So yes, can you
>>> check what fails?  Maybe run the testsuite with the stage1 compiler.
>> 
>> Looks like it's the stage1 that doesn't build.  I think the difference is
>> that I was building trunk and you were building 6.  I'll try to look into
>> it later today after I get through some meetings.
> 
> Sorry, no, it was stage 2 where the failure occurs.

Ah, "good" news.  I believe the bootstrap failure with this change is another
rediscovery of https://gcc.gnu.org/bugzilla/show_bug.cgi?id=81503, which
explains why it wasn't seen for GCC 6.  I'll work on getting that fixed and
then try this again.

Bill

> 
> Bill
> 
>> 
>> Bill
>>> 
>>> Richard.
>>> 
 Bill
 
> 
> -- Bill
> 
>> On Jul 31, 2017, at 4:15 AM, Richard Biener  
>> wrote:
>> 
>> On Sun, Jul 30, 2017 at 8:04 PM, Bill Schmidt
>>  wrote:
>>> Hi,
>>> 
>>> PR81354 identifies a latent bug that can happen in SLSR since the
>>> conditional candidate support was first added.  SLSR relies on the
>>> address of a GIMPLE PHI remaining constant during the course of the
>>> optimization pass, but it needs to split edges.  The use of
>>> make_single_succ_edge and reinstall_phi_args in gimple_split_edge
>>> causes GIMPLE PHI statements to be temporarily expanded to add a
>>> predecessor, and then rebuilt to have the original number of
>>> predecessors.  The expansion usually, if not always, causes the PHI
>>> statement to change address.  Thus gimple_split_edge needs to be
>>> rewritten to perform in-situ replacement of PHI arguments.
>>> 
>>> The required pieces of make_single_succ_edge have been extracted into
>>> two places:  make_replacement_pred_edge, and some fixup code at the
>>> end of gimple_split_edge.  The division is necessary because the
>>> destination of the original edge must remember its original
>>> predecessors for the switch processing in
>>> gimple_redirect_edge_and_branch_1 to work properly.
>>> 
>>> The function gimple_redirect_edge_and_branch was factored into two
>>> pieces so that most of it can be used by gimple_split_edge without
>>> calling ssa_redirect_edge, which also interferes with PHIs.  The
>>> useful bits of ssa_redirect_edge are factored out into the next three
>>> lines of gimple_split_edge.
>>> 
>>> Similarly, redirect_eh_edge had already been similarly factored into
>>> redirect_eh_edge_1 and ssa_redirect_edge.  I took advantage of that
>>> and exposed redirect_eh_edge_1 for use in 
>>> gimple_redirect_edge_and_branch_1.
>>> 
>>> I've added the test from PR81354 as a torture test, 

[og7] Fix libgomp.oacc-c/asyncwait-2.c

[Cesar Philippidis]

I pushed this patch to openacc-gcc-7-branch that fixes an ICE in
libgomp.oacc-c/asyncwait-2.c caused by the recent async backport from
gomp-4_0-branch. Before, expand_omp_target was expecting the wait clause
argument to be a constant value. This patch teaches that function to be
more flexible and allow variables.

Cesar
2017-08-01  Cesar Philippidis  
	Thomas Schwinge  

	gcc/
	* omp-expand.c (expand_omp_target): Don't expect OMP_CLAUSE_WAIT_EXPR
	to be a constant expression.


diff --git a/gcc/omp-expand.c b/gcc/omp-expand.c
index 8301dcb0de5..bf1f127d8d6 100644
--- a/gcc/omp-expand.c
+++ b/gcc/omp-expand.c
@@ -7574,15 +7574,17 @@ expand_omp_target (struct omp_region *region)
 	for (; c; c = OMP_CLAUSE_CHAIN (c))
 	  if (OMP_CLAUSE_CODE (c) == OMP_CLAUSE_WAIT)
 	{
-	  if (tree_int_cst_compare (OMP_CLAUSE_WAIT_EXPR (c), noval) == 0)
+	  tree wait_expr = OMP_CLAUSE_WAIT_EXPR (c);
+
+	  if (TREE_CODE (wait_expr) == INTEGER_CST
+		  && tree_int_cst_compare (wait_expr, noval) == 0)
 		{
 		  noval_seen = true;
 		  continue;
 		}
 
 	  args.safe_push (fold_convert_loc (OMP_CLAUSE_LOCATION (c),
-		integer_type_node,
-		OMP_CLAUSE_WAIT_EXPR (c)));
+		integer_type_node, wait_expr));
 	  num_waits++;
 	}
 

Re: [PATCH] Make mempcpy more optimal (PR middle-end/70140).

[H.J. Lu]

On Wed, Jul 19, 2017 at 11:59 PM, Martin Liška  wrote:
> Hello.
>
> Following patch does sharing of expansion for mem{p,}cpy and also strpcy 
> (with a known constant as source)
> so that we use same type of expansion (direct insns emission, direct emission 
> with a loop instruction and
> library call). As mentioned in the PR, glibc does not provide an optimized 
> version for majority of targets.
>
> Patch can bootstrap on ppc64le-redhat-linux and survives regression tests.
>
> Ready to be installed?
> Martin
>
> gcc/testsuite/ChangeLog:
>
> 2017-07-17  Martin Liska  
>
> PR middle-end/70140
> * gcc.dg/string-opt-1.c: Adjust test-case to scan for memcpy.
>
> gcc/ChangeLog:
>
> 2017-07-17  Martin Liska  
>
> PR middle-end/70140
> * builtins.c (expand_builtin_memcpy_args): Remove.
> (expand_builtin_memcpy): Call newly added function
> expand_builtin_memory_copy_args.
> (expand_builtin_memcpy_with_bounds): Likewise.
> (expand_builtin_mempcpy): Remove last argument.
> (expand_builtin_mempcpy_with_bounds): Likewise.
> (expand_builtin_memory_copy_args): New function created from
> expand_builtin_mempcpy_args with small modifications.
> (expand_builtin_mempcpy_args): Remove.
> (expand_builtin_stpcpy): Remove unused argument.
> (expand_builtin): Likewise.
> (expand_builtin_with_bounds): Likewise.
> ---
>  gcc/builtins.c  | 268 
> ++--
>  gcc/testsuite/gcc.dg/string-opt-1.c |  51 ++-
>  2 files changed, 147 insertions(+), 172 deletions(-)
>
>

I got many mempcpy test failures on Fedora 26/x86-64:

#0  0xf7ddef50 in abort () from /lib/libc.so.6
#1  0x08048a95 in test (buf3=0x804b060 , buf4=0x804b0e0  "",
buf6=0x8048d3c "rstuvwxyz", n=0)
at 
/export/gnu/import/git/sources/gcc/gcc/testsuite/gcc.c-torture/execute/builtins/mempcpy-2.c:49
#2  0x08048b77 in main_test ()
at 
/export/gnu/import/git/sources/gcc/gcc/testsuite/gcc.c-torture/execute/builtins/mempcpy-2.c:152
#3  0x08048bc7 in main ()
at 
/export/gnu/import/git/sources/gcc/gcc/testsuite/gcc.c-torture/execute/builtins/lib/main.c:10
(gdb) f 1
#1  0x08048a95 in test (buf3=0x804b060 , buf4=0x804b0e0  "",
buf6=0x8048d3c "rstuvwxyz", n=0)
at 
/export/gnu/import/git/sources/gcc/gcc/testsuite/gcc.c-torture/execute/builtins/mempcpy-2.c:49
49abort ();
(gdb)


-- 
H.J.

[PATCH,AIX] Initial support for DWARF debug sections in XCOFF.

[REIX, Tony]

Description:
 * This patch provides an initial support for DWARF debug sections in XCOFF.

Tests:
 * AIX: Build: SUCCESS
   - build made by means of gmake.

ChangeLog:
  * xcoff.c: Initial support for DWARF debug sections in XCOFF.

Cordialement,

Tony Reix

Bull - ATOS
IBM Coop Architect & Technical Leader

Office : +33 (0) 4 76 29 72 67
1 rue de Provence - 38432 Échirolles - France
www.atos.netIndex: libbacktrace/ChangeLog
===
--- libbacktrace/ChangeLog	(revision 250777)
+++ libbacktrace/ChangeLog	(working copy)
@@ -1,3 +1,7 @@
+2017-08-01  Tony Reix  
+
+	* xcoff.c: Initial support for DWARF debug sections in XCOFF.
+
 2017-07-28  Tony Reix  
 
 	* xcoff.c: Don't leak a file descriptor if an archive is malformed.
Index: libbacktrace/xcoff.c
===
--- libbacktrace/xcoff.c	(revision 250777)
+++ libbacktrace/xcoff.c	(working copy)
@@ -124,9 +124,16 @@ typedef struct {
 
 #endif /* BACKTRACE_XCOFF_SIZE != 32 */
 
+#define STYP_DWARF	0x10	/* DWARF debugging section.  */
 #define STYP_TEXT	0x20	/* Executable text (code) section.  */
 #define STYP_OVRFLO	0x8000	/* Line-number field overflow section.  */
 
+#define SSUBTYP_DWINFO	0x1	/* DWARF info section.  */
+#define SSUBTYP_DWLINE	0x2	/* DWARF line-number section.  */
+#define SSUBTYP_DWARNGE	0x5	/* DWARF aranges section.  */
+#define SSUBTYP_DWABREV	0x6	/* DWARF abbreviation section.  */
+#define SSUBTYP_DWSTR	0x7	/* DWARF strings section.  */
+
 /* XCOFF symbol.  */
 
 #define SYMNMLEN	8
@@ -367,7 +374,30 @@ struct xcoff_fileline_data
   struct xcoff_line_vector vec;
 };
 
+/* An index of DWARF sections we care about.  */
 
+enum dwarf_section
+{
+  DWSECT_INFO,
+  DWSECT_LINE,
+  DWSECT_ABBREV,
+  DWSECT_RANGES,
+  DWSECT_STR,
+  DWSECT_MAX
+};
+
+/* Information we gather for the DWARF sections we care about.  */
+
+struct dwsect_info
+{
+  /* Section file offset.  */
+  off_t offset;
+  /* Section size.  */
+  size_t size;
+  /* Section contents, after read from file.  */
+  const unsigned char *data;
+};
+
 /* A dummy callback function used when we can't find any debug info.  */
 
 static int
@@ -1056,6 +1086,7 @@ xcoff_add (struct backtrace_state *state, int desc
   struct backtrace_view linenos_view;
   struct backtrace_view syms_view;
   struct backtrace_view str_view;
+  struct backtrace_view dwarf_view;
   b_xcoff_filhdr fhdr;
   const b_xcoff_scnhdr *sects;
   const b_xcoff_scnhdr *stext;
@@ -1062,6 +1093,9 @@ xcoff_add (struct backtrace_state *state, int desc
   uint64_t lnnoptr;
   uint32_t nlnno;
   off_t str_off;
+  off_t min_offset;
+  off_t max_offset;
+  struct dwsect_info dwsect[DWSECT_MAX];
   size_t sects_size;
   size_t syms_size;
   int32_t str_size;
@@ -1069,6 +1103,7 @@ xcoff_add (struct backtrace_state *state, int desc
   int linenos_view_valid;
   int syms_view_valid;
   int str_view_valid;
+  int dwarf_view_valid;
   int magic_ok;
   int i;
 
@@ -1078,7 +1113,10 @@ xcoff_add (struct backtrace_state *state, int desc
   linenos_view_valid = 0;
   syms_view_valid = 0;
   str_view_valid = 0;
+  dwarf_view_valid = 0;
 
+  str_size = 0;
+
   /* Map the XCOFF file header.  */
   if (!backtrace_get_view (state, descriptor, offset, sizeof (b_xcoff_filhdr),
 			   error_callback, data, _view))
@@ -1092,7 +1130,7 @@ xcoff_add (struct backtrace_state *state, int desc
   if (!magic_ok)
 {
   if (exe)
-error_callback (data, "executable file is not XCOFF", 0);
+	error_callback (data, "executable file is not XCOFF", 0);
   goto fail;
 }
 
@@ -1114,8 +1152,8 @@ xcoff_add (struct backtrace_state *state, int desc
 
   /* FIXME: assumes only one .text section.  */
   for (i = 0; i < fhdr.f_nscns; ++i)
-  if ((sects[i].s_flags & 0x) == STYP_TEXT)
-	  break;
+if ((sects[i].s_flags & 0x) == STYP_TEXT)
+  break;
   if (i == fhdr.f_nscns)
 goto fail;
 
@@ -1134,12 +1172,12 @@ xcoff_add (struct backtrace_state *state, int desc
   /* Find the matching .ovrflo section.  */
   for (i = 0; i < fhdr.f_nscns; ++i)
 	{
-	if (((sects[i].s_flags & 0x) == STYP_OVRFLO)
-		&& sects[i].s_nlnno == sntext)
-	  {
-		nlnno = sects[i].s_vaddr;
-		break;
-	  }
+	  if (((sects[i].s_flags & 0x) == STYP_OVRFLO)
+	  && sects[i].s_nlnno == sntext)
+	{
+	  nlnno = sects[i].s_vaddr;
+	  break;
+	}
 	}
 }
 #endif
@@ -1194,10 +1232,92 @@ xcoff_add (struct backtrace_state *state, int desc
   xcoff_add_syminfo_data (state, sdata);
 }
 
-  /* Read the line number entries.  */
+  /* Read all the DWARF sections in a single view, since they are
+ probably adjacent in the file.  We never release this view.  */
 
-  if (fhdr.f_symptr != 0 && lnnoptr != 0)
+  min_offset = 0;
+  max_offset = 0;
+  memset (dwsect, 0, sizeof dwsect);
+  for (i = 0; i < fhdr.f_nscns; ++i)
 {
+  off_t end;
+  

Re: [PATCH, Fortran] Support for legacy %FILL fields in STRUCTUREs

[Thomas Koenig]

Hi Fritz,




Regtests on x86_64-redhat-linux. OK for trunk?


Patch looks good in principle; I really find all these DEC extensions
strange, but if they are needed for old code, why not?

Just one point:


+   gfc_error ("%s not allowed outside STRUCTURE at %C", "%FILL");


This should have %qs (throughout the patch).

OK for trunk with that.

Regards

Thomas

Re: [PATCH, Fortran] Correctly set -fd-lines-as-comments with -fdec

[Thomas Koenig]

Hi Fritz,


This is a simple patch. The original intent was for -fdec to set
-fd-lines-as-comments by default if flag_d_lines was unspecified by
the user. However, currently flag_d_lines is interrogated in
set_dec_flags(), usually before its final value is determined. The
attached patch fixes this behavior to work as intended.

Any objections for trunk? If not I think it is safe to commit.


Did you regression-test?  OK for trunk if yes.

Regards

Thomas

*ping* [patch, fortran] Fix PR 79312, find invalid typespec for empty array constructors

[Thomas Koenig]

Am 24.07.2017 um 23:27 schrieb Thomas Koenig:

Hello world,

the attached patch fixes the PR; patch and test case are rather
self-explanatory.

Regression-testing as I write this.  OK for trunk if it passes?

Regards

 Thomas


OK?

Regards

Thomas

Re: [patch, fortran] Generate C prototypes from Fortran code

[Thomas Koenig]

Hello world,

here is a slight update on the patch, with the following changes:

Fixed one ICE (yes, there was one)

Added a bit to the documentation to recommend to edit
function pointers

Translates c_size_t into ssize_t now - we only have a signed
type, unsigned makes little sense.

OK for trunk?

Regards

Thomas


2017-07-28  Thomas Koenig 

 PR fortran/45435
 * lang.opt (fc-prototypes): Add option.
 * gfortran.h (gfc_typespec): Add interop_kind to struct.
 (gfc_dump_c_prototypes): Add prototype.
 * decl.c (gfc_match_kind_spec): Copy symbol used for kind to 
typespec.

 * parse.c (gfc_parse_file): Call gfc_dump_prototypes.
 * dump-parse-tree.c (gfc_dump_c_prototypes): New function.
 (type_return): New enum.
 (get_c_type_name): New function.
 (write_decl): New function.
 (write_type): New function.
 (write_variable): New function.
 (write_proc): New function.
 (write_interop_decl): New function.
 * invoke.texi: Document -fc-prototypes.

Re: [PATCH] libstdc++: Support std::is_aggregate on clang++ (was [cfe-dev] clang++: std::is_aggregate unusable with clang-5.0/libstdc++-7)

[Katsuhiko Nishimra]

On Mon, Jul 31, 2017 at 03:53:42PM +0100, Jonathan Wakely wrote:
> This __has_bultin check only exists for Clang, so should be replaced
> by the correct __is_identifier check, not left there in addition to
> it.

I see. Actually I've guessed so, and thank you for clarifying it.
I'm attaching a replacing patch. Please take a look at it.

From 1b22cc531027832cf1eb50b73354f1730edbba54 Mon Sep 17 00:00:00 2001
From: Katsuhiko Nishimra 
Date: Tue, 1 Aug 2017 20:36:58 +0900
Subject: [PATCH] libstdc++: Support std::is_aggregate on clang++

Currently, libstdc++ tries to detect __is_aggregate built-in macro using
__has_builtin, but this fails on clang++ because __has_builtin on
clang++ detects only built-in functions, not built-in macros. This patch
adds a test using __is_identifier. Tested with clang++
6.0.0-svn309616-1~exp1 and g++ 7.1.0-11 on Debian unstable.
---
 libstdc++-v3/include/std/type_traits | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/libstdc++-v3/include/std/type_traits b/libstdc++-v3/include/std/type_traits
index 390b6f40a..ee9c75baf 100644
--- a/libstdc++-v3/include/std/type_traits
+++ b/libstdc++-v3/include/std/type_traits
@@ -2894,9 +2894,9 @@ template 
 
 #if __GNUC__ >= 7
 # define _GLIBCXX_HAVE_BUILTIN_IS_AGGREGATE 1
-#elif defined __has_builtin
+#elif defined(__is_identifier)
 // For non-GNU compilers:
-# if __has_builtin(__is_aggregate)
+# if ! __is_identifier(__is_aggregate)
 #  define _GLIBCXX_HAVE_BUILTIN_IS_AGGREGATE 1
 # endif
 #endif
-- 
2.13.3



signature.asc
Description: PGP signature

[GCC]][AArch64][PATCH] Fix big endian float immediate moves.

[Tamar Christina]

Hi All,

real_to_target seems to return the order of the elements in the array
differently depending on the endiannes. This undoes the endianness when
combining the values back to a HOST_WIDE_INT.

Regtested on aach64-none-linux-gnu and aarch64_be-none-linux-gnu and no issues.

Thanks,
Tamar


gcc/
2017-08-01  Tamar Christina  

* config/aarch64/aarch64.c (aarch64_reinterpret_float_as_int):
Correct endianness.

-- 
diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c
index 5a2ad7e9156a6f0389c09470cf1414bff45d8099..84e0c937665a02f06e15ddf334978fe2a0da565f 100644
--- a/gcc/config/aarch64/aarch64.c
+++ b/gcc/config/aarch64/aarch64.c
@@ -4733,9 +4733,14 @@ aarch64_reinterpret_float_as_int (rtx value, unsigned HOST_WIDE_INT *intval)
 		  CONST_DOUBLE_REAL_VALUE (value),
 		  REAL_MODE_FORMAT (mode));
 
-  ival = zext_hwi (res[0], 32);
-  if (GET_MODE_BITSIZE (mode) == GET_MODE_BITSIZE (DFmode))
-ival |= (zext_hwi (res[1], 32) << 32);
+  if (mode == DFmode)
+{
+  int order = BYTES_BIG_ENDIAN ? 1 : 0;
+  ival = zext_hwi (res[order], 32);
+  ival |= (zext_hwi (res[1-order], 32) << 32);
+}
+  else
+  ival = zext_hwi (res[0], 32);
 
   *intval = ival;
   return true;

Re: [PATCH 1/2] add unique_ptr header

[David Malcolm]

On Mon, 2017-07-31 at 19:46 -0400, tbsaunde+...@tbsaunde.org wrote:
> From: Trevor Saunders 
> 
> For most of the history of this see 
> https://sourceware.org/ml/gdb-patches/2016-10/msg00223.html
> The changes are mostly s/gdb/gtl/g
> 
> include/ChangeLog:
> 
> 2017-07-29  Trevor Saunders  
> 
>   * unique-ptr.h: New file.
> ---
>  include/unique-ptr.h | 386
> +++
>  1 file changed, 386 insertions(+)
>  create mode 100644 include/unique-ptr.h
> 
> diff --git a/include/unique-ptr.h b/include/unique-ptr.h
> new file mode 100644
> index 000..7903a5abefe
> --- /dev/null
> +++ b/include/unique-ptr.h
> @@ -0,0 +1,386 @@
> +/* gtl::unique_ptr, a simple std::unique_ptr replacement for C++03.
> +
> +   Copyright (C) 2007-2016 Free Software Foundation, Inc.
> +
> +   This file is part of GCC.
> +
> +   This program is free software; you can redistribute it and/or
> modify
> +   it under the terms of the GNU General Public License as published
> by
> +   the Free Software Foundation; either version 3 of the License, or
> +   (at your option) any later version.
> +
> +   This program is distributed in the hope that it will be useful,
> +   but WITHOUT ANY WARRANTY; without even the implied warranty of
> +   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> +   GNU General Public License for more details.
> +
> +   You should have received a copy of the GNU General Public License
> +   along with this program.  If not, see  s/>.  */
> +
> +/* gtl::unique_ptr defines a C++ owning smart pointer that exposes a
> +   subset of the std::unique_ptr API.
> +
> +   In fact, when compiled with a C++11 compiler, gtl::unique_ptr
> +   actually _is_ std::unique_ptr.  When compiled with a C++03
> compiler
> +   OTOH, it's an hand coded std::unique_ptr emulation that assumes
> +   code is correct and doesn't try to be too smart.

The comments talk about C++03 (presumably due to the gdb heritage of
this code), but gcc's minimum requirement is for C++98.

Does this code work with C++98?  If so, presumably this comment should
state that (presumably by just writing "C++98 or C++03" wherever you
say "C++03").

[...snip...]

Could the patch add a set of selftests for the new code?  (e.g. assert
the number of times that a destructor is called, for various test
classes in various situations).  This would also give a handy way to
run the pertinent code relatively quickly under valgrind (via "make
selftest-valgrind").

I'm not a global reviewer, so treat these as suggestions.

Hope this is helpful
Dave

ARM Patch Ping

[Bernd Edlinger]

Hi,

I would like to kindly remind you of the following patches,
which are already waiting for over 6 months:

[PATCH, ARM] correctly encode the CC reg data flow
https://gcc.gnu.org/ml/gcc-patches/2017-01/msg01351.html

[PATCH, ARM] Further improve stack usage in sha512 (PR 77308)
https://gcc.gnu.org/ml/gcc-patches/2017-04/msg01567.html

[PATCH, ARM] Further improve stack usage in sha512, part 2 (PR 77308)
https://gcc.gnu.org/ml/gcc-patches/2017-04/msg01568.html


I boot-strapped and reg-tested the patches on last week's snapshot to
verify they still apply.


Thanks
Bernd.

Re: [PATCH] Add libgcc support for cache clearing on ARM VxWorks

[Olivier Hainque]

> On Aug 1, 2017, at 16:31 , Olivier Hainque  wrote:
> 
> This patch adds a variant implementation of _clear_cache
> for arm-vxworks*, needed for proper functioning of trampolines
> on targets with separate instruction/data caches.

Forgot to mention:

Tested by verifying success of an in-house build and proper execution of ACATS
tests with a gcc-7 based compiler for arm-vxworks and arm-vxworks7, and checking
that a build for arm-wrs-vxworks proceeds to completion on mainline.

[PATCH] Add libgcc support for cache clearing on ARM VxWorks

[Olivier Hainque]

Hello,

On top of previous changes reworking the arm-vxworks support

  https://gcc.gnu.org/ml/gcc-patches/2017-08/msg00085.html
  https://gcc.gnu.org/ml/gcc-patches/2017-08/msg00075.html
  https://gcc.gnu.org/ml/gcc-patches/2017-08/msg00078.html

This patch adds a variant implementation of _clear_cache
for arm-vxworks*, needed for proper functioning of trampolines
on targets with separate instruction/data caches.

This allows, among other things, Ada tasking programs to
run on variety of configurations which we are exercising with
at least ACATS nightly with gcc-6 based compilers.

As this is touching a common ARM implementation file (lib1funcs.S),
this presumably requires approval from an ARM port maintainer. CC
Richard for this, as he participated in recent discussions regarding
VxWorks for ARM.

OK to commit ?

Thanks much in advance for your feedback,

With Kind Regards,

Olivier

2017-08-01  Doug Rupp  
Olivier Hainque  

libgcc/
* config/arm/lib1funcs.S (_clear_cache): Add variant for __vxworks.
* config/arm/t-vxworks: New file, add _clear_cache to LIB1ASMFUNCS.
* config.host (arm-wrs-vxworks, arm-wrs-vxworks7): Add arm/t-vxworks
to tmake_file.

gcc/
* config/arm/vxworks.h (CLEAR_INSN_CACHE): Define.



0004-Add-libgcc-support-for-insn-cache-clearing-on-ARM-Vx.patch
Description: Binary data

Re: C PATCH to further improve diagnostic for -Wsign-compare (PR c/81417)

[Marek Polacek]

On Mon, Jul 31, 2017 at 11:31:44AM -0400, David Malcolm wrote:
> On Mon, 2017-07-31 at 16:14 +0200, Marek Polacek wrote:
> > This patch improves the diagnostic of -Wsign-compare for ?: by also
> > printing
> > the types, similarly to my recent patch.  But we can do even better
> > here if we
> > actually point to the operand in question, so I passed the locations
> > of the
> > operands from the parser.
> 
> Thanks for updating the patch.
> 
> >   So instead of 
> > 
> > x.c:8:16: warning: signed and unsigned type in conditional expression
> > [-Wsign-compare]
> >return x ? y : -1;
> > ^
> > you'll now see:
> > 
> > x.c:8:18: warning: operand of conditional expression changes
> > signedness: 'int' to 'unsigned int' [-Wsign-compare]
> >return x ? y : -1;
> >   ^
> 
> That's an improvement, but I would have expected it to underline the
> whole of the pertinent subexpression e.g.:
> 
>return x ? y : -1;
>   ^~
> 
> rather than just:
> 
>return x ? y : -1;
>   ^
> 
> From my reading of the patch, it's capturing just the location of the
> first token within the subexpression (hence e.g. just the minus token
> in the example above, which happens to make some sense for this case,
> but wouldn't in general).

Right.

> Hopefully you can get at the location_t for the whole of the
> subexpression using c_expr, rather than peeking at the first token.

It didn't seem obvious to me how to do that, but I've spent more time
on this now.  I believe we need to use make_location (I've introduced
a new overload), as in the patch below.  Or did you in mind anything
else?

> > Bootstrapped/regtested on x86_64-linux, ok for trunk?
> 
> The patch doesn't have a testcase for the location information; please
> add one, using -fdiagnostics-show-caret and dg-begin-multiline-output/
> dg-end-multiline-output.  Please ensure that the pertinent expressions
> are more than one character wide, so that the test properly verifies
> the underlining.

Done.

Bootstrapped/regtested on x86_64-linux, ok for trunk?

2017-08-01  Marek Polacek  

PR c/81417
* c-array-notation.c (fix_builtin_array_notation_fn): Update calls to
build_conditional_expr. 
* c-parser.c (c_parser_conditional_expression): Create locations for
EXP1 and EXP2 from their source ranges.  Pass the locations down to
build_conditional_expr.
* c-tree.h (build_conditional_expr): Update declaration.
* c-typeck.c (build_conditional_expr): Add location_t parameters.
For -Wsign-compare, also print the types.

* input.c (make_location): New overload.
* input.h (make_location): Declare.

* objc-next-runtime-abi-02.c (build_v2_build_objc_method_call): Update
a call to build_conditional_expr.

* Wsign-compare-1.c: New test.
* gcc.dg/compare1.c: Adjust dg-bogus.
* gcc.dg/compare2.c: Likewise.
* gcc.dg/compare3.c: Likewise.
* gcc.dg/compare7.c: Likewise.
* gcc.dg/compare8.c: Likewise.
* gcc.dg/compare9.c: Likewise.
* gcc.dg/pr11492.c: Likewise.

diff --git gcc/c/c-array-notation.c gcc/c/c-array-notation.c
index e430f5c681b..40f1cfdabb8 100644
--- gcc/c/c-array-notation.c
+++ gcc/c/c-array-notation.c
@@ -355,8 +355,9 @@ fix_builtin_array_notation_fn (tree an_builtin_fn, tree 
*new_var)
   new_cond_expr = build2 (NE_EXPR, TREE_TYPE (func_parm), func_parm,
  build_zero_cst (TREE_TYPE (func_parm)));
   new_expr = build_conditional_expr
-   (location, new_cond_expr, false, new_yes_expr,
-TREE_TYPE (new_yes_expr), new_no_expr, TREE_TYPE (new_no_expr));
+   (location, new_cond_expr, false,
+new_yes_expr, TREE_TYPE (new_yes_expr), location,
+new_no_expr, TREE_TYPE (new_no_expr), location);
   break;
 case BUILT_IN_CILKPLUS_SEC_REDUCE_ALL_NONZERO:
   new_var_init = build_modify_expr
@@ -375,8 +376,9 @@ fix_builtin_array_notation_fn (tree an_builtin_fn, tree 
*new_var)
   new_cond_expr = build2 (EQ_EXPR, TREE_TYPE (func_parm), func_parm,
  build_zero_cst (TREE_TYPE (func_parm)));
   new_expr = build_conditional_expr
-   (location, new_cond_expr, false, new_yes_expr,
-TREE_TYPE (new_yes_expr), new_no_expr, TREE_TYPE (new_no_expr));
+   (location, new_cond_expr, false,
+new_yes_expr, TREE_TYPE (new_yes_expr), location,
+new_no_expr, TREE_TYPE (new_no_expr), location);
   break;
 case BUILT_IN_CILKPLUS_SEC_REDUCE_ANY_ZERO:
   new_var_init = build_modify_expr
@@ -394,8 +396,9 @@ fix_builtin_array_notation_fn (tree an_builtin_fn, tree 
*new_var)
   new_cond_expr = build2 (EQ_EXPR, TREE_TYPE (func_parm), func_parm,
  build_zero_cst (TREE_TYPE (func_parm)));
   new_expr = build_conditional_expr
-   (location, new_cond_expr, false, new_yes_expr,
-   

Re: [PATCH] Fix segfault in gcov.c (PR gcov-profile/81561).

[Martin Liška]

On 08/01/2017 03:46 PM, Richard Biener wrote:

On Tue, Aug 1, 2017 at 2:02 PM, Martin Liška  wrote:

On 07/27/2017 01:48 PM, Richard Biener wrote:


On Thu, Jul 27, 2017 at 12:12 PM, Martin Liška  wrote:


Hello.

As reported in mentioned PR, we segfault in gcov tool when one uses -a.
It's caused by fact
that vectors blocks and block_lists have indices kept in sync and as one
removes an element
from blocks via:
 blocked.erase (it);

Then calling recursively the same function breaks the synchronization.
The patch was originally
written by Joshua (adding him to CC). If I'm correct calling:

-unblock (u, blocked, block_lists);

does not make sense as we've already removed 'u'. Plus one needs to put
content of block_lists[index]
to a separate vector in order to not to break iteration.

Patch can bootstrap on ppc64le-redhat-linux and survives regression
tests.
And fixed the problem reported in opensuse bugzilla (mentioned in the GCC
bugzilla PR).

Ready to be installed?



Looks good to me but please wait for Joshua to confirm.



Hello.

No reply yet, I've just verified that in the article the function (unblock)
does the same as with the patch:
https://pdfs.semanticscholar.org/72c3/b54c1aea0a3193bad9721727a1798101ab26.pdf
(page 3).

I would be happy to have the patch in 7.2.
Can we Richi catch the deadline?


Sure, go ahead now.


Thanks, installed to trunk as r250780. And I've just triggered tests on GCC-7 
branch,
will install there as soon as it finishes.

Martin



Thanks,
Richard.


Thanks,
Martin




Did you manage to extract a testcase?

Thanks,
Richard.


Martin


gcc/ChangeLog:

2017-07-26  Martin Liska  

  PR gcov-profile/81561
  * gcov.c (unblock): Make unblocking safe as we need to preserve
  index correspondence of blocks and block_lists.
---
   gcc/gcov.c | 10 +++---
   1 file changed, 7 insertions(+), 3 deletions(-)

Re: [PATCH] Fix PR81354 (rewrite gimple_split_edge)

[Richard Biener]

On Tue, Aug 1, 2017 at 3:50 PM, Bill Schmidt
 wrote:
> On Aug 1, 2017, at 7:44 AM, Bill Schmidt  wrote:
>>
>>>
>>> On Aug 1, 2017, at 3:46 AM, Richard Biener  
>>> wrote:
>>>
>>> On Mon, Jul 31, 2017 at 4:03 PM, Bill Schmidt
>>>  wrote:

> On Jul 31, 2017, at 8:19 AM, Bill Schmidt  
> wrote:
>
> That would certainly be much simpler!  I'll regstrap it and test it on 
> the other
> occurrence I've found to be certain.

 Unfortunately, this fails bootstrap:

 /home/wschmidt/gcc/gcc-mainline-test/gcc/calls.c: In function 'rtx_def* 
 emit_library_call_value_1(int, rtx, rtx, libcall_type, machine_mode, int, 
 va_list)':
 /home/wschmidt/gcc/gcc-mainline-test/gcc/calls.c:4362:1: error: definition 
 in block 214 does not dominate use in block 14
 emit_library_call_value_1 (int retval, rtx orgfun, rtx value,
 ^
 for SSA_NAME: slsr_772 in statement:
 slsr_749 = PHI <_17(26), slsr_772(14), slsr_334(214)>
 PHI argument
 slsr_772
 for PHI node
 slsr_749 = PHI <_17(26), slsr_772(14), slsr_334(214)>
 during GIMPLE pass: slsr
 /home/wschmidt/gcc/gcc-mainline-test/gcc/calls.c:4362:1: internal compiler 
 error: verify_ssa failed
 0x11567cf3 verify_ssa(bool, bool)
   /home/wschmidt/gcc/gcc-mainline-test/gcc/tree-ssa.c:1186
 0x10fc3fff execute_function_todo
   /home/wschmidt/gcc/gcc-mainline-test/gcc/passes.c:1997
 0x10fc277f do_per_function
   /home/wschmidt/gcc/gcc-mainline-test/gcc/passes.c:1655
 0x10fc42a3 execute_todo
   /home/wschmidt/gcc/gcc-mainline-test/gcc/passes.c:2044
 Please submit a full bug report,
 with preprocessed source if appropriate.
 Please include the complete backtrace with any bug report.
 See  for instructions.

 Not terribly surprising given how sensitive this stuff is.  I can look 
 into why
 this fails, but looks like it can't be quite this simple, sadly.
>>>
>>> Intersting ... a dg-torture.exp run was clean for me (all I
>>> tested...).  So yes, can you
>>> check what fails?  Maybe run the testsuite with the stage1 compiler.
>>
>> Looks like it's the stage1 that doesn't build.  I think the difference is
>> that I was building trunk and you were building 6.  I'll try to look into
>> it later today after I get through some meetings.
>
> Sorry, no, it was stage 2 where the failure occurs.

Btw you can likely also avoid the issue in SLSR by inserting on the edge
and doing commit_edge_insertions () at the end of the pass.

Richard.

> Bill
>
>>
>> Bill
>>>
>>> Richard.
>>>
 Bill

>
> -- Bill
>
>> On Jul 31, 2017, at 4:15 AM, Richard Biener  
>> wrote:
>>
>> On Sun, Jul 30, 2017 at 8:04 PM, Bill Schmidt
>>  wrote:
>>> Hi,
>>>
>>> PR81354 identifies a latent bug that can happen in SLSR since the
>>> conditional candidate support was first added.  SLSR relies on the
>>> address of a GIMPLE PHI remaining constant during the course of the
>>> optimization pass, but it needs to split edges.  The use of
>>> make_single_succ_edge and reinstall_phi_args in gimple_split_edge
>>> causes GIMPLE PHI statements to be temporarily expanded to add a
>>> predecessor, and then rebuilt to have the original number of
>>> predecessors.  The expansion usually, if not always, causes the PHI
>>> statement to change address.  Thus gimple_split_edge needs to be
>>> rewritten to perform in-situ replacement of PHI arguments.
>>>
>>> The required pieces of make_single_succ_edge have been extracted into
>>> two places:  make_replacement_pred_edge, and some fixup code at the
>>> end of gimple_split_edge.  The division is necessary because the
>>> destination of the original edge must remember its original
>>> predecessors for the switch processing in
>>> gimple_redirect_edge_and_branch_1 to work properly.
>>>
>>> The function gimple_redirect_edge_and_branch was factored into two
>>> pieces so that most of it can be used by gimple_split_edge without
>>> calling ssa_redirect_edge, which also interferes with PHIs.  The
>>> useful bits of ssa_redirect_edge are factored out into the next three
>>> lines of gimple_split_edge.
>>>
>>> Similarly, redirect_eh_edge had already been similarly factored into
>>> redirect_eh_edge_1 and ssa_redirect_edge.  I took advantage of that
>>> and exposed redirect_eh_edge_1 for use in 
>>> gimple_redirect_edge_and_branch_1.
>>>
>>> I've added the test from PR81354 as a torture test, but as we've seen,
>>> small changes elsewhere in the optimizer can easily hide the problem.
>>>
>>> Bootstrapped and 

Simplify nvptx/slp* test-cases

[Tom de Vries]

Hi,

this patch simplifies the nvtpx/slp* test-cases by using signed loop 
iteration variables, in order to work around PR81635.


Committed.

Thanks,
- Tom
Simplify nvptx/slp* test-cases

Use signed loop iteration variable in nvtpx/slp* test-cases to work around
PR tree-optimizaion/81635.

2017-08-01  Tom de Vries  

	* gcc.target/nvptx/slp-2.c (foo): Use signed loop iteration variable.
	* gcc.target/nvptx/slp.c (foo): Same.

---
 gcc/testsuite/gcc.target/nvptx/slp-2.c | 2 +-
 gcc/testsuite/gcc.target/nvptx/slp.c   | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/gcc/testsuite/gcc.target/nvptx/slp-2.c b/gcc/testsuite/gcc.target/nvptx/slp-2.c
index 6639491..1821999 100644
--- a/gcc/testsuite/gcc.target/nvptx/slp-2.c
+++ b/gcc/testsuite/gcc.target/nvptx/slp-2.c
@@ -9,7 +9,7 @@ foo ()
 {
   long long int a, b;
 
-  unsigned int i;
+  int i;
   for (i = 0; i < 1000; i += 2)
 {
   a = p[i];
diff --git a/gcc/testsuite/gcc.target/nvptx/slp.c b/gcc/testsuite/gcc.target/nvptx/slp.c
index 5dee147..ca8191c 100644
--- a/gcc/testsuite/gcc.target/nvptx/slp.c
+++ b/gcc/testsuite/gcc.target/nvptx/slp.c
@@ -9,7 +9,7 @@ foo ()
 {
   int a, b;
 
-  unsigned int i;
+  int i;
   for (i = 0; i < 1000; i += 2)
 {
   a = p[i];

Improved support for arm-vxworks and arm-vxworks7

[Olivier Hainque]

Hello,

As mentioned in the thread rooted at
https://gcc.gnu.org/ml/gcc-patches/2017-07/msg00720.html,

the arm-vxworks port needs refreshing. As mentioned earlier in other vxworks
related threads, it was on my list of things to do and this patch implements
a first batch of changes to this effect.

It both cleans-up the original "arm-wrs-vxworks" configuration for VxWorks 6
and 5 essentially, and introduces support for VxWorks 7, with a significant
change of ABI (moving from the old ARM ABI to BPABI, from DWARF2 to ARM EH).

Apart from the Vx6/Vx7 differences, a significant change is the removal
of old specs introduced long ago to mimic the command line interface of another
family of compilers, introduced for several targets at the time and removed
in at least a few since then.

One effect is the removal of a harcoded default -march, so better integration
with the existing mechanisms allowing the selection of such defaults at
configure time. We leverage this immediately by adjusting target_cpu_name
providing the default CPU from config.gcc, to arm8 so it is at least archv4.

We also adjust TARGET_OS_CPP_BUILTIN to handle the more recent versions of
architectures known to be supported by current versions of VxWorks.

Tested by verifying success of an in-house build and proper execution of ACATS
tests with a gcc-7 based compiler for arm-vxworks and arm-vxworks7, and checking
that a build for arm-wrs-vxworks proceeds to completion on mainline.

With Kind Regards,

Olivier

2017-08-01  Jerome Lambourg  
Doug Rupp  
Olivier Hainque  

gcc/
* config.gcc (arm-wrs-vxworks*): Rework to handle arm-wrs-vxworks7 as
well as arm-wrs-vxworks. Update target_cpu_name from arm6 (arch v3) to
arm8 (arch v4).
* config/arm/vxworks.h (MAYBE_TARGET_BPABI_CPP_BUILTINS): New, helper
for TARGET_OS_CPP_BUILTIN.
(TARGET_OS_CPP_BUILTIN): Invoke MAYBE_TARGET_BPABI_CPP_BUILTINS(),
refine CPU definitions for arm_arch5 and add those for arm_arch6 and
arm_arch7.
(MAYBE_ASM_ABI_SPEC): New, helper for SUBTARGET_EXTRA_ASM_SPEC,
passing required abi options to the assembler for EABI configurations.
(EXTRA_CC1_SPEC): New macro, to help prevent the implicit production
of .text.hot and .text.unlikely sections for kernel modules when
using ARM style exceptions.
(CC1_SPEC): Remove obsolete attempt at mimicking Diab toolchain
options. Add EXTRA_CC1_SPEC.
(VXWORKS_ENDIAN_SPEC): Adjust comment and remove handling of Diab
toolchain options.
(DWARF2_UNWIND_INFO): Redefine to handle the pre/post VxWorks 7
transition.
(ARM_TARGET2_DWARF_FORMAT): Define.
* config/arm/t-vxworks: Adjust multilib control to removal of the
Diab command line options.

libgcc/
* config.host (arm-wrs-vxworks*): Rework to handle arm-wrs-vxworks7
as well as arm-wrs-vxworks.
* config/arm/t-vxworks7: New file.  Add unwind-arm-vxworks.c to
LIB2ADDEH.
* config/arm/unwind-arm-vxworks.c: New file. Provide dummy
__exidx_start and __exidx_end for downloadable modules.
  


0003-Improved-support-for-arm-vxworks-and-arm-vxworks7.patch
Description: Binary data

Re: [PATCH] Fix PR81354 (rewrite gimple_split_edge)

[Bill Schmidt]

On Aug 1, 2017, at 7:44 AM, Bill Schmidt  wrote:
> 
>> 
>> On Aug 1, 2017, at 3:46 AM, Richard Biener  
>> wrote:
>> 
>> On Mon, Jul 31, 2017 at 4:03 PM, Bill Schmidt
>>  wrote:
>>> 
 On Jul 31, 2017, at 8:19 AM, Bill Schmidt  
 wrote:
 
 That would certainly be much simpler!  I'll regstrap it and test it on the 
 other
 occurrence I've found to be certain.
>>> 
>>> Unfortunately, this fails bootstrap:
>>> 
>>> /home/wschmidt/gcc/gcc-mainline-test/gcc/calls.c: In function 'rtx_def* 
>>> emit_library_call_value_1(int, rtx, rtx, libcall_type, machine_mode, int, 
>>> va_list)':
>>> /home/wschmidt/gcc/gcc-mainline-test/gcc/calls.c:4362:1: error: definition 
>>> in block 214 does not dominate use in block 14
>>> emit_library_call_value_1 (int retval, rtx orgfun, rtx value,
>>> ^
>>> for SSA_NAME: slsr_772 in statement:
>>> slsr_749 = PHI <_17(26), slsr_772(14), slsr_334(214)>
>>> PHI argument
>>> slsr_772
>>> for PHI node
>>> slsr_749 = PHI <_17(26), slsr_772(14), slsr_334(214)>
>>> during GIMPLE pass: slsr
>>> /home/wschmidt/gcc/gcc-mainline-test/gcc/calls.c:4362:1: internal compiler 
>>> error: verify_ssa failed
>>> 0x11567cf3 verify_ssa(bool, bool)
>>>   /home/wschmidt/gcc/gcc-mainline-test/gcc/tree-ssa.c:1186
>>> 0x10fc3fff execute_function_todo
>>>   /home/wschmidt/gcc/gcc-mainline-test/gcc/passes.c:1997
>>> 0x10fc277f do_per_function
>>>   /home/wschmidt/gcc/gcc-mainline-test/gcc/passes.c:1655
>>> 0x10fc42a3 execute_todo
>>>   /home/wschmidt/gcc/gcc-mainline-test/gcc/passes.c:2044
>>> Please submit a full bug report,
>>> with preprocessed source if appropriate.
>>> Please include the complete backtrace with any bug report.
>>> See  for instructions.
>>> 
>>> Not terribly surprising given how sensitive this stuff is.  I can look into 
>>> why
>>> this fails, but looks like it can't be quite this simple, sadly.
>> 
>> Intersting ... a dg-torture.exp run was clean for me (all I
>> tested...).  So yes, can you
>> check what fails?  Maybe run the testsuite with the stage1 compiler.
> 
> Looks like it's the stage1 that doesn't build.  I think the difference is
> that I was building trunk and you were building 6.  I'll try to look into
> it later today after I get through some meetings.

Sorry, no, it was stage 2 where the failure occurs.

Bill

> 
> Bill
>> 
>> Richard.
>> 
>>> Bill
>>> 
 
 -- Bill
 
> On Jul 31, 2017, at 4:15 AM, Richard Biener  
> wrote:
> 
> On Sun, Jul 30, 2017 at 8:04 PM, Bill Schmidt
>  wrote:
>> Hi,
>> 
>> PR81354 identifies a latent bug that can happen in SLSR since the
>> conditional candidate support was first added.  SLSR relies on the
>> address of a GIMPLE PHI remaining constant during the course of the
>> optimization pass, but it needs to split edges.  The use of
>> make_single_succ_edge and reinstall_phi_args in gimple_split_edge
>> causes GIMPLE PHI statements to be temporarily expanded to add a
>> predecessor, and then rebuilt to have the original number of
>> predecessors.  The expansion usually, if not always, causes the PHI
>> statement to change address.  Thus gimple_split_edge needs to be
>> rewritten to perform in-situ replacement of PHI arguments.
>> 
>> The required pieces of make_single_succ_edge have been extracted into
>> two places:  make_replacement_pred_edge, and some fixup code at the
>> end of gimple_split_edge.  The division is necessary because the
>> destination of the original edge must remember its original
>> predecessors for the switch processing in
>> gimple_redirect_edge_and_branch_1 to work properly.
>> 
>> The function gimple_redirect_edge_and_branch was factored into two
>> pieces so that most of it can be used by gimple_split_edge without
>> calling ssa_redirect_edge, which also interferes with PHIs.  The
>> useful bits of ssa_redirect_edge are factored out into the next three
>> lines of gimple_split_edge.
>> 
>> Similarly, redirect_eh_edge had already been similarly factored into
>> redirect_eh_edge_1 and ssa_redirect_edge.  I took advantage of that
>> and exposed redirect_eh_edge_1 for use in 
>> gimple_redirect_edge_and_branch_1.
>> 
>> I've added the test from PR81354 as a torture test, but as we've seen,
>> small changes elsewhere in the optimizer can easily hide the problem.
>> 
>> Bootstrapped and tested on powerpc64le-linux-gnu with no regressions.
>> Is this ok for trunk?  Eventually this needs to be backported to GCC 5,
>> 6, and 7 if that's acceptable, since PR81354 was observed on
>> gcc-5-branch.  I haven't yet prepared the backports.
> 
> I don't like make_replacement_pred_edge too 

Re: [PATCH] Add optab checks to vector extraction path in vectorizable_store

[Jakub Jelinek]

On Tue, Aug 01, 2017 at 03:19:28PM +0200, Richard Biener wrote:
> +   if (lvectype != vectype)
> + {
> +   tree tem = make_ssa_name (lvectype);
> +   gimple *pun= gimple_build_assign (tem, build1
> + (VIEW_CONVERT_EXPR, lvectype, vec_oprnd));

Too weird formatting, can you use:
  gimple *pun
= gimple_build_assign (tem, build1 (VIEW_CONVERT_EXPR,
lvectype, vec_oprnd));
instead?

> +   vect_finish_stmt_generation (stmt, pun, gsi);
> +   vec_oprnd = tem;
> + }
> for (i = 0; i < nstores; i++)
>   {
> tree newref, newoff;

Jakub

Re: [PATCH PR81228]Fixes ICE by adding LTGT in vec_cmp.

[Bin.Cheng]

On Fri, Jul 28, 2017 at 3:15 PM, Richard Sandiford
 wrote:
> "Bin.Cheng"  writes:
>> On Fri, Jul 28, 2017 at 12:55 PM, Richard Sandiford
>>  wrote:
>>> Bin Cheng  writes:
 Hi,
 This simple patch fixes the ICE by adding LTGT in
 vec_cmp pattern.
 I also modified the original test case into a compilation one since
 -fno-wrapping-math
 should not be used in general.
 Bootstrap and test on AArch64, test result check for x86_64.  Is it OK?
 I would also need to
 backport it to gcc-7-branch.

 Thanks,
 bin
 2017-07-27  Bin Cheng  

   PR target/81228
   * config/aarch64/aarch64-simd.md (vec_cmp): Add
   LTGT.

 gcc/testsuite/ChangeLog
 2017-07-27  Bin Cheng  

   PR target/81228
   * gcc.dg/pr81228.c: New.

 diff --git a/gcc/config/aarch64/aarch64-simd.md 
 b/gcc/config/aarch64/aarch64-simd.md
 index 011fcec0..9cd67a2 100644
 --- a/gcc/config/aarch64/aarch64-simd.md
 +++ b/gcc/config/aarch64/aarch64-simd.md
 @@ -2524,6 +2524,7 @@
  case EQ:
comparison = gen_aarch64_cmeq;
break;
 +case LTGT:
  case UNEQ:
  case ORDERED:
  case UNORDERED:
 @@ -2571,6 +2572,7 @@
emit_insn (comparison (operands[0], operands[2], operands[3]));
break;

 +case LTGT:
  case UNEQ:
/* We first check (a > b ||  b > a) which is !UNEQ, inverting
this result will then give us (a == b || a UNORDERED b).  */
 @@ -2578,7 +2580,8 @@
operands[2], operands[3]));
emit_insn (gen_aarch64_cmgt (tmp, operands[3], operands[2]));
emit_insn (gen_ior3 (operands[0], operands[0], tmp));
 -  emit_insn (gen_one_cmpl2 (operands[0], operands[0]));
 +  if (code == UNEQ)
 + emit_insn (gen_one_cmpl2 (operands[0], operands[0]));
break;
>>>
>>> AFAIK this is still a grey area, but I think (ltgt x y) is supposed to
>>> be a trapping operation, i.e. it's closer to (ior (lt x y) (gt x y))
>>> than (not (uneq x y)).  See e.g. the handling in may_trap_p_1, where
>>> LTGT is handled like LT and GT rather than like UNEQ.
>>>
>>> See also: https://gcc.gnu.org/ml/gcc-patches/2015-02/msg00583.html
>> Thanks for pointing me to this, I don't know anything about floating point 
>> here.
>> As for the change, the code now looks like:
>>
>> case LTGT:
>> case UNEQ:
>>   /* We first check (a > b ||  b > a) which is !UNEQ, inverting
>>  this result will then give us (a == b || a UNORDERED b).  */
>>   emit_insn (gen_aarch64_cmgt (operands[0],
>>  operands[2], operands[3]));
>>   emit_insn (gen_aarch64_cmgt (tmp, operands[3], operands[2]));
>>   emit_insn (gen_ior3 (operands[0], operands[0], tmp));
>>   if (code == UNEQ)
>> emit_insn (gen_one_cmpl2 (operands[0], operands[0]));
>>   break;
>>
>> So (a > b || b > a) is generated for LTGT which you suggested?
>
> Ah, yeah, I was just going off LTGT being treated as !UNEQ, but...
>
>> Here we invert the result for UNEQ though.
>
> ...it looks like it might be the UNEQ code that's wrong.  E.g. this
> test fails at -O3 and passes at -O for me:
>
> #define _GNU_SOURCE
> #include 
>
> double x[16], y[16];
> int res[16];
>
> int
> main (void)
> {
>   for (int i = 0; i < 16; ++i)
> {
>   x[i] = __builtin_nan ("");
>   y[i] = i;
> }
>   asm volatile ("" ::: "memory");
>   feclearexcept (FE_ALL_EXCEPT);
>   for (int i = 0; i < 16; ++i)
> res[i] = __builtin_islessgreater (x[i], y[i]);
>   asm volatile ("" ::: "memory");
>   return fetestexcept (FE_ALL_EXCEPT) != 0;
> }
>
> (asm volatiles just added for paranoia, in case stuff gets optimised
> away otherwise.)
Thanks for the test, I file PR81647 for tracking.  And this is
actually inconsistent LTGT behavior issue.  It's translated
differently w/o vectorization I think.

Thanks,
bin
>
> But I suppose that's no reason to hold up your patch. :-)  Maybe it'd
> be worth having a comment though?
>
> Thanks,
> Richard

Re: [PATCH] Fix segfault in gcov.c (PR gcov-profile/81561).

[Richard Biener]

On Tue, Aug 1, 2017 at 2:02 PM, Martin Liška  wrote:
> On 07/27/2017 01:48 PM, Richard Biener wrote:
>>
>> On Thu, Jul 27, 2017 at 12:12 PM, Martin Liška  wrote:
>>>
>>> Hello.
>>>
>>> As reported in mentioned PR, we segfault in gcov tool when one uses -a.
>>> It's caused by fact
>>> that vectors blocks and block_lists have indices kept in sync and as one
>>> removes an element
>>> from blocks via:
>>> blocked.erase (it);
>>>
>>> Then calling recursively the same function breaks the synchronization.
>>> The patch was originally
>>> written by Joshua (adding him to CC). If I'm correct calling:
>>>
>>> -unblock (u, blocked, block_lists);
>>>
>>> does not make sense as we've already removed 'u'. Plus one needs to put
>>> content of block_lists[index]
>>> to a separate vector in order to not to break iteration.
>>>
>>> Patch can bootstrap on ppc64le-redhat-linux and survives regression
>>> tests.
>>> And fixed the problem reported in opensuse bugzilla (mentioned in the GCC
>>> bugzilla PR).
>>>
>>> Ready to be installed?
>>
>>
>> Looks good to me but please wait for Joshua to confirm.
>
>
> Hello.
>
> No reply yet, I've just verified that in the article the function (unblock)
> does the same as with the patch:
> https://pdfs.semanticscholar.org/72c3/b54c1aea0a3193bad9721727a1798101ab26.pdf
> (page 3).
>
> I would be happy to have the patch in 7.2.
> Can we Richi catch the deadline?

Sure, go ahead now.

Thanks,
Richard.

> Thanks,
> Martin
>
>
>>
>> Did you manage to extract a testcase?
>>
>> Thanks,
>> Richard.
>>
>>> Martin
>>>
>>>
>>> gcc/ChangeLog:
>>>
>>> 2017-07-26  Martin Liska  
>>>
>>>  PR gcov-profile/81561
>>>  * gcov.c (unblock): Make unblocking safe as we need to preserve
>>>  index correspondence of blocks and block_lists.
>>> ---
>>>   gcc/gcov.c | 10 +++---
>>>   1 file changed, 7 insertions(+), 3 deletions(-)
>>>
>>>
>>>
>

Re: [PATCH v12] add -fpatchable-function-entry=N,M option

[Andreas Schwab]

On Aug 01 2017, Maxim Kuvyrkov  wrote:

> Do you know a reliable way of checking whether target can issue nops in 
> simple code?

Try inspecting one of the rtl dumps.

Andreas.

-- 
Andreas Schwab, SUSE Labs, sch...@suse.de
GPG Key fingerprint = 0196 BAD8 1CE9 1970 F4BE  1748 E4D4 88E3 0EEA B9D7
"And now for something completely different."

[PATCH] Fix PR81181

[Richard Biener]

The following fixes another case of endless compute_antic iteration
in PRE.  After a lengthy four-eyes discussion here we concluded that
the way clean () operates on expressions rather than values can
cause oscillation in the dataflow problem.

Thus we have to delay it (at the cost of some intermediate extra size of
ANTIC_IN sets).

Bootstrapped and tested on x86_64-unknown-linux-gnu, applied to trunk.

2017-08-01  Richard Biener  

PR tree-optimization/81181
* tree-ssa-pre.c (compute_antic_aux): Defer clean() to ...
(compute_antic): ... end of iteration here.

* gcc.dg/torture/pr81181.c: New testcase.

Index: gcc/tree-ssa-pre.c
===
--- gcc/tree-ssa-pre.c  (revision 250725)
+++ gcc/tree-ssa-pre.c  (working copy)
@@ -2115,7 +2166,8 @@ static sbitmap has_abnormal_preds;
  ANTIC_OUT[BLOCK] = phi_translate (ANTIC_IN[succ(BLOCK)])
 
ANTIC_IN[BLOCK] = clean(ANTIC_OUT[BLOCK] U EXP_GEN[BLOCK] - TMP_GEN[BLOCK])
-*/
+
+   Note that clean() is deferred until after the iteration.  */
 
 static bool
 compute_antic_aux (basic_block block, bool block_has_abnormal_pred_edge)
@@ -2215,7 +2267,8 @@ compute_antic_aux (basic_block block, bo
 bitmap_value_insert_into_set (ANTIC_IN (block),
  expression_for_id (bii));
 
-  clean (ANTIC_IN (block));
+  /* clean (ANTIC_IN (block)) is defered to after the iteration converged
+ because it can cause non-convergence, see for example PR81181.  */
 
   if (!was_visited || !bitmap_set_equal (old, ANTIC_IN (block)))
 changed = true;
@@ -2449,6 +2504,12 @@ compute_antic (void)
   gcc_checking_assert (num_iterations < 500);
 }
 
+  /* We have to clean after the dataflow problem converged as cleaning
+ can cause non-convergence because it is based on expressions
+ rather than values.  */
+  FOR_EACH_BB_FN (block, cfun)
+clean (ANTIC_IN (block));
+
   statistics_histogram_event (cfun, "compute_antic iterations",
  num_iterations);
 
Index: gcc/testsuite/gcc.dg/torture/pr81181.c
===
--- gcc/testsuite/gcc.dg/torture/pr81181.c  (nonexistent)
+++ gcc/testsuite/gcc.dg/torture/pr81181.c  (working copy)
@@ -0,0 +1,30 @@
+/* { dg-do compile } */
+
+unsigned int lh;
+
+void
+ny (int t3, int ys, int rt, int p8)
+{
+  if (lh != 0)
+{
+  if (0)
+   {
+oo:
+ do
+   {
+ rt = (p8 != 0) ? t3 : 0;
+ rt = (rt != 0 || lh != (unsigned int)ys);
+ rt += lh + ys;
+   }
+ while (t3 <= 0);
+
+ lh = ys;
+ ys = rt;
+   }
+
+  if (lh != 0)
+   p8 = lh;
+}
+
+  goto oo;
+}

Refine VxWorks header file path twists for libgcc builds

[Olivier Hainque]

Hello,

libgcc/config/t-vxworks twists LIBGCC2_INCLUDE to workaround a problem of
header file name conflicts between the system headers and gcc headers during
libgcc builds:

# This ensures that the correct target headers are used; some
# VxWorks system headers have names that collide with GCC's
# internal (host) headers, e.g. regs.h.
LIBGCC2_INCLUDES = -nostdinc \
   `case "/$(MULTIDIR)" in \
  */mrtp*) echo -I$(WIND_USR)/h -I$(WIND_USR)/h/wrn/coreip ;; \
  *) echo -I$(WIND_BASE)/target/h -I$(WIND_BASE)/target/h/wrn/coreip ;; \

As the comment indicates, this is typically preventing #include  from
a VxWorks header file to pick gcc's regs.h.

For VxWorks 7 RTPs on ARM, the current twist introduces a symmetrical issue,
with #include "unwind.h" from unwind-arm-common.inc picking unwind.h from a
VxWorks system dir instead of the local libgcc one.

The attached patch fixes this by prepending -I. to the set of options, so
we do pick local libgcc headers first without re-introducing access to the
originally problematic gcc headers.

Tested by verifying success of an in-house build and proper execution of ACATS
tests on a gcc-7 based compiler for arm-vxworks and arm-vxworks7, and checking
that a build for arm-wrs-vxworks proceeds to completion on mainline.

Committing to mainline,

With Kind Regards,

Olivier

2017-08-01  Olivier Hainque  

libgcc/
* config/t-vxworks (LIBGCC2_INCLUDES): Start with -I. after -nostdinc.
* config/t-vxworks7: Likewise.



0002-When-building-libgcc-search-for-the-local-build-subd.patch
Description: Binary data

[PATCH] Add optab checks to vector extraction path in vectorizable_store

[Richard Biener]

The following adds optab checks to see whether the target prefers
vector from vector extracts or integer from punned integer vector
extracts.  But instead of falling back to elementwise operation
we fall back to the vector from vector extract path as spilling
the vector to extract from and then doing the extract via loads
which then feed (and fewer) stores should be always profitable
(N element extracts plus N element stores vs. at most one spill
plus N/2 loads from spill slot plus N/2 stores).
Usually archs do not show store-to-load forwarding issues for
this case.

Bootstrap and regtest ongoing on x86_64-unknown-linux-gnu.

Richard.

2017-08-01  Richard Biener  

* tree-vect-stmts.c (vectorizable_store): Perform vector extracts
via vectors if supported, integer extracts via punning if supported
or otherwise vector extracts.

Index: gcc/tree-vect-stmts.c
===
--- gcc/tree-vect-stmts.c   (revision 250773)
+++ gcc/tree-vect-stmts.c   (working copy)
@@ -6002,6 +6002,7 @@ vectorizable_store (gimple *stmt, gimple
   unsigned nstores = nunits;
   unsigned lnel = 1;
   tree ltype = elem_type;
+  tree lvectype = vectype;
   if (slp)
{
  if (group_size < nunits
@@ -6010,6 +6011,45 @@ vectorizable_store (gimple *stmt, gimple
  nstores = nunits / group_size;
  lnel = group_size;
  ltype = build_vector_type (elem_type, group_size);
+ lvectype = vectype;
+
+ /* First check if vec_extract optab doesn't support extraction
+of vector elts directly.  */
+ machine_mode elmode = TYPE_MODE (elem_type);
+ machine_mode vmode = mode_for_vector (elmode, group_size);
+ if (! VECTOR_MODE_P (vmode)
+ || (convert_optab_handler (vec_extract_optab,
+TYPE_MODE (vectype), vmode)
+ == CODE_FOR_nothing))
+   {
+ /* Try to avoid emitting an extract of vector elements
+by performing the extracts using an integer type of the
+same size, extracting from a vector of those and then
+re-interpreting it as the original vector type if
+supported.  */
+ unsigned lsize
+   = group_size * GET_MODE_BITSIZE (elmode);
+ elmode = mode_for_size (lsize, MODE_INT, 0);
+ vmode = mode_for_vector (elmode, nunits / group_size);
+ /* If we can't construct such a vector fall back to
+element extracts from the original vector type and
+element size stores.  */
+ if (VECTOR_MODE_P (vmode)
+ && (convert_optab_handler (vec_extract_optab,
+vmode, elmode)
+ != CODE_FOR_nothing))
+   {
+ nstores = nunits / group_size;
+ lnel = group_size;
+ ltype = build_nonstandard_integer_type (lsize, 1);
+ lvectype = build_vector_type (ltype, nstores);
+   }
+ /* Else fall back to vector extraction anyway.
+Fewer stores are more important than avoiding spilling
+of the vector we extract from.  Compared to the
+construction case in vectorizable_load no store-forwarding
+issue exists here for reasonable archs.  */
+   }
}
  else if (group_size >= nunits
   && group_size % nunits == 0)
@@ -6017,6 +6057,7 @@ vectorizable_store (gimple *stmt, gimple
  nstores = 1;
  lnel = nunits;
  ltype = vectype;
+ lvectype = vectype;
}
  ltype = build_aligned_type (ltype, TYPE_ALIGN (elem_type));
  ncopies = SLP_TREE_NUMBER_OF_VEC_STMTS (slp_node);
@@ -6087,7 +6128,15 @@ vectorizable_store (gimple *stmt, gimple
  vec_oprnd = vect_get_vec_def_for_stmt_copy (dt, 
vec_oprnd);
}
}
-
+ /* Pun the vector to extract from if necessary.  */
+ if (lvectype != vectype)
+   {
+ tree tem = make_ssa_name (lvectype);
+ gimple *pun= gimple_build_assign (tem, build1
+   (VIEW_CONVERT_EXPR, lvectype, vec_oprnd));
+ vect_finish_stmt_generation (stmt, pun, gsi);
+ vec_oprnd = tem;
+   }
  for (i = 0; i < nstores; i++)
{
  tree newref, newoff;

Re: [PATCH v12] add -fpatchable-function-entry=N,M option

[Maxim Kuvyrkov]

> On Aug 1, 2017, at 1:52 PM, Andreas Schwab  wrote:
> 
> On Aug 01 2017, Gerald Pfeifer  wrote:
> 
>> On Mon, 31 Jul 2017, Maxim Kuvyrkov wrote:
>>> I don't see an easy way to correctly differentiate between "attribute" 
>>> nops and "bundle" nops, so XFAILing these tests on ia64 seems like a 
>>> valid approach.
>> 
>> Make sense, given that the use of Itanium has gone done drastically.
> 
> You can get the same failure with any target, for example if there are
> delay slots to be filled.

Andreas,

Do you know a reliable way of checking whether target can issue nops in simple 
code?

One alternative would be to apply testcase only to white-listed architectures, 
which is, imo, less preferable.

Regards,

--
Maxim Kuvyrkov
www.linaro.org

Move vxlib gthread helpers for VxWorks to libgcc_eh

[Olivier Hainque]

Hello,

libgcc/config/vxlib*.c implement parts-of/helpers-for the gthreads API
to support EH services for VxWorks.

This patch adjusts config/t-vxworks to add them to LIB2ADDEH instead
of modifying LIB2ADD, so the object files get bundled together with the
other EH related modules.

Tested by verifying proper execution of ACATS tests on a gcc-7 based
compiler for arm-vxworks, and checking that a build for arm-wrs-vxworks
proceeds to completion on mainline.

Committing to mainline.

Regards,

Olivier


2017-08-01  Olivier Hainque  

libgcc/
* libgcc/config/t-vxworks: Instead of redefining LIB2ADD,
augment LIB2ADDEH with vxlib.c and vxlib-tls.c.



0001-Move-vxlib-gthread-helpers-for-VxWorks-to-libgcc_eh.patch
Description: Binary data

Re: [PATCH] Fix PR81354 (rewrite gimple_split_edge)

[Bill Schmidt]

> On Aug 1, 2017, at 3:46 AM, Richard Biener  wrote:
> 
> On Mon, Jul 31, 2017 at 4:03 PM, Bill Schmidt
>  wrote:
>> 
>>> On Jul 31, 2017, at 8:19 AM, Bill Schmidt  
>>> wrote:
>>> 
>>> That would certainly be much simpler!  I'll regstrap it and test it on the 
>>> other
>>> occurrence I've found to be certain.
>> 
>> Unfortunately, this fails bootstrap:
>> 
>> /home/wschmidt/gcc/gcc-mainline-test/gcc/calls.c: In function 'rtx_def* 
>> emit_library_call_value_1(int, rtx, rtx, libcall_type, machine_mode, int, 
>> va_list)':
>> /home/wschmidt/gcc/gcc-mainline-test/gcc/calls.c:4362:1: error: definition 
>> in block 214 does not dominate use in block 14
>> emit_library_call_value_1 (int retval, rtx orgfun, rtx value,
>> ^
>> for SSA_NAME: slsr_772 in statement:
>> slsr_749 = PHI <_17(26), slsr_772(14), slsr_334(214)>
>> PHI argument
>> slsr_772
>> for PHI node
>> slsr_749 = PHI <_17(26), slsr_772(14), slsr_334(214)>
>> during GIMPLE pass: slsr
>> /home/wschmidt/gcc/gcc-mainline-test/gcc/calls.c:4362:1: internal compiler 
>> error: verify_ssa failed
>> 0x11567cf3 verify_ssa(bool, bool)
>>/home/wschmidt/gcc/gcc-mainline-test/gcc/tree-ssa.c:1186
>> 0x10fc3fff execute_function_todo
>>/home/wschmidt/gcc/gcc-mainline-test/gcc/passes.c:1997
>> 0x10fc277f do_per_function
>>/home/wschmidt/gcc/gcc-mainline-test/gcc/passes.c:1655
>> 0x10fc42a3 execute_todo
>>/home/wschmidt/gcc/gcc-mainline-test/gcc/passes.c:2044
>> Please submit a full bug report,
>> with preprocessed source if appropriate.
>> Please include the complete backtrace with any bug report.
>> See  for instructions.
>> 
>> Not terribly surprising given how sensitive this stuff is.  I can look into 
>> why
>> this fails, but looks like it can't be quite this simple, sadly.
> 
> Intersting ... a dg-torture.exp run was clean for me (all I
> tested...).  So yes, can you
> check what fails?  Maybe run the testsuite with the stage1 compiler.

Looks like it's the stage1 that doesn't build.  I think the difference is
that I was building trunk and you were building 6.  I'll try to look into
it later today after I get through some meetings.

Bill
> 
> Richard.
> 
>> Bill
>> 
>>> 
>>> -- Bill
>>> 
 On Jul 31, 2017, at 4:15 AM, Richard Biener  
 wrote:
 
 On Sun, Jul 30, 2017 at 8:04 PM, Bill Schmidt
  wrote:
> Hi,
> 
> PR81354 identifies a latent bug that can happen in SLSR since the
> conditional candidate support was first added.  SLSR relies on the
> address of a GIMPLE PHI remaining constant during the course of the
> optimization pass, but it needs to split edges.  The use of
> make_single_succ_edge and reinstall_phi_args in gimple_split_edge
> causes GIMPLE PHI statements to be temporarily expanded to add a
> predecessor, and then rebuilt to have the original number of
> predecessors.  The expansion usually, if not always, causes the PHI
> statement to change address.  Thus gimple_split_edge needs to be
> rewritten to perform in-situ replacement of PHI arguments.
> 
> The required pieces of make_single_succ_edge have been extracted into
> two places:  make_replacement_pred_edge, and some fixup code at the
> end of gimple_split_edge.  The division is necessary because the
> destination of the original edge must remember its original
> predecessors for the switch processing in
> gimple_redirect_edge_and_branch_1 to work properly.
> 
> The function gimple_redirect_edge_and_branch was factored into two
> pieces so that most of it can be used by gimple_split_edge without
> calling ssa_redirect_edge, which also interferes with PHIs.  The
> useful bits of ssa_redirect_edge are factored out into the next three
> lines of gimple_split_edge.
> 
> Similarly, redirect_eh_edge had already been similarly factored into
> redirect_eh_edge_1 and ssa_redirect_edge.  I took advantage of that
> and exposed redirect_eh_edge_1 for use in 
> gimple_redirect_edge_and_branch_1.
> 
> I've added the test from PR81354 as a torture test, but as we've seen,
> small changes elsewhere in the optimizer can easily hide the problem.
> 
> Bootstrapped and tested on powerpc64le-linux-gnu with no regressions.
> Is this ok for trunk?  Eventually this needs to be backported to GCC 5,
> 6, and 7 if that's acceptable, since PR81354 was observed on
> gcc-5-branch.  I haven't yet prepared the backports.
 
 I don't like make_replacement_pred_edge too much.  Wouldn't it work
 to make sure we first shrink and then re-grow like if we simply do the
 redirect_edge_and_branch before the make_single_succ_edge call?
 At least quick testing shows it fixes the testcase on the GCC 6 branch for 
 me.
 

Re: [PATCH, rs6000] altivec_resolve_overloaded_builtin fixes (PR target/81622)

[Bill Schmidt]

> On Aug 1, 2017, at 1:40 AM, Jakub Jelinek  wrote:
> 
> Hi!
> 
> On Mon, Jul 31, 2017 at 02:42:21PM -0500, Bill Schmidt wrote:
>>> On Jul 31, 2017, at 11:27 AM, Jakub Jelinek  wrote:
>>> On Mon, Jul 31, 2017 at 11:19:26AM -0500, Bill Schmidt wrote:
 https://gcc.gnu.org/bugzilla/show_bug.cgi?id=81622 reports an 
 ICE-on-invalid
 for the vec_ld and vec_st built-in functions.  This fires when the last
 argument of the built-in is not a pointer or array type, as is required.
 We break on this during early expansion of the built-ins into tree code
 during parsing.  The solution, as with other ill-formed uses of these
 built-ins, is to avoid the early expansion when the argument has an invalid
 type, so that normal error handling can kick in later.
 
 (The long-term solution is to move the vec_ld and vec_st built-ins to the
 gimple folding work that Will Schmidt has been doing, but that hasn't
 happened yet.)
 
 Bootstrapped and tested on powerpc64le-linux-gnu with no regressions.
 Is this ok for trunk and GCC 7?  I'd like to get it into 7.2 since it
 is a 7 regression.
>>> 
>>> See the patch I've attached in the PR, this isn't sufficient
>>> (and for the ARRAY_TYPE I wonder if you can ever see there ARRAY_TYPE),
>>> the function has various other issues, including e.g. ICE on
>>> vec_cmpne (1, 2) with -mpower9.
>> 
>> Yes, I'll withdraw the patch (but the ARRAY_TYPE thing is necessary as
>> we've discussed).  I'll step out of your way on this one since you've got it
>> well in hand.  It would be great to have a fix in for 7.2, though.
> 
> Here is the variant patch.  In addition to fixing the ICE for vec_ld, for
> vec_st it just moves the premature computation of aligned to the point where
> it is used and that is after we've also verified that the types of the call
> arguments match the builtin argument types, it fixes ICE on vec_cmpne, where
> for -mpower9 it accesses TYPE_MODE (TREE_TYPE (arg0_type)) without checking
> that arg0_type is actually VECTOR_TYPE (if it is e.g. INTEGRAL_TYPE, it will
> segfault) and has some formatting fixes too.
> 
> Bootstrapped/regtested on powerpc64{,le}-linux, ok for
> trunk/7.2 (for the latter it applies without the 2 formatting fix hunks
> with while (desc->code && desc->code == fcode &&)?
> 
> Note, there is diagnostic message in that routine starting with "Builtin,
> that is something that should be fixed too, GCC diagnostic messages
> (except for Fortran) don't start with a capital letter.  But this change
> requires to adjust quite a lot of testcases in gcc.target/powerpc :(. 

Jakub, thanks for handling!  I'll put the cleanup of this diagnostic
message on our list.  Thanks for pointing it out.

Bill

> 
> 2017-07-31  Jakub Jelinek  
> 
>   PR target/81622
>   * config/rs6000/rs6000-c.c (altivec_resolve_overloaded_builtin): For
>   __builtin_vec_cmpne verify both arguments are compatible vectors
>   before looking at TYPE_MODE on the element type.  For __builtin_vec_ld
>   verify arg1_type is a pointer or array type.  For __builtin_vec_st,
>   move computation of aligned to after checking the argument types.
>   Formatting fixes.
> 
>   * gcc.target/powerpc/pr81622.c: New test.
> 
> --- gcc/config/rs6000/rs6000-c.c.jj   2017-07-25 12:19:51.0 +0200
> +++ gcc/config/rs6000/rs6000-c.c  2017-07-31 17:05:59.947783972 +0200
> @@ -5852,6 +5852,12 @@ altivec_resolve_overloaded_builtin (loca
>   tree arg1 = (*arglist)[1];
>   tree arg1_type = TREE_TYPE (arg1);
> 
> +  /* Both arguments must be vectors and the types must be compatible.  */
> +  if (TREE_CODE (arg0_type) != VECTOR_TYPE)
> + goto bad;
> +  if (!lang_hooks.types_compatible_p (arg0_type, arg1_type))
> + goto bad;
> +
>   /* Power9 instructions provide the most efficient implementation of
>ALTIVEC_BUILTIN_VEC_CMPNE if the mode is not DImode or TImode
>or SFmode or DFmode.  */
> @@ -5861,12 +5867,6 @@ altivec_resolve_overloaded_builtin (loca
> || (TYPE_MODE (TREE_TYPE (arg0_type)) == SFmode)
> || (TYPE_MODE (TREE_TYPE (arg0_type)) == DFmode))
>   {
> -   /* Both arguments must be vectors and the types must be compatible.  
> */
> -   if (TREE_CODE (arg0_type) != VECTOR_TYPE)
> - goto bad;
> -   if (!lang_hooks.types_compatible_p (arg0_type, arg1_type))
> - goto bad;
> -
> switch (TYPE_MODE (TREE_TYPE (arg0_type)))
>   {
> /* vec_cmpneq (va, vb) == vec_nor (vec_cmpeq (va, vb),
> @@ -5931,8 +5931,8 @@ altivec_resolve_overloaded_builtin (loca
>__int128) and the types must be compatible.  */
>   if (TREE_CODE (arg0_type) != VECTOR_TYPE)
>   goto bad;
> -  if (!lang_hooks.types_compatible_p (arg0_type, arg1_type) ||
> -   !lang_hooks.types_compatible_p (arg1_type, arg2_type))
> +  if 

Re: [ARM, VXworks] Fix build

[Olivier Hainque]

Hi Richard,

> On Jul 31, 2017, at 11:58 , Richard Earnshaw (lists) 
>  wrote:
> 
>> Regarding removal of old ABI support, which release were you
>> targeting ?
>> 
>> On the VxWorks front, where we adapt to what the system toolchains
>> do, it will mean dropping support for VxWorks versions prior to 7,
>> which is not so old - couple of years I think. Not the end of the
>> world, but an extra release cycle can make a difference.
>> 
>> Is VxWorks alone in this category ?
> 
> Pretty close, I think.  The only other ARM port using the old ABI that
> I'm aware of is NetBSD.  That doesn't use GCC as it's default compiler
> these days and even there an EABI port is in use (I suspect Clang
> requires it).
> 
> So until I became aware of the VXworks port using the old ABI, I thought
> there was only one remaining port - VXworks makes that 2 but both seem
> to have a transition plan of sorts.

> I think deprecating in gcc-8 with removal in GCC-9 is probably viable on
> that basis, so that's my opening bid.  Given that gcc-8 will have a
> 2-year support window that means support for the old ABI through to
> ~2020, at which point v2 of the EABI will itself be 15 years old.

I see, thanks for sharing the plan.

For VxWorks, it's really a matter of how long do we want to support versions
prior to the most recent one today (VxWorks 7). Vx7 is only two years old, so
dropping support in gcc-8 would have been pretty delicate. A year later seems
like a fair compromise at this stage.

Updating toolchains is usually an involved process, so people switching to
gcc-8 would typically only do so months (roughly a year maybe) after it's out.

It then seems possible that people really willing to switch toolchains after
that might also consider moving to VxWorks >= 7 if not already done. We'll
see.

Regarding the port evolution, I'm about to post a few updates. A couple of
these call for an ARM maintainer approval I think (e.g. addition of a 
_clear_cache variant to lib1funcs.S). I'll cc you on these specifically.

Thanks for your feedback :)

With Kind Regards,

Olivier

RE: [GCC][AArch64][PATCH][Committed] Fix failing dbl_mov_immediate_1.c test on big-endian

[Tamar Christina]

Hi,

Sorry this fix is incorrect, I have reverted the patch to address the rest of 
the
Big endian failures.

Sorry,
Tamar

> -Original Message-
> From: gcc-patches-ow...@gcc.gnu.org [mailto:gcc-patches-
> ow...@gcc.gnu.org] On Behalf Of Tamar Christina
> Sent: 01 August 2017 12:43
> To: gcc-patches@gcc.gnu.org
> Cc: nd; James Greenhalgh; Richard Earnshaw; Marcus Shawcroft
> Subject: [GCC][AArch64][PATCH][Committed] Fix failing
> dbl_mov_immediate_1.c test on big-endian
> 
> Hi All,
> 
> The big-endian tests were failing because it failed to take into account that 
> in
> order to generate mov/movk pairs for doubles the bit order are different
> from le.
> 
> I have updated the tests with conditional results for both endianness.
> 
> Committed as r250770.
> 
> Regtested on aach64-none-linux-gnu and aarch64_be-none-linux-gnu and no
> issues.
> 
> Thanks,
> Tamar
> 
> 
> gcc/testsuite
> 2017-08-01  Tamar Christina  
> 
>   * gcc.target/aarch64/dbl_mov_immediate_1.c:
>   Use conditional assembler scans.
> 
> --

Re: [PATCH][GCC][AArch64] optimize float immediate moves (2 /4) - HF/DF/SF mode.

[Bin.Cheng]

On Tue, Aug 1, 2017 at 12:51 PM, Tamar Christina
 wrote:
>>
>> Given review comment already pointed out big-endian issue and patch was
>> updated to address it, I would expect reg-test on a big-endian target before
>> applying patch, right?
>
> The patch spent 6 months in external review.
> Given that, I simply forgot to rerun big endian before the commit as I did 
> the rest.
>
> The failing tests were all added after the submission of this patch. I'll 
> have a look.
I may bisect to wrong commit?  The patch is committed three days ago,
how could all failing tests be added after it?

Thanks,
bin

Re: [PATCH] Fix segfault in gcov.c (PR gcov-profile/81561).

[Martin Liška]

On 07/27/2017 01:48 PM, Richard Biener wrote:

On Thu, Jul 27, 2017 at 12:12 PM, Martin Liška  wrote:

Hello.

As reported in mentioned PR, we segfault in gcov tool when one uses -a. It's 
caused by fact
that vectors blocks and block_lists have indices kept in sync and as one 
removes an element
from blocks via:
blocked.erase (it);

Then calling recursively the same function breaks the synchronization. The 
patch was originally
written by Joshua (adding him to CC). If I'm correct calling:

-unblock (u, blocked, block_lists);

does not make sense as we've already removed 'u'. Plus one needs to put content 
of block_lists[index]
to a separate vector in order to not to break iteration.

Patch can bootstrap on ppc64le-redhat-linux and survives regression tests.
And fixed the problem reported in opensuse bugzilla (mentioned in the GCC 
bugzilla PR).

Ready to be installed?


Looks good to me but please wait for Joshua to confirm.


Hello.

No reply yet, I've just verified that in the article the function (unblock) 
does the same as with the patch:
https://pdfs.semanticscholar.org/72c3/b54c1aea0a3193bad9721727a1798101ab26.pdf 
(page 3).

I would be happy to have the patch in 7.2.
Can we Richi catch the deadline?

Thanks,
Martin



Did you manage to extract a testcase?

Thanks,
Richard.


Martin


gcc/ChangeLog:

2017-07-26  Martin Liska  

 PR gcov-profile/81561
 * gcov.c (unblock): Make unblocking safe as we need to preserve
 index correspondence of blocks and block_lists.
---
  gcc/gcov.c | 10 +++---
  1 file changed, 7 insertions(+), 3 deletions(-)

RE: [PATCH][GCC][AArch64] optimize float immediate moves (2 /4) - HF/DF/SF mode.

[Tamar Christina]

> 
> Given review comment already pointed out big-endian issue and patch was
> updated to address it, I would expect reg-test on a big-endian target before
> applying patch, right?

The patch spent 6 months in external review.
Given that, I simply forgot to rerun big endian before the commit as I did the 
rest.

The failing tests were all added after the submission of this patch. I'll have 
a look.

> Thanks,
> bin
> >
> > OK for trunk?
> >
> > Thanks,
> > Tamar
> >
> >
> > gcc/
> > 2017-06-26  Tamar Christina  
> > Richard Sandiford 
> >
> > * config/aarch64/aarch64.md (mov): Generalize.
> > (*movhf_aarch64, *movsf_aarch64, *movdf_aarch64):
> > Add integer and movi cases.
> > (movi-split-hf-df-sf split, fp16): New.
> > (enabled): Added TARGET_FP_F16INST.
> > * config/aarch64/iterators.md (GPF_HF): New.
> > 
> > From: Tamar Christina
> > Sent: Wednesday, June 21, 2017 11:48:33 AM
> > To: James Greenhalgh
> > Cc: GCC Patches; nd; Marcus Shawcroft; Richard Earnshaw
> > Subject: RE: [PATCH][GCC][AArch64] optimize float immediate moves (2 /4)
> - HF/DF/SF mode.
> >
> >> > movi\\t%0.4h, #0
> >> > -   mov\\t%0.h[0], %w1
> >> > +   fmov\\t%s0, %w1
> >>
> >> Should this not be %h0?
> >
> > The problem is that H registers are only available in ARMv8.2+, I'm
> > not sure what to do about ARMv8.1 given your other feedback Pointing
> > out that the bit patterns between how it's stored in s vs h registers
> > differ.
> >
> >>
> >> > umov\\t%w0, %1.h[0]
> >> > mov\\t%0.h[0], %1.h[0]
> >> > +   fmov\\t%s0, %1
> >>
> >> Likewise, and much more important for correctness as it changes the
> >> way the bit pattern ends up in the register (see table C2-1 in
> >> release B.a of the ARM Architecture Reference Manual for ARMv8-A),
> here.
> >>
> >> > +   * return aarch64_output_scalar_simd_mov_immediate
> (operands[1],
> >> > + SImode);
> >> > ldr\\t%h0, %1
> >> > str\\t%h1, %0
> >> > ldrh\\t%w0, %1
> >> > strh\\t%w1, %0
> >> > mov\\t%w0, %w1"
> >> > -  [(set_attr "type"
> >> "neon_move,neon_from_gp,neon_to_gp,neon_move,\
> >> > - f_loads,f_stores,load1,store1,mov_reg")
> >> > -   (set_attr "simd" "yes,yes,yes,yes,*,*,*,*,*")]
> >> > +  "&& can_create_pseudo_p ()
> >> > +   && !aarch64_can_const_movi_rtx_p (operands[1], HFmode)
> >> > +   && !aarch64_float_const_representable_p (operands[1])
> >> > +   &&  aarch64_float_const_rtx_p (operands[1])"
> >> > +  [(const_int 0)]
> >> > +  "{
> >> > +unsigned HOST_WIDE_INT ival;
> >> > +if (!aarch64_reinterpret_float_as_int (operands[1], ))
> >> > +  FAIL;
> >> > +
> >> > +rtx tmp = gen_reg_rtx (SImode);
> >> > +aarch64_expand_mov_immediate (tmp, GEN_INT (ival));
> >> > +tmp = simplify_gen_subreg (HImode, tmp, SImode, 0);
> >> > +emit_move_insn (operands[0], gen_lowpart (HFmode, tmp));
> >> > +DONE;
> >> > +  }"
> >> > +  [(set_attr "type"
> "neon_move,f_mcr,neon_to_gp,neon_move,fconsts,
> >> \
> >> > +neon_move,f_loads,f_stores,load1,store1,mov_reg")
> >> > +   (set_attr "simd" "yes,*,yes,yes,*,yes,*,*,*,*,*")]
> >> >  )
> >>
> >> Thanks,
> >> James
> >

Re: PATCH for Re: mirrors

[Gerald Pfeifer]

On Sat, 15 Apr 2017, Gerald Pfeifer wrote:
> On Sat, 8 Apr 2017, Ionut Vatavu wrote:
>> I would like to announce a new mirror in Germany Gunzenhausen:
>> 
>> http://www.bothelp.net/mirrors/gcc - updated daily by rsync
> This is now part of our mirrors list per the patch below.

And here is an update, per Ionut, that I applied.

Gerald

Index: mirrors.html
===
RCS file: /cvs/gcc/wwwdocs/htdocs/mirrors.html,v
retrieving revision 1.244
diff -u -r1.244 mirrors.html
--- mirrors.html16 Jul 2017 05:39:01 -  1.244
+++ mirrors.html1 Aug 2017 11:49:37 -
@@ -28,7 +28,7 @@
   thanks to Tim Semeijn (noc@babylon.network) at Babylon Network.
 France, Versailles: ftp://ftp.uvsq.fr/pub/gcc/;>ftp.uvsq.fr, 
thanks to ftpmaint at uvsq.fr
 Germany, Berlin: ftp://ftp.fu-berlin.de/unix/languages/gcc/;>ftp.fu-berlin.de, thanks 
to ftp at fu-berlin.de
-Germany, Gunzenhausen: http://www.bothelp.net/mirrors/gcc/;>www.bothelp.net, thanks to Ionut 
Vatavu (iva...@googlemail.com).
+Germany, Gunzenhausen: http://babyname.tips/mirrors/gcc/;>babyname.tips, thanks to Ionut 
Vatavu (iva...@googlemail.com).
 Germany: ftp://ftp.gwdg.de/pub/misc/gcc/;>ftp.gwdg.de, thanks 
to emoenke at gwdg.de
 Germany: ftp://ftp.mpi-sb.mpg.de/pub/gnu/mirror/gcc.gnu.org/pub/gcc/;>ftp.mpi-sb.mpg.de,
 thanks to ftpadmin at mpi-sb.mpg.de
 Germany: http://gcc.cybermirror.org;>http://gcc.cybermirror.org, thanks to 
Sascha Schwarz (cm at cybermirror.org)

Re: [PATCH][GCC][AArch64] optimize float immediate moves (2 /4) - HF/DF/SF mode.

[Bin.Cheng]

On Mon, Jun 26, 2017 at 11:50 AM, Tamar Christina
 wrote:
> Hi all,
>
> Here's the re-spun patch.
> Aside from the grouping of the split patterns it now also uses h register for 
> the fmov for HF when available,
> otherwise it forces a literal load.
>
> Regression tested on aarch64-none-linux-gnu and no regressions.
Hi,
There are lots of test failures on aarch64_be-none-elf, I verified two:
gcc.dg/vect/pr61680.c execution test
gcc.dg/vect/pr63148.c execution test

are caused by svn+ssh://gcc.gnu.org/svn/gcc/trunk@250673

Given review comment already pointed out big-endian issue and patch
was updated to address it, I would expect reg-test on a big-endian
target before applying patch, right?

Thanks,
bin
>
> OK for trunk?
>
> Thanks,
> Tamar
>
>
> gcc/
> 2017-06-26  Tamar Christina  
> Richard Sandiford 
>
> * config/aarch64/aarch64.md (mov): Generalize.
> (*movhf_aarch64, *movsf_aarch64, *movdf_aarch64):
> Add integer and movi cases.
> (movi-split-hf-df-sf split, fp16): New.
> (enabled): Added TARGET_FP_F16INST.
> * config/aarch64/iterators.md (GPF_HF): New.
> 
> From: Tamar Christina
> Sent: Wednesday, June 21, 2017 11:48:33 AM
> To: James Greenhalgh
> Cc: GCC Patches; nd; Marcus Shawcroft; Richard Earnshaw
> Subject: RE: [PATCH][GCC][AArch64] optimize float immediate moves (2 /4) - 
> HF/DF/SF mode.
>
>> > movi\\t%0.4h, #0
>> > -   mov\\t%0.h[0], %w1
>> > +   fmov\\t%s0, %w1
>>
>> Should this not be %h0?
>
> The problem is that H registers are only available in ARMv8.2+,
> I'm not sure what to do about ARMv8.1 given your other feedback
> Pointing out that the bit patterns between how it's stored in s vs h registers
> differ.
>
>>
>> > umov\\t%w0, %1.h[0]
>> > mov\\t%0.h[0], %1.h[0]
>> > +   fmov\\t%s0, %1
>>
>> Likewise, and much more important for correctness as it changes the way the
>> bit pattern ends up in the register (see table C2-1 in release B.a of the ARM
>> Architecture Reference Manual for ARMv8-A), here.
>>
>> > +   * return aarch64_output_scalar_simd_mov_immediate (operands[1],
>> > + SImode);
>> > ldr\\t%h0, %1
>> > str\\t%h1, %0
>> > ldrh\\t%w0, %1
>> > strh\\t%w1, %0
>> > mov\\t%w0, %w1"
>> > -  [(set_attr "type"
>> "neon_move,neon_from_gp,neon_to_gp,neon_move,\
>> > - f_loads,f_stores,load1,store1,mov_reg")
>> > -   (set_attr "simd" "yes,yes,yes,yes,*,*,*,*,*")]
>> > +  "&& can_create_pseudo_p ()
>> > +   && !aarch64_can_const_movi_rtx_p (operands[1], HFmode)
>> > +   && !aarch64_float_const_representable_p (operands[1])
>> > +   &&  aarch64_float_const_rtx_p (operands[1])"
>> > +  [(const_int 0)]
>> > +  "{
>> > +unsigned HOST_WIDE_INT ival;
>> > +if (!aarch64_reinterpret_float_as_int (operands[1], ))
>> > +  FAIL;
>> > +
>> > +rtx tmp = gen_reg_rtx (SImode);
>> > +aarch64_expand_mov_immediate (tmp, GEN_INT (ival));
>> > +tmp = simplify_gen_subreg (HImode, tmp, SImode, 0);
>> > +emit_move_insn (operands[0], gen_lowpart (HFmode, tmp));
>> > +DONE;
>> > +  }"
>> > +  [(set_attr "type" "neon_move,f_mcr,neon_to_gp,neon_move,fconsts,
>> \
>> > +neon_move,f_loads,f_stores,load1,store1,mov_reg")
>> > +   (set_attr "simd" "yes,*,yes,yes,*,yes,*,*,*,*,*")]
>> >  )
>>
>> Thanks,
>> James
>

[GCC][AArch64][PATCH][Committed] Fix failing dbl_mov_immediate_1.c test on big-endian

[Tamar Christina]

Hi All,

The big-endian tests were failing because it failed to take into account that
in order to generate mov/movk pairs for doubles the bit order are different from
le.

I have updated the tests with conditional results for both endianness.

Committed as r250770.

Regtested on aach64-none-linux-gnu and aarch64_be-none-linux-gnu and no issues.

Thanks,
Tamar


gcc/testsuite
2017-08-01  Tamar Christina  

* gcc.target/aarch64/dbl_mov_immediate_1.c:
Use conditional assembler scans.

-- 
diff --git a/gcc/testsuite/gcc.target/aarch64/dbl_mov_immediate_1.c b/gcc/testsuite/gcc.target/aarch64/dbl_mov_immediate_1.c
index e8dd01db056100f91ae6b933453622e62c23f411..cfe8c9e993e974822fd8a5fbbad4563cf5e9c30a 100644
--- a/gcc/testsuite/gcc.target/aarch64/dbl_mov_immediate_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/dbl_mov_immediate_1.c
@@ -46,8 +46,11 @@ double d4(void)
 
 /* { dg-final { scan-assembler-times "fmov\td\[0-9\]+, 1\\\.5e\\\+0"1 } } */
 
-/* { dg-final { scan-assembler-times "mov\tx\[0-9\]+, 25838523252736"   1 } } */
-/* { dg-final { scan-assembler-times "movk\tx\[0-9\]+, 0x40fe, lsl 48"  1 } } */
-/* { dg-final { scan-assembler-times "mov\tx\[0-9\]+, -9223372036854775808" 1 } } */
+/* { dg-final { scan-assembler-times "mov\tx\[0-9\]+, 25838523252736"   1 { target aarch64-*-* } } } */
+/* { dg-final { scan-assembler-times "movk\tx\[0-9\]+, 0x40fe, lsl 48"  1 { target aarch64-*-* } } } */
+/* { dg-final { scan-assembler-times "mov\tx\[0-9\]+, -9223372036854775808" 1 { target aarch64-*-* } } } */
+/* { dg-final { scan-assembler-times "mov\tx\[0-9\]+, 6016" 1 { target aarch64_be-*-* } } } */
+/* { dg-final { scan-assembler-times "movk\tx\[0-9\]+, 0x40fe, lsl 16"  1 { target aarch64_be-*-* } } } */
+/* { dg-final { scan-assembler-times "mov\tx\[0-9\]+, 2147483648"   1 { target aarch64_be-*-* } } } */
 /* { dg-final { scan-assembler-times "fmov\td\[0-9\]+, x\[0-9\]+"   2 } } */
 

[PATCH] Fix PR81633

[Richard Biener]

I am testing the following pair of patches (first for trunk, 2nd for GCC 7 
branch) to fix PR81633.  On trunk recent refactoring made the PR71752
change obsolete, on the branch the patch installs the simpler originally
suggested patch which works within the constraints vect_get_slp_defs
is used on the branch.

Bootstrapped and tested on x86_64-unknown-linux-gnu (trunk version still
in testing).

Richard.

2017-08-01  Richard Biener  

PR tree-optimization/81633
Revert
2015-08-17  Alan Hayward  

PR tree-optimization/71752
* tree-vect-slp.c (vect_get_slp_defs): Handle null operands.

* gcc.dg/vect/pr81633.c: New testcase.

Index: gcc/tree-vect-slp.c
===
--- gcc/tree-vect-slp.c (revision 250725)
+++ gcc/tree-vect-slp.c (working copy)
@@ -3325,32 +3325,24 @@ vect_get_slp_defs (vec ops, slp_tr
 {
   gimple *first_stmt;
   int number_of_vects = 0, i;
+  unsigned int child_index = 0;
   HOST_WIDE_INT lhs_size_unit, rhs_size_unit;
   slp_tree child = NULL;
   vec vec_defs;
   tree oprnd;
-  bool first_iteration = true;
+  bool vectorized_defs;
 
   first_stmt = SLP_TREE_SCALAR_STMTS (slp_node)[0];
   FOR_EACH_VEC_ELT (ops, i, oprnd)
 {
-  bool vectorized_defs = false;
-
-  if (oprnd == NULL)
-   {
- vec_defs = vNULL;
- vec_defs.create (0);
- vec_oprnds->quick_push (vec_defs);
- continue;
-   }
-
   /* For each operand we check if it has vectorized definitions in a child
 node or we need to create them (for invariants and constants).  We
 check if the LHS of the first stmt of the next child matches OPRND.
 If it does, we found the correct child.  Otherwise, we call
-vect_get_constant_vectors ().  */
-  for (unsigned int child_index = 0;
-  child_index < SLP_TREE_CHILDREN (slp_node).length (); child_index++)
+vect_get_constant_vectors (), and not advance CHILD_INDEX in order
+to check this child node for the next operand.  */
+  vectorized_defs = false;
+  if (SLP_TREE_CHILDREN (slp_node).length () > child_index)
 {
   child = SLP_TREE_CHILDREN (slp_node)[child_index];
 
@@ -3375,25 +3367,30 @@ vect_get_slp_defs (vec ops, slp_tr
 statements.  */
  number_of_vects = SLP_TREE_NUMBER_OF_VEC_STMTS (child);
  vectorized_defs = true;
- break;
+ child_index++;
}
}
+ else
+   child_index++;
 }
 
-  if (!vectorized_defs && first_iteration)
-   {
- number_of_vects = SLP_TREE_NUMBER_OF_VEC_STMTS (slp_node);
- /* Number of vector stmts was calculated according to LHS in
-vect_schedule_slp_instance (), fix it by replacing LHS with
-RHS, if necessary.  See vect_get_smallest_scalar_type () for
-details.  */
- vect_get_smallest_scalar_type (first_stmt, _size_unit,
-_size_unit);
- if (rhs_size_unit != lhs_size_unit)
-   {
- number_of_vects *= rhs_size_unit;
- number_of_vects /= lhs_size_unit;
-   }
+  if (!vectorized_defs)
+{
+  if (i == 0)
+{
+  number_of_vects = SLP_TREE_NUMBER_OF_VEC_STMTS (slp_node);
+  /* Number of vector stmts was calculated according to LHS in
+ vect_schedule_slp_instance (), fix it by replacing LHS with
+ RHS, if necessary.  See vect_get_smallest_scalar_type () for
+ details.  */
+  vect_get_smallest_scalar_type (first_stmt, _size_unit,
+ _size_unit);
+  if (rhs_size_unit != lhs_size_unit)
+{
+  number_of_vects *= rhs_size_unit;
+  number_of_vects /= lhs_size_unit;
+}
+}
 }
 
   /* Allocate memory for vectorized defs.  */
@@ -3411,8 +3408,6 @@ vect_get_slp_defs (vec ops, slp_tr
   number_of_vects);
 
   vec_oprnds->quick_push (vec_defs);
-
-  first_iteration = false;
 }
 }
 
Index: gcc/testsuite/gcc.dg/vect/pr81633.c
===
--- gcc/testsuite/gcc.dg/vect/pr81633.c (nonexistent)
+++ gcc/testsuite/gcc.dg/vect/pr81633.c (working copy)
@@ -0,0 +1,33 @@
+/* { dg-do run } */
+
+static double identity[4][4] = {{1, 0, 0, 0},
+{0, 1, 0, 0},
+{0, 0, 1, 0},
+{0, 0, 0, 1}};
+static double expected[4][4] = {{1, 0, 0, 0},
+{0, 0, 0, 0},
+{0, 0, 0, 0},
+{0, 0, 0, 0}};
+
+static void 

[PATCH, i386]: Fix PR81641, assemble failure with named address spaces and -masm=intel

[Uros Bizjak]

Using -O -masm=intel following testcase (gcc.target/i386/addr-space-2.c):

--cut here--
int test(void)
{
  int __seg_fs *f = (int __seg_fs *)16;
  int __seg_gs *g = (int __seg_gs *)16;
  return *f + *g;
}
--cut here--

compiles to:

mov eax, DWORD PTR gs:ds:16
add eax, DWORD PTR fs:ds:16
ret

Fortunately (?) gas doesn't error out on this assembly and generates
correct object file:

 :
   0:   65 8b 04 25 10 00 00mov%gs:0x10,%eax
   7:   00
   8:   64 03 04 25 10 00 00add%fs:0x10,%eax
   f:   00
  10:   c3  retq

The gas issue is reported at [1].

PR target/81641
* config/i386/i386.c (ix86_print_operand_address_as): For -masm=intel
print "ds:" only for immediates in generic address space.

testsuite/ChangeLog:

2017-08-01  Uros Bizjak  

PR target/81641
* gcc.target/i386/pr81641.c: New test.

Bootstrapped and regression tested on x86_64-linux-gnu {,-m32}.

Patch will be backported to other relevant release branches.

[1] https://sourceware.org/bugzilla/show_bug.cgi?id=21874

Uros.
Index: config/i386/i386.c
===
--- config/i386/i386.c  (revision 250768)
+++ config/i386/i386.c  (working copy)
@@ -19446,7 +19446,7 @@ ix86_print_operand_address_as (FILE *file, rtx add
   /* Displacement only requires special attention.  */
   if (CONST_INT_P (disp))
{
- if (ASSEMBLER_DIALECT == ASM_INTEL && parts.seg == ADDR_SPACE_GENERIC)
+ if (ASSEMBLER_DIALECT == ASM_INTEL && ADDR_SPACE_GENERIC_P (as))
fputs ("ds:", file);
  fprintf (file, HOST_WIDE_INT_PRINT_DEC, INTVAL (disp));
}
Index: testsuite/gcc.target/i386/pr81641.c
===
--- testsuite/gcc.target/i386/pr81641.c (nonexistent)
+++ testsuite/gcc.target/i386/pr81641.c (working copy)
@@ -0,0 +1,11 @@
+/* PR target/81641 */
+/* { dg-do assemble } */
+/* { dg-options "-O -masm=intel" } */
+/* { dg-require-effective-target masm_intel } */
+
+int test(void)
+{
+  int __seg_fs *f = (int __seg_fs *)16;
+  int __seg_gs *g = (int __seg_gs *)16;
+  return *f + *g;
+}

RE: [PATCH][GCC][AArch64] optimize float immediate moves (1 /4) - infrastructure.

[Tamar Christina]

Hi Bin,

> Hi,
> I saw below failure after svn+ssh://gcc.gnu.org/svn/gcc/trunk@250672
> 
> FAIL: gcc.target/aarch64/advsimd-intrinsics/vcvt_high_1.c   -O1
> (internal compiler error)

This should be fixed by r 250766

Cheers,
Tamar

> 
> Regression in patch updates?
> 
> Thanks,
> bin
> >
> > OK for trunk?
> >
> > Thanks,
> > Tamar
> >
> >
> > gcc/
> > 2017-06-07  Tamar Christina  
> >
> > * config/aarch64/aarch64.c
> > (aarch64_simd_container_mode): Add prototype.
> > (aarch64_expand_mov_immediate): Add HI support.
> > (aarch64_reinterpret_float_as_int, aarch64_float_const_rtx_p: New.
> > (aarch64_can_const_movi_rtx_p): New.
> > (aarch64_preferred_reload_class):
> > Remove restrictions of using FP registers for certain SIMD 
> > operations.
> > (aarch64_rtx_costs): Added new cost for CONST_DOUBLE moves.
> > (aarch64_valid_floating_const): Add integer move validation.
> > (aarch64_simd_imm_scalar_p): Remove.
> > (aarch64_output_scalar_simd_mov_immediate): Generalize function.
> > (aarch64_legitimate_constant_p): Expand list of supported cases.
> > * config/aarch64/aarch64-protos.h
> > (aarch64_float_const_rtx_p, aarch64_can_const_movi_rtx_p): New.
> > (aarch64_reinterpret_float_as_int): New.
> > (aarch64_simd_imm_scalar_p): Remove.
> > * config/aarch64/predicates.md (aarch64_reg_or_fp_float): New.
> > * config/aarch64/constraints.md (Uvi): New.
> > (Dd): Split into Ds and new Dd.
> > * config/aarch64/aarch64.md (*movsi_aarch64):
> > Add SIMD mov case.
> > (*movdi_aarch64): Add SIMD mov case.

Re: [PATCH][GCC][AArch64] optimize float immediate moves (1 /4) - infrastructure.

[Bin.Cheng]

On Wed, Jun 7, 2017 at 12:38 PM, Tamar Christina
 wrote:
> Hi All,
>
>
> This patch lays the ground work to fix the immediate moves for floats
> to use a combination of mov, movi, fmov instead of ldr and adrp to load
> float constants that fit within the 16-bit limit of movz.
>
> The idea behind it is that these are used quite often in masks etc and we can
> get a gain by doing integer moves instead of memory loads.
>
> This patch also adds the patterns for SImode and DImode to use SIMD mov
> instructions when it's able to.
>
> It's particularly handy when masks are used such as the
> 0x8000 mask in copysignf.
>
> This now generates
>
> moviv2.2s, 0x80, lsl 24
>
> instead of a literal load.
>
>
> Regression tested on aarch64-none-linux-gnu and no regressions.
Hi,
I saw below failure after svn+ssh://gcc.gnu.org/svn/gcc/trunk@250672

FAIL: gcc.target/aarch64/advsimd-intrinsics/vcvt_high_1.c   -O1
(internal compiler error)

Regression in patch updates?

Thanks,
bin
>
> OK for trunk?
>
> Thanks,
> Tamar
>
>
> gcc/
> 2017-06-07  Tamar Christina  
>
> * config/aarch64/aarch64.c
> (aarch64_simd_container_mode): Add prototype.
> (aarch64_expand_mov_immediate): Add HI support.
> (aarch64_reinterpret_float_as_int, aarch64_float_const_rtx_p: New.
> (aarch64_can_const_movi_rtx_p): New.
> (aarch64_preferred_reload_class):
> Remove restrictions of using FP registers for certain SIMD operations.
> (aarch64_rtx_costs): Added new cost for CONST_DOUBLE moves.
> (aarch64_valid_floating_const): Add integer move validation.
> (aarch64_simd_imm_scalar_p): Remove.
> (aarch64_output_scalar_simd_mov_immediate): Generalize function.
> (aarch64_legitimate_constant_p): Expand list of supported cases.
> * config/aarch64/aarch64-protos.h
> (aarch64_float_const_rtx_p, aarch64_can_const_movi_rtx_p): New.
> (aarch64_reinterpret_float_as_int): New.
> (aarch64_simd_imm_scalar_p): Remove.
> * config/aarch64/predicates.md (aarch64_reg_or_fp_float): New.
> * config/aarch64/constraints.md (Uvi): New.
> (Dd): Split into Ds and new Dd.
> * config/aarch64/aarch64.md (*movsi_aarch64):
> Add SIMD mov case.
> (*movdi_aarch64): Add SIMD mov case.

[PATCH, i386]: Fix PR81639, ICE in rtl_verify_bb_insns with a naked function

[Uros Bizjak]

Hello!

Naked functions should not sibcall, since in naked functions epilogue
point (placed just above sibcal insn) is unreachable and marked with a
trap insn.

2017-08-01  Uros Bizjak  

PR target/81639
* config/i386/i386.c (ix86_funciton_naked): New prototype.
(ix86_function_ok_for_sibcall): Return false for naked functions.

testsuite/ChangeLog:

2017-08-01  Uros Bizjak  

PR target/81639
* gcc.target/i386/pr81639.c: New test.

Bootstrapped and regression tested on x86_64-linux-gnu {,-m32}.

Committed to mainline.

Uros.
Index: config/i386/i386.c
===
--- config/i386/i386.c  (revision 250758)
+++ config/i386/i386.c  (working copy)
@@ -94,6 +94,7 @@ static rtx legitimize_pe_coff_extern_decl (rtx, bo
 static rtx legitimize_pe_coff_symbol (rtx, bool);
 static void ix86_print_operand_address_as (FILE *, rtx, addr_space_t, bool);
 static bool ix86_save_reg (unsigned int, bool, bool);
+static bool ix86_function_naked (const_tree);
 
 #ifndef CHECK_STACK_LIMIT
 #define CHECK_STACK_LIMIT (-1)
@@ -7929,6 +7930,9 @@ ix86_function_ok_for_sibcall (tree decl, tree exp)
   rtx a, b;
   bool bind_global = decl && !targetm.binds_local_p (decl);
 
+  if (ix86_function_naked (current_function_decl))
+return false;
+
   /* Sibling call isn't OK if there are no caller-saved registers
  since all registers must be preserved before return.  */
   if (cfun->machine->no_caller_saved_registers)
Index: testsuite/gcc.target/i386/pr81639.c
===
--- testsuite/gcc.target/i386/pr81639.c (nonexistent)
+++ testsuite/gcc.target/i386/pr81639.c (working copy)
@@ -0,0 +1,12 @@
+/* PR target/81639 */
+/* { dg-do compile } */
+/* { dg-options "-O2" } */
+
+void b (void);
+
+void
+__attribute__ ((naked))
+a (void)
+{
+  b ();
+}

Re: RFA: Backport fix for PR80769

[Richard Biener]

On Thu, Jul 27, 2017 at 11:36 PM, Richard Sandiford
 wrote:
> This is a minimal-ish backport of the fix for PR80769.  The trunk version
> also replaced open-coded instances of get_next_strinfo with calls to the
> new function.  It also added asserts in various other places to try to
> ensure that related strinfos were consistently delayed or not delayed.
>
> Tested on aarch64-linux-gnu and x86_64-linux-gnu.  OK for gcc-7-branch?
> (And OK for gcc-6-branch if the same patch passes testing there?)

Ok.

Thanks,
Richard.

> Richard
>
>
> 2017-07-27  Richard Sandiford  
>
> gcc/
> PR tree-optimization/80769
> * tree-ssa-strlen.c (strinfo): Document that "stmt" is also used
> for malloc and calloc.  Document the new invariant that all related
> strinfos have delayed lengths or none do.
> (get_next_strinfo): New function.
> (verify_related_strinfos): Move earlier in file.
> (set_endptr_and_length): New function, split out from...
> (get_string_length): ...here.  Also set the lengths of related
> strinfos.
>
> gcc/testsuite/
> PR tree-optimization/80769
> * gcc.dg/strlenopt-31.c: New test.
> * gcc.dg/strlenopt-31g.c: Likewise.
>
> Index: gcc/tree-ssa-strlen.c
> ===
> --- gcc/tree-ssa-strlen.c   2017-05-10 18:04:24.514775477 +0100
> +++ gcc/tree-ssa-strlen.c   2017-07-27 18:21:20.308966958 +0100
> @@ -61,7 +61,13 @@ struct strinfo
>tree length;
>/* Any of the corresponding pointers for querying alias oracle.  */
>tree ptr;
> -  /* Statement for delayed length computation.  */
> +  /* This is used for two things:
> +
> + - To record the statement that should be used for delayed length
> +   computations.  We maintain the invariant that all related strinfos
> +   have delayed lengths or none do.
> +
> + - To record the malloc or calloc call that produced this result.  */
>gimple *stmt;
>/* Pointer to '\0' if known, if NULL, it can be computed as
>   ptr + length.  */
> @@ -156,6 +162,19 @@ get_strinfo (int idx)
>return (*stridx_to_strinfo)[idx];
>  }
>
> +/* Get the next strinfo in the chain after SI, or null if none.  */
> +
> +static inline strinfo *
> +get_next_strinfo (strinfo *si)
> +{
> +  if (si->next == 0)
> +return NULL;
> +  strinfo *nextsi = get_strinfo (si->next);
> +  if (nextsi == NULL || nextsi->first != si->first || nextsi->prev != 
> si->idx)
> +return NULL;
> +  return nextsi;
> +}
> +
>  /* Helper function for get_stridx.  */
>
>  static int
> @@ -438,6 +457,45 @@ set_strinfo (int idx, strinfo *si)
>(*stridx_to_strinfo)[idx] = si;
>  }
>
> +/* Return the first strinfo in the related strinfo chain
> +   if all strinfos in between belong to the chain, otherwise NULL.  */
> +
> +static strinfo *
> +verify_related_strinfos (strinfo *origsi)
> +{
> +  strinfo *si = origsi, *psi;
> +
> +  if (origsi->first == 0)
> +return NULL;
> +  for (; si->prev; si = psi)
> +{
> +  if (si->first != origsi->first)
> +   return NULL;
> +  psi = get_strinfo (si->prev);
> +  if (psi == NULL)
> +   return NULL;
> +  if (psi->next != si->idx)
> +   return NULL;
> +}
> +  if (si->idx != si->first)
> +return NULL;
> +  return si;
> +}
> +
> +/* Set SI's endptr to ENDPTR and compute its length based on SI->ptr.
> +   Use LOC for folding.  */
> +
> +static void
> +set_endptr_and_length (location_t loc, strinfo *si, tree endptr)
> +{
> +  si->endptr = endptr;
> +  si->stmt = NULL;
> +  tree start_as_size = fold_convert_loc (loc, size_type_node, si->ptr);
> +  tree end_as_size = fold_convert_loc (loc, size_type_node, endptr);
> +  si->length = fold_build2_loc (loc, MINUS_EXPR, size_type_node,
> +   end_as_size, start_as_size);
> +}
> +
>  /* Return string length, or NULL if it can't be computed.  */
>
>  static tree
> @@ -533,12 +591,12 @@ get_string_length (strinfo *si)
> case BUILT_IN_STPCPY_CHK_CHKP:
>   gcc_assert (lhs != NULL_TREE);
>   loc = gimple_location (stmt);
> - si->endptr = lhs;
> - si->stmt = NULL;
> - lhs = fold_convert_loc (loc, size_type_node, lhs);
> - si->length = fold_convert_loc (loc, size_type_node, si->ptr);
> - si->length = fold_build2_loc (loc, MINUS_EXPR, size_type_node,
> -   lhs, si->length);
> + set_endptr_and_length (loc, si, lhs);
> + for (strinfo *chainsi = verify_related_strinfos (si);
> +  chainsi != NULL;
> +  chainsi = get_next_strinfo (chainsi))
> +   if (chainsi->length == NULL)
> + set_endptr_and_length (loc, chainsi, lhs);
>   break;
> case BUILT_IN_MALLOC:
>   break;
> @@ -607,32 +665,6 @@ unshare_strinfo (strinfo *si)
>return nsi;
>  }
>
> -/* Return 

Re: [Patch (preapproved)] Guard Copy Header pass on flag_tree_loop_vectorize

[Richard Biener]

On Tue, Aug 1, 2017 at 12:08 PM, James Greenhalgh
 wrote:
>
> On Thu, Jul 27, 2017 at 03:21:01PM +0100, James Greenhalgh wrote:
>> On Thu, Jul 27, 2017 at 02:26:03PM +0200, Richard Biener wrote:
>> > On Thu, Jul 27, 2017 at 2:08 PM, Jakub Jelinek  wrote:
>> > > On Thu, Jul 27, 2017 at 01:54:21PM +0200, Richard Biener wrote:
>> > >> --- gcc/common.opt  (revision 250619)
>> > >> +++ gcc/common.opt  (working copy)
>> > >>  ftree-vectorize
>> > >> -Common Report Var(flag_tree_vectorize) Optimization
>> > >> +Common Report Optimization
>> > >>  Enable vectorization on trees.
>> > >>
>> > >>  ftree-vectorizer-verbose=
>> > >>
>> > >> which shows a few other uses of flag_tree_vectorize:
>> > >>
>> > >> int
>> > >> omp_max_vf (void)
>> > >> {
>> > >>   if (!optimize
>> > >>   || optimize_debug
>> > >>   || !flag_tree_loop_optimize
>> > >>   || (!flag_tree_loop_vectorize
>> > >>   && (global_options_set.x_flag_tree_loop_vectorize
>> > >>   || global_options_set.x_flag_tree_vectorize)))
>> > >> return 1;
>> > >>
>> > >> not sure what that was supposed to test.  Jakub?  Similar
>> > >> use in expand_omp_simd.
>> > >
>> > > The intent is/was to check if the vectorizer pass will be invoked,
>> > > otherwise it makes no sense to generate the arrays.
>> > > So, for -O0/-Og or -fno-tree-loop-optimize, we know that the pass
>> > > isn't even in the pipeline.
>> > > And otherwise the intent was that we try to optimize, unless
>> > > user asked explicitly -fno-tree-loop-vectorize or -fno-tree-vectorize
>> > > not to optimize.  Because the vect pass is enabled if:
>> > > flag_tree_loop_vectorize || fun->has_force_vectorize_loops
>> > > but returning non-zero from omp_max_vf and the other omp spot means
>> > > there will be cfun->has_force_vectorize_loops.
>> >
>> > I see.  So it would be good to try if adding EnabledBy(ftree-vectorize) to
>> > ftree-loop-vectorize/ftree-slp-vectorize would add those to 
>> > global_options_set
>> > iff -ftree-vectorize is enabled (the opts.c hunk setting the flags is then
>> > redundant as well I guess).
>>
>> This looks like it works.
>>
>> I'll prepare the patch and put it through a full bootstrap cycle.
>
> That patch looks like this, and was bootstrapped and tested on
> aarch64-none-linux-gnu with no issues. I've also checked that -ftree-vectorize
> causes -ftree-loop-vectorize and -ftree-slp-vectorize to appear in the verbose
> asm dump as enabled, and that -fprofile-use still correctly turns on
> both of the options. Finally I've checked that -fprofile-use
> -fno-tree-vectorize correctly results in neither of the options being
> enabled.
>
> OK?

Ok.

Thanks,
Richard.

>
> Thanks,
> James
>
> ---
> 2017-07-28  James Greenhalgh  
>
> * common.opt (ftree-vectorize): No longer set flag_tree_vectorize.
> (ftree-loop-vectorize): Set as EnabledBy ftree-vectorize.
> (ftree-slp-vectorize): Likewise.
> * omp-expand (expand_omp_simd): Remove flag_tree_vectorize, as it
> can no longer be set independent of flag_tree_loop_vectorize.
> * omp-general.c (emp_max_vf): Likewise.
> * opts.c (enable_fdo_optimizations): Remove references to
> flag_tree_vectorize, these are now implicit.
> (common_handle_option): Remove handling for OPT_ftree_vectorize,
> and leave it for the options machinery.
>

Re: [PATCH v12] add -fpatchable-function-entry=N,M option

[Andreas Schwab]

On Aug 01 2017, Gerald Pfeifer  wrote:

> On Mon, 31 Jul 2017, Maxim Kuvyrkov wrote:
>> I don't see an easy way to correctly differentiate between "attribute" 
>> nops and "bundle" nops, so XFAILing these tests on ia64 seems like a 
>> valid approach.
>
> Make sense, given that the use of Itanium has gone done drastically.

You can get the same failure with any target, for example if there are
delay slots to be filled.

Andreas.

-- 
Andreas Schwab, SUSE Labs, sch...@suse.de
GPG Key fingerprint = 0196 BAD8 1CE9 1970 F4BE  1748 E4D4 88E3 0EEA B9D7
"And now for something completely different."

Re: [PATCH] PRE TLC, improve fake exit edge placement

[Richard Biener]

On Tue, 1 Aug 2017, Richard Biener wrote:

> 
> When working on PR81181 I ran into some things I wanted to clean up
> several times.  First a few PRE cleanups done for the fix.  Second,
> the fake exit edges we add for infinite loops happen to start from
> loop headers rather than latches which is somewhat confusing and
> making PRE dataflow order more confusing than it already is.  The
> patch makes it originate from the source of the closing edge instead
> of from the destination.
> 
> Bootstrapped on x86_64-unknown-linux-gnu, testing in progress.

Applied with three testsuite adjustments which show we do better
DCE now (due to more sensible post-dominators, "sensible" as in
what you'd expect).

The uninit case matches what we do for

int foo (int i)
{
  int j;
  while (i)
;
  return j;
}

we warn that 'j' _is_ being used uninitialized rather than maybe.

I couldn't reconstruct a sensible testcase for the split-path testcase
where the 2nd function is now optimized into an empty endless loop.

2017-08-01  Richard Biener  

* tree-ssa-pre.c (print_pre_expr): Handle NULL expr.
(compute_antic): Seed worklist with exit block predecessors.
* cfganal.c (dfs_find_deadend): For a cycle return the source
of the edge closing it.

* gcc.dg/tree-ssa/ssa-dce-3.c: Adjust.
* gcc.dg/tree-ssa/split-path-5.c: Remove case with just dead
endless loop.
* gcc.dg/uninit-23.c: Adjust.

Index: gcc/tree-ssa-pre.c
===
--- gcc/tree-ssa-pre.c  (revision 250725)
+++ gcc/tree-ssa-pre.c  (working copy)
@@ -837,7 +840,7 @@ bitmap_set_and (bitmap_set_t dest, bitma
 }
 }
 
-/* Subtract all values and expressions contained in ORIG from DEST.  */
+/* Subtract all expressions contained in ORIG from DEST.  */
 
 static bitmap_set_t
 bitmap_set_subtract (bitmap_set_t dest, bitmap_set_t orig)
@@ -859,7 +862,7 @@ bitmap_set_subtract (bitmap_set_t dest,
   return result;
 }
 
-/* Subtract all the values in bitmap set B from bitmap set A.  */
+/* Subtract all values in bitmap set B from bitmap set A.  */
 
 static void
 bitmap_set_subtract_values (bitmap_set_t a, bitmap_set_t b)
@@ -987,6 +990,11 @@ bitmap_value_insert_into_set (bitmap_set
 static void
 print_pre_expr (FILE *outfile, const pre_expr expr)
 {
+  if (! expr)
+{
+  fprintf (outfile, "NULL");
+  return;
+}
   switch (expr->kind)
 {
 case CONSTANT:
@@ -2418,7 +2473,9 @@ compute_antic (void)
   inverted_post_order_compute ();
 
   auto_sbitmap worklist (last_basic_block_for_fn (cfun) + 1);
-  bitmap_ones (worklist);
+  bitmap_clear (worklist);
+  FOR_EACH_EDGE (e, ei, EXIT_BLOCK_PTR_FOR_FN (cfun)->preds)
+bitmap_set_bit (worklist, e->src->index);
   while (changed)
 {
   if (dump_file && (dump_flags & TDF_DETAILS))
Index: gcc/cfganal.c
===
--- gcc/cfganal.c   (revision 250725)
+++ gcc/cfganal.c   (working copy)
@@ -737,23 +737,24 @@ post_order_compute (int *post_order, boo
 basic_block
 dfs_find_deadend (basic_block bb)
 {
-  bitmap visited = BITMAP_ALLOC (NULL);
+  auto_bitmap visited;
+  basic_block next = bb;
 
   for (;;)
 {
-  if (EDGE_COUNT (bb->succs) == 0
- || ! bitmap_set_bit (visited, bb->index))
-{
-  BITMAP_FREE (visited);
-  return bb;
-}
+  if (EDGE_COUNT (next->succs) == 0)
+   return next;
 
+  if (! bitmap_set_bit (visited, next->index))
+   return bb;
+
+  bb = next;
   /* If we are in an analyzed cycle make sure to try exiting it.
  Note this is a heuristic only and expected to work when loop
 fixup is needed as well.  */
   if (! bb->loop_father
  || ! loop_outer (bb->loop_father))
-   bb = EDGE_SUCC (bb, 0)->dest;
+   next = EDGE_SUCC (bb, 0)->dest;
   else
{
  edge_iterator ei;
@@ -761,7 +762,7 @@ dfs_find_deadend (basic_block bb)
  FOR_EACH_EDGE (e, ei, bb->succs)
if (loop_exit_edge_p (bb->loop_father, e))
  break;
- bb = e ? e->dest : EDGE_SUCC (bb, 0)->dest;
+ next = e ? e->dest : EDGE_SUCC (bb, 0)->dest;
}
 }
 
Index: gcc/testsuite/gcc.dg/tree-ssa/ssa-dce-3.c
===
--- gcc/testsuite/gcc.dg/tree-ssa/ssa-dce-3.c   (revision 250725)
+++ gcc/testsuite/gcc.dg/tree-ssa/ssa-dce-3.c   (working copy)
@@ -26,9 +26,6 @@ int main(void)
by marking the j % 7 condition as useful.  See PR45178.  */
 
 /* We should eliminate the inner condition, but the loop must be preserved
-   as it is infinite.  Therefore there should be just one phi node (for i):  */
-/* { dg-final { scan-tree-dump-times "PHI " 1 "cddce1" { xfail *-*-* } } } */
-
-/* And one if (for the exit condition of the loop):  */
-/* { dg-final { scan-tree-dump-times "if " 1 "cddce1" } } */
-
+   as it is 

Re: [PATCH v12] add -fpatchable-function-entry=N,M option

[Gerald Pfeifer]

On Mon, 31 Jul 2017, Maxim Kuvyrkov wrote:
> I don't see an easy way to correctly differentiate between "attribute" 
> nops and "bundle" nops, so XFAILing these tests on ia64 seems like a 
> valid approach.

Make sense, given that the use of Itanium has gone done drastically.

Gerald

Re: [PATCH] Fix when -lssp is added by driver (PR middle-end/81400).

[Martin Liška]

On 07/31/2017 09:21 AM, Martin Liška wrote:

On 07/26/2017 07:45 PM, Jeff Law wrote:

On 07/12/2017 07:38 AM, Martin Liška wrote:

Hi.

Following patch adds -lspp when one uses -mstack-protector-guard=global.

Patch can bootstrap on ppc64le-redhat-linux and survives regression tests.

Ready to be installed?

Martin

gcc/ChangeLog:

2017-07-12  Martin Liska  

 PR middle-end/81400
 * gcc.c: Add -lssp when one uses -mstack-protector-guard=global.

Isn't the -m option target specific?  And doesn't that imply this change
should somehow be done in the target's specs?


Hi.

I think it's the right place as it's needed for all targets that support that 
(x86 family and ppc family).
Both have -mstack-protector-guard option.

Martin



jeff





Ok, so as mentioned in https://gcc.gnu.org/bugzilla/show_bug.cgi?id=81400#c8
the suggested patch is not needed.

M.

Re: [PATCH][AArch64] Improve addressing of TI/TFmode

[Wilco Dijkstra]

ping


From: Wilco Dijkstra
Sent: 20 July 2017 13:49
To: GCC Patches; James Greenhalgh
Cc: nd
Subject: [PATCH][AArch64] Improve addressing of TI/TFmode
    
In  https://gcc.gnu.org/ml/gcc-patches/2017-06/msg01125.html Jiong
pointed out some addressing inefficiencies due to a recent change in
regcprop (https://gcc.gnu.org/ml/gcc-patches/2017-04/msg00775.html).

This patch improves aarch64_legitimize_address_displacement to split
unaligned offsets of TImode and TFmode accesses.  The resulting code
is better and no longer relies on the original regcprop optimization.

For the test we now produce:

    add x1, sp, 4
    stp xzr, xzr, [x1, 24]

rather than:

    mov x1, sp
    add x1, x1, 28
    stp xzr, xzr, [x1]

OK for commit?

ChangeLog:
2017-06-20  Wilco Dijkstra  

    * config/aarch64/aarch64.c (aarch64_legitimize_address_displacement):
    Improve unaligned TImode/TFmode base/offset split.

testsuite
    * gcc.target/aarch64/ldp_stp_unaligned_2.c: New file.

--
diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c
index 
90f248025a4fa928ebac657b689010f74dd100b5..208fdbe7262a93ee8caada2868a8d447de619c6e
 100644
--- a/gcc/config/aarch64/aarch64.c
+++ b/gcc/config/aarch64/aarch64.c
@@ -4705,15 +4705,17 @@ aarch64_legitimate_address_p (machine_mode mode, rtx x,
 /* Split an out-of-range address displacement into a base and offset.
    Use 4KB range for 1- and 2-byte accesses and a 16KB range otherwise
    to increase opportunities for sharing the base address of different sizes.
-   For unaligned accesses and TI/TF mode use the signed 9-bit range.  */
+   Unaligned accesses use the signed 9-bit range, TImode/TFmode use
+   the intersection of signed scaled 7-bit and signed 9-bit offset.  */
 static bool
 aarch64_legitimize_address_displacement (rtx *disp, rtx *off, machine_mode 
mode)
 {
   HOST_WIDE_INT offset = INTVAL (*disp);
   HOST_WIDE_INT base = offset & ~(GET_MODE_SIZE (mode) < 4 ? 0xfff : 0x3ffc);
 
-  if (mode == TImode || mode == TFmode
-  || (offset & (GET_MODE_SIZE (mode) - 1)) != 0)
+  if (mode == TImode || mode == TFmode)
+    base = (offset + 0x100) & ~0x1f8;
+  else if ((offset & (GET_MODE_SIZE (mode) - 1)) != 0)
 base = (offset + 0x100) & ~0x1ff;
 
   *off = GEN_INT (base);
diff --git a/gcc/testsuite/gcc.target/aarch64/ldp_stp_unaligned_2.c 
b/gcc/testsuite/gcc.target/aarch64/ldp_stp_unaligned_2.c
new file mode 100644
index 
..1e46755a39a0b97fa7af704086f82ffd5a216fb4
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/ldp_stp_unaligned_2.c
@@ -0,0 +1,18 @@
+/* { dg-options "-O2 -fomit-frame-pointer" } */
+
+/* Check that we split unaligned LDP/STP into base and aligned offset.  */
+
+typedef struct
+{
+  int a, b, c, d, e;
+} S;
+
+void foo (S *);
+
+void test (int x)
+{
+  S s = { .a = x };
+  foo ();
+}
+
+/* { dg-final { scan-assembler-not "mov\tx\[0-9\]+, sp" } } */

Re: [PATCH][AArch64] Improve aarch64_legitimate_constant_p

[Wilco Dijkstra]

    
ping
    
This patch further improves aarch64_legitimate_constant_p.  Allow all
integer, floating point and vector constants.  Allow label references
and non-anchor symbols with an immediate offset.  This allows such
constants to be rematerialized, resulting in smaller code and fewer stack
spills.

SPEC2006 codesize reduces by 0.08%, SPEC2017 by 0.13%.

Bootstrap OK, OK for commit?

ChangeLog:
2017-07-07  Wilco Dijkstra  

    * config/aarch64/aarch64.c (aarch64_legitimate_constant_p):
    Return true for more constants, symbols and label references.
    (aarch64_valid_floating_const): Remove unused function.

--
diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c
index 
a2eca64a9c13e44d223b5552c079ef4e09659e84..810c17416db01681e99a9eb8cc9f5af137ed2054
 100644
--- a/gcc/config/aarch64/aarch64.c
+++ b/gcc/config/aarch64/aarch64.c
@@ -10173,49 +10173,46 @@ aarch64_legitimate_pic_operand_p (rtx x)
   return true;
 }
 
-/* Return true if X holds either a quarter-precision or
- floating-point +0.0 constant.  */
-static bool
-aarch64_valid_floating_const (machine_mode mode, rtx x)
-{
-  if (!CONST_DOUBLE_P (x))
-    return false;
-
-  if (aarch64_float_const_zero_rtx_p (x))
-    return true;
-
-  /* We only handle moving 0.0 to a TFmode register.  */
-  if (!(mode == SFmode || mode == DFmode))
-    return false;
-
-  return aarch64_float_const_representable_p (x);
-}
+/* Implement TARGET_LEGITIMATE_CONSTANT_P hook.  Return true for constants
+   that should be rematerialized rather than spilled.  */
 
 static bool
 aarch64_legitimate_constant_p (machine_mode mode, rtx x)
 {
+  /* Support CSE and rematerialization of common constants.  */
+  if (CONST_INT_P (x) || CONST_DOUBLE_P (x) || GET_CODE (x) == CONST_VECTOR)
+    return true;
+
   /* Do not allow vector struct mode constants.  We could support
  0 and -1 easily, but they need support in aarch64-simd.md.  */
-  if (TARGET_SIMD && aarch64_vect_struct_mode_p (mode))
+  if (aarch64_vect_struct_mode_p (mode))
 return false;
 
-  /* This could probably go away because
- we now decompose CONST_INTs according to expand_mov_immediate.  */
-  if ((GET_CODE (x) == CONST_VECTOR
-   && aarch64_simd_valid_immediate (x, mode, false, NULL))
-  || CONST_INT_P (x) || aarch64_valid_floating_const (mode, x))
-   return !targetm.cannot_force_const_mem (mode, x);
+  /* Do not allow wide int constants - this requires support in movti.  */
+  if (CONST_WIDE_INT_P (x))
+    return false;
 
-  if (GET_CODE (x) == HIGH
-  && aarch64_valid_symref (XEXP (x, 0), GET_MODE (XEXP (x, 0
-    return true;
+  /* Do not allow const (plus (anchor_symbol, const_int)).  */
+  if (GET_CODE (x) == CONST && GET_CODE (XEXP (x, 0)) == PLUS)
+  {
+    x = XEXP (XEXP (x, 0), 0);
+    if (SYMBOL_REF_P (x) && SYMBOL_REF_ANCHOR_P (x))
+  return false;
+  }
+
+  if (GET_CODE (x) == HIGH)
+    x = XEXP (x, 0);
 
   /* Treat symbols as constants.  Avoid TLS symbols as they are complex,
  so spilling them is better than rematerialization.  */
   if (SYMBOL_REF_P (x) && !SYMBOL_REF_TLS_MODEL (x))
 return true;
 
-  return aarch64_constant_address_p (x);
+  /* Label references are always constant.  */
+  if (GET_CODE (x) == LABEL_REF)
+    return true;
+
+  return false;
 }
 
 rtx    

Re: [PATCH v3][AArch64] Fix symbol offset limit

[Wilco Dijkstra]

      

ping

From: Wilco Dijkstra
Sent: 17 January 2017 15:14
To: Richard Earnshaw; GCC Patches; James Greenhalgh
Cc: nd
Subject: Re: [PATCH v3][AArch64] Fix symbol offset limit
    
Here is v3 of the patch - tree_fits_uhwi_p was necessary to ensure the size of a
declaration is an integer. So the question is whether we should allow
largish offsets outside of the bounds of symbols (v1), no offsets (this 
version), or
small offsets (small negative and positive offsets just outside a symbol are 
common).
The only thing we can't allow is any offset like we currently do...

In aarch64_classify_symbol symbols are allowed full-range offsets on 
relocations.
This means the offset can use all of the +/-4GB offset, leaving no offset 
available
for the symbol itself.  This results in relocation overflow and link-time errors
for simple expressions like _char + 0xff00.

To avoid this, limit the offset to +/-1GB so that the symbol needs to be within 
a
3GB offset from its references.  For the tiny code model use a 64KB offset, 
allowing
most of the 1MB range for code/data between the symbol and its references.
For symbols with a defined size, limit the offset to be within the size of the 
symbol.


ChangeLog:
2017-01-17  Wilco Dijkstra  

    gcc/
    * config/aarch64/aarch64.c (aarch64_classify_symbol):
    Apply reasonable limit to symbol offsets.

    testsuite/
    * gcc.target/aarch64/symbol-range.c (foo): Set new limit.
    * gcc.target/aarch64/symbol-range-tiny.c (foo): Likewise.

--
diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c
index 
e8d65ead95a3c5730c2ffe64a9e057779819f7b4..f1d54e332dc1cf1ef0bc4b1e46b0ebebe1c4cea4
 100644
--- a/gcc/config/aarch64/aarch64.c
+++ b/gcc/config/aarch64/aarch64.c
@@ -9809,6 +9809,8 @@ aarch64_classify_symbol (rtx x, rtx offset)
   if (aarch64_tls_symbol_p (x))
 return aarch64_classify_tls_symbol (x);
 
+  const_tree decl = SYMBOL_REF_DECL (x);
+
   switch (aarch64_cmodel)
 {
 case AARCH64_CMODEL_TINY:
@@ -9817,25 +9819,45 @@ aarch64_classify_symbol (rtx x, rtx offset)
  we have no way of knowing the address of symbol at compile time
  so we can't accurately say if the distance between the PC and
  symbol + offset is outside the addressible range of +/-1M in the
-    TINY code model.  So we rely on images not being greater than
-    1M and cap the offset at 1M and anything beyond 1M will have to
-    be loaded using an alternative mechanism.  Furthermore if the
-    symbol is a weak reference to something that isn't known to
-    resolve to a symbol in this module, then force to memory.  */
+    TINY code model.  So we limit the maximum offset to +/-64KB and
+    assume the offset to the symbol is not larger than +/-(1M - 64KB).
+    Furthermore force to memory if the symbol is a weak reference to
+    something that doesn't resolve to a symbol in this module.  */
   if ((SYMBOL_REF_WEAK (x)
    && !aarch64_symbol_binds_local_p (x))
- || INTVAL (offset) < -1048575 || INTVAL (offset) > 1048575)
+ || !IN_RANGE (INTVAL (offset), -0x1, 0x1))
 return SYMBOL_FORCE_TO_MEM;
+
+ /* Limit offset to within the size of a declaration if available.  */
+ if (decl && DECL_P (decl))
+   {
+ const_tree decl_size = DECL_SIZE (decl);
+
+ if (tree_fits_uhwi_p (decl_size)
+ && !IN_RANGE (INTVAL (offset), 0, tree_to_uhwi (decl_size)))
+   return SYMBOL_FORCE_TO_MEM;
+   }
+
   return SYMBOL_TINY_ABSOLUTE;
 
 case AARCH64_CMODEL_SMALL:
   /* Same reasoning as the tiny code model, but the offset cap here is
-    4G.  */
+    1G, allowing +/-3G for the offset to the symbol.  */
   if ((SYMBOL_REF_WEAK (x)
    && !aarch64_symbol_binds_local_p (x))
- || !IN_RANGE (INTVAL (offset), HOST_WIDE_INT_C (-4294967263),
-   HOST_WIDE_INT_C (4294967264)))
+ || !IN_RANGE (INTVAL (offset), -0x4000, 0x4000))
 return SYMBOL_FORCE_TO_MEM;
+
+ /* Limit offset to within the size of a declaration if available.  */
+ if (decl && DECL_P (decl))
+   {
+ const_tree decl_size = DECL_SIZE (decl);
+
+ if (tree_fits_uhwi_p (decl_size)
+ && !IN_RANGE (INTVAL (offset), 0, tree_to_uhwi (decl_size)))
+   return SYMBOL_FORCE_TO_MEM;
+   }
+
   return SYMBOL_SMALL_ABSOLUTE;
 
 case AARCH64_CMODEL_TINY_PIC:
diff --git a/gcc/testsuite/gcc.target/aarch64/symbol-range-tiny.c 
b/gcc/testsuite/gcc.target/aarch64/symbol-range-tiny.c
index 
d7e46b059e41f2672b3a1da5506fa8944e752e01..d49ff4dbe5786ef6d343d2b90052c09676dd7fe5
 100644
--- 

Re: [RFC][PATCH][AArch64] Cleanup frame pointer usage

[Wilco Dijkstra]

       
ping
    
Wilco Dijkstra wrote:
> James Greenhalgh wrote:
>
> > I note this is still marked as an RFC, are you now proposing it as a
> > patch to be merged to trunk?
> 
> Absolutely. It was marked as an RFC to get some comments - I thought it
> may be controversial to separate the frame pointer and frame chain concept. 
> And this fixes the long standing bugs caused by changing the global frame
> pointer option to an incorrect value for the leaf function optimization.

Here is a rebased version that should patch without merge issues:

Cleanup frame pointer usage.  Introduce a boolean emit_frame_chain which
determines whether to store FP and LR and setup FP to point at this record.
When the frame pointer is enabled but not strictly required (eg. no use of
alloca), we emit a frame chain in non-leaf functions, but don't use the
frame pointer to access locals.  This results in smaller code and unwind info.

Simplify the logic in aarch64_override_options_after_change_1 () and compute
whether the frame chain is required in aarch64_layout_frame () instead.
As a result aarch64_frame_pointer_required is now redundant.

Convert all callee save/restore functions to use gen_frame_mem.

Bootstrap OK.

ChangeLog:
2017-06-15  Wilco Dijkstra  

    gcc/
    PR middle-end/60580
    * config/aarch64/aarch64.h (aarch64_frame):
 Add emit_frame_chain boolean.
    * config/aarch64/aarch64.c (aarch64_frame_pointer_required)
    Remove.
    (aarch64_layout_frame): Initialise emit_frame_chain.
    (aarch64_pushwb_single_reg): Use gen_frame_mem.
    (aarch64_pop_regs): Likewise.
    (aarch64_gen_load_pair): Likewise.
    (aarch64_save_callee_saves): Likewise.
    (aarch64_restore_callee_saves): Likewise.
    (aarch64_expand_prologue): Use emit_frame_chain.
    (aarch64_can_eliminate): Simplify. When FP needed or outgoing
    arguments are large, eliminate to FP, otherwise SP.
    (aarch64_override_options_after_change_1): Simplify.
    (TARGET_FRAME_POINTER_REQUIRED): Remove define.
--
diff --git a/gcc/config/aarch64/aarch64.h b/gcc/config/aarch64/aarch64.h
index 
08acdeb52d4083f50a4b44f43fb98009cdcc041f..722c39cfc4d57280d621fb6130e4d9f4d59d1e72
 100644
--- a/gcc/config/aarch64/aarch64.h
+++ b/gcc/config/aarch64/aarch64.h
@@ -591,6 +591,9 @@ struct GTY (()) aarch64_frame
   /* The size of the stack adjustment after saving callee-saves.  */
   HOST_WIDE_INT final_adjust;
 
+  /* Store FP,LR and setup a frame pointer.  */
+  bool emit_frame_chain;
+
   unsigned wb_candidate1;
   unsigned wb_candidate2;
 
diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c
index 
fd3005d8056e65cb32c92bbd5eb752c977c885a5..a97b4bbe9dc0f7bccc90a9337519038041241531
 100644
--- a/gcc/config/aarch64/aarch64.c
+++ b/gcc/config/aarch64/aarch64.c
@@ -2761,24 +2761,6 @@ aarch64_output_probe_stack_range (rtx reg1, rtx reg2)
   return "";
 }
 
-static bool
-aarch64_frame_pointer_required (void)
-{
-  /* In aarch64_override_options_after_change
- flag_omit_leaf_frame_pointer turns off the frame pointer by
- default.  Turn it back on now if we've not got a leaf
- function.  */
-  if (flag_omit_leaf_frame_pointer
-  && (!crtl->is_leaf || df_regs_ever_live_p (LR_REGNUM)))
-    return true;
-
-  /* Force a frame pointer for EH returns so the return address is at FP+8.  */
-  if (crtl->calls_eh_return)
-    return true;
-
-  return false;
-}
-
 /* Mark the registers that need to be saved by the callee and calculate
    the size of the callee-saved registers area and frame record (both FP
    and LR may be omitted).  */
@@ -2791,6 +2773,18 @@ aarch64_layout_frame (void)
   if (reload_completed && cfun->machine->frame.laid_out)
 return;
 
+  /* Force a frame chain for EH returns so the return address is at FP+8.  */
+  cfun->machine->frame.emit_frame_chain
+    = frame_pointer_needed || crtl->calls_eh_return;
+
+  /* Emit a frame chain if the frame pointer is enabled.
+ If -momit-leaf-frame-pointer is used, do not use a frame chain
+ in leaf functions which do not use LR.  */
+  if (flag_omit_frame_pointer == 2
+  && !(flag_omit_leaf_frame_pointer && crtl->is_leaf
+  && !df_regs_ever_live_p (LR_REGNUM)))
+    cfun->machine->frame.emit_frame_chain = true;
+
 #define SLOT_NOT_REQUIRED (-2)
 #define SLOT_REQUIRED (-1)
 
@@ -2825,7 +2819,7 @@ aarch64_layout_frame (void)
 last_fp_reg = regno;
   }
 
-  if (frame_pointer_needed)
+  if (cfun->machine->frame.emit_frame_chain)
 {
   /* FP and LR are placed in the linkage record.  */
   cfun->machine->frame.reg_offset[R29_REGNUM] = 0;
@@ -2997,7 +2991,7 @@ aarch64_pushwb_single_reg (machine_mode mode, unsigned 
regno,
   reg = gen_rtx_REG (mode, regno);
   mem = gen_rtx_PRE_MODIFY (Pmode, base_rtx,
 plus_constant (Pmode, base_rtx, -adjustment));
-  mem = gen_rtx_MEM (mode, mem);
+  mem = gen_frame_mem (mode, mem);
 
   

Re: [PATCH][AArch64] Simplify frame layout for stack probing

[Wilco Dijkstra]

ping


From: Wilco Dijkstra
Sent: 25 July 2017 14:58
To: GCC Patches; James Greenhalgh; Jeff Law
Cc: nd
Subject: [PATCH][AArch64] Simplify frame layout for stack probing
    
This patch makes some changes to the frame layout in order to simplify
stack probing.  We want to use the save of LR as a probe in any non-leaf
function.  With shrinkwrapping we may only save LR before a call, so it
is useful to define a fixed location in the callee-saves. So force LR at
the bottom of the callee-saves even with -fomit-frame-pointer.

Also remove a rarely used frame layout that saves the callee-saves first
with -fomit-frame-pointer.

OK for commit (and backport to GCC7)?

ChangeLog:
2017-07-25  Wilco Dijkstra  

    * config/aarch64/aarch64.c (aarch64_layout_frame):
    Ensure LR is always stored at the bottom of the callee-saves.
    Remove frame option which saves callee-saves at top of frame.

--
diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c
index 
b8a4160d9de8e689ccd26cb9f0ce046ee65e0ef4..3fc36ae28d18b9635480fd99f1fa7719267e66e4
 100644
--- a/gcc/config/aarch64/aarch64.c
+++ b/gcc/config/aarch64/aarch64.c
@@ -2875,7 +2875,8 @@ aarch64_frame_pointer_required (void)
 
 /* Mark the registers that need to be saved by the callee and calculate
    the size of the callee-saved registers area and frame record (both FP
-   and LR may be omitted).  */
+   and LR may be omitted).  If the function is not a leaf, ensure LR is
+   saved at the bottom of the callee-save area.  */
 static void
 aarch64_layout_frame (void)
 {
@@ -2926,7 +2927,14 @@ aarch64_layout_frame (void)
   cfun->machine->frame.wb_candidate1 = R29_REGNUM;
   cfun->machine->frame.reg_offset[R30_REGNUM] = UNITS_PER_WORD;
   cfun->machine->frame.wb_candidate2 = R30_REGNUM;
-  offset += 2 * UNITS_PER_WORD;
+  offset = 2 * UNITS_PER_WORD;
+    }
+  else if (!crtl->is_leaf)
+    {
+  /* Ensure LR is saved at the bottom of the callee-saves.  */
+  cfun->machine->frame.reg_offset[R30_REGNUM] = 0;
+  cfun->machine->frame.wb_candidate1 = R30_REGNUM;
+  offset = UNITS_PER_WORD;
 }
 
   /* Now assign stack slots for them.  */
@@ -3025,20 +3033,6 @@ aarch64_layout_frame (void)
   cfun->machine->frame.final_adjust
 = cfun->machine->frame.frame_size - cfun->machine->frame.callee_adjust;
 }
-  else if (!frame_pointer_needed
-  && varargs_and_saved_regs_size < max_push_offset)
-    {
-  /* Frame with large local area and outgoing arguments (this pushes the
-    callee-saves first, followed by the locals and outgoing area):
-    stp reg1, reg2, [sp, -varargs_and_saved_regs_size]!
-    stp reg3, reg4, [sp, 16]
-    sub sp, sp, frame_size - varargs_and_saved_regs_size  */
-  cfun->machine->frame.callee_adjust = varargs_and_saved_regs_size;
-  cfun->machine->frame.final_adjust
-   = cfun->machine->frame.frame_size - cfun->machine->frame.callee_adjust;
-  cfun->machine->frame.hard_fp_offset = cfun->machine->frame.callee_adjust;
-  cfun->machine->frame.locals_offset = cfun->machine->frame.hard_fp_offset;
-    }
   else
 {
   /* Frame with large local area and outgoing arguments using frame 
pointer:

Re: [PATCH][AArch64] Remove '*' from movsi/di/ti patterns

[Wilco Dijkstra]

ping


From: Wilco Dijkstra
Sent: 26 July 2017 14:46
To: GCC Patches; James Greenhalgh
Cc: nd
Subject: [PATCH][AArch64] Remove '*' from movsi/di/ti patterns
    
Remove the remaining uses of '*' from the movsi/di/ti patterns.
Using '*' in alternatives is typically incorrect at it tells the register
allocator to ignore those alternatives.  So remove these from all the
integer move patterns.  This removes unnecessary int to float moves, for
example gcc.target/aarch64/pr62178.c no longer generates a redundant fmov
since the w = m variant is now allowed.

Passes regress & bootstrap, OK for commit?

ChangeLog:
2017-07-26  Wilco Dijkstra  

    * gcc/config/aarch64/aarch64.md (movsi_aarch64): Remove all '*'.
    (movdi_aarch64): Likewise.
    (movti_aarch64): Likewise.
--

diff --git a/gcc/config/aarch64/aarch64.md b/gcc/config/aarch64/aarch64.md
index 
225b64e1daf1663d28bbe8c2d30ba373b4722176..97c5fb08a2fd5d2eee556e1fc20dbf65b089d84b
 100644
--- a/gcc/config/aarch64/aarch64.md
+++ b/gcc/config/aarch64/aarch64.md
@@ -920,8 +920,8 @@ (define_expand "mov"
 )
 
 (define_insn_and_split "*movsi_aarch64"
-  [(set (match_operand:SI 0 "nonimmediate_operand" "=r,k,r,r,r,r,*w,m,  m,r,r  
,*w,r,*w")
-   (match_operand:SI 1 "aarch64_mov_operand"  " r,r,k,M,n,m, 
m,rZ,*w,Usa,Ush,rZ,w,*w"))]
+  [(set (match_operand:SI 0 "nonimmediate_operand" "=r,k,r,r,r,r,w,m, m,  r,  
r, w,r,w")
+   (match_operand:SI 1 "aarch64_mov_operand"  " 
r,r,k,M,n,m,m,rZ,w,Usa,Ush,rZ,w,w"))]
   "(register_operand (operands[0], SImode)
 || aarch64_reg_or_zero (operands[1], SImode))"
   "@
@@ -952,8 +952,8 @@ (define_insn_and_split "*movsi_aarch64"
 )
 
 (define_insn_and_split "*movdi_aarch64"
-  [(set (match_operand:DI 0 "nonimmediate_operand" "=r,k,r,r,r,r,*w,m,  m,r,r, 
 *w,r,*w,w")
-   (match_operand:DI 1 "aarch64_mov_operand"  " r,r,k,N,n,m, 
m,rZ,*w,Usa,Ush,rZ,w,*w,Dd"))]
+  [(set (match_operand:DI 0 "nonimmediate_operand" "=r,k,r,r,r,r,w, m,m,  r,  
r, w,r,w,w")
+   (match_operand:DI 1 "aarch64_mov_operand"  " 
r,r,k,N,n,m,m,rZ,w,Usa,Ush,rZ,w,w,Dd"))]
   "(register_operand (operands[0], DImode)
 || aarch64_reg_or_zero (operands[1], DImode))"
   "@
@@ -1008,9 +1008,9 @@ (define_expand "movti"
 
 (define_insn "*movti_aarch64"
   [(set (match_operand:TI 0
-    "nonimmediate_operand"  "=r, *w,r ,*w,r,m,m,*w,m")
+    "nonimmediate_operand"  "=r, w,r,w,r,m,m,w,m")
 (match_operand:TI 1
-    "aarch64_movti_operand" " rn,r ,*w,*w,m,r,Z, m,*w"))]
+    "aarch64_movti_operand" " rn,r,w,w,m,r,Z,m,w"))]
   "(register_operand (operands[0], TImode)
 || aarch64_reg_or_zero (operands[1], TImode))"
   "@

[PATCH] PRE TLC, improve fake exit edge placement

[Richard Biener]

When working on PR81181 I ran into some things I wanted to clean up
several times.  First a few PRE cleanups done for the fix.  Second,
the fake exit edges we add for infinite loops happen to start from
loop headers rather than latches which is somewhat confusing and
making PRE dataflow order more confusing than it already is.  The
patch makes it originate from the source of the closing edge instead
of from the destination.

Bootstrapped on x86_64-unknown-linux-gnu, testing in progress.

Richard.

2017-08-01  Richard Biener  

* tree-ssa-pre.c (print_pre_expr): Handle NULL expr.
(compute_antic): Seed worklist with exit block predecessors.
* cfganal.c (dfs_find_deadend): For a cycle return the source
of the edge closing it.

Index: gcc/tree-ssa-pre.c
===
--- gcc/tree-ssa-pre.c  (revision 250725)
+++ gcc/tree-ssa-pre.c  (working copy)
@@ -837,7 +840,7 @@ bitmap_set_and (bitmap_set_t dest, bitma
 }
 }
 
-/* Subtract all values and expressions contained in ORIG from DEST.  */
+/* Subtract all expressions contained in ORIG from DEST.  */
 
 static bitmap_set_t
 bitmap_set_subtract (bitmap_set_t dest, bitmap_set_t orig)
@@ -859,7 +862,7 @@ bitmap_set_subtract (bitmap_set_t dest,
   return result;
 }
 
-/* Subtract all the values in bitmap set B from bitmap set A.  */
+/* Subtract all values in bitmap set B from bitmap set A.  */
 
 static void
 bitmap_set_subtract_values (bitmap_set_t a, bitmap_set_t b)
@@ -987,6 +990,11 @@ bitmap_value_insert_into_set (bitmap_set
 static void
 print_pre_expr (FILE *outfile, const pre_expr expr)
 {
+  if (! expr)
+{
+  fprintf (outfile, "NULL");
+  return;
+}
   switch (expr->kind)
 {
 case CONSTANT:
@@ -2418,7 +2473,9 @@ compute_antic (void)
   inverted_post_order_compute ();
 
   auto_sbitmap worklist (last_basic_block_for_fn (cfun) + 1);
-  bitmap_ones (worklist);
+  bitmap_clear (worklist);
+  FOR_EACH_EDGE (e, ei, EXIT_BLOCK_PTR_FOR_FN (cfun)->preds)
+bitmap_set_bit (worklist, e->src->index);
   while (changed)
 {
   if (dump_file && (dump_flags & TDF_DETAILS))
Index: gcc/cfganal.c
===
--- gcc/cfganal.c   (revision 250725)
+++ gcc/cfganal.c   (working copy)
@@ -737,23 +737,24 @@ post_order_compute (int *post_order, boo
 basic_block
 dfs_find_deadend (basic_block bb)
 {
-  bitmap visited = BITMAP_ALLOC (NULL);
+  auto_bitmap visited;
+  basic_block next = bb;
 
   for (;;)
 {
-  if (EDGE_COUNT (bb->succs) == 0
- || ! bitmap_set_bit (visited, bb->index))
-{
-  BITMAP_FREE (visited);
-  return bb;
-}
+  if (EDGE_COUNT (next->succs) == 0)
+   return next;
 
+  if (! bitmap_set_bit (visited, next->index))
+   return bb;
+
+  bb = next;
   /* If we are in an analyzed cycle make sure to try exiting it.
  Note this is a heuristic only and expected to work when loop
 fixup is needed as well.  */
   if (! bb->loop_father
  || ! loop_outer (bb->loop_father))
-   bb = EDGE_SUCC (bb, 0)->dest;
+   next = EDGE_SUCC (bb, 0)->dest;
   else
{
  edge_iterator ei;
@@ -761,7 +762,7 @@ dfs_find_deadend (basic_block bb)
  FOR_EACH_EDGE (e, ei, bb->succs)
if (loop_exit_edge_p (bb->loop_father, e))
  break;
- bb = e ? e->dest : EDGE_SUCC (bb, 0)->dest;
+ next = e ? e->dest : EDGE_SUCC (bb, 0)->dest;
}
 }
 

Re: [Patch (preapproved)] Guard Copy Header pass on flag_tree_loop_vectorize

[James Greenhalgh]

On Thu, Jul 27, 2017 at 03:21:01PM +0100, James Greenhalgh wrote:
> On Thu, Jul 27, 2017 at 02:26:03PM +0200, Richard Biener wrote:
> > On Thu, Jul 27, 2017 at 2:08 PM, Jakub Jelinek  wrote:
> > > On Thu, Jul 27, 2017 at 01:54:21PM +0200, Richard Biener wrote:
> > >> --- gcc/common.opt  (revision 250619)
> > >> +++ gcc/common.opt  (working copy)
> > >>  ftree-vectorize
> > >> -Common Report Var(flag_tree_vectorize) Optimization
> > >> +Common Report Optimization
> > >>  Enable vectorization on trees.
> > >>
> > >>  ftree-vectorizer-verbose=
> > >>
> > >> which shows a few other uses of flag_tree_vectorize:
> > >>
> > >> int
> > >> omp_max_vf (void)
> > >> {
> > >>   if (!optimize
> > >>   || optimize_debug
> > >>   || !flag_tree_loop_optimize
> > >>   || (!flag_tree_loop_vectorize
> > >>   && (global_options_set.x_flag_tree_loop_vectorize
> > >>   || global_options_set.x_flag_tree_vectorize)))
> > >> return 1;
> > >>
> > >> not sure what that was supposed to test.  Jakub?  Similar
> > >> use in expand_omp_simd.
> > >
> > > The intent is/was to check if the vectorizer pass will be invoked,
> > > otherwise it makes no sense to generate the arrays.
> > > So, for -O0/-Og or -fno-tree-loop-optimize, we know that the pass
> > > isn't even in the pipeline.
> > > And otherwise the intent was that we try to optimize, unless
> > > user asked explicitly -fno-tree-loop-vectorize or -fno-tree-vectorize
> > > not to optimize.  Because the vect pass is enabled if:
> > > flag_tree_loop_vectorize || fun->has_force_vectorize_loops
> > > but returning non-zero from omp_max_vf and the other omp spot means
> > > there will be cfun->has_force_vectorize_loops.
> >
> > I see.  So it would be good to try if adding EnabledBy(ftree-vectorize) to
> > ftree-loop-vectorize/ftree-slp-vectorize would add those to 
> > global_options_set
> > iff -ftree-vectorize is enabled (the opts.c hunk setting the flags is then
> > redundant as well I guess).
>
> This looks like it works.
>
> I'll prepare the patch and put it through a full bootstrap cycle.

That patch looks like this, and was bootstrapped and tested on
aarch64-none-linux-gnu with no issues. I've also checked that -ftree-vectorize
causes -ftree-loop-vectorize and -ftree-slp-vectorize to appear in the verbose
asm dump as enabled, and that -fprofile-use still correctly turns on
both of the options. Finally I've checked that -fprofile-use
-fno-tree-vectorize correctly results in neither of the options being
enabled.

OK?

Thanks,
James

---
2017-07-28  James Greenhalgh  

* common.opt (ftree-vectorize): No longer set flag_tree_vectorize.
(ftree-loop-vectorize): Set as EnabledBy ftree-vectorize.
(ftree-slp-vectorize): Likewise.
* omp-expand (expand_omp_simd): Remove flag_tree_vectorize, as it
can no longer be set independent of flag_tree_loop_vectorize.
* omp-general.c (emp_max_vf): Likewise.
* opts.c (enable_fdo_optimizations): Remove references to
flag_tree_vectorize, these are now implicit.
(common_handle_option): Remove handling for OPT_ftree_vectorize,
and leave it for the options machinery.

diff --git a/gcc/common.opt b/gcc/common.opt
index 78cfa56..1cb1c83 100644
--- a/gcc/common.opt
+++ b/gcc/common.opt
@@ -2691,8 +2691,9 @@ fvar-tracking-uninit
 Common Report Var(flag_var_tracking_uninit) PerFunction
 Perform variable tracking and also tag variables that are uninitialized.
 
+; Alias to enable both -ftree-loop-vectorize and -ftree-slp-vectorize.
 ftree-vectorize
-Common Report Var(flag_tree_vectorize) Optimization
+Common Report Optimization
 Enable vectorization on trees.
 
 ftree-vectorizer-verbose=
@@ -2700,11 +2701,11 @@ Common Joined RejectNegative Ignore
 Does nothing.  Preserved for backward compatibility.
 
 ftree-loop-vectorize
-Common Report Var(flag_tree_loop_vectorize) Optimization
+Common Report Var(flag_tree_loop_vectorize) Optimization EnabledBy(ftree-vectorize)
 Enable loop vectorization on trees.
 
 ftree-slp-vectorize
-Common Report Var(flag_tree_slp_vectorize) Optimization
+Common Report Var(flag_tree_slp_vectorize) Optimization EnabledBy(ftree-vectorize)
 Enable basic block vectorization (SLP) on trees.
 
 fvect-cost-model=
diff --git a/gcc/omp-expand.c b/gcc/omp-expand.c
index d6755cd..970e04f 100644
--- a/gcc/omp-expand.c
+++ b/gcc/omp-expand.c
@@ -4851,8 +4851,7 @@ expand_omp_simd (struct omp_region *region, struct omp_for_data *fd)
   /* If not -fno-tree-loop-vectorize, hint that we want to vectorize
 	 the loop.  */
   if ((flag_tree_loop_vectorize
-	   || (!global_options_set.x_flag_tree_loop_vectorize
-	   && !global_options_set.x_flag_tree_vectorize))
+	   || !global_options_set.x_flag_tree_loop_vectorize)
 	  && flag_tree_loop_optimize
 	  && loop->safelen > 1)
 	{
diff --git a/gcc/omp-general.c b/gcc/omp-general.c
index 9a5ed88..ed94668 100644
--- a/gcc/omp-general.c
+++ 

Re: [PATCH][GCC][AArch64] optimize float immediate moves (3 /4) - testsuite.

[Bin.Cheng]

On Mon, Jun 26, 2017 at 11:49 AM, Tamar Christina
 wrote:
> Hi,
>
> With the changes in the patches the testsuite had a minor update in the 
> assembler scan.
> I've posted the patch but will assume it's OK based on the previous OK for 
> trunk and
> the fact that this can fall in the obvious rule.
Hi,
With below commit:
commit b78acb5046f8b0e517f39edf17751b275d026b6c
Author: tnfchris 
Date:   Fri Jul 28 15:14:25 2017 +

2017-07-28  Tamar Christina  
Bilyan Borisov  

* gcc.target/aarch64/dbl_mov_immediate_1.c: New.
* gcc.target/aarch64/flt_mov_immediate_1.c: New.
* gcc.target/aarch64/f16_mov_immediate_1.c: New.
* gcc.target/aarch64/f16_mov_immediate_2.c: New.
* gcc.target/aarch64/pr63304_1.c: Changed to double.

I saw test failure on aarch64_be.
FAIL: gcc.target/aarch64/dbl_mov_immediate_1.c scan-assembler-times
mov\tx[0-9]+, 25838523252736 1
FAIL: gcc.target/aarch64/dbl_mov_immediate_1.c scan-assembler-times
movk\tx[0-9]+, 0x40fe, lsl 48 1
FAIL: gcc.target/aarch64/dbl_mov_immediate_1.c scan-assembler-times
mov\tx[0-9]+, -9223372036854775808 1

Thanks,
bin
>
> Thanks,
> Tamar
> 
> From: James Greenhalgh 
> Sent: Wednesday, June 14, 2017 10:11:19 AM
> To: Tamar Christina
> Cc: GCC Patches; nd; Richard Earnshaw; Marcus Shawcroft
> Subject: Re: [PATCH][GCC][AArch64] optimize float immediate moves (3 /4) - 
> testsuite.
>
> On Wed, Jun 07, 2017 at 12:38:41PM +0100, Tamar Christina wrote:
>> Hi All,
>>
>>
>> This patch adds new tests to cover the newly generated code from this patch 
>> series.
>>
>>
>> Regression tested on aarch64-none-linux-gnu and no regressions.
>>
>> OK for trunk?
>
> OK.
>
> Thanks,
> James
>
>>
>> gcc/testsuite/
>> 2017-06-07  Tamar Christina  
>>   Bilyan Borisov  
>>
>>   * gcc.target/aarch64/dbl_mov_immediate_1.c: New.
>>   * gcc.target/aarch64/flt_mov_immediate_1.c: New.
>>   * gcc.target/aarch64/f16_mov_immediate_1.c: New.
>>   * gcc.target/aarch64/f16_mov_immediate_2.c: New.
>
>

Re: [GCC][AArch64][PATHC] Only allow 0s unconditionally for floating point values.

[James Greenhalgh]

On Tue, Aug 01, 2017 at 08:35:06AM +0100, Tamar Christina wrote:
> Hi All,
> 
> Previously I allowed 0s unconditionally through aarch64_can_const_movi_rtx_p
> because we should always be able to use movi with 0 regardless of the mode.
> 
> However this was causing issues when a vector contained a 0 element and
> another value which was too complex for a movi. In theory this should have
> worked but it's failing an integrity check because of the type of the 0 
> element
> being a none floating type.
> 
> Moving the exception to only allow floating point 0s restores the previous
> behavior of the compiler.
> 
> Ok for trunk?

OK.

Thanks,
James

> 
> Bootstrapped and regtested on aach64-none-linux-gnu and no issues.
> 
> Thanks,
> Tamar
> 
> 
> gcc/
> 2017-08-01  Tamar Christina  
> 
>   * config/aarch64/aarch64.c
>   (aarch64_can_const_movi_rtx_p): Move 0 check.
> 
> -- 

Re: [PATCH GCC]Make pointer overflow always undefined and remove the macro

[Bin.Cheng]

On Tue, Jul 25, 2017 at 8:26 AM, Richard Biener
 wrote:
> On Mon, Jul 24, 2017 at 10:43 AM, Bin Cheng  wrote:
>> Hi,
>> This is a followup patch to PR81388's fix.  According to Richi,
>> POINTER_TYPE_OVERFLOW_UNDEFINED was added in -fstrict-overflow
>> warning work.  Given:
>>   A) strict-overflow was removed;
>>   B) memory object can not wrap in address space;
>>   C) existing code doesn't take it in consideration, as in nowrap_type_p.
>> This patch makes it always true thus removes definition/usage of the macro.
>> Bootstrap and test on x86_64 and AArch64.  Is it OK?
>
> Ok.
>
> Please give others 24h to comment.
Hi,
I committed the patch as:

r250765 | amker | 2017-08-01 10:28:18 +0100 (Tue, 01 Aug 2017) | 9 lines

* tree.h (POINTER_TYPE_OVERFLOW_UNDEFINED): Delete.
* fold-const.c (fold_comparison, fold_binary_loc): Delete use of
above macro.
* match.pd: Ditto in address comparison pattern.

gcc/testsuite
* gcc.dg/no-strict-overflow-7.c: Revise comment and test string.
* gcc.dg/tree-ssa/pr81388-1.c: Ditto.

We can always revert it if there is any different opinions.

Thanks,
bin

Re: [PING #2] [PATCH] enhance -Wrestrict to handle string built-ins (PR 78918)

[Richard Biener]

On Tue, Aug 1, 2017 at 11:23 AM, Richard Biener
 wrote:
> On Tue, Aug 1, 2017 at 4:27 AM, Martin Sebor  wrote:
>> Richard,
>>
>> in discussing this work Jeff mentioned that your comments on
>> the tree-ssa-alias.c parts would be helpful.  When you have
>> a chance could you please give it a once over and let me know
>> if you have any suggestions or concerns?  There are no visible
>> changes to existing clients of the pass, just extensions that
>> are relied on only by the new diagnostics.
>>
>>   https://gcc.gnu.org/ml/gcc-patches/2017-07/msg01264.html
>>
>> I expect to revisit the sprintf %s patch mentioned below and
>> see how to simplify it by taking advantage of the changes
>> implemented here.
>
> Your ptr_deref_alias_decl_p returns true when must_alias is true
> but there is no must-alias relationship.
>
> The ao_ref_init_from_ptr_and_size doesn't belong there.
>
> I dislike all of the changes related to returning an alias "size".
>
> Please keep away from the alias machinery.
>
> Warning during folding is similarly bad design.  Please don't add
> more such things.
>
> Thanks for putting this on my radar though.
> Richard.

Oh, for a constructive comment this all feels like sth for either
sanitizers or a proper static analysis tool.  As I outlined repeatedly
I belive GCC could host a static analysis tool but it surely should
not be interwinded into it's optimization passes or tools.

Richard.

>
>> Thanks
>> Martin
>>
>>
>> On 07/24/2017 09:13 PM, Martin Sebor wrote:
>>>
>>> Ping:
>>>
>>>   https://gcc.gnu.org/ml/gcc-patches/2017-07/msg01264.html
>>>
>>> This change is related to
>>>
>>>   [PATCH] enhance -Wrestrict for sprintf %s arguments
>>>   https://gcc.gnu.org/ml/gcc-patches/2017-07/msg01176.html
>>>
>>> On 07/20/2017 02:45 PM, Martin Sebor wrote:

 With more testing (building GDB, Glibc, Busybox, and the Linux
 kernel) I found a few bugs and weaknesses in the initial patch.
 Attached is version 2 that fixes the uncovered problems and makes
 further enhancements to handle more cases.

 Martin

 On 07/16/2017 05:47 PM, Martin Sebor wrote:
>
> Being implemented in the front end, the -Wrestrict warning
> detects only trivial instances of violations.  The attached
> patch extends the implementation to the middle-end where
> data flow and alias analysis can be combined to detect even
> complex cases of overlap.  This work is independent of but
> follows on the patch below (waiting for review):
>
>   https://gcc.gnu.org/ml/gcc-patches/2017-07/msg00036.html
>
> The changes rely on extending the tree-ssa-{alias,structalias}
> machinery in a simple way to answer the "must-alias" kind of
> question in addition to the current "may-alias."
>
> The rest of the changes are in gimple-fold.c, tree-ssa-strlen.c,
> and builtins.c.
>
> Even though this change makes -Wrestrict a lot more useful, it's
> not a complete implementation.  Not all built-ins are handled yet
> (e.g., strncat), and support for user-defined functions is still
> subject to the limitations of the front end implementation.  To
> complete the support, handlers for the missing string built-ins
> will need to be added to tree-ssa-strlen.c, and the remaining
> bits should be moved from the front end to somewhere in
> the middle-end (e.g., calls.c).
>
> Martin


>>>
>>

Re: [PATCH 0/13] D: Submission of D Front End

[Iain Buclaw]

On 13 July 2017 at 10:46, Iain Buclaw  wrote:
> On 24 June 2017 at 19:23, Iain Buclaw  wrote:
>> Hi,
>>
>> Just doing an update of the patch series, rebased against trunk, and
>> applied changes as requested by every comment so far.
>>
>> Notes on changes have been made on each patch where applicable.
>>
>
> Hi,
>
> So what would be the best way forward with this?
>
> In the meantime, I've set-up a buildbot to build and run the testsuite
> on 7 different targets, and will add another 5 when I get round to
> moving to a server with more disk space.
>
> Iain.


Ping on this. :-)