[PATCH 2/2] Improve error message for excess elements in array initializer from {"a"}

[apinski--- via Gcc-patches]

From: Andrew Pinski 

So char arrays are not the only type that be initialized from {"a"}.
We can have wchar_t (L"") and char16_t (u"") types too. So let's
print out the type of the array instead of just saying char.

Note in the testsuite I used regex . to match '[' and ']' as
I could not figure out how many '\' I needed.

OK? Bootstrapped and tested on x86_64-linux-gnu with no regressions.

gcc/c/ChangeLog:

* c-typeck.cc (process_init_element): Print out array type
for excessive elements.

gcc/testsuite/ChangeLog:

* gcc.dg/init-bad-1.c: Update error message.
* gcc.dg/init-bad-2.c: Likewise.
* gcc.dg/init-bad-3.c: Likewise.
* gcc.dg/init-excess-3.c: Likewise.
* gcc.dg/pr61096-1.c: Likewise.
---
 gcc/c/c-typeck.cc|  2 +-
 gcc/testsuite/gcc.dg/init-bad-1.c|  2 +-
 gcc/testsuite/gcc.dg/init-bad-2.c|  2 +-
 gcc/testsuite/gcc.dg/init-bad-3.c|  2 +-
 gcc/testsuite/gcc.dg/init-excess-3.c | 12 ++--
 gcc/testsuite/gcc.dg/pr61096-1.c |  2 +-
 6 files changed, 11 insertions(+), 11 deletions(-)

diff --git a/gcc/c/c-typeck.cc b/gcc/c/c-typeck.cc
index 0fc382c..f1a1752 100644
--- a/gcc/c/c-typeck.cc
+++ b/gcc/c/c-typeck.cc
@@ -10631,7 +10631,7 @@ process_init_element (location_t loc, struct c_expr 
value, bool implicit,
 {
   if (constructor_stack->replacement_value.value)
{
- error_init (loc, "excess elements in % array initializer");
+ error_init (loc, "excess elements in %qT initializer", 
constructor_type);
  return;
}
   else if (string_flag)
diff --git a/gcc/testsuite/gcc.dg/init-bad-1.c 
b/gcc/testsuite/gcc.dg/init-bad-1.c
index 0da10c3..7c80006 100644
--- a/gcc/testsuite/gcc.dg/init-bad-1.c
+++ b/gcc/testsuite/gcc.dg/init-bad-1.c
@@ -18,7 +18,7 @@ char s[1] = "x";
 char s1[1] = { "x" };
 char t[1] = "xy"; /* { dg-warning "initializer-string for array of 'char' is 
too long" } */
 char t1[1] = { "xy" }; /* { dg-warning "initializer-string for array of 'char' 
is too long" } */
-char u[1] = { "x", "x" }; /* { dg-error "excess elements in 'char' array 
initializer" } */
+char u[1] = { "x", "x" }; /* { dg-error "excess elements in 'char.1.' 
initializer" } */
 /* { dg-message "near init" "near" { target *-*-* } .-1 } */
 
 int i = { };
diff --git a/gcc/testsuite/gcc.dg/init-bad-2.c 
b/gcc/testsuite/gcc.dg/init-bad-2.c
index 4775c48..57fd9f9 100644
--- a/gcc/testsuite/gcc.dg/init-bad-2.c
+++ b/gcc/testsuite/gcc.dg/init-bad-2.c
@@ -19,7 +19,7 @@ char s[1] = "x";
 char s1[1] = { "x" };
 char t[1] = "xy"; /* { dg-warning "initializer-string for array of 'char' is 
too long" } */
 char t1[1] = { "xy" }; /* { dg-warning "initializer-string for array of 'char' 
is too long" } */
-char u[1] = { "x", "x" }; /* { dg-error "excess elements in 'char' array 
initializer" } */
+char u[1] = { "x", "x" }; /* { dg-error "excess elements in 'char.1.' 
initializer" } */
 /* { dg-message "near init" "near" { target *-*-* } .-1 } */
 
 int j = { 1 };
diff --git a/gcc/testsuite/gcc.dg/init-bad-3.c 
b/gcc/testsuite/gcc.dg/init-bad-3.c
index c5c338d..c22e8ec 100644
--- a/gcc/testsuite/gcc.dg/init-bad-3.c
+++ b/gcc/testsuite/gcc.dg/init-bad-3.c
@@ -19,7 +19,7 @@ char s[1] = "x";
 char s1[1] = { "x" };
 char t[1] = "xy"; /* { dg-error "initializer-string for array of 'char' is too 
long" } */
 char t1[1] = { "xy" }; /* { dg-error "initializer-string for array of 'char' 
is too long" } */
-char u[1] = { "x", "x" }; /* { dg-error "excess elements in 'char' array 
initializer" } */
+char u[1] = { "x", "x" }; /* { dg-error "excess elements in 'char.1.' 
initializer" } */
 /* { dg-message "near init" "near" { target *-*-* } .-1 } */
 
 int j = { 1 };
diff --git a/gcc/testsuite/gcc.dg/init-excess-3.c 
b/gcc/testsuite/gcc.dg/init-excess-3.c
index 7741261..c03a984 100644
--- a/gcc/testsuite/gcc.dg/init-excess-3.c
+++ b/gcc/testsuite/gcc.dg/init-excess-3.c
@@ -4,12 +4,12 @@
 /* { dg-options "" } */
 
 
-char s0[] = {"abc",1}; /* { dg-error "array initializer|near init" } */
-char s1[] = {"abc","a"}; /* { dg-error "array initializer|near init" } */
-char s2[] = {1,"abc"}; /* { dg-error "array initializer|near init|computable 
at load time" } */
+char s0[] = {"abc",1}; /* { dg-error "'char..' initializer|near init" } */
+char s1[] = {"abc","a"}; /* { dg-error "'char..' initializer|near init" } */
+char s2[] = {1,"abc"}; /* { dg-error "'char..' initializer|near 
init|computable at load time" } */
 /* { dg-warning "integer from pointer without a cast" "" { target *-*-* } .-1 
} */
 
-char s3[5] = {"abc",1}; /* { dg-error "array initializer|near init" } */
-char s4[5] = {"abc","a"}; /* { dg-error "array initializer|near init" } */
-char s5[5] = {1,"abc"}; /* { dg-error "array initializer|near init|computable 
at load time" } */
+char s3[5] = {"abc",1}; /* { dg-error "'char.5.' initializer|near init" } */
+char s4[5] = {"abc","a"}; /* { dg-error "'char.5.' initializer|near init" } */
+char s5[5] = 

[PATCH 1/2] Fix C/107926: Wrong error message when initializing char array

[apinski--- via Gcc-patches]

From: Andrew Pinski 

The problem here is the code which handles {"a"} is supposed
to handle the case where the is something after the string but
it only handles the case where there is another string so
we go down the other path and error out saying "excess elements
in struct initializer" even though this was a character array.
To fix this, we need to move the ckeck if the initializer is
a string after the check for array and initializer.

OK? Bootstrapped and tested on x86_64-linux-gnu with no regressions.

Thanks,
Adnrew Pinski

gcc/c/ChangeLog:

PR c/107926
* c-typeck.cc (process_init_element):
Move the ceck for string cst until
after the error message.

gcc/testsuite/ChangeLog:

PR c/107926
* gcc.dg/init-excess-3.c: New test.
---
 gcc/c/c-typeck.cc| 15 ++-
 gcc/testsuite/gcc.dg/init-excess-3.c | 15 +++
 2 files changed, 25 insertions(+), 5 deletions(-)
 create mode 100644 gcc/testsuite/gcc.dg/init-excess-3.c

diff --git a/gcc/c/c-typeck.cc b/gcc/c/c-typeck.cc
index e06f052..0fc382c 100644
--- a/gcc/c/c-typeck.cc
+++ b/gcc/c/c-typeck.cc
@@ -10623,17 +10623,22 @@ process_init_element (location_t loc, struct c_expr 
value, bool implicit,
 
   /* Handle superfluous braces around string cst as in
  char x[] = {"foo"}; */
-  if (string_flag
-  && constructor_type
+  if (constructor_type
   && !was_designated
   && TREE_CODE (constructor_type) == ARRAY_TYPE
   && INTEGRAL_TYPE_P (TREE_TYPE (constructor_type))
   && integer_zerop (constructor_unfilled_index))
 {
   if (constructor_stack->replacement_value.value)
-   error_init (loc, "excess elements in % array initializer");
-  constructor_stack->replacement_value = value;
-  return;
+   {
+ error_init (loc, "excess elements in % array initializer");
+ return;
+   }
+  else if (string_flag)
+   {
+ constructor_stack->replacement_value = value;
+ return;
+   }
 }
 
   if (constructor_stack->replacement_value.value != NULL_TREE)
diff --git a/gcc/testsuite/gcc.dg/init-excess-3.c 
b/gcc/testsuite/gcc.dg/init-excess-3.c
new file mode 100644
index 000..7741261
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/init-excess-3.c
@@ -0,0 +1,15 @@
+/* Test for various cases of excess initializers for char arrays,
+   bug 107926. */
+/* { dg-do compile } */
+/* { dg-options "" } */
+
+
+char s0[] = {"abc",1}; /* { dg-error "array initializer|near init" } */
+char s1[] = {"abc","a"}; /* { dg-error "array initializer|near init" } */
+char s2[] = {1,"abc"}; /* { dg-error "array initializer|near init|computable 
at load time" } */
+/* { dg-warning "integer from pointer without a cast" "" { target *-*-* } .-1 
} */
+
+char s3[5] = {"abc",1}; /* { dg-error "array initializer|near init" } */
+char s4[5] = {"abc","a"}; /* { dg-error "array initializer|near init" } */
+char s5[5] = {1,"abc"}; /* { dg-error "array initializer|near init|computable 
at load time" } */
+/* { dg-warning "integer from pointer without a cast" "" { target *-*-* } .-1 
} */
-- 
1.8.3.1

[COMMITTED] Fix comment for (A / (1 << B)) -> (A >> B).

[apinski--- via Gcc-patches]

From: Andrew Pinski 

There was a small typo where Also was done
twice. The second also should have been
handled. This fixes that.

Committed as obvious after a build.

gcc/ChangeLog:

* match.pd ((A / (1 << B)) -> (A >> B).):
Fix comment.
---
 gcc/match.pd | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/gcc/match.pd b/gcc/match.pd
index 67a0a682f31..f8610e37011 100644
--- a/gcc/match.pd
+++ b/gcc/match.pd
@@ -354,7 +354,7 @@ DEFINE_INT_AND_FLOAT_ROUND_FN (RINT)
Only for unsigned A.  For signed A, this would not preserve rounding
toward zero.
For example: (-1 / ( 1 << B)) !=  -1 >> B.
-   Also also widening conversions, like:
+   Also handle widening conversions, like:
(A / (unsigned long long) (1U << B)) -> (A >> B)
or
(A / (unsigned long long) (1 << B)) -> (A >> B).
-- 
2.17.1

[PATCH] tree-optimization/103356 Add missing (~a) == b folding for _Bool

[apinski--- via Gcc-patches]

From: Andrew Pinski 

The following makes sure to fold (~a) ==  b to a ^ b for truth
values.

OK? Bootstrapped and tested on x86_64-linux-gnu with no regressions.

Thanks,
Andrew Pinski

PR 103356

gcc/ChangeLog:

* match.pd: ((~a) == b -> a ^ b): New pattern.

gcc/testsuite/ChangeLog:

* gcc.dg/pr103356-1.c: New test.
---
 gcc/match.pd  | 7 +++
 gcc/testsuite/gcc.dg/pr103356-1.c | 9 +
 2 files changed, 16 insertions(+)
 create mode 100644 gcc/testsuite/gcc.dg/pr103356-1.c

diff --git a/gcc/match.pd b/gcc/match.pd
index a4d1386fd9f..67a0a682f31 100644
--- a/gcc/match.pd
+++ b/gcc/match.pd
@@ -1999,6 +1999,13 @@ DEFINE_INT_AND_FLOAT_ROUND_FN (RINT)
   && TYPE_PRECISION (TREE_TYPE (@0)) == 1)
   (convert (eq @0 @1
 
+/* (~a) == b is a ^ b for truth valued a and b.  */
+(simplify
+ (eq:c (bit_not:s truth_valued_p@0) truth_valued_p@1)
+ (if (INTEGRAL_TYPE_P (TREE_TYPE (@0))
+  && TYPE_PRECISION (TREE_TYPE (@0)) == 1)
+  (convert (bit_xor @0 @1
+
 /* (x & ~m) | (y & m) -> ((x ^ y) & m) ^ x */
 (simplify
  (bit_ior:c (bit_and:cs @0 (bit_not @2)) (bit_and:cs @1 @2))
diff --git a/gcc/testsuite/gcc.dg/pr103356-1.c 
b/gcc/testsuite/gcc.dg/pr103356-1.c
new file mode 100644
index 000..61d0b81da22
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/pr103356-1.c
@@ -0,0 +1,9 @@
+/* { dg-do compile } */
+/* { dg-options "-O -fdump-tree-forwprop1" } */
+
+_Bool foo (_Bool a, _Bool b)
+{
+  return a == (!b);
+}
+
+/* { dg-final { scan-tree-dump "\[ab\]_\[0-9\]+\\(D\\) \\\^ 
\[ba\]_\[0-9\]+\\(D\\)" "forwprop1" } } */
-- 
2.17.1

[PATCH] Fix PR 106560: Another ICE after conflicting types of redeclaration

[apinski--- via Gcc-patches]

From: Andrew Pinski 

This another one of these ICE after error issues with the
gimplifier and a fallout from r12-3278-g823685221de986af.
The problem here is gimplify_modify_expr does not
check if either from or to was an error operand.
This adds the check and fixes the ICE.

OK? Bootstrapped and tested on x86_64-linux-gnu with no regressions.

gcc/ChangeLog:

* gimplify.cc (gimplify_modify_expr): If
either *from_p or *to_p were error_operand
return early.

gcc/testsuite/ChangeLog:

* gcc.dg/redecl-23.c: New test.
* gcc.dg/redecl-24.c: New test.
* gcc.dg/redecl-25.c: New test.
---
 gcc/gimplify.cc  | 3 +++
 gcc/testsuite/gcc.dg/redecl-23.c | 6 ++
 gcc/testsuite/gcc.dg/redecl-24.c | 6 ++
 gcc/testsuite/gcc.dg/redecl-25.c | 9 +
 4 files changed, 24 insertions(+)
 create mode 100644 gcc/testsuite/gcc.dg/redecl-23.c
 create mode 100644 gcc/testsuite/gcc.dg/redecl-24.c
 create mode 100644 gcc/testsuite/gcc.dg/redecl-25.c

diff --git a/gcc/gimplify.cc b/gcc/gimplify.cc
index c62a966e918..02415cb1b5c 100644
--- a/gcc/gimplify.cc
+++ b/gcc/gimplify.cc
@@ -6054,6 +6054,9 @@ gimplify_modify_expr (tree *expr_p, gimple_seq *pre_p, 
gimple_seq *post_p,
   location_t loc = EXPR_LOCATION (*expr_p);
   gimple_stmt_iterator gsi;
 
+  if (error_operand_p (*from_p) || error_operand_p (*to_p))
+return GS_ERROR;
+
   gcc_assert (TREE_CODE (*expr_p) == MODIFY_EXPR
  || TREE_CODE (*expr_p) == INIT_EXPR);
 
diff --git a/gcc/testsuite/gcc.dg/redecl-23.c b/gcc/testsuite/gcc.dg/redecl-23.c
new file mode 100644
index 000..425721df2ff
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/redecl-23.c
@@ -0,0 +1,6 @@
+/* We used to ICE in the gimplifier, PR 106560. */
+/* { dg-do compile } */
+/* { dg-options "-w" } */
+void **a; /* { dg-note "" } */
+void b() { void **c = a; }
+a; /* { dg-error "" } */
diff --git a/gcc/testsuite/gcc.dg/redecl-24.c b/gcc/testsuite/gcc.dg/redecl-24.c
new file mode 100644
index 000..f0f7a723ab8
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/redecl-24.c
@@ -0,0 +1,6 @@
+/* We used to ICE in the gimplifier, PR 106560 */
+/* { dg-do compile } */
+/* { dg-options "-w" } */
+void **a, **b; /* { dg-note "" } */
+c(){b = a;}  
+a = /* { dg-error "" } */
diff --git a/gcc/testsuite/gcc.dg/redecl-25.c b/gcc/testsuite/gcc.dg/redecl-25.c
new file mode 100644
index 000..4232e19d9a7
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/redecl-25.c
@@ -0,0 +1,9 @@
+/* We used to ICE in the gimplifier, PR 106560 */
+/* { dg-do compile } */
+/* { dg-options "-w" } */
+void **a; /* { dg-note "" } */
+void b() {
+  void **c; 
+c = a /* { dg-error "" } */
+}
+a; /* { dg-error "" } */
-- 
2.27.0

[PATCH] constexprify some tree variables

[apinski--- via Gcc-patches]

From: Andrew Pinski 

Since we use C++11 by default now, we can
use constexpr for some const decls in tree-core.h.

This patch does that and it allows for better optimizations
of GCC code with checking enabled and without LTO.

For an example generic-match.cc compiling is speed up due
to the less number of basic blocks and less debugging info
produced. I did not check the speed of compiling the same source
but rather the speed of compiling the old vs new sources here
(but with the same compiler base).

The small slow down in the parsing of the arrays in each TU
is migrated by a speed up in how much code/debugging info
is produced in the end.

Note I looked at generic-match.cc since it is one of the
compiling sources which causes parallel building to stall and
I wanted to speed it up.

OK? Bootstrapped and tested on x86_64-linux-gnu with no regressions.
Or should this wait until GCC 13 branches off?

gcc/ChangeLog:

PR middle-end/14840
* tree-core.h (tree_code_type): Constexprify
by including all-tree.def.
(tree_code_length): Likewise.
* tree.cc (tree_code_type): Remove.
(tree_code_length): Remove.
---
 gcc/tree-core.h | 21 +++--
 gcc/tree.cc | 24 
 2 files changed, 19 insertions(+), 26 deletions(-)

diff --git a/gcc/tree-core.h b/gcc/tree-core.h
index af75522504f..e146b133dbd 100644
--- a/gcc/tree-core.h
+++ b/gcc/tree-core.h
@@ -2284,15 +2284,32 @@ struct floatn_type_info {
 /* Matrix describing the structures contained in a given tree code.  */
 extern bool tree_contains_struct[MAX_TREE_CODES][64];
 
+#define DEFTREECODE(SYM, NAME, TYPE, LENGTH) TYPE,
+#define END_OF_BASE_TREE_CODES tcc_exceptional,
+
+
 /* Class of tree given its code.  */
-extern const enum tree_code_class tree_code_type[];
+constexpr enum tree_code_class tree_code_type[] = {
+#include "all-tree.def"
+};
+
+#undef DEFTREECODE
+#undef END_OF_BASE_TREE_CODES
 
 /* Each tree code class has an associated string representation.
These must correspond to the tree_code_class entries.  */
 extern const char *const tree_code_class_strings[];
 
 /* Number of argument-words in each kind of tree-node.  */
-extern const unsigned char tree_code_length[];
+
+#define DEFTREECODE(SYM, NAME, TYPE, LENGTH) LENGTH,
+#define END_OF_BASE_TREE_CODES 0,
+constexpr unsigned char tree_code_length[] = {
+#include "all-tree.def"
+};
+
+#undef DEFTREECODE
+#undef END_OF_BASE_TREE_CODES
 
 /* Vector of all alias pairs for global symbols.  */
 extern GTY(()) vec *alias_pairs;
diff --git a/gcc/tree.cc b/gcc/tree.cc
index 574bd2e65d9..254b2373dcf 100644
--- a/gcc/tree.cc
+++ b/gcc/tree.cc
@@ -74,31 +74,7 @@ along with GCC; see the file COPYING3.  If not see
 #include "asan.h"
 #include "ubsan.h"
 
-/* Tree code classes.  */
 
-#define DEFTREECODE(SYM, NAME, TYPE, LENGTH) TYPE,
-#define END_OF_BASE_TREE_CODES tcc_exceptional,
-
-const enum tree_code_class tree_code_type[] = {
-#include "all-tree.def"
-};
-
-#undef DEFTREECODE
-#undef END_OF_BASE_TREE_CODES
-
-/* Table indexed by tree code giving number of expression
-   operands beyond the fixed part of the node structure.
-   Not used for types or decls.  */
-
-#define DEFTREECODE(SYM, NAME, TYPE, LENGTH) LENGTH,
-#define END_OF_BASE_TREE_CODES 0,
-
-const unsigned char tree_code_length[] = {
-#include "all-tree.def"
-};
-
-#undef DEFTREECODE
-#undef END_OF_BASE_TREE_CODES
 
 /* Names of tree components.
Used for printing out the tree and error messages.  */
-- 
2.17.1

[PATCH 2/2] Fix PR middle-end/107705: ICE after reclaration error

[apinski--- via Gcc-patches]

From: Andrew Pinski 

The problem here is after we created a call expression
in the C front-end, we replace the decl type with
an error mark node. We then end up calling
aggregate_value_p with the call expression
with the decl with the error mark as the type
and we ICE.

The fix is to check the function type
after we process the call expression inside
aggregate_value_p to get it.

OK? Bootstrapped and tested on x86_64-linux-gnu with no regressions.

Thanks,
Andrew Pinski

gcc/ChangeLog:

PR middle-end/107705
* function.cc (aggregate_value_p): Return 0 if
the function type was an error operand.

gcc/testsuite/ChangeLog:

* gcc.dg/redecl-22.c: New test.
---
 gcc/function.cc  | 3 +++
 gcc/testsuite/gcc.dg/redecl-22.c | 9 +
 2 files changed, 12 insertions(+)
 create mode 100644 gcc/testsuite/gcc.dg/redecl-22.c

diff --git a/gcc/function.cc b/gcc/function.cc
index 361aa5f7ed1..9c8773bbc59 100644
--- a/gcc/function.cc
+++ b/gcc/function.cc
@@ -2090,6 +2090,9 @@ aggregate_value_p (const_tree exp, const_tree fntype)
   if (VOID_TYPE_P (type))
 return 0;
 
+  if (error_operand_p (fntype))
+return 0;
+
   /* If a record should be passed the same as its first (and only) member
  don't pass it as an aggregate.  */
   if (TREE_CODE (type) == RECORD_TYPE && TYPE_TRANSPARENT_AGGR (type))
diff --git a/gcc/testsuite/gcc.dg/redecl-22.c b/gcc/testsuite/gcc.dg/redecl-22.c
new file mode 100644
index 000..7758570fabe
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/redecl-22.c
@@ -0,0 +1,9 @@
+/* We used to ICE in the gimplifier, PR 107705 */
+/* { dg-do compile } */
+/* { dg-options "-w" } */
+int f (void)
+{
+  int (*p) (void) = 0; // { dg-note "" }
+  return p ();
+  int p = 1; // { dg-error "" }
+}
-- 
2.17.1

[PATCH 1/2] Fix PRs 106764, 106765, and 107307, all ICE after invalid re-declaration

[apinski--- via Gcc-patches]

From: Andrew Pinski 

The problem here is the gimplifier returns GS_ERROR but
in some cases we don't check that soon enough and try
to do other work which could crash.
So the fix in these two cases is to return GS_ERROR
early if the gimplify_* functions had return GS_ERROR.

OK? Bootstrapped and tested on x86_64-linux-gnu with no regressions.

Thanks,
Andrew Pinski

gcc/ChangeLog:

PR c/106764
PR c/106765
PR c/107307
* gimplify.cc (gimplify_compound_lval): Return GS_ERROR
if gimplify_expr had return GS_ERROR.
(gimplify_call_expr): Likewise.

gcc/testsuite/ChangeLog:

PR c/106764
PR c/106765
PR c/107307
* gcc.dg/redecl-19.c: New test.
* gcc.dg/redecl-20.c: New test.
* gcc.dg/redecl-21.c: New test.
---
 gcc/gimplify.cc  | 5 +
 gcc/testsuite/gcc.dg/redecl-19.c | 5 +
 gcc/testsuite/gcc.dg/redecl-20.c | 9 +
 gcc/testsuite/gcc.dg/redecl-21.c | 9 +
 4 files changed, 28 insertions(+)
 create mode 100644 gcc/testsuite/gcc.dg/redecl-19.c
 create mode 100644 gcc/testsuite/gcc.dg/redecl-20.c
 create mode 100644 gcc/testsuite/gcc.dg/redecl-21.c

diff --git a/gcc/gimplify.cc b/gcc/gimplify.cc
index f06ce3cc77a..c62a966e918 100644
--- a/gcc/gimplify.cc
+++ b/gcc/gimplify.cc
@@ -3272,6 +3272,8 @@ gimplify_compound_lval (tree *expr_p, gimple_seq *pre_p, 
gimple_seq *post_p,
   tret = gimplify_expr (p, pre_p, post_p, is_gimple_min_lval,
fallback | fb_lvalue);
   ret = MIN (ret, tret);
+  if (ret == GS_ERROR)
+return GS_ERROR;
 
   /* Step 2a: if we have component references we do not support on
  registers then make sure the base isn't a register.  Of course
@@ -3709,6 +3711,9 @@ gimplify_call_expr (tree *expr_p, gimple_seq *pre_p, bool 
want_value)
   ret = gimplify_expr (_EXPR_FN (*expr_p), pre_p, NULL,
   is_gimple_call_addr, fb_rvalue);
 
+  if (ret == GS_ERROR)
+return GS_ERROR;
+
   nargs = call_expr_nargs (*expr_p);
 
   /* Get argument types for verification.  */
diff --git a/gcc/testsuite/gcc.dg/redecl-19.c b/gcc/testsuite/gcc.dg/redecl-19.c
new file mode 100644
index 000..cc10685448b
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/redecl-19.c
@@ -0,0 +1,5 @@
+/* We used to ICE in the gimplifier, PR 106764 */
+/* { dg-do compile } */
+/* { dg-options "-w" } */
+(*a)(); // { dg-note "" }
+b(){a()} a; // { dg-error "" }
diff --git a/gcc/testsuite/gcc.dg/redecl-20.c b/gcc/testsuite/gcc.dg/redecl-20.c
new file mode 100644
index 000..07f52115ec8
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/redecl-20.c
@@ -0,0 +1,9 @@
+/* We used to ICE in the gimplifier, PR 107307 */
+// { dg-do compile }
+// { dg-options "-w" }
+void f ()
+{
+  const struct { int a[1]; } b; // { dg-note "" }
+  int *c = b.a;
+  int *b; // { dg-error "" }
+}
diff --git a/gcc/testsuite/gcc.dg/redecl-21.c b/gcc/testsuite/gcc.dg/redecl-21.c
new file mode 100644
index 000..2f2a6548a57
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/redecl-21.c
@@ -0,0 +1,9 @@
+/* We used to ICE in the gimplifier, PR 106765 */
+/* { dg-do compile } */
+/* { dg-options "-w" } */
+struct a {
+  int b
+} c() {
+  struct a a; // { dg-note "" }
+  a.b;
+  d a; // { dg-error "" }
-- 
2.17.1

[COMMITTED] Fix PR 107734: valgrind errors with sbitmap in match.pd

[apinski--- via Gcc-patches]

From: Andrew Pinski 

sbitmap is a simple bitmap and the memory allocated is not cleared
on creation; you have to clear it or set it to all ones before using
it.  This is unlike bitmap which is a sparse bitmap and the entries are
cleared as created.
The code added in r13-4044-gdc95e1e9702f2f missed that.
This patch fixes that mistake.

Committed as obvious after a bootstrap and test on x86_64-linux-gnu.

gcc/ChangeLog:

PR middle-end/107734
* match.pd (perm + vector op pattern): Clear the sbitmap before
use.
---
 gcc/match.pd | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/gcc/match.pd b/gcc/match.pd
index 5aba1653b80..a4d1386fd9f 100644
--- a/gcc/match.pd
+++ b/gcc/match.pd
@@ -8288,6 +8288,8 @@ and,
   if (sel.encoding ().encoded_full_vector_p ())
 {
   auto_sbitmap seen (nelts);
+  bitmap_clear (seen);
+
   unsigned HOST_WIDE_INT count = 0, i;
 
   for (i = 0; i < nelts; i++)
-- 
2.17.1

[PATCH] Remove Score documentation

[apinski--- via Gcc-patches]

From: Andrew Pinski 

Score target support was removed in r5-3909-g3daa7bbf791203
but it looks like some of the documentation was missed.
This removes it.

Committed as obvious after a "make html".

Thanks,
Andrew

gcc/ChangeLog:

* doc/invoke.texi: Remove Score option section.
---
 gcc/doc/invoke.texi | 52 
 1 file changed, 52 deletions(-)

diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
index ef88f2a..55e8a14 100644
--- a/gcc/doc/invoke.texi
+++ b/gcc/doc/invoke.texi
@@ -1316,13 +1316,6 @@ See RS/6000 and PowerPC Options.
 -mwarn-framesize  -mwarn-dynamicstack  -mstack-size  -mstack-guard @gol
 -mhotpatch=@var{halfwords},@var{halfwords}}
 
-@emph{Score Options}
-@gccoptlist{-meb  -mel @gol
--mnhwloop @gol
--muls @gol
--mmac @gol
--mscore5  -mscore5u  -mscore7  -mscore7d}
-
 @emph{SH Options}
 @gccoptlist{-m1  -m2  -m2e @gol
 -m2a-nofpu  -m2a-single-only  -m2a-single  -m2a @gol
@@ -19726,7 +19719,6 @@ platform.
 * RS/6000 and PowerPC Options::
 * RX Options::
 * S/390 and zSeries Options::
-* Score Options::
 * SH Options::
 * Solaris 2 Options::
 * SPARC Options::
@@ -30424,50 +30416,6 @@ This option can be overridden for individual functions 
with the
 @code{hotpatch} attribute.
 @end table
 
-@node Score Options
-@subsection Score Options
-@cindex Score Options
-
-These options are defined for Score implementations:
-
-@table @gcctabopt
-@item -meb
-@opindex meb
-Compile code for big-endian mode.  This is the default.
-
-@item -mel
-@opindex mel
-Compile code for little-endian mode.
-
-@item -mnhwloop
-@opindex mnhwloop
-Disable generation of @code{bcnz} instructions.
-
-@item -muls
-@opindex muls
-Enable generation of unaligned load and store instructions.
-
-@item -mmac
-@opindex mmac
-Enable the use of multiply-accumulate instructions. Disabled by default.
-
-@item -mscore5
-@opindex mscore5
-Specify the SCORE5 as the target architecture.
-
-@item -mscore5u
-@opindex mscore5u
-Specify the SCORE5U of the target architecture.
-
-@item -mscore7
-@opindex mscore7
-Specify the SCORE7 as the target architecture. This is the default.
-
-@item -mscore7d
-@opindex mscore7d
-Specify the SCORE7D as the target architecture.
-@end table
-
 @node SH Options
 @subsection SH Options
 
-- 
1.8.3.1

[PATCH] Remove the picoChip documentation

[apinski--- via Gcc-patches]

From: Andrew Pinski 

PicoChip support was removed in r5-3431-g157e859ffe3b5d but the
documentation was missed it seems.

Committed as obvious after running "make html" to make sure the
building of the documentation still works.

Thanks,
Andrew Pinski

gcc/ChangeLog:

* doc/extend.texi: Remove picoChip builtin section.
* doc/invoke.texi: Remove picoChip option section.
---
 gcc/doc/extend.texi | 37 -
 gcc/doc/invoke.texi | 53 -
 2 files changed, 90 deletions(-)

diff --git a/gcc/doc/extend.texi b/gcc/doc/extend.texi
index ca84f3a..608bbe1 100644
--- a/gcc/doc/extend.texi
+++ b/gcc/doc/extend.texi
@@ -14647,7 +14647,6 @@ instructions, but allow the compiler to schedule those 
calls.
 * Other MIPS Built-in Functions::
 * MSP430 Built-in Functions::
 * NDS32 Built-in Functions::
-* picoChip Built-in Functions::
 * Basic PowerPC Built-in Functions::
 * PowerPC AltiVec/VSX Built-in Functions::
 * PowerPC Hardware Transactional Memory Built-in Functions::
@@ -17774,42 +17773,6 @@ Enable global interrupt.
 Disable global interrupt.
 @end deftypefn
 
-@node picoChip Built-in Functions
-@subsection picoChip Built-in Functions
-
-GCC provides an interface to selected machine instructions from the
-picoChip instruction set.
-
-@table @code
-@item int __builtin_sbc (int @var{value})
-Sign bit count.  Return the number of consecutive bits in @var{value}
-that have the same value as the sign bit.  The result is the number of
-leading sign bits minus one, giving the number of redundant sign bits in
-@var{value}.
-
-@item int __builtin_byteswap (int @var{value})
-Byte swap.  Return the result of swapping the upper and lower bytes of
-@var{value}.
-
-@item int __builtin_brev (int @var{value})
-Bit reversal.  Return the result of reversing the bits in
-@var{value}.  Bit 15 is swapped with bit 0, bit 14 is swapped with bit 1,
-and so on.
-
-@item int __builtin_adds (int @var{x}, int @var{y})
-Saturating addition.  Return the result of adding @var{x} and @var{y},
-storing the value 32767 if the result overflows.
-
-@item int __builtin_subs (int @var{x}, int @var{y})
-Saturating subtraction.  Return the result of subtracting @var{y} from
-@var{x}, storing the value @minus{}32768 if the result overflows.
-
-@item void __builtin_halt (void)
-Halt.  The processor stops execution.  This built-in is useful for
-implementing assertions.
-
-@end table
-
 @node Basic PowerPC Built-in Functions
 @subsection Basic PowerPC Built-in Functions
 
diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
index 12be55f..ef88f2a 100644
--- a/gcc/doc/invoke.texi
+++ b/gcc/doc/invoke.texi
@@ -1190,10 +1190,6 @@ Objective-C and Objective-C++ Dialects}.
 -mint32  -mno-int16  -mint16  -mno-int32 @gol
 -msplit  -munix-asm  -mdec-asm  -mgnu-asm  -mlra}
 
-@emph{picoChip Options}
-@gccoptlist{-mae=@var{ae_type}  -mvliw-lookahead=@var{N} @gol
--msymbol-as-address  -mno-inefficient-warnings}
-
 @emph{PowerPC Options}
 See RS/6000 and PowerPC Options.
 
@@ -19723,7 +19719,6 @@ platform.
 * Nvidia PTX Options::
 * OpenRISC Options::
 * PDP-11 Options::
-* picoChip Options::
 * PowerPC Options::
 * PRU Options::
 * RISC-V Options::
@@ -28396,54 +28391,6 @@ Use the new LRA register allocator.  By default, the 
old ``reload''
 allocator is used.
 @end table
 
-@node picoChip Options
-@subsection picoChip Options
-@cindex picoChip options
-
-These @samp{-m} options are defined for picoChip implementations:
-
-@table @gcctabopt
-
-@item -mae=@var{ae_type}
-@opindex mcpu
-Set the instruction set, register set, and instruction scheduling
-parameters for array element type @var{ae_type}.  Supported values
-for @var{ae_type} are @samp{ANY}, @samp{MUL}, and @samp{MAC}.
-
-@option{-mae=ANY} selects a completely generic AE type.  Code
-generated with this option runs on any of the other AE types.  The
-code is not as efficient as it would be if compiled for a specific
-AE type, and some types of operation (e.g., multiplication) do not
-work properly on all types of AE.
-
-@option{-mae=MUL} selects a MUL AE type.  This is the most useful AE type
-for compiled code, and is the default.
-
-@option{-mae=MAC} selects a DSP-style MAC AE.  Code compiled with this
-option may suffer from poor performance of byte (char) manipulation,
-since the DSP AE does not provide hardware support for byte load/stores.
-
-@item -msymbol-as-address
-Enable the compiler to directly use a symbol name as an address in a
-load/store instruction, without first loading it into a
-register.  Typically, the use of this option generates larger
-programs, which run faster than when the option isn't used.  However, the
-results vary from program to program, so it is left as a user option,
-rather than being permanently enabled.
-
-@item -mno-inefficient-warnings
-Disables warnings about the generation of inefficient code.  These
-warnings can be generated, for example, when compiling code that

[PATCH] Remove documentation for MeP

[apinski--- via Gcc-patches]

From: Andrew Pinski 

MeP support was removed in r7-1614-g0609abdad81e26
but it looks like the documentation for the target
was missed.

Committed as obvious after doing "make html" to
make sure the documentation is fine.

Thanks,
Andrew Pinski

gcc/ChangeLog:

* doc/extend.texi: Remove MeP documentation.
* doc/invoke.texi: Remove MeP Options documentation.
---
 gcc/doc/extend.texi | 190 
 gcc/doc/invoke.texi | 171 --
 2 files changed, 361 deletions(-)

diff --git a/gcc/doc/extend.texi b/gcc/doc/extend.texi
index 8da0db9..ca84f3a 100644
--- a/gcc/doc/extend.texi
+++ b/gcc/doc/extend.texi
@@ -2542,7 +2542,6 @@ GCC plugins may provide their own attributes.
 * M32R/D Function Attributes::
 * m68k Function Attributes::
 * MCORE Function Attributes::
-* MeP Function Attributes::
 * MicroBlaze Function Attributes::
 * Microsoft Windows Function Attributes::
 * MIPS Function Attributes::
@@ -5392,45 +5391,6 @@ basic @code{asm} and C code may appear to work, they 
cannot be
 depended upon to work reliably and are not supported.
 @end table
 
-@node MeP Function Attributes
-@subsection MeP Function Attributes
-
-These function attributes are supported by the MeP back end:
-
-@table @code
-@item disinterrupt
-@cindex @code{disinterrupt} function attribute, MeP
-On MeP targets, this attribute causes the compiler to emit
-instructions to disable interrupts for the duration of the given
-function.
-
-@item interrupt
-@cindex @code{interrupt} function attribute, MeP
-Use this attribute to indicate
-that the specified function is an interrupt handler.  The compiler generates
-function entry and exit sequences suitable for use in an interrupt handler
-when this attribute is present.
-
-@item near
-@cindex @code{near} function attribute, MeP
-This attribute causes the compiler to assume the called
-function is close enough to use the normal calling convention,
-overriding the @option{-mtf} command-line option.
-
-@item far
-@cindex @code{far} function attribute, MeP
-On MeP targets this causes the compiler to use a calling convention
-that assumes the called function is too far away for the built-in
-addressing modes.
-
-@item vliw
-@cindex @code{vliw} function attribute, MeP
-The @code{vliw} attribute tells the compiler to emit
-instructions in VLIW mode instead of core mode.  Note that this
-attribute is not allowed unless a VLIW coprocessor has been configured
-and enabled through command-line options.
-@end table
-
 @node MicroBlaze Function Attributes
 @subsection MicroBlaze Function Attributes
 
@@ -7336,7 +7296,6 @@ attributes.
 * IA-64 Variable Attributes::
 * LoongArch Variable Attributes::
 * M32R/D Variable Attributes::
-* MeP Variable Attributes::
 * Microsoft Windows Variable Attributes::
 * MSP430 Variable Attributes::
 * Nvidia PTX Variable Attributes::
@@ -8182,70 +8141,6 @@ Medium and large model objects may live anywhere in the 
32-bit address space
 addresses).
 @end table
 
-@node MeP Variable Attributes
-@subsection MeP Variable Attributes
-
-The MeP target has a number of addressing modes and busses.  The
-@code{near} space spans the standard memory space's first 16 megabytes
-(24 bits).  The @code{far} space spans the entire 32-bit memory space.
-The @code{based} space is a 128-byte region in the memory space that
-is addressed relative to the @code{$tp} register.  The @code{tiny}
-space is a 65536-byte region relative to the @code{$gp} register.  In
-addition to these memory regions, the MeP target has a separate 16-bit
-control bus which is specified with @code{cb} attributes.
-
-@table @code
-
-@item based
-@cindex @code{based} variable attribute, MeP
-Any variable with the @code{based} attribute is assigned to the
-@code{.based} section, and is accessed with relative to the
-@code{$tp} register.
-
-@item tiny
-@cindex @code{tiny} variable attribute, MeP
-Likewise, the @code{tiny} attribute assigned variables to the
-@code{.tiny} section, relative to the @code{$gp} register.
-
-@item near
-@cindex @code{near} variable attribute, MeP
-Variables with the @code{near} attribute are assumed to have addresses
-that fit in a 24-bit addressing mode.  This is the default for large
-variables (@code{-mtiny=4} is the default) but this attribute can
-override @code{-mtiny=} for small variables, or override @code{-ml}.
-
-@item far
-@cindex @code{far} variable attribute, MeP
-Variables with the @code{far} attribute are addressed using a full
-32-bit address.  Since this covers the entire memory space, this
-allows modules to make no assumptions about where variables might be
-stored.
-
-@item io
-@cindex @code{io} variable attribute, MeP
-@itemx io (@var{addr})
-Variables with the @code{io} attribute are used to address
-memory-mapped peripherals.  If an address is specified, the variable
-is assigned that address, else it is not assigned an address (it is
-assumed some other module assigns an 

[PATCH] Fix @opindex for mcall-aixdesc and mcall-openbsd

[apinski--- via Gcc-patches]

From: Andrew Pinski 

For mcall-aixdesc, the opindex was just m which was wrong.
For mcall-openbsd, the opindex was mcall-netbsd which was wrong.
This two have been broken since the options were added to the documentation
back in r0-92913-g244609a618b094 .

Committed as obvious after a "make html" and checking the options index.

Thanks,
Andrew

gcc/ChangeLog:

* doc/invoke.texi: Fix opindex for mcall-aixdesc and mcall-openbsd.
---
 gcc/doc/invoke.texi | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
index dc2da464ebb..0276fbf4550 100644
--- a/gcc/doc/invoke.texi
+++ b/gcc/doc/invoke.texi
@@ -29640,7 +29640,7 @@ Specify both @option{-mcall-sysv} and @option{-meabi} 
options.
 Specify both @option{-mcall-sysv} and @option{-mno-eabi} options.
 
 @item -mcall-aixdesc
-@opindex m
+@opindex mcall-aixdesc
 On System V.4 and embedded PowerPC systems compile code for the AIX
 operating system.
 
@@ -29660,7 +29660,7 @@ On System V.4 and embedded PowerPC systems compile code 
for the
 NetBSD operating system.
 
 @item -mcall-openbsd
-@opindex mcall-netbsd
+@opindex mcall-openbsd
 On System V.4 and embedded PowerPC systems compile code for the
 OpenBSD operating system.
 
-- 
2.17.1

[COMMITTED] Fix @opindex for m80387

[apinski--- via Gcc-patches]

From: Andrew Pinski 

I noticed that the opindex for -m80387
option was wrong. It was just 80387 which
was not consistent with the rest of the options.
This fixes that and uses "@opindex m80387".

Committed as obvious after  "make html" and checking
the option index page.

gcc/ChangeLog:

* doc/invoke.texi: Fix @opindex
for m80387 option.
---
 gcc/doc/invoke.texi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
index 80365d8cd15..0d28c5f78ff 100644
--- a/gcc/doc/invoke.texi
+++ b/gcc/doc/invoke.texi
@@ -32634,7 +32634,7 @@ comparison is unordered.
 
 @item -m80387
 @itemx -mhard-float
-@opindex 80387
+@opindex m80387
 @opindex mhard-float
 Generate output containing 80387 instructions for floating point.
 
-- 
2.17.1

[COMMITTED] Fix some @opindex with - in the front

[apinski--- via Gcc-patches]

From: Andrew Pinski 

I noticed this during the conversion of the docs
to sphinx that some options in the option index had a -
in the front of it for the texinfo docs. When the sphinx
conversion was reverted, I thought I would fix the texinfo
documentation for these options.

Committed as obvious after doing "make html" to check
the resulting option index page.

gcc/ChangeLog:

* doc/invoke.texi: Remove the front - from
some @opindex.
---
 gcc/doc/invoke.texi | 24 
 1 file changed, 12 insertions(+), 12 deletions(-)

diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
index 2e4433d..80365d8 100644
--- a/gcc/doc/invoke.texi
+++ b/gcc/doc/invoke.texi
@@ -17032,7 +17032,7 @@ routines generate output or allocate memory).
 @xref{Common Function Attributes}.
 
 @item -finstrument-functions-once
-@opindex -finstrument-functions-once
+@opindex finstrument-functions-once
 This is similar to @option{-finstrument-functions}, but the profiling
 functions are called only once per instrumented function, i.e. the first
 profiling function is called after the first entry into the instrumented
@@ -25215,7 +25215,7 @@ These command-line options are defined for LoongArch 
targets:
 
 @table @gcctabopt
 @item -march=@var{cpu-type}
-@opindex -march
+@opindex march
 Generate instructions for the machine type @var{cpu-type}.  In contrast to
 @option{-mtune=@var{cpu-type}}, which merely tunes the generated code
 for the specified @var{cpu-type}, @option{-march=@var{cpu-type}} allows GCC
@@ -25285,43 +25285,43 @@ registers for parameter passing.  This option may 
change the target
 ABI.
 
 @item -msingle-float
-@opindex -msingle-float
+@opindex msingle-float
 Force @option{-mfpu=32} and allow the use of 32-bit floating-point
 registers for parameter passing.  This option may change the target
 ABI.
 
 @item -mdouble-float
-@opindex -mdouble-float
+@opindex mdouble-float
 Force @option{-mfpu=64} and allow the use of 32/64-bit floating-point
 registers for parameter passing.  This option may change the target
 ABI.
 
 @item -mbranch-cost=@var{n}
-@opindex -mbranch-cost
+@opindex mbranch-cost
 Set the cost of branches to roughly @var{n} instructions.
 
 @item -mcheck-zero-division
 @itemx -mno-check-zero-divison
-@opindex -mcheck-zero-division
+@opindex mcheck-zero-division
 Trap (do not trap) on integer division by zero.  The default is
 @option{-mcheck-zero-division} for @option{-O0} or @option{-Og}, and
 @option{-mno-check-zero-division} for other optimization levels.
 
 @item -mcond-move-int
 @itemx -mno-cond-move-int
-@opindex -mcond-move-int
+@opindex mcond-move-int
 Conditional moves for integral data in general-purpose registers
 are enabled (disabled).  The default is @option{-mcond-move-int}.
 
 @item -mcond-move-float
 @itemx -mno-cond-move-float
-@opindex -mcond-move-float
+@opindex mcond-move-float
 Conditional moves for floating-point registers are enabled (disabled).
 The default is @option{-mcond-move-float}.
 
 @item -mmemcpy
 @itemx -mno-memcpy
-@opindex -mmemcpy
+@opindex mmemcpy
 Force (do not force) the use of @code{memcpy} for non-trivial block moves.
 The default is @option{-mno-memcpy}, which allows GCC to inline most
 constant-sized copies.  Setting optimization level to @option{-Os} also
@@ -25331,18 +25331,18 @@ the command line.
 
 @item -mstrict-align
 @itemx -mno-strict-align
-@opindex -mstrict-align
+@opindex mstrict-align
 Avoid or allow generating memory accesses that may not be aligned on a natural
 object boundary as described in the architecture specification. The default is
 @option{-mno-strict-align}.
 
 @item -msmall-data-limit=@var{number}
-@opindex -msmall-data-limit
+@opindex msmall-data-limit
 Put global and static data smaller than @var{number} bytes into a special
 section (on some targets).  The default value is 0.
 
 @item -mmax-inline-memcpy-size=@var{n}
-@opindex -mmax-inline-memcpy-size
+@opindex mmax-inline-memcpy-size
 Inline all block moves (such as calls to @code{memcpy} or structure copies)
 less than or equal to @var{n} bytes.  The default value of @var{n} is 1024.
 
-- 
1.8.3.1

[PATCHv2] Use toplevel configure for GMP and MPFR for gdb

[apinski--- via Gcc-patches]

From: Andrew Pinski 

This patch uses the toplevel configure parts for GMP/MPFR for
gdb. The only thing is that gdb now requires MPFR for building.
Before it was a recommended but not required library.
Also this allows building of GMP and MPFR with the toplevel
directory just like how it is done for GCC.
We now error out in the toplevel configure of the version
of GMP and MPFR that is wrong.

OK after GDB 13 branches? Build gdb 3 ways:
with GMP and MPFR in the toplevel (static library used at that point for both)
With only MPFR in the toplevel (GMP distro library used and MPFR built from 
source)
With neither GMP and MPFR in the toplevel (distro libraries used)

Changes from v1:
* Updated gdb/README and gdb/doc/gdb.texinfo.
* Regenerated using unmodified autoconf-2.69

Thanks,
Andrew Pinski

ChangeLog:
* Makefile.def: Add configure-gdb dependencies
on all-gmp and all-mpfr.
* configure.ac: Split out MPC checking from MPFR.
Require GMP and MPFR if the gdb directory exist.
* Makefile.in: Regenerate.
* configure: Regenerate.

gdb/ChangeLog:

PR bug/28500
* configure.ac: Remove AC_LIB_HAVE_LINKFLAGS
for gmp and mpfr.
Use GMPLIBS and GMPINC which is provided by the
toplevel configure.
* Makefile.in (LIBGMP, LIBMPFR): Remove.
(GMPLIBS, GMPINC): Add definition.
(INTERNAL_CFLAGS_BASE): Add GMPINC.
(CLIBS): Exchange LIBMPFR and LIBGMP
for GMPLIBS.
* target-float.c: Make the code conditional on
HAVE_LIBMPFR unconditional.
* top.c: Remove code checking HAVE_LIBMPFR.
* configure: Regenerate.
* config.in: Regenerate.
* README: Update GMP/MPFR section of the config
options.
* doc/gdb.texinfo: Likewise.

Bug: https://sourceware.org/bugzilla/show_bug.cgi?id=28500
---
 Makefile.def|2 +
 Makefile.in |2 +
 configure   |   67 ++-
 configure.ac|   45 +-
 gdb/Makefile.in |   12 +-
 gdb/README  |   28 +-
 gdb/config.in   |6 -
 gdb/configure   | 1014 +--
 gdb/configure.ac|   31 +-
 gdb/doc/gdb.texinfo |   13 +-
 gdb/target-float.c  |8 -
 gdb/top.c   |8 -
 12 files changed, 142 insertions(+), 1094 deletions(-)

diff --git a/Makefile.def b/Makefile.def
index acdcd625ed6..d5976e61d98 100644
--- a/Makefile.def
+++ b/Makefile.def
@@ -418,6 +418,8 @@ dependencies = { module=configure-isl; on=all-gmp; };
 dependencies = { module=all-intl; on=all-libiconv; };
 
 // Host modules specific to gdb.
+dependencies = { module=configure-gdb; on=all-gmp; };
+dependencies = { module=configure-gdb; on=all-mpfr; };
 dependencies = { module=configure-gdb; on=all-intl; };
 dependencies = { module=configure-gdb; on=configure-sim; };
 dependencies = { module=configure-gdb; on=all-bfd; };
diff --git a/Makefile.in b/Makefile.in
index cb39e4790d6..d0666c75b00 100644
--- a/Makefile.in
+++ b/Makefile.in
@@ -63748,6 +63748,8 @@ configure-libcc1: maybe-configure-gcc
 all-libcc1: maybe-all-gcc
 all-c++tools: maybe-all-gcc
 all-utils: maybe-all-libiberty
+configure-gdb: maybe-all-gmp
+configure-gdb: maybe-all-mpfr
 configure-gdb: maybe-all-intl
 configure-gdb: maybe-all-bfd
 configure-gdb: maybe-all-libiconv
diff --git a/configure b/configure
index 7bcb894d1fe..a891eeae4c0 100755
--- a/configure
+++ b/configure
@@ -8025,7 +8025,20 @@ _ACEOF
 
 
 # Check for GMP, MPFR and MPC
-gmplibs="-lmpc -lmpfr -lgmp"
+require_gmp=no
+require_mpc=no
+if test -d ${srcdir}/gcc ; then
+  require_gmp=yes
+  require_mpc=yes
+fi
+if test -d ${srcdir}/gdb ; then
+  require_gmp=yes
+fi
+
+gmplibs="-lmpfr -lgmp"
+if test x"$require_mpc" = "xyes" ; then
+  gmplibs="-lmpc $gmplibs"
+fi
 gmpinc=
 have_gmp=no
 
@@ -8160,7 +8173,7 @@ if test "x$with_gmp$with_gmp_include$with_gmp_lib" = x && 
test -d ${srcdir}/gmp;
   have_gmp=yes
 fi
 
-if test -d ${srcdir}/gcc && test "x$have_gmp" = xno; then
+if test "x$require_gmp" = xyes && test "x$have_gmp" = xno; then
   have_gmp=yes
   saved_CFLAGS="$CFLAGS"
   CFLAGS="$CFLAGS $gmpinc"
@@ -8270,7 +8283,7 @@ rm -f core conftest.err conftest.$ac_objext 
conftest.$ac_ext
   fi
 
   # Check for the MPC header version.
-  if test x"$have_gmp" = xyes ; then
+  if test "x$require_mpc" = xyes && test x"$have_gmp" = xyes ; then
 # Check for the recommended and required versions of MPC.
 { $as_echo "$as_me:${as_lineno-$LINENO}: checking for the correct version 
of mpc.h" >&5
 $as_echo_n "checking for the correct version of mpc.h... " >&6; }
@@ -8324,18 +8337,17 @@ rm -f core conftest.err conftest.$ac_objext 
conftest.$ac_ext
   if test x"$have_gmp" = xyes; then
 saved_LIBS="$LIBS"
 LIBS="$LIBS $gmplibs"
-{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for the correct version 
of the gmp/mpfr/mpc libraries" >&5
-$as_echo_n "checking for the correct version of the gmp/mpfr/mpc libraries... 
" >&6; }
+{ $as_echo 

[PATCH] Remove SLOW_SHORT_ACCESS from target headers

[apinski--- via Gcc-patches]

From: Andrew Pinski 

SLOW_SHORT_ACCESS is defined in bfin and i386 target
headers but the target macro is not used elsewhere.
So let's remove it from those two headers and posion it.

OK? Built x86_64-linux-gnu and bfin-elf.

gcc/ChangeLog:

* config/bfin/bfin.h (SLOW_SHORT_ACCESS): Delete.
* config/i386/i386.h (SLOW_SHORT_ACCESS): Delete.
* system.h: Poison SLOW_SHORT_ACCESS
---
 gcc/config/bfin/bfin.h | 1 -
 gcc/config/i386/i386.h | 3 ---
 gcc/system.h   | 2 +-
 3 files changed, 1 insertion(+), 5 deletions(-)

diff --git a/gcc/config/bfin/bfin.h b/gcc/config/bfin/bfin.h
index 4e7753038a8..1d75c655df8 100644
--- a/gcc/config/bfin/bfin.h
+++ b/gcc/config/bfin/bfin.h
@@ -810,7 +810,6 @@ typedef struct {
subsequent accesses occur to other fields in the same word of the
structure, but to different bytes.  */
 #define SLOW_BYTE_ACCESS  0
-#define SLOW_SHORT_ACCESS 0
 
 /* Define this if most significant bit is lowest numbered
in instructions that operate on numbered bit-fields. */
diff --git a/gcc/config/i386/i386.h b/gcc/config/i386/i386.h
index b32db8da109..a5ad9f387f7 100644
--- a/gcc/config/i386/i386.h
+++ b/gcc/config/i386/i386.h
@@ -1933,9 +1933,6 @@ do {  
\
 
 #define SLOW_BYTE_ACCESS 0
 
-/* Nonzero if access to memory by shorts is slow and undesirable.  */
-#define SLOW_SHORT_ACCESS 0
-
 /* Define this macro if it is as good or better to call a constant
function address than to call an address kept in a register.
 
diff --git a/gcc/system.h b/gcc/system.h
index c192b6c3ce7..de9c5c0d2ef 100644
--- a/gcc/system.h
+++ b/gcc/system.h
@@ -1075,7 +1075,7 @@ extern void fancy_abort (const char *, int, const char *)
EH_FRAME_IN_DATA_SECTION TARGET_FLT_EVAL_METHOD_NON_DEFAULT\
JCR_SECTION_NAME TARGET_USE_JCR_SECTION SDB_DEBUGGING_INFO \
SDB_DEBUG NO_IMPLICIT_EXTERN_C NOTICE_UPDATE_CC\
-   CC_STATUS_MDEP_INIT CC_STATUS_MDEP CC_STATUS
+   CC_STATUS_MDEP_INIT CC_STATUS_MDEP CC_STATUS SLOW_SHORT_ACCESS
 
 /* Hooks that are no longer used.  */
  #pragma GCC poison LANG_HOOKS_FUNCTION_MARK LANG_HOOKS_FUNCTION_FREE  \
-- 
2.17.1

[PATCH] Use toplevel configure for GMP and MPFR for gdb

[apinski--- via Gcc-patches]

From: Andrew Pinski 

This patch uses the toplevel configure parts for GMP/MPFR for
gdb. The only thing is that gdb now requires MPFR for building.
Before it was a recommended but not required library.
Also this allows building of GMP and MPFR with the toplevel
directory just like how it is done for GCC.
We now error out in the toplevel configure of the version
of GMP and MPFR that is wrong.

OK? Build gdb 3 ways:
with GMP and MPFR in the toplevel (static library used at that point for both)
With only MPFR in the toplevel (GMP distro library used and MPFR built from 
source)
With neither GMP and MPFR in the toplevel (distro libraries used)

Thanks,
Andrew Pinski

ChangeLog:
* Makefile.def: Add configure-gdb dependencies
on all-gmp and all-mpfr.
* configure.ac: Split out MPC checking from MPFR.
Require GMP and MPFR if the gdb directory exist.
* Makefile.in: Regenerate.
* configure: Regenerate.

gdb/ChangeLog:
* configure.ac: Remove AC_LIB_HAVE_LINKFLAGS
for gmp and mpfr.
Use GMPLIBS and GMPINC which is provided by the
toplevel configure.
* Makefile.in (LIBGMP, LIBMPFR): Remove.
(GMPLIBS, GMPINC): Add definition.
(INTERNAL_CFLAGS_BASE): Add GMPINC.
(CLIBS): Exchange LIBMPFR and LIBGMP
for GMPLIBS.
* target-float.c: Make the code conditional on
HAVE_LIBMPFR unconditional.
* top.c: Remove code checking HAVE_LIBMPFR.
* configure: Regenerate.
* config.in: Regenerate.
---
 Makefile.def   |2 +
 Makefile.in|2 +
 configure  |   81 +++-
 configure.ac   |   45 +-
 gdb/Makefile.in|   12 +-
 gdb/config.in  |6 -
 gdb/configure  | 1036 ++--
 gdb/configure.ac   |   31 +-
 gdb/target-float.c |8 -
 gdb/top.c  |8 -
 10 files changed, 147 insertions(+), 1084 deletions(-)

diff --git a/Makefile.def b/Makefile.def
index acdcd625ed6..d5976e61d98 100644
--- a/Makefile.def
+++ b/Makefile.def
@@ -418,6 +418,8 @@ dependencies = { module=configure-isl; on=all-gmp; };
 dependencies = { module=all-intl; on=all-libiconv; };
 
 // Host modules specific to gdb.
+dependencies = { module=configure-gdb; on=all-gmp; };
+dependencies = { module=configure-gdb; on=all-mpfr; };
 dependencies = { module=configure-gdb; on=all-intl; };
 dependencies = { module=configure-gdb; on=configure-sim; };
 dependencies = { module=configure-gdb; on=all-bfd; };
diff --git a/Makefile.in b/Makefile.in
index cb39e4790d6..d0666c75b00 100644
--- a/Makefile.in
+++ b/Makefile.in
@@ -63748,6 +63748,8 @@ configure-libcc1: maybe-configure-gcc
 all-libcc1: maybe-all-gcc
 all-c++tools: maybe-all-gcc
 all-utils: maybe-all-libiberty
+configure-gdb: maybe-all-gmp
+configure-gdb: maybe-all-mpfr
 configure-gdb: maybe-all-intl
 configure-gdb: maybe-all-bfd
 configure-gdb: maybe-all-libiconv
diff --git a/configure b/configure
index 7bcb894d1fe..9ee7a1a3abe 100755
--- a/configure
+++ b/configure
@@ -769,6 +769,7 @@ infodir
 docdir
 oldincludedir
 includedir
+runstatedir
 localstatedir
 sharedstatedir
 sysconfdir
@@ -941,6 +942,7 @@ datadir='${datarootdir}'
 sysconfdir='${prefix}/etc'
 sharedstatedir='${prefix}/com'
 localstatedir='${prefix}/var'
+runstatedir='${localstatedir}/run'
 includedir='${prefix}/include'
 oldincludedir='/usr/include'
 docdir='${datarootdir}/doc/${PACKAGE}'
@@ -1193,6 +1195,15 @@ do
   | -silent | --silent | --silen | --sile | --sil)
 silent=yes ;;
 
+  -runstatedir | --runstatedir | --runstatedi | --runstated \
+  | --runstate | --runstat | --runsta | --runst | --runs \
+  | --run | --ru | --r)
+ac_prev=runstatedir ;;
+  -runstatedir=* | --runstatedir=* | --runstatedi=* | --runstated=* \
+  | --runstate=* | --runstat=* | --runsta=* | --runst=* | --runs=* \
+  | --run=* | --ru=* | --r=*)
+runstatedir=$ac_optarg ;;
+
   -sbindir | --sbindir | --sbindi | --sbind | --sbin | --sbi | --sb)
 ac_prev=sbindir ;;
   -sbindir=* | --sbindir=* | --sbindi=* | --sbind=* | --sbin=* \
@@ -1330,7 +1341,7 @@ fi
 for ac_var in  exec_prefix prefix bindir sbindir libexecdir datarootdir \
datadir sysconfdir sharedstatedir localstatedir includedir \
oldincludedir docdir infodir htmldir dvidir pdfdir psdir \
-   libdir localedir mandir
+   libdir localedir mandir runstatedir
 do
   eval ac_val=\$$ac_var
   # Remove trailing slashes.
@@ -1490,6 +1501,7 @@ Fine tuning of the installation directories:
   --sysconfdir=DIRread-only single-machine data [PREFIX/etc]
   --sharedstatedir=DIRmodifiable architecture-independent data [PREFIX/com]
   --localstatedir=DIR modifiable single-machine data [PREFIX/var]
+  --runstatedir=DIR   modifiable per-process data [LOCALSTATEDIR/run]
   --libdir=DIRobject code libraries [EPREFIX/lib]
   --includedir=DIRC header files [PREFIX/include]
   --oldincludedir=DIR C header files 

[PATCH 2/2] Add assert for type on tree_nonzero_bits

[apinski--- via Gcc-patches]

From: Andrew Pinski 

Right now anyone could call tree_nonzero_bits with
either complex or vector types and this will return
the wrong thing. So just assert that nobody calls
it with this.

OK? Bootstrapped and tested with no regressions on x86_64-linux-gnu.

gcc/ChangeLog:

* fold-const.cc (tree_nonzero_bits): Add
assert.
---
 gcc/fold-const.cc | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/gcc/fold-const.cc b/gcc/fold-const.cc
index 7e1ea58518b..3ccac9b28df 100644
--- a/gcc/fold-const.cc
+++ b/gcc/fold-const.cc
@@ -16567,6 +16567,9 @@ c_getstr (tree str)
 wide_int
 tree_nonzero_bits (const_tree t)
 {
+  gcc_assert (TREE_CODE (TREE_TYPE (t)) != VECTOR_TYPE
+ && TREE_CODE (TREE_TYPE (t)) != COMPLEX_TYPE);
+
   switch (TREE_CODE (t))
 {
 case INTEGER_CST:
-- 
2.17.1

[PATCH 0/2] tree_nonzero_bits vs vector and complex types

[apinski--- via Gcc-patches]

From: Andrew Pinski 


While looking at older unconfirmed bug reports, I noticed there was
an ubsan found issue and noticed tree_nonzero_bits was being called with
a vector type. How ubsan found it was at the end of tree_nonzero_bits,
did "return wi::shwi (-1, TYPE_PRECISION (TREE_TYPE (t)));" and
it was with a vector of 1 elements which meant precision was 0
as precision stores the log2 of the number of elements in a vector.

Anyways we want to catch these kind of errors of calling tree_nonzero_bits
with a vector or a complex type. And fix the places where it is called.

Thanks,
Andrew Pinski


Andrew Pinski (2):
  Fix PR 105532: match.pd patterns calling tree_nonzero_bits with vector
types
  Add assert for type on tree_nonzero_bits

 gcc/fold-const.cc |  3 +++
 gcc/match.pd  | 25 +++
 .../gcc.c-torture/compile/vector-shift-1.c|  8 ++
 3 files changed, 25 insertions(+), 11 deletions(-)
 create mode 100644 gcc/testsuite/gcc.c-torture/compile/vector-shift-1.c

-- 
2.17.1

[PATCH 1/2] Fix PR 105532: match.pd patterns calling tree_nonzero_bits with vector types

[apinski--- via Gcc-patches]

From: Andrew Pinski 

Even though this PR was reported with an ubsan issue, the problem is
tree_nonzero_bits is being called with an expression which is a vector type.
This fixes three patterns I noticed which does that.
And adds a testcase for one of the patterns.

OK? Bootstrapped and tested on x86_64-linux-gnu with no regressions

gcc/ChangeLog:

PR tree-optimization/105532
* match.pd (~(X >> Y) -> ~X >> Y): Check if it is an integral
type before calling tree_nonzero_bits.
(popcount(X) + popcount(Y)): Likewise.
(popcount(X)): Likewise.

gcc/testsuite/ChangeLog:

* gcc.c-torture/compile/vector-shift-1.c: New test.
---
 gcc/match.pd  | 25 +++
 .../gcc.c-torture/compile/vector-shift-1.c|  8 ++
 2 files changed, 22 insertions(+), 11 deletions(-)
 create mode 100644 gcc/testsuite/gcc.c-torture/compile/vector-shift-1.c

diff --git a/gcc/match.pd b/gcc/match.pd
index 194ba8f5188..5833e05a926 100644
--- a/gcc/match.pd
+++ b/gcc/match.pd
@@ -1371,7 +1371,8 @@ DEFINE_INT_AND_FLOAT_ROUND_FN (RINT)
/* For logical right shifts, this is possible only if @0 doesn't
   have MSB set and the logical right shift is changed into
   arithmetic shift.  */
-   (if (!wi::neg_p (tree_nonzero_bits (@0)))
+   (if (INTEGRAL_TYPE_P (type)
+&& !wi::neg_p (tree_nonzero_bits (@0)))
 (with { tree stype = signed_type_for (TREE_TYPE (@0)); }
  (convert (rshift (bit_not! (convert:stype @0)) @1))
 
@@ -7518,7 +7519,8 @@ DEFINE_INT_AND_FLOAT_ROUND_FN (RINT)
 /* popcount(X) + popcount(Y) is popcount(X|Y) when X must be zero.  */
 (simplify
   (plus (POPCOUNT:s @0) (POPCOUNT:s @1))
-  (if (wi::bit_and (tree_nonzero_bits (@0), tree_nonzero_bits (@1)) == 0)
+  (if (INTEGRAL_TYPE_P (type)
+   && wi::bit_and (tree_nonzero_bits (@0), tree_nonzero_bits (@1)) == 0)
 (POPCOUNT (bit_ior @0 @1
 
 /* popcount(X) == 0 is X == 0, and related (in)equalities.  */
@@ -7550,15 +7552,16 @@ DEFINE_INT_AND_FLOAT_ROUND_FN (RINT)
 (for pfun (POPCOUNT PARITY)
   (simplify
 (pfun @0)
-(with { wide_int nz = tree_nonzero_bits (@0); }
-  (switch
-   (if (nz == 1)
- (convert @0))
-   (if (wi::popcount (nz) == 1)
- (with { tree utype = unsigned_type_for (TREE_TYPE (@0)); }
-   (convert (rshift:utype (convert:utype @0)
-  { build_int_cst (integer_type_node,
-   wi::ctz (nz)); }
+(if (INTEGRAL_TYPE_P (type))
+ (with { wide_int nz = tree_nonzero_bits (@0); }
+   (switch
+(if (nz == 1)
+  (convert @0))
+(if (wi::popcount (nz) == 1)
+  (with { tree utype = unsigned_type_for (TREE_TYPE (@0)); }
+(convert (rshift:utype (convert:utype @0)
+   { build_int_cst (integer_type_node,
+wi::ctz (nz)); })
 
 #if GIMPLE
 /* 64- and 32-bits branchless implementations of popcount are detected:
diff --git a/gcc/testsuite/gcc.c-torture/compile/vector-shift-1.c 
b/gcc/testsuite/gcc.c-torture/compile/vector-shift-1.c
new file mode 100644
index 000..142ea56d5bb
--- /dev/null
+++ b/gcc/testsuite/gcc.c-torture/compile/vector-shift-1.c
@@ -0,0 +1,8 @@
+typedef unsigned char __attribute__((__vector_size__ (1))) U;
+
+U
+foo (U u)
+{
+  u = u == u;
+  return (~(u >> 255));
+}
-- 
2.17.1

[PATCH] Use simple_dce_from_worklist with match_simplify_replacement.

[apinski--- via Gcc-patches]

From: Andrew Pinski 

This is a simple patch to do some DCE after a successful
match and simplify replacement in PHI-OPT. match and simplify
likes to generate some extra statements which should be cleaned
up.

OK? Bootstrapped and tested on x86_64-linux with no regressions.

Thanks,
Andrew Pinski

gcc/ChangeLog:

* tree-ssa-phiopt.cc: Include tree-ssa-dce.h
(replace_phi_edge_with_variable):
New argument, dce_ssa_names. Call simple_dce_from_worklist.
(match_simplify_replacement): If we inserted a sequence,
mark the lhs of the new sequence to be possible dce.
Always move the statement and mark the lhs (if it is a name)
as possible to remove.
---
 gcc/tree-ssa-phiopt.cc | 35 ++-
 1 file changed, 26 insertions(+), 9 deletions(-)

diff --git a/gcc/tree-ssa-phiopt.cc b/gcc/tree-ssa-phiopt.cc
index 925bd7d..996700b 100644
--- a/gcc/tree-ssa-phiopt.cc
+++ b/gcc/tree-ssa-phiopt.cc
@@ -53,6 +53,7 @@ along with GCC; see the file COPYING3.  If not see
 #include "gimple-match.h"
 #include "dbgcnt.h"
 #include "tree-ssa-propagate.h"
+#include "tree-ssa-dce.h"
 
 static unsigned int tree_ssa_phiopt_worker (bool, bool, bool);
 static bool two_value_replacement (basic_block, basic_block, edge, gphi *,
@@ -74,7 +75,6 @@ static bool cond_store_replacement (basic_block, basic_block, 
edge, edge,
hash_set *);
 static bool cond_if_else_store_replacement (basic_block, basic_block, 
basic_block);
 static hash_set * get_non_trapping ();
-static void replace_phi_edge_with_variable (basic_block, edge, gphi *, tree);
 static void hoist_adjacent_loads (basic_block, basic_block,
  basic_block, basic_block);
 static bool gate_hoist_loads (void);
@@ -402,7 +402,8 @@ tree_ssa_phiopt_worker (bool do_store_elim, bool 
do_hoist_loads, bool early_p)
 
 static void
 replace_phi_edge_with_variable (basic_block cond_block,
-   edge e, gphi *phi, tree new_tree)
+   edge e, gphi *phi, tree new_tree,
+   bitmap dce_ssa_names = auto_bitmap())
 {
   basic_block bb = gimple_bb (phi);
   gimple_stmt_iterator gsi;
@@ -477,6 +478,8 @@ replace_phi_edge_with_variable (basic_block cond_block,
gimple_cond_make_true (cond);
 }
 
+  simple_dce_from_worklist (dce_ssa_names);
+
   statistics_counter_event (cfun, "Replace PHI with variable", 1);
 
   if (dump_file && (dump_flags & TDF_DETAILS))
@@ -986,6 +989,7 @@ match_simplify_replacement (basic_block cond_bb, 
basic_block middle_bb,
   gimple_seq seq = NULL;
   tree result;
   gimple *stmt_to_move = NULL;
+  auto_bitmap inserted_exprs;
 
   /* Special case A ? B : B as this will always simplify to B. */
   if (operand_equal_for_phi_arg_p (arg0, arg1))
@@ -1060,14 +1064,22 @@ match_simplify_replacement (basic_block cond_bb, 
basic_block middle_bb,
   gsi = gsi_last_bb (cond_bb);
   /* Insert the sequence generated from gimple_simplify_phiopt.  */
   if (seq)
+{
+  // Mark the lhs of the new statements maybe for dce
+  gimple_stmt_iterator gsi1 = gsi_start (seq);
+  for (; !gsi_end_p (gsi1); gsi_next ())
+   {
+ gimple *stmt = gsi_stmt (gsi1);
+ tree name = gimple_get_lhs (stmt);
+ if (name && TREE_CODE (name) == SSA_NAME)
+   bitmap_set_bit (inserted_exprs, SSA_NAME_VERSION (name));
+   }
 gsi_insert_seq_before (, seq, GSI_CONTINUE_LINKING);
+  }
 
-  /* If there was a statement to move and the result of the statement
- is going to be used, move it to right before the original
- conditional.  */
-  if (stmt_to_move
-  && (gimple_assign_lhs (stmt_to_move) == result
- || !has_single_use (gimple_assign_lhs (stmt_to_move
+  /* If there was a statement to move, move it to right before
+ the original conditional.  */
+  if (stmt_to_move)
 {
   if (dump_file && (dump_flags & TDF_DETAILS))
{
@@ -1075,12 +1087,17 @@ match_simplify_replacement (basic_block cond_bb, 
basic_block middle_bb,
  print_gimple_stmt (dump_file, stmt_to_move, 0,
   TDF_VOPS|TDF_MEMSYMS);
}
+
+  tree name = gimple_get_lhs (stmt_to_move);
+  // Mark the name to be renamed if there is one.
+  if (name && TREE_CODE (name) == SSA_NAME)
+   bitmap_set_bit (inserted_exprs, SSA_NAME_VERSION (name));
   gimple_stmt_iterator gsi1 = gsi_for_stmt (stmt_to_move);
   gsi_move_before (, );
   reset_flow_sensitive_info (gimple_assign_lhs (stmt_to_move));
 }
 
-  replace_phi_edge_with_variable (cond_bb, e1, phi, result);
+  replace_phi_edge_with_variable (cond_bb, e1, phi, result, inserted_exprs);
 
   /* Add Statistic here even though replace_phi_edge_with_variable already
  does it as we want to be able to count when match-simplify happens vs
-- 
1.8.3.1

[PATCH 3/3] Fix PR 106690: enable effective_target_bswap for RISCV targets with ZBB enabled by default

[apinski--- via Gcc-patches]

From: Andrew Pinski 

While looking for testcases to quickly test, I Noticed that
check_effective_target_bswap was not enabled for riscv when
ZBB is enabled. This patch checks if ZBB is enabled when
targeting RISCV* for bswap.

OK? Ran the testsuite for riscv32-linux-gnu both with and without ZBB enabled.

PR testsuite/106690
gcc/testsuite/ChangeLog:

* lib/target-supports.exp (check_effective_target_bswap):
Return true if riscv and ZBB ISA extension is enabled.

Change-Id: I521c91e7fc1a54faa0c8399b685248690022278b
---
 gcc/testsuite/lib/target-supports.exp | 7 +++
 1 file changed, 7 insertions(+)

diff --git a/gcc/testsuite/lib/target-supports.exp 
b/gcc/testsuite/lib/target-supports.exp
index 04a2a8e8659..0f1e1af31e9 100644
--- a/gcc/testsuite/lib/target-supports.exp
+++ b/gcc/testsuite/lib/target-supports.exp
@@ -8646,6 +8646,13 @@ proc check_effective_target_bswap { } {
 || [istarget powerpc*-*-*]
 || [istarget rs6000-*-*]
 || [istarget s390*-*-*]
+|| ([istarget riscv*-*-*]
+&& [check_no_compiler_messages_nocache riscv_zbb object {
+#if __riscv_zbb  <= 0
+#error ZBB is not enabled
+#endif
+int i;
+} ""])
 || ([istarget arm*-*-*]
 && [check_no_compiler_messages_nocache arm_v6_or_later object {
 #if __ARM_ARCH < 6
-- 
2.17.1

[PATCH 1/3] Fix PR 106600: __builtin_bswap32 is not hooked up for ZBB for 32bit

[apinski--- via Gcc-patches]

From: Andrew Pinski 

The problem here is the bswap2 pattern had a check for TARGET_64BIT
but then used the X iterator. Since the X iterator is either SI or DI depending
on the setting TARGET_64BIT, there is no reason for the TARGET_64BIT.

OK? Built and tested on both riscv32-linux-gnu and riscv64-linux-gnu.

Thanks,
Andrew Pinski

gcc/ChangeLog:

PR target/106600
* config/riscv/bitmanip.md (bswap2): Remove
condition on TARGET_64BIT as X is already conditional there.

gcc/testsuite/ChangeLog:

PR target/106600
* gcc.target/riscv/zbb_32_bswap-1.c: New test.
* gcc.target/riscv/zbb_bswap-1.c: New test.

Change-Id: Iba3187e5620b0f291f7c38aab597f367b47a22c5
---
 gcc/config/riscv/bitmanip.md|  2 +-
 gcc/testsuite/gcc.target/riscv/zbb_32_bswap-1.c | 11 +++
 gcc/testsuite/gcc.target/riscv/zbb_bswap-1.c| 11 +++
 3 files changed, 23 insertions(+), 1 deletion(-)
 create mode 100644 gcc/testsuite/gcc.target/riscv/zbb_32_bswap-1.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/zbb_bswap-1.c

diff --git a/gcc/config/riscv/bitmanip.md b/gcc/config/riscv/bitmanip.md
index d1570ce8508..c7ba667f87a 100644
--- a/gcc/config/riscv/bitmanip.md
+++ b/gcc/config/riscv/bitmanip.md
@@ -272,7 +272,7 @@ (define_insn "rotlsi3_sext"
 (define_insn "bswap2"
   [(set (match_operand:X 0 "register_operand" "=r")
 (bswap:X (match_operand:X 1 "register_operand" "r")))]
-  "TARGET_64BIT && TARGET_ZBB"
+  "TARGET_ZBB"
   "rev8\t%0,%1"
   [(set_attr "type" "bitmanip")])
 
diff --git a/gcc/testsuite/gcc.target/riscv/zbb_32_bswap-1.c 
b/gcc/testsuite/gcc.target/riscv/zbb_32_bswap-1.c
new file mode 100644
index 000..3ff7d9de409
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/zbb_32_bswap-1.c
@@ -0,0 +1,11 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv32gc_zbb -mabi=ilp32" } */
+/* { dg-skip-if "" { *-*-* } { "-O0" } } */
+
+int foo(int n)
+{
+  return __builtin_bswap32(n);
+}
+
+/* { dg-final { scan-assembler "rev8" } } */
+
diff --git a/gcc/testsuite/gcc.target/riscv/zbb_bswap-1.c 
b/gcc/testsuite/gcc.target/riscv/zbb_bswap-1.c
new file mode 100644
index 000..20feded0df2
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/zbb_bswap-1.c
@@ -0,0 +1,11 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gc_zbb -mabi=lp64" } */
+/* { dg-skip-if "" { *-*-* } { "-O0" } } */
+
+int foo(int n)
+{
+  return __builtin_bswap32(n);
+}
+
+/* { dg-final { scan-assembler "rev8" } } */
+
-- 
2.17.1

[PATCH 2/3] Fix PR 106601: __builtin_bswap16 code gen could be improved with ZBB enabled

[apinski--- via Gcc-patches]

From: Andrew Pinski 

The default expansion for bswap16 is two extractions (shift/and)
followed by an insertation (ior) and then a zero extend. This can be improved
with ZBB enabled to just full byteswap followed by a (logical) shift right.
This patch adds a new pattern for this which does that.

OK? Built and tested on riscv32-linux-gnu and riscv64-linux-gnu.

gcc/ChangeLog:

PR target/106601
* config/riscv/bitmanip.md (bswaphi2): New pattern.

gcc/testsuite/ChangeLog:

PR target/106601
* gcc.target/riscv/zbb_32_bswap-2.c: New test.
* gcc.target/riscv/zbb_bswap-2.c: New test.

Change-Id: If61362c14664cf8685da17779217033689878f86
---
 gcc/config/riscv/bitmanip.md  | 24 +++
 .../gcc.target/riscv/zbb_32_bswap-2.c | 12 ++
 gcc/testsuite/gcc.target/riscv/zbb_bswap-2.c  | 12 ++
 3 files changed, 48 insertions(+)
 create mode 100644 gcc/testsuite/gcc.target/riscv/zbb_32_bswap-2.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/zbb_bswap-2.c

diff --git a/gcc/config/riscv/bitmanip.md b/gcc/config/riscv/bitmanip.md
index c7ba667f87a..c4383285d81 100644
--- a/gcc/config/riscv/bitmanip.md
+++ b/gcc/config/riscv/bitmanip.md
@@ -276,6 +276,30 @@ (define_insn "bswap2"
   "rev8\t%0,%1"
   [(set_attr "type" "bitmanip")])
 
+;; HI bswap can be emulated using SI/DI bswap followed
+;; by a logical shift right
+;; SI bswap for TARGET_64BIT is already similarly in
+;; the common code.
+(define_expand "bswaphi2"
+  [(set (match_operand:HI 0 "register_operand" "=r")
+(bswap:HI (match_operand:HI 1 "register_operand" "r")))]
+  "TARGET_ZBB"
+{
+  rtx tmp = gen_reg_rtx (word_mode);
+  rtx newop1 = gen_lowpart (word_mode, operands[1]);
+  if (TARGET_64BIT)
+emit_insn (gen_bswapdi2 (tmp, newop1));
+  else
+emit_insn (gen_bswapsi2 (tmp, newop1));
+  rtx tmp1 = gen_reg_rtx (word_mode);
+  if (TARGET_64BIT)
+emit_insn (gen_lshrdi3 (tmp1, tmp, GEN_INT (64 - 16)));
+  else
+emit_insn (gen_lshrsi3 (tmp1, tmp, GEN_INT (32 - 16)));
+  emit_move_insn (operands[0], gen_lowpart (HImode, tmp1));
+  DONE;
+})
+
 (define_insn "3"
   [(set (match_operand:X 0 "register_operand" "=r")
 (bitmanip_minmax:X (match_operand:X 1 "register_operand" "r")
diff --git a/gcc/testsuite/gcc.target/riscv/zbb_32_bswap-2.c 
b/gcc/testsuite/gcc.target/riscv/zbb_32_bswap-2.c
new file mode 100644
index 000..679b34c4e41
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/zbb_32_bswap-2.c
@@ -0,0 +1,12 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv32gc_zbb -mabi=ilp32" } */
+/* { dg-skip-if "" { *-*-* } { "-O0" } } */
+
+int foo(int n)
+{
+  return __builtin_bswap16(n);
+}
+
+/* { dg-final { scan-assembler "rev8" } } */
+/* { dg-final { scan-assembler "srli" } } */
+
diff --git a/gcc/testsuite/gcc.target/riscv/zbb_bswap-2.c 
b/gcc/testsuite/gcc.target/riscv/zbb_bswap-2.c
new file mode 100644
index 000..c358f6683f3
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/zbb_bswap-2.c
@@ -0,0 +1,12 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gc_zbb -mabi=lp64" } */
+/* { dg-skip-if "" { *-*-* } { "-O0" } } */
+
+int foo(int n)
+{
+  return __builtin_bswap16(n);
+}
+
+/* { dg-final { scan-assembler "rev8" } } */
+/* { dg-final { scan-assembler "srli" } } */
+
-- 
2.17.1

[PATCH 0/3] [RISCV] Improve bswap for ZBB

[apinski--- via Gcc-patches]

From: Andrew Pinski 

Just some improvements for bswap and ZBB including a testsuite change that will
allow more testing to happen.

Thanks,
Andrew Pinski


Andrew Pinski (3):
  Fix PR 106600: __builtin_bswap32 is not hooked up for ZBB for 32bit
  Fix PR 106601: __builtin_bswap16 code gen could be improved with ZBB
enabled
  Fix PR 106690: enable effective_target_bswap for RISCV targets with
ZBB enabled by default

 gcc/config/riscv/bitmanip.md  | 26 ++-
 .../gcc.target/riscv/zbb_32_bswap-1.c | 11 
 .../gcc.target/riscv/zbb_32_bswap-2.c | 12 +
 gcc/testsuite/gcc.target/riscv/zbb_bswap-1.c  | 11 
 gcc/testsuite/gcc.target/riscv/zbb_bswap-2.c  | 12 +
 gcc/testsuite/lib/target-supports.exp |  7 +
 6 files changed, 78 insertions(+), 1 deletion(-)
 create mode 100644 gcc/testsuite/gcc.target/riscv/zbb_32_bswap-1.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/zbb_32_bswap-2.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/zbb_bswap-1.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/zbb_bswap-2.c

-- 
2.17.1

[PATCH 05/10] [RISCV] Add %~ to print w if TARGET_64BIT and use it

[apinski--- via Gcc-patches]

From: Andrew Pinski 

To make things easier and more maintainable, we need to
add support printing out w if TARGET_64BIT so this patch
adds %~ to do that, similar how the x86 backend uses %~
to print out i/f for TARGET_AVX2. We could have chosen any
punctuation symbol but ~ looks the closest to w.

OK? Build and tested for riscv64-linux-gnu and riscv32-linux-gnu with no 
regressions.

Thanks,
Andrew Pinski

gcc/ChangeLog:

* config/riscv/riscv.cc (riscv_print_operand):
Handle '~'.
(riscv_print_operand_punct_valid_p): New function
(TARGET_PRINT_OPERAND_PUNCT_VALID_P): Define.
* config/riscv/bitmanip.md (si2/clz_ctz_pcnt):
Use %~ instead of conditional the pattern on TARGET_64BIT.
(rotrsi3): Likewise.
(rotlsi3): Likewise.
* config/riscv/riscv.md: Add ~ to the list of modifiers.
(addsi3): Use %~ instead of conditional the pattern on TARGET_64BIT.
(subsi3): Likewise.
(negsi2): Likewise.
(mulsi3): Likewise.
(optab>si3/any_div): Likewise.
(*addhi3): Likewise.
(si3/any_shift): Likewise.
---
 gcc/config/riscv/bitmanip.md |  6 +++---
 gcc/config/riscv/riscv.cc| 19 +++
 gcc/config/riscv/riscv.md| 15 ---
 3 files changed, 30 insertions(+), 10 deletions(-)

diff --git a/gcc/config/riscv/bitmanip.md b/gcc/config/riscv/bitmanip.md
index 3329dd54eb6..ebd6eee1a22 100644
--- a/gcc/config/riscv/bitmanip.md
+++ b/gcc/config/riscv/bitmanip.md
@@ -143,7 +143,7 @@ (define_insn "si2"
   [(set (match_operand:SI 0 "register_operand" "=r")
 (clz_ctz_pcnt:SI (match_operand:SI 1 "register_operand" "r")))]
   "TARGET_ZBB"
-  { return TARGET_64BIT ? "w\t%0,%1" : 
"\t%0,%1"; }
+  "%~\t%0,%1"
   [(set_attr "type" "bitmanip")
(set_attr "mode" "SI")])
 
@@ -201,7 +201,7 @@ (define_insn "rotrsi3"
(rotatert:SI (match_operand:SI 1 "register_operand" "r")
 (match_operand:QI 2 "arith_operand" "rI")))]
   "TARGET_ZBB"
-  { return TARGET_64BIT ? "ror%i2w\t%0,%1,%2" : "ror%i2\t%0,%1,%2"; }
+  "ror%i2%~\t%0,%1,%2"
   [(set_attr "type" "bitmanip")])
 
 (define_insn "rotrdi3"
@@ -225,7 +225,7 @@ (define_insn "rotlsi3"
(rotate:SI (match_operand:SI 1 "register_operand" "r")
   (match_operand:QI 2 "register_operand" "r")))]
   "TARGET_ZBB"
-  { return TARGET_64BIT ? "rolw\t%0,%1,%2" : "rol\t%0,%1,%2"; }
+  "rol%~\t%0,%1,%2"
   [(set_attr "type" "bitmanip")])
 
 (define_insn "rotldi3"
diff --git a/gcc/config/riscv/riscv.cc b/gcc/config/riscv/riscv.cc
index 189be5e4e6f..22d0f6d604c 100644
--- a/gcc/config/riscv/riscv.cc
+++ b/gcc/config/riscv/riscv.cc
@@ -3731,12 +3731,22 @@ riscv_memmodel_needs_release_fence (enum memmodel model)
'i' Print i if the operand is not a register.
'S' Print shift-index of single-bit mask OP.
'T' Print shift-index of inverted single-bit mask OP.
+   '~' Print w if TARGET_64BIT is true; otherwise not print anything.
 
Note please keep this list and the list in riscv.md in sync.  */
 
 static void
 riscv_print_operand (FILE *file, rtx op, int letter)
 {
+  /* `~` does not take an operand so op will be null
+ Check for before accessing op.
+  */
+  if (letter == '~')
+{
+  if (TARGET_64BIT)
+   fputc('w', file);
+  return;
+}
   machine_mode mode = GET_MODE (op);
   enum rtx_code code = GET_CODE (op);
 
@@ -3812,6 +3822,13 @@ riscv_print_operand (FILE *file, rtx op, int letter)
 }
 }
 
+/* Implement TARGET_PRINT_OPERAND_PUNCT_VALID_P */
+static bool
+riscv_print_operand_punct_valid_p (unsigned char code)
+{
+  return (code == '~');
+}
+
 /* Implement TARGET_PRINT_OPERAND_ADDRESS.  */
 
 static void
@@ -5900,6 +5917,8 @@ riscv_init_libfuncs (void)
 #define TARGET_PRINT_OPERAND riscv_print_operand
 #undef TARGET_PRINT_OPERAND_ADDRESS
 #define TARGET_PRINT_OPERAND_ADDRESS riscv_print_operand_address
+#undef TARGET_PRINT_OPERAND_PUNCT_VALID_P
+#define TARGET_PRINT_OPERAND_PUNCT_VALID_P riscv_print_operand_punct_valid_p
 
 #undef TARGET_SETUP_INCOMING_VARARGS
 #define TARGET_SETUP_INCOMING_VARARGS riscv_setup_incoming_varargs
diff --git a/gcc/config/riscv/riscv.md b/gcc/config/riscv/riscv.md
index aad2836d179..30cd07dc6f5 100644
--- a/gcc/config/riscv/riscv.md
+++ b/gcc/config/riscv/riscv.md
@@ -32,6 +32,7 @@
 ;; i -- Print i if the operand is not a register.
 ;; S -- Print shift-index of single-bit mask OP.
 ;; T -- Print shift-index of inverted single-bit mask OP.
+;; ~ -- Print w if TARGET_64BIT is true; otherwise not print anything.
 
 (define_c_enum "unspec" [
   ;; Override return address for exception handling.
@@ -312,7 +313,7 @@ (define_insn "addsi3"
(plus:SI (match_operand:SI 1 "register_operand" " r,r")
 (match_operand:SI 2 "arith_operand"" r,I")))]
   ""
-  { return TARGET_64BIT ? "add%i2w\t%0,%1,%2" : "add%i2\t%0,%1,%2"; }
+  "add%i2%~\t%0,%1,%2"
   [(set_attr "type" "arith")
(set_attr "mode" "SI")])
 
@@ -452,7 +453,7 @@ 

[PATCH 07/10] [RISCV] Use a constraint for bset_mask and bset_1_mask

[apinski--- via Gcc-patches]

From: Andrew Pinski 

A constraint here just makes it easier to understand what the
operands are.

OK? Built and tested on riscv32-linux-gnu and riscv64-linux-gnu with
--with-arch=rvNimafdc_zba_zbb_zbc_zbs (where N is 32 and 64).

Thanks,
Andrew Pinski

gcc/ChangeLog:

* config/riscv/constraints.md (DsS): New constraint.
(DsD): New constraint.
* config/riscv/iterators.md (shiftm1c): New iterator.
* config/riscv/bitmanip.md (*bset_mask):
Use shiftm1c.
(*bset_1_mask): Likewise.
---
 gcc/config/riscv/bitmanip.md|  4 ++--
 gcc/config/riscv/constraints.md | 12 
 gcc/config/riscv/iterators.md   |  1 +
 3 files changed, 15 insertions(+), 2 deletions(-)

diff --git a/gcc/config/riscv/bitmanip.md b/gcc/config/riscv/bitmanip.md
index 73a36f7751b..d362f526e79 100644
--- a/gcc/config/riscv/bitmanip.md
+++ b/gcc/config/riscv/bitmanip.md
@@ -273,7 +273,7 @@ (define_insn "*bset_mask"
(ior:X (ashift:X (const_int 1)
 (subreg:QI
  (and:X (match_operand:X 2 "register_operand" "r")
-(match_operand 3 "" "i")) 0))
+(match_operand 3 "" 
"")) 0))
   (match_operand:X 1 "register_operand" "r")))]
   "TARGET_ZBS"
   "bset\t%0,%1,%2"
@@ -292,7 +292,7 @@ (define_insn "*bset_1_mask"
(ashift:X (const_int 1)
  (subreg:QI
   (and:X (match_operand:X 1 "register_operand" "r")
- (match_operand 2 "" "i")) 0)))]
+ (match_operand 2 "" "")) 0)))]
   "TARGET_ZBS"
   "bset\t%0,x0,%1"
   [(set_attr "type" "bitmanip")])
diff --git a/gcc/config/riscv/constraints.md b/gcc/config/riscv/constraints.md
index 61b84875fd9..444870ad060 100644
--- a/gcc/config/riscv/constraints.md
+++ b/gcc/config/riscv/constraints.md
@@ -60,6 +60,18 @@ (define_constraint "Ds3"
   (and (match_code "const_int")
(match_test "IN_RANGE (ival, 1, 3)")))
 
+(define_constraint "DsS"
+  "@internal
+   31 immediate"
+  (and (match_code "const_int")
+   (match_test "ival == 31")))
+
+(define_constraint "DsD"
+  "@internal
+   63 immediate"
+  (and (match_code "const_int")
+   (match_test "ival == 63")))
+
 ;; Floating-point constant +0.0, used for FCVT-based moves when FMV is
 ;; not available in RV32.
 (define_constraint "G"
diff --git a/gcc/config/riscv/iterators.md b/gcc/config/riscv/iterators.md
index 6c8a6d2dd59..be0d5390307 100644
--- a/gcc/config/riscv/iterators.md
+++ b/gcc/config/riscv/iterators.md
@@ -115,6 +115,7 @@ (define_mode_attr HALFMODE [(DF "SI") (DI "SI") (TF "DI")])
 
 ; bitmanip mode attribute
 (define_mode_attr shiftm1 [(SI "const31_operand") (DI "const63_operand")])
+(define_mode_attr shiftm1p [(SI "DsS") (DI "DsD")])
 
 ;; ---
 ;; Code Iterators
-- 
2.27.0

[PATCH 10/10] [RISCV] Fix PR 106632 and PR 106588 a few constraints in bitmanip.md

[apinski--- via Gcc-patches]

From: Andrew Pinski 

The constraints should be n instead of i. Also there
needs to a check for out of bounds zero_extract for
*bexti.

gcc/ChangeLog:

PR target/106632
PR target/106588
* config/riscv/bitmanip.md (*shNadduw): Use n constraint
instead of i.
(*slliuw): Likewise.
(*bexti): Likewise. Also add a check for operands[2] to be less
than the mode bitsize.
---
 gcc/config/riscv/bitmanip.md | 7 ---
 1 file changed, 4 insertions(+), 3 deletions(-)

diff --git a/gcc/config/riscv/bitmanip.md b/gcc/config/riscv/bitmanip.md
index 026299d6703..ecf5b51b533 100644
--- a/gcc/config/riscv/bitmanip.md
+++ b/gcc/config/riscv/bitmanip.md
@@ -44,7 +44,7 @@ (define_insn "*shNadduw"
(plus:DI
  (and:DI (ashift:DI (match_operand:DI 1 "register_operand" "r")
 (match_operand:QI 2 "imm123_operand" "Ds3"))
-(match_operand 3 "immediate_operand" ""))
+(match_operand 3 "immediate_operand" "n"))
  (match_operand:DI 4 "register_operand" "r")))]
   "TARGET_64BIT && TARGET_ZBA
&& (INTVAL (operands[3]) >> INTVAL (operands[2])) == 0x"
@@ -110,7 +110,7 @@ (define_insn "*slliuw"
   [(set (match_operand:DI 0 "register_operand" "=r")
(and:DI (ashift:DI (match_operand:DI 1 "register_operand" "r")
   (match_operand:QI 2 "immediate_operand" "I"))
-   (match_operand 3 "immediate_operand" "")))]
+   (match_operand 3 "immediate_operand" "n")))]
   "TARGET_64BIT && TARGET_ZBA
&& (INTVAL (operands[3]) >> INTVAL (operands[2])) == 0x"
   "slli.uw\t%0,%1,%2"
@@ -354,6 +354,7 @@ (define_insn "*bexti"
(zero_extract:X (match_operand:X 1 "register_operand" "r")
(const_int 1)
(match_operand 2 "immediate_operand" "i")))]
-  "TARGET_ZBS"
+   (match_operand 2 "immediate_operand" "n")))]
+  "TARGET_ZBS && UINTVAL (operands[2]) < GET_MODE_BITSIZE (mode)"
   "bexti\t%0,%1,%2"
   [(set_attr "type" "bitmanip")])
-- 
2.27.0

[PATCH 09/10] [RISCV] Add constraints for not_single_bit_mask_operand/single_bit_mask_operand

[apinski--- via Gcc-patches]

From: Andrew Pinski 

Like a previous patch, just add constraints for predicates
not_single_bit_mask_operand and single_bit_mask_operand.

OK? Built and tested for riscv32-linux-gnu and riscv64-linux-gnu.

Thanks,
Andrew Pinski

gcc/ChangeLog:

* config/riscv/constraints.md (DbS): New constraint.
(DnS): New constraint.
* config/riscv/bitmanip.md (*bset_1_mask): Use new constraint.
(*bclr): Likewise.
(*binvi): Likewise.
---
 gcc/config/riscv/bitmanip.md|  6 +++---
 gcc/config/riscv/constraints.md | 10 ++
 2 files changed, 13 insertions(+), 3 deletions(-)

diff --git a/gcc/config/riscv/bitmanip.md b/gcc/config/riscv/bitmanip.md
index d362f526e79..026299d6703 100644
--- a/gcc/config/riscv/bitmanip.md
+++ b/gcc/config/riscv/bitmanip.md
@@ -300,7 +300,7 @@ (define_insn "*bset_1_mask"
 (define_insn "*bseti"
   [(set (match_operand:X 0 "register_operand" "=r")
(ior:X (match_operand:X 1 "register_operand" "r")
-  (match_operand 2 "single_bit_mask_operand" "i")))]
+  (match_operand:X 2 "single_bit_mask_operand" "DbS")))]
   "TARGET_ZBS"
   "bseti\t%0,%1,%S2"
   [(set_attr "type" "bitmanip")])
@@ -317,7 +317,7 @@ (define_insn "*bclr"
 (define_insn "*bclri"
   [(set (match_operand:X 0 "register_operand" "=r")
(and:X (match_operand:X 1 "register_operand" "r")
-  (match_operand 2 "not_single_bit_mask_operand" "i")))]
+  (match_operand:X 2 "not_single_bit_mask_operand" "DnS")))]
   "TARGET_ZBS"
   "bclri\t%0,%1,%T2"
   [(set_attr "type" "bitmanip")])
@@ -334,7 +334,7 @@ (define_insn "*binv"
 (define_insn "*binvi"
   [(set (match_operand:X 0 "register_operand" "=r")
(xor:X (match_operand:X 1 "register_operand" "r")
-  (match_operand 2 "single_bit_mask_operand" "i")))]
+  (match_operand:X 2 "single_bit_mask_operand" "DbS")))]
   "TARGET_ZBS"
   "binvi\t%0,%1,%S2"
   [(set_attr "type" "bitmanip")])
diff --git a/gcc/config/riscv/constraints.md b/gcc/config/riscv/constraints.md
index 444870ad060..2873d533cb5 100644
--- a/gcc/config/riscv/constraints.md
+++ b/gcc/config/riscv/constraints.md
@@ -72,6 +72,16 @@ (define_constraint "DsD"
   (and (match_code "const_int")
(match_test "ival == 63")))
 
+(define_constraint "DbS"
+  "@internal"
+  (and (match_code "const_int")
+   (match_test "SINGLE_BIT_MASK_OPERAND (ival)")))
+
+(define_constraint "DnS"
+  "@internal"
+  (and (match_code "const_int")
+   (match_test "SINGLE_BIT_MASK_OPERAND (~ival)")))
+
 ;; Floating-point constant +0.0, used for FCVT-based moves when FMV is
 ;; not available in RV32.
 (define_constraint "G"
-- 
2.27.0

[PATCH 08/10] [RISCV] Fix PR 106586: riscv32 vs ZBS

[apinski--- via Gcc-patches]

From: Andrew Pinski 

The problem here is two fold. With RISCV32, 32bit
const_int are always signed extended to 64bit in HWI.
So that means for SINGLE_BIT_MASK_OPERAND, it should
mask off the upper bits to see it is a single bit
for !TARGET_64BIT.
Plus there are a few locations which forget to call
trunc_int_for_mode when generating a SImode constant
so they are not sign extended correctly for HWI.
The predicates single_bit_mask_operand and
not_single_bit_mask_operand need get the same handling
as SINGLE_BIT_MASK_OPERAND so just use SINGLE_BIT_MASK_OPERAND.

OK? Built and tested on riscv32-linux-gnu and riscv64-linux-gnu with
--with-arch=rvNimafdc_zba_zbb_zbc_zbs where N is replaced with 32 or 64.

Thanks,
Andrew Pinski

gcc/ChangeLog:

PR target/106586
* config/riscv/predicates.md (single_bit_mask_operand):
Use SINGLE_BIT_MASK_OPERAND instead of directly calling pow2p_hwi.
(not_single_bit_mask_operand): Likewise.
* config/riscv/riscv.cc (riscv_build_integer_1): Don't special case
1<<31 for 32bits as it is already handled.
Call trunc_int_for_mode on the upper part after the subtraction.
(riscv_move_integer): Call trunc_int_for_mode before generating
the integer just make sure the constant has been sign extended
corectly.
(riscv_emit_int_compare): Call trunc_int_for_mode after doing the
addition for the new rhs.
* config/riscv/riscv.h (SINGLE_BIT_MASK_OPERAND): If !TARGET64BIT,
then mask off the upper 32bits of the HWI as it will be sign extended.
---
 gcc/config/riscv/predicates.md |  4 ++--
 gcc/config/riscv/riscv.cc  | 12 +---
 gcc/config/riscv/riscv.h   |  4 +++-
 3 files changed, 14 insertions(+), 6 deletions(-)

diff --git a/gcc/config/riscv/predicates.md b/gcc/config/riscv/predicates.md
index 2af7f661d6f..862e72b0983 100644
--- a/gcc/config/riscv/predicates.md
+++ b/gcc/config/riscv/predicates.md
@@ -226,11 +226,11 @@ (define_special_predicate "gpr_save_operation"
 ;; Predicates for the ZBS extension.
 (define_predicate "single_bit_mask_operand"
   (and (match_code "const_int")
-   (match_test "pow2p_hwi (INTVAL (op))")))
+   (match_test "SINGLE_BIT_MASK_OPERAND (UINTVAL (op))")))
 
 (define_predicate "not_single_bit_mask_operand"
   (and (match_code "const_int")
-   (match_test "pow2p_hwi (~INTVAL (op))")))
+   (match_test "SINGLE_BIT_MASK_OPERAND (~UINTVAL (op))")))
 
 (define_predicate "const31_operand"
   (and (match_code "const_int")
diff --git a/gcc/config/riscv/riscv.cc b/gcc/config/riscv/riscv.cc
index 22d0f6d604c..026c69ce40d 100644
--- a/gcc/config/riscv/riscv.cc
+++ b/gcc/config/riscv/riscv.cc
@@ -432,7 +432,7 @@ riscv_build_integer_1 (struct riscv_integer_op 
codes[RISCV_MAX_INTEGER_OPS],
 sign-extended (negative) representation (-1 << 31) for the
 value, if we want to build (1 << 31) in SImode.  This will
 then expand to an LUI instruction.  */
-  if (mode == SImode && value == (HOST_WIDE_INT_1U << 31))
+  if (TARGET_64BIT && mode == SImode && value == (HOST_WIDE_INT_1U << 31))
codes[0].value = (HOST_WIDE_INT_M1U << 31);
 
   return 1;
@@ -445,7 +445,11 @@ riscv_build_integer_1 (struct riscv_integer_op 
codes[RISCV_MAX_INTEGER_OPS],
   && (mode != HImode
  || value - low_part <= ((1 << (GET_MODE_BITSIZE (HImode) - 1)) - 1)))
 {
-  alt_cost = 1 + riscv_build_integer_1 (alt_codes, value - low_part, mode);
+  HOST_WIDE_INT upper_part = value - low_part;
+  if (mode != VOIDmode)
+   upper_part = trunc_int_for_mode (value - low_part, mode);
+
+  alt_cost = 1 + riscv_build_integer_1 (alt_codes, upper_part, mode);
   if (alt_cost < cost)
{
  alt_codes[alt_cost-1].code = PLUS;
@@ -1550,6 +1554,7 @@ riscv_move_integer (rtx temp, rtx dest, HOST_WIDE_INT 
value,
 x = riscv_split_integer (value, mode);
   else
 {
+  codes[0].value = trunc_int_for_mode (codes[0].value, mode);
   /* Apply each binary operation to X. */
   x = GEN_INT (codes[0].value);
 
@@ -1559,7 +1564,7 @@ riscv_move_integer (rtx temp, rtx dest, HOST_WIDE_INT 
value,
x = riscv_emit_set (temp, x);
  else
x = force_reg (mode, x);
-
+ codes[i].value = trunc_int_for_mode (codes[i].value, mode);
  x = gen_rtx_fmt_ee (codes[i].code, mode, x, GEN_INT (codes[i].value));
}
 }
@@ -2651,6 +2656,7 @@ riscv_emit_int_compare (enum rtx_code *code, rtx *op0, 
rtx *op1)
continue;
 
  new_rhs = rhs + (increment ? 1 : -1);
+ new_rhs = trunc_int_for_mode (new_rhs, GET_MODE (*op0));
  if (riscv_integer_cost (new_rhs) < riscv_integer_cost (rhs)
  && (rhs < 0) == (new_rhs < 0))
{
diff --git a/gcc/config/riscv/riscv.h b/gcc/config/riscv/riscv.h
index 4b07c5487c6..5394776eb50 100644
--- a/gcc/config/riscv/riscv.h
+++ b/gcc/config/riscv/riscv.h
@@ -535,7 

[PATCH 06/10] [RISCV] Use constraints/predicates instead of checking const_int directly for shNadd patterns

[apinski--- via Gcc-patches]

From: Andrew Pinski 

This simplifies the code by adding a predicate and a constraint for 1/2/3.
The aarch64 backend has a similar predicate called aarch64_shift_imm_
which they use there.

OK? Built and tested on riscv32-linux-gnu and riscv64-linux-gnu with no 
regressions.

Thanks,
Andrew Pinski

gcc/ChangeLog:

* config/riscv/constraints.md (Ds3): New constraint.
* config/riscv/predicates.md (imm123_operand): New predicate.
* config/riscv/bitmanip.md (*shNadd): Use Ds3 and imm123_operand.
(*shNadduw): Likewise.
---
 gcc/config/riscv/bitmanip.md| 8 +++-
 gcc/config/riscv/constraints.md | 6 ++
 gcc/config/riscv/predicates.md  | 5 +
 3 files changed, 14 insertions(+), 5 deletions(-)

diff --git a/gcc/config/riscv/bitmanip.md b/gcc/config/riscv/bitmanip.md
index ebd6eee1a22..73a36f7751b 100644
--- a/gcc/config/riscv/bitmanip.md
+++ b/gcc/config/riscv/bitmanip.md
@@ -32,10 +32,9 @@ (define_insn "*zero_extendsidi2_bitmanip"
 (define_insn "*shNadd"
   [(set (match_operand:X 0 "register_operand" "=r")
(plus:X (ashift:X (match_operand:X 1 "register_operand" "r")
- (match_operand:QI 2 "immediate_operand" "I"))
+ (match_operand:QI 2 "imm123_operand" "Ds3"))
(match_operand:X 3 "register_operand" "r")))]
-  "TARGET_ZBA
-   && (INTVAL (operands[2]) >= 1) && (INTVAL (operands[2]) <= 3)"
+  "TARGET_ZBA"
   "sh%2add\t%0,%1,%3"
   [(set_attr "type" "bitmanip")
(set_attr "mode" "")])
@@ -44,11 +43,10 @@ (define_insn "*shNadduw"
   [(set (match_operand:DI 0 "register_operand" "=r")
(plus:DI
  (and:DI (ashift:DI (match_operand:DI 1 "register_operand" "r")
-(match_operand:QI 2 "immediate_operand" "I"))
+(match_operand:QI 2 "imm123_operand" "Ds3"))
 (match_operand 3 "immediate_operand" ""))
  (match_operand:DI 4 "register_operand" "r")))]
   "TARGET_64BIT && TARGET_ZBA
-   && (INTVAL (operands[2]) >= 1) && (INTVAL (operands[2]) <= 3)
&& (INTVAL (operands[3]) >> INTVAL (operands[2])) == 0x"
   "sh%2add.uw\t%0,%1,%4"
   [(set_attr "type" "bitmanip")
diff --git a/gcc/config/riscv/constraints.md b/gcc/config/riscv/constraints.md
index bafa4188ccb..61b84875fd9 100644
--- a/gcc/config/riscv/constraints.md
+++ b/gcc/config/riscv/constraints.md
@@ -54,6 +54,12 @@ (define_constraint "L"
   (and (match_code "const_int")
(match_test "LUI_OPERAND (ival)")))
 
+(define_constraint "Ds3"
+  "@internal
+   1, 2 or 3 immediate"
+  (and (match_code "const_int")
+   (match_test "IN_RANGE (ival, 1, 3)")))
+
 ;; Floating-point constant +0.0, used for FCVT-based moves when FMV is
 ;; not available in RV32.
 (define_constraint "G"
diff --git a/gcc/config/riscv/predicates.md b/gcc/config/riscv/predicates.md
index 79e0c1d5589..2af7f661d6f 100644
--- a/gcc/config/riscv/predicates.md
+++ b/gcc/config/riscv/predicates.md
@@ -244,6 +244,11 @@ (define_predicate "imm5_operand"
   (and (match_code "const_int")
(match_test "INTVAL (op) < 5")))
 
+;; A const_int for sh1add/sh2add/sh3add
+(define_predicate "imm123_operand"
+  (and (match_code "const_int")
+   (match_test "IN_RANGE (INTVAL (op), 1, 3)")))
+
 ;; A CONST_INT operand that consists of a single run of consecutive set bits.
 (define_predicate "consecutive_bits_operand"
   (match_code "const_int")
-- 
2.27.0

[PATCH 01/10] [RISCV] Move iterators from riscv.md to iterators.md

[apinski--- via Gcc-patches]

From: Andrew Pinski 

This moves the iterators out from riscv.md to iterators.md
like most modern backends.
I have not moved the iterators from the other .md files yet.

OK? Build and tested on riscv64-linux-gnu and riscv32-linux-gnu.

Thanks,
Andrew Pinski

gcc/ChangeLog:

* config/riscv/riscv.md
(GPR): Move to new file.
(P, X, BR): Likewise.
(MOVE32, MOVE64, SHORT): Likewise.
(HISI, SUPERQI, SUBX): Likewise.
(ANYI, ANYF, SOFTF): Likewise.
(size, load, default_load): Likewise.
(softload, store, softstore): Likewise.
(reg, fmt, ifmt, amo): Likewise.
(UNITMODE, HALFMODE): Likewise.
(RINT, rint_pattern, rint_rm): Likewise.
(QUIET_COMPARISON, quiet_pattern, QUIET_PATTERN): Likewise.
(any_extend, any_shiftrt, any_shift): Likewise.
(any_bitwise): Likewise.
(any_div, any_mod): Likewise.
(any_gt, any_ge, any_lt, any_le): Likewise.
(u, su): Likewise.
(optab, insn): Likewise.
* config/riscv/iterators.md: New file.
---
 gcc/config/riscv/iterators.md | 212 ++
 1 file changed, 212 insertions(+)
 create mode 100644 gcc/config/riscv/iterators.md

diff --git a/gcc/config/riscv/iterators.md b/gcc/config/riscv/iterators.md
new file mode 100644
index 000..351aa7f3cea
--- /dev/null
+++ b/gcc/config/riscv/iterators.md
@@ -0,0 +1,212 @@
+;; Iterators for the machine description for RISC-V
+;; Copyright (C) 2011-2022 Free Software Foundation, Inc.
+
+;; This file is part of GCC.
+;;
+;; GCC is free software; you can redistribute it and/or modify it
+;; under the terms of the GNU General Public License as published by
+;; the Free Software Foundation; either version 3, or (at your option)
+;; any later version.
+;;
+;; GCC is distributed in the hope that it will be useful, but
+;; WITHOUT ANY WARRANTY; without even the implied warranty of
+;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+;; General Public License for more details.
+;;
+;; You should have received a copy of the GNU General Public License
+;; along with GCC; see the file COPYING3.  If not see
+;; .
+
+
+;; ---
+;; Mode Iterators
+;; ---
+
+;; This mode iterator allows 32-bit and 64-bit GPR patterns to be generated
+;; from the same template.
+(define_mode_iterator GPR [SI (DI "TARGET_64BIT")])
+
+;; This mode iterator allows :P to be used for patterns that operate on
+;; pointer-sized quantities.  Exactly one of the two alternatives will match.
+(define_mode_iterator P [(SI "Pmode == SImode") (DI "Pmode == DImode")])
+
+;; Likewise, but for XLEN-sized quantities.
+(define_mode_iterator X [(SI "!TARGET_64BIT") (DI "TARGET_64BIT")])
+
+;; Branches operate on XLEN-sized quantities, but for RV64 we accept
+;; QImode values so we can force zero-extension.
+(define_mode_iterator BR [(QI "TARGET_64BIT") SI (DI "TARGET_64BIT")])
+
+;; 32-bit moves for which we provide move patterns.
+(define_mode_iterator MOVE32 [SI])
+
+;; 64-bit modes for which we provide move patterns.
+(define_mode_iterator MOVE64 [DI DF])
+
+;; Iterator for sub-32-bit integer modes.
+(define_mode_iterator SHORT [QI HI])
+
+;; Iterator for HImode constant generation.
+(define_mode_iterator HISI [HI SI])
+
+;; Iterator for QImode extension patterns.
+(define_mode_iterator SUPERQI [HI SI (DI "TARGET_64BIT")])
+
+;; Iterator for hardware integer modes narrower than XLEN.
+(define_mode_iterator SUBX [QI HI (SI "TARGET_64BIT")])
+
+;; Iterator for hardware-supported integer modes.
+(define_mode_iterator ANYI [QI HI SI (DI "TARGET_64BIT")])
+
+;; Iterator for hardware-supported floating-point modes.
+(define_mode_iterator ANYF [(SF "TARGET_HARD_FLOAT")
+   (DF "TARGET_DOUBLE_FLOAT")
+   (HF "TARGET_ZFH")])
+
+;; Iterator for floating-point modes that can be loaded into X registers.
+(define_mode_iterator SOFTF [SF (DF "TARGET_64BIT") (HF "TARGET_ZFHMIN")])
+
+
+;; ---
+;; Mode attributes
+;; ---
+
+
+;; This attribute gives the length suffix for a sign- or zero-extension
+;; instruction.
+(define_mode_attr size [(QI "b") (HI "h")])
+
+;; Mode attributes for loads.
+(define_mode_attr load [(QI "lb") (HI "lh") (SI "lw") (DI "ld") (SF "flw") (HF 
"flh") (DF "fld")])
+
+;; Instruction names for integer loads that aren't explicitly sign or zero
+;; extended.  See riscv_output_move and LOAD_EXTEND_OP.
+(define_mode_attr default_load [(QI "lbu") (HI "lhu") (SI "lw") (DI "ld")])
+
+;; Mode attribute for FP loads into integer registers.
+(define_mode_attr softload [(HF "lh") (SF "lw") (DF "ld")])
+
+;; Instruction names for stores.
+(define_mode_attr store [(QI "sb") (HI "sh") 

[PATCH 03/10] [RISCV] Move iterators from sync.md to iterators.md

[apinski--- via Gcc-patches]

From: Andrew Pinski 

Like the previous two patches this moves the iterators
that are in sync.md to iterators.md.

OK? build and tested for riscv64-linux-gnu.

gcc/ChangeLog:

* config/riscv/sync.md (any_atomic, atomic_optab): Move to ...
* config/riscv/iterators.md: Here.
---
 gcc/config/riscv/iterators.md | 7 +++
 gcc/config/riscv/sync.md  | 4 
 2 files changed, 7 insertions(+), 4 deletions(-)

diff --git a/gcc/config/riscv/iterators.md b/gcc/config/riscv/iterators.md
index 54590f43193..6c8a6d2dd59 100644
--- a/gcc/config/riscv/iterators.md
+++ b/gcc/config/riscv/iterators.md
@@ -151,6 +151,9 @@ (define_code_iterator any_ge [ge geu])
 (define_code_iterator any_lt [lt ltu])
 (define_code_iterator any_le [le leu])
 
+; atomics code iterator
+(define_code_iterator any_atomic [plus ior xor and])
+
 ; bitmanip code iterators
 (define_code_iterator bitmanip_bitwise [and ior])
 
@@ -205,6 +208,10 @@ (define_code_attr insn [(ashift "sll")
(plus "add")
(minus "sub")])
 
+; atomics code attribute
+(define_code_attr atomic_optab
+  [(plus "add") (ior "or") (xor "xor") (and "and")])
+
 ; bitmanip code attributes
 (define_code_attr bitmanip_optab [(smin "smin")
  (smax "smax")
diff --git a/gcc/config/riscv/sync.md b/gcc/config/riscv/sync.md
index 86b41e6b00a..7deb290d9dc 100644
--- a/gcc/config/riscv/sync.md
+++ b/gcc/config/riscv/sync.md
@@ -27,10 +27,6 @@ (define_c_enum "unspec" [
   UNSPEC_MEMORY_BARRIER
 ])
 
-(define_code_iterator any_atomic [plus ior xor and])
-(define_code_attr atomic_optab
-  [(plus "add") (ior "or") (xor "xor") (and "and")])
-
 ;; Memory barriers.
 
 (define_expand "mem_thread_fence"
-- 
2.27.0

[PATCH 02/10] [RISCV] Move iterators from bitmanip.md to iterators.md

[apinski--- via Gcc-patches]

From: Andrew Pinski 

Just like the previous patch this move all of the iterators
of bitmanip.md to iterators.md.  All modern backends put the
iterators in iterators.md for easier access.

OK? Built and tested for riscv32-linux-gnu with 
--with-arch=rv32imafdc_zba_zbb_zbc_zbs.

Thanks,
Andrew Pinski

gcc/ChangeLog:

* config/riscv/bitmanip.md
(bitmanip_bitwise, bitmanip_minmax, clz_ctz_pcna, tbitmanip_optab,
bitmanip_insn, shiftm1: Move to ...
* config/riscv/iterators.md: Here.
---
 gcc/config/riscv/bitmanip.md  | 25 -
 gcc/config/riscv/iterators.md | 27 ++-
 2 files changed, 26 insertions(+), 26 deletions(-)

diff --git a/gcc/config/riscv/bitmanip.md b/gcc/config/riscv/bitmanip.md
index d1570ce8508..3329dd54eb6 100644
--- a/gcc/config/riscv/bitmanip.md
+++ b/gcc/config/riscv/bitmanip.md
@@ -17,31 +17,6 @@
 ;; along with GCC; see the file COPYING3.  If not see
 ;; .
 
-(define_code_iterator bitmanip_bitwise [and ior])
-
-(define_code_iterator bitmanip_minmax [smin umin smax umax])
-
-(define_code_iterator clz_ctz_pcnt [clz ctz popcount])
-
-(define_code_attr bitmanip_optab [(smin "smin")
- (smax "smax")
- (umin "umin")
- (umax "umax")
- (clz "clz")
- (ctz "ctz")
- (popcount "popcount")])
-
-
-(define_code_attr bitmanip_insn [(smin "min")
-(smax "max")
-(umin "minu")
-(umax "maxu")
-(clz "clz")
-(ctz "ctz")
-(popcount "cpop")])
-
-(define_mode_attr shiftm1 [(SI "const31_operand") (DI "const63_operand")])
-
 ;; ZBA extension.
 
 (define_insn "*zero_extendsidi2_bitmanip"
diff --git a/gcc/config/riscv/iterators.md b/gcc/config/riscv/iterators.md
index 351aa7f3cea..54590f43193 100644
--- a/gcc/config/riscv/iterators.md
+++ b/gcc/config/riscv/iterators.md
@@ -113,6 +113,9 @@ (define_mode_attr UNITMODE [(HF "HF") (SF "SF") (DF "DF")])
 ;; the controlling mode.
 (define_mode_attr HALFMODE [(DF "SI") (DI "SI") (TF "DI")])
 
+; bitmanip mode attribute
+(define_mode_attr shiftm1 [(SI "const31_operand") (DI "const63_operand")])
+
 ;; ---
 ;; Code Iterators
 ;; ---
@@ -148,11 +151,17 @@ (define_code_iterator any_ge [ge geu])
 (define_code_iterator any_lt [lt ltu])
 (define_code_iterator any_le [le leu])
 
+; bitmanip code iterators
+(define_code_iterator bitmanip_bitwise [and ior])
+
+(define_code_iterator bitmanip_minmax [smin umin smax umax])
+
+(define_code_iterator clz_ctz_pcnt [clz ctz popcount])
+
 ;; ---
 ;; Code Attributes
 ;; ---
 
-
 ;;  expands to an empty string when doing a signed operation and
 ;; "u" when doing an unsigned operation.
 (define_code_attr u [(sign_extend "") (zero_extend "u")
@@ -196,6 +205,22 @@ (define_code_attr insn [(ashift "sll")
(plus "add")
(minus "sub")])
 
+; bitmanip code attributes
+(define_code_attr bitmanip_optab [(smin "smin")
+ (smax "smax")
+ (umin "umin")
+ (umax "umax")
+ (clz "clz")
+ (ctz "ctz")
+ (popcount "popcount")])
+(define_code_attr bitmanip_insn [(smin "min")
+(smax "max")
+(umin "minu")
+(umax "maxu")
+(clz "clz")
+(ctz "ctz")
+(popcount "cpop")])
+
 ;; ---
 ;; Int Iterators.
 ;; ---
-- 
2.27.0

[PATCH 04/10] [RISCV] Add the list of operand modifiers to riscv.md too

[apinski--- via Gcc-patches]

From: Andrew Pinski 

To make it easier to find operands modifiers while in the md
file, add the list of modifiers to the top of the md file.
This is similar to i386 target.

OK? Built and tested for riscv32-linux-gnu and riscv64-linux-gnu.

gcc/ChangeLog:

* config/riscv/riscv.cc (riscv_print_operand): Make a mention to
keep the list in riscv.md in sync with this list.
* config/riscv/riscv.md: Add list of modifiers as comments.
---
 gcc/config/riscv/riscv.cc |   4 +-
 gcc/config/riscv/riscv.md | 184 --
 2 files changed, 18 insertions(+), 170 deletions(-)

diff --git a/gcc/config/riscv/riscv.cc b/gcc/config/riscv/riscv.cc
index 7c120eaa8e3..189be5e4e6f 100644
--- a/gcc/config/riscv/riscv.cc
+++ b/gcc/config/riscv/riscv.cc
@@ -3730,7 +3730,9 @@ riscv_memmodel_needs_release_fence (enum memmodel model)
'z' Print x0 if OP is zero, otherwise print OP normally.
'i' Print i if the operand is not a register.
'S' Print shift-index of single-bit mask OP.
-   'T' Print shift-index of inverted single-bit mask OP.  */
+   'T' Print shift-index of inverted single-bit mask OP.
+
+   Note please keep this list and the list in riscv.md in sync.  */
 
 static void
 riscv_print_operand (FILE *file, rtx op, int letter)
diff --git a/gcc/config/riscv/riscv.md b/gcc/config/riscv/riscv.md
index f4a5ff07fe4..aad2836d179 100644
--- a/gcc/config/riscv/riscv.md
+++ b/gcc/config/riscv/riscv.md
@@ -19,6 +19,20 @@
 ;; along with GCC; see the file COPYING3.  If not see
 ;; .
 
+
+;; Keep this list and the one above riscv_print_operand in sync.
+;; The special asm out single letter directives following a '%' are:
+;; h -- Print the high-part relocation associated with OP, after stripping
+;;   any outermost HIGH.
+;; R -- Print the low-part relocation associated with OP.
+;; C -- Print the integer branch condition for comparison OP.
+;; A -- Print the atomic operation suffix for memory model OP.
+;; F -- Print a FENCE if the memory model requires a release.
+;; z -- Print x0 if OP is zero, otherwise print OP normally.
+;; i -- Print i if the operand is not a register.
+;; S -- Print shift-index of single-bit mask OP.
+;; T -- Print shift-index of inverted single-bit mask OP.
+
 (define_c_enum "unspec" [
   ;; Override return address for exception handling.
   UNSPEC_EH_RETURN
@@ -107,6 +121,7 @@ (define_constants
 
 (include "predicates.md")
 (include "constraints.md")
+(include "iterators.md")
 
 ;; 
 ;;
@@ -269,175 +284,6 @@ (define_attr "tune"
 (define_asm_attributes
   [(set_attr "type" "multi")])
 
-;; This mode iterator allows 32-bit and 64-bit GPR patterns to be generated
-;; from the same template.
-(define_mode_iterator GPR [SI (DI "TARGET_64BIT")])
-
-;; This mode iterator allows :P to be used for patterns that operate on
-;; pointer-sized quantities.  Exactly one of the two alternatives will match.
-(define_mode_iterator P [(SI "Pmode == SImode") (DI "Pmode == DImode")])
-
-;; Likewise, but for XLEN-sized quantities.
-(define_mode_iterator X [(SI "!TARGET_64BIT") (DI "TARGET_64BIT")])
-
-;; Branches operate on XLEN-sized quantities, but for RV64 we accept
-;; QImode values so we can force zero-extension.
-(define_mode_iterator BR [(QI "TARGET_64BIT") SI (DI "TARGET_64BIT")])
-
-;; 32-bit moves for which we provide move patterns.
-(define_mode_iterator MOVE32 [SI])
-
-;; 64-bit modes for which we provide move patterns.
-(define_mode_iterator MOVE64 [DI DF])
-
-;; Iterator for sub-32-bit integer modes.
-(define_mode_iterator SHORT [QI HI])
-
-;; Iterator for HImode constant generation.
-(define_mode_iterator HISI [HI SI])
-
-;; Iterator for QImode extension patterns.
-(define_mode_iterator SUPERQI [HI SI (DI "TARGET_64BIT")])
-
-;; Iterator for hardware integer modes narrower than XLEN.
-(define_mode_iterator SUBX [QI HI (SI "TARGET_64BIT")])
-
-;; Iterator for hardware-supported integer modes.
-(define_mode_iterator ANYI [QI HI SI (DI "TARGET_64BIT")])
-
-;; Iterator for hardware-supported floating-point modes.
-(define_mode_iterator ANYF [(SF "TARGET_HARD_FLOAT")
-   (DF "TARGET_DOUBLE_FLOAT")
-   (HF "TARGET_ZFH")])
-
-;; Iterator for floating-point modes that can be loaded into X registers.
-(define_mode_iterator SOFTF [SF (DF "TARGET_64BIT") (HF "TARGET_ZFHMIN")])
-
-;; This attribute gives the length suffix for a sign- or zero-extension
-;; instruction.
-(define_mode_attr size [(QI "b") (HI "h")])
-
-;; Mode attributes for loads.
-(define_mode_attr load [(QI "lb") (HI "lh") (SI "lw") (DI "ld") (HF "flh") (SF 
"flw") (DF "fld")])
-
-;; Instruction names for integer loads that aren't explicitly sign or zero
-;; extended.  See riscv_output_move and LOAD_EXTEND_OP.
-(define_mode_attr default_load [(QI "lbu") (HI "lhu") (SI "lw") (DI "ld")])
-
-;; Mode attribute for FP loads into integer registers.
-(define_mode_attr softload [(HF "lh") (SF "lw") (DF 

[PATCH 00/10] [RISCV] Fix/improve the RISCV backend

[apinski--- via Gcc-patches]

From: Andrew Pinski 

This set of patches fixes a few RISCV issues and does a few
cleanups. Including moving all of the iterators to iterators.md like
many newer backends.
It also fixes a few PRs which I filed including the RISCV32 issue
with ZBS enabled.

Thanks,
Andrew Pinski

Andrew Pinski (10):
  [RISCV] Move iterators from riscv.md to iterators.md
  [RISCV] Move iterators from bitmanip.md to iterators.md
  [RISCV] Move iterators from sync.md to iterators.md
  [RISCV] Add the list of operand modifiers to riscv.md too
  [RISCV] Add %~ to print w if TARGET_64BIT and use it
  [RISCV] Use constraints/predicates instead of checking const_int
directly for shNadd patterns
  [RISCV] Use a constraint for bset_mask and bset_1_mask
  [RISCV] Fix PR 106586: riscv32 vs ZBS
  [RISCV] Add constraints for
not_single_bit_mask_operand/single_bit_mask_operand
  [RISCV] Fix PR 106632 and PR 106588 a few constraints in bitmanip.md

 gcc/config/riscv/bitmanip.md|  56 ++--
 gcc/config/riscv/constraints.md |  28 
 gcc/config/riscv/iterators.md   | 245 
 gcc/config/riscv/predicates.md  |   9 +-
 gcc/config/riscv/riscv.cc   |  35 -
 gcc/config/riscv/riscv.h|   4 +-
 gcc/config/riscv/riscv.md   | 199 +++---
 gcc/config/riscv/sync.md|   4 -
 8 files changed, 352 insertions(+), 228 deletions(-)
 create mode 100644 gcc/config/riscv/iterators.md

-- 
2.27.0

[COMMITTED] [AARCH64] Remove reference to MD_INCLUDES

[apinski--- via Gcc-patches]

From: Andrew Pinski 

The comment reference to MD_INCLUDES is not needed
as it is auto generated for long time now even before
aarch64 target was added.

MD_INCLUDES has been auto generated since r0-64489.
Note some targets still manually set MD_INCLUDES and
I suspect those can be changed but I don't have access
to those targets.

Committed as obvious.

Thanks,
Andrew Pinski

gcc/ChangeLog:

* config/aarch64/aarch64.md: Remove comment
about MD_INCLUDES as it is out of date and not needed.
---
 gcc/config/aarch64/aarch64.md | 3 ---
 1 file changed, 3 deletions(-)

diff --git a/gcc/config/aarch64/aarch64.md b/gcc/config/aarch64/aarch64.md
index ef0aed25c6b..3ea16dbc255 100644
--- a/gcc/config/aarch64/aarch64.md
+++ b/gcc/config/aarch64/aarch64.md
@@ -347,9 +347,6 @@ (define_constants
; must not operate on inactive inputs if doing so could induce a fault.
(SVE_STRICT_GP 1)])
 
-;; If further include files are added the defintion of MD_INCLUDES
-;; must be updated.
-
 (include "constraints.md")
 (include "predicates.md")
 (include "iterators.md")
-- 
2.17.1

[PATCH] Fix middle-end/103645: empty struct store not removed when using compound literal

[apinski--- via Gcc-patches]

From: Andrew Pinski 

For compound literals empty struct stores are not removed as they go down a
different path of the gimplifier; trying to optimize the init constructor.
This fixes the problem by not adding the gimple assignment at the end
of gimplify_init_constructor if it was an empty type.

Note this updates gcc.dg/pr87052.c where we had:
const char d[0] = { };
And was expecting a store to d but after this, there is no store
as the decl's type is zero in size.

OK? Bootstrapped and tested on x86_64-linux-gnu with no regressions.

gcc/ChangeLog:

PR middle-end/103645
* gimplify.c (gimplify_init_constructor): Don't build/add
gimple assignment of an empty type.

testsuite/ChangeLog:
* gcc.dg/pr87052.c: Update d var to expect nothing.
---
 gcc/gimplify.cc| 7 +--
 gcc/testsuite/gcc.dg/pr87052.c | 6 +++---
 2 files changed, 8 insertions(+), 5 deletions(-)

diff --git a/gcc/gimplify.cc b/gcc/gimplify.cc
index 2ac7ca0855e..f0fbdb48012 100644
--- a/gcc/gimplify.cc
+++ b/gcc/gimplify.cc
@@ -5488,8 +5488,11 @@ gimplify_init_constructor (tree *expr_p, gimple_seq 
*pre_p, gimple_seq *post_p,
   if (ret == GS_ERROR)
 return GS_ERROR;
   /* If we have gimplified both sides of the initializer but have
- not emitted an assignment, do so now.  */
-  if (*expr_p)
+ not emitted an assignment, do so now.   */
+  if (*expr_p
+  /* If the type is an empty type, we don't need to emit the
+assignment. */
+  && !is_empty_type (TREE_TYPE (TREE_OPERAND (*expr_p, 0
 {
   tree lhs = TREE_OPERAND (*expr_p, 0);
   tree rhs = TREE_OPERAND (*expr_p, 1);
diff --git a/gcc/testsuite/gcc.dg/pr87052.c b/gcc/testsuite/gcc.dg/pr87052.c
index 18e092c4674..796fe6440c1 100644
--- a/gcc/testsuite/gcc.dg/pr87052.c
+++ b/gcc/testsuite/gcc.dg/pr87052.c
@@ -23,8 +23,7 @@ void test (void)
 
   const char d[0] = { };
 
-  /* Expect the following:
- d = ""; */
+  /* Expect nothing.  */
 
   const char e[0] = "";
 
@@ -36,6 +35,7 @@ void test (void)
 /* { dg-final { scan-tree-dump-times "a = \"x00ab\";" 1 "gimple" } }
{ dg-final { scan-tree-dump-times "b = \"ax00bc\";"  1 "gimple" } }
{ dg-final { scan-tree-dump-times "c = \"\";"  1 "gimple" } }
-   { dg-final { scan-tree-dump-times "d = { *};"  1 "gimple" } }
+   { dg-final { scan-tree-dump-times "d = "  1 "gimple" } }
+   { dg-final { scan-tree-dump-times "d = {CLOBBER\\(eol\\)}"  1 "gimple" } }
{ dg-final { scan-tree-dump-times "e = "  1 "gimple" } }
{ dg-final { scan-tree-dump-times "e = {CLOBBER\\(eol\\)}"  1 "gimple" } }  
*/
-- 
2.27.0

[COMMITTED] Move testcase gcc.dg/tree-ssa/pr93776.c to gcc.c-torture/compile/pr93776.c

[apinski--- via Gcc-patches]

From: Andrew Pinski 

Since this testcase is not exactly SSA specific and it would
be a good idea to compile this at more than just at -O1, moving
it to gcc.c-torture/compile would do that.

Committed as obvious after a test on x86_64-linux-gnu.

gcc/testsuite/ChangeLog:

* gcc.dg/tree-ssa/pr93776.c: Moved to...
* gcc.c-torture/compile/pr93776.c: ...here.
---
 .../{gcc.dg/tree-ssa => gcc.c-torture/compile}/pr93776.c  | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)
 rename gcc/testsuite/{gcc.dg/tree-ssa => gcc.c-torture/compile}/pr93776.c (76%)

diff --git a/gcc/testsuite/gcc.dg/tree-ssa/pr93776.c 
b/gcc/testsuite/gcc.c-torture/compile/pr93776.c
similarity index 76%
rename from gcc/testsuite/gcc.dg/tree-ssa/pr93776.c
rename to gcc/testsuite/gcc.c-torture/compile/pr93776.c
index c407a627718..3852736c040 100644
--- a/gcc/testsuite/gcc.dg/tree-ssa/pr93776.c
+++ b/gcc/testsuite/gcc.c-torture/compile/pr93776.c
@@ -1,5 +1,5 @@
-/* { dg-do compile } */
-/* { dg-options "-O1" } */
+/* This used to ICE in SRA as SRA got
+   confused by the zero signed assigment. */
 
 struct empty {};
 struct s { int i; };
-- 
2.27.0

[COMMITED] [RSIC-V] Fix 32bit riscv with zbs extension enabled

[apinski--- via Gcc-patches]

From: Andrew Pinski 

The problem here was a disconnect between splittable_const_int_operand
predicate and the function riscv_build_integer_1 for 32bits with zbs enabled.
The splittable_const_int_operand predicate had a check for TARGET_64BIT which
was not needed so this patch removed it.

Committed as obvious after a build for risc32-elf configured with 
--with-arch=rv32imac_zba_zbb_zbc_zbs.

Thanks,
Andrew Pinski

gcc/ChangeLog:

* config/riscv/predicates.md (splittable_const_int_operand):
Remove the check for TARGET_64BIT for single bit const values.
---
 gcc/config/riscv/predicates.md | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/gcc/config/riscv/predicates.md b/gcc/config/riscv/predicates.md
index 90db5dfcdd5..e98db2cb574 100644
--- a/gcc/config/riscv/predicates.md
+++ b/gcc/config/riscv/predicates.md
@@ -76,7 +76,7 @@ (define_predicate "splittable_const_int_operand"
 
   /* Check whether the constant can be loaded in a single
  instruction with zbs extensions.  */
-  if (TARGET_64BIT && TARGET_ZBS && SINGLE_BIT_MASK_OPERAND (INTVAL (op)))
+  if (TARGET_ZBS && SINGLE_BIT_MASK_OPERAND (INTVAL (op)))
 return false;
 
   /* Otherwise check whether the constant can be loaded in a single
-- 
2.27.0

[COMMITTED] Fix tree-opt/PR106087: ICE with inline-asm with multiple output and assigned only static vars

[apinski--- via Gcc-patches]

From: Andrew Pinski 

The problem here is that when we mark the ssa name that was referenced in the 
now removed
dead store (to a write only static variable), the inline-asm would also be 
removed
even though it was defining another ssa name. This fixes the problem by checking
to make sure that the statement was only defining one ssa name.

Committed as approved after a bootstrapped and tested on x86_64 with no 
regressions.

PR tree-optimization/106087

gcc/ChangeLog:

* tree-ssa-dce.cc (simple_dce_from_worklist): Check
to make sure the statement is only defining one operand.

gcc/testsuite/ChangeLog:

* gcc.c-torture/compile/inline-asm-1.c: New test.
---
 gcc/testsuite/gcc.c-torture/compile/inline-asm-1.c | 14 ++
 gcc/tree-ssa-dce.cc|  7 +++
 2 files changed, 21 insertions(+)
 create mode 100644 gcc/testsuite/gcc.c-torture/compile/inline-asm-1.c

diff --git a/gcc/testsuite/gcc.c-torture/compile/inline-asm-1.c 
b/gcc/testsuite/gcc.c-torture/compile/inline-asm-1.c
new file mode 100644
index 000..0044cb761b6
--- /dev/null
+++ b/gcc/testsuite/gcc.c-torture/compile/inline-asm-1.c
@@ -0,0 +1,14 @@
+/* PR tree-opt/106087,
+   simple_dce_from_worklist would delete the
+   inline-asm when it was still being referenced
+   by the other ssa name. */
+
+static int t;
+
+int f(void)
+{
+  int tt, tt1;
+  asm("":"=r"(tt), "=r"(tt1));
+  t = tt1;
+  return tt;
+}
diff --git a/gcc/tree-ssa-dce.cc b/gcc/tree-ssa-dce.cc
index bc533582673..daf0782b0e1 100644
--- a/gcc/tree-ssa-dce.cc
+++ b/gcc/tree-ssa-dce.cc
@@ -2061,6 +2061,13 @@ simple_dce_from_worklist (bitmap worklist)
   if (gimple_has_side_effects (t))
continue;
 
+  /* The defining statement needs to be defining only this name.
+ASM is the only statement that can define more than one
+(non-virtual) name. */
+  if (is_a(t)
+ && !single_ssa_def_operand (t, SSA_OP_DEF))
+   continue;
+
   /* Don't remove statements that are needed for non-call
 eh to work.  */
   if (stmt_unremovable_because_of_non_call_eh_p (cfun, t))
-- 
2.17.1

[PATCH] Fix tree-opt/PR106087: ICE with inline-asm with multiple output and assigned only static vars

[apinski--- via Gcc-patches]

From: Andrew Pinski 

The problem here is that when we mark the ssa name that was referenced in the 
now removed
dead store (to a write only static variable), the inline-asm would also be 
removed
even though it was defining another ssa name. This fixes the problem by checking
to make sure that the statement was only defining one ssa name.

OK? Bootstrapped and tested on x86_64 with no regressions.

PR tree-optimization/106087

gcc/ChangeLog:

* tree-ssa-dce.cc (simple_dce_from_worklist): Check
to make sure the statement is only defining one operand.

gcc/testsuite/ChangeLog:

* gcc.c-torture/compile/inline-asm-1.c: New test.
---
 gcc/testsuite/gcc.c-torture/compile/inline-asm-1.c | 14 ++
 gcc/tree-ssa-dce.cc|  5 +
 2 files changed, 19 insertions(+)
 create mode 100644 gcc/testsuite/gcc.c-torture/compile/inline-asm-1.c

diff --git a/gcc/testsuite/gcc.c-torture/compile/inline-asm-1.c 
b/gcc/testsuite/gcc.c-torture/compile/inline-asm-1.c
new file mode 100644
index 000..0044cb761b6
--- /dev/null
+++ b/gcc/testsuite/gcc.c-torture/compile/inline-asm-1.c
@@ -0,0 +1,14 @@
+/* PR tree-opt/106087,
+   simple_dce_from_worklist would delete the
+   inline-asm when it was still being referenced
+   by the other ssa name. */
+
+static int t;
+
+int f(void)
+{
+  int tt, tt1;
+  asm("":"=r"(tt), "=r"(tt1));
+  t = tt1;
+  return tt;
+}
diff --git a/gcc/tree-ssa-dce.cc b/gcc/tree-ssa-dce.cc
index bc533582673..602cdb30ceb 100644
--- a/gcc/tree-ssa-dce.cc
+++ b/gcc/tree-ssa-dce.cc
@@ -2061,6 +2061,11 @@ simple_dce_from_worklist (bitmap worklist)
   if (gimple_has_side_effects (t))
continue;
 
+  /* The defining statement needs to be defining one this name. */
+  if (!is_a(t)
+ && !single_ssa_def_operand (t, SSA_OP_DEF))
+   continue;
+
   /* Don't remove statements that are needed for non-call
 eh to work.  */
   if (stmt_unremovable_because_of_non_call_eh_p (cfun, t))
-- 
2.17.1

[PATCH] c: [PR104506] Fix ICE after error due to change of type to error_mark_node

[apinski--- via Gcc-patches]

From: Andrew Pinski 

The problem here is we end up with an error_mark_node when calling
useless_type_conversion_p and that ICEs. STRIP_NOPS/tree_nop_conversion
has had a check for the inner type being an error_mark_node since g9a6bb3f78c96
(2000). This just adds the check also to tree_ssa_useless_type_conversion.
STRIP_USELESS_TYPE_CONVERSION is mostly used inside the gimplifier
and the places where it is used outside of the gimplifier would not
be adding too much overhead.

OK? Bootstrapped and tested on x86_64-linux-gnu with no regressions.

Thanks,
Andrew Pinski

PR c/104506

gcc/ChangeLog:

* tree-ssa.cc (tree_ssa_useless_type_conversion):
Check the inner type before calling useless_type_conversion_p.

gcc/testsuite/ChangeLog:

* gcc.dg/pr104506-1.c: New test.
* gcc.dg/pr104506-2.c: New test.
* gcc.dg/pr104506-3.c: New test.
---
 gcc/testsuite/gcc.dg/pr104506-1.c | 12 
 gcc/testsuite/gcc.dg/pr104506-2.c | 11 +++
 gcc/testsuite/gcc.dg/pr104506-3.c | 11 +++
 gcc/tree-ssa.cc   | 20 +---
 4 files changed, 47 insertions(+), 7 deletions(-)
 create mode 100644 gcc/testsuite/gcc.dg/pr104506-1.c
 create mode 100644 gcc/testsuite/gcc.dg/pr104506-2.c
 create mode 100644 gcc/testsuite/gcc.dg/pr104506-3.c

diff --git a/gcc/testsuite/gcc.dg/pr104506-1.c 
b/gcc/testsuite/gcc.dg/pr104506-1.c
new file mode 100644
index 000..5eb71911b71
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/pr104506-1.c
@@ -0,0 +1,12 @@
+/* { dg-do compile } */
+/* { dg-options "-std=gnu11" } */
+/* PR c/104506: we used to ICE after the error of
+   changing the type.  */
+
+void
+foo (double x)
+/* { dg-message "note: previous definition" "previous definition" { target 
*-*-* } .-1 } */
+{
+  (void)x;
+  int x; /* { dg-error "redeclared as different kind of symbol" } */
+}
diff --git a/gcc/testsuite/gcc.dg/pr104506-2.c 
b/gcc/testsuite/gcc.dg/pr104506-2.c
new file mode 100644
index 000..3c3c4f8
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/pr104506-2.c
@@ -0,0 +1,11 @@
+/* { dg-do compile } */
+/* { dg-options "-std=gnu11" } */
+/* PR c/104506: we used to ICE after the error of
+   changing the type.  */
+void
+foo (double x)
+/* { dg-message "note: previous definition" "previous definition" { target 
*-*-* } .-1 } */
+{
+  x;
+  int x; /* { dg-error "redeclared as different kind of symbol" } */
+}
diff --git a/gcc/testsuite/gcc.dg/pr104506-3.c 
b/gcc/testsuite/gcc.dg/pr104506-3.c
new file mode 100644
index 000..b14deb5cf25
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/pr104506-3.c
@@ -0,0 +1,11 @@
+/* { dg-do compile } */
+/* PR c/104506: we used to ICE after the error of
+   changing the type.  */
+double x;
+/* { dg-message "note: previous declaration" "previous declaration" { target 
*-*-* } .-1 } */
+void
+foo (void)
+{
+  x;
+}
+int x; /* { dg-error "conflicting types" } */
diff --git a/gcc/tree-ssa.cc b/gcc/tree-ssa.cc
index 430875ae37a..423dd871d9e 100644
--- a/gcc/tree-ssa.cc
+++ b/gcc/tree-ssa.cc
@@ -1256,18 +1256,24 @@ delete_tree_ssa (struct function *fn)
 bool
 tree_ssa_useless_type_conversion (tree expr)
 {
+  tree outer_type, inner_type;
+
   /* If we have an assignment that merely uses a NOP_EXPR to change
  the top of the RHS to the type of the LHS and the type conversion
  is "safe", then strip away the type conversion so that we can
  enter LHS = RHS into the const_and_copies table.  */
-  if (CONVERT_EXPR_P (expr)
-  || TREE_CODE (expr) == VIEW_CONVERT_EXPR
-  || TREE_CODE (expr) == NON_LVALUE_EXPR)
-return useless_type_conversion_p
-  (TREE_TYPE (expr),
-   TREE_TYPE (TREE_OPERAND (expr, 0)));
+  if (!CONVERT_EXPR_P (expr)
+  && TREE_CODE (expr) != VIEW_CONVERT_EXPR
+  && TREE_CODE (expr) != NON_LVALUE_EXPR)
+return false;
 
-  return false;
+  outer_type = TREE_TYPE (expr);
+  inner_type = TREE_TYPE (TREE_OPERAND (expr, 0));
+
+  if (inner_type == error_mark_node)
+return false;
+
+  return useless_type_conversion_p (outer_type, inner_type);
 }
 
 /* Strip conversions from EXP according to
-- 
2.17.1

[PATCH] [COMMITTED] Fix PR aarch64/104474: ICE with vector float initializers and non-consts.

[apinski--- via Gcc-patches]

From: Andrew Pinski 

The problem here is that the aarch64 back-end was placing const0_rtx
into the constant vector RTL even if the mode was a floating point mode.
The fix is instead to use CONST0_RTX and pass the mode to select the
correct zero (either const_int or const_double).

Committed as obvious after a bootstrap/test on aarch64-linux-gnu with
no regressions.

PR target/104474

gcc/ChangeLog:

* config/aarch64/aarch64.cc
(aarch64_sve_expand_vector_init_handle_trailing_constants):
Use CONST0_RTX instead of const0_rtx for the non-constant elements.

gcc/testsuite/ChangeLog:

* gcc.target/aarch64/sve/pr104474-1.c: New test.
* gcc.target/aarch64/sve/pr104474-2.c: New test.
* gcc.target/aarch64/sve/pr104474-3.c: New test.
---
 gcc/config/aarch64/aarch64.cc | 2 +-
 gcc/testsuite/gcc.target/aarch64/sve/pr104474-1.c | 9 +
 gcc/testsuite/gcc.target/aarch64/sve/pr104474-2.c | 9 +
 gcc/testsuite/gcc.target/aarch64/sve/pr104474-3.c | 9 +
 4 files changed, 28 insertions(+), 1 deletion(-)
 create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/pr104474-1.c
 create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/pr104474-2.c
 create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/pr104474-3.c

diff --git a/gcc/config/aarch64/aarch64.cc b/gcc/config/aarch64/aarch64.cc
index 8dc6d55e0f2..828ee472be2 100644
--- a/gcc/config/aarch64/aarch64.cc
+++ b/gcc/config/aarch64/aarch64.cc
@@ -21164,7 +21164,7 @@ aarch64_sve_expand_vector_init_handle_trailing_constants
{
  rtx x = builder.elt (i + nelts_reqd - n_trailing_constants);
  if (!valid_for_const_vector_p (elem_mode, x))
-   x = const0_rtx;
+   x = CONST0_RTX (elem_mode);
  v.quick_push (x);
}
   rtx const_vec = v.build ();
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/pr104474-1.c 
b/gcc/testsuite/gcc.target/aarch64/sve/pr104474-1.c
new file mode 100644
index 000..9e5bfe64467
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/sve/pr104474-1.c
@@ -0,0 +1,9 @@
+/* { dg-options "-mcpu=neoverse-512tvb -frounding-math -msve-vector-bits=512" 
} */
+
+typedef float __attribute__((__vector_size__ (64))) F;
+
+F
+foo (void)
+{
+  return (F){68435453, 0, 0, 0, 0, 0, 0, 5, 0, 431144844};
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/pr104474-2.c 
b/gcc/testsuite/gcc.target/aarch64/sve/pr104474-2.c
new file mode 100644
index 000..02a4b6a8fdc
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/sve/pr104474-2.c
@@ -0,0 +1,9 @@
+/* { dg-options "-mcpu=neoverse-512tvb -msve-vector-bits=512" } */
+
+typedef float __attribute__((__vector_size__ (64))) F;
+
+F
+foo (float t)
+{
+  return (F){t, 0, 0, 0, 0, 0, 0, 5, 0, t};
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/pr104474-3.c 
b/gcc/testsuite/gcc.target/aarch64/sve/pr104474-3.c
new file mode 100644
index 000..7bed0142968
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/sve/pr104474-3.c
@@ -0,0 +1,9 @@
+/* { dg-options "-mcpu=neoverse-v1 -frounding-math -msve-vector-bits=256" } */
+
+typedef _Float16 __attribute__((__vector_size__ (32))) F;
+
+F
+foo (void)
+{
+  return (F){0, 6270, 0, 0, 0, 0, 0, 0, 3229, 0, 40};
+}
-- 
2.27.0

[PATCH] [COMMITTED] Change multiprecision.org to use https

[apinski--- via Gcc-patches]

From: Andrew Pinski 

As reported at
https://gcc.gnu.org/pipermail/gcc/2022-February/238216.html,
multiprecision.org now uses https so this updates the documentation
to use https instead of http.

Committed as obvious.

gcc/ChangeLog:

* doc/install.texi:
---
 gcc/doc/install.texi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/gcc/doc/install.texi b/gcc/doc/install.texi
index dae7c0acc36..f8898af027d 100644
--- a/gcc/doc/install.texi
+++ b/gcc/doc/install.texi
@@ -406,7 +406,7 @@ download_prerequisites installs.
 @item MPC Library version 1.0.1 (or later)
 
 Necessary to build GCC@.  It can be downloaded from
-@uref{http://www.multiprecision.org/mpc/}.  If an MPC source distribution
+@uref{https://www.multiprecision.org/mpc/}.  If an MPC source distribution
 is found in a subdirectory of your GCC sources named @file{mpc}, it
 will be built together with GCC.  Alternatively, if MPC is already
 installed but it is not in your default library search path, the
-- 
2.17.1

[PATCH] Fix comment for operand_compare::operand_equal_p.

[apinski--- via Gcc-patches]

From: Andrew Pinski 

The OEP_* enums were moved to tree-core.h in
r0-124973-g5e351e960763 but the comment was correct
when it was added added to fold-const.h in
r10-4231-g7f4a8ee03d40. This fixes the reference
to the OEP_* enum to reference tree-core.

Committed as obvious after a bootstrap/test on x86_64-linux.

gcc/ChangeLog:

* fold-const.h (operand_compare::operand_equal_p):
Fix comment about OEP_* flags.
---
 gcc/fold-const.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/gcc/fold-const.h b/gcc/fold-const.h
index a9a3062e4f6..394a67ece79 100644
--- a/gcc/fold-const.h
+++ b/gcc/fold-const.h
@@ -243,7 +243,7 @@ class operand_compare
 {
 public:
   /* Return true if two operands are equal.  The flags fields can be used
- to specify OEP flags described above.  */
+ to specify OEP flags described in tree-core.h.  */
   virtual bool operand_equal_p (const_tree, const_tree, unsigned int flags);
 
   /* Generate a hash value for an expression.  This can be used iteratively
-- 
2.17.1

[PATCH] Fix aarch64/104201: branch-protection-attr.c fails after quoting difference

[apinski--- via Gcc-patches]

From: Andrew Pinski 

After the quoting changes in r12-6521-g03a1a86b5ee40d4e240, 
branch-protection-attr.c
fails due to expecting a different quoting type for "leaf".
This patch changes the quoting from "" to '' as that is what is used now.

Committed as obvious after a test of the testcase.

gcc/testsuite/ChangeLog:

* gcc.target/aarch64/branch-protection-attr.c: Fix quoting for
the expected error message on line 5 of leaf.
---
 gcc/testsuite/gcc.target/aarch64/branch-protection-attr.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/gcc/testsuite/gcc.target/aarch64/branch-protection-attr.c 
b/gcc/testsuite/gcc.target/aarch64/branch-protection-attr.c
index 229ce1ca7be..1d6e55f3907 100644
--- a/gcc/testsuite/gcc.target/aarch64/branch-protection-attr.c
+++ b/gcc/testsuite/gcc.target/aarch64/branch-protection-attr.c
@@ -4,7 +4,7 @@ void __attribute__ ((target("branch-protection=leaf")))
 foo1 ()
 {
 }
-/* { dg-error {invalid protection type \("leaf"\) in 
'target\("branch-protection="\)' pragma or attribute} "" { target *-*-* } 5 } */
+/* { dg-error {invalid protection type \('leaf'\) in 
'target\("branch-protection="\)' pragma or attribute} "" { target *-*-* } 5 } */
 /* { dg-error {pragma or attribute 'target\("branch-protection=leaf"\)' is not 
valid} "" { target *-*-* } 5 } */
 
 void __attribute__ ((target("branch-protection=none+pac-ret")))
-- 
2.17.1

[PATCH] aarch64: [PR101529] Fix vector shuffle insertion expansion

[apinski--- via Gcc-patches]

From: Andrew Pinski 

The function aarch64_evpc_ins would reuse the target even though
it might be the same register as the two inputs.
Instead of checking to see if we can reuse the target, just use the
original input directly.

Committed as approved after bootstrapped and tested on
aarch64-linux-gnu with no regressions.
Note the testcases are not backported as __builtin_shufflevector
does not exist in GCC 11.

PR target/101529

gcc/ChangeLog:

* config/aarch64/aarch64.c (aarch64_evpc_ins): Don't use target
as an input, use original one.

(cherry picked from commit 52fa771758635d9c53cddb9116e5a66fae592230)
---
 gcc/config/aarch64/aarch64.c | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c
index bbcf5ed4a61..b58a379759d 100644
--- a/gcc/config/aarch64/aarch64.c
+++ b/gcc/config/aarch64/aarch64.c
@@ -23026,11 +23026,10 @@ aarch64_evpc_ins (struct expand_vec_perm_d *d)
 }
   gcc_assert (extractindex < nelt);
 
-  emit_move_insn (d->target, insv);
   insn_code icode = code_for_aarch64_simd_vec_copy_lane (mode);
   expand_operand ops[5];
   create_output_operand ([0], d->target, mode);
-  create_input_operand ([1], d->target, mode);
+  create_input_operand ([1], insv, mode);
   create_integer_operand ([2], 1 << idx);
   create_input_operand ([3], extractv, mode);
   create_integer_operand ([4], extractindex);
-- 
2.17.1

[PATCH v3] [AARCH64] Fix PR target/103100 -mstrict-align and memset on not aligned buffers

[apinski--- via Gcc-patches]

From: Andrew Pinski 

The problem here is that aarch64_expand_setmem does not change the alignment
for strict alignment case. This is version 3 of this patch, is is based on
version 2 and moves the check for the number of instructions from the
optimizing for size case to be always and change the cost of libcalls for
the !size case to be max_size/16 + 1 (or 17) which was the same as before
when handling just the max_size. The main change is dealing with strict
alignment case where we only inline a max of 17 instructions as at that
point the call to the memset will be faster and could handle the dynamic
alignment instead of just the static alignment.

Note the reason why it is +1 is to count for the setting of the simd
duplicate.

OK? Bootstrapped and tested on aarch64-linux-gnu with no regressions.

PR target/103100
gcc/ChangeLog:

* config/aarch64/aarch64.cc (aarch64_expand_setmem): Constraint
copy_limit to the alignment of the mem if STRICT_ALIGNMENT is
true. Also constraint the number of instructions for the !size
case to max_size/16 + 1.

gcc/testsuite/ChangeLog:

* gcc.target/aarch64/memset-strict-align-1.c: Update test.
Reduce the size down to 207 and make s1 global and aligned
to 16 bytes.
* gcc.target/aarch64/memset-strict-align-2.c: New test.
---
 gcc/config/aarch64/aarch64.cc | 55 ++-
 .../aarch64/memset-strict-align-1.c   | 20 +++
 .../aarch64/memset-strict-align-2.c   | 14 +
 3 files changed, 53 insertions(+), 36 deletions(-)
 create mode 100644 gcc/testsuite/gcc.target/aarch64/memset-strict-align-2.c

diff --git a/gcc/config/aarch64/aarch64.cc b/gcc/config/aarch64/aarch64.cc
index 296145e6008..02ecb2154ea 100644
--- a/gcc/config/aarch64/aarch64.cc
+++ b/gcc/config/aarch64/aarch64.cc
@@ -23831,8 +23831,11 @@ aarch64_expand_setmem (rtx *operands)
 (zero constants can use XZR directly).  */
   unsigned mops_cost = 3 + 1 + cst_val;
   /* A libcall to memset in the worst case takes 3 instructions to prepare
- the arguments + 1 for the call.  */
-  unsigned libcall_cost = 4;
+ the arguments + 1 for the call.
+ In the case of not optimizing for size the cost of doing a libcall
+ is the max_set_size / 16 + 1 or 17 instructions. The one instruction
+ is for the vector dup which may or may not be used.  */
+  unsigned libcall_cost = size_p ? 4 : (max_set_size / 16 + 1);
 
   /* Upper bound check.  For large constant-sized setmem use the MOPS sequence
  when available.  */
@@ -23842,12 +23845,12 @@ aarch64_expand_setmem (rtx *operands)
 
   /* Attempt a sequence with a vector broadcast followed by stores.
  Count the number of operations involved to see if it's worth it
- against the alternatives.  A simple counter simd_ops on the
+ against the alternatives.  A simple counter inlined_ops on the
  algorithmically-relevant operations is used rather than an rtx_insn count
  as all the pointer adjusmtents and mode reinterprets will be optimized
  away later.  */
   start_sequence ();
-  unsigned simd_ops = 0;
+  unsigned inlined_ops = 0;
 
   base = copy_to_mode_reg (Pmode, XEXP (dst, 0));
   dst = adjust_automodify_address (dst, VOIDmode, base, 0);
@@ -23855,15 +23858,22 @@ aarch64_expand_setmem (rtx *operands)
   /* Prepare the val using a DUP/MOVI v0.16B, val.  */
   src = expand_vector_broadcast (V16QImode, val);
   src = force_reg (V16QImode, src);
-  simd_ops++;
+  inlined_ops++;
   /* Convert len to bits to make the rest of the code simpler.  */
   n = len * BITS_PER_UNIT;
 
   /* Maximum amount to copy in one go.  We allow 256-bit chunks based on the
  AARCH64_EXTRA_TUNE_NO_LDP_STP_QREGS tuning parameter.  */
-  const int copy_limit = (aarch64_tune_params.extra_tuning_flags
- & AARCH64_EXTRA_TUNE_NO_LDP_STP_QREGS)
- ? GET_MODE_BITSIZE (TImode) : 256;
+  int copy_limit;
+
+  if (aarch64_tune_params.extra_tuning_flags
+  & AARCH64_EXTRA_TUNE_NO_LDP_STP_QREGS)
+copy_limit = GET_MODE_BITSIZE (TImode);
+  else
+copy_limit = 256;
+
+  if (STRICT_ALIGNMENT)
+copy_limit = MIN (copy_limit, (int)MEM_ALIGN (dst));
 
   while (n > 0)
 {
@@ -23878,7 +23888,7 @@ aarch64_expand_setmem (rtx *operands)
 
   mode_bits = GET_MODE_BITSIZE (cur_mode).to_constant ();
   aarch64_set_one_block_and_progress_pointer (src, , cur_mode);
-  simd_ops++;
+  inlined_ops++;
   n -= mode_bits;
 
   /* Do certain trailing copies as overlapping if it's going to be
@@ -23897,24 +23907,17 @@ aarch64_expand_setmem (rtx *operands)
   rtx_insn *seq = get_insns ();
   end_sequence ();
 
-  if (size_p)
-{
-  /* When optimizing for size we have 3 options: the SIMD broadcast 
sequence,
-call to memset or the MOPS expansion.  */
-  if (TARGET_MOPS
- && mops_cost <= libcall_cost
- && mops_cost <= simd_ops)
-   return 

[PATCH] [aarch64/64821]: Simplify __builtin_aarch64_sqrt* into internal function .SQRT.

[apinski--- via Gcc-patches]

From: Andrew Pinski 

This is a simple patch which simplifies the __builtin_aarch64_sqrt* builtins
into the internal function SQRT which allows for constant folding and other
optimizations at the gimple level. It was originally suggested we do to
__builtin_sqrt just for __builtin_aarch64_sqrtdf when -fno-math-errno
but since r6-4969-g686ee9719a4 we have the internal function SQRT which does
the same so it makes we don't need to check -fno-math-errno either now.

Applied as approved after bootstrapped and tested on aarch64-linux-gnu with no 
regressions.

PR target/64821

gcc/ChangeLog:

* config/aarch64/aarch64-builtins.cc
(aarch64_general_gimple_fold_builtin): Handle
__builtin_aarch64_sqrt* and simplify into SQRT internal
function.

gcc/testsuite/ChangeLog:

* gcc.target/aarch64/vsqrt-1.c: New test.
* gcc.target/aarch64/vsqrt-2.c: New test.
---
 gcc/config/aarch64/aarch64-builtins.cc |  7 ++
 gcc/testsuite/gcc.target/aarch64/vsqrt-1.c | 17 +
 gcc/testsuite/gcc.target/aarch64/vsqrt-2.c | 28 ++
 3 files changed, 52 insertions(+)
 create mode 100644 gcc/testsuite/gcc.target/aarch64/vsqrt-1.c
 create mode 100644 gcc/testsuite/gcc.target/aarch64/vsqrt-2.c

diff --git a/gcc/config/aarch64/aarch64-builtins.cc 
b/gcc/config/aarch64/aarch64-builtins.cc
index b7f338d6229..5217dbdb2ac 100644
--- a/gcc/config/aarch64/aarch64-builtins.cc
+++ b/gcc/config/aarch64/aarch64-builtins.cc
@@ -2820,6 +2820,13 @@ aarch64_general_gimple_fold_builtin (unsigned int fcode, 
gcall *stmt,
gimple_call_set_lhs (new_stmt, gimple_call_lhs (stmt));
break;
 
+  /* Lower sqrt builtins to gimple/internal function sqrt. */
+  BUILTIN_VHSDF_DF (UNOP, sqrt, 2, FP)
+   new_stmt = gimple_build_call_internal (IFN_SQRT,
+  1, args[0]);
+   gimple_call_set_lhs (new_stmt, gimple_call_lhs (stmt));
+   break;
+
  /*lower store and load neon builtins to gimple.  */
  BUILTIN_VALL_F16 (LOAD1, ld1, 0, LOAD)
  BUILTIN_VDQ_I (LOAD1_U, ld1, 0, LOAD)
diff --git a/gcc/testsuite/gcc.target/aarch64/vsqrt-1.c 
b/gcc/testsuite/gcc.target/aarch64/vsqrt-1.c
new file mode 100644
index 000..e614c7d5a0f
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/vsqrt-1.c
@@ -0,0 +1,17 @@
+/* PR target/64821 */
+/* { dg-do compile } */
+/* { dg-options "-O2 -fdump-tree-optimized" } */
+/* Check that we constant fold sqrt(4.0) into 2.0. */
+/* { dg-final { scan-tree-dump-not " \\\.SQRT" "optimized" } } */
+/* { dg-final { scan-tree-dump " 2\\\.0e\\\+0" "optimized" } } */
+/* { dg-final { scan-assembler-not "fsqrt" } } */
+/* We should produce a fmov to d0 with 2.0 but currently don't, see PR 103959. 
*/
+/* { dg-final { scan-assembler-times "\n\tfmov\td0, 2.0e.0" 1 { xfail *-*-* } 
} } */
+
+#include 
+
+float64x1_t f64(void)
+{
+   float64x1_t a = (float64x1_t){4.0};
+   return vsqrt_f64 (a);
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/vsqrt-2.c 
b/gcc/testsuite/gcc.target/aarch64/vsqrt-2.c
new file mode 100644
index 000..4dea4da7da6
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/vsqrt-2.c
@@ -0,0 +1,28 @@
+/* PR target/64821 */
+/* { dg-do compile } */
+/* { dg-options "-fdump-tree-optimized" } */
+#include 
+
+/* Check that we lower __builtin_aarch64_sqrt* into the internal function 
SQRT. */
+/* { dg-final { scan-tree-dump-times " __builtin_aarch64_sqrt" 0 "optimized" } 
} */
+/* { dg-final { scan-tree-dump-times " \\\.SQRT " 4 "optimized" } } */
+
+float64x1_t f64(float64x1_t a)
+{
+  return vsqrt_f64 (a);
+}
+
+float64x2_t f64q(float64x2_t a)
+{
+  return vsqrtq_f64 (a);
+}
+
+float32x2_t f32(float32x2_t a)
+{
+  return vsqrt_f32 (a);
+}
+
+float32x4_t f32q(float32x4_t a)
+{
+  return vsqrtq_f32 (a);
+}
-- 
2.17.1

[PATCH] [COMMITTED] Improve coment for the newly added code in ipa-split.

[apinski--- via Gcc-patches]

From: Andrew Pinski 

It was pointed out to me by Jakub, that the comment in front of
the new code which handles warning/error attribute was not really
understandable. This fixes the comment to be understandable; I
don't know why I wrote the original comment that way even.

Committed as obvious after a quick build.

gcc/ChangeLog:

* ipa-split.cc (visit_bb): Fix comment before the
warning/error attribute checking code.
---
 gcc/ipa-split.cc | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/gcc/ipa-split.cc b/gcc/ipa-split.cc
index 6ca45f3b745..ff11cf34b23 100644
--- a/gcc/ipa-split.cc
+++ b/gcc/ipa-split.cc
@@ -931,8 +931,8 @@ visit_bb (basic_block bb, basic_block return_bb,
break;
  }
 
- /* Calls that function has either the warning or error
-attribute on it should not be split off into another
+ /* Calls to functions (which have the warning or error
+attribute on them) should not be split off into another
 function.  */
  if (lookup_attribute ("warning", DECL_ATTRIBUTES (decl))
   || lookup_attribute ("error", DECL_ATTRIBUTES (decl)))
-- 
2.27.0

[PATCH] Fix tree-optimization/101941: IPA splitting out function with error attribute

[apinski--- via Gcc-patches]

From: Andrew Pinski 

The Linux kernel started to fail compile when the jump threader was improved
(r12-2591-g2e96b5f14e4025691). This failure was due to the IPA splitting code
decided now to split off the basic block which contained two functions,
one of those functions included the error attribute on them.  This patch fixes
the problem by disallowing basic blocks from being split which contain functions
that have either the error or warning attribute on them.

The two new testcases are to make sure we still split the function for other
places if we reject the one case.

Committed as approved after Bootstrapped and tested on x86_64-linux-gnu with no 
regressions.

PR tree-optimization/101941

gcc/ChangeLog:

* ipa-split.cc (visit_bb): Disallow function calls where
the function has either error or warning attribute.

gcc/testsuite/ChangeLog:

* gcc.c-torture/compile/pr101941-1.c: New test.
* gcc.dg/tree-ssa/pr101941-1.c: New test.
---
 gcc/ipa-split.cc  | 74 ---
 .../gcc.c-torture/compile/pr101941-1.c| 50 +
 gcc/testsuite/gcc.dg/tree-ssa/pr101941-1.c| 53 +
 3 files changed, 149 insertions(+), 28 deletions(-)
 create mode 100644 gcc/testsuite/gcc.c-torture/compile/pr101941-1.c
 create mode 100644 gcc/testsuite/gcc.dg/tree-ssa/pr101941-1.c

diff --git a/gcc/ipa-split.cc b/gcc/ipa-split.cc
index fc6be8eadef..6ca45f3b745 100644
--- a/gcc/ipa-split.cc
+++ b/gcc/ipa-split.cc
@@ -873,7 +873,6 @@ visit_bb (basic_block bb, basic_block return_bb,
   gimple *stmt = gsi_stmt (bsi);
   tree op;
   ssa_op_iter iter;
-  tree decl;
 
   if (is_gimple_debug (stmt))
continue;
@@ -899,33 +898,52 @@ visit_bb (basic_block bb, basic_block return_bb,
  can_split = false;
}
 
-  /* Check builtins that prevent splitting.  */
-  if (gimple_code (stmt) == GIMPLE_CALL
- && (decl = gimple_call_fndecl (stmt)) != NULL_TREE
- && fndecl_built_in_p (decl, BUILT_IN_NORMAL))
-   switch (DECL_FUNCTION_CODE (decl))
- {
- /* FIXME: once we will allow passing non-parm values to split part,
-we need to be sure to handle correct builtin_stack_save and
-builtin_stack_restore.  At the moment we are safe; there is no
-way to store builtin_stack_save result in non-SSA variable
-since all calls to those are compiler generated.  */
- case BUILT_IN_APPLY:
- case BUILT_IN_APPLY_ARGS:
- case BUILT_IN_VA_START:
-   if (dump_file && (dump_flags & TDF_DETAILS))
- fprintf (dump_file,
-  "Cannot split: builtin_apply and va_start.\n");
-   can_split = false;
-   break;
- case BUILT_IN_EH_POINTER:
-   if (dump_file && (dump_flags & TDF_DETAILS))
- fprintf (dump_file, "Cannot split: builtin_eh_pointer.\n");
-   can_split = false;
-   break;
- default:
-   break;
- }
+  /* Check calls that would prevent splitting.  */
+  if (gimple_code (stmt) == GIMPLE_CALL)
+   {
+ if (tree decl = gimple_call_fndecl (stmt))
+   {
+ /* Check builtins that would prevent splitting.  */
+ if (fndecl_built_in_p (decl, BUILT_IN_NORMAL))
+   switch (DECL_FUNCTION_CODE (decl))
+ {
+ /* FIXME: once we will allow passing non-parm values to
+split part, we need to be sure to handle correct
+builtin_stack_save and builtin_stack_restore.  At the
+moment we are safe; there is no way to store
+builtin_stack_save result in non-SSA variable since all
+calls to those are compiler generated.  */
+ case BUILT_IN_APPLY:
+ case BUILT_IN_APPLY_ARGS:
+ case BUILT_IN_VA_START:
+   if (dump_file && (dump_flags & TDF_DETAILS))
+ fprintf (dump_file,
+  "Cannot split: builtin_apply and va_start.\n");
+   can_split = false;
+   break;
+ case BUILT_IN_EH_POINTER:
+   if (dump_file && (dump_flags & TDF_DETAILS))
+ fprintf (dump_file,
+  "Cannot split: builtin_eh_pointer.\n");
+   can_split = false;
+   break;
+ default:
+   break;
+ }
+
+ /* Calls that function has either the warning or error
+attribute on it should not be split off into another
+function.  */
+ if (lookup_attribute ("warning", DECL_ATTRIBUTES (decl))
+  || lookup_attribute ("error", DECL_ATTRIBUTES (decl)))
+   {
+ if (dump_file && (dump_flags & 

[PATCH] [aarch64/64821]: Simplify __builtin_aarch64_sqrt* into internal function .SQRT.

[apinski--- via Gcc-patches]

From: Andrew Pinski 

This is a simple patch which simplifies the __builtin_aarch64_sqrt* builtins
into the internal function SQRT which allows for constant folding and other
optimizations at the gimple level. It was originally suggested we do to
__builtin_sqrt just for __builtin_aarch64_sqrtdf when -fno-math-errno
but since r6-4969-g686ee9719a4 we have the internal function SQRT which does
the same so it makes we don't need to check -fno-math-errno either now.

OK? Bootstrapped and tested on aarch64-linux-gnu with no regressions.

PR target/64821

gcc/ChangeLog:

* config/aarch64/aarch64-builtins.c
(aarch64_general_gimple_fold_builtin): Handle
__builtin_aarch64_sqrt* and simplify into SQRT internal
function.

gcc/testsuite/ChangeLog:

* gcc.target/aarch64/vsqrt-1.c: New test.
* gcc.target/aarch64/vsqrt-2.c: New test.
---
 gcc/config/aarch64/aarch64-builtins.c  |  7 ++
 gcc/testsuite/gcc.target/aarch64/vsqrt-1.c | 17 +
 gcc/testsuite/gcc.target/aarch64/vsqrt-2.c | 28 ++
 3 files changed, 52 insertions(+)
 create mode 100644 gcc/testsuite/gcc.target/aarch64/vsqrt-1.c
 create mode 100644 gcc/testsuite/gcc.target/aarch64/vsqrt-2.c

diff --git a/gcc/config/aarch64/aarch64-builtins.c 
b/gcc/config/aarch64/aarch64-builtins.c
index 58bcbd9875f..1bf487477eb 100644
--- a/gcc/config/aarch64/aarch64-builtins.c
+++ b/gcc/config/aarch64/aarch64-builtins.c
@@ -2820,6 +2820,13 @@ aarch64_general_gimple_fold_builtin (unsigned int fcode, 
gcall *stmt,
gimple_call_set_lhs (new_stmt, gimple_call_lhs (stmt));
break;
 
+  /* Lower sqrt builtins to gimple/internal function sqrt. */
+  BUILTIN_VHSDF_DF (UNOP, sqrt, 2, FP)
+   new_stmt = gimple_build_call_internal (IFN_SQRT,
+  1, args[0]);
+   gimple_call_set_lhs (new_stmt, gimple_call_lhs (stmt));
+   break;
+
  /*lower store and load neon builtins to gimple.  */
  BUILTIN_VALL_F16 (LOAD1, ld1, 0, LOAD)
  BUILTIN_VDQ_I (LOAD1_U, ld1, 0, LOAD)
diff --git a/gcc/testsuite/gcc.target/aarch64/vsqrt-1.c 
b/gcc/testsuite/gcc.target/aarch64/vsqrt-1.c
new file mode 100644
index 000..3207c8774ca
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/vsqrt-1.c
@@ -0,0 +1,17 @@
+/* PR target/64821 */
+/* { dg-do compile } */
+/* { dg-options "-O2 -fdump-tree-optimized" } */
+/* Check that we constant fold sqrt(4.0) into 2.0. */
+/* { dg-final { scan-tree-dump-times ".SQRT" 0 "optimized" } } */
+/* { dg-final { scan-tree-dump-times "2.0" 1 "optimized" } } */
+/* { dg-final { scan-assembler-times "fsqrt" 0 } } */
+/* We should produce a fmov to d0 with 2.0 but currently don't, see PR 103959. 
*/
+/* { dg-final { scan-assembler-times "\n\tfmov\td0, 2.0e.0" 1 { xfail *-*-* } 
} } */
+
+#include 
+
+float64x1_t f64(void)
+{
+   float64x1_t a = (float64x1_t){4.0};
+   return vsqrt_f64 (a);
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/vsqrt-2.c 
b/gcc/testsuite/gcc.target/aarch64/vsqrt-2.c
new file mode 100644
index 000..7465b79f3a7
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/vsqrt-2.c
@@ -0,0 +1,28 @@
+/* PR target/64821 */
+/* { dg-do compile } */
+/* { dg-options "-fdump-tree-optimized" } */
+#include 
+
+/* Check that we lower __builtin_aarch64_sqrt* into the internal function 
SQRT. */
+/* { dg-final { scan-tree-dump-times "__builtin_aarch64" 0 "optimized" } } */
+/* { dg-final { scan-tree-dump-times ".SQRT" 4 "optimized" } } */
+
+float64x1_t f64(float64x1_t a)
+{
+  return vsqrt_f64 (a);
+}
+
+float64x2_t f64q(float64x2_t a)
+{
+  return vsqrtq_f64 (a);
+}
+
+float32x2_t f32(float32x2_t a)
+{
+  return vsqrt_f32 (a);
+}
+
+float32x4_t f32q(float32x4_t a)
+{
+  return vsqrtq_f32 (a);
+}
-- 
2.17.1

[PATCH] Fix PR 59447: --with-dwarf2 should mention or later.

[apinski--- via Gcc-patches]

From: Andrew Pinski 

Dwarf3/4/5 are really just extensions (well not fully) on
top of dwarf2 and the option --with-dwarf2 just changes the
default to emit dwarf 2, 3, 4, or 5 by default.
On the trunk, dwarf 5 is enabled by this configure option.

gcc/ChangeLog:

PR bootstrap/59447
* configure: Regenerate.
* configure.ac: Add (or later) to the --with-dwarf2
option documentation
* doc/install.texi: Likewise.
---
 gcc/configure| 50 
 gcc/configure.ac |  2 +-
 gcc/doc/install.texi |  2 +-
 3 files changed, 43 insertions(+), 11 deletions(-)

diff --git a/gcc/configure b/gcc/configure
index 992a9d70092..fa0724f4f3a 100755
--- a/gcc/configure
+++ b/gcc/configure
@@ -914,6 +914,7 @@ infodir
 docdir
 oldincludedir
 includedir
+runstatedir
 localstatedir
 sharedstatedir
 sysconfdir
@@ -1088,6 +1089,7 @@ datadir='${datarootdir}'
 sysconfdir='${prefix}/etc'
 sharedstatedir='${prefix}/com'
 localstatedir='${prefix}/var'
+runstatedir='${localstatedir}/run'
 includedir='${prefix}/include'
 oldincludedir='/usr/include'
 docdir='${datarootdir}/doc/${PACKAGE}'
@@ -1340,6 +1342,15 @@ do
   | -silent | --silent | --silen | --sile | --sil)
 silent=yes ;;
 
+  -runstatedir | --runstatedir | --runstatedi | --runstated \
+  | --runstate | --runstat | --runsta | --runst | --runs \
+  | --run | --ru | --r)
+ac_prev=runstatedir ;;
+  -runstatedir=* | --runstatedir=* | --runstatedi=* | --runstated=* \
+  | --runstate=* | --runstat=* | --runsta=* | --runst=* | --runs=* \
+  | --run=* | --ru=* | --r=*)
+runstatedir=$ac_optarg ;;
+
   -sbindir | --sbindir | --sbindi | --sbind | --sbin | --sbi | --sb)
 ac_prev=sbindir ;;
   -sbindir=* | --sbindir=* | --sbindi=* | --sbind=* | --sbin=* \
@@ -1477,7 +1488,7 @@ fi
 for ac_var in  exec_prefix prefix bindir sbindir libexecdir datarootdir \
datadir sysconfdir sharedstatedir localstatedir includedir \
oldincludedir docdir infodir htmldir dvidir pdfdir psdir \
-   libdir localedir mandir
+   libdir localedir mandir runstatedir
 do
   eval ac_val=\$$ac_var
   # Remove trailing slashes.
@@ -1630,6 +1641,7 @@ Fine tuning of the installation directories:
   --sysconfdir=DIRread-only single-machine data [PREFIX/etc]
   --sharedstatedir=DIRmodifiable architecture-independent data [PREFIX/com]
   --localstatedir=DIR modifiable single-machine data [PREFIX/var]
+  --runstatedir=DIR   modifiable per-process data [LOCALSTATEDIR/run]
   --libdir=DIRobject code libraries [EPREFIX/lib]
   --includedir=DIRC header files [PREFIX/include]
   --oldincludedir=DIR C header files for non-gcc [/usr/include]
@@ -1823,7 +1835,8 @@ Optional Packages:
   --with-stack-clash-protection-guard-size=size
   Set the default stack clash protection guard size
   for specific targets as a power of two in bytes.
-  --with-dwarf2   force the default debug format to be DWARF 2
+  --with-dwarf2   force the default debug format to be DWARF 2 (or
+  later)
   --with-specs=SPECS  add SPECS to driver command-line processing
   --with-pkgversion=PKG   Use PKG in the version string in place of "GCC"
   --with-bugurl=URL   Direct users to URL to report a bug
@@ -5352,7 +5365,26 @@ else
   GDC="$ac_cv_prog_GDC"
 fi
 
+{ $as_echo "$as_me:${as_lineno-$LINENO}: checking whether the D compiler 
works" >&5
+$as_echo_n "checking whether the D compiler works... " >&6; }
+if ${acx_cv_d_compiler_works+:} false; then :
+  $as_echo_n "(cached) " >&6
+else
+  cat >conftest.d <&1 || echo failure`
+  if test x"$errors" = x && test -f conftest.$ac_objext; then
+acx_cv_d_compiler_works=yes
+  fi
+  rm -f conftest.*
+fi
+fi
+{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $acx_cv_d_compiler_works" >&5
+$as_echo "$acx_cv_d_compiler_works" >&6; }
+if test "x$GDC" != xno && test x$acx_cv_d_compiler_works != xno; then
   have_gdc=yes
 else
   have_gdc=no
@@ -6127,7 +6159,7 @@ else
 We can't simply define LARGE_OFF_T to be 9223372036854775807,
 since some C++ compilers masquerading as C compilers
 incorrectly reject 9223372036854775807.  */
-#define LARGE_OFF_T (((off_t) 1 << 62) - 1 + ((off_t) 1 << 62))
+#define LARGE_OFF_T off_t) 1 << 31) << 31) - 1 + (((off_t) 1 << 31) << 31))
   int off_t_is_large[(LARGE_OFF_T % 2147483629 == 721
   && LARGE_OFF_T % 2147483647 == 1)
  ? 1 : -1];
@@ -6173,7 +6205,7 @@ else
 We can't simply define LARGE_OFF_T to be 9223372036854775807,
 since some C++ compilers masquerading as C compilers
 incorrectly reject 9223372036854775807.  */
-#define LARGE_OFF_T (((off_t) 1 << 62) - 1 + ((off_t) 1 << 62))
+#define LARGE_OFF_T off_t) 1 << 31) << 31) - 1 + (((off_t) 1 << 31) << 31))
   int off_t_is_large[(LARGE_OFF_T % 2147483629 == 721
   

[PATCH] Fix target/103910: missing GTY on x86_mfence causing PCH usage to ICE

[apinski--- via Gcc-patches]

From: Andrew Pinski 

With -O3 -march=opteron, a mfence builtin is added after the loop
to say the nontemporal stores are no longer needed. This all good
without precompiled headers as the function decl that is referneced
by x86_mfence is referenced in another variable but with precompiled
headers, x86_mfence is all messed up and the decl was GC'ed away.
This fixes the problem by marking x86_mfence as GTY to save/restore
during precompiled headers just like most other variables in
the header file.

Committed as obvious after a bootstrap/test on x86_64-linux-gnu.

gcc/ChangeLog:

PR target/103910
* config/i386/i386.h (x86_mfence): Mark with GTY.
---
 gcc/config/i386/i386.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/gcc/config/i386/i386.h b/gcc/config/i386/i386.h
index f027608eefa..3ac0f698ae2 100644
--- a/gcc/config/i386/i386.h
+++ b/gcc/config/i386/i386.h
@@ -486,7 +486,7 @@ extern unsigned char ix86_prefetch_sse;
 
 /* Fence to use after loop using storent.  */
 
-extern tree x86_mfence;
+extern GTY(()) tree x86_mfence;
 #define FENCE_FOLLOWING_MOVNT x86_mfence
 
 /* Once GDB has been enhanced to deal with functions without frame
-- 
2.17.1

[PATCH] [COMMITTED] c++: [PR90782] Add testcase

[apinski--- via Gcc-patches]

From: Andrew Pinski 

This testcase was fixed by r12-1744-g3eecc1 as it make
sense it fixed a few other class deduction issues.
So I thought I would add a testcase for this PR and close
it as fixed.

Committed after a quick test of the testcase.

PR c++/90782

gcc/testsuite/ChangeLog:

* g++.dg/cpp1z/class-deduction100.C: New test.
---
 gcc/testsuite/g++.dg/cpp1z/class-deduction100.C | 13 +
 1 file changed, 13 insertions(+)
 create mode 100644 gcc/testsuite/g++.dg/cpp1z/class-deduction100.C

diff --git a/gcc/testsuite/g++.dg/cpp1z/class-deduction100.C 
b/gcc/testsuite/g++.dg/cpp1z/class-deduction100.C
new file mode 100644
index 000..9fa307ffb77
--- /dev/null
+++ b/gcc/testsuite/g++.dg/cpp1z/class-deduction100.C
@@ -0,0 +1,13 @@
+// PR c++/90782
+// { dg-do compile { target c++17 } }
+
+template
+struct bar {
+template
+bar(B& obj, void(B::*f)(A...)const=::operator()){}
+};
+int main() {
+const auto f1 = [](){};
+bar f8(f1);
+}
+
-- 
2.17.1

[PATCH] Revamp documentation for _Complex types extension

[apinski--- via Gcc-patches]

From: Andrew Pinski 

While cleaning up the bug database, I noticed there was a request
to improve the documentation of the _Complex type extensions.
So I rewrote part of the documentation to make things clearer on
__real/__imag and even added documentation about casts between
the scalar and the complex type.
I moved the documentation of __builtin_complex under this section
too because it makes more sense than having it in the other
built-in section and reference it.

OK? Built make info and make html and checked out the results to
make sure the tables look decent.

gcc/ChangeLog:

PR c/33193
* doc/extend.texi: Extend the documentation about Complex
types for casting and also rewrite the __real__/__imag__
expression portion to use tables.
Move __builtin_complex to the Complex type section.
---
 gcc/doc/extend.texi | 73 +
 1 file changed, 54 insertions(+), 19 deletions(-)

diff --git a/gcc/doc/extend.texi b/gcc/doc/extend.texi
index 9676a17406e..c7a43a79e16 100644
--- a/gcc/doc/extend.texi
+++ b/gcc/doc/extend.texi
@@ -986,22 +986,57 @@ The ISO C++14 library also defines the @samp{i} suffix, 
so C++14 code
 that includes the @samp{} header cannot use @samp{i} for the
 GNU extension.  The @samp{j} suffix still has the GNU meaning.
 
+GCC can handle both implicit and explicit casts between the @code{_Complex}
+types and other @code{_Complex} types as casting both the real and imaginary
+parts to the scalar type.
+GCC can handle implicit and explicit casts from a scalar type to a 
@code{_Complex}
+type and where the imaginary part will be considered zero.
+The C front-end can handle implicit and explicit casts from a @code{_Complex} 
type
+to a scalar type where the imaginary part will be ignored. In C++ code, this 
cast
+is considered illformed and G++ will error out.
+
+GCC provides a built-in function @code{__builtin_complex} will can be used to
+construct a complex value.
+
 @cindex @code{__real__} keyword
 @cindex @code{__imag__} keyword
-To extract the real part of a complex-valued expression @var{exp}, write
-@code{__real__ @var{exp}}.  Likewise, use @code{__imag__} to
-extract the imaginary part.  This is a GNU extension; for values of
-floating type, you should use the ISO C99 functions @code{crealf},
-@code{creal}, @code{creall}, @code{cimagf}, @code{cimag} and
-@code{cimagl}, declared in @code{} and also provided as
+
+GCC has a few extensions which can be used to extract the real
+and the imaginary part of the complex-valued expression. Note
+these expressions are lvalues if the @var{exp} is an lvalue.
+These expressions operands have the type of a complex type
+which might get prompoted to a complex type from a scalar type.
+E.g. @code{__real__ (int)@var{x}} is the same as casting to
+@code{_Complex int} before @code{__real__} is done.
+
+@multitable @columnfractions .4 .6
+@headitem Expression @tab Description
+@item @code{__real__ @var{exp}}
+@tab Extract the real part of @var{exp}.
+@item @code{__imag__ @var{exp}}
+@tab Extract the imaginary part of @var{exp}.
+@end multitable
+
+For values of floating point, you should use the ISO C99
+functions, declared in @code{} and also provided as
 built-in functions by GCC@.
 
+@multitable @columnfractions .4 .2 .2 .2
+@headitem Expression @tab float @tab double @tab long double
+@item @code{__real__ @var{exp}}
+@tab @code{crealf} @tab @code{creal} @tab @code{creall}
+@item @code{__imag__ @var{exp}}
+@tab @code{cimagf} @tab @code{cimag} @tab @code{cimagl}
+@end multitable
+
 @cindex complex conjugation
 The operator @samp{~} performs complex conjugation when used on a value
 with a complex type.  This is a GNU extension; for values of
 floating type, you should use the ISO C99 functions @code{conjf},
 @code{conj} and @code{conjl}, declared in @code{} and also
-provided as built-in functions by GCC@.
+provided as built-in functions by GCC@. Note unlike the @code{__real__}
+and @code{__imag__} operators, this operator will not do an implicit cast
+to the complex type because the @samp{~} is already a normal operator.
 
 GCC can allocate complex automatic variables in a noncontiguous
 fashion; it's even possible for the real part to be in a register while
@@ -1013,6 +1048,18 @@ If the variable's actual name is @code{foo}, the two 
fictitious
 variables are named @code{foo$real} and @code{foo$imag}.  You can
 examine and set these two fictitious variables with your debugger.
 
+@deftypefn {Built-in Function} @var{type} __builtin_complex (@var{real}, 
@var{imag})
+
+The built-in function @code{__builtin_complex} is provided for use in
+implementing the ISO C11 macros @code{CMPLXF}, @code{CMPLX} and
+@code{CMPLXL}.  @var{real} and @var{imag} must have the same type, a
+real binary floating-point type, and the result has the corresponding
+complex type with real and imaginary parts @var{real} and @var{imag}.
+Unlike @samp{@var{real} + I * @var{imag}}, this works even when

[PATCH] Committed: Add testcases for a few PRs

[apinski--- via Gcc-patches]

From: Andrew Pinski 

These were fixed as part of the fix for PR 99766,
I thought it would be useful to add a few testcases
for the other cases that were failing.

Committed as obvious after running the tests to make
sure they work.

PR rtl-optimization/100241
PR rtl-optimization/99787

gcc/testsuite/ChangeLog:

* gcc.c-torture/compile/pr100241-1.c: New test.
* gcc.c-torture/compile/pr99787-1.c: New test.
---
 .../gcc.c-torture/compile/pr100241-1.c| 48 +++
 .../gcc.c-torture/compile/pr99787-1.c | 18 +++
 2 files changed, 66 insertions(+)
 create mode 100644 gcc/testsuite/gcc.c-torture/compile/pr100241-1.c
 create mode 100644 gcc/testsuite/gcc.c-torture/compile/pr99787-1.c

diff --git a/gcc/testsuite/gcc.c-torture/compile/pr100241-1.c 
b/gcc/testsuite/gcc.c-torture/compile/pr100241-1.c
new file mode 100644
index 000..593ef96bdb7
--- /dev/null
+++ b/gcc/testsuite/gcc.c-torture/compile/pr100241-1.c
@@ -0,0 +1,48 @@
+/* { dg-require-visibility "" } */
+/* { dg-options "-fvisibility=internal -fPIC" { target fpic } } */
+
+extern char num_4x4_blocks_high_lookup, num_4x4_blocks_wide_lookup,
+vp9_foreach_transformed_block_in_plane_xd_0_0_0;
+int vp9_first_pass_encode_tile_mb_row_cpi_0,
+vp9_first_pass_encode_tile_mb_row_tile_data_0_0, vp9_encode_sby_pass1_x;
+typedef void foreach_transformed_block_visitor();
+void vp9_encode_sby_pass1();
+typedef struct {
+  long coded_error;
+  long sr_coded_error;
+  long frame_noise_energy;
+  long intra_error;
+} FIRSTPASS_DATA;
+typedef struct {
+  FIRSTPASS_DATA fp_data;
+} TileDataEnc;
+TileDataEnc accumulate_fp_mb_row_stat_this_tile;
+void vp9_first_pass_encode_tile_mb_row(FIRSTPASS_DATA *fp_acc_data) {
+  int mb_col_end = vp9_first_pass_encode_tile_mb_row_tile_data_0_0;
+  for (; mb_col_end;) {
+vp9_encode_sby_pass1();
+if (vp9_first_pass_encode_tile_mb_row_cpi_0) {
+  FIRSTPASS_DATA __trans_tmp_1 = *fp_acc_data;
+  accumulate_fp_mb_row_stat_this_tile.fp_data.coded_error +=
+  accumulate_fp_mb_row_stat_this_tile.fp_data.sr_coded_error +=
+  __trans_tmp_1.sr_coded_error;
+  accumulate_fp_mb_row_stat_this_tile.fp_data.frame_noise_energy +=
+  __trans_tmp_1.frame_noise_energy;
+  accumulate_fp_mb_row_stat_this_tile.fp_data.intra_error +=
+  __trans_tmp_1.intra_error;
+}
+  }
+}
+foreach_transformed_block_visitor vp9_foreach_transformed_block_in_plane_visit;
+void vp9_foreach_transformed_block_in_plane(void *arg) {
+  int c, max_blocks_wide = num_4x4_blocks_wide_lookup;
+  for (; num_4x4_blocks_high_lookup;) {
+c = 0;
+for (; c < max_blocks_wide;
+ c += vp9_foreach_transformed_block_in_plane_xd_0_0_0)
+  vp9_foreach_transformed_block_in_plane_visit(arg);
+  }
+}
+void vp9_encode_sby_pass1() {
+  vp9_foreach_transformed_block_in_plane(_encode_sby_pass1_x);
+}
diff --git a/gcc/testsuite/gcc.c-torture/compile/pr99787-1.c 
b/gcc/testsuite/gcc.c-torture/compile/pr99787-1.c
new file mode 100644
index 000..d98b7e746be
--- /dev/null
+++ b/gcc/testsuite/gcc.c-torture/compile/pr99787-1.c
@@ -0,0 +1,18 @@
+/* { dg-options "-ftree-slp-vectorize -ffp-contract=on -ffloat-store"  }  */
+
+_Complex foo_x_0;
+int foo_n11, foo_i, foo_l;
+_Complex float foo_s;
+_Complex *foo_f_0_0_0;
+
+void
+foo() {
+  _Complex f[foo_l];
+  for (; foo_i; foo_i++) {
+int n9;
+for (; n9 < foo_l; n9++)
+  for (; foo_n11; foo_n11++)
+foo_s += foo_f_0_0_0[n9] * 0 * foo_f_0_0_0[foo_n11];
+foo_x_0 += foo_s;
+  }
+}
-- 
2.17.1

[PATCH] Change the xfail in gcc.dg/uninit-pr89230-1.c

[apinski--- via Gcc-patches]

From: Andrew Pinski 

With the recent PHI-OPT patch for line numbers, I had missed this
testcase was now failing. The uninitialized warning was there
before my recent patch, just was on the wrong line. The testcase
had added an xfail in r12-4698-gf6d012338 (though a bug report was
not filed to record it).
This patch changes the dg-bogus messages around to catch both locations
and xfail both of them.

At least there is now a patch for the correct line numbers for the
phi-opt.

Committed after testing the testcase.

gcc/testsuite/ChangeLog:

* gcc.dg/uninit-pr89230-1.c: Change the dg-bogus messages
around and xfail both of them.
---
 gcc/testsuite/gcc.dg/uninit-pr89230-1.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/gcc/testsuite/gcc.dg/uninit-pr89230-1.c 
b/gcc/testsuite/gcc.dg/uninit-pr89230-1.c
index dfc87a5b1a0..bf536e2e65a 100644
--- a/gcc/testsuite/gcc.dg/uninit-pr89230-1.c
+++ b/gcc/testsuite/gcc.dg/uninit-pr89230-1.c
@@ -9,7 +9,7 @@ struct S { int i, j; };
 int g (void)
 {
   struct S *p = f ();
-  struct S *q; // { dg-bogus "may be used uninitialized" "uninitialized" { 
xfail *-*-* } }
+  struct S *q; // { dg-bogus "" "uninitialized" { xfail *-*-* } }
 
   if (p->i || !(q = f ()) || p->j != q->i)
{
@@ -18,7 +18,7 @@ int g (void)
  if (p->i)
return 1;
 
- if (!q)// { dg-bogus "\\\[-Wmaybe-uninitialized" }
+ if (!q)// { dg-bogus "\\\[-Wmaybe-uninitialized" "" { xfail *-*-* 
} }
return 2;
}
 
-- 
2.17.1

[PATCH] Improve location for new statements in match-and-simplify phiopt

[apinski--- via Gcc-patches]

From: Andrew Pinski 

Before match-and-simplify was used in phiot, the location of the
new stamtents were all of that of the conditional, this adds that
back as I did not realize gimple_simplify didn't do that for you.

OK? Bootstrapped and tested on x86_64 with no regressions.

gcc/ChangeLog:

* tree-ssa-phiopt.c (gimple_simplify_phiopt): Annotate the
new sequence with the location of the conditional statement.
---
 gcc/tree-ssa-phiopt.c | 4 
 1 file changed, 4 insertions(+)

diff --git a/gcc/tree-ssa-phiopt.c b/gcc/tree-ssa-phiopt.c
index 3eac9b1ce46..714deab005a 100644
--- a/gcc/tree-ssa-phiopt.c
+++ b/gcc/tree-ssa-phiopt.c
@@ -900,6 +900,8 @@ gimple_simplify_phiopt (bool early_p, tree type, gimple 
*comp_stmt,
  result = maybe_push_res_to_seq (, );
  if (result)
{
+ if (loc != UNKNOWN_LOCATION)
+   annotate_all_with_location (seq1, loc);
  gimple_seq_add_seq_without_update (seq, seq1);
  return result;
}
@@ -929,6 +931,8 @@ gimple_simplify_phiopt (bool early_p, tree type, gimple 
*comp_stmt,
  result = maybe_push_res_to_seq (, );
  if (result)
{
+ if (loc != UNKNOWN_LOCATION)
+   annotate_all_with_location (seq1, loc);
  gimple_seq_add_seq_without_update (seq, seq1);
  return result;
}
-- 
2.17.1

[PATCH] Fix C++/93809 and C++/83469: typenames and unions

[apinski--- via Gcc-patches]

From: Andrew Pinski 

There are a few issues here with typenames and unions (and even struct
keywords with unions). First in cp_parser_check_class_key,
we need to allow typenames to name union types and union key
to be able to use with typenames.

The next issue is we need to record if we had a union key,
right now we just record it was a struct/class/typename one
which is wrong.

OK? Boostrapped and tested on x86_64-linux-gnu with no regressions.

PR c++/83469
PR c++/93809

gcc/cp/ChangeLog:

* cp-tree.h (UNION_CLASS_TYPE_P): New define.
(TYPENAME_IS_UNION_P): New Define.
* decl.c (struct typename_info): Add union_p field.
(struct typename_hasher::equal): Compare union_p field.
(build_typename_type): Move union_type to
union_p/TYPENAME_IS_UNION_P.
* error.c (dump_type) : Handle TYPENAME_IS_UNION_P
as "union"
* module.cc (trees_out::type_node): Handle TYPENAME_IS_UNION_P.
* parser.c (cp_parser_check_class_key): Allow
typename key for union types and allow union keyword for
typename types.
* pt.c (tsubst) : For TYPENAME_IS_CLASS_P,
check NON_UNION_CLASS_TYPE_P rather than CLASS_TYPE_P.
Add TYPENAME_IS_UNION_P handling.

gcc/testsuite/ChangeLog:

* g++.dg/warn/Wredundant-tags-3.C: Remove xfail.
* g++.dg/pr83469-1.C: New test.
* g++.dg/pr83469-2.C: New test.
* g++.dg/pr83469-3.C: New test.
* g++.dg/pr93809-1.C: New test.
* g++.dg/pr93809-2.C: New test.
* g++.dg/pr93809-3.C: New test.
---
 gcc/cp/cp-tree.h  | 11 +--
 gcc/cp/decl.c |  9 ++---
 gcc/cp/error.c|  1 +
 gcc/cp/module.cc  |  2 ++
 gcc/cp/parser.c   |  4 +++-
 gcc/cp/pt.c   | 10 +-
 gcc/testsuite/g++.dg/pr83469-1.C  | 15 +++
 gcc/testsuite/g++.dg/pr83469-2.C  | 13 +
 gcc/testsuite/g++.dg/pr83469-3.C  | 13 +
 gcc/testsuite/g++.dg/pr93809-1.C  | 11 +++
 gcc/testsuite/g++.dg/pr93809-2.C  |  5 +
 gcc/testsuite/g++.dg/pr93809-3.C  |  4 
 gcc/testsuite/g++.dg/warn/Wredundant-tags-3.C |  2 +-
 13 files changed, 92 insertions(+), 8 deletions(-)
 create mode 100644 gcc/testsuite/g++.dg/pr83469-1.C
 create mode 100644 gcc/testsuite/g++.dg/pr83469-2.C
 create mode 100644 gcc/testsuite/g++.dg/pr83469-3.C
 create mode 100644 gcc/testsuite/g++.dg/pr93809-1.C
 create mode 100644 gcc/testsuite/g++.dg/pr93809-2.C
 create mode 100644 gcc/testsuite/g++.dg/pr93809-3.C

diff --git a/gcc/cp/cp-tree.h b/gcc/cp/cp-tree.h
index 3510512d751..ea9cbb775e6 100644
--- a/gcc/cp/cp-tree.h
+++ b/gcc/cp/cp-tree.h
@@ -2206,6 +2206,10 @@ enum languages { lang_c, lang_cplusplus };
 #define NON_UNION_CLASS_TYPE_P(T) \
   (TREE_CODE (T) == RECORD_TYPE && TYPE_LANG_FLAG_5 (T))
 
+/* Nonzero if T is a class type and is a union.  */
+#define UNION_CLASS_TYPE_P(T) \
+  (TREE_CODE (T) == UNION_TYPE && TYPE_LANG_FLAG_5 (T))
+
 /* Keep these checks in ascending code order.  */
 #define RECORD_OR_UNION_CODE_P(T)  \
   ((T) == RECORD_TYPE || (T) == UNION_TYPE)
@@ -4184,11 +4188,14 @@ more_aggr_init_expr_args_p (const 
aggr_init_expr_arg_iterator *iter)
 #define TYPENAME_IS_ENUM_P(NODE) \
   (TREE_LANG_FLAG_0 (TYPENAME_TYPE_CHECK (NODE)))
 
-/* True if a TYPENAME_TYPE was declared as a "class", "struct", or
-   "union".  */
+/* True if a TYPENAME_TYPE was declared as a "class", "struct".  */
 #define TYPENAME_IS_CLASS_P(NODE) \
   (TREE_LANG_FLAG_1 (TYPENAME_TYPE_CHECK (NODE)))
 
+/* True if a TYPENAME_TYPE was declared as an "union".  */
+#define TYPENAME_IS_UNION_P(NODE) \
+  (TREE_LANG_FLAG_3 (TYPENAME_TYPE_CHECK (NODE)))
+
 /* True if a TYPENAME_TYPE is in the process of being resolved.  */
 #define TYPENAME_IS_RESOLVING_P(NODE) \
   (TREE_LANG_FLAG_2 (TYPENAME_TYPE_CHECK (NODE)))
diff --git a/gcc/cp/decl.c b/gcc/cp/decl.c
index 56f80775ca0..8fa07e30d69 100644
--- a/gcc/cp/decl.c
+++ b/gcc/cp/decl.c
@@ -3930,6 +3930,7 @@ struct typename_info {
   tree template_id;
   bool enum_p;
   bool class_p;
+  bool union_p;
 };
 
 struct typename_hasher : ggc_ptr_hash
@@ -3958,7 +3959,8 @@ struct typename_hasher : ggc_ptr_hash
&& TYPE_CONTEXT (t1) == t2->scope
&& TYPENAME_TYPE_FULLNAME (t1) == t2->template_id
&& TYPENAME_IS_ENUM_P (t1) == t2->enum_p
-   && TYPENAME_IS_CLASS_P (t1) == t2->class_p);
+   && TYPENAME_IS_CLASS_P (t1) == t2->class_p
+   && TYPENAME_IS_UNION_P (t1) == t2->union_p);
   }
 };
 
@@ -3983,8 +3985,8 @@ build_typename_type (tree context, tree name, tree 
fullname,
   ti.template_id = fullname;
   ti.enum_p = tag_type == enum_type;
   ti.class_p = (tag_type == class_type
-   || tag_type == record_type
-   

[PATCH] [Committed] New testcase for C++/71792, bitfields and auto

[apinski--- via Gcc-patches]

From: Andrew Pinski 

This testcase used to fail before GCC 6.4.0 due to the wrong
type being used for auto when used with bitfields, the C++
front-end was using the "bitfield" type rather than the
underlaying type.

Committed the testcase after a quick check.

PR c++/71792

gcc/testsuite/ChangeLog:

* g++.dg/torture/pr71792.C: New test.
---
 gcc/testsuite/g++.dg/torture/pr71792.C | 42 ++
 1 file changed, 42 insertions(+)
 create mode 100644 gcc/testsuite/g++.dg/torture/pr71792.C

diff --git a/gcc/testsuite/g++.dg/torture/pr71792.C 
b/gcc/testsuite/g++.dg/torture/pr71792.C
new file mode 100644
index 000..607774d755d
--- /dev/null
+++ b/gcc/testsuite/g++.dg/torture/pr71792.C
@@ -0,0 +1,42 @@
+// { dg-do run { target c++11 } }
+// PR C++/71792
+
+class some_class
+{
+public:
+  unsigned int np  : 4;
+  unsigned int nc  : 8;
+  unsigned int nc0 : 1;
+};
+
+template
+static void test_bug (const some_class ) {
+  if (what) {
+int t = 0;
+for (auto i = mp.nc0; i < mp.nc; i++) {
+  if (t != i) __builtin_abort ();
+  t++;
+}
+  }
+}
+
+static void test_ok (const some_class ) {
+  int t = 0;
+  for (auto i = mp.nc0; i < mp.nc; i++) {
+if (t != i) __builtin_abort ();
+t++;
+  }
+}
+
+int main ()
+{
+  some_class mp;
+  mp.nc0 = 0;
+  mp.nc = 9;
+  mp.np = 3;
+
+  test_bug (mp);
+  test_ok (mp);
+
+  return 0;
+}
-- 
2.17.1

[PATCH] tree-optimization: [PR101540] Simplify CONSTRUCTOR for vector(1) to be VCE

[apinski--- via Gcc-patches]

From: Andrew Pinski 

This just adds a simplification to simplify_vector_constructor for
vector of 1 element to be VCE which should reduce memory usage in
the compiler and maybe allow for some more optimizations.

OK? Bootstrapped and tested on x86_64-linux-gnu with no regressions.

PR tree-optimization/101540

gcc/ChangeLog:

* tree-ssa-forwprop.c (simplify_vector_constructor):
Simplify constructor of vector of 1 element to just
be a VIEW_CONVERT_EXPR.

gcc/testsuite/ChangeLog:

* gcc.dg/tree-ssa/pr101540-1.c: New test.
---
 gcc/testsuite/gcc.dg/tree-ssa/pr101540-1.c | 13 +
 gcc/tree-ssa-forwprop.c| 13 +
 2 files changed, 26 insertions(+)
 create mode 100644 gcc/testsuite/gcc.dg/tree-ssa/pr101540-1.c

diff --git a/gcc/testsuite/gcc.dg/tree-ssa/pr101540-1.c 
b/gcc/testsuite/gcc.dg/tree-ssa/pr101540-1.c
new file mode 100644
index 000..73fb342e029
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/tree-ssa/pr101540-1.c
@@ -0,0 +1,13 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -fdump-tree-forwprop1" } */
+/* PR tree-optimization/101540 */
+typedef unsigned char __attribute__((__vector_size__ (1))) W;
+
+W foo (unsigned char uc)
+{
+  return (W){uc};
+}
+/* The constructor in the above function should be converted into a VCE.  */
+/* { dg-final { scan-tree-dump-times "VIEW_CONVERT_EXPR" 1 "forwprop1"} } */
+// {uc_1(D)}
+/* { dg-final { scan-tree-dump-times "{uc_\[0-9\]+.D.}" 0 "forwprop1"} } */
diff --git a/gcc/tree-ssa-forwprop.c b/gcc/tree-ssa-forwprop.c
index a830bab78ba..94b92d3d0af 100644
--- a/gcc/tree-ssa-forwprop.c
+++ b/gcc/tree-ssa-forwprop.c
@@ -2392,6 +2392,19 @@ simplify_vector_constructor (gimple_stmt_iterator *gsi)
   elem_type = TREE_TYPE (type);
   elem_size = TREE_INT_CST_LOW (TYPE_SIZE (elem_type));
 
+  /* Special case V1 constructor with the same type to being a VCE.  */
+  if (nelts == 1 && CONSTRUCTOR_NELTS (op) == 1)
+{
+  tree op1 = CONSTRUCTOR_ELT (op, 0)->value;
+  if (useless_type_conversion_p (elem_type, TREE_TYPE (op1)))
+   {
+ op1 = build1 (VIEW_CONVERT_EXPR, type, op1);
+ gimple_assign_set_rhs_from_tree (gsi, op1);
+ update_stmt (gsi_stmt (*gsi));
+ return true;
+   }
+}
+
   orig[0] = NULL;
   orig[1] = NULL;
   conv_code = ERROR_MARK;
-- 
2.17.1

[PATCH] Fix PR 19089: Environment variable TMP may yield gcc: abort

[apinski--- via Gcc-patches]

From: Andrew Pinski 

Even though I cannot reproduce the ICE any more, this is still
a bug. We check already to see if we can access the directory
but never check to see if the path is actually a directory.

This adds the check and now we reject the file as not usable
as a tmp directory.

OK? Bootstrapped and tested on x86_64-linux-gnu with no regressions.

libiberty/ChangeLog:

* make-temp-file.c (try_dir): Check to see if the dir
is actually a directory.
---
 libiberty/make-temp-file.c | 16 +++-
 1 file changed, 15 insertions(+), 1 deletion(-)

diff --git a/libiberty/make-temp-file.c b/libiberty/make-temp-file.c
index 31f87fbcfde..11eb03d12ec 100644
--- a/libiberty/make-temp-file.c
+++ b/libiberty/make-temp-file.c
@@ -39,6 +39,10 @@ Boston, MA 02110-1301, USA.  */
 #if defined(_WIN32) && !defined(__CYGWIN__)
 #include 
 #endif
+#if HAVE_SYS_STAT_H
+#include 
+#endif
+
 
 #ifndef R_OK
 #define R_OK 4
@@ -76,7 +80,17 @@ try_dir (const char *dir, const char *base)
 return base;
   if (dir != 0
   && access (dir, R_OK | W_OK | X_OK) == 0)
-return dir;
+{
+  /* Check to make sure dir is actually a directory. */
+#ifdef S_ISDIR
+  struct stat s;
+  if (stat(dir, ))
+   return NULL;
+  if (!S_ISDIR (s.st_mode))
+   return NULL;
+#endif
+  return dir;
+}
   return 0;
 }
 
-- 
2.27.0

[PATCH] Fix PR 62157: disclean in libsanitizer not working

[apinski--- via Gcc-patches]

From: Andrew Pinski 

So what is happening is DIST_SUBDIRS contains the conditional
directories which is wrong, so we need to force DIST_SUBDIRS
to be the same as SUBDIRS as recommened by the automake manual.

OK? Bootstrapped and tested on x86_64-linux-gnu with no regressions.
Also now make distclean works inside libsanitizer directory.

libsanitizer/ChangeLog:

PR sanitizer/62157
* Makefile.am: Force DIST_SUBDIRS to be SUBDIRS.
* Makefile.in: Regenerate.
* asan/Makefile.in: Likewise.
* hwasan/Makefile.in: Likewise.
* interception/Makefile.in: Likewise.
* libbacktrace/Makefile.in: Likewise.
* lsan/Makefile.in: Likewise.
* sanitizer_common/Makefile.in: Likewise.
* tsan/Makefile.in: Likewise.
* ubsan/Makefile.in: Likewise.
---
 libsanitizer/Makefile.am  | 3 +++
 libsanitizer/Makefile.in  | 4 ++--
 libsanitizer/asan/Makefile.in | 1 +
 libsanitizer/hwasan/Makefile.in   | 1 +
 libsanitizer/interception/Makefile.in | 1 +
 libsanitizer/libbacktrace/Makefile.in | 1 +
 libsanitizer/lsan/Makefile.in | 1 +
 libsanitizer/sanitizer_common/Makefile.in | 1 +
 libsanitizer/tsan/Makefile.in | 1 +
 libsanitizer/ubsan/Makefile.in| 1 +
 10 files changed, 13 insertions(+), 2 deletions(-)

diff --git a/libsanitizer/Makefile.am b/libsanitizer/Makefile.am
index 065a65e78d4..53e20bdac2c 100644
--- a/libsanitizer/Makefile.am
+++ b/libsanitizer/Makefile.am
@@ -28,6 +28,9 @@ SUBDIRS += hwasan
 endif
 endif
 
+## Force DIST_SUBDIRS so that make distclean works
+DIST_SUBDIRS = $(SUBDIRS)
+
 ## May be used by toolexeclibdir.
 gcc_version := $(shell @get_gcc_base_ver@ $(top_srcdir)/../gcc/BASE-VER)
 
diff --git a/libsanitizer/Makefile.in b/libsanitizer/Makefile.in
index 3873ea4d705..486c7920ee2 100644
--- a/libsanitizer/Makefile.in
+++ b/libsanitizer/Makefile.in
@@ -208,8 +208,6 @@ am__define_uniq_tagged_files = \
 ETAGS = etags
 CTAGS = ctags
 CSCOPE = cscope
-DIST_SUBDIRS = sanitizer_common interception libbacktrace lsan asan \
-   ubsan tsan hwasan
 ACLOCAL = @ACLOCAL@
 ALLOC_FILE = @ALLOC_FILE@
 AMTAR = @AMTAR@
@@ -345,6 +343,7 @@ pdfdir = @pdfdir@
 prefix = @prefix@
 program_transform_name = @program_transform_name@
 psdir = @psdir@
+runstatedir = @runstatedir@
 sbindir = @sbindir@
 sharedstatedir = @sharedstatedir@
 srcdir = @srcdir@
@@ -366,6 +365,7 @@ nodist_saninclude_HEADERS = $(am__append_1)
 @SANITIZER_SUPPORTED_TRUE@SUBDIRS = sanitizer_common $(am__append_2) \
 @SANITIZER_SUPPORTED_TRUE@ $(am__append_3) lsan asan ubsan \
 @SANITIZER_SUPPORTED_TRUE@ $(am__append_4) $(am__append_5)
+DIST_SUBDIRS = $(SUBDIRS)
 gcc_version := $(shell @get_gcc_base_ver@ $(top_srcdir)/../gcc/BASE-VER)
 
 # Work around what appears to be a GNU make bug handling MAKEFLAGS
diff --git a/libsanitizer/asan/Makefile.in b/libsanitizer/asan/Makefile.in
index 528ab61312c..e00927dd13d 100644
--- a/libsanitizer/asan/Makefile.in
+++ b/libsanitizer/asan/Makefile.in
@@ -397,6 +397,7 @@ pdfdir = @pdfdir@
 prefix = @prefix@
 program_transform_name = @program_transform_name@
 psdir = @psdir@
+runstatedir = @runstatedir@
 sbindir = @sbindir@
 sharedstatedir = @sharedstatedir@
 srcdir = @srcdir@
diff --git a/libsanitizer/hwasan/Makefile.in b/libsanitizer/hwasan/Makefile.in
index 1729349e682..0021e783c61 100644
--- a/libsanitizer/hwasan/Makefile.in
+++ b/libsanitizer/hwasan/Makefile.in
@@ -385,6 +385,7 @@ pdfdir = @pdfdir@
 prefix = @prefix@
 program_transform_name = @program_transform_name@
 psdir = @psdir@
+runstatedir = @runstatedir@
 sbindir = @sbindir@
 sharedstatedir = @sharedstatedir@
 srcdir = @srcdir@
diff --git a/libsanitizer/interception/Makefile.in 
b/libsanitizer/interception/Makefile.in
index 326ee9a1818..c14d5270286 100644
--- a/libsanitizer/interception/Makefile.in
+++ b/libsanitizer/interception/Makefile.in
@@ -315,6 +315,7 @@ pdfdir = @pdfdir@
 prefix = @prefix@
 program_transform_name = @program_transform_name@
 psdir = @psdir@
+runstatedir = @runstatedir@
 sbindir = @sbindir@
 sharedstatedir = @sharedstatedir@
 srcdir = @srcdir@
diff --git a/libsanitizer/libbacktrace/Makefile.in 
b/libsanitizer/libbacktrace/Makefile.in
index 3f05cdf3d62..f008f8eb552 100644
--- a/libsanitizer/libbacktrace/Makefile.in
+++ b/libsanitizer/libbacktrace/Makefile.in
@@ -365,6 +365,7 @@ pdfdir = @pdfdir@
 prefix = @prefix@
 program_transform_name = @program_transform_name@
 psdir = @psdir@
+runstatedir = @runstatedir@
 sbindir = @sbindir@
 sharedstatedir = @sharedstatedir@
 srcdir = @srcdir@
diff --git a/libsanitizer/lsan/Makefile.in b/libsanitizer/lsan/Makefile.in
index 0ee0be6526e..25ac00cf8db 100644
--- a/libsanitizer/lsan/Makefile.in
+++ b/libsanitizer/lsan/Makefile.in
@@ -360,6 +360,7 @@ pdfdir = @pdfdir@
 prefix = @prefix@
 program_transform_name = @program_transform_name@
 psdir = @psdir@
+runstatedir = @runstatedir@
 sbindir = @sbindir@
 sharedstatedir = @sharedstatedir@

[PATCH v2] Canonicalize [ssa_n, CST] to ssa_n p+ CST in fold_stmt_1

[apinski--- via Gcc-patches]

From: Andrew Pinski 

This is a new version of the patch to fix PR 102216.
Instead of doing the canonicalization inside forwprop, Richi
mentioned we should do it inside fold_stmt_1 and that is what
this patch does.

PR tree-optimization/102216

gcc/ChangeLog:

* gimple-fold.c (fold_stmt_1): Add canonicalization
of "[ssa_n, CST]" to "ssa_n p+ CST", note this
can only be done if !in_place.

gcc/testsuite/ChangeLog:

* g++.dg/tree-ssa/pr102216-1.C: New test.
* g++.dg/tree-ssa/pr102216-2.C: New test.
---
 gcc/gimple-fold.c  | 21 ++
 gcc/testsuite/g++.dg/tree-ssa/pr102216-1.C | 21 ++
 gcc/testsuite/g++.dg/tree-ssa/pr102216-2.C | 45 ++
 3 files changed, 87 insertions(+)
 create mode 100644 gcc/testsuite/g++.dg/tree-ssa/pr102216-1.C
 create mode 100644 gcc/testsuite/g++.dg/tree-ssa/pr102216-2.C

diff --git a/gcc/gimple-fold.c b/gcc/gimple-fold.c
index ad9703ee471..aab6818c93f 100644
--- a/gcc/gimple-fold.c
+++ b/gcc/gimple-fold.c
@@ -6061,6 +6061,27 @@ fold_stmt_1 (gimple_stmt_iterator *gsi, bool inplace, 
tree (*valueize) (tree))
  if (REFERENCE_CLASS_P (*lhs)
  && maybe_canonicalize_mem_ref_addr (lhs))
changed = true;
+ /* Canonicalize [ssa_n, CST] to ssa_n p+ CST.
+This cannot be done in maybe_canonicalize_mem_ref_addr
+as the gimple now has two operands rather than one.
+The same reason why this can't be done in
+maybe_canonicalize_mem_ref_addr is the same reason why
+this can't be done inplace.  */
+ if (!inplace && TREE_CODE (*rhs) == ADDR_EXPR)
+   {
+ tree inner = TREE_OPERAND (*rhs, 0);
+ if (TREE_CODE (inner) == MEM_REF
+ && TREE_CODE (TREE_OPERAND (inner, 0)) == SSA_NAME
+ && TREE_CODE (TREE_OPERAND (inner, 1)) == INTEGER_CST)
+   {
+ tree ptr = TREE_OPERAND (inner, 0);
+ tree addon = TREE_OPERAND (inner, 1);
+ addon = fold_convert (sizetype, addon);
+ gimple_assign_set_rhs_with_ops (gsi, POINTER_PLUS_EXPR,
+ ptr, addon);
+ changed = true;
+   }
+   }
}
   else
{
diff --git a/gcc/testsuite/g++.dg/tree-ssa/pr102216-1.C 
b/gcc/testsuite/g++.dg/tree-ssa/pr102216-1.C
new file mode 100644
index 000..21f7f6797ff
--- /dev/null
+++ b/gcc/testsuite/g++.dg/tree-ssa/pr102216-1.C
@@ -0,0 +1,21 @@
+/* { dg-options "-O2 -fdump-tree-optimized" } */
+void link_error ();
+void g ()
+{
+  const char **language_names;
+
+  language_names = new const char *[6];
+
+  const char **language_names_p = language_names;
+
+  language_names_p++;
+  language_names_p++;
+  language_names_p++;
+
+  if ( (language_names_p) - (language_names+3) != 0)
+link_error();
+  delete[] language_names;
+}
+/* We should have removed the link_error on the gimple level as GCC should
+   be able to tell that language_names_p is the same as language_names+3.  */
+/* { dg-final { scan-tree-dump-times "link_error" 0 "optimized" } } */
diff --git a/gcc/testsuite/g++.dg/tree-ssa/pr102216-2.C 
b/gcc/testsuite/g++.dg/tree-ssa/pr102216-2.C
new file mode 100644
index 000..8d351a9bad0
--- /dev/null
+++ b/gcc/testsuite/g++.dg/tree-ssa/pr102216-2.C
@@ -0,0 +1,45 @@
+/* { dg-options "-O2 -Wall" } */
+#include 
+
+static inline bool
+compare_cstrings (const char *str1, const char *str2)
+{
+  return str1 < str2;
+}
+
+void
+add_set_language_command ()
+{
+  static const char **language_names;
+
+  language_names = new const char *[6];
+
+  language_names[0] = "auto";
+  language_names[1] = "local";
+  language_names[2] = "unknown";
+
+  const char **language_names_p = language_names;
+  /* language_names_p == _names[0].  */
+  language_names_p++;
+  /* language_names_p == _names[1].  */
+  language_names_p++;
+  /* language_names_p == _names[2].  */
+  language_names_p++;
+  /* language_names_p == _names[3].  */
+
+  const char **sort_begin;
+
+  if (0)
+sort_begin = _names[3];
+  else
+sort_begin = language_names_p;
+
+  language_names[3] = "";
+  language_names[4] = "";
+  language_names[5] = NULL;
+
+  /* There should be no warning associated with this std::sort as
+ sort_begin != _names[5] and GCC should be able to figure
+ that out.  */
+  std::sort (sort_begin, _names[5], compare_cstrings);
+}
-- 
2.17.1

[PATCH 2/2] tree-optimization: [PR92342] Move b & -(a==c) optimization to the gimple level

[apinski--- via Gcc-patches]

From: Andrew Pinski 

Combine disabled this optimization in r10-254-gddbb5da5199fb42 but it makes
sense to do this on the gimple level and then let expand decide which way is
better. So this adds the transformation on the gimple level (late like was
done for the multiply case).

OK? Bootstrapped and tested on x86_64-linux-gnu with no regressions.

PR tree-optimization/92342

gcc/ChangeLog:

* match.pd (b & -(a CMP c) -> (a CMP c)?b:0): New pattern.

gcc/testsuite/ChangeLog:

* gcc.dg/tree-ssa/andnegcmp-1.c: New test.
* gcc.dg/tree-ssa/andnegcmp-2.c: New test.
---
 gcc/match.pd|  8 +++-
 gcc/testsuite/gcc.dg/tree-ssa/andnegcmp-1.c | 14 ++
 gcc/testsuite/gcc.dg/tree-ssa/andnegcmp-2.c | 14 ++
 3 files changed, 35 insertions(+), 1 deletion(-)
 create mode 100644 gcc/testsuite/gcc.dg/tree-ssa/andnegcmp-1.c
 create mode 100644 gcc/testsuite/gcc.dg/tree-ssa/andnegcmp-2.c

diff --git a/gcc/match.pd b/gcc/match.pd
index ed43c321cbc..b55cbc91b57 100644
--- a/gcc/match.pd
+++ b/gcc/match.pd
@@ -1794,7 +1794,13 @@ DEFINE_INT_AND_FLOAT_ROUND_FN (RINT)
  (for cmp (tcc_comparison)
   (simplify
(mult:c (convert (cmp @0 @1)) @2)
-   (cond (cmp @0 @1) @2 { build_zero_cst (type); }
+   (cond (cmp @0 @1) @2 { build_zero_cst (type); }))
+/* (-(m1 CMP m2)) & d -> (m1 CMP m2) ? d : 0  */
+  (simplify
+   (bit_and:c (negate (convert (cmp @0 @1))) @2)
+   (cond (cmp @0 @1) @2 { build_zero_cst (type); }))
+ )
+)
 
 /* For integral types with undefined overflow and C != 0 fold
x * C EQ/NE y * C into x EQ/NE y.  */
diff --git a/gcc/testsuite/gcc.dg/tree-ssa/andnegcmp-1.c 
b/gcc/testsuite/gcc.dg/tree-ssa/andnegcmp-1.c
new file mode 100644
index 000..6f16783f169
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/tree-ssa/andnegcmp-1.c
@@ -0,0 +1,14 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -fdump-tree-optimized" } */
+/* PR tree-optimization/92342 */
+
+int
+f (int m1, int m2, int c)
+{
+  int d = m1 == m2;
+  d = -d;
+  int e = d & c;
+  return e;
+}
+
+/* { dg-final { scan-tree-dump-times "\\? c_\[0-9\]\\(D\\) : 0" 1 "optimized" 
} } */
diff --git a/gcc/testsuite/gcc.dg/tree-ssa/andnegcmp-2.c 
b/gcc/testsuite/gcc.dg/tree-ssa/andnegcmp-2.c
new file mode 100644
index 000..0e25c8abc39
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/tree-ssa/andnegcmp-2.c
@@ -0,0 +1,14 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -fdump-tree-optimized" } */
+/* PR tree-optimization/92342 */
+
+int
+f (int m1, int m2, int c)
+{
+  int d = m1 < m2;
+  d = -d;
+  int e = c & d;
+  return e;
+}
+
+/* { dg-final { scan-tree-dump-times "\\? c_\[0-9\]\\(D\\) : 0" 1 "optimized" 
} } */
-- 
2.17.1

[PATCH 1/2] Improve/Fix (m1 CMP m2) * d -> (m1 CMP m2) ? d : 0 pattern.

[apinski--- via Gcc-patches]

From: Andrew Pinski 

The pattern here was not catching all comparisons and the multiply
was not commutative when it should have been. This patches fixes
that by using tcc_comparison and adding :c to the multiply.

OK? Bootstrapped and tested on x86_64-linux-gnu with no regressions.

gcc/ChangeLog:

* match.pd ((m1 CMP m2) * d -> (m1 CMP m2) ? d : 0):
Use tcc_comparison and :c for the multiply.

gcc/testsuite/ChangeLog:

* gcc.dg/tree-ssa/multcmp-1.c: New test.
* gcc.dg/tree-ssa/multcmp-2.c: New test.
---
 gcc/match.pd  |  4 ++--
 gcc/testsuite/gcc.dg/tree-ssa/multcmp-1.c | 12 
 gcc/testsuite/gcc.dg/tree-ssa/multcmp-2.c | 12 
 3 files changed, 26 insertions(+), 2 deletions(-)
 create mode 100644 gcc/testsuite/gcc.dg/tree-ssa/multcmp-1.c
 create mode 100644 gcc/testsuite/gcc.dg/tree-ssa/multcmp-2.c

diff --git a/gcc/match.pd b/gcc/match.pd
index ca6c9eff624..ed43c321cbc 100644
--- a/gcc/match.pd
+++ b/gcc/match.pd
@@ -1791,9 +1791,9 @@ DEFINE_INT_AND_FLOAT_ROUND_FN (RINT)
 
 /* (m1 CMP m2) * d -> (m1 CMP m2) ? d : 0  */
 (if (!canonicalize_math_p ())
- (for cmp (gt lt ge le)
+ (for cmp (tcc_comparison)
   (simplify
-   (mult (convert (cmp @0 @1)) @2)
+   (mult:c (convert (cmp @0 @1)) @2)
(cond (cmp @0 @1) @2 { build_zero_cst (type); }
 
 /* For integral types with undefined overflow and C != 0 fold
diff --git a/gcc/testsuite/gcc.dg/tree-ssa/multcmp-1.c 
b/gcc/testsuite/gcc.dg/tree-ssa/multcmp-1.c
new file mode 100644
index 000..fb44cacde77
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/tree-ssa/multcmp-1.c
@@ -0,0 +1,12 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -fdump-tree-optimized" } */
+
+int
+f (int m1, int m2, int c)
+{
+  int d = m1 == m2;
+  int e = d * c;
+  return e;
+}
+
+/* { dg-final { scan-tree-dump-times "\\? c_\[0-9\]\\(D\\) : 0" 1 "optimized" 
} } */
diff --git a/gcc/testsuite/gcc.dg/tree-ssa/multcmp-2.c 
b/gcc/testsuite/gcc.dg/tree-ssa/multcmp-2.c
new file mode 100644
index 000..be38b2e0044
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/tree-ssa/multcmp-2.c
@@ -0,0 +1,12 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -fdump-tree-optimized" } */
+
+int
+f (int m1, int m2, int c)
+{
+  int d = m1 != m2;
+  int e = c * d;
+  return e;
+}
+
+/* { dg-final { scan-tree-dump-times "\\? c_\[0-9\]\\(D\\) : 0" 1 "optimized" 
} } */
-- 
2.17.1

[PATCH] tree-optimization: [PR31531] Improve ~a < CST, allow a nop cast inbetween ~ and a

[apinski--- via Gcc-patches]

From: Andrew Pinski 

This PR was orignally for the missed optimization of a few isnegative which
had been solved a long time ago (sometime before 4.4.0). I noticed there was
one missed optimization on the gimple level. There is a match.pd pattern
for ~a < CST but we miss that there could be a nop_convert between the the
comparison and the bit_not. This adds the optional option cast to the current
match.pd pattern.

OK? Bootstrapped and tested on x86_64 with no regressions.

PR tree-optimization/31531

gcc/ChangeLog:

* match.pd (~X op C): Allow for an optional nop convert.

gcc/testsuite/ChangeLog:

* gcc.dg/tree-ssa/pr31531-1.c: New test.
---
 gcc/match.pd  |  5 +++--
 gcc/testsuite/gcc.dg/tree-ssa/pr31531-1.c | 19 +++
 2 files changed, 22 insertions(+), 2 deletions(-)
 create mode 100644 gcc/testsuite/gcc.dg/tree-ssa/pr31531-1.c

diff --git a/gcc/match.pd b/gcc/match.pd
index 37c5be9e5f4..ca6c9eff624 100644
--- a/gcc/match.pd
+++ b/gcc/match.pd
@@ -4729,10 +4729,11 @@ DEFINE_INT_AND_FLOAT_ROUND_FN (RINT)
 (for cmp (simple_comparison)
  scmp (swapped_simple_comparison)
  (simplify
-  (cmp (bit_not@2 @0) CONSTANT_CLASS_P@1)
+  (cmp (nop_convert?:s (bit_not@2 @0)) CONSTANT_CLASS_P@1)
   (if (single_use (@2)
&& (TREE_CODE (@1) == INTEGER_CST || TREE_CODE (@1) == VECTOR_CST))
-   (scmp @0 (bit_not @1)
+   (with { tree type1 = TREE_TYPE (@1); }
+(scmp (convert:type1 @0) (bit_not @1))
 
 (for cmp (simple_comparison)
  /* Fold (double)float1 CMP (double)float2 into float1 CMP float2.  */
diff --git a/gcc/testsuite/gcc.dg/tree-ssa/pr31531-1.c 
b/gcc/testsuite/gcc.dg/tree-ssa/pr31531-1.c
new file mode 100644
index 000..c27299151eb
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/tree-ssa/pr31531-1.c
@@ -0,0 +1,19 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -fdump-tree-optimized" } */
+/* PR tree-optimization/31531 */
+
+int f(int a)
+{
+  int b = ~a;
+  return b<0;
+}
+
+
+int f1(unsigned a)
+{
+  int b = ~a;
+  return b<0;
+}
+/* We should convert the above two functions from b <0 to ((int)a) >= 0. */
+/* { dg-final { scan-tree-dump-times ">= 0" 2 "optimized"} } */
+/* { dg-final { scan-tree-dump-times "~" 0 "optimized"} } */
-- 
2.17.1

[PATCH] Fix tree-optimization/103220: Another missing folding of (type) X op CST where type is a nop convert

[apinski--- via Gcc-patches]

From: Andrew Pinski 

The problem here is that int_fits_type_p will return false if we just
change the sign of things like -2 (or 254) so we should accept the case
where we just change the sign (and not the precision) of the type.

OK? Bootstrapped and tested on x86_64-linux-gnu with no regressions.

PR tree-optimization/103220

gcc/ChangeLog:

* match.pd ((type) X bitop CST): Don't check if CST
fits into the type if only the sign changes.

gcc/testsuite/ChangeLog:

* gcc.dg/tree-ssa/pr103220-1.c: New test.
* gcc.dg/tree-ssa/pr103220-2.c: New test.
* gcc.dg/pr25530.c: Update test to check for
4294967294 in the case -2 is not matched.
---
 gcc/match.pd   |  3 ++-
 gcc/testsuite/gcc.dg/pr25530.c |  2 +-
 gcc/testsuite/gcc.dg/tree-ssa/pr103220-1.c | 15 +++
 gcc/testsuite/gcc.dg/tree-ssa/pr103220-2.c | 16 
 4 files changed, 34 insertions(+), 2 deletions(-)
 create mode 100644 gcc/testsuite/gcc.dg/tree-ssa/pr103220-1.c
 create mode 100644 gcc/testsuite/gcc.dg/tree-ssa/pr103220-2.c

diff --git a/gcc/match.pd b/gcc/match.pd
index 24a84e3b504..37c5be9e5f4 100644
--- a/gcc/match.pd
+++ b/gcc/match.pd
@@ -1607,7 +1607,8 @@ DEFINE_INT_AND_FLOAT_ROUND_FN (RINT)
   (bitop (convert@2 @0) (convert?@3 @1))
   (if (((TREE_CODE (@1) == INTEGER_CST
 && INTEGRAL_TYPE_P (TREE_TYPE (@0))
-&& int_fits_type_p (@1, TREE_TYPE (@0)))
+&& (int_fits_type_p (@1, TREE_TYPE (@0))
+|| tree_nop_conversion_p (TREE_TYPE (@0), type)))
|| types_match (@0, @1))
/* ???  This transform conflicts with fold-const.c doing
  Convert (T)(x & c) into (T)x & (T)c, if c is an integer
diff --git a/gcc/testsuite/gcc.dg/pr25530.c b/gcc/testsuite/gcc.dg/pr25530.c
index b846ab30140..771b36b9c29 100644
--- a/gcc/testsuite/gcc.dg/pr25530.c
+++ b/gcc/testsuite/gcc.dg/pr25530.c
@@ -8,4 +8,4 @@ f (unsigned t)
   return (t / 2) * 2;
 }
 
-/* { dg-final { scan-tree-dump "\& -2" "optimized" } } */
+/* { dg-final { scan-tree-dump "\& -2|4294967294" "optimized" } } */
diff --git a/gcc/testsuite/gcc.dg/tree-ssa/pr103220-1.c 
b/gcc/testsuite/gcc.dg/tree-ssa/pr103220-1.c
new file mode 100644
index 000..f2ef3f1d93c
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/tree-ssa/pr103220-1.c
@@ -0,0 +1,15 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -fdump-tree-optimized" } */
+unsigned char f(unsigned char a)
+{
+  signed char d = (signed char) a;
+  signed char e = d & ~1;
+  unsigned char t = e;
+  t &= ~2;
+  return t;
+}
+/* The above should reduce down to just & 252 rather than keping
+   the two  there. */
+/* { dg-final { scan-tree-dump-times "& 252" 1 "optimized"} } */
+/* { dg-final { scan-tree-dump-times "& -2" 0 "optimized"} } */
+/* { dg-final { scan-tree-dump-times "& 253" 0 "optimized"} } */
diff --git a/gcc/testsuite/gcc.dg/tree-ssa/pr103220-2.c 
b/gcc/testsuite/gcc.dg/tree-ssa/pr103220-2.c
new file mode 100644
index 000..25d7412a095
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/tree-ssa/pr103220-2.c
@@ -0,0 +1,16 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -fdump-tree-optimized" } */
+signed char f(unsigned char a)
+{
+  unsigned char b = a & 127;
+  signed char c = (signed char) b;
+  signed char d = (signed char) a;
+  signed char e = d & -128;
+  signed char h = c | e;
+  return h;
+}
+/* The above should reduce down to just return with a cast.
+   removing the two  there and |'s. */
+/* { dg-final { scan-tree-dump-times "& 127" 0 "optimized"} } */
+/* { dg-final { scan-tree-dump-times "& -128" 0 "optimized"} } */
+/* { dg-final { scan-tree-dump-times "\\\| " 0 "optimized"} } */
-- 
2.17.1

[PATCH] Fix tree-optimization/103314 : Limit folding of (type) X op CST where type is a nop convert to gimple

[apinski--- via Gcc-patches]

From: Andrew Pinski 

There is some re-association code in fold_binary which conflicts with
this optimization due keeping around some "constants" which are not
INTEGER_CST (1 << -1) so we end up in an infinite loop because of that.
So we need to limit this case to GIMPLE level only.

OK? Bootstrapped and tested on x86_64-linux-gnu with no regressions.

PR tree-optimization/103314

gcc/ChangeLog:

* match.pd ((type) X op CST): Restrict the equal
TYPE_PRECISION case to GIMPLE only.

gcc/testsuite/ChangeLog:

* gcc.c-torture/compile/pr103314-1.c: New test.
---
 gcc/match.pd | 6 +-
 gcc/testsuite/gcc.c-torture/compile/pr103314-1.c | 6 ++
 2 files changed, 11 insertions(+), 1 deletion(-)
 create mode 100644 gcc/testsuite/gcc.c-torture/compile/pr103314-1.c

diff --git a/gcc/match.pd b/gcc/match.pd
index 4dc66fb47f2..24a84e3b504 100644
--- a/gcc/match.pd
+++ b/gcc/match.pd
@@ -1619,7 +1619,11 @@ DEFINE_INT_AND_FLOAT_ROUND_FN (RINT)
  after hoisting the conversion the operation will be narrower.
  It is also a good if the conversion is a nop as moves the
  conversion to one side; allowing for combining of the 
conversions.  */
-  TYPE_PRECISION (TREE_TYPE (@0)) <= TYPE_PRECISION (type)
+  TYPE_PRECISION (TREE_TYPE (@0)) < TYPE_PRECISION (type)
+  /* The conversion check for being a nop can only be done at the 
gimple
+ level as fold_binary has some re-association code which can 
conflict
+ with this if there is a "constant" which is not a full 
INTEGER_CST.  */
+  || (GIMPLE && TYPE_PRECISION (TREE_TYPE (@0)) == TYPE_PRECISION 
(type))
   /* It's also a good idea if the conversion is to a non-integer
  mode.  */
   || GET_MODE_CLASS (TYPE_MODE (type)) != MODE_INT
diff --git a/gcc/testsuite/gcc.c-torture/compile/pr103314-1.c 
b/gcc/testsuite/gcc.c-torture/compile/pr103314-1.c
new file mode 100644
index 000..f4a63130421
--- /dev/null
+++ b/gcc/testsuite/gcc.c-torture/compile/pr103314-1.c
@@ -0,0 +1,6 @@
+/* { dg-options "" } */
+int main() {
+  int t = 1;
+  unsigned c = 0, d1 = t ? 1 ^ c ^ 1 >> (-1) : 0; /* { dg-warning "is 
negative"  } */
+  return d1;
+}
-- 
2.17.1

[PATCH v2] [AARCH64] Fix PR target/103100 -mstrict-align and memset on not aligned buffers

[apinski--- via Gcc-patches]

From: Andrew Pinski 

The problem here is that aarch64_expand_setmem does not change the alignment
for strict alignment case. This is a simplified patch from what I had 
previously.
So constraining copy_limit to the alignment of the mem in the case of strict 
align
fixes the issue without checking to many other changes to the code.

OK? Bootstrapped and tested on aarch64-linux-gnu with no regressions/

gcc/ChangeLog:

* config/aarch64/aarch64.c (aarch64_expand_setmem): Constraint
copy_limit to the alignment of the mem if STRICT_ALIGNMENT is
true.
---
 gcc/config/aarch64/aarch64.c | 13 ++---
 1 file changed, 10 insertions(+), 3 deletions(-)

diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c
index 7389b5953dc..e9c2e89d8ce 100644
--- a/gcc/config/aarch64/aarch64.c
+++ b/gcc/config/aarch64/aarch64.c
@@ -23744,9 +23744,16 @@ aarch64_expand_setmem (rtx *operands)
   /* Maximum amount to copy in one go.  We allow 256-bit chunks based on the
  AARCH64_EXTRA_TUNE_NO_LDP_STP_QREGS tuning parameter.  setmem expand
  pattern is only turned on for TARGET_SIMD.  */
-  const int copy_limit = (aarch64_tune_params.extra_tuning_flags
- & AARCH64_EXTRA_TUNE_NO_LDP_STP_QREGS)
- ? GET_MODE_BITSIZE (TImode) : 256;
+  int copy_limit;
+
+  if (aarch64_tune_params.extra_tuning_flags
+  & AARCH64_EXTRA_TUNE_NO_LDP_STP_QREGS)
+copy_limit = GET_MODE_BITSIZE (TImode);
+  else
+copy_limit = 256;
+
+  if (STRICT_ALIGNMENT)
+copy_limit = MIN (copy_limit, (int)MEM_ALIGN (dst));
 
   while (n > 0)
 {
-- 
2.17.1

[PATCH] Fix PR 103317, ICE after PHI-OPT, minmax_replacement producing invalid SSA

[apinski--- via Gcc-patches]

From: Andrew Pinski 

The problem is r12-5300-gf98f373dd822b35c allows phiopt to recognize more basic 
blocks
but missed one location where the basic block does not need to be empty but 
still
needs to have a single predecessor. This patch fixes that over sight.

OK? Bootstrapped and tested on x86_64-linux-gnu with no regressions.

PR tree-optimization/103317

gcc/ChangeLog:

* tree-ssa-phiopt.c (minmax_replacement): For the non empty
middle bb case, check to make sure it has a single predecessor.

gcc/testsuite/ChangeLog:

* gcc.c-torture/compile/pr103317-1.c: New test.
---
 gcc/testsuite/gcc.c-torture/compile/pr103317-1.c | 13 +
 gcc/tree-ssa-phiopt.c|  3 +++
 2 files changed, 16 insertions(+)
 create mode 100644 gcc/testsuite/gcc.c-torture/compile/pr103317-1.c

diff --git a/gcc/testsuite/gcc.c-torture/compile/pr103317-1.c 
b/gcc/testsuite/gcc.c-torture/compile/pr103317-1.c
new file mode 100644
index 000..f9d145e0da9
--- /dev/null
+++ b/gcc/testsuite/gcc.c-torture/compile/pr103317-1.c
@@ -0,0 +1,13 @@
+int a, b;
+char c;
+void
+d (void)
+{
+  char e = c;
+  if (b)
+if (c < 16 - 11)
+  e = 16 - 11;
+  if (e > 8)
+e = 8;
+  a = e;
+}
diff --git a/gcc/tree-ssa-phiopt.c b/gcc/tree-ssa-phiopt.c
index f0431684089..1abc4ea21cc 100644
--- a/gcc/tree-ssa-phiopt.c
+++ b/gcc/tree-ssa-phiopt.c
@@ -1780,6 +1780,9 @@ minmax_replacement (basic_block cond_bb, basic_block 
middle_bb,
   gimple *assign = last_and_only_stmt (middle_bb);
   tree lhs, op0, op1, bound;
 
+  if (!single_pred_p (middle_bb))
+   return false;
+
   if (!assign
  || gimple_code (assign) != GIMPLE_ASSIGN)
return false;
-- 
2.17.1

[PATCH v2] Fix PR tree-optimization/103228 and 103228: folding of (type) X op CST where type is a nop convert

[apinski--- via Gcc-patches]

From: Andrew Pinski 

Currently we fold (type) X op CST into (type) (X op ((type-x) CST)) when the 
conversion widens
but not when the conversion is a nop. For the same reason why we move the 
widening conversion
(the possibility of removing an extra conversion), we should do the same if the 
conversion is a
nop.

Committed as approved with the comment change.

PR tree-optimization/103228
PR tree-optimization/55177

gcc/ChangeLog:

* match.pd ((type) X bitop CST): Also do this
transformation for nop conversions.

gcc/testsuite/ChangeLog:

* gcc.dg/tree-ssa/pr103228-1.c: New test.
* gcc.dg/tree-ssa/pr55177-1.c: New test.
---
 gcc/match.pd   |  6 --
 gcc/testsuite/gcc.dg/tree-ssa/pr103228-1.c | 11 +++
 gcc/testsuite/gcc.dg/tree-ssa/pr55177-1.c  | 14 ++
 3 files changed, 29 insertions(+), 2 deletions(-)
 create mode 100644 gcc/testsuite/gcc.dg/tree-ssa/pr103228-1.c
 create mode 100644 gcc/testsuite/gcc.dg/tree-ssa/pr55177-1.c

diff --git a/gcc/match.pd b/gcc/match.pd
index cd8f349f618..4dc66fb47f2 100644
--- a/gcc/match.pd
+++ b/gcc/match.pd
@@ -1616,8 +1616,10 @@ DEFINE_INT_AND_FLOAT_ROUND_FN (RINT)
  Restrict it to GIMPLE to avoid endless recursions.  */
&& (bitop != BIT_AND_EXPR || GIMPLE)
&& (/* That's a good idea if the conversion widens the operand, thus
- after hoisting the conversion the operation will be narrower.  */
-  TYPE_PRECISION (TREE_TYPE (@0)) < TYPE_PRECISION (type)
+ after hoisting the conversion the operation will be narrower.
+ It is also a good if the conversion is a nop as moves the
+ conversion to one side; allowing for combining of the 
conversions.  */
+  TYPE_PRECISION (TREE_TYPE (@0)) <= TYPE_PRECISION (type)
   /* It's also a good idea if the conversion is to a non-integer
  mode.  */
   || GET_MODE_CLASS (TYPE_MODE (type)) != MODE_INT
diff --git a/gcc/testsuite/gcc.dg/tree-ssa/pr103228-1.c 
b/gcc/testsuite/gcc.dg/tree-ssa/pr103228-1.c
new file mode 100644
index 000..a7539819cf2
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/tree-ssa/pr103228-1.c
@@ -0,0 +1,11 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -fdump-tree-optimized" } */
+int f(int a, int b)
+{
+  b|=1u;
+  b|=2;
+  return b;
+}
+/* { dg-final { scan-tree-dump-times "\\\| 3" 1 "optimized"} } */
+/* { dg-final { scan-tree-dump-times "\\\| 1" 0 "optimized"} } */
+/* { dg-final { scan-tree-dump-times "\\\| 2" 0 "optimized"} } */
diff --git a/gcc/testsuite/gcc.dg/tree-ssa/pr55177-1.c 
b/gcc/testsuite/gcc.dg/tree-ssa/pr55177-1.c
new file mode 100644
index 000..de1a264345c
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/tree-ssa/pr55177-1.c
@@ -0,0 +1,14 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -fdump-tree-optimized" } */
+extern int x;
+
+void foo(void)
+{
+  int a = __builtin_bswap32(x);
+  a &= 0x5a5b5c5d;
+  x = __builtin_bswap32(a);
+}
+
+/* { dg-final { scan-tree-dump-times "__builtin_bswap32" 0 "optimized"} } */
+/* { dg-final { scan-tree-dump-times "& 1566333786" 1 "optimized"} } */
+/* { dg-final { scan-tree-dump-times "& 1515936861" 0 "optimized"} } */
-- 
2.17.1

[PATCH] Fix tree-optimization/103257: Missed jump threading due too early conversion of bool*A into bool?A:0

[apinski--- via Gcc-patches]

From: Andrew Pinski 

So like many optimizations on the gimple level, sometimes it makes sense to do 
the
optimization early or later. In this case, creating a cond expression early 
causes
other optimizations to be missed.  So just disable it until canonicalize_math_p 
()
is false.

OK? Bootstrapped and tested on x86_64-linux-gnu with no regressions.

PR tree-optimization/103257

gcc/ChangeLog:

* match.pd
(((m1 >/=/<= m2) * d -> (m1 >/=/<= m2) ? d : 0):
Disable until !canonicalize_math_p ().

gcc/testsuite/ChangeLog:

* gcc.dg/tree-ssa/vrp116.c: Check optimized instead of vrp1.
* gcc.dg/tree-ssa/pr103257-1.c: New test.
---
 gcc/match.pd   |  8 
 gcc/testsuite/gcc.dg/tree-ssa/pr103257-1.c | 11 +++
 gcc/testsuite/gcc.dg/tree-ssa/vrp116.c |  4 ++--
 3 files changed, 17 insertions(+), 6 deletions(-)
 create mode 100644 gcc/testsuite/gcc.dg/tree-ssa/pr103257-1.c

diff --git a/gcc/match.pd b/gcc/match.pd
index dc3d505..0332d87 100644
--- a/gcc/match.pd
+++ b/gcc/match.pd
@@ -1781,10 +1781,10 @@ DEFINE_INT_AND_FLOAT_ROUND_FN (RINT)
   (convert (bit_and (bit_not @1) @0
 
 /* (m1 CMP m2) * d -> (m1 CMP m2) ? d : 0  */
-(for cmp (gt lt ge le)
-(simplify
- (mult (convert (cmp @0 @1)) @2)
-  (if (GIMPLE || !TREE_SIDE_EFFECTS (@2))
+(if (!canonicalize_math_p ())
+ (for cmp (gt lt ge le)
+  (simplify
+   (mult (convert (cmp @0 @1)) @2)
(cond (cmp @0 @1) @2 { build_zero_cst (type); }
 
 /* For integral types with undefined overflow and C != 0 fold
diff --git a/gcc/testsuite/gcc.dg/tree-ssa/pr103257-1.c 
b/gcc/testsuite/gcc.dg/tree-ssa/pr103257-1.c
new file mode 100644
index 000..89f4f44
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/tree-ssa/pr103257-1.c
@@ -0,0 +1,11 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -fdump-tree-optimized" } */
+void link_error(void);
+unsigned b, c;
+static short a(short e, short f) { return e * f; }
+int main() {
+  if (a(1  ^ ((0, 0) ^ 1 && b) <= b, c))
+link_error ();
+  c = 0;
+}
+/* { dg-final { scan-tree-dump-times "link_error" 0 "optimized" } } */
diff --git a/gcc/testsuite/gcc.dg/tree-ssa/vrp116.c 
b/gcc/testsuite/gcc.dg/tree-ssa/vrp116.c
index d9d7b23..9e68a77 100644
--- a/gcc/testsuite/gcc.dg/tree-ssa/vrp116.c
+++ b/gcc/testsuite/gcc.dg/tree-ssa/vrp116.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-O2 -fdump-tree-vrp1" } */
+/* { dg-options "-O2 -fdump-tree-optimized" } */
 
 int
 f (int m1, int m2, int c)
@@ -9,4 +9,4 @@ f (int m1, int m2, int c)
   return e ? m1 : m2;
 }
 
-/* { dg-final { scan-tree-dump-times "\\? c_\[0-9\]\\(D\\) : 0" 1 "vrp1" } } */
+/* { dg-final { scan-tree-dump-times "\\? c_\[0-9\]\\(D\\) : 0" 1 "optimized" 
} } */
-- 
1.8.3.1

[PATCH] Fix PR 103288, ICE after PHI-OPT, move an assigment when still in use for another bb

[apinski--- via Gcc-patches]

From: Andrew Pinski 

The problem is r12-5300-gf98f373dd822b35c allows phiopt to recognize more basic 
blocks
but missed one location where phiopt could move an assignment from the middle 
block
to the non-middle one.  This patch fixes that.

OK? Bootstrapped and tested on x86_64-linux-gnu with no regressions.

PR 103288

gcc/ChangeLog:

* tree-ssa-phiopt.c (value_replacement): Return early if middle
block has more than one pred.

gcc/testsuite/ChangeLog:

* gcc.c-torture/compile/pr103288-1.c: New test.
---
 gcc/testsuite/gcc.c-torture/compile/pr103288-1.c | 6 ++
 gcc/tree-ssa-phiopt.c| 3 +++
 2 files changed, 9 insertions(+)
 create mode 100644 gcc/testsuite/gcc.c-torture/compile/pr103288-1.c

diff --git a/gcc/testsuite/gcc.c-torture/compile/pr103288-1.c 
b/gcc/testsuite/gcc.c-torture/compile/pr103288-1.c
new file mode 100644
index 000..88d1c675599
--- /dev/null
+++ b/gcc/testsuite/gcc.c-torture/compile/pr103288-1.c
@@ -0,0 +1,6 @@
+
+int ui_5;
+long func_14_uli_8;
+void func_14() {
+ui_5 &= (func_14_uli_8 ? 60 : ui_5) ? 5 : 0;
+}
diff --git a/gcc/tree-ssa-phiopt.c b/gcc/tree-ssa-phiopt.c
index 6b22f6bedd4..8984a5e15ab 100644
--- a/gcc/tree-ssa-phiopt.c
+++ b/gcc/tree-ssa-phiopt.c
@@ -1381,6 +1381,9 @@ value_replacement (basic_block cond_bb, basic_block 
middle_bb,
}
 }
 
+  if (!single_pred_p (middle_bb))
+return 0;
+
   /* Now optimize (x != 0) ? x + y : y to just x + y.  */
   gsi = gsi_last_nondebug_bb (middle_bb);
   if (gsi_end_p (gsi))
-- 
2.17.1

[PATCH] Fix tree-optimization/101941: IPA splitting out function with error attribute

[apinski--- via Gcc-patches]

From: Andrew Pinski 

The Linux kernel started to fail compile when the jump threader was improved
(r12-2591-g2e96b5f14e4025691). This failure was due to the IPA splitting code
decided now to split off the basic block which contained two functions,
one of those functions included the error attribute on them.  This patch fixes
the problem by disallowing basic blocks from being split which contain functions
that have either the error or warning attribute on them.

The two new testcases are to make sure we still split the function for other
places if we reject the one case.

OK? Bootstrapped and tested on x86_64-linux-gnu with no regressions.

PR tree-optimization/101941

gcc/ChangeLog:

* ipa-split.c (visit_bb): Disallow function calls where
the function has either error or warning attribute.

gcc/testsuite/ChangeLog:

* gcc.c-torture/compile/pr101941-1.c: New test.
* gcc.dg/tree-ssa/pr101941-1.c: New test.
---
 gcc/ipa-split.c   | 12 -
 .../gcc.c-torture/compile/pr101941-1.c| 44 +
 gcc/testsuite/gcc.dg/tree-ssa/pr101941-1.c| 48 +++
 3 files changed, 103 insertions(+), 1 deletion(-)
 create mode 100644 gcc/testsuite/gcc.c-torture/compile/pr101941-1.c
 create mode 100644 gcc/testsuite/gcc.dg/tree-ssa/pr101941-1.c

diff --git a/gcc/ipa-split.c b/gcc/ipa-split.c
index c68577d04a9..070e894ef31 100644
--- a/gcc/ipa-split.c
+++ b/gcc/ipa-split.c
@@ -873,7 +873,7 @@ visit_bb (basic_block bb, basic_block return_bb,
   gimple *stmt = gsi_stmt (bsi);
   tree op;
   ssa_op_iter iter;
-  tree decl;
+  tree decl = NULL_TREE;
 
   if (is_gimple_debug (stmt))
continue;
@@ -927,6 +927,16 @@ visit_bb (basic_block bb, basic_block return_bb,
break;
  }
 
+  /* If a function call and that function has either the
+warning or error attribute on it, don't split.  */
+  if (decl && (lookup_attribute ("warning", DECL_ATTRIBUTES (decl))
+  || lookup_attribute ("error", DECL_ATTRIBUTES (decl
+   {
+ if (dump_file && (dump_flags & TDF_DETAILS))
+   fprintf (dump_file, "Cannot split: warning or error attribute.\n");
+ can_split = false;
+   }
+
   FOR_EACH_SSA_TREE_OPERAND (op, stmt, iter, SSA_OP_DEF)
bitmap_set_bit (set_ssa_names, SSA_NAME_VERSION (op));
   FOR_EACH_SSA_TREE_OPERAND (op, stmt, iter, SSA_OP_USE)
diff --git a/gcc/testsuite/gcc.c-torture/compile/pr101941-1.c 
b/gcc/testsuite/gcc.c-torture/compile/pr101941-1.c
new file mode 100644
index 000..ab3bbea8ed7
--- /dev/null
+++ b/gcc/testsuite/gcc.c-torture/compile/pr101941-1.c
@@ -0,0 +1,44 @@
+/* { dg-additional-options "-fconserve-stack" } */
+struct crypto_aes_ctx {
+  char key_dec[128];
+};
+
+int rfc4106_set_hash_subkey_hash_subkey;
+
+void __write_overflow(void)__attribute__((__error__("")));
+void __write_overflow1(void);
+void aes_encrypt(void*);
+
+void fortify_panic(const char*) __attribute__((__noreturn__)) ;
+
+char *rfc4106_set_hash_subkey(struct crypto_aes_ctx *ctx) {
+  void *a = >key_dec[0];
+  unsigned p_size =  __builtin_object_size(a, 0);
+#ifdef __OPTIMIZE__
+  if (p_size < 16) {
+__write_overflow1();
+fortify_panic(__func__);
+  }
+  if (p_size < 32) {
+__write_overflow();
+fortify_panic(__func__);
+  }
+#endif
+  aes_encrypt(ctx);
+  return ctx->key_dec;
+}
+
+char *(*gg)(struct crypto_aes_ctx *) = rfc4106_set_hash_subkey;
+
+void a(void)
+{
+  struct crypto_aes_ctx ctx;
+  rfc4106_set_hash_subkey();
+}
+void b(void)
+{
+  struct crypto_aes_ctx ctx;
+  ctx.key_dec[0] = 0;
+  rfc4106_set_hash_subkey();
+}
+
diff --git a/gcc/testsuite/gcc.dg/tree-ssa/pr101941-1.c 
b/gcc/testsuite/gcc.dg/tree-ssa/pr101941-1.c
new file mode 100644
index 000..21c1d1ec466
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/tree-ssa/pr101941-1.c
@@ -0,0 +1,48 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -fconserve-stack -fdump-tree-optimized" } */
+struct crypto_aes_ctx {
+  char key_dec[128];
+};
+
+int rfc4106_set_hash_subkey_hash_subkey;
+
+void __write_overflow(void)__attribute__((__error__("")));
+void __write_overflow1(void);
+void aes_encrypt(void*);
+
+void fortify_panic(const char*) __attribute__((__noreturn__)) ;
+
+char *rfc4106_set_hash_subkey(struct crypto_aes_ctx *ctx) {
+  void *a = >key_dec[0];
+  unsigned p_size =  __builtin_object_size(a, 0);
+#ifdef __OPTIMIZE__
+  if (p_size < 16) {
+__write_overflow1();
+fortify_panic(__func__);
+  }
+  if (p_size < 32) {
+__write_overflow();
+fortify_panic(__func__);
+  }
+#endif
+  aes_encrypt(ctx);
+  return ctx->key_dec;
+}
+
+char *(*gg)(struct crypto_aes_ctx *) = rfc4106_set_hash_subkey;
+
+void a(void)
+{
+  struct crypto_aes_ctx ctx;
+  rfc4106_set_hash_subkey();
+}
+void b(void)
+{
+  struct crypto_aes_ctx ctx;
+  ctx.key_dec[0] = 0;
+  rfc4106_set_hash_subkey();
+}
+
+/* This testcase should still split out one of the above 

[PATCH] Fix PR tree-optimization/103228 and 103228: folding of (type) X op CST where type is a nop convert

[apinski--- via Gcc-patches]

From: Andrew Pinski 

Currently we fold (type) X op CST into (type) (X op ((type-x) CST)) when the 
conversion widens
but not when the conversion is a nop. For the same reason why we move the 
widening conversion
(the possibility of removing an extra conversion), we should do the same if the 
conversion is a
nop.

OK? Boostrapped and tested on x86_64-linux-gnu with no regressions.

PR tree-optimization/103228
PR tree-optimization/55177

gcc/ChangeLog:

* match.pd ((type) X bitop CST): Also do this
transformation for nop conversions.

gcc/testsuite/ChangeLog:

* gcc.dg/tree-ssa/pr103228-1.c: New test.
* gcc.dg/tree-ssa/pr55177-1.c: New test.
---
 gcc/match.pd   |  2 +-
 gcc/testsuite/gcc.dg/tree-ssa/pr103228-1.c | 11 +++
 gcc/testsuite/gcc.dg/tree-ssa/pr55177-1.c  | 14 ++
 3 files changed, 26 insertions(+), 1 deletion(-)
 create mode 100644 gcc/testsuite/gcc.dg/tree-ssa/pr103228-1.c
 create mode 100644 gcc/testsuite/gcc.dg/tree-ssa/pr55177-1.c

diff --git a/gcc/match.pd b/gcc/match.pd
index a0e9a82e4c4..dc3d5054583 100644
--- a/gcc/match.pd
+++ b/gcc/match.pd
@@ -1615,7 +1615,7 @@ DEFINE_INT_AND_FLOAT_ROUND_FN (RINT)
&& (bitop != BIT_AND_EXPR || GIMPLE)
&& (/* That's a good idea if the conversion widens the operand, thus
  after hoisting the conversion the operation will be narrower.  */
-  TYPE_PRECISION (TREE_TYPE (@0)) < TYPE_PRECISION (type)
+  TYPE_PRECISION (TREE_TYPE (@0)) <= TYPE_PRECISION (type)
   /* It's also a good idea if the conversion is to a non-integer
  mode.  */
   || GET_MODE_CLASS (TYPE_MODE (type)) != MODE_INT
diff --git a/gcc/testsuite/gcc.dg/tree-ssa/pr103228-1.c 
b/gcc/testsuite/gcc.dg/tree-ssa/pr103228-1.c
new file mode 100644
index 000..a7539819cf2
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/tree-ssa/pr103228-1.c
@@ -0,0 +1,11 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -fdump-tree-optimized" } */
+int f(int a, int b)
+{
+  b|=1u;
+  b|=2;
+  return b;
+}
+/* { dg-final { scan-tree-dump-times "\\\| 3" 1 "optimized"} } */
+/* { dg-final { scan-tree-dump-times "\\\| 1" 0 "optimized"} } */
+/* { dg-final { scan-tree-dump-times "\\\| 2" 0 "optimized"} } */
diff --git a/gcc/testsuite/gcc.dg/tree-ssa/pr55177-1.c 
b/gcc/testsuite/gcc.dg/tree-ssa/pr55177-1.c
new file mode 100644
index 000..de1a264345c
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/tree-ssa/pr55177-1.c
@@ -0,0 +1,14 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -fdump-tree-optimized" } */
+extern int x;
+
+void foo(void)
+{
+  int a = __builtin_bswap32(x);
+  a &= 0x5a5b5c5d;
+  x = __builtin_bswap32(a);
+}
+
+/* { dg-final { scan-tree-dump-times "__builtin_bswap32" 0 "optimized"} } */
+/* { dg-final { scan-tree-dump-times "& 1566333786" 1 "optimized"} } */
+/* { dg-final { scan-tree-dump-times "& 1515936861" 0 "optimized"} } */
-- 
2.17.1

[PATCH] tree-optimization: [PR103245] Improve detection of abs pattern using multiplication

[apinski--- via Gcc-patches]

From: Andrew Pinski 

So while working on PR 103228 (and a few others), I noticed the testcase for PR 
94785
was failing. The problem is that the nop_convert moved from being inside the 
IOR to be
outside of it. I also noticed the patch for PR 103228 was not needed to 
reproduce the
issue either.
This patch combines the two patterns together for the abs match when using 
multiplication
and adds a few places where nop_convert are optional.

OK? Bootstrapped and tested on x86_64-linux-gnu with no regressions.

PR tree-optimization/103245

gcc/ChangeLog:

* match.pd: Combine the abs pattern matching using multiplication.
Adding optional nop_convert too.

gcc/testsuite/ChangeLog:

* gcc.dg/tree-ssa/pr103245-1.c: New test.
---
 gcc/match.pd   | 22 +--
 gcc/testsuite/gcc.dg/tree-ssa/pr103245-1.c | 25 ++
 2 files changed, 36 insertions(+), 11 deletions(-)
 create mode 100644 gcc/testsuite/gcc.dg/tree-ssa/pr103245-1.c

diff --git a/gcc/match.pd b/gcc/match.pd
index 3b9d13aa24c..dc3d5054583 100644
--- a/gcc/match.pd
+++ b/gcc/match.pd
@@ -1488,21 +1488,21 @@ DEFINE_INT_AND_FLOAT_ROUND_FN (RINT)
  (absu tree_expr_nonnegative_p@0)
  (convert @0))
 
-/* Simplify (-(X < 0) | 1) * X into abs (X).  */
+/* Simplify (-(X < 0) | 1) * X into abs (X) or absu(X).  */
 (simplify
- (mult:c (bit_ior (negate (convert? (lt @0 integer_zerop))) integer_onep) @0)
- (if (INTEGRAL_TYPE_P (type) && !TYPE_UNSIGNED (type))
-  (abs @0)))
-
-/* Similarly (-(X < 0) | 1U) * X into absu (X).  */
-(simplify
- (mult:c (bit_ior (nop_convert (negate (convert? (lt @0 integer_zerop
- integer_onep) (nop_convert @0))
+ (mult:c (nop_convert1?
+ (bit_ior (nop_convert2? (negate (convert? (lt @0 integer_zerop
+   integer_onep))
+(nop_convert3? @0))
  (if (INTEGRAL_TYPE_P (type)
-  && TYPE_UNSIGNED (type)
   && INTEGRAL_TYPE_P (TREE_TYPE (@0))
   && !TYPE_UNSIGNED (TREE_TYPE (@0)))
-  (absu @0)))
+  (if (TYPE_UNSIGNED (type))
+   (absu @0)
+   (abs @0)
+  )
+ )
+)
 
 /* A few cases of fold-const.c negate_expr_p predicate.  */
 (match negate_expr_p
diff --git a/gcc/testsuite/gcc.dg/tree-ssa/pr103245-1.c 
b/gcc/testsuite/gcc.dg/tree-ssa/pr103245-1.c
new file mode 100644
index 000..68ddeadb799
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/tree-ssa/pr103245-1.c
@@ -0,0 +1,25 @@
+/* PR tree-optimization/103245 */
+/* { dg-do compile } */
+/* { dg-options "-O2 -fdump-tree-optimized" } */
+/* { dg-final { scan-tree-dump-times " = ABSU_EXPR ;" 1 
"optimized" } } */
+
+unsigned
+f1 (int v)
+{
+  unsigned int d_6;
+  int b_5;
+  int a_4;
+  _Bool _1;
+  unsigned int v1_2;
+  unsigned int _7;
+  int _9;
+
+  _1 = v < 0;
+  a_4 = (int) _1;
+  b_5 = -a_4;
+  _9 = b_5 | 1;
+  d_6 = (unsigned int) _9;
+  v1_2 = (unsigned int) v;
+  _7 = v1_2 * d_6;
+  return _7;
+}
-- 
2.17.1

[PATCH] PR tree-optimization/103216: optimize some A ? (b op CST) : b into b op (A?CST:CST2)

[apinski--- via Gcc-patches]

From: Andrew Pinski 

For this PR, we have:
  if (d_5 < 0)
goto ; [INV]
  else
goto ; [INV]

   :
  v_7 = c_4 | -128;

   :
  # v_1 = PHI 

Which PHI-OPT will try to simplify
"(d_5 < 0) ? (c_4 | -128) : c_4" which is not handled currently.
This adds a few patterns which allows to try to see if (a ? CST : CST1)
where CST1 is either 0, 1 or -1 depending on the operator.
Note to optimize this case always, we should check to make sure that
the a?CST:CST1 gets simplified to not include the conditional expression.
The ! flag does not work as we want to have more simplifcations than just
when we simplify it to a leaf node (SSA_NAME or CONSTANT). This adds a new
flag ^ to genmatch which says the simplification should happen but not down
to the same kind of node.
We could allow this for !GIMPLE and use fold_* rather than fold_buildN but I
didn't see any use of it for now.

Also all of these patterns need to be done late as other optimizations can be
done without them.

OK? Bootstrapped and tested on x86_64 with no regressions.

gcc/ChangeLog:

* doc/match-and-simplify.texi: Document ^ flag.
* genmatch.c (expr::expr): Add Setting of force_simplify.
(expr): Add force_simplify field.
(expr::gen_transform): Add support for force_simplify field.
(parser::parse_expr): Add parsing of ^ flag for the expr.
* match.pd: New patterns to optimize "a ? (b op CST) : b".
---
 gcc/doc/match-and-simplify.texi | 16 +
 gcc/genmatch.c  | 35 ++--
 gcc/match.pd| 41 +
 3 files changed, 90 insertions(+), 2 deletions(-)

diff --git a/gcc/doc/match-and-simplify.texi b/gcc/doc/match-and-simplify.texi
index e7e5a4f7299..4e3407c0263 100644
--- a/gcc/doc/match-and-simplify.texi
+++ b/gcc/doc/match-and-simplify.texi
@@ -377,6 +377,22 @@ of the @code{vec_cond} expression but only if the actual 
plus
 operations both simplify.  Note this is currently only supported
 for code generation targeting @code{GIMPLE}.
 
+Another modifier for generated expressions is @code{^} which
+tells the machinery to only consider the simplification in case
+the marked expression simplified away from the original code.
+Consider for example
+
+@smallexample
+(simplify
+ (cond @@0 (plus:s @@1 INTEGER_CST@@2) @@1)
+ (plus @@1 (cond^ @@0 @@2 @{ build_zero_cst (type); @})))
+@end smallexample
+
+which moves the inner @code{plus} operation to the outside of the
+@code{cond} expression but only if the actual cond operation simplify
+wayaway from cond.  Note this is currently only supported for code
+generation targeting @code{GIMPLE}.
+
 As intermediate conversions are often optional there is a way to
 avoid the need to repeat patterns both with and without such
 conversions.  Namely you can mark a conversion as being optional
diff --git a/gcc/genmatch.c b/gcc/genmatch.c
index 95248455ec5..2dca1141df6 100644
--- a/gcc/genmatch.c
+++ b/gcc/genmatch.c
@@ -698,12 +698,13 @@ public:
 : operand (OP_EXPR, loc), operation (operation_),
   ops (vNULL), expr_type (NULL), is_commutative (is_commutative_),
   is_generic (false), force_single_use (false), force_leaf (false),
-  opt_grp (0) {}
+  force_simplify(false), opt_grp (0) {}
   expr (expr *e)
 : operand (OP_EXPR, e->location), operation (e->operation),
   ops (vNULL), expr_type (e->expr_type), is_commutative 
(e->is_commutative),
   is_generic (e->is_generic), force_single_use (e->force_single_use),
-  force_leaf (e->force_leaf), opt_grp (e->opt_grp) {}
+  force_leaf (e->force_leaf), force_simplify(e->force_simplify),
+  opt_grp (e->opt_grp) {}
   void append_op (operand *op) { ops.safe_push (op); }
   /* The operator and its operands.  */
   id_base *operation;
@@ -721,6 +722,9 @@ public:
   /* Whether in the result expression this should be a leaf node
  with any children simplified down to simple operands.  */
   bool force_leaf;
+  /* Whether in the result expression this should be a node
+ with any children simplified down not to use the original operator.  */
+  bool force_simplify;
   /* If non-zero, the group for optional handling.  */
   unsigned char opt_grp;
   virtual void gen_transform (FILE *f, int, const char *, bool, int,
@@ -2527,6 +2531,17 @@ expr::gen_transform (FILE *f, int indent, const char 
*dest, bool gimple,
fprintf (f, ", _o%d[%u]", depth, i);
   fprintf (f, ");\n");
   fprintf_indent (f, indent, "tem_op.resimplify (lseq, valueize);\n");
+  if (force_simplify)
+   {
+ fprintf_indent (f, indent, "if (tem_op.code.is_tree_code ())\n");
+ fprintf_indent (f, indent, "  {\n");
+ indent+=4;
+ fprintf_indent (f, indent, "if (((tree_code)tem_op.code) == %s)\n",
+ opr_name);
+ fprintf_indent (f, indent, "  goto %s;\n", fail_label);
+ indent-=4;
+ fprintf_indent (f, indent, "  }\n");
+   }
   

[PATCH] [Commmitted] Move some testcases to torture from tree-ssa

[apinski--- via Gcc-patches]

From: Andrew Pinski 

While writing up some testcases, I noticed some newer testcases
just had "dg-do compile/run" on them with dg-options of either -O1
or -O2. Since it is always better to run them over all optimization
levels I put them in gcc.c-torture/compile or gcc.c-torture/execute.

Committed after testing to make sure the testcases pass.

gcc/testsuite/ChangeLog:

* gcc.dg/tree-ssa/pr100278.c: Move to ...
* gcc.c-torture/compile/pr100278.c: Here.
Remove dg-do and dg-options.
* gcc.dg/tree-ssa/pr101189.c: Move to ...
* gcc.c-torture/compile/pr101189.c: Here.
Remove dg-do and dg-options.
* gcc.dg/tree-ssa/pr100453.c: Move to ...
* gcc.c-torture/execute/pr100453.c: Here.
Remove dg-do and dg-options.
* gcc.dg/tree-ssa/pr101335.c: Move to ...
* gcc.c-torture/execute/pr101335.c: Here
Remove dg-do and dg-options.
---
 gcc/testsuite/gcc.c-torture/compile/pr100278.c | 15 +++
 gcc/testsuite/gcc.c-torture/compile/pr101189.c | 15 +++
 gcc/testsuite/gcc.c-torture/execute/pr100453.c | 16 
 gcc/testsuite/gcc.c-torture/execute/pr101335.c | 15 +++
 gcc/testsuite/gcc.dg/tree-ssa/pr100278.c   | 17 -
 gcc/testsuite/gcc.dg/tree-ssa/pr100453.c   | 18 --
 gcc/testsuite/gcc.dg/tree-ssa/pr101189.c   | 17 -
 gcc/testsuite/gcc.dg/tree-ssa/pr101335.c   | 17 -
 8 files changed, 61 insertions(+), 69 deletions(-)
 create mode 100644 gcc/testsuite/gcc.c-torture/compile/pr100278.c
 create mode 100644 gcc/testsuite/gcc.c-torture/compile/pr101189.c
 create mode 100644 gcc/testsuite/gcc.c-torture/execute/pr100453.c
 create mode 100644 gcc/testsuite/gcc.c-torture/execute/pr101335.c
 delete mode 100644 gcc/testsuite/gcc.dg/tree-ssa/pr100278.c
 delete mode 100644 gcc/testsuite/gcc.dg/tree-ssa/pr100453.c
 delete mode 100644 gcc/testsuite/gcc.dg/tree-ssa/pr101189.c
 delete mode 100644 gcc/testsuite/gcc.dg/tree-ssa/pr101335.c

diff --git a/gcc/testsuite/gcc.c-torture/compile/pr100278.c 
b/gcc/testsuite/gcc.c-torture/compile/pr100278.c
new file mode 100644
index 000..4631080
--- /dev/null
+++ b/gcc/testsuite/gcc.c-torture/compile/pr100278.c
@@ -0,0 +1,15 @@
+
+void a()
+{
+#if defined __s390__
+  register int b asm("r5");
+#elif defined __x86_64__
+  register int b asm("eax");
+#else
+  volatile int b;
+#endif
+  if (b)
+b = 1;
+  for (; b;)
+;
+}
diff --git a/gcc/testsuite/gcc.c-torture/compile/pr101189.c 
b/gcc/testsuite/gcc.c-torture/compile/pr101189.c
new file mode 100644
index 000..ad83d32
--- /dev/null
+++ b/gcc/testsuite/gcc.c-torture/compile/pr101189.c
@@ -0,0 +1,15 @@
+/* PR tree-optimization/101189  */
+
+static int a, b;
+int main() {
+  int d = 0, e, f = 5;
+  if (a)
+f = 0;
+  for (; f < 4; f++)
+;
+  e = f ^ -f;
+  e && d;
+  if (!e)
+e || b;
+  return 0;
+}
diff --git a/gcc/testsuite/gcc.c-torture/execute/pr100453.c 
b/gcc/testsuite/gcc.c-torture/execute/pr100453.c
new file mode 100644
index 000..853a892
--- /dev/null
+++ b/gcc/testsuite/gcc.c-torture/execute/pr100453.c
@@ -0,0 +1,16 @@
+
+struct a {
+  int b : 4;
+} d;
+static int c, e;
+static const struct a f;
+static void g(const struct a h) {
+  for (; c < 1; c++)
+d = h;
+  e = h.b;
+  c = h.b;
+}
+int main() {
+  g(f);
+  return 0;
+}
diff --git a/gcc/testsuite/gcc.c-torture/execute/pr101335.c 
b/gcc/testsuite/gcc.c-torture/execute/pr101335.c
new file mode 100644
index 000..45a399f
--- /dev/null
+++ b/gcc/testsuite/gcc.c-torture/execute/pr101335.c
@@ -0,0 +1,15 @@
+
+unsigned a = 0x;
+int b;
+int main()
+{
+  int c = ~a;
+  unsigned d = c - 10;
+  if (d > c)
+c = 20;
+  b = -(c | 0);
+  if (b > -8)
+__builtin_abort ();
+  return 0;
+}
+
diff --git a/gcc/testsuite/gcc.dg/tree-ssa/pr100278.c 
b/gcc/testsuite/gcc.dg/tree-ssa/pr100278.c
deleted file mode 100644
index 8d70228..000
--- a/gcc/testsuite/gcc.dg/tree-ssa/pr100278.c
+++ /dev/null
@@ -1,17 +0,0 @@
-/* { dg-do compile } */
-/* { dg-options "-O2" } */
-
-void a()
-{
-#if defined __s390__
-  register int b asm("r5");
-#elif defined __x86_64__
-  register int b asm("eax");
-#else
-  volatile int b;
-#endif
-  if (b)
-b = 1;
-  for (; b;)
-;
-}
diff --git a/gcc/testsuite/gcc.dg/tree-ssa/pr100453.c 
b/gcc/testsuite/gcc.dg/tree-ssa/pr100453.c
deleted file mode 100644
index 0cf0ad2..000
--- a/gcc/testsuite/gcc.dg/tree-ssa/pr100453.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* { dg-do run } */
-/* { dg-options "-O1" } */
-
-struct a {
-  int b : 4;
-} d;
-static int c, e;
-static const struct a f;
-static void g(const struct a h) {
-  for (; c < 1; c++)
-d = h;
-  e = h.b;
-  c = h.b;
-}
-int main() {
-  g(f);
-  return 0;
-}
diff --git a/gcc/testsuite/gcc.dg/tree-ssa/pr101189.c 
b/gcc/testsuite/gcc.dg/tree-ssa/pr101189.c
deleted file mode 100644
index 5730708..000
--- a/gcc/testsuite/gcc.dg/tree-ssa/pr101189.c
+++ /dev/null
@@ 

[PATCH] tree-optimization: [PR103218] Fold ((type)(a<0)) << SIGNBITOFA into ((type)a) & signbit

[apinski--- via Gcc-patches]

From: Andrew Pinski 

This folds Fold ((type)(a<0)) << SIGNBITOFA into ((type)a) & signbit inside 
match.pd.
This was already handled in fold-cost by:
/* A < 0 ?  : 0 is simply (A & ).  */
I have not removed as we only simplify "a ? POW2 : 0" at the gimple level to "a 
<< CST1"
and fold actually does the reverse of folding "(a<0)<> C) into -(x > 0) where C = precision(type) - 1.  */
 (for cst (INTEGER_CST VECTOR_CST)
  (simplify
diff --git a/gcc/testsuite/gcc.dg/tree-ssa/pr103218-1.c 
b/gcc/testsuite/gcc.dg/tree-ssa/pr103218-1.c
new file mode 100644
index 000..f086f073b38
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/tree-ssa/pr103218-1.c
@@ -0,0 +1,28 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -fdump-tree-optimized" } */
+/* PR tree-optimization/103218 */
+
+/* These first two are removed during forwprop1 */
+signed char f(signed char a)
+{
+  signed char t = a < 0;
+  int tt = (unsigned char)(t << 7);
+  return tt;
+}
+signed char f0(signed char a)
+{
+  unsigned char t = a < 0;
+  int tt = (unsigned char)(t << 7);
+  return tt;
+}
+
+/* This one is removed during phiopt. */
+signed char  f1(signed char a)
+{
+if (a < 0)
+  return 1u<<7;
+return 0;
+}
+
+/* These three examples should remove "a < 0" by optimized. */
+/* { dg-final { scan-tree-dump-times "< 0" 0 "optimized"} } */
-- 
2.17.1

[PATCH] [COMMITTED] aarch64: [PR103170] Fix aarch64_simd_dup

[apinski--- via Gcc-patches]

From: Andrew Pinski 

The problem here is aarch64_simd_dup use
the vw iterator rather than vwcore iterator.  This causes
problems for the V4SF and V2DF modes. I changed both of
aarch64_simd_dup patterns to be consistent.

Committed as obvious after a bootstrap/test on aarch64-linux-gnu.

PR target/103170

gcc/ChangeLog:

* config/aarch64/aarch64-simd.md (aarch64_simd_dup):
Use vwcore iterator for the r constraint output string.

gcc/testsuite/ChangeLog:

* gcc.c-torture/compile/vector-dup-1.c: New test.
---
 gcc/config/aarch64/aarch64-simd.md|  4 ++--
 .../gcc.c-torture/compile/vector-dup-1.c  | 15 +++
 2 files changed, 17 insertions(+), 2 deletions(-)
 create mode 100644 gcc/testsuite/gcc.c-torture/compile/vector-dup-1.c

diff --git a/gcc/config/aarch64/aarch64-simd.md 
b/gcc/config/aarch64/aarch64-simd.md
index bff76e4b6e9..77330425e03 100644
--- a/gcc/config/aarch64/aarch64-simd.md
+++ b/gcc/config/aarch64/aarch64-simd.md
@@ -69,7 +69,7 @@ (define_insn "aarch64_simd_dup"
   "TARGET_SIMD"
   "@
dup\\t%0., %1.[0]
-   dup\\t%0., %1"
+   dup\\t%0., %1"
   [(set_attr "type" "neon_dup, neon_from_gp")]
 )
 
@@ -80,7 +80,7 @@ (define_insn "aarch64_simd_dup"
   "TARGET_SIMD"
   "@
dup\\t%0., %1.[0]
-   dup\\t%0., %1"
+   dup\\t%0., %1"
   [(set_attr "type" "neon_dup, neon_from_gp")]
 )
 
diff --git a/gcc/testsuite/gcc.c-torture/compile/vector-dup-1.c 
b/gcc/testsuite/gcc.c-torture/compile/vector-dup-1.c
new file mode 100644
index 000..3475360462b
--- /dev/null
+++ b/gcc/testsuite/gcc.c-torture/compile/vector-dup-1.c
@@ -0,0 +1,15 @@
+/* { dg-additional-options "-fno-strict-aliasing" } */
+
+
+/* PR target/103170 */
+/* AARCH64 used to ICE on this for a typo in the string template. */
+#define vector __attribute__((vector_size(4*sizeof(float
+
+typedef vector float v4sf;
+
+v4sf f(int t)
+{
+  float tt = *(float*)
+  asm("":"+r"(tt));
+  return (v4sf){tt,tt,tt,tt};
+}
-- 
2.17.1

[PATCH] aarch64: [PR101529] Fix vector shuffle insertion expansion

[apinski--- via Gcc-patches]

From: Andrew Pinski 

The function aarch64_evpc_ins would reuse the target even though
it might be the same register as the two inputs.
Instead of checking to see if we can reuse the target, just use the
original input directly.

Committed as approved after bootstrapped and tested on
aarch64-linux-gnu with no regressions.

PR target/101529

gcc/ChangeLog:

* config/aarch64/aarch64.c (aarch64_evpc_ins): Don't use target
as an input, use original one.

gcc/testsuite/ChangeLog:

* c-c++-common/torture/builtin-convertvector-2.c: New test.
* c-c++-common/torture/builtin-shufflevector-2.c: New test.
---
 gcc/config/aarch64/aarch64.c  |  3 +--
 .../torture/builtin-convertvector-2.c | 26 +++
 .../torture/builtin-shufflevector-2.c | 26 +++
 3 files changed, 53 insertions(+), 2 deletions(-)
 create mode 100644 gcc/testsuite/c-c++-common/torture/builtin-convertvector-2.c
 create mode 100644 gcc/testsuite/c-c++-common/torture/builtin-shufflevector-2.c

diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c
index 506764e5cfa..0549ea36900 100644
--- a/gcc/config/aarch64/aarch64.c
+++ b/gcc/config/aarch64/aarch64.c
@@ -23102,11 +23102,10 @@ aarch64_evpc_ins (struct expand_vec_perm_d *d)
 }
   gcc_assert (extractindex < nelt);
 
-  emit_move_insn (d->target, insv);
   insn_code icode = code_for_aarch64_simd_vec_copy_lane (mode);
   expand_operand ops[5];
   create_output_operand ([0], d->target, mode);
-  create_input_operand ([1], d->target, mode);
+  create_input_operand ([1], insv, mode);
   create_integer_operand ([2], 1 << idx);
   create_input_operand ([3], extractv, mode);
   create_integer_operand ([4], extractindex);
diff --git a/gcc/testsuite/c-c++-common/torture/builtin-convertvector-2.c 
b/gcc/testsuite/c-c++-common/torture/builtin-convertvector-2.c
new file mode 100644
index 000..d88f6a72b5c
--- /dev/null
+++ b/gcc/testsuite/c-c++-common/torture/builtin-convertvector-2.c
@@ -0,0 +1,26 @@
+/* { dg-do run } */
+/* PR target/101529 */
+
+typedef unsigned char __attribute__((__vector_size__ (1))) W;
+typedef unsigned char __attribute__((__vector_size__ (8))) V;
+typedef unsigned short __attribute__((__vector_size__ (16))) U;
+
+unsigned short us;
+
+/* aarch64 used to miscompile foo to just return 0. */
+W
+foo (unsigned char uc)
+{
+  V v = __builtin_convertvector ((U){ } >= us, V);
+  return __builtin_shufflevector ((W){ }, v, 4) & uc;
+}
+
+int
+main (void)
+{
+  W x = foo (5);
+  if (x[0] != 5)
+__builtin_abort();
+  return 0;
+}
+
diff --git a/gcc/testsuite/c-c++-common/torture/builtin-shufflevector-2.c 
b/gcc/testsuite/c-c++-common/torture/builtin-shufflevector-2.c
new file mode 100644
index 000..7c4999ed4e9
--- /dev/null
+++ b/gcc/testsuite/c-c++-common/torture/builtin-shufflevector-2.c
@@ -0,0 +1,26 @@
+/* { dg-do run}  */
+/* PR target/101529 */
+typedef unsigned char C;
+typedef unsigned char __attribute__((__vector_size__ (8))) V;
+typedef unsigned char __attribute__((__vector_size__ (32))) U;
+
+C c;
+
+/* aarch64 used to miscompile foo to just return a vector of 0s */
+V
+foo (V v)
+{
+  v |= __builtin_shufflevector (c * v, (U) (0 == (U){ }),
+   0, 1, 8, 32, 8, 20, 36, 36);
+  return v;
+}
+
+int
+main (void)
+{
+  V v = foo ((V) { });
+  for (unsigned i = 0; i < sizeof (v); i++)
+if (v[i] != (i >= 2 ? 0xff : 0))
+  __builtin_abort ();
+  return 0;
+}
-- 
2.17.1

[PATCH] [Committed] Fix tree-optimization/103152: Still one more -signed1bit issue

[apinski--- via Gcc-patches]

From: Andrew Pinski 

When I fixed PR 102622, I accidently left behind a TYPE_PRECISION
check which I had there for checking before hand.  This check
is not needed as the code will handle it correctly anyways.

Committed as obvious after a bootstrap/test on x86_64-linux-gnu.

PR tree-optimization/10352

gcc/ChangeLog:

* match.pd: Remove check of TYPE_PRECISION for
the a?0:pow2 case.

gcc/testsuite/ChangeLog:

* gcc.c-torture/execute/pr10352-1.c: New test.
---
 gcc/match.pd|  3 +--
 gcc/testsuite/gcc.c-torture/execute/pr10352-1.c | 12 
 2 files changed, 13 insertions(+), 2 deletions(-)
 create mode 100644 gcc/testsuite/gcc.c-torture/execute/pr10352-1.c

diff --git a/gcc/match.pd b/gcc/match.pd
index cdab5e59f4e..986b052bc93 100644
--- a/gcc/match.pd
+++ b/gcc/match.pd
@@ -4056,8 +4056,7 @@ DEFINE_INT_AND_FLOAT_ROUND_FN (RINT)
  (if (integer_onep (@2))
   (convert (bit_xor (convert:boolean_type_node @0) { booltrue; } )))
  /* a ? powerof2cst : 0 -> (!a) << (log2(powerof2cst)) */
- (if (INTEGRAL_TYPE_P (type) &&  integer_pow2p (@2)
- && TYPE_PRECISION (type) != 1)
+ (if (INTEGRAL_TYPE_P (type) &&  integer_pow2p (@2))
   (with {
tree shift = build_int_cst (integer_type_node, tree_log2 (@2));
}
diff --git a/gcc/testsuite/gcc.c-torture/execute/pr10352-1.c 
b/gcc/testsuite/gcc.c-torture/execute/pr10352-1.c
new file mode 100644
index 000..babb9d45a28
--- /dev/null
+++ b/gcc/testsuite/gcc.c-torture/execute/pr10352-1.c
@@ -0,0 +1,12 @@
+/* this is another case where phiopt
+   would create -signed1bit which is undefined. */
+struct {
+  int a:1;
+} b;
+int *c = (int *), d;
+int main() {
+  d = c && (b.a = (d < 0) ^ 3);
+  if (d != 1)
+__builtin_abort();
+  return 0;
+}
-- 
2.17.1

[PATCH] Fix aarch64 PR 99657: ICE with SVE types used without an error

[apinski--- via Gcc-patches]

From: Andrew Pinski 

This fixes fully where SVE types were being used without sve being enabled.
Instead of trying to fix it such that we error out during RTL time, it is
better to error out in front-ends.  This expands verify_type_context to
have a context of auto storage decl which is used for both auto storage
decls and for indirection context.

A few testcases needed to be updated for the new error message; they were
already being rejected before hand.

OK? Bootstrapped and tested on aarch64-linux-gnu with no regressions.

PR target/99657
gcc/c/ChangeLog:

* c-decl.c (finish_decl): Call verify_type_context
for all decls and not just global_decls.
* c-typeck.c (build_indirect_ref): Call verify_type_context
to check to see if the type is ok to be used.

gcc/ChangeLog:

* config/aarch64/aarch64-sve-builtins.cc (verify_type_context):
Add TXTC_AUTO_STORAGE support
* target.h (enum type_context_kind): Add TXTC_AUTO_STORAGE.

gcc/cp/ChangeLog:

* decl.c (cp_finish_decl): Call verify_type_context
for all decls and not just global_decls.
* typeck.c (cp_build_indirect_ref_1): Call verify_type_context
to check to see if the type is ok to be used.

gcc/testsuite/ChangeLog:

* gcc.target/aarch64/sve/acle/general/nosve_1.c: Update test.
* gcc.target/aarch64/sve/acle/general/nosve_4.c: Likewise.
* gcc.target/aarch64/sve/acle/general/nosve_5.c: Likewise.
* gcc.target/aarch64/sve/acle/general/nosve_6.c: Likewise.
* gcc.target/aarch64/sve/pcs/nosve_2.c: Likewise.
* gcc.target/aarch64/sve/pcs/nosve_3.c: Likewise.
* gcc.target/aarch64/sve/pcs/nosve_4.c: Likewise.
* gcc.target/aarch64/sve/pcs/nosve_5.c: Likewise.
* gcc.target/aarch64/sve/pcs/nosve_6.c: Likewise.
* gcc.target/aarch64/sve/pcs/nosve_9.c: New test.
---
 gcc/c/c-decl.c| 14 +++---
 gcc/c/c-typeck.c  |  2 ++
 gcc/config/aarch64/aarch64-sve-builtins.cc| 14 ++
 gcc/cp/decl.c | 10 ++
 gcc/cp/typeck.c   |  4 
 gcc/target.h  |  3 +++
 .../gcc.target/aarch64/sve/acle/general/nosve_1.c |  1 +
 .../gcc.target/aarch64/sve/acle/general/nosve_4.c |  2 +-
 .../gcc.target/aarch64/sve/acle/general/nosve_5.c |  2 +-
 .../gcc.target/aarch64/sve/acle/general/nosve_6.c |  1 +
 .../gcc.target/aarch64/sve/pcs/nosve_2.c  |  2 +-
 .../gcc.target/aarch64/sve/pcs/nosve_3.c  |  2 +-
 .../gcc.target/aarch64/sve/pcs/nosve_4.c  |  3 +--
 .../gcc.target/aarch64/sve/pcs/nosve_5.c  |  3 +--
 .../gcc.target/aarch64/sve/pcs/nosve_6.c  |  3 +--
 .../gcc.target/aarch64/sve/pcs/nosve_9.c  | 15 +++
 16 files changed, 60 insertions(+), 21 deletions(-)
 create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/pcs/nosve_9.c

diff --git a/gcc/c/c-decl.c b/gcc/c/c-decl.c
index 186fa1692c1..b3583622475 100644
--- a/gcc/c/c-decl.c
+++ b/gcc/c/c-decl.c
@@ -5441,19 +5441,19 @@ finish_decl (tree decl, location_t init_loc, tree init,
 
   if (VAR_P (decl))
 {
+  type_context_kind context = TCTX_AUTO_STORAGE;
   if (init && TREE_CODE (init) == CONSTRUCTOR)
add_flexible_array_elts_to_size (decl, init);
 
   complete_flexible_array_elts (DECL_INITIAL (decl));
 
   if (is_global_var (decl))
-   {
- type_context_kind context = (DECL_THREAD_LOCAL_P (decl)
-  ? TCTX_THREAD_STORAGE
-  : TCTX_STATIC_STORAGE);
- if (!verify_type_context (input_location, context, TREE_TYPE (decl)))
-   TREE_TYPE (decl) = error_mark_node;
-   }
+   context = (DECL_THREAD_LOCAL_P (decl)
+  ? TCTX_THREAD_STORAGE
+  : TCTX_STATIC_STORAGE);
+
+  if (!verify_type_context (input_location, context, TREE_TYPE (decl)))
+   TREE_TYPE (decl) = error_mark_node;
 
   if (DECL_SIZE (decl) == NULL_TREE && TREE_TYPE (decl) != error_mark_node
  && COMPLETE_TYPE_P (TREE_TYPE (decl)))
diff --git a/gcc/c/c-typeck.c b/gcc/c/c-typeck.c
index 782414f8c8c..e926b7c1964 100644
--- a/gcc/c/c-typeck.c
+++ b/gcc/c/c-typeck.c
@@ -2630,6 +2630,8 @@ build_indirect_ref (location_t loc, tree ptr, 
ref_operator errstring)
   else
{
  tree t = TREE_TYPE (type);
+ if (!verify_type_context (loc, TCTX_AUTO_STORAGE, t))
+   return error_mark_node;
 
  ref = build1 (INDIRECT_REF, t, pointer);
 
diff --git a/gcc/config/aarch64/aarch64-sve-builtins.cc 
b/gcc/config/aarch64/aarch64-sve-builtins.cc
index bc92213665c..1d5083bf9fa 100644
--- a/gcc/config/aarch64/aarch64-sve-builtins.cc
+++ b/gcc/config/aarch64/aarch64-sve-builtins.cc
@@ -3834,11 +3834,25 @@ bool
 verify_type_context (location_t loc, type_context_kind 

[PATCH] aarch64: [PR101529] Fix vector shuffle insertion expansion

[apinski--- via Gcc-patches]

From: Andrew Pinski 

The function aarch64_evpc_ins would reuse the target even though
it might be the same register as the two inputs.
Instead of checking to see if we can reuse the target, creating
a new register always is better.

OK? Bootstrapped and tested on aarch64-linux-gnu with no regressions.

PR target/101529

gcc/ChangeLog:

* config/aarch64/aarch64.c (aarch64_evpc_ins): Don't use target
as an input instead create a new reg.

gcc/testsuite/ChangeLog:

* c-c++-common/torture/builtin-convertvector-2.c: New test.
* c-c++-common/torture/builtin-shufflevector-2.c: New test.
---
 gcc/config/aarch64/aarch64.c  |  8 --
 .../torture/builtin-convertvector-2.c | 26 +++
 .../torture/builtin-shufflevector-2.c | 26 +++
 3 files changed, 58 insertions(+), 2 deletions(-)
 create mode 100644 gcc/testsuite/c-c++-common/torture/builtin-convertvector-2.c
 create mode 100644 gcc/testsuite/c-c++-common/torture/builtin-shufflevector-2.c

diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c
index 2c00583e12c..e4fc546fae7 100644
--- a/gcc/config/aarch64/aarch64.c
+++ b/gcc/config/aarch64/aarch64.c
@@ -23084,11 +23084,15 @@ aarch64_evpc_ins (struct expand_vec_perm_d *d)
 }
   gcc_assert (extractindex < nelt);
 
-  emit_move_insn (d->target, insv);
+  /* Use a new reg instead of target as one of the
+ operands might be target. */
+  rtx original = gen_reg_rtx (GET_MODE (d->target));
+
+  emit_move_insn (original, insv);
   insn_code icode = code_for_aarch64_simd_vec_copy_lane (mode);
   expand_operand ops[5];
   create_output_operand ([0], d->target, mode);
-  create_input_operand ([1], d->target, mode);
+  create_input_operand ([1], original, mode);
   create_integer_operand ([2], 1 << idx);
   create_input_operand ([3], extractv, mode);
   create_integer_operand ([4], extractindex);
diff --git a/gcc/testsuite/c-c++-common/torture/builtin-convertvector-2.c 
b/gcc/testsuite/c-c++-common/torture/builtin-convertvector-2.c
new file mode 100644
index 000..d88f6a72b5c
--- /dev/null
+++ b/gcc/testsuite/c-c++-common/torture/builtin-convertvector-2.c
@@ -0,0 +1,26 @@
+/* { dg-do run } */
+/* PR target/101529 */
+
+typedef unsigned char __attribute__((__vector_size__ (1))) W;
+typedef unsigned char __attribute__((__vector_size__ (8))) V;
+typedef unsigned short __attribute__((__vector_size__ (16))) U;
+
+unsigned short us;
+
+/* aarch64 used to miscompile foo to just return 0. */
+W
+foo (unsigned char uc)
+{
+  V v = __builtin_convertvector ((U){ } >= us, V);
+  return __builtin_shufflevector ((W){ }, v, 4) & uc;
+}
+
+int
+main (void)
+{
+  W x = foo (5);
+  if (x[0] != 5)
+__builtin_abort();
+  return 0;
+}
+
diff --git a/gcc/testsuite/c-c++-common/torture/builtin-shufflevector-2.c 
b/gcc/testsuite/c-c++-common/torture/builtin-shufflevector-2.c
new file mode 100644
index 000..7c4999ed4e9
--- /dev/null
+++ b/gcc/testsuite/c-c++-common/torture/builtin-shufflevector-2.c
@@ -0,0 +1,26 @@
+/* { dg-do run}  */
+/* PR target/101529 */
+typedef unsigned char C;
+typedef unsigned char __attribute__((__vector_size__ (8))) V;
+typedef unsigned char __attribute__((__vector_size__ (32))) U;
+
+C c;
+
+/* aarch64 used to miscompile foo to just return a vector of 0s */
+V
+foo (V v)
+{
+  v |= __builtin_shufflevector (c * v, (U) (0 == (U){ }),
+   0, 1, 8, 32, 8, 20, 36, 36);
+  return v;
+}
+
+int
+main (void)
+{
+  V v = foo ((V) { });
+  for (unsigned i = 0; i < sizeof (v); i++)
+if (v[i] != (i >= 2 ? 0xff : 0))
+  __builtin_abort ();
+  return 0;
+}
-- 
2.17.1

[PATCH] Fix PR target/103100 -mstrict-align and memset on not aligned buffers

[apinski--- via Gcc-patches]

From: Andrew Pinski 

The problem here is with -mstrict-align, aarch64_expand_setmem needs
to check the alginment of the mode to make sure we can use it for
doing the stores.

gcc/ChangeLog:

PR target/103100
* config/aarch64/aarch64.c (aarch64_expand_setmem):
Add check for alignment of the mode if STRICT_ALIGNMENT is true.
---
 gcc/config/aarch64/aarch64.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c
index fdf05505846..2c00583e12c 100644
--- a/gcc/config/aarch64/aarch64.c
+++ b/gcc/config/aarch64/aarch64.c
@@ -23738,7 +23738,9 @@ aarch64_expand_setmem (rtx *operands)
 over writing.  */
   opt_scalar_int_mode mode_iter;
   FOR_EACH_MODE_IN_CLASS (mode_iter, MODE_INT)
-   if (GET_MODE_BITSIZE (mode_iter.require ()) <= MIN (n, copy_limit))
+   if (GET_MODE_BITSIZE (mode_iter.require ()) <= MIN (n, copy_limit)
+   && (!STRICT_ALIGNMENT
+   || MEM_ALIGN (dst) >= GET_MODE_ALIGNMENT (mode_iter.require 
(
  cur_mode = mode_iter.require ();
 
   gcc_assert (cur_mode != BLKmode);
-- 
2.17.1

[V2/PATCH] Fix tree-optimization/102216: missed optimization causing Warray-bounds

[apinski--- via Gcc-patches]

From: Andrew Pinski 

The problem here is tree-ssa-forwprop.c likes to produce
  [(void *)_4 + 152B] which is the same as
_4 p+ 152 which the rest of GCC likes better.
This implements this transformation back to pointer plus to
improve better code generation later on.

OK? Bootstrapped and tested on aarch64-linux-gnu.

Changes from v1:
* v2: Add comments.

gcc/ChangeLog:

PR tree-optimization/102216
* tree-ssa-forwprop.c (rewrite_assign_addr): New function.
(forward_propagate_addr_expr_1): Use rewrite_assign_addr
when rewriting into the addr_expr into an assignment.

gcc/testsuite/ChangeLog:

PR tree-optimization/102216
* g++.dg/tree-ssa/pr102216.C: New test.
---
 gcc/testsuite/g++.dg/tree-ssa/pr102216.C | 22 +
 gcc/tree-ssa-forwprop.c  | 58 ++--
 2 files changed, 67 insertions(+), 13 deletions(-)
 create mode 100644 gcc/testsuite/g++.dg/tree-ssa/pr102216.C

diff --git a/gcc/testsuite/g++.dg/tree-ssa/pr102216.C 
b/gcc/testsuite/g++.dg/tree-ssa/pr102216.C
new file mode 100644
index 000..b903e4eb57d
--- /dev/null
+++ b/gcc/testsuite/g++.dg/tree-ssa/pr102216.C
@@ -0,0 +1,22 @@
+/* { dg-options "-O2 -fdump-tree-optimized" } */
+void link_error ();
+void g ()
+{
+  const char **language_names;
+
+  language_names = new const char *[6];
+
+  const char **language_names_p = language_names;
+
+  language_names_p++;
+  language_names_p++;
+  language_names_p++;
+
+  if ( (language_names_p) - (language_names+3) != 0)
+link_error();
+  delete[] language_names;
+}
+/* We should have removed the link_error on the gimple level as GCC should
+   be able to tell that language_names_p is the same as language_names+3.  */
+/* { dg-final { scan-tree-dump-times "link_error" 0 "optimized" } } */
+
diff --git a/gcc/tree-ssa-forwprop.c b/gcc/tree-ssa-forwprop.c
index a830bab78ba..e4331c60525 100644
--- a/gcc/tree-ssa-forwprop.c
+++ b/gcc/tree-ssa-forwprop.c
@@ -637,6 +637,47 @@ forward_propagate_into_cond (gimple_stmt_iterator *gsi_p)
   return 0;
 }
 
+/* Rewrite the DEF_RHS as needed into the (plain) use statement.  */
+
+static void
+rewrite_assign_addr (gimple_stmt_iterator *use_stmt_gsi, tree def_rhs)
+{
+  tree def_rhs_base;
+  poly_int64 def_rhs_offset;
+
+  /* Get the base and offset.  */
+  if ((def_rhs_base = get_addr_base_and_unit_offset (TREE_OPERAND (def_rhs, 0),
+_rhs_offset)))
+{
+  tree new_ptr;
+  poly_offset_int off = 0;
+
+  /* If the base was a MEM, then add the offset to the other
+ offset and adjust the base. */
+  if (TREE_CODE (def_rhs_base) == MEM_REF)
+   {
+ off += mem_ref_offset (def_rhs_base);
+ new_ptr = TREE_OPERAND (def_rhs_base, 0);
+   }
+  else
+   new_ptr = build_fold_addr_expr (def_rhs_base);
+
+  /* If we have the new base is not an address express, then use a p+ 
expression
+ as the new expression instead of [x, offset]. */
+  if (TREE_CODE (new_ptr) != ADDR_EXPR)
+   {
+ tree offset = wide_int_to_tree (sizetype, off);
+ def_rhs = build2 (POINTER_PLUS_EXPR, TREE_TYPE (def_rhs), new_ptr, 
offset);
+   }
+}
+
+  /* Replace the rhs with the new expression.  */
+  def_rhs = unshare_expr (def_rhs);
+  gimple_assign_set_rhs_from_tree (use_stmt_gsi, def_rhs);
+  gimple *use_stmt = gsi_stmt (*use_stmt_gsi);
+  update_stmt (use_stmt);
+}
+
 /* We've just substituted an ADDR_EXPR into stmt.  Update all the
relevant data structures to match.  */
 
@@ -696,8 +737,8 @@ forward_propagate_addr_expr_1 (tree name, tree def_rhs,
   if (single_use_p
  && useless_type_conversion_p (TREE_TYPE (lhs), TREE_TYPE (def_rhs)))
{
- gimple_assign_set_rhs1 (use_stmt, unshare_expr (def_rhs));
- gimple_assign_set_rhs_code (use_stmt, TREE_CODE (def_rhs));
+ rewrite_assign_addr (use_stmt_gsi, def_rhs);
+ gcc_assert (gsi_stmt (*use_stmt_gsi) == use_stmt);
  return true;
}
 
@@ -741,14 +782,7 @@ forward_propagate_addr_expr_1 (tree name, tree def_rhs,
   if (forward_propagate_addr_expr (lhs, new_def_rhs, single_use_p))
return true;
 
-  if (useless_type_conversion_p (TREE_TYPE (lhs),
-TREE_TYPE (new_def_rhs)))
-   gimple_assign_set_rhs_with_ops (use_stmt_gsi, TREE_CODE (new_def_rhs),
-   new_def_rhs);
-  else if (is_gimple_min_invariant (new_def_rhs))
-   gimple_assign_set_rhs_with_ops (use_stmt_gsi, NOP_EXPR, new_def_rhs);
-  else
-   return false;
+  rewrite_assign_addr (use_stmt_gsi, new_def_rhs);
   gcc_assert (gsi_stmt (*use_stmt_gsi) == use_stmt);
   update_stmt (use_stmt);
   return true;
@@ -951,9 +985,7 @@ forward_propagate_addr_expr_1 (tree name, tree def_rhs,
  unshare_expr (def_rhs),
 

[PATCH] Fix tree-optimization/102216: missed optimization causing Warray-bounds

[apinski--- via Gcc-patches]

From: Andrew Pinski 

The problem here is tree-ssa-forwprop.c likes to produce
  [(void *)_4 + 152B] which is the same as
_4 p+ 152 which the rest of GCC likes better.
This implements this transformation back to pointer plus to
improve better code generation later on.

OK? Bootstrapped and tested on aarch64-linux-gnu.

gcc/ChangeLog:

PR tree-optimization/102216
* tree-ssa-forwprop.c (rewrite_assign_addr): New function.
(forward_propagate_addr_expr_1): Use rewrite_assign_addr
when rewriting into the addr_expr into an assignment.

gcc/testsuite/ChangeLog:

PR tree-optimization/102216
* g++.dg/tree-ssa/pr102216.C: New test.
---
 gcc/testsuite/g++.dg/tree-ssa/pr102216.C | 22 
 gcc/tree-ssa-forwprop.c  | 46 +---
 2 files changed, 55 insertions(+), 13 deletions(-)
 create mode 100644 gcc/testsuite/g++.dg/tree-ssa/pr102216.C

diff --git a/gcc/testsuite/g++.dg/tree-ssa/pr102216.C 
b/gcc/testsuite/g++.dg/tree-ssa/pr102216.C
new file mode 100644
index 000..b903e4eb57d
--- /dev/null
+++ b/gcc/testsuite/g++.dg/tree-ssa/pr102216.C
@@ -0,0 +1,22 @@
+/* { dg-options "-O2 -fdump-tree-optimized" } */
+void link_error ();
+void g ()
+{
+  const char **language_names;
+
+  language_names = new const char *[6];
+
+  const char **language_names_p = language_names;
+
+  language_names_p++;
+  language_names_p++;
+  language_names_p++;
+
+  if ( (language_names_p) - (language_names+3) != 0)
+link_error();
+  delete[] language_names;
+}
+/* We should have removed the link_error on the gimple level as GCC should
+   be able to tell that language_names_p is the same as language_names+3.  */
+/* { dg-final { scan-tree-dump-times "link_error" 0 "optimized" } } */
+
diff --git a/gcc/tree-ssa-forwprop.c b/gcc/tree-ssa-forwprop.c
index a830bab78ba..ba06bccdf75 100644
--- a/gcc/tree-ssa-forwprop.c
+++ b/gcc/tree-ssa-forwprop.c
@@ -637,6 +637,35 @@ forward_propagate_into_cond (gimple_stmt_iterator *gsi_p)
   return 0;
 }
 
+static void
+rewrite_assign_addr (gimple_stmt_iterator *use_stmt_gsi, tree def_rhs)
+{
+  tree def_rhs_base;
+  poly_int64 def_rhs_offset;
+  if ((def_rhs_base = get_addr_base_and_unit_offset (TREE_OPERAND (def_rhs, 0),
+_rhs_offset)))
+{
+  tree new_ptr;
+  poly_offset_int off = 0;
+  if (TREE_CODE (def_rhs_base) == MEM_REF)
+   {
+ off += mem_ref_offset (def_rhs_base);
+ new_ptr = TREE_OPERAND (def_rhs_base, 0);
+   }
+  else
+   new_ptr = build_fold_addr_expr (def_rhs_base);
+  if (TREE_CODE (new_ptr) != ADDR_EXPR)
+   {
+ tree offset = wide_int_to_tree (sizetype, off);
+ def_rhs = build2 (POINTER_PLUS_EXPR, TREE_TYPE (def_rhs), new_ptr, 
offset);
+   }
+}
+  def_rhs = unshare_expr (def_rhs);
+  gimple_assign_set_rhs_from_tree (use_stmt_gsi, def_rhs);
+  gimple *use_stmt = gsi_stmt (*use_stmt_gsi);
+  update_stmt (use_stmt);
+}
+
 /* We've just substituted an ADDR_EXPR into stmt.  Update all the
relevant data structures to match.  */
 
@@ -696,8 +725,8 @@ forward_propagate_addr_expr_1 (tree name, tree def_rhs,
   if (single_use_p
  && useless_type_conversion_p (TREE_TYPE (lhs), TREE_TYPE (def_rhs)))
{
- gimple_assign_set_rhs1 (use_stmt, unshare_expr (def_rhs));
- gimple_assign_set_rhs_code (use_stmt, TREE_CODE (def_rhs));
+ rewrite_assign_addr (use_stmt_gsi, def_rhs);
+ gcc_assert (gsi_stmt (*use_stmt_gsi) == use_stmt);
  return true;
}
 
@@ -741,14 +770,7 @@ forward_propagate_addr_expr_1 (tree name, tree def_rhs,
   if (forward_propagate_addr_expr (lhs, new_def_rhs, single_use_p))
return true;
 
-  if (useless_type_conversion_p (TREE_TYPE (lhs),
-TREE_TYPE (new_def_rhs)))
-   gimple_assign_set_rhs_with_ops (use_stmt_gsi, TREE_CODE (new_def_rhs),
-   new_def_rhs);
-  else if (is_gimple_min_invariant (new_def_rhs))
-   gimple_assign_set_rhs_with_ops (use_stmt_gsi, NOP_EXPR, new_def_rhs);
-  else
-   return false;
+  rewrite_assign_addr (use_stmt_gsi, new_def_rhs);
   gcc_assert (gsi_stmt (*use_stmt_gsi) == use_stmt);
   update_stmt (use_stmt);
   return true;
@@ -951,9 +973,7 @@ forward_propagate_addr_expr_1 (tree name, tree def_rhs,
  unshare_expr (def_rhs),
  fold_convert (ptr_type_node,
rhs2)));
-  gimple_assign_set_rhs_from_tree (use_stmt_gsi, new_rhs);
-  use_stmt = gsi_stmt (*use_stmt_gsi);
-  update_stmt (use_stmt);
+  rewrite_assign_addr (use_stmt_gsi, new_rhs);
   tidy_after_forward_propagate_addr (use_stmt);
   return true;
 }
-- 
2.17.1

[PATCH] target: [PR102941] Fix inline-asm flags with non-REG_P output

[apinski--- via Gcc-patches]

From: Andrew Pinski 

So the problem here is that arm_md_asm_adjust would
just create a set directly to the output memory which is wrong.
It needs to output to a temp register first and then do a
move.

OK? Bootstrapped and tested on aarch64-linux-gnu with no regressions.
I have no way to test on arm even though this touches common code.

PR target/102941

gcc/ChangeLog:

* config/arm/aarch-common.c (arm_md_asm_adjust):
Use a temp if !REG_P.

gcc/testsuite/ChangeLog:

* gcc.target/aarch64/asm-flag-7.c: New test.
* gcc.target/arm/asm-flag-7.c: New test.
---
 gcc/config/arm/aarch-common.c |  2 +-
 gcc/testsuite/gcc.target/aarch64/asm-flag-7.c | 22 ++
 gcc/testsuite/gcc.target/arm/asm-flag-7.c | 23 +++
 3 files changed, 46 insertions(+), 1 deletion(-)
 create mode 100644 gcc/testsuite/gcc.target/aarch64/asm-flag-7.c
 create mode 100644 gcc/testsuite/gcc.target/arm/asm-flag-7.c

diff --git a/gcc/config/arm/aarch-common.c b/gcc/config/arm/aarch-common.c
index 67343fe4025..60b3516c1df 100644
--- a/gcc/config/arm/aarch-common.c
+++ b/gcc/config/arm/aarch-common.c
@@ -641,7 +641,7 @@ arm_md_asm_adjust (vec , vec & /*inputs*/,
   rtx x = gen_rtx_REG (mode, CC_REGNUM);
   x = gen_rtx_fmt_ee (code, word_mode, x, const0_rtx);
 
-  if (dest_mode == word_mode)
+  if (dest_mode == word_mode && REG_P (dest))
emit_insn (gen_rtx_SET (dest, x));
   else
{
diff --git a/gcc/testsuite/gcc.target/aarch64/asm-flag-7.c 
b/gcc/testsuite/gcc.target/aarch64/asm-flag-7.c
new file mode 100644
index 000..6c31b854b0b
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/asm-flag-7.c
@@ -0,0 +1,22 @@
+/* Test that "=@cc*" works with MEM_P RTX  */
+/* PR target/102941 */
+/* { dg-do compile } */
+/* { dg-options "-O" } */
+
+#ifndef __GCC_ASM_FLAG_OUTPUTS__
+#error "missing preprocessor define"
+#endif
+int test_cmpu_x;
+
+void f(long *);
+long
+test_cmpu_y() {
+  long le;
+  f();
+  __asm__("cmp %"
+  "[x], %"
+  "[y]"
+  : "=@ccls"(le)
+  : [x] ""(test_cmpu_x), [y] ""(test_cmpu_y));
+return le;
+}
diff --git a/gcc/testsuite/gcc.target/arm/asm-flag-7.c 
b/gcc/testsuite/gcc.target/arm/asm-flag-7.c
new file mode 100644
index 000..ac11da0a3a8
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/asm-flag-7.c
@@ -0,0 +1,23 @@
+/* Test that "=@cc*" works with MEM_P RTX  */
+/* PR target/102941 */
+/* { dg-do compile } */
+/* { dg-options "-O" } */
+/* { dg-skip-if "" { arm_thumb1 } } */
+
+#ifndef __GCC_ASM_FLAG_OUTPUTS__
+#error "missing preprocessor define"
+#endif
+int test_cmpu_x;
+
+void f(long *);
+long
+test_cmpu_y() {
+  long le;
+  f();
+  __asm__("cmp %"
+  "[x], %"
+  "[y]"
+  : "=@ccls"(le)
+  : [x] ""(test_cmpu_x), [y] ""(test_cmpu_y));
+return le;
+}
-- 
2.17.1

[PATCH] Fix PR 102908: wrongly removing null pointer loads

[apinski--- via Gcc-patches]

From: Andrew Pinski 

Just like PR 100382, here we have a DCE removing a
null pointer load which is needed still.
In this case, execute_fixup_cfg removes a store (correctly)
and then removes the null load (incorrectly) due to
not checking stmt_unremovable_because_of_non_call_eh_p.
This patch adds the check in the similar way as the patch
to fix PR 100382 did.

gcc/ChangeLog:

* tree-ssa-dce.c (simple_dce_from_worklist):
Check stmt_unremovable_because_of_non_call_eh_p also
before removing the statement.
---
 gcc/tree-ssa-dce.c | 5 +
 1 file changed, 5 insertions(+)

diff --git a/gcc/tree-ssa-dce.c b/gcc/tree-ssa-dce.c
index 372e0691ae6..1281e67489c 100644
--- a/gcc/tree-ssa-dce.c
+++ b/gcc/tree-ssa-dce.c
@@ -1828,6 +1828,11 @@ simple_dce_from_worklist (bitmap worklist)
   if (gimple_has_side_effects (t))
continue;
 
+  /* Don't remove statements that are needed for non-call
+eh to work.  */
+  if (stmt_unremovable_because_of_non_call_eh_p (cfun, t))
+   continue;
+
   /* Add uses to the worklist.  */
   ssa_op_iter iter;
   use_operand_p use_p;
-- 
2.17.1

[PATCH] Improve maybe_remove_writeonly_store to do a simple DCE for defining statement

[apinski--- via Gcc-patches]

From: Andrew Pinski 

Instead of putting a full blow DCE after execute_fixup_cfg, it makes sense
to try to remove the defining statement for the store that is being removed.
Using simple_dce_from_worklist makes this easier, just mark the ssa_name on
the rhs side of the store (if it was one) in a bitmap and then call
simple_dce_from_worklist at the end.

gcc.dg/pr36902.c needed to be changed such that the static array was no
longer a static array but a global array.  This is because this new dce
will remove the load as it is dead. I also filed PR 102864 for the warning
on dead loads.

gcc/ChangeLog:

* tree-cfg.c (maybe_remove_writeonly_store): Add dce_ssa_names argument.
Mark the ssa-name of the rhs as one to be removed.
(execute_fixup_cfg): Update call to maybe_remove_writeonly_store.
Call simple_dce_from_worklist at the end to a simple dce.

gcc/testsuite/ChangeLog:

* gcc.dg/pr36902.c: Move buf to be a non-static variable.
---
 gcc/testsuite/gcc.dg/pr36902.c |  5 +
 gcc/tree-cfg.c | 18 --
 2 files changed, 17 insertions(+), 6 deletions(-)

diff --git a/gcc/testsuite/gcc.dg/pr36902.c b/gcc/testsuite/gcc.dg/pr36902.c
index 7dafc9ac171..365a26e26b7 100644
--- a/gcc/testsuite/gcc.dg/pr36902.c
+++ b/gcc/testsuite/gcc.dg/pr36902.c
@@ -24,10 +24,9 @@ struct {
   unsigned char pcr_select[4];
 } sel;
 
+unsigned char buf[64];
 int bar(void)
 {
-  static unsigned char buf[64];
-
   sel.size_of_select = 3;
   foo(buf, sel.pcr_select, sel.size_of_select);
 
@@ -52,8 +51,6 @@ foo2(unsigned char * to, const unsigned char * from, int n)
 
 int baz(void)
 {
-  static unsigned char buf[64];
-
   sel.size_of_select = 5;
   foo2(buf, sel.pcr_select, sel.size_of_select);
 
diff --git a/gcc/tree-cfg.c b/gcc/tree-cfg.c
index dbbf6beb6e4..b3a27bcd17c 100644
--- a/gcc/tree-cfg.c
+++ b/gcc/tree-cfg.c
@@ -54,6 +54,7 @@ along with GCC; see the file COPYING3.  If not see
 #include "value-prof.h"
 #include "tree-inline.h"
 #include "tree-ssa-live.h"
+#include "tree-ssa-dce.h"
 #include "omp-general.h"
 #include "omp-expand.h"
 #include "tree-cfgcleanup.h"
@@ -9669,7 +9670,8 @@ make_pass_warn_unused_result (gcc::context *ctxt)
 /* Maybe Remove stores to variables we marked write-only.
Return true if a store was removed. */
 static bool
-maybe_remove_writeonly_store (gimple_stmt_iterator , gimple *stmt)
+maybe_remove_writeonly_store (gimple_stmt_iterator , gimple *stmt,
+ bitmap dce_ssa_names)
 {
   /* Keep access when store has side effect, i.e. in case when source
  is volatile.  */  
@@ -9692,6 +9694,15 @@ maybe_remove_writeonly_store (gimple_stmt_iterator , 
gimple *stmt)
   print_gimple_stmt (dump_file, stmt, 0,
 TDF_VOPS|TDF_MEMSYMS);
 }
+
+  /* Mark ssa name defining to be checked for simple dce. */
+  if (gimple_assign_single_p (stmt))
+{
+  tree rhs = gimple_assign_rhs1 (stmt);
+  if (TREE_CODE (rhs) == SSA_NAME
+ && !SSA_NAME_IS_DEFAULT_DEF (rhs))
+   bitmap_set_bit (dce_ssa_names, SSA_NAME_VERSION (rhs));
+}
   unlink_stmt_vdef (stmt);
   gsi_remove (, true);
   release_defs (stmt);
@@ -9714,6 +9725,7 @@ execute_fixup_cfg (void)
   profile_count num = node->count;
   profile_count den = ENTRY_BLOCK_PTR_FOR_FN (cfun)->count;
   bool scale = num.initialized_p () && !(num == den);
+  auto_bitmap dce_ssa_names;
 
   if (scale)
 {
@@ -9754,7 +9766,7 @@ execute_fixup_cfg (void)
 }
 
  /* Remove stores to variables we marked write-only. */
- if (maybe_remove_writeonly_store (gsi, stmt))
+ if (maybe_remove_writeonly_store (gsi, stmt, dce_ssa_names))
{
  todo |= TODO_update_ssa | TODO_cleanup_cfg;
  continue;
@@ -9820,6 +9832,8 @@ execute_fixup_cfg (void)
   && (todo & TODO_cleanup_cfg))
 loops_state_set (LOOPS_NEED_FIXUP);
 
+  simple_dce_from_worklist (dce_ssa_names);
+
   return todo;
 }
 
-- 
2.17.1

[PATCH 4/4] Improve maybe_remove_writeonly_store to do a simple DCE for defining statement

[apinski--- via Gcc-patches]

From: Andrew Pinski 

Instead of putting a full blow DCE after execute_fixup_cfg, it makes sense
to try to remove the defining statement for the store that is being removed.
Right now we only handle PHI node statements as there needs no extra checks
except for it is only used once in the store statement.

gcc/ChangeLog:

* tree-cfg.c (maybe_remove_writeonly_store): Remove defining
(PHI) statement of the store if possible.
---
 gcc/tree-cfg.c | 35 +++
 1 file changed, 35 insertions(+)

diff --git a/gcc/tree-cfg.c b/gcc/tree-cfg.c
index dbbf6beb6e4..d9efdc220ca 100644
--- a/gcc/tree-cfg.c
+++ b/gcc/tree-cfg.c
@@ -9692,6 +9692,41 @@ maybe_remove_writeonly_store (gimple_stmt_iterator , 
gimple *stmt)
   print_gimple_stmt (dump_file, stmt, 0,
 TDF_VOPS|TDF_MEMSYMS);
 }
+
+  /* Remove the statement defining the rhs if it was only
+ used by this statement. */
+  if (gimple_assign_single_p (stmt))
+{
+  tree rhs = gimple_assign_rhs1 (stmt);
+  gimple *use_stmt;
+  use_operand_p use_p;
+  gimple *stmt1;
+
+
+  if (TREE_CODE (rhs) == SSA_NAME
+ && single_imm_use (rhs, _p, _stmt)
+ && (stmt1 = SSA_NAME_DEF_STMT (rhs))
+ /* For now only handle PHI nodes.
+FIXME: this should handle more. */
+ && gimple_code (stmt1) == GIMPLE_PHI)
+   {
+ if (dump_file && (dump_flags & TDF_DETAILS))
+   {
+ fprintf (dump_file, "Removing defining statement:\n");
+ print_gimple_stmt (dump_file, stmt1, 0,
+TDF_VOPS|TDF_MEMSYMS);
+   }
+ gimple_stmt_iterator gsi_for_def;
+ gsi_for_def = gsi_for_stmt (stmt1);
+ if (gimple_code (stmt1) == GIMPLE_PHI)
+   remove_phi_node (_for_def, true);
+ else
+   {
+ gsi_remove (_for_def, true);
+ release_defs (stmt1);
+   }
+   }
+}
   unlink_stmt_vdef (stmt);
   gsi_remove (, true);
   release_defs (stmt);
-- 
2.17.1

[PATCH 3/4] Factor out removal of write only stores from execute_fixup_cfg

[apinski--- via Gcc-patches]

From: Andrew Pinski 

To make it easier to fix PR 102703, factoring this code out
to its own function makes it easier to read and less indentions
too.

gcc/ChangeLog:

* tree-cfg.c (maybe_remove_writeonly_store): New function
factored out from ...
(execute_fixup_cfg): Here. Call maybe_remove_writeonly_store.
---
 gcc/tree-cfg.c | 62 ++
 1 file changed, 37 insertions(+), 25 deletions(-)

diff --git a/gcc/tree-cfg.c b/gcc/tree-cfg.c
index c20fc4980c6..dbbf6beb6e4 100644
--- a/gcc/tree-cfg.c
+++ b/gcc/tree-cfg.c
@@ -9666,6 +9666,38 @@ make_pass_warn_unused_result (gcc::context *ctxt)
   return new pass_warn_unused_result (ctxt);
 }
 
+/* Maybe Remove stores to variables we marked write-only.
+   Return true if a store was removed. */
+static bool
+maybe_remove_writeonly_store (gimple_stmt_iterator , gimple *stmt)
+{
+  /* Keep access when store has side effect, i.e. in case when source
+ is volatile.  */  
+  if (!gimple_store_p (stmt)
+  || gimple_has_side_effects (stmt)
+  || optimize_debug)
+return false;
+
+  tree lhs = get_base_address (gimple_get_lhs (stmt));
+
+  if (!VAR_P (lhs)
+  || (!TREE_STATIC (lhs) && !DECL_EXTERNAL (lhs))
+  || !varpool_node::get (lhs)->writeonly)
+return false;
+
+  if (dump_file && (dump_flags & TDF_DETAILS))
+{
+  fprintf (dump_file, "Removing statement, writes"
+  " to write only var:\n");
+  print_gimple_stmt (dump_file, stmt, 0,
+TDF_VOPS|TDF_MEMSYMS);
+}
+  unlink_stmt_vdef (stmt);
+  gsi_remove (, true);
+  release_defs (stmt);
+  return true;
+}
+
 /* IPA passes, compilation of earlier functions or inlining
might have changed some properties, such as marked functions nothrow,
pure, const or noreturn.
@@ -9721,33 +9753,13 @@ execute_fixup_cfg (void)
todo |= TODO_cleanup_cfg;
 }
 
- /* Remove stores to variables we marked write-only.
-Keep access when store has side effect, i.e. in case when source
-is volatile.  */
- if (gimple_store_p (stmt)
- && !gimple_has_side_effects (stmt)
- && !optimize_debug)
+ /* Remove stores to variables we marked write-only. */
+ if (maybe_remove_writeonly_store (gsi, stmt))
{
- tree lhs = get_base_address (gimple_get_lhs (stmt));
-
- if (VAR_P (lhs)
- && (TREE_STATIC (lhs) || DECL_EXTERNAL (lhs))
- && varpool_node::get (lhs)->writeonly)
-   {
- if (dump_file && (dump_flags & TDF_DETAILS))
-   {
- fprintf (dump_file, "Removing statement, writes"
-  " to write only var:\n");
- print_gimple_stmt (dump_file, stmt, 0,
-TDF_VOPS|TDF_MEMSYMS);
-   }
- unlink_stmt_vdef (stmt);
- gsi_remove (, true);
- release_defs (stmt);
- todo |= TODO_update_ssa | TODO_cleanup_cfg;
- continue;
-   }
+ todo |= TODO_update_ssa | TODO_cleanup_cfg;
+ continue;
}
+
  /* For calls we can simply remove LHS when it is known
 to be write-only.  */
  if (is_gimple_call (stmt)
-- 
2.17.1

[PATCH 2/4] Remove outdated comment about execute_fixup_cfg

[apinski--- via Gcc-patches]

From: Andrew Pinski 

The comment about execute_fixup_cfg not being able to
run as a standalone pass is not true for a long time
now.  It has been a standalone pass for a while now.

gcc/ChangeLog:

* tree-cfg.c (execute_fixup_cfg): Remove comment
about standalone pass.
---
 gcc/tree-cfg.c | 5 +
 1 file changed, 1 insertion(+), 4 deletions(-)

diff --git a/gcc/tree-cfg.c b/gcc/tree-cfg.c
index b78e4564e4d..c20fc4980c6 100644
--- a/gcc/tree-cfg.c
+++ b/gcc/tree-cfg.c
@@ -9669,10 +9669,7 @@ make_pass_warn_unused_result (gcc::context *ctxt)
 /* IPA passes, compilation of earlier functions or inlining
might have changed some properties, such as marked functions nothrow,
pure, const or noreturn.
-   Remove redundant edges and basic blocks, and create new ones if necessary.
-
-   This pass can't be executed as stand alone pass from pass manager, because
-   in between inlining and this fixup the verify_flow_info would fail.  */
+   Remove redundant edges and basic blocks, and create new ones if necessary. 
*/
 
 unsigned int
 execute_fixup_cfg (void)
-- 
2.17.1

[PATCH 1/4] Add dump prints when execute_fixup_cfg removes a write only var store.

[apinski--- via Gcc-patches]

From: Andrew Pinski 

While debugging PR 102703, I found it was hard to figure out where
the store was being removed as there was no pass which was outputting
why the store was removed.
This adds to execute_fixup_cfg the output.
Also note most of removals happen when execute_fixup_cfg is called
from the inliner.

gcc/ChangeLog:

* tree-cfg.c (execute_fixup_cfg): Output when the statement
is removed when it is a write only var.
---
 gcc/tree-cfg.c | 7 +++
 1 file changed, 7 insertions(+)

diff --git a/gcc/tree-cfg.c b/gcc/tree-cfg.c
index 4b4b0b52d9a..b78e4564e4d 100644
--- a/gcc/tree-cfg.c
+++ b/gcc/tree-cfg.c
@@ -9737,6 +9737,13 @@ execute_fixup_cfg (void)
  && (TREE_STATIC (lhs) || DECL_EXTERNAL (lhs))
  && varpool_node::get (lhs)->writeonly)
{
+ if (dump_file && (dump_flags & TDF_DETAILS))
+   {
+ fprintf (dump_file, "Removing statement, writes"
+  " to write only var:\n");
+ print_gimple_stmt (dump_file, stmt, 0,
+TDF_VOPS|TDF_MEMSYMS);
+   }
  unlink_stmt_vdef (stmt);
  gsi_remove (, true);
  release_defs (stmt);
-- 
2.17.1

[PATCH 0/4] Fix PR tree-opt/102703

[apinski--- via Gcc-patches]

From: Andrew Pinski 

This patch series fixes PR tree-opt/102703 by
improving the code which will delete write only stores to also
delete the phi node (if it was a phi node) that was used to define
the write.
We need to some factoring out of the code to make it easier
to understand and less indention.

Andrew Pinski (4):
  Add dump prints when execute_fixup_cfg removes a write only var store.
  Remove outdated comment about execute_fixup_cfg
  Factor out removal of write only stores from execute_fixup_cfg
  Improve maybe_remove_writeonly_store to do a simple DCE for defining
statement

 gcc/tree-cfg.c | 95 ++
 1 file changed, 73 insertions(+), 22 deletions(-)

-- 
2.17.1

[PATCH] [GCC 10 branch] tree-optimization: [PR102622]: wrong code due to signed one bit integer and "a?-1:0"

[apinski--- via Gcc-patches]

From: Andrew Pinski 

So here is the GCC 10 branch version which fixes the wrong code.
The problem is we create a negation of an one bit signed integer type
which is undefined if the value was -1.
This is not needed for GCC 11 branch since the case is handled differently
there and has been fixed there (and the trunk has now been fixed too).
So for one bit types, there is no reason to create the negation so just
setting neg to false for them, just works.

OK? Bootstrapped and tested on x86_64-linux-gnu.

PR tree-optimization/102622

gcc/ChangeLog:

* tree-ssa-phiopt.c (conditional_replacement): Set neg
to false for one bit signed types.

gcc/testsuite/ChangeLog:

* gcc.c-torture/execute/bitfld-10.c: New test.
---
 gcc/testsuite/gcc.c-torture/execute/bitfld-10.c | 24 
 gcc/tree-ssa-phiopt.c   |  5 -
 2 files changed, 28 insertions(+), 1 deletion(-)
 create mode 100644 gcc/testsuite/gcc.c-torture/execute/bitfld-10.c

diff --git a/gcc/testsuite/gcc.c-torture/execute/bitfld-10.c 
b/gcc/testsuite/gcc.c-torture/execute/bitfld-10.c
new file mode 100644
index 000..bdbf573
--- /dev/null
+++ b/gcc/testsuite/gcc.c-torture/execute/bitfld-10.c
@@ -0,0 +1,24 @@
+/* PR tree-optimization/102622 */
+/* Wrong code introduced due to phi-opt
+   introducing undefined signed interger overflow
+   with one bit signed integer negation. */
+
+struct f{signed t:1;};
+int g(struct f *a, int t) __attribute__((noipa));
+int g(struct f *a, int t)
+{
+if (t)
+  a->t = -1;
+else
+  a->t = 0;
+int t1 = a->t;
+if (t1) return 1;
+return t1;
+}
+
+int main(void)
+{
+struct f a;
+if (!g(, 1))  __builtin_abort();
+return 0;
+}
diff --git a/gcc/tree-ssa-phiopt.c b/gcc/tree-ssa-phiopt.c
index 9ed26a3..a6c197d 100644
--- a/gcc/tree-ssa-phiopt.c
+++ b/gcc/tree-ssa-phiopt.c
@@ -770,9 +770,12 @@ conditional_replacement (basic_block cond_bb, basic_block 
middle_bb,
   if ((integer_zerop (arg0) && integer_onep (arg1))
   || (integer_zerop (arg1) && integer_onep (arg0)))
 neg = false;
+  /* For signed one bit types, the negation is not needed and
+ should be avoided and is the same as 1 case for non-signed
+ one bit types.  */
   else if ((integer_zerop (arg0) && integer_all_onesp (arg1))
   || (integer_zerop (arg1) && integer_all_onesp (arg0)))
-neg = true;
+neg = TYPE_PRECISION (TREE_TYPE (arg0)) != 1;
   else
 return false;
 
-- 
1.8.3.1