[AArch64] Support for SMLAL/SMLSL/UMLAL/UMLSL
Hello, This patch adds support to SMLAL/SMLSL/UMLAL/UMLSL instructions and adds tests for the same. Regression test run for aarch64-none-elf with no regressions. OK? ~VP --- gcc/ChangeLog 2013-06-14 Vidya Praveen vidyaprav...@arm.com * config/aarch64/aarch64-simd.md (*aarch64_sumlal_lomode): New pattern to support SMLAL,UMLAL instructions. * config/aarch64/aarch64-simd.md (*aarch64_sumlal_himode): New pattern to support SMLAL2,UMLAL2 instructions. * config/aarch64/aarch64-simd.md (*aarch64_sumlsl_lomode): New pattern to support SMLSL,UMLSL instructions. * config/aarch64/aarch64-simd.md (*aarch64_sumlsl_himode): New pattern to support SMLSL2,UMLSL2 instructions. * config/aarch64/aarch64-simd.md (*aarch64_sumlalmode): New pattern to support SMLAL/UMLAL instructions for 64 bit vector modes. * config/aarch64/aarch64-simd.md (*aarch64_sumlslmode): New pattern to support SMLSL/UMLSL instructions for 64 bit vector modes. gcc/testsuite/ChangeLog 2013-06-14 Vidya Praveen vidyaprav...@arm.com * gcc.target/aarch64/vect_smlal_1.c: New file.diff --git a/gcc/config/aarch64/aarch64-simd.md b/gcc/config/aarch64/aarch64-simd.md index e5990d4..8589476 100644 --- a/gcc/config/aarch64/aarch64-simd.md +++ b/gcc/config/aarch64/aarch64-simd.md @@ -1190,6 +1190,104 @@ ;; Widening arithmetic. +(define_insn *aarch64_sumlal_lomode + [(set (match_operand:VWIDE 0 register_operand =w) +(plus:VWIDE + (mult:VWIDE + (ANY_EXTEND:VWIDE (vec_select:VHALF + (match_operand:VQW 2 register_operand w) + (match_operand:VQW 3 vect_par_cnst_lo_half ))) + (ANY_EXTEND:VWIDE (vec_select:VHALF + (match_operand:VQW 4 register_operand w) + (match_dup 3 + (match_operand:VWIDE 1 register_operand 0)))] + TARGET_SIMD + sumlal\t%0.Vwtype, %2.Vhalftype, %4.Vhalftype + [(set_attr simd_type simd_mlal) + (set_attr simd_mode MODE)] +) + +(define_insn *aarch64_sumlal_himode + [(set (match_operand:VWIDE 0 register_operand =w) +(plus:VWIDE + (mult:VWIDE + (ANY_EXTEND:VWIDE (vec_select:VHALF + (match_operand:VQW 2 register_operand w) + (match_operand:VQW 3 vect_par_cnst_hi_half ))) + (ANY_EXTEND:VWIDE (vec_select:VHALF + (match_operand:VQW 4 register_operand w) + (match_dup 3 + (match_operand:VWIDE 1 register_operand 0)))] + TARGET_SIMD + sumlal2\t%0.Vwtype, %2.Vtype, %4.Vtype + [(set_attr simd_type simd_mlal) + (set_attr simd_mode MODE)] +) + +(define_insn *aarch64_sumlsl_lomode + [(set (match_operand:VWIDE 0 register_operand =w) +(minus:VWIDE + (match_operand:VWIDE 1 register_operand 0) + (mult:VWIDE + (ANY_EXTEND:VWIDE (vec_select:VHALF + (match_operand:VQW 2 register_operand w) + (match_operand:VQW 3 vect_par_cnst_lo_half ))) + (ANY_EXTEND:VWIDE (vec_select:VHALF + (match_operand:VQW 4 register_operand w) + (match_dup 3))] + TARGET_SIMD + sumlsl\t%0.Vwtype, %2.Vhalftype, %4.Vhalftype + [(set_attr simd_type simd_mlal) + (set_attr simd_mode MODE)] +) + +(define_insn *aarch64_sumlsl_himode + [(set (match_operand:VWIDE 0 register_operand =w) +(minus:VWIDE + (match_operand:VWIDE 1 register_operand 0) + (mult:VWIDE + (ANY_EXTEND:VWIDE (vec_select:VHALF + (match_operand:VQW 2 register_operand w) + (match_operand:VQW 3 vect_par_cnst_hi_half ))) + (ANY_EXTEND:VWIDE (vec_select:VHALF + (match_operand:VQW 4 register_operand w) + (match_dup 3))] + TARGET_SIMD + sumlsl2\t%0.Vwtype, %2.Vtype, %4.Vtype + [(set_attr simd_type simd_mlal) + (set_attr simd_mode MODE)] +) + +(define_insn *aarch64_sumlalmode + [(set (match_operand:VWIDE 0 register_operand =w) +(plus:VWIDE + (mult:VWIDE +(ANY_EXTEND:VWIDE + (match_operand:VDW 1 register_operand w)) +(ANY_EXTEND:VWIDE + (match_operand:VDW 2 register_operand w))) + (match_operand:VWIDE 3 register_operand 0)))] + TARGET_SIMD + sumlal\t%0.Vwtype, %1.Vtype, %2.Vtype + [(set_attr simd_type simd_mlal) + (set_attr simd_mode MODE)] +) + +(define_insn *aarch64_sumlslmode + [(set (match_operand:VWIDE 0 register_operand =w) +(minus:VWIDE + (match_operand:VWIDE 1 register_operand 0) + (mult:VWIDE +(ANY_EXTEND:VWIDE + (match_operand:VDW 2 register_operand w)) +(ANY_EXTEND:VWIDE + (match_operand:VDW 3 register_operand w)] + TARGET_SIMD + sumlsl\t%0.Vwtype, %2.Vtype, %3.Vtype + [(set_attr simd_type simd_mlal) + (set_attr simd_mode MODE)] +) + (define_insn
Re: [AArch64] Support for SMLAL/SMLSL/UMLAL/UMLSL
On 14/06/13 14:55, Vidya Praveen wrote: Hello, This patch adds support to SMLAL/SMLSL/UMLAL/UMLSL instructions and adds tests for the same. Regression test run for aarch64-none-elf with no regressions. OK? ~VP --- gcc/ChangeLog 2013-06-14 Vidya Praveen vidyaprav...@arm.com * config/aarch64/aarch64-simd.md (*aarch64_sumlal_lomode): New pattern to support SMLAL,UMLAL instructions. * config/aarch64/aarch64-simd.md (*aarch64_sumlal_himode): New pattern to support SMLAL2,UMLAL2 instructions. * config/aarch64/aarch64-simd.md (*aarch64_sumlsl_lomode): New pattern to support SMLSL,UMLSL instructions. * config/aarch64/aarch64-simd.md (*aarch64_sumlsl_himode): New pattern to support SMLSL2,UMLSL2 instructions. * config/aarch64/aarch64-simd.md (*aarch64_sumlalmode): New pattern to support SMLAL/UMLAL instructions for 64 bit vector modes. * config/aarch64/aarch64-simd.md (*aarch64_sumlslmode): New pattern to support SMLSL/UMLSL instructions for 64 bit vector modes. Convention is that we say what changed in the changelog entry and write the justification in the covering email summary. Therefore in instances like this where you are defining a new pattern in is sufficient to write simply. * config/aarch64/aarch64-simd.md (*aarch64_sumlal_lomode): Define. gcc/testsuite/ChangeLog 2013-06-14 Vidya Praveen vidyaprav...@arm.com * gcc.target/aarch64/vect_smlal_1.c: New file. Otherwise this is OK. You should apply for write access to the tree. Follow the instruction on the WIKI here: http://gcc.gnu.org/svnwrite.html#authenticated Cheers /Marcus
Re: [AArch64] Support for SMLAL/SMLSL/UMLAL/UMLSL
On 14/06/13 15:33, Marcus Shawcroft wrote: On 14/06/13 14:55, Vidya Praveen wrote: Hello, This patch adds support to SMLAL/SMLSL/UMLAL/UMLSL instructions and adds tests for the same. Regression test run for aarch64-none-elf with no regressions. OK? ~VP --- gcc/ChangeLog 2013-06-14 Vidya Praveen vidyaprav...@arm.com * config/aarch64/aarch64-simd.md (*aarch64_sumlal_lomode): New pattern to support SMLAL,UMLAL instructions. * config/aarch64/aarch64-simd.md (*aarch64_sumlal_himode): New pattern to support SMLAL2,UMLAL2 instructions. * config/aarch64/aarch64-simd.md (*aarch64_sumlsl_lomode): New pattern to support SMLSL,UMLSL instructions. * config/aarch64/aarch64-simd.md (*aarch64_sumlsl_himode): New pattern to support SMLSL2,UMLSL2 instructions. * config/aarch64/aarch64-simd.md (*aarch64_sumlalmode): New pattern to support SMLAL/UMLAL instructions for 64 bit vector modes. * config/aarch64/aarch64-simd.md (*aarch64_sumlslmode): New pattern to support SMLSL/UMLSL instructions for 64 bit vector modes. Convention is that we say what changed in the changelog entry and write the justification in the covering email summary. Therefore in instances like this where you are defining a new pattern in is sufficient to write simply. * config/aarch64/aarch64-simd.md (*aarch64_sumlal_lomode): Define. I tend to prefer New pattern. over Define. on the grounds that it tells me that this is a pattern, not a constraint or some other construct. Also, there's no need to repeat the file name each time, or put the leading '*' on the pattern name. You can also list more than one function at the same time if it has the same description, and use 'Likewise' when this extends to multiple lines. Finally, don't over-indent continuation lines. So: 2013-06-14 Vidya Praveen vidyaprav...@arm.com * config/aarch64/aarch64-simd.md (aarch64_sumlal_lomode): New pattern. (aarch64_sumlal_himode, aarch64_sumlsl_lomode): Likewise. (aarch64_sumlsl_himode, aarch64_sumlalmode): Likewise. etc.
Re: [AArch64] Support for SMLAL/SMLSL/UMLAL/UMLSL
On 14/06/13 16:01, Richard Earnshaw wrote: On 14/06/13 15:33, Marcus Shawcroft wrote: On 14/06/13 14:55, Vidya Praveen wrote: [...] to support SMLAL/UMLAL instructions for 64 bit vector modes. * config/aarch64/aarch64-simd.md (*aarch64_sumlslmode): New pattern to support SMLSL/UMLSL instructions for 64 bit vector modes. Convention is that we say what changed in the changelog entry and write the justification in the covering email summary. Tmsg00853.htmlherefore in instances like this where you are defining a new pattern in is sufficient to write simply. * config/aarch64/aarch64-simd.md (*aarch64_sumlal_lomode): Define. I tend to prefer New pattern. over Define. on the grounds that it tells me that this is a pattern, not a constraint or some other construct. Also, there's no need to repeat the file name each time, or put the leading '*' on the pattern name. You can also list more than one function at the same time if it has the same description, and use 'Likewise' when this extends to multiple lines. Finally, don't over-indent continuation lines. So: 2013-06-14 Vidya Praveen vidyaprav...@arm.com * config/aarch64/aarch64-simd.md (aarch64_sumlal_lomode): New pattern. (aarch64_sumlal_himode, aarch64_sumlsl_lomode): Likewise. (aarch64_sumlsl_himode, aarch64_sumlalmode): Likewise. etc. Thanks Marcus/Richard for the recommendations. After changes: gcc/ChangeLog 2013-06-14 Vidya Praveen vidyaprav...@arm.com * config/aarch64/aarch64-simd.md (aarch64_sumlal_lomode): New pattern. (aarch64_sumlal_himode, aarch64_sumlsl_lomode): Likewise. (aarch64_sumlsl_himode, aarch64_sumlalmode): Likewise. (aarch64_sumlslmode): Likewise. gcc/testsuite/ChangeLog 2013-06-14 Vidya Praveen vidyaprav...@arm.com * gcc.target/aarch64/vect_smlal_1.c: New file. ~VP
