Re: gEDA-user: naming and creation of 54-pin TSOP II (400 mil) footprint, request for help

2009-05-14 Thread Jelle de Jong
Bert Timmerman wrote:
 Hi Jelle,
 
 On Wed, 2009-05-13 at 14:45 +0200, Jelle de Jong wrote:
 Hello everybody,

 I am trying to create a footprint with a correct name using the IPC-7351
 Naming Convention for Standard SMT Land Patterns.

 But I am having some issues, i am using the below document to learn about
 the naming convention:
 https://secure.powercraft.nl/svn/openarm/trunk/working/pcb/documents/footprint-name-spec.pdf

 The footprint I want to make is a 54-pin TSOP II (400 mil), see:
 https://secure.powercraft.nl/svn/openarm/trunk/doc/SDRAM/MT48LC16M16A2P-7E/256MSDRAM.pdf
 # page 75, 54-Pin Plastic TSOP

 I tried to figure it out but I don't know what the lead span 1(L1) is?

 footprint:
 TSSOP-65P-640L1-54N
 54-pin TSOP II (400 mil)
 TSSOP   pin spacing, lead span 1, pin count
 P  pin spacingdimension
 L1 lead span 1dimension
 N  pin count  count

 I also learned to create footprints with the following document:
 https://secure.powercraft.nl/svn/openarm/trunk/working/pcb/documents/land_patterns_20070818.pdf
 I had my ups and downs learning this and had some help trough IRC.

 However the creation of a 54-pin TSOP II seems to be able to automate
 using a script.

 I looked at the following, but it uses a license I disagree with and I
 can't figure out how it works, I prefer OSI and GPL compatible licenses.
 http://www.luciani.org/geda/pcb/pcb-perl-library.html

 Would somebody be able to help me out, what should the name of the
 footprint become and what scripts can I use to make the footprint and how
 can I do this?

 
 I would go for a name like: TSSOP80P1176X120-54N.fp as in the IPC
 standard IPC-7351
 
 0.80 mm pitch,
 11.76 mm lead span,
 X
 1.20 mm height
 - 54 leads with Nominal pad conditions (as one of the following: Least,
 Nominal, Most).
 
 Maybe it is a wise thing to avoid - characters in footprint file names
 or to have a use-files line in your gsch2pcb config file and pass a
 --skip-m4 flag to disable m4 macro generated footprints to goof up your
 pcb stuff.
 
 Maybe include a vendor and part name too, while footprint artwork
 recommendations may vary across vendors and specific parts.
 
Thanks Bert for the feedback, I am confused, I calculated the pitch on
0.65 mm how did you came to 0.80mm, and could you explain what exactly
the lead span is. If I look at page 75 of the datasheet how can I exactly
calculate this lead span?

Why did you include the height where did you find this requirement in the
IPC-7351 for TSSOP footprints?

And why should one avoid the - character in footprint names? I see a
lot of footprints with this character, would you be willing to discuss
the arguments?

I call the gsch2pcb with the following arguments:
gsch2pcb --use-files --skip-m4 ~/openarm/working/gschem/openarm-sbc.prj
--elements-dir ~/openarm/working/pcb/footprints/

I hope that is ok...

Sorry for al the questions, I am kind of confused, and searching for
answers and help.

Best regards,

Jelle de Jong


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Re: gEDA-user: geda cygwin package

2009-05-14 Thread Peter Baxendale
On Wed, 2009-05-13 at 13:19 -0400, al davis wrote:
 
 Gnucap has always worked on windows.  It works with gEDA, with 
 gnetlist generating a spice file, as well as any simulator does. 
 How about using Gnucap?

Well, for this particular course, for these particular students I needed
something they could start doing very simple simulations with reasonable
graphical output with about a 5 minute intro. Last time I looked at
gnucap there was a steeper learning curve, which I just didn't have time
for on this course. I'd certainly look at gnucap for anything more
advanced - something that's been on my summer list of things to do for
the past few years.

-- 

Peter Baxendale   University of Durham
peter.baxend...@durham.ac.uk  School of Engineering
tel +44 191 33 42492  South Road
fax +44 191 33 42408  Durham DH1 3LE
  England




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gEDA-user: collapsing or non-collapsing balls, how can i tell?

2009-05-14 Thread Jelle de Jong
I am trying to make the correct name for my LFBGA320 footprint

I have some questions:

What is the differences between:
* Ball Grid Array’s
* BGA w/Dual Pitch
* BGA w/Staggered Pins
* Collapsing or Non-collapsing Balls

and how can I figure out what type of BGA component I have?

The footprint and device info can be found here:
https://secure.powercraft.nl/svn/openarm/trunk/doc/CPU/LPC3180FEL320/

(use http://www.cacert.org/ for root ca authority)

The IPC naming conventions tells me I need to use the following format:

Ball Grid Array’s: BGA + Pin Qty + C or N + Pitch P + Ball Columns X Ball
Rows _ Body Length X Body Width X Height

https://secure.powercraft.nl/svn/openarm/trunk/working/pcb/documents/IPC-7351ANamingConvention.pdf

Can somebody help me? I am gambling the following:

BGA-320N-50P-4X4_1300x1300x90.fp

LFBGA320: plastic low profile fine-pitch ball grid array package; 320
balls; body 13 x 13 x 0.9 mm SOT824-1

If somebody can check the footprint and name on errors I would be very
thankful this is the first time I am working with BGA's.

Best regards,

Jelle de Jong


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Re: gEDA-user: collapsing or non-collapsing balls, how can i tell?

2009-05-14 Thread John Luciani

   There is a new version of the naming convention, IPC-7351B Naming
   Convention for Standard SMT Land Patterns,
   that lists the various BGA types.
   Dual pitch has Col Pitch x Row Pitch attributes
   Staggered pins is BGAS
   A C or N suffix is added for collapsing or non-collapsing balls
   (* jcl *)
   --
   You can't create open hardware with closed EDA tools.
   [1]http://www.luciani.org

References

   1. http://www.luciani.org/


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Re: gEDA-user: geda cygwin package

2009-05-14 Thread Joerg
Peter Baxendale wrote:
 On Wed, 2009-05-13 at 13:19 -0400, al davis wrote:
 Gnucap has always worked on windows.  It works with gEDA, with 
 gnetlist generating a spice file, as well as any simulator does. 
 How about using Gnucap?
 
 Well, for this particular course, for these particular students I needed
 something they could start doing very simple simulations with reasonable
 graphical output with about a 5 minute intro. Last time I looked at
 gnucap there was a steeper learning curve, which I just didn't have time
 for on this course. I'd certainly look at gnucap for anything more
 advanced - something that's been on my summer list of things to do for
 the past few years.
 

AFAIK Gnucap is not quite SPICE-compatible, but that's what your 
students will be facing when they head out into industry. LTSpice might 
be an alternative. Very short learning curve, free of cost, nice 
graphics output and by now very widespread in industry.

LTSpice probably runs under wine but try it out first, see if the help 
files are ok because students will certainly need those a lot.

-- 
Regards, Joerg

http://www.analogconsultants.com/

gmail domain blocked because of excessive spam.
Use another domain or send PM.



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gEDA-user: mimedel is annoying (was: collapsing or non-collapsing balls, how can i tell?)

2009-05-14 Thread Ben Jackson
On Thu, May 14, 2009 at 12:00:47PM -0400, John Luciani wrote:
 
There is a new version of the naming convention, IPC-7351B Naming
...
(* jcl *)
--
You can't create open hardware with closed EDA tools.
[1]http://www.luciani.org
 
 References
 
1. http://www.luciani.org/

I notice 'X-Content-Filtered-By: Mailman/MimeDel 2.1.9' in the headers...

Lately I've been having trouble reading John's mail because of odd
formatting.  It's especially hard to tell which text is his in replies.
It turns out that the list seems to be taking his alternative html +
plain email and turning it into plain + plain with one oddly formatted
by mimedel.  My mailer seems to pick the ugly one, unfortunately.

Looking at one random old message from John from January I don't see
this problem.  Is this a switch we can flip back?  Or can we make
mimedel at least prefer the plaintext as formatted by the original
mailer?

-- 
Ben Jackson AD7GD
b...@ben.com
http://www.ben.com/


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Re: gEDA-user: collapsing or non-collapsing balls, how can i tell?

2009-05-14 Thread Jelle de Jong
John Luciani wrote:
 There is a new version of the naming convention, IPC-7351B Naming
 Convention for Standard SMT Land Patterns,
 that lists the various BGA types.
 Dual pitch has Col Pitch x Row Pitch attributes
 Staggered pins is BGAS
 A C or N suffix is added for collapsing or non-collapsing balls

Thanks you for responding, your library looks great, I am still trying to
figure out how you created and named the footprints.

There may be a B version for the naming convention but I can't find the
documents with an popular internet search engine.

My question in the original mail where more focused on the how and why. I
under stead that C and N stands for collapsing or non-collapsing balls
but I am not very experienced in BGA and I have no idea what this exactly
is and how I can see what type of BGA I have. The same goes about Dual
Pitch BGA what is a dual pitch BGA, how can one tell.

Please see my original mail for all questions.

Thanks in advance,

Cheers,

Jelle


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Re: gEDA-user: mimedel is annoying (was: collapsing or non-collapsing balls, how can i tell?)

2009-05-14 Thread Stefan Salewski
On Thu, 2009-05-14 at 09:23 -0700, Ben Jackson wrote:

 Lately I've been having trouble reading John's mail because of odd
 formatting.  It's especially hard to tell which text is his in replies.
 It turns out that the list seems to be taking his alternative html +
 plain email and turning it into plain + plain with one oddly formatted
 by mimedel.  My mailer seems to pick the ugly one, unfortunately.

Thanks for pointing this out -- I have complained also a few times about
the strange format of some mails.

Some people seems to send plain text and the same in HTML -- and this
list forwards both. So I have the text twice in my email client. Other
list seems not to have this problem, or their subscribers know that HTML
is for webpages, not for email.





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Re: gEDA-user: naming and creation of 54-pin TSOP II (400 mil) footprint, request for help

2009-05-14 Thread Bert Timmerman
Hi Jelle,

Jelle de Jong wrote:
 Bert Timmerman wrote:
 Hi Jelle,

 On Wed, 2009-05-13 at 14:45 +0200, Jelle de Jong wrote:
 Hello everybody,

 I am trying to create a footprint with a correct name using the IPC-7351
 Naming Convention for Standard SMT Land Patterns.

 But I am having some issues, i am using the below document to learn about
 the naming convention:
 https://secure.powercraft.nl/svn/openarm/trunk/working/pcb/documents/footprint-name-spec.pdf

 The footprint I want to make is a 54-pin TSOP II (400 mil), see:
 https://secure.powercraft.nl/svn/openarm/trunk/doc/SDRAM/MT48LC16M16A2P-7E/256MSDRAM.pdf
 # page 75, 54-Pin Plastic TSOP

 I tried to figure it out but I don't know what the lead span 1(L1) is?

 footprint:
 TSSOP-65P-640L1-54N
 54-pin TSOP II (400 mil)
 TSSOP   pin spacing, lead span 1, pin count
 P  pin spacingdimension
 L1 lead span 1dimension
 N  pin count  count

 I also learned to create footprints with the following document:
 https://secure.powercraft.nl/svn/openarm/trunk/working/pcb/documents/land_patterns_20070818.pdf
 I had my ups and downs learning this and had some help trough IRC.

 However the creation of a 54-pin TSOP II seems to be able to automate
 using a script.

 I looked at the following, but it uses a license I disagree with and I
 can't figure out how it works, I prefer OSI and GPL compatible licenses.
 http://www.luciani.org/geda/pcb/pcb-perl-library.html

 Would somebody be able to help me out, what should the name of the
 footprint become and what scripts can I use to make the footprint and how
 can I do this?


If you have access to a windoze box you could install the free demo 
version of the PCB Matrix Land pattern viewer.

Free as in beer :-(

This is an easy way to get a rough guestimate for land pattern dimensions.

It can be found at:

http://www.pcbmatrix.com/downloads/LPSoftware.asp

BTW: I'm coding a pcb footprint wizard called fpw (and a GTK version 
called pcb-gfpw). Best to google for pcb-fpw. This is still alpha so 
Your Mileage May Vary.

 I would go for a name like: TSSOP80P1176X120-54N.fp as in the IPC
 standard IPC-7351

 0.80 mm pitch,
 11.76 mm lead span,
 X
 1.20 mm height
 - 54 leads with Nominal pad conditions (as one of the following: Least,
 Nominal, Most).

 Maybe it is a wise thing to avoid - characters in footprint file names
 or to have a use-files line in your gsch2pcb config file and pass a
 --skip-m4 flag to disable m4 macro generated footprints to goof up your
 pcb stuff.

 Maybe include a vendor and part name too, while footprint artwork
 recommendations may vary across vendors and specific parts.

 Thanks Bert for the feedback, I am confused, I calculated the pitch on
 0.65 mm how did you came to 0.80mm, and could you explain what exactly
 the lead span is. If I look at page 75 of the datasheet how can I exactly
 calculate this lead span?
 

On page 75 the lead span dimension of the package is given in mm, it's 
at the bottom of the top view, it is the maximum width of the package.
This is not to be confused with the toe-to-toe distance of the 
landpattern, which will have to protrude from below the leads at least 
twice the solder fillet dimension.
The package body itself is 400 mil or 10.16 mm.

 Why did you include the height where did you find this requirement in the
 IPC-7351 for TSSOP footprints?
 

I found a copy over here:

http://www.pcblibraries.com/resources/files/IPC-7351/IPC-7x51%20%20PCBL%20Land%20Pattern%20Naming%20Convention.pdf

BTW: your Micron SDRAM is in TSOP package, any confusion my mistake ;-)

 And why should one avoid the - character in footprint names? I see a
 lot of footprints with this character, would you be willing to discuss
 the arguments?
 

M4 macros may treat this as an operator and try to do some math.

 I call the gsch2pcb with the following arguments:
 gsch2pcb --use-files --skip-m4 ~/openarm/working/gschem/openarm-sbc.prj
 --elements-dir ~/openarm/working/pcb/footprints/
 

Looks good to me, although I recently did my first couple of boards.

Hopes this helps a bit.

Kind regards,

Bert Timmerman.

 I hope that is ok...
 
 Sorry for al the questions, I am kind of confused, and searching for
 answers and help.
 
 Best regards,
 
 Jelle de Jong
 
 
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Re: gEDA-user: geda cygwin package

2009-05-14 Thread al davis
On Thursday 14 May 2009, Joerg wrote:
 AFAIK Gnucap is not quite SPICE-compatible, but that's what
 your students will be facing when they head out into
 industry. LTSpice might be an alternative. Very short
 learning curve, free of cost, nice graphics output and by now
 very widespread in industry.

It depends which spice.  Strictly, SPICE is not SPICE 
compatible, because if you move to a different one something 
will be different.

I get  the impression that what you want is bug-for-bug 
compatibility.  From a beginners perspective, the important 
differences between Gnucap and any particular Spice are usually 
that Gnucap has extra capability that the Spice doesn't have, 
and this extra capability is useful to a beginner.

From the viewpoint of undergraduate education, it is as close as 
any, and provides an experience closer to the high-end 
simulators than the PC spice's do.  It has a shorter learning 
curve that the real Spice from Berkeley, and a smoother learning 
curve than the graphic commercial and cover-crop spice's.  The 
popular graphic PC spice's carry you part way in luxury, then 
dump you when you really need it.

The PC graphic spice's only provide a short learning curve if 
you already are comfortable with the typical project baggage.  
Then if you want to play, to do more than what you can do with a 
few kick buttons, you need to start over.

Educators typically use simulators very poorly, as if they 
themselves don't understand.  In most cases, the total use is a 
few specified runs with a couple of graphs, that you do after 
everything else is done.  A more appropriate use of simulators 
is to explore things that you can't see with real measurements.  
There is a lot that you can find out about a circuit that you 
can't measure in a practical way.

Students need to learn to be flexible, and they need to learn to 
use computers effectively, not just by kicking the GUI a few 
times.  EE's, even analog designers, need to learn some serious 
programming.

Too many schools don't do this.  In the extreme case, EE could 
become a dumping ground for students who can't make it in CS.
Is that what you want?



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Re: gEDA-user: geda cygwin package

2009-05-14 Thread Joerg
al davis wrote:
 On Thursday 14 May 2009, Joerg wrote:
 AFAIK Gnucap is not quite SPICE-compatible, but that's what
 your students will be facing when they head out into
 industry. LTSpice might be an alternative. Very short
 learning curve, free of cost, nice graphics output and by now
 very widespread in industry.
 
 It depends which spice.  Strictly, SPICE is not SPICE 
 compatible, because if you move to a different one something 
 will be different.
 
 I get  the impression that what you want is bug-for-bug 
 compatibility.  From a beginners perspective, the important 
 differences between Gnucap and any particular Spice are usually 
 that Gnucap has extra capability that the Spice doesn't have, 
 and this extra capability is useful to a beginner.
 

Not bug-for-bug, but as close to the industry standard as practical. If 
you let them use something that has nice features they get used to 
those, and then in industry where they don't have those it becomes a 
problem. You can do just about anything with SPICE, even simulate 
mechanical devices. But one has to learn who to kludge and cajole 
SPICE to do that.


 From the viewpoint of undergraduate education, it is as close as 
 any, and provides an experience closer to the high-end 
 simulators than the PC spice's do.  It has a shorter learning 
 curve that the real Spice from Berkeley, and a smoother learning 
 curve than the graphic commercial and cover-crop spice's.  The 
 popular graphic PC spice's carry you part way in luxury, then 
 dump you when you really need it.
 
 The PC graphic spice's only provide a short learning curve if 
 you already are comfortable with the typical project baggage.  
 Then if you want to play, to do more than what you can do with a 
 few kick buttons, you need to start over.
 

That's where Usenet comes in :-)

Even a (very) seasoned engineer had to ask about that three days ago, 
how to set abstol and stuff and make it travel with the file. Nothing 
wrong with asking.


 Educators typically use simulators very poorly, as if they 
 themselves don't understand.  In most cases, the total use is a 
 few specified runs with a couple of graphs, that you do after 
 everything else is done.  A more appropriate use of simulators 
 is to explore things that you can't see with real measurements.  
 There is a lot that you can find out about a circuit that you 
 can't measure in a practical way.
 

Absolutely. That's how I found what degraded and eventually killed RF 
switching diodes in a client's board. With PSPICE. Impossible to see 
even with sampling scopes. Educators should give students stuff to grind 
their teeth on like Hey, this thing doesn't work right, find out why 
and how to improve it.


 Students need to learn to be flexible, and they need to learn to 
 use computers effectively, not just by kicking the GUI a few 
 times.  EE's, even analog designers, need to learn some serious 
 programming.
 

They need to and they do, to some extent. They do not have to become 
programming experts, else I might as well demand that all CS guys fully 
understand Maxwell's equations because we have to ;-)


 Too many schools don't do this.  In the extreme case, EE could 
 become a dumping ground for students who can't make it in CS.
 Is that what you want?
 

That has IME never been the case, and won't be. None of the EEs I know 
started out CS. And don't believe EE is easy, our university had an EE 
flunk-out rate of around 75% plus. ME and EE were the toughest paths 
there, some of the grueling 4h written exams could make grown men shake 
in their boots.

-- 
Regards, Joerg

http://www.analogconsultants.com/

gmail domain blocked because of excessive spam.
Use another domain or send PM.



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Re: gEDA-user: A not too serious PCB question

2009-05-14 Thread Stefan Salewski
On Wed, 2009-05-13 at 16:16 +0200, Stefan Salewski wrote:
 Someone asked how one can build PCB boards like this:
 
 http://www.mikrocontroller.net/topic/137821#new
 
 (Click on the picture too enlarge)
 
 This layout may have advantages if PCB is made mechanical, i.e. by
 milling machines.
 
 So I asked myself is current PCB can do it -- I guess not, but I may be
 wrong.
 

For the records:

http://groups.csail.mit.edu/drl/wiki/index.php/Visolate:_Voronoi_Toolpaths_for_PCB_Mechanical_Etch



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Re: gEDA-user: A not too serious PCB question

2009-05-14 Thread Ben Jackson
On Thu, May 14, 2009 at 08:34:17PM +0200, Stefan Salewski wrote:
 
 http://groups.csail.mit.edu/drl/wiki/index.php/Visolate:_Voronoi_Toolpaths_for_PCB_Mechanical_Etch

Voronoi diagrams are a related problem, but I think the correct way to
approach it is:

1.  Produce the polygon (with holes) of all of the *non copper* areas of
the board.  PCB can do this easily with existing polygon primitives.

2.  Find the straight skeleton of the resulting polygon.  I believe if
the orientation of the PCB polygons was cleared up you could do this with
the CGAL library.  Or it could be reimplemented for our polygon structure.

Skeletonization can be done with a raster method, but I think this would
produce suboptimal toolpaths if the intent were really to output Gcode.

3.  Delete all of the stubs in the resulting skeleton.  Holes in the
original non-copper polygon (which represent islands of copper) will
create loops in the skeleton, which we want to keep.  Peninsulas of
non copper will produce stubs (which do not serve to actually isolate
any region -- imagine a P shape simplified to an O).  If you use a
library like CGAL these should be removed.

-- 
Ben Jackson AD7GD
b...@ben.com
http://www.ben.com/


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gEDA-user: Parts!

2009-05-14 Thread DJ Delorie

I'm gearing up to populate a bunch of powermeter boards, plus the
sdram board, and got the biggest digikey box I've ever gotten.  This
time, it was cost effective to by reels of two of the parts, and many
parts were ordered at the next price-point up (10 is cheaper than 9
sometimes - I've got a TUBE of ethernet jacks now), so I'll have
leftovers.

How do people manage their parts inventories, so they know what
they've got?


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Re: gEDA-user: Parts!

2009-05-14 Thread Steven Michalske
I use boxes of duplicate parts and a faulty memory!

On May 14, 2009, at 12:34 PM, DJ Delorie wrote:


 I'm gearing up to populate a bunch of powermeter boards, plus the
 sdram board, and got the biggest digikey box I've ever gotten.  This
 time, it was cost effective to by reels of two of the parts, and many
 parts were ordered at the next price-point up (10 is cheaper than 9
 sometimes - I've got a TUBE of ethernet jacks now), so I'll have
 leftovers.

 How do people manage their parts inventories, so they know what
 they've got?


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Re: gEDA-user: Parts!

2009-05-14 Thread Joerg
DJ Delorie wrote:
 I'm gearing up to populate a bunch of powermeter boards, plus the
 sdram board, and got the biggest digikey box I've ever gotten.  This
 time, it was cost effective to by reels of two of the parts, and many
 parts were ordered at the next price-point up (10 is cheaper than 9
 sometimes - I've got a TUBE of ethernet jacks now), so I'll have
 leftovers.
 
 How do people manage their parts inventories, so they know what
 they've got?
 

I use a MS-Works database. It lists the qty, part description and (very 
important) where is is stashed. For SMT stuff that I may need at client 
sites I use tiny jewel boxes that have around 50 micro-bins each in a 
2*2*1/3 space, stackable. No chance for labels or anything, without 
this database I would not have a clue what's where.

MS-Works comes pre-config'd on most PCs but I don't know if there is a 
Linux equivalent. The OpenOffice database is not useful IMHO. Look for 
something much simpler. You probably won't need 3D-graphed statistics 
about your usage of Ethernet jacks in correlation to sun spot numbers or 
so :-)

-- 
Regards, Joerg

http://www.analogconsultants.com/



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Re: gEDA-user: Parts!

2009-05-14 Thread Bill Gatliff
Steven Michalske wrote:
 I use boxes of duplicate parts and a faulty memory!
   

Yea, that one has worked well for me for years too.  :)

I've been interested to try something I saw a lawyer use once to track 
an incomprehensibly-large pile of documents: divide them up into small, 
arbitrary groups, and put them into numbered folders.  Then keep a 
notepad (or in his case, a database) that mapped the document title, 
author, etc. to the folder number.

The lawyer knew that he didn't need to classify his documents, he just 
needed to be able to find them individually.  Applied to our work, 
sometimes it doesn't make sense to have a drawer for resistors, another 
for connectors, etc.  Just get some of those small-parts boxes from 
Lowes or whatever, and as new parts come in then you put the little bags 
into the most-empty bin and then jot down which bin it was.

There was a time when I kept all my Mouser orders in their original 
shipping boxes, along with a hardcopy of the order.  Then I could just 
flip through the order sheets until I found which box the part I wanted 
was in.  It really seemed helpful, although manually searching 10+ page 
lists was an ideal opportunity for improvement.

Just a thought.  Not that I have time to do better, of course.  :)


b.g.

-- 
Bill Gatliff
b...@billgatliff.com



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Re: gEDA-user: Parts!

2009-05-14 Thread Ben Jackson
On Thu, May 14, 2009 at 03:34:31PM -0400, DJ Delorie wrote:
 
 How do people manage their parts inventories, so they know what
 they've got?

I have some flat text files of interesting stuff (like microcontrollers
and voltage regulators) and things I have vast quantities of (reels of
0603 caps) and then I just try to keep kits on hand so that I know I
have any value of resistor I want (currently in through-hole and 0805).
Connectors I'm really bad about.  I tend to go through my collection of
connectors every time I need something.

-- 
Ben Jackson AD7GD
b...@ben.com
http://www.ben.com/


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Re: gEDA-user: Parts!

2009-05-14 Thread Joerg
Bill Gatliff wrote:
 Joerg wrote:
 I use a MS-Works database. It lists the qty, part description and (very 
 important) where is is stashed. For SMT stuff that I may need at client 
 sites I use tiny jewel boxes that have around 50 micro-bins each in a 
 2*2*1/3 space, stackable. No chance for labels or anything, without 
 this database I would not have a clue what's where.
   
 
 Even worse, many of my SMT parts are so small that the labeling on them 
 is pretty meaningless--- if there is any at all.  If a box of parts were 
 to drop open, you'd be better off sweeping the whole pile into the trash 
 and starting over!
 

I meant the bins themselves. The individual storage areas as such tiny 
square holes that even a label on that part of the box would be like 
micro-fiche.


 I did find these once:  http://t-rexelectronics.com/7.html
 
 Seems great for cut tapes, at least. Where did you get your boxes?
 

The usual, at a company that closed the subsidiary. They are actually 
containers where SMT inductors were shipped in.


 My wife has suggested mini-scrapbook albums, whose page folders are 
 about the same size as the small static-safe bags that Mouser ships in.
 
 Plano makes some small boxes with configurable compartments, but I've 
 found that their dividers don't seat tightly enough to keep small SMT 
 parts from passing underneath them.  And I worry about static.
 

John Larkin on s.e.design gave me the hint: Coin envelopes. So I 
bought two boxes of No.1 coin envelopes at Staples and started filing 
the various parts inside. It's the brownish post-consumer stuff and I 
could not detect any  static on those. You can write onto them, 
including comments such as mushy at VCC  4V. Digikey ships with these 
nice peel and stick labels and I also stick those on there. So when I 
run out of something I just key in the number on there and, bingo.

-- 
Regards, Joerg

http://www.analogconsultants.com/



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Re: gEDA-user: Parts!

2009-05-14 Thread Cullen Newsom
What a headache!  I dig through boxes until I find it!

As far as computerized inventory tracking, I have almost zilch. I have a
few old BOMs lying around.  I keep datasheets for parts I own in
different directories from other parts.  I try to keep the files named
so that I can find them when I need them, but often it is just as easy
to re-download it, than look through my directories of datasheets.  I am
terribly disorganized about this. Nobody knows what I have, including me.

* I keep unfinished projects in clear plastic shoeboxes  that you get
for about a buck at discount stores.
* Except for projects that are too big, so I have some cardboard boxes too
* And large plastic tubs
* Sometimes I clean up my bench and used a clear plastic shoebox for
that, or a cardboard box, or a large tub.
* I have a couple of three ring binders, with clear plastic pocket pages
for parts that can be filed in order
* I also have tons of those clear plastic do-dads whose base is the next
one's lid.
* And some tiny little flip-top dingers that I found in China
* And many cut-tapes rubber-banded together
* A few reels here and there (.01µF anyone?)
* And some auto parts store style bolt bins
* A bookshelf full of random sample kits
* Drawers with IC's stuck in foam
* Let's not forget those clear acrylic-drawer organizers
* And a bunch of other plastic (abs?) multi drawer organizers
* Fishing tackle boxes
* I try to keep dev-kits in their original box

I sure wish that at some stage in the design workflow (the step between
gschem and PCB perhaps), I could somehow cleverly integrate part
(footprint) selection (from my inventory).   Then maybe I would take an
inventory.

Sigh.


  How do people manage their parts inventories, so they know what
  they've got?

   




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Re: gEDA-user: Parts!

2009-05-14 Thread Joe Chisolm


DJ Delorie wrote:
 I'm gearing up to populate a bunch of powermeter boards, plus the
 sdram board, and got the biggest digikey box I've ever gotten.  This
 time, it was cost effective to by reels of two of the parts, and many
 parts were ordered at the next price-point up (10 is cheaper than 9
 sometimes - I've got a TUBE of ethernet jacks now), so I'll have
 leftovers.

 How do people manage their parts inventories, so they know what
 they've got?

   
I've tried several ways, including writing programs and perl scripts but
I find
a simple spreadsheet works for me.  I keep the basic part specs, mfg
part number,
supplier part numbers (DigiKey, Mouser mostly), last order price, qty on
hand and
location.  Location is just a storage box number.  I keep the parts in
their original
packages.  Almost all of my parts, except some connectors, are SMT.  I'm
a little
lazy about keeping qty on hand updated so I usually inventory when I
start a new
project.  I dont really worry about qty for resistors, I just by 500, 1K
or 5K qty.

I keep the pdf data sheets in a directory with a sub-directory for each
manufacturer.

-- 
Joe Chisolm
Computer Translations, Inc.
Marble Falls, Tx.
830-265-8018



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Re: gEDA-user: Parts!

2009-05-14 Thread Joerg
Bill Gatliff wrote:
 Joerg wrote:
 John Larkin on s.e.design gave me the hint: Coin envelopes.
   
 
 Why not just leave the parts in the little anti-static envelopes they 
 came in?  They're already labeled, even.
 

They come in too many different sizes and don't stack nicely. Also, they 
have no flap and you are always cutting and re-applying Scotch tape. 
This really slows down prototyping work. With the coin envelopes I don't 
even tuck the flap, never lost a part.

Also, caps, resistors and such come in loose snippets of paper-reel. 
That's not very handy to store stuff. They need a better home :-)

-- 
Regards, Joerg

http://www.analogconsultants.com/



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Re: gEDA-user: geda cygwin package

2009-05-14 Thread al davis
On Thursday 14 May 2009, Joerg wrote:
 Not bug-for-bug, but as close to the industry standard as
 practical. If you let them use something that has nice
 features they get used to those, and then in industry where
 they don't have those it becomes a problem. You can do just
 about anything with SPICE, even simulate mechanical devices.
 But one has to learn who to kludge and cajole SPICE to do
 that.

It's pretty close.  In the development snapshot, and in the next 
official release due  this summer, the whole user interface is 
done by plugins, which can be made any way you want.  Perhaps 
someday it will be bug-for-bug, with more than one, and still 
have extensions if you ask.

Significant parts of industry are moving to Verilog-A.  None of 
the cheap simulators have it, but Gnucap does.  Gnucap also  
accepts Spectre netlists, a subset.

As to those nice features ..  all tools have advantages and 
disadvantages.  There are features you will find in one but not 
another.  Students need to learn this.  So, having nice features 
like Gnucap's interactive operation, extended probes, and the 
ability to easily change circuits interactively or with scripts 
is good.  The ability to directly enter a netlist without file 
baggage is a big help at the beginning.

On the other hand, the tightly integrated graphics of LTspice 
and other PC simulators is in that category where they don't 
really add to functionality, but become a crutch.  Then they 
have a problem when the GUI isn't available, or more importantly 
they have a task that is complicated enough that the GUI gets in 
the way.  Those features are the ones to avoid.

So, it's LTspice that has nice features that they would be 
better off without.

I start them with a netlist, then later they learn how to use 
schematic capture as a way to generate a netlist.

 Even a (very) seasoned engineer had to ask about that three
 days ago, how to set abstol and stuff and make it travel with
 the file. Nothing wrong with asking.

Students need to learn that simulators don't always work.  In a 
senior level course on analog design, it is reasonable to expect 
that they will see a convergence failure, and need to mess with 
abstol and stuff.  It might even be desirable for a simulator to 
have a hidden mode that makes convergence worse to make sure 
this happens.

  Students need to learn to be flexible, and they need to
  learn to use computers effectively, not just by kicking the
  GUI a few times.  EE's, even analog designers, need to
  learn some serious programming.

 They need to and they do, to some extent. They do not have to
 become programming experts, else I might as well demand that
 all CS guys fully understand Maxwell's equations because we
 have to ;-)

Even the CS guys are not programming experts.  The EE's should 
be able to work with unix, with the command line.  They should 
be able to write programs to solve engineering problems.  They 
should be able to administrate their own systems and write 
scripts to solve their own problems.  They should be able to 
install a program from source, and do some simple porting.

At both universities where I was on the faculty, we got constant 
comments from employers that the students need to learn more 
programming.  We got those comments from accreditation reviewers 
too.  We were not worse than average.  It's a widespread 
problem.

  Too many schools don't do this.  In the extreme case, EE
  could become a dumping ground for students who can't make
  it in CS. Is that what you want?

 That has IME never been the case, and won't be. None of the
 EEs I know started out CS. And don't believe EE is easy, our
 university had an EE flunk-out rate of around 75% plus. ME
 and EE were the toughest paths there, some of the grueling 4h
 written exams could make grown men shake in their boots.

Typically, the first year curriculum is pretty much the same for 
all science and engineering.  The students usually have not 
really have made up their mind yet.  They made a guess, but 
that's all.  They move around depending on how the first year 
goes.  It amazes me how many have said I chose EE because I had 
trouble with the programming course and want something else.  
Then they learn too late that EE is hard too.

At a lot of schools, the EE program (and probably others) keeps 
getting easier.  Many older EE professors are having a hard time 
dealing with this.

Don't sell CS short.  It can be pretty grueling too.  We really 
shouldn't be saying that one is harder than the other.

To get back on topic .  We had cygwin on the lab computers.  
I encouraged students to install it on their own computers if 
they were running windows and didn't also have a unix-type OS 
such as Linux, BSD, or Mac. 



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Re: gEDA-user: Parts!

2009-05-14 Thread Joerg
DJ Delorie wrote:
 Also, caps, resistors and such come in loose snippets of paper-reel. 
 That's not very handy to store stuff. They need a better home :-)
 
 Do you put the tape snippets in the coin envelopes, or peel the parts
 out of the tape first?
 

Depends on the parts. Jelly-bean parts such as caps and resistors I just 
dump in there as loose parts. As reel snippets they'd occupy too many 
envelopes because of quantity. Just imagine 500 0.01uF/0603 as reel 
snippets. With PIN diodes or similar more noble parts I cut the tape 
into short snippets.

-- 
Regards, Joerg

http://www.analogconsultants.com/

gmail domain blocked because of excessive spam.
Use another domain or send PM.



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Re: gEDA-user: Parts!

2009-05-14 Thread John Griessen
DJ Delorie wrote:
 How do people manage their parts inventories, so they know what
 they've got?

An inventory spreadsheet,
a file case of 66 2 inch tall drawers intended for music sheets holds bags, 
reels, boxes,
and some file folders with cut tape SMT parts double-stick-taped on letter size 
paper with edges labeled.

Miscellaneous is in clear plastic organizer drawers.

John


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Re: gEDA-user: geda cygwin package

2009-05-14 Thread Joerg
al davis wrote:
 On Thursday 14 May 2009, Joerg wrote:
 Not bug-for-bug, but as close to the industry standard as
 practical. If you let them use something that has nice
 features they get used to those, and then in industry where
 they don't have those it becomes a problem. You can do just
 about anything with SPICE, even simulate mechanical devices.
 But one has to learn who to kludge and cajole SPICE to do
 that.
 
 It's pretty close.  In the development snapshot, and in the next 
 official release due  this summer, the whole user interface is 
 done by plugins, which can be made any way you want.  Perhaps 
 someday it will be bug-for-bug, with more than one, and still 
 have extensions if you ask.
 
 Significant parts of industry are moving to Verilog-A.  None of 
 the cheap simulators have it, but Gnucap does.  Gnucap also  
 accepts Spectre netlists, a subset.
 

I can only speak for analog. There, I can currently see nobody moving 
away from SPICE, and except for chip design most are migrating towards 
LTSpice for obvious reasons ($ versus $0). So when they hire new 
engineers they prefer them to be familiar with LTSpice.


 As to those nice features ..  all tools have advantages and 
 disadvantages.  There are features you will find in one but not 
 another.  Students need to learn this.  So, having nice features 
 like Gnucap's interactive operation, extended probes, and the 
 ability to easily change circuits interactively or with scripts 
 is good.  The ability to directly enter a netlist without file 
 baggage is a big help at the beginning.
 

Ahm, I used to enter everything by netlist and some of the old stuff I 
have used on LTSpice. It can do that, you'd be free to write a netlist 
there.


 On the other hand, the tightly integrated graphics of LTspice 
 and other PC simulators is in that category where they don't 
 really add to functionality, but become a crutch.  Then they 
 have a problem when the GUI isn't available, or more importantly 
 they have a task that is complicated enough that the GUI gets in 
 the way.  Those features are the ones to avoid.
 
 So, it's LTspice that has nice features that they would be 
 better off without.
 
 I start them with a netlist, then later they learn how to use 
 schematic capture as a way to generate a netlist.
 

LTSpice can accomodate that. It works off of a plain old ASCII file. Any 
time I needed it to do something in a more traditional way like in the 
DOS days, it complied.


 Even a (very) seasoned engineer had to ask about that three
 days ago, how to set abstol and stuff and make it travel with
 the file. Nothing wrong with asking.
 
 Students need to learn that simulators don't always work.  In a 
 senior level course on analog design, it is reasonable to expect 
 that they will see a convergence failure, and need to mess with 
 abstol and stuff.  It might even be desirable for a simulator to 
 have a hidden mode that makes convergence worse to make sure 
 this happens.
 

Yes :-)

Just like the flight simulator where suddenly the manifold pressure 
changes unpredictably right after take-off.


 Students need to learn to be flexible, and they need to
 learn to use computers effectively, not just by kicking the
 GUI a few times.  EE's, even analog designers, need to
 learn some serious programming.
 They need to and they do, to some extent. They do not have to
 become programming experts, else I might as well demand that
 all CS guys fully understand Maxwell's equations because we
 have to ;-)
 
 Even the CS guys are not programming experts.  The EE's should 
 be able to work with unix, with the command line.  They should 
 be able to write programs to solve engineering problems.  They 
 should be able to administrate their own systems and write 
 scripts to solve their own problems.  They should be able to 
 install a program from source, and do some simple porting.
 

Ok, here we differ. There comes a point where the amount of learning is 
plain impossible to cram into any brain in the given number of 
semesters. While, for example, it would be nice if every person holding 
a commercial driver license is able to design their own engine control 
unit this is not going to happen.

Did I ever write my own programs? Yes. Would my career have come to a 
screeching halt if I wouldn't have? No. I would have just paid someone 
to do it for me.


 At both universities where I was on the faculty, we got constant 
 comments from employers that the students need to learn more 
 programming.  We got those comments from accreditation reviewers 
 too.  We were not worse than average.  It's a widespread 
 problem.
 

If by accreditation you mean ABET I better not comment, cuz it'll get 
ugly ;-)


 Too many schools don't do this.  In the extreme case, EE
 could become a dumping ground for students who can't make
 it in CS. Is that what you want?
 That has IME never been the case, and won't be. None of the
 EEs I know started out CS. And don't 

Re: gEDA-user: Parts!

2009-05-14 Thread Joerg
DJ Delorie wrote:
 Also, caps, resistors and such come in loose snippets of paper-reel. 
 That's not very handy to store stuff. They need a better home :-)
 
 Do you put the tape snippets in the coin envelopes, or peel the parts
 out of the tape first?
 

Oh, before it's too late: _Don't_ remove hi-ohms resistor like 10M and 
such from their tapes because plating can rub off onto their bodies when 
tossed about. Also, they should not be touched with bare hands.

-- 
Regards, Joerg

http://www.analogconsultants.com/

gmail domain blocked because of excessive spam.
Use another domain or send PM.



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Re: gEDA-user: Parts!

2009-05-14 Thread Kai-Martin Knaak
On Thu, 14 May 2009 15:02:40 -0500, Bill Gatliff wrote:

 Seems great for cut tapes, at least. Where did you get your boxes?

I got mine from elv:
http://www.elv.de/output/controller.aspx?cid=74detail=10detail2=4213

The lid of these boxes is spring loaded. It keeps the parts inside even 
when the rack hits the floor. The boxes come in different sizes and 
colors. They can be combined like lego. 

---(kaimartin)---



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Re: gEDA-user: Parts!

2009-05-14 Thread DJ Delorie

Just FYI, I was mostly asking about the database aspect, not the
storage aspect.  Both aspects are interesting to read about, of
course.


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Re: gEDA-user: Parts!

2009-05-14 Thread Joerg
Kai-Martin Knaak wrote:
 On Thu, 14 May 2009 15:02:40 -0500, Bill Gatliff wrote:
 
 Seems great for cut tapes, at least. Where did you get your boxes?
 
 I got mine from elv:
 http://www.elv.de/output/controller.aspx?cid=74detail=10detail2=4213
 
 The lid of these boxes is spring loaded. It keeps the parts inside even 
 when the rack hits the floor. The boxes come in different sizes and 
 colors. They can be combined like lego. 
 

Neat! 2 Euros for 10 of those is not expensive. But only the last one 
says ESD-safe and that doesn't mention whether you'll get 10 for that price.

Now we have to find out where to get those in America ;-)

-- 
Regards, Joerg

http://www.analogconsultants.com/

gmail domain blocked because of excessive spam.
Use another domain or send PM.



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Re: gEDA-user: geda cygwin package

2009-05-14 Thread gene glick

 To get back on topic .  We had cygwin on the lab computers.  
 I encouraged students to install it on their own computers if 
 they were running windows and didn't also have a unix-type OS 
 such as Linux, BSD, or Mac. 
 
Have you seen Sun's Virtual Box?  It's very cool.  Basically, it creates 
a virtual environment, somewhat isolated from the host OS, in which you 
can install any OS you like.  At work, I've installed Ubuntu on my XP 
system.  I'm finding it a bit of a memory hog, but otherwise it works 
just fine.  I have Cygwin too, but really prefer the Virtual Box.  I get 
full blown Linux without compromises of Cygwin.  Then, if it turns out 
you don't like it, or want it to go away just delete the virtual partition.

gene


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Re: gEDA-user: geda cygwin package

2009-05-14 Thread Joerg
gene glick wrote:
 To get back on topic .  We had cygwin on the lab computers.  
 I encouraged students to install it on their own computers if 
 they were running windows and didn't also have a unix-type OS 
 such as Linux, BSD, or Mac. 

 Have you seen Sun's Virtual Box?  It's very cool.  Basically, it creates 
 a virtual environment, somewhat isolated from the host OS, in which you 
 can install any OS you like.  At work, I've installed Ubuntu on my XP 
 system.  I'm finding it a bit of a memory hog, but otherwise it works 
 just fine.  I have Cygwin too, but really prefer the Virtual Box.  I get 
 full blown Linux without compromises of Cygwin.  Then, if it turns out 
 you don't like it, or want it to go away just delete the virtual partition.
 

I'll second that, also using VirtualBox here with Ubuntu mounted on it. 
Installing the guest additions required some wrestling but this now 
enables me to jump back and forth between Windows programs and, for 
example, gschem. You can even copy and paste stuff between the two OS'es.

The only thing you must remember is the right-ctrl F key combo to get 
in and out of full screen mode. It's not cool if you are in full screen 
for hours and then don't remember how to get back to your host OS (this 
happened to me the first time I tried gEDA). In full screen mode you 
literally think you are on a Linux box, tux and all. Except that tux 
looks mal-nourished and jaundiced on Ubuntu.

-- 
Regards, Joerg

http://www.analogconsultants.com/



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Re: gEDA-user: Parts!

2009-05-14 Thread Kai-Martin Knaak
On Thu, 14 May 2009 16:02:16 -0700, Joerg wrote:

 Neat! 2 Euros for 10 of those is not expensive. But only the last one
 says ESD-safe 

Only the black are ESD-safe. They sell all sizes in all colors. 
http://www.elv.de/SchraubenMagazine/x.aspx/cid_74/detail_1/detail2_159
Pricing for smallest size antistatic is 3 EUR/10, VAT included.

These look similar, but not quite the same:
 http://www.transforming-technologies.com/smd-clear.html

---(kaimartin)---



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gEDA-user: installing 1.5.2 - progress?

2009-05-14 Thread KURT PETERS

   no joy on doing the apt-get build-dep's
-- make clean yields
   make[2]: Leaving directory
   `/home/kurt/Documents/gedacompile/libgeda-1.5.2'
   make[1]: Leaving directory
   `/home/kurt/Documents/gedacompile/libgeda-1.5.2'
   ( cd geda-symbols-1.5.2; make clean )
   make[1]: Entering directory
   `/home/kurt/Documents/gedacompile/geda-symbols-1.5.2'
   make[1]: *** No rule to make target `clean'.  Stop.
   make[1]: Leaving directory
   `/home/kurt/Documents/gedacompile/geda-symbols-1.5.2
   'make open' does fine, but geda-utils unpacks into geda-docs for some
   reason:
   'make reconfig' gives:
   make[2]: Leaving directory
   `/home/kurt/Documents/gedacompile/libgeda-1.5.2'
   make[1]: Leaving directory
   `/home/kurt/Documents/gedacompile/libgeda-1.5.2'
   ( cd geda-symbols-1.5.2; make clean )
   make[1]: Entering directory
   `/home/kurt/Documents/gedacompile/geda-symbols-1.5.2'
   make[1]: *** No rule to make target `clean'.  Stop.
   make[1]: Leaving directory
   `/home/kurt/Documents/gedacompile/geda-symbols-1.5.2
   I'm not mv geda-docs-1.5.2 to geda-utils-1.5.2, untaring the original
   geda-docs, and seeing if that works.
   Kind of makes me wonder if I'm the only person that has tried this...
   literally.
   Regards,
   kurt
 _

   From: petersk...@msn.com
   To: geda-user@moria.seul.org
   Subject: RE: frtitzing
   Date: Sun, 10 May 2009 18:43:24 -0600
Wish I had thought of that... or better yet, it was somewhere in the install do
cumentation.
Kurt
KURT PETERS wrote:
Criminy... I have to admit, I couldn't even get the (1.5) source to
compile in Linux Kubuntu recently... so if people are saying it's easy
for those not in the know to work on gEDA source code, they're just
delusional.  Of course, I am now going to try to use git and compile
that way since I was NEVER able to get the source on the release web
page to compile -- hoping those instructions are slightly clearer.
Kurt

Have you tried this command for getting the compile dependencies?

sudo apt-get build-dep geda-gschem
sudo apt-get build-dep geda
sudo apt-get build-dep geda-gnetlist
sudo apt-get build-dep geda-gsymcheck
sudo apt-get build-dep geda-symbols
sudo apt-get build-dep geda-utils

Whether you have those geda-* packages installed or not, these commmands might
get you all
you need to compile from source on kubuntu.

John

--
Ecosensory   Austin TX


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Re: gEDA-user: Parts!

2009-05-14 Thread Joerg
Cullen Newsom wrote:
 What a headache!  I dig through boxes until I find it!
 
 As far as computerized inventory tracking, I have almost zilch. I have a
 few old BOMs lying around.  I keep datasheets for parts I own in
 different directories from other parts.  I try to keep the files named
 so that I can find them when I need them, but often it is just as easy
 to re-download it, than look through my directories of datasheets.  I am
 terribly disorganized about this. Nobody knows what I have, including me.
 
 * I keep unfinished projects in clear plastic shoeboxes  that you get
 for about a buck at discount stores.
 * Except for projects that are too big, so I have some cardboard boxes too
 * And large plastic tubs
 * Sometimes I clean up my bench and used a clear plastic shoebox for
 that, or a cardboard box, or a large tub.
 * I have a couple of three ring binders, with clear plastic pocket pages
 for parts that can be filed in order
 * I also have tons of those clear plastic do-dads whose base is the next
 one's lid.
 * And some tiny little flip-top dingers that I found in China
 * And many cut-tapes rubber-banded together
 * A few reels here and there (.01µF anyone?)
 * And some auto parts store style bolt bins
 * A bookshelf full of random sample kits
 * Drawers with IC's stuck in foam
 * Let's not forget those clear acrylic-drawer organizers
 * And a bunch of other plastic (abs?) multi drawer organizers
 * Fishing tackle boxes


Oh man! I assume you are not married. Can't be. Impossible ...


 * I try to keep dev-kits in their original box
 
 I sure wish that at some stage in the design workflow (the step between
 gschem and PCB perhaps), I could somehow cleverly integrate part
 (footprint) selection (from my inventory).   Then maybe I would take an
 inventory.
 
 Sigh.
 

[...]

-- 
Regards, Joerg

http://www.analogconsultants.com/



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