Re: gEDA-user: Resistor values.
Bert Timmerman wrote: >> ARE there any "current" gEDA developers? >> > > Yes, I think there is lots of patches or patch series in SF > to prove that. For 2010 there were exactly 16 patches in the geda tracker: http://sourceforge.net/tracker/?group_id=161080&atid=818428 I wouldn't call this "lots of". None of these patches was supplied by one of the people mentioned in gpleda.org/people.html ---<)kaimartin(>--- -- Kai-Martin Knaak Öffentlicher PGP-Schlüssel: http://pgp.mit.edu:11371/pks/lookup?op=get&search=0x6C0B9F53 ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
gEDA-user: New year
Happy new year all! Levente ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: European symbols?
Johnny Rosenberg wrote: > uploaded them here (temporarily): > http://ubuntuone.com/p/W5T/ I just receive this message: Could not locate object ---<)kaimartin(>--- -- Kai-Martin Knaak Öffentlicher PGP-Schlüssel: http://pgp.mit.edu:11371/pks/lookup?op=get&search=0x6C0B9F53 ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: European symbols?
On 12/31/2010 03:11 PM, Stephan Boettcher wrote: the effort to design populate and debug an eurocard full of 74xx is daunting too. It really is. The static electricity damage can drive you nuts. don't want to go back in time... Micros are so cheap and low power I'd only consider an FPGA system loaded by a cheap micro that is available in the product after development. JG ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
gEDA-user: TI-TINA Spice and gEDA
I have been having problems with LTSpice simulating some components from TI. I was thinking of looking at TINA-TI spice program. Has anyone tried going from gschem to TINA? Which back end are you using for this? Oliver ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: European symbols?
Den 2010-12-31 22:11:09 skrev Stephan Boettcher : "Johnny Rosenberg" writes: Den 2010-12-31 16:31:42 skrev Stephan Boettcher : "Johnny Rosenberg" writes: No. That's the wrong conclusion. Well, we'll see what will happen. I am still not 100% sure how to create symbols in the first place, so I guess things will move very slowly to begin with… Maybe your time is better invested by using a small FPGA for whatever you want to build, and learn Verilog to express the logic. Hm… searched the web a bit for Verilog and FPGA, so now I know a little (very little) about it, at least. Seems like I already have a Verilog compiler installed on my system (iverilog) and there are manpages for it. Not sure, however, how to connect the FPGA thing to my computer to program it (I'm on Ubuntu 10.10). What do I need to do that? Not that I intend to do it at the moment, just curious. For our DAQ systems we recently use an ARM7 chip LPC2148 as frontend to an Altera Cyclon 3 FPGA (144pins, 3C25). This is not the smallest project size I can think off. The boards are 106x70 mm². The ARM7 has a USB interface. The FPGA then drives a set of ADCs, filters the data, triggers, and formats the data through some FIFOs to the ARM7 and from there either via USB to the host or via SPI on a uSDcard. On power up, the ARM7 reads the FPGA configuration from a flash and feeds it to the FPGA (passive serial mode). Previusly, we had a Cyclon2 chip connected via a parallel port. You need four pins to program an Altera in passive serial mode (SCLK, DATA, nCONFIG, CONF_DONE). Or use JTAG. With the parallel port I considered writing a kernel driver, but we still toggle the bits from user space, three syscalls ber bit, but that adds up to only a few tens of seconds. And when all is debugged and supposed to work without a computer, there are little EEPROM chips that can feed the configuration into the FPGA. I did not do that for 10 years, so I don't know how easy it is to get those burned. So, it really depends how complex your circuit is, and how it's going to be used in the end. But the effort to design populate and debug an eurocard full of 74xx is daunting too. Depends how much fun can have from learning such stuff. A deadline does not seem to be your problem. Well, learning is always fun, but there is so much else I want to do that is closer to my main interest (as a musician and ”recording engineer”) See, it depends. How many 74xx parts will your circuit need? Oh, not many, I am not sure yet, but it's a small project. I just thought that it would be nice with those symbols for future projects, not only this one. so even if there is no deadline, I can't spend all my time on it anyway. Sure, else you'd not say "... will move very slowly to begin with…" And I have a wife… :D Oh yes, that is a drain on resources .. Happy new year! Happy new year you too! We have had a new year for about 42 minutes here… -- Kind regards Johnny Rosenberg ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: European symbols?
Den 2010-12-31 17:21:45 skrev JohnLM : I actually use "boxy" symbols quite a lot. Well more on paper or with software that has them anyway. Well since I (would) use them myself, I'd have no big problem making those. I'd go for whole set of lights and make few most used 74xx heavies. I have been doing a few from the 74 series tonight, those I think I might use some time… I made the following 12 symbols by just modifying the existing default symbols, giving them new names: 7400-IEC-1.sym 7401-IEC-1.sym 7402-IEC-1.sym 7404-IEC-1.sym 7405-IEC-1.sym 7408-IEC-1.sym 7409-IEC-1.sym 7414-IEC-1.sym 7432-IEC-1.sym 7486-IEC-1.sym 74132-IEC-1.sym 74266-IEC-1.sym I ignored all gates with more than 2 inputs (does anyone use them anyway?), and more complex things like 74160, since they look the same in IEC versions anyway, don't they? If anyone want to see them and look for things that are not quite right, I uploaded them here (temporarily): http://ubuntuone.com/p/W5T/ It's a compressed tarball called ”74-IEC.tar.bz2”, containing the 12 symbols. -- Kind regards Johnny Rosenberg ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Christmas wishlist
Stephan Boettcher wrote: kai-martin knaak writes: Bob Paddock wrote: This is a DRC issue. The rules should allow any net to connect to no-net copper. No need to restructure the way pcb handles connectivity. If different nets connect to the same no-net copper there is a short between nets. Of course, connectivity needs to be recalculated (automatically) after a net has been connected to a no-net. As a consequence, the no-net copper will have been converted to what ever net it was connected to. Maybe it is important to recognise, that DRC and LVS are completely orthogonal in PCB, and I think that is a good property, that should be kept. DRC (DesignRule Check) does not consider the netlist. This is obviousely wrong, if you layout a copper trace between two net-compatible pads/pins in one go vs. routing to a wrong pin. It checks the connectivity of all copper, and verifies the rules for connected and not-connected copper. The problem is, that all copper patches not connected to a know net are considered to be on different nets - that is a completely arbitrar design choice and in no way supperior to treating them as on the one "unknown" net. LVS (Layout vs Schematic) checks that the copper connections between pins matches the netlist, without checking for DRC rules. How do you do that, without testing individual line/arc elements for overlap - which is a DRC matter ? Distinguishing between net and no-net copper will break this separation. This should not be done lightly. As far as I can judge, there is no such separation - there's just datastructures, that don't support net-attributes for lines etc. ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: European symbols?
"Johnny Rosenberg" writes: > Den 2010-12-31 16:31:42 skrev Stephan Boettcher > : > >> "Johnny Rosenberg" writes: >> No. That's the wrong conclusion. >>> >>> Well, we'll see what will happen. I am still not 100% sure how to >>> create symbols in the first place, so I guess things will move very >>> slowly to begin with… >> >> Maybe your time is better invested by using a small FPGA for whatever >> you want to build, and learn Verilog to express the logic. > > Hm… searched the web a bit for Verilog and FPGA, so now I know a > little (very little) about it, at least. Seems like I already have a > Verilog compiler installed on my system (iverilog) and there are > manpages for it. Not sure, however, how to connect the FPGA thing to > my computer to program it (I'm on Ubuntu 10.10). What do I need to do > that? Not that I intend to do it at the moment, just curious. For our DAQ systems we recently use an ARM7 chip LPC2148 as frontend to an Altera Cyclon 3 FPGA (144pins, 3C25). This is not the smallest project size I can think off. The boards are 106x70 mm². The ARM7 has a USB interface. The FPGA then drives a set of ADCs, filters the data, triggers, and formats the data through some FIFOs to the ARM7 and from there either via USB to the host or via SPI on a uSDcard. On power up, the ARM7 reads the FPGA configuration from a flash and feeds it to the FPGA (passive serial mode). Previusly, we had a Cyclon2 chip connected via a parallel port. You need four pins to program an Altera in passive serial mode (SCLK, DATA, nCONFIG, CONF_DONE). Or use JTAG. With the parallel port I considered writing a kernel driver, but we still toggle the bits from user space, three syscalls ber bit, but that adds up to only a few tens of seconds. And when all is debugged and supposed to work without a computer, there are little EEPROM chips that can feed the configuration into the FPGA. I did not do that for 10 years, so I don't know how easy it is to get those burned. So, it really depends how complex your circuit is, and how it's going to be used in the end. But the effort to design populate and debug an eurocard full of 74xx is daunting too. >> Depends how much fun can have from learning such stuff. A deadline does >> not seem to be your problem. > > Well, learning is always fun, but there is so much else I want to do > that is closer to my main interest (as a musician and ”recording > engineer”) See, it depends. How many 74xx parts will your circuit need? > so even if there is no deadline, I can't spend all my time on it > anyway. Sure, else you'd not say "... will move very slowly to begin with…" > And I have a wife… :D Oh yes, that is a drain on resources .. Happy new year! -- Stephan ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
gEDA-user: PCB git HEAD speed
I compiled PCB git HEAD and it's bogging my computer down when I edit arcs. Should I go back to some previous tag or is there any switch to throw to change display of arcs cost? I compiled default, so I got GTK HID. If going back is the thing to do, what tag? John ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
gEDA-user: [Pcb PATCH SF ID: 3148827] First issue of the Dutch translation for pcb.
Hi devs and users, Subject says it all. Patches can be found here: http://sourceforge.net/tracker/?func=detail&aid=3148827&group_id=73743&atid= 538813 Or here: http://www.xs4all.nl/~ljh4timm/downloads/pcb-dutch/ Kind regards, Bert Timmerman. ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Resistor values.
Hi all, > -Original Message- > From: geda-user-boun...@moria.seul.org > [mailto:geda-user-boun...@moria.seul.org] On Behalf Of Peter Clifton > Sent: Friday, December 31, 2010 4:37 PM > To: gEDA user mailing list > Subject: Re: gEDA-user: Resistor values. > > On Wed, 2010-12-29 at 13:18 -0700, John Doty wrote: > > > Divorce gEDA from pcb. Create a schematic plugin for pcb, > since that > > seems to be what pcb users want. The flexibility of the > > gschem/gnetlist flow is unnecessary to hobbyists. The current > > developers are dangerously pcb-centric. > > ARE there any "current" gEDA developers? > Yes, I think there is lots of patches or patch series in SF to prove that. All these good people scratched their/our itches and shared the results with us. It's just that the average users do not delve into SF to see the names that could/should be mentioned. Think of evolution, not of revolution ... Many small steps may be even better than one big leap. Just my EUR 0.02 on the subject. Kind regards, Bert Timmerman. ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Resistor values…
John Doty writes: > And there's DJ, I don't consider myself a gEDA developer, just a PCB developer. I think the only significant gEDA work I've done is the PCB import netlister, and that's in PCB's source tree anyway. ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: gEDA Wikibook ?
On 12/31/2010 10:36 AM, kai-martin knaak wrote: The source of the geda/pcb manual is just a single document in mediawiki syntax. Oh sure, then that would be something to do with git. hadn't realized Karl was referring to that. John ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: European symbols?
Den 2010-12-31 16:31:42 skrev Stephan Boettcher : "Johnny Rosenberg" writes: No. That's the wrong conclusion. Well, we'll see what will happen. I am still not 100% sure how to create symbols in the first place, so I guess things will move very slowly to begin with… Maybe your time is better invested by using a small FPGA for whatever you want to build, and learn Verilog to express the logic. Hm… searched the web a bit for Verilog and FPGA, so now I know a little (very little) about it, at least. Seems like I already have a Verilog compiler installed on my system (iverilog) and there are manpages for it. Not sure, however, how to connect the FPGA thing to my computer to program it (I'm on Ubuntu 10.10). What do I need to do that? Not that I intend to do it at the moment, just curious. Depends how much fun can have from learning such stuff. A deadline does not seem to be your problem. Well, learning is always fun, but there is so much else I want to do that is closer to my main interest (as a musician and ”recording engineer”) so even if there is no deadline, I can't spend all my time on it anyway. And I have a wife… :D (It should be possible to draw a gschem schematic, export a verilog netlist and upload that to the FPGA too, for parts of the circuit you feel more comfortable, but then you'd need to do both, symbols and Verilog :-) -- Kind regards Johnny Rosenberg ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Resistor values…
On Dec 31, 2010, at 8:37 AM, Peter Clifton wrote: > On Wed, 2010-12-29 at 13:18 -0700, John Doty wrote: > >> Divorce gEDA from pcb. Create a schematic plugin for pcb, since that >> seems to be what pcb users want. The flexibility of the >> gschem/gnetlist flow is unnecessary to hobbyists. The current >> developers are dangerously pcb-centric. > > ARE there any "current" gEDA developers? > > That is slightly rhetorical, as I know Peter Brett is doing some > thankless, but HUGELY important work on refactoring the gschem drawing > code into a separate library. Yes, and I'm successfully running his branch here. This is indeed important. Go, Peter! > > This library will be important to the project as it opens the > possibilities for creating external previewers, thumbnailer's, library > managers, command line printing tools etc.. which don't require gschem > to render graphics. Some day I hope PCB can do this too. > > Peter has also done work on guile APIs recently. (I'll confess not to > have followed that particularly closely, but it was not in any way PCB > specific). You think it wasn't, but the habit of thought that considers pcb as the only back end worth considering has colored it. In particular, we've sparred over the nature of the API: Peter doesn't understand that there is *no* invariant semantic processing suitable for all flows. The midlayer should start at parsed, unprocessed schematics. And as a gnetlist back-end writer, Peter's Guile code scares me. He avoids pure functional programming wherever possible in the name of efficiency. This is dangerous, as it is difficult for the user to anticipate where his side effects might bite if they reuse his code. As somewhat who grinds very large projects through gnetlist, I would be the first to ask for efficiency to be given priority if it was a significant problem. It isn't. But Peter also has some very good notions about Guile code. I recently took some of his suggestions as input to a refactoring of my Osmond back end. The whole thing collapsed to just 18 LOC, and I think his suggestions also improved readability despite my initial skepticism. > > > Without offending anyone I hope, I think it would be fair to say there > is ONE "current" gEDA developer, and I think you would struggle to point > out anything detrimental Peter Brett has done to the project. Well, Peter, at least, thinks of you as a developer. And there's DJ, who is certainly influential, energetic, and brilliant, but has a dangerously narrow focus. Then there's Patrick Bernaud. Bas Gjeltes and I tried to contribute a patch for the attribute censorship bug, but Patrick grabbed it, unfactored my Guile code, found a problem that broke drc2, and then dropped it. Is Patrick a developer? At least, he's a gatekeeper. Maybe refactoring and fixing the drc2 bug will be my New Year's day project. Then we'll see if this problem can *ever* be solved. > > His dedicated work on thankless tasks have helped keep things alive at a > time when gEDA development has / had otherwise completely stagnated. That kind of argument will never move me. There is no value to fixing what isn't broken. There's nothing wrong with stagnation of code in itself (the stagnation of TeX is a sign of near perfection). Peter's narrowly focused on code, not broadly focused on application. That has its good points, but also its dangers. Coding purely for code's sake on a toolkit that's in successful production use is not generally a good idea. Peter's current work must stand on the importance of refactoring as a means for resolving the conflicts between the various ways we use (and want to use) gEDA, I think. And I expect it will be a good thing by this criterion, but that won't come automatically. > > (Yes, Peter B and I are friends, so I'm biased - but I think this all > bore saying.) I think we can all be friends. Disagreement does not imply malice. John Doty Noqsi Aerospace, Ltd. http://www.noqsi.com/ j...@noqsi.com ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: gEDA Wikibook ?
John Griessen wrote: >> can the mediawiki content be handled like any plain text file? > > That page, http://www.mediawiki.org/wiki/Manual:Importing_XML_dumps > suggests The data is SQL, You have to differentiate between the article/wikibook and the wiki as a whole. The content of a wikipedia article, wikibook, or whatever, is plain text -- text written in mediawiki syntax. The data base is needed to connect the articles with discussions and old versions. So, if you want to edit a wikibook locally, you'd just transfer a text file. If you want a local copy of the whole wiki, including discussions, versions and all, you'd have to clone the data base hosted at wikimedia.org. > so you need a database connected with a local install of mediawiki > to use it. If you created changes this way, Using mwdumper might > let you edit it offline, The source of the geda/pcb manual is just a single document in mediawiki syntax. I'd recommend to simply copy said source file from the server via the online. Edit locally and paste it back when done. If you really feel the need to see locally, how the changes render, you can paste the source to a local instance of mediawiki. ---<)kaimartin(>--- -- Kai-Martin Knaak Öffentlicher PGP-Schlüssel: http://pgp.mit.edu:11371/pks/lookup?op=get&search=0x6C0B9F53 ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: European symbols?
I actually use "boxy" symbols quite a lot. Well more on paper or with software that has them anyway. Well since I (would) use them myself, I'd have no big problem making those. I'd go for whole set of lights and make few most used 74xx heavies. On Fri, 31 Dec 2010 15:15:45 +0100 "Johnny Rosenberg" wrote: > Den 2010-12-31 15:03:13 skrev Stephan Boettcher > : > > > "Johnny Rosenberg" writes: > > > >> Well, I guess that I need to make my own symbols then, > > > > Yes. > > > > Will that be generic, light logic symbols, or 74xx series > > symbols? > > I don't know, maybe 74xx series, but I don't think I will just sit > down and try to make them all, just the most common ones that I need > and when I need them. I will probably also include some of the 40xxx > series ones, I guess, since the symbols themselves look the same > anyway. > > > > >> and that it's no point sharing them since I am the only one who use > >> them. > > > > No. That's the wrong conclusion. > > > > Well, we'll see what will happen. I am still not 100% sure how to > create symbols in the first place, so I guess things will move very > slowly to begin with… > > ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: European symbols?
Philipp Klaus Krause writes: > Am 31.12.2010 16:31, schrieb Stephan Boettcher: >> >> Maybe your time is better invested by using a small FPGA for whatever >> you want to build, and learn Verilog to express the logic. >> >> Depends how much fun can have from learning such stuff. A deadline does >> not seem to be your problem. >> >> (It should be possible to draw a gschem schematic, export a verilog >> netlist and upload that to the FPGA too, for parts of the circuit you >> feel more comfortable, but then you'd need to do both, symbols and >> Verilog :-) >> > > Well, sometimes you just need a few gates somewhere, e.g. one of my > boards contains just a 74LS21, a capacitor and an EPROM. Well, we were talking about some library of symbols, presumably to express some more complex logic. To review a logic circuit diagram, it helps if you have symbols that are easy to read. A circuit with a single gate of glue logic does not need this kind of review. If Johnny wants to design a circuit with 74xx/4xxx series parts, he needs a schematic that he can easily review himself, and symbols that he grew up with will certainly help. If somebody needs to design a circuit expressed via schematic entry and some PHB demands those IEEE symbols, or the reviwer audience wants it that way, then such a library will be usefull too. I'd still try to convince said PHB to accept Verilog instead, but that may also be a waste of time. > Using a FPGA or even a CPLD would be overkill. While I prefer the "US" > symbols even though I grew up in germany; I know people that prefer > other symbol styles, and if they were there for those that want to use > them. I grew up with the symbols in the rightmost column here (DIN40700): http://de.wikipedia.org/wiki/Logikgatter#Typen_von_Logikgattern_und_Symbolik from a German TV series by Jean Pütz (1974, at age 10). I still find the US ANSI 91-1984 column easier to parse than the IEC 60617-12 symbols. -- Stephan ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: European symbols?
Am 31.12.2010 16:31, schrieb Stephan Boettcher: > > Maybe your time is better invested by using a small FPGA for whatever > you want to build, and learn Verilog to express the logic. > > Depends how much fun can have from learning such stuff. A deadline does > not seem to be your problem. > > (It should be possible to draw a gschem schematic, export a verilog > netlist and upload that to the FPGA too, for parts of the circuit you > feel more comfortable, but then you'd need to do both, symbols and > Verilog :-) > Well, sometimes you just need a few gates somewhere, e.g. one of my boards contains just a 74LS21, a capacitor and an EPROM. Using a FPGA or even a CPLD would be overkill. While I prefer the "US" symbols even though I grew up in germany; I know people that prefer other symbol styles, and if they were there for those that want to use them. Philipp ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Resistor values…
On Wed, 2010-12-29 at 13:18 -0700, John Doty wrote: > Divorce gEDA from pcb. Create a schematic plugin for pcb, since that > seems to be what pcb users want. The flexibility of the > gschem/gnetlist flow is unnecessary to hobbyists. The current > developers are dangerously pcb-centric. ARE there any "current" gEDA developers? That is slightly rhetorical, as I know Peter Brett is doing some thankless, but HUGELY important work on refactoring the gschem drawing code into a separate library. This library will be important to the project as it opens the possibilities for creating external previewers, thumbnailer's, library managers, command line printing tools etc.. which don't require gschem to render graphics. Some day I hope PCB can do this too. Peter has also done work on guile APIs recently. (I'll confess not to have followed that particularly closely, but it was not in any way PCB specific). Without offending anyone I hope, I think it would be fair to say there is ONE "current" gEDA developer, and I think you would struggle to point out anything detrimental Peter Brett has done to the project. His dedicated work on thankless tasks have helped keep things alive at a time when gEDA development has / had otherwise completely stagnated. (Yes, Peter B and I are friends, so I'm biased - but I think this all bore saying.) -- Peter Clifton Electrical Engineering Division, Engineering Department, University of Cambridge, 9, JJ Thomson Avenue, Cambridge CB3 0FA Tel: +44 (0)7729 980173 - (No signal in the lab!) Tel: +44 (0)1223 748328 - (Shared lab phone, ask for me) ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: European symbols?
"Johnny Rosenberg" writes: >> No. That's the wrong conclusion. >> > > Well, we'll see what will happen. I am still not 100% sure how to > create symbols in the first place, so I guess things will move very > slowly to begin with… Maybe your time is better invested by using a small FPGA for whatever you want to build, and learn Verilog to express the logic. Depends how much fun can have from learning such stuff. A deadline does not seem to be your problem. (It should be possible to draw a gschem schematic, export a verilog netlist and upload that to the FPGA too, for parts of the circuit you feel more comfortable, but then you'd need to do both, symbols and Verilog :-) -- Stephan ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: European symbols?
On 12/31/2010 08:52 AM, Johnny Rosenberg wrote: I guess I could use whatever Why, certainly! ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: European symbols?
Den 2010-12-31 15:40:39 skrev John Griessen : On 12/31/2010 08:02 AM, Stephen Trier wrote: I was wondering whether there would be a demand for this style of logic symbol in gschem. Most logic designers now use verilog blocks for such logic and never even make a diagram with visual cues like IEEE symbols have. In the US or in the whole world? As I am not a logic designer, but rather a guitar player, I guess I could use whatever symbols I like, right…? ;P Since much low level logic is synthesized for chips or FPGAs these days, and there is often a way to probe signals anywhere, the meaning conveyed by control wires as in up, down, clr, is only made more obvious when using probes or verilog testbench code. Making function visually obvious seems to be skipped since just after IEEE symbols were proposed in the 70's. Except for TIs discrete logic parts. John -- Kind regards Johnny Rosenberg ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: European symbols?
On 12/31/2010 08:02 AM, Stephen Trier wrote: I was wondering whether there would be a demand for this style of logic symbol in gschem. Most logic designers now use verilog blocks for such logic and never even make a diagram with visual cues like IEEE symbols have. Since much low level logic is synthesized for chips or FPGAs these days, and there is often a way to probe signals anywhere, the meaning conveyed by control wires as in up, down, clr, is only made more obvious when using probes or verilog testbench code. Making function visually obvious seems to be skipped since just after IEEE symbols were proposed in the 70's. Except for TIs discrete logic parts. John -- Ecosensory Austin TX ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: gEDA Wikibook ?
On 12/31/2010 05:30 AM, Karl Hammar wrote: can the mediawiki content be handled like any plain text file? That page, http://www.mediawiki.org/wiki/Manual:Importing_XML_dumps suggests The data is SQL, so you need a database connected with a local install of mediawiki to use it. If you created changes this way, Using mwdumper might let you edit it offline, then "run rebuildall.php, which will take a long time, because it has to parse all pages. This is not recommended for large data sets." Just an interpretation, have not done any of this. These kind of wikis are mostly aimed at online editing. John ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: European symbols?
Den 2010-12-31 15:03:13 skrev Stephan Boettcher : "Johnny Rosenberg" writes: Well, I guess that I need to make my own symbols then, Yes. Will that be generic, light logic symbols, or 74xx series symbols? I don't know, maybe 74xx series, but I don't think I will just sit down and try to make them all, just the most common ones that I need and when I need them. I will probably also include some of the 40xxx series ones, I guess, since the symbols themselves look the same anyway. and that it's no point sharing them since I am the only one who use them. No. That's the wrong conclusion. Well, we'll see what will happen. I am still not 100% sure how to create symbols in the first place, so I guess things will move very slowly to begin with… -- Kind regards Johnny Rosenberg ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: European symbols?
"Johnny Rosenberg" writes: > Well, I guess that I need to make my own symbols then, Yes. Will that be generic, light logic symbols, or 74xx series symbols? > and that it's no point sharing them since I am the only one who use > them. No. That's the wrong conclusion. -- Stephan ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: European symbols?
2010/12/31 Stefan Salewski <[1]m...@ssalewski.de> But the main advantage of that shape may be, that complicated devices like [2]http://upload.wikimedia.org/wikipedia/commons/thumb/5/56/74LS192_ Symbol.png/220px-74LS192_Symbol.png as used in some (german) VHDL/FPGA textbooks are available. I have no idea where to get a list of all that complicated pictures. Hi, everyone. Oh, those! I recognize them now! Those are often called "IEEE standard" logic symbols in the US. The only place I've ever seen them used is Texas Instruments data sheets, though I can see their appeal. They are a rich language for expressing logic. TI has a nice app note explaining the symbology and history of the standard. Apparently the IEEE and IEC have nearly-entirely-compatible versions of the standard. The IEEE one is IEEE 91-1984. [3]http://focus.ti.com/lit/ml/sdyz001a/sdyz001a.pdf With the library discussion of the last few weeks, I was wondering whether there would be a demand for this style of logic symbol in gschem. Stephen References 1. mailto:m...@ssalewski.de 2. http://upload.wikimedia.org/wikipedia/commons/thumb/5/56/74LS192_Symbol.png/220px-74LS192_Symbol.png 3. http://focus.ti.com/lit/ml/sdyz001a/sdyz001a.pdf ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: [pcb/lesstif] allow zoom out and pan more than board size
On Fri, 2010-12-31 at 13:13 +0100, Markus Hitter wrote: > Am 31.12.2010 um 07:10 schrieb DJ Delorie: > > > here's a patch that lets you zoom out > > more than the pcb size! Also lets you pan the board anywhere, not > > just to the edge of the window (i.e. you can position the edge of the > > board in the middle of the window now). > > Great idea! If no one beats me to it, I'll code up a similar patch for the GTK HID next week. I've wanted this feature for a while now, but not got round to doing anything about it. (I need to do some work on the zoom / pan functions for the GTK HID anyway, as part of my refactoring coordinate trasforms prior to landing the PCB+GL branch). Best wishes, -- Peter Clifton Electrical Engineering Division, Engineering Department, University of Cambridge, 9, JJ Thomson Avenue, Cambridge CB3 0FA Tel: +44 (0)7729 980173 - (No signal in the lab!) Tel: +44 (0)1223 748328 - (Shared lab phone, ask for me) ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: European symbols?
On Fri, 2010-12-31 at 14:10 +0100, Johnny Rosenberg wrote: > > > >__ > > | | > > | |\ > > | & |-––– > > | | > > |__| > > > > > > I've seen those too, but they are not the same as those I learned at > school and have used all my life. > > Well, I guess that I need to make my own symbols then, and that it's no > point sharing them since I am the only one who use them. > Thanks for all the input. > The basic ones are of course mentioned at wikipedia: http://en.wikipedia.org/wiki/Logic_gate But the main advantage of that shape may be, that complicated devices like http://upload.wikimedia.org/wikipedia/commons/thumb/5/56/74LS192_Symbol.png/220px-74LS192_Symbol.png as used in some (german) VHDL/FPGA textbooks are available. I have no idea where to get a list of all that complicated pictures. ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: European symbols?
Den 2010-12-31 13:20:07 skrev Stephan Boettcher : "Johnny Rosenberg" writes: Den 2010-12-31 02:58:36 skrev Stephan Boettcher : kai-martin knaak writes: Johnny Rosenberg wrote: __ | | | & |o––– |__| Ah, those box shaped symbols. Well, I don't like them. So none of them in my lib... Those were invented by bureaucrats at a time when pen plotters had difficulties plotting circles. So I am the only one that use still them? maybe :-) And why did they use a small circle for the NOT function at the output if the plotters had difficulties plotting them? Now that you mention it, the symbol is suppsed to look like this: __ | | | |\ | & |-––– | | |__| I've seen those too, but they are not the same as those I learned at school and have used all my life. Well, I guess that I need to make my own symbols then, and that it's no point sharing them since I am the only one who use them. Thanks for all the input. -- Kind regards Johnny Rosenberg ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: gEDA Wikibook ?
Karl Hammar wrote: > In git there is gaf/docs/wiki/, Note, that this is dokuwiki http://dokuwiki.org This flavor of wiki software is more geared toward small scale documentation than mediawiki. (no dedicated data base, less user hierarchy, ...). Mediawiki is of course capable to drive the mega project wikipedia. So from a purely technical point of view dokuwiki fits the bill of geda/pcb better. However, the proposition to write a comprehensive manual as wikibook more about the social infrastructure and less about the format. > can the mediawiki content be handled like any plain text file? yes. ---<)kaimartin(>--- -- Kai-Martin Knaak Öffentlicher PGP-Schlüssel: http://pgp.mit.edu:11371/pks/lookup?op=get&search=0x6C0B9F53 ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Christmas wishlist
kai-martin knaak writes: > Bob Paddock wrote: > >>> This is a DRC issue. The rules should allow any net to connect >>> to no-net copper. No need to restructure the way pcb handles >>> connectivity. >> >> If different nets connect to the same no-net copper there is a short >> between nets. > > Of course, connectivity needs to be recalculated (automatically) > after a net has been connected to a no-net. As a consequence, the > no-net copper will have been converted to what ever net it was > connected to. Maybe it is important to recognise, that DRC and LVS are completely orthogonal in PCB, and I think that is a good property, that should be kept. DRC (DesignRule Check) does not consider the netlist. It checks the connectivity of all copper, and verifies the rules for connected and not-connected copper. LVS (Layout vs Schematic) checks that the copper connections between pins matches the netlist, without checking for DRC rules. Distinguishing between net and no-net copper will break this separation. This should not be done lightly. -- Stephan ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: European symbols?
"Johnny Rosenberg" writes: > Den 2010-12-31 02:58:36 skrev Stephan Boettcher > : > >> kai-martin knaak writes: >> >>> Johnny Rosenberg wrote: >>> __ | | | & |o––– |__| >>> >>> Ah, those box shaped symbols. >>> Well, I don't like them. So none of them in my lib... >> >> Those were invented by bureaucrats at a time when pen plotters had >> difficulties plotting circles. >> > > So I am the only one that use still them? maybe :-) > And why did they use a small circle for the NOT function at the output > if the plotters had difficulties plotting them? Now that you mention it, the symbol is suppsed to look like this: __ | | | |\ | & |-––– | | |__| -- Stephan ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: European symbols?
On Fri, 31 Dec 2010 13:05:41 +0100 "Johnny Rosenberg" wrote: > So I am the only one that use still them? > > And why did they use a small circle for the NOT function at the > output if the plotters had difficulties plotting them? > > They seems to be used pretty much in my country anyway. I used them > for eight years at a company a few years back. When I was working for The Big Red German Automotive Electronic supplier company back in 2008, they were using rectangular shapes for OPAs as well. Levente ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Christmas wishlist
Bob Paddock wrote: >> This is a DRC issue. The rules should allow any net to connect >> to no-net copper. No need to restructure the way pcb handles >> connectivity. > > If different nets connect to the same no-net copper there is a short > between nets. Of course, connectivity needs to be recalculated (automatically) after a net has been connected to a no-net. As a consequence, the no-net copper will have been converted to what ever net it was connected to. ---<)kaimartin(>--- -- Kai-Martin Knaak Öffentlicher PGP-Schlüssel: http://pgp.mit.edu:11371/pks/lookup?op=get&search=0x6C0B9F53 ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: [pcb/lesstif] allow zoom out and pan more than board size
Am 31.12.2010 um 07:10 schrieb DJ Delorie: here's a patch that lets you zoom out more than the pcb size! Also lets you pan the board anywhere, not just to the edge of the window (i.e. you can position the edge of the board in the middle of the window now). Great idea! ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: European symbols?
Den 2010-12-31 02:58:36 skrev Stephan Boettcher : kai-martin knaak writes: Johnny Rosenberg wrote: __ | | | & |o––– |__| Ah, those box shaped symbols. Well, I don't like them. So none of them in my lib... Those were invented by bureaucrats at a time when pen plotters had difficulties plotting circles. So I am the only one that use still them? And why did they use a small circle for the NOT function at the output if the plotters had difficulties plotting them? They seems to be used pretty much in my country anyway. I used them for eight years at a company a few years back. -- Kind regards Johnny Rosenberg ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: European symbols?
Den 2010-12-31 01:06:11 skrev kai-martin knaak : Johnny Rosenberg wrote: I looked at the gEDA symbols site, but it was very hard to find anything useful in this matter, since there was no ”preview” thing involved as far as I can see. You may point your browser to http://gedasymbols.org Yes, that's what I meant by ”the gEDA symbols site”. On that page you can read ”you could browse the official libraries listed below”. However, I can't see any ”official libraries” below. The only thing that relates to symbols are the names to the right, and when clicking one of them I need to click each symbol to preview it, they are not all just there. It would be nice if the symbols were sorted by type or something, rather than by names of the people who made them. Anyway, I clicked a few of the contributors but I guess I will need to click them all, since what I'm looking for always appears at the very last instance, no matter what I do… Maybe Murphy is involved somehow with his laws and stuff. This is a website dedicated to symbols, footprints and other geda related stuff contributed by users. It presents previews of symbols and footprints on mouse click. It's great that people contribute like this, it really is. I just wish there was an easier way to find a specific symbol. Right now it feels more like it's easier to make new symbols instead of finding them. Is there a complete set of symbols like the default one, but with IEC symbols instead or do I need to make them all by myself? I tend to draw my symbols the way they were taught in German university courses. So they are likely IEC compliant, but no guarantee. I can't be the only European user of this program, can I…? Surely, you are not! :-) ---<)kaimartin(>--- -- Kind regards Johnny Rosenberg ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: gEDA Wikibook ?
Kai-Martin: > Karl Hammar wrote: > >> Contribution is allowed to literally everyone. Click on the > >> edit button and go ahead. ... > > You have to be online for that. > Install mediawiki from your preferred distro and you can edit and > render your contribution locally without. In addition, mediawiki > allows external text editors. Ok, found it and [1]. It seem to want apache2 and mysql. I don't want to go into that infrastructure for the time beeing, but texinfo also draws with it a big chunk of infrastructure. -- I accept that this is a preference choise, except that texinfo et al. don't need any root-priv. to start/ stop above servers. How do you do the equivalent of git push and pull with mediawiki. I've found [2], is that as robust and well established as git? Or have I got it all wrong? In git there is gaf/docs/wiki/, can the mediawiki content be handled like any plain text file? Mit freudlichen Grüßen /Karl Hammar [1] http://www.mediawiki.org/wiki/MediaWiki [2] http://www.mediawiki.org/wiki/Manual:Importing_XML_dumps - Aspö Data Lilla Aspö 148 S-742 94 Östhammar Schweden +46 173 140 57 ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Christmas wishlist
> This is a DRC issue. The rules should allow any net to connect > to no-net copper. No need to restructure the way pcb handles > connectivity. If different nets connect to the same no-net copper there is a short between nets. Consider a large item like you might solder a RFI shield to, that covers the perimeter of a large board. It would be easy to not notice different nets connected at different times, at opposite ends of the board. So I'd constrain your idea to a single net. Even then it would be better to have a warning that could be turned off per net. Maybe that connection was not intentional? ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
