gEDA-user: Split ground planes and zero ohm jumpers

2011-04-05 Thread Russell Dill
The common way to track common ground planes seems to be to place a
jumper between the planes so that the netlist can be sane. This
requires a component to be placed on one of the outer layers of the
board, which is a bit of an annoyance. Is there any other way of doing
this? Maybe some kind of hacked component on an inner layer?


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Re: gEDA-user: Split ground planes and zero ohm jumpers

2011-04-05 Thread Kovacs Levente
On Mon, 4 Apr 2011 23:30:21 -0700
Russell Dill ru...@asu.edu wrote:

 The common way to track common ground planes seems to be to place a
 jumper between the planes so that the netlist can be sane. This
 requires a component to be placed on one of the outer layers of the
 board, which is a bit of an annoyance. Is there any other way of doing
 this? Maybe some kind of hacked component on an inner layer?

What I do is I place a 0Ohm resistor, and when the layout is ready, I short it
with a line. This will give DRC error, but I ignore it.

Levente

-- 
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Voice: +36705071002




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gEDA-user: Bug in gnetlist?

2011-04-05 Thread Abhijit Kshirsagar
   Hi
   I have multi-page schematics with a number of off-page connectors
   (realised using the symbols input-1.sym and input-2.sym) as described
   in the howto:
   [1]http://www.geda.seul.org/wiki/geda:na_howto#what_is_the_net_attribut
   e_used_for
   I noticed that if multiple net attributes happen to be present on the
   same net in the schematic, then the netlist seems to treat them as
   completely different nets and /ignores/ any interconnections.
   I have posted my files here:
   [2]http://www.cedt.iisc.ernet.in/people/students/kabhijit/files/gEDA/
   There are two pages of schematics. I have defined two 'net' attributes
   - one is MVDD and the other is NVDD. In addition these two are shorted.
   Therefore _all_ the pins in the schematic are connected to a single
   net. But the netlist has a listing as if there is no connection between
   MVDD and NVDD.
   I expected gnetlist to replace MVDD by NVDD, or at least flag a warning
   that there is something unexpected.
   Am I missing something here?
   Thanks in advance,
   Regards,
   Abhijit Kshirsagar
   PhD Student,
   Power Electronics Group,
   CEDT, Indian Institute of Science,
   Bangalore

References

   1. 
http://www.geda.seul.org/wiki/geda:na_howto#what_is_the_net_attribute_used_for
   2. http://www.cedt.iisc.ernet.in/people/students/kabhijit/files/gEDA/


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Re: gEDA-user: Bug in gnetlist?

2011-04-05 Thread Krzysztof Kościuszkiewicz
2011/4/5 Abhijit Kshirsagar abhijit...@gmail.com:

   I have multi-page schematics with a number of off-page connectors
   (realised using the symbols input-1.sym and input-2.sym) as described
   in the howto:
   [1]http://www.geda.seul.org/wiki/geda:na_howto#what_is_the_net_attribut
   e_used_for
   I noticed that if multiple net attributes happen to be present on the
   same net in the schematic, then the netlist seems to treat them as
   completely different nets and /ignores/ any interconnections.

I suspect your case is covered by one of the bugs below:
https://bugs.launchpad.net/geda/+bug/698395
https://bugs.launchpad.net/geda/+bug/698524
https://bugs.launchpad.net/geda/+bug/698570

Two of them were recently fixed in the git HEAD, so you can try to use
development version of gnetlist to check.
The remaining bug is harder to fix.
-- 
Krzysztof Kościuszkiewicz
Simplicity is the ultimate sophistication -- Leonardo da Vinci


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Re: gEDA-user: New mass attribute tool: gattrib_csv

2011-04-05 Thread Joshua
 On Fri, Apr 1, 2011 at 2:19 PM, Joshua 
  Joshua at laserlinc.com wrote:
  Hey guys.  I wrote a tool which exports and imports 
  the properties from a
  project to and to a csv file. 
  http://public.laserlinc.com/Joshua/gattrib_csv.java
 
  The following command compiles it to exe.
 
  gcj --main=gattrib_csv -o gattrib_csv gattrib_csv.java
 
 You may find that there is some effort duplication going on:
 
 http://www.gedasymbols.org/user/dj_delorie/
 
 # sch2csv - extract part attributes to a comma separated 
 list (open with openoffice calc)
 # csv2sch - merge part attributes to schematics. To use these:
 
Well then.  I hadn't seen sch2csv and csv2sch.  Effort 
duplication granted. However without being able to run
sch2csv due to missing Text/CSV_XS.pm, it would seem 
that sch2csv isn't able to accept a filter as to which 
attributes are exported and in which order. Thus so 
gattrib_csv does still make a contribution.  gattrib_csv 
also correctly handles slotted components by including 
the position of the component in its reference when the 
refdes is not specific enough.



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Re: gEDA-user: US Distributor for Balloon Board

2011-04-05 Thread rickman

On 3/26/2011 8:50 PM, Patrick Doyle wrote:

Hi Folks,
I'm looking for a US distributor for a Balloon Board
(http://www.balloonboard.org/) or it's equivalent -- perhaps one of
you may have designed and sell your own equivalent.  Basically, I'm
looking for a standalone board with a processor (with it's associated
flash  SDRAM) and an FPGA.  I'm not terribly picky about the FPGA --
any reasonable Xilinx or Altera device should suffice.

Does anybody on this list have any recommendations?

I would prefer to buy from a gEDA supporter, and it will be
logistically easier if I can purchase from someplace in the US.

Thanks for any pointers.

--wpd


Patrick,

I don't see where you responded to any of the replies to your post.  Did 
you find something that met your needs?


I am considering laying out a design that would include a Freescale 
Kinetis device and an FPGA.  I am in the US and this would be an open 
source design using open source tools.


I haven't picked the details yet, but I have a preference for the 
Silicon Blue FPGAs.  They only make small versions, but they are very, 
very low power which is my goal.


I had not been planning to include external RAM, but the K60 has a DDR 
interface and can be included easily.  I assume that if you need that 
much RAM it means you intend to run Linux on it.  Is that right?  I 
don't know if Linux is ported to the K60, but I expect it would not be 
at all difficult to do since the K60 is an ARM CM4 (CM3 + DSP and SIMD 
instructions).


Does this sound interesting to you?

I also have an interest in testing the Green Arrays GA144 
multiprocessor.  This device has 144 processors running at 666 MIPS each 
consuming less than a Watt with all running full bore.  They are async 
processors and stop on a dime when waiting for input dropping power 
consumption to virtually nothing (100 nW per processor) able to resume 
processing at full speed in a fraction of a ns.   They just need to 
identify a killer app and these devices will take off.  The one aspect 
that may turn off a lot of potential users is the tiny on-chip memory, 
only 64 words in each processor.  But external memory can be connected 
of course.  This chip is not programmed in C, so you can do a lot more 
with very little memory.  I think of it more like an FPGA than an MCU.  
A Field Programmable Processor Array, FPPA.


Rick


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Re: gEDA-user: US Distributor for Balloon Board

2011-04-05 Thread Patrick Doyle
Hi Rick,
I'm still collecting information.  So far, the Balloon board sounds
the most like what I need: a currently shipping and supported
processor + FPGA board.  But the currently shipping part is
negotiable, as it will be at least a month or two before I can do
anything at all with the board (other than gather information about
it).  A collaborative design effort would be fun, but again, it will
be at least a month or two before I will have even the hint of a
possibility of collaboratively designing anything :-)

In other words... I'm still thinking.  Thanks for giving me more to
chew on.  The GA144 sounds quite interesting for a very specific
application that may be coming down the pike pretty soon, but I don't
have any good killer app ideas for it.

--wpd


On Tue, Apr 5, 2011 at 9:47 AM, rickman gnuarm.g...@arius.com wrote:
 On 3/26/2011 8:50 PM, Patrick Doyle wrote:

 Hi Folks,
 I'm looking for a US distributor for a Balloon Board
 (http://www.balloonboard.org/) or it's equivalent -- perhaps one of
 you may have designed and sell your own equivalent.  Basically, I'm
 looking for a standalone board with a processor (with it's associated
 flash  SDRAM) and an FPGA.  I'm not terribly picky about the FPGA --
 any reasonable Xilinx or Altera device should suffice.

 Does anybody on this list have any recommendations?

 I would prefer to buy from a gEDA supporter, and it will be
 logistically easier if I can purchase from someplace in the US.

 Thanks for any pointers.

 --wpd

 Patrick,

 I don't see where you responded to any of the replies to your post.  Did you
 find something that met your needs?

 I am considering laying out a design that would include a Freescale Kinetis
 device and an FPGA.  I am in the US and this would be an open source design
 using open source tools.

 I haven't picked the details yet, but I have a preference for the Silicon
 Blue FPGAs.  They only make small versions, but they are very, very low
 power which is my goal.

 I had not been planning to include external RAM, but the K60 has a DDR
 interface and can be included easily.  I assume that if you need that much
 RAM it means you intend to run Linux on it.  Is that right?  I don't know if
 Linux is ported to the K60, but I expect it would not be at all difficult to
 do since the K60 is an ARM CM4 (CM3 + DSP and SIMD instructions).

 Does this sound interesting to you?

 I also have an interest in testing the Green Arrays GA144 multiprocessor.
  This device has 144 processors running at 666 MIPS each consuming less than
 a Watt with all running full bore.  They are async processors and stop on a
 dime when waiting for input dropping power consumption to virtually nothing
 (100 nW per processor) able to resume processing at full speed in a fraction
 of a ns.   They just need to identify a killer app and these devices will
 take off.  The one aspect that may turn off a lot of potential users is the
 tiny on-chip memory, only 64 words in each processor.  But external memory
 can be connected of course.  This chip is not programmed in C, so you can do
 a lot more with very little memory.  I think of it more like an FPGA than an
 MCU.  A Field Programmable Processor Array, FPPA.

 Rick


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Re: gEDA-user: US Distributor for Balloon Board

2011-04-05 Thread Dave McGuire

On 4/5/11 9:47 AM, rickman wrote:

I also have an interest in testing the Green Arrays GA144
multiprocessor. This device has 144 processors running at 666 MIPS each
consuming less than a Watt with all running full bore. They are async
processors and stop on a dime when waiting for input dropping power
consumption to virtually nothing (100 nW per processor) able to resume
processing at full speed in a fraction of a ns. They just need to
identify a killer app and these devices will take off.


  Oh wow, I hadn't heard of the GA144.  It's another Chuck Moore 
special, and it looks REALLY spectacular.  I must get my hands on one of 
these.  Have you managed to get samples?



The one aspect
that may turn off a lot of potential users is the tiny on-chip memory,
only 64 words in each processor. But external memory can be connected of
course. This chip is not programmed in C, so you can do a lot more with
very little memory. I think of it more like an FPGA than an MCU. A Field
Programmable Processor Array, FPPA.


  Well, that just requires an adjustment to peoples' way of thinking. 
Far too many people who call themselves embedded systems designers 
these days think an embedded system is a big SBC running some variant 
of Windows with bloated C++ code eating dozens of megabytes of memory. 
Truly high-tech stuff like the GA144 simply isn't targeted at that part 
of the world.


 -Dave

--
Dave McGuire
Port Charlotte, FL


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Re: gEDA-user: Bug in gnetlist?

2011-04-05 Thread Abhijit Kshirsagar
Thanks very much!

The first two are almost exactly what I had posted, so thats resolved.
In the case of the third,
(https://bugs.launchpad.net/geda/+bug/698570), I was curious to see
what gnetlist was doing, so I ran it on the schematics with the
options -g geda (Netlist format = geda) and -v (verbose mode).

In the resulting file, i see the lines:

START renamed-nets
DVDD_FPGA - Vcco2
END renamed-nets

Which definitely means that gnetlist understands and interprets
correctly the fact that the two nets are shorted and drops one name.
Just that this doesn't seem to be happening correctly for multiple
renamings.

~Abhijit




2011/4/5 Krzysztof Kościuszkiewicz k.kosciuszkiew...@gmail.com

 2011/4/5 Abhijit Kshirsagar abhijit...@gmail.com:

    I have multi-page schematics with a number of off-page connectors
    (realised using the symbols input-1.sym and input-2.sym) as described
    in the howto:
    [1]http://www.geda.seul.org/wiki/geda:na_howto#what_is_the_net_attribut
    e_used_for
    I noticed that if multiple net attributes happen to be present on the
    same net in the schematic, then the netlist seems to treat them as
    completely different nets and /ignores/ any interconnections.

 I suspect your case is covered by one of the bugs below:
 https://bugs.launchpad.net/geda/+bug/698395
 https://bugs.launchpad.net/geda/+bug/698524
 https://bugs.launchpad.net/geda/+bug/698570

 Two of them were recently fixed in the git HEAD, so you can try to use
 development version of gnetlist to check.
 The remaining bug is harder to fix.
 --
 Krzysztof Kościuszkiewicz
 Simplicity is the ultimate sophistication -- Leonardo da Vinci


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gEDA-user: PCB Netlist syntax

2011-04-05 Thread Abhijit Kshirsagar
What is the syntax for allotting a routing style to a net?

I saw the syntax here:
http://pcb.gpleda.org/pcb-cvs/pcb.html#Netlist-File and
http://archives.seul.org/geda/dev/May-2008/msg00120.html

I created the netlist using gschem2pcb and then edited it using a text
editor, adding the word power just after the net GND in the netlist.
The PCB log window reported no errors when I hit 'O' to optimise the
rats nest, but the autorouter ignored the route style.

If, instead, I use -power I get:
WARNING! Pin number ending with 'R' encountered in netlist file
Probably a bad netlist file format
Can't find  pin POWER called for in netlist.

Is there a caps/no-caps requirement? Or Tab separation?

P.S. Double checked that the correct netlist is getting loaded, and I
Do have a route style called 'Power' with fatter trace widths.

Thanks,

~Abhijit


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Re: gEDA-user: PCB Netlist syntax

2011-04-05 Thread DJ Delorie

The syntax allows a net style there, but nothing in gschem produces it
so nothing in pcb uses it.


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Re: gEDA-user: PCB Netlist syntax

2011-04-05 Thread Abhijit Kshirsagar
I managed to edit the netlist file manually (in gedit) and added the
word 'Power'. Seems it is case sensitive _and_ tab sensitive. To
summarize, the syntax of the style allocation should be:

netname SPACE style_name TAB pin pin pin

where stylename is Case sensitive. e.g. Power worked; power did not...

Yes it would be good if gnetlist could read some attribute like
routestyle or something... But adding it manually isn't such a hard
job at least for small boards...

Thanks again!

~Abhijit





On Tue, Apr 5, 2011 at 22:39, DJ Delorie d...@delorie.com wrote:

 The syntax allows a net style there, but nothing in gschem produces it
 so nothing in pcb uses it.


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Re: gEDA-user: PCB Netlist syntax

2011-04-05 Thread Bob Paddock
 I created the netlist using gschem2pcb and then edited it using a text
 editor,

Did the text editor change the end of line format?  I've seen that
error when editing the netlist with Windows Text Editors,
or text editors that adapt.  If you use EMACS on Windows make sure it
is a unix format file and not a DOS style file.

 If, instead, I use -power I get:
 WARNING! Pin number ending with 'R' encountered in netlist file
 Probably a bad netlist file format
 Can't find  pin POWER called for in netlist.


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Re: gEDA-user: PCB Netlist syntax

2011-04-05 Thread Abhijit Kshirsagar
I used gedit. I'm working in Ubuntu.

~Abhijit





On Tue, Apr 5, 2011 at 22:48, Bob Paddock graceindustr...@gmail.com wrote:
 I created the netlist using gschem2pcb and then edited it using a text
 editor,

 Did the text editor change the end of line format?  I've seen that
 error when editing the netlist with Windows Text Editors,
 or text editors that adapt.  If you use EMACS on Windows make sure it
 is a unix format file and not a DOS style file.

 If, instead, I use -power I get:
 WARNING! Pin number ending with 'R' encountered in netlist file
 Probably a bad netlist file format
 Can't find  pin POWER called for in netlist.


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Re: gEDA-user: Split ground planes and zero ohm jumpers

2011-04-05 Thread Russell Dill
On Tue, Apr 5, 2011 at 1:53 AM, Kovacs Levente leventel...@gmail.com wrote:
 On Mon, 4 Apr 2011 23:30:21 -0700
 Russell Dill ru...@asu.edu wrote:

 The common way to track common ground planes seems to be to place a
 jumper between the planes so that the netlist can be sane. This
 requires a component to be placed on one of the outer layers of the
 board, which is a bit of an annoyance. Is there any other way of doing
 this? Maybe some kind of hacked component on an inner layer?

 What I do is I place a 0Ohm resistor, and when the layout is ready, I short it
 with a line. This will give DRC error, but I ignore it.

Perhaps I'll go with a solder blob jumper. A drawbridge component in
PCB that is just a special type of trace would be really nice.


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Re: gEDA-user: Split ground planes and zero ohm jumpers

2011-04-05 Thread Levente Kovacs
On Tue, 5 Apr 2011 13:11:25 -0700
Russell Dill ru...@asu.edu wrote:

 Perhaps I'll go with a solder blob jumper. A drawbridge component in
 PCB that is just a special type of trace would be really nice.

Yeah. I miss the concept of the star point.

-- 
Levente Kovacs
http://levente.logonex.eu




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Re: gEDA-user: Split ground planes and zero ohm jumpers

2011-04-05 Thread Markus Traidl
 The common way to track common ground planes seems to be to place a
 jumper between the planes so that the netlist can be sane. This
 requires a component to be placed on one of the outer layers of the
 board, which is a bit of an annoyance. Is there any other way of doing
 this? Maybe some kind of hacked component on an inner layer?

 What I do is I place a 0Ohm resistor, and when the layout is ready, I
short it
 with a line. This will give DRC error, but I ignore it.

The library department at my company defined a special component for that
purpose. We have a 2, 3 or 4 Star Symbol for that. To that symbol a special
footprint will be attached where the pins are connected.
The component is a smd device and I can place it in the layout at the top or
bottom side.





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Re: gEDA-user: zview/ngscope

2011-04-05 Thread Kai-Martin Knaak
Andrzej wrote:

 and
 that I don't consider ngscope yet another waveform viewer.

I didn't want to discourage anybody from anything. It was just the 
feeling that the bottle neck with simulation in the context of geda
is somewhere else. Specifically, the suite misses a way for fast 
turnaround of schematic modification, simulation and display. 
The second and perhaps even more important bottle neck are of 
course the models, or rather the lack of them. 

---)kaimartin(---
-- 
Kai-Martin Knaak
Email: k...@familieknaak.de
Öffentlicher PGP-Schlüssel:
http://pool.sks-keyservers.net:11371/pks/lookup?search=0x6C0B9F53



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Re: gEDA-user: zview/ngscope

2011-04-05 Thread yamazakir2
I just want to throw my opinion out there. I have been using geda
(gschem and pcb) for years and I have yet to find a satisfactory
waveform viewer, simulation gui, and netlister.

Kudos to someone who wants try to make a legitimate waveform viewer,
the open source EDA community needs one. I for one use gnuplot but
would like something much more interactive than that in the future.

On Tue, Apr 5, 2011 at 3:57 PM, Kai-Martin Knaak k...@lilalaser.de wrote:
 Andrzej wrote:

 and
 that I don't consider ngscope yet another waveform viewer.

 I didn't want to discourage anybody from anything. It was just the
 feeling that the bottle neck with simulation in the context of geda
 is somewhere else. Specifically, the suite misses a way for fast
 turnaround of schematic modification, simulation and display.
 The second and perhaps even more important bottle neck are of
 course the models, or rather the lack of them.

 ---)kaimartin(---
 --
 Kai-Martin Knaak
 Email: k...@familieknaak.de
 Öffentlicher PGP-Schlüssel:
 http://pool.sks-keyservers.net:11371/pks/lookup?search=0x6C0B9F53



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Re: gEDA-user: New mass attribute tool: gattrib_csv

2011-04-05 Thread Kai-Martin Knaak
Joshua wrote:

 gattrib_csv 
 also correctly handles slotted components by including 
 the position of the component in its reference when the 
 refdes is not specific enough.

Wouldn't it be desirable to somehow treat slotted and split symbols
as one entity? E.g. there should be just one footprint attribute for
all of them.

---)kaimartin(---
-- 
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Email: k...@familieknaak.de
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Re: gEDA-user: New mass attribute tool: gattrib_csv

2011-04-05 Thread DJ Delorie

  gattrib_csv also correctly handles slotted components by including
  the position of the component in its reference when the refdes is
  not specific enough.
 
 Wouldn't it be desirable to somehow treat slotted and split symbols
 as one entity? E.g. there should be just one footprint attribute for
 all of them.

For the record, my tool *also* uses the X,Y,file location information
to uniquely define a symbol, but that's so that you can *change* the
refdes too, or slot, or whatever.

The only problems I've encountered with footprints on split/slotted
symbols is, if you are missing a footprint= on one of them, it's
unspecified whether you end up with a footprint *at all* or not.


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gEDA-user: Small change to get pcb to build on my FreeBSD machine

2011-04-05 Thread Ed Maste

On my FreeBSD laptop I've got tk-8.5.8_1 installed, and it provides
wish8.5.  I made the following change to configure.ac to get it to work:

diff --git a/configure.ac b/configure.ac
index 87814cd..ab6986f 100644
--- a/configure.ac
+++ b/configure.ac
@@ -534,7 +534,7 @@ else
 fi


-AC_PATH_PROGS(WISH, wish wish83 wish8.3 wish80 wish8.0 cygwish83 
cygwish80,[none])
+AC_PATH_PROGS(WISH, wish wish85 wish8.5 wish83 wish8.3 wish80 wish8.0 
cygwish83 cygwish80,[none])
 if test X$WISH = Xnone ; then
AC_MSG_ERROR([Did not find the wish executible.  You need to make sure
that tcl is installed on your system and that wish is in your path])


-Ed


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Re: gEDA-user: Small change to get pcb to build on my FreeBSD machine

2011-04-05 Thread DJ Delorie

Thanks, pushed.


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