Re: gEDA-user: Problem With SOT23-5? Invisible Guardband Around Landpattern; Arcs in Silkscreen
The problem in the SOT23-5 may be the dash in the filename. Try changing to a name like SOT23_5. (* jcl *) -- http://www.wiblocks.com ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: please recommend me a good water soluable flux
Kester 2331-ZX Aggressive flux so make sure you clean thoroughly. (* jcl *) -- http://www.wiblocks.com ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: TDSON-8 footprint
Not sure the pitch you require but I have a couple of SON's at http://www.luciani.org/geda/pcb/pcb-footprint-list.html (* jcl *) ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Board cleaner recommendations
On Wed, Feb 23, 2011 at 2:38 PM, yamazakir2 yamazak...@gmail.com wrote: After you get done soldering and fluxing up your board to solder a lot of SMT components, what do you guys use to get it looking flux-free and clean again? I tried MG Chemical flux remove and while it does remove the flux, after washing it (with tap water) and drying it, it leaves a nasty well-ish film on the board that make it actually look worse. Water soluble flux, hot running water and an acid brush with the bristles cut short. (* jcl *) ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: OT: High Temperature Connector
Thanks to everyone for the suggestions. The Phoenix style are a bit too tall. The Omnetics are too expensive but the Omnetics site did mention the materials that the 125degC and 200degC rated were made of so I was able to find parts at Tyco and Molex with the high temp materials. I had originally specified the Zierick 1245 IDC. Mfg is requesting a tool-less option at final assembly so we started to look at different options. The majority of the low cost connectors have 85degC or 105degC operating ratings. The AVX looks similar to the Zierick (as far as function and installation). The Zierick is probably less expensive. I will search the AVX site for other options. I did not see operating temperature ranges for the Zierick so I have a call into the Zierick salesman. Thanks again for the suggestions. (* jcl *) ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: OT: High Temperature Connector
On Sat, Feb 12, 2011 at 4:26 PM, Steven Michalske smichal...@gmail.com wrote: Or 1/4 inch quick disconnects. What about just soldering the wires? This is for volume production of MCPCB. Connectors are preferred. Are 1/4 inch quick disconnects the same as faston tabs? The vertical tabs are too tall. Not sure about machine placeable R/A SMD tabs. (* jcl *) ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: OT: High Temperature Connector
On Sat, Feb 12, 2011 at 7:00 PM, John Griessen j...@ecosensory.com wrote: PS the Zierick IDC connectors are all copper, and reflowable, so they can do 150 deg C forever. Copper doesn't have any annealing properties that change any lower than 400 deg F I am sure. Tin is also good at 400 deg F. That's 204 deg C... I don't expect the Zierick's to be a problem. I would like them to have a published spec that states this in case I need it for UL. I may have just missed it on the site. (* jcl *) ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
gEDA-user: OT: High Temperature Connector
I am looking for a low profile wire to board connector - either two contacts 5A per contact or four contacts 2.5A per contact. I need a temperature rating of at least 110degC (preferable 120degC). UL recognized is required. Being able to remove the wires would be nice but is not a requirement. We have been able to find 105degC rated connectors but nothing higher yet. Thanks. (* jcl *) ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: anyway to make rectangular holes such as these?
On Mon, Jan 31, 2011 at 1:29 AM, yamazakir2 yamazak...@gmail.com wrote: http://products.cui.com/getPDF.aspx?fileID=4458 I use large round holes -- http://wiblocks.luciani.org/PICO/PICO1TR-index.html IIRC the footprint is in the gEDA section at luciani.org (* jcl *) ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Beginner question about the default title block
On Wed, Dec 22, 2010 at 2:55 PM, kai-martin knaak k...@familieknaak.de wrote: Johnny Rosenberg wrote: things like ”DRAWN BY”, ”TITLE”, ”REVISION” and so on. Am I supposed to fill that in by using the Text tool or is there a more proper way to do it? Yes, this is the proper way with the default title block. I too think, this is a bit tedious. So I designed my own title with regular attributes for name, date, etc. That is what I did too. The one I use for A-size is below. (* jcl *) v 20031231 1 T 14400 1500 5 10 0 0 0 0 1 graphical=1 B 0 0 11000 8500 15 0 0 0 -1 -1 0 -1 -1 -1 -1 -1 B 3400 0 7600 600 15 0 0 0 -1 -1 0 -1 -1 -1 -1 -1 L 3400 300 11000 300 15 0 0 0 -1 -1 L 5100 300 5100 0 15 0 0 0 -1 -1 L 6900 300 6900 0 15 0 0 0 -1 -1 T 3500 400 15 8 1 0 0 0 1 TITLE T 4100 400 8 8 1 1 0 0 1 title=? T 3500 100 15 8 1 0 0 0 1 REVISION T 4400 100 8 8 1 1 0 0 1 revision=0 T 5200 100 15 8 1 0 0 0 1 PAGE T 6000 100 8 8 1 1 0 6 1 page=? T 6100 100 15 8 1 0 0 0 1 OF T 6400 100 8 8 1 1 0 0 1 number_of_pages=? T 7000 100 15 8 1 0 0 0 1 DRAWN BY T 8000 100 8 8 1 1 0 0 1 drawn_by=JCL ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: 2mm 2 x 4 surface mount header
On Wed, Dec 15, 2010 at 10:42 PM, George M. Gallant, Jr. ggallant...@verizon.net wrote: I am looking for the footprint for a 2 x 4 2mm surface mount header. I have some for one of the Molex series at http://www.luciani.org/geda/pcb/pcb-footprint-list.html (* jcl *) ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Clearance in fiducials blocking solder paste
Arcs aren't allowed in footprints. You can overlay rectangular pads along an arc if you need to. The footprint I use for fiducials is below. The request from the assembly house was 1mm pad with 3mm clearance. The board that assembled my last board did not mention any problems (and the board worked ;) (* jcl *) Element[0x0 FIDUCIAL 0 0 0 0 0 100 0x0] ( Pad[0 0 0 0 3937 7874 11811 1 0x0800] Pad[0 0 0 0 3937 7874 11811 1 0x0880] ) ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
gEDA-user: At least gnetlist 20030901 is required for m4-xxx options.
When I run the command gsch2pcb --use-files --elements-dir /local/lan/pcb/packages --skip-m4 ELE2_r0.sch I get the error message At least gnetlist 20030901 is required for m4-xxx options. I am on Ubuntu (Mavrick Merrkat) and used apt-get to install the tools. Using the --verbose option produces the output below. Any ideas? Thanks (* jcl *) $ gsch2pcb --use-files --elements-dir /local/lan/pcb/packages --skip-m4 ELE2_r0.sch --verbose Processing PCBLIBPATH=/usr/share/pcb/pcblib-newlib:/usr/share/pcb/newlib Adding /usr/share/pcb/pcblib-newlib to the newlib search path Adding /usr/share/pcb/newlib to the newlib search path Running command: gnetlist -g pcbpins -o ELE2_r0.cmd ELE2_r0.sch Running command: gnetlist -g PCB -o ELE2_r0.net ELE2_r0.sch Default m4-pcbdir: /usr/share/pcb/pcb/m4 gnet-gsch2pcb-tmp.scm override file: (define m4-pcbdir /usr/share/pcb/pcb/m4) (define gsch2pcb:use-m4 #f) Running command: gnetlist -g gsch2pcb -o ELE2_r0.new.pcb -m gnet-gsch2pcb-tmp.scm ELE2_r0.sch gsch2pcb: gnetlist command (gnetlist -g gsch2pcb -o ELE2_r0.new.pcb -m gnet-gsch2pcb-tmp.scm ELE2_r0.sch) failed. At least gnetlist 20030901 is required for m4-xxx options. ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Photo mode to the rescue...
On Mon, Sep 6, 2010 at 10:09 PM, Eric Brombaugh ebrombau...@cox.net wrote: Whenever I post pix from photo mode I always get questions about what tool I used to do them. Surprising that none of the big pro tools out there provide that. Who says OSS apps always follow the lead of the proprietary SW world? I have heard the same positive comments from a number of people too. Being able to get a quality rendering of the PCB from the command line is extremely convenient. (* jcl *) ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Thermal pad (heatsink)?
On Sat, Jul 3, 2010 at 8:31 PM, Matthew Lai cyberf...@wecheer.com wrote: Hello, How do I add thermal pad (heatsink, NOT thermal relief pad!) in PCB? Rectangles/polygons don't clear solder mask. Make a footprint with a large pad. (* jcl *) ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: volunteers wanted in LA area
On Thu, Jul 1, 2010 at 1:04 AM, DJ Delorie d...@delorie.com wrote: In October I'm going to be giving a presentation at a conference What is the name of the conference? (* jcl *) ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: SMA connector footprint
On Mon, May 24, 2010 at 3:57 PM, ignacio.dieg...@estumail.ucm.es wrote: Hi all, i'm new in making pcb's and was wondering what footprint should i use for an sma connector? Thanks. I have a couple at -- http://www.luciani.org/geda/pcb/footprints-gif/Connector-gif.html (* jcl *) -- Closed Tools + Open Files != Open Hardware You can't create open hardware with closed EDA tools. twitter: http://twitter.com/jluciani blog:http://www.luciani.org ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: pcb 45 degree angles
When this happens to me it is caused by not starting on the end point. Sometimes, especially with 45 deg traces, the end point can be a little tough to select. Also if you have changed to a coarser grid it can be more difficult to hit the end point. (* jcl *) -- Closed Tools + Open Files != Open Hardware You can't create open hardware with closed EDA tools. twitter: http://twitter.com/jluciani blog:http://www.luciani.org ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Database on symbols, footprints and other (was Re: gattrib)
On Fri, May 7, 2010 at 2:45 PM, Dave McGuire mcgu...@neurotica.com wrote: On May 7, 2010, at 12:49 PM, Windell H. Oskay wrote: I wonder how third-part component search services (like findchips.com and octopart) presently search the distributors. Does anyone know? There must be some sort of API that the distributors are providing them, at least privately. Not necessarily; they could just be screen-scraping, parsing the returned HTML. It can be a bitch to do, but it's pretty common. I thought it might be screen-scraping since the displayed format looks similar to the format on the distributor's site. (* jcl *) ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Double sided surrface mount pad
On Tue, May 4, 2010 at 8:33 AM, George M. Gallant ggallant...@verizon.net wrote: I recently designed a small board that contained multiple instances of a devices that utilized copper on the bottom layer for heat dissipation (not ground). I ended up using closed loop trace around these large pads as a keep out fence. Is there a better way? Moving the part requires manual synchronization. In the device footprint I would make a keepout ring. Add four rectangular pads around the heatsink pad. Make them all the same pin number. (* jcl *) -- Closed Tools + Open Files != Open Hardware You can't create open hardware with closed EDA tools. twitter: http://twitter.com/jluciani blog:http://www.luciani.org ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Copper-free area in footprint
On Mon, May 3, 2010 at 12:49 PM, Tamas Szabo sza2k...@freemail.hu wrote: John Luciani wrote: On Mon, May 3, 2010 at 12:12 PM, Tamas Szabo sza2k...@freemail.hu wrote: My best idea is, that I do it by pads which have a zero width and a specified clearance. Unfortunately, those will have a rounded corner, so rectangular corner seems impossible (I can reduce the radius, if I make it from more pieces, but it never will be zero). A zero width pad may fail the DRC. Being able to specify keepouts would be a welcome addition to the footprint file format. I use the silkscreen to provide keepout hints. Not ideal but it works. (* jcl *) Thanks, could you show me an example? The two that I can think of right now are -- CON_USB_MINI_B__Molex_67503-1020 at http://www.luciani.org/geda/pcb/footprints-gif/Connector-gif.html IIRC the hashed area is a keepout (at least it has been all of my designs ;) For ANT_FOLDED_DIPOLE__Chipcon_2500 http://www.luciani.org/geda/pcb/footprints-gif/misc-gif.html The keepout is indicated by a single line. Just layout hints nothing fancy. (* jcl *) -- Closed Tools + Open Files != Open Hardware You can't create open hardware with closed EDA tools. twitter: http://twitter.com/jluciani blog:http://www.luciani.org ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: help needed regarding PCB componet
My SQFP-50P-1480L1-1480L2-80N looks like it could work (see http://www.luciani.org/geda/pcb/pcb-footprint-list.html). Double-check the dimensions against your component and process specs. (* jcl *) -- Closed Tools + Open Files != Open Hardware You can't create open hardware with closed EDA tools. twitter: http://twitter.com/jluciani blog:http://www.luciani.org ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Footprint with asymmetric solder mask
2010/4/13 SZABO Tamas sza2k...@freemail.hu: Hi, I would like to create a footprint where the pad is not in the center, and it is not symmetric for all sides. Is it possible somehow? You can overlay multiple pads. Give each pad the same pin number. (* jcl *) ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: complete project sample?
I used gEDA/PCB to do a remix of ladyada's drawdio remix. The zip file contains the schematic (with embedded symbols) and the PCB file. No gerbers but just do an export from the PCB menu. The documentation file contains hard copies of the schematic, board layout and bom. Each line item in the bom is a hyperlink to an embedded datasheet. Files and drawdio info are at http://wiblocks.luciani.org/remix/index.html (* jcl *) -- Closed Tools + Open Files != Open Hardware You can't create open hardware with closed EDA tools. twitter: http://twitter.com/jluciani blog:http://www.luciani.org ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: complete project sample?
On Sat, Apr 10, 2010 at 6:58 PM, DJ Delorie d...@delorie.com wrote: I can think of a few uses for your USB GPIO pod!-Patrick I use it mostly for testing out new components. I have added a micro-sd module for it, and most recently it's wired up to a new ethernet chip from micrel. Do you have uSD code working? I have tried a couple of different cards and have had no luck getting them working on the SPI port. I looked at the timing of the CS, MOSI and SCK. All look good but I don't get a response on the MISO line. I have looked at the spec and I believe I am sending the proper command bytes. Any info would be appreciated. Thanks. (* jcl *) ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: complete project sample?
On Sat, Apr 10, 2010 at 9:48 PM, DJ Delorie d...@delorie.com wrote: Yes, I got microsd working. Next time, though, I'm putting a P-MOSFET on the power line so I can software power cycle it. http://www.delorie.com/tmp/microsd.c Excellent. Thanks!!! I will give this a try tomorrow. I made the same omission of P-MOSFET omission on my board too ;) (* jcl *) ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: paid help?
I have 1000 or so footprints at http://www.luciani.org/geda/pcb/pcb-footprint-list.html The gEDA scripts and libraries that I use are also on the site. Stefan's 15min-90min estimate for footprint creation seems about right. With a script you can generate families of footprints and amortize that time over a multiple footprints. Unfortunately most of the 90minute footprints seem to end up being the complex one-of-a-kind devices :( (* jcl *) -- Closed Tools + Open Files != Open Hardware You can't create open hardware with closed EDA tools. twitter: http://twitter.com/jluciani blog:http://www.luciani.org ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Funding for server
Popup ads and ads intermixed with gEDA content would be distracting but I don't believe that is what is being suggested. A sidebar of text ads does not seem bad. Occasionally useful and easy to ignore. (* jcl *) -- You can't create open hardware with closed EDA tools. twitter: http://twitter.com/jluciani blog:http://www.luciani.org ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: solder paste output (was: Open Source mech)
I was thinking of a post-processing script. For each footprint you would look up to see if there was a corresponding stencil footprint (maybe a .sfp file). If there was that would be used. If not then a rule would be applied to create the pattern. You could have specific rules for groups of components and a default rule. Another step added to the makefile. (* jcl *) -- You can't create open hardware with closed EDA tools. twitter: http://twitter.com/jluciani blog:http://www.luciani.org ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Looking for my first fab shop.
I would also go with fast and quality for the reasons that Dave stated. I would use PCB Express or Advanced Circuits. Highest quality boards in 2-5 days (depending on service). If you have more than one design panelize and cut them yourself. If you have friends that want PCBs group all your designs. (* jcl *) -- You can't create open hardware with closed EDA tools. twitter: http://twitter.com/jluciani blog:http://www.luciani.org ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: TO-92 Best Practices
I have been using the Bausch Lomb Magna Visor Magnifying Visor 81-42-00 It is $40 from Amazon and comes with three lenses. Works very well. I keep one in the garage (woodshop) and one on my bench. I also use the Luxo 17113 (magnifier + light). (* jcl *) -- You can't create open hardware with closed EDA tools. twitter: [1]http://twitter.com/jluciani blog:[2]http://www.luciani.org References 1. http://twitter.com/jluciani 2. http://www.luciani.org/ ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: TO-92 Best Practices
On Tue, Mar 2, 2010 at 1:25 AM, Donald Tillman [1]...@till.com wrote: On Feb 27, 2010, at 3:57 PM, John Luciani wrote: I use two different footprints. Both footprints have the pins inline. One footprint spaces the leads 1.39mm the other 2.60mm. The 2.60mm is the common formed lead pattern. I believe I used the spec from On-Semi. I use a finished hole size of 29mils. The fab tolerance is +-4mils. Hey John, Thanks for that. Researching this a little more... Fairchild's TO-92 spec says that the leads are rectangular, 0.46mm by 0.38mm, and the diagonal there works out to 23.5 mils. With a little extra room for tolerance, yeah, a 29 mil hole sounds good. But with 29 mil holes spaced 50 mils apart, that doesn't leave enough room for the pads and the space between. Maybe 7 mils each. So breaking away from the 50 mil grid by just a little bit and moving the outer legs 5 mils beyond allows the DRC to work. I use 1.39mm for the non-formed leads (apx 55mils). (* jcl *) -- You can't create open hardware with closed EDA tools. twitter: [2]http://twitter.com/jluciani blog:[3]http://www.luciani.org References 1. mailto:d...@till.com 2. http://twitter.com/jluciani 3. http://www.luciani.org/ ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: I am such a troll for posting to slashdot
Without a Windows port you will have a beginners interface (and documentation) but no beginners ;) I have talked to a lot of people at the Arduino Users Group and at dorkbot and the majority are Windows, a fair number on MAC and a few on Linux. Eagle has done excellent marketing. Seeding the university's with Eagle has enabled it to spread rapidly. Grassroots local support is available in a lot of areas. Below is my most recent response to openness that I posted on [1]http://www.wired.com/magazine/2010/01/ff_newrevolution (* jcl *) === Cut Here === Open Hardware comes in various degrees of openness. For example in the test equipment market top tier manufacturers like Hewlett Packard and LTX provide complete printed schematics, board layout drawings and a bill of materials. This design information enables the user to understand the equipment limitations and troubleshoot application issues. The printed manuals have a copyright but the design is open. Slightly more open would be a design that provides printed documentation along with the manufacturing data files. Although you won't be able to create new data files without the source files you can still manufacture identical copies. Having the source files enables modification of the original design without having to re-create the design files. But having the design files does not make the design completely open. Design files that require a $10K per seat EDA license are effectively closed. As an example of a completely open electronic design using the gEDA/PCB open source EDA tools I did a re-mix of the Drawdio design by ladyada. The ladyada design was a re-mix of a design done by Jay Silver (MIT Media Lab). The documentation and EDA files for my remix are at [2]http://tinyurl.com/bq8pq4 Thanks to Jay for this fun and creative design. Thanks to ladyada for her excellent documentation. = Cut Here == -- You can't create open hardware with closed EDA tools. twitter: [3]http://twitter.com/jluciani blog:[4]http://www.luciani.org References 1. http://www.wired.com/magazine/2010/01/ff_newrevolution 2. http://tinyurl.com/bq8pq4 3. http://twitter.com/jluciani 4. http://www.luciani.org/ ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: I am such a troll for posting to slashdot
On Sat, Feb 27, 2010 at 9:34 AM, Dave McGuire [1]mcgu...@neurotica.com wrote: On Feb 27, 2010, at 9:12 AM, Peter Clifton wrote: The other thing that is holding back gEDA Schematics is the lack of available publication quality symbols. If I'm doing a PCB I use gEDA. If I'm after a nice looking schematic I use XCircuit. I'd like to be able to have it both ways, a nice looking schematic that I can make a PCB from. Right, I'm bored.. share your custom XCircuit symobls with me and I'll make gEDA equivalents. Obviously I can't just rip off XCircuit symbols with a converter, but I'll see if I can see about producing similarly styled graphics in gEDA using paths. (I might trace some bits). It is about time we had some pretty symbols ;). John Luciani did some publication-quality symbols a couple of years ago. What ever happened to those? John hasn't had time to finish :( As Ales mentioned when the symbols are done I will be using my no-fee license. Distribution without fee, usage other than distribution unrestricted. (* jcl *) -- You can't create open hardware with closed EDA tools. twitter: [2]http://twitter.com/jluciani blog:[3]http://www.luciani.org References 1. mailto:mcgu...@neurotica.com 2. http://twitter.com/jluciani 3. http://www.luciani.org/ ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: TO-92 Best Practices
On Sat, Feb 27, 2010 at 6:27 PM, Donald Tillman [1]...@till.com wrote: Hey folks, What's considered Best Practices for TO-92 packages? I use two different footprints. Both footprints have the pins inline. One footprint spaces the leads 1.39mm the other 2.60mm. The 2.60mm is the common formed lead pattern. I believe I used the spec from On-Semi. I use a finished hole size of 29mils. The fab tolerance is +-4mils. (* jcl *) -- You can't create open hardware with closed EDA tools. twitter: [2]http://twitter.com/jluciani blog:[3]http://www.luciani.org References 1. mailto:d...@till.com 2. http://twitter.com/jluciani 3. http://www.luciani.org/ ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: any last minute advice prior to sending out for PCB fab
Fiducials and Keepouts -- The last mfg I dealt with recommended that the fiducial be a copper circle with a diameter between 0.5mm and 3.5mm and that the solder mask diameter be three times larger than the copper. I made a single 1mm pad footprint with the 3mm clearance. IIRC the requested placement was three corners and 3mm from the edge. There were also component fiducials required for fine pitch devices. I do not recall the specifications since they didn't apply to the boards I was doing. They also specified a minimum keepout of 118mils for their Fuji machine and 125mils for their ATE. I made the keepout 125mils on all sides. (* jcl *) -- You can't create open hardware with closed EDA tools. twitter: [1]http://twitter.com/jluciani blog:[2]http://www.luciani.org References 1. http://twitter.com/jluciani 2. http://www.luciani.org/ ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: any last minute advice prior to sending out for PCB fab
Check the gerbers and drill files using gerbv. I use a script that zips and renames all the files for the fab house. I take the zip file that is created, unzip it and check those files with gerbv. For a system of boards that plug into each I might panelize them so that they all align. You would quickly see misalignment. You would also save some money on the fabrication. (* jcl *) On Tue, Feb 23, 2010 at 10:01 PM, gene glick [1]carzr...@optonline.net wrote: After a very long time, I am just about ready to send out 3 different boards for fab. I would appreciate any advice to improve my chances of success. So far here's what has been done: 1. Run DRC on all PCBs with no issues.. 2. Checked schematics. 3. Checked schematic matches layout. 4. In process of checking all the components, especially the transistor pinouts (all SOT23 devices) 5. Checked the board dimensions. These boards plug into one another, so have to be sure they match up. It looks good physically and the pin numbers look correct from board-to-board. 6. Checked the soldermask. I found a bunch with very minimal dam spacing so fixed them. 7. fixed cosmetic trace runs that looked ugly. 8. double checked for unused traces left behind from component moves. The cash layout for PCB fab is going to be large enough that I am nervous about not getting it right. Still, I have a CPU card and SMPS to do which can wait a bit while this gets put together. what else? Any suggestions? thanks gene ___ geda-user mailing list [2]geda-u...@moria.seul.org [3]http://www.seul.org/cgi-bin/mailman/listinfo/geda-user -- You can't create open hardware with closed EDA tools. twitter: [4]http://twitter.com/jluciani blog:[5]http://www.luciani.org References 1. mailto:carzr...@optonline.net 2. mailto:geda-user@moria.seul.org 3. http://www.seul.org/cgi-bin/mailman/listinfo/geda-user 4. http://twitter.com/jluciani 5. http://www.luciani.org/ ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: PCB Prototype houses that do 0.031 boards?
On Wed, Feb 17, 2010 at 2:52 PM, Jason [1]g...@lakedaemon.net wrote: Bob Paddock wrote: Anyone know of a proto-house that will do 0.031 thick boards? Advanced Circuits [2]http://www.4pcb.com will do them, you just have to move away from the prototype stovepipe (no soldermask, 0.062, no silk). Prices are pretty reasonable and they are great to work with on quick turn stuff. I've only done simple microcontroller boards with 4-6 SMDs and 2-3 throughhole components, so ymmv... Sunstone (sometimes know as PCB Express) also will do 0.031. You need to order the full featured service. (* jcl *) -- You can't create open hardware with closed EDA tools. twitter: [3]http://twitter.com/jluciani blog:[4]http://www.luciani.org References 1. mailto:g...@lakedaemon.net 2. http://www.4pcb.com/ 3. http://twitter.com/jluciani 4. http://www.luciani.org/ ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Seeking Xicon 42IF footprint
That looks similar to the package for the Toko Inductors I used on a Theremin. Check the inductor section at [1]http://www.luciani.org/geda/pcb/pcb-footprint-list.html (* jcl *) On Sun, Feb 14, 2010 at 1:43 PM, David Griffith [2]dgri...@cs.csubak.edu wrote: Does anyone have a ready-made footprint for the Xicon 42IF series of transformers? -- David Griffith [3]dgri...@cs.csubak.edu A: Because it fouls the order in which people normally read text. Q: Why is top-posting such a bad thing? A: Top-posting. Q: What is the most annoying thing in e-mail? ___ geda-user mailing list [4]geda-u...@moria.seul.org [5]http://www.seul.org/cgi-bin/mailman/listinfo/geda-user -- You can't create open hardware with closed EDA tools. twitter: [6]http://twitter.com/jluciani blog:[7]http://www.luciani.org References 1. http://www.luciani.org/geda/pcb/pcb-footprint-list.html 2. mailto:dgri...@cs.csubak.edu 3. mailto:dgri...@cs.csubak.edu 4. mailto:geda-user@moria.seul.org 5. http://www.seul.org/cgi-bin/mailman/listinfo/geda-user 6. http://twitter.com/jluciani 7. http://www.luciani.org/ ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Seeking Xicon 42IF footprint
On Sun, Feb 14, 2010 at 3:23 PM, David Griffith [1]dgri...@cs.csubak.edu wrote: On Sun, 14 Feb 2010, John Luciani wrote: Does anyone have a ready-made footprint for the Xicon 42IF series of transformers? That looks similar to the package for the Toko Inductors I used on a Theremin. Check the inductor section at [2]http://www.luciani.org/geda/pcb/pcb-footprint-list.html Indeed it's similar enough that the only change needed is to delete one of the pins. Would you please do that for me since I seem to be having trouble getting things working. One nice thing about footprints in ASCII files is that you can use a text editor to remove pins ;) Open the footprint in a text editor and just delete the appropriate line. (* jcl *) -- You can't create open hardware with closed EDA tools. twitter: [3]http://twitter.com/jluciani blog:[4]http://www.luciani.org References 1. mailto:dgri...@cs.csubak.edu 2. http://www.luciani.org/geda/pcb/pcb-footprint-list.html 3. http://twitter.com/jluciani 4. http://www.luciani.org/ ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Pin pads on only one side
On Sat, Jan 30, 2010 at 8:10 PM, Phil Frost [1]ind...@bitglue.com wrote: Is there some way to instruct PCB to put a copper pad for through-hole pins only on the bottom of the board? I'm etching two sided boards, and I don't solder to the top side since it makes rework much harder. Sometimes the solder will travel down the lead and get to the top-side pad, (which never connects to anything) making it very hard to desolder. If you are etching and drilling your own boards you could place a pad with rounded edges on the top. Then place a pin with a pad diameter that is less than the diameter of the drill you plan to use. (* jcl *) -- You can't create open hardware with closed EDA tools. twitter: [2]http://twitter.com/jluciani blog:[3]http://www.luciani.org References 1. mailto:ind...@bitglue.com 2. http://twitter.com/jluciani 3. http://www.luciani.org/ ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: [SOT] suggestion for a SMT switch
Why wouldn't you use the transistor or the FET? An MMBT3904 or an N-channel FET is more suitable for this application than a 1G125. I would go with the MMBT3904 since you have a low voltage system. I used these to drive pager motors in a haptic compass. I am not sure about the duty-cycle of the motor but have you looked at the coin-cell life and the voltage dip when the motor is on? Make sure your coin-cells are rated for high pulse currents or factor the decreased battery life into your specification. (* jcl *) -- You can't create open hardware with closed EDA tools. twitter: [1]http://twitter.com/jluciani blog:[2]http://www.luciani.org References 1. http://twitter.com/jluciani 2. http://www.luciani.org/ ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: gschem rotate symbol 45 degrees
You will have to make rotated symbol. When you rotate a component that has both end points on grid at least one end point will be off grid unless the rotation is by an integer multiple of 90 degrees. (* jcl *) -- You can't create open hardware with closed EDA tools. twitter: [1]http://twitter.com/jluciani blog:[2]http://www.luciani.org References 1. http://twitter.com/jluciani 2. http://www.luciani.org/ ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Multiple copies of single, small board
For 20 identical copies I would just do it manually. It would be about five minutes of work. I place a 50mil space between copies. This enables me to make a single cut (between rows/cols) with a hacksaw blade. I place copper at least 25mils from the edge (typically 50mils). If I need v-scores, fiducials, assembly data I would use a script. (* jcl *) -- You can't create open hardware with closed EDA tools. twitter: [1]http://twitter.com/jluciani blog:[2]http://www.luciani.org References 1. http://twitter.com/jluciani 2. http://www.luciani.org/ ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Footprint recognition
2009/12/16 Goran Meki� [1]m...@ns-linux.org � � Is there a way to recognize what footprint I need for an element other then printing them all and comparing it to real element? Let's say it's 2200uF polar cap. I know it's RCY*, but how to figure out what's *? Thanx! I have been using the footprint naming convention that is documented in the Naming Specification link at [2]http://tinyurl.com/67k3hn The spec is based on IPC-7351. After using this for a while I have found it very easy map footprints to names. The component type prefixes like CAPR, QFN, etc make it easy to find families of parts. The suffix tags for the various attributes -- D for diameter, P for pin spacing, N for number of pins, etc. Since I keep each footprint in a separate file in a single directory I just use dired mode in EMACS to search. It is very quick. You won't be able to find a footprint based solely on the electrical specification since the electrical specification doesn't map to a single physical specification. A polarized cap with radial leads would be CAPPR in my footprints. You would need to know body diameter and pin spacing to determine the footprint. (* jcl *) -- You can't create open hardware with closed EDA tools. twitter: [3]http://twitter.com/jluciani blog: � � [4]http://www.luciani.org References 1. mailto:m...@ns-linux.org 2. http://tinyurl.com/67k3hn 3. http://twitter.com/jluciani 4. http://www.luciani.org/ ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Footprint requests for pcb
On Tue, Nov 24, 2009 at 3:13 AM, Anthony Shanks [1]yamazak...@gmail.com wrote: Sorry but can you give me a direct link? I can't find it on the site. [2]http://www.luciani.org/geda/pcb/pcb-footprint-list.html (* jcl *) -- You can't create open hardware with closed EDA tools. twitter: [3]http://twitter.com/jluciani blog:[4]http://www.luciani.org References 1. mailto:yamazak...@gmail.com 2. http://www.luciani.org/geda/pcb/pcb-footprint-list.html 3. http://twitter.com/jluciani 4. http://www.luciani.org/ ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Analog books
On Tue, Nov 24, 2009 at 9:34 AM, Karl Hammar [1]k...@aspodata.se wrote: Can anyone recommend some good books on analog circuit design for audio, precision/low noise op.amp., emc, active filters and similar ? National Semiconductor use to publish the Audio/Radio Handbook. IIRC a third party is now publishing it. Precision Monolithics (PMI) also had an audio handbook. Not as much detail as the National book. You may want to post on the synth-diy list as well. (* jcl *) -- You can't create open hardware with closed EDA tools. twitter: [2]http://twitter.com/jluciani blog:[3]http://www.luciani.org References 1. mailto:k...@aspodata.se 2. http://twitter.com/jluciani 3. http://www.luciani.org/ ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Footprint requests for pcb
I should have the 2.1mm jack and the SC70-5 at [1]luciani.org (* jcl *) -- You can't create open hardware with closed EDA tools. twitter: [2]http://twitter.com/jluciani blog:[3]http://www.luciani.org References 1. http://luciani.org/ 2. http://twitter.com/jluciani 3. http://www.luciani.org/ ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: OT: Learning Scheme? WAS: How to deal with single/dual parts?
You could also try some of the links at [1]http://www.schemers.org (* jcl *) -- You can't create open hardware with closed EDA tools. twitter: [2]http://twitter.com/jluciani blog:[3]http://www.luciani.org References 1. http://www.schemers.org/ 2. http://twitter.com/jluciani 3. http://www.luciani.org/ ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: How to deal with single/dual parts?
On Fri, Nov 20, 2009 at 6:46 AM, Dan McMahill [1]...@mcmahill.net wrote: Michael Sokolov wrote: Bill Gatliff [2]b...@billgatliff.com wrote: Now I'm beginning to see the problems with slotting and symbols the way we're doing them now: they unnecessarily tie the concept of a symbol to the concept of a component, because the pin numbers that we currently record in our symbols are also the pin numbers that the component maps to the pins of the component's package. We have munged together the concepts of symbol and component in our symbol files, but can't seem to admit to that. You have hit the nail right on the head! It was this very issue (the fundamental difference between symbols and components) that played a major factor in my decision to invent a new schematic file format for uschem instead of merely writing a tool that prints gschem format schematics into PostScript without requiring an X11 display or a modern system to compile and run gEDA/gaf with all of its dependencies. and this is exactly why the small library I have defines the component in a simple ascii database and then awk reads that data and combines a symbol template with a footprint and produces a .sym file that has the footprint set along with the pin out. Wouldn't be too terribly hard to do something similar for a different flow. This is what I do as well. I build components for everything other than passives. (* jcl *) -- You can't create open hardware with closed EDA tools. twitter: [3]http://twitter.com/jluciani blog:[4]http://www.luciani.org References 1. mailto:d...@mcmahill.net 2. mailto:b...@billgatliff.com 3. http://twitter.com/jluciani 4. http://www.luciani.org/ ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Cheaper right angle component video terminal?
On Mon, Nov 16, 2009 at 5:16 PM, Ben Jackson [1]...@ben.com wrote: On Mon, Nov 16, 2009 at 01:47:48PM -0800, Anthony Shanks wrote: I see, I actually like the black frame, I was just interested if any company sold them for cheaper. I'll just use the digikey part. I'm sure they'd be cheaper in bulk from CUI. Usually Mouser is a good place to check for connectors -- often they beat Digikey's prices. I checked when I replied originally and they don't carry them. You may want to see if Kobicon (which Mouser does carry) makes a similar connector. (* jcl *) -- You can't create open hardware with closed EDA tools. twitter: [2]http://twitter.com/jluciani blog:[3]http://www.luciani.org References 1. mailto:b...@ben.com 2. http://twitter.com/jluciani 3. http://www.luciani.org/ ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: missing pcb footprints.
I put all of the footprint files (or symlinks) that I use for production boards in a single directory. I also use descriptive footprint names. To find a footprint I use dired mode in EMACS. Very easy to find to footprints. For semiconductors and some specialized components I add the footprint attribute to the schematic symbol (heavy symbols). For these types of parts I have yet to use more than two package styles. (* jcl *) -- You can't create open hardware with closed EDA tools. twitter: [1]http://twitter.com/jluciani blog:[2]http://www.luciani.org References 1. http://twitter.com/jluciani 2. http://www.luciani.org/ ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: .pcb question
There is a python script, from the MIT Media Lab, that converts Gerber files into a format used by a Roland milling machine. The python script is at [1]http://web.media.mit.edu/~neilg/fab/dist/cam.py I am not sure if the Roland uses NGC or some other format. The commands looked a lot plotter control commands to me. I brought a couple of Gerber files to try routing a board using the milling machine. Unfortunately the CAM program they have only understands a subset of the Gerber specification, specifically the subset that Eagle outputs :( (* jcl *) -- You can't create open hardware with closed EDA tools. twitter: [2]http://twitter.com/jluciani blog:[3]http://www.luciani.org References 1. http://web.media.mit.edu/~neilg/fab/dist/cam.py 2. http://twitter.com/jluciani 3. http://www.luciani.org/ ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: net= attributes, symbols and schematics
On Thu, Oct 15, 2009 at 2:54 PM, Stephen Williams st...@icarus.com wrote: I was thinking about multi-part symbols, actually. It would be kool to draw a symbol for all the business pins and another symbol for the power pins. Then I could have a sheet just for power/gnd. This is what I would do. I would also make these footprints heavy so that the footprint attribute is always found. But I wondered about netlisting and refdes support. Bummer that renumbering doesn't preserve relationships. I believe my refdes_update script does. I can't remember if I thought it was a good idea and implemented it or thought it was a good idea and would add it later ;) Try it on a backup copy of your schematic. (* jcl *) -- You can't create open hardware with closed EDA tools. twitter: http://twitter.com/jluciani blog:http://www.luciani.org ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: gsch2pcb shorting circuits in netfile
Open up the symbols in a text editor and see if there are net name attributes attached to the connector pins. If there are then just remove them. (* jcl *) -- You can't create open hardware with closed EDA tools. twitter: http://twitter.com/jluciani blog:http://www.luciani.org ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
gEDA-user: [OT] MIT Great Glass Pumpkin Patch
Photos from the 2009 MIT Great Glass Pumpkin Patch are [1]http://www.luciani.org. Also a couple of photos from the MIT museum. (* jcl *) -- You can't create open hardware with closed EDA tools. twitter: [2]http://twitter.com/jluciani www: [3]http://www.luciani.org References 1. http://www.luciani.org/ 2. http://twitter.com/jluciani 3. http://www.luciani.org/ ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
gEDA-user: gschem/PCB mentioned in pocsci (linked from Make Blog)
[1]http://blog.makezine.com/archive/2009/10/how_to_-_get_professionall y_printed.html [2]http://www.popsci.com/diy/article/2009-09/getting-your-circuit-boar ds-professionally-printed (* jcl *) References 1. http://blog.makezine.com/archive/2009/10/how_to_-_get_professionally_printed.html 2. http://www.popsci.com/diy/article/2009-09/getting-your-circuit-boards-professionally-printed ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: pcb drill size and finished hole size
On Wed, Aug 26, 2009 at 8:23 PM, gene glick [1]carzr...@optonline.net wrote: how much does plating reduce the hole size? It just occurred to me that I have to allow for some reduction in finished hole size due to the plating and whatever other stuff goes on. Typically around 3-5mils. You should check with your PCB vendor for a more accurate value. (* jcl *) You can't create open hardware with closed EDA tools. [2]http://www.luciani.org References 1. mailto:carzr...@optonline.net 2. http://www.luciani.org/ ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
gEDA-user: EPS Printing of PCBs
I use the commands pcb -x png --only-visible --ben-mode --dpi 600 pcb -x png --only-visible --ben-mode --ben-flip-x --dpi 600 to generate top and bottom pictures for PCB layouts. I would like to get EPS files instead of PNGs. Are there EPS printing options for this? The command pcb -x eps --only-visible --eps-scale 1 --as-shown --eps-file $base.eps \ --layer-stack component,elements,pins seems to work for the component side. I can not seem to get a command line to work for the solder side. In the --help I did not see anything analogous to --ben-flip for eps files. Thanks. (* jcl *) -- You can't create open hardware with closed EDA tools. [1]http://www.luciani.org References 1. http://www.luciani.org/ ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: EPS Printing of PCBs
On Tue, Aug 18, 2009 at 6:39 PM, DJ Delorie [1...@delorie.com wrote: as-shown uses the board's ShowSolderSide flag (the tab key changes this) to decide which side to print. I don't know of a way to force that flag from the command line, but I suppose you could perl-script the .pcb file first. Or add a command line option to override it. Does the ben-flip-x do the ShowSolderSide magic when using ben-mode? Don't forget to enable vias too ;-) Thanks. (* jcl *) -- You can't create open hardware with closed EDA tools. [2]http://www.luciani.org References 1. mailto:d...@delorie.com 2. http://www.luciani.org/ ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: B9A pin base
2009/8/3 Goran Meki� [1]m...@ns-linux.org � � Does anyone has B9A pin base (12AX7 tube, for example) for pcb? I've searched everything that came to my mind, but found nothing. How to put tube on a PCB (software, not the real board), anyway? Thanx! I wrote a script that creates footprints for tube sockets that you may be able to modify. See the tube socket example at [2]http://tinyurl.com/67k3hn (* jcl *) -- You can't create open hardware with closed EDA tools. [3]http://www.luciani.org References 1. mailto:m...@ns-linux.org 2. http://tinyurl.com/67k3hn 3. http://www.luciani.org/ ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: placing a connector footprint out of a board
I do this all the time (even as we speak ;) You need to find out how the manufacturer wants you to specify the board perimeter. With PCB Express I place a one mil line on the top layer. (* jcl *) -- You can't create open hardware with closed EDA tools. [1]http://www.luciani.org References 1. http://www.luciani.org/ ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: RFC refdes positions on pcb
On Wed, Jul 29, 2009 at 10:21 PM, gene glick [1]carzr...@optonline.net wrote: Any comments on this sort of refdes position? [2]http://geocities.com/motorcity/9424/geda/refdes_sample.png I would find it difficult to use. Rather than reading a refdes you have to perform a lookup. Since S6.S401 is repeated for all refdeses can you just put a box around the sub-circuit and label it S6.S401? You could then replace the three character key with a three character refdes. The table consumes a lot of board area which can not be used for components or vias. (* jcl *) -- You can't create open hardware with closed EDA tools. [3]http://www.luciani.org References 1. mailto:carzr...@optonline.net 2. http://geocities.com/motorcity/9424/geda/refdes_sample.png 3. http://www.luciani.org/ ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: RFC refdes positions on pcb
On Thu, Jul 30, 2009 at 6:35 AM, gene glick [1]carzr...@optonline.net wrote: John Luciani wrote: Since S6.S401 is repeated for all refdeses can you just put a box around the sub-circuit and label it S6.S401? You could then replace the three character key with a three character refdes. I like that idea - pretty sure it's been tossed around here before. Let me see if I can make that work. Any ramifications for an assembly house? Either way requires an algorithm to determine the refdes. (* jcl *) -- You can't create open hardware with closed EDA tools. [2]http://www.luciani.org References 1. mailto:carzr...@optonline.net 2. http://www.luciani.org/ ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: sharing presentation materials for gEDA talks
There is a video of Stuart's gEDA presentation at [1]http://tinyurl.com/bbt2rc This was from Ignite Boston, Feb 2009. (* jcl *) -- You can't create open hardware with closed EDA tools. [2]http://www.luciani.org References 1. http://tinyurl.com/bbt2rc 2. http://www.luciani.org/ ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: one year later...
Are you sure that was a tornado? Looking at those pictures it appears to be a message from aliens addressed to William Hemmel ;) (* jcl *) -- You can't create open hardware with closed EDA tools. [1]http://www.luciani.org References 1. http://www.luciani.org/ ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: gerbv-2.3.0 released
On Tue, Jul 14, 2009 at 2:07 AM, Dan McMahill [1]...@mcmahill.net wrote: Mark Rages wrote: What is the likelihood of moving --photo-mode from pcb to gerbv where it belongs? don't know about *moving* it. I'm certainly not opposed to *adding* it to gerbv though. I guess I'd have to do some reading of the code to see exactly what photo-mode is doing though. Also I'm not that familiar with how much of the drawing part of gerbv works. Patches are always welcome. Can PCB plot gerber files from the command line? If not I would rather not see the --photo-mode removed. I use this mode from the command line all the time (thanks Ben and DJ). When I need to email a snapshot of a layout I type in pcb-pic and the script outputs top and bottom jpegs that I attach. It is nice to type in a single command rather than multiple menus to plot gerbers. (* jcl *) -- You can't create open hardware with closed EDA tools. [2]http://www.luciani.org References 1. mailto:d...@mcmahill.net 2. http://www.luciani.org/ ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: gerbv-2.3.0 released
On Tue, Jul 14, 2009 at 1:17 PM, Dan McMahill [1]...@mcmahill.net wrote: John Luciani wrote: On Tue, Jul 14, 2009 at 2:07 AM, Dan McMahill [1][2]...@mcmahill.net wrote: Mark Rages wrote: What is the likelihood of moving --photo-mode from pcb to gerbv where it belongs? don't know about *moving* it. I'm certainly not opposed to *adding* it to gerbv though. I guess I'd have to do some reading of the code to see exactly what photo-mode is doing though. Also I'm not that familiar with how much of the drawing part of gerbv works. Patches are always welcome. Can PCB plot gerber files from the command line? If not I would rather not see the --photo-mode removed. I use this mode from the command line all the time (thanks Ben and DJ). When I need to email a snapshot of a layout I type in pcb-pic and the script outputs top and bottom jpegs that I attach. It is nice to type in a single command rather than multiple menus to plot gerbers. Don't worry, I have no intention of removing photo mode from pcb. Thats why I said I have no objections to adding to gerbv but I do object to *moving* (implying removal from pcb) it to gerbv btw, pcb of course can export RS-274X straight from the command line and gerbv can plot to pdf, png, postscript from the command line as well. I can't take credit for any of those features but I'm a big fan of supporting command line operation. Thanks DJ and Dan. I had thought that because of dialog boxes exporting some file types from the command line were not possible. Happy to be wrong. (* jcl *) -- You can't create open hardware with closed EDA tools. [3]http://www.luciani.org References 1. mailto:d...@mcmahill.net 2. mailto:d...@mcmahill.net 3. http://www.luciani.org/ ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Where can I buy wire like that used for leads on components?
On Fri, Jul 10, 2009 at 9:19 PM, Michael B Allen [1]iop...@gmail.com wrote: Where can I find wire like that used for smallish ceramic disc capacitors and other similar components? I don't care if it's insulated but insulated wire is almost always copper which is not as stiff. It seems to me the lead wire used on passive components is more of a stiff alloy? What is this type of wire and where can I get it? It's called bus wire. You should be able to get it from Digikey. Mouser or Radio Shack. You can buy teflon tubing to slip the wire into. (* jcl *) -- You can't create open hardware with closed EDA tools. [2]http://www.luciani.org References 1. mailto:iop...@gmail.com 2. http://www.luciani.org/ ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: More robust support of multi-part symbols.
This sounds good to me. If some of this code is used by the BOM utility then aggregating other attributes by refdes could be useful. I have my own BOM script that aggregates the attributes manufacturer and manufacturer_part_number, in a hash, by refdes. (* jcl *) -- You can't create open hardware with closed EDA tools. [1]http://www.luciani.org References 1. http://www.luciani.org/ ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: TI's SOT25 DBV footprint...
I would keep the footprint pin numbering consistent with the schematic symbol and datasheet pin numbering. If that means additional symbols and footprints then I would create them. If there are differences between mfgs of the same part number then I would attach a mfg suffix to the symbol or footprint. (* jcl *) -- You can't create open hardware with closed EDA tools. [1]http://www.luciani.org References 1. http://www.luciani.org/ ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: More robust support of multi-part symbols.
On Wed, Jul 8, 2009 at 2:08 PM, Bill Gatliff [1]b...@billgatliff.com wrote: John Luciani wrote: aggregates the attributes manufacturer and manufacturer_part_number, Are those two attributes a common convention? I've been using manufacturer= and manufacturer_partnumber=. I've also been doing vendor_partnumber_digikey= and vendor_partnumber_mouser=, but I'm not so sure those are useful enough to keep doing so. Putting vendor information into the schematic is not a good idea. I use Postgres tables for that mapping. You could get the relations using text files and hashes. Ideally you would not put manufacturer information in the schematic either. You would have a master parts list with your own part number that does a one-to-many map to multiple vendors. Since that database is a bit of work to setup and maintain I use manufacturer and manufacturer_part_number. Building a real master parts list is on my to-do list. (* jcl *) -- You can't create open hardware with closed EDA tools. [2]http://www.luciani.org References 1. mailto:b...@billgatliff.com 2. http://www.luciani.org/ ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: More robust support of multi-part symbols.
On Wed, Jul 8, 2009 at 2:36 PM, John Doty [1]...@noqsi.com wrote: On Jul 8, 2009, at 12:25 PM, John Luciani wrote: Putting vendor information into the schematic is not a good idea. True, but... Using your project symbols as capsules for that data is convenient and easy. The error is using the library symbols directly: that's a bad idea for all of the same reasons you shouldn't put vendor information into the schematic, and more. I agree it can be convenient. It is more convenient for me to change vendors using a few lines of SQL rather than a script that updates project symbols across multiple projects. It is also easier to query when all of the data is in tables. (* jcl *) -- You can't create open hardware with closed EDA tools. [2]http://www.luciani.org References 1. mailto:j...@noqsi.com 2. http://www.luciani.org/ ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: MOSFET high-side driver schematic symbol suggestion?
I would use the square box with pins too. (* jcl *) -- You can't create open hardware with closed EDA tools. [1]http://www.luciani.org References 1. http://www.luciani.org/ ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Toporouter Updates
On Thu, Jul 2, 2009 at 1:55 PM, Eric Brombaugh [1]ebrombau...@cox.net wrote: Anthony Blake wrote: By the way, the LCD project was very cool. Will the board be available at some stage? That's my intent. I've got it pretty much ready to go now, but BatchPCB's DRC Bot seems to be down since yesterday afternoon and they still haven't approved the design for purchase. In any case, I'll definitely let the list know if/when I get the LCD working. You should post it to dorkbot Boston too. Tim would enjoy seeing it. (* jcl *) -- You can't create open hardware with closed EDA tools. [2]http://www.luciani.org References 1. mailto:ebrombau...@cox.net 2. http://www.luciani.org/ ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: RFC: Towards a better symbol/package pin-mapping strategy
On Sun, Jun 28, 2009 at 9:46 PM, Dan McMahill [1]...@mcmahill.net wrote: For transistors and IC's, I have no problems with the enumerate them all approach I've taken. This is what I been doing too. All semiconductors are enumerated. Since all of the graphics are done by scripts there is a single copy of the graphics data. The script adds the appropriate attributes and pin numbering. (* jcl *) -- You can't create open hardware with closed EDA tools. [2]http://www.luciani.org References 1. mailto:d...@mcmahill.net 2. http://www.luciani.org/ ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: cylindrical SMT power resistor pad design: how to do a semi-circular cutout
On Sat, Jun 27, 2009 at 7:26 AM, S. Aguinaga [1]sa...@yahoo.com wrote: I need to create a footprint for a cylindrical SMT resistor. Do you fellows have some pointers for me to generate the semi-circular cut out? You won't be able to get a circular cut-out. You could get a square cut-out by overlaying three rectangular pads. Give each pad the same pin number. (* jcl *) -- You can't create open hardware with closed EDA tools. [2]http://www.luciani.org References 1. mailto:sa...@yahoo.com 2. http://www.luciani.org/ ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Handling odd solder paste shapes
On Thu, Jun 25, 2009 at 12:24 PM, DJ Deloried...@delorie.com wrote: Me, I have a perl script that post-processes that layer to adjust the sizes for the paste I want. I was thinking of doing a Perl script that would substitute stencil footprints (.sfp) if they were found. Otherwise a generic adjustment would be made. (* jcl *) -- You can't create open hardware with closed EDA tools. http://www.luciani.org ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Handling odd solder paste shapes
On Thu, Jun 25, 2009 at 8:24 PM, DJ Delorie [1...@delorie.com wrote: Picoliters? All we need now is an inkjet printer that can print solder paste instead of ink. At Vicor we had a robot with a syringe that dispensed solder paste dots. (* jcl *) -- You can't create open hardware with closed EDA tools. [2]http://www.luciani.org References 1. mailto:d...@delorie.com 2. http://www.luciani.org/ ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: CNC Milling
The Fab Lab in Boston uses a Roland Modela MDX-20. There is a python script that translates the gerber files that Eagle creates into routing commands (http://web.media.mit.edu/~neilg/fab/dist/cam.py). I brought a couple of Gerber files (created with gEDA/PCB) to try routing a board using the milling machine. Unfortunately the CAM program only understands a subset of the Gerber specification, specifically the subset that Eagle outputs :( Some pictures I took at the Fab Lab in South Boston are at http://luciani.org/photos/pic1/2008-03-22-fab-lab/index.html. The Fab Lab is an educational outreach component for the Center for Bits and Atoms (CBA) at MIT. (* jcl *) -- You can't create open hardware with closed EDA tools. http://www.luciani.org ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: [PCB] netlist corrupt??
Are routing traces with new lines clears polygons enabled? My guess (without seeing the board) is that you have a trace or piece of a trace underneath a pin or a pad. If there is a polygon near it may produce a short. (* jlc *) ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
gEDA-user: IPC Least/Nominal/Most
For hand soldering which footprint variation are people using? My existing passive footprints are very generous in length making for very easy assembly by hand. I would like to get some smaller footprints that are not too difficult for hand assembly. The IPC M footprints do not look too difficult. For an 0603 (1608 metric) there is apx 20mils of a pad beyond the component ends. With the 20mil Metcal tip this should be too difficult. For an automated assembly has anyone used the IPC L series footprints? I am curious as to yield differences between L and N series. (* jcl *) -- You can't create open hardware with closed EDA tools. http://www.luciani.org ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Question about gschem DRC errors when using separate power pin symbols.
Did you change the slot attribute for each of the comparators? (* jcl *) -- You can't create open hardware with closed EDA tools. http://www.luciani.org ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Soldering supplies
On Wed, Jun 10, 2009 at 11:24 AM, Frank Milesf...@u.washington.edu wrote: Since DJ mentioned impedance level concerns associated with different kinds of flux: please note that the flux pen shown in John Luciani's generally excellent recommendations leads to seriously low electrical conductivity. [At least for high-impedance analog circuits]. It's a pretty aggressive flux, does a good job *as a flux*, just has a serious side-effect. It is definitely aggressive. You really need to clean the board often with hot water and a brush. I also keep isopropyl alcohol and a brush on my bench. I have had a few circuits come back to life after a good cleaning. Now I take a break every hour or so and clean. Also gives my eyes and back a break ;) (* jcl *) -- You can't create open hardware with closed EDA tools. http://www.luciani.org ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
gEDA-user: Narrow Pads in RESC1608L
I am wondering if the RESC1608L pad length is correct. The difference between the RESC1608L and CAPC1608L is apx 30%. The difference between RESC2012L and CAPC2012L is about 10%. I have not looked at heights or calculated the values using the IPC-7351 equations. The RESC1608L pads look very narrow (even for least material). define(`PKG_CAPC1608L', `PKG_SMT_2PAD_MM100( `$1', `$2', `$3', 90, 65, 120, 200, 120, 0, 0)'); define(`PKG_RESC1608L', `PKG_SMT_2PAD_MM100( `$1', `$2', `$3', 90, 50, 120, 200, 120, 0, 90)'); define(`PKG_CAPC2012L', `PKG_SMT_2PAD_MM100( `$1', `$2', `$3', 140, 110, 160, 280, 170, 0, 0)'); define(`PKG_RESC2012L', `PKG_SMT_2PAD_MM100( `$1', `$2', `$3', 130, 100, 160, 280, 160, 20, 130)'); Also I noticed that in geda.inc (200811xx) PKG_RESC3216M appears twice. The first occurrence should be PKG_INDC3216M. (* jcl *) -- You can't create open hardware with closed EDA tools. http://www.luciani.org ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Soldering supplies
The supplies and tools I use for SMT assembly are listed at http://tinyurl.com/5foeou (* jcl *) -- You can't create open hardware with closed EDA tools. http://www.luciani.org ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Surface mount footprint pin pitch changes at different magnifications in PCB
On Fri, Jun 5, 2009 at 4:27 PM, Rob Butts [1]r.but...@gmail.com wrote: I'm exporting a postscript file and then converting that to a pdf with the ps2pdf command. I then come up in windows and print the file to my Samsung laser printer. I have to do this because I have not been able to get my printers to print in fedora. I have had scaling problems using ps2pdf. I print the postscript file and the scaling is correct. I run ps2pdf and print the pdf file and the scaling is off by apx 4%. (* jcl *) -- You can't create open hardware with closed EDA tools. [2]http://www.luciani.org References 1. mailto:r.but...@gmail.com 2. http://www.luciani.org/ ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Surface mount footprint pin pitch changes at different magnifications in PCB
On Fri, Jun 5, 2009 at 5:28 PM, Rob Butts [1]r.but...@gmail.com wrote: How do you print the postscript file? I doubt I can do it on windows. I guess I'm going to have to bite the bullet and get my printer working in fedora (uhgg). On Fedora I use kghostview to view and print postscript files. Also I have a postscript cartridge in my printer. (* jcl *) On Fri, Jun 5, 2009 at 4:33 PM, John Luciani [1][2]jluci...@gmail.com wrote: On Fri, Jun 5, 2009 at 4:27 PM, Rob Butts [1][2][3]r.but...@gmail.com wrote: I'm exporting a postscript file and then converting that to a pdf with the ps2pdf command. I then come up in windows and print the file to my Samsung laser printer. I have to do this because I have not been able to get my printers to print in fedora. I have had scaling problems using ps2pdf. I print the postscript file and the scaling is correct. I run ps2pdf and print the pdf file and the scaling is off by apx 4%. (* jcl *) -- You can't create open hardware with closed EDA tools. [2][3][4]http://www.luciani.org References 1. mailto:[4][5]r.but...@gmail.com 2. [5][6]http://www.luciani.org/ ___ geda-user mailing list [6][7]geda-u...@moria.seul.org [7][8]http://www.seul.org/cgi-bin/mailman/listinfo/geda-user References 1. mailto:[9]jluci...@gmail.com 2. mailto:[10]r.but...@gmail.com 3. [11]http://www.luciani.org/ 4. mailto:[12]r.but...@gmail.com 5. [13]http://www.luciani.org/ 6. mailto:[14]geda-u...@moria.seul.org 7. [15]http://www.seul.org/cgi-bin/mailman/listinfo/geda-user ___ geda-user mailing list [16]geda-u...@moria.seul.org [17]http://www.seul.org/cgi-bin/mailman/listinfo/geda-user -- You can't create open hardware with closed EDA tools. [18]http://www.luciani.org References 1. mailto:r.but...@gmail.com 2. mailto:jluci...@gmail.com 3. mailto:r.but...@gmail.com 4. http://www.luciani.org/ 5. mailto:r.but...@gmail.com 6. http://www.luciani.org/ 7. mailto:geda-user@moria.seul.org 8. http://www.seul.org/cgi-bin/mailman/listinfo/geda-user 9. mailto:jluci...@gmail.com 10. mailto:r.but...@gmail.com 11. http://www.luciani.org/ 12. mailto:r.but...@gmail.com 13. http://www.luciani.org/ 14. mailto:geda-user@moria.seul.org 15. http://www.seul.org/cgi-bin/mailman/listinfo/geda-user 16. mailto:geda-user@moria.seul.org 17. http://www.seul.org/cgi-bin/mailman/listinfo/geda-user 18. http://www.luciani.org/ ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Unplated pin with one-side copper ring
On Mon, Jun 1, 2009 at 8:35 AM, Tamas Szabo [1]sza2k...@freemail.hu wrote: Hi, Can I make a pin without plating and put the footprint only to the component side? If yes, how can I do it? It sounds like you want a copper ring with an unplated hole. IIRC pins create copper on both sides. A square pad with rounded corners is a circle. You could try placing a mounting hole in the center of a component side square pad with rounded corners. The fab may not produce a clean edge on the hole. (* jcl *) Thanks, /sza2 ___ geda-user mailing list [2]geda-u...@moria.seul.org [3]http://www.seul.org/cgi-bin/mailman/listinfo/geda-user -- You can't create open hardware with closed EDA tools. [4]http://www.luciani.org References 1. mailto:sza2k...@freemail.hu 2. mailto:geda-user@moria.seul.org 3. http://www.seul.org/cgi-bin/mailman/listinfo/geda-user 4. http://www.luciani.org/ ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: PCB layout for dc/dc-switching converter
It would be difficult to get that exact layout with real components but you should be able to get very close. I would be surprised if you see a difference between connecting a pad with two or three 10mil traces and a solid plane. I would worry more about the problems caused with hand soldering to the plane. Is that the LT1616? I may have done a design with that chip. I switched to the On-Semi NCP1421 which is about 1/3 the price. The NCP1421 is a lot more difficult to solder (MSOP-8 with wide leads). (* jcl *) -- You can't create open hardware with closed EDA tools. [1]http://www.luciani.org References 1. http://www.luciani.org/ ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: PCB layout for dc/dc-switching converter
On Fri, May 29, 2009 at 10:35 AM, Stefan Salewski [1]m...@ssalewski.de wrote: On Fri, 2009-05-29 at 09:41 -0400, John Luciani wrote: It would be difficult to get that exact layout with real components but you should be able to get very close. Yes. My shielded inductors are larger than the ones in the datasheets. I would be surprised if you see a difference between connecting a pad with two or three 10mil traces and a solid plane. I am not sure about this point. On the NCP1421 layout and the TPS62xxx layout I placed testpoints so that I could measure the noise without the ground lead on the probe. The noise was within spec. I also did a min load to max load test and a max load to min load test and the transients were within spec. Is that the LT1616? The picture was just an example, which I found with google. My DC/DC-Converters are here: [2]http://www.ssalewski.de/PowerManager.pdf [3]http://www.ssalewski.de/DC_DC_Converter.pdf I think your L800 value (0.47u) is incorrect. (* jcl *) -- You can't create open hardware with closed EDA tools. [4]http://www.luciani.org References 1. mailto:m...@ssalewski.de 2. http://www.ssalewski.de/PowerManager.pdf 3. http://www.ssalewski.de/DC_DC_Converter.pdf 4. http://www.luciani.org/ ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Breadboard drawings with pcb?
For the PCB layout I would make a breadboard footprint (along the lines of the patterns of [1]http://tinyurl.com/5bxzgh ). (* jcl *) -- You can't create open hardware with closed EDA tools. [2]http://www.luciani.org References 1. http://tinyurl.com/5bxzgh 2. http://www.luciani.org/ ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Breadboard drawings with pcb?
On Mon, May 25, 2009 at 5:05 PM, Josef Wolf [1...@raven.inka.de wrote: On Mon, May 25, 2009 at 02:52:31PM -0400, John Luciani wrote: For the PCB layout I would make a breadboard footprint (along the lines of the patterns of *[2]http://tinyurl.com/5bxzgh *). Umm, thats not the type of breadboard I am talking about. See, this project is meant to be an introduction to electronics for total beginners. So it should be easy/fast to build and modify the circuits. So the breadboard I am talking about is the type where you push the pins of the components into little holes (organized as 100mil grid) to get them connected. I realize you are doing a different type of breadboard but the **idea** can be modified to your type of breadboard by changing the arrangement of the pads. Pads having the same number are considered connected. Take a row of square pads (all the same pad number) and connect them with thin rectangular pads (all the same pad number) and you have a connected row. Draw a silkscreen rectangle around the row of pads and you have a picture similar to a bread board row. (* jcl *) You can't create open hardware with closed EDA tools. [3]http://www.luciani.org References 1. mailto:j...@raven.inka.de 2. http://tinyurl.com/5bxzgh 3. http://www.luciani.org/ ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Outsourcing PCB layout
On Thu, May 21, 2009 at 7:10 PM, Kai-Martin Knaak [1]...@familieknaak.de wrote: On Thu, 21 May 2009 19:02:04 +, Michael Sokolov wrote: [2]http://ifctfvax.Harhan.ORG/OpenSDSL/OSDCU/OSDCU-AA.bom [3]http://ifctfvax.Harhan.ORG/OpenSDSL/OSDCU/shortbom.txt Thanks. I'd estimate, it would cost me four to five full working days to do a complete layout. Four to five full days sounds like a reasonable estimate. (* jcl *) -- You can't create open hardware with closed EDA tools. [4]http://www.luciani.org References 1. mailto:k...@familieknaak.de 2. http://ifctfvax.Harhan.ORG/OpenSDSL/OSDCU/OSDCU-AA.bom 3. http://ifctfvax.Harhan.ORG/OpenSDSL/OSDCU/shortbom.txt 4. http://www.luciani.org/ ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: collapsing or non-collapsing balls, how can i tell?
There is a new version of the naming convention, IPC-7351B Naming Convention for Standard SMT Land Patterns, that lists the various BGA types. Dual pitch has Col Pitch x Row Pitch attributes Staggered pins is BGAS A C or N suffix is added for collapsing or non-collapsing balls (* jcl *) -- You can't create open hardware with closed EDA tools. [1]http://www.luciani.org References 1. http://www.luciani.org/ ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: A not too serious PCB question
On Wed, May 13, 2009 at 10:16 AM, Stefan Salewski [1]m...@ssalewski.de wrote: Someone asked how one can build PCB boards like this: [2]http://www.mikrocontroller.net/topic/137821#new (Click on the picture too enlarge) This layout may have advantages if PCB is made mechanical, i.e. by milling machines. Was the PCB layout done to maximize the copper or did a pre-processing program generate the machine instructions to minimize milling time? (* jcl *) -- You can't create open hardware with closed EDA tools. [3]http://www.luciani.org References 1. mailto:m...@ssalewski.de 2. http://www.mikrocontroller.net/topic/137821#new 3. http://www.luciani.org/ ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: solder jumpers
I did a couple of jumpers that I believe are similar in size to the ones I had seen on an Arduino board. There is jumper and a two-way jumper. Pic attached. (* jcl *) -- You can't create open hardware with closed EDA tools. [1]http://www.luciani.org References 1. http://www.luciani.org/ attachment: jmp_top.jpg ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: LCD Elastomer contacts
Unfortunately Tim does all his work in Eagle. IIRC he was selling a PCB + LCD for apx $7 at the MIT Swap last year. A few weeks ago he mentioned to me he was working on a little display sub-assembly that used that LCD and a PIC. (* jcl *) -- You can't create open hardware with closed EDA tools. [1]http://www.luciani.org References 1. http://www.luciani.org/ ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: LCD Elastomer contacts
On Sun, May 3, 2009 at 4:15 PM, Eric Brombaugh [1]ebrombau...@cox.net wrote: John Luciani wrote: Unfortunately Tim does all his work in Eagle. IIRC he was selling a PCB + LCD for apx $7 at the MIT Swap last year. A few weeks ago he mentioned to me he was working on a little display sub-assembly that used that LCD and a PIC. I though you might know him - looks like he's in your neck of the woods. Tim is a local (Boston) dorkbot. I usually see him every couple of weeks. We were all at Barcamp Boston (BCB4 at MIT) and the Maker Revolution (Microsoft Startup Labs) last weekend. Tim is a very nice fellow and an excellent engineer. If you have any questions just send him an email. (* jcl *) -- You can't create open hardware with closed EDA tools. [2]http://www.luciani.org References 1. mailto:ebrombau...@cox.net 2. http://www.luciani.org/ ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: How to photo-export from PCB
On Tue, Apr 21, 2009 at 4:02 AM,
marcel.schmedes.ext...@diehl-aerospace.de wrote:
Hello again List,
I want to export my PCB as an real Picture, like the one on luciani.org
[1] but can't find it.
I already asked google for a hint but maybe I don't figure out the correct
Question...
Since I do those pics often I created a shell script called pcb-pic which
creates both the top and bottom pic (below).
(* jcl *)
--
You can't create open hardware with closed EDA tools.
http://www.luciani.org
# cut-here ---
#!/bin/bash
PCB=/local/pub/pcb-20081128/bin/pcb
for name in $@
do
base=${name%.*}
if [ -e $base.pcb ]
then
$PCB -x png --only-visible --ben-mode --dpi 600 $base.pcb
pngtopnm $base.png | pamscale 0.33 | cjpeg -q 90 $base_top.jpg
rm $base.png
$PCB -x png --only-visible --ben-mode --ben-flip-x --dpi 600 $base.pcb
pngtopnm $base.png | pamscale 0.33 | cjpeg -q 90 $base_bot.jpg
rm $base.png
fi
done
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