[gem5-dev] Change in gem5/gem5[develop]: tests: Dropped the i386 host tag in tests

2020-08-14 Thread Bobby R. Bruce (Gerrit) via gem5-dev
Bobby R. Bruce has submitted this change. (  
https://gem5-review.googlesource.com/c/public/gem5/+/32596 )


Change subject: tests: Dropped the i386 host tag in tests
..

tests: Dropped the i386 host tag in tests

Issue-on: https://gem5.atlassian.net/browse/GEM5-532
Change-Id: Ifee50d59c65f8b460248508688232d9253c040b6
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/32596
Reviewed-by: Giacomo Travaglini 
Reviewed-by: Jason Lowe-Power 
Maintainer: Giacomo Travaglini 
Tested-by: kokoro 
---
M ext/testlib/configuration.py
M tests/gem5/.testignore
2 files changed, 5 insertions(+), 64 deletions(-)

Approvals:
  Jason Lowe-Power: Looks good to me, approved
  Giacomo Travaglini: Looks good to me, approved; Looks good to me, approved
  kokoro: Regressions pass



diff --git a/ext/testlib/configuration.py b/ext/testlib/configuration.py
index cebb98f..4e2b695 100644
--- a/ext/testlib/configuration.py
+++ b/ext/testlib/configuration.py
@@ -247,7 +247,6 @@

 constants.host_isa_tag_type = 'host'
 constants.host_x86_64_tag = 'x86_64'
-constants.host_i386_tag = 'i386'
 constants.host_arm_tag = 'aarch64'

 constants.supported_tags = {
@@ -271,7 +270,6 @@
 ),
 constants.host_isa_tag_type: (
 constants.host_x86_64_tag,
-constants.host_i386_tag,
 constants.host_arm_tag,
 ),
 }
@@ -280,11 +278,11 @@
 # case where host ISA and target ISA need to coincide
 constants.target_host = {
 constants.arm_tag   : (constants.host_arm_tag,),
-constants.x86_tag   : (constants.host_x86_64_tag,  
constants.host_i386_tag),
-constants.sparc_tag : (constants.host_x86_64_tag,  
constants.host_i386_tag),
-constants.riscv_tag : (constants.host_x86_64_tag,  
constants.host_i386_tag),
-constants.mips_tag  : (constants.host_x86_64_tag,  
constants.host_i386_tag),
-constants.power_tag : (constants.host_x86_64_tag,  
constants.host_i386_tag),

+constants.x86_tag   : (constants.host_x86_64_tag,),
+constants.sparc_tag : (constants.host_x86_64_tag,),
+constants.riscv_tag : (constants.host_x86_64_tag,),
+constants.mips_tag  : (constants.host_x86_64_tag,),
+constants.power_tag : (constants.host_x86_64_tag,),
 constants.null_tag  : (None,)
 }

diff --git a/tests/gem5/.testignore b/tests/gem5/.testignore
index 405f005..dfca4e9 100644
--- a/tests/gem5/.testignore
+++ b/tests/gem5/.testignore
@@ -59,39 +59,6 @@
 test-insttest-rv64i-linux-DerivO3CPU-RISCV-aarch64-fast
 test-insttest-linux-AtomicSimpleCPU-SPARC-aarch64-fast
 test-insttest-linux-TimingSimpleCPU-SPARC-aarch64-fast
-test-insttest-rv64a-linux-MinorCPU-RISCV-i386-opt
-test-insttest-rv64c-linux-MinorCPU-RISCV-i386-opt
-test-insttest-rv64d-linux-MinorCPU-RISCV-i386-opt
-test-insttest-rv64f-linux-MinorCPU-RISCV-i386-opt
-test-insttest-rv64i-linux-MinorCPU-RISCV-i386-opt
-test-insttest-rv64m-linux-MinorCPU-RISCV-i386-opt
-test-insttest-rv64i-linux-AtomicSimpleCPU-RISCV-i386-opt
-test-insttest-rv64i-linux-TimingSimpleCPU-RISCV-i386-opt
-test-insttest-rv64i-linux-DerivO3CPU-RISCV-i386-opt
-test-insttest-linux-AtomicSimpleCPU-SPARC-i386-opt
-test-insttest-linux-TimingSimpleCPU-SPARC-i386-opt
-test-insttest-rv64a-linux-MinorCPU-RISCV-i386-debug
-test-insttest-rv64c-linux-MinorCPU-RISCV-i386-debug
-test-insttest-rv64d-linux-MinorCPU-RISCV-i386-debug
-test-insttest-rv64f-linux-MinorCPU-RISCV-i386-debug
-test-insttest-rv64i-linux-MinorCPU-RISCV-i386-debug
-test-insttest-rv64m-linux-MinorCPU-RISCV-i386-debug
-test-insttest-rv64i-linux-AtomicSimpleCPU-RISCV-i386-debug
-test-insttest-rv64i-linux-TimingSimpleCPU-RISCV-i386-debug
-test-insttest-rv64i-linux-DerivO3CPU-RISCV-i386-debug
-test-insttest-linux-AtomicSimpleCPU-SPARC-i386-debug
-test-insttest-linux-TimingSimpleCPU-SPARC-i386-debug
-test-insttest-rv64a-linux-MinorCPU-RISCV-i386-fast
-test-insttest-rv64c-linux-MinorCPU-RISCV-i386-fast
-test-insttest-rv64d-linux-MinorCPU-RISCV-i386-fast
-test-insttest-rv64f-linux-MinorCPU-RISCV-i386-fast
-test-insttest-rv64i-linux-MinorCPU-RISCV-i386-fast
-test-insttest-rv64m-linux-MinorCPU-RISCV-i386-fast
-test-insttest-rv64i-linux-AtomicSimpleCPU-RISCV-i386-fast
-test-insttest-rv64i-linux-TimingSimpleCPU-RISCV-i386-fast
-test-insttest-rv64i-linux-DerivO3CPU-RISCV-i386-fast
-test-insttest-linux-AtomicSimpleCPU-SPARC-i386-fast
-test-insttest-linux-TimingSimpleCPU-SPARC-i386-fast
 test-hello-linux-MinorCPU-RISCV-x86_64-debug
 test-hello-linux-TimingSimpleCPU-SPARC-x86_64-debug
 test-hello-linux-AtomicSimpleCPU-SPARC-x86_64-debug
@@ -128,24 +95,6 @@
 test-hello-linux-TimingSimpleCPU-MIPS-aarch64-opt
 test-hello-linux-AtomicSimpleCPU-MIPS-aarch64-opt
 test-hello-linux-DerivO3CPU-MIPS-aarch64-opt
-test-hello-linux-MinorCPU-RISCV-i386-debug
-test-hello-linux-TimingSimpleCPU-SPARC-i386-debug
-test-hello-linux-AtomicSimpleCPU-SPARC-i386-debug

[gem5-dev] Change in gem5/gem5[develop]: mem-cache: Prefetcher _tlbs should be instance variable.

2020-08-14 Thread ZHENGRONG WANG (Gerrit) via gem5-dev
ZHENGRONG WANG has uploaded this change for review. (  
https://gem5-review.googlesource.com/c/public/gem5/+/32714 )



Change subject: mem-cache: Prefetcher _tlbs should be instance variable.
..

mem-cache: Prefetcher _tlbs should be instance variable.

The current _tlbs in BasePrefetcher is class variable,
which is shared across all instances. This commit changes
that to instance variable, which is unique to each instance.

This enables multiple prefetchers for multi-cpu, each
with its own TLB.

Change-Id: Ia04d7b5c1582d9b3a5da9f55df02ed76e4c42cf2
---
M src/mem/cache/prefetch/Prefetcher.py
1 file changed, 5 insertions(+), 2 deletions(-)



diff --git a/src/mem/cache/prefetch/Prefetcher.py  
b/src/mem/cache/prefetch/Prefetcher.py

index f131ccf..233a3bd 100644
--- a/src/mem/cache/prefetch/Prefetcher.py
+++ b/src/mem/cache/prefetch/Prefetcher.py
@@ -99,11 +99,14 @@
 if len(probeNames) <= 0:
 raise TypeError("probeNames must have at least one element")
 self.addEvent(HWPProbeEvent(self, simObj, *probeNames))
-_tlbs = []
+
 def registerTLB(self, simObj):
 if not isinstance(simObj, SimObject):
 raise TypeError("argument must be a SimObject type")
-self._tlbs.append(simObj)
+try:
+self._tlbs.append(simObj)
+except AttributeError:
+self._tlbs = [simObj]

 class MultiPrefetcher(BasePrefetcher):
 type = 'MultiPrefetcher'

--
To view, visit https://gem5-review.googlesource.com/c/public/gem5/+/32714
To unsubscribe, or for help writing mail filters, visit  
https://gem5-review.googlesource.com/settings


Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: Ia04d7b5c1582d9b3a5da9f55df02ed76e4c42cf2
Gerrit-Change-Number: 32714
Gerrit-PatchSet: 1
Gerrit-Owner: ZHENGRONG WANG 
Gerrit-MessageType: newchange
___
gem5-dev mailing list -- gem5-dev@gem5.org
To unsubscribe send an email to gem5-dev-le...@gem5.org
%(web_page_url)slistinfo%(cgiext)s/%(_internal_name)s

[gem5-dev] Change in gem5/gem5[develop]: ext: Add timing indications to every TestCase

2020-08-14 Thread Giacomo Travaglini (Gerrit) via gem5-dev
Giacomo Travaglini has uploaded this change for review. (  
https://gem5-review.googlesource.com/c/public/gem5/+/32653 )



Change subject: ext: Add timing indications to every TestCase
..

ext: Add timing indications to every TestCase

The log_call helper is now accepting a time parameter (dictionary). If
the param is not None, the function will fill the timing indications
(user and system time) for the TestCase.

There are some TestCases whose user time is not of our interest; for
example we don't really care about the cpu time of a stdout diff
(MatchStdout tests). In those cases the resulting cpu time in the
generated JUnit file (results.xml) will be 0.

JIRA: https://gem5.atlassian.net/browse/GEM5-548

Change-Id: I53c1b59f8ad93900aeac06197e39189c00a9053c
Signed-off-by: Giacomo Travaglini 
---
M ext/testlib/helper.py
M ext/testlib/result.py
M ext/testlib/runner.py
M ext/testlib/wrappers.py
M tests/gem5/fixture.py
M tests/gem5/suite.py
6 files changed, 43 insertions(+), 6 deletions(-)



diff --git a/ext/testlib/helper.py b/ext/testlib/helper.py
index 01ca539..1cb13f0 100644
--- a/ext/testlib/helper.py
+++ b/ext/testlib/helper.py
@@ -132,7 +132,7 @@
 TimedWaitPID.install()

 #TODO Tear out duplicate logic from the sandbox IOManager
-def log_call(logger, command, *popenargs, **kwargs):
+def log_call(logger, command, time, *popenargs, **kwargs):
 '''
 Calls the given process and automatically logs the command and output.

@@ -186,6 +186,12 @@
 retval = p.wait()
 stdout_thread.join()
 stderr_thread.join()
+
+if time is not None and TimedWaitPID.has_time_for_pid(p.pid):
+resource_usage = TimedWaitPID.get_time_for_pid(p.pid)
+time['user_time'] = resource_usage.user_time
+time['system_time'] = resource_usage.system_time
+
 # Return the return exit code of the process.
 if retval != 0:
 raise subprocess.CalledProcessError(retval, cmdstr)
@@ -482,7 +488,8 @@
 (_, tfname) = tempfile.mkstemp(dir=os.path.dirname(out_file),  
text=True)

 with open(tfname, 'r+') as tempfile_:
 try:
-log_call(logger, ['diff', out_file, ref_file],  
stdout=tempfile_)

+log_call(logger, ['diff', out_file, ref_file],
+time=None, stdout=tempfile_)
 except OSError:
 # Likely signals that diff does not exist on this system.  
fallback

 # to difflib
diff --git a/ext/testlib/result.py b/ext/testlib/result.py
index 2d2c506..5c60342 100644
--- a/ext/testlib/result.py
+++ b/ext/testlib/result.py
@@ -1,3 +1,15 @@
+# Copyright (c) 2020 ARM Limited
+# All rights reserved
+#
+# The license below extends only to copyright in the software and shall
+# not be construed as granting a license to any other intellectual
+# property including but not limited to intellectual property relating
+# to a hardware implementation of the functionality of the software
+# licensed hereunder.  You may use the software subject to the license
+# terms below provided that you ensure that this notice is replicated
+# unmodified and in its entirety in all distributions of the software,
+# modified or unmodified, in source code or in binary form.
+#
 # Copyright (c) 2017 Mark D. Hill and David A. Wood
 # All rights reserved.
 #
@@ -60,6 +72,10 @@
 def unsuccessful(self):
 return self._metadata.result.value != state.Result.Passed

+@property
+def time(self):
+return self._metadata.time
+

 class InternalTestResult(_CommonMetadataMixin):
 def __init__(self, obj, suite, directory):
@@ -258,6 +274,7 @@
  # TODO JUnit expects class of test.. add as test metadata.
 XMLAttribute('classname', str(test_result.uid)),
 XMLAttribute('status', str(test_result.result)),
+XMLAttribute('time', str(test_result.time["user_time"])),
 ]

 # TODO JUnit expects a message for the reason a test was
diff --git a/ext/testlib/runner.py b/ext/testlib/runner.py
index 7425e79..c023490 100644
--- a/ext/testlib/runner.py
+++ b/ext/testlib/runner.py
@@ -78,6 +78,8 @@
 self.test = test
 self.suite = suite
 self.log = log.Log(test)
+self.time = {
+"user_time" : 0, "system_time" : 0}

 @helper.cacheresult
 def _fixtures(self):
@@ -150,6 +152,8 @@
 else:
 self.testable.result = Result(Result.Passed)

+self.testable.time = test_params.time
+

 class SuiteRunner(RunnerPattern):
 def test(self):
diff --git a/ext/testlib/wrappers.py b/ext/testlib/wrappers.py
index e919702..b2b887b 100644
--- a/ext/testlib/wrappers.py
+++ b/ext/testlib/wrappers.py
@@ -1,4 +1,4 @@
-# Copyright (c) 2019 ARM Limited
+# Copyright (c) 2019-2020 ARM Limited
 # All rights reserved
 #
 # The license below extends only to copyright in the software and shall
@@ -124,6 +124,14 @@
 def runner(self):
 return self.obj.runner

+

[gem5-dev] Change in gem5/gem5[develop]: ext: Monkeypatch os.waitpid to extract CPU time from subprocess

2020-08-14 Thread Giacomo Travaglini (Gerrit) via gem5-dev

Hello Richard Cooper,

I'd like you to do a code review. Please visit

https://gem5-review.googlesource.com/c/public/gem5/+/32652

to review the following change.


Change subject: ext: Monkeypatch os.waitpid to extract CPU time from  
subprocess

..

ext: Monkeypatch os.waitpid to extract CPU time from subprocess

Added utility class `TimedWaitPID` which monkey-patches os.waitpid()
with a functor that has the same signature, but calls os.wait4()
instead. This allows the process's user and system CPU time to be
obtained from the OS when using APIs (such as subprocess) which use
os.waitpid() internally.

The process CPU time is stored within the functor and can be read back
later by calling TimedWaitPID.get_time_for_pid().

JIRA: https://gem5.atlassian.net/browse/GEM5-548

Change-Id: I9ebe9ca1241a4f28c90ad31f672f32ac52786664
---
M ext/testlib/helper.py
1 file changed, 90 insertions(+), 1 deletion(-)



diff --git a/ext/testlib/helper.py b/ext/testlib/helper.py
index ff83409..01ca539 100644
--- a/ext/testlib/helper.py
+++ b/ext/testlib/helper.py
@@ -1,3 +1,15 @@
+# Copyright (c) 2020 ARM Limited
+# All rights reserved
+#
+# The license below extends only to copyright in the software and shall
+# not be construed as granting a license to any other intellectual
+# property including but not limited to intellectual property relating
+# to a hardware implementation of the functionality of the software
+# licensed hereunder.  You may use the software subject to the license
+# terms below provided that you ensure that this notice is replicated
+# unmodified and in its entirety in all distributions of the software,
+# modified or unmodified, in source code or in binary form.
+#
 # Copyright (c) 2017 Mark D. Hill and David A. Wood
 # All rights reserved.
 #
@@ -29,7 +41,7 @@
 '''
 Helper classes for writing tests with this test library.
 '''
-from collections import MutableSet
+from collections import MutableSet, namedtuple

 import difflib
 import errno
@@ -42,6 +54,83 @@
 import threading
 import time

+class TimedWaitPID(object):
+"""Utility to monkey-patch os.waitpid() with os.wait4().
+
+This allows process usage time to be obtained directly from the OS
+when used with APIs, such as `subprocess`, which use os.waitpid to
+join child processes.
+
+The resource usage data from os.wait4() is stored in a functor and
+can be obtained using the get_time_for_pid() method.
+
+To avoid unbounded memory usage, the time record is deleted after
+it is read.
+
+"""
+TimeRecord = namedtuple( "_TimeRecord", "user_time system_time" )
+
+class Wrapper(object):
+def __init__(self):
+self._time_for_pid = {}
+self._access_lock = threading.Lock()
+
+def __call__(self, pid, options):
+pid, status, resource_usage = os.wait4(pid, options)
+with self._access_lock:
+self._time_for_pid[pid] = (
+TimedWaitPID.TimeRecord(
+resource_usage.ru_utime,
+resource_usage.ru_stime
+)
+)
+return (pid, status)
+
+def has_time_for_pid(self, pid):
+with self._access_lock:
+return pid in self._time_for_pid
+
+def get_time_for_pid(self, pid):
+with self._access_lock:
+if pid not in self._time_for_pid:
+raise Exception("No resource usage for pid  
{}".format(pid))

+time_for_pid = self._time_for_pid[pid]
+del self._time_for_pid[pid]
+return time_for_pid
+
+_wrapper = None
+_wrapper_lock = threading.Lock()
+_original_os_waitpid = None
+
+@staticmethod
+def install():
+with TimedWaitPID._wrapper_lock:
+if TimedWaitPID._wrapper is None:
+TimedWaitPID._wrapper = TimedWaitPID.Wrapper()
+if TimedWaitPID._original_os_waitpid is None :
+TimedWaitPID._original_os_waitpid = os.waitpid
+os.waitpid = TimedWaitPID._wrapper
+
+@staticmethod
+def restore():
+with TimedWaitPID._wrapper_lock:
+if TimedWaitPID._original_os_waitpid is not None :
+os.waitpid = TimedWaitPID._original_os_waitpid
+TimedWaitPID._original_os_waitpid = None
+
+@staticmethod
+def has_time_for_pid(pid):
+with TimedWaitPID._wrapper_lock:
+return TimedWaitPID._wrapper.has_time_for_pid(pid)
+
+@staticmethod
+def get_time_for_pid(pid):
+with TimedWaitPID._wrapper_lock:
+return TimedWaitPID._wrapper.get_time_for_pid(pid)
+
+# Patch os.waitpid()
+TimedWaitPID.install()
+
 #TODO Tear out duplicate logic from the sandbox IOManager
 def log_call(logger, command, *popenargs, **kwargs):
 '''

--
To view, visit 

[gem5-dev] Change in gem5/gem5[develop]: arch-arm: Use isSecure variable for Stage2Lookup

2020-08-14 Thread Giacomo Travaglini (Gerrit) via gem5-dev
Giacomo Travaglini has submitted this change. (  
https://gem5-review.googlesource.com/c/public/gem5/+/32639 )


Change subject: arch-arm: Use isSecure variable for Stage2Lookup
..

arch-arm: Use isSecure variable for Stage2Lookup

TLB entries are tagged with the security state of the cpu instead
of the security attribute of the physical address

Change-Id: I728ba1c841de1ec6c1ee03aee012b185c968d078
Signed-off-by: Giacomo Travaglini 
Reviewed-by: Nikos Nikoleris 
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/32639
Tested-by: kokoro 
---
M src/arch/arm/tlb.cc
1 file changed, 1 insertion(+), 1 deletion(-)

Approvals:
  Nikos Nikoleris: Looks good to me, approved
  Giacomo Travaglini: Looks good to me, approved
  kokoro: Regressions pass



diff --git a/src/arch/arm/tlb.cc b/src/arch/arm/tlb.cc
index dc4296d..e8bb718 100644
--- a/src/arch/arm/tlb.cc
+++ b/src/arch/arm/tlb.cc
@@ -1655,7 +1655,7 @@
 fault = checkPermissions(s1Te, req, mode);
 if (stage2Req & (fault == NoFault)) {
 Stage2LookUp *s2Lookup = new Stage2LookUp(this, stage2Tlb,  
*s1Te,

-req, translation, mode, timing, functional, !(s1Te->ns),
+req, translation, mode, timing, functional, isSecure,
 curTranType);
 fault = s2Lookup->getTe(tc, mergeTe);
 if (s2Lookup->isComplete()) {

--
To view, visit https://gem5-review.googlesource.com/c/public/gem5/+/32639
To unsubscribe, or for help writing mail filters, visit  
https://gem5-review.googlesource.com/settings


Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: I728ba1c841de1ec6c1ee03aee012b185c968d078
Gerrit-Change-Number: 32639
Gerrit-PatchSet: 2
Gerrit-Owner: Giacomo Travaglini 
Gerrit-Reviewer: Giacomo Travaglini 
Gerrit-Reviewer: Nikos Nikoleris 
Gerrit-Reviewer: kokoro 
Gerrit-MessageType: merged
___
gem5-dev mailing list -- gem5-dev@gem5.org
To unsubscribe send an email to gem5-dev-le...@gem5.org
%(web_page_url)slistinfo%(cgiext)s/%(_internal_name)s

[gem5-dev] Change in gem5/gem5[develop]: arch-arm: Disable HVC when SCR_EL3.HCE is 0

2020-08-14 Thread Giacomo Travaglini (Gerrit) via gem5-dev
Giacomo Travaglini has submitted this change. (  
https://gem5-review.googlesource.com/c/public/gem5/+/32636 )


Change subject: arch-arm: Disable HVC when SCR_EL3.HCE is 0
..

arch-arm: Disable HVC when SCR_EL3.HCE is 0

This was already implemented for AArch32 but it had been wrongly
removed by:

https://gem5-review.googlesource.com/c/public/gem5/+/31394

Change-Id: Ida303d5ccb5d8568ca4e7faaedf9b4efd1cd88b5
Signed-off-by: Giacomo Travaglini 
Reviewed-by: Nikos Nikoleris 
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/32636
Tested-by: kokoro 
---
M src/arch/arm/isa/insts/misc.isa
1 file changed, 4 insertions(+), 1 deletion(-)

Approvals:
  Nikos Nikoleris: Looks good to me, approved
  Giacomo Travaglini: Looks good to me, approved
  kokoro: Regressions pass



diff --git a/src/arch/arm/isa/insts/misc.isa  
b/src/arch/arm/isa/insts/misc.isa

index 3ee0d61..5439baa 100644
--- a/src/arch/arm/isa/insts/misc.isa
+++ b/src/arch/arm/isa/insts/misc.isa
@@ -119,12 +119,15 @@
 exec_output += PredOpExecute.subst(smcIop)

 hvcCode = '''
+HCR  hcr  = Hcr;
 CPSR cpsr = Cpsr;
+SCR  scr  = Scr;

 // Filter out the various cases where this instruction isn't defined
 if (!FullSystem || !ArmSystem::haveVirtualization(xc->tcBase()) ||
 (cpsr.mode == MODE_USER) ||
-(isSecure(xc->tcBase()) && !IsSecureEL2Enabled(xc->tcBase( {
+(isSecure(xc->tcBase()) && !IsSecureEL2Enabled(xc->tcBase())) ||
+(ArmSystem::haveSecurity(xc->tcBase()) ? !scr.hce : hcr.hcd)) {
 fault = disabledFault();
 } else {
 fault = std::make_shared(machInst, imm);

--
To view, visit https://gem5-review.googlesource.com/c/public/gem5/+/32636
To unsubscribe, or for help writing mail filters, visit  
https://gem5-review.googlesource.com/settings


Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: Ida303d5ccb5d8568ca4e7faaedf9b4efd1cd88b5
Gerrit-Change-Number: 32636
Gerrit-PatchSet: 2
Gerrit-Owner: Giacomo Travaglini 
Gerrit-Reviewer: Giacomo Travaglini 
Gerrit-Reviewer: Nikos Nikoleris 
Gerrit-Reviewer: kokoro 
Gerrit-MessageType: merged
___
gem5-dev mailing list -- gem5-dev@gem5.org
To unsubscribe send an email to gem5-dev-le...@gem5.org
%(web_page_url)slistinfo%(cgiext)s/%(_internal_name)s

[gem5-dev] Change in gem5/gem5[develop]: arch-arm: VSTTBR_EL2 doesn't contain a VMID field

2020-08-14 Thread Giacomo Travaglini (Gerrit) via gem5-dev
Giacomo Travaglini has submitted this change. (  
https://gem5-review.googlesource.com/c/public/gem5/+/32637 )


Change subject: arch-arm: VSTTBR_EL2 doesn't contain a VMID field
..

arch-arm: VSTTBR_EL2 doesn't contain a VMID field

Change-Id: Ia6e14b509d7016020af9c85941e7b2d89dcdd359
Signed-off-by: Giacomo Travaglini 
Reviewed-by: Nikos Nikoleris 
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/32637
Reviewed-by: Richard Cooper 
Tested-by: kokoro 
---
M src/arch/arm/tlb.cc
1 file changed, 1 insertion(+), 3 deletions(-)

Approvals:
  Nikos Nikoleris: Looks good to me, approved
  Richard Cooper: Looks good to me, but someone else must approve
  Giacomo Travaglini: Looks good to me, approved
  kokoro: Regressions pass



diff --git a/src/arch/arm/tlb.cc b/src/arch/arm/tlb.cc
index 4d54b54..dc4296d 100644
--- a/src/arch/arm/tlb.cc
+++ b/src/arch/arm/tlb.cc
@@ -1422,9 +1422,7 @@
 scr = tc->readMiscReg(MISCREG_SCR_EL3);
 isPriv = aarch64EL != EL0;
 if (haveVirtualization) {
-uint64_t vttbr = isSecure? tc->readMiscReg(MISCREG_VSTTBR_EL2):
-   tc->readMiscReg(MISCREG_VTTBR_EL2);
-vmid   = bits(vttbr, 55, 48);
+vmid = bits(tc->readMiscReg(MISCREG_VTTBR_EL2), 55, 48);
 isHyp = aarch64EL == EL2;
 isHyp |= tranType & HypMode;
 isHyp &= (tranType & S1S2NsTran) == 0;

--
To view, visit https://gem5-review.googlesource.com/c/public/gem5/+/32637
To unsubscribe, or for help writing mail filters, visit  
https://gem5-review.googlesource.com/settings


Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: Ia6e14b509d7016020af9c85941e7b2d89dcdd359
Gerrit-Change-Number: 32637
Gerrit-PatchSet: 2
Gerrit-Owner: Giacomo Travaglini 
Gerrit-Reviewer: Giacomo Travaglini 
Gerrit-Reviewer: Nikos Nikoleris 
Gerrit-Reviewer: Richard Cooper 
Gerrit-Reviewer: kokoro 
Gerrit-MessageType: merged
___
gem5-dev mailing list -- gem5-dev@gem5.org
To unsubscribe send an email to gem5-dev-le...@gem5.org
%(web_page_url)slistinfo%(cgiext)s/%(_internal_name)s

[gem5-dev] Change in gem5/gem5[develop]: arch-arm: Fix SoftwareStep::debugExceptionReturnSS

2020-08-14 Thread Giacomo Travaglini (Gerrit) via gem5-dev
Giacomo Travaglini has submitted this change. (  
https://gem5-review.googlesource.com/c/public/gem5/+/32634 )


Change subject: arch-arm: Fix SoftwareStep::debugExceptionReturnSS
..

arch-arm: Fix SoftwareStep::debugExceptionReturnSS

debugExceptionReturnSS is called on an ERET instruction to
check for software step. The method was not using the
SPSR.width and it was relying on the more generic ELIs32 to
check the execution mode of the destination EL.

This is not only an efficiency problem: the helper might not work
when returning to EL0. In general it is not possible to
understand if EL0 is using AArch32 or AArch64 if the current
EL is not EL0 and EL1 is using AArch64.

This is instead visible by inspecting the spsr.width during the
execution of an ERET instruction

Change-Id: Ibc5a43633d0020139f2c0e372959a3ab4880da6e
Signed-off-by: Giacomo Travaglini 
Reviewed-by: Richard Cooper 
Reviewed-by: Nikos Nikoleris 
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/32634
Tested-by: kokoro 
---
M src/arch/arm/insts/static_inst.cc
M src/arch/arm/self_debug.cc
M src/arch/arm/self_debug.hh
3 files changed, 4 insertions(+), 6 deletions(-)

Approvals:
  Richard Cooper: Looks good to me, approved
  Giacomo Travaglini: Looks good to me, approved
  kokoro: Regressions pass



diff --git a/src/arch/arm/insts/static_inst.cc  
b/src/arch/arm/insts/static_inst.cc

index 2281491..e55894c 100644
--- a/src/arch/arm/insts/static_inst.cc
+++ b/src/arch/arm/insts/static_inst.cc
@@ -1194,7 +1194,7 @@

 SelfDebug *sd = ArmISA::ISA::getSelfDebug(tc);
 SoftwareStep *ss = sd->getSstep();
-new_cpsr.ss = ss->debugExceptionReturnSS(tc, spsr, dest,  
new_cpsr.width);

+new_cpsr.ss = ss->debugExceptionReturnSS(tc, spsr, dest);

 return new_cpsr;
 }
diff --git a/src/arch/arm/self_debug.cc b/src/arch/arm/self_debug.cc
index ef6ad63..21ad84c 100644
--- a/src/arch/arm/self_debug.cc
+++ b/src/arch/arm/self_debug.cc
@@ -643,7 +643,7 @@

 bool
 SoftwareStep::debugExceptionReturnSS(ThreadContext *tc, CPSR spsr,
- ExceptionLevel dest, bool aarch32)
+ ExceptionLevel dest)
 {
 bool SS_bit = false;
 bool enabled_src = false;
@@ -652,9 +652,7 @@

 bool enabled_dst = false;
 bool secure = isSecureBelowEL3(tc) || dest == EL3;
-//CPSR cpsr = tc->readMiscReg(MISCREG_CPSR);
-//if (cpsr.width) {
-if (ELIs32(tc, dest)) {
+if (spsr.width) {
 enabled_dst = conf->isDebugEnabledForEL32(tc, dest, secure,
   spsr.d == 1);
 } else {
diff --git a/src/arch/arm/self_debug.hh b/src/arch/arm/self_debug.hh
index 953a2dc..7a96d42 100644
--- a/src/arch/arm/self_debug.hh
+++ b/src/arch/arm/self_debug.hh
@@ -210,7 +210,7 @@
 {}

 bool debugExceptionReturnSS(ThreadContext *tc, CPSR spsr,
-ExceptionLevel dest, bool aarch32);
+ExceptionLevel dest);
 bool advanceSS(ThreadContext *tc);

 inline void

--
To view, visit https://gem5-review.googlesource.com/c/public/gem5/+/32634
To unsubscribe, or for help writing mail filters, visit  
https://gem5-review.googlesource.com/settings


Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: Ibc5a43633d0020139f2c0e372959a3ab4880da6e
Gerrit-Change-Number: 32634
Gerrit-PatchSet: 2
Gerrit-Owner: Giacomo Travaglini 
Gerrit-Reviewer: Giacomo Travaglini 
Gerrit-Reviewer: Nikos Nikoleris 
Gerrit-Reviewer: Richard Cooper 
Gerrit-Reviewer: kokoro 
Gerrit-MessageType: merged
___
gem5-dev mailing list -- gem5-dev@gem5.org
To unsubscribe send an email to gem5-dev-le...@gem5.org
%(web_page_url)slistinfo%(cgiext)s/%(_internal_name)s

[gem5-dev] Change in gem5/gem5[develop]: arch-arm: Fix physmem NS attribute in VMSAv8-32 descriptors

2020-08-14 Thread Giacomo Travaglini (Gerrit) via gem5-dev
Giacomo Travaglini has submitted this change. (  
https://gem5-review.googlesource.com/c/public/gem5/+/32638 )


Change subject: arch-arm: Fix physmem NS attribute in VMSAv8-32 descriptors
..

arch-arm: Fix physmem NS attribute in VMSAv8-32 descriptors

The NS field in PTEs descriptors is tagging Secure/Non-secure physical
memory (pages). This field is relevant in Secure state only:

While in Secure state, software can access both the Secure and
Non-secure physical address spaces, software in Non-secure state can
only access Non-secure memory; the NS bit is hence discarded/treated as
1.

This patch is aligning VMSAv8-32 with VMSAv8-64, which is tagging the
pointed memory as Non-secure in case of a Non-secure lookup.

The old behaviour was probably not leading to incorrect execution:
once a translation completes, the security flag in the memory request
is chcked against the security state of the cpu (and not only relying
on the NS bit in the TLB entry)

if (isSecure && !te->ns) {
req->setFlags(Request::SECURE);
}

so we were already forbidding secure accesses from non secure world
if NS = 0.

It is however misleading in the debug logs to see tlb entries with
NSTID = 1 and NS = 0.

Change-Id: I1f964069f88c33fb14362dd4101cb22538907226
Signed-off-by: Giacomo Travaglini 
Reviewed-by: Nikos Nikoleris 
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/32638
Reviewed-by: Richard Cooper 
Tested-by: kokoro 
---
M src/arch/arm/table_walker.hh
1 file changed, 1 insertion(+), 1 deletion(-)

Approvals:
  Nikos Nikoleris: Looks good to me, approved
  Richard Cooper: Looks good to me, but someone else must approve
  Giacomo Travaglini: Looks good to me, approved
  kokoro: Regressions pass



diff --git a/src/arch/arm/table_walker.hh b/src/arch/arm/table_walker.hh
index 9dd2c2b..bf81248 100644
--- a/src/arch/arm/table_walker.hh
+++ b/src/arch/arm/table_walker.hh
@@ -229,7 +229,7 @@
  */
 bool secure(bool have_security, WalkerState *currState) const
 {
-if (have_security) {
+if (have_security && currState->secureLookup) {
 if (type() == PageTable)
 return !bits(data, 3);
 else

--
To view, visit https://gem5-review.googlesource.com/c/public/gem5/+/32638
To unsubscribe, or for help writing mail filters, visit  
https://gem5-review.googlesource.com/settings


Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: I1f964069f88c33fb14362dd4101cb22538907226
Gerrit-Change-Number: 32638
Gerrit-PatchSet: 2
Gerrit-Owner: Giacomo Travaglini 
Gerrit-Reviewer: Giacomo Travaglini 
Gerrit-Reviewer: Nikos Nikoleris 
Gerrit-Reviewer: Richard Cooper 
Gerrit-Reviewer: kokoro 
Gerrit-MessageType: merged
___
gem5-dev mailing list -- gem5-dev@gem5.org
To unsubscribe send an email to gem5-dev-le...@gem5.org
%(web_page_url)slistinfo%(cgiext)s/%(_internal_name)s

[gem5-dev] Change in gem5/gem5[develop]: arch-arm: Fix XN in TLB permissions

2020-08-14 Thread Giacomo Travaglini (Gerrit) via gem5-dev
Giacomo Travaglini has submitted this change. (  
https://gem5-review.googlesource.com/c/public/gem5/+/32635 )


Change subject: arch-arm: Fix XN in TLB permissions
..

arch-arm: Fix XN in TLB permissions

The SIF condition check should be logically ORed with the TLB
entry XN attribute, instead of overriding it.

Change-Id: I70b38d97bbdc82b9f385d40ad06546785fc2c5bb
Signed-off-by: Giacomo Travaglini 
Reviewed-by: Nikos Nikoleris 
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/32635
Tested-by: kokoro 
---
M src/arch/arm/tlb.cc
1 file changed, 2 insertions(+), 1 deletion(-)

Approvals:
  Nikos Nikoleris: Looks good to me, approved
  Giacomo Travaglini: Looks good to me, approved
  kokoro: Regressions pass



diff --git a/src/arch/arm/tlb.cc b/src/arch/arm/tlb.cc
index f67475b..4d54b54 100644
--- a/src/arch/arm/tlb.cc
+++ b/src/arch/arm/tlb.cc
@@ -833,7 +833,8 @@
 bool w = is_write;
 bool x = is_fetch;

-xn = ArmSystem::haveEL(tc, EL3) && isSecure && te->ns && scr.sif;
+if (ArmSystem::haveEL(tc, EL3) && isSecure && te->ns && scr.sif)
+xn = true;

 // grant_read is used for faults from an atomic instruction that
 // both reads and writes from a memory location. From a ISS point

--
To view, visit https://gem5-review.googlesource.com/c/public/gem5/+/32635
To unsubscribe, or for help writing mail filters, visit  
https://gem5-review.googlesource.com/settings


Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: I70b38d97bbdc82b9f385d40ad06546785fc2c5bb
Gerrit-Change-Number: 32635
Gerrit-PatchSet: 2
Gerrit-Owner: Giacomo Travaglini 
Gerrit-Reviewer: Giacomo Travaglini 
Gerrit-Reviewer: Nikos Nikoleris 
Gerrit-Reviewer: kokoro 
Gerrit-MessageType: merged
___
gem5-dev mailing list -- gem5-dev@gem5.org
To unsubscribe send an email to gem5-dev-le...@gem5.org
%(web_page_url)slistinfo%(cgiext)s/%(_internal_name)s

[gem5-dev] Change in gem5/gem5[develop]: dev: Use lambdas instead of the Callback type for serial devices.

2020-08-14 Thread Gabe Black (Gerrit) via gem5-dev
Gabe Black has uploaded this change for review. (  
https://gem5-review.googlesource.com/c/public/gem5/+/32647 )



Change subject: dev: Use lambdas instead of the Callback type for serial  
devices.

..

dev: Use lambdas instead of the Callback type for serial devices.

Issue-on: https://gem5.atlassian.net/browse/GEM5-698
Change-Id: Idb87fa0b90d14981fd61f997285f61b2ef304227
---
M src/dev/serial/serial.cc
M src/dev/serial/serial.hh
M src/dev/serial/uart.cc
M src/dev/serial/uart.hh
M src/dev/virtio/console.cc
M src/dev/virtio/console.hh
6 files changed, 16 insertions(+), 23 deletions(-)



diff --git a/src/dev/serial/serial.cc b/src/dev/serial/serial.cc
index ac1f261..366c388 100644
--- a/src/dev/serial/serial.cc
+++ b/src/dev/serial/serial.cc
@@ -41,8 +41,7 @@
 #include "params/SerialDevice.hh"
 #include "params/SerialNullDevice.hh"

-SerialDevice::SerialDevice(const SerialDeviceParams *p)
-: SimObject(p), interfaceCallback(nullptr)
+SerialDevice::SerialDevice(const SerialDeviceParams *p) : SimObject(p)
 {
 }

@@ -51,14 +50,14 @@
 }

 void
-SerialDevice::regInterfaceCallback(Callback *c)
+SerialDevice::regInterfaceCallback(const std::function )
 {
 // This can happen if the user has connected multiple UARTs to the
 // same terminal. In that case, each of them tries to register
 // callbacks.
-if (interfaceCallback)
-fatal("A UART has already been associated with this device.\n");
-interfaceCallback = c;
+fatal_if(interfaceCallback,
+ "A UART has already been associated with this device.");
+interfaceCallback = callback;
 }

 void
@@ -67,7 +66,7 @@
 assert(dataAvailable());
 // Registering a callback is optional.
 if (interfaceCallback)
-interfaceCallback->process();
+interfaceCallback();
 }


diff --git a/src/dev/serial/serial.hh b/src/dev/serial/serial.hh
index 2ea145d..838c0ab 100644
--- a/src/dev/serial/serial.hh
+++ b/src/dev/serial/serial.hh
@@ -38,7 +38,8 @@
 #ifndef __DEV_SERIAL_HH__
 #define __DEV_SERIAL_HH__

-#include "base/callback.hh"
+#include 
+
 #include "sim/sim_object.hh"

 struct SerialDeviceParams;
@@ -103,9 +104,9 @@
  * method. The interface layer may use this method to register a
  * callback that informs it of pending data.
  *
- * @param c Callback instance from interface layer.
+ * @param c Callback from interface layer.
  */
-void regInterfaceCallback(Callback *c);
+void regInterfaceCallback(const std::function );

 /**
  * Check if there is pending data from the serial device.
@@ -136,7 +137,7 @@

   private:
 /** Currently regisxtered host interface layer callback */
-Callback *interfaceCallback;
+std::function interfaceCallback;
 };

 /**
diff --git a/src/dev/serial/uart.cc b/src/dev/serial/uart.cc
index 098808c..3e9131c 100644
--- a/src/dev/serial/uart.cc
+++ b/src/dev/serial/uart.cc
@@ -32,13 +32,11 @@

 #include "dev/serial/uart.hh"

-Uart::Uart(const Params *p, Addr pio_size)
-: BasicPioDevice(p, pio_size),
-  platform(p->platform), device(p->device),
-  callbackDataAvail(this)
+Uart::Uart(const Params *p, Addr pio_size) :
+BasicPioDevice(p, pio_size), platform(p->platform), device(p->device)
 {
 status = 0;

 // setup serial device callbacks
-device->regInterfaceCallback();
+device->regInterfaceCallback([this]() { dataAvailable(); });
 }
diff --git a/src/dev/serial/uart.hh b/src/dev/serial/uart.hh
index 14ce44e..21ea578 100644
--- a/src/dev/serial/uart.hh
+++ b/src/dev/serial/uart.hh
@@ -70,9 +70,6 @@
  * @return interrupt status
  */
 bool intStatus() { return status ? true : false; }
-
-  protected:
-MakeCallback callbackDataAvail;
 };

 #endif // __UART_HH__
diff --git a/src/dev/virtio/console.cc b/src/dev/virtio/console.cc
index 5aeceb0..1bb6ada 100644
--- a/src/dev/virtio/console.cc
+++ b/src/dev/virtio/console.cc
@@ -45,7 +45,7 @@
 : VirtIODeviceBase(params, ID_CONSOLE, sizeof(Config), F_SIZE),
   qRecv(params->system->physProxy, byteOrder, params->qRecvSize,  
*this),
   qTrans(params->system->physProxy, byteOrder, params->qTransSize,  
*this),

-  device(*params->device), callbackDataAvail(qRecv)
+  device(*params->device)
 {
 registerQueue(qRecv);
 registerQueue(qTrans);
@@ -53,7 +53,7 @@
 config.cols = 80;
 config.rows = 24;

-device.regInterfaceCallback();
+device.regInterfaceCallback([this]() { qRecv.trySend(); });
 }


diff --git a/src/dev/virtio/console.hh b/src/dev/virtio/console.hh
index 3691585..d60bc66 100644
--- a/src/dev/virtio/console.hh
+++ b/src/dev/virtio/console.hh
@@ -148,8 +148,6 @@

   protected:
 SerialDevice 
-MakeCallback callbackDataAvail;
 };

 #endif // __DEV_VIRTIO_CONSOLE_HH__

--
To view, visit https://gem5-review.googlesource.com/c/public/gem5/+/32647
To unsubscribe, or for help writing mail filters, visit  

[gem5-dev] Change in gem5/gem5[develop]: dev: Replace the Callback class with lambdas in ARM's flash devices.

2020-08-14 Thread Gabe Black (Gerrit) via gem5-dev
Gabe Black has uploaded this change for review. (  
https://gem5-review.googlesource.com/c/public/gem5/+/32648 )



Change subject: dev: Replace the Callback class with lambdas in ARM's flash  
devices.

..

dev: Replace the Callback class with lambdas in ARM's flash devices.

Issue-on: https://gem5.atlassian.net/browse/GEM5-698
Change-Id: I2694dd1952b7412c27c83c9d15d4645899bd28e2
---
M src/dev/arm/abstract_nvm.hh
M src/dev/arm/flash_device.cc
M src/dev/arm/flash_device.hh
M src/dev/arm/ufs_device.cc
M src/dev/arm/ufs_device.hh
5 files changed, 37 insertions(+), 47 deletions(-)



diff --git a/src/dev/arm/abstract_nvm.hh b/src/dev/arm/abstract_nvm.hh
index dd44e19..dbcfa70 100644
--- a/src/dev/arm/abstract_nvm.hh
+++ b/src/dev/arm/abstract_nvm.hh
@@ -99,9 +99,9 @@
  * data transfer between the disk and the disk controller.
  */
 virtual void readMemory(uint64_t address, uint32_t amount,
-Callback *event) = 0;
+const std::function ) = 0;
 virtual void writeMemory(uint64_t address, uint32_t amount,
- Callback *event) = 0;
+ const std::function ) = 0;
 };

 #endif //__DEV_ARM_ABSTRACT_NVM_HH__
diff --git a/src/dev/arm/flash_device.cc b/src/dev/arm/flash_device.cc
index a31deb1..d8f1469 100644
--- a/src/dev/arm/flash_device.cc
+++ b/src/dev/arm/flash_device.cc
@@ -160,8 +160,8 @@
  * an event that uses the callback function on completion of the action.
  */
 void
-FlashDevice::accessDevice(uint64_t address, uint32_t amount, Callback  
*event,

-  Actions action)
+FlashDevice::accessDevice(uint64_t address, uint32_t amount,
+  const std::function , Actions  
action)

 {
 DPRINTF(FlashDevice, "Flash calculation for %d bytes in %d pages\n"
 , amount, pageSize);
@@ -258,7 +258,6 @@
 else
 cbe.time = time[count] +
planeEventQueue[count].back().time;
-cbe.function = NULL;
 planeEventQueue[count].push_back(cbe);

 DPRINTF(FlashDevice, "scheduled at: %ld\n", cbe.time);
@@ -308,14 +307,13 @@
  * the callback entry first need to be cleared before it  
can

  * be called.
  */
-Callback *temp = planeEventQueue[plane_address].front().
- function;
+auto temp =  
planeEventQueue[plane_address].front().function;

 planeEventQueue[plane_address].pop_front();

 /**Found a callback, lets make it happen*/
-if (temp != NULL) {
+if (temp) {
 DPRINTF(FlashDevice, "Callback, %d\n", plane_address);
-temp->process();
+temp();
 }
 }
 }
diff --git a/src/dev/arm/flash_device.hh b/src/dev/arm/flash_device.hh
index 07c6a6c..a0ff83f 100644
--- a/src/dev/arm/flash_device.hh
+++ b/src/dev/arm/flash_device.hh
@@ -87,7 +87,7 @@

 struct CallBackEntry {
 Tick time;
-Callback *function;
+std::function function;
 };

 struct FlashDeviceStats {
@@ -105,19 +105,22 @@
 };

 /** Device access functions Inherrited from AbstractNVM*/
-void initializeMemory(uint64_t disk_size, uint32_t sector_size)  
override

+void
+initializeMemory(uint64_t disk_size, uint32_t sector_size) override
 {
 initializeFlash(disk_size, sector_size);
 }

-void readMemory(uint64_t address, uint32_t amount,
-Callback *event) override
+void
+readMemory(uint64_t address, uint32_t amount,
+   const std::function ) override
 {
 accessDevice(address, amount, event, ActionRead);
 }

-void writeMemory(uint64_t address, uint32_t amount,
- Callback *event) override
+void
+writeMemory(uint64_t address, uint32_t amount,
+const std::function ) override
 {
 accessDevice(address, amount, event, ActionWrite);
 }
@@ -126,8 +129,8 @@
 void initializeFlash(uint64_t disk_size, uint32_t sector_size);

 /**Flash action function*/
-void accessDevice(uint64_t address, uint32_t amount, Callback *event,
-  Actions action);
+void accessDevice(uint64_t address, uint32_t amount,
+  const std::function , Actions action);

 /** Event rescheduler*/
 void actionComplete();
diff --git a/src/dev/arm/ufs_device.cc b/src/dev/arm/ufs_device.cc
index 82cbd88..b11eb7b 100644
--- a/src/dev/arm/ufs_device.cc
+++ b/src/dev/arm/ufs_device.cc
@@ -73,8 +73,8 @@
  * Constructor and destructor functions of UFSHCM device
  */
 UFSHostDevice::UFSSCSIDevice::UFSSCSIDevice(const UFSHostDeviceParams* p,
- uint32_t lun_id, Callback 

[gem5-dev] Change in gem5/gem5[develop]: misc: Make registerExitCallback use CallbackQueue2.

2020-08-14 Thread Gabe Black (Gerrit) via gem5-dev
Gabe Black has uploaded this change for review. (  
https://gem5-review.googlesource.com/c/public/gem5/+/32644 )



Change subject: misc: Make registerExitCallback use CallbackQueue2.
..

misc: Make registerExitCallback use CallbackQueue2.

Issue-on: https://gem5.atlassian.net/browse/GEM5-698
Change-Id: I526d4a19ca4e54a6469a4ee26693c1c0400fcc70
---
M src/base/cp_annotate.cc
M src/cpu/inst_pb_trace.cc
M src/cpu/o3/probe/elastic_trace.cc
M src/dev/storage/disk_image.cc
M src/dev/virtio/fs9p.cc
M src/gpu-compute/compute_unit.cc
M src/gpu-compute/compute_unit.hh
M src/mem/cache/tags/base.cc
M src/mem/cache/tags/base.hh
M src/mem/dramsim2.cc
M src/mem/probes/mem_trace.cc
M src/sim/core.cc
M src/sim/core.hh
M src/sim/sim_exit.hh
14 files changed, 21 insertions(+), 96 deletions(-)



diff --git a/src/base/cp_annotate.cc b/src/base/cp_annotate.cc
index 159e6e0..c66b843 100644
--- a/src/base/cp_annotate.cc
+++ b/src/base/cp_annotate.cc
@@ -79,26 +79,6 @@
 bool CPA::exists;
 CPA *CPA::_cpa;

-class AnnotateDumpCallback : public Callback
-{
-
-  private:
-CPA *cpa;
-  public:
-virtual void process();
-AnnotateDumpCallback(CPA *_cpa)
-: cpa(_cpa)
-{}
-};
-
-void
-AnnotateDumpCallback::process()
-{
-cpa->dump(true);
-cpa->dumpKey();
-}
-
-
 CPA::CPA(Params *p)
 : SimObject(p), numSm(0), numSmt(0), numSys(0), numQs(0), conId(0)
 {
@@ -140,7 +120,7 @@
 ah.key_off = 0;
 osbin->write((char*), sizeof(AnnotateHeader));

-registerExitCallback(new AnnotateDumpCallback(this));
+registerExitCallback([this]() { dump(true); dumpKey(); });
 }

 uint64_t
diff --git a/src/cpu/inst_pb_trace.cc b/src/cpu/inst_pb_trace.cc
index 3f3cfa8..7d7bbaa 100644
--- a/src/cpu/inst_pb_trace.cc
+++ b/src/cpu/inst_pb_trace.cc
@@ -91,9 +91,7 @@
 traceStream->write(header_msg);

 // get a callback when we exit so we can close the file
-Callback *cb = new MakeCallback(this);
-registerExitCallback(cb);
+registerExitCallback([this]() { closeStreams(); });
 }

 void
diff --git a/src/cpu/o3/probe/elastic_trace.cc  
b/src/cpu/o3/probe/elastic_trace.cc

index c328b3c..8292c33 100644
--- a/src/cpu/o3/probe/elastic_trace.cc
+++ b/src/cpu/o3/probe/elastic_trace.cc
@@ -88,9 +88,7 @@
 data_rec_header.set_window_size(depWindowSize);
 dataTraceStream->write(data_rec_header);
 // Register a callback to flush trace records and close the output  
streams.

-Callback* cb = new MakeCallback(this);
-registerExitCallback(cb);
+registerExitCallback([this]() {  flushTraces(); });
 }

 void
diff --git a/src/dev/storage/disk_image.cc b/src/dev/storage/disk_image.cc
index 319bccf..e4b1ce0 100644
--- a/src/dev/storage/disk_image.cc
+++ b/src/dev/storage/disk_image.cc
@@ -168,16 +168,6 @@
 const uint32_t CowDiskImage::VersionMajor = 1;
 const uint32_t CowDiskImage::VersionMinor = 0;

-class CowDiskCallback : public Callback
-{
-  private:
-CowDiskImage *image;
-
-  public:
-CowDiskCallback(CowDiskImage *i) : image(i) {}
-void process() { image->save(); delete this; }
-};
-
 CowDiskImage::CowDiskImage(const Params *p)
 : DiskImage(p), filename(p->image_file), child(p->child), table(NULL)
 {
@@ -191,7 +181,7 @@
 }

 if (!p->read_only)
-registerExitCallback(new CowDiskCallback(this));
+registerExitCallback([this]() { save(); });
 }
 }

diff --git a/src/dev/virtio/fs9p.cc b/src/dev/virtio/fs9p.cc
index a548d72..2392c0b 100644
--- a/src/dev/virtio/fs9p.cc
+++ b/src/dev/virtio/fs9p.cc
@@ -315,9 +315,7 @@
   fd_to_diod(-1), fd_from_diod(-1), diod_pid(-1)
 {
 // Register an exit callback so we can kill the diod process
-Callback* cb = new MakeCallback(this);
-registerExitCallback(cb);
+registerExitCallback([this]() { terminateDiod(); });
 }

 VirtIO9PDiod::~VirtIO9PDiod()
diff --git a/src/gpu-compute/compute_unit.cc  
b/src/gpu-compute/compute_unit.cc

index 067c254..7e0947f 100644
--- a/src/gpu-compute/compute_unit.cc
+++ b/src/gpu-compute/compute_unit.cc
@@ -179,8 +179,7 @@
 int tlbPort_width = perLaneTLB ? wfSize() : 1;
 tlbPort.resize(tlbPort_width);

-cuExitCallback = new CUExitCallback(this);
-registerExitCallback(cuExitCallback);
+registerExitCallback([this]() { exitCallback(); });

 lastExecCycle.resize(numVectorALUs, 0);

@@ -215,7 +214,6 @@
 lastVaddrSimd[j].clear();
 }
 lastVaddrCU.clear();
-delete cuExitCallback;
 delete ldsPort;
 }

@@ -2460,16 +2458,15 @@
 }

 void
-ComputeUnit::CUExitCallback::process()
+ComputeUnit::exitCallback()
 {
-if (computeUnit->countPages) {
-std::ostream *page_stat_file =
-simout.create(computeUnit->name().c_str())->stream();
+if (countPages) {
+std::ostream *page_stat_file =  
simout.create(name().c_str())->stream();


 *page_stat_file << "page, wavefront accesses, workitem accesses" <<
 std::endl;

-

[gem5-dev] Change in gem5/gem5[develop]: base: Get rid the Callback type.

2020-08-14 Thread Gabe Black (Gerrit) via gem5-dev
Gabe Black has uploaded this change for review. (  
https://gem5-review.googlesource.com/c/public/gem5/+/32650 )



Change subject: base: Get rid the Callback type.
..

base: Get rid the Callback type.

This leaves only the lambda/std::function based CallbackQueue2, soon to
be renamed just CallbackQueue.

Issue-on: https://gem5.atlassian.net/browse/GEM5-698
Change-Id: I4e2fd3b7b684c414be6db0e268284ab63e6cfdff
---
M src/base/SConscript
D src/base/callback.cc
M src/base/callback.hh
D src/base/callback.test.cc
4 files changed, 0 insertions(+), 306 deletions(-)



diff --git a/src/base/SConscript b/src/base/SConscript
index b7a0c1b..2b2ad7c 100644
--- a/src/base/SConscript
+++ b/src/base/SConscript
@@ -38,8 +38,6 @@
 GTest('bitfield.test', 'bitfield.test.cc', 'bitfield.cc')
 Source('imgwriter.cc')
 Source('bmpwriter.cc')
-Source('callback.cc')
-GTest('callback.test', 'callback.test.cc', 'callback.cc')
 Source('channel_addr.cc')
 Source('cprintf.cc', add_tags='gtest lib')
 GTest('cprintf.test', 'cprintf.test.cc')
diff --git a/src/base/callback.cc b/src/base/callback.cc
deleted file mode 100644
index 65197ef..000
--- a/src/base/callback.cc
+++ /dev/null
@@ -1,37 +0,0 @@
-/*
- * Copyright (c) 2003-2005 The Regents of The University of Michigan
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are
- * met: redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer;
- * redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution;
- * neither the name of the copyright holders nor the names of its
- * contributors may be used to endorse or promote products derived from
- * this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
- * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
- * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
- * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-#include "base/callback.hh"
-
-CallbackQueue::~CallbackQueue()
-{
-queue::iterator i = callbacks.begin();
-queue::iterator end = callbacks.end();
-for (; i != end; ++i)
-(*i)->autoDestruct();
-}
diff --git a/src/base/callback.hh b/src/base/callback.hh
index a02bfba..a7c916a 100644
--- a/src/base/callback.hh
+++ b/src/base/callback.hh
@@ -31,54 +31,6 @@

 #include 
 #include 
-#include 
-
-/**
- * Generic callback class.  This base class provides a virtual process
- * function that gets called when the callback queue is processed.
- */
-class Callback
-{
-  protected:
-friend class CallbackQueue;
-virtual void autoDestruct() {}
-
-  public:
-/**
- * virtualize the destructor to make sure that the correct one
- * gets called.
- */
-virtual ~Callback() {}
-
-/**
- * virtual process function that is invoked when the callback
- * queue is executed.
- */
-virtual void process() = 0;
-};
-
-/// Helper template class to turn a simple class member function into
-/// a callback.
-template 
-class MakeCallback : public Callback
-{
-  protected:
-T *object;
-const bool autoDestroy;
-
-void autoDestruct() { if (autoDestroy) delete this; }
-
-  public:
-MakeCallback(T *o, bool auto_destroy = false)
-: object(o), autoDestroy(auto_destroy)
-{ }
-
-MakeCallback(T , bool auto_destroy = false)
-: object(), autoDestroy(auto_destroy)
-{ }
-
-void process() { (object->*F)(); }
-};

 template 
 class CallbackQueue2 : public std::list>
@@ -97,76 +49,4 @@
 }
 };

-class CallbackQueue
-{
-  protected:
-/**
- * Simple typedef for the data structure that stores all of the
- * callbacks.
- */
-typedef std::list queue;
-
-/**
- * List of all callbacks.  To be called in fifo order.
- */
-queue callbacks;
-
-  public:
-~CallbackQueue();
-std::string name() const { return "CallbackQueue"; }
-
-/**
- * Add a callback to the end of the queue
- * @param callback the callback to be added to the queue
- */
-void
-add(Callback *callback)
-{
- 

[gem5-dev] Change in gem5/gem5[develop]: misc: Rename CallbackQueue2 to CallbackQueue.

2020-08-14 Thread Gabe Black (Gerrit) via gem5-dev
Gabe Black has uploaded this change for review. (  
https://gem5-review.googlesource.com/c/public/gem5/+/32651 )



Change subject: misc: Rename CallbackQueue2 to CallbackQueue.
..

misc: Rename CallbackQueue2 to CallbackQueue.

Now that the original CallbackQueue has been removed, CallbackQueue2 can
fully take it's place.

Issue-on: https://gem5.atlassian.net/browse/GEM5-698
Change-Id: I925f647cbbd393045a22f7cbd5d8b4d7d23d19b0
---
M src/base/callback.hh
M src/base/statistics.cc
M src/mem/backdoor.hh
M src/sim/core.cc
4 files changed, 6 insertions(+), 6 deletions(-)



diff --git a/src/base/callback.hh b/src/base/callback.hh
index a7c916a..9556883 100644
--- a/src/base/callback.hh
+++ b/src/base/callback.hh
@@ -33,7 +33,7 @@
 #include 

 template 
-class CallbackQueue2 : public std::list>
+class CallbackQueue : public std::list>
 {
   public:
 using CBFunc = std::function;
diff --git a/src/base/statistics.cc b/src/base/statistics.cc
index a00c190..194bef1 100644
--- a/src/base/statistics.cc
+++ b/src/base/statistics.cc
@@ -518,8 +518,8 @@
 dumpHandler = dump_handler;
 }

-CallbackQueue2<> dumpQueue;
-CallbackQueue2<> resetQueue;
+CallbackQueue<> dumpQueue;
+CallbackQueue<> resetQueue;

 void
 processResetQueue()
diff --git a/src/mem/backdoor.hh b/src/mem/backdoor.hh
index 42540eb..30fe8c5 100644
--- a/src/mem/backdoor.hh
+++ b/src/mem/backdoor.hh
@@ -113,7 +113,7 @@
 }

   private:
-CallbackQueue2 invalidationCallbacks;
+CallbackQueue invalidationCallbacks;

 AddrRange _range;
 uint8_t *_ptr;
diff --git a/src/sim/core.cc b/src/sim/core.cc
index de4ee11..b67867e 100644
--- a/src/sim/core.cc
+++ b/src/sim/core.cc
@@ -126,10 +126,10 @@
 /**
  * Queue of C++ callbacks to invoke on simulator exit.
  */
-inline CallbackQueue2<> &
+inline CallbackQueue<> &
 exitCallbacks()
 {
-static CallbackQueue2<> theQueue;
+static CallbackQueue<> theQueue;
 return theQueue;
 }


--
To view, visit https://gem5-review.googlesource.com/c/public/gem5/+/32651
To unsubscribe, or for help writing mail filters, visit  
https://gem5-review.googlesource.com/settings


Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: I925f647cbbd393045a22f7cbd5d8b4d7d23d19b0
Gerrit-Change-Number: 32651
Gerrit-PatchSet: 1
Gerrit-Owner: Gabe Black 
Gerrit-MessageType: newchange
___
gem5-dev mailing list -- gem5-dev@gem5.org
To unsubscribe send an email to gem5-dev-le...@gem5.org
%(web_page_url)slistinfo%(cgiext)s/%(_internal_name)s

[gem5-dev] Change in gem5/gem5[develop]: base: Add a new type of CallbackQueue.

2020-08-14 Thread Gabe Black (Gerrit) via gem5-dev
Gabe Black has uploaded this change for review. (  
https://gem5-review.googlesource.com/c/public/gem5/+/32642 )



Change subject: base: Add a new type of CallbackQueue.
..

base: Add a new type of CallbackQueue.

This type is templated on what arguments the callbacks in it accept, and
it inherits directly from std::list instead of containing one and
forwarding selected members.

This version is called CallbackQueue2, but once all CallbackQueue
instances have been replaced it will be renamed to CallbackQueue.

Issue-on: https://gem5.atlassian.net/browse/GEM5-698
Change-Id: I32ab7454ea8c6a2af31cbcf5d4932a069ace1cb5
---
M src/base/callback.hh
1 file changed, 18 insertions(+), 0 deletions(-)



diff --git a/src/base/callback.hh b/src/base/callback.hh
index f193361..a02bfba 100644
--- a/src/base/callback.hh
+++ b/src/base/callback.hh
@@ -29,6 +29,7 @@
 #ifndef __BASE_CALLBACK_HH__
 #define __BASE_CALLBACK_HH__

+#include 
 #include 
 #include 

@@ -79,6 +80,23 @@
 void process() { (object->*F)(); }
 };

+template 
+class CallbackQueue2 : public std::list>
+{
+  public:
+using CBFunc = std::function;
+using Base = std::list;
+
+using Base::Base;
+
+void
+process(Args... args)
+{
+for (auto : *this)
+f(args...);
+}
+};
+
 class CallbackQueue
 {
   protected:

--
To view, visit https://gem5-review.googlesource.com/c/public/gem5/+/32642
To unsubscribe, or for help writing mail filters, visit  
https://gem5-review.googlesource.com/settings


Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: I32ab7454ea8c6a2af31cbcf5d4932a069ace1cb5
Gerrit-Change-Number: 32642
Gerrit-PatchSet: 1
Gerrit-Owner: Gabe Black 
Gerrit-MessageType: newchange
___
gem5-dev mailing list -- gem5-dev@gem5.org
To unsubscribe send an email to gem5-dev-le...@gem5.org
%(web_page_url)slistinfo%(cgiext)s/%(_internal_name)s

[gem5-dev] Change in gem5/gem5[develop]: mem: Use the new type of CallbackQueue in the MemBackdoor.

2020-08-14 Thread Gabe Black (Gerrit) via gem5-dev
Gabe Black has uploaded this change for review. (  
https://gem5-review.googlesource.com/c/public/gem5/+/32643 )



Change subject: mem: Use the new type of CallbackQueue in the MemBackdoor.
..

mem: Use the new type of CallbackQueue in the MemBackdoor.

Issue-on: https://gem5.atlassian.net/browse/GEM5-698
Change-Id: Ide40528f8c613b46204550d6e6840a7b274a366a
---
M src/mem/backdoor.hh
1 file changed, 4 insertions(+), 31 deletions(-)



diff --git a/src/mem/backdoor.hh b/src/mem/backdoor.hh
index d5e5f0d..42540eb 100644
--- a/src/mem/backdoor.hh
+++ b/src/mem/backdoor.hh
@@ -42,28 +42,6 @@
 // a const reference to this back door as their only parameter.
 typedef std::function CbFunction;

-  private:
-// This wrapper class holds the callables described above so that they
-// can be stored in a generic CallbackQueue.
-class Callback : public ::Callback
-{
-  public:
-Callback(MemBackdoor , CbFunction cb) :
-_backdoor(bd), cbFunction(cb)
-{}
-
-void process() override { cbFunction(_backdoor); }
-// It looks like this is only called when the CallbackQueue is
-// destroyed and this Callback is currently in the queue.
-void autoDestruct() override { delete this; }
-
-MemBackdoor () { return _backdoor; }
-
-  private:
-MemBackdoor &_backdoor;
-CbFunction cbFunction;
-};
-
   public:
 enum Flags{
 // How data is allowed to be accessed through this backdoor.
@@ -108,7 +86,6 @@
 void flags(Flags f) { _flags = f; }

 MemBackdoor(AddrRange r, uint8_t *p, Flags flags) :
-invalidationCallbacks(new CallbackQueue),
 _range(r), _ptr(p), _flags(flags)
 {}

@@ -121,9 +98,7 @@
 void
 addInvalidationCallback(CbFunction func)
 {
-auto *cb = new MemBackdoor::Callback(*this, func);
-assert(cb);
-invalidationCallbacks->add(cb);
+invalidationCallbacks.push_back(func);
 }

 // Notify and clear invalidation callbacks when the data in the  
backdoor

@@ -133,14 +108,12 @@
 void
 invalidate()
 {
-invalidationCallbacks->process();
-// Delete and recreate the callback queue to ensure the callback
-// objects are deleted.
-invalidationCallbacks.reset(new CallbackQueue());
+invalidationCallbacks.process(*this);
+invalidationCallbacks.clear();
 }

   private:
-std::unique_ptr invalidationCallbacks;
+CallbackQueue2 invalidationCallbacks;

 AddrRange _range;
 uint8_t *_ptr;

--
To view, visit https://gem5-review.googlesource.com/c/public/gem5/+/32643
To unsubscribe, or for help writing mail filters, visit  
https://gem5-review.googlesource.com/settings


Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: Ide40528f8c613b46204550d6e6840a7b274a366a
Gerrit-Change-Number: 32643
Gerrit-PatchSet: 1
Gerrit-Owner: Gabe Black 
Gerrit-MessageType: newchange
___
gem5-dev mailing list -- gem5-dev@gem5.org
To unsubscribe send an email to gem5-dev-le...@gem5.org
%(web_page_url)slistinfo%(cgiext)s/%(_internal_name)s

[gem5-dev] Change in gem5/gem5[develop]: misc: Make the stats callbacks use CallbackQueue2.

2020-08-14 Thread Gabe Black (Gerrit) via gem5-dev
Gabe Black has uploaded this change for review. (  
https://gem5-review.googlesource.com/c/public/gem5/+/32645 )



Change subject: misc: Make the stats callbacks use CallbackQueue2.
..

misc: Make the stats callbacks use CallbackQueue2.

Issue-on: https://gem5.atlassian.net/browse/GEM5-698
Change-Id: Idcbe04bdf4299925f321aa0ece263d86ed3fc8df
---
M src/base/statistics.cc
M src/base/statistics.hh
M src/cpu/profile.cc
M src/cpu/profile.hh
M src/mem/probes/mem_footprint.cc
M src/mem/ruby/network/Network.cc
M src/mem/ruby/network/Network.hh
M src/mem/ruby/slicc_interface/AbstractController.cc
M src/mem/ruby/slicc_interface/AbstractController.hh
M src/mem/ruby/system/RubySystem.cc
M src/mem/ruby/system/RubySystem.hh
M src/sim/stat_control.cc
12 files changed, 17 insertions(+), 80 deletions(-)



diff --git a/src/base/statistics.cc b/src/base/statistics.cc
index e4315ba..a00c190 100644
--- a/src/base/statistics.cc
+++ b/src/base/statistics.cc
@@ -518,8 +518,8 @@
 dumpHandler = dump_handler;
 }

-CallbackQueue dumpQueue;
-CallbackQueue resetQueue;
+CallbackQueue2<> dumpQueue;
+CallbackQueue2<> resetQueue;

 void
 processResetQueue()
@@ -534,9 +534,9 @@
 }

 void
-registerResetCallback(Callback *cb)
+registerResetCallback(const std::function )
 {
-resetQueue.add(cb);
+resetQueue.push_back(callback);
 }

 bool _enabled = false;
@@ -586,9 +586,9 @@
 }

 void
-registerDumpCallback(Callback *cb)
+registerDumpCallback(const std::function )
 {
-dumpQueue.add(cb);
+dumpQueue.push_back(callback);
 }

 } // namespace Stats
diff --git a/src/base/statistics.hh b/src/base/statistics.hh
index ee541fb..96cd43f 100644
--- a/src/base/statistics.hh
+++ b/src/base/statistics.hh
@@ -82,8 +82,6 @@
 #include "base/str.hh"
 #include "base/types.hh"

-class Callback;
-
 /** The current simulated tick. */
 extern Tick curTick();

@@ -3364,13 +3362,13 @@
  * Register a callback that should be called whenever statistics are
  * reset
  */
-void registerResetCallback(Callback *cb);
+void registerResetCallback(const std::function );

 /**
  * Register a callback that should be called whenever statistics are
  * about to be dumped
  */
-void registerDumpCallback(Callback *cb);
+void registerDumpCallback(const std::function );

 /**
  * Process all the callbacks in the reset callbacks queue
diff --git a/src/cpu/profile.cc b/src/cpu/profile.cc
index 393740b..d132fc1 100644
--- a/src/cpu/profile.cc
+++ b/src/cpu/profile.cc
@@ -97,13 +97,7 @@
  const Loader::SymbolTable &_symtab) :
 symtab(_symtab), trace(std::move(_trace))
 {
-reset = new MakeCallback::clear>(this);

-Stats::registerResetCallback(reset);
-}
-
-FunctionProfile::~FunctionProfile()
-{
-delete reset;
+Stats::registerResetCallback([this]() { clear(); });
 }

 ProfileNode *
diff --git a/src/cpu/profile.hh b/src/cpu/profile.hh
index 0f2d8a8..b58447a 100644
--- a/src/cpu/profile.hh
+++ b/src/cpu/profile.hh
@@ -124,13 +124,11 @@
 void clear();
 };

-class Callback;
 class FunctionProfile
 {
   private:
 friend class ProfileNode;

-Callback *reset = nullptr;
 const Loader::SymbolTable 
 ProfileNode top;
 std::map pc_count;
@@ -139,7 +137,6 @@
   public:
 FunctionProfile(std::unique_ptr _trace,
 const Loader::SymbolTable );
-~FunctionProfile();

 ProfileNode *consume(ThreadContext *tc, const StaticInstPtr );
 ProfileNode *consume(const std::vector );
diff --git a/src/mem/probes/mem_footprint.cc  
b/src/mem/probes/mem_footprint.cc

index c907190..9707568 100644
--- a/src/mem/probes/mem_footprint.cc
+++ b/src/mem/probes/mem_footprint.cc
@@ -82,9 +82,7 @@
 .flags(nozero | nonan);
 // clang-format on

-registerResetCallback(
-new MakeCallback(
-this));
+registerResetCallback([this]() { statReset(); });
 }

 void
diff --git a/src/mem/ruby/network/Network.cc  
b/src/mem/ruby/network/Network.cc

index ba847e5..bf3b637 100644
--- a/src/mem/ruby/network/Network.cc
+++ b/src/mem/ruby/network/Network.cc
@@ -125,7 +125,7 @@
 }

 // Register a callback function for combining the statistics
-Stats::registerDumpCallback(new StatsCallback(this));
+Stats::registerDumpCallback([this]() { collateStats(); });

 for (auto  : dynamic_cast(this)->params()->ext_links) {
 it->params()->ext_node->initNetQueues();
diff --git a/src/mem/ruby/network/Network.hh  
b/src/mem/ruby/network/Network.hh

index bba0c5e..6348f6c 100644
--- a/src/mem/ruby/network/Network.hh
+++ b/src/mem/ruby/network/Network.hh
@@ -160,24 +160,6 @@
 std::vector m_ordered;

   private:
-//! Callback class used for collating statistics from all the
-//! controller of this type.
-class StatsCallback : public Callback
-{
-  private:
-Network *ctr;
-
-  public:
-virtual ~StatsCallback() {}
-
-StatsCallback(Network *_ctr)
-: 

[gem5-dev] Change in gem5/gem5[develop]: sim: Delete the unused PowerStateDumpCallback.

2020-08-14 Thread Gabe Black (Gerrit) via gem5-dev
Gabe Black has uploaded this change for review. (  
https://gem5-review.googlesource.com/c/public/gem5/+/32646 )



Change subject: sim: Delete the unused PowerStateDumpCallback.
..

sim: Delete the unused PowerStateDumpCallback.

Issue-on: https://gem5.atlassian.net/browse/GEM5-698
Change-Id: I8e66f31a3a6a82564d9525021ada49ce52beb1fa
---
M src/sim/power_state.hh
1 file changed, 0 insertions(+), 8 deletions(-)



diff --git a/src/sim/power_state.hh b/src/sim/power_state.hh
index fededf8..13e36e5 100644
--- a/src/sim/power_state.hh
+++ b/src/sim/power_state.hh
@@ -151,12 +151,4 @@
 } stats;
 };

-class PowerStateDumpCallback : public Callback
-{
-PowerState *co;
-  public:
-PowerStateDumpCallback(PowerState *co_t) : co(co_t) {}
-virtual void process() { co->computeStats(); };
-};
-
 #endif //__SIM_POWER_STATE_HH__

--
To view, visit https://gem5-review.googlesource.com/c/public/gem5/+/32646
To unsubscribe, or for help writing mail filters, visit  
https://gem5-review.googlesource.com/settings


Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: I8e66f31a3a6a82564d9525021ada49ce52beb1fa
Gerrit-Change-Number: 32646
Gerrit-PatchSet: 1
Gerrit-Owner: Gabe Black 
Gerrit-MessageType: newchange
___
gem5-dev mailing list -- gem5-dev@gem5.org
To unsubscribe send an email to gem5-dev-le...@gem5.org
%(web_page_url)slistinfo%(cgiext)s/%(_internal_name)s

[gem5-dev] Change in gem5/gem5[develop]: dev: Replace Callback in the virtio device with a lambda.

2020-08-14 Thread Gabe Black (Gerrit) via gem5-dev
Gabe Black has uploaded this change for review. (  
https://gem5-review.googlesource.com/c/public/gem5/+/32649 )



Change subject: dev: Replace Callback in the virtio device with a lambda.
..

dev: Replace Callback in the virtio device with a lambda.

Issue-on: https://gem5.atlassian.net/browse/GEM5-698
Change-Id: Ia628ceb0080b11b81c7eee82e7c8c0049b2cd62f
---
M src/dev/arm/vio_mmio.cc
M src/dev/arm/vio_mmio.hh
M src/dev/virtio/base.cc
M src/dev/virtio/base.hh
M src/dev/virtio/pci.cc
M src/dev/virtio/pci.hh
6 files changed, 17 insertions(+), 18 deletions(-)



diff --git a/src/dev/arm/vio_mmio.cc b/src/dev/arm/vio_mmio.cc
index e0117af..2dfbc61 100644
--- a/src/dev/arm/vio_mmio.cc
+++ b/src/dev/arm/vio_mmio.cc
@@ -45,13 +45,12 @@
 MmioVirtIO::MmioVirtIO(const MmioVirtIOParams *params)
 : BasicPioDevice(params, params->pio_size),
   hostFeaturesSelect(0), guestFeaturesSelect(0), pageSize(0),
-  interruptStatus(0),
-  callbackKick(this), vio(*params->vio),
+  interruptStatus(0), vio(*params->vio),
   interrupt(params->interrupt->get())
 {
 fatal_if(!interrupt, "No MMIO VirtIO interrupt specified\n");

-vio.registerKickCallback();
+vio.registerKickCallback([this]() { kick(); });
 }

 MmioVirtIO::~MmioVirtIO()
diff --git a/src/dev/arm/vio_mmio.hh b/src/dev/arm/vio_mmio.hh
index fddbb83..d42d92a 100644
--- a/src/dev/arm/vio_mmio.hh
+++ b/src/dev/arm/vio_mmio.hh
@@ -103,8 +103,6 @@
 uint32_t pageSize;
 uint32_t interruptStatus;

-MakeCallback callbackKick;
-
   protected: // Params
 VirtIODeviceBase 
 ArmInterruptPin *const interrupt;
diff --git a/src/dev/virtio/base.cc b/src/dev/virtio/base.cc
index fef054c..6b4fe0a 100644
--- a/src/dev/virtio/base.cc
+++ b/src/dev/virtio/base.cc
@@ -328,8 +328,7 @@
   guestFeatures(0),
   byteOrder(params->system->getGuestByteOrder()),
   deviceId(id), configSize(config_size), deviceFeatures(features),
-  _deviceStatus(0), _queueSelect(0),
-  transKick(NULL)
+  _deviceStatus(0), _queueSelect(0)
 {
 }

diff --git a/src/dev/virtio/base.hh b/src/dev/virtio/base.hh
index 98c48a5..7c4c3f8 100644
--- a/src/dev/virtio/base.hh
+++ b/src/dev/virtio/base.hh
@@ -38,9 +38,10 @@
 #ifndef __DEV_VIRTIO_BASE_HH__
 #define __DEV_VIRTIO_BASE_HH__

+#include 
+
 #include "arch/isa_traits.hh"
 #include "base/bitunion.hh"
-#include "base/callback.hh"
 #include "dev/virtio/virtio_ring.h"
 #include "mem/port_proxy.hh"
 #include "sim/sim_object.hh"
@@ -605,9 +606,11 @@
  * typically through an interrupt. Device models call this method
  * to tell the transport interface to notify the guest.
  */
-void kick() {
+void
+kick()
+{
 assert(transKick);
-transKick->process();
+transKick();
 };

 /**
@@ -725,11 +728,13 @@
   * Register a callback to kick the guest through the transport
   * interface.
   *
-  * @param c Callback into transport interface.
+  * @param callback Callback into transport interface.
   */
-void registerKickCallback(Callback *c) {
+void
+registerKickCallback(const std::function )
+{
 assert(!transKick);
-transKick = c;
+transKick = callback;
 }


@@ -867,7 +872,7 @@
 std::vector _queues;

 /** Callbacks to kick the guest through the transport layer  */
-Callback *transKick;
+std::function transKick;
 };

 class VirtIODummyDevice : public VirtIODeviceBase
diff --git a/src/dev/virtio/pci.cc b/src/dev/virtio/pci.cc
index 6931581..115136e 100644
--- a/src/dev/virtio/pci.cc
+++ b/src/dev/virtio/pci.cc
@@ -44,7 +44,7 @@

 PciVirtIO::PciVirtIO(const Params *params)
 : PciDevice(params), queueNotify(0), interruptDeliveryPending(false),
-  vio(*params->vio), callbackKick(this)
+  vio(*params->vio)
 {
 // Override the subsystem ID with the device ID from VirtIO
 config.subsystemID = htole(vio.deviceId);
@@ -55,7 +55,7 @@
 // used to check accesses later on.
 BARSize[0] = alignToPowerOfTwo(BAR0_SIZE_BASE + vio.configSize);

-vio.registerKickCallback();
+vio.registerKickCallback([this]() { kick(); });
 }

 PciVirtIO::~PciVirtIO()
diff --git a/src/dev/virtio/pci.hh b/src/dev/virtio/pci.hh
index 7bb4633..b6c162c 100644
--- a/src/dev/virtio/pci.hh
+++ b/src/dev/virtio/pci.hh
@@ -80,8 +80,6 @@
 bool interruptDeliveryPending;

 VirtIODeviceBase 
-
-MakeCallback callbackKick;
 };

 #endif // __DEV_VIRTIO_PCI_HH__

--
To view, visit https://gem5-review.googlesource.com/c/public/gem5/+/32649
To unsubscribe, or for help writing mail filters, visit  
https://gem5-review.googlesource.com/settings


Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: Ia628ceb0080b11b81c7eee82e7c8c0049b2cd62f
Gerrit-Change-Number: 32649
Gerrit-PatchSet: 1
Gerrit-Owner: Gabe Black 
Gerrit-MessageType: newchange
___
gem5-dev