[gem5-dev] [L] Change in gem5/gem5[develop]: stdlib: Add MESI Three Level cache hierarchy

2022-11-29 Thread Hoa Nguyen (Gerrit) via gem5-dev
Hoa Nguyen has submitted this change. (  
https://gem5-review.googlesource.com/c/public/gem5/+/65591?usp=email )


Change subject: stdlib: Add MESI Three Level cache hierarchy
..

stdlib: Add MESI Three Level cache hierarchy

Change-Id: Ibea6b71d62b71f7817f6860bbceed9e1915bb002
Signed-off-by: Hoa Nguyen 
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/65591
Reviewed-by: Jason Lowe-Power 
Tested-by: kokoro 
Maintainer: Jason Lowe-Power 
---
M src/python/SConscript
A  
src/python/gem5/components/cachehierarchies/abstract_three_level_cache_hierarchy.py
A  
src/python/gem5/components/cachehierarchies/ruby/caches/mesi_three_level/__init__.py
A  
src/python/gem5/components/cachehierarchies/ruby/caches/mesi_three_level/directory.py
A  
src/python/gem5/components/cachehierarchies/ruby/caches/mesi_three_level/dma_controller.py
A  
src/python/gem5/components/cachehierarchies/ruby/caches/mesi_three_level/l1_cache.py
A  
src/python/gem5/components/cachehierarchies/ruby/caches/mesi_three_level/l2_cache.py
A  
src/python/gem5/components/cachehierarchies/ruby/caches/mesi_three_level/l3_cache.py
A  
src/python/gem5/components/cachehierarchies/ruby/mesi_three_level_cache_hierarchy.py

9 files changed, 720 insertions(+), 0 deletions(-)

Approvals:
  Jason Lowe-Power: Looks good to me, approved; Looks good to me, approved
  kokoro: Regressions pass




diff --git a/src/python/SConscript b/src/python/SConscript
index e7e464e..aeeb892 100644
--- a/src/python/SConscript
+++ b/src/python/SConscript
@@ -61,6 +61,8 @@
 'gem5/components/cachehierarchies/abstract_cache_hierarchy.py')
 PySource('gem5.components.cachehierarchies',
 'gem5/components/cachehierarchies/abstract_two_level_cache_hierarchy.py')
+PySource('gem5.components.cachehierarchies',
+'gem5/components/cachehierarchies/abstract_three_level_cache_hierarchy.py')
 PySource('gem5.components.cachehierarchies.chi',
 'gem5/components/cachehierarchies/chi/__init__.py')
 PySource('gem5.components.cachehierarchies.chi',
@@ -109,6 +111,9 @@
 PySource('gem5.components.cachehierarchies.ruby',
 'gem5/components/cachehierarchies/ruby/mesi_two_level_cache_hierarchy.py')
 PySource('gem5.components.cachehierarchies.ruby',
+'gem5/components/cachehierarchies/ruby/'
+'mesi_three_level_cache_hierarchy.py')
+PySource('gem5.components.cachehierarchies.ruby',
 'gem5/components/cachehierarchies/ruby/mi_example_cache_hierarchy.py')
 PySource('gem5.components.cachehierarchies.ruby.caches',
 'gem5/components/cachehierarchies/ruby/caches/__init__.py')
@@ -131,6 +136,24 @@
 'gem5/components/cachehierarchies/ruby/caches/mesi_two_level/l1_cache.py')
 PySource('gem5.components.cachehierarchies.ruby.caches.mesi_two_level',
 'gem5/components/cachehierarchies/ruby/caches/mesi_two_level/l2_cache.py')
+PySource('gem5.components.cachehierarchies.ruby.caches.mesi_three_level',
+'gem5/components/cachehierarchies/ruby/caches/mesi_three_level/'
+'__init__.py')
+PySource('gem5.components.cachehierarchies.ruby.caches.mesi_three_level',
+'gem5/components/cachehierarchies/ruby/caches/mesi_three_level/'
+'directory.py')
+PySource('gem5.components.cachehierarchies.ruby.caches.mesi_three_level',
+'gem5/components/cachehierarchies/ruby/caches/mesi_three_level/'
+'dma_controller.py')
+PySource('gem5.components.cachehierarchies.ruby.caches.mesi_three_level',
+'gem5/components/cachehierarchies/ruby/caches/mesi_three_level/'
+'l1_cache.py')
+PySource('gem5.components.cachehierarchies.ruby.caches.mesi_three_level',
+'gem5/components/cachehierarchies/ruby/caches/mesi_three_level/'
+'l2_cache.py')
+PySource('gem5.components.cachehierarchies.ruby.caches.mesi_three_level',
+'gem5/components/cachehierarchies/ruby/caches/mesi_three_level/'
+'l3_cache.py')
 PySource('gem5.components.cachehierarchies.ruby.caches.mi_example',
 'gem5/components/cachehierarchies/ruby/caches/mi_example/__init__.py')
 PySource('gem5.components.cachehierarchies.ruby.caches.mi_example',
diff --git  
a/src/python/gem5/components/cachehierarchies/abstract_three_level_cache_hierarchy.py  
b/src/python/gem5/components/cachehierarchies/abstract_three_level_cache_hierarchy.py

new file mode 100644
index 000..4d2f21a
--- /dev/null
+++  
b/src/python/gem5/components/cachehierarchies/abstract_three_level_cache_hierarchy.py

@@ -0,0 +1,52 @@
+# Copyright (c) 2022 The Regents of the University of California
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are
+# met: redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer;
+# redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials 

[gem5-dev] [S] Change in gem5/gem5[develop]: stdlib: Clean up Ruby cache directory

2022-11-29 Thread Hoa Nguyen (Gerrit) via gem5-dev
Hoa Nguyen has submitted this change. (  
https://gem5-review.googlesource.com/c/public/gem5/+/65571?usp=email )


 (

2 is the latest approved patch-set.
No files were changed between the latest approved patch-set and the  
submitted one.

 )Change subject: stdlib: Clean up Ruby cache directory
..

stdlib: Clean up Ruby cache directory

- Fix typos.
- Fix type inconsistencies.

Change-Id: I98d82ec7e62130abb09295c5ec6cde86b1f7fa27
Signed-off-by: Hoa Nguyen 
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/65571
Reviewed-by: Jason Lowe-Power 
Maintainer: Jason Lowe-Power 
Tested-by: kokoro 
---
M  
src/python/gem5/components/cachehierarchies/abstract_two_level_cache_hierarchy.py
M  
src/python/gem5/components/cachehierarchies/ruby/caches/mesi_two_level/l2_cache.py

2 files changed, 20 insertions(+), 5 deletions(-)

Approvals:
  kokoro: Regressions pass
  Jason Lowe-Power: Looks good to me, approved; Looks good to me, approved




diff --git  
a/src/python/gem5/components/cachehierarchies/abstract_two_level_cache_hierarchy.py  
b/src/python/gem5/components/cachehierarchies/abstract_two_level_cache_hierarchy.py

index 17cae4a..d6a035f 100644
---  
a/src/python/gem5/components/cachehierarchies/abstract_two_level_cache_hierarchy.py
+++  
b/src/python/gem5/components/cachehierarchies/abstract_two_level_cache_hierarchy.py

@@ -24,8 +24,6 @@
 # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 # OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

-# from .abstract_cache_hierarchy import AbstractCacheHierarchy
-

 class AbstractTwoLevelCacheHierarchy:
 """
@@ -51,9 +49,9 @@

 :type l1i_assoc: int

-:param l1dsize: The size of the LL1 Data cache (e.g. "32kB").
+:param l1d_size: The size of the L1 Data cache (e.g. "32kB").

-:type l1dsize: str
+:type l1d_size: str

 :param l1d_assoc:

diff --git  
a/src/python/gem5/components/cachehierarchies/ruby/caches/mesi_two_level/l2_cache.py  
b/src/python/gem5/components/cachehierarchies/ruby/caches/mesi_two_level/l2_cache.py

index 56cb5b2..81ef4db 100644
---  
a/src/python/gem5/components/cachehierarchies/ruby/caches/mesi_two_level/l2_cache.py
+++  
b/src/python/gem5/components/cachehierarchies/ruby/caches/mesi_two_level/l2_cache.py

@@ -45,7 +45,7 @@
 start_index_bit=self.getIndexBit(num_l2Caches),
 )

-self.transitions_per_cycle = "4"
+self.transitions_per_cycle = 4

 def getIndexBit(self, num_l2caches):
 l2_bits = int(math.log(num_l2caches, 2))

--
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: I98d82ec7e62130abb09295c5ec6cde86b1f7fa27
Gerrit-Change-Number: 65571
Gerrit-PatchSet: 4
Gerrit-Owner: Hoa Nguyen 
Gerrit-Reviewer: Bobby Bruce 
Gerrit-Reviewer: Hoa Nguyen 
Gerrit-Reviewer: Jason Lowe-Power 
Gerrit-Reviewer: Jason Lowe-Power 
Gerrit-Reviewer: kokoro 
Gerrit-MessageType: merged
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[gem5-dev] [S] Change in gem5/gem5[develop]: stdlib: Change #virtual_networks of mesi_two_level to 3

2022-11-29 Thread Hoa Nguyen (Gerrit) via gem5-dev
Hoa Nguyen has submitted this change. (  
https://gem5-review.googlesource.com/c/public/gem5/+/65592?usp=email )


 (

1 is the latest approved patch-set.
No files were changed between the latest approved patch-set and the  
submitted one.

 )Change subject: stdlib: Change #virtual_networks of mesi_two_level to 3
..

stdlib: Change #virtual_networks of mesi_two_level to 3

A grep of "virtual_network" in src/mem/ruby/protocol shows that
files in MESI_Two_Level.slicc utilizes at 3 virtual networks.

Change-Id: I3e8dd09dd82b9c802fdf91145c6d998bc6db541b
Signed-off-by: Hoa Nguyen 
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/65592
Maintainer: Jason Lowe-Power 
Tested-by: kokoro 
Reviewed-by: Jason Lowe-Power 
---
M  
src/python/gem5/components/cachehierarchies/ruby/mesi_two_level_cache_hierarchy.py

1 file changed, 20 insertions(+), 3 deletions(-)

Approvals:
  Jason Lowe-Power: Looks good to me, approved; Looks good to me, approved
  kokoro: Regressions pass




diff --git  
a/src/python/gem5/components/cachehierarchies/ruby/mesi_two_level_cache_hierarchy.py  
b/src/python/gem5/components/cachehierarchies/ruby/mesi_two_level_cache_hierarchy.py

index 82089a5..79c8b0a 100644
---  
a/src/python/gem5/components/cachehierarchies/ruby/mesi_two_level_cache_hierarchy.py
+++  
b/src/python/gem5/components/cachehierarchies/ruby/mesi_two_level_cache_hierarchy.py

@@ -83,11 +83,11 @@

 self.ruby_system = RubySystem()

-# MESI_Two_Level needs 5 virtual networks
-self.ruby_system.number_of_virtual_networks = 5
+# MESI_Two_Level needs 3 virtual networks
+self.ruby_system.number_of_virtual_networks = 3

 self.ruby_system.network = SimplePt2Pt(self.ruby_system)
-self.ruby_system.network.number_of_virtual_networks = 5
+self.ruby_system.network.number_of_virtual_networks = 3

 self._l1_controllers = []
 for i, core in enumerate(board.get_processor().get_cores()):

--
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: I3e8dd09dd82b9c802fdf91145c6d998bc6db541b
Gerrit-Change-Number: 65592
Gerrit-PatchSet: 3
Gerrit-Owner: Hoa Nguyen 
Gerrit-Reviewer: Bobby Bruce 
Gerrit-Reviewer: Hoa Nguyen 
Gerrit-Reviewer: Jason Lowe-Power 
Gerrit-Reviewer: Jason Lowe-Power 
Gerrit-Reviewer: kokoro 
Gerrit-MessageType: merged
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[gem5-dev] [S] Change in gem5/gem5[develop]: stdlib: More helpful message for the filelock error

2022-11-29 Thread Hoa Nguyen (Gerrit) via gem5-dev
Hoa Nguyen has submitted this change. (  
https://gem5-review.googlesource.com/c/public/gem5/+/66091?usp=email )


 (

1 is the latest approved patch-set.
No files were changed between the latest approved patch-set and the  
submitted one.

 )Change subject: stdlib: More helpful message for the filelock error
..

stdlib: More helpful message for the filelock error

Change-Id: Ib8e3bc9fc145a9604670e8288209ac62bfbd7932
Signed-off-by: Hoa Nguyen 
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/66091
Maintainer: Bobby Bruce 
Reviewed-by: Bobby Bruce 
Tested-by: kokoro 
---
M src/python/gem5/utils/filelock.py
1 file changed, 26 insertions(+), 2 deletions(-)

Approvals:
  kokoro: Regressions pass
  Bobby Bruce: Looks good to me, approved; Looks good to me, approved




diff --git a/src/python/gem5/utils/filelock.py  
b/src/python/gem5/utils/filelock.py

index 82e1122..a6798e9 100644
--- a/src/python/gem5/utils/filelock.py
+++ b/src/python/gem5/utils/filelock.py
@@ -69,12 +69,22 @@
 except OSError as e:
 if e.errno != errno.EEXIST:
 raise
+solution_message = (
+"This is likely due to the existence"
+" of the lock file '{}'. If there's no other process"
+" the lock file, you can manually delete the lock file  
and"

+" rerun the script.".format(self.lockfile)
+)
 if self.timeout is None:
 raise FileLockException(
-"Could not acquire lock on  
{}".format(self.file_name)

+"Could not acquire lock on {}. {}".format(
+self.file_name, solution_message
+)
 )
 if (time.time() - start_time) >= self.timeout:
-raise FileLockException("Timeout occured.")
+raise FileLockException(
+"Timeout occured. {}".format(solution_message)
+)
 time.sleep(self.delay)

 #self.is_locked = True

--
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: Ib8e3bc9fc145a9604670e8288209ac62bfbd7932
Gerrit-Change-Number: 66091
Gerrit-PatchSet: 3
Gerrit-Owner: Hoa Nguyen 
Gerrit-Reviewer: Bobby Bruce 
Gerrit-Reviewer: Hoa Nguyen 
Gerrit-Reviewer: kokoro 
Gerrit-MessageType: merged
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[gem5-dev] [S] Change in gem5/gem5[develop]: sim: Add missing virtual destructor to GlobalSyncEvent

2022-11-29 Thread Bobby Bruce (Gerrit) via gem5-dev
Bobby Bruce has submitted this change. (  
https://gem5-review.googlesource.com/c/public/gem5/+/66152?usp=email )


Change subject: sim: Add missing virtual destructor to GlobalSyncEvent
..

sim: Add missing virtual destructor to GlobalSyncEvent

This missing destructor in GlobalSyncEvent was causing a compilation
error in gcc-12, thus causing the compiler-tests to fail:
https://jenkins.gem5.org/job/compiler-checks/436/

In addition a destructor was added to BaseGlobalEventTemplate. This does
not directly fix the aforementioned bug provides some additional
security.

Change-Id: Iab86d3f6d55064ba3b6a8a7cb01fb14533cce4b9
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/66152
Maintainer: Jason Lowe-Power 
Tested-by: kokoro 
Maintainer: Bobby Bruce 
Reviewed-by: Jason Lowe-Power 
---
M src/sim/global_event.hh
1 file changed, 26 insertions(+), 0 deletions(-)

Approvals:
  Jason Lowe-Power: Looks good to me, approved; Looks good to me, approved
  Bobby Bruce: Looks good to me, approved
  kokoro: Regressions pass




diff --git a/src/sim/global_event.hh b/src/sim/global_event.hh
index 05ae6ca..3633204 100644
--- a/src/sim/global_event.hh
+++ b/src/sim/global_event.hh
@@ -162,6 +162,8 @@
 for (int i = 0; i < numMainEventQueues; ++i)
 barrierEvent[i] = new typename Derived::BarrierEvent(this, p,  
f);

 }
+
+virtual ~BaseGlobalEventTemplate(){}
 };


@@ -229,6 +231,8 @@
 schedule(when);
 }

+virtual ~GlobalSyncEvent (){}
+
 void process();

 const char *description() const;

--
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: Iab86d3f6d55064ba3b6a8a7cb01fb14533cce4b9
Gerrit-Change-Number: 66152
Gerrit-PatchSet: 4
Gerrit-Owner: Bobby Bruce 
Gerrit-Reviewer: Bobby Bruce 
Gerrit-Reviewer: Jason Lowe-Power 
Gerrit-Reviewer: Jason Lowe-Power 
Gerrit-Reviewer: kokoro 
Gerrit-MessageType: merged
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[gem5-dev] Build failed in Jenkins: compiler-checks #437

2022-11-29 Thread jenkins-no-reply--- via gem5-dev
See 


Changes:

[matthew.poremba] configs: Set CPU vendor to M5 Simulator in apu_se.py


--
[...truncated 1.03 KB...]
 > git checkout -f 92027a68ceea09624b4ce17da81d05ede883c484 # timeout=10
Commit message: "configs: Set CPU vendor to M5 Simulator in apu_se.py"
 > git rev-list --no-walk 4054565b853cb8b22ce30b9e0bbed944060d313b # timeout=10
[Checks API] No suitable checks publisher found.
[compiler-checks] $ /bin/sh -xe /tmp/jenkins14124865863023997101.sh
+ ./tests/compiler-tests.sh -j 16
Starting build tests with 'gcc-version-12'...
'gcc-version-12' was found in the comprehensive tests. All ISAs will be built.
  * Building target 'ARM_MOESI_hammer.opt' with 'gcc-version-12'...
  ! Failed with exit code 2.
  * Building target 'ARM_MOESI_hammer.fast' with 'gcc-version-12'...
  ! Failed with exit code 2.
  * Building target 'ARM_MESI_Three_Level.opt' with 'gcc-version-12'...
  ! Failed with exit code 2.
  * Building target 'ARM_MESI_Three_Level.fast' with 'gcc-version-12'...
  ! Failed with exit code 2.
  * Building target 'NULL_MOESI_hammer.opt' with 'gcc-version-12'...
  ! Failed with exit code 2.
  * Building target 'NULL_MOESI_hammer.fast' with 'gcc-version-12'...
  ! Failed with exit code 2.
  * Building target 'ARM.opt' with 'gcc-version-12'...
  ! Failed with exit code 2.
  * Building target 'ARM.fast' with 'gcc-version-12'...
  ! Failed with exit code 2.
  * Building target 'X86.opt' with 'gcc-version-12'...
  ! Failed with exit code 2.
  * Building target 'X86.fast' with 'gcc-version-12'...
  ! Failed with exit code 2.
  * Building target 'X86_MI_example.opt' with 'gcc-version-12'...
  ! Failed with exit code 2.
  * Building target 'X86_MI_example.fast' with 'gcc-version-12'...
  ! Failed with exit code 2.
  * Building target 'NULL_MOESI_CMP_directory.opt' with 'gcc-version-12'...
  ! Failed with exit code 2.
  * Building target 'NULL_MOESI_CMP_directory.fast' with 'gcc-version-12'...
  ! Failed with exit code 2.
  * Building target 'NULL.opt' with 'gcc-version-12'...
  ! Failed with exit code 2.
  * Building target 'NULL.fast' with 'gcc-version-12'...
  ! Failed with exit code 2.
  * Building target 'GCN3_X86.opt' with 'gcc-version-12'...
  ! Failed with exit code 2.
  * Building target 'GCN3_X86.fast' with 'gcc-version-12'...
  ! Failed with exit code 2.
  * Building target 'Garnet_standalone.opt' with 'gcc-version-12'...
  ! Failed with exit code 2.
  * Building target 'Garnet_standalone.fast' with 'gcc-version-12'...
  ! Failed with exit code 2.
  * Building target 'MIPS.opt' with 'gcc-version-12'...
  ! Failed with exit code 2.
  * Building target 'MIPS.fast' with 'gcc-version-12'...
  ! Failed with exit code 2.
  * Building target 'X86_MOESI_AMD_Base.opt' with 'gcc-version-12'...
  ! Failed with exit code 2.
  * Building target 'X86_MOESI_AMD_Base.fast' with 'gcc-version-12'...
  ! Failed with exit code 2.
  * Building target 'ALL.opt' with 'gcc-version-12'...
  ! Failed with exit code 2.
  * Building target 'ALL.fast' with 'gcc-version-12'...
  ! Failed with exit code 2.
  * Building target 'RISCV.opt' with 'gcc-version-12'...
  ! Failed with exit code 2.
  * Building target 'RISCV.fast' with 'gcc-version-12'...
  ! Failed with exit code 2.
  * Building target 'POWER.opt' with 'gcc-version-12'...
  ! Failed with exit code 2.
  * Building target 'POWER.fast' with 'gcc-version-12'...
  ! Failed with exit code 2.
  * Building target 'NULL_MESI_Two_Level.opt' with 'gcc-version-12'...
  ! Failed with exit code 2.
  * Building target 'NULL_MESI_Two_Level.fast' with 'gcc-version-12'...
  ! Failed with exit code 2.
  * Building target 'ARM_MESI_Three_Level_HTM.opt' with 'gcc-version-12'...
  ! Failed with exit code 2.
  * Building target 'ARM_MESI_Three_Level_HTM.fast' with 'gcc-version-12'...
  ! Failed with exit code 2.
  * Building target 'SPARC.opt' with 'gcc-version-12'...
  ! Failed with exit code 2.
  * Building target 'SPARC.fast' with 'gcc-version-12'...
  ! Failed with exit code 2.
  * Building target 'NULL_MOESI_CMP_token.opt' with 'gcc-version-12'...
  ! Failed with exit code 2.
  * Building target 'NULL_MOESI_CMP_token.fast' with 'gcc-version-12'...
  ! Failed with exit code 2.
Starting build tests with 'gcc-version-11'...
  * Building target 'NULL_MESI_Two_Level.opt' with 'gcc-version-11'...
Done.
  * Building target 'NULL_MESI_Two_Level.fast' with 'gcc-version-11'...
Done.
Starting build tests with 'gcc-version-10'...
  * Building target 'SPARC.opt' with 'gcc-version-10'...
Done.
  * Building target 'SPARC.fast' with 'gcc-version-10'...
Done.
Starting build tests with 'gcc-version-9'...
  * Building target 'ARM.opt' with 'gcc-version-9'...
Done.
  * Building target 'ARM.fast' with 'gcc-version-9'...
Done.
Starting build tests with 'gcc-version-8'...
  * Building target 'NULL_MOESI_hammer.opt' with 'gcc-version-8'...
Done.
  * Building 

[gem5-dev] Jenkins build is back to normal : nightly #440

2022-11-29 Thread jenkins-no-reply--- via gem5-dev
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[gem5-dev] [L] Change in gem5/gem5[develop]: Add another instructions

2022-11-29 Thread Roger Chang (Gerrit) via gem5-dev
Roger Chang has uploaded this change for review. (  
https://gem5-review.googlesource.com/c/public/gem5/+/66191?usp=email )



Change subject: Add another instructions
..

Add another instructions

Change-Id: Id0b7ab2772fd1b21c1ee41075df44a5b6dbe5b47
---
M src/arch/riscv/isa/bitfields.isa
M src/arch/riscv/isa/decoder.isa
2 files changed, 270 insertions(+), 193 deletions(-)



diff --git a/src/arch/riscv/isa/bitfields.isa  
b/src/arch/riscv/isa/bitfields.isa

index 863982c..4f58416 100644
--- a/src/arch/riscv/isa/bitfields.isa
+++ b/src/arch/riscv/isa/bitfields.isa
@@ -129,6 +129,7 @@

 // Cryptography instructions
 def bitfield BIT24 <24>;
+def bitfield BIT25 <25>;
 def bitfield RNUM   <23:20>;
 def bitfield KFUNCT5<29:25>;
 def bitfield BS <31:30>;
diff --git a/src/arch/riscv/isa/decoder.isa b/src/arch/riscv/isa/decoder.isa
index a0d86bc..9105a71 100644
--- a/src/arch/riscv/isa/decoder.isa
+++ b/src/arch/riscv/isa/decoder.isa
@@ -557,18 +557,26 @@
 0x3: sha256sig1({{
 Rd_sw = _rvk_emu_sha256sig1(Rs1_sw);
 }});
-0x4: sha512sum0({{
-Rd_sd = _rvk_emu_sha512sum0(Rs1_sd);
-}});
-0x5: sha512sum1({{
-Rd_sd = _rvk_emu_sha512sum1(Rs1_sd);
-}});
-0x6: sha512sig0({{
-Rd_sd = _rvk_emu_sha512sig0(Rs1_sd);
-}});
-0x7: sha512sig1({{
-Rd_sd = _rvk_emu_sha512sig1(Rs1_sd);
-}});
+0x4: decode RVTYPE {
+0x1: sha512sum0({{
+Rd_sd = _rvk_emu_sha512sum0(Rs1_sd);
+}});
+}
+0x5: decode RVTYPE {
+0x1: sha512sum1({{
+Rd_sd = _rvk_emu_sha512sum1(Rs1_sd);
+}});
+}
+0x6: decode RVTYPE {
+0x1: sha512sig0({{
+Rd_sd = _rvk_emu_sha512sig0(Rs1_sd);
+}});
+}
+0x7: decode RVTYPE {
+0x1: sha512sig1({{
+Rd_sd = _rvk_emu_sha512sig1(Rs1_sd);
+}});
+}
 0x8: sm3p0({{
 Rd_sw = _rvk_emu_sm3p0(Rs1_sw);
 }});
@@ -577,36 +585,68 @@
 }});
 }
 0x05: bseti({{
-uint64_t index = imm & (64 - 1);
-Rd = Rs1 | (UINT64_C(1) << index);
+if (rvSelect((bool)SHAMT6BIT5, false)) {
+return std::make_shared(
+"shmat[5] != 0", machInst);
+}
+uint64_t index = imm & rvSelect(32 - 1, 64 - 1);
+Rd = rvSext(Rs1 | (UINT64_C(1) << index));
 }}, imm_type = uint64_t, imm_code = {{ imm = SHAMT6;  
}});

-0x06: decode BIT24 {
-0x0: aes64im({{
-Rd_sd = _rvk_emu_aes64im(Rs1_sd);
-}});
-0x1: aes64ks1i({{
-Rd_sd = _rvk_emu_aes64ks1i(Rs1_sd, imm);
-}}, imm_type = int32_t, imm_code={{ imm = RNUM;  
}});

+0x06: decode RVTYPE {
+0x1: decode BIT24 {
+0x0: aes64im({{
+Rd_sd = _rvk_emu_aes64im(Rs1_sd);
+}});
+0x1: aes64ks1i({{
+Rd_sd = _rvk_emu_aes64ks1i(Rs1_sd, imm);
+}}, imm_type = int32_t, imm_code={{ imm =  
RNUM; }});

+}
 }
 0x09: bclri({{
-uint64_t index = imm & (64 - 1);
-Rd = Rs1 & (~(UINT64_C(1) << index));
+if (rvSelect((bool)SHAMT6BIT5, false)) {
+return std::make_shared(
+"shmat[5] != 0", machInst);
+}
+uint64_t index = imm & rvSelect(32 - 1, 64 - 1);
+Rd = rvSext(Rs1 & (~(UINT64_C(1) << index)));
 }}, imm_type = uint64_t, imm_code = {{ imm = SHAMT6;  
}});

 0x0d: binvi({{
-uint64_t index = imm &