Re: [Intel-gfx] [PATCH 04/38] drm/rcar-du: Use for_each_*_in_state

[Maarten Lankhorst]

Op 02-06-16 om 00:06 schreef Daniel Vetter:
> We want to hide drm_atomic_state internals better.
>
> Cc: Laurent Pinchart <laurent.pinch...@ideasonboard.com>
> Signed-off-by: Daniel Vetter <daniel.vet...@intel.com>
> ---
>  drivers/gpu/drm/rcar-du/rcar_du_kms.c   |  8 
>  drivers/gpu/drm/rcar-du/rcar_du_plane.c | 20 
>  2 files changed, 12 insertions(+), 16 deletions(-)
>
> diff --git a/drivers/gpu/drm/rcar-du/rcar_du_kms.c 
> b/drivers/gpu/drm/rcar-du/rcar_du_kms.c
> index e70a4f33d970..f315c55c1f65 100644
> --- a/drivers/gpu/drm/rcar-du/rcar_du_kms.c
> +++ b/drivers/gpu/drm/rcar-du/rcar_du_kms.c
> @@ -288,6 +288,8 @@ static int rcar_du_atomic_commit(struct drm_device *dev,
>  {
>   struct rcar_du_device *rcdu = dev->dev_private;
>   struct rcar_du_commit *commit;
> + struct drm_crtc *crtc;
> + struct drm_crtc_state *crtc_state;
>   unsigned int i;
>   int ret;
>  
> @@ -309,10 +311,8 @@ static int rcar_du_atomic_commit(struct drm_device *dev,
>   /* Wait until all affected CRTCs have completed previous commits and
>* mark them as pending.
>*/
> - for (i = 0; i < dev->mode_config.num_crtc; ++i) {
> - if (state->crtcs[i])
> - commit->crtcs |= 1 << drm_crtc_index(state->crtcs[i]);
> - }
> + for_each_crtc_in_state(state, crtc, crtc_state, i)
> +     commit->crtcs |= 1 << drm_crtc_index(crtc);
>  
Maybe also change this one to _mask,
either way.

Reviewed-by: Maarten Lankhorst <maarten.lankho...@linux.intel.com>
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Re: [Intel-gfx] [PATCH 06/38] drm/omap: Use for_each_plane_in_state

[Maarten Lankhorst]

Op 02-06-16 om 00:06 schreef Daniel Vetter:
> We want to hide drm_atomic_stat internals a bit better.
>
> Cc: Laurent Pinchart <laurent.pinch...@ideasonboard.com>
> Cc: Tomi Valkeinen <tomi.valkei...@ti.com>
> Signed-off-by: Daniel Vetter <daniel.vet...@intel.com>
> ---
>  drivers/gpu/drm/omapdrm/omap_drv.c | 11 +--
>  1 file changed, 5 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/gpu/drm/omapdrm/omap_drv.c 
> b/drivers/gpu/drm/omapdrm/omap_drv.c
> index d86f5479345b..4798ba43ff5b 100644
> --- a/drivers/gpu/drm/omapdrm/omap_drv.c
> +++ b/drivers/gpu/drm/omapdrm/omap_drv.c
> @@ -142,8 +142,9 @@ static int omap_atomic_commit(struct drm_device *dev,
>  {
>   struct omap_drm_private *priv = dev->dev_private;
>   struct omap_atomic_state_commit *commit;
> - unsigned int i;
> - int ret;
> + struct drm_crtc *crtc;
> + struct drm_crtc_state *crtc_state;
> + int i, ret;
>  
>   ret = drm_atomic_helper_prepare_planes(dev, state);
>   if (ret)
> @@ -163,10 +164,8 @@ static int omap_atomic_commit(struct drm_device *dev,
>   /* Wait until all affected CRTCs have completed previous commits and
>* mark them as pending.
>*/
> - for (i = 0; i < dev->mode_config.num_crtc; ++i) {
> - if (state->crtcs[i])
> - commit->crtcs |= 1 << drm_crtc_index(state->crtcs[i]);
> - }
> + for_each_crtc_in_state(state, crtc, crtc_state, i)
> + commit->crtcs |= 1 << drm_crtc_index(crtc);
>  
>   wait_event(priv->commit.wait, !omap_atomic_is_pending(priv, commit));
>  

(again 1 << index -> crtc_mask)

Reviewed-by: Maarten Lankhorst <maarten.lankho...@linux.intel.com>

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Re: [Intel-gfx] [PATCH 08/38] drm/atomic: Add __drm_atomic_get_current_plane_state

[Maarten Lankhorst]

Op 02-06-16 om 00:06 schreef Daniel Vetter:
> ... and use it in msm Again just want to encapsulate
> drm_atomic_state internals a bit.
>
> The const threading is a bit awkward in vc4 since C sucks, but I still
> think it's worth to enforce this. Eventually I want to make all the
> obj->state pointers const too, but that's a lot more work ...
>
Maybe instead of exposing such a dangerous function, wrap it in something like

drm_atomic_crtc_state_for_each_plane_state, which returns either 
get_current_plane_state or plane->state?

The only times this function is used is when iterating over all plane states a 
anyway, and it would be useful for i915 too.

~Maarten

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Re: [Intel-gfx] [PATCH 03/38] drm/msm: Use for_each_*_in_state

[Maarten Lankhorst]

_atomic_helper_prepare_planes(dev, state);
> @@ -210,28 +207,18 @@ int msm_atomic_commit(struct drm_device *dev,
>   /*
>* Figure out what crtcs we have:
>*/
> - for (i = 0; i < ncrtcs; i++) {
> - struct drm_crtc *crtc = state->crtcs[i];
> - if (!crtc)
> - continue;
> + for_each_crtc_in_state(state, crtc, crtc_state, i)
>   c->crtc_mask |= (1 << drm_crtc_index(crtc));
Maybe also change this to use drm_crtc_mask(crtc); ?
> - }
>  
>   /*
>* Figure out what fence to wait for:
>*/
> - for (i = 0; i < nplanes; i++) {
> - struct drm_plane *plane = state->planes[i];
> - struct drm_plane_state *new_state = state->plane_states[i];
> -
> - if (!plane)
> - continue;
> -
> - if ((plane->state->fb != new_state->fb) && new_state->fb) {
> - struct drm_gem_object *obj = 
> msm_framebuffer_bo(new_state->fb, 0);
> + for_each_plane_in_state(state, plane, plane_state, i) {
> + if ((plane->state->fb != plane_state->fb) && plane_state->fb) {
> + struct drm_gem_object *obj = 
> msm_framebuffer_bo(plane_state->fb, 0);
>   struct msm_gem_object *msm_obj = to_msm_bo(obj);
>  
> - new_state->fence = 
> reservation_object_get_excl_rcu(msm_obj->resv);
> + plane_state->fence = 
> reservation_object_get_excl_rcu(msm_obj->resv);
>   }
>   }
>  
> diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_fb.c 
> b/drivers/gpu/drm/rockchip/rockchip_drm_fb.c
> index 755cfdba61cd..03913b483506 100644
> --- a/drivers/gpu/drm/rockchip/rockchip_drm_fb.c
> +++ b/drivers/gpu/drm/rockchip/rockchip_drm_fb.c
> @@ -197,6 +197,7 @@ rockchip_atomic_wait_for_complete(struct drm_device *dev, 
> struct drm_atomic_stat
>   struct drm_crtc *crtc;
>   int i, ret;
>  
> +
>   for_each_crtc_in_state(old_state, crtc, old_crtc_state, i) {
>   /* No one cares about the old state, so abuse it for tracking
>* and store whether we hold a vblank reference (and should do a

What's this doing here?

With whitespace change removed.

Reviewed-by: Maarten Lankhorst <maarten.lankho...@linux.intel.com>

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Re: [Intel-gfx] [PATCH 0/9] drm/i915: Reapply page flip atomic preparation patches.

[Maarten Lankhorst]

Op 26-05-16 om 13:46 schreef Ville Syrjälä:
> On Thu, May 26, 2016 at 01:38:02PM +0200, Maarten Lankhorst wrote:
>> Op 26-05-16 om 13:35 schreef Ville Syrjälä:
>>> On Thu, May 26, 2016 at 12:37:56PM +0200, Maarten Lankhorst wrote:
>>>> Add some minor changes to prevent bisect breaking.
>>>>
>>>> Main change is making sure crtc_state is not freed while the mmio update 
>>>> still runs.
>>> I didn't see fixes for the other obvious issues.
>> This doesn't reapply nonblocking unpin/pageflip, which caused all problems. 
>> So what issues do you mean?
> The two I now remember off the top of my head were the killing of the
> flip tracepoints and the annoying dmesg spamming.
>
Flip tracepoint is still there, but I can remove the 'Finished page flip' spam 
from patch 5.
Patch 4 accidentally seems to call trace_i915_flip_request twice, which was 
fixed in patch 5.

I'll send new versions for those 2 patches.

~Maarten

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[Intel-gfx] [PATCH 8/9] drm/i915: Remove reset_counter from intel_crtc.

[Maarten Lankhorst]

With the removal of cs-based flips all mmio waits will
finish without requiring the reset counter, because the
waits will complete during gpu reset.

Signed-off-by: Maarten Lankhorst <maarten.lankho...@linux.intel.com>
Reviewed-by: Patrik Jakobsson <patrik.jakobs...@linux.intel.com>
---
 drivers/gpu/drm/i915/intel_display.c | 9 -
 drivers/gpu/drm/i915/intel_drv.h | 3 ---
 2 files changed, 12 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_display.c 
b/drivers/gpu/drm/i915/intel_display.c
index d0653f87a53a..e6d3721eeda3 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -3180,14 +3180,6 @@ void intel_finish_reset(struct drm_i915_private 
*dev_priv)
 
 static bool intel_crtc_has_pending_flip(struct drm_crtc *crtc)
 {
-   struct drm_device *dev = crtc->dev;
-   struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
-   unsigned reset_counter;
-
-   reset_counter = i915_reset_counter(_i915(dev)->gpu_error);
-   if (intel_crtc->reset_counter != reset_counter)
-   return false;
-
return !list_empty_careful(_intel_crtc(crtc)->flip_work);
 }
 
@@ -11288,7 +11280,6 @@ static int intel_crtc_page_flip(struct drm_crtc *crtc,
 
intel_fbc_pre_update(intel_crtc);
 
-   intel_crtc->reset_counter = i915_reset_counter(_priv->gpu_error);
schedule_work(>mmio_work);
 
mutex_unlock(>struct_mutex);
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index e7e262ac1f99..40f7925623fd 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -662,9 +662,6 @@ struct intel_crtc {
 
struct intel_crtc_state *config;
 
-   /* reset counter value when the last flip was submitted */
-   unsigned int reset_counter;
-
/* Access to these should be protected by dev_priv->irq_lock. */
bool cpu_fifo_underrun_disabled;
bool pch_fifo_underrun_disabled;
-- 
2.5.5

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[Intel-gfx] [PATCH 3/9] drm/i915: Add the exclusive fence to plane_state.

[Maarten Lankhorst]

Set plane_state->base.fence to the dma_buf exclusive fence,
and add a wait to the mmio function. This will make it easier
to unify plane updates later on.

Signed-off-by: Maarten Lankhorst <maarten.lankho...@linux.intel.com>
Reviewed-by: Patrik Jakobsson <patrik.jakobs...@linux.intel.com>
---
 drivers/gpu/drm/i915/intel_atomic_plane.c |  1 +
 drivers/gpu/drm/i915/intel_display.c  | 54 +++
 2 files changed, 42 insertions(+), 13 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_atomic_plane.c 
b/drivers/gpu/drm/i915/intel_atomic_plane.c
index 7de7721f65bc..2ab45f16fa65 100644
--- a/drivers/gpu/drm/i915/intel_atomic_plane.c
+++ b/drivers/gpu/drm/i915/intel_atomic_plane.c
@@ -102,6 +102,7 @@ intel_plane_destroy_state(struct drm_plane *plane,
  struct drm_plane_state *state)
 {
WARN_ON(state && to_intel_plane_state(state)->wait_req);
+   WARN_ON(state && state->fence);
drm_atomic_helper_plane_destroy_state(plane, state);
 }
 
diff --git a/drivers/gpu/drm/i915/intel_display.c 
b/drivers/gpu/drm/i915/intel_display.c
index ffd9b555d23f..0de232401f1d 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -13476,6 +13476,15 @@ static int intel_atomic_prepare_commit(struct 
drm_device *dev,
struct intel_plane_state *intel_plane_state =
to_intel_plane_state(plane_state);
 
+   if (plane_state->fence) {
+   long lret = fence_wait(plane_state->fence, 
true);
+
+   if (lret < 0) {
+   ret = lret;
+   break;
+   }
+   }
+
if (!intel_plane_state->wait_req)
continue;
 
@@ -13820,6 +13829,33 @@ static const struct drm_crtc_funcs intel_crtc_funcs = {
.atomic_destroy_state = intel_crtc_destroy_state,
 };
 
+static struct fence *intel_get_excl_fence(struct drm_i915_gem_object *obj)
+{
+   struct reservation_object *resv;
+
+
+   if (!obj->base.dma_buf)
+   return NULL;
+
+   resv = obj->base.dma_buf->resv;
+
+   /* For framebuffer backed by dmabuf, wait for fence */
+   while (1) {
+   struct fence *fence_excl, *ret = NULL;
+
+   rcu_read_lock();
+
+   fence_excl = rcu_dereference(resv->fence_excl);
+   if (fence_excl)
+   ret = fence_get_rcu(fence_excl);
+
+   rcu_read_unlock();
+
+   if (ret == fence_excl)
+   return ret;
+   }
+}
+
 /**
  * intel_prepare_plane_fb - Prepare fb for usage on plane
  * @plane: drm plane to prepare for
@@ -13872,19 +13908,6 @@ intel_prepare_plane_fb(struct drm_plane *plane,
}
}
 
-   /* For framebuffer backed by dmabuf, wait for fence */
-   if (obj && obj->base.dma_buf) {
-   long lret;
-
-   lret = 
reservation_object_wait_timeout_rcu(obj->base.dma_buf->resv,
-  false, true,
-  
MAX_SCHEDULE_TIMEOUT);
-   if (lret == -ERESTARTSYS)
-   return lret;
-
-   WARN(lret < 0, "waiting returns %li\n", lret);
-   }
-
if (!obj) {
ret = 0;
} else if (plane->type == DRM_PLANE_TYPE_CURSOR &&
@@ -13904,6 +13927,8 @@ intel_prepare_plane_fb(struct drm_plane *plane,
 
i915_gem_request_assign(_state->wait_req,
obj->last_write_req);
+
+   plane_state->base.fence = intel_get_excl_fence(obj);
}
 
i915_gem_track_fb(old_obj, obj, intel_plane->frontbuffer_bit);
@@ -13946,6 +13971,9 @@ intel_cleanup_plane_fb(struct drm_plane *plane,
i915_gem_track_fb(old_obj, obj, intel_plane->frontbuffer_bit);
 
i915_gem_request_assign(_intel_state->wait_req, NULL);
+
+   fence_put(old_intel_state->base.fence);
+   old_intel_state->base.fence = NULL;
 }
 
 int
-- 
2.5.5

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[Intel-gfx] [PATCH 4/9] drm/i915: Rework intel_crtc_page_flip to be almost atomic, v4.

[Maarten Lankhorst]

Create a work structure that will be used for all changes. This will
be used later on in the atomic commit function.

Changes since v1:
- Free old_crtc_state from unpin_work_fn properly.
Changes since v2:
- Add hunk for calling hw state verifier.
- Add missing support for color spaces.
Changes since v3:
- Update for legacy cursor work.
- null pointer to request_unreference is no longer allowed.

Signed-off-by: Maarten Lankhorst <maarten.lankho...@linux.intel.com>
---
 drivers/gpu/drm/i915/i915_debugfs.c  |  36 +-
 drivers/gpu/drm/i915/intel_display.c | 676 +--
 drivers/gpu/drm/i915/intel_drv.h |  17 +-
 3 files changed, 444 insertions(+), 285 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_debugfs.c 
b/drivers/gpu/drm/i915/i915_debugfs.c
index cced527af109..b52c1a5f3451 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -627,29 +627,43 @@ static void i915_dump_pageflip(struct seq_file *m,
   struct intel_flip_work *work)
 {
const char pipe = pipe_name(crtc->pipe);
-   const char plane = plane_name(crtc->plane);
u32 pending;
u32 addr;
+   int i;
 
pending = atomic_read(>pending);
if (pending) {
seq_printf(m, "Flip ioctl preparing on pipe %c (plane %c)\n",
-  pipe, plane);
+  pipe, plane_name(crtc->plane));
} else {
seq_printf(m, "Flip pending (waiting for vsync) on pipe %c 
(plane %c)\n",
-  pipe, plane);
+  pipe, plane_name(crtc->plane));
}
-   if (work->flip_queued_req) {
-   struct intel_engine_cs *engine = 
i915_gem_request_get_engine(work->flip_queued_req);
 
-   seq_printf(m, "Flip queued on %s at seqno %x, next seqno %x 
[current breadcrumb %x], completed? %d\n",
+
+   for (i = 0; i < work->num_planes; i++) {
+   struct intel_plane_state *old_plane_state = 
work->old_plane_state[i];
+   struct drm_plane *plane = old_plane_state->base.plane;
+   struct drm_i915_gem_request *req = old_plane_state->wait_req;
+   struct intel_engine_cs *engine;
+
+   seq_printf(m, "[PLANE:%i] part of flip.\n", plane->base.id);
+
+   if (!req) {
+   seq_printf(m, "Plane not associated with any engine\n");
+   continue;
+   }
+
+   engine = i915_gem_request_get_engine(req);
+
+   seq_printf(m, "Plane blocked on %s at seqno %x, next seqno %x 
[current breadcrumb %x], completed? %d\n",
   engine->name,
-  i915_gem_request_get_seqno(work->flip_queued_req),
+  i915_gem_request_get_seqno(req),
   dev_priv->next_seqno,
   engine->get_seqno(engine),
-  i915_gem_request_completed(work->flip_queued_req, 
true));
-   } else
-   seq_printf(m, "Flip not associated with any ring\n");
+  i915_gem_request_completed(req, true));
+   }
+
seq_printf(m, "Flip queued on frame %d, (was ready on frame %d), now 
%d\n",
   work->flip_queued_vblank,
   work->flip_ready_vblank,
@@ -662,7 +676,7 @@ static void i915_dump_pageflip(struct seq_file *m,
addr = I915_READ(DSPADDR(crtc->plane));
seq_printf(m, "Current scanout address 0x%08x\n", addr);
 
-   if (work->pending_flip_obj) {
+   if (work->flip_queued_req) {
seq_printf(m, "New framebuffer address 0x%08lx\n", 
(long)work->gtt_offset);
seq_printf(m, "MMIO update completed? %d\n",  addr == 
work->gtt_offset);
}
diff --git a/drivers/gpu/drm/i915/intel_display.c 
b/drivers/gpu/drm/i915/intel_display.c
index 0de232401f1d..0531cdb1cfa1 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -50,7 +50,7 @@
 
 static bool is_mmio_work(struct intel_flip_work *work)
 {
-   return work->mmio_work.func;
+   return !work->flip_queued_req;
 }
 
 /* Primary plane formats for gen <= 3 */
@@ -124,6 +124,9 @@ static void intel_modeset_setup_hw_state(struct drm_device 
*dev);
 static void intel_pre_disable_primary_noatomic(struct drm_crtc *crtc);
 static int ilk_max_pixel_rate(struct drm_atomic_state *state);
 static int broxton_calc_cdclk(int max_pixclk);
+static void intel_modeset_verify_crtc(struct drm_crtc *crtc,
+ struct drm_crtc_state *old_state,
+ struct drm_crtc_state *new_state);
 
 struct intel_limit {
struct 

[Intel-gfx] [PATCH 6/9] drm/i915: Remove use_mmio_flip kernel parameter.

[Maarten Lankhorst]

With the removal of cs flips this is always force enabled.

Signed-off-by: Maarten Lankhorst <maarten.lankho...@linux.intel.com>
Reviewed-by: Patrik Jakobsson <patrik.jakobs...@linux.intel.com>
---
 drivers/gpu/drm/i915/i915_params.c | 5 -
 drivers/gpu/drm/i915/i915_params.h | 1 -
 drivers/gpu/drm/i915/intel_lrc.c   | 4 +---
 3 files changed, 1 insertion(+), 9 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_params.c 
b/drivers/gpu/drm/i915/i915_params.c
index 5e18cf9f754d..9a5d58b251f5 100644
--- a/drivers/gpu/drm/i915/i915_params.c
+++ b/drivers/gpu/drm/i915/i915_params.c
@@ -49,7 +49,6 @@ struct i915_params i915 __read_mostly = {
.invert_brightness = 0,
.disable_display = 0,
.enable_cmd_parser = 1,
-   .use_mmio_flip = 0,
.mmio_debug = 0,
.verbose_state_checks = 1,
.nuclear_pageflip = 0,
@@ -175,10 +174,6 @@ module_param_named_unsafe(enable_cmd_parser, 
i915.enable_cmd_parser, int, 0600);
 MODULE_PARM_DESC(enable_cmd_parser,
 "Enable command parsing (1=enabled [default], 0=disabled)");
 
-module_param_named_unsafe(use_mmio_flip, i915.use_mmio_flip, int, 0600);
-MODULE_PARM_DESC(use_mmio_flip,
-"use MMIO flips (-1=never, 0=driver discretion [default], 
1=always)");
-
 module_param_named(mmio_debug, i915.mmio_debug, int, 0600);
 MODULE_PARM_DESC(mmio_debug,
"Enable the MMIO debug code for the first N failures (default: off). "
diff --git a/drivers/gpu/drm/i915/i915_params.h 
b/drivers/gpu/drm/i915/i915_params.h
index 1323261a0cdd..658ce7379671 100644
--- a/drivers/gpu/drm/i915/i915_params.h
+++ b/drivers/gpu/drm/i915/i915_params.h
@@ -48,7 +48,6 @@ struct i915_params {
int enable_guc_loading;
int enable_guc_submission;
int guc_log_level;
-   int use_mmio_flip;
int mmio_debug;
int edp_vswing;
unsigned int inject_load_failure;
diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index 5c191a1afaaf..53715037ab54 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -260,9 +260,7 @@ int intel_sanitize_enable_execlists(struct drm_i915_private 
*dev_priv, int enabl
if (enable_execlists == 0)
return 0;
 
-   if (HAS_LOGICAL_RING_CONTEXTS(dev_priv) &&
-   USES_PPGTT(dev_priv) &&
-   i915.use_mmio_flip >= 0)
+   if (HAS_LOGICAL_RING_CONTEXTS(dev_priv) && USES_PPGTT(dev_priv))
return 1;
 
return 0;
-- 
2.5.5

___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

[Intel-gfx] [PATCH 9/9] drm/i915: Pass atomic states to fbc update functions.

[Maarten Lankhorst]

This is required to let fbc updates run async. It has a lot of
checks whether certain locks are taken, which can be removed when
the relevant states are passed in as pointers.

Signed-off-by: Maarten Lankhorst <maarten.lankho...@linux.intel.com>
Reviewed-by: Patrik Jakobsson <patrik.jakobs...@linux.intel.com>
---
 drivers/gpu/drm/i915/intel_display.c |  8 +---
 drivers/gpu/drm/i915/intel_drv.h |  8 ++--
 drivers/gpu/drm/i915/intel_fbc.c | 39 +---
 3 files changed, 29 insertions(+), 26 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_display.c 
b/drivers/gpu/drm/i915/intel_display.c
index e6d3721eeda3..f7f2ca24d062 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -4590,7 +4590,7 @@ static void intel_pre_plane_update(struct 
intel_crtc_state *old_crtc_state)
struct intel_plane_state *old_primary_state =
to_intel_plane_state(old_pri_state);
 
-   intel_fbc_pre_update(crtc);
+   intel_fbc_pre_update(crtc, pipe_config, primary_state);
 
if (old_primary_state->visible &&
(modeset || !primary_state->visible))
@@ -11278,7 +11278,9 @@ static int intel_crtc_page_flip(struct drm_crtc *crtc,
if (obj->base.dma_buf)
work->old_plane_state[0]->base.fence = 
intel_get_excl_fence(obj);
 
-   intel_fbc_pre_update(intel_crtc);
+   intel_fbc_pre_update(intel_crtc,
+to_intel_crtc_state(new_crtc_state),
+to_intel_plane_state(new_state));
 
schedule_work(>mmio_work);
 
@@ -13247,7 +13249,7 @@ static int intel_atomic_commit(struct drm_device *dev,
 
if (crtc->state->active &&
drm_atomic_get_existing_plane_state(state, crtc->primary))
-   intel_fbc_enable(intel_crtc);
+   intel_fbc_enable(intel_crtc, pipe_config, 
to_intel_plane_state(crtc->primary->state));
 
if (crtc->state->active &&
(crtc->state->planes_changed || update_pipe))
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index 40f7925623fd..070b602ac594 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -1424,11 +1424,15 @@ static inline void intel_fbdev_restore_mode(struct 
drm_device *dev)
 void intel_fbc_choose_crtc(struct drm_i915_private *dev_priv,
   struct drm_atomic_state *state);
 bool intel_fbc_is_active(struct drm_i915_private *dev_priv);
-void intel_fbc_pre_update(struct intel_crtc *crtc);
+void intel_fbc_pre_update(struct intel_crtc *crtc,
+ struct intel_crtc_state *crtc_state,
+ struct intel_plane_state *plane_state);
 void intel_fbc_post_update(struct intel_crtc *crtc);
 void intel_fbc_init(struct drm_i915_private *dev_priv);
 void intel_fbc_init_pipe_state(struct drm_i915_private *dev_priv);
-void intel_fbc_enable(struct intel_crtc *crtc);
+void intel_fbc_enable(struct intel_crtc *crtc,
+ struct intel_crtc_state *crtc_state,
+ struct intel_plane_state *plane_state);
 void intel_fbc_disable(struct intel_crtc *crtc);
 void intel_fbc_global_disable(struct drm_i915_private *dev_priv);
 void intel_fbc_invalidate(struct drm_i915_private *dev_priv,
diff --git a/drivers/gpu/drm/i915/intel_fbc.c b/drivers/gpu/drm/i915/intel_fbc.c
index 0dea5fbcd8aa..d2b0269b2fe4 100644
--- a/drivers/gpu/drm/i915/intel_fbc.c
+++ b/drivers/gpu/drm/i915/intel_fbc.c
@@ -480,10 +480,10 @@ static void intel_fbc_deactivate(struct drm_i915_private 
*dev_priv)
intel_fbc_hw_deactivate(dev_priv);
 }
 
-static bool multiple_pipes_ok(struct intel_crtc *crtc)
+static bool multiple_pipes_ok(struct intel_crtc *crtc,
+ struct intel_plane_state *plane_state)
 {
-   struct drm_i915_private *dev_priv = crtc->base.dev->dev_private;
-   struct drm_plane *primary = crtc->base.primary;
+   struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
struct intel_fbc *fbc = _priv->fbc;
enum pipe pipe = crtc->pipe;
 
@@ -491,9 +491,7 @@ static bool multiple_pipes_ok(struct intel_crtc *crtc)
if (!no_fbc_on_multiple_pipes(dev_priv))
return true;
 
-   WARN_ON(!drm_modeset_is_locked(>mutex));
-
-   if (to_intel_plane_state(primary->state)->visible)
+   if (plane_state->visible)
fbc->visible_pipes_mask |= (1 << pipe);
else
fbc->visible_pipes_mask &= ~(1 << pipe);
@@ -708,21 +706,16 @@ static bool intel_fbc_hw_tracking_covers_screen(struct 
intel_crtc *crtc)
return effective_w <= max_w && effective_h <

[Intel-gfx] [PATCH 5/9] drm/i915: Remove cs based page flip support, v2.

[Maarten Lankhorst]

With mmio flips now available on all platforms it's time to remove
support for cs flips.

Changes since v1:
- Rebase for legacy cursor updates.

Signed-off-by: Maarten Lankhorst <maarten.lankho...@linux.intel.com>
---
 drivers/gpu/drm/i915/i915_debugfs.c  |  19 +-
 drivers/gpu/drm/i915/i915_irq.c  | 120 ++-
 drivers/gpu/drm/i915/intel_display.c | 392 +--
 drivers/gpu/drm/i915/intel_drv.h |   9 +-
 4 files changed, 33 insertions(+), 507 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_debugfs.c 
b/drivers/gpu/drm/i915/i915_debugfs.c
index b52c1a5f3451..b29ba16c90b3 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -628,7 +628,6 @@ static void i915_dump_pageflip(struct seq_file *m,
 {
const char pipe = pipe_name(crtc->pipe);
u32 pending;
-   u32 addr;
int i;
 
pending = atomic_read(>pending);
@@ -640,7 +639,6 @@ static void i915_dump_pageflip(struct seq_file *m,
   pipe, plane_name(crtc->plane));
}
 
-
for (i = 0; i < work->num_planes; i++) {
struct intel_plane_state *old_plane_state = 
work->old_plane_state[i];
struct drm_plane *plane = old_plane_state->base.plane;
@@ -664,22 +662,9 @@ static void i915_dump_pageflip(struct seq_file *m,
   i915_gem_request_completed(req, true));
}
 
-   seq_printf(m, "Flip queued on frame %d, (was ready on frame %d), now 
%d\n",
-  work->flip_queued_vblank,
-  work->flip_ready_vblank,
+   seq_printf(m, "Flip queued on frame %d, now %d\n",
+  pending ? work->flip_queued_vblank : -1,
   intel_crtc_get_vblank_counter(crtc));
-   seq_printf(m, "%d prepares\n", atomic_read(>pending));
-
-   if (INTEL_INFO(dev_priv)->gen >= 4)
-   addr = I915_HI_DISPBASE(I915_READ(DSPSURF(crtc->plane)));
-   else
-   addr = I915_READ(DSPADDR(crtc->plane));
-   seq_printf(m, "Current scanout address 0x%08x\n", addr);
-
-   if (work->flip_queued_req) {
-   seq_printf(m, "New framebuffer address 0x%08lx\n", 
(long)work->gtt_offset);
-   seq_printf(m, "MMIO update completed? %d\n",  addr == 
work->gtt_offset);
-   }
 }
 
 static int i915_gem_pageflip_info(struct seq_file *m, void *data)
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index caaf1e2a7bc1..fc2b2a7e2c55 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -136,6 +136,12 @@ static const u32 hpd_bxt[HPD_NUM_PINS] = {
POSTING_READ(type##IIR); \
 } while (0)
 
+static void
+intel_finish_page_flip_cs(struct drm_i915_private *dev_priv, unsigned pipe)
+{
+   DRM_DEBUG_KMS("Finished page flip\n");
+}
+
 /*
  * We should clear IMR at preinstall/uninstall, and just check at postinstall.
  */
@@ -1631,16 +1637,11 @@ static void gen6_rps_irq_handler(struct 
drm_i915_private *dev_priv, u32 pm_iir)
}
 }
 
-static bool intel_pipe_handle_vblank(struct drm_i915_private *dev_priv,
+static void intel_pipe_handle_vblank(struct drm_i915_private *dev_priv,
 enum pipe pipe)
 {
-   bool ret;
-
-   ret = drm_handle_vblank(dev_priv->dev, pipe);
-   if (ret)
+   if (drm_handle_vblank(dev_priv->dev, pipe))
intel_finish_page_flip_mmio(dev_priv, pipe);
-
-   return ret;
 }
 
 static void valleyview_pipestat_irq_ack(struct drm_i915_private *dev_priv,
@@ -1707,9 +1708,8 @@ static void valleyview_pipestat_irq_handler(struct 
drm_i915_private *dev_priv,
enum pipe pipe;
 
for_each_pipe(dev_priv, pipe) {
-   if (pipe_stats[pipe] & PIPE_START_VBLANK_INTERRUPT_STATUS &&
-   intel_pipe_handle_vblank(dev_priv, pipe))
-   intel_check_page_flip(dev_priv, pipe);
+   if (pipe_stats[pipe] & PIPE_START_VBLANK_INTERRUPT_STATUS)
+   intel_pipe_handle_vblank(dev_priv, pipe);
 
if (pipe_stats[pipe] & PLANE_FLIP_DONE_INT_STATUS_VLV)
intel_finish_page_flip_cs(dev_priv, pipe);
@@ -2155,9 +2155,8 @@ static void ilk_display_irq_handler(struct 
drm_i915_private *dev_priv,
DRM_ERROR("Poison interrupt\n");
 
for_each_pipe(dev_priv, pipe) {
-   if (de_iir & DE_PIPE_VBLANK(pipe) &&
-   intel_pipe_handle_vblank(dev_priv, pipe))
-   intel_check_page_flip(dev_priv, pipe);
+   if (de_iir & DE_PIPE_VBLANK(pipe))
+   intel_pipe_handle_vblank(dev_priv, pipe);
 
if (de_iir & DE_PIPE_FIFO_UNDERRUN(pipe))
intel_cpu_

[Intel-gfx] [PATCH 1/9] drm/i915: Allow mmio updates on all platforms, v3.

[Maarten Lankhorst]

With intel_pipe_update begin/end we ensure that the mmio updates
don't run during vblank interrupt, using the hw counter we can
be sure that when current vblank count != vblank count at the time
of pipe_update_end the mmio update is complete.

This allows us to use mmio updates on all platforms, using the
update_plane call.

With Chris Wilson's patch to skip waiting for vblanks for
legacy_cursor_update this potentially leaves a small race
condition. In case of !legacy_cursor_update we wait for flips to
complete so there's no race for freeing crtc_state. In case of
legacy_cursor_update there's a check for
work->crtc_state == old_crtc_state. In that case the old_crtc_state
is removed from intel_atomic_state and freed by intel_unpin_work_fn.
This ensures that intel_mmio_flip_work_func never uses a freed pointer
to crtc_state.

Changes since v1:
- Split out the flip_work rename.
Changes since v2:
- Do not break bisect by reverting the stall fix for cursor updates,
  instead add crtc_state to intel_flip_work, and make sure it's not
  freed in intel_atomic_commit for legacy cursor updates.

Signed-off-by: Maarten Lankhorst <maarten.lankho...@linux.intel.com>
---
 drivers/gpu/drm/i915/intel_display.c | 118 ---
 drivers/gpu/drm/i915/intel_drv.h |   4 +-
 2 files changed, 29 insertions(+), 93 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_display.c 
b/drivers/gpu/drm/i915/intel_display.c
index 9ccd76699f48..ae8036b5fe7c 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -10976,6 +10976,9 @@ static void intel_unpin_work_fn(struct work_struct 
*__work)
BUG_ON(atomic_read(>unpin_work_count) == 0);
atomic_dec(>unpin_work_count);
 
+   if (work->free_new_crtc_state)
+   intel_crtc_destroy_state(>base, 
>new_crtc_state->base);
+
kfree(work);
 }
 
@@ -11373,9 +11376,6 @@ static bool use_mmio_flip(struct intel_engine_cs 
*engine,
if (engine == NULL)
return true;
 
-   if (INTEL_GEN(engine->i915) < 5)
-   return false;
-
if (i915.use_mmio_flip < 0)
return false;
else if (i915.use_mmio_flip > 0)
@@ -11390,92 +11390,15 @@ static bool use_mmio_flip(struct intel_engine_cs 
*engine,
return engine != 
i915_gem_request_get_engine(obj->last_write_req);
 }
 
-static void skl_do_mmio_flip(struct intel_crtc *intel_crtc,
-unsigned int rotation,
-struct intel_flip_work *work)
-{
-   struct drm_device *dev = intel_crtc->base.dev;
-   struct drm_i915_private *dev_priv = dev->dev_private;
-   struct drm_framebuffer *fb = intel_crtc->base.primary->fb;
-   const enum pipe pipe = intel_crtc->pipe;
-   u32 ctl, stride, tile_height;
-
-   ctl = I915_READ(PLANE_CTL(pipe, 0));
-   ctl &= ~PLANE_CTL_TILED_MASK;
-   switch (fb->modifier[0]) {
-   case DRM_FORMAT_MOD_NONE:
-   break;
-   case I915_FORMAT_MOD_X_TILED:
-   ctl |= PLANE_CTL_TILED_X;
-   break;
-   case I915_FORMAT_MOD_Y_TILED:
-   ctl |= PLANE_CTL_TILED_Y;
-   break;
-   case I915_FORMAT_MOD_Yf_TILED:
-   ctl |= PLANE_CTL_TILED_YF;
-   break;
-   default:
-   MISSING_CASE(fb->modifier[0]);
-   }
-
-   /*
-* The stride is either expressed as a multiple of 64 bytes chunks for
-* linear buffers or in number of tiles for tiled buffers.
-*/
-   if (intel_rotation_90_or_270(rotation)) {
-   /* stride = Surface height in tiles */
-   tile_height = intel_tile_height(dev_priv, fb->modifier[0], 0);
-   stride = DIV_ROUND_UP(fb->height, tile_height);
-   } else {
-   stride = fb->pitches[0] /
-   intel_fb_stride_alignment(dev_priv, fb->modifier[0],
- fb->pixel_format);
-   }
-
-   /*
-* Both PLANE_CTL and PLANE_STRIDE are not updated on vblank but on
-* PLANE_SURF updates, the update is then guaranteed to be atomic.
-*/
-   I915_WRITE(PLANE_CTL(pipe, 0), ctl);
-   I915_WRITE(PLANE_STRIDE(pipe, 0), stride);
-
-   I915_WRITE(PLANE_SURF(pipe, 0), work->gtt_offset);
-   POSTING_READ(PLANE_SURF(pipe, 0));
-}
-
-static void ilk_do_mmio_flip(struct intel_crtc *intel_crtc,
-struct intel_flip_work *work)
-{
-   struct drm_device *dev = intel_crtc->base.dev;
-   struct drm_i915_private *dev_priv = dev->dev_private;
-   struct intel_framebuffer *intel_fb =
-   to_intel_framebuffer(intel_crtc->base.primary->fb);
-   struct drm_i915_gem_object *obj = intel_fb->obj;
-   i915_reg_t reg = DSPCNTR(intel_crtc->plane);
-   

[Intel-gfx] [PATCH 2/9] drm/i915: Convert flip_work to a list, v2.

[Maarten Lankhorst]

This will be required to allow more than 1 outstanding
update in the future. For now it's unclear how this will
will be handled, but with a list it's definitely possible.

Changes since v1:
- Changed to prevent breaking with the legacy cursor update changes.

Signed-off-by: Maarten Lankhorst <maarten.lankho...@linux.intel.com>
---
 drivers/gpu/drm/i915/i915_debugfs.c  |  90 +++-
 drivers/gpu/drm/i915/i915_drv.h  |   2 +-
 drivers/gpu/drm/i915/intel_display.c | 156 +--
 drivers/gpu/drm/i915/intel_drv.h |   4 +-
 4 files changed, 149 insertions(+), 103 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_debugfs.c 
b/drivers/gpu/drm/i915/i915_debugfs.c
index ac7e5692496d..cced527af109 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -621,6 +621,53 @@ static int i915_gem_gtt_info(struct seq_file *m, void 
*data)
return 0;
 }
 
+static void i915_dump_pageflip(struct seq_file *m,
+  struct drm_i915_private *dev_priv,
+  struct intel_crtc *crtc,
+  struct intel_flip_work *work)
+{
+   const char pipe = pipe_name(crtc->pipe);
+   const char plane = plane_name(crtc->plane);
+   u32 pending;
+   u32 addr;
+
+   pending = atomic_read(>pending);
+   if (pending) {
+   seq_printf(m, "Flip ioctl preparing on pipe %c (plane %c)\n",
+  pipe, plane);
+   } else {
+   seq_printf(m, "Flip pending (waiting for vsync) on pipe %c 
(plane %c)\n",
+  pipe, plane);
+   }
+   if (work->flip_queued_req) {
+   struct intel_engine_cs *engine = 
i915_gem_request_get_engine(work->flip_queued_req);
+
+   seq_printf(m, "Flip queued on %s at seqno %x, next seqno %x 
[current breadcrumb %x], completed? %d\n",
+  engine->name,
+  i915_gem_request_get_seqno(work->flip_queued_req),
+  dev_priv->next_seqno,
+  engine->get_seqno(engine),
+  i915_gem_request_completed(work->flip_queued_req, 
true));
+   } else
+   seq_printf(m, "Flip not associated with any ring\n");
+   seq_printf(m, "Flip queued on frame %d, (was ready on frame %d), now 
%d\n",
+  work->flip_queued_vblank,
+  work->flip_ready_vblank,
+  intel_crtc_get_vblank_counter(crtc));
+   seq_printf(m, "%d prepares\n", atomic_read(>pending));
+
+   if (INTEL_INFO(dev_priv)->gen >= 4)
+   addr = I915_HI_DISPBASE(I915_READ(DSPSURF(crtc->plane)));
+   else
+   addr = I915_READ(DSPADDR(crtc->plane));
+   seq_printf(m, "Current scanout address 0x%08x\n", addr);
+
+   if (work->pending_flip_obj) {
+   seq_printf(m, "New framebuffer address 0x%08lx\n", 
(long)work->gtt_offset);
+   seq_printf(m, "MMIO update completed? %d\n",  addr == 
work->gtt_offset);
+   }
+}
+
 static int i915_gem_pageflip_info(struct seq_file *m, void *data)
 {
struct drm_info_node *node = m->private;
@@ -639,48 +686,13 @@ static int i915_gem_pageflip_info(struct seq_file *m, 
void *data)
struct intel_flip_work *work;
 
spin_lock_irq(>event_lock);
-   work = crtc->flip_work;
-   if (work == NULL) {
+   if (list_empty(>flip_work)) {
seq_printf(m, "No flip due on pipe %c (plane %c)\n",
   pipe, plane);
} else {
-   u32 pending;
-   u32 addr;
-
-   pending = atomic_read(>pending);
-   if (pending) {
-   seq_printf(m, "Flip ioctl preparing on pipe %c 
(plane %c)\n",
-  pipe, plane);
-   } else {
-   seq_printf(m, "Flip pending (waiting for vsync) 
on pipe %c (plane %c)\n",
-  pipe, plane);
-   }
-   if (work->flip_queued_req) {
-   struct intel_engine_cs *engine = 
i915_gem_request_get_engine(work->flip_queued_req);
-
-   seq_printf(m, "Flip queued on %s at seqno %x, 
next seqno %x [current breadcrumb %x], completed? %d\n",
-  engine->name,
-  
i915_gem_request_get_seqno(work->flip_queued_req),
-  dev_priv->next_seqno,
-

[Intel-gfx] [PATCH 0/9] drm/i915: Reapply page flip atomic preparation patches.

[Maarten Lankhorst]

Add some minor changes to prevent bisect breaking.

Main change is making sure crtc_state is not freed while the mmio update still 
runs.

Maarten Lankhorst (9):
  drm/i915: Allow mmio updates on all platforms, v3.
  drm/i915: Convert flip_work to a list, v2.
  drm/i915: Add the exclusive fence to plane_state.
  drm/i915: Rework intel_crtc_page_flip to be almost atomic, v4.
  drm/i915: Remove cs based page flip support, v2.
  drm/i915: Remove use_mmio_flip kernel parameter.
  drm/i915: Remove queue_flip pointer.
  drm/i915: Remove reset_counter from intel_crtc.
  drm/i915: Pass atomic states to fbc update functions.

 drivers/gpu/drm/i915/i915_debugfs.c   |   89 ++-
 drivers/gpu/drm/i915/i915_drv.h   |5 -
 drivers/gpu/drm/i915/i915_irq.c   |  120 +---
 drivers/gpu/drm/i915/i915_params.c|5 -
 drivers/gpu/drm/i915/i915_params.h|1 -
 drivers/gpu/drm/i915/intel_atomic_plane.c |1 +
 drivers/gpu/drm/i915/intel_display.c  | 1118 -
 drivers/gpu/drm/i915/intel_drv.h  |   37 +-
 drivers/gpu/drm/i915/intel_fbc.c  |   39 +-
 drivers/gpu/drm/i915/intel_lrc.c  |4 +-
 10 files changed, 417 insertions(+), 1002 deletions(-)

-- 
2.5.5

___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

[Intel-gfx] [PATCH 7/9] drm/i915: Remove queue_flip pointer.

[Maarten Lankhorst]

With the removal of cs support this is no longer reachable.
Can be revived if needed.

Signed-off-by: Maarten Lankhorst <maarten.lankho...@linux.intel.com>
Reviewed-by: Patrik Jakobsson <patrik.jakobs...@linux.intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h  |   5 -
 drivers/gpu/drm/i915/intel_display.c | 259 ---
 2 files changed, 264 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index ce1d368e4e50..85a7c44ed55c 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -618,11 +618,6 @@ struct drm_i915_display_funcs {
void (*audio_codec_disable)(struct intel_encoder *encoder);
void (*fdi_link_train)(struct drm_crtc *crtc);
void (*init_clock_gating)(struct drm_device *dev);
-   int (*queue_flip)(struct drm_device *dev, struct drm_crtc *crtc,
- struct drm_framebuffer *fb,
- struct drm_i915_gem_object *obj,
- struct drm_i915_gem_request *req,
- uint64_t gtt_offset);
void (*hpd_irq_setup)(struct drm_i915_private *dev_priv);
/* clock updates for mode set */
/* cursor updates */
diff --git a/drivers/gpu/drm/i915/intel_display.c 
b/drivers/gpu/drm/i915/intel_display.c
index 2324b74f72f4..d0653f87a53a 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -11071,237 +11071,6 @@ void intel_finish_page_flip_mmio(struct 
drm_i915_private *dev_priv, int pipe)
spin_unlock_irqrestore(>event_lock, flags);
 }
 
-static int intel_gen2_queue_flip(struct drm_device *dev,
-struct drm_crtc *crtc,
-struct drm_framebuffer *fb,
-struct drm_i915_gem_object *obj,
-struct drm_i915_gem_request *req,
-uint64_t gtt_offset)
-{
-   struct intel_engine_cs *engine = req->engine;
-   struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
-   u32 flip_mask;
-   int ret;
-
-   ret = intel_ring_begin(req, 6);
-   if (ret)
-   return ret;
-
-   /* Can't queue multiple flips, so wait for the previous
-* one to finish before executing the next.
-*/
-   if (intel_crtc->plane)
-   flip_mask = MI_WAIT_FOR_PLANE_B_FLIP;
-   else
-   flip_mask = MI_WAIT_FOR_PLANE_A_FLIP;
-   intel_ring_emit(engine, MI_WAIT_FOR_EVENT | flip_mask);
-   intel_ring_emit(engine, MI_NOOP);
-   intel_ring_emit(engine, MI_DISPLAY_FLIP |
-   MI_DISPLAY_FLIP_PLANE(intel_crtc->plane));
-   intel_ring_emit(engine, fb->pitches[0]);
-   intel_ring_emit(engine, gtt_offset);
-   intel_ring_emit(engine, 0); /* aux display base address, unused */
-
-   return 0;
-}
-
-static int intel_gen3_queue_flip(struct drm_device *dev,
-struct drm_crtc *crtc,
-struct drm_framebuffer *fb,
-struct drm_i915_gem_object *obj,
-struct drm_i915_gem_request *req,
-uint64_t gtt_offset)
-{
-   struct intel_engine_cs *engine = req->engine;
-   struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
-   u32 flip_mask;
-   int ret;
-
-   ret = intel_ring_begin(req, 6);
-   if (ret)
-   return ret;
-
-   if (intel_crtc->plane)
-   flip_mask = MI_WAIT_FOR_PLANE_B_FLIP;
-   else
-   flip_mask = MI_WAIT_FOR_PLANE_A_FLIP;
-   intel_ring_emit(engine, MI_WAIT_FOR_EVENT | flip_mask);
-   intel_ring_emit(engine, MI_NOOP);
-   intel_ring_emit(engine, MI_DISPLAY_FLIP_I915 |
-   MI_DISPLAY_FLIP_PLANE(intel_crtc->plane));
-   intel_ring_emit(engine, fb->pitches[0]);
-   intel_ring_emit(engine, gtt_offset);
-   intel_ring_emit(engine, MI_NOOP);
-
-   return 0;
-}
-
-static int intel_gen4_queue_flip(struct drm_device *dev,
-struct drm_crtc *crtc,
-struct drm_framebuffer *fb,
-struct drm_i915_gem_object *obj,
-struct drm_i915_gem_request *req,
-uint64_t gtt_offset)
-{
-   struct intel_engine_cs *engine = req->engine;
-   struct drm_i915_private *dev_priv = dev->dev_private;
-   struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
-   uint32_t pf, pipesrc;
-   int ret;
-
-   ret = intel_ring_begin(req, 4);
-   if (ret)
-   return ret;
-
-   /* i965+ uses the linear or tiled offsets from the
-* Display Registers (which do not change across a page-flip)
-* so we need only reprogram the base addres

Re: [Intel-gfx] [PATCH] mutex: Do not spin/queue before performing ww_mutex deadlock avoidance

[Maarten Lankhorst]

Op 26-05-16 om 10:31 schreef Chris Wilson:
> The ww_mutex has the property of allowing the lock to detect and report
> when it may be used in deadlocking scenarios (to allow the caller to
> unwind its locks and avoid the deadlock). This detection needs to be
> performed before we queue up for the spin, otherwise we wait on the
> osq_lock() for our turn to detect the deadlock that another thread is
> spinning on, waiting for us. Otherwise as we are stuck behind our waiter,
> throughput plummets.
>
> This can be demonstrated by trying concurrent atomic modesets.
>
> Testcase: igt/kms_cursor_legacy
> Signed-off-by: Chris Wilson <ch...@chris-wilson.co.uk>
> Cc: Peter Zijlstra <pet...@infradead.org>
> Cc: Ingo Molnar <mi...@redhat.com>
> Cc: Christian König <christian.koe...@amd.com>
> Cc: Maarten Lankhorst <maarten.lankho...@linux.intel.com>
> Cc: linux-ker...@vger.kernel.org
> ---
>  kernel/locking/mutex.c | 56 
> --
>  1 file changed, 36 insertions(+), 20 deletions(-)
>
> diff --git a/kernel/locking/mutex.c b/kernel/locking/mutex.c
> index e364b424b019..d60f1ba3e64f 100644
> --- a/kernel/locking/mutex.c
> +++ b/kernel/locking/mutex.c
> @@ -217,12 +217,35 @@ ww_mutex_set_context_slowpath(struct ww_mutex *lock,
>  }
>  
>  #ifdef CONFIG_MUTEX_SPIN_ON_OWNER
> +static bool ww_mutex_may_deadlock(struct mutex *lock,
> +   struct ww_acquire_ctx *ww_ctx)
> +{
> + if (ww_ctx && ww_ctx->acquired > 0) {
> + struct ww_mutex *ww;
> +
> + ww = container_of(lock, struct ww_mutex, base);
> + /*
> +  * If ww->ctx is set the contents are undefined, only
> +  * by acquiring wait_lock there is a guarantee that
> +  * they are not invalid when reading.
> +  *
> +  * As such, when deadlock detection needs to be
> +  * performed the optimistic spinning cannot be done.
> +  */
> + if (READ_ONCE(ww->ctx))
> + return true;
> + }
> +
> + return false;
> +}
The check should be at the beginning of __mutex_lock_common,
regardless of spin_on_owner.

This is because -EALREADY was originally designed to be exceptional,
but is used a lot by design in drm/atomic now.

The other check for -EALREADY can be killed, or changed to a
DEBUG_LOCKS_WARN_ON.

The check should also not be for NULL, but for use_ww_ctx.
This way the if check is optimized out for the ww_ctx path, where
ww_ctx is always non-null.

This would also be something for Cc: stable. :)

~Maarten
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Re: [Intel-gfx] ✗ Ro.CI.BAT: failure for drm/i915: Reapply page flip atomic preparation patches.

[Maarten Lankhorst]

Op 26-05-16 om 13:02 schreef Patchwork:
> == Series Details ==
>
> Series: drm/i915: Reapply page flip atomic preparation patches.
> URL   : https://patchwork.freedesktop.org/series/7801/
> State : failure
>
> == Summary ==
>
> Series 7801v1 drm/i915: Reapply page flip atomic preparation patches.
> http://patchwork.freedesktop.org/api/1.0/series/7801/revisions/1/mbox
>
> Test gem_busy:
> Subgroup basic-blt:
> dmesg-warn -> PASS   (ro-skl-i7-6700hq)
> Test gem_exec_flush:
> Subgroup basic-batch-kernel-default-cmd:
> pass   -> FAIL   (ro-byt-n2820)
Seems to fail pretty randomly on ro-byt-n2820.

https://bugs.freedesktop.org/show_bug.cgi?id=95372
> Test gem_flink_basic:
> Subgroup bad-open:
> pass   -> DMESG-WARN (ro-skl-i7-6700hq)
> Test kms_flip:
> Subgroup basic-flip-vs-wf_vblank:
> fail   -> PASS   (ro-bdw-i7-5600u)
> skip   -> PASS   (fi-skl-i5-6260u)
> Test kms_frontbuffer_tracking:
> Subgroup basic:
> pass   -> DMESG-WARN (ro-skl-i7-6700hq)
> Test kms_psr_sink_crc:
> Subgroup psr_basic:
> pass   -> DMESG-WARN (ro-skl-i7-6700hq)
-skl failures are all "[drm:intel_pipe_update_start [i915]] *ERROR* Potential 
atomic update failure on pipe A", which seem to happen randomly.
https://bugs.freedesktop.org/show_bug.cgi?id=95632
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Re: [Intel-gfx] [PATCH] mutex: Do not spin/queue before performing ww_mutex deadlock avoidance

[Maarten Lankhorst]

Op 26-05-16 om 12:43 schreef Chris Wilson:
> On Thu, May 26, 2016 at 12:37:30PM +0200, Maarten Lankhorst wrote:
>> The check should also not be for NULL, but for use_ww_ctx.
>> This way the if check is optimized out for the ww_ctx path, where
>> ww_ctx is always non-null.
> The compiler can see use_ww_ctx == false => ww_ctx == NULL just as well
> to do dead-code elimination, i.e. use_ww_ctx is superflouus and does not
> reduce the code size. (gcc 4.7.2, 4.9.1, 5.3.1)
That's true, but it cannot do the same when use_ww_ctx = true.
In this case the function will always be called with ww_ctx != NULL,
but the compiler can't see that, so it will keep the check even if it's always 
true.

~Maarten
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Re: [Intel-gfx] [PATCH 0/9] drm/i915: Reapply page flip atomic preparation patches.

[Maarten Lankhorst]

Op 26-05-16 om 13:35 schreef Ville Syrjälä:
> On Thu, May 26, 2016 at 12:37:56PM +0200, Maarten Lankhorst wrote:
>> Add some minor changes to prevent bisect breaking.
>>
>> Main change is making sure crtc_state is not freed while the mmio update 
>> still runs.
> I didn't see fixes for the other obvious issues.
This doesn't reapply nonblocking unpin/pageflip, which caused all problems. So 
what issues do you mean?

~Maarten
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Re: [Intel-gfx] [PATCH 05/10] drm/cirrus: Drop redundnant gamma size check

[Maarten Lankhorst]

Op 30-03-16 om 11:51 schreef Daniel Vetter:
> The core does this for us already.
Unfortunately some other drivers do the same. :(

various variations of

end = min_t(start + size, 256);

I'll kill the rest off when killing start parameter and returning int.

Reviewed-by: Maarten Lankhorst <maarten.lankho...@linux.intel.com>
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Re: [Intel-gfx] [PATCH 01/10] drm: Initialize a linear gamma table by default

[Maarten Lankhorst]

Op 30-03-16 om 11:51 schreef Daniel Vetter:
> Code stolen from gma500.
It would be useful to mention why this is done. :)

But even with this patch it seems the legacy gamma in gamma_get is not very 
reliable.
A failed call to gamma_set could leave wrong values in crtc->gamma_store either 
by calling the ioctl with lut.blue set to NULL, or call gamma_set and interrupt 
with a signal.
For atomic color management get_gamma won't be accurate at all if mixed with 
new color management.

~Maarten
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Re: [Intel-gfx] [PATCH 02/10] drm/fb-helper: Remove dead code in setcolreg

[Maarten Lankhorst]

Op 30-03-16 om 11:51 schreef Daniel Vetter:
> DRM fbdev emulation only supports pallete_color with depth == 8, and
> truecolor with depth > 8. Handling depth == 16 for palettes is hence
> dead code, let's remove it.
Hooray, less chance for failure!

Reviewed-by: Maarten Lankhorst <maarten.lankho...@linux.intel.com>
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Re: [Intel-gfx] [PATCH 12/26] drm/atomic-helper: Massage swap_state signature somewhat

[Maarten Lankhorst]

Op 31-05-16 om 12:46 schreef Daniel Vetter:
> On Tue, May 31, 2016 at 10:43:56AM +0200, Maarten Lankhorst wrote:
>> Op 30-05-16 om 17:09 schreef Daniel Vetter:
>>> On Mon, May 30, 2016 at 03:08:39PM +0200, Maarten Lankhorst wrote:
>>>> Op 29-05-16 om 20:35 schreef Daniel Vetter:
>>>>> - dev is redundant, we have state->atomic
>>>>> - add stall parameter, which must be set when swapping needs to stall
>>>>>   for preceeding commits to stop looking at ->state pointers. Currently
>>>>>   all drivers need this to be, just prep work for a glorious future.
>>>> I have to disagree, if you want to stall it should be done in a separate 
>>>> helper before swapping state.
>>>> That function should also have the ability to fail, since we haven't 
>>>> called swap_state yet. :)
>>>>
>>>> Maybe with nonblock as parameter, so it could fail with -EBUSY if it would 
>>>> stall, and -EINTR if interrupted?
>>> This is not the stalling you're thinking of. The EBUSY check is in
>>> drm_atomic_helper_setup_commit (and as such entirely optional).
>>>
>>> And if you don't ever use the nonblocking helpers, no struct
>>> drm_crtc_commit will ever show up in crtc->commit_list, which means this
>>> here also doesn't do anything.
>>>
>>> This stall here is just to make sure that the previous commit doesn't get
>>> confused because we've ripped out crtc/plane/connector->state from
>>> underneath it. And as soon as we add previous_state pointers to
>>> drm_atomic_state and wire it up through all the hooks we can set
>>> stall=false here, since then pipelining with a queue depth > 1 is
>>> possible.
>> If a driver supports depth > 1 it could skip the extra help waiter and just 
>> call swap_state.
>> The helper should return -EINTR when needed.
>>
>> if (nonblock) {
>> ret = drm_atomic_helper_wait_for_completion(state);
>> if (ret)
>> return ret;
>> }
>>
>> drm_atomic_helper_swap_state..
> That's why there's this stall parameter ... Also,
> wait_for_completion(state) is not enough, there's 3 different completions.
Yeah but this is pseudocode. I don't think waiting belongs to swap_state, 
should be done before so we can still back out if wait fails..

~Maarten
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Re: [Intel-gfx] [PATCH 06/10] drm/msm: Nuke dummy gamma_set/get functions

[Maarten Lankhorst]

Op 30-03-16 om 11:51 schreef Daniel Vetter:
> Again the fbdev emulation gamma_set/get functions are only needed for
> drivers that try to also use 8bpp paletted mode. Which msm doesn't, so
> this is dead code. Let's rip it out.
>
> Cc: Rob Clark <robdcl...@gmail.com>
> Signed-off-by: Daniel Vetter <daniel.vet...@intel.com>
Reviewed-by: Maarten Lankhorst <maarten.lankho...@linux.intel.com>
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Re: [Intel-gfx] [PATCH 09/10] drm/qxl: Don't set a gamma table size

[Maarten Lankhorst]

Op 30-03-16 om 11:51 schreef Daniel Vetter:
> qxl doesn't have any functions for setting the gamma table, so this is
> completely defunct.
>
> Not nice to lie to userspace, so let's stop!
Reviewed-by: Maarten Lankhorst <maarten.lankho...@linux.intel.com>
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Re: [Intel-gfx] [PATCH 01/10] drm: Initialize a linear gamma table by default

[Maarten Lankhorst]

Op 31-05-16 om 15:24 schreef Daniel Vetter:
> On Tue, May 31, 2016 at 03:05:32PM +0200, Maarten Lankhorst wrote:
>> Op 30-03-16 om 11:51 schreef Daniel Vetter:
>>> Code stolen from gma500.
>> It would be useful to mention why this is done. :)
>>
>> But even with this patch it seems the legacy gamma in gamma_get is not very 
>> reliable.
>> A failed call to gamma_set could leave wrong values in crtc->gamma_store 
>> either by calling the ioctl with lut.blue set to NULL, or call gamma_set and 
>> interrupt with a signal.
>> For atomic color management get_gamma won't be accurate at all if mixed with 
>> new color management.
> Hm, it's just some safety code I found laying around, and figured that
> looks like a good idea. You think it's worth it with some improved commit
> message added?
Might as well. It makes gamma_get ioctl slightly more reliable, but for 
reliable gamma should probably use crtc properties or atomic. :)
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Re: [Intel-gfx] [PATCH] drm/atomic-helper: nonblocking commit support

[Maarten Lankhorst]

Op 30-05-16 om 10:01 schreef Daniel Vetter:
> Design ideas:
>
> - split up the actual commit into different phases, and have
>   completions for each of them. This will be useful for the future
>   when we want to interleave phases much more aggressively, for e.g.
>   queue depth > 1. For not it's just a minimal optimization compared
>   to current common nonblocking implementation patterns from drivers,
>   which all stall for the entire commit to complete, including vblank
>   waits and cleanups.
>
> - Extract a separate atomic_commit_hw hook since that's the part most
>   drivers will need to overwrite, hopefully allowing even more shared
>   code.
>
> - Enforce EBUSY seamntics by attaching one of the completions to the
>   flip_done vblank event. Side benefit of forcing atomic drivers using
>   these helpers to implement event handlign at least semi-correct. I'm
>   evil that way ;-)
>
> - Ridiculously modular, as usual.
>
> - The main tracking unit for a commit stays struct drm_atomic_state,
>   and the ownership rules for that are unchanged. Ownership still
>   gets transferred to the driver (and subsequently to the worker) on
>   successful commits. What is added is a small, per-crtc, refcounted
>   structure to track pending commits called struct drm_crtc_commit.
>   No actual state is attached to that though, it's purely for ordering
>   and waiting.
>
> - Dependencies are implicitly handled by assuming that any CRTC part
>   of _atomic_state is a dependency, and that the current commit
>   must wait for any commits to complete on those CRTC. This way
>   drivers can easily add more depencies using
>   drm_atomic_get_crtc_state(), which is very natural since in most
>   case a dependency exists iff there's some bit of state that needs to
>   be cross checked.
>
>   Removing depencies is not possible, drivers simply need to be
>   careful to not include every CRTC in a commit if that's not
>   necessary. Which is a good idea anyway, since that also avoids
>   ww_mutex lock contention.
>
> - Queue depth > 1 sees some prep work in this patch by adding a stall
>   paramater to drm_atomic_helper_swap_states(). To be able to push
>   commits entirely free-standing and in a deeper queue through the
>   back-end the driver must not access any obj->state pointers. This
>   means we need to track the old state in drm_atomic_state (much
>   easier with the consolidated arrays), and pass them all explicitly
>   to driver backends (this will be serious amounts of churn).
>  
>   Once that's done stall can be set to false in swap_states.
>
> Features: Contains bugs because totally untested.
>
> v2: Dont ask for flip_done signalling when the CRTC is off and stays
> off: Drivers don't handle events in that case. Instead complete right
> away. This way future commits don't need to have special-case logic,
> but can keep blocking for the flip_done completion.
>
> v3: Tons of fixes:
> - Stall for preceeding commit for real, not the current one by
>   accident.
> - Add WARN_ON in case drivers don't fire the drm event.
> - Don't double-free drm events.
>
> v4: Make legacy cursor not stall.
>
> v5: Extend the helper hook to cover the entire commit tail. Some
> drivers need special code for cleanup and vblank waiting, this makes
> it a bit more useful. Inspired by the rockchip driver.
>
> v6: Add WARN_ON to catch drivers who forget to send out the
> drm event.
>
> v7: Fixup the stalls in swap_state for real!!
I don't think stalling belongs to swap_state, that should be a separate helper 
call.

When nonblocking = false the waiting is still performed uninterruptibly. I 
believe that this is an error,
and all blocking waiting should be completed before calling swap_state to 
ensure -EINTR can be
propagated correctly as much as possible. Perhaps also return -EBUSY if wait 
times out.

You specified a timeout of 10 HZ, why is that? If we wait interruptibly then 
there's no need for a timeout.
I also think the timeout may be too short, if we commit 3 crtc's it leaves 3.3 
seconds for each. In case
there's a modeset enable and disable, that leaves 1.6 seconds for each 
enable/disable. Might be too short..

Patch is also a bit hard to review with so many lines changed, could this be 
done in pieces instead of all at once?

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[Intel-gfx] [PATCH v2 4/4] drm/i915: Use connector_type for printing in intel_connector_info, v2.

[Maarten Lankhorst]

Instead of looking at encoder->type, which may be set to UNKNOWN,
use connector->connector_type. Info cannot be printed for MST
connectors which may have a NULL encoder, return early in that case.

Changes since v1:
- Whitelist encoder types for HDMI and LVDS.
- Fix oops on MST.
- Do not list encoder types for eDP/DP, they're always valid.

Signed-off-by: Maarten Lankhorst <maarten.lankho...@linux.intel.com>
Reviewed-by: Ville Syrjälä <ville.syrj...@linux.intel.com>
---
 drivers/gpu/drm/i915/i915_debugfs.c | 26 +++---
 1 file changed, 19 insertions(+), 7 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_debugfs.c 
b/drivers/gpu/drm/i915/i915_debugfs.c
index 38f2cbc19f4a..f83e1d402842 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -2989,14 +2989,26 @@ static void intel_connector_info(struct seq_file *m,
seq_printf(m, "\tCEA rev: %d\n",
   connector->display_info.cea_rev);
}
-   if (intel_encoder) {
-   if (intel_encoder->type == INTEL_OUTPUT_DISPLAYPORT ||
-   intel_encoder->type == INTEL_OUTPUT_EDP)
-   intel_dp_info(m, intel_connector);
-   else if (intel_encoder->type == INTEL_OUTPUT_HDMI)
-   intel_hdmi_info(m, intel_connector);
-   else if (intel_encoder->type == INTEL_OUTPUT_LVDS)
+
+   if (!intel_encoder || intel_encoder->type == INTEL_OUTPUT_DP_MST)
+   return;
+
+   switch (connector->connector_type) {
+   case DRM_MODE_CONNECTOR_DisplayPort:
+   case DRM_MODE_CONNECTOR_eDP:
+   intel_dp_info(m, intel_connector);
+   break;
+   case DRM_MODE_CONNECTOR_LVDS:
+   if (intel_encoder->type == INTEL_OUTPUT_LVDS)
intel_lvds_info(m, intel_connector);
+   break;
+   case DRM_MODE_CONNECTOR_HDMIA:
+   if (intel_encoder->type == INTEL_OUTPUT_HDMI ||
+   intel_encoder->type == INTEL_OUTPUT_UNKNOWN)
+   intel_hdmi_info(m, intel_connector);
+   break;
+   default:
+   break;
}
 
seq_printf(m, "\tmodes:\n");
-- 
2.5.5


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Re: [Intel-gfx] [PATCH v10 2/6] drm/i915: Convert requests to use struct fence

[Maarten Lankhorst]

Op 16-06-16 om 14:54 schreef john.c.harri...@intel.com:
> From: John Harrison <john.c.harri...@intel.com>
>
> There is a construct in the linux kernel called 'struct fence' that is
> intended to keep track of work that is executed on hardware. I.e. it
> solves the basic problem that the drivers 'struct
> drm_i915_gem_request' is trying to address. The request structure does
> quite a lot more than simply track the execution progress so is very
> definitely still required. However, the basic completion status side
> could be updated to use the ready made fence implementation and gain
> all the advantages that provides.
>
> This patch makes the first step of integrating a struct fence into the
> request. It replaces the explicit reference count with that of the
> fence. It also replaces the 'is completed' test with the fence's
> equivalent. Currently, that simply chains on to the original request
> implementation. A future patch will improve this.
>
> v3: Updated after review comments by Tvrtko Ursulin. Added fence
> context/seqno pair to the debugfs request info. Renamed fence 'driver
> name' to just 'i915'. Removed BUG_ONs.
>
> v5: Changed seqno format in debugfs to %x rather than %u as that is
> apparently the preferred appearance. Line wrapped some long lines to
> keep the style checker happy.
>
> v6: Updated to newer nigthly and resolved conflicts. The biggest issue
> was with the re-worked busy spin precursor to waiting on a request. In
> particular, the addition of a 'request_started' helper function. This
> has no corresponding concept within the fence framework. However, it
> is only ever used in one place and the whole point of that place is to
> always directly read the seqno for absolutely lowest latency possible.
> So the simple solution is to just make the seqno test explicit at that
> point now rather than later in the series (it was previously being
> done anyway when fences become interrupt driven).
>
> v7: Rebased to newer nightly - lots of ring -> engine renaming and
> interface change to get_seqno().
>
> v8: Rebased to newer nightly - no longer needs to worry about mutex
> locking in the request free code path. Moved to after fence timeline
> patch so no longer needs to add a horrid hack timeline.
>
> Removed commented out code block. Added support for possible RCU usage
> of fence object (Review comments by Maarten Lankhorst).
>
> v10: Removed duplicate rcu_head field from request - there is already
> one in the fence structure for this exact purpose. Improved/added some
> comments. [Review comments from Maarten Lankhorst & Tvrtko Ursulin]
>
> Updated for yet more nightly changes (u64 for fence context).
Reviewed-by: Maarten Lankhorst <maarten.lankho...@linux.intel.com>
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Re: [Intel-gfx] [PATCH v10 6/6] drm/i915: Cache last IRQ seqno to reduce IRQ overhead

[Maarten Lankhorst]

Op 16-06-16 om 14:54 schreef john.c.harri...@intel.com:
> From: John Harrison <john.c.harri...@intel.com>
>
> The notify function can be called many times without the seqno
> changing. Some are to prevent races due to the requirement of not
> enabling interrupts until requested. However, when interrupts are
> enabled the IRQ handler can be called multiple times without the
> ring's seqno value changing. E.g. two interrupts are generated by
> batch buffers completing in quick succession, the first call to the
> handler processes both completions but the handler still gets executed
> a second time. This patch reduces the overhead of these extra calls by
> caching the last processed seqno value and early exiting if it has not
> changed.
>
> v3: New patch for series.
>
> v5: Added comment about last_irq_seqno usage due to code review
> feedback (Tvrtko Ursulin).
>
> v6: Minor update to resolve a race condition with the wait_request
> optimisation.
>
> v7: Updated to newer nightly - lots of ring -> engine renaming plus an
> interface change to get_seqno().
>
> v10: Renamed the cached variable as it is no longer used at IRQ time.
> [Review comment from Tvrtko Ursulin]
>
> For: VIZ-5190
> Signed-off-by: John Harrison <john.c.harri...@intel.com>
> Cc: Maarten Lankhorst <maarten.lankho...@linux.intel.com>
> Cc: Tvrtko Ursulin <tvrtko.ursu...@intel.com>

I think it would be useful to add in the commit message that this happens in 
most cases.

From your earlier mail:

"Doing the cache check hits the early exit approx 98% of the time when 
running GLBenchmark. Although the vast majority of duplicate calls are 
from having to call the notify function from 
i915_gem_retire_requests_ring() and that being called at least once for 
every execbuf IOCTL (possibly multiple times). I have just made a couple 
of tweaks to further reduce the number of these calls and their impact, 
but there are still a lot of them."

If added,

Reviewed-by: Maarten Lankhorst <maarten.lankho...@linux.intel.com>

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Re: [Intel-gfx] [PATCH v10 1/6] drm/i915: Add per context timelines for fence objects

[Maarten Lankhorst]

Op 16-06-16 om 14:54 schreef john.c.harri...@intel.com:
> From: John Harrison <john.c.harri...@intel.com>
>
> The purpose of this patch series is to convert the requst structure to
> use fence objects for the underlying completion tracking. The fence
> object requires a sequence number. The ultimate aim is to use the same
> sequence number as for the request itself (or rather, to remove the
> request's seqno field and just use the fence's value throughout the
> driver). However, this is not currently possible and so this patch
> introduces a separate numbering scheme as an intermediate step.
>
> A major advantage of using the fence object is that it can be passed
> outside of the i915 driver and used externally. The fence API allows
> for various operations such as combining multiple fences. This
> requires that fence seqnos within a single fence context be guaranteed
> in-order. The GPU scheduler that is coming can re-order request
> execution but not within a single GPU context. Thus the fence context
> must be tied to the i915 context (and the engine within the context as
> each engine runs asynchronously).
>
> On the other hand, the driver as a whole currently only works with
> request seqnos that are allocated from a global in-order timeline. It
> will require a fair chunk of re-work to allow multiple independent
> seqno timelines to be used. Hence the introduction of a temporary,
> fence specific timeline. Once the work to update the rest of the
> driver has been completed then the request can use the fence seqno
> instead.
>
> v2: New patch in series.
>
> v3: Renamed/retyped timeline structure fields after review comments by
> Tvrtko Ursulin.
>
> Added context information to the timeline's name string for better
> identification in debugfs output.
>
> v5: Line wrapping and other white space fixes to keep style checker
> happy.
>
> v7: Updated to newer nightly (lots of ring -> engine renaming).
>
> v8: Moved to earlier in patch series so no longer needs to remove the
> quick hack timeline that was being added before.
>
> v9: Updated to another newer nightly (changes to context structure
> naming). Also updated commit message to match previous changes.
>
> v10: Removed obsolete fields from timeline structure and a couple of
> functions. Corrected some comments and debug prints. [Review comments
> from Maarten Lankhorst & Tvrtko Ursulin]
>
> Updated to yet more nightly changes (u64 for fence context).
>
> For: VIZ-5190
> Signed-off-by: John Harrison <john.c.harri...@intel.com>
> Cc: Tvrtko Ursulin <tvrtko.ursu...@intel.com>
> Cc: Maarten Lankhorst <maarten.lankho...@linux.intel.com>

Reviewed-by: Maarten Lankhorst <maarten.lankho...@linux.intel.com>

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[Intel-gfx] [PATCH] drm/atomic: Make drm_atomic_legacy_backoff reset crtc->acquire_ctx

[Maarten Lankhorst]

Atomic updates may acquire more state than initially locked through
drm_modeset_lock_crtc, running with heavy stress can cause a
WARN_ON(crtc->acquire_ctx) in drm_modeset_lock_crtc:

[  601.491296] [ cut here ]
[  601.491366] WARNING: CPU: 0 PID: 2411 at
drivers/gpu/drm/drm_modeset_lock.c:191 drm_modeset_lock_crtc+0xeb/0xf0 [drm]
[  601.491369] Modules linked in: drm i915 drm_kms_helper
[  601.491414] CPU: 0 PID: 2411 Comm: kms_cursor_lega Tainted: G U 
4.7.0-rc4-patser+ #4798
[  601.491417] Hardware name: Intel Corporation Skylake Client
[  601.491420]   88044d153c98 812ead28 

[  601.491425]   88044d153cd8 810868e6 
00bf58058030
[  601.491431]  880088b415e8 880458058030 88008a271548 
88008a271568
[  601.491436] Call Trace:
[  601.491443]  [] dump_stack+0x4d/0x65
[  601.491447]  [] __warn+0xc6/0xe0
[  601.491452]  [] warn_slowpath_null+0x18/0x20
[  601.491472]  [] drm_modeset_lock_crtc+0xeb/0xf0 [drm]
[  601.491491]  [] drm_mode_cursor_common+0x66/0x180 [drm]
[  601.491509]  [] drm_mode_cursor_ioctl+0x3c/0x40 [drm]
[  601.491524]  [] drm_ioctl+0x14d/0x530 [drm]
[  601.491540]  [] ? drm_mode_setcrtc+0x520/0x520 [drm]
[  601.491545]  [] ? handle_mm_fault+0x106b/0x1430
[  601.491550]  [] ? stop_one_cpu+0x61/0x70
[  601.491556]  [] do_vfs_ioctl+0x8d/0x570
[  601.491560]  [] ? security_file_ioctl+0x3e/0x60
[  601.491565]  [] SyS_ioctl+0x74/0x80
[  601.491571]  [] ? posix_get_monotonic_raw+0xc/0x10
[  601.491576]  [] entry_SYSCALL_64_fastpath+0x13/0x8f
[  601.491581] ---[ end trace 56f3d3d85f000d00 ]---

For good measure, test mode_config.acquire_ctx too, although this should
never happen.

Testcase: kms_cursor_legacy
Signed-off-by: Maarten Lankhorst <maarten.lankho...@linux.intel.com>
---
 drivers/gpu/drm/drm_atomic.c | 27 ++-
 1 file changed, 26 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/drm_atomic.c b/drivers/gpu/drm/drm_atomic.c
index d99ab2f6663f..3cee084e9d28 100644
--- a/drivers/gpu/drm/drm_atomic.c
+++ b/drivers/gpu/drm/drm_atomic.c
@@ -1299,14 +1299,39 @@ EXPORT_SYMBOL(drm_atomic_add_affected_planes);
  */
 void drm_atomic_legacy_backoff(struct drm_atomic_state *state)
 {
+   struct drm_device *dev = state->dev;
+   unsigned crtc_mask = 0;
+   struct drm_crtc *crtc;
int ret;
+   bool global = false;
+
+   drm_for_each_crtc(crtc, dev) {
+   if (crtc->acquire_ctx != state->acquire_ctx)
+   continue;
+
+   crtc_mask |= drm_crtc_mask(crtc);
+   crtc->acquire_ctx = NULL;
+   }
+
+   if (WARN_ON(dev->mode_config.acquire_ctx == state->acquire_ctx)) {
+   global = true;
+
+   dev->mode_config.acquire_ctx = NULL;
+   }
 
 retry:
drm_modeset_backoff(state->acquire_ctx);
 
-   ret = drm_modeset_lock_all_ctx(state->dev, state->acquire_ctx);
+   ret = drm_modeset_lock_all_ctx(dev, state->acquire_ctx);
if (ret)
goto retry;
+
+   drm_for_each_crtc(crtc, dev)
+   if (drm_crtc_mask(crtc) & crtc_mask)
+   crtc->acquire_ctx = state->acquire_ctx;
+
+   if (global)
+   dev->mode_config.acquire_ctx = state->acquire_ctx;
 }
 EXPORT_SYMBOL(drm_atomic_legacy_backoff);
 
-- 
2.5.5

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Re: [Intel-gfx] [PATCH 11/12] drm/i915: Check for invalid cloning earlier during modeset

[Maarten Lankhorst]

Op 08-06-16 om 15:27 schreef Ville Syrjälä:
> On Wed, Jun 08, 2016 at 02:15:25PM +0100, Chris Wilson wrote:
>> On Wed, Jun 08, 2016 at 01:41:46PM +0300, ville.syrj...@linux.intel.com 
>> wrote:
>>> From: Ville Syrjälä <ville.syrj...@linux.intel.com>
>>>
>>> Move the encoder cloning check to happen earlier in the modeset. The
>>> main benefit will be that the debug output from a failed modeset will
>>> be less confusing as output_types can not indicate an invalid
>>> configuration during the later computation stages.
>>>
>>> For instance, what happened to me was kms_setmode was attempting one
>>> of its invalid cloning checks during which it asked for DP+VGA cloning
>>> on HSW. In this case the DP .compute_config() was executed after
>>> the FDI .compute_config() leaving the DP link clock (1.62 in this case)
>>> in port_clock, and then later the FDI BW computation tried to use that
>>> as the FDI link clock (which should always be 2.7). 1.62 x 2 wasn't
>>> enough for the mode it was trying to use, and so it ended up rejecting
>>> the modeset, not because of an invalid cloning configuration, but
>>> because of supposedly running out of FDI bandwidth. Took me a while
>>> to figure out what had actually happened.
>> Did it reject the 1.62 link clock when you simply removed the
>> check_encoder_cloning()? Just checking... :)
> Nope. The rejection only happened due to exceeding the max fdi lane
> count. I think I had a warn in there somewhere when I originally
> submitted the fdi==port_clock patch, but that apparently didn't
> survive into the version that eventually got merged.
>
For patch 1-11:

Reviewed-by: Maarten Lankhorst <maarten.lankho...@linux.intel.com>

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[Intel-gfx] [PATCH 0/4] Fix looking at encoder->type in debugfs.

[Maarten Lankhorst]

This is required for patch "[PATCH 12/12] drm/i915: Stop frobbing with DDI 
encoder->type",
otherwise debugfs will not give all info when encoder->type == DDI.

Cc: Ville Syrjälä <ville.syrj...@linux.intel.com>

Maarten Lankhorst (4):
  drm/i915: Use connector->name in drrs debugfs.
  drm/i915: Use connector_type instead of intel_encoder->type for DP.
  drm/i915: Use atomic state and connector_type in i915_sink_src
  drm/i915: Use connector_type for printing in intel_connector_info

 drivers/gpu/drm/i915/i915_debugfs.c | 81 +
 1 file changed, 38 insertions(+), 43 deletions(-)

-- 
2.5.5

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[Intel-gfx] [PATCH 3/4] drm/i915: Use atomic state and connector_type in i915_sink_src

[Maarten Lankhorst]

DPMS is unreliable, use crtc->state.

Signed-off-by: Maarten Lankhorst <maarten.lankho...@linux.intel.com>
---
 drivers/gpu/drm/i915/i915_debugfs.c | 12 ++--
 1 file changed, 6 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_debugfs.c 
b/drivers/gpu/drm/i915/i915_debugfs.c
index 87b3e31fb3bb..38f2cbc19f4a 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -2701,7 +2701,6 @@ static int i915_sink_crc(struct seq_file *m, void *data)
 {
struct drm_info_node *node = m->private;
struct drm_device *dev = node->minor->dev;
-   struct intel_encoder *encoder;
struct intel_connector *connector;
struct intel_dp *intel_dp = NULL;
int ret;
@@ -2709,18 +2708,19 @@ static int i915_sink_crc(struct seq_file *m, void *data)
 
drm_modeset_lock_all(dev);
for_each_intel_connector(dev, connector) {
+   struct drm_crtc *crtc;
 
-   if (connector->base.dpms != DRM_MODE_DPMS_ON)
+   if (!connector->base.state->best_encoder)
continue;
 
-   if (!connector->base.encoder)
+   crtc = connector->base.state->crtc;
+   if (!crtc->state->active)
continue;
 
-   encoder = to_intel_encoder(connector->base.encoder);
-   if (encoder->type != INTEL_OUTPUT_EDP)
+   if (connector->base.connector_type != DRM_MODE_CONNECTOR_eDP)
continue;
 
-   intel_dp = enc_to_intel_dp(>base);
+   intel_dp = enc_to_intel_dp(connector->base.state->best_encoder);
 
ret = intel_dp_sink_crc(intel_dp, crc);
if (ret)
-- 
2.5.5

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[Intel-gfx] [PATCH 4/4] drm/i915: Use connector_type for printing in intel_connector_info

[Maarten Lankhorst]

Signed-off-by: Maarten Lankhorst <maarten.lankho...@linux.intel.com>
---
 drivers/gpu/drm/i915/i915_debugfs.c | 18 --
 1 file changed, 12 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_debugfs.c 
b/drivers/gpu/drm/i915/i915_debugfs.c
index 38f2cbc19f4a..7ee24626e0a6 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -2989,14 +2989,20 @@ static void intel_connector_info(struct seq_file *m,
seq_printf(m, "\tCEA rev: %d\n",
   connector->display_info.cea_rev);
}
-   if (intel_encoder) {
-   if (intel_encoder->type == INTEL_OUTPUT_DISPLAYPORT ||
-   intel_encoder->type == INTEL_OUTPUT_EDP)
+
+   switch (connector->connector_type) {
+   case DRM_MODE_CONNECTOR_DisplayPort:
+   case DRM_MODE_CONNECTOR_eDP:
+   if (intel_encoder->type != INTEL_OUTPUT_DP_MST)
intel_dp_info(m, intel_connector);
-   else if (intel_encoder->type == INTEL_OUTPUT_HDMI)
-   intel_hdmi_info(m, intel_connector);
-   else if (intel_encoder->type == INTEL_OUTPUT_LVDS)
+   break;
+   case DRM_MODE_CONNECTOR_LVDS:
+   if (intel_encoder->type != INTEL_OUTPUT_SDVO)
intel_lvds_info(m, intel_connector);
+   break;
+   case DRM_MODE_CONNECTOR_HDMIA:
+   if (intel_encoder->type != INTEL_OUTPUT_SDVO)
+   intel_hdmi_info(m, intel_connector);
}
 
seq_printf(m, "\tmodes:\n");
-- 
2.5.5

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[Intel-gfx] [PATCH 1/4] drm/i915: Use connector->name in drrs debugfs.

[Maarten Lankhorst]

This removes relying on intel_encoder->type, which may be set to
unknown.

Signed-off-by: Maarten Lankhorst <maarten.lankho...@linux.intel.com>
---
 drivers/gpu/drm/i915/i915_debugfs.c | 33 -
 1 file changed, 8 insertions(+), 25 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_debugfs.c 
b/drivers/gpu/drm/i915/i915_debugfs.c
index 5b7526697838..18867f5337d7 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -3374,31 +3374,16 @@ static int i915_ddb_info(struct seq_file *m, void 
*unused)
 static void drrs_status_per_crtc(struct seq_file *m,
struct drm_device *dev, struct intel_crtc *intel_crtc)
 {
-   struct intel_encoder *intel_encoder;
struct drm_i915_private *dev_priv = dev->dev_private;
struct i915_drrs *drrs = _priv->drrs;
int vrefresh = 0;
+   struct drm_connector *connector;
 
-   for_each_encoder_on_crtc(dev, _crtc->base, intel_encoder) {
-   /* Encoder connected on this CRTC */
-   switch (intel_encoder->type) {
-   case INTEL_OUTPUT_EDP:
-   seq_puts(m, "eDP:\n");
-   break;
-   case INTEL_OUTPUT_DSI:
-   seq_puts(m, "DSI:\n");
-   break;
-   case INTEL_OUTPUT_HDMI:
-   seq_puts(m, "HDMI:\n");
-   break;
-   case INTEL_OUTPUT_DISPLAYPORT:
-   seq_puts(m, "DP:\n");
-   break;
-   default:
-   seq_printf(m, "Other encoder (id=%d).\n",
-   intel_encoder->type);
-   return;
-   }
+   drm_for_each_connector(connector, dev) {
+   if (connector->state->crtc != _crtc->base)
+   continue;
+
+   seq_printf(m, "%s:\n", connector->name);
}
 
if (dev_priv->vbt.drrs_type == STATIC_DRRS_SUPPORT)
@@ -3461,18 +3446,16 @@ static int i915_drrs_status(struct seq_file *m, void 
*unused)
struct intel_crtc *intel_crtc;
int active_crtc_cnt = 0;
 
+   drm_modeset_lock_all(dev);
for_each_intel_crtc(dev, intel_crtc) {
-   drm_modeset_lock(_crtc->base.mutex, NULL);
-
if (intel_crtc->base.state->active) {
active_crtc_cnt++;
seq_printf(m, "\nCRTC %d:  ", active_crtc_cnt);
 
drrs_status_per_crtc(m, dev, intel_crtc);
}
-
-   drm_modeset_unlock(_crtc->base.mutex);
}
+   drm_modeset_unlock_all(dev);
 
if (!active_crtc_cnt)
seq_puts(m, "No active crtc found\n");
-- 
2.5.5

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[Intel-gfx] [PATCH 2/4] drm/i915: Use connector_type instead of intel_encoder->type for DP.

[Maarten Lankhorst]

Signed-off-by: Maarten Lankhorst <maarten.lankho...@linux.intel.com>
---
 drivers/gpu/drm/i915/i915_debugfs.c | 18 --
 1 file changed, 12 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_debugfs.c 
b/drivers/gpu/drm/i915/i915_debugfs.c
index 18867f5337d7..87b3e31fb3bb 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -2950,7 +2950,7 @@ static void intel_dp_info(struct seq_file *m,
 
seq_printf(m, "\tDPCD rev: %x\n", intel_dp->dpcd[DP_DPCD_REV]);
seq_printf(m, "\taudio support: %s\n", yesno(intel_dp->has_audio));
-   if (intel_encoder->type == INTEL_OUTPUT_EDP)
+   if (intel_connector->base.connector_type == DRM_MODE_CONNECTOR_eDP)
intel_panel_info(m, _connector->panel);
 }
 
@@ -3473,17 +3473,23 @@ static int i915_dp_mst_info(struct seq_file *m, void 
*unused)
 {
struct drm_info_node *node = (struct drm_info_node *) m->private;
struct drm_device *dev = node->minor->dev;
-   struct drm_encoder *encoder;
struct intel_encoder *intel_encoder;
struct intel_digital_port *intel_dig_port;
+   struct drm_connector *connector;
+
drm_modeset_lock_all(dev);
-   list_for_each_entry(encoder, >mode_config.encoder_list, head) {
-   intel_encoder = to_intel_encoder(encoder);
-   if (intel_encoder->type != INTEL_OUTPUT_DISPLAYPORT)
+   drm_for_each_connector(connector, dev) {
+   if (connector->connector_type != DRM_MODE_CONNECTOR_DisplayPort)
continue;
-   intel_dig_port = enc_to_dig_port(encoder);
+
+   intel_encoder = intel_attached_encoder(connector);
+   if (!intel_encoder || intel_encoder->type == 
INTEL_OUTPUT_DP_MST)
+   continue;
+
+   intel_dig_port = enc_to_dig_port(_encoder->base);
if (!intel_dig_port->dp.can_mst)
continue;
+
seq_printf(m, "MST Source Port %c\n",
   port_name(intel_dig_port->port));
drm_dp_mst_dump_topology(m, _dig_port->dp.mst_mgr);
-- 
2.5.5

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[Intel-gfx] [PATCH v2 0.999/9] drm/i915: Pass crtc state to modeset_get_crtc_power_domains.

[Maarten Lankhorst]

Use our newly created encoder_mask to iterate over the encoders.

Signed-off-by: Maarten Lankhorst <maarten.lankho...@linux.intel.com>
---
This depends on the atomic encoder_mask patches and is required for unifying 
power domain handling.

diff --git a/drivers/gpu/drm/i915/intel_display.c 
b/drivers/gpu/drm/i915/intel_display.c
index 3fd6f1c157b8..1ac868d03d2c 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -5342,31 +5342,37 @@ intel_display_port_aux_power_domain(struct 
intel_encoder *intel_encoder)
}
 }
 
-static unsigned long get_crtc_power_domains(struct drm_crtc *crtc)
+static unsigned long get_crtc_power_domains(struct drm_crtc *crtc,
+   struct intel_crtc_state *crtc_state)
 {
struct drm_device *dev = crtc->dev;
-   struct intel_encoder *intel_encoder;
+   struct drm_encoder *encoder;
struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
enum pipe pipe = intel_crtc->pipe;
unsigned long mask;
-   enum transcoder transcoder = intel_crtc->config->cpu_transcoder;
+   enum transcoder transcoder = crtc_state->cpu_transcoder;
 
-   if (!crtc->state->active)
+   if (!crtc_state->base.active)
return 0;
 
mask = BIT(POWER_DOMAIN_PIPE(pipe));
mask |= BIT(POWER_DOMAIN_TRANSCODER(transcoder));
-   if (intel_crtc->config->pch_pfit.enabled ||
-   intel_crtc->config->pch_pfit.force_thru)
+   if (crtc_state->pch_pfit.enabled ||
+   crtc_state->pch_pfit.force_thru)
mask |= BIT(POWER_DOMAIN_PIPE_PANEL_FITTER(pipe));
 
-   for_each_encoder_on_crtc(dev, crtc, intel_encoder)
+   drm_for_each_encoder_mask(encoder, dev, crtc_state->base.encoder_mask) {
+   struct intel_encoder *intel_encoder = to_intel_encoder(encoder);
+
mask |= BIT(intel_display_port_power_domain(intel_encoder));
+   }
 
return mask;
 }
 
-static unsigned long modeset_get_crtc_power_domains(struct drm_crtc *crtc)
+static unsigned long
+modeset_get_crtc_power_domains(struct drm_crtc *crtc,
+  struct intel_crtc_state *crtc_state)
 {
struct drm_i915_private *dev_priv = crtc->dev->dev_private;
struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
@@ -5374,7 +5380,8 @@ static unsigned long 
modeset_get_crtc_power_domains(struct drm_crtc *crtc)
unsigned long domains, new_domains, old_domains;
 
old_domains = intel_crtc->enabled_power_domains;
-   intel_crtc->enabled_power_domains = new_domains = 
get_crtc_power_domains(crtc);
+   intel_crtc->enabled_power_domains = new_domains =
+   get_crtc_power_domains(crtc, crtc_state);
 
domains = new_domains & ~old_domains;
 
@@ -5406,7 +5413,8 @@ static void modeset_update_crtc_power_domains(struct 
drm_atomic_state *state)
for_each_crtc_in_state(state, crtc, crtc_state, i) {
if (needs_modeset(crtc->state))
put_domains[to_intel_crtc(crtc)->pipe] =
-   modeset_get_crtc_power_domains(crtc);
+   modeset_get_crtc_power_domains(crtc,
+   to_intel_crtc_state(crtc->state));
}
 
if (dev_priv->display.modeset_commit_cdclk &&
@@ -13632,7 +13640,8 @@ static int intel_atomic_commit(struct drm_device *dev,
}
 
if (update_pipe) {
-   put_domains = modeset_get_crtc_power_domains(crtc);
+   put_domains = modeset_get_crtc_power_domains(crtc,
+ to_intel_crtc_state(crtc->state));
 
/* make sure intel_modeset_check_state runs */
hw_check = true;
@@ -15989,7 +15998,7 @@ intel_modeset_setup_hw_state(struct drm_device *dev)
for_each_intel_crtc(dev, crtc) {
unsigned long put_domains;
 
-   put_domains = modeset_get_crtc_power_domains(>base);
+   put_domains = modeset_get_crtc_power_domains(>base, 
crtc->config);
if (WARN_ON(put_domains))
modeset_put_power_domains(dev_priv, put_domains);
}

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[Intel-gfx] [PATCH v2 1/9] drm/i915: Unify power domain handling.

[Maarten Lankhorst]

Right now there's separate power domain handling for update_pipe and
modesets. Unify this and only grab POWER_DOMAIN_MODESET once.

Signed-off-by: Maarten Lankhorst <maarten.lankho...@linux.intel.com>
---
 drivers/gpu/drm/i915/intel_display.c | 64 
 1 file changed, 21 insertions(+), 43 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_display.c 
b/drivers/gpu/drm/i915/intel_display.c
index 3fd6f1c157b8..2aa1c5367625 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -5393,31 +5393,6 @@ static void modeset_put_power_domains(struct 
drm_i915_private *dev_priv,
intel_display_power_put(dev_priv, domain);
 }
 
-static void modeset_update_crtc_power_domains(struct drm_atomic_state *state)
-{
-   struct intel_atomic_state *intel_state = to_intel_atomic_state(state);
-   struct drm_device *dev = state->dev;
-   struct drm_i915_private *dev_priv = dev->dev_private;
-   unsigned long put_domains[I915_MAX_PIPES] = {};
-   struct drm_crtc_state *crtc_state;
-   struct drm_crtc *crtc;
-   int i;
-
-   for_each_crtc_in_state(state, crtc, crtc_state, i) {
-   if (needs_modeset(crtc->state))
-   put_domains[to_intel_crtc(crtc)->pipe] =
-   modeset_get_crtc_power_domains(crtc);
-   }
-
-   if (dev_priv->display.modeset_commit_cdclk &&
-   intel_state->dev_cdclk != dev_priv->cdclk_freq)
-   dev_priv->display.modeset_commit_cdclk(state);
-
-   for (i = 0; i < I915_MAX_PIPES; i++)
-   if (put_domains[i])
-   modeset_put_power_domains(dev_priv, put_domains[i]);
-}
-
 static int intel_compute_max_dotclk(struct drm_i915_private *dev_priv)
 {
int max_cdclk_freq = dev_priv->max_cdclk_freq;
@@ -13561,6 +13536,7 @@ static int intel_atomic_commit(struct drm_device *dev,
struct intel_crtc_state *intel_cstate;
int ret = 0, i;
bool hw_check = intel_state->modeset;
+   unsigned long put_domains[I915_MAX_PIPES] = {};
 
ret = intel_atomic_prepare_commit(dev, state, async);
if (ret) {
@@ -13576,11 +13552,21 @@ static int intel_atomic_commit(struct drm_device *dev,
   sizeof(intel_state->min_pixclk));
dev_priv->active_crtcs = intel_state->active_crtcs;
dev_priv->atomic_cdclk_freq = intel_state->cdclk;
+
+   intel_display_power_get(dev_priv, POWER_DOMAIN_MODESET);
}
 
for_each_crtc_in_state(state, crtc, crtc_state, i) {
struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
 
+   if (needs_modeset(crtc->state) ||
+   to_intel_crtc_state(crtc->state)->update_pipe) {
+   hw_check = true;
+
+   put_domains[to_intel_crtc(crtc)->pipe] =
+   modeset_get_crtc_power_domains(crtc);
+   }
+
if (!needs_modeset(crtc->state))
continue;
 
@@ -13612,7 +13598,10 @@ static int intel_atomic_commit(struct drm_device *dev,
intel_shared_dpll_commit(state);
 
drm_atomic_helper_update_legacy_modeset_state(state->dev, 
state);
-   modeset_update_crtc_power_domains(state);
+
+   if (dev_priv->display.modeset_commit_cdclk &&
+   intel_state->dev_cdclk != dev_priv->cdclk_freq)
+   dev_priv->display.modeset_commit_cdclk(state);
}
 
/* Now enable the clocks, plane, pipe, and connectors that we set up. */
@@ -13621,23 +13610,12 @@ static int intel_atomic_commit(struct drm_device *dev,
bool modeset = needs_modeset(crtc->state);
bool update_pipe = !modeset &&
to_intel_crtc_state(crtc->state)->update_pipe;
-   unsigned long put_domains = 0;
-
-   if (modeset)
-   intel_display_power_get(dev_priv, POWER_DOMAIN_MODESET);
 
if (modeset && crtc->state->active) {
update_scanline_offset(to_intel_crtc(crtc));
dev_priv->display.crtc_enable(crtc);
}
 
-   if (update_pipe) {
-   put_domains = modeset_get_crtc_power_domains(crtc);
-
-   /* make sure intel_modeset_check_state runs */
-   hw_check = true;
-   }
-
if (!modeset)
intel_pre_plane_update(intel_crtc);
 
@@ -13645,13 +13623,7 @@ static int intel_atomic_commit(struct drm_device *dev,
(crtc->state->planes_changed || update_pipe))
drm_atomic_helper_commit_planes_on_crtc(crtc_state);
 
-   if 

[Intel-gfx] [PATCH v2 3/9] drm/i915: Remove intel_crtc->atomic.disable_ips.

[Maarten Lankhorst]

This is a revert of commit 066cf55b9ce3 "drm/i915: Fix IPS related flicker".
intel_pre_disable_primary already handles this, and now everything
goes through the atomic path there's no need to try to disable ips twice.

Signed-off-by: Maarten Lankhorst <maarten.lankho...@linux.intel.com>
Reviewed-by: Ander Conselvan de Oliveira <conselv...@gmail.com>
---
 drivers/gpu/drm/i915/intel_display.c | 16 +---
 drivers/gpu/drm/i915/intel_drv.h |  1 -
 2 files changed, 1 insertion(+), 16 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_display.c 
b/drivers/gpu/drm/i915/intel_display.c
index eac73f005a70..62044ad5c6ec 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -4823,9 +4823,6 @@ static void intel_pre_plane_update(struct intel_crtc 
*crtc)
if (atomic->disable_fbc)
intel_fbc_deactivate(crtc);
 
-   if (crtc->atomic.disable_ips)
-   hsw_disable_ips(crtc);
-
if (atomic->pre_disable_primary)
intel_pre_disable_primary(>base);
 
@@ -11907,19 +11904,8 @@ int intel_plane_atomic_calc_changes(struct 
drm_crtc_state *crtc_state,
intel_crtc->atomic.pre_disable_primary = turn_off;
intel_crtc->atomic.post_enable_primary = turn_on;
 
-   if (turn_off) {
-   /*
-* FIXME: Actually if we will still have any other
-* plane enabled on the pipe we could let IPS enabled
-* still, but for now lets consider that when we make
-* primary invisible by setting DSPCNTR to 0 on
-* update_primary_plane function IPS needs to be
-* disable.
-*/
-   intel_crtc->atomic.disable_ips = true;
-
+   if (turn_off)
intel_crtc->atomic.disable_fbc = true;
-   }
 
/*
 * FBC does not work on some platforms for rotated
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index 8940aa4cf50c..39adf7cd0b36 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -566,7 +566,6 @@ struct intel_mmio_flip {
 struct intel_crtc_atomic_commit {
/* Sleepable operations to perform before commit */
bool disable_fbc;
-   bool disable_ips;
bool pre_disable_primary;
 
/* Sleepable operations to perform after commit */
-- 
2.1.0

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[Intel-gfx] [PATCH v2 7/9] drm/i915: Nuke fbc members from intel_crtc->atomic, v2.

[Maarten Lankhorst]

Factor out intel_fbc_supports_rotation and use it in
pre_plane_update as well. This leaves intel_crtc->atomic
empty, so remove it too.

Changes since v1:
- Add a intel_fbc_supports_rotation helper.

Signed-off-by: Maarten Lankhorst <maarten.lankho...@linux.intel.com>
---
 drivers/gpu/drm/i915/intel_display.c | 87 +---
 drivers/gpu/drm/i915/intel_drv.h | 18 +---
 drivers/gpu/drm/i915/intel_fbc.c | 20 +++--
 3 files changed, 51 insertions(+), 74 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_display.c 
b/drivers/gpu/drm/i915/intel_display.c
index 18c3e8d8f954..c3aa1d5bd23f 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -4793,11 +4793,9 @@ static void intel_post_plane_update(struct 
intel_crtc_state *old_crtc_state)
 {
struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->base.crtc);
struct drm_atomic_state *old_state = old_crtc_state->base.state;
-   struct intel_crtc_atomic_commit *atomic = >atomic;
struct intel_crtc_state *pipe_config =
to_intel_crtc_state(crtc->base.state);
struct drm_device *dev = crtc->base.dev;
-   struct drm_i915_private *dev_priv = dev->dev_private;
struct drm_plane *primary = crtc->base.primary;
struct drm_plane_state *old_pri_state =
drm_atomic_get_existing_plane_state(old_state, primary);
@@ -4809,22 +4807,20 @@ static void intel_post_plane_update(struct 
intel_crtc_state *old_crtc_state)
if (pipe_config->wm_changed && pipe_config->base.active)
intel_update_watermarks(>base);
 
-   if (atomic->update_fbc)
-   intel_fbc_update(crtc);
-
if (old_pri_state) {
struct intel_plane_state *primary_state =
to_intel_plane_state(primary->state);
struct intel_plane_state *old_primary_state =
to_intel_plane_state(old_pri_state);
 
+   if (primary_state->visible)
+   intel_fbc_update(crtc);
+
if (primary_state->visible &&
(needs_modeset(_config->base) ||
 !old_primary_state->visible))
intel_post_enable_primary(>base);
}
-
-   memset(atomic, 0, sizeof(*atomic));
 }
 
 static void intel_pre_plane_update(struct intel_crtc_state *old_crtc_state)
@@ -4832,7 +4828,6 @@ static void intel_pre_plane_update(struct 
intel_crtc_state *old_crtc_state)
struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->base.crtc);
struct drm_device *dev = crtc->base.dev;
struct drm_i915_private *dev_priv = dev->dev_private;
-   struct intel_crtc_atomic_commit *atomic = >atomic;
struct intel_crtc_state *pipe_config =
to_intel_crtc_state(crtc->base.state);
struct drm_atomic_state *old_state = old_crtc_state->base.state;
@@ -4841,18 +4836,32 @@ static void intel_pre_plane_update(struct 
intel_crtc_state *old_crtc_state)
drm_atomic_get_existing_plane_state(old_state, primary);
bool modeset = needs_modeset(_config->base);
 
-   if (atomic->disable_fbc)
-   intel_fbc_deactivate(crtc);
-
if (old_pri_state) {
struct intel_plane_state *primary_state =
to_intel_plane_state(primary->state);
struct intel_plane_state *old_primary_state =
to_intel_plane_state(old_pri_state);
+   bool turn_off = old_primary_state->visible &&
+   (modeset || !primary_state->visible);
+
+   if (turn_off) {
+   intel_fbc_deactivate(crtc);
 
-   if (old_primary_state->visible &&
-   (modeset || !primary_state->visible))
intel_pre_disable_primary(>base);
+   } else if (primary_state->visible &&
+  !intel_fbc_supports_rotation(dev_priv, 
primary_state)) {
+   /*
+* FBC does not work on some platforms for rotated
+* planes, so disable it when rotation is not 0 and
+* update it when rotation is set back to 0.
+*
+* FIXME: This is redundant with the fbc update done in
+* the post plane update function except that that
+* one is done too late.
+*/
+
+   intel_fbc_deactivate(crtc);
+   }
}
 
if (pipe_config->disable_cxsr) {
@@ -11926,46 +11935,17 @@ int intel_plane_atomic_calc_changes(struct 
drm_crtc_state *crtc_state,
if (visible || was_visible)
pipe_config-&g

[Intel-gfx] [PATCH v2 0/9] Kill off intel_crtc->atomic!

[Maarten Lankhorst]

I've fixed some patches with feedback from review.
It's about time that intel_crtc->atomic dies. It was useful
with the transitional helpers, but can be removed safely now.

Maarten Lankhorst (9):
  drm/i915: Unify power domain handling.
  drm/i915: Kill off intel_crtc->atomic.wait_vblank, v3.
  drm/i915: Remove intel_crtc->atomic.disable_ips.
  drm/i915: Remove atomic.pre_disable_primary.
  drm/i915: Remove update_sprite_watermarks.
  drm/i915: Remove some post-commit members from intel_crtc->atomic, v2.
  drm/i915: Nuke fbc members from intel_crtc->atomic, v2.
  drm/i915: Do not compute watermarks on a noop.
  drm/i915: Remove vblank wait from hsw_enable_ips.

 drivers/gpu/drm/i915/intel_atomic.c  |   2 +
 drivers/gpu/drm/i915/intel_display.c | 291 +--
 drivers/gpu/drm/i915/intel_drv.h |  39 ++---
 drivers/gpu/drm/i915/intel_fbc.c |  20 ++-
 drivers/gpu/drm/i915/intel_pm.c  |  59 ---
 5 files changed, 214 insertions(+), 197 deletions(-)

-- 
2.1.0

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[Intel-gfx] [PATCH v2 6/9] drm/i915: Remove some post-commit members from intel_crtc->atomic, v2.

[Maarten Lankhorst]

fb_bits is useful to have in the crtc_state for cs flips when
the code is updated to use intel_frontbuffer_flip_prepare/complete.
So calculate it in advance and move it to crtc_state. The other stuff
can be calculated in post_plane_update, and aren't useful elsewhere.

Changes since v1:
- Changing wording, remove comment about loop.

Signed-off-by: Maarten Lankhorst <maarten.lankho...@linux.intel.com>
Reviewed-by: Ander Conselvan de Oliveira <conselv...@gmail.com>
---
 drivers/gpu/drm/i915/intel_atomic.c  |  1 +
 drivers/gpu/drm/i915/intel_display.c | 30 +-
 drivers/gpu/drm/i915/intel_drv.h |  3 +--
 3 files changed, 23 insertions(+), 11 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_atomic.c 
b/drivers/gpu/drm/i915/intel_atomic.c
index ba9a57f33c43..d6c362a42bd1 100644
--- a/drivers/gpu/drm/i915/intel_atomic.c
+++ b/drivers/gpu/drm/i915/intel_atomic.c
@@ -99,6 +99,7 @@ intel_crtc_duplicate_state(struct drm_crtc *crtc)
crtc_state->wm_changed = false;
crtc_state->wm.need_postvbl_update = false;
crtc_state->fb_changed = false;
+   crtc_state->fb_bits = 0;
 
return _state->base;
 }
diff --git a/drivers/gpu/drm/i915/intel_display.c 
b/drivers/gpu/drm/i915/intel_display.c
index 2d3bfbc72fae..18c3e8d8f954 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -4789,14 +4789,20 @@ intel_pre_disable_primary(struct drm_crtc *crtc)
hsw_disable_ips(intel_crtc);
 }
 
-static void intel_post_plane_update(struct intel_crtc *crtc)
+static void intel_post_plane_update(struct intel_crtc_state *old_crtc_state)
 {
+   struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->base.crtc);
+   struct drm_atomic_state *old_state = old_crtc_state->base.state;
struct intel_crtc_atomic_commit *atomic = >atomic;
struct intel_crtc_state *pipe_config =
to_intel_crtc_state(crtc->base.state);
struct drm_device *dev = crtc->base.dev;
+   struct drm_i915_private *dev_priv = dev->dev_private;
+   struct drm_plane *primary = crtc->base.primary;
+   struct drm_plane_state *old_pri_state =
+   drm_atomic_get_existing_plane_state(old_state, primary);
 
-   intel_frontbuffer_flip(dev, atomic->fb_bits);
+   intel_frontbuffer_flip(dev, pipe_config->fb_bits);
 
crtc->wm.cxsr_allowed = true;
 
@@ -4806,8 +4812,17 @@ static void intel_post_plane_update(struct intel_crtc 
*crtc)
if (atomic->update_fbc)
intel_fbc_update(crtc);
 
-   if (atomic->post_enable_primary)
-   intel_post_enable_primary(>base);
+   if (old_pri_state) {
+   struct intel_plane_state *primary_state =
+   to_intel_plane_state(primary->state);
+   struct intel_plane_state *old_primary_state =
+   to_intel_plane_state(old_pri_state);
+
+   if (primary_state->visible &&
+   (needs_modeset(_config->base) ||
+!old_primary_state->visible))
+   intel_post_enable_primary(>base);
+   }
 
memset(atomic, 0, sizeof(*atomic));
 }
@@ -11909,13 +11924,10 @@ int intel_plane_atomic_calc_changes(struct 
drm_crtc_state *crtc_state,
to_intel_crtc_state(crtc_state)->wm.need_postvbl_update = true;
 
if (visible || was_visible)
-   intel_crtc->atomic.fb_bits |=
-   to_intel_plane(plane)->frontbuffer_bit;
+   pipe_config->fb_bits |= to_intel_plane(plane)->frontbuffer_bit;
 
switch (plane->type) {
case DRM_PLANE_TYPE_PRIMARY:
-   intel_crtc->atomic.post_enable_primary = turn_on;
-
if (turn_off)
intel_crtc->atomic.disable_fbc = true;
 
@@ -13660,7 +13672,7 @@ static int intel_atomic_commit(struct drm_device *dev,
intel_atomic_wait_for_vblanks(dev, dev_priv, crtc_vblank_mask);
 
for_each_crtc_in_state(state, crtc, crtc_state, i)
-   intel_post_plane_update(to_intel_crtc(crtc));
+   intel_post_plane_update(to_intel_crtc_state(crtc_state));
 
/*
 * Now that the vblank has passed, we can go ahead and program the
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index a032d95e3d5f..bcab327425b4 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -382,6 +382,7 @@ struct intel_crtc_state {
 #define PIPE_CONFIG_QUIRK_MODE_SYNC_FLAGS  (1<<0) /* unreliable sync 
mode.flags */
unsigned long quirks;
 
+   unsigned fb_bits; /* framebuffers to flip */
bool update_pipe; /* can a fast modeset be performed? */
bool disable_cxsr;
bool wm_changed; /* watermarks are updated */
@@ -568,9 +569,7 @@ struct intel_crtc_atomic_c

[Intel-gfx] [PATCH v2 4/9] drm/i915: Remove atomic.pre_disable_primary.

[Maarten Lankhorst]

This can be derived from the atomic state in pre_plane_update,
which makes it more clear when it's supposed to be called.

Reviewed-by: Ander Conselvan de Oliveira <conselv...@gmail.com>
Signed-off-by: Maarten Lankhorst <maarten.lankho...@linux.intel.com>
---
 drivers/gpu/drm/i915/intel_display.c | 26 +++---
 drivers/gpu/drm/i915/intel_drv.h |  1 -
 2 files changed, 19 insertions(+), 8 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_display.c 
b/drivers/gpu/drm/i915/intel_display.c
index 62044ad5c6ec..8340b43aacd6 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -4812,19 +4812,33 @@ static void intel_post_plane_update(struct intel_crtc 
*crtc)
memset(atomic, 0, sizeof(*atomic));
 }
 
-static void intel_pre_plane_update(struct intel_crtc *crtc)
+static void intel_pre_plane_update(struct intel_crtc_state *old_crtc_state)
 {
+   struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->base.crtc);
struct drm_device *dev = crtc->base.dev;
struct drm_i915_private *dev_priv = dev->dev_private;
struct intel_crtc_atomic_commit *atomic = >atomic;
struct intel_crtc_state *pipe_config =
to_intel_crtc_state(crtc->base.state);
+   struct drm_atomic_state *old_state = old_crtc_state->base.state;
+   struct drm_plane *primary = crtc->base.primary;
+   struct drm_plane_state *old_pri_state =
+   drm_atomic_get_existing_plane_state(old_state, primary);
+   bool modeset = needs_modeset(_config->base);
 
if (atomic->disable_fbc)
intel_fbc_deactivate(crtc);
 
-   if (atomic->pre_disable_primary)
-   intel_pre_disable_primary(>base);
+   if (old_pri_state) {
+   struct intel_plane_state *primary_state =
+   to_intel_plane_state(primary->state);
+   struct intel_plane_state *old_primary_state =
+   to_intel_plane_state(old_pri_state);
+
+   if (old_primary_state->visible &&
+   (modeset || !primary_state->visible))
+   intel_pre_disable_primary(>base);
+   }
 
if (pipe_config->disable_cxsr) {
crtc->wm.cxsr_allowed = false;
@@ -11901,7 +11915,6 @@ int intel_plane_atomic_calc_changes(struct 
drm_crtc_state *crtc_state,
 
switch (plane->type) {
case DRM_PLANE_TYPE_PRIMARY:
-   intel_crtc->atomic.pre_disable_primary = turn_off;
intel_crtc->atomic.post_enable_primary = turn_on;
 
if (turn_off)
@@ -13587,7 +13600,7 @@ static int intel_atomic_commit(struct drm_device *dev,
if (!needs_modeset(crtc->state))
continue;
 
-   intel_pre_plane_update(intel_crtc);
+   intel_pre_plane_update(to_intel_crtc_state(crtc_state));
 
if (crtc_state->active) {
intel_crtc_disable_planes(crtc, crtc_state->plane_mask);
@@ -13623,7 +13636,6 @@ static int intel_atomic_commit(struct drm_device *dev,
 
/* Now enable the clocks, plane, pipe, and connectors that we set up. */
for_each_crtc_in_state(state, crtc, crtc_state, i) {
-   struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
bool modeset = needs_modeset(crtc->state);
struct intel_crtc_state *pipe_config =
to_intel_crtc_state(crtc->state);
@@ -13635,7 +13647,7 @@ static int intel_atomic_commit(struct drm_device *dev,
}
 
if (!modeset)
-   intel_pre_plane_update(intel_crtc);
+   intel_pre_plane_update(to_intel_crtc_state(crtc_state));
 
if (crtc->state->active &&
(crtc->state->planes_changed || update_pipe))
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index 39adf7cd0b36..f284c61bbae9 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -566,7 +566,6 @@ struct intel_mmio_flip {
 struct intel_crtc_atomic_commit {
/* Sleepable operations to perform before commit */
bool disable_fbc;
-   bool pre_disable_primary;
 
/* Sleepable operations to perform after commit */
unsigned fb_bits;
-- 
2.1.0

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[Intel-gfx] [PATCH v2 5/9] drm/i915: Remove update_sprite_watermarks.

[Maarten Lankhorst]

Commit 791a32be6eb2 ("drm/i915: Drop intel_update_sprite_watermarks")
removes the use of this variable, but forgot to remove it.

Reviewed-by: Matt Roper <matthew.d.ro...@intel.com>
Signed-off-by: Maarten Lankhorst <maarten.lankho...@linux.intel.com>
---
 drivers/gpu/drm/i915/intel_display.c | 6 +-
 drivers/gpu/drm/i915/intel_drv.h | 1 -
 2 files changed, 1 insertion(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_display.c 
b/drivers/gpu/drm/i915/intel_display.c
index 8340b43aacd6..2d3bfbc72fae 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -11847,7 +11847,6 @@ int intel_plane_atomic_calc_changes(struct 
drm_crtc_state *crtc_state,
struct intel_plane_state *old_plane_state =
to_intel_plane_state(plane->state);
int idx = intel_crtc->base.base.id, ret;
-   int i = drm_plane_index(plane);
bool mode_changed = needs_modeset(crtc_state);
bool was_crtc_enabled = crtc->state->active;
bool is_crtc_enabled = crtc_state->active;
@@ -11950,11 +11949,8 @@ int intel_plane_atomic_calc_changes(struct 
drm_crtc_state *crtc_state,
 */
if (IS_IVYBRIDGE(dev) &&
needs_scaling(to_intel_plane_state(plane_state)) &&
-   !needs_scaling(old_plane_state)) {
+   !needs_scaling(old_plane_state))
pipe_config->disable_lp_wm = true;
-   } else if (turn_off && !mode_changed)
-   intel_crtc->atomic.update_sprite_watermarks |=
-   1 << i;
 
break;
}
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index f284c61bbae9..a032d95e3d5f 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -571,7 +571,6 @@ struct intel_crtc_atomic_commit {
unsigned fb_bits;
bool update_fbc;
bool post_enable_primary;
-   unsigned update_sprite_watermarks;
 };
 
 struct intel_crtc {
-- 
2.1.0

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[Intel-gfx] [PATCH v2 2/9] drm/i915: Kill off intel_crtc->atomic.wait_vblank, v3.

[Maarten Lankhorst]

Currently we perform our own wait in post_plane_update,
but the atomic core performs another one in wait_for_vblanks.
This means that 2 vblanks are done when a fb is changed,
which is a bit overkill.

Merge them by creating a helper function that takes a crtc mask
for the planes to wait on.

The broadwell vblank workaround may look gone entirely but this is
not the case. pipe_config->wm_changed is set to true
when any plane is turned on, which forces a vblank wait.

Changes since v1:
- Removing the double vblank wait on broadwell moved to its own commit.
Changes since v2:
- Move out POWER_DOMAIN_MODESET handling to its own commit.

Signed-off-by: Maarten Lankhorst <maarten.lankho...@linux.intel.com>
---
 drivers/gpu/drm/i915/intel_atomic.c  |  1 +
 drivers/gpu/drm/i915/intel_display.c | 80 ++--
 drivers/gpu/drm/i915/intel_drv.h |  2 +-
 3 files changed, 61 insertions(+), 22 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_atomic.c 
b/drivers/gpu/drm/i915/intel_atomic.c
index 9682d94af710..ba9a57f33c43 100644
--- a/drivers/gpu/drm/i915/intel_atomic.c
+++ b/drivers/gpu/drm/i915/intel_atomic.c
@@ -98,6 +98,7 @@ intel_crtc_duplicate_state(struct drm_crtc *crtc)
crtc_state->disable_cxsr = false;
crtc_state->wm_changed = false;
crtc_state->wm.need_postvbl_update = false;
+   crtc_state->fb_changed = false;
 
return _state->base;
 }
diff --git a/drivers/gpu/drm/i915/intel_display.c 
b/drivers/gpu/drm/i915/intel_display.c
index 2aa1c5367625..eac73f005a70 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -4796,9 +4796,6 @@ static void intel_post_plane_update(struct intel_crtc 
*crtc)
to_intel_crtc_state(crtc->base.state);
struct drm_device *dev = crtc->base.dev;
 
-   if (atomic->wait_vblank)
-   intel_wait_for_vblank(dev, crtc->pipe);
-
intel_frontbuffer_flip(dev, atomic->fb_bits);
 
crtc->wm.cxsr_allowed = true;
@@ -11872,6 +11869,9 @@ int intel_plane_atomic_calc_changes(struct 
drm_crtc_state *crtc_state,
if (!was_visible && !visible)
return 0;
 
+   if (fb != old_plane_state->base.fb)
+   pipe_config->fb_changed = true;
+
turn_off = was_visible && (!visible || mode_changed);
turn_on = visible && (!was_visible || mode_changed);
 
@@ -11887,8 +11887,6 @@ int intel_plane_atomic_calc_changes(struct 
drm_crtc_state *crtc_state,
 
/* must disable cxsr around plane enable/disable */
if (plane->type != DRM_PLANE_TYPE_CURSOR) {
-   if (is_crtc_enabled)
-   intel_crtc->atomic.wait_vblank = true;
pipe_config->disable_cxsr = true;
}
} else if (intel_wm_need_update(plane, plane_state)) {
@@ -11940,14 +11938,6 @@ int intel_plane_atomic_calc_changes(struct 
drm_crtc_state *crtc_state,
plane_state->rotation != BIT(DRM_ROTATE_0))
intel_crtc->atomic.disable_fbc = true;
 
-   /*
-* BDW signals flip done immediately if the plane
-* is disabled, even if the plane enable is already
-* armed to occur at the next vblank :(
-*/
-   if (turn_on && IS_BROADWELL(dev))
-   intel_crtc->atomic.wait_vblank = true;
-
intel_crtc->atomic.update_fbc |= visible || mode_changed;
break;
case DRM_PLANE_TYPE_CURSOR:
@@ -11962,12 +11952,10 @@ int intel_plane_atomic_calc_changes(struct 
drm_crtc_state *crtc_state,
if (IS_IVYBRIDGE(dev) &&
needs_scaling(to_intel_plane_state(plane_state)) &&
!needs_scaling(old_plane_state)) {
-   to_intel_crtc_state(crtc_state)->disable_lp_wm = true;
-   } else if (turn_off && !mode_changed) {
-   intel_crtc->atomic.wait_vblank = true;
+   pipe_config->disable_lp_wm = true;
+   } else if (turn_off && !mode_changed)
intel_crtc->atomic.update_sprite_watermarks |=
1 << i;
-   }
 
break;
}
@@ -13509,6 +13497,48 @@ static int intel_atomic_prepare_commit(struct 
drm_device *dev,
return ret;
 }
 
+static void intel_atomic_wait_for_vblanks(struct drm_device *dev,
+ struct drm_i915_private *dev_priv,
+ unsigned crtc_mask)
+{
+   unsigned last_vblank_count[I915_MAX_PIPES];
+   enum pipe pipe;
+   int ret;
+
+   if (!crtc_mask)
+   return;
+
+   for_each_pipe(dev_priv, pipe) {
+

[Intel-gfx] [PATCH v2 8/9] drm/i915: Do not compute watermarks on a noop.

[Maarten Lankhorst]

This should not be done this late when nothing changed.

Signed-off-by: Maarten Lankhorst <maarten.lankho...@linux.intel.com>
---
 drivers/gpu/drm/i915/intel_display.c |  3 +-
 drivers/gpu/drm/i915/intel_drv.h | 13 
 drivers/gpu/drm/i915/intel_pm.c  | 59 +---
 3 files changed, 49 insertions(+), 26 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_display.c 
b/drivers/gpu/drm/i915/intel_display.c
index c3aa1d5bd23f..a8285fe429e1 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -12029,7 +12029,8 @@ static int intel_crtc_atomic_check(struct drm_crtc 
*crtc,
}
 
ret = 0;
-   if (dev_priv->display.compute_pipe_wm) {
+   if (dev_priv->display.compute_pipe_wm &&
+   (mode_changed || pipe_config->update_pipe || 
crtc_state->planes_changed)) {
ret = dev_priv->display.compute_pipe_wm(intel_crtc, state);
if (ret) {
DRM_DEBUG_KMS("Target pipe watermarks are invalid\n");
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index ec89659e5d0d..1fea7a1a3ed1 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -1606,6 +1606,19 @@ intel_atomic_get_crtc_state(struct drm_atomic_state 
*state,
 
return to_intel_crtc_state(crtc_state);
 }
+
+static inline struct intel_plane_state *
+intel_atomic_get_existing_plane_state(struct drm_atomic_state *state,
+ struct intel_plane *plane)
+{
+   struct drm_plane_state *plane_state;
+
+   plane_state = drm_atomic_get_existing_plane_state(state, >base);
+
+   return to_intel_plane_state(plane_state);
+}
+
+
 int intel_atomic_setup_scalers(struct drm_device *dev,
struct intel_crtc *intel_crtc,
struct intel_crtc_state *crtc_state);
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 9df9e9a22f3c..482c684a116b 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -2005,11 +2005,18 @@ static void ilk_compute_wm_level(const struct 
drm_i915_private *dev_priv,
cur_latency *= 5;
}
 
-   result->pri_val = ilk_compute_pri_wm(cstate, pristate,
-pri_latency, level);
-   result->spr_val = ilk_compute_spr_wm(cstate, sprstate, spr_latency);
-   result->cur_val = ilk_compute_cur_wm(cstate, curstate, cur_latency);
-   result->fbc_val = ilk_compute_fbc_wm(cstate, pristate, result->pri_val);
+   if (pristate) {
+   result->pri_val = ilk_compute_pri_wm(cstate, pristate,
+pri_latency, level);
+   result->fbc_val = ilk_compute_fbc_wm(cstate, pristate, 
result->pri_val);
+   }
+
+   if (sprstate)
+   result->spr_val = ilk_compute_spr_wm(cstate, sprstate, 
spr_latency);
+
+   if (curstate)
+   result->cur_val = ilk_compute_cur_wm(cstate, curstate, 
cur_latency);
+
result->enable = true;
 }
 
@@ -2305,7 +2312,6 @@ static int ilk_compute_pipe_wm(struct intel_crtc 
*intel_crtc,
const struct drm_i915_private *dev_priv = dev->dev_private;
struct intel_crtc_state *cstate = NULL;
struct intel_plane *intel_plane;
-   struct drm_plane_state *ps;
struct intel_plane_state *pristate = NULL;
struct intel_plane_state *sprstate = NULL;
struct intel_plane_state *curstate = NULL;
@@ -2319,27 +2325,32 @@ static int ilk_compute_pipe_wm(struct intel_crtc 
*intel_crtc,
pipe_wm = >wm.optimal.ilk;
 
for_each_intel_plane_on_crtc(dev, intel_crtc, intel_plane) {
-   ps = drm_atomic_get_plane_state(state,
-   _plane->base);
-   if (IS_ERR(ps))
-   return PTR_ERR(ps);
+   struct intel_plane_state *ps;
+
+   ps = intel_atomic_get_existing_plane_state(state,
+  intel_plane);
+   if (!ps)
+   continue;
 
if (intel_plane->base.type == DRM_PLANE_TYPE_PRIMARY)
-   pristate = to_intel_plane_state(ps);
-   else if (intel_plane->base.type == DRM_PLANE_TYPE_OVERLAY)
-   sprstate = to_intel_plane_state(ps);
-   else if (intel_plane->base.type == DRM_PLANE_TYPE_CURSOR)
-   curstate = to_intel_plane_state(ps);
+   pristate = ps;
+   else if (intel_plane->base.type == DRM_PLANE_TYPE_OVERLAY) {
+   sprstate = ps;
+
+   if (ps) {
+   pipe_wm->sprites_enabl

[Intel-gfx] [PATCH v2 9/9] drm/i915: Remove vblank wait from hsw_enable_ips.

[Maarten Lankhorst]

intel_post_plane_update did an extra vblank wait that's no longer needed when 
enabling ips.

Signed-off-by: Maarten Lankhorst <maarten.lankho...@linux.intel.com>
---
 drivers/gpu/drm/i915/intel_display.c | 3 ---
 1 file changed, 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_display.c 
b/drivers/gpu/drm/i915/intel_display.c
index a8285fe429e1..2cce347426cd 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -4580,9 +4580,6 @@ void hsw_enable_ips(struct intel_crtc *crtc)
if (!crtc->config->ips_enabled)
return;
 
-   /* We can only enable IPS after we enable a plane and wait for a vblank 
*/
-   intel_wait_for_vblank(dev, crtc->pipe);
-
assert_plane_enabled(dev_priv, crtc->plane);
if (IS_BROADWELL(dev)) {
mutex_lock(_priv->rps.hw_lock);
-- 
2.1.0

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Re: [Intel-gfx] [PATCH v2 1/9] drm/i915: Unify power domain handling.

[Maarten Lankhorst]

Op 11-01-16 om 13:27 schreef Maarten Lankhorst:
> Right now there's separate power domain handling for update_pipe and
> modesets. Unify this and only grab POWER_DOMAIN_MODESET once.
>
> Signed-off-by: Maarten Lankhorst <maarten.lankho...@linux.intel.com>
> ---
>  drivers/gpu/drm/i915/intel_display.c | 64 
> 
>  1 file changed, 21 insertions(+), 43 deletions(-)
>
Uh oh, this patch can't work right now without atomic encoder_mask patches
and without passing crtc_state to modeset_get_crtc_power_domains.

~Maarten
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Re: [Intel-gfx] [PATCH] drm/i915: Don't do pre plane update on disabled crtcs

[Maarten Lankhorst]

Op 14-01-16 om 17:52 schreef Ville Syrjälä:
> On Thu, Jan 14, 2016 at 06:32:10PM +0200, Mika Kuoppala wrote:
>> CI/Bat got following (shortened) trace on byt and also
>> on bsw:
>>
>> [ cut here ]---
>> Unclaimed register detected before reading register 0x186500
>> Call Trace:
>>  __unclaimed_reg_debug+0x68/0x80 [i915]
>> vlv_read32+0x2de/0x370 [i915]
>> intel_set_memory_cxsr+0x87/0x1a0 [i915]
>> intel_pre_plane_update+0xb3/0xf0 [i915]
>> intel_atomic_commit+0x3b5/0x17c0 [i915]
>> ...
>> ---[ end trace 6387a0ad001bb39f ]---
>>
>> Fix this by limiting pre plane update only to active crtcs.
>>
>> References: https://bugs.freedesktop.org/show_bug.cgi?id=93698
>> Cc: Ville Syrjälä <ville.syrj...@linux.intel.com>
>> Cc: Maarten Lankhorst <maarten.lankho...@linux.intel.com>
>> Signed-off-by: Mika Kuoppala <mika.kuopp...@intel.com>
>> ---
>>  drivers/gpu/drm/i915/intel_display.c | 3 +--
>>  1 file changed, 1 insertion(+), 2 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/i915/intel_display.c 
>> b/drivers/gpu/drm/i915/intel_display.c
>> index aa24f79d85bf..a134a698d97d 100644
>> --- a/drivers/gpu/drm/i915/intel_display.c
>> +++ b/drivers/gpu/drm/i915/intel_display.c
>> @@ -13580,9 +13580,8 @@ static int intel_atomic_commit(struct drm_device 
>> *dev,
>>  if (!needs_modeset(crtc->state))
>>  continue;
>>  
>> -intel_pre_plane_update(intel_crtc);
>> -
>>  if (crtc_state->active) {
>> +intel_pre_plane_update(intel_crtc);
> I think you'll want to deal with the other one too (the one in the crtc
> enable/plane update path). Actually I think the plane update stuff
> should be split into a separate loop from the crtc_enable stuff, but
> that's a separate topic.
>
> Hmm. And there's a post_plane_update there that looks a bit too
> lonely as well. Something really should be done to make this code
> less convoluted. A modeset/plane update shouldn't be this hard to
> get right.
>
>
I understand the idea from this comment, but nothing in pre_plane_update should 
run when crtc was not active. What function is called that does?

~Maarten
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Re: [Intel-gfx] [PATCH] drm/i915: Don't reject primayr plane windowing with color keying enabled on SKL+

[Maarten Lankhorst]

Op 15-01-16 om 19:46 schreef ville.syrj...@linux.intel.com:
> From: Ville Syrjälä <ville.syrj...@linux.intel.com>
>
> On SKL+ plane scaling is mutually exclusive with color keying. The code
> check for this, but during some refactoring the code got changed to
> also reject primary plane windowing when color keying is used. There is
> no such restriction in the hardware, so restore the original logic.
>
> Cc: Maarten Lankhorst <maarten.lankho...@linux.intel.com>
> Fixes: 061e4b8d650a ("drm/i915: clean up atomic plane check functions, v2.")
> Signed-off-by: Ville Syrjälä <ville.syrj...@linux.intel.com>
>
Apart from obvious typo looks good.

Missing a cc for -fixes?

Reviewed-by: Maarten Lankhorst <maarten.lankho...@linux.intel.com>
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Re: [Intel-gfx] [PATCH v2 3/9] drm/i915: Remove intel_crtc->atomic.disable_ips.

[Maarten Lankhorst]

Op 13-01-16 om 14:02 schreef Ville Syrjälä:
> On Mon, Jan 11, 2016 at 01:27:43PM +0100, Maarten Lankhorst wrote:
>> This is a revert of commit 066cf55b9ce3 "drm/i915: Fix IPS related flicker".
>> intel_pre_disable_primary already handles this, and now everything
>> goes through the atomic path there's no need to try to disable ips twice.
> If it's a revert why wasn't it done with 'git revert'?
A straight revert would fail to apply.
> Also I'm not sure it isn't a step backwards. Based on the spec we should
> be able to keep IPS enabled as long as one plane (possibly referring to 
> either primary or sprite) is enabled on the pipe. So in theory we should
> keep the IPS handling out of the primary plane code, and instead we
> should compute the IPS state based on the set of active planes on the
> pipe.
You're probably right. But pre_disable_primary has the following warning:
 * FIXME IPS should be fine as long as one plane is
 * enabled, but in practice it seems to have problems
 * when going from primary only to sprite only and vice
 * versa.

Hence I'm not doing anything to support that. Even if I did it should be a 
separate commit.
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Re: [Intel-gfx] [PATCH] Revert "drm/i915: Use atomic commits for legacy page_flips"

[Maarten Lankhorst]

Op 24-06-16 om 14:44 schreef Chris Wilson:
> This reverts commit ee042aa40b66d18d465206845b0752c6a617ba3f.
>
> Something appears to be off in the timing, but as far as I can tell it
> is not along the event delivery path. The net effect appears to be
> rendering flicker (the current render buffer appears on the scanout,
> with what appears to be active rendering for a fraction of a frame) and
> is causing me a headache.
>
> The cursor is also being stalled by page flips, causing a "heavy mouse"
> and jitter.
>
> Reported-and-tested-by: Steven Newbury <st...@snewbury.org.uk>
> Reported-by:  Rafael Ristovski  <rafael.ristov...@gmail.com>
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=96593
> Testcase: igt/kms_cursor_legacy/basic-flip-vs-cursor
> Signed-off-by: Chris Wilson <ch...@chris-wilson.co.uk>
> Cc: Daniel Vetter <daniel.vet...@ffwll.ch>
> Cc: Maarten Lankhorst <maarten.lankho...@linux.intel.com>
> ---
>  drivers/gpu/drm/i915/intel_display.c | 3 +--
>  1 file changed, 1 insertion(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_display.c 
> b/drivers/gpu/drm/i915/intel_display.c
> index 1141b86..d4a7872 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -11646,7 +11646,6 @@ void intel_check_page_flip(struct drm_i915_private 
> *dev_priv, int pipe)
>   spin_unlock(>event_lock);
>  }
>  
> -__maybe_unused
>  static int intel_crtc_page_flip(struct drm_crtc *crtc,
>   struct drm_framebuffer *fb,
>   struct drm_pending_vblank_event *event,
> @@ -14008,7 +14007,7 @@ static const struct drm_crtc_funcs intel_crtc_funcs = 
> {
>   .set_config = drm_atomic_helper_set_config,
>   .set_property = drm_atomic_helper_crtc_set_property,
>   .destroy = intel_crtc_destroy,
> - .page_flip = drm_atomic_helper_page_flip,
> + .page_flip = intel_crtc_page_flip,
>   .atomic_duplicate_state = intel_crtc_duplicate_state,
>   .atomic_destroy_state = intel_crtc_destroy_state,
>  };

This still wouldn't fix updates based on nonblocking atomic commits, though 
probably less likely.

Does this bug get fixed by "drm/i915: Don't stall too much for cursor vs. 
pageflip" ?

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Re: [Intel-gfx] [PATCH] drm/i915/gen9: Re-allocate DDB only for changed pipes

[Maarten Lankhorst]

Op 28-06-16 om 01:42 schreef Matt Roper:
> When a display update triggers a DDB re-allocation, we should start by
> assuming that only the updated pipes need to be re-allocated (we have
> logic later that may add additional pipes if, e.g., a modeset triggers a
> change to the global allocation).
>
> We were erroneously using the _active_ pipes as our starting point
> rather than the changed pipes.  This causes us to grab CRTC locks that
> we didn't actually need, reducing parallelism.  Given the recent
> non-blocking atomic changes, it also causes legacy pageflips against one
> CRTC to return -EBUSY if there's an outstanding pageflip against a
> different CRTC (a situation easily triggered via compositors like
> Weston).
>
> Fixes: 98d39494d3 ("drm/i915/gen9: Compute DDB allocation at atomic check 
> time (v4)")
> Cc: Maarten Lankhorst <maarten.lankho...@linux.intel.com>
> Signed-off-by: Matt Roper <matthew.d.ro...@intel.com>
> ---
>  drivers/gpu/drm/i915/intel_pm.c | 15 ++-
>  1 file changed, 14 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index c94521cc..d7f8ba8 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -3879,6 +3879,19 @@ static int skl_update_pipe_wm(struct drm_crtc_state 
> *cstate,
>   return 0;
>  }
>  
> +static uint32_t
> +pipes_modified(struct drm_atomic_state *state)
> +{
> + struct drm_crtc *crtc;
> + struct drm_crtc_state *cstate;
> + uint32_t i, ret = 0;
> +
> + for_each_crtc_in_state(state, crtc, cstate, i)
> + ret |= drm_crtc_mask(crtc);
> +
> + return ret;
> +}
> +
>  static int
>  skl_compute_ddb(struct drm_atomic_state *state)
>  {
> @@ -3887,7 +3900,7 @@ skl_compute_ddb(struct drm_atomic_state *state)
>   struct intel_atomic_state *intel_state = to_intel_atomic_state(state);
>   struct intel_crtc *intel_crtc;
>   struct skl_ddb_allocation *ddb = _state->wm_results.ddb;
> - unsigned realloc_pipes = dev_priv->active_crtcs;
> + uint32_t realloc_pipes = pipes_modified(state);
>   int ret;
>  
>   /*

Hey,

Thanks, this is the original bug that triggered the need for "[PATCH] 
drm/atomic: Make drm_atomic_legacy_backoff reset crtc->acquire_ctx".
Fixing this should remove unnecessary stalls in atomic commit. :-)

Reviewed-by: Maarten Lankhorst <maarten.lankho...@linux.intel.com>


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Re: [Intel-gfx] [RFC 8/8] drm/i915/vlv: Add intermediate field in intel_crtc_wm_state and handlers for two-level watermark

[Maarten Lankhorst]

Op 23-06-16 om 14:36 schreef Chi Ding:
> From: Maarten Lankhorst <maarten.lankho...@linux.intel.com>
>
> Rename vlv_compute_wm to vlv_compute_pipe_wm to compute optimal watermark
> Add vlv_compute_intermediate_wm to computer intermediate watermark
> Add vlv_initial_watermarks to write intermediate watermark into hardware
> Add vlv_optimize_watermarks to write optimal watermark into hardware
> Change valleyview_crtc_enable to call .initial_watermarks handler
>
> This patch adds the handlers for two-level atomic watermark for VLV/CHV.
> It makes use of the optimal and intermediate watermark fields added in
> the previous commits to calculate the optimal and intermediate state.
> It sets the intermediate watermark which is the safer value of the
> currently active and the optimal watermark pre-vblank. Then it sets the
> optimal watermark after-vblank.
>
> v2:
> - use macro drm_atomic_crtc_state_for_each_plane_state
> - remove redundant debug statements in vlv_pipe_set_fifo_size
>
> v3:
> - use macro drm_atomic_crtc_state_for_each_plane_state to simplify the code
> - check !new_state->active || modeset in computing intermediate watermark
>
> Signed-off-by: Maarten Lankhorst <maarten.lankho...@linux.intel.com>
> Signed-off-by: Chi Ding <chix.d...@intel.com>
> ---
>  drivers/gpu/drm/i915/intel_display.c |   8 +-
>  drivers/gpu/drm/i915/intel_drv.h |   3 +-
>  drivers/gpu/drm/i915/intel_pm.c  | 150 
> +++
>  3 files changed, 121 insertions(+), 40 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_display.c 
> b/drivers/gpu/drm/i915/intel_display.c
> index 1141b86..1ceda24 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -4602,8 +4602,6 @@ static void intel_post_plane_update(struct 
> intel_crtc_state *old_crtc_state)
>  
>   intel_frontbuffer_flip(dev, pipe_config->fb_bits);
>  
> - crtc->wm.cxsr_allowed = true;
> -
>   if (pipe_config->update_wm_post && pipe_config->base.active)
>   intel_update_watermarks(>base);
>  
> @@ -4649,8 +4647,6 @@ static void intel_pre_plane_update(struct 
> intel_crtc_state *old_crtc_state)
>   }
>  
>   if (pipe_config->disable_cxsr && HAS_GMCH_DISPLAY(dev)) {
> - crtc->wm.cxsr_allowed = false;
> -
>   /*
>* Vblank time updates from the shadow to live plane control 
> register
>* are blocked if the memory self-refresh mode is active at that
> @@ -6180,7 +6176,7 @@ static void valleyview_crtc_enable(struct drm_crtc 
> *crtc)
>  
>   intel_color_load_luts(_config->base);
>  
> - intel_update_watermarks(crtc);
> + dev_priv->display.initial_watermarks(pipe_config);
>   intel_enable_pipe(intel_crtc);
>  
>   assert_vblank_disabled(crtc);
> @@ -14591,8 +14587,6 @@ static void intel_crtc_init(struct drm_device *dev, 
> int pipe)
>   intel_crtc->cursor_cntl = ~0;
>   intel_crtc->cursor_size = ~0;
>  
> - intel_crtc->wm.cxsr_allowed = true;
> -
>   BUG_ON(pipe >= ARRAY_SIZE(dev_priv->plane_to_crtc_mapping) ||
>  dev_priv->plane_to_crtc_mapping[intel_crtc->plane] != NULL);
>   dev_priv->plane_to_crtc_mapping[intel_crtc->plane] = _crtc->base;
> diff --git a/drivers/gpu/drm/i915/intel_drv.h 
> b/drivers/gpu/drm/i915/intel_drv.h
> index 8e77adb..30a6304 100644
> --- a/drivers/gpu/drm/i915/intel_drv.h
> +++ b/drivers/gpu/drm/i915/intel_drv.h
> @@ -443,6 +443,7 @@ struct intel_crtc_wm_state {
>   } ilk;
>  
>   struct {
> + struct vlv_wm_state intermediate;
>   struct vlv_wm_state optimal;
>   } vlv;
>  
> @@ -683,8 +684,6 @@ struct intel_crtc {
>   struct vlv_wm_state vlv;
>   } active;
>  
> - /* allow CxSR on this pipe */
> - bool cxsr_allowed;
>   } wm;
>  
>   int scanline_offset;
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index cc43c1e..9a5e6e9 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -31,6 +31,7 @@
>  #include "intel_drv.h"
>  #include "../../../platform/x86/intel_ips.h"
>  #include 
> +#include 
>  
>  /**
>   * DOC: RC6
> @@ -989,6 +990,7 @@ static uint16_t vlv_compute_wm_level(struct intel_plane 
> *plane,
>   clock = cstate->base.adjusted_mode.crtc_clock;
>   htotal = cstate->base.adjusted_mode.crtc_htotal;
>   width = cstate->pipe_src_w;
> +
&g

Re: [Intel-gfx] [PATCH 2/3] drm/i915: Remove atomic.pre_disable_primary.

[Maarten Lankhorst]

Op 03-02-16 om 18:39 schreef Ville Syrjälä:
> On Wed, Feb 03, 2016 at 06:23:13PM +0100, Maarten Lankhorst wrote:
>> Op 03-02-16 om 17:07 schreef Ville Syrjälä:
>>> On Wed, Feb 03, 2016 at 04:53:24PM +0100, Maarten Lankhorst wrote:
>>>> This can be derived from the atomic state in pre_plane_update,
>>>> which makes it more clear when it's supposed to be called.
>>>>
>>>> Reviewed-by: Ander Conselvan de Oliveira <conselv...@gmail.com>
>>>> Signed-off-by: Maarten Lankhorst <maarten.lankho...@linux.intel.com>
>>>> ---
>>>>  drivers/gpu/drm/i915/intel_display.c | 25 +++--
>>>>  drivers/gpu/drm/i915/intel_drv.h |  1 -
>>>>  2 files changed, 19 insertions(+), 7 deletions(-)
>>>>
>>>> diff --git a/drivers/gpu/drm/i915/intel_display.c 
>>>> b/drivers/gpu/drm/i915/intel_display.c
>>>> index de94ef165fbe..c7f2a18ab34e 100644
>>>> --- a/drivers/gpu/drm/i915/intel_display.c
>>>> +++ b/drivers/gpu/drm/i915/intel_display.c
>>>> @@ -4807,19 +4807,33 @@ static void intel_post_plane_update(struct 
>>>> intel_crtc *crtc)
>>>>memset(atomic, 0, sizeof(*atomic));
>>>>  }
>>>>  
>>>> -static void intel_pre_plane_update(struct intel_crtc *crtc)
>>>> +static void intel_pre_plane_update(struct intel_crtc_state 
>>>> *old_crtc_state)
>>>>  {
>>>> +  struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->base.crtc);
>>>>struct drm_device *dev = crtc->base.dev;
>>>>struct drm_i915_private *dev_priv = dev->dev_private;
>>>>struct intel_crtc_atomic_commit *atomic = >atomic;
>>>>struct intel_crtc_state *pipe_config =
>>>>to_intel_crtc_state(crtc->base.state);
>>>> +  struct drm_atomic_state *old_state = old_crtc_state->base.state;
>>>> +  struct drm_plane *primary = crtc->base.primary;
>>>> +  struct drm_plane_state *old_pri_state =
>>>> +  drm_atomic_get_existing_plane_state(old_state, primary);
>>>> +  bool modeset = needs_modeset(_config->base);
>>>>  
>>>>if (atomic->update_fbc)
>>>>intel_fbc_pre_update(crtc);
>>>>  
>>>> -  if (atomic->pre_disable_primary)
>>>> -  intel_pre_disable_primary(>base);
>>>> +  if (old_pri_state) {
>>> When might we not have and old state for the primary plane?
>>>
>> When updating some state unrelated to the primary plane, for example 
>> changing cursor.
> Hmm. I thought we added all the planes to the state currently...
> I guess that only happens due to watermark calculation on specific
> platforms.
>
Yes we do and that's a bug. I have a patch to reuse the old values for the 
planes not part of the state,
I just didn't send it upstream yet.

~Maarten
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Re: [Intel-gfx] [PATCH v2 2/9] drm/i915: Kill off intel_crtc->atomic.wait_vblank, v3.

[Maarten Lankhorst]

Hey,

Op 13-01-16 om 13:58 schreef Ville Syrjälä:
> On Mon, Jan 11, 2016 at 01:27:42PM +0100, Maarten Lankhorst wrote:
>> Currently we perform our own wait in post_plane_update,
>> but the atomic core performs another one in wait_for_vblanks.
>> This means that 2 vblanks are done when a fb is changed,
>> which is a bit overkill.
>>
>> Merge them by creating a helper function that takes a crtc mask
>> for the planes to wait on.
>>
>> The broadwell vblank workaround may look gone entirely but this is
>> not the case. pipe_config->wm_changed is set to true
>> when any plane is turned on, which forces a vblank wait.
> Still NAK, because you just removed the comment entirely.
I may have removed the comment but there will always be an unconditional wait 
because of the wm changes.
In some future commit I will rework do_intel_finish_page_flip to deal with 
atomic, and in that function the comment
will be useful again.
>> Changes since v1:
>> - Removing the double vblank wait on broadwell moved to its own commit.
>> Changes since v2:
>> - Move out POWER_DOMAIN_MODESET handling to its own commit.
>>
>> Signed-off-by: Maarten Lankhorst <maarten.lankho...@linux.intel.com>
>> ---
>>  drivers/gpu/drm/i915/intel_atomic.c  |  1 +
>>  drivers/gpu/drm/i915/intel_display.c | 80 
>> ++--
>>  drivers/gpu/drm/i915/intel_drv.h |  2 +-
>>  3 files changed, 61 insertions(+), 22 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/i915/intel_atomic.c 
>> b/drivers/gpu/drm/i915/intel_atomic.c
>> index 9682d94af710..ba9a57f33c43 100644
>> --- a/drivers/gpu/drm/i915/intel_atomic.c
>> +++ b/drivers/gpu/drm/i915/intel_atomic.c
>> @@ -98,6 +98,7 @@ intel_crtc_duplicate_state(struct drm_crtc *crtc)
>>  crtc_state->disable_cxsr = false;
>>  crtc_state->wm_changed = false;
>>  crtc_state->wm.need_postvbl_update = false;
>> +crtc_state->fb_changed = false;
>>  
>>  return _state->base;
>>  }
>> diff --git a/drivers/gpu/drm/i915/intel_display.c 
>> b/drivers/gpu/drm/i915/intel_display.c
>> index 2aa1c5367625..eac73f005a70 100644
>> --- a/drivers/gpu/drm/i915/intel_display.c
>> +++ b/drivers/gpu/drm/i915/intel_display.c
>> @@ -4796,9 +4796,6 @@ static void intel_post_plane_update(struct intel_crtc 
>> *crtc)
>>  to_intel_crtc_state(crtc->base.state);
>>  struct drm_device *dev = crtc->base.dev;
>>  
>> -if (atomic->wait_vblank)
>> -intel_wait_for_vblank(dev, crtc->pipe);
>> -
>>  intel_frontbuffer_flip(dev, atomic->fb_bits);
>>  
>>  crtc->wm.cxsr_allowed = true;
>> @@ -11872,6 +11869,9 @@ int intel_plane_atomic_calc_changes(struct 
>> drm_crtc_state *crtc_state,
>>  if (!was_visible && !visible)
>>  return 0;
>>  
>> +if (fb != old_plane_state->base.fb)
>> +pipe_config->fb_changed = true;
> Isn't that going to slow down cursor updates once again?
Very likely.. Shall I add a if (!state->legacy_cursor_update) to 
intel_atomic_wait_for_vblanks ?
>> +
>>  turn_off = was_visible && (!visible || mode_changed);
>>  turn_on = visible && (!was_visible || mode_changed);
>>  
>> @@ -11887,8 +11887,6 @@ int intel_plane_atomic_calc_changes(struct 
>> drm_crtc_state *crtc_state,
>>  
>>  /* must disable cxsr around plane enable/disable */
>>  if (plane->type != DRM_PLANE_TYPE_CURSOR) {
>> -if (is_crtc_enabled)
>> -intel_crtc->atomic.wait_vblank = true;
>>  pipe_config->disable_cxsr = true;
>>  }
>>  } else if (intel_wm_need_update(plane, plane_state)) {
>> @@ -11940,14 +11938,6 @@ int intel_plane_atomic_calc_changes(struct 
>> drm_crtc_state *crtc_state,
>>  plane_state->rotation != BIT(DRM_ROTATE_0))
>>  intel_crtc->atomic.disable_fbc = true;
>>  
>> -/*
>> - * BDW signals flip done immediately if the plane
>> - * is disabled, even if the plane enable is already
>> - * armed to occur at the next vblank :(
>> - */
>> -if (turn_on && IS_BROADWELL(dev))
>> -intel_crtc->atomic.wait_vblank = true;
>> -
>>  intel_crtc->atomic.update_fbc |= visible || mode_changed;
>>  break;
>>  case DRM_PLANE_TYPE_CURSO

Re: [Intel-gfx] [PATCH v2 1/6] drm/i915: Use atomic state to obtain load detection crtc, v2.

[Maarten Lankhorst]

Op 03-02-16 om 17:34 schreef Ville Syrjälä:
> On Wed, Feb 03, 2016 at 09:57:55AM +0100, Maarten Lankhorst wrote:
>> Op 02-02-16 om 18:32 schreef Ville Syrjälä:
>>> On Tue, Feb 02, 2016 at 01:48:17PM +0100, Maarten Lankhorst wrote:
>>>> drm/i915: Use atomic state to obtain load detection crtc, v2.
>>>>
>>>> Instead of restoring dpms and a flag for whether a temp fb is allocated 
>>>> duplicate
>>>> an atomic state before the new state is committed, and commit it the old 
>>>> state
>>>> in intel_release_load_detect_pipe.
>>>>
>>>> Changes since v1:
>>>> - Use a real atomic state.
>>>>
>>>> Signed-off-by: Maarten Lankhorst <maarten.lankho...@linux.intel.com>
>>>> ---
>>>> diff --git a/drivers/gpu/drm/i915/intel_display.c 
>>>> b/drivers/gpu/drm/i915/intel_display.c
>>>> index 4d8c9f7857db..c7ba8f4a971e 100644
>>>> --- a/drivers/gpu/drm/i915/intel_display.c
>>>> +++ b/drivers/gpu/drm/i915/intel_display.c
>>>> @@ -10361,6 +10361,7 @@ mode_fits_in_fbdev(struct drm_device *dev,
>>>>if (obj->base.size < mode->vdisplay * fb->pitches[0])
>>>>return NULL;
>>>>  
>>>> +  drm_framebuffer_reference(fb);
>>>>return fb;
>>>>  #else
>>>>return NULL;
>>>> @@ -10416,7 +10417,7 @@ bool intel_get_load_detect_pipe(struct 
>>>> drm_connector *connector,
>>>>struct drm_device *dev = encoder->dev;
>>>>struct drm_framebuffer *fb;
>>>>struct drm_mode_config *config = >mode_config;
>>>> -  struct drm_atomic_state *state = NULL;
>>>> +  struct drm_atomic_state *state = NULL, *restore_state = NULL;
>>>>struct drm_connector_state *connector_state;
>>>>struct intel_crtc_state *crtc_state;
>>>>int ret, i = -1;
>>>> @@ -10425,6 +10426,8 @@ bool intel_get_load_detect_pipe(struct 
>>>> drm_connector *connector,
>>>>  connector->base.id, connector->name,
>>>>  encoder->base.id, encoder->name);
>>>>  
>>>> +  old->restore_state = NULL;
>>>> +
>>>>  retry:
>>>>ret = drm_modeset_lock(>connection_mutex, ctx);
>>>>if (ret)
>>>> @@ -10441,24 +10444,15 @@ retry:
>>>> */
>>>>  
>>>>/* See if we already have a CRTC for this connector */
>>>> -  if (encoder->crtc) {
>>>> -  crtc = encoder->crtc;
>>>> +  if (connector->state->crtc) {
>>>> +  crtc = connector->state->crtc;
>>>>  
>>>>ret = drm_modeset_lock(>mutex, ctx);
>>>>if (ret)
>>>>goto fail;
>>>> -  ret = drm_modeset_lock(>primary->mutex, ctx);
>>>> -  if (ret)
>>>> -  goto fail;
>>>> -
>>>> -  old->dpms_mode = connector->dpms;
>>>> -  old->load_detect_temp = false;
>>>>  
>>>>/* Make sure the crtc and connector are running */
>>>> -  if (connector->dpms != DRM_MODE_DPMS_ON)
>>>> -  connector->funcs->dpms(connector, DRM_MODE_DPMS_ON);
>>>> -
>>>> -  return true;
>>>> +  goto found;
>>>>}
>>>>  
>>>>/* Find an unused one (if possible) */
>>>> @@ -10466,8 +10460,15 @@ retry:
>>>>i++;
>>>>if (!(encoder->possible_crtcs & (1 << i)))
>>>>continue;
>>>> -  if (possible_crtc->state->enable)
>>>> +
>>>> +  ret = drm_modeset_lock(_crtc->mutex, ctx);
>>>> +  if (ret)
>>>> +  goto fail;
>>>> +
>>>> +  if (possible_crtc->state->enable) {
>>>> +  drm_modeset_unlock(_crtc->mutex);
>>>>continue;
>>>> +  }
>>>>  
>>>>crtc = possible_crtc;
>>>>break;
>>>> @@ -10481,23 +10482,22 @@ retry:
>>>>goto fail;
>>>>}
>>>>  
>>>> -  ret = drm_modeset_lock(>mutex, ctx);
>>>> -  if (ret)
>>

Re: [Intel-gfx] [PATCH v2 2/9] drm/i915: Kill off intel_crtc->atomic.wait_vblank, v3.

[Maarten Lankhorst]

Op 09-02-16 om 11:42 schreef Ville Syrjälä:
> On Tue, Feb 09, 2016 at 11:27:44AM +0100, Maarten Lankhorst wrote:
>> Hey,
>>
>> Op 13-01-16 om 13:58 schreef Ville Syrjälä:
>>> On Mon, Jan 11, 2016 at 01:27:42PM +0100, Maarten Lankhorst wrote:
>>>> Currently we perform our own wait in post_plane_update,
>>>> but the atomic core performs another one in wait_for_vblanks.
>>>> This means that 2 vblanks are done when a fb is changed,
>>>> which is a bit overkill.
>>>>
>>>> Merge them by creating a helper function that takes a crtc mask
>>>> for the planes to wait on.
>>>>
>>>> The broadwell vblank workaround may look gone entirely but this is
>>>> not the case. pipe_config->wm_changed is set to true
>>>> when any plane is turned on, which forces a vblank wait.
>>> Still NAK, because you just removed the comment entirely.
>> I may have removed the comment but there will always be an unconditional 
>> wait because of the wm changes.
>> In some future commit I will rework do_intel_finish_page_flip to deal with 
>> atomic, and in that function the comment
>> will be useful again.
> The comment is the spec here, so it should be kept. Actually what I
> really want is to stop using the flip done interrupt entirely since
> it's arguably broken, at which point the comment should problably be
> moved to somewhere else (interrupt setup code, flip completion code,
> etc.). But removing the comment would be bad since then people might
> not understand why we do it the way we do.
I think the flip done interrupt will still be needed for cs flips, but Chris 
was against removing it iirc. I'll move the comment to page_flip_finished for 
now.
>>>> Changes since v1:
>>>> - Removing the double vblank wait on broadwell moved to its own commit.
>>>> Changes since v2:
>>>> - Move out POWER_DOMAIN_MODESET handling to its own commit.
>>>>
>>>> Signed-off-by: Maarten Lankhorst <maarten.lankho...@linux.intel.com>
>>>> ---
>>>>  drivers/gpu/drm/i915/intel_atomic.c  |  1 +
>>>>  drivers/gpu/drm/i915/intel_display.c | 80 
>>>> ++--
>>>>  drivers/gpu/drm/i915/intel_drv.h |  2 +-
>>>>  3 files changed, 61 insertions(+), 22 deletions(-)
>>>>
>>>> diff --git a/drivers/gpu/drm/i915/intel_atomic.c 
>>>> b/drivers/gpu/drm/i915/intel_atomic.c
>>>> index 9682d94af710..ba9a57f33c43 100644
>>>> --- a/drivers/gpu/drm/i915/intel_atomic.c
>>>> +++ b/drivers/gpu/drm/i915/intel_atomic.c
>>>> @@ -98,6 +98,7 @@ intel_crtc_duplicate_state(struct drm_crtc *crtc)
>>>>crtc_state->disable_cxsr = false;
>>>>crtc_state->wm_changed = false;
>>>>crtc_state->wm.need_postvbl_update = false;
>>>> +  crtc_state->fb_changed = false;
>>>>  
>>>>return _state->base;
>>>>  }
>>>> diff --git a/drivers/gpu/drm/i915/intel_display.c 
>>>> b/drivers/gpu/drm/i915/intel_display.c
>>>> index 2aa1c5367625..eac73f005a70 100644
>>>> --- a/drivers/gpu/drm/i915/intel_display.c
>>>> +++ b/drivers/gpu/drm/i915/intel_display.c
>>>> @@ -4796,9 +4796,6 @@ static void intel_post_plane_update(struct 
>>>> intel_crtc *crtc)
>>>>to_intel_crtc_state(crtc->base.state);
>>>>struct drm_device *dev = crtc->base.dev;
>>>>  
>>>> -  if (atomic->wait_vblank)
>>>> -  intel_wait_for_vblank(dev, crtc->pipe);
>>>> -
>>>>intel_frontbuffer_flip(dev, atomic->fb_bits);
>>>>  
>>>>crtc->wm.cxsr_allowed = true;
>>>> @@ -11872,6 +11869,9 @@ int intel_plane_atomic_calc_changes(struct 
>>>> drm_crtc_state *crtc_state,
>>>>if (!was_visible && !visible)
>>>>return 0;
>>>>  
>>>> +  if (fb != old_plane_state->base.fb)
>>>> +  pipe_config->fb_changed = true;
>>> Isn't that going to slow down cursor updates once again?
>> Very likely.. Shall I add a if (!state->legacy_cursor_update) to 
>> intel_atomic_wait_for_vblanks ?
> Not sure. Still wishing we could have just had the proper fps>=vrefresh
> support fron the start.
>
Working on it!
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Re: [Intel-gfx] [PATCH 2/3] drm/i915: Use atomic helpers for suspend.

[Maarten Lankhorst]

Op 09-02-16 om 14:37 schreef Ville Syrjälä:
> On Tue, Feb 09, 2016 at 01:52:22PM +0100, Maarten Lankhorst wrote:
>> Instead of duplicating the functionality now that we no longer need
>> to preserve dpll state we can move to using the upstream suspend helper.
>>
>> Signed-off-by: Maarten Lankhorst <maarten.lankho...@linux.intel.com>
>> ---
>>  drivers/gpu/drm/drm_atomic_helper.c  |   3 +
>>  drivers/gpu/drm/i915/i915_drv.c  |   8 ---
>>  drivers/gpu/drm/i915/i915_drv.h  |   1 +
>>  drivers/gpu/drm/i915/intel_display.c | 117 
>> ---
>>  4 files changed, 42 insertions(+), 87 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/drm_atomic_helper.c 
>> b/drivers/gpu/drm/drm_atomic_helper.c
>> index 2b430b05f35d..a2d3b094f27c 100644
>> --- a/drivers/gpu/drm/drm_atomic_helper.c
>> +++ b/drivers/gpu/drm/drm_atomic_helper.c
>> @@ -2102,6 +2102,9 @@ int drm_atomic_helper_resume(struct drm_device *dev,
>>  err = drm_atomic_commit(state);
>>  drm_modeset_unlock_all(dev);
>>  
>> +if (err)
>> +drm_atomic_state_free(state);
>> +
>>  return err;
>>  }
>>  EXPORT_SYMBOL(drm_atomic_helper_resume);
>> diff --git a/drivers/gpu/drm/i915/i915_drv.c 
>> b/drivers/gpu/drm/i915/i915_drv.c
>> index 11d8414edbbe..fc9b552bfcd1 100644
>> --- a/drivers/gpu/drm/i915/i915_drv.c
>> +++ b/drivers/gpu/drm/i915/i915_drv.c
>> @@ -600,13 +600,7 @@ static int i915_drm_suspend(struct drm_device *dev)
>>  
>>  intel_suspend_gt_powersave(dev);
>>  
>> -/*
>> - * Disable CRTCs directly since we want to preserve sw state
>> - * for _thaw. Also, power gate the CRTC power wells.
>> - */
>> -drm_modeset_lock_all(dev);
>>  intel_display_suspend(dev);
>> -drm_modeset_unlock_all(dev);
>>  
>>  intel_dp_mst_suspend(dev);
>>  
>> @@ -761,9 +755,7 @@ static int i915_drm_resume(struct drm_device *dev)
>>  dev_priv->display.hpd_irq_setup(dev);
>>  spin_unlock_irq(_priv->irq_lock);
>>  
>> -drm_modeset_lock_all(dev);
>>  intel_display_resume(dev);
>> -drm_modeset_unlock_all(dev);
>>  
>>  intel_dp_mst_resume(dev);
>>  
>> diff --git a/drivers/gpu/drm/i915/i915_drv.h 
>> b/drivers/gpu/drm/i915/i915_drv.h
>> index 8216665405eb..ef289514b97e 100644
>> --- a/drivers/gpu/drm/i915/i915_drv.h
>> +++ b/drivers/gpu/drm/i915/i915_drv.h
>> @@ -1848,6 +1848,7 @@ struct drm_i915_private {
>>  
>>  enum modeset_restore modeset_restore;
>>  struct mutex modeset_restore_lock;
>> +struct drm_atomic_state *modeset_restore_state;
>>  
>>  struct list_head vm_list; /* Global list of all address spaces */
>>  struct i915_gtt gtt; /* VM representing the global address space */
>> diff --git a/drivers/gpu/drm/i915/intel_display.c 
>> b/drivers/gpu/drm/i915/intel_display.c
>> index e496c130364d..4c91fd1c5222 100644
>> --- a/drivers/gpu/drm/i915/intel_display.c
>> +++ b/drivers/gpu/drm/i915/intel_display.c
>> @@ -6393,58 +6393,19 @@ static void intel_crtc_disable_noatomic(struct 
>> drm_crtc *crtc)
>>   */
>>  int intel_display_suspend(struct drm_device *dev)
>>  {
>> -struct drm_mode_config *config = >mode_config;
>> -struct drm_modeset_acquire_ctx *ctx = config->acquire_ctx;
>> -struct drm_atomic_state *state;
>> -struct drm_crtc *crtc;
>> -unsigned crtc_mask = 0;
>> -int ret = 0;
>> -
>> -if (WARN_ON(!ctx))
>> -return 0;
>> -
>> -lockdep_assert_held(>ww_ctx);
>> -state = drm_atomic_state_alloc(dev);
>> -if (WARN_ON(!state))
>> -return -ENOMEM;
>> -
>> -state->acquire_ctx = ctx;
>> -state->allow_modeset = true;
>> -
>> -for_each_crtc(dev, crtc) {
>> -struct drm_crtc_state *crtc_state =
>> -drm_atomic_get_crtc_state(state, crtc);
>> -
>> -ret = PTR_ERR_OR_ZERO(crtc_state);
>> -if (ret)
>> -goto free;
>> -
>> -if (!crtc_state->active)
>> -continue;
>> -
>> -crtc_state->active = false;
>> -crtc_mask |= 1 << drm_crtc_index(crtc);
>> -}
>> -
>> -if (crtc_mask) {
>> -ret = drm_atomic_commit(state);
>> -
>> -if (!ret) {
>> -for_each_crtc(dev, crtc)
&g

[Intel-gfx] [PATCH 1/3] drm/i915: Clear shared dpll based on old state.

[Maarten Lankhorst]

Atomic resume was preserving the dpll state because it was required
for clearing pll state correctly. If we look at the old_crtc_state
for pll to clear this is not needed and the hack can be removed.

Signed-off-by: Maarten Lankhorst <maarten.lankho...@linux.intel.com>
---
 drivers/gpu/drm/i915/intel_display.c | 19 +++
 1 file changed, 7 insertions(+), 12 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_display.c 
b/drivers/gpu/drm/i915/intel_display.c
index 3b6bd6e9f7ae..e496c130364d 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -13093,8 +13093,6 @@ static void intel_modeset_clear_plls(struct 
drm_atomic_state *state)
struct drm_device *dev = state->dev;
struct drm_i915_private *dev_priv = to_i915(dev);
struct intel_shared_dpll_config *shared_dpll = NULL;
-   struct intel_crtc *intel_crtc;
-   struct intel_crtc_state *intel_crtc_state;
struct drm_crtc *crtc;
struct drm_crtc_state *crtc_state;
int i;
@@ -13103,16 +13101,16 @@ static void intel_modeset_clear_plls(struct 
drm_atomic_state *state)
return;
 
for_each_crtc_in_state(state, crtc, crtc_state, i) {
-   int dpll;
-
-   intel_crtc = to_intel_crtc(crtc);
-   intel_crtc_state = to_intel_crtc_state(crtc_state);
-   dpll = intel_crtc_state->shared_dpll;
+   struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
+   int dpll = to_intel_crtc_state(crtc->state)->shared_dpll;
 
-   if (!needs_modeset(crtc_state) || dpll == DPLL_ID_PRIVATE)
+   if (!needs_modeset(crtc_state))
continue;
 
-   intel_crtc_state->shared_dpll = DPLL_ID_PRIVATE;
+   to_intel_crtc_state(crtc_state)->shared_dpll = DPLL_ID_PRIVATE;
+
+   if (dpll == DPLL_ID_PRIVATE)
+   continue;
 
if (!shared_dpll)
shared_dpll = intel_atomic_get_shared_dpll_state(state);
@@ -15922,9 +15920,6 @@ void intel_display_resume(struct drm_device *dev)
 
state->acquire_ctx = dev->mode_config.acquire_ctx;
 
-   /* preserve complete old state, including dpll */
-   intel_atomic_get_shared_dpll_state(state);
-
for_each_crtc(dev, crtc) {
struct drm_crtc_state *crtc_state =
drm_atomic_get_crtc_state(state, crtc);
-- 
2.1.0

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[Intel-gfx] [PATCH 3/3] drm/i915: Use atomic state to obtain load detection crtc, v3.

[Maarten Lankhorst]

Instead of restoring dpms and a flag for whether a temp fb is allocated 
duplicate
an atomic state before the new state is committed, and commit it the old state
in intel_release_load_detect_pipe.

Changes since v1:
- Use a real atomic state. (Ville)
Changes since v2:
- Do not preserve shared_dpll any more, no need to do so. (Ville)

Signed-off-by: Maarten Lankhorst <maarten.lankho...@linux.intel.com>
---
 drivers/gpu/drm/i915/intel_display.c | 132 ++-
 drivers/gpu/drm/i915/intel_drv.h |   4 +-
 2 files changed, 54 insertions(+), 82 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_display.c 
b/drivers/gpu/drm/i915/intel_display.c
index 4c91fd1c5222..ad6d23c17d48 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -10332,6 +10332,7 @@ mode_fits_in_fbdev(struct drm_device *dev,
if (obj->base.size < mode->vdisplay * fb->pitches[0])
return NULL;
 
+   drm_framebuffer_reference(fb);
return fb;
 #else
return NULL;
@@ -10387,7 +10388,7 @@ bool intel_get_load_detect_pipe(struct drm_connector 
*connector,
struct drm_device *dev = encoder->dev;
struct drm_framebuffer *fb;
struct drm_mode_config *config = >mode_config;
-   struct drm_atomic_state *state = NULL;
+   struct drm_atomic_state *state = NULL, *restore_state = NULL;
struct drm_connector_state *connector_state;
struct intel_crtc_state *crtc_state;
int ret, i = -1;
@@ -10396,6 +10397,8 @@ bool intel_get_load_detect_pipe(struct drm_connector 
*connector,
  connector->base.id, connector->name,
  encoder->base.id, encoder->name);
 
+   old->restore_state = NULL;
+
 retry:
ret = drm_modeset_lock(>connection_mutex, ctx);
if (ret)
@@ -10412,24 +10415,15 @@ retry:
 */
 
/* See if we already have a CRTC for this connector */
-   if (encoder->crtc) {
-   crtc = encoder->crtc;
+   if (connector->state->crtc) {
+   crtc = connector->state->crtc;
 
ret = drm_modeset_lock(>mutex, ctx);
if (ret)
goto fail;
-   ret = drm_modeset_lock(>primary->mutex, ctx);
-   if (ret)
-   goto fail;
-
-   old->dpms_mode = connector->dpms;
-   old->load_detect_temp = false;
 
/* Make sure the crtc and connector are running */
-   if (connector->dpms != DRM_MODE_DPMS_ON)
-   connector->funcs->dpms(connector, DRM_MODE_DPMS_ON);
-
-   return true;
+   goto found;
}
 
/* Find an unused one (if possible) */
@@ -10437,8 +10431,15 @@ retry:
i++;
if (!(encoder->possible_crtcs & (1 << i)))
continue;
-   if (possible_crtc->state->enable)
+
+   ret = drm_modeset_lock(_crtc->mutex, ctx);
+   if (ret)
+   goto fail;
+
+   if (possible_crtc->state->enable) {
+   drm_modeset_unlock(_crtc->mutex);
continue;
+   }
 
crtc = possible_crtc;
break;
@@ -10452,23 +10453,22 @@ retry:
goto fail;
}
 
-   ret = drm_modeset_lock(>mutex, ctx);
-   if (ret)
-   goto fail;
+found:
+   intel_crtc = to_intel_crtc(crtc);
+
ret = drm_modeset_lock(>primary->mutex, ctx);
if (ret)
goto fail;
 
-   intel_crtc = to_intel_crtc(crtc);
-   old->dpms_mode = connector->dpms;
-   old->load_detect_temp = true;
-   old->release_fb = NULL;
-
state = drm_atomic_state_alloc(dev);
-   if (!state)
-   return false;
+   restore_state = drm_atomic_state_alloc(dev);
+   if (!state || !restore_state) {
+   ret = -ENOMEM;
+   goto fail;
+   }
 
state->acquire_ctx = ctx;
+   restore_state->acquire_ctx = ctx;
 
connector_state = drm_atomic_get_connector_state(state, connector);
if (IS_ERR(connector_state)) {
@@ -10476,7 +10476,9 @@ retry:
goto fail;
}
 
-   connector_state->crtc = crtc;
+   ret = drm_atomic_set_crtc_for_connector(connector_state, crtc);
+   if (ret)
+   goto fail;
 
crtc_state = intel_atomic_get_crtc_state(state, intel_crtc);
if (IS_ERR(crtc_state)) {
@@ -10500,7 +10502,6 @@ retry:
if (fb == NULL) {
DRM_DEBUG_KMS("creating tmp fb for load-detection\n");
fb = intel_framebuffer_create_for_mode(dev, mode, 24, 32);
-   old->release_fb = fb;
} else
DRM_D

[Intel-gfx] [PATCH 2/3] drm/i915: Use atomic helpers for suspend.

[Maarten Lankhorst]

Instead of duplicating the functionality now that we no longer need
to preserve dpll state we can move to using the upstream suspend helper.

Signed-off-by: Maarten Lankhorst <maarten.lankho...@linux.intel.com>
---
 drivers/gpu/drm/drm_atomic_helper.c  |   3 +
 drivers/gpu/drm/i915/i915_drv.c  |   8 ---
 drivers/gpu/drm/i915/i915_drv.h  |   1 +
 drivers/gpu/drm/i915/intel_display.c | 117 ---
 4 files changed, 42 insertions(+), 87 deletions(-)

diff --git a/drivers/gpu/drm/drm_atomic_helper.c 
b/drivers/gpu/drm/drm_atomic_helper.c
index 2b430b05f35d..a2d3b094f27c 100644
--- a/drivers/gpu/drm/drm_atomic_helper.c
+++ b/drivers/gpu/drm/drm_atomic_helper.c
@@ -2102,6 +2102,9 @@ int drm_atomic_helper_resume(struct drm_device *dev,
err = drm_atomic_commit(state);
drm_modeset_unlock_all(dev);
 
+   if (err)
+   drm_atomic_state_free(state);
+
return err;
 }
 EXPORT_SYMBOL(drm_atomic_helper_resume);
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 11d8414edbbe..fc9b552bfcd1 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -600,13 +600,7 @@ static int i915_drm_suspend(struct drm_device *dev)
 
intel_suspend_gt_powersave(dev);
 
-   /*
-* Disable CRTCs directly since we want to preserve sw state
-* for _thaw. Also, power gate the CRTC power wells.
-*/
-   drm_modeset_lock_all(dev);
intel_display_suspend(dev);
-   drm_modeset_unlock_all(dev);
 
intel_dp_mst_suspend(dev);
 
@@ -761,9 +755,7 @@ static int i915_drm_resume(struct drm_device *dev)
dev_priv->display.hpd_irq_setup(dev);
spin_unlock_irq(_priv->irq_lock);
 
-   drm_modeset_lock_all(dev);
intel_display_resume(dev);
-   drm_modeset_unlock_all(dev);
 
intel_dp_mst_resume(dev);
 
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 8216665405eb..ef289514b97e 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1848,6 +1848,7 @@ struct drm_i915_private {
 
enum modeset_restore modeset_restore;
struct mutex modeset_restore_lock;
+   struct drm_atomic_state *modeset_restore_state;
 
struct list_head vm_list; /* Global list of all address spaces */
struct i915_gtt gtt; /* VM representing the global address space */
diff --git a/drivers/gpu/drm/i915/intel_display.c 
b/drivers/gpu/drm/i915/intel_display.c
index e496c130364d..4c91fd1c5222 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -6393,58 +6393,19 @@ static void intel_crtc_disable_noatomic(struct drm_crtc 
*crtc)
  */
 int intel_display_suspend(struct drm_device *dev)
 {
-   struct drm_mode_config *config = >mode_config;
-   struct drm_modeset_acquire_ctx *ctx = config->acquire_ctx;
-   struct drm_atomic_state *state;
-   struct drm_crtc *crtc;
-   unsigned crtc_mask = 0;
-   int ret = 0;
-
-   if (WARN_ON(!ctx))
-   return 0;
-
-   lockdep_assert_held(>ww_ctx);
-   state = drm_atomic_state_alloc(dev);
-   if (WARN_ON(!state))
-   return -ENOMEM;
-
-   state->acquire_ctx = ctx;
-   state->allow_modeset = true;
-
-   for_each_crtc(dev, crtc) {
-   struct drm_crtc_state *crtc_state =
-   drm_atomic_get_crtc_state(state, crtc);
-
-   ret = PTR_ERR_OR_ZERO(crtc_state);
-   if (ret)
-   goto free;
-
-   if (!crtc_state->active)
-   continue;
-
-   crtc_state->active = false;
-   crtc_mask |= 1 << drm_crtc_index(crtc);
-   }
-
-   if (crtc_mask) {
-   ret = drm_atomic_commit(state);
-
-   if (!ret) {
-   for_each_crtc(dev, crtc)
-   if (crtc_mask & (1 << drm_crtc_index(crtc)))
-   crtc->state->active = true;
-
-   return ret;
-   }
-   }
+   struct drm_i915_private *dev_priv = to_i915(dev);
+   int ret;
 
-free:
-   if (ret)
+   dev_priv->modeset_restore_state = drm_atomic_helper_suspend(dev);
+   ret = PTR_ERR_OR_ZERO(dev_priv->modeset_restore_state);
+   if (ret) {
DRM_ERROR("Suspending crtc's failed with %i\n", ret);
-   drm_atomic_state_free(state);
+   dev_priv->modeset_restore_state = NULL;
+   }
return ret;
 }
 
+
 void intel_encoder_destroy(struct drm_encoder *encoder)
 {
struct intel_encoder *intel_encoder = to_intel_encoder(encoder);
@@ -15909,51 +15870,49 @@ intel_modeset_setup_hw_state(struct drm_device *dev)
 
 void intel_display_resume(struct drm_device *dev)
 {
-   struct drm_atomic_state 

[Intel-gfx] [PATCH v4 6/8] drm/i915: Nuke fbc members from intel_crtc->atomic, v2.

[Maarten Lankhorst]

Factor out intel_fbc_supports_rotation and use it in
pre_plane_update as well. This leaves intel_crtc->atomic
empty, so remove it too.

Changes since v1:
- Add a intel_fbc_supports_rotation helper.

Signed-off-by: Maarten Lankhorst <maarten.lankho...@linux.intel.com>
---
 drivers/gpu/drm/i915/intel_display.c | 58 +---
 drivers/gpu/drm/i915/intel_drv.h | 15 --
 2 files changed, 20 insertions(+), 53 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_display.c 
b/drivers/gpu/drm/i915/intel_display.c
index 54be8a255f1f..00cb261c6787 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -4782,11 +4782,9 @@ static void intel_post_plane_update(struct 
intel_crtc_state *old_crtc_state)
 {
struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->base.crtc);
struct drm_atomic_state *old_state = old_crtc_state->base.state;
-   struct intel_crtc_atomic_commit *atomic = >atomic;
struct intel_crtc_state *pipe_config =
to_intel_crtc_state(crtc->base.state);
struct drm_device *dev = crtc->base.dev;
-   struct drm_i915_private *dev_priv = dev->dev_private;
struct drm_plane *primary = crtc->base.primary;
struct drm_plane_state *old_pri_state =
drm_atomic_get_existing_plane_state(old_state, primary);
@@ -4798,22 +4796,19 @@ static void intel_post_plane_update(struct 
intel_crtc_state *old_crtc_state)
if (pipe_config->wm_changed && pipe_config->base.active)
intel_update_watermarks(>base);
 
-   if (atomic->update_fbc)
-   intel_fbc_post_update(crtc);
-
if (old_pri_state) {
struct intel_plane_state *primary_state =
to_intel_plane_state(primary->state);
struct intel_plane_state *old_primary_state =
to_intel_plane_state(old_pri_state);
 
+   intel_fbc_post_update(crtc);
+
if (primary_state->visible &&
(needs_modeset(_config->base) ||
 !old_primary_state->visible))
intel_post_enable_primary(>base);
}
-
-   memset(atomic, 0, sizeof(*atomic));
 }
 
 static void intel_pre_plane_update(struct intel_crtc_state *old_crtc_state)
@@ -4821,7 +4816,6 @@ static void intel_pre_plane_update(struct 
intel_crtc_state *old_crtc_state)
struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->base.crtc);
struct drm_device *dev = crtc->base.dev;
struct drm_i915_private *dev_priv = dev->dev_private;
-   struct intel_crtc_atomic_commit *atomic = >atomic;
struct intel_crtc_state *pipe_config =
to_intel_crtc_state(crtc->base.state);
struct drm_atomic_state *old_state = old_crtc_state->base.state;
@@ -4830,17 +4824,17 @@ static void intel_pre_plane_update(struct 
intel_crtc_state *old_crtc_state)
drm_atomic_get_existing_plane_state(old_state, primary);
bool modeset = needs_modeset(_config->base);
 
-   if (atomic->update_fbc)
-   intel_fbc_pre_update(crtc);
-
if (old_pri_state) {
struct intel_plane_state *primary_state =
to_intel_plane_state(primary->state);
struct intel_plane_state *old_primary_state =
to_intel_plane_state(old_pri_state);
+   bool turn_off = old_primary_state->visible &&
+   (modeset || !primary_state->visible);
+
+   intel_fbc_pre_update(crtc);
 
-   if (old_primary_state->visible &&
-   (modeset || !primary_state->visible))
+   if (turn_off)
intel_pre_disable_primary(>base);
}
 
@@ -11822,27 +11816,17 @@ int intel_plane_atomic_calc_changes(struct 
drm_crtc_state *crtc_state,
if (visible || was_visible)
pipe_config->fb_bits |= to_intel_plane(plane)->frontbuffer_bit;
 
-   switch (plane->type) {
-   case DRM_PLANE_TYPE_PRIMARY:
-   intel_crtc->atomic.update_fbc = true;
-
-   break;
-   case DRM_PLANE_TYPE_CURSOR:
-   break;
-   case DRM_PLANE_TYPE_OVERLAY:
-   /*
-* WaCxSRDisabledForSpriteScaling:ivb
-*
-* cstate->update_wm was already set above, so this flag will
-* take effect when we commit and program watermarks.
-*/
-   if (IS_IVYBRIDGE(dev) &&
-   needs_scaling(to_intel_plane_state(plane_state)) &&
-   !needs_scaling(old_plane_state))
-   pipe_config->disable_lp_wm = true;
+   /*
+* WaCxSRDisabledForSpriteScaling:ivb
+*
+ 

[Intel-gfx] [PATCH v4 1/8] drm/i915: Pass crtc state to modeset_get_crtc_power_domains.

[Maarten Lankhorst]

Use our newly created encoder_mask to iterate over the encoders.

Signed-off-by: Maarten Lankhorst <maarten.lankho...@linux.intel.com>
---
 drivers/gpu/drm/i915/intel_display.c | 33 +
 1 file changed, 21 insertions(+), 12 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_display.c 
b/drivers/gpu/drm/i915/intel_display.c
index 30d4db0d776f..b479ba6238d7 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -5301,31 +5301,37 @@ intel_display_port_aux_power_domain(struct 
intel_encoder *intel_encoder)
}
 }
 
-static unsigned long get_crtc_power_domains(struct drm_crtc *crtc)
+static unsigned long get_crtc_power_domains(struct drm_crtc *crtc,
+   struct intel_crtc_state *crtc_state)
 {
struct drm_device *dev = crtc->dev;
-   struct intel_encoder *intel_encoder;
+   struct drm_encoder *encoder;
struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
enum pipe pipe = intel_crtc->pipe;
unsigned long mask;
-   enum transcoder transcoder = intel_crtc->config->cpu_transcoder;
+   enum transcoder transcoder = crtc_state->cpu_transcoder;
 
-   if (!crtc->state->active)
+   if (!crtc_state->base.active)
return 0;
 
mask = BIT(POWER_DOMAIN_PIPE(pipe));
mask |= BIT(POWER_DOMAIN_TRANSCODER(transcoder));
-   if (intel_crtc->config->pch_pfit.enabled ||
-   intel_crtc->config->pch_pfit.force_thru)
+   if (crtc_state->pch_pfit.enabled ||
+   crtc_state->pch_pfit.force_thru)
mask |= BIT(POWER_DOMAIN_PIPE_PANEL_FITTER(pipe));
 
-   for_each_encoder_on_crtc(dev, crtc, intel_encoder)
+   drm_for_each_encoder_mask(encoder, dev, crtc_state->base.encoder_mask) {
+   struct intel_encoder *intel_encoder = to_intel_encoder(encoder);
+
mask |= BIT(intel_display_port_power_domain(intel_encoder));
+   }
 
return mask;
 }
 
-static unsigned long modeset_get_crtc_power_domains(struct drm_crtc *crtc)
+static unsigned long
+modeset_get_crtc_power_domains(struct drm_crtc *crtc,
+  struct intel_crtc_state *crtc_state)
 {
struct drm_i915_private *dev_priv = crtc->dev->dev_private;
struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
@@ -5333,7 +5339,8 @@ static unsigned long 
modeset_get_crtc_power_domains(struct drm_crtc *crtc)
unsigned long domains, new_domains, old_domains;
 
old_domains = intel_crtc->enabled_power_domains;
-   intel_crtc->enabled_power_domains = new_domains = 
get_crtc_power_domains(crtc);
+   intel_crtc->enabled_power_domains = new_domains =
+   get_crtc_power_domains(crtc, crtc_state);
 
domains = new_domains & ~old_domains;
 
@@ -5365,7 +5372,8 @@ static void modeset_update_crtc_power_domains(struct 
drm_atomic_state *state)
for_each_crtc_in_state(state, crtc, crtc_state, i) {
if (needs_modeset(crtc->state))
put_domains[to_intel_crtc(crtc)->pipe] =
-   modeset_get_crtc_power_domains(crtc);
+   modeset_get_crtc_power_domains(crtc,
+   to_intel_crtc_state(crtc->state));
}
 
if (dev_priv->display.modeset_commit_cdclk &&
@@ -13486,7 +13494,8 @@ static int intel_atomic_commit(struct drm_device *dev,
}
 
if (update_pipe) {
-   put_domains = modeset_get_crtc_power_domains(crtc);
+   put_domains = modeset_get_crtc_power_domains(crtc,
+ to_intel_crtc_state(crtc->state));
 
/* make sure intel_modeset_check_state runs */
hw_check = true;
@@ -15830,7 +15839,7 @@ intel_modeset_setup_hw_state(struct drm_device *dev)
for_each_intel_crtc(dev, crtc) {
unsigned long put_domains;
 
-   put_domains = modeset_get_crtc_power_domains(>base);
+   put_domains = modeset_get_crtc_power_domains(>base, 
crtc->config);
if (WARN_ON(put_domains))
modeset_put_power_domains(dev_priv, put_domains);
}
-- 
2.1.0

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[Intel-gfx] [PATCH v4 3/8] drm/i915: Kill off intel_crtc->atomic.wait_vblank, v4.

[Maarten Lankhorst]

Currently we perform our own wait in post_plane_update,
but the atomic core performs another one in wait_for_vblanks.
This means that 2 vblanks are done when a fb is changed,
which is a bit overkill.

Merge them by creating a helper function that takes a crtc mask
for the planes to wait on.

The broadwell vblank workaround may look gone entirely but this is
not the case. pipe_config->wm_changed is set to true
when any plane is turned on, which forces a vblank wait.

Changes since v1:
- Removing the double vblank wait on broadwell moved to its own commit.
Changes since v2:
- Move out POWER_DOMAIN_MODESET handling to its own commit.
Changes since v3:
- Do not wait for vblank on legacy cursor updates. (Ville)
- Move broadwell vblank workaround comment to page_flip_finished. (Ville)
Changes since v4:
- Compile fix, legacy_cursor_flip -> *_update.

Signed-off-by: Maarten Lankhorst <maarten.lankho...@linux.intel.com>
---
 drivers/gpu/drm/i915/intel_atomic.c  |  1 +
 drivers/gpu/drm/i915/intel_display.c | 86 +++-
 drivers/gpu/drm/i915/intel_drv.h |  2 +-
 3 files changed, 67 insertions(+), 22 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_atomic.c 
b/drivers/gpu/drm/i915/intel_atomic.c
index 4625f8a9ba12..8e579a8505ac 100644
--- a/drivers/gpu/drm/i915/intel_atomic.c
+++ b/drivers/gpu/drm/i915/intel_atomic.c
@@ -97,6 +97,7 @@ intel_crtc_duplicate_state(struct drm_crtc *crtc)
crtc_state->disable_lp_wm = false;
crtc_state->disable_cxsr = false;
crtc_state->wm_changed = false;
+   crtc_state->fb_changed = false;
 
return _state->base;
 }
diff --git a/drivers/gpu/drm/i915/intel_display.c 
b/drivers/gpu/drm/i915/intel_display.c
index 804f2c6f260d..4d4dddc1f970 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -4785,9 +4785,6 @@ static void intel_post_plane_update(struct intel_crtc 
*crtc)
to_intel_crtc_state(crtc->base.state);
struct drm_device *dev = crtc->base.dev;
 
-   if (atomic->wait_vblank)
-   intel_wait_for_vblank(dev, crtc->pipe);
-
intel_frontbuffer_flip(dev, atomic->fb_bits);
 
crtc->wm.cxsr_allowed = true;
@@ -10902,6 +10899,12 @@ static bool page_flip_finished(struct intel_crtc *crtc)
return true;
 
/*
+* BDW signals flip done immediately if the plane
+* is disabled, even if the plane enable is already
+* armed to occur at the next vblank :(
+*/
+
+   /*
 * A DSPSURFLIVE check isn't enough in case the mmio and CS flips
 * used the same base address. In that case the mmio flip might
 * have completed, but the CS hasn't even executed the flip yet.
@@ -11778,6 +11781,9 @@ int intel_plane_atomic_calc_changes(struct 
drm_crtc_state *crtc_state,
if (!was_visible && !visible)
return 0;
 
+   if (fb != old_plane_state->base.fb)
+   pipe_config->fb_changed = true;
+
turn_off = was_visible && (!visible || mode_changed);
turn_on = visible && (!was_visible || mode_changed);
 
@@ -11793,8 +11799,6 @@ int intel_plane_atomic_calc_changes(struct 
drm_crtc_state *crtc_state,
 
/* must disable cxsr around plane enable/disable */
if (plane->type != DRM_PLANE_TYPE_CURSOR) {
-   if (is_crtc_enabled)
-   intel_crtc->atomic.wait_vblank = true;
pipe_config->disable_cxsr = true;
}
} else if (intel_wm_need_update(plane, plane_state)) {
@@ -11810,14 +11814,6 @@ int intel_plane_atomic_calc_changes(struct 
drm_crtc_state *crtc_state,
intel_crtc->atomic.post_enable_primary = turn_on;
intel_crtc->atomic.update_fbc = true;
 
-   /*
-* BDW signals flip done immediately if the plane
-* is disabled, even if the plane enable is already
-* armed to occur at the next vblank :(
-*/
-   if (turn_on && IS_BROADWELL(dev))
-   intel_crtc->atomic.wait_vblank = true;
-
break;
case DRM_PLANE_TYPE_CURSOR:
break;
@@ -11831,12 +11827,10 @@ int intel_plane_atomic_calc_changes(struct 
drm_crtc_state *crtc_state,
if (IS_IVYBRIDGE(dev) &&
needs_scaling(to_intel_plane_state(plane_state)) &&
!needs_scaling(old_plane_state)) {
-   to_intel_crtc_state(crtc_state)->disable_lp_wm = true;
-   } else if (turn_off && !mode_changed) {
-   intel_crtc->atomic.wait_vblank = true;
+   pipe_config->disable_lp_wm = true;
+   } else if (turn_off && !mode_changed)
  

[Intel-gfx] [PATCH v4 8/8] drm/i915: Remove vblank wait from hsw_enable_ips.

[Maarten Lankhorst]

intel_post_plane_update did an extra vblank wait that's no longer needed when 
enabling ips.

Signed-off-by: Maarten Lankhorst <maarten.lankho...@linux.intel.com>
---
 drivers/gpu/drm/i915/intel_display.c | 3 ---
 1 file changed, 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_display.c 
b/drivers/gpu/drm/i915/intel_display.c
index 6bb1f5dbc7a0..19a8d376d63e 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -4569,9 +4569,6 @@ void hsw_enable_ips(struct intel_crtc *crtc)
if (!crtc->config->ips_enabled)
return;
 
-   /* We can only enable IPS after we enable a plane and wait for a vblank 
*/
-   intel_wait_for_vblank(dev, crtc->pipe);
-
assert_plane_enabled(dev_priv, crtc->plane);
if (IS_BROADWELL(dev)) {
mutex_lock(_priv->rps.hw_lock);
-- 
2.1.0

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[Intel-gfx] [PATCH v4 0/8] Kill off intel_crtc->atomic!

[Maarten Lankhorst]

This is a rebased version of the original series.
The upstream fbc changes required a rework of some of the
patches, but with atomic encoder masks this series will work
as intended.

v4 because v3 had a small issue with a compiler error in wait_vblank removal, 
and
I forgot to send it to the ml.

Maarten Lankhorst (8):
  drm/i915: Pass crtc state to modeset_get_crtc_power_domains.
  drm/i915: Unify power domain handling.
  drm/i915: Kill off intel_crtc->atomic.wait_vblank, v4.
  drm/i915: Remove update_sprite_watermarks.
  drm/i915: Remove some post-commit members from intel_crtc->atomic, v2.
  drm/i915: Nuke fbc members from intel_crtc->atomic, v2.
  drm/i915: Do not compute watermarks on a noop.
  drm/i915: Remove vblank wait from hsw_enable_ips.

 drivers/gpu/drm/i915/intel_atomic.c  |   2 +
 drivers/gpu/drm/i915/intel_display.c | 265 +++
 drivers/gpu/drm/i915/intel_drv.h |  36 ++---
 drivers/gpu/drm/i915/intel_pm.c  |  61 
 4 files changed, 196 insertions(+), 168 deletions(-)

-- 
2.1.0

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[Intel-gfx] [PATCH v4 7/8] drm/i915: Do not compute watermarks on a noop.

[Maarten Lankhorst]

No atomic state should be included after all validation when nothing has
changed. During modeset all active planes will be added to the state,
while disabled planes won't change their state.

Signed-off-by: Maarten Lankhorst <maarten.lankho...@linux.intel.com>
Cc: Matt Roper <matthew.d.ro...@intel.com>
---
 drivers/gpu/drm/i915/intel_display.c |  3 +-
 drivers/gpu/drm/i915/intel_drv.h | 13 
 drivers/gpu/drm/i915/intel_pm.c  | 61 +---
 3 files changed, 51 insertions(+), 26 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_display.c 
b/drivers/gpu/drm/i915/intel_display.c
index 00cb261c6787..6bb1f5dbc7a0 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -11910,7 +11910,8 @@ static int intel_crtc_atomic_check(struct drm_crtc 
*crtc,
}
 
ret = 0;
-   if (dev_priv->display.compute_pipe_wm) {
+   if (dev_priv->display.compute_pipe_wm &&
+   (mode_changed || pipe_config->update_pipe || 
crtc_state->planes_changed)) {
ret = dev_priv->display.compute_pipe_wm(intel_crtc, state);
if (ret)
return ret;
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index 8effb9ece21e..144597ac74e3 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -1583,6 +1583,19 @@ intel_atomic_get_crtc_state(struct drm_atomic_state 
*state,
 
return to_intel_crtc_state(crtc_state);
 }
+
+static inline struct intel_plane_state *
+intel_atomic_get_existing_plane_state(struct drm_atomic_state *state,
+ struct intel_plane *plane)
+{
+   struct drm_plane_state *plane_state;
+
+   plane_state = drm_atomic_get_existing_plane_state(state, >base);
+
+   return to_intel_plane_state(plane_state);
+}
+
+
 int intel_atomic_setup_scalers(struct drm_device *dev,
struct intel_crtc *intel_crtc,
struct intel_crtc_state *crtc_state);
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 379eabe093cb..8fb8c6891ae6 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -2010,11 +2010,18 @@ static void ilk_compute_wm_level(const struct 
drm_i915_private *dev_priv,
cur_latency *= 5;
}
 
-   result->pri_val = ilk_compute_pri_wm(cstate, pristate,
-pri_latency, level);
-   result->spr_val = ilk_compute_spr_wm(cstate, sprstate, spr_latency);
-   result->cur_val = ilk_compute_cur_wm(cstate, curstate, cur_latency);
-   result->fbc_val = ilk_compute_fbc_wm(cstate, pristate, result->pri_val);
+   if (pristate) {
+   result->pri_val = ilk_compute_pri_wm(cstate, pristate,
+pri_latency, level);
+   result->fbc_val = ilk_compute_fbc_wm(cstate, pristate, 
result->pri_val);
+   }
+
+   if (sprstate)
+   result->spr_val = ilk_compute_spr_wm(cstate, sprstate, 
spr_latency);
+
+   if (curstate)
+   result->cur_val = ilk_compute_cur_wm(cstate, curstate, 
cur_latency);
+
result->enable = true;
 }
 
@@ -2287,7 +2294,6 @@ static int ilk_compute_pipe_wm(struct intel_crtc 
*intel_crtc,
const struct drm_i915_private *dev_priv = dev->dev_private;
struct intel_crtc_state *cstate = NULL;
struct intel_plane *intel_plane;
-   struct drm_plane_state *ps;
struct intel_plane_state *pristate = NULL;
struct intel_plane_state *sprstate = NULL;
struct intel_plane_state *curstate = NULL;
@@ -2306,30 +2312,37 @@ static int ilk_compute_pipe_wm(struct intel_crtc 
*intel_crtc,
memset(pipe_wm, 0, sizeof(*pipe_wm));
 
for_each_intel_plane_on_crtc(dev, intel_crtc, intel_plane) {
-   ps = drm_atomic_get_plane_state(state,
-   _plane->base);
-   if (IS_ERR(ps))
-   return PTR_ERR(ps);
+   struct intel_plane_state *ps;
+
+   ps = intel_atomic_get_existing_plane_state(state,
+  intel_plane);
+   if (!ps)
+   continue;
 
if (intel_plane->base.type == DRM_PLANE_TYPE_PRIMARY)
-   pristate = to_intel_plane_state(ps);
-   else if (intel_plane->base.type == DRM_PLANE_TYPE_OVERLAY)
-   sprstate = to_intel_plane_state(ps);
-   else if (intel_plane->base.type == DRM_PLANE_TYPE_CURSOR)
-   curstate = to_intel_plane_state(ps);
+   pristate = ps;
+   else if (intel_plane->base.type == DRM_PLANE_TYPE_OVERLAY) {
+   sprstate = ps;
+
+   

[Intel-gfx] [PATCH v4 4/8] drm/i915: Remove update_sprite_watermarks.

[Maarten Lankhorst]

Commit 791a32be6eb2 ("drm/i915: Drop intel_update_sprite_watermarks")
removes the use of this variable, but forgot to remove it.

Reviewed-by: Matt Roper <matthew.d.ro...@intel.com>
Signed-off-by: Maarten Lankhorst <maarten.lankho...@linux.intel.com>
---
 drivers/gpu/drm/i915/intel_display.c | 6 +-
 drivers/gpu/drm/i915/intel_drv.h | 1 -
 2 files changed, 1 insertion(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_display.c 
b/drivers/gpu/drm/i915/intel_display.c
index 4d4dddc1f970..c1f94eee8028 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -11748,7 +11748,6 @@ int intel_plane_atomic_calc_changes(struct 
drm_crtc_state *crtc_state,
struct intel_plane_state *old_plane_state =
to_intel_plane_state(plane->state);
int idx = intel_crtc->base.base.id, ret;
-   int i = drm_plane_index(plane);
bool mode_changed = needs_modeset(crtc_state);
bool was_crtc_enabled = crtc->state->active;
bool is_crtc_enabled = crtc_state->active;
@@ -11826,11 +11825,8 @@ int intel_plane_atomic_calc_changes(struct 
drm_crtc_state *crtc_state,
 */
if (IS_IVYBRIDGE(dev) &&
needs_scaling(to_intel_plane_state(plane_state)) &&
-   !needs_scaling(old_plane_state)) {
+   !needs_scaling(old_plane_state))
pipe_config->disable_lp_wm = true;
-   } else if (turn_off && !mode_changed)
-   intel_crtc->atomic.update_sprite_watermarks |=
-   1 << i;
 
break;
}
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index e911c86f873b..d4e441f3aecf 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -549,7 +549,6 @@ struct intel_crtc_atomic_commit {
/* Sleepable operations to perform after commit */
unsigned fb_bits;
bool post_enable_primary;
-   unsigned update_sprite_watermarks;
 
/* Sleepable operations to perform before and after commit */
bool update_fbc;
-- 
2.1.0

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[Intel-gfx] [PATCH v4 5/8] drm/i915: Remove some post-commit members from intel_crtc->atomic, v2.

[Maarten Lankhorst]

fb_bits is useful to have in the crtc_state for cs flips when
the code is updated to use intel_frontbuffer_flip_prepare/complete.
So calculate it in advance and move it to crtc_state. The other stuff
can be calculated in post_plane_update, and aren't useful elsewhere.

Changes since v1:
- Changing wording, remove comment about loop.

Signed-off-by: Maarten Lankhorst <maarten.lankho...@linux.intel.com>
Reviewed-by: Ander Conselvan de Oliveira <conselv...@gmail.com>
---
 drivers/gpu/drm/i915/intel_atomic.c  |  1 +
 drivers/gpu/drm/i915/intel_display.c | 29 +
 drivers/gpu/drm/i915/intel_drv.h |  5 +
 3 files changed, 23 insertions(+), 12 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_atomic.c 
b/drivers/gpu/drm/i915/intel_atomic.c
index 8e579a8505ac..9a45cff26767 100644
--- a/drivers/gpu/drm/i915/intel_atomic.c
+++ b/drivers/gpu/drm/i915/intel_atomic.c
@@ -98,6 +98,7 @@ intel_crtc_duplicate_state(struct drm_crtc *crtc)
crtc_state->disable_cxsr = false;
crtc_state->wm_changed = false;
crtc_state->fb_changed = false;
+   crtc_state->fb_bits = 0;
 
return _state->base;
 }
diff --git a/drivers/gpu/drm/i915/intel_display.c 
b/drivers/gpu/drm/i915/intel_display.c
index c1f94eee8028..54be8a255f1f 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -4778,14 +4778,20 @@ intel_pre_disable_primary(struct drm_crtc *crtc)
hsw_disable_ips(intel_crtc);
 }
 
-static void intel_post_plane_update(struct intel_crtc *crtc)
+static void intel_post_plane_update(struct intel_crtc_state *old_crtc_state)
 {
+   struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->base.crtc);
+   struct drm_atomic_state *old_state = old_crtc_state->base.state;
struct intel_crtc_atomic_commit *atomic = >atomic;
struct intel_crtc_state *pipe_config =
to_intel_crtc_state(crtc->base.state);
struct drm_device *dev = crtc->base.dev;
+   struct drm_i915_private *dev_priv = dev->dev_private;
+   struct drm_plane *primary = crtc->base.primary;
+   struct drm_plane_state *old_pri_state =
+   drm_atomic_get_existing_plane_state(old_state, primary);
 
-   intel_frontbuffer_flip(dev, atomic->fb_bits);
+   intel_frontbuffer_flip(dev, pipe_config->fb_bits);
 
crtc->wm.cxsr_allowed = true;
 
@@ -4795,8 +4801,17 @@ static void intel_post_plane_update(struct intel_crtc 
*crtc)
if (atomic->update_fbc)
intel_fbc_post_update(crtc);
 
-   if (atomic->post_enable_primary)
-   intel_post_enable_primary(>base);
+   if (old_pri_state) {
+   struct intel_plane_state *primary_state =
+   to_intel_plane_state(primary->state);
+   struct intel_plane_state *old_primary_state =
+   to_intel_plane_state(old_pri_state);
+
+   if (primary_state->visible &&
+   (needs_modeset(_config->base) ||
+!old_primary_state->visible))
+   intel_post_enable_primary(>base);
+   }
 
memset(atomic, 0, sizeof(*atomic));
 }
@@ -11805,12 +11820,10 @@ int intel_plane_atomic_calc_changes(struct 
drm_crtc_state *crtc_state,
}
 
if (visible || was_visible)
-   intel_crtc->atomic.fb_bits |=
-   to_intel_plane(plane)->frontbuffer_bit;
+   pipe_config->fb_bits |= to_intel_plane(plane)->frontbuffer_bit;
 
switch (plane->type) {
case DRM_PLANE_TYPE_PRIMARY:
-   intel_crtc->atomic.post_enable_primary = turn_on;
intel_crtc->atomic.update_fbc = true;
 
break;
@@ -13534,7 +13547,7 @@ static int intel_atomic_commit(struct drm_device *dev,
intel_atomic_wait_for_vblanks(dev, dev_priv, crtc_vblank_mask);
 
for_each_crtc_in_state(state, crtc, crtc_state, i) {
-   intel_post_plane_update(to_intel_crtc(crtc));
+   intel_post_plane_update(to_intel_crtc_state(crtc_state));
 
if (put_domains[i])
modeset_put_power_domains(dev_priv, put_domains[i]);
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index d4e441f3aecf..803591d1e613 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -376,6 +376,7 @@ struct intel_crtc_state {
 #define PIPE_CONFIG_QUIRK_MODE_SYNC_FLAGS  (1<<0) /* unreliable sync 
mode.flags */
unsigned long quirks;
 
+   unsigned fb_bits; /* framebuffers to flip */
bool update_pipe; /* can a fast modeset be performed? */
bool disable_cxsr;
bool wm_changed; /* watermarks are updated */
@@ -547,10 +548,6 @@ struct intel_crtc_atomic_commit {
/* Sleepable operations to perform 

[Intel-gfx] [PATCH v4 2/8] drm/i915: Unify power domain handling.

[Maarten Lankhorst]

Right now there's separate power domain handling for update_pipe and
modesets. Unify this and only grab POWER_DOMAIN_MODESET once.

Signed-off-by: Maarten Lankhorst <maarten.lankho...@linux.intel.com>
---
 drivers/gpu/drm/i915/intel_display.c | 69 +---
 1 file changed, 24 insertions(+), 45 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_display.c 
b/drivers/gpu/drm/i915/intel_display.c
index b479ba6238d7..804f2c6f260d 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -5359,32 +5359,6 @@ static void modeset_put_power_domains(struct 
drm_i915_private *dev_priv,
intel_display_power_put(dev_priv, domain);
 }
 
-static void modeset_update_crtc_power_domains(struct drm_atomic_state *state)
-{
-   struct intel_atomic_state *intel_state = to_intel_atomic_state(state);
-   struct drm_device *dev = state->dev;
-   struct drm_i915_private *dev_priv = dev->dev_private;
-   unsigned long put_domains[I915_MAX_PIPES] = {};
-   struct drm_crtc_state *crtc_state;
-   struct drm_crtc *crtc;
-   int i;
-
-   for_each_crtc_in_state(state, crtc, crtc_state, i) {
-   if (needs_modeset(crtc->state))
-   put_domains[to_intel_crtc(crtc)->pipe] =
-   modeset_get_crtc_power_domains(crtc,
-   to_intel_crtc_state(crtc->state));
-   }
-
-   if (dev_priv->display.modeset_commit_cdclk &&
-   intel_state->dev_cdclk != dev_priv->cdclk_freq)
-   dev_priv->display.modeset_commit_cdclk(state);
-
-   for (i = 0; i < I915_MAX_PIPES; i++)
-   if (put_domains[i])
-   modeset_put_power_domains(dev_priv, put_domains[i]);
-}
-
 static int intel_compute_max_dotclk(struct drm_i915_private *dev_priv)
 {
int max_cdclk_freq = dev_priv->max_cdclk_freq;
@@ -13422,6 +13396,7 @@ static int intel_atomic_commit(struct drm_device *dev,
struct drm_crtc *crtc;
int ret = 0, i;
bool hw_check = intel_state->modeset;
+   unsigned long put_domains[I915_MAX_PIPES] = {};
 
ret = intel_atomic_prepare_commit(dev, state, async);
if (ret) {
@@ -13437,11 +13412,22 @@ static int intel_atomic_commit(struct drm_device *dev,
   sizeof(intel_state->min_pixclk));
dev_priv->active_crtcs = intel_state->active_crtcs;
dev_priv->atomic_cdclk_freq = intel_state->cdclk;
+
+   intel_display_power_get(dev_priv, POWER_DOMAIN_MODESET);
}
 
for_each_crtc_in_state(state, crtc, crtc_state, i) {
struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
 
+   if (needs_modeset(crtc->state) ||
+   to_intel_crtc_state(crtc->state)->update_pipe) {
+   hw_check = true;
+
+   put_domains[to_intel_crtc(crtc)->pipe] =
+   modeset_get_crtc_power_domains(crtc,
+   to_intel_crtc_state(crtc->state));
+   }
+
if (!needs_modeset(crtc->state))
continue;
 
@@ -13474,7 +13460,10 @@ static int intel_atomic_commit(struct drm_device *dev,
intel_shared_dpll_commit(state);
 
drm_atomic_helper_update_legacy_modeset_state(state->dev, 
state);
-   modeset_update_crtc_power_domains(state);
+
+   if (dev_priv->display.modeset_commit_cdclk &&
+   intel_state->dev_cdclk != dev_priv->cdclk_freq)
+   dev_priv->display.modeset_commit_cdclk(state);
}
 
/* Now enable the clocks, plane, pipe, and connectors that we set up. */
@@ -13483,24 +13472,12 @@ static int intel_atomic_commit(struct drm_device *dev,
bool modeset = needs_modeset(crtc->state);
bool update_pipe = !modeset &&
to_intel_crtc_state(crtc->state)->update_pipe;
-   unsigned long put_domains = 0;
-
-   if (modeset)
-   intel_display_power_get(dev_priv, POWER_DOMAIN_MODESET);
 
if (modeset && crtc->state->active) {
update_scanline_offset(to_intel_crtc(crtc));
dev_priv->display.crtc_enable(crtc);
}
 
-   if (update_pipe) {
-   put_domains = modeset_get_crtc_power_domains(crtc,
- to_intel_crtc_state(crtc->state));
-
-   /* make sure intel_modeset_check_state runs */
-   hw_check = true;
-   }
-
if (!modeset)
intel_pre_plane_update(to_intel_crtc_state(crtc_state));
 
@

Re: [Intel-gfx] [IGT PATCH 5/6] kms_force_connector_basic: Add force-load-detect test

[Maarten Lankhorst]

Op 11-02-16 om 09:59 schreef Daniel Vetter:
> On Mon, Feb 01, 2016 at 02:44:01PM +0100, Maarten Lankhorst wrote:
>> Signed-off-by: Maarten Lankhorst <maarten.lankho...@linux.intel.com>
>> ---
>> diff --git a/tests/kms_force_connector_basic.c 
>> b/tests/kms_force_connector_basic.c
>> index bd80caeffd82..f827d0008f7b 100644
>> --- a/tests/kms_force_connector_basic.c
>> +++ b/tests/kms_force_connector_basic.c
>> @@ -52,6 +52,8 @@ static void reset_connectors(void)
>>  
>>  drmModeFreeConnector(connector);
>>  }
>> +
>> +igt_set_module_param_int("load_detect_test", 0);
>>  }
>>  
>>  static int opt_handler(int opt, int opt_index, void *data)
>> @@ -108,6 +110,17 @@ int main(int argc, char **argv)
>>  igt_skip_on(vga_connector->connection == DRM_MODE_CONNECTED);
>>  }
>>  
>> +igt_subtest("force-load-detect") {
>> +igt_set_module_param_int("load_detect_test", 1);
> Ah here's the testcase. We need to unset this module parameter again at
> the end of the testcase - atm the magic exithandler stuff only works on
> binary exit, not when leaving a subtests (for things set within a
> subtest).
>
> With that done Reviewed-by: Daniel Vetter <daniel.vet...@ffwll.ch>
>
> We should probably fix that issue in the exit handler code, but that's
> another task really.
>
Yeah, but pushed the fixed version for now. Thanks!
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[Intel-gfx] [PATCH 6/6] drm/i915: Use atomic state in intel_fb_initial_config.

[Maarten Lankhorst]

This is another step in removing legacy state.

Signed-off-by: Maarten Lankhorst <maarten.lankho...@linux.intel.com>
---
 drivers/gpu/drm/i915/intel_fbdev.c | 17 +++--
 1 file changed, 11 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_fbdev.c 
b/drivers/gpu/drm/i915/intel_fbdev.c
index 09840f4380f9..97a91e631915 100644
--- a/drivers/gpu/drm/i915/intel_fbdev.c
+++ b/drivers/gpu/drm/i915/intel_fbdev.c
@@ -406,8 +406,8 @@ retry:
continue;
}
 
-   encoder = connector->encoder;
-   if (!encoder || WARN_ON(!encoder->crtc)) {
+   encoder = connector->state->best_encoder;
+   if (!encoder || WARN_ON(!connector->state->crtc)) {
if (connector->force > DRM_FORCE_OFF)
goto bail;
 
@@ -420,7 +420,7 @@ retry:
 
num_connectors_enabled++;
 
-   new_crtc = intel_fb_helper_crtc(fb_helper, encoder->crtc);
+   new_crtc = intel_fb_helper_crtc(fb_helper, 
connector->state->crtc);
 
/*
 * Make sure we're not trying to drive multiple connectors
@@ -466,17 +466,22 @@ retry:
 * usually contains. But since our current
 * code puts a mode derived from the post-pfit timings
 * into crtc->mode this works out correctly.
+*
+* This is crtc->mode and not crtc->state->mode for the
+* fastboot check to work correctly. crtc_state->mode 
has
+* I915_MODE_FLAG_INHERITED, which we clear to force 
check
+* state.
 */
DRM_DEBUG_KMS("looking for current mode on connector 
%s\n",
  connector->name);
-   modes[i] = >crtc->mode;
+   modes[i] = >state->crtc->mode;
}
crtcs[i] = new_crtc;
 
DRM_DEBUG_KMS("connector %s on pipe %c [CRTC:%d]: %dx%d%s\n",
  connector->name,
- pipe_name(to_intel_crtc(encoder->crtc)->pipe),
- encoder->crtc->base.id,
+ 
pipe_name(to_intel_crtc(connector->state->crtc)->pipe),
+ connector->state->crtc->base.id,
  modes[i]->hdisplay, modes[i]->vdisplay,
  modes[i]->flags & DRM_MODE_FLAG_INTERLACE ? "i" 
:"");
 
-- 
2.1.0

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[Intel-gfx] [IGT PATCH 5/6] kms_force_connector_basic: Add force-load-detect test

[Maarten Lankhorst]

Signed-off-by: Maarten Lankhorst <maarten.lankho...@linux.intel.com>
---
diff --git a/tests/kms_force_connector_basic.c 
b/tests/kms_force_connector_basic.c
index bd80caeffd82..f827d0008f7b 100644
--- a/tests/kms_force_connector_basic.c
+++ b/tests/kms_force_connector_basic.c
@@ -52,6 +52,8 @@ static void reset_connectors(void)
 
drmModeFreeConnector(connector);
}
+
+   igt_set_module_param_int("load_detect_test", 0);
 }
 
 static int opt_handler(int opt, int opt_index, void *data)
@@ -108,6 +110,17 @@ int main(int argc, char **argv)
igt_skip_on(vga_connector->connection == DRM_MODE_CONNECTED);
}
 
+   igt_subtest("force-load-detect") {
+   igt_set_module_param_int("load_detect_test", 1);
+
+   temp = drmModeGetConnectorCurrent(drm_fd,
+ vga_connector->connector_id);
+
+   igt_assert(temp->connection != DRM_MODE_UNKNOWNCONNECTION);
+
+   drmModeFreeConnector(temp);
+   }
+
igt_subtest("force-connector-state") {
igt_display_t display;
 
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[Intel-gfx] [PATCH 1/6] drm/i915: Use atomic state to obtain load detection crtc.

[Maarten Lankhorst]

Instead of restoring dpms and a flag for whether a temp fb is allocated 
duplicate
the old plane_state and crtc_state, and restore the members we potentially 
touched.

Signed-off-by: Maarten Lankhorst <maarten.lankho...@linux.intel.com>
---
 drivers/gpu/drm/i915/intel_display.c | 128 ---
 drivers/gpu/drm/i915/intel_drv.h |   4 +-
 2 files changed, 76 insertions(+), 56 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_display.c 
b/drivers/gpu/drm/i915/intel_display.c
index 4d8c9f7857db..0702ce8ec36a 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -10361,6 +10361,7 @@ mode_fits_in_fbdev(struct drm_device *dev,
if (obj->base.size < mode->vdisplay * fb->pitches[0])
return NULL;
 
+   drm_framebuffer_reference(fb);
return fb;
 #else
return NULL;
@@ -10426,6 +10427,9 @@ bool intel_get_load_detect_pipe(struct drm_connector 
*connector,
  encoder->base.id, encoder->name);
 
 retry:
+   old->old_pipe_config = NULL;
+   old->old_plane_state = NULL;
+
ret = drm_modeset_lock(>connection_mutex, ctx);
if (ret)
goto fail;
@@ -10441,24 +10445,15 @@ retry:
 */
 
/* See if we already have a CRTC for this connector */
-   if (encoder->crtc) {
-   crtc = encoder->crtc;
+   if (connector->state->crtc) {
+   crtc = connector->state->crtc;
 
ret = drm_modeset_lock(>mutex, ctx);
if (ret)
goto fail;
-   ret = drm_modeset_lock(>primary->mutex, ctx);
-   if (ret)
-   goto fail;
-
-   old->dpms_mode = connector->dpms;
-   old->load_detect_temp = false;
 
/* Make sure the crtc and connector are running */
-   if (connector->dpms != DRM_MODE_DPMS_ON)
-   connector->funcs->dpms(connector, DRM_MODE_DPMS_ON);
-
-   return true;
+   goto found;
}
 
/* Find an unused one (if possible) */
@@ -10466,8 +10461,15 @@ retry:
i++;
if (!(encoder->possible_crtcs & (1 << i)))
continue;
-   if (possible_crtc->state->enable)
+
+   ret = drm_modeset_lock(_crtc->mutex, ctx);
+   if (ret)
+   goto fail;
+
+   if (possible_crtc->state->enable) {
+   drm_modeset_unlock(_crtc->mutex);
continue;
+   }
 
crtc = possible_crtc;
break;
@@ -10481,17 +10483,19 @@ retry:
goto fail;
}
 
-   ret = drm_modeset_lock(>mutex, ctx);
-   if (ret)
-   goto fail;
+found:
+   intel_crtc = to_intel_crtc(crtc);
+
ret = drm_modeset_lock(>primary->mutex, ctx);
if (ret)
goto fail;
 
-   intel_crtc = to_intel_crtc(crtc);
-   old->dpms_mode = connector->dpms;
-   old->load_detect_temp = true;
-   old->release_fb = NULL;
+   old->old_pipe_config = intel_crtc_duplicate_state(crtc);
+   old->old_plane_state = intel_plane_duplicate_state(crtc->primary);
+   if (!old->old_pipe_config || !old->old_plane_state) {
+   ret = -ENOMEM;
+   goto fail;
+   }
 
state = drm_atomic_state_alloc(dev);
if (!state)
@@ -10505,7 +10509,9 @@ retry:
goto fail;
}
 
-   connector_state->crtc = crtc;
+   ret = drm_atomic_set_crtc_for_connector(connector_state, crtc);
+   if (ret)
+   goto fail;
 
crtc_state = intel_atomic_get_crtc_state(state, intel_crtc);
if (IS_ERR(crtc_state)) {
@@ -10529,7 +10535,6 @@ retry:
if (fb == NULL) {
DRM_DEBUG_KMS("creating tmp fb for load-detection\n");
fb = intel_framebuffer_create_for_mode(dev, mode, 24, 32);
-   old->release_fb = fb;
} else
DRM_DEBUG_KMS("reusing fbdev for load-detection framebuffer\n");
if (IS_ERR(fb)) {
@@ -10541,15 +10546,16 @@ retry:
if (ret)
goto fail;
 
-   drm_mode_copy(_state->base.mode, mode);
+   drm_framebuffer_unreference(fb);
+
+   ret = drm_atomic_set_mode_for_crtc(_state->base, mode);
+   if (ret)
+   goto fail;
 
if (drm_atomic_commit(state)) {
DRM_DEBUG_KMS("failed to set mode on load-detect pipe\n");
-   if (old->release_fb)
-   old->release_fb->funcs->destroy(old->release_fb);
goto fail;
}
-   crtc->primary->crtc = crtc;
 
/* let the connector

[Intel-gfx] [PATCH 0/6] Use more atomic state in i915.

[Maarten Lankhorst]

Use atomic state for load detection, stop use of obsolete connector->dpms and
use atomic in intel_fb_initial_config.

Maarten Lankhorst (6):
  drm/i915: Use atomic state to obtain load detection crtc.
  drm/i915: Use atomic state for load detect in crt.
  drm/i915: Use atomic state in tv load detection.
  drm/i915: Use correct dpms for intel_enable_crt.
  kms_force_connector_basic: Add force-load-detect test
  drm/i915: Use atomic state in intel_fb_initial_config.

 drivers/gpu/drm/i915/intel_crt.c |  10 ++-
 drivers/gpu/drm/i915/intel_display.c | 128 ---
 drivers/gpu/drm/i915/intel_drv.h |   4 +-
 drivers/gpu/drm/i915/intel_fbdev.c   |  17 +++--
 drivers/gpu/drm/i915/intel_tv.c  |  11 ++-

-- 
2.1.0

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[Intel-gfx] [PATCH 2/6] drm/i915: Use atomic state in crt load detection.

[Maarten Lankhorst]

Signed-off-by: Maarten Lankhorst <maarten.lankho...@linux.intel.com>
---
 drivers/gpu/drm/i915/intel_crt.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_crt.c b/drivers/gpu/drm/i915/intel_crt.c
index 9c89df1af036..8b37bfa6bbb3 100644
--- a/drivers/gpu/drm/i915/intel_crt.c
+++ b/drivers/gpu/drm/i915/intel_crt.c
@@ -469,11 +469,10 @@ static bool intel_crt_detect_ddc(struct drm_connector 
*connector)
 }
 
 static enum drm_connector_status
-intel_crt_load_detect(struct intel_crt *crt)
+intel_crt_load_detect(struct intel_crt *crt, uint32_t pipe)
 {
struct drm_device *dev = crt->base.base.dev;
struct drm_i915_private *dev_priv = dev->dev_private;
-   uint32_t pipe = to_intel_crtc(crt->base.base.crtc)->pipe;
uint32_t save_bclrpat;
uint32_t save_vtotal;
uint32_t vtotal, vactive;
@@ -642,7 +641,8 @@ intel_crt_detect(struct drm_connector *connector, bool 
force)
if (intel_crt_detect_ddc(connector))
status = connector_status_connected;
else if (INTEL_INFO(dev)->gen < 4)
-   status = intel_crt_load_detect(crt);
+   status = intel_crt_load_detect(crt,
+   to_intel_crtc(connector->state->crtc)->pipe);
else
status = connector_status_unknown;
intel_release_load_detect_pipe(connector, , );
-- 
2.1.0

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[Intel-gfx] [PATCH 3/6] drm/i915: Use atomic state in tv load detection.

[Maarten Lankhorst]

Signed-off-by: Maarten Lankhorst <maarten.lankho...@linux.intel.com>
---
 drivers/gpu/drm/i915/intel_tv.c | 11 ---
 1 file changed, 4 insertions(+), 7 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_tv.c b/drivers/gpu/drm/i915/intel_tv.c
index 948cbff6c62e..643f52184d2f 100644
--- a/drivers/gpu/drm/i915/intel_tv.c
+++ b/drivers/gpu/drm/i915/intel_tv.c
@@ -1178,10 +1178,9 @@ static int
 intel_tv_detect_type(struct intel_tv *intel_tv,
  struct drm_connector *connector)
 {
-   struct drm_encoder *encoder = _tv->base.base;
-   struct drm_crtc *crtc = encoder->crtc;
+   struct drm_crtc *crtc = connector->state->crtc;
struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
-   struct drm_device *dev = encoder->dev;
+   struct drm_device *dev = connector->dev;
struct drm_i915_private *dev_priv = dev->dev_private;
u32 tv_ctl, save_tv_ctl;
u32 tv_dac, save_tv_dac;
@@ -1230,8 +1229,7 @@ intel_tv_detect_type(struct intel_tv *intel_tv,
I915_WRITE(TV_DAC, tv_dac);
POSTING_READ(TV_DAC);
 
-   intel_wait_for_vblank(intel_tv->base.base.dev,
- to_intel_crtc(intel_tv->base.base.crtc)->pipe);
+   intel_wait_for_vblank(dev, intel_crtc->pipe);
 
type = -1;
tv_dac = I915_READ(TV_DAC);
@@ -1261,8 +1259,7 @@ intel_tv_detect_type(struct intel_tv *intel_tv,
POSTING_READ(TV_CTL);
 
/* For unknown reasons the hw barfs if we don't do this vblank wait. */
-   intel_wait_for_vblank(intel_tv->base.base.dev,
- to_intel_crtc(intel_tv->base.base.crtc)->pipe);
+   intel_wait_for_vblank(dev, intel_crtc->pipe);
 
/* Restore interrupt config */
if (connector->polled & DRM_CONNECTOR_POLL_HPD) {
-- 
2.1.0

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[Intel-gfx] [PATCH 4/6] drm/i915: Use correct dpms for intel_enable_crt.

[Maarten Lankhorst]

With the conversion to atomic only on/off are still supported.
The rest is mapped to one of those, and when enable is called
DPMS_ON should be true.

Signed-off-by: Maarten Lankhorst <maarten.lankho...@linux.intel.com>
---
 drivers/gpu/drm/i915/intel_crt.c | 4 +---
 1 file changed, 1 insertion(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_crt.c b/drivers/gpu/drm/i915/intel_crt.c
index 8b37bfa6bbb3..8a5a2e576d76 100644
--- a/drivers/gpu/drm/i915/intel_crt.c
+++ b/drivers/gpu/drm/i915/intel_crt.c
@@ -206,9 +206,7 @@ static void pch_post_disable_crt(struct intel_encoder 
*encoder)
 
 static void intel_enable_crt(struct intel_encoder *encoder)
 {
-   struct intel_crt *crt = intel_encoder_to_crt(encoder);
-
-   intel_crt_set_dpms(encoder, crt->connector->base.dpms);
+   intel_crt_set_dpms(encoder, DRM_MODE_DPMS_ON);
 }
 
 static enum drm_mode_status
-- 
2.1.0

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Re: [Intel-gfx] [PATCH v2 1/6] drm/i915: Use atomic state to obtain load detection crtc, v2.

[Maarten Lankhorst]

Op 02-02-16 om 18:32 schreef Ville Syrjälä:
> On Tue, Feb 02, 2016 at 01:48:17PM +0100, Maarten Lankhorst wrote:
>> drm/i915: Use atomic state to obtain load detection crtc, v2.
>>
>> Instead of restoring dpms and a flag for whether a temp fb is allocated 
>> duplicate
>> an atomic state before the new state is committed, and commit it the old 
>> state
>> in intel_release_load_detect_pipe.
>>
>> Changes since v1:
>> - Use a real atomic state.
>>
>> Signed-off-by: Maarten Lankhorst <maarten.lankho...@linux.intel.com>
>> ---
>> diff --git a/drivers/gpu/drm/i915/intel_display.c 
>> b/drivers/gpu/drm/i915/intel_display.c
>> index 4d8c9f7857db..c7ba8f4a971e 100644
>> --- a/drivers/gpu/drm/i915/intel_display.c
>> +++ b/drivers/gpu/drm/i915/intel_display.c
>> @@ -10361,6 +10361,7 @@ mode_fits_in_fbdev(struct drm_device *dev,
>>  if (obj->base.size < mode->vdisplay * fb->pitches[0])
>>  return NULL;
>>  
>> +drm_framebuffer_reference(fb);
>>  return fb;
>>  #else
>>  return NULL;
>> @@ -10416,7 +10417,7 @@ bool intel_get_load_detect_pipe(struct drm_connector 
>> *connector,
>>  struct drm_device *dev = encoder->dev;
>>  struct drm_framebuffer *fb;
>>  struct drm_mode_config *config = >mode_config;
>> -struct drm_atomic_state *state = NULL;
>> +struct drm_atomic_state *state = NULL, *restore_state = NULL;
>>  struct drm_connector_state *connector_state;
>>  struct intel_crtc_state *crtc_state;
>>  int ret, i = -1;
>> @@ -10425,6 +10426,8 @@ bool intel_get_load_detect_pipe(struct drm_connector 
>> *connector,
>>connector->base.id, connector->name,
>>encoder->base.id, encoder->name);
>>  
>> +old->restore_state = NULL;
>> +
>>  retry:
>>  ret = drm_modeset_lock(>connection_mutex, ctx);
>>  if (ret)
>> @@ -10441,24 +10444,15 @@ retry:
>>   */
>>  
>>  /* See if we already have a CRTC for this connector */
>> -if (encoder->crtc) {
>> -crtc = encoder->crtc;
>> +if (connector->state->crtc) {
>> +crtc = connector->state->crtc;
>>  
>>  ret = drm_modeset_lock(>mutex, ctx);
>>  if (ret)
>>  goto fail;
>> -ret = drm_modeset_lock(>primary->mutex, ctx);
>> -if (ret)
>> -goto fail;
>> -
>> -old->dpms_mode = connector->dpms;
>> -old->load_detect_temp = false;
>>  
>>  /* Make sure the crtc and connector are running */
>> -if (connector->dpms != DRM_MODE_DPMS_ON)
>> -connector->funcs->dpms(connector, DRM_MODE_DPMS_ON);
>> -
>> -return true;
>> +goto found;
>>  }
>>  
>>  /* Find an unused one (if possible) */
>> @@ -10466,8 +10460,15 @@ retry:
>>  i++;
>>  if (!(encoder->possible_crtcs & (1 << i)))
>>  continue;
>> -if (possible_crtc->state->enable)
>> +
>> +ret = drm_modeset_lock(_crtc->mutex, ctx);
>> +if (ret)
>> +goto fail;
>> +
>> +if (possible_crtc->state->enable) {
>> +drm_modeset_unlock(_crtc->mutex);
>>  continue;
>> +}
>>  
>>  crtc = possible_crtc;
>>  break;
>> @@ -10481,23 +10482,22 @@ retry:
>>  goto fail;
>>  }
>>  
>> -ret = drm_modeset_lock(>mutex, ctx);
>> -if (ret)
>> -goto fail;
>> +found:
>> +intel_crtc = to_intel_crtc(crtc);
>> +
>>  ret = drm_modeset_lock(>primary->mutex, ctx);
>>  if (ret)
>>  goto fail;
>>  
>> -intel_crtc = to_intel_crtc(crtc);
>> -old->dpms_mode = connector->dpms;
>> -old->load_detect_temp = true;
>> -old->release_fb = NULL;
>> -
>>  state = drm_atomic_state_alloc(dev);
>> -if (!state)
>> -return false;
>> +restore_state = drm_atomic_state_alloc(dev);
>> +if (!state || !restore_state) {
>> +ret = -ENOMEM;
>> +goto fail;
>> +}
>>  
>>  state->acquire_ctx = ctx;
>> +re

[Intel-gfx] [PATCH 3/3] drm/i915: Do not disable cxsr when crtc is disabled.

[Maarten Lankhorst]

It's safe to assume cxsr is already disabled when the crtc is off.
This prevents an unclaimed register warning when the required power
wells are not enabled.

[  262.864984] [ cut here ]
[  262.865025] WARNING: CPU: 1 PID: 6799 at 
drivers/gpu/drm/i915/intel_uncore.c:638 __unclaimed_reg_debug+0x68/0x80 [i915]()
[  262.865029] Unclaimed register detected before reading register 0x186500
[  262.865032] Modules linked in: i915 intel_powerclamp
[  262.865057] CPU: 1 PID: 6799 Comm: kms_pipe_crc_ba Tainted: G U  W   
4.4.0-gfxbench+ #1
[  262.865060] Hardware name: DN2820FYK, BIOS FYBYT10H.86A.0038.2014.0717.1455 
07/17/2014
[  262.865064]  a0338cf8 88007448ba78 813df90c 
88007448bac0
[  262.865071]  88007448bab0 810746e1 00186500 
0001
[  262.865077]  0001 88007442  
88007448bb10
[  262.865083] Call Trace:
[  262.865092]  [] dump_stack+0x4e/0x82
[  262.865098]  [] warn_slowpath_common+0x81/0xc0
[  262.865102]  [] warn_slowpath_fmt+0x47/0x50
[  262.865128]  [] __unclaimed_reg_debug+0x68/0x80 [i915]
[  262.865154]  [] vlv_read32+0x2de/0x370 [i915]
[  262.865173]  [] intel_set_memory_cxsr+0x87/0x1a0 [i915]
[  262.865200]  [] intel_pre_plane_update+0xb3/0xf0 [i915]
[  262.865228]  [] intel_atomic_commit+0x3b5/0x17c0 [i915]
[  262.865234]  [] ? drm_atomic_check_only+0x145/0x660
[  262.865239]  [] ? 
drm_atomic_set_crtc_for_connector+0x6a/0xe0
[  262.865243]  [] drm_atomic_commit+0x32/0x50
[  262.865249]  [] drm_atomic_helper_set_config+0x75/0xb0
[  262.865253]  [] drm_mode_set_config_internal+0x60/0x110
[  262.865258]  [] drm_mode_setcrtc+0x186/0x4f0
[  262.865263]  [] drm_ioctl+0x13d/0x590
[  262.865267]  [] ? drm_mode_setplane+0x1b0/0x1b0
[  262.865273]  [] do_vfs_ioctl+0x2fc/0x550
[  262.865278]  [] ? vm_munmap+0x4a/0x60
[  262.865283]  [] ? __fget_light+0x6a/0x90
[  262.865287]  [] SyS_ioctl+0x3c/0x70
[  262.865292]  [] entry_SYSCALL_64_fastpath+0x16/0x73
[  262.865296] ---[ end trace 6387a0ad001bb39f ]---

Testcase: kms_flip.basic-flip-vs-wf_vblank
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=93698

Signed-off-by: Maarten Lankhorst <maarten.lankho...@linux.intel.com>
---
 drivers/gpu/drm/i915/intel_display.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/intel_display.c 
b/drivers/gpu/drm/i915/intel_display.c
index c7f2a18ab34e..4fcbdd6037a4 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -4837,7 +4837,9 @@ static void intel_pre_plane_update(struct 
intel_crtc_state *old_crtc_state)
 
if (pipe_config->disable_cxsr) {
crtc->wm.cxsr_allowed = false;
-   intel_set_memory_cxsr(dev_priv, false);
+
+   if (old_crtc_state->base.active)
+   intel_set_memory_cxsr(dev_priv, false);
}
 
if (!needs_modeset(_config->base) && pipe_config->wm_changed)
-- 
2.1.0

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[Intel-gfx] [PATCH 0/3] Fix cxsr warning spew.

[Maarten Lankhorst]

First 2 patches from the remove intel_crtc->atomic series. They were already
reviewed when part of a different series which I had slightly adjusted.
I put them in the series because I need to pass old_crtc_state
to pre_plane_update, and those patches were reviewed anyway.

Maarten Lankhorst (3):
  drm/i915: Remove intel_crtc->atomic.disable_ips.
  drm/i915: Remove atomic.pre_disable_primary.
  drm/i915: Do not disable cxsr when crtc is disabled.

 drivers/gpu/drm/i915/intel_display.c | 42 ++--
 drivers/gpu/drm/i915/intel_drv.h |  2 --
 2 files changed, 21 insertions(+), 23 deletions(-)

-- 
2.1.0

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[Intel-gfx] [PATCH 1/3] drm/i915: Remove intel_crtc->atomic.disable_ips.

[Maarten Lankhorst]

This is a revert of commit 066cf55b9ce3 "drm/i915: Fix IPS related flicker".
intel_pre_disable_primary already handles this, and now everything
goes through the atomic path there's no need to try to disable ips twice.

Signed-off-by: Maarten Lankhorst <maarten.lankho...@linux.intel.com>
Reviewed-by: Ander Conselvan de Oliveira <conselv...@gmail.com>
---
 drivers/gpu/drm/i915/intel_display.c | 15 ---
 drivers/gpu/drm/i915/intel_drv.h |  1 -
 2 files changed, 16 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_display.c 
b/drivers/gpu/drm/i915/intel_display.c
index 4d8c9f7857db..de94ef165fbe 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -4818,9 +4818,6 @@ static void intel_pre_plane_update(struct intel_crtc 
*crtc)
if (atomic->update_fbc)
intel_fbc_pre_update(crtc);
 
-   if (crtc->atomic.disable_ips)
-   hsw_disable_ips(crtc);
-
if (atomic->pre_disable_primary)
intel_pre_disable_primary(>base);
 
@@ -11890,18 +11887,6 @@ int intel_plane_atomic_calc_changes(struct 
drm_crtc_state *crtc_state,
intel_crtc->atomic.post_enable_primary = turn_on;
intel_crtc->atomic.update_fbc = true;
 
-   if (turn_off) {
-   /*
-* FIXME: Actually if we will still have any other
-* plane enabled on the pipe we could let IPS enabled
-* still, but for now lets consider that when we make
-* primary invisible by setting DSPCNTR to 0 on
-* update_primary_plane function IPS needs to be
-* disable.
-*/
-   intel_crtc->atomic.disable_ips = true;
-   }
-
/*
 * BDW signals flip done immediately if the plane
 * is disabled, even if the plane enable is already
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index 93ba14a3bb76..c9ae2be260d0 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -544,7 +544,6 @@ struct intel_mmio_flip {
  */
 struct intel_crtc_atomic_commit {
/* Sleepable operations to perform before commit */
-   bool disable_ips;
bool pre_disable_primary;
 
/* Sleepable operations to perform after commit */
-- 
2.1.0

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[Intel-gfx] [PATCH 2/3] drm/i915: Remove atomic.pre_disable_primary.

[Maarten Lankhorst]

This can be derived from the atomic state in pre_plane_update,
which makes it more clear when it's supposed to be called.

Reviewed-by: Ander Conselvan de Oliveira <conselv...@gmail.com>
Signed-off-by: Maarten Lankhorst <maarten.lankho...@linux.intel.com>
---
 drivers/gpu/drm/i915/intel_display.c | 25 +++--
 drivers/gpu/drm/i915/intel_drv.h |  1 -
 2 files changed, 19 insertions(+), 7 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_display.c 
b/drivers/gpu/drm/i915/intel_display.c
index de94ef165fbe..c7f2a18ab34e 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -4807,19 +4807,33 @@ static void intel_post_plane_update(struct intel_crtc 
*crtc)
memset(atomic, 0, sizeof(*atomic));
 }
 
-static void intel_pre_plane_update(struct intel_crtc *crtc)
+static void intel_pre_plane_update(struct intel_crtc_state *old_crtc_state)
 {
+   struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->base.crtc);
struct drm_device *dev = crtc->base.dev;
struct drm_i915_private *dev_priv = dev->dev_private;
struct intel_crtc_atomic_commit *atomic = >atomic;
struct intel_crtc_state *pipe_config =
to_intel_crtc_state(crtc->base.state);
+   struct drm_atomic_state *old_state = old_crtc_state->base.state;
+   struct drm_plane *primary = crtc->base.primary;
+   struct drm_plane_state *old_pri_state =
+   drm_atomic_get_existing_plane_state(old_state, primary);
+   bool modeset = needs_modeset(_config->base);
 
if (atomic->update_fbc)
intel_fbc_pre_update(crtc);
 
-   if (atomic->pre_disable_primary)
-   intel_pre_disable_primary(>base);
+   if (old_pri_state) {
+   struct intel_plane_state *primary_state =
+   to_intel_plane_state(primary->state);
+   struct intel_plane_state *old_primary_state =
+   to_intel_plane_state(old_pri_state);
+
+   if (old_primary_state->visible &&
+   (modeset || !primary_state->visible))
+   intel_pre_disable_primary(>base);
+   }
 
if (pipe_config->disable_cxsr) {
crtc->wm.cxsr_allowed = false;
@@ -11883,7 +11897,6 @@ int intel_plane_atomic_calc_changes(struct 
drm_crtc_state *crtc_state,
 
switch (plane->type) {
case DRM_PLANE_TYPE_PRIMARY:
-   intel_crtc->atomic.pre_disable_primary = turn_off;
intel_crtc->atomic.post_enable_primary = turn_on;
intel_crtc->atomic.update_fbc = true;
 
@@ -13495,7 +13508,7 @@ static int intel_atomic_commit(struct drm_device *dev,
if (!needs_modeset(crtc->state))
continue;
 
-   intel_pre_plane_update(intel_crtc);
+   intel_pre_plane_update(to_intel_crtc_state(crtc_state));
 
if (crtc_state->active) {
intel_crtc_disable_planes(crtc, crtc_state->plane_mask);
@@ -13551,7 +13564,7 @@ static int intel_atomic_commit(struct drm_device *dev,
}
 
if (!modeset)
-   intel_pre_plane_update(intel_crtc);
+   intel_pre_plane_update(to_intel_crtc_state(crtc_state));
 
if (crtc->state->active && intel_crtc->atomic.update_fbc)
intel_fbc_enable(intel_crtc);
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index c9ae2be260d0..167f284ccb16 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -544,7 +544,6 @@ struct intel_mmio_flip {
  */
 struct intel_crtc_atomic_commit {
/* Sleepable operations to perform before commit */
-   bool pre_disable_primary;
 
/* Sleepable operations to perform after commit */
unsigned fb_bits;
-- 
2.1.0

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Re: [Intel-gfx] [PATCH 1/6] drm/i915: Use atomic state to obtain load detection crtc.

[Maarten Lankhorst]

Op 01-02-16 om 17:08 schreef Ville Syrjälä:
> On Mon, Feb 01, 2016 at 02:43:57PM +0100, Maarten Lankhorst wrote:
>> Instead of restoring dpms and a flag for whether a temp fb is allocated 
>> duplicate
>> the old plane_state and crtc_state, and restore the members we potentially 
>> touched.
>>
>> Signed-off-by: Maarten Lankhorst <maarten.lankho...@linux.intel.com>
>> ---
>>  drivers/gpu/drm/i915/intel_display.c | 128 
>> ---
>>  drivers/gpu/drm/i915/intel_drv.h |   4 +-
>>  2 files changed, 76 insertions(+), 56 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/i915/intel_display.c 
>> b/drivers/gpu/drm/i915/intel_display.c
>> index 4d8c9f7857db..0702ce8ec36a 100644
>> --- a/drivers/gpu/drm/i915/intel_display.c
>> +++ b/drivers/gpu/drm/i915/intel_display.c
>> @@ -10361,6 +10361,7 @@ mode_fits_in_fbdev(struct drm_device *dev,
>>  if (obj->base.size < mode->vdisplay * fb->pitches[0])
>>  return NULL;
>>  
>> +drm_framebuffer_reference(fb);
>>  return fb;
>>  #else
>>  return NULL;
>> @@ -10426,6 +10427,9 @@ bool intel_get_load_detect_pipe(struct drm_connector 
>> *connector,
>>encoder->base.id, encoder->name);
>>  
>>  retry:
>> +old->old_pipe_config = NULL;
>> +old->old_plane_state = NULL;
>> +
>>  ret = drm_modeset_lock(>connection_mutex, ctx);
>>  if (ret)
>>  goto fail;
>> @@ -10441,24 +10445,15 @@ retry:
>>   */
>>  
>>  /* See if we already have a CRTC for this connector */
>> -if (encoder->crtc) {
>> -crtc = encoder->crtc;
>> +if (connector->state->crtc) {
>> +crtc = connector->state->crtc;
>>  
>>  ret = drm_modeset_lock(>mutex, ctx);
>>  if (ret)
>>  goto fail;
>> -ret = drm_modeset_lock(>primary->mutex, ctx);
>> -if (ret)
>> -goto fail;
>> -
>> -old->dpms_mode = connector->dpms;
>> -old->load_detect_temp = false;
>>  
>>  /* Make sure the crtc and connector are running */
>> -if (connector->dpms != DRM_MODE_DPMS_ON)
>> -connector->funcs->dpms(connector, DRM_MODE_DPMS_ON);
>> -
>> -return true;
>> +goto found;
>>  }
>>  
>>  /* Find an unused one (if possible) */
>> @@ -10466,8 +10461,15 @@ retry:
>>  i++;
>>  if (!(encoder->possible_crtcs & (1 << i)))
>>  continue;
>> -if (possible_crtc->state->enable)
>> +
>> +ret = drm_modeset_lock(_crtc->mutex, ctx);
>> +if (ret)
>> +goto fail;
>> +
>> +if (possible_crtc->state->enable) {
>> +drm_modeset_unlock(_crtc->mutex);
>>  continue;
>> +}
>>  
>>  crtc = possible_crtc;
>>  break;
>> @@ -10481,17 +10483,19 @@ retry:
>>  goto fail;
>>  }
>>  
>> -ret = drm_modeset_lock(>mutex, ctx);
>> -if (ret)
>> -goto fail;
>> +found:
>> +intel_crtc = to_intel_crtc(crtc);
>> +
>>  ret = drm_modeset_lock(>primary->mutex, ctx);
>>  if (ret)
>>  goto fail;
>>  
>> -intel_crtc = to_intel_crtc(crtc);
>> -old->dpms_mode = connector->dpms;
>> -old->load_detect_temp = true;
>> -old->release_fb = NULL;
>> +old->old_pipe_config = intel_crtc_duplicate_state(crtc);
>> +old->old_plane_state = intel_plane_duplicate_state(crtc->primary);
>> +if (!old->old_pipe_config || !old->old_plane_state) {
>> +ret = -ENOMEM;
>> +goto fail;
>> +}
>>  
>>  state = drm_atomic_state_alloc(dev);
>>  if (!state)
>> @@ -10505,7 +10509,9 @@ retry:
>>  goto fail;
>>  }
>>  
>> -connector_state->crtc = crtc;
>> +ret = drm_atomic_set_crtc_for_connector(connector_state, crtc);
>> +if (ret)
>> +goto fail;
>>  
>>  crtc_state = intel_atomic_get_crtc_state(state, intel_crtc);
>>  if (IS_ERR(crtc_state)) {
>> @@ -10529,7 +10535,6 @@ retry:
>>  if (fb == NULL

Re: [Intel-gfx] [PATCH 1/3] drm/i915: don't deactivate FBC at skylake_disable_primary_plane

[Maarten Lankhorst]

Hey,

Op 29-01-16 om 21:57 schreef Paulo Zanoni:
> FBC is already deactivated at this point.
>
> Besides, nothing should be calling these lower-level function
> pointers. A few months ago, the only caller of
> dev_priv->fbc.deactivate was intel_pipe_set_base_atomic(), which was
> the kgdboc function. But the following commit added it to the SKL
> function:
>
> commit a8d201af68506b375b701d0d8dbe8487034256f2
> Author: Maarten Lankhorst <maarten.lankho...@linux.intel.com>
> Date:   Thu Jan 7 11:54:11 2016 +0100
> drm/i915: Use plane state for primary plane updates.
>
> Cc: Maarten Lankhorst <maarten.lankho...@linux.intel.com>
> Signed-off-by: Paulo Zanoni <paulo.r.zan...@intel.com>
>
Whole series looks good to me.

Reviewed-by: Maarten Lankhorst <maarten.lankho...@linux.intel.com>

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Re: [Intel-gfx] [PATCH] lib/igt_kms: Add COMIT_ATOMIC to igt_display_commit2()

[Maarten Lankhorst]

Op 01-02-16 om 06:50 schreef Mayuresh Gharpure:
> Co-Author : Marius Vlad 
>
> So far we have had only two commit styles, COMMIT_LEGACY
> and COMMIT_UNIVERSAL. This patch adds another commit style
> COMMIT_ATOMIC which makes use of drmModeAtomicCommit()
>
> Signed-off-by: Mayuresh Gharpure 
> ---
>  lib/igt_kms.c | 318 
> +-
>  lib/igt_kms.h |  71 -
>  2 files changed, 387 insertions(+), 2 deletions(-)
>
> diff --git a/lib/igt_kms.c b/lib/igt_kms.c
> index 90c8da7..6c07223 100644
> --- a/lib/igt_kms.c
> +++ b/lib/igt_kms.c
> @@ -145,6 +145,120 @@ const unsigned char* igt_kms_get_base_edid(void)
>   *
>   * Returns: an alternate edid block
>   */
> +static const char *igt_plane_prop_names[IGT_NUM_PLANE_PROPS] = {
> + "SRC_X",
> + "SRC_Y",
> + "SRC_W",
> + "SRC_H",
> + "CRTC_X",
> + "CRTC_Y",
> + "CRTC_W",
> + "CRTC_H",
> + "FB_ID",
> + "CRTC_ID",
> + "type",
> + "rotation"
> +};
> +
> +static const char *igt_crtc_prop_names[IGT_NUM_CRTC_PROPS] = {
> + "background_color"
> +};
> +
> +static const char *igt_connector_prop_names[IGT_NUM_CONNECTOR_PROPS] = {
> + "scaling mode",
> + "DPMS"
> +};
> +
> +/*
> + * Retrieve all the properies specified in props_name and store them into
> + * plane->atomic_props_plane.
> + */
> +static void
> +igt_atomic_fill_plane_props(igt_display_t *display, igt_plane_t *plane,
> + int num_props, const char **prop_names)
> +{
> + drmModeObjectPropertiesPtr props;
> + int i, j, fd;
> +
> + fd = display->drm_fd;
> +
> + props = drmModeObjectGetProperties(fd, plane->drm_plane->plane_id, 
> DRM_MODE_OBJECT_PLANE);
> + igt_assert(props);
> +
> + for (i = 0; i < props->count_props; i++) {
> + drmModePropertyPtr prop =
> + drmModeGetProperty(fd, props->props[i]);
> +
> + for (j = 0; j < num_props; j++) {
> + if (strcmp(prop->name, prop_names[j]) != 0)
> + continue;
> +
> + plane->atomic_props_plane[j] = props->props[i];
> + break;
> + }
> +
> + drmModeFreeProperty(prop);
> + }
> +
> + drmModeFreeObjectProperties(props);
> +}
> +
> +/*
> + * Retrieve all the properies specified in props_name and store them into
> + * config->atomic_props_crtc and config->atomic_props_connector.
> + */
> +static void
> +igt_atomic_fill_props(igt_display_t *display, igt_output_t *output,
> + int num_crtc_props, const char **crtc_prop_names,
> + int num_connector_props, const char **conn_prop_names)
> +{
> + drmModeObjectPropertiesPtr props;
> + int i, j, fd;
> +
> + fd = display->drm_fd;
> +
> + props = drmModeObjectGetProperties(fd, output->config.crtc->crtc_id, 
> DRM_MODE_OBJECT_CRTC);
> + igt_assert(props);
> +
> + for (i = 0; i < props->count_props; i++) {
> + drmModePropertyPtr prop =
> + drmModeGetProperty(fd, props->props[i]);
> +
> + for (j = 0; j < num_crtc_props; j++) {
> + if (strcmp(prop->name, crtc_prop_names[j]) != 0)
> + continue;
> +
> + output->config.atomic_props_crtc[j] = props->props[i];
> + break;
> + }
> +
> + drmModeFreeProperty(prop);
> + }
> +
> + drmModeFreeObjectProperties(props);
> + props = NULL;
> + props = drmModeObjectGetProperties(fd, 
> output->config.connector->connector_id, DRM_MODE_OBJECT_CONNECTOR);
> + igt_assert(props);
> +
> + for (i = 0; i < props->count_props; i++) {
> + drmModePropertyPtr prop =
> + drmModeGetProperty(fd, props->props[i]);
> +
> + for (j = 0; j < num_connector_props; j++) {
> + if (strcmp(prop->name, conn_prop_names[j]) != 0)
> + continue;
> +
> + output->config.atomic_props_connector[j] = 
> props->props[i];
> + break;
> + }
> +
> + drmModeFreeProperty(prop);
> + }
> +
> + drmModeFreeObjectProperties(props);
> +
> +}
> +
>  const unsigned char* igt_kms_get_alt_edid(void)
>  {
>   update_edid_csum(alt_edid);
> @@ -952,6 +1066,8 @@ static void igt_output_refresh(igt_output_t *output)
>   kmstest_pipe_name(output->config.pipe));
>  
>   display->pipes_in_use |= 1 << output->config.pipe;
> + igt_atomic_fill_props(display, output, IGT_NUM_CRTC_PROPS, 
> igt_crtc_prop_names,
> + IGT_NUM_CONNECTOR_PROPS, igt_connector_prop_names);
>  }
>  
>  static bool
> @@ -1020,6 +1136,7 @@ void igt_display_init(igt_display_t *display, int 
> drm_fd)
>  {
>   drmModeRes *resources;
>   drmModePlaneRes *plane_resources;
> + 

Re: [Intel-gfx] [PATCH 2/3] drm/i915: Remove atomic.pre_disable_primary.

[Maarten Lankhorst]

Op 03-02-16 om 17:07 schreef Ville Syrjälä:
> On Wed, Feb 03, 2016 at 04:53:24PM +0100, Maarten Lankhorst wrote:
>> This can be derived from the atomic state in pre_plane_update,
>> which makes it more clear when it's supposed to be called.
>>
>> Reviewed-by: Ander Conselvan de Oliveira <conselv...@gmail.com>
>> Signed-off-by: Maarten Lankhorst <maarten.lankho...@linux.intel.com>
>> ---
>>  drivers/gpu/drm/i915/intel_display.c | 25 +++--
>>  drivers/gpu/drm/i915/intel_drv.h |  1 -
>>  2 files changed, 19 insertions(+), 7 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/i915/intel_display.c 
>> b/drivers/gpu/drm/i915/intel_display.c
>> index de94ef165fbe..c7f2a18ab34e 100644
>> --- a/drivers/gpu/drm/i915/intel_display.c
>> +++ b/drivers/gpu/drm/i915/intel_display.c
>> @@ -4807,19 +4807,33 @@ static void intel_post_plane_update(struct 
>> intel_crtc *crtc)
>>  memset(atomic, 0, sizeof(*atomic));
>>  }
>>  
>> -static void intel_pre_plane_update(struct intel_crtc *crtc)
>> +static void intel_pre_plane_update(struct intel_crtc_state *old_crtc_state)
>>  {
>> +struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->base.crtc);
>>  struct drm_device *dev = crtc->base.dev;
>>  struct drm_i915_private *dev_priv = dev->dev_private;
>>  struct intel_crtc_atomic_commit *atomic = >atomic;
>>  struct intel_crtc_state *pipe_config =
>>  to_intel_crtc_state(crtc->base.state);
>> +struct drm_atomic_state *old_state = old_crtc_state->base.state;
>> +struct drm_plane *primary = crtc->base.primary;
>> +struct drm_plane_state *old_pri_state =
>> +drm_atomic_get_existing_plane_state(old_state, primary);
>> +bool modeset = needs_modeset(_config->base);
>>  
>>  if (atomic->update_fbc)
>>  intel_fbc_pre_update(crtc);
>>  
>> -if (atomic->pre_disable_primary)
>> -intel_pre_disable_primary(>base);
>> +if (old_pri_state) {
> When might we not have and old state for the primary plane?
>
When updating some state unrelated to the primary plane, for example changing 
cursor.

modeset and update_pipe should always add all planes.

~Maarten
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[Intel-gfx] [PATCH v3 5/5] drm/atomic: Add encoder_mask to crtc_state, v3.

[Maarten Lankhorst]

This allows iteration over encoders without requiring connection_mutex.

Changes since v1:
- Add a set_best_encoder helper function and update encoder_mask inside
  it.
Changes since v2:
- Relax the WARN_ON(!crtc), with explanation.
- Call set_best_encoder when connector is moved between crtc's.
- Add some paranoia to steal_encoder to prevent accidentally setting
  best_encoder to NULL.

Signed-off-by: Maarten Lankhorst <maarten.lankho...@linux.intel.com>
---
diff --git a/drivers/gpu/drm/drm_atomic_helper.c 
b/drivers/gpu/drm/drm_atomic_helper.c
index 9c84b3b37631..391b3783e341 100644
--- a/drivers/gpu/drm/drm_atomic_helper.c
+++ b/drivers/gpu/drm/drm_atomic_helper.c
@@ -125,6 +125,47 @@ get_current_crtc_for_encoder(struct drm_device *dev,
return NULL;
 }
 
+static void
+set_best_encoder(struct drm_atomic_state *state,
+struct drm_connector_state *conn_state,
+struct drm_encoder *encoder)
+{
+   struct drm_crtc_state *crtc_state;
+   struct drm_crtc *crtc;
+
+   if (conn_state->best_encoder) {
+   /* Unset the encoder_mask in the old crtc state. */
+   crtc = conn_state->connector->state->crtc;
+
+   /* A NULL crtc is an error here because we should have
+*  duplicated a NULL best_encoder when crtc was NULL.
+* As an exception restoring duplicated atomic state
+* during resume is allowed, so don't warn when
+* best_encoder is equal to encoder we intend to set.
+*/
+   WARN_ON(!crtc && encoder != conn_state->best_encoder);
+   if (crtc) {
+   crtc_state = drm_atomic_get_existing_crtc_state(state, 
crtc);
+
+   crtc_state->encoder_mask &=
+   ~(1 << 
drm_encoder_index(conn_state->best_encoder));
+   }
+   }
+
+   if (encoder) {
+   crtc = conn_state->crtc;
+   WARN_ON(!crtc);
+   if (crtc) {
+   crtc_state = drm_atomic_get_existing_crtc_state(state, 
crtc);
+
+   crtc_state->encoder_mask |=
+   1 << drm_encoder_index(encoder);
+   }
+   }
+
+   conn_state->best_encoder = encoder;
+}
+
 static int
 steal_encoder(struct drm_atomic_state *state,
  struct drm_encoder *encoder,
@@ -164,7 +205,10 @@ steal_encoder(struct drm_atomic_state *state,
if (IS_ERR(connector_state))
return PTR_ERR(connector_state);
 
-   connector_state->best_encoder = NULL;
+   if (connector_state->best_encoder != encoder)
+   continue;
+
+   set_best_encoder(state, connector_state, NULL);
}
 
return 0;
@@ -212,7 +256,7 @@ update_connector_routing(struct drm_atomic_state *state, 
int conn_idx)
connector->base.id,
connector->name);
 
-   connector_state->best_encoder = NULL;
+   set_best_encoder(state, connector_state, NULL);
 
return 0;
}
@@ -241,6 +285,8 @@ update_connector_routing(struct drm_atomic_state *state, 
int conn_idx)
}
 
if (new_encoder == connector_state->best_encoder) {
+   set_best_encoder(state, connector_state, new_encoder);
+
DRM_DEBUG_ATOMIC("[CONNECTOR:%d:%s] keeps [ENCODER:%d:%s], now 
on [CRTC:%d:%s]\n",
 connector->base.id,
 connector->name,
@@ -275,7 +321,8 @@ update_connector_routing(struct drm_atomic_state *state, 
int conn_idx)
if (WARN_ON(!connector_state->crtc))
return -EINVAL;
 
-   connector_state->best_encoder = new_encoder;
+   set_best_encoder(state, connector_state, new_encoder);
+
idx = drm_crtc_index(connector_state->crtc);
 
crtc_state = state->crtc_states[idx];
diff --git a/drivers/gpu/drm/i915/intel_display.c 
b/drivers/gpu/drm/i915/intel_display.c
index d77968092ce4..2d9cc848f294 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -15604,6 +15604,7 @@ static void intel_sanitize_crtc(struct intel_crtc *crtc)
crtc->base.state->active = crtc->active;
crtc->base.enabled = crtc->active;
crtc->base.state->connector_mask = 0;
+   crtc->base.state->encoder_mask = 0;
 
/* Because we only establish the connector -> encoder ->
 * crtc links if something is active, this means the
@@ -15843,6 +15844,8 @@ static void intel_modeset_readout_hw_state(struct 
drm_device *dev)
 */
encoder->base.cr

Re: [Intel-gfx] [PATCH 5/5] drm/atomic: Add encoder_mask to crtc_state, v2.

[Maarten Lankhorst]

A diff to make this v3. Found when running this through IGT bat.

- Keeping an encoder but moving it to a different crtc resulted, in 
encoder_mask not being updated.
- Add some paranoia when best_encoder was already updated to a different 
encoder in steal_encoder.
This could happen in theory.
- Relax the WARN_ON(!crtc) when resuming after resume and add an explanation 
what the WARN_ON is for.
---
diff --git a/drivers/gpu/drm/drm_atomic_helper.c 
b/drivers/gpu/drm/drm_atomic_helper.c
index 1ac35072e14f..e5534dc9c4b4 100644
--- a/drivers/gpu/drm/drm_atomic_helper.c
+++ b/drivers/gpu/drm/drm_atomic_helper.c
@@ -137,7 +137,13 @@ set_best_encoder(struct drm_atomic_state *state,
/* Unset the encoder_mask in the old crtc state. */
crtc = conn_state->connector->state->crtc;
 
-   WARN_ON(!crtc);
+   /* A NULL crtc is an error here because we should have
+*  duplicated a NULL best_encoder when crtc was NULL.
+* As an exception restoring duplicated atomic state
+* during resume is allowed, so don't warn when
+* best_encoder is equal to encoder we intend to set.
+*/
+   WARN_ON(!crtc && encoder != conn_state->best_encoder);
if (crtc) {
crtc_state = drm_atomic_get_existing_crtc_state(state, 
crtc);
 
@@ -199,6 +205,9 @@ steal_encoder(struct drm_atomic_state *state,
if (IS_ERR(connector_state))
return PTR_ERR(connector_state);
 
+   if (connector_state->best_encoder != encoder)
+   continue;
+
set_best_encoder(state, connector_state, NULL);
}
 
@@ -276,6 +285,8 @@ update_connector_routing(struct drm_atomic_state *state, 
int conn_idx)
}
 
if (new_encoder == connector_state->best_encoder) {
+   set_best_encoder(state, connector_state, new_encoder);
+
DRM_DEBUG_ATOMIC("[CONNECTOR:%d:%s] keeps [ENCODER:%d:%s], now 
on [CRTC:%d:%s]\n",
 connector->base.id,
 connector->name,

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Re: [Intel-gfx] [PATCH v6 3/7] drm/i915: Add per context timelines to fence object

[Maarten Lankhorst]

Op 22-02-16 om 15:33 schreef John Harrison:
> On 18/02/2016 14:49, Chris Wilson wrote:
>> On Thu, Feb 18, 2016 at 02:24:06PM +, john.c.harri...@intel.com wrote:
>>> From: John Harrison 
>>>
>>> The fence object used inside the request structure requires a sequence
>>> number. Although this is not used by the i915 driver itself, it could
>>> potentially be used by non-i915 code if the fence is passed outside of
>>> the driver. This is the intention as it allows external kernel drivers
>>> and user applications to wait on batch buffer completion
>>> asynchronously via the dma-buff fence API.
>>>
>>> To ensure that such external users are not confused by strange things
>>> happening with the seqno, this patch adds in a per context timeline
>>> that can provide a guaranteed in-order seqno value for the fence. This
>>> is safe because the scheduler will not re-order batch buffers within a
>>> context - they are considered to be mutually dependent.
>> This is still nonsense. Just implement per-context seqno.
> If you already have a set of patches to implement per-context seqno then 
> let's get them merged. Otherwise, that is follow up work to be done once the 
> scheduler has landed. There has already been too much churn and delay. So the 
> decision is to get the scheduler in as soon as possible and any 'could do 
> better' issues should be logged for follow up work.
Seems to me that per context seqno would be cleaner than this hack..

~Maarten
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[Intel-gfx] [PATCH v6 3/8] drm/i915: Kill off intel_crtc->atomic.wait_vblank, v6.

[Maarten Lankhorst]

Currently we perform our own wait in post_plane_update,
but the atomic core performs another one in wait_for_vblanks.
This means that 2 vblanks are done when a fb is changed,
which is a bit overkill.

Merge them by creating a helper function that takes a crtc mask
for the planes to wait on.

The broadwell vblank workaround may look gone entirely but this is
not the case. pipe_config->wm_changed is set to true
when any plane is turned on, which forces a vblank wait.

Changes since v1:
- Removing the double vblank wait on broadwell moved to its own commit.
Changes since v2:
- Move out POWER_DOMAIN_MODESET handling to its own commit.
Changes since v3:
- Do not wait for vblank on legacy cursor updates. (Ville)
- Move broadwell vblank workaround comment to page_flip_finished. (Ville)
Changes since v4:
- Compile fix, legacy_cursor_flip -> *_update.
Changes since v5:
- Kill brackets.
- Add WARN_ON when wait_for_vblanks fails.
- Remove extra newlines.
- Split the checks whether vblank is needed to a separate function,
  with comments why a vblank is needed.
Signed-off-by: Maarten Lankhorst <maarten.lankho...@linux.intel.com>
---
v5 was skipped, previous version was v5 because it had the compile fix.

diff --git a/drivers/gpu/drm/i915/intel_atomic.c 
b/drivers/gpu/drm/i915/intel_atomic.c
index 4625f8a9ba12..8e579a8505ac 100644
--- a/drivers/gpu/drm/i915/intel_atomic.c
+++ b/drivers/gpu/drm/i915/intel_atomic.c
@@ -97,6 +97,7 @@ intel_crtc_duplicate_state(struct drm_crtc *crtc)
crtc_state->disable_lp_wm = false;
crtc_state->disable_cxsr = false;
crtc_state->wm_changed = false;
+   crtc_state->fb_changed = false;
 
return _state->base;
 }
diff --git a/drivers/gpu/drm/i915/intel_display.c 
b/drivers/gpu/drm/i915/intel_display.c
index 2107e324cd9e..9f32cb0bf978 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -4792,9 +4792,6 @@ static void intel_post_plane_update(struct intel_crtc 
*crtc)
to_intel_crtc_state(crtc->base.state);
struct drm_device *dev = crtc->base.dev;
 
-   if (atomic->wait_vblank)
-   intel_wait_for_vblank(dev, crtc->pipe);
-
intel_frontbuffer_flip(dev, atomic->fb_bits);
 
crtc->wm.cxsr_allowed = true;
@@ -10957,6 +10954,12 @@ static bool page_flip_finished(struct intel_crtc *crtc)
return true;
 
/*
+* BDW signals flip done immediately if the plane
+* is disabled, even if the plane enable is already
+* armed to occur at the next vblank :(
+*/
+
+   /*
 * A DSPSURFLIVE check isn't enough in case the mmio and CS flips
 * used the same base address. In that case the mmio flip might
 * have completed, but the CS hasn't even executed the flip yet.
@@ -11833,6 +11836,9 @@ int intel_plane_atomic_calc_changes(struct 
drm_crtc_state *crtc_state,
if (!was_visible && !visible)
return 0;
 
+   if (fb != old_plane_state->base.fb)
+   pipe_config->fb_changed = true;
+
turn_off = was_visible && (!visible || mode_changed);
turn_on = visible && (!was_visible || mode_changed);
 
@@ -11847,11 +11853,8 @@ int intel_plane_atomic_calc_changes(struct 
drm_crtc_state *crtc_state,
pipe_config->wm_changed = true;
 
/* must disable cxsr around plane enable/disable */
-   if (plane->type != DRM_PLANE_TYPE_CURSOR) {
-   if (is_crtc_enabled)
-   intel_crtc->atomic.wait_vblank = true;
+   if (plane->type != DRM_PLANE_TYPE_CURSOR)
pipe_config->disable_cxsr = true;
-   }
} else if (intel_wm_need_update(plane, plane_state)) {
pipe_config->wm_changed = true;
}
@@ -11865,14 +11868,6 @@ int intel_plane_atomic_calc_changes(struct 
drm_crtc_state *crtc_state,
intel_crtc->atomic.post_enable_primary = turn_on;
intel_crtc->atomic.update_fbc = true;
 
-   /*
-* BDW signals flip done immediately if the plane
-* is disabled, even if the plane enable is already
-* armed to occur at the next vblank :(
-*/
-   if (turn_on && IS_BROADWELL(dev))
-   intel_crtc->atomic.wait_vblank = true;
-
break;
case DRM_PLANE_TYPE_CURSOR:
break;
@@ -11885,13 +11880,11 @@ int intel_plane_atomic_calc_changes(struct 
drm_crtc_state *crtc_state,
 */
if (IS_IVYBRIDGE(dev) &&
needs_scaling(to_intel_plane_state(plane_state)) &&
-   !needs_scaling(old_plane_state)) {
-   to_intel_crtc_state(crtc_state)->disable_lp

Re: [Intel-gfx] [PATCH 3/3] drm/atomic: Refuse to steal encoders from connectors not part of the state.

[Maarten Lankhorst]

Hey,

Op 18-02-16 om 13:59 schreef Ville Syrjälä:
> On Thu, Feb 18, 2016 at 01:43:11PM +0100, Daniel Vetter wrote:
>> On Thu, Feb 18, 2016 at 12:18:53PM +0100, Maarten Lankhorst wrote:
>>> Op 18-02-16 om 12:07 schreef Daniel Vetter:
>>>> On Thu, Feb 18, 2016 at 09:54:43AM +0100, Maarten Lankhorst wrote:
>>>>> Because encoder <-> connector mapping is fixed when not moving to
>>>>> another crtc we can just reject connectors trying to steal an encoder
>>>>> from a connector not part of the state. This won't break MST on i915
>>>>> because in that case connectors will be part of the state if you switch
>>>>> them between crtc's. If they're not they stay on the same crtc, and
>>>>> encoder stealing would have failed anyway.
>>>> We must do this for backwards compat. setCrtc on a connector that needs an
>>>> encoder already used on some other crtc is supposed to disable that
>>>> encoder (and the entire pipe if it's all unused) if we need it.
>>>> -Daniel
>>>>
>>> Could this be done from the setcrtc helper? Seems with atomic that wouldn't 
>>> be desired behavior.
>> If you want to avoid stealing with atomic, supply _all_ the
>> connectors/crtcs when doing an atomic modeset. After all the point of
>> atomic is to do global updates. I don't think it makes sense to have a
>> special case just for setcrtc, since it makes compat/transition
>> unecesserily complicated.
> I disagree. Having properties change magically is just a bad idea IMO.
> As far as checking for conflicts, IIRC I did that with a few bitmasks
> in my original atomic code, and it was pretty trivial. The current
> stealing  code we have is way too complicated for what it does IMO.
>
>> And we do this kind of stealing in other places
>> too with public api objects, e.g. if you move a plane.
> Mm. What exactly do we steal with planes?
I've sent a v2 that works nicely with "[IGT PATCH] tests/kms_setmode: Add tests 
when not stealing encoders on same crtc."
For all other calls disabling connectors to steal its encoder is rejected, but 
the behavior is preserved for set_config only.

~Maarten
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[Intel-gfx] [PATCH] drm/i915: Update state before setting watermarks.

[Maarten Lankhorst]

When intel_update_watermarks is called on skylake it inspects
crtc->state, which should show as disabled. This wasn't the case,
and this resulted in a divide-by-zero in
skl_ddb_get_pipe_allocation_limits when intel_update_watermarks was called.

 [ cut here ]
 WARNING: CPU: 1 PID: 295 at drivers/gpu/drm/i915/intel_pm.c:2834 
skl_update_pipe_wm+0x102/0x8c0 [i915]()
 WARN_ON(!config->num_pipes_active)
 Modules linked in: coretemp i915(+) 
x
 CPU: 1 PID: 295 Comm: systemd-udevd Tainted: G U  W   4.5.0-rc4-xx 
#25
 Hardware name: x
   88003777f5a8 813485c2 88003777f5f0
  a0236240 88003777f5e0 81050fce 8800aa42
  8800aba18000 8800aba18000 880037304c00 8800aa42
 Call Trace:
  [] dump_stack+0x67/0x95
  [] warn_slowpath_common+0x9e/0xc0
  [] warn_slowpath_fmt+0x4c/0x50
  [] ? flush_work+0x8e/0x280
  [] ? flush_work+0x5/0x280
  [] skl_update_pipe_wm+0x102/0x8c0 [i915]
  [] skl_update_wm+0xff/0x5f0 [i915]
  [] ? trace_hardirqs_on_caller+0x15e/0x1d0
  [] ? trace_hardirqs_on+0xd/0x10
  [] intel_update_watermarks+0x1e/0x30 [i915]
  [] intel_crtc_disable_noatomic+0xd2/0x150 [i915]
  [] intel_modeset_setup_hw_state+0xdd2/0xde0 [i915]
  [] intel_modeset_init+0x15a3/0x1950 [i915]
  [] i915_driver_load+0x13c6/0x1720 [i915]
  [] ? add_sysfs_fw_map_entry+0x9b/0x9b
  [] drm_dev_register+0x6f/0xb0 [drm]
  [] drm_get_pci_dev+0x10a/0x1d0 [drm]
  [] i915_pci_probe+0x49/0x50 [i915]
  [] pci_device_probe+0x80/0xf0
  [] driver_probe_device+0x1bc/0x3d0
  [] __driver_attach+0x66/0x90
  [] ? driver_probe_device+0x3d0/0x3d0
  [] bus_for_each_dev+0x5b/0xa0
  [] driver_attach+0x1e/0x20
  [] bus_add_driver+0x151/0x270
  [] driver_register+0x8c/0xd0
  [] __pci_register_driver+0x5d/0x60
  [] drm_pci_init+0x58/0xf0 [drm]
  [] ? trace_hardirqs_on+0xd/0x10
  [] ? 0xa02aa000
  [] i915_init+0x94/0x9b [i915]
  [] do_one_initcall+0x113/0x1f0
  [] ? rcu_read_lock_sched_held+0x61/0x90
  [] ? kmem_cache_alloc_trace+0x1cc/0x280
  [] do_init_module+0x60/0x1c8
  [] load_module+0x1ceb/0x2410
  [] ? store_uevent+0x40/0x40
  [] ? kernel_read+0x41/0x60
  [] SYSC_finit_module+0x8d/0xa0
  [] SyS_finit_module+0xe/0x10
  [] entry_SYSCALL_64_fastpath+0x12/0x6f
 ---[ end trace 1149e9ab3695a423 ]---
 [ cut here ]

Reported-by: Tvrtko Ursulin <tvrtko.ursu...@linux.intel.com>
Signed-off-by: Maarten Lankhorst <maarten.lankho...@linux.intel.com>
---
diff --git a/drivers/gpu/drm/i915/intel_display.c 
b/drivers/gpu/drm/i915/intel_display.c
index deee56010eee..d9e0470419a1 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -6358,6 +6358,7 @@ static void i9xx_crtc_disable(struct drm_crtc *crtc)
 
 static void intel_crtc_disable_noatomic(struct drm_crtc *crtc)
 {
+   struct intel_encoder *encoder;
struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
struct drm_i915_private *dev_priv = to_i915(crtc->dev);
enum intel_display_power_domain domain;
@@ -6378,6 +6379,19 @@ static void intel_crtc_disable_noatomic(struct drm_crtc 
*crtc)
dev_priv->display.crtc_disable(crtc);
intel_crtc->active = false;
intel_fbc_disable(intel_crtc);
+
+   DRM_DEBUG_KMS("[CRTC:%d] hw state adjusted, was enabled, now 
disabled\n",
+ crtc->base.id);
+
+   WARN_ON(drm_atomic_set_mode_for_crtc(crtc->state, NULL) < 0);
+   crtc->state->active = false;
+   crtc->enabled = false;
+   crtc->state->connector_mask = 0;
+   crtc->state->encoder_mask = 0;
+
+   for_each_encoder_on_crtc(crtc->dev, crtc, encoder)
+   encoder->base.crtc = NULL;
+
intel_update_watermarks(crtc);
intel_disable_shared_dpll(intel_crtc);
 
@@ -15526,38 +15540,9 @@ static void intel_sanitize_crtc(struct intel_crtc 
*crtc)
 
/* Adjust the state of the output pipe according to whether we
 * have active connectors/encoders. */
-   if (!intel_crtc_has_encoders(crtc))
+   if (crtc->active && !intel_crtc_has_encoders(crtc))
intel_crtc_disable_noatomic(>base);
 
-   if (crtc->active != crtc->base.state->active) {
-   struct intel_encoder *encoder;
-
-   /* This can happen either due to bugs in the get_hw_state
-* functions or because of calls to intel_crtc_disable_noatomic,
-* or because the pipe is force-enabled due to the
-* pipe A quirk. */
-   DRM_DEBUG_KMS("[CRTC:%d] hw state adjusted, was %s, now %s\n",
- crtc->base.base.id,
- crtc->base.state->enable ? "enabled" : "disabled",
- crtc->ac

[Intel-gfx] [PATCH v2 3/6] drm/atomic: Always call steal_encoder.

[Maarten Lankhorst]

There's no need to have a separate function to get the crtc
which is stolen, this can already be found when actually
stealing the encoder.

drm_for_each_connector already checks for connection_mutex, so
use that macro now.

Signed-off-by: Maarten Lankhorst <maarten.lankho...@linux.intel.com>
---
 drivers/gpu/drm/drm_atomic_helper.c | 77 +++--
 1 file changed, 22 insertions(+), 55 deletions(-)

diff --git a/drivers/gpu/drm/drm_atomic_helper.c 
b/drivers/gpu/drm/drm_atomic_helper.c
index 3d1f97a832fc..e89a5da27463 100644
--- a/drivers/gpu/drm/drm_atomic_helper.c
+++ b/drivers/gpu/drm/drm_atomic_helper.c
@@ -106,25 +106,6 @@ check_pending_encoder_assignment(struct drm_atomic_state 
*state,
return true;
 }
 
-static struct drm_crtc *
-get_current_crtc_for_encoder(struct drm_device *dev,
-struct drm_encoder *encoder)
-{
-   struct drm_mode_config *config = >mode_config;
-   struct drm_connector *connector;
-
-   WARN_ON(!drm_modeset_is_locked(>connection_mutex));
-
-   drm_for_each_connector(connector, dev) {
-   if (connector->state->best_encoder != encoder)
-   continue;
-
-   return connector->state->crtc;
-   }
-
-   return NULL;
-}
-
 static void
 set_best_encoder(struct drm_atomic_state *state,
 struct drm_connector_state *conn_state,
@@ -168,47 +149,39 @@ set_best_encoder(struct drm_atomic_state *state,
 
 static int
 steal_encoder(struct drm_atomic_state *state,
- struct drm_encoder *encoder,
- struct drm_crtc *encoder_crtc)
+ struct drm_encoder *encoder)
 {
-   struct drm_mode_config *config = >dev->mode_config;
struct drm_crtc_state *crtc_state;
struct drm_connector *connector;
struct drm_connector_state *connector_state;
 
-   /*
-* We can only steal an encoder coming from a connector, which means we
-* must already hold the connection_mutex.
-*/
-   WARN_ON(!drm_modeset_is_locked(>connection_mutex));
-
-   DRM_DEBUG_ATOMIC("[ENCODER:%d:%s] in use on [CRTC:%d:%s], stealing 
it\n",
-encoder->base.id, encoder->name,
-encoder_crtc->base.id, encoder_crtc->name);
+   drm_for_each_connector(connector, state->dev) {
+   struct drm_crtc *encoder_crtc;
 
-   crtc_state = drm_atomic_get_crtc_state(state, encoder_crtc);
-   if (IS_ERR(crtc_state))
-   return PTR_ERR(crtc_state);
-
-   crtc_state->connectors_changed = true;
-
-   list_for_each_entry(connector, >connector_list, head) {
if (connector->state->best_encoder != encoder)
continue;
 
-   DRM_DEBUG_ATOMIC("Stealing encoder from [CONNECTOR:%d:%s]\n",
-connector->base.id,
-connector->name);
-
connector_state = drm_atomic_get_connector_state(state,
 connector);
if (IS_ERR(connector_state))
return PTR_ERR(connector_state);
 
-   if (connector_state->best_encoder != encoder)
+   if (connector_state->best_encoder != encoder ||
+   WARN_ON(!connector_state->crtc))
continue;
 
+   encoder_crtc = connector_state->crtc;
+
+   DRM_DEBUG_ATOMIC("[ENCODER:%d:%s] in use on [CRTC:%d:%s], 
stealing it\n",
+encoder->base.id, encoder->name,
+encoder_crtc->base.id, encoder_crtc->name);
+
set_best_encoder(state, connector_state, NULL);
+
+   crtc_state = drm_atomic_get_existing_crtc_state(state, 
encoder_crtc);
+   crtc_state->connectors_changed = true;
+
+   return 0;
}
 
return 0;
@@ -221,7 +194,6 @@ update_connector_routing(struct drm_atomic_state *state,
 {
const struct drm_connector_helper_funcs *funcs;
struct drm_encoder *new_encoder;
-   struct drm_crtc *encoder_crtc;
struct drm_crtc_state *crtc_state;
int idx, ret;
 
@@ -299,17 +271,12 @@ update_connector_routing(struct drm_atomic_state *state,
return -EINVAL;
}
 
-   encoder_crtc = get_current_crtc_for_encoder(state->dev,
-   new_encoder);
-
-   if (encoder_crtc) {
-   ret = steal_encoder(state, new_encoder, encoder_crtc);
-   if (ret) {
-   DRM_DEBUG_ATOMIC("Encoder stealing failed for 
[CONNECTOR:%d:%s]\n",
-connector->base.id,
- 

[Intel-gfx] [PATCH v2 4/6] drm/atomic: Handle encoder stealing from set_config better.

[Maarten Lankhorst]

Instead of failing with -EINVAL when conflicting encoders are found,
the legacy set_config will disable other connectors when encoders
conflict.

With the cleanup to update_output_state this is a lot easier to
implement. set_config only adds connectors to the state that are
modified, and because of the previous commit that calls
add_affected_connectors only on set->crtc it means any connector not
part of the modeset can be stolen from. We disable the connector in
that case, and possibly the crtc if no connectors are left.

Atomic modeset itself still doesn't allow encoder stealing, the
results would be too unpredictable.

Signed-off-by: Maarten Lankhorst <maarten.lankho...@linux.intel.com>
---
 drivers/gpu/drm/drm_atomic_helper.c | 69 +
 include/drm/drm_crtc.h  |  2 ++
 2 files changed, 71 insertions(+)

diff --git a/drivers/gpu/drm/drm_atomic_helper.c 
b/drivers/gpu/drm/drm_atomic_helper.c
index e89a5da27463..3543c7fcd072 100644
--- a/drivers/gpu/drm/drm_atomic_helper.c
+++ b/drivers/gpu/drm/drm_atomic_helper.c
@@ -86,6 +86,68 @@ drm_atomic_helper_plane_changed(struct drm_atomic_state 
*state,
}
 }
 
+static int disable_conflicting_connectors(struct drm_atomic_state *state)
+{
+   struct drm_connector_state *conn_state;
+   struct drm_connector *connector;
+   struct drm_encoder *encoder;
+   unsigned encoder_mask = 0;
+   int i, ret;
+
+   for_each_connector_in_state(state, connector, conn_state, i) {
+   const struct drm_connector_helper_funcs *funcs = 
connector->helper_private;
+   struct drm_encoder *new_encoder;
+
+   if (!conn_state->crtc)
+   continue;
+
+   if (funcs->atomic_best_encoder)
+   new_encoder = funcs->atomic_best_encoder(connector, 
conn_state);
+   else
+   new_encoder = funcs->best_encoder(connector);
+
+   if (new_encoder)
+   encoder_mask |= 1 << drm_encoder_index(new_encoder);
+   }
+
+   drm_for_each_connector(connector, state->dev) {
+   struct drm_crtc_state *crtc_state;
+
+   if (drm_atomic_get_existing_connector_state(state, connector))
+   continue;
+
+   encoder = connector->state->best_encoder;
+   if (!encoder || !(encoder_mask & (1 << 
drm_encoder_index(encoder
+   continue;
+
+   conn_state = drm_atomic_get_connector_state(state, connector);
+   if (IS_ERR(conn_state))
+   return PTR_ERR(conn_state);
+
+   DRM_DEBUG_ATOMIC("[ENCODER:%d:%s] in use on [CRTC:%d:%s], 
disabling [CONNECTOR:%d:%s]\n",
+encoder->base.id, encoder->name,
+conn_state->crtc->base.id, 
conn_state->crtc->name,
+connector->base.id, connector->name);
+
+   crtc_state = drm_atomic_get_existing_crtc_state(state, 
conn_state->crtc);
+
+   ret = drm_atomic_set_crtc_for_connector(conn_state, NULL);
+   if (ret)
+   return ret;
+
+   if (!crtc_state->connector_mask) {
+   ret = drm_atomic_set_mode_prop_for_crtc(crtc_state,
+   NULL);
+   if (ret < 0)
+   return ret;
+
+   crtc_state->active = false;
+   }
+   }
+
+   return 0;
+}
+
 static bool
 check_pending_encoder_assignment(struct drm_atomic_state *state,
 struct drm_encoder *new_encoder)
@@ -449,6 +511,12 @@ drm_atomic_helper_check_modeset(struct drm_device *dev,
}
}
 
+   if (state->legacy_set_config) {
+   ret = disable_conflicting_connectors(state);
+   if (ret)
+   return ret;
+   }
+
for_each_connector_in_state(state, connector, connector_state, i) {
/*
 * This only sets crtc->mode_changed for routing changes,
@@ -1797,6 +1865,7 @@ int drm_atomic_helper_set_config(struct drm_mode_set *set)
if (!state)
return -ENOMEM;
 
+   state->legacy_set_config = true;
state->acquire_ctx = drm_modeset_legacy_acquire_ctx(crtc);
 retry:
ret = __drm_atomic_helper_set_config(set, state);
diff --git a/include/drm/drm_crtc.h b/include/drm/drm_crtc.h
index 7fad193dc645..9a946df27f07 100644
--- a/include/drm/drm_crtc.h
+++ b/include/drm/drm_crtc.h
@@ -1677,6 +1677,7 @@ struct drm_bridge {
  * @dev: parent DRM device
  * @allow_modeset: allow full modeset
  * @legacy_cursor_update: hint to enforce legacy cursor IOCTL semantics
+ * @legacy_set_config: Dis

Re: [Intel-gfx] [PATCH] drm/i915: Add two-stage ILK-style watermark programming (v11)

[Maarten Lankhorst]

Op 24-02-16 om 02:24 schreef Matt Roper:
> On Tue, Feb 23, 2016 at 05:20:13PM -0800, Matt Roper wrote:
>> In addition to calculating final watermarks, let's also pre-calculate a
>> set of intermediate watermark values at atomic check time.  These
>> intermediate watermarks are a combination of the watermarks for the old
>> state and the new state; they should satisfy the requirements of both
>> states which means they can be programmed immediately when we commit the
>> atomic state (without waiting for a vblank).  Once the vblank does
>> happen, we can then re-program watermarks to the more optimal final
>> value.
>>
>> v2: Significant rebasing/rewriting.
>>
>> v3:
>>  - Move 'need_postvbl_update' flag to CRTC state (Daniel)
>>  - Don't forget to check intermediate watermark values for validity
>>(Maarten)
>>  - Don't due async watermark optimization; just do it at the end of the
>>atomic transaction, after waiting for vblanks.  We do want it to be
>>async eventually, but adding that now will cause more trouble for
>>Maarten's in-progress work.  (Maarten)
>>  - Don't allocate space in crtc_state for intermediate watermarks on
>>platforms that don't need it (gen9+).
>>  - Move WaCxSRDisabledForSpriteScaling:ivb into intel_begin_crtc_commit
>>now that ilk_update_wm is gone.
>>
>> v4:
>>  - Add a wm_mutex to cover updates to intel_crtc->active and the
>>need_postvbl_update flag.  Since we don't have async yet it isn't
>>terribly important yet, but might as well add it now.
>>  - Change interface to program watermarks.  Platforms will now expose
>>.initial_watermarks() and .optimize_watermarks() functions to do
>>watermark programming.  These should lock wm_mutex, copy the
>>appropriate state values into intel_crtc->active, and then call
>>the internal program watermarks function.
>>
>> v5:
>>  - Skip intermediate watermark calculation/check during initial hardware
>>readout since we don't trust the existing HW values (and don't have
>>valid values of our own yet).
>>  - Don't try to call .optimize_watermarks() on platforms that don't have
>>atomic watermarks yet.  (Maarten)
>>
>> v6:
>>  - Rebase
>>
>> v7:
>>  - Further rebase
>>
>> v8:
>>  - A few minor indentation and line length fixes
>>
>> v9:
>>  - Yet another rebase since Maarten's patches reworked a bunch of the
>>code (wm_pre, wm_post, etc.) that this was previously based on.
>>
>> v10:
>>  - Move wm_mutex to dev_priv to protect against racing commits against
>>disjoint CRTC sets. (Maarten)
>>  - Drop unnecessary clearing of cstate->wm.need_postvbl_update (Maarten)
>>
>> v11:
>>  - Now that we've moved to atomic watermark updates, make sure we call
>>the proper function to program watermarks in
>>{ironlake,haswell}_crtc_enable(); the failure to do so on the
>>previous patch iteration led to us not actually programming the
>>watermarks before turning on the CRTC, which was the cause of the
>>underruns that the CI system was seeing.
>>  - Fix inverted logic for determining when to optimize watermarks.  We
>>were needlessly optimizing when the intermediate/optimal values were
>>the same (harmless), but not actually optimizing when they differed
>>(also harmless, but wasteful from a power/bandwidth perspective).
>>
>> Cc: Maarten Lankhorst <maarten.lankho...@linux.intel.com>
>> Signed-off-by: Matt Roper <matthew.d.ro...@intel.com>
>> ---
> To assist with review, the non-rebasing changes in this iteration vs the
> last one are:
>
>> @@ -4925,7 +4960,7 @@ static void ironlake_crtc_enable(struct drm_crtc *crtc)
>>   */
>>  intel_crtc_load_lut(crtc);
>>  
>> -intel_update_watermarks(crtc);
>> +dev_priv->display.initial_watermarks(intel_crtc->config);
>>  intel_enable_pipe(intel_crtc);
>>  
>>  if (intel_crtc->config->has_pch_encoder)
>> @@ -5024,7 +5059,7 @@ static void haswell_crtc_enable(struct drm_crtc *crtc)
>>  if (!intel_crtc->config->has_dsi_encoder)
>>  intel_ddi_enable_transcoder_func(crtc);
>>  
>> -intel_update_watermarks(crtc);
>> +dev_priv->display.initial_watermarks(pipe_config);
>>  intel_enable_pipe(intel_crtc);
>>  
>>  if (intel_crtc->config->has_pch_encoder)
Are the intermediate watermarks identical to optimal watermarks during modeset?
> (both new additions to the patch)
>
> and:
>
>> +/*
>> + * If our intermediate WM are identical to the final WM, then we can
>> + * omit the post-vblank programming; only update if it's different.
>> + */
>> +if (memcmp(a, >wm.optimal.ilk, sizeof(*a)) == 0)
>> +newstate->wm.need_postvbl_update = false;
> (replacement of a "!=" with "==")
Ah, good catch!

Lets just wait for CI before applying again
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[Intel-gfx] [PATCH v2 0/6] drm/atomic: Fix encoder stealing, v2.

[Maarten Lankhorst]

After trying out various ways to handle encoder stealing better
I came up with a cleaner way.

The first patch cleans up update_output_state and only adds affected connectors.
This is required to determine which connectors are not part of the atomic state,
and allow disabling them if they have conflicting encoders.

After that 2 cleanups, then a fix to make encoder stealing explicit,
followed by using the newly created function to prevent encoder duplication
and finally another cleanup.

Maarten Lankhorst (6):
  drm/atomic: Clean up update_output_state.
  drm/atomic: Pass connector and state to update_connector_routing.
  drm/atomic: Always call steal_encoder.
  drm/atomic: Handle encoder stealing from set_config better.
  drm/atomic: Handle encoder assignment conflicts in a separate check.
  drm/atomic: Clean up steal_encoder

 drivers/gpu/drm/drm_atomic_helper.c | 215 +++-
 include/drm/drm_crtc.h  |   2 +
 2 files changed, 113 insertions(+), 104 deletions(-)

-- 
2.1.0

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