[PATCH] Added dependencies installation instructions for Arch Linux
Signed-off-by: Arthur HUILLET arthur.huil...@free.fr --- README |4 1 files changed, 4 insertions(+), 0 deletions(-) diff --git a/README b/README index cd32316..15122b0 100644 --- a/README +++ b/README @@ -33,6 +33,10 @@ How can I try it out? $ su $ pkg install SUNWgnome-common-devel SUNWgcc SUNWGlib SUNWgmake SUNWbison ; exit + + For Archlinux: + + # pacman -S eclipse-ecj classpath libzip libffi - Compile Jato and run the unit tests: -- 1.6.5.6 -- Return on Information: Google Enterprise Search pays you back Get the facts. http://p.sf.net/sfu/google-dev2dev ___ Jatovm-devel mailing list Jatovm-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/jatovm-devel
[PATCH] Add myself to AUTHORS
Signed-off-by: Arthur HUILLET arthur.huil...@free.fr --- AUTHORS |5 + 1 files changed, 5 insertions(+), 0 deletions(-) diff --git a/AUTHORS b/AUTHORS index 92693d2..417ea18 100644 --- a/AUTHORS +++ b/AUTHORS @@ -24,3 +24,8 @@ L: Oslo, Norway N: Saeed Siam saeed.s...@gmail.com D: Array handling, VMT L: Dhaka, Bangladesh + +N: Arthur Huillet arthur.huillet AT free.fr +W: http://www.agoctrl.org/ +D: x86, register allocation +L: France -- 1.6.5.6 -- Return on Information: Google Enterprise Search pays you back Get the facts. http://p.sf.net/sfu/google-dev2dev ___ Jatovm-devel mailing list Jatovm-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/jatovm-devel
[PATCH] Added dependencies installation instructions for Arch Linux
Signed-off-by: Arthur HUILLET arthur.huil...@free.fr --- README |4 1 files changed, 4 insertions(+), 0 deletions(-) diff --git a/README b/README index 03985d6..970bdcd 100644 --- a/README +++ b/README @@ -29,6 +29,10 @@ How can I try it out? $ su $ make install ; exit + For Archlinux: + + # pacman -S eclipse-ecj classpath libzip libffi + - Compile Jato and run the unit tests: $ cd JATO_ROOT ; make -- 1.6.5.3 -- Let Crystal Reports handle the reporting - Free Crystal Reports 2008 30-Day trial. Simplify your report design, integration and deployment - and focus on what you do best, core application coding. Discover what's new with Crystal Reports now. http://p.sf.net/sfu/bobj-july ___ Jatovm-devel mailing list Jatovm-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/jatovm-devel
[PATCH] Added dependencies installation instructions for Arch Linux
Signed-off-by: Arthur HUILLET arthur.huil...@free.fr --- This patch applies cleanly. Sorry. :) README |4 1 files changed, 4 insertions(+), 0 deletions(-) diff --git a/README b/README index 78d61fa..1b0cb7b 100644 --- a/README +++ b/README @@ -33,6 +33,10 @@ How can I try it out? $ su $ pkg install SUNWgnome-common-devel SUNWgcc SUNWGlib SUNWgmake SUNWbison ; exit + + For Archlinux: + + # pacman -S eclipse-ecj classpath libzip libffi - Compile Jato and run the unit tests: -- 1.6.5.3 -- Let Crystal Reports handle the reporting - Free Crystal Reports 2008 30-Day trial. Simplify your report design, integration and deployment - and focus on what you do best, core application coding. Discover what's new with Crystal Reports now. http://p.sf.net/sfu/bobj-july ___ Jatovm-devel mailing list Jatovm-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/jatovm-devel
Re: [PATCH 3/3] spill-reload: Use radix_tree_lookup() in insert_mov_insns()
Ack here as well, this is obviously correct (provided radix_tree_lookup()
works).
On Tue, 18 Aug 2009 21:41:19 +0300
Pekka Enberg penb...@cs.helsinki.fi wrote:
Lets use radix_tree_lookup() and get rid of the nasty loop in
bb_last_insn(). For some reason, this seems to fix the infinite loop
triggered by empty basic blocks.
Cc: Arthur HUILLET arthur.huil...@free.fr
Cc: Tomek Grabiec tgrab...@gmail.com
Signed-off-by: Pekka Enberg penb...@cs.helsinki.fi
---
jit/basic-block.c | 16 +---
jit/spill-reload.c |2 +-
2 files changed, 2 insertions(+), 16 deletions(-)
diff --git a/jit/basic-block.c b/jit/basic-block.c
index 6de5c3f..dbf3675 100644
--- a/jit/basic-block.c
+++ b/jit/basic-block.c
@@ -176,21 +176,7 @@ struct insn *bb_first_insn(struct basic_block *bb)
struct insn *bb_last_insn(struct basic_block *bb)
{
- struct insn *this = list_entry(bb-insn_list.prev, struct insn,
insn_list_node);
-
- /*
- * We want to return the last real instruction of the basic block.
Taking the
- * last of the insn_list will not work in case a live interval has been
spilled
- * right after the final jump of the basic block.
- * This is a side effect of the linear scan algorithm.
- *
- * As a result, we browse instructions starting from the last, in order
to find the one
- * that has a LIR position matching the position for the end of the
block.
- */
- while (this-lir_pos != bb-end_insn - 1) {
- this = list_entry(this-insn_list_node.prev, struct insn,
insn_list_node);
- }
- return this;
+ return list_entry(bb-insn_list.prev, struct insn, insn_list_node);
}
static int __bb_add_neighbor(void *new, void **array, unsigned long *nb)
diff --git a/jit/spill-reload.c b/jit/spill-reload.c
index 5ced80e..515db8a 100644
--- a/jit/spill-reload.c
+++ b/jit/spill-reload.c
@@ -183,7 +183,7 @@ static void insert_mov_insns(struct compilation_unit *cu,
struct insn *spill_at_insn;
int i;
- spill_at_insn = bb_last_insn(from_bb);
+ spill_at_insn = radix_tree_lookup(cu-lir_insn_map, from_bb-end_insn
- 1);
/* Spill all intervals that have to be resolved */
for (i = 0; i nr_mapped; i++) {
--
1.5.6.3
--
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A. Huillet
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Re: [PATCH 2/2] jit: introduce per-edge data flow resolution blocks
Hi, On Sat, 8 Aug 2009 12:43:50 +0200 Tomek Grabiec tgrab...@gmail.com wrote: When resolving data flow we can not emit reload instructions at the end of a basic block. That's because the register we are reloading to might be allocated to another interval at the end of this block. Especially, it can be used in a branch instruction that ends this basic block (see tableswitch). Solution is to put those invasive moves (mem - reg) to a per CFG edge blocks. These blocks will be emitted after all other blocks. As I explained on the channel, this patch is theorically correct and will make things work properly. However, this is not the solution that was suggested by Wimmer, and it certainly is kind of intrusive. Best would be to find out how to decide whether to put resolving moves at the end of the from block, or at the beginning of the to block, but I haven't been able to find the algorithm. Help appreciated. -- Greetings, A. Huillet -- Let Crystal Reports handle the reporting - Free Crystal Reports 2008 30-Day trial. Simplify your report design, integration and deployment - and focus on what you do best, core application coding. Discover what's new with Crystal Reports now. http://p.sf.net/sfu/bobj-july ___ Jatovm-devel mailing list Jatovm-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/jatovm-devel
[PATCH] jit: fix control flow resolution in regalloc
Signed-off-by: Arthur HUILLET arthur.huil...@free.fr
---
jit/spill-reload.c |4 ++--
regression/jvm/RegisterAllocatorTortureTest.java |5 ++---
2 files changed, 4 insertions(+), 5 deletions(-)
diff --git a/jit/spill-reload.c b/jit/spill-reload.c
index 489cefe..8750dae 100644
--- a/jit/spill-reload.c
+++ b/jit/spill-reload.c
@@ -197,7 +197,7 @@ static void insert_mov_insns(struct compilation_unit *cu,
from_it = mappings[i].from;
to_it = mappings[i].to;
- if (from_it-need_spill)
+ if (from_it-need_spill from_it-range.end =
from_bb-end_insn)
slot = from_it-spill_slot;
else
slot = spill_interval(from_it, cu, spill_at_insn, true);
@@ -205,7 +205,7 @@ static void insert_mov_insns(struct compilation_unit *cu,
/* Reload those intervals into their new location */
reload_at_insn = bb_first_insn(to_bb);
- if (to_it-need_reload) {
+ if (to_it-need_reload to_it-range.start =
to_bb-start_insn) {
insert_copy_slot_insn(mappings[i].to, cu, slot,
to_it-spill_parent-spill_slot,
spill_at_insn, reload_at_insn);
diff --git a/regression/jvm/RegisterAllocatorTortureTest.java
b/regression/jvm/RegisterAllocatorTortureTest.java
index 3612ecf..0a2d2ad 100644
--- a/regression/jvm/RegisterAllocatorTortureTest.java
+++ b/regression/jvm/RegisterAllocatorTortureTest.java
@@ -63,8 +63,7 @@ public class RegisterAllocatorTortureTest extends TestCase {
}
public static void main(String[] args) {
-testIntegerBigExpression();
-// FIXME
-// testComplexRegisterAllocatorPressure();
+ testIntegerBigExpression();
+ testComplexRegisterAllocatorPressure();
}
}
--
1.6.3.3
--
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Re: [PATCH] jit: fix control flow resolution in regalloc
Hi, On Fri, 24 Jul 2009 22:44:15 +0200 Arthur HUILLET arthur.huil...@free.fr wrote: Signed-off-by: Arthur HUILLET arthur.huil...@free.fr --- jit/spill-reload.c |4 ++-- regression/jvm/RegisterAllocatorTortureTest.java |5 ++--- 2 files changed, 4 insertions(+), 5 deletions(-) This is the patch that makes things work. :]] Vegard: Exception in thread main java/lang/UnsatisfiedLinkError: java/lang/VMThread.currentThread ()Ljava/lang/Thread; Any chance you could help with this? -- Greetings, A. Huillet -- ___ Jatovm-devel mailing list Jatovm-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/jatovm-devel
[PATCH 1/4] jit: add prev_child field to struct live_interval
We need that for the register allocator.
Signed-off-by: Arthur HUILLET arthur.huil...@free.fr
---
include/jit/vars.h |2 +-
jit/interval.c |1 +
2 files changed, 2 insertions(+), 1 deletions(-)
diff --git a/include/jit/vars.h b/include/jit/vars.h
index b567116..a697b1c 100644
--- a/include/jit/vars.h
+++ b/include/jit/vars.h
@@ -56,7 +56,7 @@ struct live_interval {
struct live_range range;
/* Linked list of child intervals. */
- struct live_interval *next_child;
+ struct live_interval *next_child, *prev_child;
/* Machine register of this interval. */
enum machine_reg reg;
diff --git a/jit/interval.c b/jit/interval.c
index 03da977..54a88c0 100644
--- a/jit/interval.c
+++ b/jit/interval.c
@@ -101,6 +101,7 @@ struct live_interval *split_interval_at(struct
live_interval *interval,
return NULL;
}
new-next_child = interval-next_child;
+ new-prev_child = interval;
interval-next_child = new;
return new;
--
1.6.3.3
--
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[PATCH 3/4] jit: bugfix for control flow resolution when a live interval ends at a basic block boundary
Signed-off-by: Arthur HUILLET arthur.huil...@free.fr
---
jit/spill-reload.c |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/jit/spill-reload.c b/jit/spill-reload.c
index 520e6d7..61b97ff 100644
--- a/jit/spill-reload.c
+++ b/jit/spill-reload.c
@@ -196,7 +196,7 @@ static void insert_mov_insns(struct compilation_unit *cu,
for (i = 0; i nr_mapped; i++) {
from_it = mappings[i].from;
- if (from_it-need_spill from_it-range.end =
from_bb-end_insn) {
+ if (from_it-need_spill from_it-range.end
from_bb-end_insn) {
slots[i] = from_it-spill_slot;
} else {
slots[i] = spill_interval(from_it, cu, spill_at_insn,
true);
--
1.6.3.3
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[PATCH 4/4] jit: fix bb_last_insn so it returns the last LIR instruction of the block
When a live interval ends at a basic block boundary and is spilled, the
spill instruction will appear after the final jump of the basic block.
In that case, bb_last_insn really ought to return the struct insn
corresponding to the jump, not the spill instructions that have been
added afterwards.
This is a bugfix.
Signed-off-by: Arthur HUILLET arthur.huil...@free.fr
---
jit/basic-block.c | 16 +++-
1 files changed, 15 insertions(+), 1 deletions(-)
diff --git a/jit/basic-block.c b/jit/basic-block.c
index 0a13062..4cd642e 100644
--- a/jit/basic-block.c
+++ b/jit/basic-block.c
@@ -154,7 +154,21 @@ struct insn *bb_first_insn(struct basic_block *bb)
struct insn *bb_last_insn(struct basic_block *bb)
{
- return list_entry(bb-insn_list.prev, struct insn, insn_list_node);
+ struct insn *this = list_entry(bb-insn_list.prev, struct insn,
insn_list_node);
+
+ /*
+* We want to return the last real instruction of the basic block.
Taking the
+* last of the insn_list will not work in case a live interval has been
spilled
+* right after the final jump of the basic block.
+* This is a side effect of the linear scan algorithm.
+*
+* As a result, we browse instructions starting from the last, in order
to find the one
+* that has a LIR position matching the position for the end of the
block.
+*/
+ while (this-lir_pos != bb-end_insn - 1) {
+ this = list_entry(this-insn_list_node.prev, struct insn,
insn_list_node);
+ }
+ return this;
}
static int __bb_add_neighbor(void *new, void **array, unsigned long *nb)
--
1.6.3.3
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[RFC PATCH 3/3] WIP bits for control flow resolution
From: Arthur Huillet arthur.huil...@free.fr
DO NOT MERGE THIS !!!
Signed-off-by: Arthur Huillet arthur.huil...@free.fr
diff --git a/Makefile b/Makefile
index 58ad9db..55de435 100644
--- a/Makefile
+++ b/Makefile
@@ -256,6 +256,7 @@ REGRESSION_TEST_SUITE_CLASSES = \
regression/jvm/PutstaticTest.class \
regression/jvm/RegisterAllocatorTortureTest.class \
regression/jvm/StringTest.class \
+ regression/jvm/SubstringTest.class \
regression/jvm/SynchronizationExceptionsTest.class \
regression/jvm/SynchronizationTest.class \
regression/jvm/TestCase.class \
diff --git a/arch/mmix/include/arch/instruction.h
b/arch/mmix/include/arch/instruction.h
index 54ec353..0ce9377 100644
--- a/arch/mmix/include/arch/instruction.h
+++ b/arch/mmix/include/arch/instruction.h
@@ -88,6 +88,19 @@ reload_insn(struct stack_slot *slot, struct var_info *var)
}
static inline struct insn *
+push_slot_insn(struct stack_slot *slot)
+{
+ /* XXX */
+ return NULL;
+}
+
+static inline struct insn *
+pop_slot_insn(struct stack_slot *slot)
+{
+ return NULL;
+}
+
+static inline struct insn *
exception_spill_insn(struct stack_slot *slot)
{
return NULL;
@@ -99,6 +112,11 @@ void free_insn(struct insn *);
bool insn_defs(struct insn *, struct var_info *);
bool insn_uses(struct insn *, struct var_info *);
+static inline const char *reg_name(enum machine_reg reg)
+{
+ return unknown;
+}
+
#define for_each_insn(insn, insn_list) list_for_each_entry(insn, insn_list,
insn_list_node)
#endif /* __ARCH_INSTRUCTION_H */
diff --git a/arch/x86/include/arch/instruction.h
b/arch/x86/include/arch/instruction.h
index aa29bbe..f8c474f 100644
--- a/arch/x86/include/arch/instruction.h
+++ b/arch/x86/include/arch/instruction.h
@@ -208,6 +208,18 @@ reload_insn(struct stack_slot *slot, struct var_info *var)
return NULL;
}
+static inline struct insn *
+push_slot_insn(struct stack_slot *from)
+{
+ return memlocal_insn(INSN_PUSH_MEMLOCAL, from);
+}
+
+static inline struct insn *
+pop_slot_insn(struct stack_slot *to)
+{
+ return memlocal_insn(INSN_POP_MEMLOCAL, to);
+}
+
struct insn *alloc_insn(enum insn_type);
void free_insn(struct insn *);
diff --git a/jit/spill-reload.c b/jit/spill-reload.c
index 94d2af7..e8eede4 100644
--- a/jit/spill-reload.c
+++ b/jit/spill-reload.c
@@ -30,8 +30,17 @@
#include arch/instruction.h
+#include lib/bitset.h
+
#include errno.h
+#include stdio.h
+#include string.h
+
+struct live_interval_mapping {
+ struct live_interval *from, *to;
+};
+
static struct insn *last_insn(struct live_interval *interval)
{
unsigned long end;
@@ -44,13 +53,11 @@ static struct insn *last_insn(struct live_interval
*interval)
return ret;
}
-static int insert_spill_insn(struct live_interval *interval, struct
compilation_unit *cu)
+static struct stack_slot *spill_interval(struct live_interval *interval,
struct compilation_unit *cu, struct insn *last)
{
- struct insn *last = last_insn(interval);
struct stack_slot *slot;
struct var_info *reg;
struct insn *spill;
-
/*
* We've already done register allocation, so use fixed registers for
* spilling and reloading.
@@ -59,18 +66,26 @@ static int insert_spill_insn(struct live_interval
*interval, struct compilation_
slot = get_spill_slot_32(cu-stack_frame);
if (!slot)
- return -ENOMEM;
+ return NULL;
spill = spill_insn(reg, slot);
if (!spill)
- return -ENOMEM;
-
- interval-spill_slot = slot;
+ return NULL;
spill-bytecode_offset = last-bytecode_offset;
list_add(spill-insn_list_node, last-insn_list_node);
+ return slot;
+}
+
+static int insert_spill_insn(struct live_interval *interval, struct
compilation_unit *cu)
+{
+ interval-spill_slot = spill_interval(interval, cu,
last_insn(interval));
+
+ if (!interval-spill_slot)
+ return -ENOMEM;
+
return 0;
}
@@ -84,14 +99,13 @@ static struct insn *first_insn(struct live_interval
*interval)
return ret;
}
-static int insert_reload_insn(struct live_interval *interval, struct
compilation_unit *cu)
+static int insert_reload_insn(struct live_interval *interval, struct
compilation_unit *cu, struct stack_slot *from, struct insn *first)
{
- struct insn *first = first_insn(interval);
struct insn *reload;
struct var_info *reg;
reg = get_fixed_var(cu, interval-reg);
- reload = reload_insn(interval-spill_parent-spill_slot, reg);
+ reload = reload_insn(from, reg);
if (!reload)
return -ENOMEM;
@@ -102,6 +116,27 @@ static int insert_reload_insn(struct live_interval
*interval, struct compilation
return 0;
}
+static int insert_copy_slot_insn(struct live_interval *interval, struct
compilation_unit *cu, struct stack_slot
[PATCH 2/3] jit: add vreg_start_interval and interval_child_at
From: Arthur Huillet arthur.huil...@free.fr
Those functions will be used by the register allocator when doing
control flow resolution.
Signed-off-by: Arthur Huillet arthur.huil...@free.fr
---
include/jit/vars.h |4 +++-
jit/interval.c | 33 +
2 files changed, 36 insertions(+), 1 deletions(-)
diff --git a/include/jit/vars.h b/include/jit/vars.h
index 482f10a..b567116 100644
--- a/include/jit/vars.h
+++ b/include/jit/vars.h
@@ -4,6 +4,7 @@
#include lib/list.h
#include arch/registers.h
#include vm/types.h
+#include compilation-unit.h
#include stdbool.h
#include assert.h
@@ -111,5 +112,6 @@ struct live_interval *alloc_interval(struct var_info *);
void free_interval(struct live_interval *);
struct live_interval *split_interval_at(struct live_interval *, unsigned long
pos);
unsigned long next_use_pos(struct live_interval *, unsigned long);
-
+struct live_interval *vreg_start_interval(struct compilation_unit *, unsigned
long);
+struct live_interval *interval_child_at(struct live_interval *, unsigned long);
#endif /* __JIT_VARS_H */
diff --git a/jit/interval.c b/jit/interval.c
index e450b94..03da977 100644
--- a/jit/interval.c
+++ b/jit/interval.c
@@ -121,3 +121,36 @@ unsigned long next_use_pos(struct live_interval *it,
unsigned long pos)
return min;
}
+
+struct live_interval *vreg_start_interval(struct compilation_unit *cu,
unsigned long vreg)
+{
+ struct var_info *var;
+
+ var = cu-var_infos;
+
+ while (var) {
+ if (var-vreg == vreg)
+ break;
+
+ var = var-next;
+ }
+
+ if (var == NULL)
+ return NULL;
+
+ return var-interval;
+}
+
+struct live_interval *interval_child_at(struct live_interval *parent, unsigned
long pos)
+{
+ struct live_interval *it = parent;
+
+ while (it) {
+ if (in_range(it-range, pos))
+ return it;
+
+ it = it-next_child;
+ }
+
+ return NULL;
+}
--
1.6.3.3
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[RFC PATCH 1/3] jit: add bb_first_insn and bb_last_insn
From: Arthur Huillet arthur.huil...@free.fr
Those functions are to be used by the register allocator when resolving
control flow.
Signed-off-by: Arthur Huillet arthur.huil...@free.fr
---
include/jit/basic-block.h |2 ++
jit/basic-block.c | 10 ++
2 files changed, 12 insertions(+), 0 deletions(-)
diff --git a/include/jit/basic-block.h b/include/jit/basic-block.h
index 74ee47d..28ca6b2 100644
--- a/include/jit/basic-block.h
+++ b/include/jit/basic-block.h
@@ -70,6 +70,8 @@ void free_basic_block(struct basic_block *);
struct basic_block *bb_split(struct basic_block *, unsigned long);
void bb_add_stmt(struct basic_block *, struct statement *);
void bb_add_insn(struct basic_block *, struct insn *);
+struct insn *bb_first_insn(struct basic_block *);
+struct insn *bb_last_insn(struct basic_block *);
int bb_add_successor(struct basic_block *, struct basic_block *);
int bb_add_mimic_stack_expr(struct basic_block *, struct expression *);
struct statement *bb_remove_last_stmt(struct basic_block *bb);
diff --git a/jit/basic-block.c b/jit/basic-block.c
index bd1cbe1..0a13062 100644
--- a/jit/basic-block.c
+++ b/jit/basic-block.c
@@ -147,6 +147,16 @@ void bb_add_insn(struct basic_block *bb, struct insn *insn)
list_add_tail(insn-insn_list_node, bb-insn_list);
}
+struct insn *bb_first_insn(struct basic_block *bb)
+{
+ return list_entry(bb-insn_list.next, struct insn, insn_list_node);
+}
+
+struct insn *bb_last_insn(struct basic_block *bb)
+{
+ return list_entry(bb-insn_list.prev, struct insn, insn_list_node);
+}
+
static int __bb_add_neighbor(void *new, void **array, unsigned long *nb)
{
unsigned long new_size;
--
1.6.3.3
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Re: [RFC PATCH 3/3] WIP bits for control flow resolution
Hi,
if you apply this series, you can help me work on the bug.
On Thu, 23 Jul 2009 23:24:50 +0200
Arthur HUILLET arthur.huil...@free.fr wrote:
From: Arthur Huillet arthur.huil...@free.fr
DO NOT MERGE THIS !!!
Signed-off-by: Arthur Huillet arthur.huil...@free.fr
diff --git a/Makefile b/Makefile
index 58ad9db..55de435 100644
--- a/Makefile
+++ b/Makefile
@@ -256,6 +256,7 @@ REGRESSION_TEST_SUITE_CLASSES = \
regression/jvm/PutstaticTest.class \
regression/jvm/RegisterAllocatorTortureTest.class \
regression/jvm/StringTest.class \
+ regression/jvm/SubstringTest.class \
regression/jvm/SynchronizationExceptionsTest.class \
regression/jvm/SynchronizationTest.class \
regression/jvm/TestCase.class \
diff --git a/arch/mmix/include/arch/instruction.h
b/arch/mmix/include/arch/instruction.h
index 54ec353..0ce9377 100644
--- a/arch/mmix/include/arch/instruction.h
+++ b/arch/mmix/include/arch/instruction.h
@@ -88,6 +88,19 @@ reload_insn(struct stack_slot *slot, struct var_info *var)
}
static inline struct insn *
+push_slot_insn(struct stack_slot *slot)
+{
+ /* XXX */
+ return NULL;
+}
+
+static inline struct insn *
+pop_slot_insn(struct stack_slot *slot)
+{
+ return NULL;
+}
+
+static inline struct insn *
exception_spill_insn(struct stack_slot *slot)
{
return NULL;
@@ -99,6 +112,11 @@ void free_insn(struct insn *);
bool insn_defs(struct insn *, struct var_info *);
bool insn_uses(struct insn *, struct var_info *);
+static inline const char *reg_name(enum machine_reg reg)
+{
+ return unknown;
+}
+
#define for_each_insn(insn, insn_list) list_for_each_entry(insn, insn_list,
insn_list_node)
#endif /* __ARCH_INSTRUCTION_H */
diff --git a/arch/x86/include/arch/instruction.h
b/arch/x86/include/arch/instruction.h
index aa29bbe..f8c474f 100644
--- a/arch/x86/include/arch/instruction.h
+++ b/arch/x86/include/arch/instruction.h
@@ -208,6 +208,18 @@ reload_insn(struct stack_slot *slot, struct var_info
*var)
return NULL;
}
+static inline struct insn *
+push_slot_insn(struct stack_slot *from)
+{
+ return memlocal_insn(INSN_PUSH_MEMLOCAL, from);
+}
+
+static inline struct insn *
+pop_slot_insn(struct stack_slot *to)
+{
+ return memlocal_insn(INSN_POP_MEMLOCAL, to);
+}
+
struct insn *alloc_insn(enum insn_type);
void free_insn(struct insn *);
diff --git a/jit/spill-reload.c b/jit/spill-reload.c
index 94d2af7..e8eede4 100644
--- a/jit/spill-reload.c
+++ b/jit/spill-reload.c
@@ -30,8 +30,17 @@
#include arch/instruction.h
+#include lib/bitset.h
+
#include errno.h
+#include stdio.h
+#include string.h
+
+struct live_interval_mapping {
+ struct live_interval *from, *to;
+};
+
static struct insn *last_insn(struct live_interval *interval)
{
unsigned long end;
@@ -44,13 +53,11 @@ static struct insn *last_insn(struct live_interval
*interval)
return ret;
}
-static int insert_spill_insn(struct live_interval *interval, struct
compilation_unit *cu)
+static struct stack_slot *spill_interval(struct live_interval *interval,
struct compilation_unit
*cu, struct insn *last) {
- struct insn *last = last_insn(interval);
struct stack_slot *slot;
struct var_info *reg;
struct insn *spill;
-
/*
* We've already done register allocation, so use fixed registers for
* spilling and reloading.
@@ -59,18 +66,26 @@ static int insert_spill_insn(struct live_interval
*interval, struct
compilation_
slot = get_spill_slot_32(cu-stack_frame);
if (!slot)
- return -ENOMEM;
+ return NULL;
spill = spill_insn(reg, slot);
if (!spill)
- return -ENOMEM;
-
- interval-spill_slot = slot;
+ return NULL;
spill-bytecode_offset = last-bytecode_offset;
list_add(spill-insn_list_node, last-insn_list_node);
+ return slot;
+}
+
+static int insert_spill_insn(struct live_interval *interval, struct
compilation_unit *cu)
+{
+ interval-spill_slot = spill_interval(interval, cu,
last_insn(interval));
+
+ if (!interval-spill_slot)
+ return -ENOMEM;
+
return 0;
}
@@ -84,14 +99,13 @@ static struct insn *first_insn(struct live_interval
*interval)
return ret;
}
-static int insert_reload_insn(struct live_interval *interval, struct
compilation_unit *cu)
+static int insert_reload_insn(struct live_interval *interval, struct
compilation_unit *cu,
struct stack_slot *from, struct insn *first) {
- struct insn *first = first_insn(interval);
struct insn *reload;
struct var_info *reg;
reg = get_fixed_var(cu, interval-reg);
- reload = reload_insn(interval-spill_parent-spill_slot, reg);
+ reload = reload_insn(from, reg);
if (!reload)
return -ENOMEM;
@@ -102,6 +116,27
Re: [PATCH] x86: ESP and EBP are of GPR type
Hi,
this patch fixes an actual bug.
Please merge it (unlike the previous one for control flow resolving,
which I intended to mark as RFC).
Control flow resolving works for SubstringTest, but I prefer to send it
once it's done.
On Tue, Jul 21, 2009 at 11:32:50AM +0200, Arthur Huillet wrote:
Signed-off-by: Arthur Huillet arthur.huil...@free.fr
---
arch/x86/registers_32.c |2 ++
1 files changed, 2 insertions(+), 0 deletions(-)
diff --git a/arch/x86/registers_32.c b/arch/x86/registers_32.c
index ecce9df..463572b 100644
--- a/arch/x86/registers_32.c
+++ b/arch/x86/registers_32.c
@@ -34,6 +34,8 @@ static enum machine_reg_type register_types[] = {
[REG_EDX] = REG_TYPE_GPR,
[REG_EDI] = REG_TYPE_GPR,
[REG_ESI] = REG_TYPE_GPR,
+ [REG_ESP] = REG_TYPE_GPR,
+ [REG_EBP] = REG_TYPE_GPR,
[REG_XMM0] = REG_TYPE_FPU,
[REG_XMM1] = REG_TYPE_FPU,
--
1.5.6.3
--
Greetings,
A. Huillet
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[PATCH] regression: add integer-float conversion tests
Disabled until conversion is implemented.
Signed-off-by: Arthur Huillet arthur.huil...@free.fr
---
regression/jvm/FloatArithmeticTest.java | 18 +-
1 files changed, 17 insertions(+), 1 deletions(-)
diff --git a/regression/jvm/FloatArithmeticTest.java
b/regression/jvm/FloatArithmeticTest.java
index edd6c14..30ac318 100644
--- a/regression/jvm/FloatArithmeticTest.java
+++ b/regression/jvm/FloatArithmeticTest.java
@@ -111,6 +111,21 @@ public class FloatArithmeticTest extends TestCase {
return -n;
}
+ public static float i2f(int val) {
+ return (float) val;
+ }
+
+ public static int f2i(float val) {
+ return (int) val;
+ }
+
+ public static void testFloatIntConversion() {
+ assertEquals(2, f2i(2.5f));
+ assertEquals(-1000, f2i(-1000.0101f));
+ assertEquals(2.0f, i2f(2));
+ assertEquals(-3000f, i2f(-3000));
+ }
+
public static void main(String[] args) {
testFloatAddition();
@@ -119,8 +134,9 @@ public class FloatArithmeticTest extends TestCase {
testFloatSubtractionImmediateLocal();
testFloatMultiplication();
testFloatDivision();
+//TODO testFloatRemainder();
testFloatNegation();
-
+// testFloatIntConversion();
exit();
}
}
--
1.6.3.3
--
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[PATCH] x86: factorize code for INVOKEVIRTUAL and FINVOKEVIRTUAL
Signed-off-by: Arthur Huillet arthur.huil...@free.fr
---
arch/x86/insn-selector_32.brg | 108 +++--
1 files changed, 40 insertions(+), 68 deletions(-)
diff --git a/arch/x86/insn-selector_32.brg b/arch/x86/insn-selector_32.brg
index 0e8e84f..35d9ecb 100644
--- a/arch/x86/insn-selector_32.brg
+++ b/arch/x86/insn-selector_32.brg
@@ -786,19 +786,11 @@ freg: EXPR_FINVOKE(arg) 1
reg: EXPR_INVOKEVIRTUAL(arg) 1
{
struct var_info *eax, *edx = NULL;
- struct expression *objectref_expr;
- struct var_info *call_target;
- struct compilation_unit *cu;
- unsigned long method_offset;
struct vm_method *method;
- unsigned long args_count;
struct expression *expr;
expr= to_expr(tree);
method = expr-target_method;
- cu = method-compilation_unit;
-
- method_offset = expr_method_index(expr) * sizeof(void *);
eax = get_fixed_var(s-b_parent, REG_EAX);
state-reg1 = get_var(s-b_parent);
@@ -808,31 +800,7 @@ reg: EXPR_INVOKEVIRTUAL(arg) 1
state-reg2 = get_var(s-b_parent);
}
- /* object reference */
- objectref_expr = get_first_arg(expr-args_list);
-
- if (expr_type(objectref_expr) == EXPR_VALUE) {
- call_target = get_var(s-b_parent);
- select_insn(s, tree, imm_reg_insn(INSN_MOV_IMM_REG,
objectref_expr-value, call_target));
- } else {
- call_target = state-left-reg1;
- }
-
- /* object class */
- select_insn(s, tree, membase_reg_insn(INSN_MOV_MEMBASE_REG,
call_target, offsetof(struct vm_object, class), call_target));
-
- /* vtable */
- select_insn(s, tree, membase_reg_insn(INSN_MOV_MEMBASE_REG,
call_target, offsetof(struct vm_class, vtable), call_target));
-
- /* native ptr */
- select_insn(s, tree, imm_reg_insn(INSN_ADD_IMM_REG, method_offset,
call_target));
-
- /* invoke method */
- select_insn(s, tree, reg_insn(INSN_CALL_REG, call_target));
-
- args_count = nr_args(to_expr(expr-args_list));
- if (args_count)
- method_args_cleanup(s, tree, args_count);
+ invokevirtual(state, s, tree);
select_insn(s, tree, reg_reg_insn(INSN_MOV_REG_REG, eax, state-reg1));
if (edx != NULL)
@@ -842,47 +810,13 @@ reg: EXPR_INVOKEVIRTUAL(arg) 1
freg: EXPR_FINVOKEVIRTUAL(arg) 1
{
struct var_info *esp;
- struct expression *objectref_expr;
- struct var_info *call_target;
- struct compilation_unit *cu;
- unsigned long method_offset;
- struct vm_method *method;
- unsigned long args_count;
struct expression *expr;
expr= to_expr(tree);
- method = expr-target_method;
- cu = method-compilation_unit;
-
- method_offset = expr_method_index(expr) * sizeof(void *);
state-reg1 = get_fpu_var(s-b_parent);
- /* object reference */
- objectref_expr = get_first_arg(expr-args_list);
-
- if (expr_type(objectref_expr) == EXPR_VALUE) {
- call_target = get_var(s-b_parent);
- select_insn(s, tree, imm_reg_insn(INSN_MOV_IMM_REG,
objectref_expr-value, call_target));
- } else {
- call_target = state-left-reg1;
- }
-
- /* object class */
- select_insn(s, tree, membase_reg_insn(INSN_MOV_MEMBASE_REG,
call_target, offsetof(struct vm_object, class), call_target));
-
- /* vtable */
- select_insn(s, tree, membase_reg_insn(INSN_MOV_MEMBASE_REG,
call_target, offsetof(struct vm_class, vtable), call_target));
-
- /* native ptr */
- select_insn(s, tree, imm_reg_insn(INSN_ADD_IMM_REG, method_offset,
call_target));
-
- /* invoke method */
- select_insn(s, tree, reg_insn(INSN_CALL_REG, call_target));
-
- args_count = nr_args(to_expr(expr-args_list));
- if (args_count)
- method_args_cleanup(s, tree, args_count);
+ invokevirtual(state, s, tree);
esp = get_fixed_var(s-b_parent, REG_ESP);
select_insn(s, tree, membase_insn(INSN_FSTP_MEMBASE, esp, -4));
@@ -1935,6 +1869,44 @@ emulate_op_64(struct _MBState *state, struct basic_block
*s,
select_insn(s, tree, reg_reg_insn(INSN_MOV_REG_REG, edx,
state-reg2));
}
+static void invokevirtual(struct _MBState *state, struct basic_block *s,
struct tree_node *tree)
+{
+ struct expression *expr;
+ struct expression *objectref_expr;
+ struct var_info *call_target;
+ unsigned long method_offset;
+ unsigned long args_count;
+
+ expr= to_expr(tree);
+ method_offset = expr_method_index(expr) * sizeof(void *);
+
+ /* object reference */
+ objectref_expr = get_first_arg(expr-args_list);
+
+ if (expr_type(objectref_expr) == EXPR_VALUE) {
+ call_target = get_var(s-b_parent);
+ select_insn(s, tree, imm_reg_insn
[PATCH] x86: factorize code for INVOKE and FINVOKE
Signed-off-by: Arthur Huillet arthur.huil...@free.fr
---
arch/x86/insn-selector_32.brg | 125 -
1 files changed, 48 insertions(+), 77 deletions(-)
diff --git a/arch/x86/insn-selector_32.brg b/arch/x86/insn-selector_32.brg
index 35d9ecb..857f2a9 100644
--- a/arch/x86/insn-selector_32.brg
+++ b/arch/x86/insn-selector_32.brg
@@ -669,34 +669,11 @@ reg: EXPR_INVOKE(arg) 1
struct compilation_unit *cu;
struct vm_method *method;
struct expression *expr;
- struct insn *call_insn;
- bool is_compiled;
- void *target;
expr= to_expr(tree);
method = expr-target_method;
cu = method-compilation_unit;
- if (cu == s-b_parent) {
- /*
-* This is a recursive method invocation. Threfore, we are
-* already holding cu-mutex here because we entered
-* instruction selection through jit_magic_trampoline().
-*/
- is_compiled = false;
- target = vm_method_trampoline_ptr(method);
- } else {
- pthread_mutex_lock(cu-mutex);
- is_compiled = cu-is_compiled;
-
- if (is_compiled)
- target = vm_method_native_ptr(method);
- else
- target = vm_method_trampoline_ptr(method);
-
- pthread_mutex_unlock(cu-mutex);
- }
-
eax = get_fixed_var(s-b_parent, REG_EAX);
state-reg1 = get_var(s-b_parent);
@@ -705,21 +682,7 @@ reg: EXPR_INVOKE(arg) 1
state-reg2 = get_var(s-b_parent);
}
- call_insn = rel_insn(INSN_CALL_REL, (unsigned long) target);
- select_insn(s, tree, call_insn);
-
- if (!is_compiled) {
- struct fixup_site *fixup;
-
- fixup = alloc_fixup_site();
- fixup-cu = s-b_parent;
- fixup-relcall_insn = call_insn;
-
- trampoline_add_fixup_site(method-trampoline, fixup);
- }
-
- if (method-args_count)
- method_args_cleanup(s, tree, method-args_count);
+ invoke(s, tree, cu, method);
select_insn(s, tree, reg_reg_insn(INSN_MOV_REG_REG, eax, state-reg1));
if (edx != NULL)
@@ -731,52 +694,15 @@ freg: EXPR_FINVOKE(arg) 1
struct compilation_unit *cu;
struct vm_method *method;
struct expression *expr;
- struct insn *call_insn;
- bool is_compiled;
- void *target;
struct var_info *esp;
expr= to_expr(tree);
method = expr-target_method;
cu = method-compilation_unit;
- if (cu == s-b_parent) {
- /*
-* This is a recursive method invocation. Threfore, we are
-* already holding cu-mutex here because we entered
-* instruction selection through jit_magic_trampoline().
-*/
- is_compiled = false;
- target = vm_method_trampoline_ptr(method);
- } else {
- pthread_mutex_lock(cu-mutex);
- is_compiled = cu-is_compiled;
-
- if (is_compiled)
- target = vm_method_native_ptr(method);
- else
- target = vm_method_trampoline_ptr(method);
-
- pthread_mutex_unlock(cu-mutex);
- }
-
state-reg1 = get_fpu_var(s-b_parent);
-
- call_insn = rel_insn(INSN_CALL_REL, (unsigned long) target);
- select_insn(s, tree, call_insn);
-
- if (!is_compiled) {
- struct fixup_site *fixup;
-
- fixup = alloc_fixup_site();
- fixup-cu = s-b_parent;
- fixup-relcall_insn = call_insn;
-
- trampoline_add_fixup_site(method-trampoline, fixup);
- }
-
- if (method-args_count)
- method_args_cleanup(s, tree, method-args_count);
+
+ invoke(s, tree, cu, method);
esp = get_fixed_var(s-b_parent, REG_ESP);
select_insn(s, tree, membase_insn(INSN_FSTP_MEMBASE, esp, -4));
@@ -1869,6 +1795,51 @@ emulate_op_64(struct _MBState *state, struct basic_block
*s,
select_insn(s, tree, reg_reg_insn(INSN_MOV_REG_REG, edx,
state-reg2));
}
+static void invoke(struct basic_block *s, struct tree_node *tree, struct
compilation_unit *cu, struct vm_method *method)
+{
+ bool is_compiled;
+ struct insn *call_insn;
+ void *target;
+
+ if (cu == s-b_parent) {
+ /*
+* This is a recursive method invocation. Threfore, we are
+* already holding cu-mutex here because we entered
+* instruction selection through jit_magic_trampoline().
+*/
+ is_compiled = false;
+ target = vm_method_trampoline_ptr(method);
+ } else {
+ pthread_mutex_lock(cu-mutex
[PATCH] x86: floating point returning is now ABI conformant
We use the top of the x87 stack as is specified by the i386 SystemV ABI.
Signed-off-by: Arthur Huillet arthur.huil...@free.fr
---
arch/x86/emit-code.c| 12 +++
arch/x86/include/arch/instruction.h |3 +
arch/x86/insn-selector_32.brg | 126 ++-
arch/x86/instruction.c | 10 +++
arch/x86/lir-printer.c | 14
arch/x86/use-def.c |2 +
include/jit/expression.h|8 ++-
jit/expression.c| 20 ++
jit/invoke-bc.c | 18 -
jit/tree-printer.c |2 +
10 files changed, 210 insertions(+), 5 deletions(-)
diff --git a/arch/x86/emit-code.c b/arch/x86/emit-code.c
index bb5b299..2a63e50 100644
--- a/arch/x86/emit-code.c
+++ b/arch/x86/emit-code.c
@@ -894,6 +894,16 @@ static void emit_fdiv_reg_reg(struct buffer *buf,
emit_reg_reg(buf, 0x5e, dest, src);
}
+static void emit_fld_membase(struct buffer *buf, struct operand *src)
+{
+ __emit_membase(buf, 0xd9, mach_reg(src-base_reg), src-disp, 0);
+}
+
+static void emit_fstp_membase(struct buffer *buf, struct operand *dest)
+{
+ __emit_membase(buf, 0xd9, mach_reg(dest-base_reg), dest-disp, 3);
+}
+
static void emit_add_membase_reg(struct buffer *buf,
struct operand *src, struct operand *dest)
{
@@ -1207,6 +1217,8 @@ struct emitter emitters[] = {
DECL_EMITTER(INSN_FSUB_REG_REG, emit_fsub_reg_reg, TWO_OPERANDS),
DECL_EMITTER(INSN_FMUL_REG_REG, emit_fmul_reg_reg, TWO_OPERANDS),
DECL_EMITTER(INSN_FDIV_REG_REG, emit_fdiv_reg_reg, TWO_OPERANDS),
+ DECL_EMITTER(INSN_FLD_MEMBASE, emit_fld_membase, TWO_OPERANDS),
+ DECL_EMITTER(INSN_FSTP_MEMBASE, emit_fstp_membase, TWO_OPERANDS),
DECL_EMITTER(INSN_CONV_GPR_TO_FPU, emit_conv_gpr_to_fpu, TWO_OPERANDS),
DECL_EMITTER(INSN_CONV_FPU_TO_GPR, emit_conv_fpu_to_gpr, TWO_OPERANDS),
DECL_EMITTER(INSN_MOV_MEMBASE_XMM, emit_mov_membase_xmm, TWO_OPERANDS),
diff --git a/arch/x86/include/arch/instruction.h
b/arch/x86/include/arch/instruction.h
index 056480f..42c3fbb 100644
--- a/arch/x86/include/arch/instruction.h
+++ b/arch/x86/include/arch/instruction.h
@@ -74,6 +74,8 @@ enum insn_type {
INSN_FMUL_REG_REG,
INSN_FDIV_REG_REG,
INSN_FSUB_REG_REG,
+ INSN_FLD_MEMBASE,
+ INSN_FSTP_MEMBASE,
INSN_CONV_FPU_TO_GPR,
INSN_CONV_GPR_TO_FPU,
INSN_JE_BRANCH,
@@ -197,6 +199,7 @@ struct insn *imm_insn(enum insn_type, unsigned long);
struct insn *rel_insn(enum insn_type, unsigned long);
struct insn *branch_insn(enum insn_type, struct basic_block *);
struct insn *memlocal_insn(enum insn_type, struct stack_slot *);
+struct insn *membase_insn(enum insn_type, struct var_info *, long);
/*
* These functions are used by generic code to insert spill/reload
diff --git a/arch/x86/insn-selector_32.brg b/arch/x86/insn-selector_32.brg
index 86d81b9..1ba67b9 100644
--- a/arch/x86/insn-selector_32.brg
+++ b/arch/x86/insn-selector_32.brg
@@ -705,6 +705,63 @@ reg: EXPR_INVOKE(arg) 1
select_insn(s, tree, reg_reg_insn(INSN_MOV_REG_REG, edx,
state-reg2));
}
+freg: EXPR_FINVOKE(arg) 1
+{
+ struct compilation_unit *cu;
+ struct vm_method *method;
+ struct expression *expr;
+ struct insn *call_insn;
+ bool is_compiled;
+ void *target;
+ struct var_info *esp;
+
+ expr= to_expr(tree);
+ method = expr-target_method;
+ cu = method-compilation_unit;
+
+ if (cu == s-b_parent) {
+ /*
+* This is a recursive method invocation. Threfore, we are
+* already holding cu-mutex here because we entered
+* instruction selection through jit_magic_trampoline().
+*/
+ is_compiled = false;
+ target = vm_method_trampoline_ptr(method);
+ } else {
+ pthread_mutex_lock(cu-mutex);
+ is_compiled = cu-is_compiled;
+
+ if (is_compiled)
+ target = vm_method_native_ptr(method);
+ else
+ target = vm_method_trampoline_ptr(method);
+
+ pthread_mutex_unlock(cu-mutex);
+ }
+
+ state-reg1 = get_fpu_var(s-b_parent);
+
+ call_insn = rel_insn(INSN_CALL_REL, (unsigned long) target);
+ select_insn(s, tree, call_insn);
+
+ if (!is_compiled) {
+ struct fixup_site *fixup;
+
+ fixup = alloc_fixup_site();
+ fixup-cu = s-b_parent;
+ fixup-relcall_insn = call_insn;
+
+ trampoline_add_fixup_site(method-trampoline, fixup);
+ }
+
+ if (method-args_count)
+ method_args_cleanup(s, tree, method-args_count);
+
+ esp = get_fixed_var(s-b_parent, REG_ESP);
+ select_insn(s, tree, membase_insn(INSN_FSTP_MEMBASE, esp
[PATCH] x86: fix FMUL FDIV FCMPL, implement FNEG, enable FloatArithmeticTest
Signed-off-by: Arthur Huillet arthur.huil...@free.fr
---
The patch that makes things work. :)
arch/x86/emit-code.c|8
arch/x86/include/arch/instruction.h |1 +
arch/x86/insn-selector_32.brg | 22 +++---
arch/x86/lir-printer.c |7 +++
arch/x86/use-def.c |1 +
include/jit/expression.h|1 +
jit/arithmetic-bc.c |4 ++--
jit/tree-printer.c |1 +
regression/jvm/FloatArithmeticTest.java | 14 +++---
regression/run-suite.sh |1 +
test/jit/arithmetic-bc-test.c |4 ++--
11 files changed, 50 insertions(+), 14 deletions(-)
diff --git a/arch/x86/emit-code.c b/arch/x86/emit-code.c
index bed1900..577df05 100644
--- a/arch/x86/emit-code.c
+++ b/arch/x86/emit-code.c
@@ -1056,6 +1056,13 @@ static void emit_xor_reg_reg(struct buffer *buf, struct
operand *src,
emit_reg_reg(buf, 0x33, dest, src);
}
+static void emit_xor_xmm_reg_reg(struct buffer *buf, struct operand *src,
+struct operand *dest)
+{
+ emit(buf, 0x0f);
+ emit_reg_reg(buf, 0x57, dest, src);
+}
+
static void __emit_add_imm_reg(struct buffer *buf, long imm, enum machine_reg
reg)
{
emit_alu_imm_reg(buf, 0x00, imm, reg);
@@ -1243,6 +1250,7 @@ struct emitter emitters[] = {
DECL_EMITTER(INSN_XOR_MEMBASE_REG, emit_xor_membase_reg, TWO_OPERANDS),
DECL_EMITTER(INSN_XOR_IMM_REG, emit_xor_imm_reg, TWO_OPERANDS),
DECL_EMITTER(INSN_XOR_REG_REG, emit_xor_reg_reg, TWO_OPERANDS),
+ DECL_EMITTER(INSN_XOR_XMM_REG_REG, emit_xor_xmm_reg_reg, TWO_OPERANDS),
};
void fixup_static(struct vm_class *vmc)
diff --git a/arch/x86/include/arch/instruction.h
b/arch/x86/include/arch/instruction.h
index d0b52db..056480f 100644
--- a/arch/x86/include/arch/instruction.h
+++ b/arch/x86/include/arch/instruction.h
@@ -125,6 +125,7 @@ enum insn_type {
INSN_XOR_MEMBASE_REG,
INSN_XOR_IMM_REG,
INSN_XOR_REG_REG,
+ INSN_XOR_XMM_REG_REG,
#ifdef CONFIG_X86_64
INSN64_ADD_IMM_REG,
diff --git a/arch/x86/insn-selector_32.brg b/arch/x86/insn-selector_32.brg
index 35ed3d3..edbdeac 100644
--- a/arch/x86/insn-selector_32.brg
+++ b/arch/x86/insn-selector_32.brg
@@ -357,7 +357,7 @@ reg:OP_MUL(reg, reg) 1
select_insn(s, tree, reg_reg_insn(INSN_MUL_REG_REG, state-left-reg1,
state-right-reg1));
}
-freg: OP_FMUL(reg, reg) 1
+freg: OP_FMUL(freg, freg) 1
{
state-reg1 = state-left-reg1;
@@ -408,7 +408,7 @@ reg:OP_DIV(reg, reg) 1
select_insn(s, tree, reg_reg_insn(INSN_DIV_REG_REG, state-right-reg1,
result));
}
-freg: OP_FDIV(reg, reg) 1
+freg: OP_FDIV(freg, freg) 1
{
state-reg1 = state-left-reg1;
@@ -473,6 +473,22 @@ reg: OP_NEG(reg) 1
}
}
+freg: OP_FNEG(freg) 1
+{
+ struct var_info *result, *esp;
+
+ esp = get_fixed_var(s-b_parent, REG_ESP);
+
+ result = get_fpu_var(s-b_parent);
+
+ select_insn(s, tree, imm_membase_insn(INSN_MOV_IMM_MEMBASE, 0x8000,
esp, -4));
+ select_insn(s, tree, membase_reg_insn(INSN_MOV_MEMBASE_XMM, esp, -4,
result));
+
+ select_insn(s, tree, reg_reg_insn(INSN_XOR_XMM_REG_REG,
state-left-reg1, result));
+
+ state-reg1 = result;
+}
+
reg: OP_SHL(reg, reg) 1
{
struct var_info *ecx;
@@ -745,7 +761,7 @@ reg:EXPR_INVOKEVIRTUAL(arg) 1
select_insn(s, tree, reg_reg_insn(INSN_MOV_REG_REG, edx,
state-reg2));
}
-reg: OP_CMPL(reg, reg) 1
+reg: OP_CMPL(freg, freg) 1
{
struct var_info *esp, *eax;
diff --git a/arch/x86/lir-printer.c b/arch/x86/lir-printer.c
index fc99cdd..360eef9 100644
--- a/arch/x86/lir-printer.c
+++ b/arch/x86/lir-printer.c
@@ -604,6 +604,12 @@ static int print_xor_reg_reg(struct string *str, struct
insn *insn)
return print_reg_reg(str, insn);
}
+static int print_xor_xmm_reg_reg(struct string *str, struct insn *insn)
+{
+ print_func_name(str);
+ return print_reg_reg(str, insn);
+}
+
typedef int (*print_insn_fn) (struct string *str, struct insn *insn);
static print_insn_fn insn_printers[] = {
@@ -678,6 +684,7 @@ static print_insn_fn insn_printers[] = {
[INSN_XOR_MEMBASE_REG] = print_xor_membase_reg,
[INSN_XOR_IMM_REG] = print_xor_imm_reg,
[INSN_XOR_REG_REG] = print_xor_reg_reg,
+ [INSN_XOR_XMM_REG_REG] = print_xor_xmm_reg_reg,
};
int lir_print(struct insn *insn, struct string *str)
diff --git a/arch/x86/use-def.c b/arch/x86/use-def.c
index 73fd389..ee22554 100644
--- a/arch/x86/use-def.c
+++ b/arch/x86/use-def.c
@@ -98,6 +98,7 @@ static struct insn_info insn_infos[] = {
DECLARE_INFO(INSN_XOR_MEMBASE_REG, USE_SRC | DEF_DST),
DECLARE_INFO(INSN_XOR_IMM_REG, USE_SRC | DEF_DST),
DECLARE_INFO(INSN_XOR_REG_REG, USE_SRC | DEF_DST),
+ DECLARE_INFO
[PATCH] x86: add INSN_GPR_TO_XMM for floating point immediate values using SSE
Signed-off-by: Arthur HUILLET arthur.huil...@free.fr
---
arch/x86/emit-code.c|9 +
arch/x86/include/arch/instruction.h |1 +
arch/x86/insn-selector_32.brg | 13 +++--
arch/x86/lir-printer.c |7 +++
arch/x86/use-def.c |1 +
5 files changed, 29 insertions(+), 2 deletions(-)
diff --git a/arch/x86/emit-code.c b/arch/x86/emit-code.c
index 88ec334..dfc92ca 100644
--- a/arch/x86/emit-code.c
+++ b/arch/x86/emit-code.c
@@ -1091,6 +1091,14 @@ static void emit_exception_test(struct buffer *buf, enum
machine_reg reg)
__emit_test_membase_reg(buf, reg, 0, reg);
}
+static void emit_gpr_to_xmm(struct buffer *buf, struct operand *src,
+ struct operand *dest)
+{
+ emit(buf, 0xf3);
+ emit(buf, 0x0f);
+ emit_reg_reg(buf, 0x2a, dest, src);
+}
+
struct emitter emitters[] = {
GENERIC_X86_EMITTERS,
DECL_EMITTER(INSN_ADC_IMM_REG, emit_adc_imm_reg, TWO_OPERANDS),
@@ -1108,6 +1116,7 @@ struct emitter emitters[] = {
DECL_EMITTER(INSN_CMP_REG_REG, emit_cmp_reg_reg, TWO_OPERANDS),
DECL_EMITTER(INSN_DIV_MEMBASE_REG, emit_div_membase_reg, TWO_OPERANDS),
DECL_EMITTER(INSN_DIV_REG_REG, emit_div_reg_reg, TWO_OPERANDS),
+ DECL_EMITTER(INSN_GPR_TO_XMM, emit_gpr_to_xmm, TWO_OPERANDS),
DECL_EMITTER(INSN_MOV_IMM_MEMBASE, emit_mov_imm_membase, TWO_OPERANDS),
DECL_EMITTER(INSN_MOV_IMM_REG, emit_mov_imm_reg, TWO_OPERANDS),
DECL_EMITTER(INSN_MOV_MEMLOCAL_REG, emit_mov_memlocal_reg,
TWO_OPERANDS),
diff --git a/arch/x86/include/arch/instruction.h
b/arch/x86/include/arch/instruction.h
index 0bee5a9..ebaeea3 100644
--- a/arch/x86/include/arch/instruction.h
+++ b/arch/x86/include/arch/instruction.h
@@ -70,6 +70,7 @@ enum insn_type {
INSN_CMP_REG_REG,
INSN_DIV_MEMBASE_REG,
INSN_DIV_REG_REG,
+ INSN_GPR_TO_XMM,
INSN_JE_BRANCH,
INSN_JGE_BRANCH,
INSN_JG_BRANCH,
diff --git a/arch/x86/insn-selector_32.brg b/arch/x86/insn-selector_32.brg
index ed1334f..655a10a 100644
--- a/arch/x86/insn-selector_32.brg
+++ b/arch/x86/insn-selector_32.brg
@@ -144,8 +144,17 @@ static enum insn_type br_binop_to_insn_type(enum
binary_operator binop)
reg: EXPR_FVALUE 0
{
- NOT_IMPLEMENTED;
- state-reg1 = get_var(s-b_parent);
+ struct expression *expr;
+ struct var_info *result, *gpr;
+
+ expr = to_expr(tree);
+
+ gpr = get_var(s-b_parent);
+ result = get_fpu_var(s-b_parent);
+ state-reg1 = result;
+
+ select_insn(s, tree, imm_reg_insn(INSN_MOV_IMM_REG,
float_to_uint32(expr-fvalue), gpr));
+ select_insn(s, tree, reg_reg_insn(INSN_GPR_TO_XMM, gpr, result));
}
reg: EXPR_VALUE 0
diff --git a/arch/x86/lir-printer.c b/arch/x86/lir-printer.c
index 7f5558d..96b19db 100644
--- a/arch/x86/lir-printer.c
+++ b/arch/x86/lir-printer.c
@@ -274,6 +274,12 @@ static int print_div_reg_reg(struct string *str, struct
insn *insn)
return print_reg_reg(str, insn);
}
+static int print_gpr_to_xmm(struct string *str, struct insn *insn)
+{
+ print_func_name(str);
+ return print_reg_reg(str, insn);
+}
+
static int print_je_branch(struct string *str, struct insn *insn)
{
print_func_name(str);
@@ -563,6 +569,7 @@ static print_insn_fn insn_printers[] = {
[INSN_CMP_REG_REG] = print_cmp_reg_reg,
[INSN_DIV_MEMBASE_REG] = print_div_membase_reg,
[INSN_DIV_REG_REG] = print_div_reg_reg,
+ [INSN_GPR_TO_XMM] = print_gpr_to_xmm,
[INSN_JE_BRANCH] = print_je_branch,
[INSN_JGE_BRANCH] = print_jge_branch,
[INSN_JG_BRANCH] = print_jg_branch,
diff --git a/arch/x86/use-def.c b/arch/x86/use-def.c
index f077f91..88a0c4f 100644
--- a/arch/x86/use-def.c
+++ b/arch/x86/use-def.c
@@ -45,6 +45,7 @@ static struct insn_info insn_infos[] = {
DECLARE_INFO(INSN_CMP_MEMBASE_REG, USE_SRC | DEF_DST),
DECLARE_INFO(INSN_DIV_MEMBASE_REG, USE_SRC | DEF_DST | DEF_EAX |
DEF_EDX),
DECLARE_INFO(INSN_DIV_REG_REG, USE_SRC | DEF_DST | DEF_EAX | DEF_EDX),
+ DECLARE_INFO(INSN_GPR_TO_XMM, USE_SRC | DEF_DST),
DECLARE_INFO(INSN_JE_BRANCH, USE_NONE | DEF_NONE),
DECLARE_INFO(INSN_JGE_BRANCH, USE_NONE | DEF_NONE),
DECLARE_INFO(INSN_JG_BRANCH, USE_NONE | DEF_NONE),
--
1.6.3.2
--
___
Jatovm-devel mailing list
Jatovm-devel@lists.sourceforge.net
https://lists.sourceforge.net/lists/listinfo/jatovm-devel
[PATCH] x86: implement i2b conversion
Signed-off-by: Arthur HUILLET arthur.huil...@free.fr
---
arch/x86/emit-code.c|8
arch/x86/include/arch/instruction.h |1 +
arch/x86/insn-selector_32.brg |5 +
arch/x86/lir-printer.c |8
arch/x86/use-def.c |1 +
regression/jvm/ConversionTest.java | 15 +++
test/arch-x86/emit-code-test_32.c |5 +
7 files changed, 43 insertions(+), 0 deletions(-)
diff --git a/arch/x86/emit-code.c b/arch/x86/emit-code.c
index 3033adb..5798867 100644
--- a/arch/x86/emit-code.c
+++ b/arch/x86/emit-code.c
@@ -508,6 +508,13 @@ static void emit_mov_reg_reg(struct buffer *buf, struct
operand *src,
__emit_mov_reg_reg(buf, mach_reg(src-reg), mach_reg(dest-reg));
}
+static void emit_movsx_reg_reg(struct buffer *buf, struct operand *src,
+struct operand *dest)
+{
+ emit(buf, 0x0f);
+ __emit_reg_reg(buf, 0xbe, mach_reg(dest-reg), mach_reg(src-reg));
+}
+
static void
emit_mov_memlocal_reg(struct buffer *buf, struct operand *src, struct operand
*dest)
{
@@ -1027,6 +1034,7 @@ struct emitter emitters[] = {
DECL_EMITTER(INSN_MOV_REG_MEMINDEX, emit_mov_reg_memindex,
TWO_OPERANDS),
DECL_EMITTER(INSN_MOV_REG_MEMLOCAL, emit_mov_reg_memlocal,
TWO_OPERANDS),
DECL_EMITTER(INSN_MOV_REG_REG, emit_mov_reg_reg, TWO_OPERANDS),
+ DECL_EMITTER(INSN_MOVSX_REG_REG, emit_movsx_reg_reg, TWO_OPERANDS),
DECL_EMITTER(INSN_MUL_MEMBASE_EAX, emit_mul_membase_eax, TWO_OPERANDS),
DECL_EMITTER(INSN_MUL_REG_EAX, emit_mul_reg_eax, TWO_OPERANDS),
DECL_EMITTER(INSN_MUL_REG_REG, emit_mul_reg_reg, TWO_OPERANDS),
diff --git a/arch/x86/include/arch/instruction.h
b/arch/x86/include/arch/instruction.h
index 8355a63..9dd5e3c 100644
--- a/arch/x86/include/arch/instruction.h
+++ b/arch/x86/include/arch/instruction.h
@@ -87,6 +87,7 @@ enum insn_type {
INSN_MOV_REG_MEMINDEX,
INSN_MOV_REG_MEMLOCAL,
INSN_MOV_REG_REG,
+ INSN_MOVSX_REG_REG,
INSN_MUL_MEMBASE_EAX,
INSN_MUL_REG_EAX,
INSN_MUL_REG_REG,
diff --git a/arch/x86/insn-selector_32.brg b/arch/x86/insn-selector_32.brg
index bbe0f9e..96316b7 100644
--- a/arch/x86/insn-selector_32.brg
+++ b/arch/x86/insn-selector_32.brg
@@ -930,7 +930,12 @@ reg: EXPR_CONVERSION(reg)
select_insn(s, tree, imm_reg_insn(INSN_SAR_IMM_REG, 0x1f,
state-reg2));
} else if (src-vm_type == J_LONG expr-vm_type == J_INT) {
state-reg1 = state-left-reg1;
+ } else if (src-vm_type == J_INT expr-vm_type == J_BYTE) {
+ state-reg1 = get_var(s-b_parent);
+
+ select_insn(s, tree, reg_reg_insn(INSN_MOVSX_REG_REG,
state-left-reg1, state-reg1));
} else {
+ printf(%d to %d\n, src-vm_type, expr-vm_type);
assert(!conversion not implemented);
}
}
diff --git a/arch/x86/lir-printer.c b/arch/x86/lir-printer.c
index 31c89f6..8b4bc7f 100644
--- a/arch/x86/lir-printer.c
+++ b/arch/x86/lir-printer.c
@@ -354,6 +354,13 @@ static int print_mov_reg_reg(struct string *str, struct
insn *insn)
return print_reg_reg(str, insn);
}
+static int print_movsx_reg_reg(struct string *str, struct insn *insn)
+{
+ print_func_name(str);
+ print_reg_reg(str, insn);
+ return str_append(str, (8bit-32bit));
+}
+
static int print_mul_membase_eax(struct string *str, struct insn *insn)
{
print_func_name(str);
@@ -533,6 +540,7 @@ static print_insn_fn insn_printers[] = {
[INSN_MOV_REG_MEMINDEX] = print_mov_reg_memindex,
[INSN_MOV_REG_MEMLOCAL] = print_mov_reg_memlocal,
[INSN_MOV_REG_REG] = print_mov_reg_reg,
+ [INSN_MOVSX_REG_REG] = print_movsx_reg_reg,
[INSN_MUL_MEMBASE_EAX] = print_mul_membase_eax,
[INSN_MUL_REG_EAX] = print_mul_reg_eax,
[INSN_MUL_REG_REG] = print_mul_reg_reg,
diff --git a/arch/x86/use-def.c b/arch/x86/use-def.c
index 38a4ef4..12e4720 100644
--- a/arch/x86/use-def.c
+++ b/arch/x86/use-def.c
@@ -61,6 +61,7 @@ static struct insn_info insn_infos[] = {
DECLARE_INFO(INSN_MOV_REG_MEMINDEX, USE_SRC | USE_DST | USE_IDX_DST |
DEF_NONE),
DECLARE_INFO(INSN_MOV_REG_MEMLOCAL, USE_SRC),
DECLARE_INFO(INSN_MOV_REG_REG, USE_SRC | DEF_DST),
+ DECLARE_INFO(INSN_MOVSX_REG_REG, USE_SRC | DEF_DST),
DECLARE_INFO(INSN_MUL_MEMBASE_EAX, USE_SRC | DEF_DST | DEF_EDX |
DEF_EAX),
DECLARE_INFO(INSN_MUL_REG_EAX, USE_SRC | DEF_DST | DEF_EDX | DEF_EAX),
DECLARE_INFO(INSN_MUL_REG_REG, USE_SRC | DEF_DST),
diff --git a/regression/jvm/ConversionTest.java
b/regression/jvm/ConversionTest.java
index ee75b5c..ac5ccc2 100644
--- a/regression/jvm/ConversionTest.java
+++ b/regression/jvm/ConversionTest.java
@@ -51,9 +51,24 @@ public class ConversionTest extends TestCase {
assertEquals(-1L, i2l(c));
}
+public static byte i2b(int value) {
+return (byte
[PATCH] x86: implement i2b conversion
Signed-off-by: Arthur HUILLET arthur.huil...@free.fr
---
Hi,
this is the updated, working version.
Please merge.
Sorry for screwing up.
arch/x86/emit-code.c|8
arch/x86/include/arch/instruction.h |1 +
arch/x86/insn-selector_32.brg |5 +
arch/x86/lir-printer.c |8
arch/x86/use-def.c |1 +
regression/jvm/ConversionTest.java | 15 +++
test/arch-x86/emit-code-test_32.c |5 +
7 files changed, 43 insertions(+), 0 deletions(-)
diff --git a/arch/x86/emit-code.c b/arch/x86/emit-code.c
index 3033adb..5798867 100644
--- a/arch/x86/emit-code.c
+++ b/arch/x86/emit-code.c
@@ -508,6 +508,13 @@ static void emit_mov_reg_reg(struct buffer *buf, struct
operand *src,
__emit_mov_reg_reg(buf, mach_reg(src-reg), mach_reg(dest-reg));
}
+static void emit_movsx_reg_reg(struct buffer *buf, struct operand *src,
+struct operand *dest)
+{
+ emit(buf, 0x0f);
+ __emit_reg_reg(buf, 0xbe, mach_reg(dest-reg), mach_reg(src-reg));
+}
+
static void
emit_mov_memlocal_reg(struct buffer *buf, struct operand *src, struct operand
*dest)
{
@@ -1027,6 +1034,7 @@ struct emitter emitters[] = {
DECL_EMITTER(INSN_MOV_REG_MEMINDEX, emit_mov_reg_memindex,
TWO_OPERANDS),
DECL_EMITTER(INSN_MOV_REG_MEMLOCAL, emit_mov_reg_memlocal,
TWO_OPERANDS),
DECL_EMITTER(INSN_MOV_REG_REG, emit_mov_reg_reg, TWO_OPERANDS),
+ DECL_EMITTER(INSN_MOVSX_REG_REG, emit_movsx_reg_reg, TWO_OPERANDS),
DECL_EMITTER(INSN_MUL_MEMBASE_EAX, emit_mul_membase_eax, TWO_OPERANDS),
DECL_EMITTER(INSN_MUL_REG_EAX, emit_mul_reg_eax, TWO_OPERANDS),
DECL_EMITTER(INSN_MUL_REG_REG, emit_mul_reg_reg, TWO_OPERANDS),
diff --git a/arch/x86/include/arch/instruction.h
b/arch/x86/include/arch/instruction.h
index 8355a63..9dd5e3c 100644
--- a/arch/x86/include/arch/instruction.h
+++ b/arch/x86/include/arch/instruction.h
@@ -87,6 +87,7 @@ enum insn_type {
INSN_MOV_REG_MEMINDEX,
INSN_MOV_REG_MEMLOCAL,
INSN_MOV_REG_REG,
+ INSN_MOVSX_REG_REG,
INSN_MUL_MEMBASE_EAX,
INSN_MUL_REG_EAX,
INSN_MUL_REG_REG,
diff --git a/arch/x86/insn-selector_32.brg b/arch/x86/insn-selector_32.brg
index bbe0f9e..96316b7 100644
--- a/arch/x86/insn-selector_32.brg
+++ b/arch/x86/insn-selector_32.brg
@@ -930,7 +930,12 @@ reg: EXPR_CONVERSION(reg)
select_insn(s, tree, imm_reg_insn(INSN_SAR_IMM_REG, 0x1f,
state-reg2));
} else if (src-vm_type == J_LONG expr-vm_type == J_INT) {
state-reg1 = state-left-reg1;
+ } else if (src-vm_type == J_INT expr-vm_type == J_BYTE) {
+ state-reg1 = get_var(s-b_parent);
+
+ select_insn(s, tree, reg_reg_insn(INSN_MOVSX_REG_REG,
state-left-reg1, state-reg1));
} else {
+ printf(%d to %d\n, src-vm_type, expr-vm_type);
assert(!conversion not implemented);
}
}
diff --git a/arch/x86/lir-printer.c b/arch/x86/lir-printer.c
index 31c89f6..8b4bc7f 100644
--- a/arch/x86/lir-printer.c
+++ b/arch/x86/lir-printer.c
@@ -354,6 +354,13 @@ static int print_mov_reg_reg(struct string *str, struct
insn *insn)
return print_reg_reg(str, insn);
}
+static int print_movsx_reg_reg(struct string *str, struct insn *insn)
+{
+ print_func_name(str);
+ print_reg_reg(str, insn);
+ return str_append(str, (8bit-32bit));
+}
+
static int print_mul_membase_eax(struct string *str, struct insn *insn)
{
print_func_name(str);
@@ -533,6 +540,7 @@ static print_insn_fn insn_printers[] = {
[INSN_MOV_REG_MEMINDEX] = print_mov_reg_memindex,
[INSN_MOV_REG_MEMLOCAL] = print_mov_reg_memlocal,
[INSN_MOV_REG_REG] = print_mov_reg_reg,
+ [INSN_MOVSX_REG_REG] = print_movsx_reg_reg,
[INSN_MUL_MEMBASE_EAX] = print_mul_membase_eax,
[INSN_MUL_REG_EAX] = print_mul_reg_eax,
[INSN_MUL_REG_REG] = print_mul_reg_reg,
diff --git a/arch/x86/use-def.c b/arch/x86/use-def.c
index 38a4ef4..12e4720 100644
--- a/arch/x86/use-def.c
+++ b/arch/x86/use-def.c
@@ -61,6 +61,7 @@ static struct insn_info insn_infos[] = {
DECLARE_INFO(INSN_MOV_REG_MEMINDEX, USE_SRC | USE_DST | USE_IDX_DST |
DEF_NONE),
DECLARE_INFO(INSN_MOV_REG_MEMLOCAL, USE_SRC),
DECLARE_INFO(INSN_MOV_REG_REG, USE_SRC | DEF_DST),
+ DECLARE_INFO(INSN_MOVSX_REG_REG, USE_SRC | DEF_DST),
DECLARE_INFO(INSN_MUL_MEMBASE_EAX, USE_SRC | DEF_DST | DEF_EDX |
DEF_EAX),
DECLARE_INFO(INSN_MUL_REG_EAX, USE_SRC | DEF_DST | DEF_EDX | DEF_EAX),
DECLARE_INFO(INSN_MUL_REG_REG, USE_SRC | DEF_DST),
diff --git a/regression/jvm/ConversionTest.java
b/regression/jvm/ConversionTest.java
index ee75b5c..ac5ccc2 100644
--- a/regression/jvm/ConversionTest.java
+++ b/regression/jvm/ConversionTest.java
@@ -51,9 +51,24 @@ public class ConversionTest extends TestCase
[PATCH] regression: add PrintTest test
Signed-off-by: Arthur HUILLET arthur.huil...@free.fr
---
Hi,
this patch adds a PrintTest regression test - for now the only thing
enabled is a write call
because that's the only working thing. :)
Makefile |3 ++-
regression/jvm/PrintTest.java | 39 +++
2 files changed, 41 insertions(+), 1 deletions(-)
create mode 100644 regression/jvm/PrintTest.java
diff --git a/Makefile b/Makefile
index 1d39741..30085da 100644
--- a/Makefile
+++ b/Makefile
@@ -228,7 +228,8 @@ REGRESSION_TEST_SUITE_CLASSES = \
regression/jvm/RegisterAllocatorTortureTest.class \
regression/jvm/ExceptionsTest.class \
regression/jvm/FibonacciTest.class \
- regression/jvm/ObjectStackTest.class
+ regression/jvm/ObjectStackTest.class \
+ regression/jvm/PrintTest.class
lib: $(CLASSPATH_CONFIG)
make -C lib/ JAVAC=$(JAVAC) GLIBJ=$(GLIBJ)
diff --git a/regression/jvm/PrintTest.java b/regression/jvm/PrintTest.java
new file mode 100644
index 000..898d256
--- /dev/null
+++ b/regression/jvm/PrintTest.java
@@ -0,0 +1,39 @@
+/*
+ * Copyright (C) 2009 Pekka Enberg
+ *
+ * This file is released under the GPL version 2 with the following
+ * clarification and special exception:
+ *
+ * Linking this library statically or dynamically with other modules is
+ * making a combined work based on this library. Thus, the terms and
+ * conditions of the GNU General Public License cover the whole
+ * combination.
+ *
+ * As a special exception, the copyright holders of this library give you
+ * permission to link this library with independent modules to produce an
+ * executable, regardless of the license terms of these independent
+ * modules, and to copy and distribute the resulting executable under terms
+ * of your choice, provided that you also meet, for each linked independent
+ * module, the terms and conditions of the license of that module. An
+ * independent module is a module which is not derived from or based on
+ * this library. If you modify this library, you may extend this exception
+ * to your version of the library, but you are not obligated to do so. If
+ * you do not wish to do so, delete this exception statement from your
+ * version.
+ *
+ * Please refer to the file LICENSE for details.
+ */
+package jvm;
+
+/**
+ * @author Arthur Huillet
+ */
+public class PrintTest extends TestCase {
+public static void main(String[] args) {
+
+ System.out.write(4);
+// System.out.flush();
+// System.out.println(hehehe\n);
+exit();
+}
+}
--
1.6.2.2
--
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[PATCH] regression: add PrintTest test
Signed-off-by: Arthur HUILLET arthur.huil...@free.fr
---
This patch works, please merge.
Makefile |3 ++-
regression/jvm/PrintTest.java | 39 +++
regression/run-suite.sh |1 +
3 files changed, 42 insertions(+), 1 deletions(-)
create mode 100644 regression/jvm/PrintTest.java
diff --git a/Makefile b/Makefile
index 1d39741..30085da 100644
--- a/Makefile
+++ b/Makefile
@@ -228,7 +228,8 @@ REGRESSION_TEST_SUITE_CLASSES = \
regression/jvm/RegisterAllocatorTortureTest.class \
regression/jvm/ExceptionsTest.class \
regression/jvm/FibonacciTest.class \
- regression/jvm/ObjectStackTest.class
+ regression/jvm/ObjectStackTest.class \
+ regression/jvm/PrintTest.class
lib: $(CLASSPATH_CONFIG)
make -C lib/ JAVAC=$(JAVAC) GLIBJ=$(GLIBJ)
diff --git a/regression/jvm/PrintTest.java b/regression/jvm/PrintTest.java
new file mode 100644
index 000..898d256
--- /dev/null
+++ b/regression/jvm/PrintTest.java
@@ -0,0 +1,39 @@
+/*
+ * Copyright (C) 2009 Pekka Enberg
+ *
+ * This file is released under the GPL version 2 with the following
+ * clarification and special exception:
+ *
+ * Linking this library statically or dynamically with other modules is
+ * making a combined work based on this library. Thus, the terms and
+ * conditions of the GNU General Public License cover the whole
+ * combination.
+ *
+ * As a special exception, the copyright holders of this library give you
+ * permission to link this library with independent modules to produce an
+ * executable, regardless of the license terms of these independent
+ * modules, and to copy and distribute the resulting executable under terms
+ * of your choice, provided that you also meet, for each linked independent
+ * module, the terms and conditions of the license of that module. An
+ * independent module is a module which is not derived from or based on
+ * this library. If you modify this library, you may extend this exception
+ * to your version of the library, but you are not obligated to do so. If
+ * you do not wish to do so, delete this exception statement from your
+ * version.
+ *
+ * Please refer to the file LICENSE for details.
+ */
+package jvm;
+
+/**
+ * @author Arthur Huillet
+ */
+public class PrintTest extends TestCase {
+public static void main(String[] args) {
+
+ System.out.write(4);
+// System.out.flush();
+// System.out.println(hehehe\n);
+exit();
+}
+}
diff --git a/regression/run-suite.sh b/regression/run-suite.sh
index cd75b50..06105ee 100755
--- a/regression/run-suite.sh
+++ b/regression/run-suite.sh
@@ -67,6 +67,7 @@ if [ -z $CLASS_LIST ]; then
run_java jvm.ObjectStackTest 0
run_java jvm.ExceptionsTest 0
run_java jvm.FibonacciTest 0
+run_java jvm.PrintTest 0
else
for i in $CLASS_LIST; do
run_java $i 0
--
1.6.2.2
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[PATCH] x86: add OP_MUL(reg, reg)
It is necessary for System.out.println to work.
Signed-off-by: Arthur HUILLET arthur.huil...@free.fr
---
arch/x86/insn-selector_32.brg |7 +++
1 files changed, 7 insertions(+), 0 deletions(-)
diff --git a/arch/x86/insn-selector_32.brg b/arch/x86/insn-selector_32.brg
index 96316b7..63ed31b 100644
--- a/arch/x86/insn-selector_32.brg
+++ b/arch/x86/insn-selector_32.brg
@@ -278,6 +278,13 @@ reg: OP_MUL(reg, EXPR_LOCAL) 1
__binop_reg_local(state, s, tree, INSN_MUL_MEMBASE_EAX, eax, 0);
}
+reg: OP_MUL(reg, reg) 1
+{
+ state-reg1 = get_var(s-b_parent);
+
+ select_insn(s, tree, reg_reg_insn(INSN_MUL_REG_REG, state-left-reg1,
state-reg1));
+}
+
reg: OP_MUL_64(reg, reg) 1
{
struct var_info *eax, *edx, *tmp1;
--
1.6.2.2
--
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[PATCH] run-suite: fix missing $JAVA_OPTS on cmdline
Signed-off-by: Arthur HUILLET arthur.huil...@free.fr
---
regression/run-suite.sh |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/regression/run-suite.sh b/regression/run-suite.sh
index 4b89769..f5b7625 100755
--- a/regression/run-suite.sh
+++ b/regression/run-suite.sh
@@ -10,7 +10,7 @@ function run_java {
CLASSPATH_INSTALL_DIR=`../tools/classpath-config`
GLIBJ=$CLASSPATH_INSTALL_DIR/share/classpath/glibj.zip
- $GDB ../jato -cp $PWD:$GLIBJ $JAVA_CLASS
+ $GDB ../jato $JAVA_OPTS -cp $PWD:$GLIBJ $JAVA_CLASS
ACTUAL=$?
--
1.6.2.2
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[PATCH] bc2ir: fix refcount bug in spill_expression
Signed-off-by: Arthur HUILLET arthur.huil...@free.fr --- jit/bytecode-to-ir.c |2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/jit/bytecode-to-ir.c b/jit/bytecode-to-ir.c index 76fd5a4..862a335 100644 --- a/jit/bytecode-to-ir.c +++ b/jit/bytecode-to-ir.c @@ -143,7 +143,7 @@ static int spill_expression(struct basic_block *bb, * And add a reload expression that is put on the mimic stack of * successor basic blocks. */ - stack_push(reload_stack, tmp); + stack_push(reload_stack, expr_get(tmp)); return 0; } -- 1.6.2.2 -- ___ Jatovm-devel mailing list Jatovm-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/jatovm-devel
[PATCH 1/2] jit: add predecessors to basic block structure
The list of predecessors is not set yet, this is just the
infrastructure.
Signed-off-by: Arthur HUILLET arthur.huil...@free.fr
---
include/jit/basic-block.h |2 ++
jit/basic-block.c | 32 +++-
jit/trace-jit.c | 23 +++
test/jit/basic-block-assert.h | 22 +-
4 files changed, 61 insertions(+), 18 deletions(-)
diff --git a/include/jit/basic-block.h b/include/jit/basic-block.h
index b555d9e..4919c95 100644
--- a/include/jit/basic-block.h
+++ b/include/jit/basic-block.h
@@ -24,6 +24,8 @@ struct basic_block {
unsigned long br_target_off;/* Branch target offset in bytecode
insns. */
unsigned long nr_successors;
struct basic_block **successors;
+ unsigned long nr_predecessors;
+ struct basic_block **predecessors;
unsigned long mach_offset;
/* The mimic stack is used to simulate JVM operand stack at
diff --git a/jit/basic-block.c b/jit/basic-block.c
index 22b102a..df984eb 100644
--- a/jit/basic-block.c
+++ b/jit/basic-block.c
@@ -76,6 +76,7 @@ void free_basic_block(struct basic_block *bb)
free_stmt_list(bb-stmt_list);
free_insn_list(bb-insn_list);
free(bb-successors);
+ free(bb-predecessors);
free(bb-use_set);
free(bb-def_set);
free(bb-live_in_set);
@@ -112,6 +113,9 @@ struct basic_block *bb_split(struct basic_block *orig_bb,
unsigned long offset)
new_bb-nr_successors = orig_bb-nr_successors;
orig_bb-nr_successors = 0;
+ new_bb-predecessors = NULL;
+ new_bb-nr_predecessors = 0;
+
if (orig_bb-has_branch) {
orig_bb-has_branch = false;
new_bb-has_branch = true;
@@ -142,25 +146,35 @@ void bb_add_insn(struct basic_block *bb, struct insn
*insn)
list_add_tail(insn-insn_list_node, bb-insn_list);
}
-int bb_add_successor(struct basic_block *bb, struct basic_block *successor)
+int __bb_add_neighbor(struct basic_block *new, struct basic_block ***array,
unsigned long *nb)
{
- int new_size;
- struct basic_block **new_successors;
+ unsigned long new_size;
+ struct basic_block **new_neighbors;
- new_size = sizeof(struct basic_block *) * (bb-nr_successors + 1);
+ new_size = sizeof(struct basic_block *) * (*nb + 1);
- new_successors = realloc(bb-successors, new_size);
- if (new_successors == NULL)
+ new_neighbors = realloc(*array, new_size);
+ if (new_neighbors == NULL)
return -ENOMEM;
- bb-successors = new_successors;
+ *array = new_neighbors;
- bb-successors[bb-nr_successors] = successor;
- bb-nr_successors++;
+ (*array)[*nb] = new;
+ (*nb)++;
return 0;
}
+int bb_add_successor(struct basic_block *bb, struct basic_block *successor)
+{
+ return __bb_add_neighbor(successor, bb-successors,
bb-nr_successors);
+}
+
+int bb_add_predecessor(struct basic_block *bb, struct basic_block *predecessor)
+{
+ return __bb_add_neighbor(predecessor, bb-predecessors,
bb-nr_predecessors);
+}
+
unsigned char *bb_native_ptr(struct basic_block *bb)
{
return buffer_ptr(bb-b_parent-objcode) + bb-mach_offset;
diff --git a/jit/trace-jit.c b/jit/trace-jit.c
index c11a896..feb23d8 100644
--- a/jit/trace-jit.c
+++ b/jit/trace-jit.c
@@ -54,7 +54,7 @@ void trace_cfg(struct compilation_unit *cu)
struct basic_block *bb;
printf(Control Flow Graph:\n\n);
- printf( #:\t\tRange\t\tSuccessors\n);
+ printf( #:\t\tRange\t\tSuccessors\t\tPredecessors\n);
for_each_basic_block(bb, cu-bb_list) {
unsigned long i;
@@ -63,15 +63,30 @@ void trace_cfg(struct compilation_unit *cu)
if (bb-is_eh)
printf( (eh));
+ printf(\t);
+
for (i = 0; i bb-nr_successors; i++) {
- if (i == 0)
- printf(\t);
- else
+ if (i != 0)
printf(, );
printf(%p, bb-successors[i]);
}
+ if (i == 0)
+ printf(none);
+
+ printf(\t);
+
+ for (i = 0; i bb-nr_predecessors; i++) {
+ if (i != 0)
+ printf(, );
+
+ printf(%p, bb-predecessors[i]);
+ }
+
+ if (i == 0)
+ printf(none);
+
printf(\n);
}
diff --git a/test/jit/basic-block-assert.h b/test/jit/basic-block-assert.h
index 8f00672..abec84c 100644
--- a/test/jit/basic-block-assert.h
+++ b/test/jit/basic-block-assert.h
@@ -12,16 +12,28 @@ static void inline assert_basic_block(struct
compilation_unit *parent,
assert_int_equals(end, bb-end);
}
+static void inline __assert_bb_neighbors
[PATCH 2/2] jit: set up bb predecessors in bb_add_successor
Signed-off-by: Arthur HUILLET arthur.huil...@free.fr
---
jit/basic-block.c |1 +
1 files changed, 1 insertions(+), 0 deletions(-)
diff --git a/jit/basic-block.c b/jit/basic-block.c
index df984eb..5a4fa53 100644
--- a/jit/basic-block.c
+++ b/jit/basic-block.c
@@ -167,6 +167,7 @@ int __bb_add_neighbor(struct basic_block *new, struct
basic_block ***array, unsi
int bb_add_successor(struct basic_block *bb, struct basic_block *successor)
{
+ __bb_add_neighbor(bb, successor-predecessors,
successor-nr_predecessors);
return __bb_add_neighbor(successor, bb-successors,
bb-nr_successors);
}
--
1.6.2.2
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[PATCH 1/3] jit: add EXPR_MIMIC_STACK_SLOT and expr_set_type
This will be necessary for bc2ir to work.
Signed-off-by: Arthur HUILLET arthur.huil...@free.fr
---
include/jit/expression.h | 16
jit/expression.c | 12
jit/tree-printer.c | 11 +--
3 files changed, 37 insertions(+), 2 deletions(-)
diff --git a/include/jit/expression.h b/include/jit/expression.h
index 43b41c0..d771778 100644
--- a/include/jit/expression.h
+++ b/include/jit/expression.h
@@ -35,6 +35,7 @@ enum expression_type {
EXPR_NULL_CHECK,
EXPR_ARRAY_SIZE_CHECK,
EXPR_MULTIARRAY_SIZE_CHECK,
+ EXPR_MIMIC_STACK_SLOT,
EXPR_LAST, /* Not a real type. Keep this last. */
};
@@ -235,6 +236,13 @@ struct expression {
/* EXPR_ARRAY_SIZE_CHECK and EXPR_MULTIARRAY_SIZE_CHECK */
struct tree_node *size_expr;
+
+ /* EXPR_MIMIC_STACK_SLOT */
+ struct {
+ char entry;
+ int slotnb;
+ };
+
};
};
@@ -248,6 +256,13 @@ static inline enum expression_type expr_type(struct
expression *expr)
return (expr-node.op EXPR_TYPE_MASK) EXPR_TYPE_SHIFT;
}
+static inline void expr_set_type(struct expression *expr, int type)
+{
+ unsigned long op = expr-node.op ~EXPR_TYPE_MASK;
+ type = EXPR_TYPE_SHIFT;
+ expr-node.op = op | type;
+}
+
static inline enum binary_operator expr_bin_op(struct expression *expr)
{
return (expr-node.op OP_MASK) OP_SHIFT;
@@ -268,6 +283,7 @@ struct expression *value_expr(enum vm_type, unsigned long
long);
struct expression *fvalue_expr(enum vm_type, double);
struct expression *local_expr(enum vm_type, unsigned long);
struct expression *temporary_expr(enum vm_type, struct var_info *, struct
var_info *);
+struct expression *mimic_stack_expr(enum vm_type, int, int);
struct expression *array_deref_expr(enum vm_type, struct expression *, struct
expression *);
struct expression *binop_expr(enum vm_type, enum binary_operator, struct
expression *, struct expression *);
struct expression *unary_op_expr(enum vm_type, enum unary_operator, struct
expression *);
diff --git a/jit/expression.c b/jit/expression.c
index 8e4d736..a73217c 100644
--- a/jit/expression.c
+++ b/jit/expression.c
@@ -44,6 +44,7 @@ int expr_nr_kids(struct expression *expr)
case EXPR_NO_ARGS:
case EXPR_NEW:
case EXPR_EXCEPTION_REF:
+ case EXPR_MIMIC_STACK_SLOT:
return 0;
default:
assert(!Invalid expression type);
@@ -134,6 +135,17 @@ struct expression *temporary_expr(enum vm_type vm_type,
struct var_info *tmp_hig
return expr;
}
+struct expression *mimic_stack_expr(enum vm_type vm_type, int entry, int
slotnb)
+{
+ struct expression *expr = alloc_expression(EXPR_MIMIC_STACK_SLOT,
vm_type);
+ if (expr) {
+ expr-entry = entry;
+ expr-slotnb = slotnb;
+ }
+
+ return expr;
+}
+
struct expression *array_deref_expr(enum vm_type vm_type,
struct expression *arrayref,
struct expression *array_index)
diff --git a/jit/tree-printer.c b/jit/tree-printer.c
index c96c87b..7a8c32a 100644
--- a/jit/tree-printer.c
+++ b/jit/tree-printer.c
@@ -84,7 +84,7 @@ static int simple_expr(struct expression *expr)
return type == EXPR_VALUE || type == EXPR_FVALUE || type == EXPR_LOCAL
|| type == EXPR_TEMPORARY || type == EXPR_CLASS_FIELD
- || type == EXPR_NO_ARGS || type == EXPR_EXCEPTION_REF;
+ || type == EXPR_NO_ARGS || type == EXPR_EXCEPTION_REF || type ==
EXPR_MIMIC_STACK_SLOT;
}
static int __tree_print(int, struct tree_node *, struct string *);
@@ -355,6 +355,12 @@ static int print_temporary_expr(int lvl, struct string
*str,
expr-tmp_high, expr-tmp_low);
}
+static int print_mimic_stack_slot_expr(int lvl, struct string *str,
+ struct expression *expr)
+{
+ return str_append(str, [mimic stack slot %d at %s], expr-slotnb,
expr-entry ? entry : exit);
+}
+
static int print_array_deref_expr(int lvl, struct string *str,
struct expression *expr)
{
@@ -807,7 +813,8 @@ static print_expr_fn expr_printers[] = {
[EXPR_EXCEPTION_REF] = print_exception_ref_expr,
[EXPR_NULL_CHECK] = print_null_check_expr,
[EXPR_ARRAY_SIZE_CHECK] = print_array_size_check_expr,
- [EXPR_MULTIARRAY_SIZE_CHECK] = print_multiarray_size_check_expr
+ [EXPR_MULTIARRAY_SIZE_CHECK] = print_multiarray_size_check_expr,
+ [EXPR_MIMIC_STACK_SLOT] = print_mimic_stack_slot_expr,
};
--
1.6.2.2
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[PATCH] x86: add OP_AND(reg, reg)
It is necessary for System.out.println
Signed-off-by: Arthur HUILLET arthur.huil...@free.fr
---
arch/x86/emit-code.c|7 +++
arch/x86/include/arch/instruction.h |1 +
arch/x86/insn-selector_32.brg | 15 +++
arch/x86/lir-printer.c |7 +++
arch/x86/use-def.c |1 +
5 files changed, 31 insertions(+), 0 deletions(-)
diff --git a/arch/x86/emit-code.c b/arch/x86/emit-code.c
index d66d9f0..3033adb 100644
--- a/arch/x86/emit-code.c
+++ b/arch/x86/emit-code.c
@@ -759,6 +759,12 @@ static void emit_add_membase_reg(struct buffer *buf,
emit_membase_reg(buf, 0x03, src, dest);
}
+static void emit_and_reg_reg(struct buffer *buf,
+struct operand *src, struct operand *dest)
+{
+ emit_reg_reg(buf, 0x23, dest, src);
+}
+
static void emit_and_membase_reg(struct buffer *buf,
struct operand *src, struct operand *dest)
{
@@ -1003,6 +1009,7 @@ struct emitter emitters[] = {
DECL_EMITTER(INSN_ADD_MEMBASE_REG, emit_add_membase_reg, TWO_OPERANDS),
DECL_EMITTER(INSN_ADD_REG_REG, emit_add_reg_reg, TWO_OPERANDS),
DECL_EMITTER(INSN_AND_MEMBASE_REG, emit_and_membase_reg, TWO_OPERANDS),
+ DECL_EMITTER(INSN_AND_REG_REG, emit_and_reg_reg, TWO_OPERANDS),
DECL_EMITTER(INSN_CALL_REG, emit_indirect_call, SINGLE_OPERAND),
DECL_EMITTER(INSN_CLTD_REG_REG, emit_cltd_reg_reg, TWO_OPERANDS),
DECL_EMITTER(INSN_CMP_IMM_REG, emit_cmp_imm_reg, TWO_OPERANDS),
diff --git a/arch/x86/include/arch/instruction.h
b/arch/x86/include/arch/instruction.h
index 5e38144..8355a63 100644
--- a/arch/x86/include/arch/instruction.h
+++ b/arch/x86/include/arch/instruction.h
@@ -61,6 +61,7 @@ enum insn_type {
INSN_ADD_MEMBASE_REG,
INSN_ADD_REG_REG,
INSN_AND_MEMBASE_REG,
+ INSN_AND_REG_REG,
INSN_CALL_REG,
INSN_CALL_REL,
INSN_CLTD_REG_REG, /* CDQ in Intel manuals*/
diff --git a/arch/x86/insn-selector_32.brg b/arch/x86/insn-selector_32.brg
index fce1f50..bbe0f9e 100644
--- a/arch/x86/insn-selector_32.brg
+++ b/arch/x86/insn-selector_32.brg
@@ -432,6 +432,21 @@ reg: OP_AND(reg, EXPR_LOCAL) 1
}
}
+reg: OP_AND(reg, reg) 1
+{
+ struct expression *expr;
+
+ expr = to_expr(tree);
+
+ state-reg1 = state-left-reg1;
+ binop_reg_reg_low(state, s, tree, INSN_AND_REG_REG);
+
+ if (expr-vm_type == J_LONG) {
+ state-reg2 = state-left-reg2;
+ binop_reg_reg_high(state, s, tree, INSN_AND_REG_REG);
+ }
+}
+
reg: OP_XOR(reg, EXPR_LOCAL) 1
{
struct expression *expr;
diff --git a/arch/x86/lir-printer.c b/arch/x86/lir-printer.c
index 195f80e..31c89f6 100644
--- a/arch/x86/lir-printer.c
+++ b/arch/x86/lir-printer.c
@@ -196,6 +196,12 @@ static int print_and_membase_reg(struct string *str,
struct insn *insn)
return print_membase_reg(str, insn);
}
+static int print_and_reg_reg(struct string *str, struct insn *insn)
+{
+ print_func_name(str);
+ return print_reg_reg(str, insn);
+}
+
static int print_call_reg(struct string *str, struct insn *insn)
{
print_func_name(str);
@@ -501,6 +507,7 @@ static print_insn_fn insn_printers[] = {
[INSN_ADD_MEMBASE_REG] = print_add_membase_reg,
[INSN_ADD_REG_REG] = print_add_reg_reg,
[INSN_AND_MEMBASE_REG] = print_and_membase_reg,
+ [INSN_AND_REG_REG] = print_and_reg_reg,
[INSN_CALL_REG] = print_call_reg,
[INSN_CALL_REL] = print_call_rel,
[INSN_CLTD_REG_REG] = print_cltd_reg_reg, /* CDQ in Intel
manuals*/
diff --git a/arch/x86/use-def.c b/arch/x86/use-def.c
index 95342ad..38a4ef4 100644
--- a/arch/x86/use-def.c
+++ b/arch/x86/use-def.c
@@ -37,6 +37,7 @@ static struct insn_info insn_infos[] = {
DECLARE_INFO(INSN_ADD_MEMBASE_REG, USE_SRC | DEF_DST),
DECLARE_INFO(INSN_ADD_REG_REG, USE_SRC | DEF_DST),
DECLARE_INFO(INSN_AND_MEMBASE_REG, USE_SRC | DEF_DST),
+ DECLARE_INFO(INSN_AND_REG_REG, USE_SRC | DEF_DST),
DECLARE_INFO(INSN_CALL_REG, USE_SRC | DEF_EAX | DEF_ECX | DEF_EDX),
DECLARE_INFO(INSN_CALL_REL, USE_NONE | DEF_EAX | DEF_ECX | DEF_EDX),
DECLARE_INFO(INSN_CLTD_REG_REG, USE_SRC | DEF_SRC | DEF_DST),
--
1.6.2.2
--
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[PATCH] bc2ir: fix converters array out-of-bound access
---
jit/bytecode-to-ir.c |5 +
1 files changed, 5 insertions(+), 0 deletions(-)
diff --git a/jit/bytecode-to-ir.c b/jit/bytecode-to-ir.c
index 0ad607e..19a0c29 100644
--- a/jit/bytecode-to-ir.c
+++ b/jit/bytecode-to-ir.c
@@ -371,6 +371,11 @@ static int do_convert_bb_to_ir(struct basic_block *bb)
ctx.offset = ctx.buffer-pos; /* this is fragile */
ctx.opc = bytecode_read_u8(ctx.buffer);
+ if (ctx.opc = ARRAY_SIZE(converters)) {
+ err = -EINVAL;
+ break;
+ }
+
convert = converters[ctx.opc];
if (!convert) {
err = -EINVAL;
--
1.6.2.2
--
OpenSolaris 2009.06 is a cutting edge operating system for enterprises
looking to deploy the next generation of Solaris that includes the latest
innovations from Sun and the OpenSource community. Download a copy and
enjoy capabilities such as Networking, Storage and Virtualization.
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[PATCH] test_convert_goto: empty basic blocks need OPC_NOP
An empty basic block is a block of size 1, with a JVM NOP instruction.
Signed-off-by: Arthur HUILLET arthur.huil...@free.fr
---
test/jit/branch-bc-test.c |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/test/jit/branch-bc-test.c b/test/jit/branch-bc-test.c
index 5684c65..8477cab 100644
--- a/test/jit/branch-bc-test.c
+++ b/test/jit/branch-bc-test.c
@@ -150,7 +150,7 @@ void test_convert_goto(void)
struct basic_block *goto_bb, *target_bb;
struct statement *goto_stmt;
struct compilation_unit *cu;
- unsigned char code[] = { OPC_GOTO, 0, TARGET_OFFSET };
+ unsigned char code[] = { OPC_GOTO, 0, TARGET_OFFSET, OPC_NOP, OPC_NOP };
struct methodblock method = {
.jit_code = code,
.code_size = ARRAY_SIZE(code),
--
1.6.2.2
--
OpenSolaris 2009.06 is a cutting edge operating system for enterprises
looking to deploy the next generation of Solaris that includes the latest
innovations from Sun and the OpenSource community. Download a copy and
enjoy capabilities such as Networking, Storage and Virtualization.
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[PATCH] regression: fix building of ObjectStackTest
Signed-off-by: Arthur HUILLET arthur.huil...@free.fr
---
regression/jvm/ObjectStackTest.java |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/regression/jvm/ObjectStackTest.java
b/regression/jvm/ObjectStackTest.java
index f5afcbe..ee2184a 100644
--- a/regression/jvm/ObjectStackTest.java
+++ b/regression/jvm/ObjectStackTest.java
@@ -56,6 +56,6 @@ public class ObjectStackTest extends TestCase {
public static void main(String[] args) {
testObjectStackWhenBranching();
-Runtime.getRuntime().halt(retval);
+ exit();
}
}
--
1.6.2.2
--
OpenSolaris 2009.06 is a cutting edge operating system for enterprises
looking to deploy the next generation of Solaris that includes the latest
innovations from Sun and the OpenSource community. Download a copy and
enjoy capabilities such as Networking, Storage and Virtualization.
Go to: http://p.sf.net/sfu/opensolaris-get
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[PATCH] regression: enable all tests in PutstaticTest
They all work fine now.
Signed-off-by: Arthur HUILLET arthur.huil...@free.fr
---
regression/jvm/PutstaticTest.java |3 +--
1 files changed, 1 insertions(+), 2 deletions(-)
diff --git a/regression/jvm/PutstaticTest.java
b/regression/jvm/PutstaticTest.java
index faa162f..cbf9496 100644
--- a/regression/jvm/PutstaticTest.java
+++ b/regression/jvm/PutstaticTest.java
@@ -94,8 +94,7 @@ public class PutstaticTest extends TestCase {
testPutStaticLocalInt();
testPutStaticClassFieldLong();
testPutStaticConstLong();
-// FIXME:
-// testPutStaticInstanceFieldLong();
+testPutStaticInstanceFieldLong();
testPutStaticLocalLong();
Runtime.getRuntime().halt(retval);
--
1.6.2.2
--
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Check out the new simplified licensign option that enables unlimited
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[PATCH] x86: improve naming of multiplication operations in LIR
MUL_MEMBASE_REG and MUL_REG_REG have been renamed to MUL_*_EAX because
of the implicit eax operand of the x86 mul instruction.
MUL_REG_REG was introduced and emits the x86 imul instruction that
does not have implicit operands.
Signed-off-by: Arthur HUILLET arthur.huil...@free.fr
---
arch/x86/emit-code_32.c | 36
arch/x86/include/arch/instruction.h |4 ++-
arch/x86/insn-selector_32.brg |2 +-
arch/x86/use-def.c|4 ++-
test/arch-x86/emit-code-test_32.c |4 +-
test/arch-x86/insn-selector-test_32.c |2 +-
test/arch-x86/use-def-test_32.c |2 +-
7 files changed, 42 insertions(+), 12 deletions(-)
diff --git a/arch/x86/emit-code_32.c b/arch/x86/emit-code_32.c
index 3c9c528..83a3573 100644
--- a/arch/x86/emit-code_32.c
+++ b/arch/x86/emit-code_32.c
@@ -478,7 +478,7 @@ static void emit_sub_membase_reg(struct buffer *buf,
emit_membase_reg(buf, 0x2b, src, dest);
}
-static void __emit_div_mul_membase_reg(struct buffer *buf,
+static void __emit_div_mul_membase_eax(struct buffer *buf,
struct operand *src,
struct operand *dest,
unsigned char opc_ext)
@@ -500,10 +500,34 @@ static void __emit_div_mul_membase_reg(struct buffer *buf,
emit_imm(buf, disp);
}
-static void emit_mul_membase_reg(struct buffer *buf,
+static void __emit_div_mul_reg_eax(struct buffer *buf,
+ struct operand *src,
+ struct operand *dest,
+ unsigned char opc_ext)
+{
+ assert(mach_reg(dest-reg) == REG_EAX);
+
+ emit(buf, 0xf7);
+ emit(buf, encode_modrm(0x03, opc_ext, encode_reg(src-base_reg)));
+}
+
+static void emit_mul_membase_eax(struct buffer *buf,
struct operand *src, struct operand *dest)
{
- __emit_div_mul_membase_reg(buf, src, dest, 0x04);
+ __emit_div_mul_membase_eax(buf, src, dest, 0x04);
+}
+
+static void emit_mul_reg_eax(struct buffer *buf,
+struct operand *src, struct operand *dest)
+{
+ __emit_div_mul_reg_eax(buf, src, dest, 0x04);
+}
+
+static void emit_mul_reg_reg(struct buffer *buf,
+struct operand *src, struct operand *dest)
+{
+ emit(buf, 0x0f);
+ __emit_reg_reg(buf, 0xaf, mach_reg(dest-reg), mach_reg(src-reg));
}
static void emit_neg_reg(struct buffer *buf, struct operand *operand)
@@ -523,7 +547,7 @@ static void emit_cltd_reg_reg(struct buffer *buf, struct
operand *src, struct op
static void emit_div_membase_reg(struct buffer *buf, struct operand *src,
struct operand *dest)
{
- __emit_div_mul_membase_reg(buf, src, dest, 0x07);
+ __emit_div_mul_membase_eax(buf, src, dest, 0x07);
}
static void __emit_shift_reg_reg(struct buffer *buf,
@@ -769,7 +793,9 @@ static struct emitter emitters[] = {
DECL_EMITTER(INSN_MOV_REG_MEMINDEX, emit_mov_reg_memindex,
TWO_OPERANDS),
DECL_EMITTER(INSN_MOV_REG_MEMLOCAL, emit_mov_reg_memlocal,
TWO_OPERANDS),
DECL_EMITTER(INSN_MOV_REG_REG, emit_mov_reg_reg, TWO_OPERANDS),
- DECL_EMITTER(INSN_MUL_MEMBASE_REG, emit_mul_membase_reg, TWO_OPERANDS),
+ DECL_EMITTER(INSN_MUL_MEMBASE_EAX, emit_mul_membase_eax, TWO_OPERANDS),
+ DECL_EMITTER(INSN_MUL_REG_EAX, emit_mul_reg_eax, TWO_OPERANDS),
+ DECL_EMITTER(INSN_MUL_REG_REG, emit_mul_reg_reg, TWO_OPERANDS),
DECL_EMITTER(INSN_NEG_REG, emit_neg_reg, SINGLE_OPERAND),
DECL_EMITTER(INSN_OR_MEMBASE_REG, emit_or_membase_reg, TWO_OPERANDS),
DECL_EMITTER(INSN_OR_REG_REG, emit_or_reg_reg, TWO_OPERANDS),
diff --git a/arch/x86/include/arch/instruction.h
b/arch/x86/include/arch/instruction.h
index 5a09f19..b8ab850 100644
--- a/arch/x86/include/arch/instruction.h
+++ b/arch/x86/include/arch/instruction.h
@@ -84,7 +84,9 @@ enum insn_type {
INSN_MOV_REG_MEMINDEX,
INSN_MOV_REG_MEMLOCAL,
INSN_MOV_REG_REG,
- INSN_MUL_MEMBASE_REG,
+ INSN_MUL_MEMBASE_EAX,
+ INSN_MUL_REG_EAX,
+ INSN_MUL_REG_REG,
INSN_NEG_REG,
INSN_OR_MEMBASE_REG,
INSN_OR_REG_REG,
diff --git a/arch/x86/insn-selector_32.brg b/arch/x86/insn-selector_32.brg
index 2950c52..fa375c2 100644
--- a/arch/x86/insn-selector_32.brg
+++ b/arch/x86/insn-selector_32.brg
@@ -238,7 +238,7 @@ reg:OP_MUL(reg, EXPR_LOCAL) 1
state-reg1 = eax;
bb_add_insn(s, reg_reg_insn(INSN_MOV_REG_REG, state-left-reg1, eax));
- __binop_reg_local(state, s, tree, INSN_MUL_MEMBASE_REG, eax, 0);
+ __binop_reg_local(state, s, tree, INSN_MUL_MEMBASE_EAX, eax, 0);
}
reg: OP_DIV(reg, EXPR_LOCAL) 1
diff --git a/arch/x86/use-def.c b/arch/x86/use-def.c
index b1f3c43..d35b03d 100644
--- a/arch/x86/use-def.c
+++ b/arch/x86/use-def.c
[PATCH] Added support for LIR tracing. Implemented for x86.
Signed-off-by: Arthur HUILLET arthur.huil...@free.fr
---
Hi,
this patch adds a LIR tracer. It has only been implemented for x86 so I
assume you will have to tweak it a
bit before merging it upstream.
It seems to work fine here, so please apply.
arch/x86/Makefile_32|1 +
arch/x86/include/arch/lir-printer.h |8 +
arch/x86/lir-printer.c | 468 +++
include/jit/compiler.h |2 +
jit/compiler.c |3 +
jit/trace-jit.c | 25 ++
vm/jato.c |1 +
7 files changed, 508 insertions(+), 0 deletions(-)
create mode 100644 arch/x86/include/arch/lir-printer.h
create mode 100644 arch/x86/lir-printer.c
diff --git a/arch/x86/Makefile_32 b/arch/x86/Makefile_32
index d9bbd11..42d681c 100644
--- a/arch/x86/Makefile_32
+++ b/arch/x86/Makefile_32
@@ -3,6 +3,7 @@ ARCH_OBJS = \
arch/x86/emit-code_32.o \
arch/x86/instruction.o \
arch/x86/insn-selector_32.o \
+ arch/x86/lir-printer.o \
arch/x86/registers_32.o \
arch/x86/stack-frame.o \
arch/x86/use-def.o \
diff --git a/arch/x86/include/arch/lir-printer.h
b/arch/x86/include/arch/lir-printer.h
new file mode 100644
index 000..c4c9afc
--- /dev/null
+++ b/arch/x86/include/arch/lir-printer.h
@@ -0,0 +1,8 @@
+#ifndef __JIT_LIR_PRINTER_H
+#define __JIT_LIR_PRINTER_H
+
+#include arch/registers.h
+#include arch/stack-frame.h
+
+int lir_print(struct insn *, struct string *);
+#endif
diff --git a/arch/x86/lir-printer.c b/arch/x86/lir-printer.c
new file mode 100644
index 000..ac487ea
--- /dev/null
+++ b/arch/x86/lir-printer.c
@@ -0,0 +1,468 @@
+/*
+ * Copyright (c) 2009 Arthur Huillet
+ * Copyright (c) 2006-2008 Pekka Enberg
+ *
+ * This file is released under the GPL version 2 with the following
+ * clarification and special exception:
+ *
+ * Linking this library statically or dynamically with other modules is
+ * making a combined work based on this library. Thus, the terms and
+ * conditions of the GNU General Public License cover the whole
+ * combination.
+ *
+ * As a special exception, the copyright holders of this library give you
+ * permission to link this library with independent modules to produce an
+ * executable, regardless of the license terms of these independent
+ * modules, and to copy and distribute the resulting executable under terms
+ * of your choice, provided that you also meet, for each linked independent
+ * module, the terms and conditions of the license of that module. An
+ * independent module is a module which is not derived from or based on
+ * this library. If you modify this library, you may extend this exception
+ * to your version of the library, but you are not obligated to do so. If
+ * you do not wish to do so, delete this exception statement from your
+ * version.
+ *
+ * Please refer to the file LICENSE for details.
+ */
+
+#include jit/basic-block.h
+#include jit/statement.h
+#include jit/compilation-unit.h
+#include jit/compiler.h
+
+#include vm/list.h
+#include vm/buffer.h
+#include vm/method.h
+#include vm/string.h
+
+#include arch/emit-code.h
+#include arch/instruction.h
+#include arch/memory.h
+
+#include assert.h
+#include errno.h
+#include stdio.h
+#include stdlib.h
+#include stdbool.h
+#include string.h
+
+static inline int print_imm(struct string *str, struct operand *op)
+{
+ return str_append(str, $0x%lx, op-imm);
+}
+
+static inline int print_reg(struct string *str, struct operand *op)
+{
+ return str_append(str, r%lu, op-reg.interval-var_info-vreg);
+}
+
+static inline int print_membase(struct string *str, struct operand *op)
+{
+ return str_append(str, $0x%lx(r%lu), op-disp,
op-base_reg.interval-var_info-vreg);
+}
+
+static inline int print_memlocal(struct string *str, struct operand *op)
+{
+ return str_append(str, @%ld(bp), op-slot-index);
+}
+
+static inline int print_memindex(struct string *str, struct operand *op)
+{
+ return str_append(str, (r%lu, r%lu, %d),
op-base_reg.interval-var_info-vreg, op-index_reg.interval-var_info-vreg,
op-shift);
+}
+
+static inline int print_rel(struct string *str, struct operand *op)
+{
+ return str_append(str, $0x%lx, op-rel);
+}
+
+static inline int print_branch(struct string *str, struct operand *op)
+{
+ return str_append(str, bb 0x%lx, op-branch_target);
+}
+
+static int print_imm_reg(struct string *str, struct insn *insn)
+{
+ print_imm(str, insn-src);
+ str_append(str, , );
+ return print_reg(str, insn-dest);
+}
+
+static int print_membase_reg(struct string *str, struct insn *insn)
+{
+ print_membase(str, insn-src);
+ str_append(str, , );
+ return print_reg(str, insn-dest);
+}
+
+static int print_memlocal_reg(struct string *str, struct insn *insn
