Re: One reg interface for Timer register
On 04.02.2013, at 07:12, Bhushan Bharat-R65777 wrote: Hi Alex/Scott, Below is my understanding about the ONE_REG interface requirement for timer registers. Define the below 2 ONE_REG interface for TSR access: KVM_REG_SET_TSR, // Set the specified bits in TSR s/SET/OR/ KVM_REG_CLEAR_TSR, // Clear the specified bits in TSR QEMU will use the above ioctl call to selectively set/clear bits of TSR. Exactly :). We do not need the similar interface for TCR as there is no race issue with TCR. So for TCR QEMU will keep on using the SREGS interface. Good point, yes :). Alex -- To unsubscribe from this list: send the line unsubscribe kvm in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: One reg interface for Timer register
On 04.02.2013, at 07:12, Bhushan Bharat-R65777 wrote: Hi Alex/Scott, Below is my understanding about the ONE_REG interface requirement for timer registers. Define the below 2 ONE_REG interface for TSR access: KVM_REG_SET_TSR, // Set the specified bits in TSR s/SET/OR/ KVM_REG_CLEAR_TSR, // Clear the specified bits in TSR QEMU will use the above ioctl call to selectively set/clear bits of TSR. Exactly :). We do not need the similar interface for TCR as there is no race issue with TCR. So for TCR QEMU will keep on using the SREGS interface. Good point, yes :). Alex -- To unsubscribe from this list: send the line unsubscribe kvm-ppc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
One reg interface for Timer register
Hi Alex/Scott, Below is my understanding about the ONE_REG interface requirement for timer registers. Define the below 2 ONE_REG interface for TSR access: KVM_REG_SET_TSR, // Set the specified bits in TSR KVM_REG_CLEAR_TSR, // Clear the specified bits in TSR QEMU will use the above ioctl call to selectively set/clear bits of TSR. We do not need the similar interface for TCR as there is no race issue with TCR. So for TCR QEMU will keep on using the SREGS interface. Thanks -Bharat -- To unsubscribe from this list: send the line unsubscribe kvm in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
One reg interface for Timer register
Hi Alex/Scott, Below is my understanding about the ONE_REG interface requirement for timer registers. Define the below 2 ONE_REG interface for TSR access: KVM_REG_SET_TSR, // Set the specified bits in TSR KVM_REG_CLEAR_TSR, // Clear the specified bits in TSR QEMU will use the above ioctl call to selectively set/clear bits of TSR. We do not need the similar interface for TCR as there is no race issue with TCR. So for TCR QEMU will keep on using the SREGS interface. Thanks -Bharat -- To unsubscribe from this list: send the line unsubscribe kvm-ppc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
