Re: Linux 5.10-rc2 (docs build)
Hi Randy,
Em Sun, 1 Nov 2020 16:01:54 -0800
Randy Dunlap escreveu:
> Something broke the docs build (SEVERE):
>
>
> Sphinx parallel build error:
> docutils.utils.SystemMessage:
> /home/rdunlap/lnx/lnx-510-rc2/Documentation/ABI/testing/sysfs-bus-rapidio:2:
> (SEVERE/4) Title level inconsistent:
>
> Attributes Common for All RapidIO Devices
> -
>
>
On what tree did you notice this? Linux-next or upstream?
Using title markups on ABI files is problematic. As they'll
all be placed as a single document, the markups for level
1, level 2, etc should be identical on all files that use them.
A quick fix would be to replace the above to either:
**Attributes Common for All RapidIO Devices**
or just:
Attributes Common for All RapidIO Devices
I guess it should be easy to change the get_abi.pl script to
just ignore markups that matches something like:
^[=-]+$
That should be more reliable long-term. I'll write such patch
and submit it.
> and then it stops/hangs. Does not terminate normally but is no longer
> executing.
That's a docutils/Sphinx bug. Once I wrote a dirty patch fixing it,
but I ended losing the patch[1]. Basically, when severe errors occur there,
it tries to wait for all processes to die, but this never happens,
causing it to wait forever.
[1] I guess I did something similar to this very dirty hack:
--- sphinx_3.2.1/lib/python3.8/site-packages/docutils/parsers/rst/states.py
2020-11-02 08:50:21.602785381 +0100
+++ sphinx_3.2.1/lib/python3.8/site-packages/docutils/parsers/rst/states.py
2020-11-02 08:52:45.216612493 +0100
@@ -371,7 +371,7 @@ class RSTState(StateWS):
error = self.reporter.severe(
'Title level inconsistent:', nodes.literal_block('', sourcetext),
line=lineno)
-return error
+sys.exit()
def new_subsection(self, title, lineno, messages):
"""Append new subsection to document tree. On return, check level."""
Thanks,
Mauro
Re: [PATCH v4 1/3] dt-bindings: memory: mediatek: Convert SMI to DT
On Mon, 2 Nov 2020 at 06:31, Yong Wu wrote: > > On Sat, 2020-10-31 at 12:36 +0100, Krzysztof Kozlowski wrote: > > On Fri, Oct 30, 2020 at 05:12:52PM +0800, Yong Wu wrote: > > > Convert MediaTek SMI to DT schema. > > > > > > CC: Fabien Parent > > > CC: Ming-Fan Chen > > > CC: Matthias Brugger > > > Signed-off-by: Yong Wu > > > --- > > > .../mediatek,smi-common.txt | 50 --- > > > .../mediatek,smi-common.yaml | 140 ++ > > > .../memory-controllers/mediatek,smi-larb.txt | 50 --- > > > .../memory-controllers/mediatek,smi-larb.yaml | 129 > > > 4 files changed, 269 insertions(+), 100 deletions(-) > > > delete mode 100644 > > > Documentation/devicetree/bindings/memory-controllers/mediatek,smi-common.txt > > > > +Cc Honghui Zhang, > > As comment [1], Honghui's address is not valid now. I will act for him. > > > > > Your Ack is needed as you contributed descriptions to the bindings and > > work is being relicensed to GPL-2.0-only OR BSD-2-Clause. > > "GPL-2.0-only OR BSD-2-Clause" is required when we run check-patch. > > If I still use "GPL-2.0-only", then the contributors' Ack/SoB is not > needed, right? That would be one solution but I was thinking to proceed with only your agreement. You were the main contributor to these files. Honghui added a few descriptions. Other developers added only compatibles. Since we cannot reach Honghui, I would assume that your agreement (Sign-off) is enough. Best regards, Krzysztof
[PATCH 4/4] spi: aspeed: Add ASPEED FMC/SPI memory controller driver
Add driver for ASPEED BMC FMC/SPI memory controller which
supports spi-mem interface.
There are three SPI memory controllers embedded in an ASPEED SoC.
Each of them can connect to two or three SPI NOR flashes. The first
SPI memory controller is also named as Firmware Memory Controller (FMC),
which is similar to SPI memory controller. After device AC on, MCU ROM
can fetch device boot code from FMC CS 0. Thus, there exists additional
registers for boot process control in FMC.
ASPEED SPI memory controller supports single, dual and quad mode for
SPI NOR flash. It also supports two types of command mode, user mode
and command read/write mode. User mode is traditional pure SPI operations
where all transmission is controlled by CPU. Contrarily, with command
read/write mode, SPI controller can send command and address automatically
when CPU read/write related remapped address.
Besides, different wafer processes of SPI NOR flash result in different
signal response time. This phenomenon will be enlarged when SPI clock
frequency increases. ASPEED SPI memory controller provides a mechanism
for timing compensation in order to satisfy various SPI NOR flash parts
and PCB layout.
Signed-off-by: Chin-Ting Kuo
---
drivers/spi/Kconfig | 10 +
drivers/spi/Makefile | 1 +
drivers/spi/spi-aspeed.c | 967 +++
3 files changed, 978 insertions(+)
create mode 100644 drivers/spi/spi-aspeed.c
diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig
index 5cff60de8e83..caadf8647183 100644
--- a/drivers/spi/Kconfig
+++ b/drivers/spi/Kconfig
@@ -70,6 +70,16 @@ config SPI_AR934X
This enables support for the SPI controller present on the
Qualcomm Atheros AR934X/QCA95XX SoCs.
+config SPI_ASPEED
+ tristate "ASPEED FMC/SPI Memory Controller"
+ depends on OF && HAS_IOMEM
+ help
+ Enable driver for ASPEED FMC/SPI Memory Controller.
+
+ This driver is not a generic pure SPI driver, which
+ is especially designed for spi-mem framework with
+ SPI NOR flash direct read and write features.
+
config SPI_ATH79
tristate "Atheros AR71XX/AR724X/AR913X SPI controller driver"
depends on ATH79 || COMPILE_TEST
diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile
index 6fea5821662e..9e62c650fca0 100644
--- a/drivers/spi/Makefile
+++ b/drivers/spi/Makefile
@@ -17,6 +17,7 @@ obj-$(CONFIG_SPI_LOOPBACK_TEST) +=
spi-loopback-test.o
obj-$(CONFIG_SPI_ALTERA) += spi-altera.o
obj-$(CONFIG_SPI_AR934X) += spi-ar934x.o
obj-$(CONFIG_SPI_ARMADA_3700) += spi-armada-3700.o
+obj-$(CONFIG_SPI_ASPEED) += spi-aspeed.o
obj-$(CONFIG_SPI_ATMEL)+= spi-atmel.o
obj-$(CONFIG_SPI_ATMEL_QUADSPI)+= atmel-quadspi.o
obj-$(CONFIG_SPI_AT91_USART) += spi-at91-usart.o
diff --git a/drivers/spi/spi-aspeed.c b/drivers/spi/spi-aspeed.c
new file mode 100644
index ..795f67c9ca6a
--- /dev/null
+++ b/drivers/spi/spi-aspeed.c
@@ -0,0 +1,967 @@
+// SPDX-License-Identifier: GPL-2.0+
+
+/*
+ * ASPEED FMC/SPI Memory Controller Driver
+ *
+ * Copyright (c) 2020, ASPEED Corporation.
+ * Copyright (c) 2015-2016, IBM Corporation.
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+/* ASPEED FMC/SPI memory control register related */
+#define OFFSET_CE_TYPE_SETTING 0x00
+#define OFFSET_CE_ADDR_MODE_CTRL 0x04
+#define OFFSET_INTR_CTRL_STATUS0x08
+#define OFFSET_ADDR_DATA_MASK 0x0c
+#define OFFSET_CE0_CTRL_REG0x10
+#define OFFSET_CE0_DECODE_RANGE_REG0x30
+#define OFFSET_DMA_CTRL0x80
+#define OFFSET_DMA_FLASH_ADDR_REG 0x84
+#define OFFSET_DMA_RAM_ADDR_REG0x88
+#define OFFSET_DMA_LEN_REG 0x8c
+#define OFFSET_DMA_CHECKSUM_RESULT 0x90
+#define OFFSET_CE0_TIMING_COMPENSATION 0x94
+
+#define CTRL_IO_SINGLE_DATA0
+#define CTRL_IO_DUAL_DATA BIT(29)
+#define CTRL_IO_QUAD_DATA BIT(30)
+
+#define CTRL_IO_MODE_USER GENMASK(1, 0)
+#define CTRL_IO_MODE_CMD_READ BIT(0)
+#define CTRL_IO_MODE_CMD_WRITE BIT(1)
+#define CTRL_STOP_ACTIVE BIT(2)
+
+#define CALIBRATION_LEN0x400
+#define SPI_DAM_REQUESTBIT(31)
+#define SPI_DAM_GRANT BIT(30)
+#define SPI_DMA_CALIB_MODE BIT(3)
+#define SPI_DMA_CALC_CKSUM BIT(2)
+#define SPI_DMA_ENABLE BIT(0)
+#define SPI_DMA_STATUS BIT(11)
+
+enum aspeed_spi_ctl_reg_value {
+ ASPEED_SPI_BASE,
+ ASPEED_SPI_READ,
+ ASPEED_SPI_WRITE,
+ ASPEED_SPI_MAX,
+};
+
+#define ASPEED_SPI_MAX_CS 5
+
+struct aspeed_spi_controller;
+struct aspeed_spi_chip;
+
+struct aspeed_spi_info {
+ uint32_t cmd_io_ctrl_mask;
+ uint32_t max_data_bus_width;
+ uint32_t min_decode_sz;
+ void
[PATCH 0/4] Porting ASPEED FMC/SPI memory controller driver
This patch series aims to porting ASPEED FMC/SPI memory controller driver with spi-mem interface. Adjust device tree setting of SPI NOR flash in order to fit real AST2600 EVB and new SPI memory controller driver. Also, this patch has been verified on AST2600-A1 EVB. Chin-Ting Kuo (4): dt-bindings: spi: Add binding file for ASPEED FMC/SPI memory controller ARM: dts: aspeed: ast2600: Update FMC/SPI controller setting for spi-aspeed.c ARM: dts: aspeed: ast2600-evb: Adjust SPI flash configuration spi: aspeed: Add ASPEED FMC/SPI memory controller driver .../bindings/spi/aspeed,spi-aspeed.yaml | 66 ++ arch/arm/boot/dts/aspeed-ast2600-evb.dts | 26 +- arch/arm/boot/dts/aspeed-g6.dtsi | 18 +- drivers/spi/Kconfig | 10 + drivers/spi/Makefile | 1 + drivers/spi/spi-aspeed.c | 967 ++ 6 files changed, 1078 insertions(+), 10 deletions(-) create mode 100644 Documentation/devicetree/bindings/spi/aspeed,spi-aspeed.yaml create mode 100644 drivers/spi/spi-aspeed.c -- 2.17.1
[PATCH 2/4] ARM: dts: aspeed: ast2600: Update FMC/SPI controller setting for spi-aspeed.c
- Adjust the value format of "reg" property:
Instead of platform_get_resource(),
platform_get_resource_byname() function can be used
for more human-readable.
- Add "num-cs" property for FMC/SPI controller:
Each ASPEED FMC/SPI memory controller can support more
than a chip select. By "num-cs" property, FMC/SPI
controller driver can know how many chip select related
registers should be initialized at the probe stage.
Besdies, with this property, driver can avoid accessing
chip select which CS number is larger than the maximum
one supported by the controller.
Signed-off-by: Chin-Ting Kuo
---
arch/arm/boot/dts/aspeed-g6.dtsi | 18 --
1 file changed, 12 insertions(+), 6 deletions(-)
diff --git a/arch/arm/boot/dts/aspeed-g6.dtsi b/arch/arm/boot/dts/aspeed-g6.dtsi
index b58220a49cbd..8a5c798db54e 100644
--- a/arch/arm/boot/dts/aspeed-g6.dtsi
+++ b/arch/arm/boot/dts/aspeed-g6.dtsi
@@ -89,14 +89,16 @@
};
fmc: spi@1e62 {
- reg = < 0x1e62 0xc4
- 0x2000 0x1000 >;
+ reg = <0x1e62 0xc4>,
+ <0x2000 0x1000>;
+ reg-names = "spi_ctrl_reg", "spi_mmap";
#address-cells = <1>;
#size-cells = <0>;
compatible = "aspeed,ast2600-fmc";
clocks = < ASPEED_CLK_AHB>;
status = "disabled";
interrupts = ;
+ num-cs = <3>;
flash@0 {
reg = < 0 >;
compatible = "jedec,spi-nor";
@@ -118,12 +120,14 @@
};
spi1: spi@1e63 {
- reg = < 0x1e63 0xc4
- 0x3000 0x1000 >;
+ reg = <0x1e63 0xc4>,
+ <0x3000 0x1000>;
+ reg-names = "spi_ctrl_reg", "spi_mmap";
#address-cells = <1>;
#size-cells = <0>;
compatible = "aspeed,ast2600-spi";
clocks = < ASPEED_CLK_AHB>;
+ num-cs = <2>;
status = "disabled";
flash@0 {
reg = < 0 >;
@@ -140,12 +144,14 @@
};
spi2: spi@1e631000 {
- reg = < 0x1e631000 0xc4
- 0x5000 0x1000 >;
+ reg = < 0x1e631000 0xc4>,
+ <0x5000 0x1000>;
+ reg-names = "spi_ctrl_reg", "spi_mmap";
#address-cells = <1>;
#size-cells = <0>;
compatible = "aspeed,ast2600-spi";
clocks = < ASPEED_CLK_AHB>;
+ num-cs = <3>;
status = "disabled";
flash@0 {
reg = < 0 >;
--
2.17.1
[PATCH 3/4] ARM: dts: aspeed: ast2600-evb: Adjust SPI flash configuration
- Enable FMC CS1 and SPI2 CS0 SPI NOR flashes since both of
these two flashes are mounted on AST2600 EVB by default.
- Remove spi-max-frequency setting: 50MHz is usual SPI bus
frequency adopted on AST2600 EVB which has already been
configured in aspeed-g6.dtsi.
Signed-off-by: Chin-Ting Kuo
---
arch/arm/boot/dts/aspeed-ast2600-evb.dts | 26
1 file changed, 22 insertions(+), 4 deletions(-)
diff --git a/arch/arm/boot/dts/aspeed-ast2600-evb.dts
b/arch/arm/boot/dts/aspeed-ast2600-evb.dts
index 8d0f4656aa05..5a2e4612d155 100644
--- a/arch/arm/boot/dts/aspeed-ast2600-evb.dts
+++ b/arch/arm/boot/dts/aspeed-ast2600-evb.dts
@@ -96,12 +96,11 @@
{
status = "okay";
+
flash@0 {
status = "okay";
m25p,fast-read;
label = "bmc";
- spi-max-frequency = <5000>;
-
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
@@ -133,18 +132,37 @@
};
};
};
+
+ flash@1 {
+ status = "okay";
+ m25p,fast-read;
+ label = "fmc0:1";
+ };
};
{
status = "okay";
+
pinctrl-names = "default";
pinctrl-0 = <_spi1_default>;
flash@0 {
status = "okay";
m25p,fast-read;
- label = "pnor";
- spi-max-frequency = <1>;
+ label = "spi1:0";
+ };
+};
+
+ {
+ status = "okay";
+
+ pinctrl-names = "default";
+ pinctrl-0 = <_spi2_default>;
+
+ flash@0 {
+ status = "okay";
+ m25p,fast-read;
+ label = "spi2:0";
};
};
--
2.17.1
[PATCH 1/4] dt-bindings: spi: Add binding file for ASPEED FMC/SPI memory controller
Create binding file with YAML syntax for ASPEED FMC/SPI memory controller.
Signed-off-by: Chin-Ting Kuo
---
.../bindings/spi/aspeed,spi-aspeed.yaml | 66 +++
1 file changed, 66 insertions(+)
create mode 100644 Documentation/devicetree/bindings/spi/aspeed,spi-aspeed.yaml
diff --git a/Documentation/devicetree/bindings/spi/aspeed,spi-aspeed.yaml
b/Documentation/devicetree/bindings/spi/aspeed,spi-aspeed.yaml
new file mode 100644
index ..41b9692c7226
--- /dev/null
+++ b/Documentation/devicetree/bindings/spi/aspeed,spi-aspeed.yaml
@@ -0,0 +1,66 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/spi/aspeed,spi-aspeed.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: SPI memory controller for ASPEED SoCs
+
+maintainers:
+ - Chin-Ting Kuo
+
+description: |
+ There are three SPI memory controllers embedded in a ASPEED SoC.
+ They are usually connected to SPI NOR flashes. Each of them has
+ more than a chip select. They also support SPI single, dual and
+ quad IO modes for SPI NOR flash.
+
+allOf:
+ - $ref: /spi/spi-controller.yaml#
+
+properties:
+ compatible:
+oneOf:
+ - items:
+ - enum:
+ - aspeed,ast2600-fmc
+ - aspeed,ast2600-spi
+
+ reg:
+items:
+ - description: the control register location and length
+ - description: the flash memory mapping address and length
+
+ clocks:
+description: AHB bus clock which will be converted to SPI bus clock
+
+required:
+ - compatible
+ - reg
+ - clocks
+ - num-cs
+
+unevaluatedProperties: false
+
+examples:
+ - |
+#include
+spi1: spi@1e63 {
+ compatible = "aspeed,ast2600-spi";
+ reg = <0x1e63 0xc4>, <0x3000 0x1000>;
+ reg-names = "spi_ctrl_reg", "spi_mmap";
+ clocks = < ASPEED_CLK_AHB>;
+ num-cs = <2>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ flash@0 {
+compatible = "jedec,spi-nor";
+reg = <0>;
+spi-max-frequency = <5000>;
+ };
+ flash@1 {
+compatible = "jedec,spi-nor";
+reg = <1>;
+spi-max-frequency = <5000>;
+ };
+};
--
2.17.1
[PATCH v3 6/6] mfd: ahc1ec0-wdt: Add sub-device watchdog for Advantech embedded controller
This is one of sub-device driver for Advantech embedded controller AHC1EC0. This driver provide watchdog functionality for Advantech related applications to restart the system. Signed-off-by: Shihlun Lin Reported-by: kernel test robot --- drivers/mfd/Kconfig | 4 + drivers/mfd/Makefile | 1 + drivers/mfd/ahc1ec0-wdt.c | 502 ++ 3 files changed, 507 insertions(+) create mode 100644 drivers/mfd/ahc1ec0-wdt.c diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig index 52ca49b211fc..b6b2122fb757 100644 --- a/drivers/mfd/Kconfig +++ b/drivers/mfd/Kconfig @@ -2183,5 +2183,9 @@ config MFD_AHC1EC0_HWMON driver provides the sysfs attribues for applications to monitor the system status. +config MFD_AHC1EC0_WDT + tristate "Advantech EC Watchdog Function" + depends on MFD_AHC1EC0 + endmenu endif diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile index eb645db817b5..263e6273729c 100644 --- a/drivers/mfd/Makefile +++ b/drivers/mfd/Makefile @@ -270,3 +270,4 @@ obj-$(CONFIG_MFD_INTEL_M10_BMC) += intel-m10-bmc.o obj-$(CONFIG_MFD_AHC1EC0) += ahc1ec0.o obj-$(CONFIG_MFD_AHC1EC0_HWMON)+= ahc1ec0-hwmon.o +obj-$(CONFIG_MFD_AHC1EC0_WDT) += ahc1ec0-wdt.o diff --git a/drivers/mfd/ahc1ec0-wdt.c b/drivers/mfd/ahc1ec0-wdt.c new file mode 100644 index ..c275b41d873b --- /dev/null +++ b/drivers/mfd/ahc1ec0-wdt.c @@ -0,0 +1,502 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (c) 2018, Advantech Automation Corp. + * THIS IS AN UNPUBLISHED WORK CONTAINING CONFIDENTIAL AND PROPRIETARY + * INFORMATION WHICH IS THE PROPERTY OF ADVANTECH AUTOMATION CORP. + * + * ANY DISCLOSURE, USE, OR REPRODUCTION, WITHOUT WRITTEN AUTHORIZATION FROM + * ADVANTECH AUTOMATION CORP., IS STRICTLY PROHIBITED. + * + * + * File:ahc1ec0-wdt.c + * Version: 1.00 <10/10/2014> + * Author: Sun.Lang + * + * Description: The ahc1ec0-wdt is driver for controlling EC watchdog. + * + * + * Status: working + * + * Change Log: + * Version 1.00 <10/10/2014> Sun.Lang + * - Initial version + * Version 1.01 <12/30/2015> Jiangwei.Zhu + * - Modify adv_watchdog_init function to install the driver to + * - the support devices. + * Version 1.02 <03/04/2016> Jiangwei.Zhu + * - Support UNO-1372G-E3AE, TPC-1782H-433AE, APAX-5580-433AE + * Version 1.03 <05/09/2016> Ji.Xu + * - Support EC watchdog mini-board on UNO-3083G/3085G-D44E/D64E + * - APAX-5580-473AE/4C3AE. + * - Modify the timeout unit to 1 second. + * - Modify the device name check method to fuzzy matching. + * Version 1.04 <06/28/2017> Ji.Xu + * - Support EC UNO-2271G-E2xAE. + * - Support EC UNO-2271G-E02xAE. + * - Support EC UNO-2473G-JxAE. + * - Support proc filesystem. + * Version 1.05 <09/20/2017> Ji.Xu + * - Support EC UNO-2484G-633xAE. + * - Support EC UNO-2484G-653xAE. + * - Support EC UNO-2484G-673xAE. + * - Support EC UNO-2484G-733xAE. + * - Support EC UNO-2484G-753xAE. + * - Support EC UNO-2484G-773xAE. + * Version 1.06 <10/26/2017> Ji.Xu + * - Support EC UNO-3283G-674AE + * - Support EC UNO-3285G-674AE + * Version 1.07 <11/16/2017> Zhang.Yang + * - Support EC UNO-1372G-J021AE/J031AE + * - Support EC UNO-2372G + * Version 1.08 <02/02/2018> Ji.Xu + * - Support EC TPC-B500-6??AE + * - Support EC TPC-5???T-6??AE + * - Support EC TPC-5???W-6??AE + * Version 1.09 <03/20/2018> Ji.Xu + * - Support for compiling in kernel-4.10 and below. + * Version 1.10 <02/20/2019> Ji.Xu + * - Support EC UNO-420 + * - Support EC TPC-B200-???AE + * - Support EC TPC-2???T-???AE + * - Support EC TPC-2???W-???AE + * Version 1.11 <08/30/2019> Yao.Kang + * - Support 32-bit programs on 64-bit kernel + * Version 1.12 <12/03/2019> Jianfeng.dai + * - Support support UNO-2372G watchdog + * Version 1.13 <04/24/2020> Yao.Kang + * - Support support UNO-2473G + **/ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include
Re: [PATCH] dmaengine: ti: k3-udma-glue: move psi-l pairing in channel en/dis functions
On 30/10/2020 22.30, Grygorii Strashko wrote:
> The NAVSS UDMA will stuck if target IP module is disabled by PM while PSI-L
> threads are paired UDMA<->IP and no further transfers is possible. This
> could be the case for IPs J721E Main CPSW (cpsw9g).
>
> Hence, to avoid such situation do PSI-L threads pairing only when UDMA
> channel is going to be enabled as at this time DMA consumer module expected
> to be active already.
Is this patch on top of the AM64 (BCDMA/PKTDMA) series or not?
Will it cause any conflict?
Acked-by: Peter Ujfalusi
> Signed-off-by: Grygorii Strashko
> ---
> drivers/dma/ti/k3-udma-glue.c | 64 +--
> 1 file changed, 38 insertions(+), 26 deletions(-)
>
> diff --git a/drivers/dma/ti/k3-udma-glue.c b/drivers/dma/ti/k3-udma-glue.c
> index a367584f0d7b..dfb65e382ab9 100644
> --- a/drivers/dma/ti/k3-udma-glue.c
> +++ b/drivers/dma/ti/k3-udma-glue.c
> @@ -303,19 +303,6 @@ struct k3_udma_glue_tx_channel
> *k3_udma_glue_request_tx_chn(struct device *dev,
> goto err;
> }
>
> - ret = xudma_navss_psil_pair(tx_chn->common.udmax,
> - tx_chn->common.src_thread,
> - tx_chn->common.dst_thread);
> - if (ret) {
> - dev_err(dev, "PSI-L request err %d\n", ret);
> - goto err;
> - }
> -
> - tx_chn->psil_paired = true;
> -
> - /* reset TX RT registers */
> - k3_udma_glue_disable_tx_chn(tx_chn);
> -
> k3_udma_glue_dump_tx_chn(tx_chn);
>
> return tx_chn;
> @@ -378,6 +365,18 @@ EXPORT_SYMBOL_GPL(k3_udma_glue_pop_tx_chn);
>
> int k3_udma_glue_enable_tx_chn(struct k3_udma_glue_tx_channel *tx_chn)
> {
> + int ret;
> +
> + ret = xudma_navss_psil_pair(tx_chn->common.udmax,
> + tx_chn->common.src_thread,
> + tx_chn->common.dst_thread);
> + if (ret) {
> + dev_err(tx_chn->common.dev, "PSI-L request err %d\n", ret);
> + return ret;
> + }
> +
> + tx_chn->psil_paired = true;
> +
> xudma_tchanrt_write(tx_chn->udma_tchanx, UDMA_CHAN_RT_PEER_RT_EN_REG,
> UDMA_PEER_RT_EN_ENABLE);
>
> @@ -398,6 +397,13 @@ void k3_udma_glue_disable_tx_chn(struct
> k3_udma_glue_tx_channel *tx_chn)
> xudma_tchanrt_write(tx_chn->udma_tchanx,
> UDMA_CHAN_RT_PEER_RT_EN_REG, 0);
> k3_udma_glue_dump_tx_rt_chn(tx_chn, "txchn dis2");
> +
> + if (tx_chn->psil_paired) {
> + xudma_navss_psil_unpair(tx_chn->common.udmax,
> + tx_chn->common.src_thread,
> + tx_chn->common.dst_thread);
> + tx_chn->psil_paired = false;
> + }
> }
> EXPORT_SYMBOL_GPL(k3_udma_glue_disable_tx_chn);
>
> @@ -815,19 +821,6 @@ k3_udma_glue_request_rx_chn_priv(struct device *dev,
> const char *name,
> goto err;
> }
>
> - ret = xudma_navss_psil_pair(rx_chn->common.udmax,
> - rx_chn->common.src_thread,
> - rx_chn->common.dst_thread);
> - if (ret) {
> - dev_err(dev, "PSI-L request err %d\n", ret);
> - goto err;
> - }
> -
> - rx_chn->psil_paired = true;
> -
> - /* reset RX RT registers */
> - k3_udma_glue_disable_rx_chn(rx_chn);
> -
> k3_udma_glue_dump_rx_chn(rx_chn);
>
> return rx_chn;
> @@ -1052,12 +1045,24 @@ EXPORT_SYMBOL_GPL(k3_udma_glue_rx_flow_disable);
>
> int k3_udma_glue_enable_rx_chn(struct k3_udma_glue_rx_channel *rx_chn)
> {
> + int ret;
> +
> if (rx_chn->remote)
> return -EINVAL;
>
> if (rx_chn->flows_ready < rx_chn->flow_num)
> return -EINVAL;
>
> + ret = xudma_navss_psil_pair(rx_chn->common.udmax,
> + rx_chn->common.src_thread,
> + rx_chn->common.dst_thread);
> + if (ret) {
> + dev_err(rx_chn->common.dev, "PSI-L request err %d\n", ret);
> + return ret;
> + }
> +
> + rx_chn->psil_paired = true;
> +
> xudma_rchanrt_write(rx_chn->udma_rchanx, UDMA_CHAN_RT_CTL_REG,
> UDMA_CHAN_RT_CTL_EN);
>
> @@ -1078,6 +1083,13 @@ void k3_udma_glue_disable_rx_chn(struct
> k3_udma_glue_rx_channel *rx_chn)
> xudma_rchanrt_write(rx_chn->udma_rchanx, UDMA_CHAN_RT_CTL_REG, 0);
>
> k3_udma_glue_dump_rx_rt_chn(rx_chn, "rxrt dis2");
> +
> + if (rx_chn->psil_paired) {
> + xudma_navss_psil_unpair(rx_chn->common.udmax,
> + rx_chn->common.src_thread,
> + rx_chn->common.dst_thread);
> + rx_chn->psil_paired = false;
> + }
> }
> EXPORT_SYMBOL_GPL(k3_udma_glue_disable_rx_chn);
>
>
- Péter
Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki.
Y-tunnus/Business
Re: [PATCH v2] ubifs: Fix the printing type of c->big_lpt
On Sat, Oct 31, 2020 at 9:56 AM Chengsong Ke wrote: > > Ubifs uses %d to print c->big_lpt, but c->big_lpt is a variable of > type unsigned int and should be printed with %u. > > Well, it is: > unsigned int big_lpt:1; > So, either 0 or 1. > > Does changing it to %u silence some static checker or is there some other > problem I don't see right now? :-) > > Thanks, > //Richard This is just a coding style issue, I found in the ubifs code. :-) Thanks, //Chengsong Ke
[PATCH -next] watchdog: Fix potential dereferencing of null pointer
A reboot notifier, which stops the WDT by calling the stop hook without
any check, would be registered when we set WDOG_STOP_ON_REBOOT flag.
Howerer we allow the WDT driver to omit the stop hook since commit
"d0684c8a93549" ("watchdog: Make stop function optional") and provide
a module parameter for user that controls the WDOG_STOP_ON_REBOOT flag
in commit 9232c80659e94 ("watchdog: Add stop_on_reboot parameter to
control reboot policy"). Together that commits make user potential to
insert a watchdog driver that don't provide a stop hook but with the
stop_on_reboot parameter set, then dereferencing of null pointer occurs
on system reboot.
Check the stop hook before registering the reboot notifier to fix the
issue.
Fixes: d0684c8a9354 ("watchdog: Make stop function optional")
Signed-off-by: Wang Wensheng
---
drivers/watchdog/watchdog_core.c | 23 +++
1 file changed, 15 insertions(+), 8 deletions(-)
diff --git a/drivers/watchdog/watchdog_core.c b/drivers/watchdog/watchdog_core.c
index 423844757812..5269761ba072 100644
--- a/drivers/watchdog/watchdog_core.c
+++ b/drivers/watchdog/watchdog_core.c
@@ -252,10 +252,8 @@ static int __watchdog_register_device(struct
watchdog_device *wdd)
wdd->id = id;
ret = watchdog_dev_register(wdd);
- if (ret) {
- ida_simple_remove(_ida, id);
- return ret;
- }
+ if (ret)
+ goto id_remove;
}
/* Module parameter to force watchdog policy on reboot. */
@@ -267,15 +265,17 @@ static int __watchdog_register_device(struct
watchdog_device *wdd)
}
if (test_bit(WDOG_STOP_ON_REBOOT, >status)) {
- wdd->reboot_nb.notifier_call = watchdog_reboot_notifier;
+ if (!wdd->ops->stop) {
+ ret = -EINVAL;
+ goto dev_unregister;
+ }
+ wdd->reboot_nb.notifier_call = watchdog_reboot_notifier;
ret = register_reboot_notifier(>reboot_nb);
if (ret) {
pr_err("watchdog%d: Cannot register reboot notifier
(%d)\n",
wdd->id, ret);
- watchdog_dev_unregister(wdd);
- ida_simple_remove(_ida, id);
- return ret;
+ goto dev_unregister;
}
}
@@ -289,6 +289,13 @@ static int __watchdog_register_device(struct
watchdog_device *wdd)
}
return 0;
+
+dev_unregister:
+ watchdog_dev_unregister(wdd);
+id_remove:
+ ida_simple_remove(_ida, id);
+
+ return ret;
}
/**
--
2.25.0
Re: [PATCH] net: can: prevent potential access of uninitialized value in canfd_rcv()
On 02-11-2020 12:40, Marc Kleine-Budde wrote:
> On 11/2/20 4:13 AM, Anant Thazhemadam wrote:
>> In canfd_rcv(), cfd->len is uninitialized when skb->len = 0, and this
>> uninitialized cfd->len is accessed nonetheless by pr_warn_once().
>>
>> Fix this uninitialized variable access by checking cfd->len's validity
>> condition (cfd->len > CANFD_MAX_DLEN) separately after the skb->len's
>> condition is checked, and appropriately modify the log messages that
>> are generated as well.
>> In case either of the required conditions fail, the skb is freed and
>> NET_RX_DROP is returned, same as before.
>>
>> Reported-by: syzbot+9bcb0c9409066696d...@syzkaller.appspotmail.com
>> Tested-by: Anant Thazhemadam
>> Signed-off-by: Anant Thazhemadam
>> ---
>> This patch was locally tested using the reproducer and .config file
>> generated by syzbot.
>>
>> net/can/af_can.c | 19 ++-
>> 1 file changed, 14 insertions(+), 5 deletions(-)
>>
>> diff --git a/net/can/af_can.c b/net/can/af_can.c
>> index ea29a6d97ef5..1b9f2e50f065 100644
>> --- a/net/can/af_can.c
>> +++ b/net/can/af_can.c
>> @@ -694,16 +694,25 @@ static int canfd_rcv(struct sk_buff *skb, struct
>> net_device *dev,
> Can you create a similar patch for "can_rcv()"?
Yes, I can. Would it be alright if that was part of the v2 itself (since it's
similar changes)?
Or would I have to split them up into 2 different patches and send it as a
2-patch series
(since the changes made are in different functions)?
>
>> {
>> struct canfd_frame *cfd = (struct canfd_frame *)skb->data;
>>
>> -if (unlikely(dev->type != ARPHRD_CAN || skb->len != CANFD_MTU ||
>> - cfd->len > CANFD_MAX_DLEN)) {
>> -pr_warn_once("PF_CAN: dropped non conform CAN FD skbuf: dev
>> type %d, len %d, datalen %d\n",
>> +if (unlikely(dev->type != ARPHRD_CAN || skb->len != CANFD_MTU)) {
>> +pr_warn_once("PF_CAN: dropped non conform CAN FD skbuff: dev
>> type %d, len %d\n",
>> + dev->type, skb->len);
>> +goto free_skb;
>> +}
>> +
>> +// This check is made separately since cfd->len would be uninitialized
>> if skb->len = 0.
> Please don't use C++ comment style in the kernel.
Noted. I'll have this fixed in the v2.
>
>> +else if (unlikely(cfd->len > CANFD_MAX_DLEN)) {
> Please move the "else" right after the closing curly bracket: "} else if () {"
> or convert it into an "if () {"
Noted.
>
>> +pr_warn_once("PF_CAN: dropped non conform CAN FD skbuff: dev
>> type %d, len %d, datalen %d\n",
>> dev->type, skb->len, cfd->len);
>> -kfree_skb(skb);
>> -return NET_RX_DROP;
>> +goto free_skb;
>> }
>>
>> can_receive(skb, dev);
>> return NET_RX_SUCCESS;
>> +
>> +free_skb:
>> +kfree_skb(skb);
>> +return NET_RX_DROP;
>> }
>>
>> /* af_can protocol functions */
>>
> regards,
> Marc
Thank you for your time.
Thanks,
Anant
Re: [PATCH v5 2/2] firmware: QCOM_SCM: Allow qcom_scm driver to be loadable as a permenent module
+ ath10k list John Stultz writes: > Allow the qcom_scm driver to be loadable as a permenent module. > > This still uses the "depends on QCOM_SCM || !QCOM_SCM" bit to > ensure that drivers that call into the qcom_scm driver are > also built as modules. While not ideal in some cases its the > only safe way I can find to avoid build errors without having > those drivers select QCOM_SCM and have to force it on (as > QCOM_SCM=n can be valid for those drivers). > > Cc: Catalin Marinas > Cc: Will Deacon > Cc: Andy Gross > Cc: Bjorn Andersson > Cc: Joerg Roedel > Cc: Thomas Gleixner > Cc: Jason Cooper > Cc: Marc Zyngier > Cc: Linus Walleij > Cc: Vinod Koul > Cc: Kalle Valo > Cc: Maulik Shah > Cc: Lina Iyer > Cc: Saravana Kannan > Cc: Todd Kjos > Cc: Greg Kroah-Hartman > Cc: linux-arm-...@vger.kernel.org > Cc: io...@lists.linux-foundation.org > Cc: linux-g...@vger.kernel.org > Acked-by: Greg Kroah-Hartman > Signed-off-by: John Stultz > --- > v3: > * Fix __arm_smccc_smc build issue reported by > kernel test robot > v4: > * Add "depends on QCOM_SCM || !QCOM_SCM" bit to ath10k > config that requires it. > v5: > * Fix QCOM_QCM typo in Kconfig, it should be QCOM_SCM > --- > drivers/firmware/Kconfig| 4 ++-- > drivers/firmware/Makefile | 3 ++- > drivers/firmware/qcom_scm.c | 4 > drivers/iommu/Kconfig | 2 ++ > drivers/net/wireless/ath/ath10k/Kconfig | 1 + > 5 files changed, 11 insertions(+), 3 deletions(-) For ath10k part: Acked-by: Kalle Valo -- https://patchwork.kernel.org/project/linux-wireless/list/ https://wireless.wiki.kernel.org/en/developers/documentation/submittingpatches
Re: [PATCH v2 0/3] md superblock write alignment on 512e devices
On 10/30/2020 04:13 AM, Christopher Unkel wrote: Hello, Thanks for the feedback on the previous patch series. A updated patch series with the same function as the first patch (https://lkml.org/lkml/2020/10/22/1058 "md: align superblock writes to physical blocks") follows. As suggested, it introduces a helper function, which can be used to reduce some code duplication. It handles the case in super_1_sync() where the superblock is extended by the addition of new component devices. I think it also fixes a bug where the existing code in super_1_load() ought to be rejecting the array with EINVAL: if the superblock padded out to the *logical* block length runs into the bitmap. For example, if the bitmap offset is 2 (bitmap 1K after superblock) and the logical block size is 4K, the superblock padded out to 4K runs into the bitmap. This case may be unusual (perhaps only happens if the array is created on a 512n device and then raw contents are copied onto a 4kn device) but I think it is possible. Hi Chris For super1.1 and super1.2 bitmap offset is 8. It's a fixed value. So it should not have the risk? But for future maybe it has this problem. If the disk logical or physical block size is larger than 4K in future, it has data corruption risk. With respect to the option of simply replacing queue_logical_block_size() with queue_physical_block_size(), I think this can result in the code rejecting devices that can be loaded, but In mdadm it defines the max super size of super1 is 4096 #define MAX_SB_SIZE 4096 /* bitmap super size is 256, but we round up to a sector for alignment */ #define BM_SUPER_SIZE 512 #define MAX_DEVS ((int)(MAX_SB_SIZE - sizeof(struct mdp_superblock_1)) / 2) #define SUPER1_SIZE (MAX_SB_SIZE + BM_SUPER_SIZE \ + sizeof(struct misc_dev_info)) It should be ok to replace queue_logical_block_size with queue_physical_block_size? Now it doesn't check physical block size and super block size. For super1, we can add a check that if physical block size is larger than MAX_SB_SIZE, then we reject to create/assmble the raid device. for which the physical block alignment can't be respected--the longer padded size would trigger the EINVAL cases testing against data_offset/new_data_offset. I think it's better to proceed in such cases, just with unaligned superblock writes as would presently happen. Also if I'm right about the above bug, then I think this subsitution would be more likely to trigger it. Thanks, --Chris Christopher Unkel (3): md: factor out repeated sb alignment logic md: align superblock writes to physical blocks md: reuse sb length-checking logic drivers/md/md.c | 69 + 1 file changed, 52 insertions(+), 17 deletions(-)
Re: drivers/remoteproc/mtk_scp.c:645:34: warning: unused variable 'mtk_scp_of_match'
On Mon, Nov 2, 2020 at 9:09 AM kernel test robot wrote:
>
> Hi Alexandre,
>
> First bad commit (maybe != root cause):
>
> tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
> master
> head: 3cea11cd5e3b00d91caf0b4730194039b45c5891
> commit: cbd2dca74926c0e4610c40923cc786b732c9e8ef remoteproc: scp: add
> COMPILE_TEST dependency
> date: 5 weeks ago
> config: x86_64-randconfig-a005-20201102 (attached as .config)
> compiler: clang version 12.0.0 (https://github.com/llvm/llvm-project
> 235dfcf70abca65dba5d80f1a42d1485bab8980c)
> reproduce (this is a W=1 build):
> wget
> https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O
> ~/bin/make.cross
> chmod +x ~/bin/make.cross
> # install x86_64 cross compiling tool for clang build
> # apt-get install binutils-x86-64-linux-gnu
> #
> https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=cbd2dca74926c0e4610c40923cc786b732c9e8ef
> git remote add linus
> https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
> git fetch --no-tags linus master
> git checkout cbd2dca74926c0e4610c40923cc786b732c9e8ef
> # save the attached .config to linux build tree
> COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross ARCH=x86_64
>
> If you fix the issue, kindly add following tag as appropriate
> Reported-by: kernel test robot
>
> All warnings (new ones prefixed by >>):
>
> >> drivers/remoteproc/mtk_scp.c:645:34: warning: unused variable
> >> 'mtk_scp_of_match' [-Wunused-const-variable]
>static const struct of_device_id mtk_scp_of_match[] = {
> ^
>1 warning generated.
>
> vim +/mtk_scp_of_match +645 drivers/remoteproc/mtk_scp.c
This happens when COMPILE_TEST is set but not OF_CONFIG. Sent a fix
for this: https://lkml.org/lkml/2020/11/2/102
[PATCH v2] selftests: intel_pstate: ftime() is deprecated
Use clock_gettime() instead of deprecated ftime().
aperf.c: In function ‘main’:
aperf.c:58:2: warning: ‘ftime’ is deprecated [-Wdeprecated-declarations]
58 | ftime();
| ^
In file included from aperf.c:9:
/usr/include/sys/timeb.h:39:12: note: declared here
39 | extern int ftime (struct timeb *__timebuf)
|^
Signed-off-by: Tommi Rantala
---
tools/testing/selftests/intel_pstate/aperf.c | 22 ++--
1 file changed, 16 insertions(+), 6 deletions(-)
v2: define and use NSEC_PER_MSEC and MSEC_PER_SEC
diff --git a/tools/testing/selftests/intel_pstate/aperf.c
b/tools/testing/selftests/intel_pstate/aperf.c
index f6cd03a87493..a8acf3996973 100644
--- a/tools/testing/selftests/intel_pstate/aperf.c
+++ b/tools/testing/selftests/intel_pstate/aperf.c
@@ -10,8 +10,12 @@
#include
#include
#include
+#include
#include "../kselftest.h"
+#define MSEC_PER_SEC 1000L
+#define NSEC_PER_MSEC 100L
+
void usage(char *name) {
printf ("Usage: %s cpunum\n", name);
}
@@ -22,7 +26,7 @@ int main(int argc, char **argv) {
long long tsc, old_tsc, new_tsc;
long long aperf, old_aperf, new_aperf;
long long mperf, old_mperf, new_mperf;
- struct timeb before, after;
+ struct timespec before, after;
long long int start, finish, total;
cpu_set_t cpuset;
@@ -55,7 +59,10 @@ int main(int argc, char **argv) {
return 1;
}
- ftime();
+ if (clock_gettime(CLOCK_MONOTONIC, ) < 0) {
+ perror("clock_gettime");
+ return 1;
+ }
pread(fd, _tsc, sizeof(old_tsc), 0x10);
pread(fd, _aperf, sizeof(old_mperf), 0xe7);
pread(fd, _mperf, sizeof(old_aperf), 0xe8);
@@ -64,7 +71,10 @@ int main(int argc, char **argv) {
sqrt(i);
}
- ftime();
+ if (clock_gettime(CLOCK_MONOTONIC, ) < 0) {
+ perror("clock_gettime");
+ return 1;
+ }
pread(fd, _tsc, sizeof(new_tsc), 0x10);
pread(fd, _aperf, sizeof(new_mperf), 0xe7);
pread(fd, _mperf, sizeof(new_aperf), 0xe8);
@@ -73,11 +83,11 @@ int main(int argc, char **argv) {
aperf = new_aperf-old_aperf;
mperf = new_mperf-old_mperf;
- start = before.time*1000 + before.millitm;
- finish = after.time*1000 + after.millitm;
+ start = before.tv_sec*MSEC_PER_SEC + before.tv_nsec/NSEC_PER_MSEC;
+ finish = after.tv_sec*MSEC_PER_SEC + after.tv_nsec/NSEC_PER_MSEC;
total = finish - start;
- printf("runTime: %4.2f\n", 1.0*total/1000);
+ printf("runTime: %4.2f\n", 1.0*total/MSEC_PER_SEC);
printf("freq: %7.0f\n", tsc / (1.0*aperf / (1.0 * mperf)) / total);
return 0;
}
--
2.26.2
Re: lockdep: possible irq lock inversion dependency detected (trig->leddev_list_lock)
On Sun, Nov 01, 2020 at 05:28:38PM +0100, Pavel Machek wrote:
> Hi!
>
> > I'm getting the following lockdep splat (see below).
> >
> > Apparently this warning starts to be reported after applying:
> >
> > e918188611f0 ("locking: More accurate annotations for read_lock()")
> >
> > It looks like a false positive to me, but it made me think a bit and
> > IIUC there can be still a potential deadlock, even if the deadlock
> > scenario is a bit different than what lockdep is showing.
> >
> > In the assumption that read-locks are recursive only in_interrupt()
> > context (as stated in e918188611f0), the following scenario can still
> > happen:
> >
> > CPU0 CPU1
> >
> > read_lock(>leddev_list_lock);
> >
> > write_lock(>leddev_list_lock);
> >
> > kbd_bh()
> >-> read_lock(>leddev_list_lock);
> >
> > *** DEADLOCK ***
> >
> > The write-lock is waiting on CPU1 and the second read_lock() on CPU0
> > would be blocked by the write-lock *waiter* on CPU1 => deadlock.
> >
> > In that case we could prevent this deadlock condition using a workqueue
> > to call kbd_propagate_led_state() instead of calling it directly from
> > kbd_bh() (even if lockdep would still report the false positive).
>
> console.c is already using bh to delay work from
> interrupt. But... that should not be neccessary. led_trigger_event
> should already be callable from interrupt context, AFAICT.
>
> Could this be resolved by doing the operations directly from keyboard
> interrupt?
As pointed out by Boqun this is not a deadlock condition, because the
read_lock() called from soft-irq context is recursive (I was missing
that in_interrupt() returns true also from soft-irq context).
But the initial lockdep warning was correct, so there is still a
potential deadlock condition between trig->leddev_list_lock and
host->lock. And I think this can be prevented simply by scheduling the
led triggering part in a separate work from ata_hsm_qs_complete(), so
that led_trigger_event() won't be called with host->lock held. I'll send
a patch soon to do that.
-Andrea
[PATCH] remoteproc/mtk_scp: surround DT device IDs with CONFIG_OF
Now that this driver can be compiled with COMPILE_TEST, we have no
guarantee that CONFIG_OF will also be defined. When that happens, a
warning about mtk_scp_of_match being defined but unused will be reported
so make sure this variable is only defined if of_match_ptr() actually
uses it.
Fixes: cbd2dca74926c0e4610c40923cc786b732c9e8ef remoteproc: scp: add
COMPILE_TEST dependency
Reported-by: kernel test robot
Signed-off-by: Alexandre Courbot
---
drivers/remoteproc/mtk_scp.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/remoteproc/mtk_scp.c b/drivers/remoteproc/mtk_scp.c
index 577cbd5d421e..f74f22d4d1ff 100644
--- a/drivers/remoteproc/mtk_scp.c
+++ b/drivers/remoteproc/mtk_scp.c
@@ -772,12 +772,14 @@ static const struct mtk_scp_of_data mt8192_of_data = {
.host_to_scp_int_bit = MT8192_HOST_IPC_INT_BIT,
};
+#if defined(CONFIG_OF)
static const struct of_device_id mtk_scp_of_match[] = {
{ .compatible = "mediatek,mt8183-scp", .data = _of_data },
{ .compatible = "mediatek,mt8192-scp", .data = _of_data },
{},
};
MODULE_DEVICE_TABLE(of, mtk_scp_of_match);
+#endif
static struct platform_driver mtk_scp_driver = {
.probe = scp_probe,
--
2.29.1.341.ge80a0c044ae-goog
Re: [BUG] Error applying setting, reverse things back on lot of devices
On Sun, Nov 01, 2020 at 02:31:15AM +0100, Ondřej Jirman wrote:
> Hello Michał,
>
> On Sat, Oct 24, 2020 at 01:53:07PM +0200, Michał Mirosław wrote:
> > On Fri, Oct 23, 2020 at 10:39:43PM +0200, Corentin Labbe wrote:
> > > On Fri, Oct 23, 2020 at 03:42:01PM +0200, Corentin Labbe wrote:
> > > > On Wed, Oct 21, 2020 at 08:31:49PM +0200, Corentin Labbe wrote:
> > > > > [5.796585] dcdc4: supplied by regulator-dummy
> > > > > [5.801647] vcc-dram: supplied by regulator-dummy
> > > > > [5.806470] vcc-gmac-phy: failed to get the current voltage:
> > > > > -EINVAL
> > > > > [5.812839] axp20x-regulator axp20x-regulator: Failed to register
> > > > > dc1sw
> > > > > [5.820291] axp20x-regulator: probe of axp20x-regulator failed
> > > > > with error -22
> > > >
> > > > I have just saw thoses 3 lines which are probably the real problem.
> > > > I have started a new bisect with this error, but it is hitting the same
> > > > "crash range" the first one.
> > > >
> > >
> > > I have bisected the problem to commit
> > > aea6cb99703e17019e025aa71643b4d3e0a24413 ("regulator: resolve supply
> > > after creating regulator")
> > > Reverting this fix my problem.
> >
> > Can you try the hack below?
> >
> > Best Regards,
> > Michał Mirosław
> >
> > diff --git a/drivers/regulator/core.c b/drivers/regulator/core.c
> > index a4ffd71696da..9ad091f5f1ab 100644
> > --- a/drivers/regulator/core.c
> > +++ b/drivers/regulator/core.c
> > @@ -1169,6 +1169,9 @@ static int machine_constraints_voltage(struct
> > regulator_dev *rdev,
> > }
> >
> > if (current_uV < 0) {
> > + if (current_uV == -EINVAL && rdev->supply_name)
> > + return -EPROBE_DEFER;
> > +
> > rdev_err(rdev,
> > "failed to get the current voltage: %pe\n",
> > ERR_PTR(current_uV));
>
> I did hit the same problem on sun8i-a83t-tbs-a711.dts tablet.
>
> The patch helps on top of v5.9.2, and on linus/master.
>
Hello
Sorry I didnt get your original email.
Tested on top of next-20201030.
I have added a debug """rdev_info(rdev, "%s DEFER\n", __func__);""" and I
confirm this hack is used since I got "vcc-gmac-phy:
machine_constraints_voltage DEFER"
So if you send the patch you can add:
Tested-by: Corentin Labbe
Tested-on: sun8i-r40-bananapi-m2-ultra
Regards
Re: dmaengine: pl330 rare NULL pointer dereference in pl330_tasklet
Hi Krzysztof, On 31.10.2020 20:01, Krzysztof Kozlowski wrote: > I hit quite rare issue with pl330 DMA driver, difficult to reproduce > (actually failed to do so): > > Happened during early reboot > > [ OK ] Stopped target Graphical Interface. > [ OK ] Stopped target Multi-User System. > [ OK ] Stopped target RPC Port Mapper. > Stopping OpenSSH Daemonti[ 75.447904] 8<--- cut here --- > [ 75.449506] Unable to handle kernel NULL pointer dereference at virtual > address 000c > ... > [ 75.690850] [] (pl330_tasklet) from [] > (tasklet_action_common+0x88/0x1f4) > [ 75.699340] [] (tasklet_action_common) from [] > (__do_softirq+0x108/0x428) > [ 75.707850] [] (__do_softirq) from [] > (run_ksoftirqd+0x2c/0x4c) > [ 75.715486] [] (run_ksoftirqd) from [] > (smpboot_thread_fn+0x13c/0x24c) > [ 75.723693] [] (smpboot_thread_fn) from [] > (kthread+0x13c/0x16c) > [ 75.731390] [] (kthread) from [] > (ret_from_fork+0x14/0x2c) > > Full log: > https://protect2.fireeye.com/v1/url?k=7445a1ab-2bde98a7-74442ae4-000babff3563-a368d542db0c5500=1=62e4887b-e224-48e5-80a2-71163caeeec8=https%3A%2F%2Fkrzk.eu%2F%23%2Fbuilders%2F20%2Fbuilds%2F954%2Fsteps%2F22%2Flogs%2Fserial0 > > 1. Arch ARM Linux > 2. multi_v7_defconfig > 3. Odroid HC1, ARMv7, octa-core (Cortex-A7+A15), Exynos5422 SoC > 4. systemd, boot up with static IP set in kernel command line > 5. No swap > 6. Kernel, DTB and initramfs are downloaded with TFTP > 7. NFS root (NFS client) mounted from a NFSv4 server > > Since I was not able to reproduce it, obviously I did not run bisect. If > anyone has ideas, please share. Well, I've also observed it a few times. IMHO it is related to the broken UART (in DMA mode) shutdown procedure. Usually it can be easily observed by flushing some random parts of the previously transmitted data to the UART console during the system shutdown. This also depends on the board and used system (especially the presence of systemd, which plays with UART differently than the old sysv init). IMHO there is a kind of use-after-free issue there, so the above pl330 stacktrace can be also observed depending on the timing and system load. This issue is there from the beginning of the DMA support. I have it on my todo list, but it had too low priority to take a look into it. I only briefly checked the related code a few years ago and noticed that the UART shutdown is not really synchronized with DMA. However that time I didn't find any simple fix, so I gave up. Best regards -- Marek Szyprowski, PhD Samsung R Institute Poland
Re: [PATCH v3 0/2] uacce: fix some coding styles
On 2020/11/2 15:09, Greg Kroah-Hartman wrote: > On Mon, Nov 02, 2020 at 02:41:12PM +0800, Zhou Wang wrote: >> On 2020/9/23 18:09, Kai Ye wrote: >>> 1. delete some redundant code. >>> 2. modify the module author information. "Hisilicon" >>> spelling is error. >>> >>> Changes v2 -> v3: >>> Two things, splited to two patches. >>> Changes v1 -> v2: >>> deleted extra NULL pointer check in uacce_fops. >>> >>> Kai Ye (2): >>> uacce: fix some coding styles >>> uacce: modify the module author information. >>> >>> drivers/misc/uacce/uacce.c | 13 + >>> 1 file changed, 1 insertion(+), 12 deletions(-) >>> >> >> Hi Hartman， >> >> Could you help to take this clean up patch? > > I do not see a patch here :( I know the reason, Kai Ye did not To you and I also added your Email address in this ping :) I have replied patches directly. Could you take them? Best, Zhou > > If I have missed something, please resend it. > > thanks, > > greg k-h > . >
My Greetings
My Dear My Name is Mrs. Maya Oliver, from Norway. I know that this message will be a surprise to you. Firstly, I am married to Mr. Patrick Oliver, A gold merchant who owns a small gold Mine in Burkina Faso; He died of Cardiovascular Disease in mid-March 2011. During his life time he deposited the sum of € 8.5 Million Euro) Eight million, Five hundred thousand Euros in a bank in Ouagadougou the capital city of Burkina Faso. The deposited money was from the sale of the shares, death benefits payment and entitlements of my deceased husband by his company. I am sending this message to you praying that it will reach you in good health, since I am not in good health condition in which I sleep every night without knowing if I may be alive to see the next day. I am suffering from long time cancer and presently i am partially suffering from a stroke illness which has become almost impossible for me to move around. I am married to my late husband for over 4 years before he died and is unfortunately that we don't have a child, my doctor confided in me that i have less chance to live. Having known my health condition, I decided to contact you to claim the fund since I don't have any relation I grew up from the orphanage home, I have decided to donate what I have to you for the support of helping Motherless babies/Less privileged/Widows' because I am dying and diagnosed of cancer for about 2 years ago. I have been touched by God Almighty to donate from what I have inherited from my late husband to you for good work of God Almighty. I have asked Almighty God to forgive me and believe he has, because He is a Merciful God I will be going in for an operation surgery soon This is the reason i need your services to stand as my next of kin or an executor to claim the funds for charity purposes. If this money remains unclaimed after my death, the bank executives or the government will take the money as unclaimed fund and maybe use it for selfish and worthless ventures, I need a very honest person who can claim this money and use it for Charity works, for orphanages, widows and also build schools for less privilege that will be named after my late husband and my name; I need your urgent answer to know if you will be able to execute this project, and I will give you more Information on how the fund will be transferred to your bank account. Thanks Mrs. Maya
Re: linux-next: Tree for Nov 2 (regulator/qcom-rpmh-regulator.c)
On 11/1/20 9:28 PM, Stephen Rothwell wrote: > Hi all, > > Changes since 20201030: > on i386: CONFIG_QCOM_RPMH=m CONFIG_REGULATOR_QCOM_RPMH=y ld: drivers/regulator/qcom-rpmh-regulator.o: in function `rpmh_regulator_send_request': qcom-rpmh-regulator.c:(.text+0xcf): undefined reference to `rpmh_write' ld: qcom-rpmh-regulator.c:(.text+0xea): undefined reference to `rpmh_write_async' Full randconfig file is attached. -- ~Randy Reported-by: Randy Dunlap # # Automatically generated file; DO NOT EDIT. # Linux/i386 5.10.0-rc1 Kernel Configuration # CONFIG_CC_VERSION_TEXT="gcc (SUSE Linux) 7.5.0" CONFIG_CC_IS_GCC=y CONFIG_GCC_VERSION=70500 CONFIG_LD_VERSION=23200 CONFIG_CLANG_VERSION=0 CONFIG_CC_HAS_ASM_GOTO=y CONFIG_CC_HAS_ASM_INLINE=y CONFIG_IRQ_WORK=y CONFIG_BUILDTIME_TABLE_SORT=y CONFIG_THREAD_INFO_IN_TASK=y # # General setup # CONFIG_INIT_ENV_ARG_LIMIT=32 CONFIG_COMPILE_TEST=y CONFIG_LOCALVERSION="" CONFIG_BUILD_SALT="" CONFIG_HAVE_KERNEL_GZIP=y CONFIG_HAVE_KERNEL_BZIP2=y CONFIG_HAVE_KERNEL_LZMA=y CONFIG_HAVE_KERNEL_XZ=y CONFIG_HAVE_KERNEL_LZO=y CONFIG_HAVE_KERNEL_LZ4=y CONFIG_HAVE_KERNEL_ZSTD=y CONFIG_KERNEL_GZIP=y # CONFIG_KERNEL_BZIP2 is not set # CONFIG_KERNEL_LZMA is not set # CONFIG_KERNEL_XZ is not set # CONFIG_KERNEL_LZO is not set # CONFIG_KERNEL_LZ4 is not set # CONFIG_KERNEL_ZSTD is not set CONFIG_DEFAULT_INIT="" CONFIG_DEFAULT_HOSTNAME="(none)" # CONFIG_SWAP is not set # CONFIG_SYSVIPC is not set CONFIG_WATCH_QUEUE=y CONFIG_CROSS_MEMORY_ATTACH=y # CONFIG_USELIB is not set CONFIG_HAVE_ARCH_AUDITSYSCALL=y # # IRQ subsystem # CONFIG_GENERIC_IRQ_PROBE=y CONFIG_GENERIC_IRQ_SHOW=y CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y CONFIG_GENERIC_PENDING_IRQ=y CONFIG_GENERIC_IRQ_MIGRATION=y CONFIG_HARDIRQS_SW_RESEND=y CONFIG_GENERIC_IRQ_CHIP=y CONFIG_IRQ_DOMAIN=y CONFIG_IRQ_SIM=y CONFIG_IRQ_DOMAIN_HIERARCHY=y CONFIG_IRQ_FASTEOI_HIERARCHY_HANDLERS=y CONFIG_GENERIC_MSI_IRQ=y CONFIG_GENERIC_MSI_IRQ_DOMAIN=y CONFIG_GENERIC_IRQ_MATRIX_ALLOCATOR=y CONFIG_GENERIC_IRQ_RESERVATION_MODE=y CONFIG_IRQ_FORCED_THREADING=y CONFIG_SPARSE_IRQ=y # CONFIG_GENERIC_IRQ_DEBUGFS is not set # end of IRQ subsystem CONFIG_CLOCKSOURCE_WATCHDOG=y CONFIG_ARCH_CLOCKSOURCE_INIT=y CONFIG_CLOCKSOURCE_VALIDATE_LAST_CYCLE=y CONFIG_GENERIC_TIME_VSYSCALL=y CONFIG_GENERIC_CLOCKEVENTS=y CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y CONFIG_GENERIC_CLOCKEVENTS_MIN_ADJUST=y CONFIG_GENERIC_CMOS_UPDATE=y CONFIG_HAVE_POSIX_CPU_TIMERS_TASK_WORK=y # # Timers subsystem # CONFIG_TICK_ONESHOT=y CONFIG_NO_HZ_COMMON=y # CONFIG_HZ_PERIODIC is not set CONFIG_NO_HZ_IDLE=y CONFIG_NO_HZ=y # CONFIG_HIGH_RES_TIMERS is not set # end of Timers subsystem CONFIG_PREEMPT_NONE=y # CONFIG_PREEMPT_VOLUNTARY is not set # CONFIG_PREEMPT is not set CONFIG_PREEMPT_COUNT=y # # CPU/Task time and stats accounting # CONFIG_TICK_CPU_ACCOUNTING=y CONFIG_IRQ_TIME_ACCOUNTING=y CONFIG_HAVE_SCHED_AVG_IRQ=y # CONFIG_PSI is not set # end of CPU/Task time and stats accounting # CONFIG_CPU_ISOLATION is not set # # RCU Subsystem # CONFIG_TREE_RCU=y CONFIG_RCU_EXPERT=y CONFIG_SRCU=y CONFIG_TREE_SRCU=y CONFIG_TASKS_RCU_GENERIC=y CONFIG_TASKS_RCU=y CONFIG_TASKS_RUDE_RCU=y CONFIG_TASKS_TRACE_RCU=y CONFIG_RCU_STALL_COMMON=y CONFIG_RCU_NEED_SEGCBLIST=y CONFIG_RCU_FANOUT=32 CONFIG_RCU_FANOUT_LEAF=2 # CONFIG_RCU_FAST_NO_HZ is not set CONFIG_RCU_NOCB_CPU=y # CONFIG_TASKS_TRACE_RCU_READ_MB is not set # end of RCU Subsystem # CONFIG_IKCONFIG is not set CONFIG_IKHEADERS=y CONFIG_LOG_BUF_SHIFT=17 CONFIG_LOG_CPU_MAX_BUF_SHIFT=12 CONFIG_PRINTK_SAFE_LOG_BUF_SHIFT=13 CONFIG_HAVE_UNSTABLE_SCHED_CLOCK=y # # Scheduler features # CONFIG_UCLAMP_TASK=y CONFIG_UCLAMP_BUCKETS_COUNT=5 # end of Scheduler features CONFIG_ARCH_WANT_BATCHED_UNMAP_TLB_FLUSH=y # CONFIG_CGROUPS is not set # CONFIG_CHECKPOINT_RESTORE is not set # CONFIG_SCHED_AUTOGROUP is not set CONFIG_SYSFS_DEPRECATED=y CONFIG_SYSFS_DEPRECATED_V2=y CONFIG_RELAY=y CONFIG_BLK_DEV_INITRD=y CONFIG_INITRAMFS_SOURCE="" CONFIG_RD_GZIP=y # CONFIG_RD_BZIP2 is not set # CONFIG_RD_LZMA is not set CONFIG_RD_XZ=y # CONFIG_RD_LZO is not set CONFIG_RD_LZ4=y CONFIG_RD_ZSTD=y CONFIG_BOOT_CONFIG=y CONFIG_CC_OPTIMIZE_FOR_PERFORMANCE=y # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set CONFIG_HAVE_UID16=y CONFIG_SYSCTL_EXCEPTION_TRACE=y CONFIG_HAVE_PCSPKR_PLATFORM=y CONFIG_BPF=y CONFIG_EXPERT=y # CONFIG_MULTIUSER is not set CONFIG_SGETMASK_SYSCALL=y CONFIG_SYSFS_SYSCALL=y # CONFIG_FHANDLE is not set # CONFIG_POSIX_TIMERS is not set CONFIG_PRINTK=y CONFIG_PRINTK_NMI=y CONFIG_BUG=y # CONFIG_PCSPKR_PLATFORM is not set # CONFIG_BASE_FULL is not set # CONFIG_FUTEX is not set CONFIG_EPOLL=y CONFIG_SIGNALFD=y # CONFIG_TIMERFD is not set CONFIG_EVENTFD=y CONFIG_SHMEM=y CONFIG_AIO=y # CONFIG_IO_URING is not set CONFIG_ADVISE_SYSCALLS=y CONFIG_MEMBARRIER=y CONFIG_KALLSYMS=y CONFIG_KALLSYMS_ALL=y CONFIG_KALLSYMS_BASE_RELATIVE=y CONFIG_BPF_SYSCALL=y CONFIG_USERFAULTFD=y CONFIG_ARCH_HAS_MEMBARRIER_SYNC_CORE=y CONFIG_RSEQ=y CONFIG_DEBUG_RSEQ=y # CONFIG_EMBEDDED is not set
Re: [PATCH v3 2/2] uacce: modify the module author information.
On 2020/9/23 18:09, Kai Ye wrote:
> The spelling of "Hisilicon" is modified.
>
> Signed-off-by: Kai Ye
> Reviewed-by: Zhou Wang
> Reviewed-by: Jonathan Cameron
> Acked-by: Zhangfei Gao
> ---
> drivers/misc/uacce/uacce.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/misc/uacce/uacce.c b/drivers/misc/uacce/uacce.c
> index 9b83bc5..1d09707 100644
> --- a/drivers/misc/uacce/uacce.c
> +++ b/drivers/misc/uacce/uacce.c
> @@ -530,5 +530,5 @@ subsys_initcall(uacce_init);
> module_exit(uacce_exit);
>
> MODULE_LICENSE("GPL");
> -MODULE_AUTHOR("Hisilicon Tech. Co., Ltd.");
> +MODULE_AUTHOR("HiSilicon Tech. Co., Ltd.");
> MODULE_DESCRIPTION("Accelerator interface for Userland applications");
>
Hi Hartman,
Could you take this patch?
Best,
Zhou
[PATCH v4 3/3] arm: dts: ls1021a: fix rcpm failed to claim resource
The range of dcfg reg is wrong, which overlap with other device,
such as rcpm. This issue causing rcpm driver failed to claim
reg resource when calling devm_ioremap_resource().
Signed-off-by: Ran Wang
Acked-by: Li Yang
---
Change in v4:
- None
Change in v3:
- None
Change in v2:
- None
arch/arm/boot/dts/ls1021a.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/ls1021a.dtsi b/arch/arm/boot/dts/ls1021a.dtsi
index e12809d6..16744f64 100644
--- a/arch/arm/boot/dts/ls1021a.dtsi
+++ b/arch/arm/boot/dts/ls1021a.dtsi
@@ -173,7 +173,7 @@
dcfg: dcfg@1ee {
compatible = "fsl,ls1021a-dcfg", "syscon";
- reg = <0x0 0x1ee 0x0 0x1>;
+ reg = <0x0 0x1ee 0x0 0x1000>;
big-endian;
};
--
2.7.4
Re: [PATCH v3 1/2] uacce: delete some redundant code.
On 2020/9/23 18:09, Kai Ye wrote:
> Delete some redundant code.
>
> Signed-off-by: Kai Ye
> Reviewed-by: Zhou Wang
> Reviewed-by: Jonathan Cameron
> Acked-by: Zhangfei Gao
> ---
> drivers/misc/uacce/uacce.c | 11 ---
> 1 file changed, 11 deletions(-)
>
> diff --git a/drivers/misc/uacce/uacce.c b/drivers/misc/uacce/uacce.c
> index 107028e..9b83bc5 100644
> --- a/drivers/misc/uacce/uacce.c
> +++ b/drivers/misc/uacce/uacce.c
> @@ -239,17 +239,6 @@ static int uacce_fops_mmap(struct file *filep, struct
> vm_area_struct *vma)
>
> switch (type) {
> case UACCE_QFRT_MMIO:
> - if (!uacce->ops->mmap) {
> - ret = -EINVAL;
> - goto out_with_lock;
> - }
> -
> - ret = uacce->ops->mmap(q, vma, qfr);
> - if (ret)
> - goto out_with_lock;
> -
> - break;
> -
> case UACCE_QFRT_DUS:
> if (!uacce->ops->mmap) {
> ret = -EINVAL;
>
Hi Hartman,
Could you take this patch?
Best,
Zhou
[PATCH v4 2/3] arm: dts: ls1021a: fix flextimer failed to wake system
The data of property 'fsl,rcpm-wakeup' is not corrcet, which causing RCPM driver incorrectly program register IPPDEXPCR1, then flextimer is wrongly clock gated during system suspend, can't send interrupt to wake. Signed-off-by: Ran Wang Acked-by: Li Yang --- Change in v4: - None Change in v3: - None Change in v2: - None arch/arm/boot/dts/ls1021a.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/ls1021a.dtsi b/arch/arm/boot/dts/ls1021a.dtsi index 827373e..e12809d6 100644 --- a/arch/arm/boot/dts/ls1021a.dtsi +++ b/arch/arm/boot/dts/ls1021a.dtsi @@ -1013,7 +1013,7 @@ compatible = "fsl,ls1021a-ftm-alarm"; reg = <0x0 0x29d 0x0 0x1>; reg-names = "ftm"; - fsl,rcpm-wakeup = < 0x2 0x0>; + fsl,rcpm-wakeup = < 0x0 0x2000>; interrupts = ; big-endian; }; -- 2.7.4
[PATCH v4 1/3] soc: fsl: handle RCPM errata A-008646 on SoC LS1021A
From: Biwen Li
Hardware issue:
- Reading register RCPM_IPPDEXPCR1 always return zero, this causes
system firmware could not get correct information and wrongly do
clock gating for all wakeup source IP during system suspend. Then
those IPs will never get chance to wake system.
Workaround:
- Copy register RCPM_IPPDEXPCR1's setting to register SCFG_SPARECR8
to allow system firmware's psci method read it and do things accordingly.
Signed-off-by: Biwen Li
Signed-off-by: Ran Wang
---
Change in v4:
- Replace property 'fsl,ippdexpcr1-alt-reg' with compatible checking as the
workaround trigger condition.
Change in v3:
- Add copy_ippdexpcr1_setting(), simplize workaournd's implementation
according to binding update.
- Minor update on commit message.
Change in v2:
- Update commit message to be more clear.
- Replace device_property_read_u32_array() with
syscon_regmap_lookup_by_phandle_args()
to make code simpler.
drivers/soc/fsl/rcpm.c | 35 ++-
1 file changed, 34 insertions(+), 1 deletion(-)
diff --git a/drivers/soc/fsl/rcpm.c b/drivers/soc/fsl/rcpm.c
index a093dbe..4ace28c 100644
--- a/drivers/soc/fsl/rcpm.c
+++ b/drivers/soc/fsl/rcpm.c
@@ -2,7 +2,7 @@
//
// rcpm.c - Freescale QorIQ RCPM driver
//
-// Copyright 2019 NXP
+// Copyright 2019-2020 NXP
//
// Author: Ran Wang
@@ -22,6 +22,28 @@ struct rcpm {
boollittle_endian;
};
+#define SCFG_SPARECR8 0x051c
+
+static void copy_ippdexpcr1_setting(u32 val)
+{
+ struct device_node *np;
+ void __iomem *regs;
+ u32 reg_val;
+
+ np = of_find_compatible_node(NULL, NULL, "fsl,ls1021a-scfg");
+ if (!np)
+ return;
+
+ regs = of_iomap(np, 0);
+ if (!regs)
+ return;
+
+ reg_val = ioread32be(regs + SCFG_SPARECR8);
+ iowrite32be(val | reg_val, regs + SCFG_SPARECR8);
+
+ iounmap(regs);
+}
+
/**
* rcpm_pm_prepare - performs device-level tasks associated with power
* management, such as programming related to the wakeup source control.
@@ -90,6 +112,17 @@ static int rcpm_pm_prepare(struct device *dev)
tmp |= ioread32be(address);
iowrite32be(tmp, address);
}
+ /*
+* Workaround of errata A-008646 on SoC LS1021A:
+* There is a bug of register ippdexpcr1.
+* Reading configuration register RCPM_IPPDEXPCR1
+* always return zero. So save ippdexpcr1's value
+* to register SCFG_SPARECR8.And the value of
+* ippdexpcr1 will be read from SCFG_SPARECR8.
+*/
+ if (dev_of_node(dev) && (i == 1))
+ if (of_device_is_compatible(np, "fsl,ls1021a-rcpm"))
+ copy_ippdexpcr1_setting(tmp);
}
return 0;
--
2.7.4
Re: [PATCH 29/29] arm64: dts: qcom: Harmonize DWC USB3 DT nodes name
Serge Semin 于2020年10月20日周二 下午8:04写道： > > In accordance with the DWC USB3 bindings the corresponding node > name is suppose to comply with the Generic USB HCD DT schema, which > requires the USB nodes to have the name acceptable by the regexp: > "^usb(@.*)?" . Make sure the "snps,dwc3"-compatible nodes are correctly > named. This need a counterpart driver change: drivers/usb/dwc3/dwc3-qcom.c dwc3_np = of_get_child_by_name(np, "dwc3"); Li Jun
Re: [PATCH v13 2/8] mtd: rawnand: rockchip: NFC drivers for RK3308, RK2928 and others
Hello,
赵仪峰 wrote on Mon, 2 Nov 2020 11:46:04
+0800:
> Hi Johan,
>
> void nand_deselect_target(struct nand_chip *chip)
> {
> if (chip->legacy.select_chip)
> chip->legacy.select_chip(chip, -1);
>
> chip->cur_cs = -1;
> }
>
> I need add the code below and it work.
>
> chip->legacy.select_chip = rk_nfc_select_chip;
>
> But I found almost all nandc drivers do not add this code. Is there any other
> way to implement it？
Indeed, we don't accept new code we legacy bindings.
I don't understand what extra consumption you are trying to avoid,
because if it is the NAND device itself that is able to save power when
it gets unselected, it's really none of you controller's business.
Perhaps it's the time to focus on the controller support and tune the
code base later in a bid to reduce consumption.
Thanks,
Miquèl
Re: lockdep: possible irq lock inversion dependency detected (trig->leddev_list_lock)
On Sat, Oct 31, 2020 at 06:17:40PM +0800, Boqun Feng wrote:
> Hi Andrea,
>
> On Sun, Nov 01, 2020 at 10:26:14AM +0100, Andrea Righi wrote:
> > I'm getting the following lockdep splat (see below).
> >
> > Apparently this warning starts to be reported after applying:
> >
> > e918188611f0 ("locking: More accurate annotations for read_lock()")
> >
> > It looks like a false positive to me, but it made me think a bit and
> > IIUC there can be still a potential deadlock, even if the deadlock
> > scenario is a bit different than what lockdep is showing.
> >
> > In the assumption that read-locks are recursive only in_interrupt()
> > context (as stated in e918188611f0), the following scenario can still
> > happen:
> >
> > CPU0 CPU1
> >
> > read_lock(>leddev_list_lock);
> >
> > write_lock(>leddev_list_lock);
> >
> > kbd_bh()
> >-> read_lock(>leddev_list_lock);
> >
> > *** DEADLOCK ***
> >
> > The write-lock is waiting on CPU1 and the second read_lock() on CPU0
> > would be blocked by the write-lock *waiter* on CPU1 => deadlock.
> >
>
> No, this is not a deadlock, as a write-lock waiter only blocks
> *non-recursive* readers, so since the read_lock() in kbd_bh() is called
> in soft-irq (which in_interrupt() returns true), so it's a recursive
> reader and won't get blocked by the write-lock waiter.
That's right, I was missing that in_interrupt() returns true also from
soft-irq context.
>
> > In that case we could prevent this deadlock condition using a workqueue
> > to call kbd_propagate_led_state() instead of calling it directly from
> > kbd_bh() (even if lockdep would still report the false positive).
> >
>
> The deadlock senario reported by the following splat is:
>
>
> CPU 0: CPU 1:
> CPU 2:
> - -
> -
> led_trigger_event():
> read_lock(>leddev_list_lock);
>
> ata_hsm_qs_complete():
> spin_lock_irqsave(>lock);
>
> write_lock(>leddev_list_lock);
> ata_port_freeze():
> ata_do_link_abort():
> ata_qc_complete():
> ledtrig_disk_activity():
> led_trigger_blink_oneshot():
>
> read_lock(>leddev_list_lock);
> // ^ not in in_interrupt()
> context, so could get blocked by CPU 2
>
> ata_bmdma_interrupt():
> spin_lock_irqsave(>lock);
>
> , where CPU 0 is blocked by CPU 1 because of the spin_lock_irqsave() in
> ata_bmdma_interrupt() and CPU 1 is blocked by CPU 2 because of the
> read_lock() in led_trigger_blink_oneshot() and CPU 2 is blocked by CPU 0
> because of an arbitrary writer on >leddev_list_lock.
>
> So I don't think it's false positive, but I might miss something
> obvious, because I don't know what the code here actually does ;-)
With the CPU2 part it all makes sense now and lockdep was right. :)
At this point I think we could just schedule a separate work to do the
led trigger and avoid calling it with host->lock held and that should
prevent the deadlock. I'll send a patch to do that.
Thanks tons for you detailed explanation!
-Andrea
[PATCH] riscv: uaccess: fix __put_kernel_nofault()
The copy_from_kernel_nofault() is broken on riscv because the 'dst' and
'src' are mistakenly reversed in __put_kernel_nofault() macro.
copy_to_kernel_nofault:
...
0xffe0003159b8 <+30>:sd a4,0(a1) # a1 aka 'src'
Fixes: d464118cdc ("riscv: implement __get_kernel_nofault and
__put_user_nofault")
Signed-off-by: Changbin Du
Cc: Christoph Hellwig
---
arch/riscv/include/asm/uaccess.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/riscv/include/asm/uaccess.h b/arch/riscv/include/asm/uaccess.h
index c47e6b35c551..824b2c9da75b 100644
--- a/arch/riscv/include/asm/uaccess.h
+++ b/arch/riscv/include/asm/uaccess.h
@@ -476,7 +476,7 @@ do {
\
do { \
long __kr_err; \
\
- __put_user_nocheck(*((type *)(dst)), (type *)(src), __kr_err); \
+ __put_user_nocheck(*((type *)(src)), (type *)(dst), __kr_err); \
if (unlikely(__kr_err)) \
goto err_label; \
} while (0)
--
2.17.1
Re: [PATCH v5 08/15] mm: Add unsafe_follow_pfn
On Fri, Oct 30, 2020 at 11:08:08AM +0100, Daniel Vetter wrote: > Also mark up follow_pfn as EXPORT_SYMBOL_GPL. The only safe way to use > that by drivers/modules is together with an mmu_notifier, and that's > all _GPL stuff. I also think it also needs to be renamed to explicitly break any existing users out of tree or int the submission queue.
Re: [PATCH v4] mm/oom_kill: change comment and rename is_dump_unreclaim_slabs()
On Sat 31-10-20 02:27:04, Hui Su wrote:
> Change the comment of is_dump_unreclaim_slabs(), it just check
> whether nr_unreclaimable slabs amount is greater than user
> memory, and explain why we dump unreclaim slabs.
>
> Rename it to should_dump_unreclaim_slab() maybe better.
>
> Signed-off-by: Hui Su
Acked-by: Michal Hocko
Thanks!
> ---
> mm/oom_kill.c | 14 --
> 1 file changed, 8 insertions(+), 6 deletions(-)
>
> diff --git a/mm/oom_kill.c b/mm/oom_kill.c
> index 8b84661a6410..04b19b7b5435 100644
> --- a/mm/oom_kill.c
> +++ b/mm/oom_kill.c
> @@ -170,11 +170,13 @@ static bool oom_unkillable_task(struct task_struct *p)
> return false;
> }
>
> -/*
> - * Print out unreclaimble slabs info when unreclaimable slabs amount is
> greater
> - * than all user memory (LRU pages)
> - */
> -static bool is_dump_unreclaim_slabs(void)
> +/**
> + * Check whether unreclaimable slab amount is greater than
> + * all user memory(LRU pages).
> + * dump_unreclaimable_slab() could help in the case that
> + * oom due to too much unreclaimable slab used by kernel.
> +*/
> +static bool should_dump_unreclaim_slab(void)
> {
> unsigned long nr_lru;
>
> @@ -463,7 +465,7 @@ static void dump_header(struct oom_control *oc, struct
> task_struct *p)
> mem_cgroup_print_oom_meminfo(oc->memcg);
> else {
> show_mem(SHOW_MEM_FILTER_NODES, oc->nodemask);
> - if (is_dump_unreclaim_slabs())
> + if (should_dump_unreclaim_slab())
> dump_unreclaimable_slab();
> }
> if (sysctl_oom_dump_tasks)
> --
> 2.29.0
>
>
--
Michal Hocko
SUSE Labs
[PATCH 2/2] usb: host: XHCI: xhci-mtk.c: support mediatek,keep-clock-on
Some platform dose not support turn off clock when system suspending.
We add an option "mediatek,keep-clock-on" for distinquish these platforms.
When "mediatek,keep-clock-on" has been set, xhci-mtk driver will skip
turning clock on and off during system suspend and resume.
Signed-off-by: Macpaul Lin
---
drivers/usb/host/xhci-mtk.c |9 +++--
drivers/usb/host/xhci-mtk.h |1 +
2 files changed, 8 insertions(+), 2 deletions(-)
diff --git a/drivers/usb/host/xhci-mtk.c b/drivers/usb/host/xhci-mtk.c
index 4311d4c..c6c2804 100644
--- a/drivers/usb/host/xhci-mtk.c
+++ b/drivers/usb/host/xhci-mtk.c
@@ -464,6 +464,9 @@ static int xhci_mtk_probe(struct platform_device *pdev)
of_property_read_u32(node, "mediatek,u3p-dis-msk",
>u3p_dis_msk);
+ /* keep clock on when suspending on some platform */
+ mtk->keep_clk_on = of_property_read_bool(node,
"mediatek,keep-clock-on");
+
ret = usb_wakeup_of_property_parse(mtk, node);
if (ret) {
dev_err(dev, "failed to parse uwk property\n");
@@ -624,7 +627,8 @@ static int __maybe_unused xhci_mtk_suspend(struct device
*dev)
del_timer_sync(>shared_hcd->rh_timer);
xhci_mtk_host_disable(mtk);
- xhci_mtk_clks_disable(mtk);
+ if (!mtk->keep_clk_on)
+ xhci_mtk_clks_disable(mtk);
usb_wakeup_set(mtk, true);
return 0;
}
@@ -636,7 +640,8 @@ static int __maybe_unused xhci_mtk_resume(struct device
*dev)
struct xhci_hcd *xhci = hcd_to_xhci(hcd);
usb_wakeup_set(mtk, false);
- xhci_mtk_clks_enable(mtk);
+ if (!mtk->keep_clk_on)
+ xhci_mtk_clks_enable(mtk);
xhci_mtk_host_enable(mtk);
xhci_dbg(xhci, "%s: restart port polling\n", __func__);
diff --git a/drivers/usb/host/xhci-mtk.h b/drivers/usb/host/xhci-mtk.h
index a93cfe8..37639c5 100644
--- a/drivers/usb/host/xhci-mtk.h
+++ b/drivers/usb/host/xhci-mtk.h
@@ -152,6 +152,7 @@ struct xhci_hcd_mtk {
struct regmap *uwk;
u32 uwk_reg_base;
u32 uwk_vers;
+ bool keep_clk_on;
};
static inline struct xhci_hcd_mtk *hcd_to_mtk(struct usb_hcd *hcd)
--
1.7.9.5
Re: [PATCH v8] Add MediaTek MT6779 devapc driver
Gentle ping for these patch series. Thanks ! On Thu, 2020-10-15 at 11:24 +0800, Neal Liu wrote: > add subject > > On Thu, 2020-10-15 at 11:20 +0800, Neal Liu wrote: > > These patch series introduce a MediaTek MT6779 devapc driver. > > > > MediaTek bus fabric provides TrustZone security support and data protection > > to prevent slaves from being accessed by unexpected masters. > > The security violation is logged and sent to the processor for further > > analysis or countermeasures. > > > > Any occurrence of security violation would raise an interrupt, and it will > > be handled by mtk-devapc driver. > > The violation information is printed in order to find the murderer. > > > > changes since v7: > > - fix VIO_MOD_TO_REG_IND calculation wrong problem. > > - revise parameter type of ISR. > > > > changes since v6: > > - remove unnecessary mask/unmask module irq during ISR. > > > > changes since v5: > > - remove redundant write reg operation. > > - use static variable of vio_dbgs instead. > > - add stop_devapc() if driver is removed. > > > > changes since v4: > > - refactor data structure. > > - merge two simple functions into one. > > - refactor register setting to prevent too many function call overhead. > > > > changes since v3: > > - revise violation handling flow to make it more easily to understand > > hardware behavior. > > - add more comments to understand how hardware works. > > > > changes since v2: > > - pass platform info through DT data. > > - remove unnecessary function. > > - remove slave_type because it always equals to 1 in current support SoC. > > - use vio_idx_num instread of list all devices' index. > > - add more comments to describe hardware behavior. > > > > changes since v1: > > - move SoC specific part to DT data. > > - remove unnecessary boundary check. > > - remove unnecessary data type declaration. > > - use read_poll_timeout() instread of for loop polling. > > - revise coding style elegantly. > > > > > > *** BLURB HERE *** > > > > Neal Liu (2): > > dt-bindings: devapc: add bindings for mtk-devapc > > soc: mediatek: add mt6779 devapc driver > > > > .../bindings/soc/mediatek/devapc.yaml | 58 > > drivers/soc/mediatek/Kconfig | 9 + > > drivers/soc/mediatek/Makefile | 1 + > > drivers/soc/mediatek/mtk-devapc.c | 308 ++ > > 4 files changed, 376 insertions(+) > > create mode 100644 > > Documentation/devicetree/bindings/soc/mediatek/devapc.yaml > > create mode 100644 drivers/soc/mediatek/mtk-devapc.c > > > >
Hard lockup on Raspberry Pi 4 after v5.10-rc1
Hi everyone,
Starting with v5.10-rc1, I appear to be experiencing hard lockups on my
Raspberry Pi 4 when compiling LLVM. My standard workflow for testing the
Raspberry Pi 4 has been compiling tip of tree LLVM (to catch host
AArch64 issues), compiling linux-next ARCH=arm64 defconfig, then booting
it with QEMU + KVM, which has caught a few issues so far. Starting with
v5.10-rc1, compiling LLVM causes the serial console to print junk like
|▒pp▒p▒p▒p
p|▒|▒|p▒p▒p|▒▒|▒|▒|p|▒▒|▒|▒|
p▒pp▒▒▒|▒▒
▒
▒|▒|
p▒
▒
▒▒
▒
▒p|p
then I lose my mosh connection and I see the lights on the front of the
Pi stop blinking.
I have managed to narrow it down to a commit somewhere in the armsoc DT
merge.
Good: 2e368dd2bbea ("Merge tag 'armsoc-drivers' of
git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc")
Bad: e533cda12d8f ("Merge tag 'armsoc-dt' of
git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc")
I have not been able to complete a full bisect due to a lack of time
unfortunately, I am sending this email to hopefully get some more eyes
on the issue.
$ head -n6 /boot/config.txt
# My settings
enable_uart=1
core_freq_min=500
kernel=Image
os_prefix=custom-mainline-gcc-arm64/
upstream_kernel=1
$ cat /boot/.firmware_revision
e8ddac7cd34b179efd702d4dc1efd0ccf44559b9
I can reproduce the issue with:
$ git clone --depth=1 https://github.com/llvm/llvm-project
$ mkdir -p llvm-project/build && cd llvm-project/build
$ cmake \
-G Ninja \
-DCMAKE_BUILD_TYPE=Release \
-DLLVM_ENABLE_PROJECTS="clang;lld" \
../llvm &&
ninja
If you need any more information or testing, please let me know!
Cheers,
Nathan
Re: [GIT PULL] dma-mapping fix for 5.10
On Sat, Oct 31, 2020 at 12:50:44PM -0700, Linus Torvalds wrote:
> So this is just a stylistic nit, and has no impact on this pull (which
> I've done). But looking at the patch, it triggers one of my "this is
> wrong" patterns.
Adding the author and maintainer of that code so that they can sort it
out.
>
> In particular, this:
>
> u64 dma_start = 0;
> ...
> for (dma_start = ~0ULL; r->size; r++) {
>
> is actually completely bogus in theory, and it's a horribly horribly
> bad pattern to have.
>
> The thing that I hate about that parttern is "~0ULL", which is simply wrong.
>
> The correct pattern for "all bits set" is ~0. NOTHING ELSE. No extra
> letters at the end.
>
> Why? Because using an unsigned type is wrong, and will not extend the
> bits up to a potentially bigger size.
>
> So adding that "ULL" is not just three extra characters to type, it
> actually _detracts_ from the code and makes it more fragile and
> potentially wrong.
>
> It so happens, that yes, in the kernel, "ull" us 64-bit, and you get
> the right results. So the code _works_. But it's wrong, and it now
> requires that the types match exactly (ie it would not be broken if
> somebody ever were to say "I want to use use 128-bit dma addresses and
> u128").
>
> Another example is using "~0ul", which would give different results on
> a 32-bit kernel and a 64-bit kernel. Again: DON'T DO THAT.
>
> I repeat: the right thing to do for "all bits set" is just a plain ~0
> or -1. Either of those are fine (technically assumes a 2's complement
> machine, but let's just be honest: that's a perfectly fine assumption,
> and -1 might be preferred by some because it makes that sign extension
> behavior of the integer constant more obvious).
>
> Don't try to do anything clever or anything else, because it's going
> to be strictly worse.
>
> The old code that that patch removed was "technically correct", but
> just pointless, and actually shows the problem:
>
> for (dma_start = ~(dma_addr_t)0; r->size; r++) {
>
> the above is indeed a correct way to say "I want all bits set in a
> dma_addr_t", but while correct, it is - once again - strictly inferior
> to just using "~0".
>
> Why? Because "~0" works regardless of type. IOW, exactly *because*
> people used the wrong pattern for "all bits set", that patch was now
> (a) bigger than necessary and (b) much more ilkely to cause bugs (ie I
> could have imagined people changing just the type of the variable
> without changing the initialization).
>
> So in that tiny three-line patch there were actually several examples
> of why "~0" is the right pattern to use for "all bits set". Because it
> JustWorks(tm) in ways other patterns do not.
>
> And if you have a compiler that complains about assigning -1 or ~0 to
> an unsigned variable, get rid of that piece of garbage. You're almost
> certainly either using some warning flag that you shouldn't be using,
> or the compiler writer didn't know what they were doing.
>
> Linus
> ___
> iommu mailing list
> io...@lists.linux-foundation.org
> https://lists.linuxfoundation.org/mailman/listinfo/iommu
---end quoted text---
Re: KASAN: slab-out-of-bounds Write in xfrm_attr_cpy32
syzbot has bisected this issue to:
commit 5106f4a8acff480e244300bc5097c0ad7048c3a2
Author: Dmitry Safonov
Date: Mon Sep 21 14:36:55 2020 +
xfrm/compat: Add 32=>64-bit messages translator
bisection log: https://syzkaller.appspot.com/x/bisect.txt?x=16cefa8a50
start commit: 3cea11cd Linux 5.10-rc2
git tree: upstream
final oops: https://syzkaller.appspot.com/x/report.txt?x=15cefa8a50
console output: https://syzkaller.appspot.com/x/log.txt?x=11cefa8a50
kernel config: https://syzkaller.appspot.com/x/.config?x=61033507391c77ff
dashboard link: https://syzkaller.appspot.com/bug?extid=c43831072e7df506a646
userspace arch: i386
syz repro: https://syzkaller.appspot.com/x/repro.syz?x=1388676c50
C reproducer: https://syzkaller.appspot.com/x/repro.c?x=158f642c50
Reported-by: syzbot+c43831072e7df506a...@syzkaller.appspotmail.com
Fixes: 5106f4a8acff ("xfrm/compat: Add 32=>64-bit messages translator")
For information about bisection process see: https://goo.gl/tpsmEJ#bisection
[PATCH] sound/core/seq: remove dead code
The function snd_seq_queue_client_termination() is only called from
function seq_free_client1(). The seq_free_client1() calls function
snd_seq_queue_client_leave(), which deletes all objects whose owner
equals to client->number in global array queue_list, before the function
snd_seq_queue_client_termination(), which checks whether there are
any objects in global array queue_list whose owner equals to
client->number, with the same argument client->number. So
the checking code in function snd_seq_queue_client_termination() is
dead code. Remove those dead code.
Signed-off-by: Yu Hao
---
sound/core/seq/seq_queue.c | 11 ---
1 file changed, 11 deletions(-)
diff --git a/sound/core/seq/seq_queue.c b/sound/core/seq/seq_queue.c
index 71a6ea62c3be..91b3f3295d0b 100644
--- a/sound/core/seq/seq_queue.c
+++ b/sound/core/seq/seq_queue.c
@@ -545,21 +545,10 @@ void snd_seq_queue_client_termination(int client)
unsigned long flags;
int i;
struct snd_seq_queue *q;
- bool matched;
for (i = 0; i < SNDRV_SEQ_MAX_QUEUES; i++) {
if ((q = queueptr(i)) == NULL)
continue;
- spin_lock_irqsave(>owner_lock, flags);
- matched = (q->owner == client);
- if (matched)
- q->klocked = 1;
- spin_unlock_irqrestore(>owner_lock, flags);
- if (matched) {
- if (q->timer->running)
- snd_seq_timer_stop(q->timer);
- snd_seq_timer_reset(q->timer);
- }
queuefree(q);
}
}
--
2.17.1
Re: [PATCH v3 3/3] arm64/ima: add ima_arch support
On Fri, Oct 30, 2020 at 12:53:25PM +0100, Ard Biesheuvel wrote:
> On Fri, 30 Oct 2020 at 07:09, Chester Lin wrote:
> >
> > Add arm64 IMA arch support. The code and arch policy is mainly inherited
> > from x86.
> >
> > Signed-off-by: Chester Lin
> > ---
> > arch/arm64/Kconfig | 1 +
> > arch/arm64/kernel/Makefile | 2 ++
> > arch/arm64/kernel/ima_arch.c | 43
> > 3 files changed, 46 insertions(+)
> > create mode 100644 arch/arm64/kernel/ima_arch.c
> >
> > diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig
> > index a42e8d13cc88..496a4a26afc6 100644
> > --- a/arch/arm64/Kconfig
> > +++ b/arch/arm64/Kconfig
> > @@ -201,6 +201,7 @@ config ARM64
> > select SWIOTLB
> > select SYSCTL_EXCEPTION_TRACE
> > select THREAD_INFO_IN_TASK
> > + imply IMA_SECURE_AND_OR_TRUSTED_BOOT if EFI
> > help
> > ARM 64-bit (AArch64) Linux support.
> >
> > diff --git a/arch/arm64/kernel/Makefile b/arch/arm64/kernel/Makefile
> > index bbaf0bc4ad60..0f6cbb50668c 100644
> > --- a/arch/arm64/kernel/Makefile
> > +++ b/arch/arm64/kernel/Makefile
> > @@ -69,3 +69,5 @@ extra-y +=
> > $(head-y) vmlinux.lds
> > ifeq ($(CONFIG_DEBUG_EFI),y)
> > AFLAGS_head.o += -DVMLINUX_PATH="\"$(realpath $(objtree)/vmlinux)\""
> > endif
> > +
> > +obj-$(CONFIG_IMA_SECURE_AND_OR_TRUSTED_BOOT) += ima_arch.o
> > diff --git a/arch/arm64/kernel/ima_arch.c b/arch/arm64/kernel/ima_arch.c
> > new file mode 100644
> > index ..564236d77adc
> > --- /dev/null
> > +++ b/arch/arm64/kernel/ima_arch.c
> > @@ -0,0 +1,43 @@
> > +// SPDX-License-Identifier: GPL-2.0+
> > +/*
> > + * Copyright (C) 2018 IBM Corporation
> > + */
> > +#include
> > +#include
> > +#include
> > +
> > +bool arch_ima_get_secureboot(void)
> > +{
> > + static bool sb_enabled;
> > + static bool initialized;
> > +
> > + if (!initialized & efi_enabled(EFI_BOOT)) {
> > + sb_enabled = ima_get_efi_secureboot();
> > + initialized = true;
> > + }
> > +
> > + return sb_enabled;
> > +}
> > +
> > +/* secure and trusted boot arch rules */
> > +static const char * const sb_arch_rules[] = {
> > +#if !IS_ENABLED(CONFIG_KEXEC_SIG)
> > + "appraise func=KEXEC_KERNEL_CHECK appraise_type=imasig",
> > +#endif /* CONFIG_KEXEC_SIG */
> > + "measure func=KEXEC_KERNEL_CHECK",
> > +#if !IS_ENABLED(CONFIG_MODULE_SIG)
> > + "appraise func=MODULE_CHECK appraise_type=imasig",
> > +#endif
> > + "measure func=MODULE_CHECK",
> > + NULL
> > +};
> > +
> > +const char * const *arch_get_ima_policy(void)
> > +{
> > + if (IS_ENABLED(CONFIG_IMA_ARCH_POLICY) &&
> > arch_ima_get_secureboot()) {
> > + if (IS_ENABLED(CONFIG_MODULE_SIG))
> > + set_module_sig_enforced();
> > + return sb_arch_rules;
> > + }
> > + return NULL;
> > +}
> > --
> > 2.28.0
> >
>
> Can we move all this stuff into security/integrity/ima/ima_efi.c instead?
>
Actually I hesitated to move all this stuff into ima_efi.c when coding v3
because I haven't figured out a clear picture to achieve it. Since each
architecture could still have different details to trigger secure boot detection
and define their arch-specific rules [e.g. Having boot_params in x86_64 creates
more conditions that need to be determined before calling get_sb_mode()], moving
all this stuff seems to decrease the flexibility. Besides, it might also affect
the consistency of ima_arch as well, for example, ppc and s390 still use these
function prototypes defined in ima.h. Since these functions are already referred
by non-EFI architectures, why don't we still reuse these prototypes? For
example,
we could remain a smaller arch_ima_get_secureboot() and the arch-specific rules
but move the major part of arch_get_ima_policy() into ima_efi.c. For example,
we could implement an efi_ima_policy() for arch_get_ima_policy() to call so that
the arch_get_ima_policy() doesn't have to know some details such as checking
conditions or calling set_module_sig_enforced().
Please feel free to let me know if any suggestions.
RE: [PATCH net-next v2] net/usb/r8153_ecm: support ECM mode for RTL8153
Jakub Kicinski [...] > Can you describe the use case in more detail? > > AFAICT r8152 defines a match for the exact same device. > Does it not mean that which driver is used will be somewhat random > if both are built? I export rtl_get_version() from r8152. It would return none zero value if r8152 could support this device. Both r8152 and r8153_ecm would check the return value of rtl_get_version() in porbe(). Therefore, if rtl_get_version() return none zero value, the r8152 is used for the device with vendor mode. Otherwise, the r8153_ecm is used for the device with ECM mode. > > +/* Define these values to match your device */ > > +#define VENDOR_ID_REALTEK 0x0bda > > +#define VENDOR_ID_MICROSOFT0x045e > > +#define VENDOR_ID_SAMSUNG 0x04e8 > > +#define VENDOR_ID_LENOVO 0x17ef > > +#define VENDOR_ID_LINKSYS 0x13b1 > > +#define VENDOR_ID_NVIDIA 0x0955 > > +#define VENDOR_ID_TPLINK 0x2357 > > $ git grep 0x2357 | grep -i tplink > drivers/net/usb/cdc_ether.c:#define TPLINK_VENDOR_ID 0x2357 > drivers/net/usb/r8152.c:#define VENDOR_ID_TPLINK 0x2357 > drivers/usb/serial/option.c:#define TPLINK_VENDOR_ID 0x2357 > > $ git grep 0x17ef | grep -i lenovo > drivers/hid/hid-ids.h:#define USB_VENDOR_ID_LENOVO0x17ef > drivers/hid/wacom.h:#define USB_VENDOR_ID_LENOVO 0x17ef > drivers/net/usb/cdc_ether.c:#define LENOVO_VENDOR_ID 0x17ef > drivers/net/usb/r8152.c:#define VENDOR_ID_LENOVO 0x17ef > > Time to consolidate those vendor id defines perhaps? It seems that there is no such header file which I could include or add the new vendor IDs. Best Regards, Hayes
[PATCH 1/2] dt-bindings: usb: mediatek,mtk-xhci: add keep-clock-on
Option "mediatek,keep-clock-on" means to keep clock on during system suspend and resume. Some platform will flush register settings if clock has been disabled when system is suspended. Set this option to avoid clock off. Signed-off-by: Macpaul Lin --- .../devicetree/bindings/usb/mediatek,mtk-xhci.yaml |7 +++ 1 file changed, 7 insertions(+) diff --git a/Documentation/devicetree/bindings/usb/mediatek,mtk-xhci.yaml b/Documentation/devicetree/bindings/usb/mediatek,mtk-xhci.yaml index ea696c8..a956dde 100644 --- a/Documentation/devicetree/bindings/usb/mediatek,mtk-xhci.yaml +++ b/Documentation/devicetree/bindings/usb/mediatek,mtk-xhci.yaml @@ -104,6 +104,12 @@ properties: description: enable USB remote wakeup, see power/wakeup-source.txt type: boolean + mediatek,keep-clock-on: +description: | + Keep clock on during system suspend and resume. Some platform will flush + register settings if clock has been disabled when system is suspended. +type: boolean + mediatek,syscon-wakeup: $ref: /schemas/types.yaml#/definitions/phandle-array maxItems: 1 @@ -175,6 +181,7 @@ examples: imod-interval-ns = <1>; mediatek,syscon-wakeup = < 0x400 1>; wakeup-source; +mediatek,keep-clock-on; usb3-lpm-capable; }; ... -- 1.7.9.5
[tip:irq/urgent] BUILD SUCCESS 17bb415fefedb74d2ff02656cf59e4e3ab92ee20
tree/branch: https://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git irq/urgent branch HEAD: 17bb415fefedb74d2ff02656cf59e4e3ab92ee20 Merge tag 'irqchip-fixes-5.10-1' of git://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms into irq/urgent elapsed time: 722m configs tested: 136 configs skipped: 2 The following configs have been built successfully. More configs may be tested in the coming days. gcc tested configs: arm defconfig arm64allyesconfig arm64 defconfig arm allyesconfig arm allmodconfig arm imx_v4_v5_defconfig arm pxa255-idp_defconfig powerpc mpc837x_mds_defconfig shsh7785lcr_defconfig nios2allyesconfig riscvnommu_k210_defconfig arc nsimosci_hs_smp_defconfig powerpc mpc832x_mds_defconfig sparc64 defconfig powerpccell_defconfig nds32 defconfig pariscgeneric-64bit_defconfig powerpcmpc7448_hpc2_defconfig sh ul2_defconfig mips maltaaprp_defconfig archsdk_defconfig m68k sun3x_defconfig powerpc tqm8548_defconfig umkunit_defconfig powerpc mpc8313_rdb_defconfig mips malta_kvm_defconfig sh espt_defconfig powerpcamigaone_defconfig powerpc arches_defconfig shmigor_defconfig arm pxa168_defconfig sh sh7785lcr_32bit_defconfig powerpc ppc44x_defconfig mips ip28_defconfig sh polaris_defconfig powerpc64 defconfig openriscdefconfig shtitan_defconfig armcerfcube_defconfig i386 alldefconfig powerpc mpc832x_rdb_defconfig powerpc mpc8560_ads_defconfig arm iop32x_defconfig powerpc ppc40x_defconfig h8300 edosk2674_defconfig m68k bvme6000_defconfig sh sh2007_defconfig ia64 alldefconfig mips cobalt_defconfig microblazenommu_defconfig arm gemini_defconfig sh sdk7780_defconfig sparc sparc32_defconfig powerpc allnoconfig arm rpc_defconfig c6x alldefconfig powerpc pmac32_defconfig powerpc ksi8560_defconfig powerpcicon_defconfig ia64 allmodconfig ia64defconfig ia64 allyesconfig m68k allmodconfig m68kdefconfig m68k allyesconfig cskydefconfig alpha defconfig alphaallyesconfig nios2 defconfig arc allyesconfig nds32 allnoconfig c6x allyesconfig xtensa allyesconfig h8300allyesconfig arc defconfig sh allmodconfig parisc defconfig s390 allyesconfig parisc allyesconfig s390defconfig i386 allyesconfig sparcallyesconfig sparc defconfig i386defconfig mips allyesconfig mips allmodconfig powerpc allyesconfig powerpc allmodconfig x86_64 randconfig-a004-20201101 x86_64 randconfig-a003-20201101 x86_64 randconfig-a005-20201101 x86_64 randconfig-a002-20201101 x86_64 randconfig-a006-20201101 x86_64 randconfig-a001-20201101 i386 randconfig-a004-20201101 i386 randconfig-a006-20201101 i386 randconfig-a005-20201101 i386 randconfig-a001-20201101 i386 randconfig-a002-20201101 i386
Re: [PATCH] net: can: prevent potential access of uninitialized value in canfd_rcv()
On 11/2/20 4:13 AM, Anant Thazhemadam wrote:
> In canfd_rcv(), cfd->len is uninitialized when skb->len = 0, and this
> uninitialized cfd->len is accessed nonetheless by pr_warn_once().
>
> Fix this uninitialized variable access by checking cfd->len's validity
> condition (cfd->len > CANFD_MAX_DLEN) separately after the skb->len's
> condition is checked, and appropriately modify the log messages that
> are generated as well.
> In case either of the required conditions fail, the skb is freed and
> NET_RX_DROP is returned, same as before.
>
> Reported-by: syzbot+9bcb0c9409066696d...@syzkaller.appspotmail.com
> Tested-by: Anant Thazhemadam
> Signed-off-by: Anant Thazhemadam
> ---
> This patch was locally tested using the reproducer and .config file
> generated by syzbot.
>
> net/can/af_can.c | 19 ++-
> 1 file changed, 14 insertions(+), 5 deletions(-)
>
> diff --git a/net/can/af_can.c b/net/can/af_can.c
> index ea29a6d97ef5..1b9f2e50f065 100644
> --- a/net/can/af_can.c
> +++ b/net/can/af_can.c
> @@ -694,16 +694,25 @@ static int canfd_rcv(struct sk_buff *skb, struct
> net_device *dev,
Can you create a similar patch for "can_rcv()"?
> {
> struct canfd_frame *cfd = (struct canfd_frame *)skb->data;
>
> - if (unlikely(dev->type != ARPHRD_CAN || skb->len != CANFD_MTU ||
> - cfd->len > CANFD_MAX_DLEN)) {
> - pr_warn_once("PF_CAN: dropped non conform CAN FD skbuf: dev
> type %d, len %d, datalen %d\n",
> + if (unlikely(dev->type != ARPHRD_CAN || skb->len != CANFD_MTU)) {
> + pr_warn_once("PF_CAN: dropped non conform CAN FD skbuff: dev
> type %d, len %d\n",
> + dev->type, skb->len);
> + goto free_skb;
> + }
> +
> + // This check is made separately since cfd->len would be uninitialized
> if skb->len = 0.
Please don't use C++ comment style in the kernel.
> + else if (unlikely(cfd->len > CANFD_MAX_DLEN)) {
Please move the "else" right after the closing curly bracket: "} else if () {"
or convert it into an "if () {"
> + pr_warn_once("PF_CAN: dropped non conform CAN FD skbuff: dev
> type %d, len %d, datalen %d\n",
>dev->type, skb->len, cfd->len);
> - kfree_skb(skb);
> - return NET_RX_DROP;
> + goto free_skb;
> }
>
> can_receive(skb, dev);
> return NET_RX_SUCCESS;
> +
> +free_skb:
> + kfree_skb(skb);
> + return NET_RX_DROP;
> }
>
> /* af_can protocol functions */
>
regards,
Marc
--
Pengutronix e.K. | Marc Kleine-Budde |
Embedded Linux | https://www.pengutronix.de |
Vertretung West/Dortmund | Phone: +49-231-2826-924 |
Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917- |
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Re: [PATCH v3 0/2] uacce: fix some coding styles
On Mon, Nov 02, 2020 at 02:41:12PM +0800, Zhou Wang wrote: > On 2020/9/23 18:09, Kai Ye wrote: > > 1. delete some redundant code. > > 2. modify the module author information. "Hisilicon" > > spelling is error. > > > > Changes v2 -> v3: > > Two things, splited to two patches. > > Changes v1 -> v2: > > deleted extra NULL pointer check in uacce_fops. > > > > Kai Ye (2): > > uacce: fix some coding styles > > uacce: modify the module author information. > > > > drivers/misc/uacce/uacce.c | 13 + > > 1 file changed, 1 insertion(+), 12 deletions(-) > > > > Hi Hartman， > > Could you help to take this clean up patch? I do not see a patch here :( If I have missed something, please resend it. thanks, greg k-h
Re: [PATCH v7 0/3] iio: adc: mt6360: Add ADC driver for MT6360
Jonathan Cameron 於 2020年11月1日 週日 下午11:40寫道： > > On Tue, 20 Oct 2020 16:07:44 +0800 > Gene Chen wrote: > > > In-Reply-To: > > > > This patch series add MT6360 ADC support contains driver, testing document > > and binding document > > > Hi Gene, > > Other than that small edit needed in the dt binding this is stalled on > the label code getting upstreamed into the core. > > I've asked Cristian to repost that so hopefully we can resolve that dependency > and get this merged fairly soon. > > For the dt thing I can just drop the description entirely, but would prefer > if you sent a v8 fixing the tags issue Rob pointed out and also fixing that > description. > > Thanks, > > Jonathan > = > +description: | > + Family of simple ADCs with i2c interface and internal references. That seems unlikely... = Do you means I should remove this description? If yes, I will also update PATCH v8 for add tags and fix dt-bindings. > > Gene Chen (2) > > dt-bindings: iio: adc: add bindings doc for MT6360 ADC > > Documentation: ABI: testing: mt6360: Add ADC sysfs guideline > > iio: adc: mt6360: Add ADC driver for MT6360 > > > > Documentation/ABI/testing/sysfs-bus-iio-adc-mt6360 | 78 > > ++ > > Documentation/devicetree/bindings/iio/adc/mediatek,mt6360-adc.yaml | 34 > > drivers/iio/adc/Kconfig| 11 > > drivers/iio/adc/Makefile |1 > > drivers/iio/adc/mt6360-adc.c | 372 > > ++ > > 5 files changed, 496 insertions(+) > > > > changelogs between v1 & v2 > > - adc: use IIO_CHAN_INFO_PROCESSED only > > - adc: use devm_iio_triggered_buffer_setup > > - adc: use use s64 to record timestamp > > > > changelogs between v2 & v3 > > - Rearrange include file order by alphabet > > - Set line length constraint below 100 > > - Add Document for testing adc sysfs node guideline > > - Set compiler 64 bit aligned when handle iio timestamp > > > > changelogs between v3 & v4 > > - Fix sysfs guideline description > > - Replace iio channel processed by raw/scale/offset > > - Add comment of read adc flow for special HW design > > > > changelogs between v4 & v5 > > - Rename dt-bindings aligned to file name > > - Aligned sysfs node name with driver and add VBUSDIVX description > > - Add ADC channel sysfs node "*_labels" > > > > changelogs between v5 & v6 > > - Memset aligned adc data > > - Remove strong casting void pointer > > > > changelogs between v6 & v7 > > - Avoid adc polling infinite loop > > >
Re: [PATCH 0/3] mdraid sb and bitmap write alignment on 512e drives
On 10/23/2020 11:31 AM, Christopher Unkel wrote: Hello all, While investigating some performance issues on mdraid 10 volumes formed with "512e" disks (4k native/physical sector size but with 512 byte sector emulation), I've found two cases where mdraid will needlessly issue writes that start on 4k byte boundary, but are are shorter than 4k: 1. writes of the raid superblock; and 2. writes of the last page of the write-intent bitmap. The following is an excerpt of a blocktrace of one of the component members of a mdraid 10 volume during a 4k write near the end of the array: 8,32 112 0.01687 711 D WS 2064 + 8 [kworker/11:1H] * 8,32 115 0.001454119 711 D WS 2056 + 1 [kworker/11:1H] * 8,32 118 0.002847204 711 D WS 2080 + 7 [kworker/11:1H] 8,32 11 11 0.003700545 3094 D WS 11721043920 + 8 [md127_raid1] 8,32 11 14 0.308785692 711 D WS 2064 + 8 [kworker/11:1H] * 8,32 11 17 0.310201697 711 D WS 2056 + 1 [kworker/11:1H] 8,32 11 20 5.500799245 711 D WS 2064 + 8 [kworker/11:1H] * 8,32 11 2315.740923558 711 D WS 2080 + 7 [kworker/11:1H] Note the starred transactions, which each start on a 4k boundary, but are less than 4k in length, and so will use the 512-byte emulation. Sector 2056 holds the superblock, and is written as a single 512-byte write. Sector 2086 holds the bitmap bit relevant to the written sector. When it is written the active bits of the last page of the bitmap are written, starting at sector 2080, padded out to the end of the 512-byte logical sector as required. This results in a 3.5kb write, again using the 512-byte emulation. Hi Christopher Which superblock version do you use? If it's super1.1, superblock starts at 0 sector. If it's super1.2, superblock starts at 8 sector. If it's super1.0, superblock starts at the end of device and bitmap is before superblock. As mentioned above, bitmap is behind the superblock, so it should not be super1.0. So I have a question why does 2056 hold the superblock? Regards Xiao Note that in some arrays the last page of the bitmap may be sufficiently full that they are not affected by the issue with the bitmap write. As there can be a substantial penalty to using the 512-byte sector emulation (turning writes into read-modify writes if the relevant sector is not in the drive's cache) I believe it makes sense to pad these writes out to a 4k boundary. The writes are already padded out for "4k native" drives, where the short access is illegal. The following patch set changes the superblock and bitmap writes to respect the physical block size (e.g. 4k for today's 512e drives) when possible. In each case there is already logic for padding out to the underlying logical sector size. I reuse or repeat the logic for padding out to the physical sector size, but treat the padding out as optional rather than mandatory. The corresponding block trace with these patches is: 8,32 12 0.03410 694 D WS 2064 + 8 [kworker/1:1H] 8,32 15 0.001368788 694 D WS 2056 + 8 [kworker/1:1H] 8,32 18 0.002727981 694 D WS 2080 + 8 [kworker/1:1H] 8,32 1 11 0.003533831 3063 D WS 11721043920 + 8 [md127_raid1] 8,32 1 14 0.253952321 694 D WS 2064 + 8 [kworker/1:1H] 8,32 1 17 0.255354215 694 D WS 2056 + 8 [kworker/1:1H] 8,32 1 20 5.337938486 694 D WS 2064 + 8 [kworker/1:1H] 8,32 1 2315.577963062 694 D WS 2080 + 8 [kworker/1:1H] I do notice that the code for bitmap writes has a more sophisticated and thorough check for overlap than the code for superblock writes. (Compare write_sb_page in md-bitmap.c vs. super_1_load in md.c.) From what I know since the various structures starts have always been 4k aligned anyway, it is always safe to pad the superblock write out to 4k (as occurs on 4k native drives) but not necessarily futher. Feedback appreciated. --Chris Christopher Unkel (3): md: align superblock writes to physical blocks md: factor sb write alignment check into function md: pad writes to end of bitmap to physical blocks drivers/md/md-bitmap.c | 80 +- drivers/md/md.c| 15 2 files changed, 63 insertions(+), 32 deletions(-)
Re: [PATCH] usb: dwc2: Fix unused label warning
On 10/31/2020 10:03 AM, YueHaibing wrote: > drivers/usb/dwc2/platform.c: In function ‘dwc2_driver_probe’: > drivers/usb/dwc2/platform.c:611:1: warning: label ‘error_debugfs’ defined but > not used [-Wunused-label] > error_debugfs: > ^ > > Move label 'error_debugfs' to ifdef block. > > Signed-off-by: YueHaibing > --- > drivers/usb/dwc2/platform.c | 3 +++ > 1 file changed, 3 insertions(+) > > diff --git a/drivers/usb/dwc2/platform.c b/drivers/usb/dwc2/platform.c > index e2820676beb1..5f18acac7406 100644 > --- a/drivers/usb/dwc2/platform.c > +++ b/drivers/usb/dwc2/platform.c > @@ -608,10 +608,13 @@ static int dwc2_driver_probe(struct platform_device > *dev) > #endif /* CONFIG_USB_DWC2_PERIPHERAL || CONFIG_USB_DWC2_DUAL_ROLE */ > return 0; > > +#if IS_ENABLED(CONFIG_USB_DWC2_PERIPHERAL) || \ > + IS_ENABLED(CONFIG_USB_DWC2_DUAL_ROLE) > error_debugfs: > dwc2_debugfs_exit(hsotg); > if (hsotg->hcd_enabled) > dwc2_hcd_remove(hsotg); > +#endif > error_drd: > dwc2_drd_exit(hsotg); > > Thank you for patch. Identical patch submitted by on 10/17/2020 by Martin Blumenstingl: [PATCH] usb: dwc2: Avoid leaving the error_debugfs label unused. I'm already ACKed it. Thanks, Minas
man-pages-5.09 is released
Gidday, The Linux man-pages maintainer proudly announces: man-pages-5.09 - man pages for Linux This release resulted from patches, bug reports, reviews, and comments from more than 40 people, with just over 500 commits making changes to nearly 600 pages. Nine new pages have been added (six of these are the result of splitting the rather unwieldy queue(3) page into a number of small pieces). Special shout out to Alejandro Colomar, who provided more than half (265!) of the commits. Tarball download: http://www.kernel.org/doc/man-pages/download.html Git repository: https://git.kernel.org/cgit/docs/man-pages/man-pages.git/ Online changelog: http://man7.org/linux/man-pages/changelog.html#release_5.09 A short summary of the release is blogged at: https://linux-man-pages.blogspot.com/2020/11/man-pages-509-is-released.html The current version of the pages is browsable at: http://man7.org/linux/man-pages/ A selection of changes in this release that may be of interest to readers of LKML is shown below. Cheers, Michael Changes in man-pages-5.09 New and rewritten pages --- system_data_types.7 Alejandro Colomar, Michael Kerrisk A new page documenting a wide range of system data types. kernel_lockdown.7 David Howells, Heinrich Schuchardt [Michael Kerrisk] New page documenting the Kernel Lockdown feature Newly documented interfaces in existing pages - fanotify_init.2 fanotify.7 Amir Goldstein [Jan Kara, Matthew Bobrowski] Document FAN_REPORT_DIR_FID fanotify_init.2 fanotify.7 Amir Goldstein [Jan Kara, Matthew Bobrowski] Document FAN_REPORT_NAME statx.2 Ira Weiny Add STATX_ATTR_DAX strerror.3 Michael Kerrisk Document strerrorname_np() and strerrordesc_np() strsignal.3 Michael Kerrisk Document sigabbrev_np() and sigdescr_np(). loop.4 Yang Xu Document LOOP_CONFIGURE ioctl Yang Xu Document LO_FLAGS_DIRECT_IO flag capabilities.7 Michael Kerrisk Document the CAP_CHECKPOINT_RESTORE capability added in Linux 5.9 ip.7 Stephen Smalley [Paul Moore] Document IP_PASSSEC for UDP sockets ip.7 socket.7 Stephen Smalley Document SO_PEERSEC for AF_INET sockets Sridhar Samudrala Document SO_INCOMING_NAPI_ID socket.7 unix.7 Stephen Smalley [Serge Hallyn, Simon McVittie] Add initial description for SO_PEERSEC Changes to individual pages --- clone.2 Michael Kerrisk CAP_CHECKPOINT_RESTORE can now be used to employ 'set_tid' epoll_ctl.2 Michael Kerrisk epoll instances can be nested to a maximum depth of 5 This limit appears to be an off-by-one count against EP_MAX_NESTS (4). perf_event_open.2 Alexey Budankov Update the man page with CAP_PERFMON related information seccomp.2 Michael Kerrisk [Jann Horn] Warn reader that SECCOMP_RET_TRACE can be overridden Highlight to the reader that if another filter returns a higher-precedence action value, then the ptracer will not be notified. Michael Kerrisk [Rich Felker] Warn against the use of SECCOMP_RET_KILL_THREAD Killing a thread with SECCOMP_RET_KILL_THREAD is very likely to leave the rest of the process in a broken state. dlopen.3 Michael Kerrisk Clarify DT_RUNPATH/DT_RPATH details It is the DT_RUNPATH/DT_RPATH of the calling object (not the executable) that is relevant for the library search. Verified by experiment. loop.4 Yang Xu Add some details about lo_flags proc.5 Michael Kerrisk Update capability requirements for accessing /proc/[pid]/map_files Jann Horn [Mark Mossberg] Document inaccurate RSS due to SPLIT_RSS_COUNTING Michael Kerrisk Note "open file description" as (better) synonym for "file handle" bpf-helpers.7 Michael Kerrisk [Jakub Wilk] Resync with current kernel source capabilities.7 Michael Kerrisk Under CAP_SYS_ADMIN, group "sub-capabilities" together CAP_BPF, CAP_PERFMON, and CAP_CHECKPOINT_RESTORE have all been added to split out the power of CAP_SYS_ADMIN into weaker pieces. Group all of these capabilities together in the list under CAP_SYS_ADMIN, to make it clear that there is a pattern to these capabilities. fanotify.7 fanotify_mark.2 Amir Goldstein [Jan Kara, Matthew Bobrowski] Generalize documentation of FAN_REPORT_FID -- Michael Kerrisk Linux man-pages maintainer; http://www.kernel.org/doc/man-pages/ Linux/UNIX System Programming Training: http://man7.org/training/
Re: [PATCH v5 14/21] kprobes: Remove NMI context check
On Mon, 2 Nov 2020 14:53:34 +0900
Masami Hiramatsu wrote:
> On Mon, 2 Nov 2020 14:11:38 +0900
> Masami Hiramatsu wrote:
>
> > On Fri, 30 Oct 2020 21:38:31 -0400
> > Steven Rostedt wrote:
> >
> > > On Sat, 29 Aug 2020 22:02:36 +0900
> > > Masami Hiramatsu wrote:
> > >
> > > > Since the commit 9b38cc704e84 ("kretprobe: Prevent triggering
> > > > kretprobe from within kprobe_flush_task") sets a dummy current
> > > > kprobe in the trampoline handler by kprobe_busy_begin/end(),
> > > > it is not possible to run a kretprobe pre handler in kretprobe
> > > > trampoline handler context even with the NMI. If the NMI interrupts
> > > > a kretprobe_trampoline_handler() and it hits a kretprobe, the
> > > > 2nd kretprobe will detect recursion correctly and it will be
> > > > skipped.
> > > > This means we have almost no double-lock issue on kretprobes by NMI.
> > > >
> > > > The last one point is in cleanup_rp_inst() which also takes
> > > > kretprobe_table_lock without setting up current kprobes.
> > > > So adding kprobe_busy_begin/end() there allows us to remove
> > > > in_nmi() check.
> > > >
> > > > The above commit applies kprobe_busy_begin/end() on x86, but
> > > > now all arch implementation are unified to generic one, we can
> > > > safely remove the in_nmi() check from arch independent code.
> > > >
> > >
> > > So are you saying that lockdep is lying?
> > >
> > > Kprobe smoke test: started
> > >
> > >
> > > WARNING: inconsistent lock state
> > > 5.10.0-rc1-test+ #29 Not tainted
> > >
> > > inconsistent {INITIAL USE} -> {IN-NMI} usage.
> > > swapper/0/1 [HC1[1]:SC0[0]:HE0:SE1] takes:
> > > 82b07118 (>lock){}-{2:2}, at:
> > > pre_handler_kretprobe+0x4b/0x193
> > > {INITIAL USE} state was registered at:
> > > lock_acquire+0x280/0x325
> > > _raw_spin_lock+0x30/0x3f
> > > recycle_rp_inst+0x3f/0x86
> > > __kretprobe_trampoline_handler+0x13a/0x177
> > > trampoline_handler+0x48/0x57
> > > kretprobe_trampoline+0x2a/0x4f
> > > kretprobe_trampoline+0x0/0x4f
> > > init_kprobes+0x193/0x19d
> > > do_one_initcall+0xf9/0x27e
> > > kernel_init_freeable+0x16e/0x2b6
> > > kernel_init+0xe/0x109
> > > ret_from_fork+0x22/0x30
> > > irq event stamp: 1670
> > > hardirqs last enabled at (1669): []
> > > slab_free_freelist_hook+0xb4/0xfd
> > > hardirqs last disabled at (1670): [] exc_int3+0xae/0x10a
> > > softirqs last enabled at (1484): []
> > > __do_softirq+0x352/0x38d
> > > softirqs last disabled at (1471): []
> > > asm_call_irq_on_stack+0x12/0x20
> > >
> > > other info that might help us debug this:
> > > Possible unsafe locking scenario:
> > >
> > >CPU0
> > >
> > > lock(>lock);
> > >
> > > lock(>lock);
> > >
> > > *** DEADLOCK ***
> > >
> > > no locks held by swapper/0/1.
> > >
> > > stack backtrace:
> > > CPU: 0 PID: 1 Comm: swapper/0 Not tainted 5.10.0-rc1-test+ #29
> > > Hardware name: MSI MS-7823/CSM-H87M-G43 (MS-7823), BIOS V1.6 02/22/2014
> > > Call Trace:
> > > dump_stack+0x7d/0x9f
> > > print_usage_bug+0x1c0/0x1d3
> > > lock_acquire+0x302/0x325
> > > ? pre_handler_kretprobe+0x4b/0x193
> > > ? stop_machine_from_inactive_cpu+0x120/0x120
> > > _raw_spin_lock_irqsave+0x43/0x58
> > > ? pre_handler_kretprobe+0x4b/0x193
> > > pre_handler_kretprobe+0x4b/0x193
> > > ? stop_machine_from_inactive_cpu+0x120/0x120
> > > ? kprobe_target+0x1/0x16
> > > kprobe_int3_handler+0xd0/0x109
> > > exc_int3+0xb8/0x10a
> > > asm_exc_int3+0x31/0x40
> > > RIP: 0010:kprobe_target+0x1/0x16
> > > 5d c3 cc
> > > RSP: :c9033e00 EFLAGS: 0246
> > > RAX: 8110ea77 RBX: 0001 RCX: c9033cb4
> > > RDX: 0231 RSI: RDI: 3ca57c35
> > > RBP: c9033e20 R08: R09: 8111d207
> > > R10: 8881002ab480 R11: 8881002ab480 R12:
> > > R13: 82a52af0 R14: 0200 R15: 888100331130
> > > ? register_kprobe+0x43c/0x492
> > > ? stop_machine_from_inactive_cpu+0x120/0x120
> > > ? kprobe_target+0x1/0x16
> > > ? init_test_probes+0x2c6/0x38a
> > > init_kprobes+0x193/0x19d
> > > ? debugfs_kprobe_init+0xb8/0xb8
> > > do_one_initcall+0xf9/0x27e
> > > ? rcu_read_lock_sched_held+0x3e/0x75
> > > ? init_mm_internals+0x27b/0x284
> > > kernel_init_freeable+0x16e/0x2b6
> > > ? rest_init+0x152/0x152
> > > kernel_init+0xe/0x109
> > > ret_from_fork+0x22/0x30
> > > Kprobe smoke test: passed successfully
> > >
> > > Config attached.
> >
> > Thanks for the report! Let me check what happen.
>
> OK, confirmed. But this is actually false-positive report.
>
> The lockdep reports rp->lock case between pre_handler_kretprobe()
> and recycle_rp_inst() from __kretprobe_trampoline_handler().
> Since kretprobe_trampoline_handler() sets current_kprobe,
> if other kprobes hits on same CPU, those are skipped. This means
> pre_handler_kretprobe() is not called while executing
>
Re: [PATCH] iio: core: centralize ioctl() calls to the main chardev
On Fri, Sep 25, 2020 at 3:38 PM Jonathan Cameron wrote:
>
> On Thu, 24 Sep 2020 11:41:55 +0300
> Alexandru Ardelean wrote:
>
> > The aim of this is to improve a bit the organization of ioctl() calls in
> > IIO core. Currently the chardev is split across IIO core sub-modules/files.
> > The main chardev has to be able to handle ioctl() calls, and if we need to
> > add buffer ioctl() calls, this would complicate things.
> >
> > The 'industrialio-core.c' file will provide a 'iio_device_ioctl()' which
> > will iterate over a list of ioctls registered with the IIO device. These
> > can be event ioctl() or buffer ioctl() calls, or something else.
> >
> > Each ioctl() handler will have to return a IIO_IOCTL_UNHANDLED code (which
> > is positive 1), if the ioctl() did not handle the call in any. This
> > eliminates any potential ambiguities about negative error codes, which
> > should fail the call altogether.
> >
> > If any ioctl() returns 0, it was considered that it was serviced
> > successfully and the loop will exit.
> >
> > This change also moves the handling of the IIO_GET_EVENT_FD_IOCTL command
> > inside 'industrialio-event.c', where this is better suited.
> >
> > This patch is a combination of 2 other patches from an older series:
> > Patch 1: iio: core: add simple centralized mechanism for ioctl() handlers
> > Link:
> > https://lore.kernel.org/linux-iio/20200427131100.50845-6-alexandru.ardel...@analog.com/
> > Patch 2: iio: core: use new common ioctl() mechanism
> > Link:
> > https://lore.kernel.org/linux-iio/20200427131100.50845-7-alexandru.ardel...@analog.com/
> >
> > Signed-off-by: Alexandru Ardelean
> > ---
> >
> > Note: since this is a change to the IIO core, we don't need to put this in
> > right now; especially if there is a tight schedule, or we are too close to
> > a merge window.
>
> Looks good to me. As you suggest, lets let this one sit on the list for a
> while though!
ping on this
thanks
Alex
>
> Jonathan
>
> >
> > drivers/iio/iio_core.h | 15 -
> > drivers/iio/industrialio-core.c | 56
> > drivers/iio/industrialio-event.c | 28 +++-
> > include/linux/iio/iio-opaque.h | 2 ++
> > 4 files changed, 85 insertions(+), 16 deletions(-)
> >
> > diff --git a/drivers/iio/iio_core.h b/drivers/iio/iio_core.h
> > index fd9a5f1d5e51..fced02cadcc3 100644
> > --- a/drivers/iio/iio_core.h
> > +++ b/drivers/iio/iio_core.h
> > @@ -17,6 +17,20 @@ struct iio_dev;
> >
> > extern struct device_type iio_device_type;
> >
> > +#define IIO_IOCTL_UNHANDLED 1
> > +struct iio_ioctl_handler {
> > + struct list_head entry;
> > + long (*ioctl)(struct iio_dev *indio_dev, struct file *filp,
> > + unsigned int cmd, unsigned long arg);
> > +};
> > +
> > +long iio_device_ioctl(struct iio_dev *indio_dev, struct file *filp,
> > + unsigned int cmd, unsigned long arg);
> > +
> > +void iio_device_ioctl_handler_register(struct iio_dev *indio_dev,
> > +struct iio_ioctl_handler *h);
> > +void iio_device_ioctl_handler_unregister(struct iio_ioctl_handler *h);
> > +
> > int __iio_add_chan_devattr(const char *postfix,
> > struct iio_chan_spec const *chan,
> > ssize_t (*func)(struct device *dev,
> > @@ -74,7 +88,6 @@ static inline void iio_buffer_wakeup_poll(struct iio_dev
> > *indio_dev) {}
> > int iio_device_register_eventset(struct iio_dev *indio_dev);
> > void iio_device_unregister_eventset(struct iio_dev *indio_dev);
> > void iio_device_wakeup_eventset(struct iio_dev *indio_dev);
> > -int iio_event_getfd(struct iio_dev *indio_dev);
> >
> > struct iio_event_interface;
> > bool iio_event_enabled(const struct iio_event_interface *ev_int);
> > diff --git a/drivers/iio/industrialio-core.c
> > b/drivers/iio/industrialio-core.c
> > index 261d3b17edc9..964a0a2d6f8b 100644
> > --- a/drivers/iio/industrialio-core.c
> > +++ b/drivers/iio/industrialio-core.c
> > @@ -1567,6 +1567,7 @@ struct iio_dev *iio_device_alloc(struct device
> > *parent, int sizeof_priv)
> > }
> > dev_set_name(>dev, "iio:device%d", dev->id);
> > INIT_LIST_HEAD(_dev_opaque->buffer_list);
> > + INIT_LIST_HEAD(_dev_opaque->ioctl_handlers);
> >
> > return dev;
> > }
> > @@ -1660,26 +1661,47 @@ static int iio_chrdev_release(struct inode *inode,
> > struct file *filp)
> > return 0;
> > }
> >
> > -/* Somewhat of a cross file organization violation - ioctls here are
> > actually
> > - * event related */
> > +void iio_device_ioctl_handler_register(struct iio_dev *indio_dev,
> > +struct iio_ioctl_handler *h)
> > +{
> > + struct iio_dev_opaque *iio_dev_opaque = to_iio_dev_opaque(indio_dev);
> > +
> > + list_add_tail(>entry, _dev_opaque->ioctl_handlers);
> > +}
> > +
> > +void iio_device_ioctl_handler_unregister(struct iio_ioctl_handler *h)
> > +{
> > + list_del(>entry);
> > +}
> > +
Re: [PATCH v6 7/7] arm64: kgdb: Roundup cpus using IPI as NMI
On Thu, 29 Oct 2020 at 22:09, Daniel Thompson
wrote:
>
> On Thu, Oct 29, 2020 at 04:22:34PM +, Daniel Thompson wrote:
> > On Thu, Oct 29, 2020 at 08:26:27PM +0530, Sumit Garg wrote:
> > > arm64 platforms with GICv3 or later supports pseudo NMIs which can be
> > > leveraged to roundup CPUs which are stuck in hard lockup state with
> > > interrupts disabled that wouldn't be possible with a normal IPI.
> > >
> > > So instead switch to roundup CPUs using IPI turned as NMI. And in
> > > case a particular arm64 platform doesn't supports pseudo NMIs,
> > > it will switch back to default kgdb CPUs roundup mechanism.
> > >
> > > Signed-off-by: Sumit Garg
> > > ---
> > > arch/arm64/include/asm/kgdb.h | 9 +
> > > arch/arm64/kernel/ipi_nmi.c | 5 +
> > > arch/arm64/kernel/kgdb.c | 35 +++
> > > 3 files changed, 49 insertions(+)
> > >
> > > diff --git a/arch/arm64/include/asm/kgdb.h b/arch/arm64/include/asm/kgdb.h
> > > index 21fc85e..c3d2425 100644
> > > --- a/arch/arm64/include/asm/kgdb.h
> > > +++ b/arch/arm64/include/asm/kgdb.h
> > > @@ -24,6 +24,15 @@ static inline void arch_kgdb_breakpoint(void)
> > > extern void kgdb_handle_bus_error(void);
> > > extern int kgdb_fault_expected;
> > >
> > > +#ifdef CONFIG_KGDB
> > > +extern bool kgdb_ipi_nmicallback(int cpu, void *regs);
> > > +#else
> > > +static inline bool kgdb_ipi_nmicallback(int cpu, void *regs)
> > > +{
> > > + return false;
> > > +}
> > > +#endif
> > > +
> > > #endif /* !__ASSEMBLY__ */
> > >
> > > /*
> > > diff --git a/arch/arm64/kernel/ipi_nmi.c b/arch/arm64/kernel/ipi_nmi.c
> > > index 597dcf7..6ace182 100644
> > > --- a/arch/arm64/kernel/ipi_nmi.c
> > > +++ b/arch/arm64/kernel/ipi_nmi.c
> > > @@ -8,6 +8,7 @@
> > >
> > > #include
> > > #include
> > > +#include
> > > #include
> > > #include
> > >
> > > @@ -45,10 +46,14 @@ bool arch_trigger_cpumask_backtrace(const cpumask_t
> > > *mask, bool exclude_self)
> > > static irqreturn_t ipi_nmi_handler(int irq, void *data)
> > > {
> > > irqreturn_t ret = IRQ_NONE;
> > > + unsigned int cpu = smp_processor_id();
> > >
> > > if (nmi_cpu_backtrace(get_irq_regs()))
> > > ret = IRQ_HANDLED;
> > >
> > > + if (kgdb_ipi_nmicallback(cpu, get_irq_regs()))
> > > + ret = IRQ_HANDLED;
> > > +
> > > return ret;
> >
> > It would be better to declare existing return value for
> > kgdb_nmicallback() to be dangerously stupid and fix it so it returns an
> > irqreturn_t (that's easy since most callers do not need to check the
> > return value).
> >
> > Then this code simply becomes:
> >
> > return kgdb_nmicallback(cpu, get_irq_regs());
>
> Actually, reflecting on this maybe it is better to keep kgdb_nmicallin()
> and kgdb_nmicallback() aligned w.r.t. return codes (even if they are a
> little unusual).
>
> I'm still not sure why we'd keep kgdb_ipi_nmicallback() though.
> kgdb_nmicallback() is intended to be called from arch code...
>
I added kgdb_ipi_nmicallback() just to add a check for "kgdb_active"
prior to entry into kgdb as here we are sharing NMI among backtrace
and kgdb.
But after your comments, I looked carefully into kgdb_nmicallback()
and I see the "raw_spin_is_locked(_master_lock)" check as well. So
it looked sufficient to me for calling kgdb_nmicallback() directly
from the arch code and hence I will remove kgdb_ipi_nmicallback() in
the next version.
>
> Daniel.
>
>
> >
> >
> > > }
> > >
> > > diff --git a/arch/arm64/kernel/kgdb.c b/arch/arm64/kernel/kgdb.c
> > > index 1a157ca3..c26e710 100644
> > > --- a/arch/arm64/kernel/kgdb.c
> > > +++ b/arch/arm64/kernel/kgdb.c
> > > @@ -17,6 +17,7 @@
> > >
> > > #include
> > > #include
> > > +#include
> > > #include
> > >
> > > struct dbg_reg_def_t dbg_reg_def[DBG_MAX_REG_NUM] = {
> > > @@ -353,3 +354,37 @@ int kgdb_arch_remove_breakpoint(struct kgdb_bkpt
> > > *bpt)
> > > return aarch64_insn_write((void *)bpt->bpt_addr,
> > > *(u32 *)bpt->saved_instr);
> > > }
> > > +
> > > +bool kgdb_ipi_nmicallback(int cpu, void *regs)
> > > +{
> > > + if (atomic_read(_active) != -1) {
> > > + kgdb_nmicallback(cpu, regs);
> > > + return true;
> > > + }
> > > +
> > > + return false;
> > > +}
> >
> > I *really* don't like this function.
> >
> > If the return code of kgdb_nmicallback() is broken then fix it, don't
> > just wrap it and invent a new criteria for the return code.
> >
> > To be honest I don't actually think the logic in kgdb_nmicallback() is
> > broken. As mentioned above the return value has a weird definition (0
> > for "handled it OK" and 1 for "nothing for me to do") but the logic to
> > calculate the return code looks OK.
> >
Makes sense, will remove it instead.
> >
> > > +
> > > +static void kgdb_smp_callback(void *data)
> > > +{
> > > + unsigned int cpu = smp_processor_id();
> > > +
> > > + if (atomic_read(_active) != -1)
> > > + kgdb_nmicallback(cpu, get_irq_regs());
> > > +}
> >
Re: [PATCH AUTOSEL 5.9 075/147] coresight: Make sysfs functional on topologies with per core sink
Hi,
Upstream commit,
commit bb1860efc817c18fce4112f25f51043e44346d1b
Author: Linu Cherian
Date: Wed Sep 16 13:17:34 2020 -0600
coresight: etm: perf: Sink selection using sysfs is deprecated
need to go along with this, else there will be build breakage.
This applies for 5.4, 5.8 and 5.9
Mathieu, could you please ACK ?
Please let me know if i need to send the patch to
sta...@vger.kernel.org separately.
Thanks.
On Tue, Oct 27, 2020 at 5:20 AM Sasha Levin wrote:
>
> From: Linu Cherian
>
> [ Upstream commit 6d578258b955fce1bbd9a8fefe7b10065a84 ]
>
> Coresight driver assumes sink is common across all the ETMs,
> and tries to build a path between ETM and the first enabled
> sink found using bus based search. This breaks sysFS usage
> on implementations that has multiple per core sinks in
> enabled state.
>
> To fix this, coresight_get_enabled_sink API is updated to
> do a connection based search starting from the given source,
> instead of bus based search.
> With sink selection using sysfs depecrated for perf interface,
> provision for reset is removed as well in this API.
>
> Signed-off-by: Linu Cherian
> [Fixed indentation problem and removed obsolete comment]
> Signed-off-by: Mathieu Poirier
> Link:
> https://lore.kernel.org/r/20200916191737.4001561-15-mathieu.poir...@linaro.org
> Signed-off-by: Greg Kroah-Hartman
> Signed-off-by: Sasha Levin
> ---
> drivers/hwtracing/coresight/coresight-priv.h | 3 +-
> drivers/hwtracing/coresight/coresight.c | 62 +---
> 2 files changed, 29 insertions(+), 36 deletions(-)
>
> diff --git a/drivers/hwtracing/coresight/coresight-priv.h
> b/drivers/hwtracing/coresight/coresight-priv.h
> index f2dc625ea5856..5fe773c4d6cc5 100644
> --- a/drivers/hwtracing/coresight/coresight-priv.h
> +++ b/drivers/hwtracing/coresight/coresight-priv.h
> @@ -148,7 +148,8 @@ static inline void coresight_write_reg_pair(void __iomem
> *addr, u64 val,
> void coresight_disable_path(struct list_head *path);
> int coresight_enable_path(struct list_head *path, u32 mode, void *sink_data);
> struct coresight_device *coresight_get_sink(struct list_head *path);
> -struct coresight_device *coresight_get_enabled_sink(bool reset);
> +struct coresight_device *
> +coresight_get_enabled_sink(struct coresight_device *source);
> struct coresight_device *coresight_get_sink_by_id(u32 id);
> struct coresight_device *
> coresight_find_default_sink(struct coresight_device *csdev);
> diff --git a/drivers/hwtracing/coresight/coresight.c
> b/drivers/hwtracing/coresight/coresight.c
> index e9c90f2de34ac..bb4f9e0a5438d 100644
> --- a/drivers/hwtracing/coresight/coresight.c
> +++ b/drivers/hwtracing/coresight/coresight.c
> @@ -540,50 +540,46 @@ struct coresight_device *coresight_get_sink(struct
> list_head *path)
> return csdev;
> }
>
> -static int coresight_enabled_sink(struct device *dev, const void *data)
> +static struct coresight_device *
> +coresight_find_enabled_sink(struct coresight_device *csdev)
> {
> - const bool *reset = data;
> - struct coresight_device *csdev = to_coresight_device(dev);
> + int i;
> + struct coresight_device *sink;
>
> if ((csdev->type == CORESIGHT_DEV_TYPE_SINK ||
> csdev->type == CORESIGHT_DEV_TYPE_LINKSINK) &&
> -csdev->activated) {
> - /*
> -* Now that we have a handle on the sink for this session,
> -* disable the sysFS "enable_sink" flag so that possible
> -* concurrent perf session that wish to use another sink don't
> -* trip on it. Doing so has no ramification for the current
> -* session.
> -*/
> - if (*reset)
> - csdev->activated = false;
> +csdev->activated)
> + return csdev;
>
> - return 1;
> + /*
> +* Recursively explore each port found on this element.
> +*/
> + for (i = 0; i < csdev->pdata->nr_outport; i++) {
> + struct coresight_device *child_dev;
> +
> + child_dev = csdev->pdata->conns[i].child_dev;
> + if (child_dev)
> + sink = coresight_find_enabled_sink(child_dev);
> + if (sink)
> + return sink;
> }
>
> - return 0;
> + return NULL;
> }
>
> /**
> - * coresight_get_enabled_sink - returns the first enabled sink found on the
> bus
> - * @deactivate:Whether the 'enable_sink' flag should be reset
> - *
> - * When operated from perf the deactivate parameter should be set to 'true'.
> - * That way the "enabled_sink" flag of the sink that was selected can be
> reset,
> - * allowing for other concurrent perf sessions to choose a different sink.
> + * coresight_get_enabled_sink - returns the first enabled sink using
> + * connection based search starting from the source reference
> *
> - * When operated from sysFS users
Re: [PATCH] drm/bridge: tpd12s015: Fix irq registering in tpd12s015_probe
On 31/10/2020 09:19, Sam Ravnborg wrote:
> Hi YueHaibing
>
> Thanks for the fix. Appreciated but please update as per comments below.
>
> On Sat, Oct 31, 2020 at 11:16:48AM +0800, YueHaibing wrote:
>> gpiod_to_irq() return negative value in case of error,
>> the existing code handle negative error codes wrongly.
>>
>> Fixes: cff5e6f7e83f ("drm/bridge: Add driver for the TI TPD12S015 HDMI level
>> shifter")
>> Signed-off-by: YueHaibing
>> ---
>> drivers/gpu/drm/bridge/ti-tpd12s015.c | 2 +-
>> 1 file changed, 1 insertion(+), 1 deletion(-)
>>
>> diff --git a/drivers/gpu/drm/bridge/ti-tpd12s015.c
>> b/drivers/gpu/drm/bridge/ti-tpd12s015.c
>> index 514cbf0eac75..a18d5197c16c 100644
>> --- a/drivers/gpu/drm/bridge/ti-tpd12s015.c
>> +++ b/drivers/gpu/drm/bridge/ti-tpd12s015.c
>> @@ -160,7 +160,7 @@ static int tpd12s015_probe(struct platform_device *pdev)
>>
>> /* Register the IRQ if the HPD GPIO is IRQ-capable. */
>> tpd->hpd_irq = gpiod_to_irq(tpd->hpd_gpio);
>> -if (tpd->hpd_irq) {
>> +if (tpd->hpd_irq > 0) {
>> ret = devm_request_threaded_irq(>dev, tpd->hpd_irq, NULL,
>> tpd12s015_hpd_isr,
>> IRQF_TRIGGER_RISING |
>
> The current implmentation will skip devm_request_threaded_irq() in case
> or error - but continue with the rest of the function. So the
> driver fails to return an error code.
That is intended. If the HPD gpio supports IRQs (gpiod_to_irq returns a valid
number), we use the
IRQ. If it doesn't (gpiod_to_irq returns an error), it gets polled via
detect(). Both are ok.
I don't know if the gpiod_to_irq never returning 0 is something we should rely
on. The docs say
gpiod_to_irq returns the irq number or an error, so I think checking for >= 0
matches the docs better.
Tomi
--
Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki.
Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki
Re: [PATCH] memstick: mspro_block: remove unneeded semicolon
On 10/31/20 7:18 PM, t...@redhat.com wrote: > From: Tom Rix > > A semicolon is not needed after a switch statement. Hi Tom, I was checking this patch. Not sure if it will come under as fix patch. Since this is not fixing any logical issue do we still need to add fix tag? Thanks, Kajol Jain > > Signed-off-by: Tom Rix > --- > drivers/memstick/core/mspro_block.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/memstick/core/mspro_block.c > b/drivers/memstick/core/mspro_block.c > index cd6b8d4f2335..afb892e7ffc6 100644 > --- a/drivers/memstick/core/mspro_block.c > +++ b/drivers/memstick/core/mspro_block.c > @@ -276,7 +276,7 @@ static const char *mspro_block_attr_name(unsigned char > tag) > return "attr_devinfo"; > default: > return NULL; > - }; > + } > } > > typedef ssize_t (*sysfs_show_t)(struct device *dev, >
[PATCH v7 3/4] net: dsa: mv88e6xxx: Change serdes lane parameter from u8 type to int
Returning 0 is no more an error case with MV88E6393 family
which has serdes lane numbers 0, 9 or 10.
So with this change .serdes_get_lane will return lane number
or error (-ENODEV).
Signed-off-by: Pavana Sharma
---
drivers/net/dsa/mv88e6xxx/chip.c | 28 +--
drivers/net/dsa/mv88e6xxx/chip.h | 16 +++
drivers/net/dsa/mv88e6xxx/port.c | 6 +--
drivers/net/dsa/mv88e6xxx/serdes.c | 76 +++---
drivers/net/dsa/mv88e6xxx/serdes.h | 50 ++--
5 files changed, 88 insertions(+), 88 deletions(-)
diff --git a/drivers/net/dsa/mv88e6xxx/chip.c b/drivers/net/dsa/mv88e6xxx/chip.c
index f0dbc05e30a4..4994b8eee659 100644
--- a/drivers/net/dsa/mv88e6xxx/chip.c
+++ b/drivers/net/dsa/mv88e6xxx/chip.c
@@ -484,12 +484,12 @@ static int mv88e6xxx_serdes_pcs_get_state(struct
dsa_switch *ds, int port,
struct phylink_link_state *state)
{
struct mv88e6xxx_chip *chip = ds->priv;
- u8 lane;
+ int lane = -ENODEV;
int err;
mv88e6xxx_reg_lock(chip);
lane = mv88e6xxx_serdes_get_lane(chip, port);
- if (lane && chip->info->ops->serdes_pcs_get_state)
+ if ((lane >= 0) && chip->info->ops->serdes_pcs_get_state)
err = chip->info->ops->serdes_pcs_get_state(chip, port, lane,
state);
else
@@ -505,11 +505,11 @@ static int mv88e6xxx_serdes_pcs_config(struct
mv88e6xxx_chip *chip, int port,
const unsigned long *advertise)
{
const struct mv88e6xxx_ops *ops = chip->info->ops;
- u8 lane;
+ int lane = -ENODEV;
if (ops->serdes_pcs_config) {
lane = mv88e6xxx_serdes_get_lane(chip, port);
- if (lane)
+ if (lane >= 0)
return ops->serdes_pcs_config(chip, port, lane, mode,
interface, advertise);
}
@@ -521,15 +521,15 @@ static void mv88e6xxx_serdes_pcs_an_restart(struct
dsa_switch *ds, int port)
{
struct mv88e6xxx_chip *chip = ds->priv;
const struct mv88e6xxx_ops *ops;
+ int lane = -ENODEV;
int err = 0;
- u8 lane;
ops = chip->info->ops;
if (ops->serdes_pcs_an_restart) {
mv88e6xxx_reg_lock(chip);
lane = mv88e6xxx_serdes_get_lane(chip, port);
- if (lane)
+ if (lane >= 0)
err = ops->serdes_pcs_an_restart(chip, port, lane);
mv88e6xxx_reg_unlock(chip);
@@ -543,11 +543,11 @@ static int mv88e6xxx_serdes_pcs_link_up(struct
mv88e6xxx_chip *chip, int port,
int speed, int duplex)
{
const struct mv88e6xxx_ops *ops = chip->info->ops;
- u8 lane;
+ int lane = -ENODEV;
if (!phylink_autoneg_inband(mode) && ops->serdes_pcs_link_up) {
lane = mv88e6xxx_serdes_get_lane(chip, port);
- if (lane)
+ if (lane >= 0)
return ops->serdes_pcs_link_up(chip, port, lane,
speed, duplex);
}
@@ -2424,11 +2424,11 @@ static irqreturn_t mv88e6xxx_serdes_irq_thread_fn(int
irq, void *dev_id)
struct mv88e6xxx_chip *chip = mvp->chip;
irqreturn_t ret = IRQ_NONE;
int port = mvp->port;
- u8 lane;
+ int lane = -ENODEV;
mv88e6xxx_reg_lock(chip);
lane = mv88e6xxx_serdes_get_lane(chip, port);
- if (lane)
+ if (lane >= 0)
ret = mv88e6xxx_serdes_irq_status(chip, port, lane);
mv88e6xxx_reg_unlock(chip);
@@ -2436,7 +2436,7 @@ static irqreturn_t mv88e6xxx_serdes_irq_thread_fn(int
irq, void *dev_id)
}
static int mv88e6xxx_serdes_irq_request(struct mv88e6xxx_chip *chip, int port,
- u8 lane)
+ int lane)
{
struct mv88e6xxx_port *dev_id = >ports[port];
unsigned int irq;
@@ -2465,7 +2465,7 @@ static int mv88e6xxx_serdes_irq_request(struct
mv88e6xxx_chip *chip, int port,
}
static int mv88e6xxx_serdes_irq_free(struct mv88e6xxx_chip *chip, int port,
-u8 lane)
+int lane)
{
struct mv88e6xxx_port *dev_id = >ports[port];
unsigned int irq = dev_id->serdes_irq;
@@ -2490,11 +2490,11 @@ static int mv88e6xxx_serdes_irq_free(struct
mv88e6xxx_chip *chip, int port,
static int mv88e6xxx_serdes_power(struct mv88e6xxx_chip *chip, int port,
bool on)
{
- u8 lane;
+ int lane = -ENODEV;
int err;
lane = mv88e6xxx_serdes_get_lane(chip, port);
- if (!lane)
+ if (lane < 0)
return 0;
if (on) {
diff --git a/drivers/net/dsa/mv88e6xxx/chip.h b/drivers/net/dsa/mv88e6xxx/chip.h
[PATCH v7 4/4] net: dsa: mv88e6xxx: Add support for mv88e6393x family of Marvell
The Marvell 88E6393X device is a single-chip integration of a 11-port
Ethernet switch with eight integrated Gigabit Ethernet (GbE) transceivers
and three 10-Gigabit interfaces.
This patch adds functionalities specific to mv88e6393x family (88E6393X,
88E6193X and 88E6191X)
Co-developed-by: Ashkan Boldaji
Signed-off-by: Ashkan Boldaji
Signed-off-by: Pavana Sharma
---
Changes in v2:
- Fix a warning (Reported-by: kernel test robot )
Changes in v3:
- Fix 'unused function' warning
Changes in v4-v7:
- Incorporated feedback from maintainers.
---
drivers/net/dsa/mv88e6xxx/chip.c| 136
drivers/net/dsa/mv88e6xxx/chip.h| 4 +
drivers/net/dsa/mv88e6xxx/global1.h | 2 +
drivers/net/dsa/mv88e6xxx/global2.h | 8 +
drivers/net/dsa/mv88e6xxx/port.c| 234
drivers/net/dsa/mv88e6xxx/port.h| 43 -
drivers/net/dsa/mv88e6xxx/serdes.c | 225 +-
drivers/net/dsa/mv88e6xxx/serdes.h | 41 -
8 files changed, 689 insertions(+), 4 deletions(-)
diff --git a/drivers/net/dsa/mv88e6xxx/chip.c b/drivers/net/dsa/mv88e6xxx/chip.c
index 4994b8eee659..35aeeff49b21 100644
--- a/drivers/net/dsa/mv88e6xxx/chip.c
+++ b/drivers/net/dsa/mv88e6xxx/chip.c
@@ -634,6 +634,24 @@ static void mv88e6390x_phylink_validate(struct
mv88e6xxx_chip *chip, int port,
mv88e6390_phylink_validate(chip, port, mask, state);
}
+static void mv88e6393x_phylink_validate(struct mv88e6xxx_chip *chip, int port,
+ unsigned long *mask,
+ struct phylink_link_state *state)
+{
+ if (port == 0 || port == 9 || port == 10) {
+ phylink_set(mask, 1baseT_Full);
+ phylink_set(mask, 1baseKR_Full);
+ phylink_set(mask, 5000baseT_Full);
+ phylink_set(mask, 2500baseX_Full);
+ phylink_set(mask, 2500baseT_Full);
+ }
+
+ phylink_set(mask, 1000baseT_Full);
+ phylink_set(mask, 1000baseX_Full);
+
+ mv88e6065_phylink_validate(chip, port, mask, state);
+}
+
static void mv88e6xxx_validate(struct dsa_switch *ds, int port,
unsigned long *supported,
struct phylink_link_state *state)
@@ -4141,6 +4159,55 @@ static const struct mv88e6xxx_ops mv88e6191_ops = {
.phylink_validate = mv88e6390_phylink_validate,
};
+static const struct mv88e6xxx_ops mv88e6393x_ops = {
+ /* MV88E6XXX_FAMILY_6393 */
+ .setup_errata = mv88e6393x_setup_errata,
+ .irl_init_all = mv88e6390_g2_irl_init_all,
+ .get_eeprom = mv88e6xxx_g2_get_eeprom8,
+ .set_eeprom = mv88e6xxx_g2_set_eeprom8,
+ .set_switch_mac = mv88e6xxx_g2_set_switch_mac,
+ .phy_read = mv88e6xxx_g2_smi_phy_read,
+ .phy_write = mv88e6xxx_g2_smi_phy_write,
+ .port_set_link = mv88e6xxx_port_set_link,
+ .port_set_speed_duplex = mv88e6393x_port_set_speed_duplex,
+ .port_set_rgmii_delay = mv88e6390_port_set_rgmii_delay,
+ .port_tag_remap = mv88e6390_port_tag_remap,
+ .port_set_frame_mode = mv88e6351_port_set_frame_mode,
+ .port_set_egress_floods = mv88e6352_port_set_egress_floods,
+ .port_set_ether_type = mv88e6393x_port_set_ether_type,
+ .port_set_jumbo_size = mv88e6165_port_set_jumbo_size,
+ .port_egress_rate_limiting = mv88e6097_port_egress_rate_limiting,
+ .port_pause_limit = mv88e6390_port_pause_limit,
+ .port_set_cmode = mv88e6393x_port_set_cmode,
+ .port_disable_learn_limit = mv88e6xxx_port_disable_learn_limit,
+ .port_disable_pri_override = mv88e6xxx_port_disable_pri_override,
+ .port_get_cmode = mv88e6352_port_get_cmode,
+ .stats_snapshot = mv88e6390_g1_stats_snapshot,
+ .stats_set_histogram = mv88e6390_g1_stats_set_histogram,
+ .stats_get_sset_count = mv88e6320_stats_get_sset_count,
+ .stats_get_strings = mv88e6320_stats_get_strings,
+ .stats_get_stats = mv88e6390_stats_get_stats,
+ .set_cpu_port = mv88e6393x_port_set_cpu_dest,
+ .set_egress_port = mv88e6393x_set_egress_port,
+ .watchdog_ops = _watchdog_ops,
+ .mgmt_rsvd2cpu = mv88e6393x_port_mgmt_rsvd2cpu,
+ .pot_clear = mv88e6xxx_g2_pot_clear,
+ .reset = mv88e6352_g1_reset,
+ .rmu_disable = mv88e6390_g1_rmu_disable,
+ .vtu_getnext = mv88e6390_g1_vtu_getnext,
+ .vtu_loadpurge = mv88e6390_g1_vtu_loadpurge,
+ .serdes_power = mv88e6393x_serdes_power,
+ .serdes_get_lane = mv88e6393x_serdes_get_lane,
+ .serdes_pcs_get_state = mv88e6390_serdes_pcs_get_state,
+ .serdes_irq_mapping = mv88e6390_serdes_irq_mapping,
+ .serdes_irq_enable = mv88e6393x_serdes_irq_enable,
+ .serdes_irq_status = mv88e6393x_serdes_irq_status,
+ .gpio_ops = _gpio_ops,
+ .avb_ops = _avb_ops,
+ .ptp_ops = _ptp_ops,
+ .phylink_validate = mv88e6393x_phylink_validate,
+};
+
static const struct mv88e6xxx_ops
[PATCH v7 2/4] net: phy: Add 5GBASER interface mode
Add 5GBASE-R phy interface mode
Signed-off-by: Pavana Sharma
---
include/linux/phy.h | 4
1 file changed, 4 insertions(+)
diff --git a/include/linux/phy.h b/include/linux/phy.h
index 3a09d2bf69ea..977b94a44e15 100644
--- a/include/linux/phy.h
+++ b/include/linux/phy.h
@@ -105,6 +105,8 @@ typedef enum {
PHY_INTERFACE_MODE_TRGMII,
PHY_INTERFACE_MODE_1000BASEX,
PHY_INTERFACE_MODE_2500BASEX,
+ /* 5GBASE-R mode */
+ PHY_INTERFACE_MODE_5GBASER,
PHY_INTERFACE_MODE_RXAUI,
PHY_INTERFACE_MODE_XAUI,
/* 10GBASE-R, XFI, SFI - single lane 10G Serdes */
@@ -183,6 +185,8 @@ static inline const char *phy_modes(phy_interface_t
interface)
return "1000base-x";
case PHY_INTERFACE_MODE_2500BASEX:
return "2500base-x";
+ case PHY_INTERFACE_MODE_5GBASER:
+ return "5gbase-r";
case PHY_INTERFACE_MODE_RXAUI:
return "rxaui";
case PHY_INTERFACE_MODE_XAUI:
--
2.17.1
[PATCH v7 1/4] dt-bindings: net: Add 5GBASER phy interface mode
Add 5gbase-r PHY interface mode. Signed-off-by: Pavana Sharma --- Documentation/devicetree/bindings/net/ethernet-controller.yaml | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/net/ethernet-controller.yaml b/Documentation/devicetree/bindings/net/ethernet-controller.yaml index fa2baca8c726..701ea18f811d 100644 --- a/Documentation/devicetree/bindings/net/ethernet-controller.yaml +++ b/Documentation/devicetree/bindings/net/ethernet-controller.yaml @@ -89,6 +89,8 @@ properties: - trgmii - 1000base-x - 2500base-x + # 5GBASE-R + - 5gbase-r - rxaui - xaui -- 2.17.1
[PATCH v7 0/4] Add support for mv88e6393x family of Marvell
Thanks for the review. Here's updated patchset. Pavana Sharma (4): dt-bindings: net: Add 5GBASER phy interface mode net: phy: Add 5GBASER interface mode net: dsa: mv88e6xxx: Change serdes lane parameter from u8 type to int net: dsa: mv88e6xxx: Add support for mv88e6393x family of Marvell .../bindings/net/ethernet-controller.yaml | 2 + drivers/net/dsa/mv88e6xxx/chip.c | 164 +- drivers/net/dsa/mv88e6xxx/chip.h | 20 +- drivers/net/dsa/mv88e6xxx/global1.h | 2 + drivers/net/dsa/mv88e6xxx/global2.h | 8 + drivers/net/dsa/mv88e6xxx/port.c | 240 +- drivers/net/dsa/mv88e6xxx/port.h | 43 ++- drivers/net/dsa/mv88e6xxx/serdes.c| 299 +++--- drivers/net/dsa/mv88e6xxx/serdes.h| 91 -- include/linux/phy.h | 4 + 10 files changed, 782 insertions(+), 91 deletions(-) -- 2.17.1
Re: [PATCH v3 0/2] uacce: fix some coding styles
On 2020/9/23 18:09, Kai Ye wrote: > 1. delete some redundant code. > 2. modify the module author information. "Hisilicon" > spelling is error. > > Changes v2 -> v3: > Two things, splited to two patches. > Changes v1 -> v2: > deleted extra NULL pointer check in uacce_fops. > > Kai Ye (2): > uacce: fix some coding styles > uacce: modify the module author information. > > drivers/misc/uacce/uacce.c | 13 + > 1 file changed, 1 insertion(+), 12 deletions(-) > Hi Hartman， Could you help to take this clean up patch? Best, Zhou
[PATCH -next] kernel/watchdog_hld.c: Complete the flush of the hard deadlock log messages to the serial port
when hardlockup_all_cpu_backtrace is on, and there are
a large number of cores in the system, it takes
a long time to output the hard deadlock logs of all cores
to the serial port. When the console_flush_on_panic function
in panic is executed, console_locked is still held.
As a result, garbled characters are displayed in the serial port log.
To solve this problem, wait for a maximum of 10s for the serial port
to be released before entering the panic mode.
Signed-off-by: Xu Qiang
---
kernel/watchdog_hld.c | 13 +++--
1 file changed, 11 insertions(+), 2 deletions(-)
diff --git a/kernel/watchdog_hld.c b/kernel/watchdog_hld.c
index a546bc54f6ff..d3410b9fd3c3 100644
--- a/kernel/watchdog_hld.c
+++ b/kernel/watchdog_hld.c
@@ -13,8 +13,10 @@
#define pr_fmt(fmt) "NMI watchdog: " fmt
#include
+#include
#include
#include
+#include
#include
#include
@@ -129,6 +131,7 @@ static void watchdog_overflow_callback(struct perf_event
*event,
* then this is a good indication the cpu is stuck
*/
if (is_hardlockup()) {
+ int i;
int this_cpu = smp_processor_id();
/* only print hardlockups once */
@@ -151,9 +154,15 @@ static void watchdog_overflow_callback(struct perf_event
*event,
if (sysctl_hardlockup_all_cpu_backtrace &&
!test_and_set_bit(0, _allcpu_dumped))
trigger_allbutself_cpu_backtrace();
-
- if (hardlockup_panic)
+ if (hardlockup_panic) {
+ /* Wait for all CPUs to complete
wake_up_klogd_work_func */
+ for (i = 0; i < 10 * 1000; i++) {
+ if (console_trylock())
+ break;
+ mdelay(1);
+ }
nmi_panic(regs, "Hard LOCKUP");
+ }
atomic_inc(_detected);
__this_cpu_write(hard_watchdog_warn, true);
--
2.25.0
Re: [PATCH] AER: aer_root_reset() non-native handling
On Sat, Oct 31, 2020 at 6:36 AM Sean V Kelley wrote:
>
> If an OS has not been granted AER control via _OSC, then
> the OS should not make changes to PCI_ERR_ROOT_COMMAND and
> PCI_ERR_ROOT_STATUS related registers. Per section 4.5.1 of
> the System Firmware Intermediary (SFI) _OSC and DPC Updates
> ECN [1], this bit also covers these aspects of the PCI
> Express Advanced Error Reporting. Further, the handling of
> clear/enable of PCI_ERROR_ROOT_COMMAND when wrapped around
> PCI_ERR_ROOT_STATUS should have no effect and be removed.
> Based on the above and earlier discussion [2], make the
> following changes:
>
> Add a check for the native case (i.e., AER control via _OSC)
> Re-order and remove some of the handling:
> - clear PCI_ERR_ROOT_COMMAND ROOT_PORT_INTR_ON_MESG_MASK
> - do reset
> - clear PCI_ERR_ROOT_STATUS
> - enable PCI_ERR_ROOT_COMMAND ROOT_PORT_INTR_ON_MESG_MASK
>
> to this:
>
> - clear PCI_ERR_ROOT_STATUS
> - do reset
>
> The current "clear, reset, enable" order suggests that the reset
> might cause errors that we should ignore. But I am unable to find a
> reference and the clearing of PCI_ERR_ROOT_STATUS does not require them.
>
> [1] System Firmware Intermediary (SFI) _OSC and DPC Updates ECN, Feb 24,
> 2020, affecting PCI Firmware Specification, Rev. 3.2
> https://members.pcisig.com/wg/PCI-SIG/document/14076
> [2]
> https://lore.kernel.org/linux-pci/20201020162820.GA370938@bjorn-Precision-5520/
>
> Signed-off-by: Sean V Kelley
> ---
> drivers/pci/pcie/aer.c | 21 ++---
> 1 file changed, 6 insertions(+), 15 deletions(-)
>
> diff --git a/drivers/pci/pcie/aer.c b/drivers/pci/pcie/aer.c
> index 65dff5f3457a..bbfb07842d89 100644
> --- a/drivers/pci/pcie/aer.c
> +++ b/drivers/pci/pcie/aer.c
> @@ -1361,23 +1361,14 @@ static pci_ers_result_t aer_root_reset(struct pci_dev
> *dev)
> u32 reg32;
> int rc;
>
> -
> - /* Disable Root's interrupt in response to error messages */
> - pci_read_config_dword(dev, aer + PCI_ERR_ROOT_COMMAND, );
> - reg32 &= ~ROOT_PORT_INTR_ON_MESG_MASK;
> - pci_write_config_dword(dev, aer + PCI_ERR_ROOT_COMMAND, reg32);
There may be some reasons to disable interrupt first and then do resetting,
clear status and re-enable interrupt.
Perhaps to avoid error noise, what would happen if the resetting
causes errors itself ?
Thanks,
Ethan
> + if (pcie_aer_is_native(dev)) {
> + /* Clear Root Error Status */
> + pci_read_config_dword(dev, aer + PCI_ERR_ROOT_STATUS, );
> + pci_write_config_dword(dev, aer + PCI_ERR_ROOT_STATUS, reg32);
> + }
>
> rc = pci_bus_error_reset(dev);
> - pci_info(dev, "Root Port link has been reset\n");
> -
> - /* Clear Root Error Status */
> - pci_read_config_dword(dev, aer + PCI_ERR_ROOT_STATUS, );
> - pci_write_config_dword(dev, aer + PCI_ERR_ROOT_STATUS, reg32);
> -
> - /* Enable Root Port's interrupt in response to error messages */
> - pci_read_config_dword(dev, aer + PCI_ERR_ROOT_COMMAND, );
> - reg32 |= ROOT_PORT_INTR_ON_MESG_MASK;
> - pci_write_config_dword(dev, aer + PCI_ERR_ROOT_COMMAND, reg32);
> + pci_info(dev, "Root Port link has been reset (%d)\n", rc);
>
> return rc ? PCI_ERS_RESULT_DISCONNECT : PCI_ERS_RESULT_RECOVERED;
> }
> --
> 2.29.2
>
[PATCH v3 2/2] ASoC: qcom: sc7180: Modify machine driver for 2mic
In addition, having mixer control to switch between DMICs by
using "dmic-gpios" property.
Refer to this one as an example,
commit b7a742cff3f6 ("ASoC: AMD: Use mixer control to switch between DMICs")
Signed-off-by: Ajye Huang
---
sound/soc/qcom/sc7180.c | 65 +
1 file changed, 65 insertions(+)
diff --git a/sound/soc/qcom/sc7180.c b/sound/soc/qcom/sc7180.c
index b391f64c3a80..f86db7871999 100644
--- a/sound/soc/qcom/sc7180.c
+++ b/sound/soc/qcom/sc7180.c
@@ -5,6 +5,8 @@
// sc7180.c -- ALSA SoC Machine driver for SC7180
#include
+#include
+#include
#include
#include
#include
@@ -28,6 +30,8 @@ struct sc7180_snd_data {
u32 pri_mi2s_clk_count;
struct snd_soc_jack hs_jack;
struct snd_soc_jack hdmi_jack;
+ struct gpio_desc *dmic_sel;
+ int dmic_switch;
};
static void sc7180_jack_free(struct snd_jack *jack)
@@ -169,6 +173,30 @@ static int sc7180_snd_startup(struct snd_pcm_substream
*substream)
return 0;
}
+static int dmic_get(struct snd_kcontrol *kcontrol,
+ struct snd_ctl_elem_value *ucontrol)
+{
+ struct snd_soc_dapm_context *dapm =
snd_soc_dapm_kcontrol_dapm(kcontrol);
+ struct sc7180_snd_data *data = snd_soc_card_get_drvdata(dapm->card);
+
+ if (data)
+ ucontrol->value.integer.value[0] = data->dmic_switch;
+ return 0;
+}
+
+static int dmic_set(struct snd_kcontrol *kcontrol,
+ struct snd_ctl_elem_value *ucontrol)
+{
+ struct snd_soc_dapm_context *dapm =
snd_soc_dapm_kcontrol_dapm(kcontrol);
+ struct sc7180_snd_data *data = snd_soc_card_get_drvdata(dapm->card);
+
+ if (data) {
+ data->dmic_switch = ucontrol->value.integer.value[0];
+ gpiod_set_value(data->dmic_sel, data->dmic_switch);
+ }
+ return 0;
+}
+
static void sc7180_snd_shutdown(struct snd_pcm_substream *substream)
{
struct snd_soc_pcm_runtime *rtd = substream->private_data;
@@ -206,6 +234,30 @@ static const struct snd_soc_dapm_widget
sc7180_snd_widgets[] = {
SND_SOC_DAPM_MIC("Headset Mic", NULL),
};
+static const char * const dmic_mux_text[] = {
+ "Front Mic",
+ "Rear Mic",
+};
+
+static SOC_ENUM_SINGLE_DECL(sc7180_dmic_enum,
+ SND_SOC_NOPM, 0, dmic_mux_text);
+
+static const struct snd_kcontrol_new sc7180_dmic_mux_control =
+ SOC_DAPM_ENUM_EXT("DMIC Select Mux", sc7180_dmic_enum,
+ dmic_get, dmic_set);
+
+static const struct snd_soc_dapm_widget sc7180_snd_dual_mic_widgets[] = {
+ SND_SOC_DAPM_HP("Headphone Jack", NULL),
+ SND_SOC_DAPM_MIC("Headset Mic", NULL),
+ SND_SOC_DAPM_MIC("DMIC", NULL),
+ SND_SOC_DAPM_MUX("Dmic Mux", SND_SOC_NOPM, 0, 0,
_dmic_mux_control),
+};
+
+static const struct snd_soc_dapm_route sc7180_snd_dual_mic_audio_route[] = {
+ {"Dmic Mux", "Front Mic", "DMIC"},
+ {"Dmic Mux", "Rear Mic", "DMIC"},
+};
+
static void sc7180_add_ops(struct snd_soc_card *card)
{
struct snd_soc_dai_link *link;
@@ -238,6 +290,19 @@ static int sc7180_snd_platform_probe(struct
platform_device *pdev)
card->dapm_widgets = sc7180_snd_widgets;
card->num_dapm_widgets = ARRAY_SIZE(sc7180_snd_widgets);
+ if (of_property_read_bool(dev->of_node, "dmic-gpios")) {
+ card->dapm_widgets = sc7180_snd_dual_mic_widgets,
+ card->num_dapm_widgets =
ARRAY_SIZE(sc7180_snd_dual_mic_widgets),
+ card->dapm_routes = sc7180_snd_dual_mic_audio_route,
+ card->num_dapm_routes =
ARRAY_SIZE(sc7180_snd_dual_mic_audio_route),
+ data->dmic_sel = devm_gpiod_get(>dev, "dmic",
GPIOD_OUT_LOW);
+ if (IS_ERR(data->dmic_sel)) {
+ dev_err(>dev, "DMIC gpio failed err=%d\n",
+ PTR_ERR(data->dmic_sel));
+ return PTR_ERR(data->dmic_sel);
+ }
+ }
+
ret = qcom_snd_parse_of(card);
if (ret)
return ret;
--
2.25.1
[PATCH v3 0/2] Modify documentation and machine driver for SC7180 sound card
Note: - The patch is made by the collaboration of Ajye Huang Cheng-Yi Chiang Changes from v1 to v2: - Ducumentation: Modify the dimc-gpios property description and examples. - Machine driver: - Remove "qcom,sc7180-sndcard-rt5682-m98357-2mic" compatible - See gpio property and use anadditional control. Changes from v2 to v3: - Machine driver: Addressed suggestions from Tzung-Bi. - move variables "dmic_switch" and "dmic_sel" into struct sc7180_snd_data. - Remove redundant judgments in dmic_set(). Thanks for the review! Ajye Huang (2): ASoC: google: dt-bindings: modify machine bindings for two MICs case ASoC: qcom: sc7180: Modify machine driver for 2mic .../bindings/sound/google,sc7180-trogdor.yaml | 58 + sound/soc/qcom/sc7180.c | 65 +++ 2 files changed, 123 insertions(+) -- 2.25.1
[PATCH v3 1/2] ASoC: google: dt-bindings: modify machine bindings for two MICs case
Add a property "dmic-gpios" for switching between two MICs.
Signed-off-by: Ajye Huang
---
.../bindings/sound/google,sc7180-trogdor.yaml | 58 +++
1 file changed, 58 insertions(+)
diff --git a/Documentation/devicetree/bindings/sound/google,sc7180-trogdor.yaml
b/Documentation/devicetree/bindings/sound/google,sc7180-trogdor.yaml
index efc34689d6b5..9e0505467e57 100644
--- a/Documentation/devicetree/bindings/sound/google,sc7180-trogdor.yaml
+++ b/Documentation/devicetree/bindings/sound/google,sc7180-trogdor.yaml
@@ -34,6 +34,9 @@ properties:
"#size-cells":
const: 0
+ dmic-gpios:
+description: GPIO for switching between DMICs
+
patternProperties:
"^dai-link(@[0-9])?$":
description:
@@ -81,6 +84,7 @@ additionalProperties: false
examples:
- |
+//Example 1
sound {
compatible = "google,sc7180-trogdor";
model = "sc7180-rt5682-max98357a-1mic";
@@ -128,3 +132,57 @@ examples:
};
};
};
+
+ - |
+//Example 2 (2mic case)
+sound {
+compatible = "google,sc7180-trogdor";
+model = "sc7180-rt5682-max98357a-2mic";
+
+audio-routing =
+"Headphone Jack", "HPOL",
+"Headphone Jack", "HPOR";
+
+#address-cells = <1>;
+#size-cells = <0>;
+
+dmic-gpios = < 86 0>;
+
+dai-link@0 {
+link-name = "MultiMedia0";
+reg = <0>;
+cpu {
+sound-dai = <_cpu 0>;
+};
+
+codec {
+sound-dai = < 0>;
+};
+};
+
+dai-link@1 {
+link-name = "MultiMedia1";
+reg = <1>;
+cpu {
+sound-dai = <_cpu 1>;
+};
+
+codec {
+sound-dai = <>;
+};
+};
+
+dai-link@2 {
+link-name = "MultiMedia2";
+reg = <2>;
+cpu {
+sound-dai = <_hdmi 0>;
+};
+
+codec {
+sound-dai = <_dp>;
+};
+};
+};
+
+...
--
2.25.1
[PATCH v3] f2fs: move ioctl interface definitions to separated file
Like other filesystem does, we introduce a new file f2fs.h in path of
include/uapi/linux/, and move f2fs-specified ioctl interface definitions
to that file, after then, in order to use those definitions, userspace
developer only need to include the new header file rather than
copy & paste definitions from fs/f2fs/f2fs.h.
Signed-off-by: Chao Yu
---
v3:
- use __u{32,64} rather than u{32,64} in userspace header file.
MAINTAINERS | 1 +
fs/f2fs/f2fs.h | 79 -
fs/f2fs/file.c | 1 +
include/trace/events/f2fs.h | 1 +
include/uapi/linux/f2fs.h | 87 +
5 files changed, 90 insertions(+), 79 deletions(-)
create mode 100644 include/uapi/linux/f2fs.h
diff --git a/MAINTAINERS b/MAINTAINERS
index e73636b75f29..9f02671e874e 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -6685,6 +6685,7 @@ F:Documentation/filesystems/f2fs.rst
F: fs/f2fs/
F: include/linux/f2fs_fs.h
F: include/trace/events/f2fs.h
+F: include/uapi/linux/f2fs.h
F71805F HARDWARE MONITORING DRIVER
M: Jean Delvare
diff --git a/fs/f2fs/f2fs.h b/fs/f2fs/f2fs.h
index cb700d797296..99bcf4b44a9c 100644
--- a/fs/f2fs/f2fs.h
+++ b/fs/f2fs/f2fs.h
@@ -402,85 +402,6 @@ static inline bool __has_cursum_space(struct f2fs_journal
*journal,
return size <= MAX_SIT_JENTRIES(journal);
}
-/*
- * f2fs-specific ioctl commands
- */
-#define F2FS_IOCTL_MAGIC 0xf5
-#define F2FS_IOC_START_ATOMIC_WRITE_IO(F2FS_IOCTL_MAGIC, 1)
-#define F2FS_IOC_COMMIT_ATOMIC_WRITE _IO(F2FS_IOCTL_MAGIC, 2)
-#define F2FS_IOC_START_VOLATILE_WRITE _IO(F2FS_IOCTL_MAGIC, 3)
-#define F2FS_IOC_RELEASE_VOLATILE_WRITE_IO(F2FS_IOCTL_MAGIC, 4)
-#define F2FS_IOC_ABORT_VOLATILE_WRITE _IO(F2FS_IOCTL_MAGIC, 5)
-#define F2FS_IOC_GARBAGE_COLLECT _IOW(F2FS_IOCTL_MAGIC, 6, __u32)
-#define F2FS_IOC_WRITE_CHECKPOINT _IO(F2FS_IOCTL_MAGIC, 7)
-#define F2FS_IOC_DEFRAGMENT_IOWR(F2FS_IOCTL_MAGIC, 8, \
- struct f2fs_defragment)
-#define F2FS_IOC_MOVE_RANGE_IOWR(F2FS_IOCTL_MAGIC, 9, \
- struct f2fs_move_range)
-#define F2FS_IOC_FLUSH_DEVICE _IOW(F2FS_IOCTL_MAGIC, 10, \
- struct f2fs_flush_device)
-#define F2FS_IOC_GARBAGE_COLLECT_RANGE _IOW(F2FS_IOCTL_MAGIC, 11, \
- struct f2fs_gc_range)
-#define F2FS_IOC_GET_FEATURES _IOR(F2FS_IOCTL_MAGIC, 12, __u32)
-#define F2FS_IOC_SET_PIN_FILE _IOW(F2FS_IOCTL_MAGIC, 13, __u32)
-#define F2FS_IOC_GET_PIN_FILE _IOR(F2FS_IOCTL_MAGIC, 14, __u32)
-#define F2FS_IOC_PRECACHE_EXTENTS _IO(F2FS_IOCTL_MAGIC, 15)
-#define F2FS_IOC_RESIZE_FS _IOW(F2FS_IOCTL_MAGIC, 16, __u64)
-#define F2FS_IOC_GET_COMPRESS_BLOCKS _IOR(F2FS_IOCTL_MAGIC, 17, __u64)
-#define F2FS_IOC_RELEASE_COMPRESS_BLOCKS \
- _IOR(F2FS_IOCTL_MAGIC, 18, __u64)
-#define F2FS_IOC_RESERVE_COMPRESS_BLOCKS \
- _IOR(F2FS_IOCTL_MAGIC, 19, __u64)
-#define F2FS_IOC_SEC_TRIM_FILE _IOW(F2FS_IOCTL_MAGIC, 20, \
- struct f2fs_sectrim_range)
-
-/*
- * should be same as XFS_IOC_GOINGDOWN.
- * Flags for going down operation used by FS_IOC_GOINGDOWN
- */
-#define F2FS_IOC_SHUTDOWN _IOR('X', 125, __u32) /* Shutdown */
-#define F2FS_GOING_DOWN_FULLSYNC 0x0 /* going down with full sync */
-#define F2FS_GOING_DOWN_METASYNC 0x1 /* going down with metadata */
-#define F2FS_GOING_DOWN_NOSYNC 0x2 /* going down */
-#define F2FS_GOING_DOWN_METAFLUSH 0x3 /* going down with meta flush */
-#define F2FS_GOING_DOWN_NEED_FSCK 0x4 /* going down to trigger fsck */
-
-/*
- * Flags used by F2FS_IOC_SEC_TRIM_FILE
- */
-#define F2FS_TRIM_FILE_DISCARD 0x1 /* send discard command */
-#define F2FS_TRIM_FILE_ZEROOUT 0x2 /* zero out */
-#define F2FS_TRIM_FILE_MASK0x3
-
-struct f2fs_gc_range {
- u32 sync;
- u64 start;
- u64 len;
-};
-
-struct f2fs_defragment {
- u64 start;
- u64 len;
-};
-
-struct f2fs_move_range {
- u32 dst_fd; /* destination fd */
- u64 pos_in; /* start position in src_fd */
- u64 pos_out;/* start position in dst_fd */
- u64 len;/* size to move */
-};
-
-struct f2fs_flush_device {
- u32 dev_num;/* device number to flush */
- u32 segments; /* # of segments to flush */
-};
-
-struct f2fs_sectrim_range {
- u64 start;
- u64 len;
- u64 flags;
-};
-
/* for inline stuff */
#define DEF_INLINE_RESERVED_SIZE 1
static inline int get_extra_isize(struct
Re: [PATCH v6 6/7] kgdb: roundup: Allow runtime arch specific override
On Thu, 29 Oct 2020 at 20:51, Daniel Thompson
wrote:
>
> On Thu, Oct 29, 2020 at 08:26:26PM +0530, Sumit Garg wrote:
> > Add a new API kgdb_arch_roundup_cpus() for a particular archichecture to
> > override default kgdb roundup and if it detects at runtime to not support
> > NMI roundup then it can fallback to default implementation using async
> > SMP cross-calls.
> >
> > Currently such an architecture example is arm64 supporting pseudo NMIs
> > feature which is only available on platforms which have support for GICv3
> > or later version.
> >
> > Signed-off-by: Sumit Garg
> > ---
> > arch/powerpc/kernel/kgdb.c | 3 ++-
> > arch/sparc/kernel/smp_64.c | 3 ++-
> > arch/x86/kernel/kgdb.c | 6 --
> > include/linux/kgdb.h | 5 +++--
> > kernel/debug/debug_core.c | 10 +-
> > 5 files changed, 20 insertions(+), 7 deletions(-)
> >
> > diff --git a/arch/powerpc/kernel/kgdb.c b/arch/powerpc/kernel/kgdb.c
> > index 4090802..126575d 100644
> > --- a/arch/powerpc/kernel/kgdb.c
> > +++ b/arch/powerpc/kernel/kgdb.c
> > @@ -125,9 +125,10 @@ static int kgdb_debugger_ipi(struct pt_regs *regs)
> > }
> >
> > #ifdef CONFIG_SMP
> > -void kgdb_roundup_cpus(void)
> > +bool kgdb_arch_roundup_cpus(void)
> > {
> > smp_send_debugger_break();
> > + return true;
> > }
> > #endif
> >
> > diff --git a/arch/sparc/kernel/smp_64.c b/arch/sparc/kernel/smp_64.c
> > index e38d8bf..c459c83 100644
> > --- a/arch/sparc/kernel/smp_64.c
> > +++ b/arch/sparc/kernel/smp_64.c
> > @@ -1014,9 +1014,10 @@ void flush_dcache_page_all(struct mm_struct *mm,
> > struct page *page)
> > }
> >
> > #ifdef CONFIG_KGDB
> > -void kgdb_roundup_cpus(void)
> > +bool kgdb_arch_roundup_cpus(void)
> > {
> > smp_cross_call(_kgdb_capture, 0, 0, 0);
> > + return true;
> > }
> > #endif
> >
> > diff --git a/arch/x86/kernel/kgdb.c b/arch/x86/kernel/kgdb.c
> > index ff7878d..1b756d9 100644
> > --- a/arch/x86/kernel/kgdb.c
> > +++ b/arch/x86/kernel/kgdb.c
> > @@ -404,7 +404,8 @@ static void kgdb_disable_hw_debug(struct pt_regs *regs)
> >
> > #ifdef CONFIG_SMP
> > /**
> > - * kgdb_roundup_cpus - Get other CPUs into a holding pattern
> > + * kgdb_arch_roundup_cpus - Get other CPUs into a holding pattern
> > + *in an architectural specific manner
> > *
> > * On SMP systems, we need to get the attention of the other CPUs
> > * and get them be in a known state. This should do what is needed
> > @@ -414,9 +415,10 @@ static void kgdb_disable_hw_debug(struct pt_regs *regs)
> > *
> > * On non-SMP systems, this is not called.
> > */
> > -void kgdb_roundup_cpus(void)
> > +bool kgdb_arch_roundup_cpus(void)
> > {
> > apic_send_IPI_allbutself(NMI_VECTOR);
> > + return true;
> > }
> > #endif
> >
> > diff --git a/include/linux/kgdb.h b/include/linux/kgdb.h
> > index 0d6cf64..f9db5b8 100644
> > --- a/include/linux/kgdb.h
> > +++ b/include/linux/kgdb.h
> > @@ -200,7 +200,8 @@ kgdb_arch_handle_qxfer_pkt(char *remcom_in_buffer,
> > extern void kgdb_call_nmi_hook(void *ignored);
> >
> > /**
> > - * kgdb_roundup_cpus - Get other CPUs into a holding pattern
> > + * kgdb_arch_roundup_cpus - Get other CPUs into a holding pattern
> > + *in an architectural specific manner
> > *
> > * On SMP systems, we need to get the attention of the other CPUs
> > * and get them into a known state. This should do what is needed
> > @@ -210,7 +211,7 @@ extern void kgdb_call_nmi_hook(void *ignored);
> > *
> > * On non-SMP systems, this is not called.
> > */
> > -extern void kgdb_roundup_cpus(void);
> > +extern bool kgdb_arch_roundup_cpus(void);
> >
> > /**
> > * kgdb_arch_set_pc - Generic call back to the program counter
> > diff --git a/kernel/debug/debug_core.c b/kernel/debug/debug_core.c
> > index 1e75a89..27e401c 100644
> > --- a/kernel/debug/debug_core.c
> > +++ b/kernel/debug/debug_core.c
> > @@ -241,13 +241,21 @@ void __weak kgdb_call_nmi_hook(void *ignored)
> > }
> > NOKPROBE_SYMBOL(kgdb_call_nmi_hook);
> >
> > -void __weak kgdb_roundup_cpus(void)
> > +bool __weak kgdb_arch_roundup_cpus(void)
> > +{
> > + return false;
>
> Do we really need to introduce all these boolean return values just to
> call a bit of library code when one of the architectures wants to
> fallback to a generic implementation?
>
> Why not something more like:
>
> void kgdb_smp_call_nmi_hook(void)
> {
> /* original weak version of kgdb_roundup_cpus goes here */
> }
>
> void __weak kgdb_roundup_cpus(void)
> {
> kgdb_smp_call_nmi_hook();
> }
>
> arm64 can now simply call the new library function if a fallback is needed.
>
Makes sense, I will use this approach instead.
> Note that same question applies to the backtrace changes...
In case of backtrace, there are already multiple APIs wrapping
arch_trigger_cpumask_backtrace() as follows:
- trigger_all_cpu_backtrace()
- trigger_allbutself_cpu_backtrace()
- trigger_cpumask_backtrace()
-
Re: v5.8+ powersave governor breakage?
On Sun, 2020-11-01 at 17:23 +0100, Mike Galbraith wrote: > Greetings, > > As you can see in the data below, my i4790 box used to default to the > powersave governor despite CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y, and > disallowed switching to ondemand. Ok, my HP lappy running master.today still defaults to powersave, with CONFIG_CPU_FREQ_DEFAULT_GOV_SCHEDUTIL=y, still disallows selecting ondemand as before, and powersave still works. IOW for lappy, it was business as usual, no change. Desktop box did, it gained a working ondemand, while its previously working powersave went broke. Box had schedutil forced upon it, but it seems perfectly fine with that performance wise. -Mike
RE: [EXT] Re: [v2 01/11] irqchip: ls-extirq: Add LS1043A, LS1088A external interrupt
> > > > > > Caution: EXT Email > > > > > > On 27/10/2020 05.46, Biwen Li wrote: > > > > From: Hou Zhiqiang > > > > > > > > Add an new IRQ chip declaration for LS1043A and LS1088A > > > > - compatible "fsl,ls1043a-extirq" for LS1043A, LS1046A. > SCFG_INTPCR[31:0] > > > > of these SoCs is stored/read as SCFG_INTPCR[0:31] defaultly(bit > > > > reverse) > > > > > > s/defaultly/by default/ I suppose. But what does that mean? Is it > > > still configurable, just now through some undocumented register? If > > > that register still exists, does it now have a reset value of > > > all-ones as opposed to the ls1021 case? If it's not configurable, > > > then describing the situation as "by default" is confusing and > > > wrong, it should just say "On LS1043A, LS1046A, SCFG_INTPCR is > > > stored/read bit- > > reversed." > > Okay, got it. Will update it in v3. Thanks. > > Hi Biwen, > > Where did you get this information that the register on LS1043 and LS1046 is > bit > reversed? I cannot find such information in the RM. And does this mean all > other SCFG registers are also bit reversed? If this is some information that > is > not covered by the RM, we probably should clarify it in the code and the > commit > message. Hi Leo, I directly use the same logic to write the bit(field IRQ0~11INTP) of the register SCFG_INTPCR in LS1043A and LS1046A. Such as, if I want to control the polarity of IRQ0(field IRQ0INTP, IRQ0 is active low) of LS1043A/LS1046A, then I just need write a value 1 << (31 - 0) to it. The logic depends on register's definition in LS1043A/LS1046A's RM. Regards, Biwen > > Regards, > Leo > > > > > > > > > > > - compatible "fsl,ls1088a-extirq" for LS1088A, LS208xA, LX216xA > > > > > > > > Signed-off-by: Hou Zhiqiang > > > > Signed-off-by: Biwen Li > > > > --- > > > > Change in v2: > > > > - add despcription of bit reverse > > > > - update copyright > > > > > > > > drivers/irqchip/irq-ls-extirq.c | 10 +- > > > > 1 file changed, 9 insertions(+), 1 deletion(-) > > > > > > > > diff --git a/drivers/irqchip/irq-ls-extirq.c > > > > b/drivers/irqchip/irq-ls-extirq.c index 4d1179fed77c..9587bc2607fc > > > > 100644 > > > > --- a/drivers/irqchip/irq-ls-extirq.c > > > > +++ b/drivers/irqchip/irq-ls-extirq.c > > > > @@ -1,5 +1,8 @@ > > > > // SPDX-License-Identifier: GPL-2.0 > > > > - > > > > +/* > > > > + * Author: Rasmus Villemoes > > > > > > If I wanted my name splattered all over the files I touch or add, > > > I'd add it myself, TYVM. The git history is plenty fine for > > > recording authorship as far as I'm concerned, and I absolutely abhor > > > having to skip over any kind of legalese boilerplate when opening a file. > > Okay, got it. Will drop it in v3. Thanks. > > > > > > Rasmus
[PATCH] KVM: VMX: Enable Notify VM exit
There are some cases that malicious virtual machines can cause CPU stuck
(event windows don't open up), e.g., infinite loop in microcode when
nested #AC (CVE-2015-5307). No event window obviously means no events,
e.g. NMIs, SMIs, and IRQs will all be blocked, may cause the related
hardware CPU can't be used by host or other VM.
To resolve those cases, it can enable a notify VM exit if no
event window occur in VMX non-root mode for a specified amount of
time (notify window).
Expose a module param for setting notify window, default setting it to
the time as 1/10 of periodic tick, and user can set it to 0 to disable
this feature.
TODO:
1. The appropriate value of notify window.
2. Another patch to disable interception of #DB and #AC when notify
VM-Exiting is enabled.
Co-developed-by: Xiaoyao Li
Signed-off-by: Tao Xu
Signed-off-by: Xiaoyao Li
---
arch/x86/include/asm/vmx.h | 7 +
arch/x86/include/asm/vmxfeatures.h | 1 +
arch/x86/include/uapi/asm/vmx.h| 4 ++-
arch/x86/kvm/vmx/capabilities.h| 6 +
arch/x86/kvm/vmx/vmx.c | 42 +-
include/uapi/linux/kvm.h | 2 ++
6 files changed, 60 insertions(+), 2 deletions(-)
diff --git a/arch/x86/include/asm/vmx.h b/arch/x86/include/asm/vmx.h
index f8ba5289ecb0..888faa5de895 100644
--- a/arch/x86/include/asm/vmx.h
+++ b/arch/x86/include/asm/vmx.h
@@ -73,6 +73,7 @@
#define SECONDARY_EXEC_PT_USE_GPA VMCS_CONTROL_BIT(PT_USE_GPA)
#define SECONDARY_EXEC_TSC_SCALING VMCS_CONTROL_BIT(TSC_SCALING)
#define SECONDARY_EXEC_ENABLE_USR_WAIT_PAUSE VMCS_CONTROL_BIT(USR_WAIT_PAUSE)
+#define SECONDARY_EXEC_NOTIFY_VM_EXITING
VMCS_CONTROL_BIT(NOTIFY_VM_EXITING)
#define PIN_BASED_EXT_INTR_MASK VMCS_CONTROL_BIT(INTR_EXITING)
#define PIN_BASED_NMI_EXITING VMCS_CONTROL_BIT(NMI_EXITING)
@@ -267,6 +268,7 @@ enum vmcs_field {
SECONDARY_VM_EXEC_CONTROL = 0x401e,
PLE_GAP = 0x4020,
PLE_WINDOW = 0x4022,
+ NOTIFY_WINDOW = 0x4024,
VM_INSTRUCTION_ERROR= 0x4400,
VM_EXIT_REASON = 0x4402,
VM_EXIT_INTR_INFO = 0x4404,
@@ -552,6 +554,11 @@ enum vm_entry_failure_code {
#define EPT_VIOLATION_EXECUTABLE (1 << EPT_VIOLATION_EXECUTABLE_BIT)
#define EPT_VIOLATION_GVA_TRANSLATED (1 << EPT_VIOLATION_GVA_TRANSLATED_BIT)
+/*
+ * Exit Qualifications for NOTIFY VM EXIT
+ */
+#define NOTIFY_VM_CONTEXT_VALID BIT(0)
+
/*
* VM-instruction error numbers
*/
diff --git a/arch/x86/include/asm/vmxfeatures.h
b/arch/x86/include/asm/vmxfeatures.h
index 9915990fd8cf..1a0e71b16961 100644
--- a/arch/x86/include/asm/vmxfeatures.h
+++ b/arch/x86/include/asm/vmxfeatures.h
@@ -83,5 +83,6 @@
#define VMX_FEATURE_TSC_SCALING( 2*32+ 25) /* Scale hardware
TSC when read in guest */
#define VMX_FEATURE_USR_WAIT_PAUSE ( 2*32+ 26) /* Enable TPAUSE, UMONITOR,
UMWAIT in guest */
#define VMX_FEATURE_ENCLV_EXITING ( 2*32+ 28) /* "" VM-Exit on ENCLV
(leaf dependent) */
+#define VMX_FEATURE_NOTIFY_VM_EXITING ( 2*32+ 31) /* VM-Exit when no event
windows after notify window */
#endif /* _ASM_X86_VMXFEATURES_H */
diff --git a/arch/x86/include/uapi/asm/vmx.h b/arch/x86/include/uapi/asm/vmx.h
index b8ff9e8ac0d5..10873111980c 100644
--- a/arch/x86/include/uapi/asm/vmx.h
+++ b/arch/x86/include/uapi/asm/vmx.h
@@ -88,6 +88,7 @@
#define EXIT_REASON_XRSTORS 64
#define EXIT_REASON_UMWAIT 67
#define EXIT_REASON_TPAUSE 68
+#define EXIT_REASON_NOTIFY 75
#define VMX_EXIT_REASONS \
{ EXIT_REASON_EXCEPTION_NMI, "EXCEPTION_NMI" }, \
@@ -148,7 +149,8 @@
{ EXIT_REASON_XSAVES,"XSAVES" }, \
{ EXIT_REASON_XRSTORS, "XRSTORS" }, \
{ EXIT_REASON_UMWAIT,"UMWAIT" }, \
- { EXIT_REASON_TPAUSE,"TPAUSE" }
+ { EXIT_REASON_TPAUSE,"TPAUSE" }, \
+ { EXIT_REASON_NOTIFY,"NOTIFY"}
#define VMX_EXIT_REASON_FLAGS \
{ VMX_EXIT_REASONS_FAILED_VMENTRY, "FAILED_VMENTRY" }
diff --git a/arch/x86/kvm/vmx/capabilities.h b/arch/x86/kvm/vmx/capabilities.h
index 3a1861403d73..43a0c3eb86ec 100644
--- a/arch/x86/kvm/vmx/capabilities.h
+++ b/arch/x86/kvm/vmx/capabilities.h
@@ -378,4 +378,10 @@ static inline u64 vmx_get_perf_capabilities(void)
return PMU_CAP_FW_WRITES;
}
+static inline bool cpu_has_notify_vm_exiting(void)
+{
+ return vmcs_config.cpu_based_2nd_exec_ctrl &
+ SECONDARY_EXEC_NOTIFY_VM_EXITING;
+}
+
#endif /* __KVM_X86_VMX_CAPS_H */
diff --git a/arch/x86/kvm/vmx/vmx.c b/arch/x86/kvm/vmx/vmx.c
index d14c94d0aff1..d03996913145 100644
--- a/arch/x86/kvm/vmx/vmx.c
+++ b/arch/x86/kvm/vmx/vmx.c
@@ -201,6 +201,10 @@ module_param(ple_window_max,
[PATCH net-next 12/13] octeontx2-af: Add new mbox messages to retrieve MCAM entries
This patch introduces new mailbox mesages to retrieve a given
MCAM entry or base flow steering rule of a VF installed by its
parent PF. This helps while updating the existing MCAM rules
with out re-framing the whole mailbox request again. The INSTALL
FLOW mailbox consumer can read-modify-write the existing entry.
Similarly while installing new flow rules for a VF, the base
flow steering rule match creteria is copied to the new flow rule
and the deltas are appended to the new rule.
Signed-off-by: Naveen Mamindlapalli
Co-developed-by: Vamsi Attunuru
Signed-off-by: Vamsi Attunuru
Signed-off-by: Sunil Goutham
---
drivers/net/ethernet/marvell/octeontx2/af/mbox.h | 22 +++
.../net/ethernet/marvell/octeontx2/af/rvu_npc.c| 70 ++
2 files changed, 92 insertions(+)
diff --git a/drivers/net/ethernet/marvell/octeontx2/af/mbox.h
b/drivers/net/ethernet/marvell/octeontx2/af/mbox.h
index fd204e1a7b8a..cc8c463b7bf3 100644
--- a/drivers/net/ethernet/marvell/octeontx2/af/mbox.h
+++ b/drivers/net/ethernet/marvell/octeontx2/af/mbox.h
@@ -192,6 +192,11 @@ M(NPC_INSTALL_FLOW, 0x600d, npc_install_flow,
\
npc_install_flow_req, npc_install_flow_rsp) \
M(NPC_DELETE_FLOW, 0x600e, npc_delete_flow, \
npc_delete_flow_req, msg_rsp) \
+M(NPC_MCAM_READ_ENTRY, 0x600f, npc_mcam_read_entry, \
+ npc_mcam_read_entry_req, \
+ npc_mcam_read_entry_rsp) \
+M(NPC_MCAM_READ_BASE_RULE, 0x6011, npc_read_base_steer_rule,\
+ msg_req, npc_mcam_read_base_rule_rsp) \
/* NIX mbox IDs (range 0x8000 - 0x) */ \
M(NIX_LF_ALLOC,0x8000, nix_lf_alloc,
\
nix_lf_alloc_req, nix_lf_alloc_rsp)\
@@ -1028,6 +1033,23 @@ struct npc_delete_flow_req {
u8 all; /* PF + VFs */
};
+struct npc_mcam_read_entry_req {
+ struct mbox_msghdr hdr;
+ u16 entry; /* MCAM entry to read */
+};
+
+struct npc_mcam_read_entry_rsp {
+ struct mbox_msghdr hdr;
+ struct mcam_entry entry_data;
+ u8 intf;
+ u8 enable;
+};
+
+struct npc_mcam_read_base_rule_rsp {
+ struct mbox_msghdr hdr;
+ struct mcam_entry entry;
+};
+
enum ptp_op {
PTP_OP_ADJFINE = 0,
PTP_OP_GET_CLOCK = 1,
diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
b/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
index c87d06ee11c3..52e23e68d917 100644
--- a/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
+++ b/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
@@ -2194,6 +2194,30 @@ int rvu_mbox_handler_npc_mcam_free_entry(struct rvu *rvu,
return rc;
}
+int rvu_mbox_handler_npc_mcam_read_entry(struct rvu *rvu,
+struct npc_mcam_read_entry_req *req,
+struct npc_mcam_read_entry_rsp *rsp)
+{
+ struct npc_mcam *mcam = >hw->mcam;
+ u16 pcifunc = req->hdr.pcifunc;
+ int blkaddr, rc;
+
+ blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NPC, 0);
+ if (blkaddr < 0)
+ return NPC_MCAM_INVALID_REQ;
+
+ mutex_lock(>lock);
+ rc = npc_mcam_verify_entry(mcam, pcifunc, req->entry);
+ if (!rc) {
+ npc_read_mcam_entry(rvu, mcam, blkaddr, req->entry,
+ >entry_data,
+ >intf, >enable);
+ }
+
+ mutex_unlock(>lock);
+ return rc;
+}
+
int rvu_mbox_handler_npc_mcam_write_entry(struct rvu *rvu,
struct npc_mcam_write_entry_req *req,
struct msg_rsp *rsp)
@@ -2754,3 +2778,49 @@ bool rvu_npc_write_default_rule(struct rvu *rvu, int
blkaddr, int nixlf,
return enable;
}
+
+int rvu_mbox_handler_npc_read_base_steer_rule(struct rvu *rvu,
+ struct msg_req *req,
+ struct
npc_mcam_read_base_rule_rsp *rsp)
+{
+ struct npc_mcam *mcam = >hw->mcam;
+ int index, blkaddr, nixlf, rc = 0;
+ u16 pcifunc = req->hdr.pcifunc;
+ struct rvu_pfvf *pfvf;
+ u8 intf, enable;
+
+ blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NPC, 0);
+ if (blkaddr < 0)
+ return NPC_MCAM_INVALID_REQ;
+
+ /* Return the channel number in case of PF */
+ if (!(pcifunc & RVU_PFVF_FUNC_MASK)) {
+ pfvf = rvu_get_pfvf(rvu, pcifunc);
+ rsp->entry.kw[0] = pfvf->rx_chan_base;
+ rsp->entry.kw_mask[0] = 0xFFFULL;
+ goto out;
+ }
+
+ /* Find the pkt steering rule installed by PF to this VF */
+ mutex_lock(>lock);
+ for (index
[PATCH net-next 08/13] octeontx2-af: Modify nix_vtag_cfg mailbox to support TX VTAG entries
From: Vamsi Attunuru
This patch modifies the existing nix_vtag_config mailbox message
to allocate and free TX VTAG entries as requested by a NIX PF.
The TX VTAG entries are global resource that shared by all PFs
and each entry specifies the size of VTAG to insert and the VTAG
header data to insert. The mailbox response contains the entry
index which is used by mailbox requester in configuring the
NPC_TX_VTAG_ACTION for any MCAM entry.
Signed-off-by: Vamsi Attunuru
Signed-off-by: Sunil Goutham
Signed-off-by: Naveen Mamindlapalli
---
drivers/net/ethernet/marvell/octeontx2/af/mbox.h | 60 +--
drivers/net/ethernet/marvell/octeontx2/af/rvu.h| 8 +
.../net/ethernet/marvell/octeontx2/af/rvu_nix.c| 195 -
3 files changed, 250 insertions(+), 13 deletions(-)
diff --git a/drivers/net/ethernet/marvell/octeontx2/af/mbox.h
b/drivers/net/ethernet/marvell/octeontx2/af/mbox.h
index 20b23263149c..72b90aefba02 100644
--- a/drivers/net/ethernet/marvell/octeontx2/af/mbox.h
+++ b/drivers/net/ethernet/marvell/octeontx2/af/mbox.h
@@ -204,7 +204,8 @@ M(NIX_TXSCH_ALLOC, 0x8004, nix_txsch_alloc,
\
M(NIX_TXSCH_FREE, 0x8005, nix_txsch_free, nix_txsch_free_req, msg_rsp) \
M(NIX_TXSCHQ_CFG, 0x8006, nix_txschq_cfg, nix_txschq_config, msg_rsp) \
M(NIX_STATS_RST, 0x8007, nix_stats_rst, msg_req, msg_rsp)\
-M(NIX_VTAG_CFG,0x8008, nix_vtag_cfg, nix_vtag_config, msg_rsp)
\
+M(NIX_VTAG_CFG,0x8008, nix_vtag_cfg, nix_vtag_config,
\
+nix_vtag_config_rsp) \
M(NIX_RSS_FLOWKEY_CFG, 0x8009, nix_rss_flowkey_cfg, \
nix_rss_flowkey_cfg, \
nix_rss_flowkey_cfg_rsp) \
@@ -477,6 +478,7 @@ enum nix_af_status {
NIX_AF_ERR_LSO_CFG_FAIL = -418,
NIX_AF_INVAL_NPA_PF_FUNC= -419,
NIX_AF_INVAL_SSO_PF_FUNC= -420,
+ NIX_AF_ERR_TX_VTAG_NOSPC= -421,
};
/* For NIX LF context alloc and init */
@@ -516,7 +518,8 @@ struct nix_lf_alloc_rsp {
struct nix_lf_free_req {
struct mbox_msghdr hdr;
-#define NIX_LF_DISABLE_FLOWS BIT_ULL(0)
+#define NIX_LF_DISABLE_FLOWS BIT_ULL(0)
+#define NIX_LF_DONT_FREE_TX_VTAG BIT_ULL(1)
u64 flags;
};
@@ -610,14 +613,40 @@ struct nix_vtag_config {
union {
/* valid when cfg_type is '0' */
struct {
- /* tx vlan0 tag(C-VLAN) */
- u64 vlan0;
- /* tx vlan1 tag(S-VLAN) */
- u64 vlan1;
- /* insert tx vlan tag */
- u8 insert_vlan :1;
- /* insert tx double vlan tag */
- u8 double_vlan :1;
+ u64 vtag0;
+ u64 vtag1;
+
+ /* cfg_vtag0 & cfg_vtag1 fields are valid
+* when free_vtag0 & free_vtag1 are '0's.
+*/
+ /* cfg_vtag0 = 1 to configure vtag0 */
+ u8 cfg_vtag0 :1;
+ /* cfg_vtag1 = 1 to configure vtag1 */
+ u8 cfg_vtag1 :1;
+
+ /* vtag0_idx & vtag1_idx are only valid when
+* both cfg_vtag0 & cfg_vtag1 are '0's,
+* these fields are used along with free_vtag0
+* & free_vtag1 to free the nix lf's tx_vlan
+* configuration.
+*
+* Denotes the indices of tx_vtag def registers
+* that needs to be cleared and freed.
+*/
+ int vtag0_idx;
+ int vtag1_idx;
+
+ /* free_vtag0 & free_vtag1 fields are valid
+* when cfg_vtag0 & cfg_vtag1 are '0's.
+*/
+ /* free_vtag0 = 1 clears vtag0 configuration
+* vtag0_idx denotes the index to be cleared.
+*/
+ u8 free_vtag0 :1;
+ /* free_vtag1 = 1 clears vtag1 configuration
+* vtag1_idx denotes the index to be cleared.
+*/
+ u8 free_vtag1 :1;
} tx;
/* valid when cfg_type is '1' */
@@ -632,6 +661,17 @@ struct nix_vtag_config {
};
};
+struct nix_vtag_config_rsp {
+ struct mbox_msghdr hdr;
+ int vtag0_idx;
+ int vtag1_idx;
+ /* Indices of tx_vtag def registers used to configure
+* tx vtag0 & vtag1 headers, these indices are valid
+* when nix_vtag_config mbox requested for vtag0 and/
+* or vtag1 configuration.
+*/
+};
+
struct
[PATCH net-next 07/13] octeontx2-af: Add debugfs entry to dump the MCAM rules
From: Subbaraya Sundeep
Add debugfs support to dump the MCAM rules installed using
NPC_INSTALL_FLOW mbox message. Debugfs file can display mcam
entry, counter if any, flow type and counter hits.
Ethtool will dump the ntuple flows related to the PF only.
The debugfs file gives systemwide view of the MCAM rules
installed by all the PF's.
Below is the example output when the debugfs file is read:
~ # mount -t debugfs none /sys/kernel/debug
~ # cat /sys/kernel/debug/octeontx2/npc/mcam_rules
Installed by: PF1
direction: RX
mcam entry: 227
udp source port 23 mask 0x
Forward to: PF1 VF0
action: Direct to queue 0
enabled: yes
counter: 1
hits: 0
Signed-off-by: Subbaraya Sundeep
Signed-off-by: Sunil Goutham
Signed-off-by: Naveen Mamindlapalli
---
.../ethernet/marvell/octeontx2/af/rvu_debugfs.c| 197 +
1 file changed, 197 insertions(+)
diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
b/drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
index b7b6b6f8865a..39e1a614aaf8 100644
--- a/drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
+++ b/drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
@@ -1770,6 +1770,198 @@ static int rvu_dbg_npc_rx_miss_stats_display(struct
seq_file *filp,
RVU_DEBUG_SEQ_FOPS(npc_rx_miss_act, npc_rx_miss_stats_display, NULL);
+static void rvu_dbg_npc_mcam_show_flows(struct seq_file *s,
+ struct rvu_npc_mcam_rule *rule)
+{
+ u8 bit;
+
+ for_each_set_bit(bit, (unsigned long *)>features, 64) {
+ seq_printf(s, "\t%s ", npc_get_field_name(bit));
+ switch (bit) {
+ case NPC_DMAC:
+ seq_printf(s, "%pM ", rule->packet.dmac);
+ seq_printf(s, "mask %pM\n", rule->mask.dmac);
+ break;
+ case NPC_SMAC:
+ seq_printf(s, "%pM ", rule->packet.smac);
+ seq_printf(s, "mask %pM\n", rule->mask.smac);
+ break;
+ case NPC_ETYPE:
+ seq_printf(s, "0x%x ", ntohs(rule->packet.etype));
+ seq_printf(s, "mask 0x%x\n", ntohs(rule->mask.etype));
+ break;
+ case NPC_OUTER_VID:
+ seq_printf(s, "%d ", ntohs(rule->packet.vlan_tci));
+ seq_printf(s, "mask 0x%x\n",
+ ntohs(rule->mask.vlan_tci));
+ break;
+ case NPC_TOS:
+ seq_printf(s, "%d ", rule->packet.tos);
+ seq_printf(s, "mask 0x%x\n", rule->mask.tos);
+ break;
+ case NPC_SIP_IPV4:
+ seq_printf(s, "%pI4 ", >packet.ip4src);
+ seq_printf(s, "mask %pI4\n", >mask.ip4src);
+ break;
+ case NPC_DIP_IPV4:
+ seq_printf(s, "%pI4 ", >packet.ip4dst);
+ seq_printf(s, "mask %pI4\n", >mask.ip4dst);
+ break;
+ case NPC_SIP_IPV6:
+ seq_printf(s, "%pI6 ", rule->packet.ip6src);
+ seq_printf(s, "mask %pI6\n", rule->mask.ip6src);
+ break;
+ case NPC_DIP_IPV6:
+ seq_printf(s, "%pI6 ", rule->packet.ip6dst);
+ seq_printf(s, "mask %pI6\n", rule->mask.ip6dst);
+ break;
+ case NPC_SPORT_TCP:
+ case NPC_SPORT_UDP:
+ case NPC_SPORT_SCTP:
+ seq_printf(s, "%d ", ntohs(rule->packet.sport));
+ seq_printf(s, "mask 0x%x\n", ntohs(rule->mask.sport));
+ break;
+ case NPC_DPORT_TCP:
+ case NPC_DPORT_UDP:
+ case NPC_DPORT_SCTP:
+ seq_printf(s, "%d ", ntohs(rule->packet.dport));
+ seq_printf(s, "mask 0x%x\n", ntohs(rule->mask.dport));
+ break;
+ default:
+ break;
+ }
+ }
+}
+
+static void rvu_dbg_npc_mcam_show_action(struct seq_file *s,
+struct rvu_npc_mcam_rule *rule)
+{
+ if (rule->intf == NIX_INTF_TX) {
+ switch (rule->tx_action.op) {
+ case NIX_TX_ACTIONOP_DROP:
+ seq_puts(s, "\taction: Drop\n");
+ break;
+ case NIX_TX_ACTIONOP_UCAST_DEFAULT:
+ seq_puts(s, "\taction: Unicast to default channel\n");
+ break;
+ case NIX_TX_ACTIONOP_UCAST_CHAN:
+ seq_printf(s, "\taction: Unicast to channel %d\n",
+ rule->tx_action.index);
+
[PATCH net-next 05/13] octeontx2-pf: Add support for ethtool ntuple filters
From: Subbaraya Sundeep
This patch adds support for adding and deleting ethtool ntuple
filters. The filters for ether, ipv4, ipv6, tcp, udp and sctp
are supported. The mask is also supported. The supported actions
are drop and direct to a queue. Additionally we support FLOW_EXT
field vlan_tci and FLOW_MAC_EXT.
The NIX PF will allocate total 32 MCAM entries for the use of
ethtool ntuple filters. The Administrative Function(AF) will
install/delete the MCAM rules when NIX PF sends mailbox message
to install/delete the ntuple filters.
Ethtool ntuple filters support is restricted to PFs as of now
and PF can install ntuple filters to direct the traffic to its
VFs. Hence added a separate callback for VFs to get/set RSS
configuration.
Signed-off-by: Subbaraya Sundeep
Signed-off-by: Sunil Goutham
Signed-off-by: Naveen Mamindlapalli
---
.../net/ethernet/marvell/octeontx2/nic/Makefile| 2 +-
.../ethernet/marvell/octeontx2/nic/otx2_common.h | 30 +
.../ethernet/marvell/octeontx2/nic/otx2_ethtool.c | 58 +-
.../ethernet/marvell/octeontx2/nic/otx2_flows.c| 610 +
.../net/ethernet/marvell/octeontx2/nic/otx2_pf.c | 16 +-
5 files changed, 710 insertions(+), 6 deletions(-)
create mode 100644 drivers/net/ethernet/marvell/octeontx2/nic/otx2_flows.c
diff --git a/drivers/net/ethernet/marvell/octeontx2/nic/Makefile
b/drivers/net/ethernet/marvell/octeontx2/nic/Makefile
index b2c6385707c9..4193ae3bde6b 100644
--- a/drivers/net/ethernet/marvell/octeontx2/nic/Makefile
+++ b/drivers/net/ethernet/marvell/octeontx2/nic/Makefile
@@ -7,7 +7,7 @@ obj-$(CONFIG_OCTEONTX2_PF) += octeontx2_nicpf.o
obj-$(CONFIG_OCTEONTX2_VF) += octeontx2_nicvf.o
octeontx2_nicpf-y := otx2_pf.o otx2_common.o otx2_txrx.o otx2_ethtool.o \
-otx2_ptp.o
+otx2_ptp.o otx2_flows.o
octeontx2_nicvf-y := otx2_vf.o
ccflags-y += -I$(srctree)/drivers/net/ethernet/marvell/octeontx2/af
diff --git a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.h
b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.h
index 386cb08497e4..fb11a3508766 100644
--- a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.h
+++ b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.h
@@ -228,6 +228,14 @@ struct otx2_ptp {
#define OTX2_HW_TIMESTAMP_LEN 8
+struct otx2_flow_config {
+ u16 entry[NPC_MAX_NONCONTIG_ENTRIES];
+ u32 nr_flows;
+ u32 ntuple_offset;
+ u32 ntuple_max_flows;
+ struct list_headflow_list;
+};
+
struct otx2_nic {
void __iomem*reg_base;
struct net_device *netdev;
@@ -238,6 +246,8 @@ struct otx2_nic {
#define OTX2_FLAG_RX_TSTAMP_ENABLEDBIT_ULL(0)
#define OTX2_FLAG_TX_TSTAMP_ENABLEDBIT_ULL(1)
#define OTX2_FLAG_INTF_DOWNBIT_ULL(2)
+#define OTX2_FLAG_MCAM_ENTRIES_ALLOC BIT_ULL(3)
+#define OTX2_FLAG_NTUPLE_SUPPORT BIT_ULL(4)
#define OTX2_FLAG_RX_PAUSE_ENABLED BIT_ULL(9)
#define OTX2_FLAG_TX_PAUSE_ENABLED BIT_ULL(10)
u64 flags;
@@ -266,6 +276,7 @@ struct otx2_nic {
struct refill_work *refill_wrk;
struct workqueue_struct *otx2_wq;
struct work_struct rx_mode_work;
+ struct otx2_mac_table *mac_table;
/* Ethtool stuff */
u32 msg_enable;
@@ -275,6 +286,8 @@ struct otx2_nic {
struct otx2_ptp *ptp;
struct hwtstamp_config tstamp;
+
+ struct otx2_flow_config *flow_cfg;
};
static inline bool is_otx2_lbkvf(struct pci_dev *pdev)
@@ -644,4 +657,21 @@ int otx2_open(struct net_device *netdev);
int otx2_stop(struct net_device *netdev);
int otx2_set_real_num_queues(struct net_device *netdev,
int tx_queues, int rx_queues);
+/* MCAM filter related APIs */
+void otx2_do_set_rx_mode(struct work_struct *work);
+int otx2_mcam_flow_init(struct otx2_nic *pf);
+int otx2_alloc_mcam_entries(struct otx2_nic *pfvf);
+void otx2_mcam_flow_del(struct otx2_nic *pf);
+int otx2_destroy_ntuple_flows(struct otx2_nic *pf);
+int otx2_destroy_mcam_flows(struct otx2_nic *pfvf);
+int otx2_get_flow(struct otx2_nic *pfvf,
+ struct ethtool_rxnfc *nfc, u32 location);
+int otx2_get_all_flows(struct otx2_nic *pfvf,
+ struct ethtool_rxnfc *nfc, u32 *rule_locs);
+int otx2_add_flow(struct otx2_nic *pfvf,
+ struct ethtool_rx_flow_spec *fsp);
+int otx2_remove_flow(struct otx2_nic *pfvf, u32 location);
+int otx2_prepare_flow_request(struct ethtool_rx_flow_spec *fsp,
+ struct npc_install_flow_req *req);
+
#endif /* OTX2_COMMON_H */
diff --git a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_ethtool.c
b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_ethtool.c
index 662fb80dbb9d..67171b66a56c 100644
---
[PATCH net-next 11/13] octeontx2-af: Handle PF-VF mac address changes
From: Hariprasad Kelam
This patch handles the VF mac address changes as given below.
1. mac addr configrued by VF will be retained until VF module unload.
2. mac addr configred by PF for VF will be retained until power cycle.
3. mac addr confgired by PF for its VF can't be overwritten by VF.
Signed-off-by: Hariprasad Kelam
Signed-off-by: Sunil Goutham
Signed-off-by: Naveen Mamindlapalli
---
drivers/net/ethernet/marvell/octeontx2/af/rvu.c| 12 +++-
drivers/net/ethernet/marvell/octeontx2/af/rvu.h| 2 ++
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c| 9 +
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c | 17 ++---
4 files changed, 36 insertions(+), 4 deletions(-)
diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu.c
b/drivers/net/ethernet/marvell/octeontx2/af/rvu.c
index e8b5aaf73201..9f901c0edcbb 100644
--- a/drivers/net/ethernet/marvell/octeontx2/af/rvu.c
+++ b/drivers/net/ethernet/marvell/octeontx2/af/rvu.c
@@ -727,6 +727,10 @@ static void rvu_setup_pfvf_macaddress(struct rvu *rvu)
u64 *mac;
for (pf = 0; pf < hw->total_pfs; pf++) {
+ /* For PF0(AF), Assign MAC address to only VFs (LBKVFs) */
+ if (!pf)
+ goto lbkvf;
+
if (!is_pf_cgxmapped(rvu, pf))
continue;
/* Assign MAC address to PF */
@@ -740,8 +744,10 @@ static void rvu_setup_pfvf_macaddress(struct rvu *rvu)
} else {
eth_random_addr(pfvf->mac_addr);
}
+ ether_addr_copy(pfvf->default_mac, pfvf->mac_addr);
- /* Assign MAC address to VFs */
+lbkvf:
+ /* Assign MAC address to VFs*/
rvu_get_pf_numvfs(rvu, pf, , );
for (vf = 0; vf < numvfs; vf++, hwvf++) {
pfvf = >hwvf[hwvf];
@@ -754,6 +760,7 @@ static void rvu_setup_pfvf_macaddress(struct rvu *rvu)
} else {
eth_random_addr(pfvf->mac_addr);
}
+ ether_addr_copy(pfvf->default_mac, pfvf->mac_addr);
}
}
}
@@ -1176,6 +1183,9 @@ static void rvu_detach_block(struct rvu *rvu, int
pcifunc, int blktype)
if (blkaddr < 0)
return;
+ if (blktype == BLKTYPE_NIX)
+ rvu_nix_reset_mac(pfvf, pcifunc);
+
block = >block[blkaddr];
num_lfs = rvu_get_rsrc_mapcount(pfvf, block->addr);
diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu.h
b/drivers/net/ethernet/marvell/octeontx2/af/rvu.h
index 432037b26a98..6af9321f8b4a 100644
--- a/drivers/net/ethernet/marvell/octeontx2/af/rvu.h
+++ b/drivers/net/ethernet/marvell/octeontx2/af/rvu.h
@@ -242,6 +242,7 @@ struct rvu_pfvf {
u8 pf_set_vf_cfg;
u8 mac_addr[ETH_ALEN]; /* MAC address of this PF/VF */
+ u8 default_mac[ETH_ALEN]; /* MAC address from FWdata */
/* Broadcast pkt replication info */
u16 bcast_mce_idx;
@@ -584,6 +585,7 @@ int nix_get_nixlf(struct rvu *rvu, u16 pcifunc, int *nixlf,
int *nix_blkaddr);
int nix_update_bcast_mce_list(struct rvu *rvu, u16 pcifunc, bool add);
struct nix_hw *get_nix_hw(struct rvu_hwinfo *hw, int blkaddr);
int rvu_get_next_nix_blkaddr(struct rvu *rvu, int blkaddr);
+void rvu_nix_reset_mac(struct rvu_pfvf *pfvf, int pcifunc);
/* NPC APIs */
int rvu_npc_init(struct rvu *rvu);
diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
b/drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
index 53c5556d7061..f5affb809c77 100644
--- a/drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
+++ b/drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
@@ -3737,3 +3737,12 @@ int rvu_mbox_handler_nix_lso_format_cfg(struct rvu *rvu,
return 0;
}
+
+void rvu_nix_reset_mac(struct rvu_pfvf *pfvf, int pcifunc)
+{
+ bool from_vf = !!(pcifunc & RVU_PFVF_FUNC_MASK);
+
+ /* overwrite vf mac address with default_mac */
+ if (from_vf)
+ ether_addr_copy(pfvf->mac_addr, pfvf->default_mac);
+}
diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
b/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
index 18357cca0d6c..9a08ef8c2996 100644
--- a/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
+++ b/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
@@ -938,7 +938,8 @@ static void npc_update_tx_entry(struct rvu *rvu, struct
rvu_pfvf *pfvf,
static int npc_install_flow(struct rvu *rvu, int blkaddr, u16 target,
int nixlf, struct rvu_pfvf *pfvf,
struct npc_install_flow_req *req,
- struct npc_install_flow_rsp *rsp, bool enable)
+ struct npc_install_flow_rsp *rsp, bool enable,
+ bool pf_set_vfs_mac)
{
struct
[PATCH net-next 04/13] octeontx2-af: Add mbox messages to install and delete MCAM rules
From: Subbaraya Sundeep
Added new mailbox messages to install and delete MCAM rules.
These mailbox messages will be used for adding/deleting ethtool
n-tuple filters by NIX PF. The installed MCAM rules are stored
in a list that will be traversed later to delete the MCAM entries
when the interface is brought down or when PCIe FLR is received.
The delete mailbox supports deleting a single MCAM entry or range
of entries or all the MCAM entries owned by the pcifunc. Each MCAM
entry can be associated with a HW match stat entry if the mailbox
requester wants to check the hit count for debugging.
Modified adding default unicast DMAC match rule using install
flow API. The default unicast DMAC match entry installed by
Administrative Function is saved and can be changed later by the
mailbox user to fit additional fields, or the default MCAM entry
rule action can be used for other flow rules installed later.
Modified rvu_mbox_handler_nix_lf_free mailbox to add a flag to
disable or delete the MCAM entries. The MCAM entries are disabled
when the interface is brought down and deleted in FLR handler.
The disabled MCAM entries will be re-enabled when the interface
is brought up again.
Signed-off-by: Subbaraya Sundeep
Signed-off-by: Sunil Goutham
Signed-off-by: Naveen Mamindlapalli
---
drivers/net/ethernet/marvell/octeontx2/af/common.h | 2 +
drivers/net/ethernet/marvell/octeontx2/af/mbox.h | 76 ++-
drivers/net/ethernet/marvell/octeontx2/af/npc.h| 57 +-
drivers/net/ethernet/marvell/octeontx2/af/rvu.h| 13 +
.../net/ethernet/marvell/octeontx2/af/rvu_nix.c| 19 +-
.../net/ethernet/marvell/octeontx2/af/rvu_npc.c| 217 ++-
.../net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c | 721 +
.../net/ethernet/marvell/octeontx2/nic/otx2_pf.c | 12 +-
8 files changed, 1065 insertions(+), 52 deletions(-)
diff --git a/drivers/net/ethernet/marvell/octeontx2/af/common.h
b/drivers/net/ethernet/marvell/octeontx2/af/common.h
index 8f68e7a8b882..17f6f42f4453 100644
--- a/drivers/net/ethernet/marvell/octeontx2/af/common.h
+++ b/drivers/net/ethernet/marvell/octeontx2/af/common.h
@@ -162,6 +162,8 @@ enum nix_scheduler {
#define NIX_RX_ACTIONOP_UCAST_IPSEC(0x2ull)
#define NIX_RX_ACTIONOP_MCAST (0x3ull)
#define NIX_RX_ACTIONOP_RSS(0x4ull)
+/* Use the RX action set in the default unicast entry */
+#define NIX_RX_ACTION_DEFAULT (0xfull)
/* NIX TX action operation*/
#define NIX_TX_ACTIONOP_DROP (0x0ull)
diff --git a/drivers/net/ethernet/marvell/octeontx2/af/mbox.h
b/drivers/net/ethernet/marvell/octeontx2/af/mbox.h
index 6dfcd0030769..20b23263149c 100644
--- a/drivers/net/ethernet/marvell/octeontx2/af/mbox.h
+++ b/drivers/net/ethernet/marvell/octeontx2/af/mbox.h
@@ -188,10 +188,14 @@ M(NPC_MCAM_ALLOC_AND_WRITE_ENTRY, 0x600b,
npc_mcam_alloc_and_write_entry, \
npc_mcam_alloc_and_write_entry_rsp) \
M(NPC_GET_KEX_CFG, 0x600c, npc_get_kex_cfg, \
msg_req, npc_get_kex_cfg_rsp)\
+M(NPC_INSTALL_FLOW, 0x600d, npc_install_flow,\
+ npc_install_flow_req, npc_install_flow_rsp) \
+M(NPC_DELETE_FLOW, 0x600e, npc_delete_flow, \
+ npc_delete_flow_req, msg_rsp) \
/* NIX mbox IDs (range 0x8000 - 0x) */ \
M(NIX_LF_ALLOC,0x8000, nix_lf_alloc,
\
nix_lf_alloc_req, nix_lf_alloc_rsp)\
-M(NIX_LF_FREE, 0x8001, nix_lf_free, msg_req, msg_rsp) \
+M(NIX_LF_FREE, 0x8001, nix_lf_free, nix_lf_free_req, msg_rsp) \
M(NIX_AQ_ENQ, 0x8002, nix_aq_enq, nix_aq_enq_req, nix_aq_enq_rsp) \
M(NIX_HWCTX_DISABLE, 0x8003, nix_hwctx_disable, \
hwctx_disable_req, msg_rsp)\
@@ -510,6 +514,12 @@ struct nix_lf_alloc_rsp {
u8 sdp_links; /* No. of SDP links present in HW */
};
+struct nix_lf_free_req {
+ struct mbox_msghdr hdr;
+#define NIX_LF_DISABLE_FLOWS BIT_ULL(0)
+ u64 flags;
+};
+
/* NIX AQ enqueue msg */
struct nix_aq_enq_req {
struct mbox_msghdr hdr;
@@ -901,6 +911,70 @@ enum header_fields {
NPC_HEADER_FIELDS_MAX,
};
+struct flow_msg {
+ unsigned char dmac[6];
+ unsigned char smac[6];
+ __be16 etype;
+ __be16 vlan_etype;
+ __be16 vlan_tci;
+ union {
+ __be32 ip4src;
+ __be32 ip6src[4];
+ };
+ union {
+ __be32 ip4dst;
+ __be32 ip6dst[4];
+ };
+ u8 tos;
+ u8 ip_ver;
+ u8 ip_proto;
+ u8 tc;
+ __be16 sport;
+ __be16 dport;
+};
+
+struct npc_install_flow_req {
+ struct mbox_msghdr hdr;
+ struct flow_msg packet;
+
[PATCH net-next 09/13] octeontx2-pf: Implement ingress/egress VLAN offload
From: Hariprasad Kelam
This patch implements egress VLAN offload by appending NIX_SEND_EXT_S
header to NIX_SEND_HDR_S. The VLAN TCI information is specified
in the NIX_SEND_EXT_S. The VLAN offload in the ingress path is
implemented by configuring the NIX_RX_VTAG_ACTION_S to strip and
capture the outer vlan fields. The NIX PF allocates one MCAM entry
for Rx VLAN offload.
Signed-off-by: Hariprasad Kelam
Signed-off-by: Sunil Goutham
Signed-off-by: Naveen Mamindlapalli
---
drivers/net/ethernet/marvell/octeontx2/af/mbox.h | 13 +++
.../net/ethernet/marvell/octeontx2/af/rvu_nix.c| 3 +-
.../ethernet/marvell/octeontx2/nic/otx2_common.c | 8 +-
.../ethernet/marvell/octeontx2/nic/otx2_common.h | 4 +
.../ethernet/marvell/octeontx2/nic/otx2_flows.c| 125 -
.../net/ethernet/marvell/octeontx2/nic/otx2_pf.c | 25 +
.../net/ethernet/marvell/octeontx2/nic/otx2_txrx.c | 16 +++
.../net/ethernet/marvell/octeontx2/nic/otx2_vf.c | 13 +++
8 files changed, 201 insertions(+), 6 deletions(-)
diff --git a/drivers/net/ethernet/marvell/octeontx2/af/mbox.h
b/drivers/net/ethernet/marvell/octeontx2/af/mbox.h
index 72b90aefba02..fd204e1a7b8a 100644
--- a/drivers/net/ethernet/marvell/octeontx2/af/mbox.h
+++ b/drivers/net/ethernet/marvell/octeontx2/af/mbox.h
@@ -479,6 +479,19 @@ enum nix_af_status {
NIX_AF_INVAL_NPA_PF_FUNC= -419,
NIX_AF_INVAL_SSO_PF_FUNC= -420,
NIX_AF_ERR_TX_VTAG_NOSPC= -421,
+ NIX_AF_ERR_RX_VTAG_INUSE= -422,
+};
+
+/* For NIX RX vtag action */
+enum nix_rx_vtag0_type {
+ NIX_AF_LFX_RX_VTAG_TYPE0, /* reserved for rx vlan offload */
+ NIX_AF_LFX_RX_VTAG_TYPE1,
+ NIX_AF_LFX_RX_VTAG_TYPE2,
+ NIX_AF_LFX_RX_VTAG_TYPE3,
+ NIX_AF_LFX_RX_VTAG_TYPE4,
+ NIX_AF_LFX_RX_VTAG_TYPE5,
+ NIX_AF_LFX_RX_VTAG_TYPE6,
+ NIX_AF_LFX_RX_VTAG_TYPE7,
};
/* For NIX LF context alloc and init */
diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
b/drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
index 4709d8b6197b..97a8f932d1e2 100644
--- a/drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
+++ b/drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
@@ -1986,7 +1986,8 @@ static int nix_rx_vtag_cfg(struct rvu *rvu, int nixlf,
int blkaddr,
{
u64 regval = req->vtag_size;
- if (req->rx.vtag_type > 7 || req->vtag_size > VTAGSIZE_T8)
+ if (req->rx.vtag_type > NIX_AF_LFX_RX_VTAG_TYPE7 ||
+ req->vtag_size > VTAGSIZE_T8)
return -EINVAL;
if (req->rx.capture_vtag)
diff --git a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.c
b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.c
index fc765e86988e..2f50b157207b 100644
--- a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.c
+++ b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.c
@@ -191,10 +191,14 @@ int otx2_set_mac_address(struct net_device *netdev, void
*p)
if (!is_valid_ether_addr(addr->sa_data))
return -EADDRNOTAVAIL;
- if (!otx2_hw_set_mac_addr(pfvf, addr->sa_data))
+ if (!otx2_hw_set_mac_addr(pfvf, addr->sa_data)) {
memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
- else
+ /* update dmac field in vlan offload rule */
+ if (pfvf->flags & OTX2_FLAG_RX_VLAN_SUPPORT)
+ otx2_install_rxvlan_offload_flow(pfvf);
+ } else {
return -EPERM;
+ }
return 0;
}
diff --git a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.h
b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.h
index 0ad5ec8555b1..d2190424ac58 100644
--- a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.h
+++ b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.h
@@ -239,6 +239,7 @@ struct otx2_flow_config {
u32 nr_flows;
u32 ntuple_offset;
u32 unicast_offset;
+ u32 rx_vlan_offset;
u32 ntuple_max_flows;
struct list_headflow_list;
};
@@ -256,6 +257,7 @@ struct otx2_nic {
#define OTX2_FLAG_MCAM_ENTRIES_ALLOC BIT_ULL(3)
#define OTX2_FLAG_NTUPLE_SUPPORT BIT_ULL(4)
#define OTX2_FLAG_UCAST_FLTR_SUPPORT BIT_ULL(5)
+#define OTX2_FLAG_RX_VLAN_SUPPORT BIT_ULL(6)
#define OTX2_FLAG_RX_PAUSE_ENABLED BIT_ULL(9)
#define OTX2_FLAG_TX_PAUSE_ENABLED BIT_ULL(10)
u64 flags;
@@ -683,5 +685,7 @@ int otx2_prepare_flow_request(struct ethtool_rx_flow_spec
*fsp,
struct npc_install_flow_req *req);
int otx2_del_macfilter(struct net_device *netdev, const u8 *mac);
int otx2_add_macfilter(struct net_device *netdev, const u8 *mac);
+int otx2_enable_rxvlan(struct otx2_nic *pf, bool enable);
+int otx2_install_rxvlan_offload_flow(struct otx2_nic *pfvf);
[PATCH net-next 06/13] octeontx2-pf: Add support for unicast MAC address filtering
From: Hariprasad Kelam
Add unicast MAC address filtering support using install flow
message. Total of 8 MCAM entries are allocated for adding
unicast mac filtering rules. If the MCAM allocation fails,
the unicast filtering support will not be advertised.
Signed-off-by: Hariprasad Kelam
Signed-off-by: Sunil Goutham
Signed-off-by: Naveen Mamindlapalli
---
.../ethernet/marvell/octeontx2/nic/otx2_common.h | 10 ++
.../ethernet/marvell/octeontx2/nic/otx2_flows.c| 138 +++--
.../net/ethernet/marvell/octeontx2/nic/otx2_pf.c | 5 +
3 files changed, 146 insertions(+), 7 deletions(-)
diff --git a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.h
b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.h
index fb11a3508766..0ad5ec8555b1 100644
--- a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.h
+++ b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.h
@@ -228,10 +228,17 @@ struct otx2_ptp {
#define OTX2_HW_TIMESTAMP_LEN 8
+struct otx2_mac_table {
+ u8 addr[ETH_ALEN];
+ u16 mcam_entry;
+ bool inuse;
+};
+
struct otx2_flow_config {
u16 entry[NPC_MAX_NONCONTIG_ENTRIES];
u32 nr_flows;
u32 ntuple_offset;
+ u32 unicast_offset;
u32 ntuple_max_flows;
struct list_headflow_list;
};
@@ -248,6 +255,7 @@ struct otx2_nic {
#define OTX2_FLAG_INTF_DOWNBIT_ULL(2)
#define OTX2_FLAG_MCAM_ENTRIES_ALLOC BIT_ULL(3)
#define OTX2_FLAG_NTUPLE_SUPPORT BIT_ULL(4)
+#define OTX2_FLAG_UCAST_FLTR_SUPPORT BIT_ULL(5)
#define OTX2_FLAG_RX_PAUSE_ENABLED BIT_ULL(9)
#define OTX2_FLAG_TX_PAUSE_ENABLED BIT_ULL(10)
u64 flags;
@@ -673,5 +681,7 @@ int otx2_add_flow(struct otx2_nic *pfvf,
int otx2_remove_flow(struct otx2_nic *pfvf, u32 location);
int otx2_prepare_flow_request(struct ethtool_rx_flow_spec *fsp,
struct npc_install_flow_req *req);
+int otx2_del_macfilter(struct net_device *netdev, const u8 *mac);
+int otx2_add_macfilter(struct net_device *netdev, const u8 *mac);
#endif /* OTX2_COMMON_H */
diff --git a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_flows.c
b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_flows.c
index a66b19c58f51..32346dff0f44 100644
--- a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_flows.c
+++ b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_flows.c
@@ -10,8 +10,10 @@
/* helper macros to support mcam flows */
#define OTX2_MAX_NTUPLE_FLOWS 32
+#define OTX2_MAX_UNICAST_FLOWS 8
-#define OTX2_MCAM_COUNTOTX2_MAX_NTUPLE_FLOWS
+#define OTX2_MCAM_COUNT(OTX2_MAX_NTUPLE_FLOWS + \
+OTX2_MAX_UNICAST_FLOWS)
#define OTX2_DEFAULT_ACTION0x1
@@ -35,7 +37,13 @@ int otx2_mcam_flow_init(struct otx2_nic *pf)
pf->flow_cfg->ntuple_max_flows = OTX2_MAX_NTUPLE_FLOWS;
- pf->flags |= OTX2_FLAG_NTUPLE_SUPPORT;
+ pf->flags |= OTX2_FLAG_NTUPLE_SUPPORT |
+OTX2_FLAG_UCAST_FLTR_SUPPORT;
+
+ pf->mac_table = devm_kzalloc(pf->dev, sizeof(struct otx2_mac_table)
+ * OTX2_MAX_UNICAST_FLOWS, GFP_KERNEL);
+ if (!pf->mac_table)
+ return -ENOMEM;
return 0;
}
@@ -77,13 +85,19 @@ int otx2_alloc_mcam_entries(struct otx2_nic *pfvf)
rsp = (struct npc_mcam_alloc_entry_rsp *)otx2_mbox_get_rsp
(>mbox.mbox, 0, >hdr);
- if (rsp->count != req->count)
+ if (rsp->count != req->count) {
netdev_info(pfvf->netdev, "number of rules truncated to %d\n",
rsp->count);
-
- /* support only ntuples here */
- flow_cfg->ntuple_max_flows = rsp->count;
- flow_cfg->ntuple_offset = 0;
+ /* support only ntuples here */
+ flow_cfg->ntuple_max_flows = rsp->count;
+ flow_cfg->ntuple_offset = 0;
+ pfvf->netdev->priv_flags &= ~IFF_UNICAST_FLT;
+ pfvf->flags &= ~OTX2_FLAG_UCAST_FLTR_SUPPORT;
+ } else {
+ flow_cfg->ntuple_offset = 0;
+ flow_cfg->unicast_offset = flow_cfg->ntuple_offset +
+ OTX2_MAX_NTUPLE_FLOWS;
+ }
for (i = 0; i < rsp->count; i++)
flow_cfg->entry[i] = rsp->entry_list[i];
@@ -94,6 +108,116 @@ int otx2_alloc_mcam_entries(struct otx2_nic *pfvf)
return 0;
}
+/* On success adds mcam entry
+ * On failure enable promisous mode
+ */
+static int otx2_do_add_macfilter(struct otx2_nic *pf, const u8 *mac)
+{
+ struct otx2_flow_config *flow_cfg = pf->flow_cfg;
+ struct npc_install_flow_req *req;
+ int err, i;
+
+ if (!(pf->flags & OTX2_FLAG_MCAM_ENTRIES_ALLOC)) {
+ err =
[PATCH net-next 13/13] octeontx2-af: Delete NIX_RXVLAN_ALLOC mailbox message
From: Subbaraya Sundeep
Since mailbox message for installing flows is in place,
remove the RXVLAN_ALLOC mbox message which is redundant.
Signed-off-by: Subbaraya Sundeep
Signed-off-by: Sunil Goutham
Signed-off-by: Naveen Mamindlapalli
---
drivers/net/ethernet/marvell/octeontx2/af/mbox.h | 1 -
drivers/net/ethernet/marvell/octeontx2/af/rvu.h| 6 ---
.../net/ethernet/marvell/octeontx2/af/rvu_nix.c| 59 --
.../net/ethernet/marvell/octeontx2/af/rvu_npc.c| 24 -
4 files changed, 90 deletions(-)
diff --git a/drivers/net/ethernet/marvell/octeontx2/af/mbox.h
b/drivers/net/ethernet/marvell/octeontx2/af/mbox.h
index cc8c463b7bf3..4e188d5e5cb5 100644
--- a/drivers/net/ethernet/marvell/octeontx2/af/mbox.h
+++ b/drivers/net/ethernet/marvell/octeontx2/af/mbox.h
@@ -226,7 +226,6 @@ M(NIX_SET_RX_CFG, 0x8010, nix_set_rx_cfg, nix_rx_cfg,
msg_rsp)\
M(NIX_LSO_FORMAT_CFG, 0x8011, nix_lso_format_cfg, \
nix_lso_format_cfg,\
nix_lso_format_cfg_rsp)\
-M(NIX_RXVLAN_ALLOC,0x8012, nix_rxvlan_alloc, msg_req, msg_rsp) \
M(NIX_LF_PTP_TX_ENABLE, 0x8013, nix_lf_ptp_tx_enable, msg_req, msg_rsp)
\
M(NIX_LF_PTP_TX_DISABLE, 0x8014, nix_lf_ptp_tx_disable, msg_req, msg_rsp) \
M(NIX_BP_ENABLE, 0x8016, nix_bp_enable, nix_bp_cfg_req, \
diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu.h
b/drivers/net/ethernet/marvell/octeontx2/af/rvu.h
index 6af9321f8b4a..c931b098ebb0 100644
--- a/drivers/net/ethernet/marvell/octeontx2/af/rvu.h
+++ b/drivers/net/ethernet/marvell/octeontx2/af/rvu.h
@@ -248,11 +248,6 @@ struct rvu_pfvf {
u16 bcast_mce_idx;
struct nix_mce_list bcast_mce_list;
- /* VLAN offload */
- struct mcam_entry entry;
- int rxvlan_index;
- bool rxvlan;
-
struct rvu_npc_mcam_rule *def_ucast_rule;
boolcgx_in_use; /* this PF/VF using CGX? */
@@ -602,7 +597,6 @@ void rvu_npc_enable_promisc_entry(struct rvu *rvu, u16
pcifunc, int nixlf);
void rvu_npc_install_bcast_match_entry(struct rvu *rvu, u16 pcifunc,
int nixlf, u64 chan);
void rvu_npc_enable_bcast_entry(struct rvu *rvu, u16 pcifunc, bool enable);
-int rvu_npc_update_rxvlan(struct rvu *rvu, u16 pcifunc, int nixlf);
void rvu_npc_disable_mcam_entries(struct rvu *rvu, u16 pcifunc, int nixlf);
void rvu_npc_free_mcam_entries(struct rvu *rvu, u16 pcifunc, int nixlf);
void rvu_npc_disable_default_entries(struct rvu *rvu, u16 pcifunc, int nixlf);
diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
b/drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
index f5affb809c77..89601e796c85 100644
--- a/drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
+++ b/drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
@@ -3144,65 +3144,6 @@ int rvu_mbox_handler_nix_set_hw_frs(struct rvu *rvu,
struct nix_frs_cfg *req,
return 0;
}
-int rvu_mbox_handler_nix_rxvlan_alloc(struct rvu *rvu, struct msg_req *req,
- struct msg_rsp *rsp)
-{
- struct npc_mcam_alloc_entry_req alloc_req = { };
- struct npc_mcam_alloc_entry_rsp alloc_rsp = { };
- struct npc_mcam_free_entry_req free_req = { };
- u16 pcifunc = req->hdr.pcifunc;
- int blkaddr, nixlf, err;
- struct rvu_pfvf *pfvf;
-
- /* LBK VFs do not have separate MCAM UCAST entry hence
-* skip allocating rxvlan for them
-*/
- if (is_afvf(pcifunc))
- return 0;
-
- pfvf = rvu_get_pfvf(rvu, pcifunc);
- if (pfvf->rxvlan)
- return 0;
-
- /* alloc new mcam entry */
- alloc_req.hdr.pcifunc = pcifunc;
- alloc_req.count = 1;
-
- err = rvu_mbox_handler_npc_mcam_alloc_entry(rvu, _req,
- _rsp);
- if (err)
- return err;
-
- /* update entry to enable rxvlan offload */
- blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NIX, pcifunc);
- if (blkaddr < 0) {
- err = NIX_AF_ERR_AF_LF_INVALID;
- goto free_entry;
- }
-
- nixlf = rvu_get_lf(rvu, >hw->block[blkaddr], pcifunc, 0);
- if (nixlf < 0) {
- err = NIX_AF_ERR_AF_LF_INVALID;
- goto free_entry;
- }
-
- pfvf->rxvlan_index = alloc_rsp.entry_list[0];
- /* all it means is that rxvlan_index is valid */
- pfvf->rxvlan = true;
-
- err = rvu_npc_update_rxvlan(rvu, pcifunc, nixlf);
- if (err)
- goto free_entry;
-
- return 0;
-free_entry:
- free_req.hdr.pcifunc = pcifunc;
- free_req.entry = alloc_rsp.entry_list[0];
- rvu_mbox_handler_npc_mcam_free_entry(rvu, _req, rsp);
- pfvf->rxvlan = false;
- return err;
-}
-
int rvu_mbox_handler_nix_set_rx_cfg(struct rvu *rvu, struct nix_rx_cfg *req,
[PATCH net-next 10/13] octeontx2-pf: Add support for SR-IOV management functions
This patch adds support for ndo_set_vf_mac, ndo_set_vf_vlan
and ndo_get_vf_config handlers. The traffic redirection
based on the VF mac address or vlan id is done by installing
MCAM rules. Reserved RX_VTAG_TYPE7 in each NIXLF for VF VLAN
which strips the VLAN tag from ingress VLAN traffic. The NIX PF
allocates two MCAM entries for VF VLAN feature, one used for
ingress VTAG strip and another entry for egress VTAG insertion.
This patch also updates the MAC address in PF installed VF VLAN
rule upon receiving nix_lf_start_rx mbox request for VF since
Administrative Function driver will assign a valid MAC addr
in nix_lf_start_rx function.
Signed-off-by: Naveen Mamindlapalli
Co-developed-by: Tomasz Duszynski
Signed-off-by: Tomasz Duszynski
Signed-off-by: Sunil Goutham
Signed-off-by: Hariprasad Kelam
---
drivers/net/ethernet/marvell/octeontx2/af/npc.h| 1 +
drivers/net/ethernet/marvell/octeontx2/af/rvu.h| 4 +
.../net/ethernet/marvell/octeontx2/af/rvu_nix.c| 14 ++
.../net/ethernet/marvell/octeontx2/af/rvu_npc.c| 88 +++
.../net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c | 40
.../net/ethernet/marvell/octeontx2/af/rvu_struct.h | 11 +
.../ethernet/marvell/octeontx2/nic/otx2_common.h | 9 +
.../ethernet/marvell/octeontx2/nic/otx2_flows.c| 19 +-
.../net/ethernet/marvell/octeontx2/nic/otx2_pf.c | 255 +
9 files changed, 432 insertions(+), 9 deletions(-)
diff --git a/drivers/net/ethernet/marvell/octeontx2/af/npc.h
b/drivers/net/ethernet/marvell/octeontx2/af/npc.h
index 7bdb113e4f4a..67f9f27fb4b5 100644
--- a/drivers/net/ethernet/marvell/octeontx2/af/npc.h
+++ b/drivers/net/ethernet/marvell/octeontx2/af/npc.h
@@ -404,6 +404,7 @@ struct rvu_npc_mcam_rule {
bool has_cntr;
u8 default_rule;
bool enable;
+ bool vfvlan_cfg;
};
#endif /* NPC_H */
diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu.h
b/drivers/net/ethernet/marvell/octeontx2/af/rvu.h
index 425af8cd2705..432037b26a98 100644
--- a/drivers/net/ethernet/marvell/octeontx2/af/rvu.h
+++ b/drivers/net/ethernet/marvell/octeontx2/af/rvu.h
@@ -240,6 +240,7 @@ struct rvu_pfvf {
u16 maxlen;
u16 minlen;
+ u8 pf_set_vf_cfg;
u8 mac_addr[ETH_ALEN]; /* MAC address of this PF/VF */
/* Broadcast pkt replication info */
@@ -627,6 +628,9 @@ void npc_mcam_enable_flows(struct rvu *rvu, u16 target);
void npc_mcam_disable_flows(struct rvu *rvu, u16 target);
void npc_enable_mcam_entry(struct rvu *rvu, struct npc_mcam *mcam,
int blkaddr, int index, bool enable);
+void npc_read_mcam_entry(struct rvu *rvu, struct npc_mcam *mcam,
+int blkaddr, u16 src, struct mcam_entry *entry,
+u8 *intf, u8 *ena);
#ifdef CONFIG_DEBUG_FS
void rvu_dbg_init(struct rvu *rvu);
diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
b/drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
index 97a8f932d1e2..53c5556d7061 100644
--- a/drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
+++ b/drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
@@ -1196,6 +1196,11 @@ int rvu_mbox_handler_nix_lf_alloc(struct rvu *rvu,
/* Disable NPC entries as NIXLF's contexts are not initialized yet */
rvu_npc_disable_default_entries(rvu, pcifunc, nixlf);
+ /* Configure RX VTAG Type 7 (strip) for vf vlan */
+ rvu_write64(rvu, blkaddr,
+ NIX_AF_LFX_RX_VTAG_TYPEX(nixlf, NIX_AF_LFX_RX_VTAG_TYPE7),
+ VTAGSIZE_T4 | VTAG_STRIP);
+
goto exit;
free_mem:
@@ -1990,6 +1995,10 @@ static int nix_rx_vtag_cfg(struct rvu *rvu, int nixlf,
int blkaddr,
req->vtag_size > VTAGSIZE_T8)
return -EINVAL;
+ /* RX VTAG Type 7 reserved for vf vlan */
+ if (req->rx.vtag_type == NIX_AF_LFX_RX_VTAG_TYPE7)
+ return NIX_AF_ERR_RX_VTAG_INUSE;
+
if (req->rx.capture_vtag)
regval |= BIT_ULL(5);
if (req->rx.strip_vtag)
@@ -2933,6 +2942,7 @@ int rvu_mbox_handler_nix_set_mac_addr(struct rvu *rvu,
struct nix_set_mac_addr *req,
struct msg_rsp *rsp)
{
+ bool from_vf = req->hdr.pcifunc & RVU_PFVF_FUNC_MASK;
u16 pcifunc = req->hdr.pcifunc;
int blkaddr, nixlf, err;
struct rvu_pfvf *pfvf;
@@ -2943,6 +2953,10 @@ int rvu_mbox_handler_nix_set_mac_addr(struct rvu *rvu,
pfvf = rvu_get_pfvf(rvu, pcifunc);
+ /* VF can't overwrite admin(PF) changes */
+ if (from_vf && pfvf->pf_set_vf_cfg)
+ return -EPERM;
+
ether_addr_copy(pfvf->mac_addr, req->mac_addr);
rvu_npc_install_ucast_entry(rvu, pcifunc, nixlf,
diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
b/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
index c53f1d1f2a31..c87d06ee11c3 100644
---
[PATCH net-next 02/13] octeontx2-af: Verify MCAM entry channel and PF_FUNC
From: Subbaraya Sundeep
This patch adds support to verify the channel number sent by
mailbox requester before writing MCAM entry for Ingress packets.
Similarly for Egress packets, verifying the PF_FUNC sent by the
mailbox user.
Signed-off-by: Subbaraya Sundeep
Signed-off-by: Kiran Kumar K
Signed-off-by: Sunil Goutham
Signed-off-by: Naveen Mamindlapalli
---
drivers/net/ethernet/marvell/octeontx2/af/rvu.c| 4 +-
drivers/net/ethernet/marvell/octeontx2/af/rvu.h| 2 +
.../net/ethernet/marvell/octeontx2/af/rvu_npc.c| 78 ++
3 files changed, 82 insertions(+), 2 deletions(-)
diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu.c
b/drivers/net/ethernet/marvell/octeontx2/af/rvu.c
index a28a518c0eae..e8b5aaf73201 100644
--- a/drivers/net/ethernet/marvell/octeontx2/af/rvu.c
+++ b/drivers/net/ethernet/marvell/octeontx2/af/rvu.c
@@ -2642,7 +2642,7 @@ static void rvu_enable_afvf_intr(struct rvu *rvu)
#define PCI_DEVID_OCTEONTX2_LBK 0xA061
-static int lbk_get_num_chans(void)
+int rvu_get_num_lbk_chans(void)
{
struct pci_dev *pdev;
void __iomem *base;
@@ -2677,7 +2677,7 @@ static int rvu_enable_sriov(struct rvu *rvu)
return 0;
}
- chans = lbk_get_num_chans();
+ chans = rvu_get_num_lbk_chans();
if (chans < 0)
return chans;
diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu.h
b/drivers/net/ethernet/marvell/octeontx2/af/rvu.h
index 5ac9bb12415f..1724dbd18847 100644
--- a/drivers/net/ethernet/marvell/octeontx2/af/rvu.h
+++ b/drivers/net/ethernet/marvell/octeontx2/af/rvu.h
@@ -445,6 +445,7 @@ int rvu_get_lf(struct rvu *rvu, struct rvu_block *block,
u16 pcifunc, u16 slot);
int rvu_lf_reset(struct rvu *rvu, struct rvu_block *block, int lf);
int rvu_get_blkaddr(struct rvu *rvu, int blktype, u16 pcifunc);
int rvu_poll_reg(struct rvu *rvu, u64 block, u64 offset, u64 mask, bool zero);
+int rvu_get_num_lbk_chans(void);
/* RVU HW reg validation */
enum regmap_block {
@@ -535,6 +536,7 @@ bool is_npc_intf_tx(u8 intf);
bool is_npc_intf_rx(u8 intf);
bool is_npc_interface_valid(struct rvu *rvu, u8 intf);
int rvu_npc_get_tx_nibble_cfg(struct rvu *rvu, u64 nibble_ena);
+int npc_mcam_verify_channel(struct rvu *rvu, u16 pcifunc, u8 intf, u16
channel);
#ifdef CONFIG_DEBUG_FS
void rvu_dbg_init(struct rvu *rvu);
diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
b/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
index 989533a3d2ce..e9dd8396387c 100644
--- a/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
+++ b/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
@@ -28,6 +28,8 @@
#define NPC_PARSE_RESULT_DMAC_OFFSET 8
#define NPC_HW_TSTAMP_OFFSET 8
+#define NPC_KEX_CHAN_MASK 0xFFFULL
+#define NPC_KEX_PF_FUNC_MASK 0xULL
static const char def_pfl_name[] = "default";
@@ -63,6 +65,54 @@ int rvu_npc_get_tx_nibble_cfg(struct rvu *rvu, u64
nibble_ena)
return 0;
}
+static int npc_mcam_verify_pf_func(struct rvu *rvu,
+ struct mcam_entry *entry_data, u8 intf,
+ u16 pcifunc)
+{
+ u16 pf_func, pf_func_mask;
+
+ if (is_npc_intf_rx(intf))
+ return 0;
+
+ pf_func_mask = (entry_data->kw_mask[0] >> 32) &
+ NPC_KEX_PF_FUNC_MASK;
+ pf_func = (entry_data->kw[0] >> 32) & NPC_KEX_PF_FUNC_MASK;
+
+ pf_func = htons(pf_func);
+ if (pf_func_mask != NPC_KEX_PF_FUNC_MASK ||
+ ((pf_func & ~RVU_PFVF_FUNC_MASK) !=
+(pcifunc & ~RVU_PFVF_FUNC_MASK)))
+ return -EINVAL;
+
+ return 0;
+}
+
+int npc_mcam_verify_channel(struct rvu *rvu, u16 pcifunc, u8 intf, u16 channel)
+{
+ int pf = rvu_get_pf(pcifunc);
+ u8 cgx_id, lmac_id;
+ int base = 0, end;
+
+ if (is_npc_intf_tx(intf))
+ return 0;
+
+ if (is_afvf(pcifunc)) {
+ end = rvu_get_num_lbk_chans();
+ if (end < 0)
+ return -EINVAL;
+ } else {
+ rvu_get_cgx_lmac_id(rvu->pf2cgxlmac_map[pf], _id, _id);
+ base = NIX_CHAN_CGX_LMAC_CHX(cgx_id, lmac_id, 0x0);
+ /* CGX mapped functions has maximum of 16 channels */
+ end = NIX_CHAN_CGX_LMAC_CHX(cgx_id, lmac_id, 0xF);
+ }
+
+ if (channel < base || channel > end)
+ return -EINVAL;
+
+ return 0;
+}
+
void rvu_npc_set_pkind(struct rvu *rvu, int pkind, struct rvu_pfvf *pfvf)
{
int blkaddr;
@@ -1935,6 +1985,7 @@ int rvu_mbox_handler_npc_mcam_write_entry(struct rvu *rvu,
struct rvu_pfvf *pfvf = rvu_get_pfvf(rvu, req->hdr.pcifunc);
struct npc_mcam *mcam = >hw->mcam;
u16 pcifunc = req->hdr.pcifunc;
+ u16 channel, chan_mask;
int blkaddr, rc;
u8 nix_intf;
@@ -1942,6 +1993,10 @@ int rvu_mbox_handler_npc_mcam_write_entry(struct rvu
*rvu,
if (blkaddr
[PATCH net-next 00/13] Add ethtool ntuple filters support
This patch series adds support for ethtool ntuple filters, unicast address filtering, VLAN offload and SR-IOV ndo handlers. All of the above features are based on the Admin Function(AF) driver support to install and delete the low level MCAM entries. Each MCAM entry is programmed with the packet fields to match and what actions to take if the match succeeds. The PF driver requests AF driver to allocate set of MCAM entries to be used to install the flows by that PF. The entries will be freed when the PF driver is unloaded. * The patches 1 to 4 adds AF driver infrastructure to install and delete the low level MCAM flow entries. * Patch 5 adds ethtool ntuple filter support. * Patch 6 adds unicast MAC address filtering. * Patch 7 adds support for dumping the MCAM entries via debugfs. * Patches 8 to 10 adds support for VLAN offload. * Patch 10 to 11 adds support for SR-IOV ndo handlers. * Patch 12 adds support to read the MCAM entries. Misc: * Removed redundant mailbox NIX_RXVLAN_ALLOC. Hariprasad Kelam (3): octeontx2-pf: Add support for unicast MAC address filtering octeontx2-pf: Implement ingress/egress VLAN offload octeontx2-af: Handle PF-VF mac address changes Naveen Mamindlapalli (2): octeontx2-pf: Add support for SR-IOV management functions octeontx2-af: Add new mbox messages to retrieve MCAM entries Stanislaw Kardach (1): octeontx2-af: Modify default KEX profile to extract TX packet fields Subbaraya Sundeep (6): octeontx2-af: Verify MCAM entry channel and PF_FUNC octeontx2-af: Generate key field bit mask from KEX profile octeontx2-af: Add mbox messages to install and delete MCAM rules octeontx2-pf: Add support for ethtool ntuple filters octeontx2-af: Add debugfs entry to dump the MCAM rules octeontx2-af: Delete NIX_RXVLAN_ALLOC mailbox message Vamsi Attunuru (1): octeontx2-af: Modify nix_vtag_cfg mailbox to support TX VTAG entries drivers/net/ethernet/marvell/octeontx2/af/Makefile |2 +- drivers/net/ethernet/marvell/octeontx2/af/common.h |2 + drivers/net/ethernet/marvell/octeontx2/af/mbox.h | 189 ++- drivers/net/ethernet/marvell/octeontx2/af/npc.h| 58 +- .../ethernet/marvell/octeontx2/af/npc_profile.h| 71 +- drivers/net/ethernet/marvell/octeontx2/af/rvu.c| 16 +- drivers/net/ethernet/marvell/octeontx2/af/rvu.h| 102 +- .../ethernet/marvell/octeontx2/af/rvu_debugfs.c| 197 +++ .../net/ethernet/marvell/octeontx2/af/rvu_nix.c| 305 - .../net/ethernet/marvell/octeontx2/af/rvu_npc.c| 462 ++- .../net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c | 1334 .../net/ethernet/marvell/octeontx2/af/rvu_struct.h | 11 + .../net/ethernet/marvell/octeontx2/nic/Makefile|2 +- .../ethernet/marvell/octeontx2/nic/otx2_common.c |8 +- .../ethernet/marvell/octeontx2/nic/otx2_common.h | 53 + .../ethernet/marvell/octeontx2/nic/otx2_ethtool.c | 58 +- .../ethernet/marvell/octeontx2/nic/otx2_flows.c| 854 + .../net/ethernet/marvell/octeontx2/nic/otx2_pf.c | 313 - .../net/ethernet/marvell/octeontx2/nic/otx2_txrx.c | 16 + .../net/ethernet/marvell/octeontx2/nic/otx2_vf.c | 13 + 20 files changed, 3906 insertions(+), 160 deletions(-) create mode 100644 drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c create mode 100644 drivers/net/ethernet/marvell/octeontx2/nic/otx2_flows.c -- 2.16.5
[PATCH net-next 01/13] octeontx2-af: Modify default KEX profile to extract TX packet fields
From: Stanislaw Kardach
The current default Key Extraction(KEX) profile can only use RX
packet fields while generating the MCAM search key. The profile
can't be used for matching TX packet fields. This patch modifies
the default KEX profile to add support for extracting TX packet
fields into MCAM search key. Enabled Tx KPU packet parsing by
configuring TX PKIND in tx_parse_cfg.
Also modified the default KEX profile to extract VLAN TCI from
the LB_PTR and exact byte offset of VLAN header. The NPC KPU
parser was modified to point LB_PTR to the starting byte offset
of VLAN header which points to the tpid field.
Signed-off-by: Stanislaw Kardach
Signed-off-by: Sunil Goutham
Signed-off-by: Naveen Mamindlapalli
---
.../ethernet/marvell/octeontx2/af/npc_profile.h| 71 --
.../net/ethernet/marvell/octeontx2/af/rvu_nix.c| 6 ++
2 files changed, 72 insertions(+), 5 deletions(-)
diff --git a/drivers/net/ethernet/marvell/octeontx2/af/npc_profile.h
b/drivers/net/ethernet/marvell/octeontx2/af/npc_profile.h
index 199448610e3e..c5b13385c81d 100644
--- a/drivers/net/ethernet/marvell/octeontx2/af/npc_profile.h
+++ b/drivers/net/ethernet/marvell/octeontx2/af/npc_profile.h
@@ -13386,8 +13386,8 @@ static struct npc_mcam_kex npc_mkex_default = {
.kpu_version = NPC_KPU_PROFILE_VER,
.keyx_cfg = {
/* nibble: LA..LE (ltype only) + Channel */
- [NIX_INTF_RX] = ((u64)NPC_MCAM_KEY_X2 << 32) | 0x49247,
- [NIX_INTF_TX] = ((u64)NPC_MCAM_KEY_X2 << 32) | ((1ULL << 19) -
1),
+ [NIX_INTF_RX] = ((u64)NPC_MCAM_KEY_X2 << 32) | 0x249207,
+ [NIX_INTF_TX] = ((u64)NPC_MCAM_KEY_X2 << 32) | 0x249200,
},
.intf_lid_lt_ld = {
/* Default RX MCAM KEX profile */
@@ -13405,12 +13405,14 @@ static struct npc_mcam_kex npc_mkex_default = {
/* Layer B: Single VLAN (CTAG) */
/* CTAG VLAN[2..3] + Ethertype, 4 bytes, KW0[63:32] */
[NPC_LT_LB_CTAG] = {
- KEX_LD_CFG(0x03, 0x0, 0x1, 0x0, 0x4),
+ KEX_LD_CFG(0x03, 0x2, 0x1, 0x0, 0x4),
},
/* Layer B: Stacked VLAN (STAG|QinQ) */
[NPC_LT_LB_STAG_QINQ] = {
- /* CTAG VLAN[2..3] + Ethertype, 4 bytes,
KW0[63:32] */
- KEX_LD_CFG(0x03, 0x4, 0x1, 0x0, 0x4),
+ /* Outer VLAN: 2 bytes, KW0[63:48] */
+ KEX_LD_CFG(0x01, 0x2, 0x1, 0x0, 0x6),
+ /* Ethertype: 2 bytes, KW0[47:32] */
+ KEX_LD_CFG(0x01, 0x8, 0x1, 0x0, 0x4),
},
[NPC_LT_LB_FDSA] = {
/* SWITCH PORT: 1 byte, KW0[63:48] */
@@ -13450,6 +13452,65 @@ static struct npc_mcam_kex npc_mkex_default = {
},
},
},
+
+ /* Default TX MCAM KEX profile */
+ [NIX_INTF_TX] = {
+ [NPC_LID_LA] = {
+ /* Layer A: Ethernet: */
+ [NPC_LT_LA_IH_NIX_ETHER] = {
+ /* PF_FUNC: 2B , KW0 [47:32] */
+ KEX_LD_CFG(0x01, 0x0, 0x1, 0x0, 0x4),
+ /* DMAC: 6 bytes, KW1[63:16] */
+ KEX_LD_CFG(0x05, 0x8, 0x1, 0x0, 0xa),
+ },
+ },
+ [NPC_LID_LB] = {
+ /* Layer B: Single VLAN (CTAG) */
+ [NPC_LT_LB_CTAG] = {
+ /* CTAG VLAN[2..3] KW0[63:48] */
+ KEX_LD_CFG(0x01, 0x2, 0x1, 0x0, 0x6),
+ /* CTAG VLAN[2..3] KW1[15:0] */
+ KEX_LD_CFG(0x01, 0x4, 0x1, 0x0, 0x8),
+ },
+ /* Layer B: Stacked VLAN (STAG|QinQ) */
+ [NPC_LT_LB_STAG_QINQ] = {
+ /* Outer VLAN: 2 bytes, KW0[63:48] */
+ KEX_LD_CFG(0x01, 0x2, 0x1, 0x0, 0x6),
+ /* Outer VLAN: 2 Bytes, KW1[15:0] */
+ KEX_LD_CFG(0x01, 0x8, 0x1, 0x0, 0x8),
+ },
+ },
+ [NPC_LID_LC] = {
+ /* Layer C: IPv4 */
+ [NPC_LT_LC_IP] = {
+ /* SIP+DIP: 8 bytes, KW2[63:0] */
+ KEX_LD_CFG(0x07, 0xc, 0x1, 0x0, 0x10),
+ /* TOS: 1 byte, KW1[63:56] */
+ KEX_LD_CFG(0x0, 0x1, 0x1, 0x0, 0xf),
+ },
+ /* Layer C: IPv6 */
+ [NPC_LT_LC_IP6] = {
+ /* Everything up to SADDR: 8 bytes,
[PATCH net-next 03/13] octeontx2-af: Generate key field bit mask from KEX profile
From: Subbaraya Sundeep
Key Extraction(KEX) profile decides how the packet metadata such as
layer information and selected packet data bytes at each layer are
placed in MCAM search key. This patch reads the configured KEX profile
parameters to find out the bit position and bit mask for each field.
The information is used when programming the MCAM match data by SW
to match a packet flow and take appropriate action on the flow. This
patch also verifies the mandatory fields such as channel and DMAC
are not overwritten by the KEX configuration of other fields.
Signed-off-by: Subbaraya Sundeep
Signed-off-by: Sunil Goutham
Signed-off-by: Naveen Mamindlapalli
---
drivers/net/ethernet/marvell/octeontx2/af/Makefile | 2 +-
drivers/net/ethernet/marvell/octeontx2/af/mbox.h | 19 +
drivers/net/ethernet/marvell/octeontx2/af/rvu.h| 69 +++
.../net/ethernet/marvell/octeontx2/af/rvu_npc.c| 11 +-
.../net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c | 562 +
5 files changed, 660 insertions(+), 3 deletions(-)
create mode 100644 drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
diff --git a/drivers/net/ethernet/marvell/octeontx2/af/Makefile
b/drivers/net/ethernet/marvell/octeontx2/af/Makefile
index 2f7a861d0c7b..ffc681b67f1c 100644
--- a/drivers/net/ethernet/marvell/octeontx2/af/Makefile
+++ b/drivers/net/ethernet/marvell/octeontx2/af/Makefile
@@ -9,4 +9,4 @@ obj-$(CONFIG_OCTEONTX2_AF) += octeontx2_af.o
octeontx2_mbox-y := mbox.o rvu_trace.o
octeontx2_af-y := cgx.o rvu.o rvu_cgx.o rvu_npa.o rvu_nix.o \
- rvu_reg.o rvu_npc.o rvu_debugfs.o ptp.o
+ rvu_reg.o rvu_npc.o rvu_debugfs.o ptp.o rvu_npc_fs.o
diff --git a/drivers/net/ethernet/marvell/octeontx2/af/mbox.h
b/drivers/net/ethernet/marvell/octeontx2/af/mbox.h
index f46de8419b77..6dfcd0030769 100644
--- a/drivers/net/ethernet/marvell/octeontx2/af/mbox.h
+++ b/drivers/net/ethernet/marvell/octeontx2/af/mbox.h
@@ -882,6 +882,25 @@ struct npc_get_kex_cfg_rsp {
u8 mkex_pfl_name[MKEX_NAME_LEN];
};
+enum header_fields {
+ NPC_DMAC,
+ NPC_SMAC,
+ NPC_ETYPE,
+ NPC_OUTER_VID,
+ NPC_TOS,
+ NPC_SIP_IPV4,
+ NPC_DIP_IPV4,
+ NPC_SIP_IPV6,
+ NPC_DIP_IPV6,
+ NPC_SPORT_TCP,
+ NPC_DPORT_TCP,
+ NPC_SPORT_UDP,
+ NPC_DPORT_UDP,
+ NPC_SPORT_SCTP,
+ NPC_DPORT_SCTP,
+ NPC_HEADER_FIELDS_MAX,
+};
+
enum ptp_op {
PTP_OP_ADJFINE = 0,
PTP_OP_GET_CLOCK = 1,
diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu.h
b/drivers/net/ethernet/marvell/octeontx2/af/rvu.h
index 1724dbd18847..e19694ff50d7 100644
--- a/drivers/net/ethernet/marvell/octeontx2/af/rvu.h
+++ b/drivers/net/ethernet/marvell/octeontx2/af/rvu.h
@@ -105,6 +105,68 @@ struct nix_mce_list {
int max;
};
+/* list of known and supported fields in packet header and
+ * fields present in key structure.
+ */
+enum key_fields {
+ NPC_CHAN = NPC_HEADER_FIELDS_MAX, /* Valid when Rx */
+ NPC_PF_FUNC, /* Valid when Tx */
+ NPC_ERRLEV,
+ NPC_ERRCODE,
+ NPC_LXMB,
+ NPC_LA,
+ NPC_LB,
+ NPC_LC,
+ NPC_LD,
+ NPC_LE,
+ NPC_LF,
+ NPC_LG,
+ NPC_LH,
+ /* ether type for untagged frame */
+ NPC_ETYPE_ETHER,
+ /* ether type for single tagged frame */
+ NPC_ETYPE_TAG1,
+ /* ether type for double tagged frame */
+ NPC_ETYPE_TAG2,
+ /* outer vlan tci for single tagged frame */
+ NPC_VLAN_TAG1,
+ /* outer vlan tci for double tagged frame */
+ NPC_VLAN_TAG2,
+ /* other header fields programmed to extract but not of our interest */
+ NPC_UNKNOWN,
+ NPC_KEY_FIELDS_MAX,
+};
+
+/* layer meta data to uniquely identify a packet header field */
+struct npc_layer_mdata {
+ u8 lid;
+ u8 ltype;
+ u8 hdr;
+ u8 key;
+ u8 len;
+};
+
+/* Structure to represent a field present in the
+ * generated key. A key field may present anywhere and can
+ * be of any size in the generated key. Once this structure
+ * is populated for fields of interest then field's presence
+ * and location (if present) can be known.
+ */
+struct npc_key_field {
+ /* Masks where all set bits indicate position
+* of a field in the key
+*/
+ u64 kw_mask[NPC_MAX_KWS_IN_KEY];
+ /* Number of words in the key a field spans. If a field is
+* of 16 bytes and key offset is 4 then the field will use
+* 4 bytes in KW0, 8 bytes in KW1 and 4 bytes in KW2 and
+* nr_kws will be 3(KW0, KW1 and KW2).
+*/
+ int nr_kws;
+ /* used by packet header fields */
+ struct npc_layer_mdata layer_mdata;
+};
+
struct npc_mcam {
struct rsrc_bmap counters;
struct mutexlock; /* MCAM entries and counters update lock */
@@ -128,6 +190,11 @@ struct npc_mcam {
u16 hprio_count;
u16 hprio_end;
u16
[PATCH v4 1/2] dt-bindings: arm64: add compatible for LX2162A QDS Board
From: Meenakshi Aggarwal Add support for LX2162A, LX2162A is LX2160A based SoC. Signed-off-by: Meenakshi Aggarwal Acked-by: Rob Herring --- Documentation/devicetree/bindings/arm/fsl.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/arm/fsl.yaml b/Documentation/devicetree/bindings/arm/fsl.yaml index 6da9d73..5c7b7dd 100644 --- a/Documentation/devicetree/bindings/arm/fsl.yaml +++ b/Documentation/devicetree/bindings/arm/fsl.yaml @@ -518,6 +518,7 @@ properties: - enum: - fsl,lx2160a-qds - fsl,lx2160a-rdb + - fsl,lx2162a-qds - const: fsl,lx2160a - description: S32V234 based Boards -- 2.7.4
[PATCH v4 0/2] Add device tree support for LX2162AQDS board
From: Meenakshi Aggarwal LX2162A has same die as of LX2160A with different packaging. Changes: v2: - divided patch into two, binding and dts support v3: - incorporated review comments on voltage regulator node v4: - fixed check-patch warning. Meenakshi Aggarwal (2): dt-bindings: arm64: add compatible for LX2162A QDS Board arm64: dts: lx2160a: add device tree for lx2162aqds board Documentation/devicetree/bindings/arm/fsl.yaml| 1 + arch/arm64/boot/dts/freescale/Makefile| 1 + arch/arm64/boot/dts/freescale/fsl-lx2162a-qds.dts | 334 ++ 3 files changed, 336 insertions(+) create mode 100644 arch/arm64/boot/dts/freescale/fsl-lx2162a-qds.dts -- 2.7.4
[PATCH v4 2/2] arm64: dts: lx2160a: add device tree for lx2162aqds board
From: Meenakshi Aggarwal
Add device tree support for LX2162AQDS board.
LX2162A has same die as of LX2160A with different packaging.
Signed-off-by: Ioana Ciornei
Signed-off-by: Kuldeep Singh
Signed-off-by: Meenakshi Aggarwal
---
arch/arm64/boot/dts/freescale/Makefile| 1 +
arch/arm64/boot/dts/freescale/fsl-lx2162a-qds.dts | 334 ++
2 files changed, 335 insertions(+)
create mode 100644 arch/arm64/boot/dts/freescale/fsl-lx2162a-qds.dts
diff --git a/arch/arm64/boot/dts/freescale/Makefile
b/arch/arm64/boot/dts/freescale/Makefile
index 903c0eb..0edc8ab 100644
--- a/arch/arm64/boot/dts/freescale/Makefile
+++ b/arch/arm64/boot/dts/freescale/Makefile
@@ -27,6 +27,7 @@ dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-lx2160a-clearfog-cx.dtb
dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-lx2160a-honeycomb.dtb
dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-lx2160a-qds.dtb
dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-lx2160a-rdb.dtb
+dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-lx2162a-qds.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mm-beacon-kit.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mm-evk.dtb
diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2162a-qds.dts
b/arch/arm64/boot/dts/freescale/fsl-lx2162a-qds.dts
new file mode 100644
index 000..9178684
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/fsl-lx2162a-qds.dts
@@ -0,0 +1,334 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+//
+// Device Tree file for LX2162AQDS
+//
+// Copyright 2020 NXP
+
+/dts-v1/;
+
+#include "fsl-lx2160a.dtsi"
+
+/ {
+ model = "NXP Layerscape LX2162AQDS";
+ compatible = "fsl,lx2162a-qds", "fsl,lx2160a";
+
+ aliases {
+ crypto =
+ serial0 =
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ sb_3v3: regulator-sb3v3 {
+ compatible = "regulator-fixed";
+ regulator-name = "LTM4619-3.3VSB";
+ regulator-min-microvolt = <330>;
+ regulator-max-microvolt = <330>;
+ };
+
+ mdio-mux-1 {
+ compatible = "mdio-mux-multiplexer";
+ mux-controls = < 0>;
+ mdio-parent-bus = <>;
+ #address-cells=<1>;
+ #size-cells = <0>;
+
+ mdio@0 { /* On-board RTL8211F PHY #1 RGMII1 */
+ reg = <0x00>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ rgmii_phy1: ethernet-phy@1 {
+ compatible = "ethernet-phy-id001c.c916";
+ reg = <0x1>;
+ eee-broken-1000t;
+ };
+ };
+
+ mdio@8 { /* On-board RTL8211F PHY #2 RGMII2 */
+ reg = <0x8>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ rgmii_phy2: ethernet-phy@2 {
+ compatible = "ethernet-phy-id001c.c916";
+ reg = <0x2>;
+ eee-broken-1000t;
+ };
+ };
+
+ mdio@18 { /* Slot #1 */
+ reg = <0x18>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ mdio@19 { /* Slot #2 */
+ reg = <0x19>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ mdio@1a { /* Slot #3 */
+ reg = <0x1a>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ mdio@1b { /* Slot #4 */
+ reg = <0x1b>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ mdio@1c { /* Slot #5 */
+ reg = <0x1c>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ mdio@1d { /* Slot #6 */
+ reg = <0x1d>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ mdio@1e { /* Slot #7 */
+ reg = <0x1e>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ mdio@1f { /* Slot #8 */
+ reg = <0x1f>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+ };
+
+ mdio-mux-2 {
+ compatible = "mdio-mux-multiplexer";
+ mux-controls = < 1>;
+ mdio-parent-bus = <>;
+ #address-cells=<1>;
+ #size-cells = <0>;
+
+ mdio@0 { /* Slot #1 (secondary EMI) */
+ reg = <0x00>;
+
Re: [PATCH v6 5/6] dt-bindings: spi: Convert cadence-quadspi.txt to cadence-quadspi.yaml
Hi Rob,
Thank you for the review comments...
On 30/10/2020 11:18 pm, Rob Herring wrote:
On Fri, Oct 30, 2020 at 01:31:52PM +0800, Ramuthevar,Vadivel MuruganX wrote:
From: Ramuthevar Vadivel Murugan
Convert the cadence-quadspi.txt documentation to cadence-quadspi.yaml
remove the cadence-quadspi.txt from Documentation/devicetree/bindings/spi/
Signed-off-by: Ramuthevar Vadivel Murugan
---
.../devicetree/bindings/spi/cadence-quadspi.txt| 67 -
.../devicetree/bindings/spi/cadence-quadspi.yaml | 149 +
2 files changed, 149 insertions(+), 67 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/spi/cadence-quadspi.txt
create mode 100644 Documentation/devicetree/bindings/spi/cadence-quadspi.yaml
diff --git a/Documentation/devicetree/bindings/spi/cadence-quadspi.txt
b/Documentation/devicetree/bindings/spi/cadence-quadspi.txt
deleted file mode 100644
index 945be7d5b236..
--- a/Documentation/devicetree/bindings/spi/cadence-quadspi.txt
+++ /dev/null
@@ -1,67 +0,0 @@
-* Cadence Quad SPI controller
-
-Required properties:
-- compatible : should be one of the following:
- Generic default - "cdns,qspi-nor".
- For TI 66AK2G SoC - "ti,k2g-qspi", "cdns,qspi-nor".
- For TI AM654 SoC - "ti,am654-ospi", "cdns,qspi-nor".
-- reg : Contains two entries, each of which is a tuple consisting of a
- physical address and length. The first entry is the address and
- length of the controller register set. The second entry is the
- address and length of the QSPI Controller data area.
-- interrupts : Unit interrupt specifier for the controller interrupt.
-- clocks : phandle to the Quad SPI clock.
-- cdns,fifo-depth : Size of the data FIFO in words.
-- cdns,fifo-width : Bus width of the data FIFO in bytes.
-- cdns,trigger-address : 32-bit indirect AHB trigger address.
-
-Optional properties:
-- cdns,is-decoded-cs : Flag to indicate whether decoder is used or not.
-- cdns,rclk-en : Flag to indicate that QSPI return clock is used to latch
- the read data rather than the QSPI clock. Make sure that QSPI return
- clock is populated on the board before using this property.
-
-Optional subnodes:
-Subnodes of the Cadence Quad SPI controller are spi slave nodes with additional
-custom properties:
-- cdns,read-delay : Delay for read capture logic, in clock cycles
-- cdns,tshsl-ns : Delay in nanoseconds for the length that the master
- mode chip select outputs are de-asserted between
- transactions.
-- cdns,tsd2d-ns : Delay in nanoseconds between one chip select being
- de-activated and the activation of another.
-- cdns,tchsh-ns : Delay in nanoseconds between last bit of current
- transaction and deasserting the device chip select
- (qspi_n_ss_out).
-- cdns,tslch-ns : Delay in nanoseconds between setting qspi_n_ss_out low
- and first bit transfer.
-- resets : Must contain an entry for each entry in reset-names.
- See ../reset/reset.txt for details.
-- reset-names : Must include either "qspi" and/or "qspi-ocp".
-
-Example:
-
- qspi: spi@ff705000 {
- compatible = "cdns,qspi-nor";
- #address-cells = <1>;
- #size-cells = <0>;
- reg = <0xff705000 0x1000>,
- <0xffa0 0x1000>;
- interrupts = <0 151 4>;
- clocks = <_clk>;
- cdns,is-decoded-cs;
- cdns,fifo-depth = <128>;
- cdns,fifo-width = <4>;
- cdns,trigger-address = <0x>;
- resets = < QSPI_RESET>, < QSPI_OCP_RESET>;
- reset-names = "qspi", "qspi-ocp";
-
- flash0: n25q00@0 {
- ...
- cdns,read-delay = <4>;
- cdns,tshsl-ns = <50>;
- cdns,tsd2d-ns = <50>;
- cdns,tchsh-ns = <4>;
- cdns,tslch-ns = <4>;
- };
- };
diff --git a/Documentation/devicetree/bindings/spi/cadence-quadspi.yaml
b/Documentation/devicetree/bindings/spi/cadence-quadspi.yaml
new file mode 100644
index ..ec22b040d804
--- /dev/null
+++ b/Documentation/devicetree/bindings/spi/cadence-quadspi.yaml
@@ -0,0 +1,149 @@
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/spi/cadence-quadspi.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Cadence Quad SPI controller
+
+maintainers:
+ - Vadivel Murugan
+
+allOf:
+ - $ref: "spi-controller.yaml#"
+
+properties:
+ compatible:
+oneOf:
+ - items:
You don't need 'oneOf' if there is only one entry...
So you've dropped 'cdns,qspi-nor' alone being valid. Granted, the txt
file was fuzzy as to whether or not that was valid. So you have to look
at all the dts files and see. I prefer we don't allow that and
Re: [PATCH mlx5-next v1 03/11] net/mlx5_core: Clean driver version and name
On Mon, Nov 02, 2020 at 05:07:59AM +, Parav Pandit wrote:
>
>
> > From: Leon Romanovsky
> > Sent: Monday, November 2, 2020 1:46 AM
> >
> > From: Leon Romanovsky
> >
> > Remove exposed driver version as it was done in other drivers, so module
> > version will work correctly by displaying the kernel version for which it is
> > compiled.
> >
> > And move mlx5_core module name to general include, so auxiliary drivers
> > will be able to use it as a basis for a name in their device ID tables.
> >
> > Signed-off-by: Leon Romanovsky
> > ---
> > drivers/net/ethernet/mellanox/mlx5/core/devlink.c | 2 +-
> > drivers/net/ethernet/mellanox/mlx5/core/en_ethtool.c | 4 +---
> > drivers/net/ethernet/mellanox/mlx5/core/en_rep.c | 1 -
> > .../net/ethernet/mellanox/mlx5/core/ipoib/ethtool.c | 2 +-
> > drivers/net/ethernet/mellanox/mlx5/core/main.c| 11 +++
> > drivers/net/ethernet/mellanox/mlx5/core/mlx5_core.h | 3 ---
> > include/linux/mlx5/driver.h | 2 ++
> > 7 files changed, 12 insertions(+), 13 deletions(-)
> >
> > diff --git a/drivers/net/ethernet/mellanox/mlx5/core/devlink.c
> > b/drivers/net/ethernet/mellanox/mlx5/core/devlink.c
> > index a28f95df2901..1a351e2f6ace 100644
> > --- a/drivers/net/ethernet/mellanox/mlx5/core/devlink.c
> > +++ b/drivers/net/ethernet/mellanox/mlx5/core/devlink.c
> > @@ -52,7 +52,7 @@ mlx5_devlink_info_get(struct devlink *devlink, struct
> > devlink_info_req *req,
> > u32 running_fw, stored_fw;
> > int err;
> >
> > - err = devlink_info_driver_name_put(req, DRIVER_NAME);
> > + err = devlink_info_driver_name_put(req, KBUILD_MODNAME);
> > if (err)
> > return err;
> >
> > diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en_ethtool.c
> > b/drivers/net/ethernet/mellanox/mlx5/core/en_ethtool.c
> > index d25a56ec6876..bcff18a87bcd 100644
> > --- a/drivers/net/ethernet/mellanox/mlx5/core/en_ethtool.c
> > +++ b/drivers/net/ethernet/mellanox/mlx5/core/en_ethtool.c
> > @@ -40,9 +40,7 @@ void mlx5e_ethtool_get_drvinfo(struct mlx5e_priv
> > *priv, {
> > struct mlx5_core_dev *mdev = priv->mdev;
> >
> > - strlcpy(drvinfo->driver, DRIVER_NAME, sizeof(drvinfo->driver));
> > - strlcpy(drvinfo->version, DRIVER_VERSION,
> > - sizeof(drvinfo->version));
> > + strlcpy(drvinfo->driver, KBUILD_MODNAME, sizeof(drvinfo-
> > >driver));
> > snprintf(drvinfo->fw_version, sizeof(drvinfo->fw_version),
> > "%d.%d.%04d (%.16s)",
> > fw_rev_maj(mdev), fw_rev_min(mdev),
> > fw_rev_sub(mdev), diff --git
> > a/drivers/net/ethernet/mellanox/mlx5/core/en_rep.c
> > b/drivers/net/ethernet/mellanox/mlx5/core/en_rep.c
> > index 67247c33b9fd..ef2f8889ba0f 100644
> > --- a/drivers/net/ethernet/mellanox/mlx5/core/en_rep.c
> > +++ b/drivers/net/ethernet/mellanox/mlx5/core/en_rep.c
> > @@ -64,7 +64,6 @@ static void mlx5e_rep_get_drvinfo(struct net_device
> > *dev,
> >
> > strlcpy(drvinfo->driver, mlx5e_rep_driver_name,
> > sizeof(drvinfo->driver));
> > - strlcpy(drvinfo->version, UTS_RELEASE, sizeof(drvinfo->version));
> > snprintf(drvinfo->fw_version, sizeof(drvinfo->fw_version),
> > "%d.%d.%04d (%.16s)",
> > fw_rev_maj(mdev), fw_rev_min(mdev),
> > diff --git a/drivers/net/ethernet/mellanox/mlx5/core/ipoib/ethtool.c
> > b/drivers/net/ethernet/mellanox/mlx5/core/ipoib/ethtool.c
> > index cac8f085b16d..97d96fc38a65 100644
> > --- a/drivers/net/ethernet/mellanox/mlx5/core/ipoib/ethtool.c
> > +++ b/drivers/net/ethernet/mellanox/mlx5/core/ipoib/ethtool.c
> > @@ -39,7 +39,7 @@ static void mlx5i_get_drvinfo(struct net_device *dev,
> > struct mlx5e_priv *priv = mlx5i_epriv(dev);
> >
> > mlx5e_ethtool_get_drvinfo(priv, drvinfo);
> > - strlcpy(drvinfo->driver, DRIVER_NAME "[ib_ipoib]",
> > + strlcpy(drvinfo->driver, KBUILD_MODNAME "[ib_ipoib]",
> > sizeof(drvinfo->driver));
> > }
> >
> > diff --git a/drivers/net/ethernet/mellanox/mlx5/core/main.c
> > b/drivers/net/ethernet/mellanox/mlx5/core/main.c
> > index 71e210f22f69..9827127cb674 100644
> > --- a/drivers/net/ethernet/mellanox/mlx5/core/main.c
> > +++ b/drivers/net/ethernet/mellanox/mlx5/core/main.c
> > @@ -77,7 +77,6 @@
> > MODULE_AUTHOR("Eli Cohen ");
> > MODULE_DESCRIPTION("Mellanox 5th generation network adapters
> > (ConnectX series) core driver"); MODULE_LICENSE("Dual BSD/GPL"); -
> > MODULE_VERSION(DRIVER_VERSION);
> >
> > unsigned int mlx5_core_debug_mask;
> > module_param_named(debug_mask, mlx5_core_debug_mask, uint, 0644);
> > @@ -228,7 +227,7 @@ static void mlx5_set_driver_version(struct
> > mlx5_core_dev *dev)
> > strncat(string, ",", remaining_size);
> >
> > remaining_size = max_t(int, 0, driver_ver_sz - strlen(string));
> > - strncat(string, DRIVER_NAME, remaining_size);
> > + strncat(string, KBUILD_MODNAME, remaining_size);
> >
> > remaining_size = max_t(int, 0, driver_ver_sz - strlen(string));
> > strncat(string, ",",
Re: [PATCH v1 2/2] mfd: rt4505: Adds DT binding document for Richtek RT4831 MFD core
Hi,
I seems I typo the wrong comment headline, not RT4505. It's RT4831.
Please just review the contents, I'll fix it in next series patch.
cy_huang 於 2020年11月2日 週一 上午11:13寫道：
>
> From: ChiYuan Huang
>
> Adds DT binding document for Richtek RT4831 MFD core.
>
> Signed-off-by: ChiYuan Huang
> ---
> .../devicetree/bindings/mfd/richtek,rt4831.yaml| 89
> ++
> include/dt-bindings/leds/rt4831-backlight.h| 23 ++
> 2 files changed, 112 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/mfd/richtek,rt4831.yaml
> create mode 100644 include/dt-bindings/leds/rt4831-backlight.h
>
> diff --git a/Documentation/devicetree/bindings/mfd/richtek,rt4831.yaml
> b/Documentation/devicetree/bindings/mfd/richtek,rt4831.yaml
> new file mode 100644
> index ..c602d50
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/mfd/richtek,rt4831.yaml
> @@ -0,0 +1,89 @@
> +# SPDX-License-Identifier: GPL-2.0
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/mfd/richtek,rt4831.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Richtek RT4831 DSV and Backlight Integrated IC
> +
> +maintainers:
> + - ChiYuan Huang
> +
> +description: |
> + RT4831 is a mutifunctional device that can provide display panel power for
> + positive/negative voltage and also display panel wled driving.
> +
> + For the display voltage output, the range is about 4V to 6.5V. It is
> sufficient
> + to meet the current display panel design.
> +
> + For the panel backlight, it can provide four channels driving capability
> + Each driving current is up to 30mA
> +
> + Datasheet is available at
> + https://www.richtek.com/assets/product_file/RT4831A/DS4831A-05.pdf
> +
> +properties:
> + compatible:
> +const: richtek,rt4831
> +
> + reg:
> +description: I2C device address.
> +maxItems: 1
> +
> + enable-gpios:
> +description: |
> + GPIO to enable/disable the chip. It is optional.
> + Some usage directly tied this pin to follow VIO 1.8V power on sequence.
> +maxItems: 1
> +
> + regulators:
> +$ref: ../regulator/richtek,rt4831-regulator.yaml
> +
> + backlight:
> +$ref: ../leds/backlight/richtek,rt4831-backlight.yaml
> +
> +required:
> + - compatible
> + - reg
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> +#include
> +i2c {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + rt4831@11 {
> +compatible = "richtek,rt4831";
> +reg = <0x11>;
> +
> +regulators {
> + DSVLCM {
> +regulator-min-microvolt = <400>;
> +regulator-max-microvolt = <715>;
> + };
> + DSVP {
> +regulator-name = "rt4831-dsvp";
> +regulator-min-microvolt = <400>;
> +regulator-max-microvolt = <650>;
> +regulator-boot-on;
> + };
> + DSVN {
> +regulator-name = "rt4831-dsvn";
> +regulator-min-microvolt = <400>;
> +regulator-max-microvolt = <650>;
> +regulator-boot-on;
> + };
> +};
> +
> +backlight {
> + compatible = "richtek,rt4831-backlight";
> + default-brightness = <1024>;
> + max-brightness = <2048>;
> + richtek,bled-ovp-sel = /bits/ 8 ;
> + richtek,channel-use = /bits/ 8 ;
> +};
> + };
> +};
> diff --git a/include/dt-bindings/leds/rt4831-backlight.h
> b/include/dt-bindings/leds/rt4831-backlight.h
> new file mode 100644
> index ..7084906
> --- /dev/null
> +++ b/include/dt-bindings/leds/rt4831-backlight.h
> @@ -0,0 +1,23 @@
> +/*
> + * This header provides constants for rt4831 backlight bindings.
> + *
> + * This file is licensed under the terms of the GNU General Public
> + * License version 2. This program is licensed "as is" without any
> + * warranty of any kind, whether express or implied.
> + */
> +
> +#ifndef _DT_BINDINGS_RT4831_BACKLIGHT_H
> +#define _DT_BINDINGS_RT4831_BACKLIGHT_H
> +
> +#define RT4831_BLOVPLVL_17V0
> +#define RT4831_BLOVPLVL_21V1
> +#define RT4831_BLOVPLVL_25V2
> +#define RT4831_BLOVPLVL_29V3
> +
> +#define RT4831_BLED_CH1EN (1 << 0)
> +#define RT4831_BLED_CH2EN (1 << 1)
> +#define RT4831_BLED_CH3EN (1 << 2)
> +#define RT4831_BLED_CH4EN (1 << 3)
> +#define RT4831_BLED_ALLCHEN((1 << 4) - 1)
> +
> +#endif /* _DT_BINDINGS_RT4831_BACKLIGHT_H */
> --
> 2.7.4
>
Re: [PATCH v5 14/21] kprobes: Remove NMI context check
On Mon, 2 Nov 2020 14:11:38 +0900
Masami Hiramatsu wrote:
> On Fri, 30 Oct 2020 21:38:31 -0400
> Steven Rostedt wrote:
>
> > On Sat, 29 Aug 2020 22:02:36 +0900
> > Masami Hiramatsu wrote:
> >
> > > Since the commit 9b38cc704e84 ("kretprobe: Prevent triggering
> > > kretprobe from within kprobe_flush_task") sets a dummy current
> > > kprobe in the trampoline handler by kprobe_busy_begin/end(),
> > > it is not possible to run a kretprobe pre handler in kretprobe
> > > trampoline handler context even with the NMI. If the NMI interrupts
> > > a kretprobe_trampoline_handler() and it hits a kretprobe, the
> > > 2nd kretprobe will detect recursion correctly and it will be
> > > skipped.
> > > This means we have almost no double-lock issue on kretprobes by NMI.
> > >
> > > The last one point is in cleanup_rp_inst() which also takes
> > > kretprobe_table_lock without setting up current kprobes.
> > > So adding kprobe_busy_begin/end() there allows us to remove
> > > in_nmi() check.
> > >
> > > The above commit applies kprobe_busy_begin/end() on x86, but
> > > now all arch implementation are unified to generic one, we can
> > > safely remove the in_nmi() check from arch independent code.
> > >
> >
> > So are you saying that lockdep is lying?
> >
> > Kprobe smoke test: started
> >
> >
> > WARNING: inconsistent lock state
> > 5.10.0-rc1-test+ #29 Not tainted
> >
> > inconsistent {INITIAL USE} -> {IN-NMI} usage.
> > swapper/0/1 [HC1[1]:SC0[0]:HE0:SE1] takes:
> > 82b07118 (>lock){}-{2:2}, at:
> > pre_handler_kretprobe+0x4b/0x193
> > {INITIAL USE} state was registered at:
> > lock_acquire+0x280/0x325
> > _raw_spin_lock+0x30/0x3f
> > recycle_rp_inst+0x3f/0x86
> > __kretprobe_trampoline_handler+0x13a/0x177
> > trampoline_handler+0x48/0x57
> > kretprobe_trampoline+0x2a/0x4f
> > kretprobe_trampoline+0x0/0x4f
> > init_kprobes+0x193/0x19d
> > do_one_initcall+0xf9/0x27e
> > kernel_init_freeable+0x16e/0x2b6
> > kernel_init+0xe/0x109
> > ret_from_fork+0x22/0x30
> > irq event stamp: 1670
> > hardirqs last enabled at (1669): []
> > slab_free_freelist_hook+0xb4/0xfd
> > hardirqs last disabled at (1670): [] exc_int3+0xae/0x10a
> > softirqs last enabled at (1484): []
> > __do_softirq+0x352/0x38d
> > softirqs last disabled at (1471): []
> > asm_call_irq_on_stack+0x12/0x20
> >
> > other info that might help us debug this:
> > Possible unsafe locking scenario:
> >
> >CPU0
> >
> > lock(>lock);
> >
> > lock(>lock);
> >
> > *** DEADLOCK ***
> >
> > no locks held by swapper/0/1.
> >
> > stack backtrace:
> > CPU: 0 PID: 1 Comm: swapper/0 Not tainted 5.10.0-rc1-test+ #29
> > Hardware name: MSI MS-7823/CSM-H87M-G43 (MS-7823), BIOS V1.6 02/22/2014
> > Call Trace:
> > dump_stack+0x7d/0x9f
> > print_usage_bug+0x1c0/0x1d3
> > lock_acquire+0x302/0x325
> > ? pre_handler_kretprobe+0x4b/0x193
> > ? stop_machine_from_inactive_cpu+0x120/0x120
> > _raw_spin_lock_irqsave+0x43/0x58
> > ? pre_handler_kretprobe+0x4b/0x193
> > pre_handler_kretprobe+0x4b/0x193
> > ? stop_machine_from_inactive_cpu+0x120/0x120
> > ? kprobe_target+0x1/0x16
> > kprobe_int3_handler+0xd0/0x109
> > exc_int3+0xb8/0x10a
> > asm_exc_int3+0x31/0x40
> > RIP: 0010:kprobe_target+0x1/0x16
> > 5d c3 cc
> > RSP: :c9033e00 EFLAGS: 0246
> > RAX: 8110ea77 RBX: 0001 RCX: c9033cb4
> > RDX: 0231 RSI: RDI: 3ca57c35
> > RBP: c9033e20 R08: R09: 8111d207
> > R10: 8881002ab480 R11: 8881002ab480 R12:
> > R13: 82a52af0 R14: 0200 R15: 888100331130
> > ? register_kprobe+0x43c/0x492
> > ? stop_machine_from_inactive_cpu+0x120/0x120
> > ? kprobe_target+0x1/0x16
> > ? init_test_probes+0x2c6/0x38a
> > init_kprobes+0x193/0x19d
> > ? debugfs_kprobe_init+0xb8/0xb8
> > do_one_initcall+0xf9/0x27e
> > ? rcu_read_lock_sched_held+0x3e/0x75
> > ? init_mm_internals+0x27b/0x284
> > kernel_init_freeable+0x16e/0x2b6
> > ? rest_init+0x152/0x152
> > kernel_init+0xe/0x109
> > ret_from_fork+0x22/0x30
> > Kprobe smoke test: passed successfully
> >
> > Config attached.
>
> Thanks for the report! Let me check what happen.
OK, confirmed. But this is actually false-positive report.
The lockdep reports rp->lock case between pre_handler_kretprobe()
and recycle_rp_inst() from __kretprobe_trampoline_handler().
Since kretprobe_trampoline_handler() sets current_kprobe,
if other kprobes hits on same CPU, those are skipped. This means
pre_handler_kretprobe() is not called while executing
__kretprobe_trampoline_handler().
Actually, since this rp->lock is expected to be removed in the last
patch in this series ([21/21]), I left this as is, but we might better
to treat this case because the latter half of this series will be
merged in 5.11.
Hmm, are there any way to tell lockdep this is safe?
Thank
[PATCHv10] arm64: dts: layerscape: Add PCIe EP node for ls1088a
From: Xiaowei Bao
Add PCIe EP node for ls1088a to support EP mode.
Signed-off-by: Xiaowei Bao
Signed-off-by: Hou Zhiqiang
Reviewed-by: Andrew Murray
---
V10:
- Add a space between compatibles.
.../arm64/boot/dts/freescale/fsl-ls1088a.dtsi | 31 +++
1 file changed, 31 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
b/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
index ff5805206a28..8d8e610acba6 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
@@ -517,6 +517,17 @@
status = "disabled";
};
+ pcie_ep1: pcie-ep@340 {
+ compatible = "fsl,ls1088a-pcie-ep", "fsl,ls-pcie-ep";
+ reg = <0x00 0x0340 0x0 0x0010
+ 0x20 0x 0x8 0x>;
+ reg-names = "regs", "addr_space";
+ num-ib-windows = <24>;
+ num-ob-windows = <256>;
+ max-functions = /bits/ 8 <2>;
+ status = "disabled";
+ };
+
pcie2: pcie@350 {
compatible = "fsl,ls1088a-pcie";
reg = <0x00 0x0350 0x0 0x0010 /* controller
registers */
@@ -543,6 +554,16 @@
status = "disabled";
};
+ pcie_ep2: pcie-ep@350 {
+ compatible = "fsl,ls1088a-pcie-ep", "fsl,ls-pcie-ep";
+ reg = <0x00 0x0350 0x0 0x0010
+ 0x28 0x 0x8 0x>;
+ reg-names = "regs", "addr_space";
+ num-ib-windows = <6>;
+ num-ob-windows = <6>;
+ status = "disabled";
+ };
+
pcie3: pcie@360 {
compatible = "fsl,ls1088a-pcie";
reg = <0x00 0x0360 0x0 0x0010 /* controller
registers */
@@ -569,6 +590,16 @@
status = "disabled";
};
+ pcie_ep3: pcie-ep@360 {
+ compatible = "fsl,ls1088a-pcie-ep", "fsl,ls-pcie-ep";
+ reg = <0x00 0x0360 0x0 0x0010
+ 0x30 0x 0x8 0x>;
+ reg-names = "regs", "addr_space";
+ num-ib-windows = <6>;
+ num-ob-windows = <6>;
+ status = "disabled";
+ };
+
smmu: iommu@500 {
compatible = "arm,mmu-500";
reg = <0 0x500 0 0x80>;
--
2.17.1
Re: [PATCH v2 28/39] docs: ABI: fix syntax to be parsed using ReST notation
On Fri, Oct 30, 2020 at 8:41 AM Mauro Carvalho Chehab
wrote:
>
> There are a number of new changes at the ABI files that cause
> them to produce warnings when generating ABI output.
>
> Fix them.
>
> Signed-off-by: Mauro Carvalho Chehab
> ---
> .../ABI/stable/sysfs-driver-firmware-zynqmp | 62 -
> Documentation/ABI/testing/debugfs-moxtet | 28 --
> .../ABI/testing/debugfs-turris-mox-rwtm | 6 +-
> .../sysfs-bus-event_source-devices-dfl_fme| 14 +--
> Documentation/ABI/testing/sysfs-bus-most | 6 +-
> Documentation/ABI/testing/sysfs-class-devfreq | 6 +-
> Documentation/ABI/testing/sysfs-class-ocxl| 14 +--
> .../ABI/testing/sysfs-class-power-wilco | 18 ++--
> .../ABI/testing/sysfs-class-rnbd-client | 93 ++-
> .../ABI/testing/sysfs-class-rtrs-client | 23 +++--
For rnbd/rtrs, looks good to me, thanks!
Acked-by: Jack Wang
> .../sysfs-devices-platform-stratix10-rsu | 10 ++
> .../ABI/testing/sysfs-driver-w1_therm | 75 ++-
> .../ABI/testing/sysfs-platform-dfl-fme| 14 ++-
> Documentation/ABI/testing/sysfs-platform-dptf | 11 ++-
> .../sysfs-platform-intel-wmi-sbl-fw-update| 1 +
> .../testing/sysfs-platform-mellanox-bootctl | 50 ++
> .../ABI/testing/sysfs-platform-wilco-ec | 1 +
> 17 files changed, 271 insertions(+), 161 deletions(-)
>
> diff --git a/Documentation/ABI/stable/sysfs-driver-firmware-zynqmp
> b/Documentation/ABI/stable/sysfs-driver-firmware-zynqmp
> index 00fa04c76ff3..f5724bb5b462 100644
> --- a/Documentation/ABI/stable/sysfs-driver-firmware-zynqmp
> +++ b/Documentation/ABI/stable/sysfs-driver-firmware-zynqmp
> @@ -12,13 +12,15 @@ Description:
> resets. Three registers are used by the FSBL and
> other Xilinx software products: GLOBAL_GEN_STORAGE{4:6}.
>
> - Usage:
> - # cat /sys/devices/platform/firmware\:zynqmp-firmware/ggs0
> - # echo >
> /sys/devices/platform/firmware\:zynqmp-firmware/ggs0
> + Usage::
>
> - Example:
> - # cat /sys/devices/platform/firmware\:zynqmp-firmware/ggs0
> - # echo 0x1234ABCD >
> /sys/devices/platform/firmware\:zynqmp-firmware/ggs0
> + # cat /sys/devices/platform/firmware\:zynqmp-firmware/ggs0
> + # echo >
> /sys/devices/platform/firmware\:zynqmp-firmware/ggs0
> +
> + Example::
> +
> + # cat /sys/devices/platform/firmware\:zynqmp-firmware/ggs0
> + # echo 0x1234ABCD >
> /sys/devices/platform/firmware\:zynqmp-firmware/ggs0
>
> Users: Xilinx
>
> @@ -39,13 +41,15 @@ Description:
> software products: PERS_GLOB_GEN_STORAGE{4:7}.
> Register is reset only by a POR reset.
>
> - Usage:
> - # cat /sys/devices/platform/firmware\:zynqmp-firmware/pggs0
> - # echo >
> /sys/devices/platform/firmware\:zynqmp-firmware/pggs0
> + Usage::
>
> - Example:
> - # cat /sys/devices/platform/firmware\:zynqmp-firmware/pggs0
> - # echo 0x1234ABCD >
> /sys/devices/platform/firmware\:zynqmp-firmware/pggs0
> + # cat
> /sys/devices/platform/firmware\:zynqmp-firmware/pggs0
> + # echo >
> /sys/devices/platform/firmware\:zynqmp-firmware/pggs0
> +
> + Example::
> +
> + # cat
> /sys/devices/platform/firmware\:zynqmp-firmware/pggs0
> + # echo 0x1234ABCD >
> /sys/devices/platform/firmware\:zynqmp-firmware/pggs0
>
> Users: Xilinx
>
> @@ -61,23 +65,28 @@ Description:
>
> Following are available shutdown scopes(subtypes):
>
> - subsystem: Only the APU along with all of its peripherals
> + subsystem:
> + Only the APU along with all of its peripherals
> not used by other processing units will be
> shut down. This may result in the FPD power
> domain being shut down provided that no other
> processing unit uses FPD peripherals or DRAM.
> - ps_only:The complete PS will be shut down, including
> the
> + ps_only:
> + The complete PS will be shut down, including
> the
> RPU, PMU, etc. Only the PL domain (FPGA)
> remains untouched.
> - system: The complete system/device is shut down.
> + system:
> + The complete system/device is shut down.
>
> - Usage:
> - # cat
> /sys/devices/platform/firmware\:zynqmp-firmware/shutdown_scope
> - # echo >
>
RE: [PATCH] KVM: x86: emulate wait-for-SIPI and SIPI-VMExit
> -Original Message- > From: Paolo Bonzini > Sent: Tuesday, September 22, 2020 5:10 PM > To: Qi, Yadong ; k...@vger.kernel.org; linux- > ker...@vger.kernel.org; x...@kernel.org > Cc: Christopherson, Sean J ; > vkuzn...@redhat.com; wanpen...@tencent.com; jmatt...@google.com; > j...@8bytes.org; t...@linutronix.de; mi...@redhat.com; b...@alien8.de; > h...@zytor.com; liran.a...@oracle.com; nikita.leshche...@oracle.com; Gao, > Chao ; Tian, Kevin ; Chen, Luhai > ; Zhu, Bing ; Wang, Kai Z > > Subject: Re: [PATCH] KVM: x86: emulate wait-for-SIPI and SIPI-VMExit > > On 22/09/20 07:23, yadong...@intel.com wrote: > > From: Yadong Qi > > > > Background: We have a lightweight HV, it needs INIT-VMExit and > > SIPI-VMExit to wake-up APs for guests since it do not monitor the > > Local APIC. But currently virtual wait-for-SIPI(WFS) state is not > > supported in nVMX, so when running on top of KVM, the L1 HV cannot > > receive the INIT-VMExit and SIPI-VMExit which cause the L2 guest > > cannot wake up the APs. > > > > According to Intel SDM Chapter 25.2 Other Causes of VM Exits, SIPIs > > cause VM exits when a logical processor is in wait-for-SIPI state. > > > > In this patch: > > 1. introduce SIPI exit reason, > > 2. introduce wait-for-SIPI state for nVMX, > > 3. advertise wait-for-SIPI support to guest. > > > > When L1 hypervisor is not monitoring Local APIC, L0 need to emulate > > INIT-VMExit and SIPI-VMExit to L1 to emulate INIT-SIPI-SIPI for L2. L2 > > LAPIC write would be traped by L0 Hypervisor(KVM), L0 should emulate > > the INIT/SIPI vmexit to L1 hypervisor to set proper state for L2's > > vcpu state. > > > > Handle procdure: > > Source vCPU: > > L2 write LAPIC.ICR(INIT). > > L0 trap LAPIC.ICR write(INIT): inject a latched INIT event to target > >vCPU. > > Target vCPU: > > L0 emulate an INIT VMExit to L1 if is guest mode. > > L1 set guest VMCS, guest_activity_state=WAIT_SIPI, vmresume. > > L0 set vcpu.mp_state to INIT_RECEIVED if (vmcs12.guest_activity_state > >== WAIT_SIPI). > > > > Source vCPU: > > L2 write LAPIC.ICR(SIPI). > > L0 trap LAPIC.ICR write(INIT): inject a latched SIPI event to traget > >vCPU. > > Target vCPU: > > L0 emulate an SIPI VMExit to L1 if (vcpu.mp_state == INIT_RECEIVED). > > L1 set CS:IP, guest_activity_state=ACTIVE, vmresume. > > L0 resume to L2. > > L2 start-up. > > Again, this looks good but it needs testcases. > Hi, Paolo I saw you queued the testcase patch: https://patchwork.kernel.org/project/kvm/patch/20201013052845.249113-1-yadong...@intel.com/ Will you also queue this patch? Or there are some additional comments of this patch? Best Regard Yadong
[PATCH 2/2] lockdep/selftest: Add spin_nest_lock test
Add a self test case to test the behavior for the following case:
lock(A);
lock_nest_lock(C1, A);
lock(B);
lock_nest_lock(C2, A);
This is a reproducer for a problem[1] reported by Chris Wilson, and is
helpful to prevent this.
[1]:
https://lore.kernel.org/lkml/160390684819.31966.12048967113267928...@build.alporthouse.com/
Signed-off-by: Boqun Feng
Cc: Chris Wilson
---
lib/locking-selftest.c | 17 +
1 file changed, 17 insertions(+)
diff --git a/lib/locking-selftest.c b/lib/locking-selftest.c
index afa7d4bb291f..4c24ac8a456c 100644
--- a/lib/locking-selftest.c
+++ b/lib/locking-selftest.c
@@ -2009,6 +2009,19 @@ static void ww_test_spin_nest_unlocked(void)
U(A);
}
+/* This is not a deadlock, because we have X1 to serialize Y1 and Y2 */
+static void ww_test_spin_nest_lock(void)
+{
+ spin_lock(_X1);
+ spin_lock_nest_lock(_Y1, _X1);
+ spin_lock(_A);
+ spin_lock_nest_lock(_Y2, _X1);
+ spin_unlock(_A);
+ spin_unlock(_Y2);
+ spin_unlock(_Y1);
+ spin_unlock(_X1);
+}
+
static void ww_test_unneeded_slow(void)
{
WWAI();
@@ -2226,6 +2239,10 @@ static void ww_tests(void)
dotest(ww_test_spin_nest_unlocked, FAILURE, LOCKTYPE_WW);
pr_cont("\n");
+ print_testname("spinlock nest test");
+ dotest(ww_test_spin_nest_lock, SUCCESS, LOCKTYPE_WW);
+ pr_cont("\n");
+
printk(" -\n");
printk(" |block | try |context|\n");
printk(" -\n");
--
2.28.0
[PATCH 1/2] lockdep: Avoid to modify chain keys in validate_chain()
Chris Wilson reported a problem spotted by check_chain_key(): a chain
key got changed in validate_chain() because we modify the ->read in
validate_chain() to skip checks for dependency adding, and ->read is
taken into calculation for chain key since commit f611e8cf98ec
("lockdep: Take read/write status in consideration when generate
chainkey").
Fix this by avoiding to modify ->read in validate_chain() based on two
facts: a) since we now support recursive read lock detection, there is
no need to skip checks for dependency adding for recursive readers, b)
since we have a), there is only one case left (nest_lock) where we want
to skip checks in validate_chain(), we simply remove the modification
for ->read and rely on the return value of check_deadlock() to skip the
dependency adding.
Reported-by: Chris Wilson
Signed-off-by: Boqun Feng
Cc: Peter Zijlstra
---
Peter,
I managed to get a reproducer for the problem Chris reported, please see
patch #2. With this patch, that problem gets fixed.
This small patchset is based on your locking/core, patch #2 actually
relies on your "s/raw_spin/spin" changes, thanks for taking care of that
;-)
Regards,
Boqun
kernel/locking/lockdep.c | 19 +--
1 file changed, 9 insertions(+), 10 deletions(-)
diff --git a/kernel/locking/lockdep.c b/kernel/locking/lockdep.c
index 3e99dfef8408..a294326fd998 100644
--- a/kernel/locking/lockdep.c
+++ b/kernel/locking/lockdep.c
@@ -2765,7 +2765,9 @@ print_deadlock_bug(struct task_struct *curr, struct
held_lock *prev,
* (Note that this has to be done separately, because the graph cannot
* detect such classes of deadlocks.)
*
- * Returns: 0 on deadlock detected, 1 on OK, 2 on recursive read
+ * Returns: 0 on deadlock detected, 1 on OK, 2 if another lock with the same
+ * lock class is held but nest_lock is also held, i.e. we rely on the
+ * nest_lock to avoid the deadlock.
*/
static int
check_deadlock(struct task_struct *curr, struct held_lock *next)
@@ -2788,7 +2790,7 @@ check_deadlock(struct task_struct *curr, struct held_lock
*next)
* lock class (i.e. read_lock(lock)+read_lock(lock)):
*/
if ((next->read == 2) && prev->read)
- return 2;
+ continue;
/*
* We're holding the nest_lock, which serializes this lock's
@@ -3592,16 +3594,13 @@ static int validate_chain(struct task_struct *curr,
if (!ret)
return 0;
- /*
-* Mark recursive read, as we jump over it when
-* building dependencies (just like we jump over
-* trylock entries):
-*/
- if (ret == 2)
- hlock->read = 2;
/*
* Add dependency only if this lock is not the head
-* of the chain, and if it's not a secondary read-lock:
+* of the chain, and if the new lock introduces no more
+* lock dependency (because we already hold a lock with the
+* same lock class) nor deadlock (because the nest_lock
+* serializes nesting locks), see the comments for
+* check_deadlock().
*/
if (!chain_head && ret != 2) {
if (!check_prevs_add(curr, hlock))
--
2.28.0
Re: [PATCH v4 1/3] dt-bindings: memory: mediatek: Convert SMI to DT
On Sat, 2020-10-31 at 12:36 +0100, Krzysztof Kozlowski wrote:
> On Fri, Oct 30, 2020 at 05:12:52PM +0800, Yong Wu wrote:
> > Convert MediaTek SMI to DT schema.
> >
> > CC: Fabien Parent
> > CC: Ming-Fan Chen
> > CC: Matthias Brugger
> > Signed-off-by: Yong Wu
> > ---
> > .../mediatek,smi-common.txt | 50 ---
> > .../mediatek,smi-common.yaml | 140 ++
> > .../memory-controllers/mediatek,smi-larb.txt | 50 ---
> > .../memory-controllers/mediatek,smi-larb.yaml | 129
> > 4 files changed, 269 insertions(+), 100 deletions(-)
> > delete mode 100644
> > Documentation/devicetree/bindings/memory-controllers/mediatek,smi-common.txt
>
> +Cc Honghui Zhang,
As comment [1], Honghui's address is not valid now. I will act for him.
>
> Your Ack is needed as you contributed descriptions to the bindings and
> work is being relicensed to GPL-2.0-only OR BSD-2-Clause.
"GPL-2.0-only OR BSD-2-Clause" is required when we run check-patch.
If I still use "GPL-2.0-only", then the contributors' Ack/SoB is not
needed, right?
[1]
https://lore.kernel.org/linux-iommu/1604051256.26323.100.camel@mhfsdcap03/T/#u
>
>
> Best regards,
> Krzysztof
>
>
>
>
> > create mode 100644
> > Documentation/devicetree/bindings/memory-controllers/mediatek,smi-common.yaml
> > delete mode 100644
> > Documentation/devicetree/bindings/memory-controllers/mediatek,smi-larb.txt
> > create mode 100644
> > Documentation/devicetree/bindings/memory-controllers/mediatek,smi-larb.yaml
> >
> > diff --git
> > a/Documentation/devicetree/bindings/memory-controllers/mediatek,smi-common.txt
> >
> > b/Documentation/devicetree/bindings/memory-controllers/mediatek,smi-common.txt
> > deleted file mode 100644
> > index dbafffe3f41e..
> > ---
> > a/Documentation/devicetree/bindings/memory-controllers/mediatek,smi-common.txt
> > +++ /dev/null
> > @@ -1,50 +0,0 @@
> > -SMI (Smart Multimedia Interface) Common
> > -
> > -The hardware block diagram please check bindings/iommu/mediatek,iommu.txt
> > -
> > -Mediatek SMI have two generations of HW architecture, here is the list
> > -which generation the SoCs use:
> > -generation 1: mt2701 and mt7623.
> > -generation 2: mt2712, mt6779, mt8167, mt8173 and mt8183.
> > -
> > -There's slight differences between the two SMI, for generation 2, the
> > -register which control the iommu port is at each larb's register base. But
> > -for generation 1, the register is at smi ao base(smi always on register
> > -base). Besides that, the smi async clock should be prepared and enabled for
> > -SMI generation 1 to transform the smi clock into emi clock domain, but
> > that is
> > -not needed for SMI generation 2.
> > -
> > -Required properties:
> > -- compatible : must be one of :
> > - "mediatek,mt2701-smi-common"
> > - "mediatek,mt2712-smi-common"
> > - "mediatek,mt6779-smi-common"
> > - "mediatek,mt7623-smi-common", "mediatek,mt2701-smi-common"
> > - "mediatek,mt8167-smi-common"
> > - "mediatek,mt8173-smi-common"
> > - "mediatek,mt8183-smi-common"
> > -- reg : the register and size of the SMI block.
> > -- power-domains : a phandle to the power domain of this local arbiter.
> > -- clocks : Must contain an entry for each entry in clock-names.
> > -- clock-names : must contain 3 entries for generation 1 smi HW and 2
> > entries
> > - for generation 2 smi HW as follows:
> > - - "apb" : Advanced Peripheral Bus clock, It's the clock for setting
> > - the register.
> > - - "smi" : It's the clock for transfer data and command.
> > - They may be the same if both source clocks are the same.
> > - - "async" : asynchronous clock, it help transform the smi clock into the
> > emi
> > - clock domain, this clock is only needed by generation 1 smi HW.
> > - and these 2 option clocks for generation 2 smi HW:
> > - - "gals0": the path0 clock of GALS(Global Async Local Sync).
> > - - "gals1": the path1 clock of GALS(Global Async Local Sync).
> > - Here is the list which has this GALS: mt6779 and mt8183.
> > -
> > -Example:
> > - smi_common: smi@14022000 {
> > - compatible = "mediatek,mt8173-smi-common";
> > - reg = <0 0x14022000 0 0x1000>;
> > - power-domains = < MT8173_POWER_DOMAIN_MM>;
> > - clocks = < CLK_MM_SMI_COMMON>,
> > -< CLK_MM_SMI_COMMON>;
> > - clock-names = "apb", "smi";
> > - };
> > diff --git
> > a/Documentation/devicetree/bindings/memory-controllers/mediatek,smi-common.yaml
> >
> > b/Documentation/devicetree/bindings/memory-controllers/mediatek,smi-common.yaml
> > new file mode 100644
> > index ..e050a0c2aed6
> > --- /dev/null
> > +++
> > b/Documentation/devicetree/bindings/memory-controllers/mediatek,smi-common.yaml
> > @@ -0,0 +1,140 @@
> > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> > +# Copyright (c) 2020 MediaTek Inc.
> > +%YAML 1.2
> > +---
> > +$id:
> >
Re: [PATCH v3 1/3] efi: generalize efi_get_secureboot
Hi Ard,
Thanks for your time and reviewing.
On Fri, Oct 30, 2020 at 12:51:10PM +0100, Ard Biesheuvel wrote:
> Hello Chester,
>
> Thanks again for looking into this.
>
> On Fri, 30 Oct 2020 at 07:09, Chester Lin wrote:
> >
> > Generalize the efi_get_secureboot() function so not only efistub but also
> > other subsystems can use it.
> >
> > Signed-off-by: Chester Lin
> > ---
> > drivers/firmware/efi/libstub/Makefile | 2 +-
> > drivers/firmware/efi/libstub/efi-stub.c | 2 +-
> > drivers/firmware/efi/libstub/efistub.h| 22 ---
> > drivers/firmware/efi/libstub/secureboot.c | 76 ---
> > drivers/firmware/efi/libstub/x86-stub.c | 2 +-
> > include/linux/efi.h | 41 +++-
> > 6 files changed, 57 insertions(+), 88 deletions(-)
> > delete mode 100644 drivers/firmware/efi/libstub/secureboot.c
> >
> > diff --git a/drivers/firmware/efi/libstub/Makefile
> > b/drivers/firmware/efi/libstub/Makefile
> > index 8a94388e38b3..88e47b0ca09d 100644
> > --- a/drivers/firmware/efi/libstub/Makefile
> > +++ b/drivers/firmware/efi/libstub/Makefile
> > @@ -49,7 +49,7 @@ OBJECT_FILES_NON_STANDARD := y
> > # Prevents link failures: __sanitizer_cov_trace_pc() is not linked in.
> > KCOV_INSTRUMENT:= n
> >
> > -lib-y := efi-stub-helper.o gop.o secureboot.o
> > tpm.o \
> > +lib-y := efi-stub-helper.o gop.o tpm.o \
> >file.o mem.o random.o randomalloc.o
> > pci.o \
> >skip_spaces.o lib-cmdline.o lib-ctype.o \
> >alignedmem.o relocate.o vsprintf.o
> > diff --git a/drivers/firmware/efi/libstub/efi-stub.c
> > b/drivers/firmware/efi/libstub/efi-stub.c
> > index 914a343c7785..ad96f1d786a9 100644
> > --- a/drivers/firmware/efi/libstub/efi-stub.c
> > +++ b/drivers/firmware/efi/libstub/efi-stub.c
> > @@ -196,7 +196,7 @@ efi_status_t __efiapi efi_pe_entry(efi_handle_t handle,
> > /* Ask the firmware to clear memory on unclean shutdown */
> > efi_enable_reset_attack_mitigation();
> >
> > - secure_boot = efi_get_secureboot();
> > + secure_boot = efi_get_secureboot(get_efi_var);
> >
> > /*
> > * Unauthenticated device tree data is a security hazard, so ignore
> > diff --git a/drivers/firmware/efi/libstub/efistub.h
> > b/drivers/firmware/efi/libstub/efistub.h
> > index 2d7abcd99de9..b1833b51e6d6 100644
> > --- a/drivers/firmware/efi/libstub/efistub.h
> > +++ b/drivers/firmware/efi/libstub/efistub.h
> > @@ -91,14 +91,6 @@ efi_status_t __efiapi efi_pe_entry(efi_handle_t handle,
> > fdt_setprop((fdt), (node_offset), (name), &(var), sizeof(var))
> > #endif
> >
> > -#define get_efi_var(name, vendor, ...) \
> > - efi_rt_call(get_variable, (efi_char16_t *)(name), \
> > - (efi_guid_t *)(vendor), __VA_ARGS__)
> > -
> > -#define set_efi_var(name, vendor, ...) \
> > - efi_rt_call(set_variable, (efi_char16_t *)(name), \
> > - (efi_guid_t *)(vendor), __VA_ARGS__)
> > -
> > #define efi_get_handle_at(array, idx) \
> > (efi_is_native() ? (array)[idx] \
> > : (efi_handle_t)(unsigned long)((u32 *)(array))[idx])
> > @@ -112,6 +104,20 @@ efi_status_t __efiapi efi_pe_entry(efi_handle_t handle,
> > ((handle = efi_get_handle_at((array), i)) || true); \
> > i++)
> >
> > +static inline
> > +efi_status_t get_efi_var(efi_char16_t *name, efi_guid_t *vendor, u32 *attr,
> > +unsigned long *size, void *data)
> > +{
> > + return efi_rt_call(get_variable, name, vendor, attr, size, data);
> > +}
> > +
> > +static inline
> > +efi_status_t set_efi_var(efi_char16_t *name, efi_guid_t *vendor, u32 attr,
> > +unsigned long size, void *data)
> > +{
> > + return efi_rt_call(set_variable, name, vendor, attr, size, data);
> > +}
> > +
> > static inline
> > void efi_set_u64_split(u64 data, u32 *lo, u32 *hi)
> > {
> > diff --git a/drivers/firmware/efi/libstub/secureboot.c
> > b/drivers/firmware/efi/libstub/secureboot.c
> > deleted file mode 100644
> > index 5efc524b14be..
> > --- a/drivers/firmware/efi/libstub/secureboot.c
> > +++ /dev/null
>
> Please keep this file (see below)
>
> > @@ -1,76 +0,0 @@
> > -// SPDX-License-Identifier: GPL-2.0
> > -/*
> > - * Secure boot handling.
> > - *
> > - * Copyright (C) 2013,2014 Linaro Limited
> > - * Roy Franz > - * Copyright (C) 2013 Red Hat, Inc.
> > - * Mark Salter
> > - */
> > -#include
> > -#include
> > -
> > -#include "efistub.h"
> > -
> > -/* BIOS variables */
> > -static const efi_guid_t efi_variable_guid = EFI_GLOBAL_VARIABLE_GUID;
> > -static const efi_char16_t efi_SecureBoot_name[] = L"SecureBoot";
> > -static const
