Re: [RFC PATCHv3 3/6] clk: Add TI-Nspire clock drivers
On 16/05/2013, at 12:07 AM, Arnd Bergmann wrote: > You are missing a binding in Documentation/devicetree, same as for some of > the other drivers in this series. Should we be adding a vendor prefix to it too? If so, we're not sure whether to use "ti," or not since this isn't an official port by TI. > It seems strange to assign the clk_name variable to node->name > first and then overriding it with the clock-output-names property. > Is that intentional? If so, please explain it in a comment. > I copied that bit of boilerplate from drivers/clk/clk-fixed-rate.c but I'm guessing it's to use the node name as the clock name unless there is a property called "clock-output-names" Cheers, Daniel Tang-- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Re: [RFC PATCHv3 3/6] clk: Add TI-Nspire clock drivers
On 16/05/2013, at 12:07 AM, Arnd Bergmann a...@arndb.de wrote: You are missing a binding in Documentation/devicetree, same as for some of the other drivers in this series. Should we be adding a vendor prefix to it too? If so, we're not sure whether to use ti, or not since this isn't an official port by TI. It seems strange to assign the clk_name variable to node-name first and then overriding it with the clock-output-names property. Is that intentional? If so, please explain it in a comment. I copied that bit of boilerplate from drivers/clk/clk-fixed-rate.c but I'm guessing it's to use the node name as the clock name unless there is a property called clock-output-names Cheers, Daniel Tang-- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Re: [RFC PATCHv3 4/6] clocksource: Add TI-Nspire timer drivers
On 14/05/2013, at 6:03 PM, Linus Walleij wrote:
>> +
>> + timer->interrupt_regs = of_iomap(node, 1);
>
> Check for errors.
>
>> + timer->irqnr = irq_of_parse_and_map(node, 0);
>
> Check for errors.
>> + if (timer->interrupt_regs && timer->irqnr) {
>>
The idea with this is to make these properties optional. Each timer has two
sub-timers but only one can generate interrupts. One will be added as a
clockevent device and the other as a clocksource. If an IRQ number or interrupt
acknowledge address is not passed through the DT, then the clockevents device
is not added but the clocksource still is.
Should I comment it in the code to make it apparent what's happening or is
there a better way to express this?
>
>> + writel(0x3F, timer->interrupt_regs + IO_INTR_ACK);
>
> Hm magic number, I guess it's clearing all IRQ lines…
It's a bitmask of bits 0-5.
>
>> +
>> + /* Interrupt to occur when timer value matches 0 */
>> + writel(0, timer->base + IO_MATCH1);
>> +
>> + timer->clkevt_irq.name = timer->clockevent_name;
>> + timer->clkevt_irq.handler = nspire_timer_interrupt;
>> + timer->clkevt_irq.dev_id = timer;
>> + timer->clkevt_irq.flags =
>> + IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL;
>> +
>> + setup_irq(timer->irqnr, >clkevt_irq);
>> +
>> + clockevents_config_and_register(>clkevt,
>> + clk_get_rate(timer->clk), 0x0001, 0xfffe);
>> + pr_info("Added %s as clockevent\n", timer->clockevent_name);
>> + }
>> +
>> + writel(CNTL_RUN_TIMER | CNTL_FOREVER | CNTL_INC,
>> + timer->timer2 + IO_CONTROL);
>> +
>> + clocksource_mmio_init(timer->timer2 + IO_CURRENT_VAL,
>> + timer->clocksource_name,
>> + clk_get_rate(timer->clk),
>> + 200, 16,
>> + clocksource_mmio_readw_up);
>
> If this timer is really just 16 bits, it's a *pretty* good idea to use
> the prescaler (I guess this is what IO_DIVIDER is) beacuse else you
> will get short sleep times with CONFIG_NO_HZ_IDLE on this system,
> and wake up unnecessarily often.
>
> The same goes for the clock event.
The clock frequency is 32768Hz. Should I be scaling it down at that frequency?
>
> See how we calculate the prescaler in arch/arm/mach-integrator/integrator_ap.c
> for example.
>
> Yours,
> Linus Walleij
Cheers,
Daniel Tang--
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Re: [RFC PATCHv3 4/6] clocksource: Add TI-Nspire timer drivers
On 14/05/2013, at 6:03 PM, Linus Walleij linus.wall...@linaro.org wrote:
+
+ timer-interrupt_regs = of_iomap(node, 1);
Check for errors.
+ timer-irqnr = irq_of_parse_and_map(node, 0);
Check for errors.
+ if (timer-interrupt_regs timer-irqnr) {
The idea with this is to make these properties optional. Each timer has two
sub-timers but only one can generate interrupts. One will be added as a
clockevent device and the other as a clocksource. If an IRQ number or interrupt
acknowledge address is not passed through the DT, then the clockevents device
is not added but the clocksource still is.
Should I comment it in the code to make it apparent what's happening or is
there a better way to express this?
+ writel(0x3F, timer-interrupt_regs + IO_INTR_ACK);
Hm magic number, I guess it's clearing all IRQ lines…
It's a bitmask of bits 0-5.
+
+ /* Interrupt to occur when timer value matches 0 */
+ writel(0, timer-base + IO_MATCH1);
+
+ timer-clkevt_irq.name = timer-clockevent_name;
+ timer-clkevt_irq.handler = nspire_timer_interrupt;
+ timer-clkevt_irq.dev_id = timer;
+ timer-clkevt_irq.flags =
+ IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL;
+
+ setup_irq(timer-irqnr, timer-clkevt_irq);
+
+ clockevents_config_and_register(timer-clkevt,
+ clk_get_rate(timer-clk), 0x0001, 0xfffe);
+ pr_info(Added %s as clockevent\n, timer-clockevent_name);
+ }
+
+ writel(CNTL_RUN_TIMER | CNTL_FOREVER | CNTL_INC,
+ timer-timer2 + IO_CONTROL);
+
+ clocksource_mmio_init(timer-timer2 + IO_CURRENT_VAL,
+ timer-clocksource_name,
+ clk_get_rate(timer-clk),
+ 200, 16,
+ clocksource_mmio_readw_up);
If this timer is really just 16 bits, it's a *pretty* good idea to use
the prescaler (I guess this is what IO_DIVIDER is) beacuse else you
will get short sleep times with CONFIG_NO_HZ_IDLE on this system,
and wake up unnecessarily often.
The same goes for the clock event.
The clock frequency is 32768Hz. Should I be scaling it down at that frequency?
See how we calculate the prescaler in arch/arm/mach-integrator/integrator_ap.c
for example.
Yours,
Linus Walleij
Cheers,
Daniel Tang--
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Re: [RFC PATCHv3 1/6] arm: Initial TI-Nspire support
On 12/05/2013, at 7:06 PM, Russell King - ARM Linux
wrote:
> On Sun, May 12, 2013 at 02:22:56PM +1000, Daniel Tang wrote:
>>
>> +.bpp= 8,
>> +.grayscale = 1
>> +};
>
> Still no capabilities in the above - how does the CLCD controller know
> which of BGR or RGB output and which format these panels support?
>
> Each entry needs a .caps = CLCD_CAP_xxx | CLCD_CAP_xxx listing the
> formats supported there.
>
> Unless panels and the board have a .caps entry, the caps system won't
> be used.
Fair enough.
>
>> +static struct clcd_board nspire_clcd_data = {
>> + .name = "LCD",
>> + .caps = CLCD_CAP_ALL,
>
> Your board has logic to support the RGB444/BGR444 mode? If not, setting
> CLCD_CAP_ALL is incorrect.
I believe the grayscale panel supports the xGx444 modes - unsure about the
colour one. Since I'm using the same struct clcd_board for both panels, I
thought I'd just set caps to work with both to simplify.
Should I set board caps to panel caps on setup?
Cheers,--
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Re: [RFC PATCHv3 1/6] arm: Initial TI-Nspire support
On 12/05/2013, at 7:06 PM, Russell King - ARM Linux li...@arm.linux.org.uk
wrote:
On Sun, May 12, 2013 at 02:22:56PM +1000, Daniel Tang wrote:
+.bpp= 8,
+.grayscale = 1
+};
Still no capabilities in the above - how does the CLCD controller know
which of BGR or RGB output and which format these panels support?
Each entry needs a .caps = CLCD_CAP_xxx | CLCD_CAP_xxx listing the
formats supported there.
Unless panels and the board have a .caps entry, the caps system won't
be used.
Fair enough.
+static struct clcd_board nspire_clcd_data = {
+ .name = LCD,
+ .caps = CLCD_CAP_ALL,
Your board has logic to support the RGB444/BGR444 mode? If not, setting
CLCD_CAP_ALL is incorrect.
I believe the grayscale panel supports the xGx444 modes - unsure about the
colour one. Since I'm using the same struct clcd_board for both panels, I
thought I'd just set caps to work with both to simplify.
Should I set board caps to panel caps on setup?
Cheers,--
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the body of a message to majord...@vger.kernel.org
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[RFC PATCHv3 1/6] arm: Initial TI-Nspire support
Signed-off-by: Daniel Tang --- arch/arm/Kconfig | 2 + arch/arm/Kconfig.debug | 16 + arch/arm/Makefile | 1 + arch/arm/include/debug/nspire.S| 28 + arch/arm/mach-nspire/Kconfig | 15 + arch/arm/mach-nspire/Makefile | 2 + arch/arm/mach-nspire/Makefile.boot | 0 arch/arm/mach-nspire/clcd.c| 117 + arch/arm/mach-nspire/clcd.h| 14 + arch/arm/mach-nspire/mmio.h| 18 ++ arch/arm/mach-nspire/nspire.c | 99 +++ 11 files changed, 312 insertions(+) create mode 100644 arch/arm/include/debug/nspire.S create mode 100644 arch/arm/mach-nspire/Kconfig create mode 100644 arch/arm/mach-nspire/Makefile create mode 100644 arch/arm/mach-nspire/Makefile.boot create mode 100644 arch/arm/mach-nspire/clcd.c create mode 100644 arch/arm/mach-nspire/clcd.h create mode 100644 arch/arm/mach-nspire/mmio.h create mode 100644 arch/arm/mach-nspire/nspire.c diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index d423d58..b8cb225 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -963,6 +963,8 @@ source "arch/arm/mach-netx/Kconfig" source "arch/arm/mach-nomadik/Kconfig" +source "arch/arm/mach-nspire/Kconfig" + source "arch/arm/plat-omap/Kconfig" source "arch/arm/mach-omap1/Kconfig" diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug index 1d41908..fe07941 100644 --- a/arch/arm/Kconfig.debug +++ b/arch/arm/Kconfig.debug @@ -309,6 +309,20 @@ choice Say Y here if you want kernel low-level debugging support on MVEBU based platforms. + config DEBUG_NSPIRE_CLASSIC_UART + bool "Kernel low-level debugging via TI-NSPIRE 8250 UART" + depends on ARCH_NSPIRE + help + Say Y here if you want kernel low-level debugging support + on TI-NSPIRE classic models. + + config DEBUG_NSPIRE_CX_UART + bool "Kernel low-level debugging via TI-NSPIRE PL011 UART" + depends on ARCH_NSPIRE + help + Say Y here if you want kernel low-level debugging support + on TI-NSPIRE CX models. + config DEBUG_NOMADIK_UART bool "Kernel low-level debugging messages via NOMADIK UART" depends on ARCH_NOMADIK @@ -633,6 +647,8 @@ config DEBUG_LL_INCLUDE DEBUG_IMX53_UART ||\ DEBUG_IMX6Q_UART default "debug/mvebu.S" if DEBUG_MVEBU_UART + default "debug/nspire.S" if DEBUG_NSPIRE_CX_UART || \ + DEBUG_NSPIRE_CLASSIC_UART default "debug/mxs.S" if DEBUG_IMX23_UART || DEBUG_IMX28_UART default "debug/nomadik.S" if DEBUG_NOMADIK_UART default "debug/omap2plus.S" if DEBUG_OMAP2PLUS_UART diff --git a/arch/arm/Makefile b/arch/arm/Makefile index 4737408..a4340d1 100644 --- a/arch/arm/Makefile +++ b/arch/arm/Makefile @@ -164,6 +164,7 @@ machine-$(CONFIG_ARCH_MXS) += mxs machine-$(CONFIG_ARCH_MVEBU) += mvebu machine-$(CONFIG_ARCH_NETX)+= netx machine-$(CONFIG_ARCH_NOMADIK) += nomadik +machine-$(CONFIG_ARCH_NSPIRE) += nspire machine-$(CONFIG_ARCH_OMAP1) += omap1 machine-$(CONFIG_ARCH_OMAP2PLUS) += omap2 machine-$(CONFIG_ARCH_ORION5X) += orion5x diff --git a/arch/arm/include/debug/nspire.S b/arch/arm/include/debug/nspire.S new file mode 100644 index 000..886fd27 --- /dev/null +++ b/arch/arm/include/debug/nspire.S @@ -0,0 +1,28 @@ +/* + * linux/arch/arm/include/debug/nspire.S + * + * Copyright (C) 2013 Daniel Tang + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2, as + * published by the Free Software Foundation. + * + */ + +#define NSPIRE_EARLY_UART_PHYS_BASE 0x9002 +#define NSPIRE_EARLY_UART_VIRT_BASE 0xfee2 + +.macro addruart, rp, rv, tmp + ldr \rp, =(NSPIRE_EARLY_UART_PHYS_BASE) @ physical base address + ldr \rv, =(NSPIRE_EARLY_UART_VIRT_BASE) @ virtual base address +.endm + + +#ifdef CONFIG_DEBUG_NSPIRE_CX_UART +#include +#endif + +#ifdef CONFIG_DEBUG_NSPIRE_CLASSIC_UART +#define UART_SHIFT 2 +#include +#endif diff --git a/arch/arm/mach-nspire/Kconfig b/arch/arm/mach-nspire/Kconfig new file mode 100644 index 000..a295b18 --- /dev/null +++ b/arch/arm/mach-nspire/Kconfig @@ -0,0 +1,15 @@ +config ARCH_NSPIRE + bool "TI-NSPIRE based" + depends on ARCH_MULTI_V4_V5 + depends on MMU + select CPU_ARM926T + select COMMON_CLK + select GENERIC_CLOCKEVENTS + select SPARSE_IRQ + select ARM_A
[RFC PATCHv3 3/6] clk: Add TI-Nspire clock drivers
Signed-off-by: Daniel Tang
---
drivers/clk/Makefile | 1 +
drivers/clk/clk-nspire.c | 141 +++
2 files changed, 142 insertions(+)
create mode 100644 drivers/clk/clk-nspire.c
diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile
index 137d3e7..72ebbe1 100644
--- a/drivers/clk/Makefile
+++ b/drivers/clk/Makefile
@@ -13,6 +13,7 @@ obj-$(CONFIG_COMMON_CLK) += clk-composite.o
obj-$(CONFIG_ARCH_BCM2835) += clk-bcm2835.o
obj-$(CONFIG_ARCH_NOMADIK) += clk-nomadik.o
obj-$(CONFIG_ARCH_HIGHBANK)+= clk-highbank.o
+obj-$(CONFIG_ARCH_NSPIRE) += clk-nspire.o
obj-$(CONFIG_ARCH_MXS) += mxs/
obj-$(CONFIG_ARCH_SOCFPGA) += socfpga/
obj-$(CONFIG_PLAT_SPEAR) += spear/
diff --git a/drivers/clk/clk-nspire.c b/drivers/clk/clk-nspire.c
new file mode 100644
index 000..2a8d14c
--- /dev/null
+++ b/drivers/clk/clk-nspire.c
@@ -0,0 +1,141 @@
+/*
+ * linux/drivers/clk/clk-nspire.c
+ *
+ * Copyright (C) 2013 Daniel Tang
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2, as
+ * published by the Free Software Foundation.
+ *
+ */
+
+#include
+#include
+#include
+#include
+#include
+
+#define MHZ (1000 * 1000)
+
+#define BASE_CPU_SHIFT 1
+#define BASE_CPU_MASK 0x7F
+
+#define CPU_AHB_SHIFT 12
+#define CPU_AHB_MASK 0x07
+
+#define FIXED_BASE_SHIFT 8
+#define FIXED_BASE_MASK0x01
+
+#define CLASSIC_BASE_SHIFT 16
+#define CLASSIC_BASE_MASK 0x1F
+
+#define CX_BASE_SHIFT 15
+#define CX_BASE_MASK 0x3F
+
+#define CX_UNKNOWN_SHIFT 21
+#define CX_UNKNOWN_MASK0x03
+
+#define EXTRACT(var, prop) (((var)>>prop##_SHIFT) & prop##_MASK)
+
+struct nspire_clk_info {
+ u32 base_clock;
+ u16 base_cpu_ratio;
+ u16 base_ahb_ratio;
+};
+
+static int nspire_clk_read(struct device_node *node,
+ struct nspire_clk_info *clk)
+{
+ u32 val;
+ int ret;
+ void __iomem *io;
+ const char *type = NULL;
+
+ ret = of_property_read_string(node, "io-type", );
+ if (ret)
+ return ret;
+
+ io = of_iomap(node, 0);
+ if (!io)
+ return -ENOMEM;
+ val = readl(io);
+ iounmap(io);
+
+ if (!strcmp(type, "cx")) {
+ if (EXTRACT(val, FIXED_BASE)) {
+ clk->base_clock = 48 * MHZ;
+ } else {
+ clk->base_clock = 6 * EXTRACT(val, CX_BASE) * MHZ;
+ }
+
+ clk->base_cpu_ratio = EXTRACT(val, BASE_CPU) *
+ EXTRACT(val, CX_UNKNOWN);
+ clk->base_ahb_ratio = clk->base_cpu_ratio *
+ (EXTRACT(val, CPU_AHB) + 1);
+ } else if (!strcmp(type, "classic")) {
+ if (EXTRACT(val, FIXED_BASE)) {
+ clk->base_clock = 27 * MHZ;
+ } else {
+ clk->base_clock = (300 -
+ 6 * EXTRACT(val, CLASSIC_BASE)) * MHZ;
+ }
+
+ clk->base_cpu_ratio = EXTRACT(val, BASE_CPU) * 2;
+ clk->base_ahb_ratio = clk->base_cpu_ratio *
+ (EXTRACT(val, CPU_AHB) + 1);
+ } else {
+ return -EINVAL;
+ }
+
+ return 0;
+}
+
+static void __init nspire_ahbdiv_setup(struct device_node *node)
+{
+ int ret;
+ struct clk *clk;
+ const char *clk_name = node->name;
+ const char *parent_name;
+ struct nspire_clk_info info;
+
+ ret = nspire_clk_read(node, );
+ if (WARN_ON(ret))
+ return;
+
+ of_property_read_string(node, "clock-output-names", _name);
+ parent_name = of_clk_get_parent_name(node, 0);
+
+ clk = clk_register_fixed_factor(NULL, clk_name, parent_name, 0,
+ 1, info.base_ahb_ratio);
+ if (!IS_ERR(clk))
+ of_clk_add_provider(node, of_clk_src_simple_get, clk);
+}
+
+static void __init nspire_clk_setup(struct device_node *node)
+{
+ int ret;
+ struct clk *clk;
+ const char *clk_name = node->name;
+ struct nspire_clk_info info;
+
+ ret = nspire_clk_read(node, );
+ if (WARN_ON(ret))
+ return;
+
+ of_property_read_string(node, "clock-output-names", _name);
+
+ clk = clk_register_fixed_rate(NULL, clk_name, NULL, CLK_IS_ROOT,
+ info.base_clock);
+ if (!IS_ERR(clk))
+ of_clk_add_provider(node, of_clk_src_simple_get, clk);
+ else
+ return;
+
+ pr_info("TI-NSPIRE Base: %uMHz CPU: %uMHz AHB: %uMHz\n",
+ info.base_clock / MHZ,
+
[RFC PATCHv3 5/6] input: Add TI-Nspire keypad driver
Signed-off-by: Daniel Tang
---
drivers/input/keyboard/Kconfig | 10 ++
drivers/input/keyboard/Makefile| 1 +
drivers/input/keyboard/nspire-keypad.c | 315 +
3 files changed, 326 insertions(+)
create mode 100644 drivers/input/keyboard/nspire-keypad.c
diff --git a/drivers/input/keyboard/Kconfig b/drivers/input/keyboard/Kconfig
index 62a2c0e..bdbda87 100644
--- a/drivers/input/keyboard/Kconfig
+++ b/drivers/input/keyboard/Kconfig
@@ -418,6 +418,16 @@ config KEYBOARD_NOMADIK
To compile this driver as a module, choose M here: the
module will be called nmk-ske-keypad.
+config KEYBOARD_NSPIRE
+ tristate "TI-NSPIRE builtin keyboard"
+ depends on ARCH_NSPIRE
+ select INPUT_MATRIXKMAP
+ help
+ Say Y here if you want to use the builtin keypad on the TI-NSPIRE.
+
+ To compile this driver as a module, choose M here: the
+ module will be called nspire-keypad.
+
config KEYBOARD_TEGRA
tristate "NVIDIA Tegra internal matrix keyboard controller support"
depends on ARCH_TEGRA && OF
diff --git a/drivers/input/keyboard/Makefile b/drivers/input/keyboard/Makefile
index 0c43e8c..a699b61 100644
--- a/drivers/input/keyboard/Makefile
+++ b/drivers/input/keyboard/Makefile
@@ -36,6 +36,7 @@ obj-$(CONFIG_KEYBOARD_MCS)+= mcs_touchkey.o
obj-$(CONFIG_KEYBOARD_MPR121) += mpr121_touchkey.o
obj-$(CONFIG_KEYBOARD_NEWTON) += newtonkbd.o
obj-$(CONFIG_KEYBOARD_NOMADIK) += nomadik-ske-keypad.o
+obj-$(CONFIG_KEYBOARD_NSPIRE) += nspire-keypad.o
obj-$(CONFIG_KEYBOARD_OMAP)+= omap-keypad.o
obj-$(CONFIG_KEYBOARD_OMAP4) += omap4-keypad.o
obj-$(CONFIG_KEYBOARD_OPENCORES) += opencores-kbd.o
diff --git a/drivers/input/keyboard/nspire-keypad.c
b/drivers/input/keyboard/nspire-keypad.c
new file mode 100644
index 000..e863f14
--- /dev/null
+++ b/drivers/input/keyboard/nspire-keypad.c
@@ -0,0 +1,315 @@
+/*
+ * linux/drivers/input/keyboard/nspire-keypad.c
+ *
+ * Copyright (C) 2013 Daniel Tang
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2, as
+ * published by the Free Software Foundation.
+ *
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#define KEYPAD_SCAN_MODE 0x00
+#define KEYPAD_CNTL0x04
+#define KEYPAD_INT 0x08
+#define KEYPAD_INTMSK 0x0C
+
+#define KEYPAD_DATA0x10
+#define KEYPAD_GPIO0x30
+
+#define KEYPAD_UNKNOWN_INT 0x40
+#define KEYPAD_UNKNOWN_INT_STS 0x44
+
+#define KEYPAD_BITMASK_COLS11
+#define KEYPAD_BITMASK_ROWS8
+
+struct nspire_keypad {
+ spinlock_t lock;
+
+ void __iomem *reg_base;
+ int irq;
+ u32 int_mask;
+
+ struct input_dev *input;
+ struct clk *clk;
+
+ struct matrix_keymap_data *keymap;
+ int row_shift;
+
+ /* Maximum delay estimated assuming 33MHz APB */
+ u32 scan_interval; /* In microseconds (~2000us max) */
+ u32 row_delay; /* In microseconds (~500us max) */
+
+ bool active_low;
+};
+
+static inline void nspire_report_state(struct nspire_keypad *keypad,
+ int row, int col, unsigned int state)
+{
+ int code = MATRIX_SCAN_CODE(row, col, keypad->row_shift);
+ unsigned short *keymap = keypad->input->keycode;
+
+ state = keypad->active_low ? !state : !!state;
+ input_report_key(keypad->input, keymap[code], state);
+}
+
+static irqreturn_t nspire_keypad_irq(int irq, void *dev_id)
+{
+ struct nspire_keypad *keypad = dev_id;
+ u32 int_sts;
+ u16 state[8];
+ int row, col;
+
+ int_sts = readl(keypad->reg_base + KEYPAD_INT) & keypad->int_mask;
+
+ if (!int_sts)
+ return IRQ_NONE;
+
+ spin_lock(>lock);
+
+ memcpy_fromio(state, keypad->reg_base + KEYPAD_DATA, sizeof(state));
+
+ for (row = 0; row < KEYPAD_BITMASK_ROWS; row++) {
+ u16 bits = state[row];
+ for (col = 0; col < KEYPAD_BITMASK_COLS; col++)
+ nspire_report_state(keypad, row, col, bits & (1<input);
+ writel(0x3, keypad->reg_base + KEYPAD_INT);
+
+ spin_unlock(>lock);
+
+ return IRQ_HANDLED;
+}
+
+static int nspire_keypad_chip_init(struct nspire_keypad *keypad)
+{
+ unsigned long val = 0, cycles_per_us, delay_cycles, row_delay_cycles;
+
+ cycles_per_us = (clk_get_rate(keypad->clk) / 100);
+ if (cycles_per_us == 0)
+ cycles_per_us = 1;
+
+ delay_cycles = cycles_per_us * keypad->scan_interval;
+ WARN_ON(delay_cycles >= (1<<16)); /* Overflow */
+ delay_cycles &= 0x;
+
+ row_delay_cycl
[RFC PATCHv3 4/6] clocksource: Add TI-Nspire timer drivers
Signed-off-by: Daniel Tang
---
drivers/clocksource/Makefile | 1 +
drivers/clocksource/nspire-classic-timer.c | 199 +
2 files changed, 200 insertions(+)
create mode 100644 drivers/clocksource/nspire-classic-timer.c
diff --git a/drivers/clocksource/Makefile b/drivers/clocksource/Makefile
index 8d979c7..b9b56cb 100644
--- a/drivers/clocksource/Makefile
+++ b/drivers/clocksource/Makefile
@@ -22,6 +22,7 @@ obj-$(CONFIG_ARCH_PRIMA2) += timer-prima2.o
obj-$(CONFIG_SUN4I_TIMER) += sun4i_timer.o
obj-$(CONFIG_ARCH_TEGRA) += tegra20_timer.o
obj-$(CONFIG_VT8500_TIMER) += vt8500_timer.o
+obj-$(CONFIG_ARCH_NSPIRE) += nspire-classic-timer.o
obj-$(CONFIG_ARCH_BCM) += bcm_kona_timer.o
obj-$(CONFIG_CADENCE_TTC_TIMER)+= cadence_ttc_timer.o
obj-$(CONFIG_CLKSRC_EXYNOS_MCT)+= exynos_mct.o
diff --git a/drivers/clocksource/nspire-classic-timer.c
b/drivers/clocksource/nspire-classic-timer.c
new file mode 100644
index 000..4b92b61
--- /dev/null
+++ b/drivers/clocksource/nspire-classic-timer.c
@@ -0,0 +1,199 @@
+/*
+ * linux/drivers/clocksource/nspire-classic-timer.c
+ *
+ * Copyright (C) 2013 Daniel Tang
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2, as
+ * published by the Free Software Foundation.
+ *
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#define DT_COMPAT "nspire-classic-timer"
+
+#define IO_CURRENT_VAL 0x00
+#define IO_DIVIDER 0x04
+#define IO_CONTROL 0x08
+
+#define IO_TIMER1 0x00
+#define IO_TIMER2 0x0C
+
+#define IO_MATCH1 0x18
+#define IO_MATCH2 0x1C
+#define IO_MATCH3 0x20
+#define IO_MATCH4 0x24
+#define IO_MATCH5 0x28
+#define IO_MATCH6 0x2C
+
+#define IO_INTR_STS0x00
+#define IO_INTR_ACK0x00
+#define IO_INTR_MSK0x04
+
+#define CNTL_STOP_TIMER(1<<4)
+#define CNTL_RUN_TIMER (0<<4)
+
+#define CNTL_INC (1<<3)
+#define CNTL_DEC (0<<3)
+
+#define CNTL_TOZERO0
+#define CNTL_MATCH11
+#define CNTL_MATCH22
+#define CNTL_MATCH33
+#define CNTL_MATCH44
+#define CNTL_MATCH55
+#define CNTL_MATCH66
+#define CNTL_FOREVER 7
+
+struct nspire_timer {
+ void __iomem *base;
+ void __iomem *timer1, *timer2;
+ void __iomem *interrupt_regs;
+
+ int irqnr;
+
+ struct clk *clk;
+ struct clock_event_device clkevt;
+ struct irqaction clkevt_irq;
+
+ char clocksource_name[64];
+ char clockevent_name[64];
+};
+
+static int nspire_timer_set_event(unsigned long delta,
+ struct clock_event_device *dev)
+{
+ unsigned long flags;
+ struct nspire_timer *timer = container_of(dev,
+ struct nspire_timer,
+ clkevt);
+
+ local_irq_save(flags);
+
+ writel(delta, timer->timer1 + IO_CURRENT_VAL);
+ writel(CNTL_RUN_TIMER | CNTL_DEC | CNTL_MATCH1,
+ timer->timer1 + IO_CONTROL);
+
+ local_irq_restore(flags);
+
+ return 0;
+}
+static void nspire_timer_set_mode(enum clock_event_mode mode,
+ struct clock_event_device *evt)
+{
+ evt->mode = mode;
+}
+
+static irqreturn_t nspire_timer_interrupt(int irq, void *dev_id)
+{
+ struct nspire_timer *timer = dev_id;
+
+ writel((1<<0), timer->interrupt_regs + IO_INTR_ACK);
+ writel(CNTL_STOP_TIMER, timer->timer1 + IO_CONTROL);
+
+ if (timer->clkevt.event_handler)
+ timer->clkevt.event_handler(>clkevt);
+
+ return IRQ_HANDLED;
+}
+
+static int __init nspire_timer_add(struct device_node *node)
+{
+ struct nspire_timer *timer;
+ struct resource res;
+ int ret;
+
+ timer = kzalloc(sizeof(*timer), GFP_ATOMIC);
+ if (!timer)
+ return -ENOMEM;
+
+ timer->base = of_iomap(node, 0);
+ if (!timer->base) {
+ ret = -EINVAL;
+ goto error_free;
+ }
+ timer->timer1 = timer->base + IO_TIMER1;
+ timer->timer2 = timer->base + IO_TIMER2;
+
+ timer->clk = of_clk_get(node, 0);
+ if (IS_ERR(timer->clk)) {
+ ret = PTR_ERR(timer->clk);
+ pr_err("Timer clock not found! (error %d)\n", ret);
+ goto error_unmap;
+ }
+
+ timer->interrupt_regs = of_iomap(node, 1);
+ timer->irqnr = irq_of_parse_and_map(node, 0);
+
+ of_address_to_resource(node, 0, );
+ scnprintf(timer->clocksource_name, sizeof(timer->clocksource_name),
+ "%llx.%s_clocksource",
+ (unsigned long long)res.start, node->name);
+
+ scnprintf(timer->clockevent_name, sizeof(timer->clockevent_name),
+
[RFC PATCHv3 6/6] irqchip: Add TI-Nspire irqchip
Signed-off-by: Daniel Tang
---
drivers/irqchip/Makefile | 1 +
drivers/irqchip/irq-nspire-classic.c | 177 +++
2 files changed, 178 insertions(+)
create mode 100644 drivers/irqchip/irq-nspire-classic.c
diff --git a/drivers/irqchip/Makefile b/drivers/irqchip/Makefile
index cda4cb5..056ad7d 100644
--- a/drivers/irqchip/Makefile
+++ b/drivers/irqchip/Makefile
@@ -15,4 +15,5 @@ obj-$(CONFIG_SIRF_IRQ)+= irq-sirfsoc.o
obj-$(CONFIG_RENESAS_INTC_IRQPIN) += irq-renesas-intc-irqpin.o
obj-$(CONFIG_RENESAS_IRQC) += irq-renesas-irqc.o
obj-$(CONFIG_VERSATILE_FPGA_IRQ) += irq-versatile-fpga.o
+obj-$(CONFIG_ARCH_NSPIRE) += irq-nspire-classic.o
obj-$(CONFIG_ARCH_VT8500) += irq-vt8500.o
diff --git a/drivers/irqchip/irq-nspire-classic.c
b/drivers/irqchip/irq-nspire-classic.c
new file mode 100644
index 000..9e6413a
--- /dev/null
+++ b/drivers/irqchip/irq-nspire-classic.c
@@ -0,0 +1,177 @@
+/*
+ * linux/drivers/irqchip/irq-nspire-classic.c
+ *
+ * Copyright (C) 2013 Daniel Tang
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2, as
+ * published by the Free Software Foundation.
+ *
+ */
+
+#include
+#include
+#include
+#include
+#include
+
+#include
+#include
+
+#include "irqchip.h"
+
+#define IO_STATUS 0x000
+#define IO_RAW_STATUS 0x004
+#define IO_ENABLE 0x008
+#define IO_DISABLE 0x00C
+#define IO_CURRENT 0x020
+#define IO_RESET 0x028
+#define IO_MAX_PRIOTY 0x02C
+
+#define IO_IRQ_BASE0x000
+#define IO_FIQ_BASE0x100
+
+#define IO_INVERT_SEL 0x200
+#define IO_STICKY_SEL 0x204
+#define IO_PRIORITY_SEL0x300
+
+#define MAX_INTRS 32
+#define FIQ_START MAX_INTRS
+
+
+static void __iomem *irq_io_base;
+static struct irq_domain *nspire_irq_domain;
+
+static void nspire_irq_ack(struct irq_data *irqd)
+{
+ void __iomem *base = irq_io_base;
+
+ if (irqd->hwirq < FIQ_START)
+ base += IO_IRQ_BASE;
+ else
+ base += IO_FIQ_BASE;
+
+ readl(base + IO_RESET);
+}
+
+static void nspire_irq_unmask(struct irq_data *irqd)
+{
+ void __iomem *base = irq_io_base;
+ int irqnr = irqd->hwirq;
+
+ if (irqnr < FIQ_START) {
+ base += IO_IRQ_BASE;
+ } else {
+ irqnr -= MAX_INTRS;
+ base += IO_FIQ_BASE;
+ }
+
+ writel((1<hwirq;
+
+ if (irqnr < FIQ_START) {
+ base += IO_IRQ_BASE;
+ } else {
+ irqnr -= FIQ_START;
+ base += IO_FIQ_BASE;
+ }
+
+ writel((1<http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
[RFC PATCHv3 2/6] arm: Add device trees for TI-Nspire
Signed-off-by: Daniel Tang
---
arch/arm/boot/dts/Makefile| 3 +
arch/arm/boot/dts/nspire-classic.dtsi | 75 ++
arch/arm/boot/dts/nspire-clp.dts | 45 +
arch/arm/boot/dts/nspire-cx.dts | 112 +
arch/arm/boot/dts/nspire-tp.dts | 44
arch/arm/boot/dts/nspire.dtsi | 182 ++
6 files changed, 461 insertions(+)
create mode 100644 arch/arm/boot/dts/nspire-classic.dtsi
create mode 100644 arch/arm/boot/dts/nspire-clp.dts
create mode 100644 arch/arm/boot/dts/nspire-cx.dts
create mode 100644 arch/arm/boot/dts/nspire-tp.dts
create mode 100644 arch/arm/boot/dts/nspire.dtsi
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index b9f7121..5677d6c 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -135,6 +135,9 @@ dtb-$(CONFIG_ARCH_MXS) += imx23-evk.dtb \
imx28-sps1.dtb \
imx28-tx28.dtb
dtb-$(CONFIG_ARCH_NOMADIK) += ste-nomadik-s8815.dtb
+dtb-$(CONFIG_ARCH_NSPIRE) += nspire-cx.dtb \
+ nspire-tp.dtb \
+ nspire-clp.dtb
dtb-$(CONFIG_ARCH_OMAP2PLUS) += omap2420-h4.dtb \
omap3430-sdp.dtb \
omap3-beagle.dtb \
diff --git a/arch/arm/boot/dts/nspire-classic.dtsi
b/arch/arm/boot/dts/nspire-classic.dtsi
new file mode 100644
index 000..eb1c2a2
--- /dev/null
+++ b/arch/arm/boot/dts/nspire-classic.dtsi
@@ -0,0 +1,75 @@
+/*
+ * linux/arch/arm/boot/nspire-classic.dts
+ *
+ * Copyright (C) 2013 Daniel Tang
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2, as
+ * published by the Free Software Foundation.
+ *
+ */
+
+/include/ "nspire.dtsi"
+
+ {
+ lcd-type = "classic";
+};
+
+_timer {
+ /* compatible = "nspire-classic-timer"; */
+ reg = <0x9001 0x1000>, <0x900A0010 0x8>;
+};
+
+ {
+ compatible = "ns16550";
+ reg-shift = <2>;
+ reg-io-width = <4>;
+ clocks = <_pclk>;
+ clock-names = "apb_pclk";
+ no-loopback-test;
+};
+
+ {
+ /* compatible = "nspire-classic-timer"; */
+ reg = <0x900C 0x1000>, <0x900A0018 0x8>;
+};
+
+ {
+ compatible = "nspire-classic-timer";
+ reg = <0x900D 0x1000>, <0x900A0020 0x8>;
+};
+
+ {
+ active-low;
+
+};
+
+_clk {
+ io-type = "classic";
+};
+
+_clk {
+ io-type = "classic";
+};
+
+/ {
+ memory {
+ device_type = "memory";
+ reg = <0x1000 0x200>; /* 32 MB */
+ };
+
+ ahb {
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ intc: interrupt-controller@DC00 {
+ compatible = "nspire-classic-intc";
+ interrupt-controller;
+ reg = <0xDC00 0x1000>;
+ #interrupt-cells = <1>;
+ };
+ };
+ chosen {
+ bootargs = "debug earlyprintk console=tty0
console=ttyS0,115200n8 root=/dev/ram0";
+ };
+};
diff --git a/arch/arm/boot/dts/nspire-clp.dts b/arch/arm/boot/dts/nspire-clp.dts
new file mode 100644
index 000..7f25f44
--- /dev/null
+++ b/arch/arm/boot/dts/nspire-clp.dts
@@ -0,0 +1,45 @@
+/*
+ * linux/arch/arm/boot/nspire-clp.dts
+ *
+ * Copyright (C) 2013 Daniel Tang
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2, as
+ * published by the Free Software Foundation.
+ *
+ */
+/dts-v1/;
+
+/include/ "nspire-classic.dtsi"
+
+ {
+ keymap = <
+ 0x001c 0x0001001c 0x00020039
+ 0x0004002c 0x00050034 0x00060015
+ 0x0007000b 0x0008002d 0x0133
+ 0x0101004e 0x01020011 0x01030004
+ 0x0104002f 0x01050003 0x01060016
+ 0x01070002 0x01080014 0x0262
+ 0x0201000c 0x0202001f 0x02030007
+ 0x02040013 0x02050006 0x02060010
+ 0x02070005 0x02080019 0x0327
+ 0x03010037 0x03020018 0x0303000a
+ 0x03040031 0x03050009 0x03060032
+ 0x03070008 0x03080026 0x0428
+ 0x04010035 0x04020025 0x04040024
+ 0x04060017 0x04080023 0x0528
+ 0x05020022 0x0503001b 0x05040021
+ 0x0505001a 0x05060012 0x0507006f
+ 0x05080020 0x0509002a 0x0601001c
+ 0x0602002e 0x06030068 0x06040030
+ 0x0605006d 0x0606001e 0x06070001
+ 0x0608002b 0x0609000f 0x0767
+ 0x0702006a 0x0704006c 0x07060069
+ 0x0707000e 0x0708001d 0x070a000d
+ >;
+};
+
+/
[RFC PATCHv3 0/6] arm: Initial TI-Nspire support
Changes between http://archive.arm.linux.org.uk/lurker/message/20130408.113343.585af217.en.html and v2: * Added new drivers to support the irqchip and timers on older models. * Added new device trees to support the other models. Changes between v2 and v3: * Clean up keypad driver * Update copyright messages (2012->2013) * Added clock driver * Fix keypad support for classic models * Fix nspire-classic-timer code to use updated CLOCKSOURCE_OF_DECLARE * Change CLCD code to use panel capabilities * Change UART clock to match APB speed * Support for reset First time using git send-email, please forgive me if this turns pear shaped. Daniel Tang (6): arm: Initial TI-Nspire support arm: Add device trees for TI-Nspire clk: Add TI-Nspire clock drivers clocksource: Add TI-Nspire timer drivers input: Add TI-Nspire keypad driver irqchip: Add TI-Nspire irqchip arch/arm/Kconfig | 2 + arch/arm/Kconfig.debug | 16 ++ arch/arm/Makefile | 1 + arch/arm/boot/dts/Makefile | 3 + arch/arm/boot/dts/nspire-classic.dtsi | 75 +++ arch/arm/boot/dts/nspire-clp.dts | 45 + arch/arm/boot/dts/nspire-cx.dts| 112 ++ arch/arm/boot/dts/nspire-tp.dts| 44 arch/arm/boot/dts/nspire.dtsi | 182 + arch/arm/include/debug/nspire.S| 28 +++ arch/arm/mach-nspire/Kconfig | 15 ++ arch/arm/mach-nspire/Makefile | 2 + arch/arm/mach-nspire/Makefile.boot | 0 arch/arm/mach-nspire/clcd.c| 117 +++ arch/arm/mach-nspire/clcd.h| 14 ++ arch/arm/mach-nspire/mmio.h| 18 ++ arch/arm/mach-nspire/nspire.c | 99 + drivers/clk/Makefile | 1 + drivers/clk/clk-nspire.c | 141 + drivers/clocksource/Makefile | 1 + drivers/clocksource/nspire-classic-timer.c | 199 ++ drivers/input/keyboard/Kconfig | 10 + drivers/input/keyboard/Makefile| 1 + drivers/input/keyboard/nspire-keypad.c | 315 + drivers/irqchip/Makefile | 1 + drivers/irqchip/irq-nspire-classic.c | 177 26 files changed, 1619 insertions(+) create mode 100644 arch/arm/boot/dts/nspire-classic.dtsi create mode 100644 arch/arm/boot/dts/nspire-clp.dts create mode 100644 arch/arm/boot/dts/nspire-cx.dts create mode 100644 arch/arm/boot/dts/nspire-tp.dts create mode 100644 arch/arm/boot/dts/nspire.dtsi create mode 100644 arch/arm/include/debug/nspire.S create mode 100644 arch/arm/mach-nspire/Kconfig create mode 100644 arch/arm/mach-nspire/Makefile create mode 100644 arch/arm/mach-nspire/Makefile.boot create mode 100644 arch/arm/mach-nspire/clcd.c create mode 100644 arch/arm/mach-nspire/clcd.h create mode 100644 arch/arm/mach-nspire/mmio.h create mode 100644 arch/arm/mach-nspire/nspire.c create mode 100644 drivers/clk/clk-nspire.c create mode 100644 drivers/clocksource/nspire-classic-timer.c create mode 100644 drivers/input/keyboard/nspire-keypad.c create mode 100644 drivers/irqchip/irq-nspire-classic.c -- 1.8.1.3 -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[RFC PATCHv3 0/6] arm: Initial TI-Nspire support
Changes between http://archive.arm.linux.org.uk/lurker/message/20130408.113343.585af217.en.html and v2: * Added new drivers to support the irqchip and timers on older models. * Added new device trees to support the other models. Changes between v2 and v3: * Clean up keypad driver * Update copyright messages (2012-2013) * Added clock driver * Fix keypad support for classic models * Fix nspire-classic-timer code to use updated CLOCKSOURCE_OF_DECLARE * Change CLCD code to use panel capabilities * Change UART clock to match APB speed * Support for reset First time using git send-email, please forgive me if this turns pear shaped. Daniel Tang (6): arm: Initial TI-Nspire support arm: Add device trees for TI-Nspire clk: Add TI-Nspire clock drivers clocksource: Add TI-Nspire timer drivers input: Add TI-Nspire keypad driver irqchip: Add TI-Nspire irqchip arch/arm/Kconfig | 2 + arch/arm/Kconfig.debug | 16 ++ arch/arm/Makefile | 1 + arch/arm/boot/dts/Makefile | 3 + arch/arm/boot/dts/nspire-classic.dtsi | 75 +++ arch/arm/boot/dts/nspire-clp.dts | 45 + arch/arm/boot/dts/nspire-cx.dts| 112 ++ arch/arm/boot/dts/nspire-tp.dts| 44 arch/arm/boot/dts/nspire.dtsi | 182 + arch/arm/include/debug/nspire.S| 28 +++ arch/arm/mach-nspire/Kconfig | 15 ++ arch/arm/mach-nspire/Makefile | 2 + arch/arm/mach-nspire/Makefile.boot | 0 arch/arm/mach-nspire/clcd.c| 117 +++ arch/arm/mach-nspire/clcd.h| 14 ++ arch/arm/mach-nspire/mmio.h| 18 ++ arch/arm/mach-nspire/nspire.c | 99 + drivers/clk/Makefile | 1 + drivers/clk/clk-nspire.c | 141 + drivers/clocksource/Makefile | 1 + drivers/clocksource/nspire-classic-timer.c | 199 ++ drivers/input/keyboard/Kconfig | 10 + drivers/input/keyboard/Makefile| 1 + drivers/input/keyboard/nspire-keypad.c | 315 + drivers/irqchip/Makefile | 1 + drivers/irqchip/irq-nspire-classic.c | 177 26 files changed, 1619 insertions(+) create mode 100644 arch/arm/boot/dts/nspire-classic.dtsi create mode 100644 arch/arm/boot/dts/nspire-clp.dts create mode 100644 arch/arm/boot/dts/nspire-cx.dts create mode 100644 arch/arm/boot/dts/nspire-tp.dts create mode 100644 arch/arm/boot/dts/nspire.dtsi create mode 100644 arch/arm/include/debug/nspire.S create mode 100644 arch/arm/mach-nspire/Kconfig create mode 100644 arch/arm/mach-nspire/Makefile create mode 100644 arch/arm/mach-nspire/Makefile.boot create mode 100644 arch/arm/mach-nspire/clcd.c create mode 100644 arch/arm/mach-nspire/clcd.h create mode 100644 arch/arm/mach-nspire/mmio.h create mode 100644 arch/arm/mach-nspire/nspire.c create mode 100644 drivers/clk/clk-nspire.c create mode 100644 drivers/clocksource/nspire-classic-timer.c create mode 100644 drivers/input/keyboard/nspire-keypad.c create mode 100644 drivers/irqchip/irq-nspire-classic.c -- 1.8.1.3 -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[RFC PATCHv3 2/6] arm: Add device trees for TI-Nspire
Signed-off-by: Daniel Tang dt.ta...@gmail.com
---
arch/arm/boot/dts/Makefile| 3 +
arch/arm/boot/dts/nspire-classic.dtsi | 75 ++
arch/arm/boot/dts/nspire-clp.dts | 45 +
arch/arm/boot/dts/nspire-cx.dts | 112 +
arch/arm/boot/dts/nspire-tp.dts | 44
arch/arm/boot/dts/nspire.dtsi | 182 ++
6 files changed, 461 insertions(+)
create mode 100644 arch/arm/boot/dts/nspire-classic.dtsi
create mode 100644 arch/arm/boot/dts/nspire-clp.dts
create mode 100644 arch/arm/boot/dts/nspire-cx.dts
create mode 100644 arch/arm/boot/dts/nspire-tp.dts
create mode 100644 arch/arm/boot/dts/nspire.dtsi
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index b9f7121..5677d6c 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -135,6 +135,9 @@ dtb-$(CONFIG_ARCH_MXS) += imx23-evk.dtb \
imx28-sps1.dtb \
imx28-tx28.dtb
dtb-$(CONFIG_ARCH_NOMADIK) += ste-nomadik-s8815.dtb
+dtb-$(CONFIG_ARCH_NSPIRE) += nspire-cx.dtb \
+ nspire-tp.dtb \
+ nspire-clp.dtb
dtb-$(CONFIG_ARCH_OMAP2PLUS) += omap2420-h4.dtb \
omap3430-sdp.dtb \
omap3-beagle.dtb \
diff --git a/arch/arm/boot/dts/nspire-classic.dtsi
b/arch/arm/boot/dts/nspire-classic.dtsi
new file mode 100644
index 000..eb1c2a2
--- /dev/null
+++ b/arch/arm/boot/dts/nspire-classic.dtsi
@@ -0,0 +1,75 @@
+/*
+ * linux/arch/arm/boot/nspire-classic.dts
+ *
+ * Copyright (C) 2013 Daniel Tang tan...@tangrs.id.au
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2, as
+ * published by the Free Software Foundation.
+ *
+ */
+
+/include/ nspire.dtsi
+
+lcd {
+ lcd-type = classic;
+};
+
+fast_timer {
+ /* compatible = nspire-classic-timer; */
+ reg = 0x9001 0x1000, 0x900A0010 0x8;
+};
+
+uart {
+ compatible = ns16550;
+ reg-shift = 2;
+ reg-io-width = 4;
+ clocks = apb_pclk;
+ clock-names = apb_pclk;
+ no-loopback-test;
+};
+
+timer0 {
+ /* compatible = nspire-classic-timer; */
+ reg = 0x900C 0x1000, 0x900A0018 0x8;
+};
+
+timer1 {
+ compatible = nspire-classic-timer;
+ reg = 0x900D 0x1000, 0x900A0020 0x8;
+};
+
+keypad {
+ active-low;
+
+};
+
+base_clk {
+ io-type = classic;
+};
+
+ahb_clk {
+ io-type = classic;
+};
+
+/ {
+ memory {
+ device_type = memory;
+ reg = 0x1000 0x200; /* 32 MB */
+ };
+
+ ahb {
+ #address-cells = 1;
+ #size-cells = 1;
+
+ intc: interrupt-controller@DC00 {
+ compatible = nspire-classic-intc;
+ interrupt-controller;
+ reg = 0xDC00 0x1000;
+ #interrupt-cells = 1;
+ };
+ };
+ chosen {
+ bootargs = debug earlyprintk console=tty0
console=ttyS0,115200n8 root=/dev/ram0;
+ };
+};
diff --git a/arch/arm/boot/dts/nspire-clp.dts b/arch/arm/boot/dts/nspire-clp.dts
new file mode 100644
index 000..7f25f44
--- /dev/null
+++ b/arch/arm/boot/dts/nspire-clp.dts
@@ -0,0 +1,45 @@
+/*
+ * linux/arch/arm/boot/nspire-clp.dts
+ *
+ * Copyright (C) 2013 Daniel Tang tan...@tangrs.id.au
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2, as
+ * published by the Free Software Foundation.
+ *
+ */
+/dts-v1/;
+
+/include/ nspire-classic.dtsi
+
+keypad {
+ keymap =
+ 0x001c 0x0001001c 0x00020039
+ 0x0004002c 0x00050034 0x00060015
+ 0x0007000b 0x0008002d 0x0133
+ 0x0101004e 0x01020011 0x01030004
+ 0x0104002f 0x01050003 0x01060016
+ 0x01070002 0x01080014 0x0262
+ 0x0201000c 0x0202001f 0x02030007
+ 0x02040013 0x02050006 0x02060010
+ 0x02070005 0x02080019 0x0327
+ 0x03010037 0x03020018 0x0303000a
+ 0x03040031 0x03050009 0x03060032
+ 0x03070008 0x03080026 0x0428
+ 0x04010035 0x04020025 0x04040024
+ 0x04060017 0x04080023 0x0528
+ 0x05020022 0x0503001b 0x05040021
+ 0x0505001a 0x05060012 0x0507006f
+ 0x05080020 0x0509002a 0x0601001c
+ 0x0602002e 0x06030068 0x06040030
+ 0x0605006d 0x0606001e 0x06070001
+ 0x0608002b 0x0609000f 0x0767
+ 0x0702006a 0x0704006c 0x07060069
+ 0x0707000e 0x0708001d 0x070a000d
+ ;
+};
+
+/ {
+ model = TI-NSPIRE Clickpad;
+ compatible = arm,nspire-clp;
+};
diff --git a/arch/arm/boot/dts/nspire-cx.dts b/arch/arm/boot/dts/nspire-cx.dts
new file mode
[RFC PATCHv3 4/6] clocksource: Add TI-Nspire timer drivers
Signed-off-by: Daniel Tang dt.ta...@gmail.com
---
drivers/clocksource/Makefile | 1 +
drivers/clocksource/nspire-classic-timer.c | 199 +
2 files changed, 200 insertions(+)
create mode 100644 drivers/clocksource/nspire-classic-timer.c
diff --git a/drivers/clocksource/Makefile b/drivers/clocksource/Makefile
index 8d979c7..b9b56cb 100644
--- a/drivers/clocksource/Makefile
+++ b/drivers/clocksource/Makefile
@@ -22,6 +22,7 @@ obj-$(CONFIG_ARCH_PRIMA2) += timer-prima2.o
obj-$(CONFIG_SUN4I_TIMER) += sun4i_timer.o
obj-$(CONFIG_ARCH_TEGRA) += tegra20_timer.o
obj-$(CONFIG_VT8500_TIMER) += vt8500_timer.o
+obj-$(CONFIG_ARCH_NSPIRE) += nspire-classic-timer.o
obj-$(CONFIG_ARCH_BCM) += bcm_kona_timer.o
obj-$(CONFIG_CADENCE_TTC_TIMER)+= cadence_ttc_timer.o
obj-$(CONFIG_CLKSRC_EXYNOS_MCT)+= exynos_mct.o
diff --git a/drivers/clocksource/nspire-classic-timer.c
b/drivers/clocksource/nspire-classic-timer.c
new file mode 100644
index 000..4b92b61
--- /dev/null
+++ b/drivers/clocksource/nspire-classic-timer.c
@@ -0,0 +1,199 @@
+/*
+ * linux/drivers/clocksource/nspire-classic-timer.c
+ *
+ * Copyright (C) 2013 Daniel Tang tan...@tangrs.id.au
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2, as
+ * published by the Free Software Foundation.
+ *
+ */
+
+#include linux/io.h
+#include linux/irq.h
+#include linux/of.h
+#include linux/of_address.h
+#include linux/of_irq.h
+#include linux/clk.h
+#include linux/clockchips.h
+#include linux/cpumask.h
+#include linux/interrupt.h
+#include linux/slab.h
+
+#define DT_COMPAT nspire-classic-timer
+
+#define IO_CURRENT_VAL 0x00
+#define IO_DIVIDER 0x04
+#define IO_CONTROL 0x08
+
+#define IO_TIMER1 0x00
+#define IO_TIMER2 0x0C
+
+#define IO_MATCH1 0x18
+#define IO_MATCH2 0x1C
+#define IO_MATCH3 0x20
+#define IO_MATCH4 0x24
+#define IO_MATCH5 0x28
+#define IO_MATCH6 0x2C
+
+#define IO_INTR_STS0x00
+#define IO_INTR_ACK0x00
+#define IO_INTR_MSK0x04
+
+#define CNTL_STOP_TIMER(14)
+#define CNTL_RUN_TIMER (04)
+
+#define CNTL_INC (13)
+#define CNTL_DEC (03)
+
+#define CNTL_TOZERO0
+#define CNTL_MATCH11
+#define CNTL_MATCH22
+#define CNTL_MATCH33
+#define CNTL_MATCH44
+#define CNTL_MATCH55
+#define CNTL_MATCH66
+#define CNTL_FOREVER 7
+
+struct nspire_timer {
+ void __iomem *base;
+ void __iomem *timer1, *timer2;
+ void __iomem *interrupt_regs;
+
+ int irqnr;
+
+ struct clk *clk;
+ struct clock_event_device clkevt;
+ struct irqaction clkevt_irq;
+
+ char clocksource_name[64];
+ char clockevent_name[64];
+};
+
+static int nspire_timer_set_event(unsigned long delta,
+ struct clock_event_device *dev)
+{
+ unsigned long flags;
+ struct nspire_timer *timer = container_of(dev,
+ struct nspire_timer,
+ clkevt);
+
+ local_irq_save(flags);
+
+ writel(delta, timer-timer1 + IO_CURRENT_VAL);
+ writel(CNTL_RUN_TIMER | CNTL_DEC | CNTL_MATCH1,
+ timer-timer1 + IO_CONTROL);
+
+ local_irq_restore(flags);
+
+ return 0;
+}
+static void nspire_timer_set_mode(enum clock_event_mode mode,
+ struct clock_event_device *evt)
+{
+ evt-mode = mode;
+}
+
+static irqreturn_t nspire_timer_interrupt(int irq, void *dev_id)
+{
+ struct nspire_timer *timer = dev_id;
+
+ writel((10), timer-interrupt_regs + IO_INTR_ACK);
+ writel(CNTL_STOP_TIMER, timer-timer1 + IO_CONTROL);
+
+ if (timer-clkevt.event_handler)
+ timer-clkevt.event_handler(timer-clkevt);
+
+ return IRQ_HANDLED;
+}
+
+static int __init nspire_timer_add(struct device_node *node)
+{
+ struct nspire_timer *timer;
+ struct resource res;
+ int ret;
+
+ timer = kzalloc(sizeof(*timer), GFP_ATOMIC);
+ if (!timer)
+ return -ENOMEM;
+
+ timer-base = of_iomap(node, 0);
+ if (!timer-base) {
+ ret = -EINVAL;
+ goto error_free;
+ }
+ timer-timer1 = timer-base + IO_TIMER1;
+ timer-timer2 = timer-base + IO_TIMER2;
+
+ timer-clk = of_clk_get(node, 0);
+ if (IS_ERR(timer-clk)) {
+ ret = PTR_ERR(timer-clk);
+ pr_err(Timer clock not found! (error %d)\n, ret);
+ goto error_unmap;
+ }
+
+ timer-interrupt_regs = of_iomap(node, 1);
+ timer-irqnr = irq_of_parse_and_map(node, 0);
+
+ of_address_to_resource(node, 0, res);
+ scnprintf(timer-clocksource_name, sizeof(timer-clocksource_name),
+ %llx.%s_clocksource,
+ (unsigned long long)res.start, node-name);
+
+ scnprintf(timer-clockevent_name, sizeof(timer-clockevent_name
[RFC PATCHv3 6/6] irqchip: Add TI-Nspire irqchip
Signed-off-by: Daniel Tang dt.ta...@gmail.com
---
drivers/irqchip/Makefile | 1 +
drivers/irqchip/irq-nspire-classic.c | 177 +++
2 files changed, 178 insertions(+)
create mode 100644 drivers/irqchip/irq-nspire-classic.c
diff --git a/drivers/irqchip/Makefile b/drivers/irqchip/Makefile
index cda4cb5..056ad7d 100644
--- a/drivers/irqchip/Makefile
+++ b/drivers/irqchip/Makefile
@@ -15,4 +15,5 @@ obj-$(CONFIG_SIRF_IRQ)+= irq-sirfsoc.o
obj-$(CONFIG_RENESAS_INTC_IRQPIN) += irq-renesas-intc-irqpin.o
obj-$(CONFIG_RENESAS_IRQC) += irq-renesas-irqc.o
obj-$(CONFIG_VERSATILE_FPGA_IRQ) += irq-versatile-fpga.o
+obj-$(CONFIG_ARCH_NSPIRE) += irq-nspire-classic.o
obj-$(CONFIG_ARCH_VT8500) += irq-vt8500.o
diff --git a/drivers/irqchip/irq-nspire-classic.c
b/drivers/irqchip/irq-nspire-classic.c
new file mode 100644
index 000..9e6413a
--- /dev/null
+++ b/drivers/irqchip/irq-nspire-classic.c
@@ -0,0 +1,177 @@
+/*
+ * linux/drivers/irqchip/irq-nspire-classic.c
+ *
+ * Copyright (C) 2013 Daniel Tang tan...@tangrs.id.au
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2, as
+ * published by the Free Software Foundation.
+ *
+ */
+
+#include linux/io.h
+#include linux/irq.h
+#include linux/of.h
+#include linux/of_address.h
+#include linux/of_irq.h
+
+#include asm/mach/irq.h
+#include asm/exception.h
+
+#include irqchip.h
+
+#define IO_STATUS 0x000
+#define IO_RAW_STATUS 0x004
+#define IO_ENABLE 0x008
+#define IO_DISABLE 0x00C
+#define IO_CURRENT 0x020
+#define IO_RESET 0x028
+#define IO_MAX_PRIOTY 0x02C
+
+#define IO_IRQ_BASE0x000
+#define IO_FIQ_BASE0x100
+
+#define IO_INVERT_SEL 0x200
+#define IO_STICKY_SEL 0x204
+#define IO_PRIORITY_SEL0x300
+
+#define MAX_INTRS 32
+#define FIQ_START MAX_INTRS
+
+
+static void __iomem *irq_io_base;
+static struct irq_domain *nspire_irq_domain;
+
+static void nspire_irq_ack(struct irq_data *irqd)
+{
+ void __iomem *base = irq_io_base;
+
+ if (irqd-hwirq FIQ_START)
+ base += IO_IRQ_BASE;
+ else
+ base += IO_FIQ_BASE;
+
+ readl(base + IO_RESET);
+}
+
+static void nspire_irq_unmask(struct irq_data *irqd)
+{
+ void __iomem *base = irq_io_base;
+ int irqnr = irqd-hwirq;
+
+ if (irqnr FIQ_START) {
+ base += IO_IRQ_BASE;
+ } else {
+ irqnr -= MAX_INTRS;
+ base += IO_FIQ_BASE;
+ }
+
+ writel((1irqnr), base + IO_ENABLE);
+}
+
+static void nspire_irq_mask(struct irq_data *irqd)
+{
+ void __iomem *base = irq_io_base;
+ int irqnr = irqd-hwirq;
+
+ if (irqnr FIQ_START) {
+ base += IO_IRQ_BASE;
+ } else {
+ irqnr -= FIQ_START;
+ base += IO_FIQ_BASE;
+ }
+
+ writel((1irqnr), base + IO_DISABLE);
+}
+
+static struct irq_chip nspire_irq_chip = {
+ .name = nspire_irq,
+ .irq_ack= nspire_irq_ack,
+ .irq_mask = nspire_irq_mask,
+ .irq_unmask = nspire_irq_unmask,
+};
+
+
+static int nspire_irq_map(struct irq_domain *dom, unsigned int virq,
+ irq_hw_number_t hw)
+{
+ irq_set_chip_and_handler(virq, nspire_irq_chip, handle_level_irq);
+ set_irq_flags(virq, IRQF_VALID | IRQF_PROBE);
+
+ return 0;
+}
+
+static struct irq_domain_ops nspire_irq_ops = {
+ .map = nspire_irq_map,
+ .xlate = irq_domain_xlate_onecell,
+};
+
+static void init_base(void __iomem *base)
+{
+ /* Disable all interrupts */
+ writel(~0, base + IO_DISABLE);
+
+ /* Accept interrupts of all priorities */
+ writel(0xF, base + IO_MAX_PRIOTY);
+
+ /* Reset existing interrupts */
+ readl(base + IO_RESET);
+}
+
+static int process_base(void __iomem *base, struct pt_regs *regs)
+{
+ int irqnr;
+
+
+ if (!readl(base + IO_STATUS))
+ return 0;
+
+ irqnr = readl(base + IO_CURRENT);
+ irqnr = irq_find_mapping(nspire_irq_domain, irqnr);
+ handle_IRQ(irqnr, regs);
+
+ return 1;
+}
+
+asmlinkage void __exception_irq_entry nspire_handle_irq(struct pt_regs *regs)
+{
+ while (process_base(irq_io_base + IO_FIQ_BASE, regs))
+ ;
+ while (process_base(irq_io_base + IO_IRQ_BASE, regs))
+ ;
+}
+
+static int __init nspire_of_init(struct device_node *node,
+ struct device_node *parent)
+{
+ if (WARN_ON(irq_io_base))
+ return -EBUSY;
+
+ irq_io_base = of_iomap(node, 0);
+ BUG_ON(!irq_io_base);
+
+ /* Do not invert interrupt status bits */
+ writel(~0, irq_io_base + IO_INVERT_SEL);
+
+ /* Disable sticky interrupts */
+ writel(0, irq_io_base + IO_STICKY_SEL);
+
+ /* We don't use IRQ priorities
[RFC PATCHv3 5/6] input: Add TI-Nspire keypad driver
Signed-off-by: Daniel Tang dt.ta...@gmail.com
---
drivers/input/keyboard/Kconfig | 10 ++
drivers/input/keyboard/Makefile| 1 +
drivers/input/keyboard/nspire-keypad.c | 315 +
3 files changed, 326 insertions(+)
create mode 100644 drivers/input/keyboard/nspire-keypad.c
diff --git a/drivers/input/keyboard/Kconfig b/drivers/input/keyboard/Kconfig
index 62a2c0e..bdbda87 100644
--- a/drivers/input/keyboard/Kconfig
+++ b/drivers/input/keyboard/Kconfig
@@ -418,6 +418,16 @@ config KEYBOARD_NOMADIK
To compile this driver as a module, choose M here: the
module will be called nmk-ske-keypad.
+config KEYBOARD_NSPIRE
+ tristate TI-NSPIRE builtin keyboard
+ depends on ARCH_NSPIRE
+ select INPUT_MATRIXKMAP
+ help
+ Say Y here if you want to use the builtin keypad on the TI-NSPIRE.
+
+ To compile this driver as a module, choose M here: the
+ module will be called nspire-keypad.
+
config KEYBOARD_TEGRA
tristate NVIDIA Tegra internal matrix keyboard controller support
depends on ARCH_TEGRA OF
diff --git a/drivers/input/keyboard/Makefile b/drivers/input/keyboard/Makefile
index 0c43e8c..a699b61 100644
--- a/drivers/input/keyboard/Makefile
+++ b/drivers/input/keyboard/Makefile
@@ -36,6 +36,7 @@ obj-$(CONFIG_KEYBOARD_MCS)+= mcs_touchkey.o
obj-$(CONFIG_KEYBOARD_MPR121) += mpr121_touchkey.o
obj-$(CONFIG_KEYBOARD_NEWTON) += newtonkbd.o
obj-$(CONFIG_KEYBOARD_NOMADIK) += nomadik-ske-keypad.o
+obj-$(CONFIG_KEYBOARD_NSPIRE) += nspire-keypad.o
obj-$(CONFIG_KEYBOARD_OMAP)+= omap-keypad.o
obj-$(CONFIG_KEYBOARD_OMAP4) += omap4-keypad.o
obj-$(CONFIG_KEYBOARD_OPENCORES) += opencores-kbd.o
diff --git a/drivers/input/keyboard/nspire-keypad.c
b/drivers/input/keyboard/nspire-keypad.c
new file mode 100644
index 000..e863f14
--- /dev/null
+++ b/drivers/input/keyboard/nspire-keypad.c
@@ -0,0 +1,315 @@
+/*
+ * linux/drivers/input/keyboard/nspire-keypad.c
+ *
+ * Copyright (C) 2013 Daniel Tang tan...@tangrs.id.au
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2, as
+ * published by the Free Software Foundation.
+ *
+ */
+
+#include linux/input/matrix_keypad.h
+#include linux/platform_device.h
+#include linux/interrupt.h
+#include linux/spinlock.h
+#include linux/io.h
+#include linux/delay.h
+#include linux/input.h
+#include linux/slab.h
+#include linux/clk.h
+#include linux/module.h
+#include linux/of.h
+
+#define KEYPAD_SCAN_MODE 0x00
+#define KEYPAD_CNTL0x04
+#define KEYPAD_INT 0x08
+#define KEYPAD_INTMSK 0x0C
+
+#define KEYPAD_DATA0x10
+#define KEYPAD_GPIO0x30
+
+#define KEYPAD_UNKNOWN_INT 0x40
+#define KEYPAD_UNKNOWN_INT_STS 0x44
+
+#define KEYPAD_BITMASK_COLS11
+#define KEYPAD_BITMASK_ROWS8
+
+struct nspire_keypad {
+ spinlock_t lock;
+
+ void __iomem *reg_base;
+ int irq;
+ u32 int_mask;
+
+ struct input_dev *input;
+ struct clk *clk;
+
+ struct matrix_keymap_data *keymap;
+ int row_shift;
+
+ /* Maximum delay estimated assuming 33MHz APB */
+ u32 scan_interval; /* In microseconds (~2000us max) */
+ u32 row_delay; /* In microseconds (~500us max) */
+
+ bool active_low;
+};
+
+static inline void nspire_report_state(struct nspire_keypad *keypad,
+ int row, int col, unsigned int state)
+{
+ int code = MATRIX_SCAN_CODE(row, col, keypad-row_shift);
+ unsigned short *keymap = keypad-input-keycode;
+
+ state = keypad-active_low ? !state : !!state;
+ input_report_key(keypad-input, keymap[code], state);
+}
+
+static irqreturn_t nspire_keypad_irq(int irq, void *dev_id)
+{
+ struct nspire_keypad *keypad = dev_id;
+ u32 int_sts;
+ u16 state[8];
+ int row, col;
+
+ int_sts = readl(keypad-reg_base + KEYPAD_INT) keypad-int_mask;
+
+ if (!int_sts)
+ return IRQ_NONE;
+
+ spin_lock(keypad-lock);
+
+ memcpy_fromio(state, keypad-reg_base + KEYPAD_DATA, sizeof(state));
+
+ for (row = 0; row KEYPAD_BITMASK_ROWS; row++) {
+ u16 bits = state[row];
+ for (col = 0; col KEYPAD_BITMASK_COLS; col++)
+ nspire_report_state(keypad, row, col, bits (1col));
+ }
+ input_sync(keypad-input);
+ writel(0x3, keypad-reg_base + KEYPAD_INT);
+
+ spin_unlock(keypad-lock);
+
+ return IRQ_HANDLED;
+}
+
+static int nspire_keypad_chip_init(struct nspire_keypad *keypad)
+{
+ unsigned long val = 0, cycles_per_us, delay_cycles, row_delay_cycles;
+
+ cycles_per_us = (clk_get_rate(keypad-clk) / 100);
+ if (cycles_per_us == 0)
+ cycles_per_us = 1;
+
+ delay_cycles = cycles_per_us * keypad
[RFC PATCHv3 1/6] arm: Initial TI-Nspire support
Signed-off-by: Daniel Tang dt.ta...@gmail.com --- arch/arm/Kconfig | 2 + arch/arm/Kconfig.debug | 16 + arch/arm/Makefile | 1 + arch/arm/include/debug/nspire.S| 28 + arch/arm/mach-nspire/Kconfig | 15 + arch/arm/mach-nspire/Makefile | 2 + arch/arm/mach-nspire/Makefile.boot | 0 arch/arm/mach-nspire/clcd.c| 117 + arch/arm/mach-nspire/clcd.h| 14 + arch/arm/mach-nspire/mmio.h| 18 ++ arch/arm/mach-nspire/nspire.c | 99 +++ 11 files changed, 312 insertions(+) create mode 100644 arch/arm/include/debug/nspire.S create mode 100644 arch/arm/mach-nspire/Kconfig create mode 100644 arch/arm/mach-nspire/Makefile create mode 100644 arch/arm/mach-nspire/Makefile.boot create mode 100644 arch/arm/mach-nspire/clcd.c create mode 100644 arch/arm/mach-nspire/clcd.h create mode 100644 arch/arm/mach-nspire/mmio.h create mode 100644 arch/arm/mach-nspire/nspire.c diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index d423d58..b8cb225 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -963,6 +963,8 @@ source arch/arm/mach-netx/Kconfig source arch/arm/mach-nomadik/Kconfig +source arch/arm/mach-nspire/Kconfig + source arch/arm/plat-omap/Kconfig source arch/arm/mach-omap1/Kconfig diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug index 1d41908..fe07941 100644 --- a/arch/arm/Kconfig.debug +++ b/arch/arm/Kconfig.debug @@ -309,6 +309,20 @@ choice Say Y here if you want kernel low-level debugging support on MVEBU based platforms. + config DEBUG_NSPIRE_CLASSIC_UART + bool Kernel low-level debugging via TI-NSPIRE 8250 UART + depends on ARCH_NSPIRE + help + Say Y here if you want kernel low-level debugging support + on TI-NSPIRE classic models. + + config DEBUG_NSPIRE_CX_UART + bool Kernel low-level debugging via TI-NSPIRE PL011 UART + depends on ARCH_NSPIRE + help + Say Y here if you want kernel low-level debugging support + on TI-NSPIRE CX models. + config DEBUG_NOMADIK_UART bool Kernel low-level debugging messages via NOMADIK UART depends on ARCH_NOMADIK @@ -633,6 +647,8 @@ config DEBUG_LL_INCLUDE DEBUG_IMX53_UART ||\ DEBUG_IMX6Q_UART default debug/mvebu.S if DEBUG_MVEBU_UART + default debug/nspire.S if DEBUG_NSPIRE_CX_UART || \ + DEBUG_NSPIRE_CLASSIC_UART default debug/mxs.S if DEBUG_IMX23_UART || DEBUG_IMX28_UART default debug/nomadik.S if DEBUG_NOMADIK_UART default debug/omap2plus.S if DEBUG_OMAP2PLUS_UART diff --git a/arch/arm/Makefile b/arch/arm/Makefile index 4737408..a4340d1 100644 --- a/arch/arm/Makefile +++ b/arch/arm/Makefile @@ -164,6 +164,7 @@ machine-$(CONFIG_ARCH_MXS) += mxs machine-$(CONFIG_ARCH_MVEBU) += mvebu machine-$(CONFIG_ARCH_NETX)+= netx machine-$(CONFIG_ARCH_NOMADIK) += nomadik +machine-$(CONFIG_ARCH_NSPIRE) += nspire machine-$(CONFIG_ARCH_OMAP1) += omap1 machine-$(CONFIG_ARCH_OMAP2PLUS) += omap2 machine-$(CONFIG_ARCH_ORION5X) += orion5x diff --git a/arch/arm/include/debug/nspire.S b/arch/arm/include/debug/nspire.S new file mode 100644 index 000..886fd27 --- /dev/null +++ b/arch/arm/include/debug/nspire.S @@ -0,0 +1,28 @@ +/* + * linux/arch/arm/include/debug/nspire.S + * + * Copyright (C) 2013 Daniel Tang tan...@tangrs.id.au + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2, as + * published by the Free Software Foundation. + * + */ + +#define NSPIRE_EARLY_UART_PHYS_BASE 0x9002 +#define NSPIRE_EARLY_UART_VIRT_BASE 0xfee2 + +.macro addruart, rp, rv, tmp + ldr \rp, =(NSPIRE_EARLY_UART_PHYS_BASE) @ physical base address + ldr \rv, =(NSPIRE_EARLY_UART_VIRT_BASE) @ virtual base address +.endm + + +#ifdef CONFIG_DEBUG_NSPIRE_CX_UART +#include asm/hardware/debug-pl01x.S +#endif + +#ifdef CONFIG_DEBUG_NSPIRE_CLASSIC_UART +#define UART_SHIFT 2 +#include asm/hardware/debug-8250.S +#endif diff --git a/arch/arm/mach-nspire/Kconfig b/arch/arm/mach-nspire/Kconfig new file mode 100644 index 000..a295b18 --- /dev/null +++ b/arch/arm/mach-nspire/Kconfig @@ -0,0 +1,15 @@ +config ARCH_NSPIRE + bool TI-NSPIRE based + depends on ARCH_MULTI_V4_V5 + depends on MMU + select CPU_ARM926T + select COMMON_CLK + select GENERIC_CLOCKEVENTS + select SPARSE_IRQ + select ARM_AMBA + select ARM_VIC + select ARM_TIMER_SP804 + select USE_OF
[RFC PATCHv3 3/6] clk: Add TI-Nspire clock drivers
Signed-off-by: Daniel Tang dt.ta...@gmail.com
---
drivers/clk/Makefile | 1 +
drivers/clk/clk-nspire.c | 141 +++
2 files changed, 142 insertions(+)
create mode 100644 drivers/clk/clk-nspire.c
diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile
index 137d3e7..72ebbe1 100644
--- a/drivers/clk/Makefile
+++ b/drivers/clk/Makefile
@@ -13,6 +13,7 @@ obj-$(CONFIG_COMMON_CLK) += clk-composite.o
obj-$(CONFIG_ARCH_BCM2835) += clk-bcm2835.o
obj-$(CONFIG_ARCH_NOMADIK) += clk-nomadik.o
obj-$(CONFIG_ARCH_HIGHBANK)+= clk-highbank.o
+obj-$(CONFIG_ARCH_NSPIRE) += clk-nspire.o
obj-$(CONFIG_ARCH_MXS) += mxs/
obj-$(CONFIG_ARCH_SOCFPGA) += socfpga/
obj-$(CONFIG_PLAT_SPEAR) += spear/
diff --git a/drivers/clk/clk-nspire.c b/drivers/clk/clk-nspire.c
new file mode 100644
index 000..2a8d14c
--- /dev/null
+++ b/drivers/clk/clk-nspire.c
@@ -0,0 +1,141 @@
+/*
+ * linux/drivers/clk/clk-nspire.c
+ *
+ * Copyright (C) 2013 Daniel Tang tan...@tangrs.id.au
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2, as
+ * published by the Free Software Foundation.
+ *
+ */
+
+#include linux/clk-provider.h
+#include linux/err.h
+#include linux/io.h
+#include linux/of.h
+#include linux/of_address.h
+
+#define MHZ (1000 * 1000)
+
+#define BASE_CPU_SHIFT 1
+#define BASE_CPU_MASK 0x7F
+
+#define CPU_AHB_SHIFT 12
+#define CPU_AHB_MASK 0x07
+
+#define FIXED_BASE_SHIFT 8
+#define FIXED_BASE_MASK0x01
+
+#define CLASSIC_BASE_SHIFT 16
+#define CLASSIC_BASE_MASK 0x1F
+
+#define CX_BASE_SHIFT 15
+#define CX_BASE_MASK 0x3F
+
+#define CX_UNKNOWN_SHIFT 21
+#define CX_UNKNOWN_MASK0x03
+
+#define EXTRACT(var, prop) (((var)prop##_SHIFT) prop##_MASK)
+
+struct nspire_clk_info {
+ u32 base_clock;
+ u16 base_cpu_ratio;
+ u16 base_ahb_ratio;
+};
+
+static int nspire_clk_read(struct device_node *node,
+ struct nspire_clk_info *clk)
+{
+ u32 val;
+ int ret;
+ void __iomem *io;
+ const char *type = NULL;
+
+ ret = of_property_read_string(node, io-type, type);
+ if (ret)
+ return ret;
+
+ io = of_iomap(node, 0);
+ if (!io)
+ return -ENOMEM;
+ val = readl(io);
+ iounmap(io);
+
+ if (!strcmp(type, cx)) {
+ if (EXTRACT(val, FIXED_BASE)) {
+ clk-base_clock = 48 * MHZ;
+ } else {
+ clk-base_clock = 6 * EXTRACT(val, CX_BASE) * MHZ;
+ }
+
+ clk-base_cpu_ratio = EXTRACT(val, BASE_CPU) *
+ EXTRACT(val, CX_UNKNOWN);
+ clk-base_ahb_ratio = clk-base_cpu_ratio *
+ (EXTRACT(val, CPU_AHB) + 1);
+ } else if (!strcmp(type, classic)) {
+ if (EXTRACT(val, FIXED_BASE)) {
+ clk-base_clock = 27 * MHZ;
+ } else {
+ clk-base_clock = (300 -
+ 6 * EXTRACT(val, CLASSIC_BASE)) * MHZ;
+ }
+
+ clk-base_cpu_ratio = EXTRACT(val, BASE_CPU) * 2;
+ clk-base_ahb_ratio = clk-base_cpu_ratio *
+ (EXTRACT(val, CPU_AHB) + 1);
+ } else {
+ return -EINVAL;
+ }
+
+ return 0;
+}
+
+static void __init nspire_ahbdiv_setup(struct device_node *node)
+{
+ int ret;
+ struct clk *clk;
+ const char *clk_name = node-name;
+ const char *parent_name;
+ struct nspire_clk_info info;
+
+ ret = nspire_clk_read(node, info);
+ if (WARN_ON(ret))
+ return;
+
+ of_property_read_string(node, clock-output-names, clk_name);
+ parent_name = of_clk_get_parent_name(node, 0);
+
+ clk = clk_register_fixed_factor(NULL, clk_name, parent_name, 0,
+ 1, info.base_ahb_ratio);
+ if (!IS_ERR(clk))
+ of_clk_add_provider(node, of_clk_src_simple_get, clk);
+}
+
+static void __init nspire_clk_setup(struct device_node *node)
+{
+ int ret;
+ struct clk *clk;
+ const char *clk_name = node-name;
+ struct nspire_clk_info info;
+
+ ret = nspire_clk_read(node, info);
+ if (WARN_ON(ret))
+ return;
+
+ of_property_read_string(node, clock-output-names, clk_name);
+
+ clk = clk_register_fixed_rate(NULL, clk_name, NULL, CLK_IS_ROOT,
+ info.base_clock);
+ if (!IS_ERR(clk))
+ of_clk_add_provider(node, of_clk_src_simple_get, clk);
+ else
+ return;
+
+ pr_info(TI-NSPIRE Base: %uMHz CPU: %uMHz AHB: %uMHz\n,
+ info.base_clock / MHZ
[RFC PATCH] Fix sortextable building on non-Linux systems
The file scripts/sortextable.c fails to compile on non-Linux systems due to the
missing 'linux/types.h' header.
Unless I'm missing something obvious, including the standard 'inttypes.h'
header instead and using uintX_t types instead of __uX types does the exact
same job and doesn't break compilation on non-Linux systems.
Signed-off-by: Daniel Tang
---
tools/include/tools/be_byteshift.h | 34 +-
tools/include/tools/le_byteshift.h | 34 +-
2 files changed, 34 insertions(+), 34 deletions(-)
diff --git a/tools/include/tools/be_byteshift.h
b/tools/include/tools/be_byteshift.h
index f4912e2..d51fe26 100644
--- a/tools/include/tools/be_byteshift.h
+++ b/tools/include/tools/be_byteshift.h
@@ -1,68 +1,68 @@
#ifndef _TOOLS_BE_BYTESHIFT_H
#define _TOOLS_BE_BYTESHIFT_H
-#include
+#include
-static inline __u16 __get_unaligned_be16(const __u8 *p)
+static inline uint16_t __get_unaligned_be16(const uint8_t *p)
{
return p[0] << 8 | p[1];
}
-static inline __u32 __get_unaligned_be32(const __u8 *p)
+static inline uint32_t __get_unaligned_be32(const uint8_t *p)
{
return p[0] << 24 | p[1] << 16 | p[2] << 8 | p[3];
}
-static inline __u64 __get_unaligned_be64(const __u8 *p)
+static inline uint64_t __get_unaligned_be64(const uint8_t *p)
{
- return (__u64)__get_unaligned_be32(p) << 32 |
+ return (uint64_t)__get_unaligned_be32(p) << 32 |
__get_unaligned_be32(p + 4);
}
-static inline void __put_unaligned_be16(__u16 val, __u8 *p)
+static inline void __put_unaligned_be16(uint16_t val, uint8_t *p)
{
*p++ = val >> 8;
*p++ = val;
}
-static inline void __put_unaligned_be32(__u32 val, __u8 *p)
+static inline void __put_unaligned_be32(uint32_t val, uint8_t *p)
{
__put_unaligned_be16(val >> 16, p);
__put_unaligned_be16(val, p + 2);
}
-static inline void __put_unaligned_be64(__u64 val, __u8 *p)
+static inline void __put_unaligned_be64(uint64_t val, uint8_t *p)
{
__put_unaligned_be32(val >> 32, p);
__put_unaligned_be32(val, p + 4);
}
-static inline __u16 get_unaligned_be16(const void *p)
+static inline uint16_t get_unaligned_be16(const void *p)
{
- return __get_unaligned_be16((const __u8 *)p);
+ return __get_unaligned_be16((const uint8_t *)p);
}
-static inline __u32 get_unaligned_be32(const void *p)
+static inline uint32_t get_unaligned_be32(const void *p)
{
- return __get_unaligned_be32((const __u8 *)p);
+ return __get_unaligned_be32((const uint8_t *)p);
}
-static inline __u64 get_unaligned_be64(const void *p)
+static inline uint64_t get_unaligned_be64(const void *p)
{
- return __get_unaligned_be64((const __u8 *)p);
+ return __get_unaligned_be64((const uint8_t *)p);
}
-static inline void put_unaligned_be16(__u16 val, void *p)
+static inline void put_unaligned_be16(uint16_t val, void *p)
{
__put_unaligned_be16(val, p);
}
-static inline void put_unaligned_be32(__u32 val, void *p)
+static inline void put_unaligned_be32(uint32_t val, void *p)
{
__put_unaligned_be32(val, p);
}
-static inline void put_unaligned_be64(__u64 val, void *p)
+static inline void put_unaligned_be64(uint64_t val, void *p)
{
__put_unaligned_be64(val, p);
}
diff --git a/tools/include/tools/le_byteshift.h
b/tools/include/tools/le_byteshift.h
index c99d45a..259a132 100644
--- a/tools/include/tools/le_byteshift.h
+++ b/tools/include/tools/le_byteshift.h
@@ -1,68 +1,68 @@
#ifndef _TOOLS_LE_BYTESHIFT_H
#define _TOOLS_LE_BYTESHIFT_H
-#include
+#include
-static inline __u16 __get_unaligned_le16(const __u8 *p)
+static inline uint16_t __get_unaligned_le16(const uint8_t *p)
{
return p[0] | p[1] << 8;
}
-static inline __u32 __get_unaligned_le32(const __u8 *p)
+static inline uint32_t __get_unaligned_le32(const uint8_t *p)
{
return p[0] | p[1] << 8 | p[2] << 16 | p[3] << 24;
}
-static inline __u64 __get_unaligned_le64(const __u8 *p)
+static inline uint64_t __get_unaligned_le64(const uint8_t *p)
{
- return (__u64)__get_unaligned_le32(p + 4) << 32 |
+ return (uint64_t)__get_unaligned_le32(p + 4) << 32 |
__get_unaligned_le32(p);
}
-static inline void __put_unaligned_le16(__u16 val, __u8 *p)
+static inline void __put_unaligned_le16(uint16_t val, uint8_t *p)
{
*p++ = val;
*p++ = val >> 8;
}
-static inline void __put_unaligned_le32(__u32 val, __u8 *p)
+static inline void __put_unaligned_le32(uint32_t val, uint8_t *p)
{
__put_unaligned_le16(val >> 16, p + 2);
__put_unaligned_le16(val, p);
}
-static inline void __put_unaligned_le64(__u64 val, __u8 *p)
+static inline void __put_unaligned_le64(uint64_t val, uint8_t *p)
{
__put_unaligned_le32(val >> 32, p + 4);
__put_unaligned_le32(val, p);
}
-static inline __u16 get_unaligned_le16(const void *p)
+st
[RESEND PATCH] Remove trailing whitespace in arch/arm/Makefile
Signed-off-by: Daniel Tang --- arch/arm/Makefile | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/Makefile b/arch/arm/Makefile index ee4605f..479b209 100644 --- a/arch/arm/Makefile +++ b/arch/arm/Makefile @@ -313,7 +313,7 @@ define archhelp echo ' Image - Uncompressed kernel image (arch/$(ARCH)/boot/Image)' echo '* xipImage - XIP kernel image, if configured (arch/$(ARCH)/boot/xipImage)' echo ' uImage- U-Boot wrapped zImage' - echo ' bootpImage- Combined zImage and initial RAM disk' + echo ' bootpImage- Combined zImage and initial RAM disk' echo ' (supply initrd image via make variable INITRD=)' echo '* dtbs - Build device tree blobs for enabled boards' echo ' install - Install uncompressed kernel' -- 1.8.1.3-- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[RESEND PATCH] Remove trailing whitespace in arch/arm/Makefile
Signed-off-by: Daniel Tang dt.ta...@gmail.com --- arch/arm/Makefile | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/Makefile b/arch/arm/Makefile index ee4605f..479b209 100644 --- a/arch/arm/Makefile +++ b/arch/arm/Makefile @@ -313,7 +313,7 @@ define archhelp echo ' Image - Uncompressed kernel image (arch/$(ARCH)/boot/Image)' echo '* xipImage - XIP kernel image, if configured (arch/$(ARCH)/boot/xipImage)' echo ' uImage- U-Boot wrapped zImage' - echo ' bootpImage- Combined zImage and initial RAM disk' + echo ' bootpImage- Combined zImage and initial RAM disk' echo ' (supply initrd image via make variable INITRD=path)' echo '* dtbs - Build device tree blobs for enabled boards' echo ' install - Install uncompressed kernel' -- 1.8.1.3-- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[RFC PATCH] Fix sortextable building on non-Linux systems
The file scripts/sortextable.c fails to compile on non-Linux systems due to the
missing 'linux/types.h' header.
Unless I'm missing something obvious, including the standard 'inttypes.h'
header instead and using uintX_t types instead of __uX types does the exact
same job and doesn't break compilation on non-Linux systems.
Signed-off-by: Daniel Tang dt.ta...@gmail.com
---
tools/include/tools/be_byteshift.h | 34 +-
tools/include/tools/le_byteshift.h | 34 +-
2 files changed, 34 insertions(+), 34 deletions(-)
diff --git a/tools/include/tools/be_byteshift.h
b/tools/include/tools/be_byteshift.h
index f4912e2..d51fe26 100644
--- a/tools/include/tools/be_byteshift.h
+++ b/tools/include/tools/be_byteshift.h
@@ -1,68 +1,68 @@
#ifndef _TOOLS_BE_BYTESHIFT_H
#define _TOOLS_BE_BYTESHIFT_H
-#include linux/types.h
+#include inttypes.h
-static inline __u16 __get_unaligned_be16(const __u8 *p)
+static inline uint16_t __get_unaligned_be16(const uint8_t *p)
{
return p[0] 8 | p[1];
}
-static inline __u32 __get_unaligned_be32(const __u8 *p)
+static inline uint32_t __get_unaligned_be32(const uint8_t *p)
{
return p[0] 24 | p[1] 16 | p[2] 8 | p[3];
}
-static inline __u64 __get_unaligned_be64(const __u8 *p)
+static inline uint64_t __get_unaligned_be64(const uint8_t *p)
{
- return (__u64)__get_unaligned_be32(p) 32 |
+ return (uint64_t)__get_unaligned_be32(p) 32 |
__get_unaligned_be32(p + 4);
}
-static inline void __put_unaligned_be16(__u16 val, __u8 *p)
+static inline void __put_unaligned_be16(uint16_t val, uint8_t *p)
{
*p++ = val 8;
*p++ = val;
}
-static inline void __put_unaligned_be32(__u32 val, __u8 *p)
+static inline void __put_unaligned_be32(uint32_t val, uint8_t *p)
{
__put_unaligned_be16(val 16, p);
__put_unaligned_be16(val, p + 2);
}
-static inline void __put_unaligned_be64(__u64 val, __u8 *p)
+static inline void __put_unaligned_be64(uint64_t val, uint8_t *p)
{
__put_unaligned_be32(val 32, p);
__put_unaligned_be32(val, p + 4);
}
-static inline __u16 get_unaligned_be16(const void *p)
+static inline uint16_t get_unaligned_be16(const void *p)
{
- return __get_unaligned_be16((const __u8 *)p);
+ return __get_unaligned_be16((const uint8_t *)p);
}
-static inline __u32 get_unaligned_be32(const void *p)
+static inline uint32_t get_unaligned_be32(const void *p)
{
- return __get_unaligned_be32((const __u8 *)p);
+ return __get_unaligned_be32((const uint8_t *)p);
}
-static inline __u64 get_unaligned_be64(const void *p)
+static inline uint64_t get_unaligned_be64(const void *p)
{
- return __get_unaligned_be64((const __u8 *)p);
+ return __get_unaligned_be64((const uint8_t *)p);
}
-static inline void put_unaligned_be16(__u16 val, void *p)
+static inline void put_unaligned_be16(uint16_t val, void *p)
{
__put_unaligned_be16(val, p);
}
-static inline void put_unaligned_be32(__u32 val, void *p)
+static inline void put_unaligned_be32(uint32_t val, void *p)
{
__put_unaligned_be32(val, p);
}
-static inline void put_unaligned_be64(__u64 val, void *p)
+static inline void put_unaligned_be64(uint64_t val, void *p)
{
__put_unaligned_be64(val, p);
}
diff --git a/tools/include/tools/le_byteshift.h
b/tools/include/tools/le_byteshift.h
index c99d45a..259a132 100644
--- a/tools/include/tools/le_byteshift.h
+++ b/tools/include/tools/le_byteshift.h
@@ -1,68 +1,68 @@
#ifndef _TOOLS_LE_BYTESHIFT_H
#define _TOOLS_LE_BYTESHIFT_H
-#include linux/types.h
+#include inttypes.h
-static inline __u16 __get_unaligned_le16(const __u8 *p)
+static inline uint16_t __get_unaligned_le16(const uint8_t *p)
{
return p[0] | p[1] 8;
}
-static inline __u32 __get_unaligned_le32(const __u8 *p)
+static inline uint32_t __get_unaligned_le32(const uint8_t *p)
{
return p[0] | p[1] 8 | p[2] 16 | p[3] 24;
}
-static inline __u64 __get_unaligned_le64(const __u8 *p)
+static inline uint64_t __get_unaligned_le64(const uint8_t *p)
{
- return (__u64)__get_unaligned_le32(p + 4) 32 |
+ return (uint64_t)__get_unaligned_le32(p + 4) 32 |
__get_unaligned_le32(p);
}
-static inline void __put_unaligned_le16(__u16 val, __u8 *p)
+static inline void __put_unaligned_le16(uint16_t val, uint8_t *p)
{
*p++ = val;
*p++ = val 8;
}
-static inline void __put_unaligned_le32(__u32 val, __u8 *p)
+static inline void __put_unaligned_le32(uint32_t val, uint8_t *p)
{
__put_unaligned_le16(val 16, p + 2);
__put_unaligned_le16(val, p);
}
-static inline void __put_unaligned_le64(__u64 val, __u8 *p)
+static inline void __put_unaligned_le64(uint64_t val, uint8_t *p)
{
__put_unaligned_le32(val 32, p + 4);
__put_unaligned_le32(val, p);
}
-static inline __u16 get_unaligned_le16(const void *p)
+static inline uint16_t get_unaligned_le16(const void *p)
{
- return
Re: [RFC PATCHv2 arm: initial TI-Nspire support]
On 11/04/2013, at 10:30 PM, Arnd Bergmann wrote:
> On Thursday 11 April 2013, Daniel Tang wrote:
>> This is another updated patch for Linux on TI-Nspire support.
>>
>> Apologies for previously posting updated patches as replies to the first
>> thread. I'll send updated patches in new threads from now to avoid confusion.
>>
>> Changes between
>> http://archive.arm.linux.org.uk/lurker/message/20130408.113343.585af217.en.html
>> and v2:
>> * Added new drivers to support the irqchip and timers on older models.
>> * Added new device trees to support the other models.
>>
>> Signed-off-by: Daniel Tang
>
> Nice!
>
>> arch/arm/Kconfig| 2 +
>> arch/arm/Kconfig.debug | 16 ++
>> arch/arm/Makefile | 1 +
>> arch/arm/boot/dts/Makefile | 3 +
>> arch/arm/boot/dts/nspire-classic.dtsi | 68 ++
>> arch/arm/boot/dts/nspire-clp.dts| 45
>> arch/arm/boot/dts/nspire-cx.dts | 115 ++
>> arch/arm/boot/dts/nspire-tp.dts | 44
>> arch/arm/boot/dts/nspire.dtsi | 159 ++
>> arch/arm/include/debug/nspire.S | 28 +++
>> arch/arm/mach-nspire/Kconfig| 15 ++
>> arch/arm/mach-nspire/Makefile | 2 +
>> arch/arm/mach-nspire/Makefile.boot | 0
>> arch/arm/mach-nspire/clcd.c | 118 +++
>> arch/arm/mach-nspire/clcd.h | 14 ++
>> arch/arm/mach-nspire/mmio.h | 15 ++
>> arch/arm/mach-nspire/nspire.c | 142 +
>> drivers/clocksource/Makefile| 1 +
>> drivers/clocksource/nspire-classic-timer.c | 216 +++
>> drivers/input/keyboard/Kconfig | 10 +
>> drivers/input/keyboard/Makefile | 1 +
>> drivers/input/keyboard/nspire-keypad.c | 316
>>
>> drivers/irqchip/Makefile| 1 +
>> drivers/irqchip/irq-nspire-classic.c| 177
>> include/clocksource/nspire_classic_timer.h | 16 ++
>> include/linux/platform_data/nspire-keypad.h | 28 +++
>> 26 files changed, 1553 insertions(+)
>
> Please split this up into a series of patches, one for each subsystem.
> I would also keep the dts files in a separate patch from the platform
> code.
Fair enough. I'll keep that in mind for the next round of patches.
>
>
>> +bool timer_init;
>> +
>> +void __init nspire_classic_timer_init(void)
>> +{
>> +struct device_node *node;
>> +
>> +if (timer_init)
>> +return;
>> +
>> +for_each_compatible_node(node, NULL, DT_COMPAT) {
>> +nspire_timer_add(node);
>> +}
>> +
>> +timer_init = 1;
>> +}
>> +
>> +CLOCKSOURCE_OF_DECLARE(nspire_classic_timer,
>> +DT_COMPAT, nspire_classic_timer_init)
>
> Why do you need the logic to prevent it from being initilized
> twice? Can't you just remove the direct call to nspire_classic_timer_init
> from platform code and rely on of_clk_init() to call it?
>
Ah, I wasn't aware that of_clk_init() would call the init functions. I thought
it was up to clocksource_of_init() to do that.
Originally, I was adding a call to clocksource_of_init() to the platform code
but that resulted in the timers being added twice. If of_clk_init() already
calls the init functions, that would explain it.
> Note that the interface has changed in linux-next, you now
> get called separately for each matching device, with the device_node
> as the argument, so you no longer have to search the device tree,
> and can essentially do
>
> CLOCKSOURCE_OF_DECLARE(nspire_classic_timer, DT_COMPAT, nspire_timer_add);
>
> Feel free to rebase your patch on top of the clksrc/cleanup branch
> in arm-soc to get the new behavior.
That's perfect. That'll also let me kick the whole timer_init boolean thing.
>
>> diff --git a/include/linux/platform_data/nspire-keypad.h
>> b/include/linux/platform_data/nspire-keypad.h
>> new file mode 100644
>> index 000..03deb64
>> --- /dev/null
>> +++ b/include/linux/platform_data/nspire-keypad.h
>
> And this file now also isn't needed any more, you can just merge the
> fields of struct nspire_keypad_data into struct nspire_keypad.
>
> Arnd
Thanks again,
tangrs--
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[RFC PATCHv2 arm: initial TI-Nspire support]
This is another updated patch for Linux on TI-Nspire support. Apologies for previously posting updated patches as replies to the first thread. I'll send updated patches in new threads from now to avoid confusion. Changes between http://archive.arm.linux.org.uk/lurker/message/20130408.113343.585af217.en.html and v2: * Added new drivers to support the irqchip and timers on older models. * Added new device trees to support the other models. Signed-off-by: Daniel Tang --- arch/arm/Kconfig| 2 + arch/arm/Kconfig.debug | 16 ++ arch/arm/Makefile | 1 + arch/arm/boot/dts/Makefile | 3 + arch/arm/boot/dts/nspire-classic.dtsi | 68 ++ arch/arm/boot/dts/nspire-clp.dts| 45 arch/arm/boot/dts/nspire-cx.dts | 115 ++ arch/arm/boot/dts/nspire-tp.dts | 44 arch/arm/boot/dts/nspire.dtsi | 159 ++ arch/arm/include/debug/nspire.S | 28 +++ arch/arm/mach-nspire/Kconfig| 15 ++ arch/arm/mach-nspire/Makefile | 2 + arch/arm/mach-nspire/Makefile.boot | 0 arch/arm/mach-nspire/clcd.c | 118 +++ arch/arm/mach-nspire/clcd.h | 14 ++ arch/arm/mach-nspire/mmio.h | 15 ++ arch/arm/mach-nspire/nspire.c | 142 + drivers/clocksource/Makefile| 1 + drivers/clocksource/nspire-classic-timer.c | 216 +++ drivers/input/keyboard/Kconfig | 10 + drivers/input/keyboard/Makefile | 1 + drivers/input/keyboard/nspire-keypad.c | 316 drivers/irqchip/Makefile| 1 + drivers/irqchip/irq-nspire-classic.c| 177 include/clocksource/nspire_classic_timer.h | 16 ++ include/linux/platform_data/nspire-keypad.h | 28 +++ 26 files changed, 1553 insertions(+) diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 1cacda4..3f0cd8c 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -1081,6 +1081,8 @@ source "arch/arm/mach-netx/Kconfig" source "arch/arm/mach-nomadik/Kconfig" +source "arch/arm/mach-nspire/Kconfig" + source "arch/arm/plat-omap/Kconfig" source "arch/arm/mach-omap1/Kconfig" diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug index 9b31f43..5da3a50 100644 --- a/arch/arm/Kconfig.debug +++ b/arch/arm/Kconfig.debug @@ -298,6 +298,20 @@ choice Say Y here if you want kernel low-level debugging support on MVEBU based platforms. + config DEBUG_NSPIRE_CLASSIC_UART + bool "Kernel low-level debugging via TI-NSPIRE 8250 UART" + depends on ARCH_NSPIRE + help + Say Y here if you want kernel low-level debugging support + on TI-NSPIRE classic models. + + config DEBUG_NSPIRE_CX_UART + bool "Kernel low-level debugging via TI-NSPIRE PL011 UART" + depends on ARCH_NSPIRE + help + Say Y here if you want kernel low-level debugging support + on TI-NSPIRE CX models. + config DEBUG_OMAP2PLUS_UART bool "Kernel low-level debugging messages via OMAP2PLUS UART" depends on ARCH_OMAP2PLUS @@ -591,6 +605,8 @@ config DEBUG_LL_INCLUDE DEBUG_IMX6Q_UART default "debug/highbank.S" if DEBUG_HIGHBANK_UART default "debug/mvebu.S" if DEBUG_MVEBU_UART + default "debug/nspire.S" if DEBUG_NSPIRE_CX_UART || \ + DEBUG_NSPIRE_CLASSIC_UART default "debug/omap2plus.S" if DEBUG_OMAP2PLUS_UART default "debug/picoxcell.S" if DEBUG_PICOXCELL_UART default "debug/socfpga.S" if DEBUG_SOCFPGA_UART diff --git a/arch/arm/Makefile b/arch/arm/Makefile index ee4605f..2580d2b 100644 --- a/arch/arm/Makefile +++ b/arch/arm/Makefile @@ -165,6 +165,7 @@ machine-$(CONFIG_ARCH_MXS) += mxs machine-$(CONFIG_ARCH_MVEBU) += mvebu machine-$(CONFIG_ARCH_NETX)+= netx machine-$(CONFIG_ARCH_NOMADIK) += nomadik +machine-$(CONFIG_ARCH_NSPIRE) += nspire machine-$(CONFIG_ARCH_OMAP1) += omap1 machine-$(CONFIG_ARCH_OMAP2PLUS) += omap2 machine-$(CONFIG_ARCH_ORION5X) += orion5x diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index 9c62558..21d161b 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -114,6 +114,9 @@ dtb-$(CONFIG_ARCH_MXS) += imx23-evk.dtb \ imx28-sps1.dtb \ imx28-tx28.dtb dtb-$(CONFIG_ARCH_NOMADIK) += ste-nomadik-s8815.dtb +dtb-$(CONFIG_ARCH_NSPIRE) += nspire-cx.dtb \ + nspire-tp.d
[RFC PATCHv2 arm: initial TI-Nspire support]
This is another updated patch for Linux on TI-Nspire support. Apologies for previously posting updated patches as replies to the first thread. I'll send updated patches in new threads from now to avoid confusion. Changes between http://archive.arm.linux.org.uk/lurker/message/20130408.113343.585af217.en.html and v2: * Added new drivers to support the irqchip and timers on older models. * Added new device trees to support the other models. Signed-off-by: Daniel Tang dt.ta...@gmail.com --- arch/arm/Kconfig| 2 + arch/arm/Kconfig.debug | 16 ++ arch/arm/Makefile | 1 + arch/arm/boot/dts/Makefile | 3 + arch/arm/boot/dts/nspire-classic.dtsi | 68 ++ arch/arm/boot/dts/nspire-clp.dts| 45 arch/arm/boot/dts/nspire-cx.dts | 115 ++ arch/arm/boot/dts/nspire-tp.dts | 44 arch/arm/boot/dts/nspire.dtsi | 159 ++ arch/arm/include/debug/nspire.S | 28 +++ arch/arm/mach-nspire/Kconfig| 15 ++ arch/arm/mach-nspire/Makefile | 2 + arch/arm/mach-nspire/Makefile.boot | 0 arch/arm/mach-nspire/clcd.c | 118 +++ arch/arm/mach-nspire/clcd.h | 14 ++ arch/arm/mach-nspire/mmio.h | 15 ++ arch/arm/mach-nspire/nspire.c | 142 + drivers/clocksource/Makefile| 1 + drivers/clocksource/nspire-classic-timer.c | 216 +++ drivers/input/keyboard/Kconfig | 10 + drivers/input/keyboard/Makefile | 1 + drivers/input/keyboard/nspire-keypad.c | 316 drivers/irqchip/Makefile| 1 + drivers/irqchip/irq-nspire-classic.c| 177 include/clocksource/nspire_classic_timer.h | 16 ++ include/linux/platform_data/nspire-keypad.h | 28 +++ 26 files changed, 1553 insertions(+) diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 1cacda4..3f0cd8c 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -1081,6 +1081,8 @@ source arch/arm/mach-netx/Kconfig source arch/arm/mach-nomadik/Kconfig +source arch/arm/mach-nspire/Kconfig + source arch/arm/plat-omap/Kconfig source arch/arm/mach-omap1/Kconfig diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug index 9b31f43..5da3a50 100644 --- a/arch/arm/Kconfig.debug +++ b/arch/arm/Kconfig.debug @@ -298,6 +298,20 @@ choice Say Y here if you want kernel low-level debugging support on MVEBU based platforms. + config DEBUG_NSPIRE_CLASSIC_UART + bool Kernel low-level debugging via TI-NSPIRE 8250 UART + depends on ARCH_NSPIRE + help + Say Y here if you want kernel low-level debugging support + on TI-NSPIRE classic models. + + config DEBUG_NSPIRE_CX_UART + bool Kernel low-level debugging via TI-NSPIRE PL011 UART + depends on ARCH_NSPIRE + help + Say Y here if you want kernel low-level debugging support + on TI-NSPIRE CX models. + config DEBUG_OMAP2PLUS_UART bool Kernel low-level debugging messages via OMAP2PLUS UART depends on ARCH_OMAP2PLUS @@ -591,6 +605,8 @@ config DEBUG_LL_INCLUDE DEBUG_IMX6Q_UART default debug/highbank.S if DEBUG_HIGHBANK_UART default debug/mvebu.S if DEBUG_MVEBU_UART + default debug/nspire.S if DEBUG_NSPIRE_CX_UART || \ + DEBUG_NSPIRE_CLASSIC_UART default debug/omap2plus.S if DEBUG_OMAP2PLUS_UART default debug/picoxcell.S if DEBUG_PICOXCELL_UART default debug/socfpga.S if DEBUG_SOCFPGA_UART diff --git a/arch/arm/Makefile b/arch/arm/Makefile index ee4605f..2580d2b 100644 --- a/arch/arm/Makefile +++ b/arch/arm/Makefile @@ -165,6 +165,7 @@ machine-$(CONFIG_ARCH_MXS) += mxs machine-$(CONFIG_ARCH_MVEBU) += mvebu machine-$(CONFIG_ARCH_NETX)+= netx machine-$(CONFIG_ARCH_NOMADIK) += nomadik +machine-$(CONFIG_ARCH_NSPIRE) += nspire machine-$(CONFIG_ARCH_OMAP1) += omap1 machine-$(CONFIG_ARCH_OMAP2PLUS) += omap2 machine-$(CONFIG_ARCH_ORION5X) += orion5x diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index 9c62558..21d161b 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -114,6 +114,9 @@ dtb-$(CONFIG_ARCH_MXS) += imx23-evk.dtb \ imx28-sps1.dtb \ imx28-tx28.dtb dtb-$(CONFIG_ARCH_NOMADIK) += ste-nomadik-s8815.dtb +dtb-$(CONFIG_ARCH_NSPIRE) += nspire-cx.dtb \ + nspire-tp.dtb \ + nspire-clp.dtb dtb-$(CONFIG_ARCH_OMAP2PLUS) += omap2420-h4.dtb \ omap3-beagle.dtb \ omap3-beagle-xm.dtb \ diff --git a/arch
Re: [RFC PATCHv2 arm: initial TI-Nspire support]
On 11/04/2013, at 10:30 PM, Arnd Bergmann a...@arndb.de wrote:
On Thursday 11 April 2013, Daniel Tang wrote:
This is another updated patch for Linux on TI-Nspire support.
Apologies for previously posting updated patches as replies to the first
thread. I'll send updated patches in new threads from now to avoid confusion.
Changes between
http://archive.arm.linux.org.uk/lurker/message/20130408.113343.585af217.en.html
and v2:
* Added new drivers to support the irqchip and timers on older models.
* Added new device trees to support the other models.
Signed-off-by: Daniel Tang dt.ta...@gmail.com
Nice!
arch/arm/Kconfig| 2 +
arch/arm/Kconfig.debug | 16 ++
arch/arm/Makefile | 1 +
arch/arm/boot/dts/Makefile | 3 +
arch/arm/boot/dts/nspire-classic.dtsi | 68 ++
arch/arm/boot/dts/nspire-clp.dts| 45
arch/arm/boot/dts/nspire-cx.dts | 115 ++
arch/arm/boot/dts/nspire-tp.dts | 44
arch/arm/boot/dts/nspire.dtsi | 159 ++
arch/arm/include/debug/nspire.S | 28 +++
arch/arm/mach-nspire/Kconfig| 15 ++
arch/arm/mach-nspire/Makefile | 2 +
arch/arm/mach-nspire/Makefile.boot | 0
arch/arm/mach-nspire/clcd.c | 118 +++
arch/arm/mach-nspire/clcd.h | 14 ++
arch/arm/mach-nspire/mmio.h | 15 ++
arch/arm/mach-nspire/nspire.c | 142 +
drivers/clocksource/Makefile| 1 +
drivers/clocksource/nspire-classic-timer.c | 216 +++
drivers/input/keyboard/Kconfig | 10 +
drivers/input/keyboard/Makefile | 1 +
drivers/input/keyboard/nspire-keypad.c | 316
drivers/irqchip/Makefile| 1 +
drivers/irqchip/irq-nspire-classic.c| 177
include/clocksource/nspire_classic_timer.h | 16 ++
include/linux/platform_data/nspire-keypad.h | 28 +++
26 files changed, 1553 insertions(+)
Please split this up into a series of patches, one for each subsystem.
I would also keep the dts files in a separate patch from the platform
code.
Fair enough. I'll keep that in mind for the next round of patches.
+bool timer_init;
+
+void __init nspire_classic_timer_init(void)
+{
+struct device_node *node;
+
+if (timer_init)
+return;
+
+for_each_compatible_node(node, NULL, DT_COMPAT) {
+nspire_timer_add(node);
+}
+
+timer_init = 1;
+}
+
+CLOCKSOURCE_OF_DECLARE(nspire_classic_timer,
+DT_COMPAT, nspire_classic_timer_init)
Why do you need the logic to prevent it from being initilized
twice? Can't you just remove the direct call to nspire_classic_timer_init
from platform code and rely on of_clk_init() to call it?
Ah, I wasn't aware that of_clk_init() would call the init functions. I thought
it was up to clocksource_of_init() to do that.
Originally, I was adding a call to clocksource_of_init() to the platform code
but that resulted in the timers being added twice. If of_clk_init() already
calls the init functions, that would explain it.
Note that the interface has changed in linux-next, you now
get called separately for each matching device, with the device_node
as the argument, so you no longer have to search the device tree,
and can essentially do
CLOCKSOURCE_OF_DECLARE(nspire_classic_timer, DT_COMPAT, nspire_timer_add);
Feel free to rebase your patch on top of the clksrc/cleanup branch
in arm-soc to get the new behavior.
That's perfect. That'll also let me kick the whole timer_init boolean thing.
diff --git a/include/linux/platform_data/nspire-keypad.h
b/include/linux/platform_data/nspire-keypad.h
new file mode 100644
index 000..03deb64
--- /dev/null
+++ b/include/linux/platform_data/nspire-keypad.h
And this file now also isn't needed any more, you can just merge the
fields of struct nspire_keypad_data into struct nspire_keypad.
Arnd
Thanks again,
tangrs--
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Re: [RFC PATCH arm: initial TI-Nspire support]
Hi,
Thanks for your comments! They're much appreciated.
Just to bring you up to speed, we decided to begin reimplementing the machine
from scratch and slowly pull things in from the original patch. Arnd pointed
out a lot of fundamental issues with our patch so we thought it'd be better to
just start over instead of patch things up.
The latest copy of our patch is somewhere in this thread
(http://archive.arm.linux.org.uk/lurker/message/20130408.113343.585af217.en.html)
which will have already addressed some of the problems you've pointed out
(using the device tree being a major one). We would also appreciate it if you
could take a look at that one too.
On 09/04/2013, at 9:14 PM, Linus Walleij wrote:
>>
>> +union reg_clk_speed {
>> + unsigned long raw;
>> + struct {
>> + unsigned long __padding0:1;
>> + unsigned long base_cpu_ratio:7;
>> + unsigned long is_base_27mhz:1;
>> + unsigned long __padding1:3;
>> + unsigned long cpu_ahb_ratio:3;
>> + unsigned long __padding2:1;
>> + unsigned long base_val:5;
>> + } val;
>> +};
> Usually to try to fit a struct over a register range is not such a good
> idea in Linux.
>
> Instead define abstract representations of what you want to do
> (remove everything named "padding" above, use proper data types instead
> of these unsigned longs and that complex union) then use offsets to
> registers and remap the base offset in memory.
>
> It makes for simpler debugging and ability to properly use read|write[lwb]
> macros.
The structure is actually a bitfield. We'd readl() the raw unsigned long into
the 'raw' field and then access the data via the 'val' structure.
Should we be using bitmasks and bitshifting to get at those values instead?
>
>> +static unsigned long classic_clocks_to_io(struct nspire_clk_speeds *clks)
>> +{
>> + union reg_clk_speed reg;
>> +
>> + BUG_ON(clks->div.base_cpu < 2);
>> + BUG_ON(clks->div.cpu_ahb < 1);
>> +
>> + reg.raw = 0;
>> + reg.val.base_cpu_ratio = clks->div.base_cpu / 2;
>> + reg.val.cpu_ahb_ratio = clks->div.cpu_ahb - 1;
>> + reg.val.is_base_27mhz = (clks->base <= 2700);
>> + reg.val.base_val = (300 - (clks->base / 100)) / 6;
>> +
>> + return reg.raw;
>> +}
>
> And that avoid having to create special helper functions like this.
>
Fair enough.
>
>> + int irqnr = readl(base + 0x24);
>> + unsigned prev_priority;
>> + handle_IRQ(irqnr, regs);
>> +
>> + /* Reset priorities */
>> + prev_priority = readl(IOMEM(NSPIRE_INTERRUPT_VIRT_BASE +
>> 0x28));
>> + writel(prev_priority, IOMEM(NSPIRE_INTERRUPT_VIRT_BASE +
>> 0x2c));
>> + return 1;
>> + }
>> + return 0;
>> +}
>
> I don't understand this, put in some explanation of what this function
> does please.
Yep gotcha. In future patches, we'll also put the magic numbers into proper
defines.
>
>> +asmlinkage void __exception_irq_entry
>> + nspire_classic_handle_irq(struct pt_regs *regs)
>> +{
>> + int serviced;
>> +
>> + do {
>> + void __iomem *reg_base = IOMEM(NSPIRE_INTERRUPT_VIRT_BASE);
>
> Instead of casting this in every IRQ entry define a static local
> in the irq driver file to point to the base.
>
> Avoids time in the IRQ handler, so it obviously the right thing to do.
>
> Please also use a dynamic remapping ioremap* insteaf of
> this static IOMEM() thing.
>
>> + serviced = 0;
>> +
>> + /* IRQ */
>> + serviced += check_interrupt(reg_base, regs);
>> + /* FIQ */
>> + serviced += check_interrupt(reg_base + 0x100, regs);
>
> Should you now handle FIQs first at all times?
Ah yes, that would make sense.
>
> Hm, looks like you just forgot to select GENERIC_CLOCKEVENTS?
>
> Strange if it works anyway :-/
>
> We are comtemplating putting these things into drivers/timer,
> nothing decided yet.
That's fine, we'll deal with it when we pull this file into the 'good' patch.
>
> Not only should this be done from devicetree, but exactly which
> synaptics driver are you using with this?
>
> I don't think there is one in the kernel tree yet.
>
It's this one here
http://lxr.free-electrons.com/source/drivers/input/mouse/synaptics_i2c.c
>
>
> And with device tree it goes irrelevant.
Yep, this has been addressed in our updated patch.
>
> Yours,
> Linus Walleij
Also, how would you like us to submit updates? Should we continue posting
updated patches as replies to this thread?
Cheers,
tangrs--
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Re: [RFC PATCH arm: initial TI-Nspire support]
On 09/04/2013, at 5:16 AM, Fabian Vogt wrote: > The latest kernel it seems to get stuck at > console_lock() in register_framebuffer (drivers/video/fbmem.c:1655) > if the LCD-controller is enabled. (Early printk and serial console works fine) > CONFIG_NO_HZ is not activated, it works completely. > Could this be a kernel bug or is this an issue with our timer configuration? Even with the CONFIG_NO_HZ option disabled, I've found that probing of our LCD hardware sometimes still fail with an error of -2. Depending on how I arrange the device tree or the contents of the boot arguments or, as said, the CONFIG_NO_HZ option, I get different behaviours ranging from: * Getting a -2 error during device probe (possibly due to a clock not being found). * LCD hardware is found but boot hangs right after the driver is initialised. * LCD hardware is apparently initialised correctly and text appears onscreen but user mode init hangs and I never get to a shell prompt. This smells of a race condition that occurs before the clcd driver even gets to initialise. Some bug in our timer code? A OF or console bug perhaps? Though, I'm a bit hesitant to blame it on a kernel subsystem bug until it's clear that our code isn't at fault. Any suggestions?-- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Re: [RFC PATCH arm: initial TI-Nspire support]
On 09/04/2013, at 5:16 AM, Fabian Vogt fab...@ritter-vogt.de wrote: The latest kernel it seems to get stuck at console_lock() in register_framebuffer (drivers/video/fbmem.c:1655) if the LCD-controller is enabled. (Early printk and serial console works fine) CONFIG_NO_HZ is not activated, it works completely. Could this be a kernel bug or is this an issue with our timer configuration? Even with the CONFIG_NO_HZ option disabled, I've found that probing of our LCD hardware sometimes still fail with an error of -2. Depending on how I arrange the device tree or the contents of the boot arguments or, as said, the CONFIG_NO_HZ option, I get different behaviours ranging from: * Getting a -2 error during device probe (possibly due to a clock not being found). * LCD hardware is found but boot hangs right after the driver is initialised. * LCD hardware is apparently initialised correctly and text appears onscreen but user mode init hangs and I never get to a shell prompt. This smells of a race condition that occurs before the clcd driver even gets to initialise. Some bug in our timer code? A OF or console bug perhaps? Though, I'm a bit hesitant to blame it on a kernel subsystem bug until it's clear that our code isn't at fault. Any suggestions?-- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Re: [RFC PATCH arm: initial TI-Nspire support]
Hi,
Thanks for your comments! They're much appreciated.
Just to bring you up to speed, we decided to begin reimplementing the machine
from scratch and slowly pull things in from the original patch. Arnd pointed
out a lot of fundamental issues with our patch so we thought it'd be better to
just start over instead of patch things up.
The latest copy of our patch is somewhere in this thread
(http://archive.arm.linux.org.uk/lurker/message/20130408.113343.585af217.en.html)
which will have already addressed some of the problems you've pointed out
(using the device tree being a major one). We would also appreciate it if you
could take a look at that one too.
On 09/04/2013, at 9:14 PM, Linus Walleij linus.wall...@linaro.org wrote:
+union reg_clk_speed {
+ unsigned long raw;
+ struct {
+ unsigned long __padding0:1;
+ unsigned long base_cpu_ratio:7;
+ unsigned long is_base_27mhz:1;
+ unsigned long __padding1:3;
+ unsigned long cpu_ahb_ratio:3;
+ unsigned long __padding2:1;
+ unsigned long base_val:5;
+ } val;
+};
Usually to try to fit a struct over a register range is not such a good
idea in Linux.
Instead define abstract representations of what you want to do
(remove everything named padding above, use proper data types instead
of these unsigned longs and that complex union) then use offsets to
registers and remap the base offset in memory.
It makes for simpler debugging and ability to properly use read|write[lwb]
macros.
The structure is actually a bitfield. We'd readl() the raw unsigned long into
the 'raw' field and then access the data via the 'val' structure.
Should we be using bitmasks and bitshifting to get at those values instead?
+static unsigned long classic_clocks_to_io(struct nspire_clk_speeds *clks)
+{
+ union reg_clk_speed reg;
+
+ BUG_ON(clks-div.base_cpu 2);
+ BUG_ON(clks-div.cpu_ahb 1);
+
+ reg.raw = 0;
+ reg.val.base_cpu_ratio = clks-div.base_cpu / 2;
+ reg.val.cpu_ahb_ratio = clks-div.cpu_ahb - 1;
+ reg.val.is_base_27mhz = (clks-base = 2700);
+ reg.val.base_val = (300 - (clks-base / 100)) / 6;
+
+ return reg.raw;
+}
And that avoid having to create special helper functions like this.
Fair enough.
+ int irqnr = readl(base + 0x24);
+ unsigned prev_priority;
+ handle_IRQ(irqnr, regs);
+
+ /* Reset priorities */
+ prev_priority = readl(IOMEM(NSPIRE_INTERRUPT_VIRT_BASE +
0x28));
+ writel(prev_priority, IOMEM(NSPIRE_INTERRUPT_VIRT_BASE +
0x2c));
+ return 1;
+ }
+ return 0;
+}
I don't understand this, put in some explanation of what this function
does please.
Yep gotcha. In future patches, we'll also put the magic numbers into proper
defines.
+asmlinkage void __exception_irq_entry
+ nspire_classic_handle_irq(struct pt_regs *regs)
+{
+ int serviced;
+
+ do {
+ void __iomem *reg_base = IOMEM(NSPIRE_INTERRUPT_VIRT_BASE);
Instead of casting this in every IRQ entry define a static local
in the irq driver file to point to the base.
Avoids time in the IRQ handler, so it obviously the right thing to do.
Please also use a dynamic remapping ioremap* insteaf of
this static IOMEM() thing.
+ serviced = 0;
+
+ /* IRQ */
+ serviced += check_interrupt(reg_base, regs);
+ /* FIQ */
+ serviced += check_interrupt(reg_base + 0x100, regs);
Should you now handle FIQs first at all times?
Ah yes, that would make sense.
Hm, looks like you just forgot to select GENERIC_CLOCKEVENTS?
Strange if it works anyway :-/
We are comtemplating putting these things into drivers/timer,
nothing decided yet.
That's fine, we'll deal with it when we pull this file into the 'good' patch.
Not only should this be done from devicetree, but exactly which
synaptics driver are you using with this?
I don't think there is one in the kernel tree yet.
It's this one here
http://lxr.free-electrons.com/source/drivers/input/mouse/synaptics_i2c.c
And with device tree it goes irrelevant.
Yep, this has been addressed in our updated patch.
Yours,
Linus Walleij
Also, how would you like us to submit updates? Should we continue posting
updated patches as replies to this thread?
Cheers,
tangrs--
To unsubscribe from this list: send the line unsubscribe linux-kernel in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
Re: [RFC PATCH arm: initial TI-Nspire support]
Changes: * Moved CLCD stuff to separate file until DT support for PL11x comes along * Whitespace cleanup in arch/arm/Makefile removed from patch * Rewrote code to find SP804 devices and use the first available one as a clockevent and the rest as clock sources until DT support comes to the SP804 driver. * Fix up platform selection in Kconfig. TI-NSPIRE based option was visible even when ARCH_MULTI_V4_V5 is not selected. * Added keypad driver and keymap * Support for 'make dtbs' Signed-off-by: Daniel Tang --- arch/arm/Kconfig| 2 + arch/arm/Kconfig.debug | 16 ++ arch/arm/Makefile | 1 + arch/arm/boot/dts/Makefile | 1 + arch/arm/boot/dts/nspire-cx.dts | 110 ++ arch/arm/boot/dts/nspire.dtsi | 168 +++ arch/arm/include/debug/nspire.S | 28 +++ arch/arm/mach-nspire/Kconfig| 14 ++ arch/arm/mach-nspire/Makefile | 2 + arch/arm/mach-nspire/Makefile.boot | 0 arch/arm/mach-nspire/clcd.c | 123 +++ arch/arm/mach-nspire/clcd.h | 14 ++ arch/arm/mach-nspire/mmio.h | 15 ++ arch/arm/mach-nspire/nspire.c | 139 drivers/input/keyboard/Kconfig | 10 + drivers/input/keyboard/Makefile | 1 + drivers/input/keyboard/nspire-keypad.c | 318 include/linux/platform_data/nspire-keypad.h | 28 +++ 18 files changed, 990 insertions(+) diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 1cacda4..3f0cd8c 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -1081,6 +1081,8 @@ source "arch/arm/mach-netx/Kconfig" source "arch/arm/mach-nomadik/Kconfig" +source "arch/arm/mach-nspire/Kconfig" + source "arch/arm/plat-omap/Kconfig" source "arch/arm/mach-omap1/Kconfig" diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug index 9b31f43..5da3a50 100644 --- a/arch/arm/Kconfig.debug +++ b/arch/arm/Kconfig.debug @@ -298,6 +298,20 @@ choice Say Y here if you want kernel low-level debugging support on MVEBU based platforms. + config DEBUG_NSPIRE_CLASSIC_UART + bool "Kernel low-level debugging via TI-NSPIRE 8250 UART" + depends on ARCH_NSPIRE + help + Say Y here if you want kernel low-level debugging support + on TI-NSPIRE classic models. + + config DEBUG_NSPIRE_CX_UART + bool "Kernel low-level debugging via TI-NSPIRE PL011 UART" + depends on ARCH_NSPIRE + help + Say Y here if you want kernel low-level debugging support + on TI-NSPIRE CX models. + config DEBUG_OMAP2PLUS_UART bool "Kernel low-level debugging messages via OMAP2PLUS UART" depends on ARCH_OMAP2PLUS @@ -591,6 +605,8 @@ config DEBUG_LL_INCLUDE DEBUG_IMX6Q_UART default "debug/highbank.S" if DEBUG_HIGHBANK_UART default "debug/mvebu.S" if DEBUG_MVEBU_UART + default "debug/nspire.S" if DEBUG_NSPIRE_CX_UART || \ + DEBUG_NSPIRE_CLASSIC_UART default "debug/omap2plus.S" if DEBUG_OMAP2PLUS_UART default "debug/picoxcell.S" if DEBUG_PICOXCELL_UART default "debug/socfpga.S" if DEBUG_SOCFPGA_UART diff --git a/arch/arm/Makefile b/arch/arm/Makefile index ee4605f..2580d2b 100644 --- a/arch/arm/Makefile +++ b/arch/arm/Makefile @@ -165,6 +165,7 @@ machine-$(CONFIG_ARCH_MXS) += mxs machine-$(CONFIG_ARCH_MVEBU) += mvebu machine-$(CONFIG_ARCH_NETX)+= netx machine-$(CONFIG_ARCH_NOMADIK) += nomadik +machine-$(CONFIG_ARCH_NSPIRE) += nspire machine-$(CONFIG_ARCH_OMAP1) += omap1 machine-$(CONFIG_ARCH_OMAP2PLUS) += omap2 machine-$(CONFIG_ARCH_ORION5X) += orion5x diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index 9c62558..adf8116 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -114,6 +114,7 @@ dtb-$(CONFIG_ARCH_MXS) += imx23-evk.dtb \ imx28-sps1.dtb \ imx28-tx28.dtb dtb-$(CONFIG_ARCH_NOMADIK) += ste-nomadik-s8815.dtb +dtb-$(CONFIG_ARCH_NSPIRE) += nspire-cx.dtb dtb-$(CONFIG_ARCH_OMAP2PLUS) += omap2420-h4.dtb \ omap3-beagle.dtb \ omap3-beagle-xm.dtb \ diff --git a/arch/arm/boot/dts/nspire-cx.dts b/arch/arm/boot/dts/nspire-cx.dts new file mode 100644 index 000..1da2e44 --- /dev/null +++ b/arch/arm/boot/dts/nspire-cx.dts @@ -0,0 +1,110 @@ +/* + * linux/arch/arm/boot/nspire-cx.dts + * + * Copyright (C) 2012 Daniel Tang + * + * This program is free software; you can redist
Re: [RFC PATCH arm: initial TI-Nspire support]
Changes: * Moved CLCD stuff to separate file until DT support for PL11x comes along * Whitespace cleanup in arch/arm/Makefile removed from patch * Rewrote code to find SP804 devices and use the first available one as a clockevent and the rest as clock sources until DT support comes to the SP804 driver. * Fix up platform selection in Kconfig. TI-NSPIRE based option was visible even when ARCH_MULTI_V4_V5 is not selected. * Added keypad driver and keymap * Support for 'make dtbs' Signed-off-by: Daniel Tang dt.ta...@gmail.com --- arch/arm/Kconfig| 2 + arch/arm/Kconfig.debug | 16 ++ arch/arm/Makefile | 1 + arch/arm/boot/dts/Makefile | 1 + arch/arm/boot/dts/nspire-cx.dts | 110 ++ arch/arm/boot/dts/nspire.dtsi | 168 +++ arch/arm/include/debug/nspire.S | 28 +++ arch/arm/mach-nspire/Kconfig| 14 ++ arch/arm/mach-nspire/Makefile | 2 + arch/arm/mach-nspire/Makefile.boot | 0 arch/arm/mach-nspire/clcd.c | 123 +++ arch/arm/mach-nspire/clcd.h | 14 ++ arch/arm/mach-nspire/mmio.h | 15 ++ arch/arm/mach-nspire/nspire.c | 139 drivers/input/keyboard/Kconfig | 10 + drivers/input/keyboard/Makefile | 1 + drivers/input/keyboard/nspire-keypad.c | 318 include/linux/platform_data/nspire-keypad.h | 28 +++ 18 files changed, 990 insertions(+) diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 1cacda4..3f0cd8c 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -1081,6 +1081,8 @@ source arch/arm/mach-netx/Kconfig source arch/arm/mach-nomadik/Kconfig +source arch/arm/mach-nspire/Kconfig + source arch/arm/plat-omap/Kconfig source arch/arm/mach-omap1/Kconfig diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug index 9b31f43..5da3a50 100644 --- a/arch/arm/Kconfig.debug +++ b/arch/arm/Kconfig.debug @@ -298,6 +298,20 @@ choice Say Y here if you want kernel low-level debugging support on MVEBU based platforms. + config DEBUG_NSPIRE_CLASSIC_UART + bool Kernel low-level debugging via TI-NSPIRE 8250 UART + depends on ARCH_NSPIRE + help + Say Y here if you want kernel low-level debugging support + on TI-NSPIRE classic models. + + config DEBUG_NSPIRE_CX_UART + bool Kernel low-level debugging via TI-NSPIRE PL011 UART + depends on ARCH_NSPIRE + help + Say Y here if you want kernel low-level debugging support + on TI-NSPIRE CX models. + config DEBUG_OMAP2PLUS_UART bool Kernel low-level debugging messages via OMAP2PLUS UART depends on ARCH_OMAP2PLUS @@ -591,6 +605,8 @@ config DEBUG_LL_INCLUDE DEBUG_IMX6Q_UART default debug/highbank.S if DEBUG_HIGHBANK_UART default debug/mvebu.S if DEBUG_MVEBU_UART + default debug/nspire.S if DEBUG_NSPIRE_CX_UART || \ + DEBUG_NSPIRE_CLASSIC_UART default debug/omap2plus.S if DEBUG_OMAP2PLUS_UART default debug/picoxcell.S if DEBUG_PICOXCELL_UART default debug/socfpga.S if DEBUG_SOCFPGA_UART diff --git a/arch/arm/Makefile b/arch/arm/Makefile index ee4605f..2580d2b 100644 --- a/arch/arm/Makefile +++ b/arch/arm/Makefile @@ -165,6 +165,7 @@ machine-$(CONFIG_ARCH_MXS) += mxs machine-$(CONFIG_ARCH_MVEBU) += mvebu machine-$(CONFIG_ARCH_NETX)+= netx machine-$(CONFIG_ARCH_NOMADIK) += nomadik +machine-$(CONFIG_ARCH_NSPIRE) += nspire machine-$(CONFIG_ARCH_OMAP1) += omap1 machine-$(CONFIG_ARCH_OMAP2PLUS) += omap2 machine-$(CONFIG_ARCH_ORION5X) += orion5x diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index 9c62558..adf8116 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -114,6 +114,7 @@ dtb-$(CONFIG_ARCH_MXS) += imx23-evk.dtb \ imx28-sps1.dtb \ imx28-tx28.dtb dtb-$(CONFIG_ARCH_NOMADIK) += ste-nomadik-s8815.dtb +dtb-$(CONFIG_ARCH_NSPIRE) += nspire-cx.dtb dtb-$(CONFIG_ARCH_OMAP2PLUS) += omap2420-h4.dtb \ omap3-beagle.dtb \ omap3-beagle-xm.dtb \ diff --git a/arch/arm/boot/dts/nspire-cx.dts b/arch/arm/boot/dts/nspire-cx.dts new file mode 100644 index 000..1da2e44 --- /dev/null +++ b/arch/arm/boot/dts/nspire-cx.dts @@ -0,0 +1,110 @@ +/* + * linux/arch/arm/boot/nspire-cx.dts + * + * Copyright (C) 2012 Daniel Tang tan...@tangrs.id.au + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2, as + * published by the Free Software Foundation
[PATCH] Fix sortextable building on non-Linux systems
Hi,
Is there any reason why 'tools/include/tools/be_byteshift.h' and
'tools/include/tools/le_byteshift.h' needs to include 'linux/types.h'? It
breaks compilation of ARM kernels on OS X since sortextable, which uses those
headers, fails to build because 'linux/types.h' doesn't exist.
Included is a patch that fixes building on non-Linux systems.
Cheers,
tangrs
Signed-off-by: Daniel Tang
---
tools/include/tools/be_byteshift.h | 34 +-
tools/include/tools/le_byteshift.h | 34 +-
2 files changed, 34 insertions(+), 34 deletions(-)
diff --git a/tools/include/tools/be_byteshift.h
b/tools/include/tools/be_byteshift.h
index f4912e2..d51fe26 100644
--- a/tools/include/tools/be_byteshift.h
+++ b/tools/include/tools/be_byteshift.h
@@ -1,68 +1,68 @@
#ifndef _TOOLS_BE_BYTESHIFT_H
#define _TOOLS_BE_BYTESHIFT_H
-#include
+#include
-static inline __u16 __get_unaligned_be16(const __u8 *p)
+static inline uint16_t __get_unaligned_be16(const uint8_t *p)
{
return p[0] << 8 | p[1];
}
-static inline __u32 __get_unaligned_be32(const __u8 *p)
+static inline uint32_t __get_unaligned_be32(const uint8_t *p)
{
return p[0] << 24 | p[1] << 16 | p[2] << 8 | p[3];
}
-static inline __u64 __get_unaligned_be64(const __u8 *p)
+static inline uint64_t __get_unaligned_be64(const uint8_t *p)
{
- return (__u64)__get_unaligned_be32(p) << 32 |
+ return (uint64_t)__get_unaligned_be32(p) << 32 |
__get_unaligned_be32(p + 4);
}
-static inline void __put_unaligned_be16(__u16 val, __u8 *p)
+static inline void __put_unaligned_be16(uint16_t val, uint8_t *p)
{
*p++ = val >> 8;
*p++ = val;
}
-static inline void __put_unaligned_be32(__u32 val, __u8 *p)
+static inline void __put_unaligned_be32(uint32_t val, uint8_t *p)
{
__put_unaligned_be16(val >> 16, p);
__put_unaligned_be16(val, p + 2);
}
-static inline void __put_unaligned_be64(__u64 val, __u8 *p)
+static inline void __put_unaligned_be64(uint64_t val, uint8_t *p)
{
__put_unaligned_be32(val >> 32, p);
__put_unaligned_be32(val, p + 4);
}
-static inline __u16 get_unaligned_be16(const void *p)
+static inline uint16_t get_unaligned_be16(const void *p)
{
- return __get_unaligned_be16((const __u8 *)p);
+ return __get_unaligned_be16((const uint8_t *)p);
}
-static inline __u32 get_unaligned_be32(const void *p)
+static inline uint32_t get_unaligned_be32(const void *p)
{
- return __get_unaligned_be32((const __u8 *)p);
+ return __get_unaligned_be32((const uint8_t *)p);
}
-static inline __u64 get_unaligned_be64(const void *p)
+static inline uint64_t get_unaligned_be64(const void *p)
{
- return __get_unaligned_be64((const __u8 *)p);
+ return __get_unaligned_be64((const uint8_t *)p);
}
-static inline void put_unaligned_be16(__u16 val, void *p)
+static inline void put_unaligned_be16(uint16_t val, void *p)
{
__put_unaligned_be16(val, p);
}
-static inline void put_unaligned_be32(__u32 val, void *p)
+static inline void put_unaligned_be32(uint32_t val, void *p)
{
__put_unaligned_be32(val, p);
}
-static inline void put_unaligned_be64(__u64 val, void *p)
+static inline void put_unaligned_be64(uint64_t val, void *p)
{
__put_unaligned_be64(val, p);
}
diff --git a/tools/include/tools/le_byteshift.h
b/tools/include/tools/le_byteshift.h
index c99d45a..259a132 100644
--- a/tools/include/tools/le_byteshift.h
+++ b/tools/include/tools/le_byteshift.h
@@ -1,68 +1,68 @@
#ifndef _TOOLS_LE_BYTESHIFT_H
#define _TOOLS_LE_BYTESHIFT_H
-#include
+#include
-static inline __u16 __get_unaligned_le16(const __u8 *p)
+static inline uint16_t __get_unaligned_le16(const uint8_t *p)
{
return p[0] | p[1] << 8;
}
-static inline __u32 __get_unaligned_le32(const __u8 *p)
+static inline uint32_t __get_unaligned_le32(const uint8_t *p)
{
return p[0] | p[1] << 8 | p[2] << 16 | p[3] << 24;
}
-static inline __u64 __get_unaligned_le64(const __u8 *p)
+static inline uint64_t __get_unaligned_le64(const uint8_t *p)
{
- return (__u64)__get_unaligned_le32(p + 4) << 32 |
+ return (uint64_t)__get_unaligned_le32(p + 4) << 32 |
__get_unaligned_le32(p);
}
-static inline void __put_unaligned_le16(__u16 val, __u8 *p)
+static inline void __put_unaligned_le16(uint16_t val, uint8_t *p)
{
*p++ = val;
*p++ = val >> 8;
}
-static inline void __put_unaligned_le32(__u32 val, __u8 *p)
+static inline void __put_unaligned_le32(uint32_t val, uint8_t *p)
{
__put_unaligned_le16(val >> 16, p + 2);
__put_unaligned_le16(val, p);
}
-static inline void __put_unaligned_le64(__u64 val, __u8 *p)
+static inline void __put_unaligned_le64(uint64_t val, uint8_t *p)
{
__put_unaligned_le32(val >> 32, p + 4);
[PATCH] Fix sortextable building on non-Linux systems
Hi,
Is there any reason why 'tools/include/tools/be_byteshift.h' and
'tools/include/tools/le_byteshift.h' needs to include 'linux/types.h'? It
breaks compilation of ARM kernels on OS X since sortextable, which uses those
headers, fails to build because 'linux/types.h' doesn't exist.
Included is a patch that fixes building on non-Linux systems.
Cheers,
tangrs
Signed-off-by: Daniel Tang dt.ta...@gmail.com
---
tools/include/tools/be_byteshift.h | 34 +-
tools/include/tools/le_byteshift.h | 34 +-
2 files changed, 34 insertions(+), 34 deletions(-)
diff --git a/tools/include/tools/be_byteshift.h
b/tools/include/tools/be_byteshift.h
index f4912e2..d51fe26 100644
--- a/tools/include/tools/be_byteshift.h
+++ b/tools/include/tools/be_byteshift.h
@@ -1,68 +1,68 @@
#ifndef _TOOLS_BE_BYTESHIFT_H
#define _TOOLS_BE_BYTESHIFT_H
-#include linux/types.h
+#include inttypes.h
-static inline __u16 __get_unaligned_be16(const __u8 *p)
+static inline uint16_t __get_unaligned_be16(const uint8_t *p)
{
return p[0] 8 | p[1];
}
-static inline __u32 __get_unaligned_be32(const __u8 *p)
+static inline uint32_t __get_unaligned_be32(const uint8_t *p)
{
return p[0] 24 | p[1] 16 | p[2] 8 | p[3];
}
-static inline __u64 __get_unaligned_be64(const __u8 *p)
+static inline uint64_t __get_unaligned_be64(const uint8_t *p)
{
- return (__u64)__get_unaligned_be32(p) 32 |
+ return (uint64_t)__get_unaligned_be32(p) 32 |
__get_unaligned_be32(p + 4);
}
-static inline void __put_unaligned_be16(__u16 val, __u8 *p)
+static inline void __put_unaligned_be16(uint16_t val, uint8_t *p)
{
*p++ = val 8;
*p++ = val;
}
-static inline void __put_unaligned_be32(__u32 val, __u8 *p)
+static inline void __put_unaligned_be32(uint32_t val, uint8_t *p)
{
__put_unaligned_be16(val 16, p);
__put_unaligned_be16(val, p + 2);
}
-static inline void __put_unaligned_be64(__u64 val, __u8 *p)
+static inline void __put_unaligned_be64(uint64_t val, uint8_t *p)
{
__put_unaligned_be32(val 32, p);
__put_unaligned_be32(val, p + 4);
}
-static inline __u16 get_unaligned_be16(const void *p)
+static inline uint16_t get_unaligned_be16(const void *p)
{
- return __get_unaligned_be16((const __u8 *)p);
+ return __get_unaligned_be16((const uint8_t *)p);
}
-static inline __u32 get_unaligned_be32(const void *p)
+static inline uint32_t get_unaligned_be32(const void *p)
{
- return __get_unaligned_be32((const __u8 *)p);
+ return __get_unaligned_be32((const uint8_t *)p);
}
-static inline __u64 get_unaligned_be64(const void *p)
+static inline uint64_t get_unaligned_be64(const void *p)
{
- return __get_unaligned_be64((const __u8 *)p);
+ return __get_unaligned_be64((const uint8_t *)p);
}
-static inline void put_unaligned_be16(__u16 val, void *p)
+static inline void put_unaligned_be16(uint16_t val, void *p)
{
__put_unaligned_be16(val, p);
}
-static inline void put_unaligned_be32(__u32 val, void *p)
+static inline void put_unaligned_be32(uint32_t val, void *p)
{
__put_unaligned_be32(val, p);
}
-static inline void put_unaligned_be64(__u64 val, void *p)
+static inline void put_unaligned_be64(uint64_t val, void *p)
{
__put_unaligned_be64(val, p);
}
diff --git a/tools/include/tools/le_byteshift.h
b/tools/include/tools/le_byteshift.h
index c99d45a..259a132 100644
--- a/tools/include/tools/le_byteshift.h
+++ b/tools/include/tools/le_byteshift.h
@@ -1,68 +1,68 @@
#ifndef _TOOLS_LE_BYTESHIFT_H
#define _TOOLS_LE_BYTESHIFT_H
-#include linux/types.h
+#include inttypes.h
-static inline __u16 __get_unaligned_le16(const __u8 *p)
+static inline uint16_t __get_unaligned_le16(const uint8_t *p)
{
return p[0] | p[1] 8;
}
-static inline __u32 __get_unaligned_le32(const __u8 *p)
+static inline uint32_t __get_unaligned_le32(const uint8_t *p)
{
return p[0] | p[1] 8 | p[2] 16 | p[3] 24;
}
-static inline __u64 __get_unaligned_le64(const __u8 *p)
+static inline uint64_t __get_unaligned_le64(const uint8_t *p)
{
- return (__u64)__get_unaligned_le32(p + 4) 32 |
+ return (uint64_t)__get_unaligned_le32(p + 4) 32 |
__get_unaligned_le32(p);
}
-static inline void __put_unaligned_le16(__u16 val, __u8 *p)
+static inline void __put_unaligned_le16(uint16_t val, uint8_t *p)
{
*p++ = val;
*p++ = val 8;
}
-static inline void __put_unaligned_le32(__u32 val, __u8 *p)
+static inline void __put_unaligned_le32(uint32_t val, uint8_t *p)
{
__put_unaligned_le16(val 16, p + 2);
__put_unaligned_le16(val, p);
}
-static inline void __put_unaligned_le64(__u64 val, __u8 *p)
+static inline void __put_unaligned_le64(uint64_t val, uint8_t *p)
{
__put_unaligned_le32(val 32, p + 4);
__put_unaligned_le32(val, p);
}
-static inline __u16 get_unaligned_le16(const
Re: [RFC PATCH arm: initial TI-Nspire support]
Here's an updated patch that enables support for the LCD.
I looked into drivers/video/of_display_timing.c but it doesn't have the fields
to describe the PL11x specific options needed in struct clcd_panel. At the
moment, it is implemented by hardcoding the values in the kernel and using the
device tree to select the correct configuration.
Signed-off-by: Daniel Tang
---
arch/arm/Kconfig | 2 +
arch/arm/Kconfig.debug | 16 +++
arch/arm/Makefile | 3 +-
arch/arm/boot/dts/nspire-cx.dts| 89 ++
arch/arm/boot/dts/nspire.dtsi | 157 +
arch/arm/include/debug/nspire.S| 28 +
arch/arm/mach-nspire/Kconfig | 12 ++
arch/arm/mach-nspire/Makefile | 1 +
arch/arm/mach-nspire/Makefile.boot | 0
arch/arm/mach-nspire/mmio.h| 15 +++
arch/arm/mach-nspire/nspire.c | 233 +
11 files changed, 555 insertions(+), 1 deletion(-)
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 1cacda4..3f0cd8c 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -1081,6 +1081,8 @@ source "arch/arm/mach-netx/Kconfig"
source "arch/arm/mach-nomadik/Kconfig"
+source "arch/arm/mach-nspire/Kconfig"
+
source "arch/arm/plat-omap/Kconfig"
source "arch/arm/mach-omap1/Kconfig"
diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug
index 9b31f43..5da3a50 100644
--- a/arch/arm/Kconfig.debug
+++ b/arch/arm/Kconfig.debug
@@ -298,6 +298,20 @@ choice
Say Y here if you want kernel low-level debugging support
on MVEBU based platforms.
+ config DEBUG_NSPIRE_CLASSIC_UART
+ bool "Kernel low-level debugging via TI-NSPIRE 8250 UART"
+ depends on ARCH_NSPIRE
+ help
+ Say Y here if you want kernel low-level debugging support
+ on TI-NSPIRE classic models.
+
+ config DEBUG_NSPIRE_CX_UART
+ bool "Kernel low-level debugging via TI-NSPIRE PL011 UART"
+ depends on ARCH_NSPIRE
+ help
+ Say Y here if you want kernel low-level debugging support
+ on TI-NSPIRE CX models.
+
config DEBUG_OMAP2PLUS_UART
bool "Kernel low-level debugging messages via OMAP2PLUS UART"
depends on ARCH_OMAP2PLUS
@@ -591,6 +605,8 @@ config DEBUG_LL_INCLUDE
DEBUG_IMX6Q_UART
default "debug/highbank.S" if DEBUG_HIGHBANK_UART
default "debug/mvebu.S" if DEBUG_MVEBU_UART
+ default "debug/nspire.S" if DEBUG_NSPIRE_CX_UART || \
+ DEBUG_NSPIRE_CLASSIC_UART
default "debug/omap2plus.S" if DEBUG_OMAP2PLUS_UART
default "debug/picoxcell.S" if DEBUG_PICOXCELL_UART
default "debug/socfpga.S" if DEBUG_SOCFPGA_UART
diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index ee4605f..f47a8a7 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -165,6 +165,7 @@ machine-$(CONFIG_ARCH_MXS) += mxs
machine-$(CONFIG_ARCH_MVEBU) += mvebu
machine-$(CONFIG_ARCH_NETX)+= netx
machine-$(CONFIG_ARCH_NOMADIK) += nomadik
+machine-$(CONFIG_ARCH_NSPIRE) += nspire
machine-$(CONFIG_ARCH_OMAP1) += omap1
machine-$(CONFIG_ARCH_OMAP2PLUS) += omap2
machine-$(CONFIG_ARCH_ORION5X) += orion5x
@@ -313,7 +314,7 @@ define archhelp
echo ' Image - Uncompressed kernel image (arch/$(ARCH)/boot/Image)'
echo '* xipImage - XIP kernel image, if configured
(arch/$(ARCH)/boot/xipImage)'
echo ' uImage- U-Boot wrapped zImage'
- echo ' bootpImage- Combined zImage and initial RAM disk'
+ echo ' bootpImage- Combined zImage and initial RAM disk'
echo ' (supply initrd image via make variable
INITRD=)'
echo '* dtbs - Build device tree blobs for enabled boards'
echo ' install - Install uncompressed kernel'
diff --git a/arch/arm/boot/dts/nspire-cx.dts b/arch/arm/boot/dts/nspire-cx.dts
new file mode 100644
index 000..d843e60
--- /dev/null
+++ b/arch/arm/boot/dts/nspire-cx.dts
@@ -0,0 +1,89 @@
+/*
+ * linux/arch/arm/boot/nspire-cx.dts
+ *
+ * Copyright (C) 2012 Daniel Tang
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2, as
+ * published by the Free Software Foundation.
+ *
+ */
+/dts-v1/;
+
+/include/ "nspire.dtsi"
+
+/ {
+ model = "TI-NSPIRE CX";
+ compatible = "arm,nspire-cx";
+
+ memory {
+ device_type = "memory";
+ reg = <0x1000 0x400>; /* 64 MB */
+ };
+
+ aliases {
+ uart0 =
+
Re: [RFC PATCH arm: initial TI-Nspire support]
+= nspire.o > > The first line is not actually needed. Done. > >> + >> +#include "../../mmio.h" >> + >> +.macro addruart, rp, rv, tmp >> +ldr \rp, =(NSPIRE_EARLY_UART_PHYS_BASE) @ physical base address >> +ldr \rv, =(NSPIRE_EARLY_UART_VIRT_BASE) @ virtual base address >> +.endm >> + >> +#include >> + > > There is no nice solution for getting the addresses here, but the consensus > was to just define the macros in this file rather than try to include a > header from elsewhere. > Fair enough, I've added the macros in. > >> +err = of_property_read_string(of_aliases, "timer0", ); >> +if (WARN_ON(err)) >> +return; >> + >> +timer = of_find_node_by_path(path); >> +base = of_iomap(timer, 0); >> +if (WARN_ON(!base)) >> +return; >> + >> +clk = of_clk_get_by_name(timer, NULL); >> +clk_register_clkdev(clk, timer->name, "sp804"); >> + >> +sp804_clocksource_init(base, timer->name); >> + >> +err = of_property_read_string(of_aliases, "timer1", ); >> +if (WARN_ON(err)) >> +return; > > In particular, I think the method of using aliases to pick the right sp804 > instance is being deprecated now. If both timers are identical, the kernel > will now just pick one of them. Sorry, I don't quite understand. Out of the timers, I want to add one as a clocksource and one as a clockevent. If they're identical (i.e. without using aliases), how should I tell the kernel, "Take the first timer you see and make it a clocksource, take the next one you see and make it a clockevent"? > > Arnd Here's an updated patch: Signed-off-by: Daniel Tang --- arch/arm/Kconfig | 2 + arch/arm/Kconfig.debug | 16 arch/arm/Makefile | 3 +- arch/arm/boot/dts/nspire-cx.dts| 85 arch/arm/boot/dts/nspire.dtsi | 154 + arch/arm/include/debug/nspire.S| 28 +++ arch/arm/mach-nspire/Kconfig | 12 +++ arch/arm/mach-nspire/Makefile | 1 + arch/arm/mach-nspire/Makefile.boot | 0 arch/arm/mach-nspire/mmio.h| 13 arch/arm/mach-nspire/nspire.c | 107 ++ 11 files changed, 420 insertions(+), 1 deletion(-) create mode 100644 arch/arm/boot/dts/nspire-cx.dts create mode 100644 arch/arm/boot/dts/nspire.dtsi create mode 100644 arch/arm/include/debug/nspire.S create mode 100644 arch/arm/mach-nspire/Kconfig create mode 100644 arch/arm/mach-nspire/Makefile create mode 100644 arch/arm/mach-nspire/Makefile.boot create mode 100644 arch/arm/mach-nspire/mmio.h create mode 100644 arch/arm/mach-nspire/nspire.c diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 1cacda4..3f0cd8c 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -1081,6 +1081,8 @@ source "arch/arm/mach-netx/Kconfig" source "arch/arm/mach-nomadik/Kconfig" +source "arch/arm/mach-nspire/Kconfig" + source "arch/arm/plat-omap/Kconfig" source "arch/arm/mach-omap1/Kconfig" diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug index 9b31f43..5da3a50 100644 --- a/arch/arm/Kconfig.debug +++ b/arch/arm/Kconfig.debug @@ -298,6 +298,20 @@ choice Say Y here if you want kernel low-level debugging support on MVEBU based platforms. + config DEBUG_NSPIRE_CLASSIC_UART + bool "Kernel low-level debugging via TI-NSPIRE 8250 UART" + depends on ARCH_NSPIRE + help + Say Y here if you want kernel low-level debugging support + on TI-NSPIRE classic models. + + config DEBUG_NSPIRE_CX_UART + bool "Kernel low-level debugging via TI-NSPIRE PL011 UART" + depends on ARCH_NSPIRE + help + Say Y here if you want kernel low-level debugging support + on TI-NSPIRE CX models. + config DEBUG_OMAP2PLUS_UART bool "Kernel low-level debugging messages via OMAP2PLUS UART" depends on ARCH_OMAP2PLUS @@ -591,6 +605,8 @@ config DEBUG_LL_INCLUDE DEBUG_IMX6Q_UART default "debug/highbank.S" if DEBUG_HIGHBANK_UART default "debug/mvebu.S" if DEBUG_MVEBU_UART + default "debug/nspire.S" if DEBUG_NSPIRE_CX_UART || \ + DEBUG_NSPIRE_CLASSIC_UART default "debug/omap2plus.S" if DEBUG_OMAP2PLUS_UART default "debug/picoxcell.S" if DEBUG_PICOXCELL_UART default "debug/socfpga.
Re: [RFC PATCH arm: initial TI-Nspire support]
Hi,
On 06/04/2013, at 10:51 PM, Arnd Bergmann wrote:
>
> Ok, whichever way you prefer. If you have questions while working on this,
> feel free to join #armlinux on irc.freenode.net, there are usually other
> people working on the same things.
>
Cheers.
We already have something basic that boots successfully using device trees.
Some comments before we continue would be greatly appreciated.
Signed-off-by: Daniel Tang
---
arch/arm/Kconfig| 13 ++
arch/arm/Makefile |3 +-
arch/arm/boot/dts/nspire-cx.dts | 85 +
arch/arm/boot/dts/nspire.dtsi | 154 +++
arch/arm/mach-nspire/Makefile |3 +
arch/arm/mach-nspire/include/mach/debug-macro.S | 25
arch/arm/mach-nspire/include/mach/timex.h | 15 +++
arch/arm/mach-nspire/include/mach/uncompress.h | 25
arch/arm/mach-nspire/mmio.h | 13 ++
arch/arm/mach-nspire/nspire.c | 107
10 files changed, 442 insertions(+), 1 deletion(-)
create mode 100644 arch/arm/boot/dts/nspire-cx.dts
create mode 100644 arch/arm/boot/dts/nspire.dtsi
create mode 100644 arch/arm/mach-nspire/Makefile
create mode 100644 arch/arm/mach-nspire/Makefile.boot
create mode 100644 arch/arm/mach-nspire/include/mach/debug-macro.S
create mode 100644 arch/arm/mach-nspire/include/mach/timex.h
create mode 100644 arch/arm/mach-nspire/include/mach/uncompress.h
create mode 100644 arch/arm/mach-nspire/mmio.h
create mode 100644 arch/arm/mach-nspire/nspire.c
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 1cacda4..e8ce316 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -980,6 +980,19 @@ config ARCH_OMAP1
help
Support for older TI OMAP1 (omap7xx, omap15xx or omap16xx)
+config ARCH_NSPIRE
+ bool "TI-NSPIRE based"
+ depends on MMU
+ select CPU_ARM926T
+ select COMMON_CLK
+ select GENERIC_CLOCKEVENTS
+ select SPARSE_IRQ
+ select ARM_AMBA
+ select ARM_VIC
+ select ARM_TIMER_SP804
+ help
+ This enables support for systems using the TI-NSPIRE CPU
+
endchoice
menu "Multiple platform selection"
diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index ee4605f..f47a8a7 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -165,6 +165,7 @@ machine-$(CONFIG_ARCH_MXS) += mxs
machine-$(CONFIG_ARCH_MVEBU) += mvebu
machine-$(CONFIG_ARCH_NETX)+= netx
machine-$(CONFIG_ARCH_NOMADIK) += nomadik
+machine-$(CONFIG_ARCH_NSPIRE) += nspire
machine-$(CONFIG_ARCH_OMAP1) += omap1
machine-$(CONFIG_ARCH_OMAP2PLUS) += omap2
machine-$(CONFIG_ARCH_ORION5X) += orion5x
@@ -313,7 +314,7 @@ define archhelp
echo ' Image - Uncompressed kernel image (arch/$(ARCH)/boot/Image)'
echo '* xipImage - XIP kernel image, if configured
(arch/$(ARCH)/boot/xipImage)'
echo ' uImage- U-Boot wrapped zImage'
- echo ' bootpImage- Combined zImage and initial RAM disk'
+ echo ' bootpImage- Combined zImage and initial RAM disk'
echo ' (supply initrd image via make variable
INITRD=)'
echo '* dtbs - Build device tree blobs for enabled boards'
echo ' install - Install uncompressed kernel'
diff --git a/arch/arm/boot/dts/nspire-cx.dts b/arch/arm/boot/dts/nspire-cx.dts
new file mode 100644
index 000..6ab3c00
--- /dev/null
+++ b/arch/arm/boot/dts/nspire-cx.dts
@@ -0,0 +1,85 @@
+/*
+ * linux/arch/arm/boot/nspire-cx.dts
+ *
+ * Copyright (C) 2012 Daniel Tang
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2, as
+ * published by the Free Software Foundation.
+ *
+ */
+/dts-v1/;
+
+/include/ "nspire.dtsi"
+
+/ {
+ model = "TI-NSPIRE CX";
+ compatible = "arm,nspire-cx";
+
+ memory {
+ device_type = "memory";
+ reg = <0x1000 0x400>; /* 64 MB */
+ };
+
+ aliases {
+ uart0 =
+ timer0 =
+ timer1 =
+ fast_timer = _timer;
+ };
+
+ uart_clk: uart_clk {
+ #clock-cells = <0>;
+ compatible = "fixed-clock";
+ clock-frequency = <1200>;
+ };
+
+ /* Not really a fixed clock but we'll fix this later */
+ apb_pclk: apb_pclk {
+ #clock-cells = <0>;
+ compatible = "fixed-clock";
+ clock-frequency = <3300>;
+ };
+
+ ahb {
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ intc: interrupt-controller@DC00 {
+
Re: [RFC PATCH arm: initial TI-Nspire support]
Hi,
On 06/04/2013, at 10:51 PM, Arnd Bergmann a...@arndb.de wrote:
Ok, whichever way you prefer. If you have questions while working on this,
feel free to join #armlinux on irc.freenode.net, there are usually other
people working on the same things.
Cheers.
We already have something basic that boots successfully using device trees.
Some comments before we continue would be greatly appreciated.
Signed-off-by: Daniel Tang dt.ta...@gmail.com
---
arch/arm/Kconfig| 13 ++
arch/arm/Makefile |3 +-
arch/arm/boot/dts/nspire-cx.dts | 85 +
arch/arm/boot/dts/nspire.dtsi | 154 +++
arch/arm/mach-nspire/Makefile |3 +
arch/arm/mach-nspire/include/mach/debug-macro.S | 25
arch/arm/mach-nspire/include/mach/timex.h | 15 +++
arch/arm/mach-nspire/include/mach/uncompress.h | 25
arch/arm/mach-nspire/mmio.h | 13 ++
arch/arm/mach-nspire/nspire.c | 107
10 files changed, 442 insertions(+), 1 deletion(-)
create mode 100644 arch/arm/boot/dts/nspire-cx.dts
create mode 100644 arch/arm/boot/dts/nspire.dtsi
create mode 100644 arch/arm/mach-nspire/Makefile
create mode 100644 arch/arm/mach-nspire/Makefile.boot
create mode 100644 arch/arm/mach-nspire/include/mach/debug-macro.S
create mode 100644 arch/arm/mach-nspire/include/mach/timex.h
create mode 100644 arch/arm/mach-nspire/include/mach/uncompress.h
create mode 100644 arch/arm/mach-nspire/mmio.h
create mode 100644 arch/arm/mach-nspire/nspire.c
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 1cacda4..e8ce316 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -980,6 +980,19 @@ config ARCH_OMAP1
help
Support for older TI OMAP1 (omap7xx, omap15xx or omap16xx)
+config ARCH_NSPIRE
+ bool TI-NSPIRE based
+ depends on MMU
+ select CPU_ARM926T
+ select COMMON_CLK
+ select GENERIC_CLOCKEVENTS
+ select SPARSE_IRQ
+ select ARM_AMBA
+ select ARM_VIC
+ select ARM_TIMER_SP804
+ help
+ This enables support for systems using the TI-NSPIRE CPU
+
endchoice
menu Multiple platform selection
diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index ee4605f..f47a8a7 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -165,6 +165,7 @@ machine-$(CONFIG_ARCH_MXS) += mxs
machine-$(CONFIG_ARCH_MVEBU) += mvebu
machine-$(CONFIG_ARCH_NETX)+= netx
machine-$(CONFIG_ARCH_NOMADIK) += nomadik
+machine-$(CONFIG_ARCH_NSPIRE) += nspire
machine-$(CONFIG_ARCH_OMAP1) += omap1
machine-$(CONFIG_ARCH_OMAP2PLUS) += omap2
machine-$(CONFIG_ARCH_ORION5X) += orion5x
@@ -313,7 +314,7 @@ define archhelp
echo ' Image - Uncompressed kernel image (arch/$(ARCH)/boot/Image)'
echo '* xipImage - XIP kernel image, if configured
(arch/$(ARCH)/boot/xipImage)'
echo ' uImage- U-Boot wrapped zImage'
- echo ' bootpImage- Combined zImage and initial RAM disk'
+ echo ' bootpImage- Combined zImage and initial RAM disk'
echo ' (supply initrd image via make variable
INITRD=path)'
echo '* dtbs - Build device tree blobs for enabled boards'
echo ' install - Install uncompressed kernel'
diff --git a/arch/arm/boot/dts/nspire-cx.dts b/arch/arm/boot/dts/nspire-cx.dts
new file mode 100644
index 000..6ab3c00
--- /dev/null
+++ b/arch/arm/boot/dts/nspire-cx.dts
@@ -0,0 +1,85 @@
+/*
+ * linux/arch/arm/boot/nspire-cx.dts
+ *
+ * Copyright (C) 2012 Daniel Tang tan...@tangrs.id.au
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2, as
+ * published by the Free Software Foundation.
+ *
+ */
+/dts-v1/;
+
+/include/ nspire.dtsi
+
+/ {
+ model = TI-NSPIRE CX;
+ compatible = arm,nspire-cx;
+
+ memory {
+ device_type = memory;
+ reg = 0x1000 0x400; /* 64 MB */
+ };
+
+ aliases {
+ uart0 = uart0;
+ timer0 = timer0;
+ timer1 = timer1;
+ fast_timer = fast_timer;
+ };
+
+ uart_clk: uart_clk {
+ #clock-cells = 0;
+ compatible = fixed-clock;
+ clock-frequency = 1200;
+ };
+
+ /* Not really a fixed clock but we'll fix this later */
+ apb_pclk: apb_pclk {
+ #clock-cells = 0;
+ compatible = fixed-clock;
+ clock-frequency = 3300;
+ };
+
+ ahb {
+ #address-cells = 1;
+ #size-cells = 1;
+
+ intc: interrupt-controller@DC00 {
+ compatible = arm,pl190-vic;
+ interrupt-controller;
+ reg
Re: [RFC PATCH arm: initial TI-Nspire support]
)) +return; + +clk = of_clk_get_by_name(timer, NULL); +clk_register_clkdev(clk, timer-name, sp804); + +sp804_clocksource_init(base, timer-name); + +err = of_property_read_string(of_aliases, timer1, path); +if (WARN_ON(err)) +return; In particular, I think the method of using aliases to pick the right sp804 instance is being deprecated now. If both timers are identical, the kernel will now just pick one of them. Sorry, I don't quite understand. Out of the timers, I want to add one as a clocksource and one as a clockevent. If they're identical (i.e. without using aliases), how should I tell the kernel, Take the first timer you see and make it a clocksource, take the next one you see and make it a clockevent? Arnd Here's an updated patch: Signed-off-by: Daniel Tang dt.ta...@gmail.com --- arch/arm/Kconfig | 2 + arch/arm/Kconfig.debug | 16 arch/arm/Makefile | 3 +- arch/arm/boot/dts/nspire-cx.dts| 85 arch/arm/boot/dts/nspire.dtsi | 154 + arch/arm/include/debug/nspire.S| 28 +++ arch/arm/mach-nspire/Kconfig | 12 +++ arch/arm/mach-nspire/Makefile | 1 + arch/arm/mach-nspire/Makefile.boot | 0 arch/arm/mach-nspire/mmio.h| 13 arch/arm/mach-nspire/nspire.c | 107 ++ 11 files changed, 420 insertions(+), 1 deletion(-) create mode 100644 arch/arm/boot/dts/nspire-cx.dts create mode 100644 arch/arm/boot/dts/nspire.dtsi create mode 100644 arch/arm/include/debug/nspire.S create mode 100644 arch/arm/mach-nspire/Kconfig create mode 100644 arch/arm/mach-nspire/Makefile create mode 100644 arch/arm/mach-nspire/Makefile.boot create mode 100644 arch/arm/mach-nspire/mmio.h create mode 100644 arch/arm/mach-nspire/nspire.c diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 1cacda4..3f0cd8c 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -1081,6 +1081,8 @@ source arch/arm/mach-netx/Kconfig source arch/arm/mach-nomadik/Kconfig +source arch/arm/mach-nspire/Kconfig + source arch/arm/plat-omap/Kconfig source arch/arm/mach-omap1/Kconfig diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug index 9b31f43..5da3a50 100644 --- a/arch/arm/Kconfig.debug +++ b/arch/arm/Kconfig.debug @@ -298,6 +298,20 @@ choice Say Y here if you want kernel low-level debugging support on MVEBU based platforms. + config DEBUG_NSPIRE_CLASSIC_UART + bool Kernel low-level debugging via TI-NSPIRE 8250 UART + depends on ARCH_NSPIRE + help + Say Y here if you want kernel low-level debugging support + on TI-NSPIRE classic models. + + config DEBUG_NSPIRE_CX_UART + bool Kernel low-level debugging via TI-NSPIRE PL011 UART + depends on ARCH_NSPIRE + help + Say Y here if you want kernel low-level debugging support + on TI-NSPIRE CX models. + config DEBUG_OMAP2PLUS_UART bool Kernel low-level debugging messages via OMAP2PLUS UART depends on ARCH_OMAP2PLUS @@ -591,6 +605,8 @@ config DEBUG_LL_INCLUDE DEBUG_IMX6Q_UART default debug/highbank.S if DEBUG_HIGHBANK_UART default debug/mvebu.S if DEBUG_MVEBU_UART + default debug/nspire.S if DEBUG_NSPIRE_CX_UART || \ + DEBUG_NSPIRE_CLASSIC_UART default debug/omap2plus.S if DEBUG_OMAP2PLUS_UART default debug/picoxcell.S if DEBUG_PICOXCELL_UART default debug/socfpga.S if DEBUG_SOCFPGA_UART diff --git a/arch/arm/Makefile b/arch/arm/Makefile index ee4605f..f47a8a7 100644 --- a/arch/arm/Makefile +++ b/arch/arm/Makefile @@ -165,6 +165,7 @@ machine-$(CONFIG_ARCH_MXS) += mxs machine-$(CONFIG_ARCH_MVEBU) += mvebu machine-$(CONFIG_ARCH_NETX)+= netx machine-$(CONFIG_ARCH_NOMADIK) += nomadik +machine-$(CONFIG_ARCH_NSPIRE) += nspire machine-$(CONFIG_ARCH_OMAP1) += omap1 machine-$(CONFIG_ARCH_OMAP2PLUS) += omap2 machine-$(CONFIG_ARCH_ORION5X) += orion5x @@ -313,7 +314,7 @@ define archhelp echo ' Image - Uncompressed kernel image (arch/$(ARCH)/boot/Image)' echo '* xipImage - XIP kernel image, if configured (arch/$(ARCH)/boot/xipImage)' echo ' uImage- U-Boot wrapped zImage' - echo ' bootpImage- Combined zImage and initial RAM disk' + echo ' bootpImage- Combined zImage and initial RAM disk' echo ' (supply initrd image via make variable INITRD=path)' echo '* dtbs - Build device tree blobs for enabled boards' echo ' install - Install uncompressed kernel' diff --git a/arch/arm/boot/dts/nspire-cx.dts b/arch/arm/boot/dts/nspire-cx.dts
Re: [RFC PATCH arm: initial TI-Nspire support]
Here's an updated patch that enables support for the LCD.
I looked into drivers/video/of_display_timing.c but it doesn't have the fields
to describe the PL11x specific options needed in struct clcd_panel. At the
moment, it is implemented by hardcoding the values in the kernel and using the
device tree to select the correct configuration.
Signed-off-by: Daniel Tang dt.ta...@gmail.com
---
arch/arm/Kconfig | 2 +
arch/arm/Kconfig.debug | 16 +++
arch/arm/Makefile | 3 +-
arch/arm/boot/dts/nspire-cx.dts| 89 ++
arch/arm/boot/dts/nspire.dtsi | 157 +
arch/arm/include/debug/nspire.S| 28 +
arch/arm/mach-nspire/Kconfig | 12 ++
arch/arm/mach-nspire/Makefile | 1 +
arch/arm/mach-nspire/Makefile.boot | 0
arch/arm/mach-nspire/mmio.h| 15 +++
arch/arm/mach-nspire/nspire.c | 233 +
11 files changed, 555 insertions(+), 1 deletion(-)
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 1cacda4..3f0cd8c 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -1081,6 +1081,8 @@ source arch/arm/mach-netx/Kconfig
source arch/arm/mach-nomadik/Kconfig
+source arch/arm/mach-nspire/Kconfig
+
source arch/arm/plat-omap/Kconfig
source arch/arm/mach-omap1/Kconfig
diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug
index 9b31f43..5da3a50 100644
--- a/arch/arm/Kconfig.debug
+++ b/arch/arm/Kconfig.debug
@@ -298,6 +298,20 @@ choice
Say Y here if you want kernel low-level debugging support
on MVEBU based platforms.
+ config DEBUG_NSPIRE_CLASSIC_UART
+ bool Kernel low-level debugging via TI-NSPIRE 8250 UART
+ depends on ARCH_NSPIRE
+ help
+ Say Y here if you want kernel low-level debugging support
+ on TI-NSPIRE classic models.
+
+ config DEBUG_NSPIRE_CX_UART
+ bool Kernel low-level debugging via TI-NSPIRE PL011 UART
+ depends on ARCH_NSPIRE
+ help
+ Say Y here if you want kernel low-level debugging support
+ on TI-NSPIRE CX models.
+
config DEBUG_OMAP2PLUS_UART
bool Kernel low-level debugging messages via OMAP2PLUS UART
depends on ARCH_OMAP2PLUS
@@ -591,6 +605,8 @@ config DEBUG_LL_INCLUDE
DEBUG_IMX6Q_UART
default debug/highbank.S if DEBUG_HIGHBANK_UART
default debug/mvebu.S if DEBUG_MVEBU_UART
+ default debug/nspire.S if DEBUG_NSPIRE_CX_UART || \
+ DEBUG_NSPIRE_CLASSIC_UART
default debug/omap2plus.S if DEBUG_OMAP2PLUS_UART
default debug/picoxcell.S if DEBUG_PICOXCELL_UART
default debug/socfpga.S if DEBUG_SOCFPGA_UART
diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index ee4605f..f47a8a7 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -165,6 +165,7 @@ machine-$(CONFIG_ARCH_MXS) += mxs
machine-$(CONFIG_ARCH_MVEBU) += mvebu
machine-$(CONFIG_ARCH_NETX)+= netx
machine-$(CONFIG_ARCH_NOMADIK) += nomadik
+machine-$(CONFIG_ARCH_NSPIRE) += nspire
machine-$(CONFIG_ARCH_OMAP1) += omap1
machine-$(CONFIG_ARCH_OMAP2PLUS) += omap2
machine-$(CONFIG_ARCH_ORION5X) += orion5x
@@ -313,7 +314,7 @@ define archhelp
echo ' Image - Uncompressed kernel image (arch/$(ARCH)/boot/Image)'
echo '* xipImage - XIP kernel image, if configured
(arch/$(ARCH)/boot/xipImage)'
echo ' uImage- U-Boot wrapped zImage'
- echo ' bootpImage- Combined zImage and initial RAM disk'
+ echo ' bootpImage- Combined zImage and initial RAM disk'
echo ' (supply initrd image via make variable
INITRD=path)'
echo '* dtbs - Build device tree blobs for enabled boards'
echo ' install - Install uncompressed kernel'
diff --git a/arch/arm/boot/dts/nspire-cx.dts b/arch/arm/boot/dts/nspire-cx.dts
new file mode 100644
index 000..d843e60
--- /dev/null
+++ b/arch/arm/boot/dts/nspire-cx.dts
@@ -0,0 +1,89 @@
+/*
+ * linux/arch/arm/boot/nspire-cx.dts
+ *
+ * Copyright (C) 2012 Daniel Tang tan...@tangrs.id.au
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2, as
+ * published by the Free Software Foundation.
+ *
+ */
+/dts-v1/;
+
+/include/ nspire.dtsi
+
+/ {
+ model = TI-NSPIRE CX;
+ compatible = arm,nspire-cx;
+
+ memory {
+ device_type = memory;
+ reg = 0x1000 0x400; /* 64 MB */
+ };
+
+ aliases {
+ uart0 = uart0;
+ timer0 = timer0;
+ timer1 = timer1;
+ fast_timer = fast_timer;
+ };
+
+ uart_clk: uart_clk {
+ #clock-cells = 0
Re: [RFC PATCH arm: initial TI-Nspire support]
Hi, First of all, thank you for your comments! On 04/04/2013, at 10:12 PM, Arnd Bergmann wrote: > For new platforms, we want to have only the absolute minimum amount of > code in arch/arm and move everything else into drivers. However, that > is only possible using device tree. It should not add any significant > complexity to your code, and you can easily bundle the device tree blob > with the kernel. Given that most of your comments described some very fundamental changes (esp switching to DTB) to the structure of our port, we've decided we'll probably start from scratch and fix the issues you outlined as we reimplement our platform. At the moment, we're working on getting a basic DTB-booting kernel working so our next patch will be starting from basics. Cheers, tangrs-- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Re: [RFC PATCH arm: initial TI-Nspire support]
Hi, First of all, thank you for your comments! On 04/04/2013, at 10:12 PM, Arnd Bergmann a...@arndb.de wrote: For new platforms, we want to have only the absolute minimum amount of code in arch/arm and move everything else into drivers. However, that is only possible using device tree. It should not add any significant complexity to your code, and you can easily bundle the device tree blob with the kernel. Given that most of your comments described some very fundamental changes (esp switching to DTB) to the structure of our port, we've decided we'll probably start from scratch and fix the issues you outlined as we reimplement our platform. At the moment, we're working on getting a basic DTB-booting kernel working so our next patch will be starting from basics. Cheers, tangrs-- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
