Re: [PATCH v6] MIPS: NI 169445 board support
On Mon, Aug 07, 2017 at 05:26:48PM +0200, Ralf Baechle wrote: > On Tue, Jul 18, 2017 at 01:29:09PM -0500, Nathan Sullivan wrote: > > > Support the National Instruments 169445 board. > > Thanks, applied with minor changes: > > Ralf Thank you for your patience! Nathan
Re: [PATCH v6] MIPS: NI 169445 board support
On Mon, Aug 07, 2017 at 05:26:48PM +0200, Ralf Baechle wrote: > On Tue, Jul 18, 2017 at 01:29:09PM -0500, Nathan Sullivan wrote: > > > Support the National Instruments 169445 board. > > Thanks, applied with minor changes: > > Ralf Thank you for your patience! Nathan
[PATCH v6] MIPS: NI 169445 board support
Support the National Instruments 169445 board.
Signed-off-by: Nathan Sullivan <nathan.sulli...@ni.com>
---
Changes since v5:
- make device tree addresses on the internal bus relative, and compile with
W=2 to be sure they are in the right format.
Documentation/devicetree/bindings/mips/ni.txt | 7 ++
MAINTAINERS | 8 ++
arch/mips/boot/dts/Makefile | 1 +
arch/mips/boot/dts/ni/169445.dts| 100
arch/mips/boot/dts/ni/Makefile | 7 ++
arch/mips/configs/generic/board-ni169445.config | 27 +++
arch/mips/generic/Kconfig | 6 ++
arch/mips/generic/vmlinux.its.S | 25 ++
8 files changed, 181 insertions(+)
create mode 100644 Documentation/devicetree/bindings/mips/ni.txt
create mode 100644 arch/mips/boot/dts/ni/169445.dts
create mode 100644 arch/mips/boot/dts/ni/Makefile
create mode 100644 arch/mips/configs/generic/board-ni169445.config
diff --git a/Documentation/devicetree/bindings/mips/ni.txt
b/Documentation/devicetree/bindings/mips/ni.txt
new file mode 100644
index 000..722bf2d
--- /dev/null
+++ b/Documentation/devicetree/bindings/mips/ni.txt
@@ -0,0 +1,7 @@
+National Instruments MIPS platforms
+
+required root node properties:
+ - compatible: must be "ni,169445"
+
+CPU Nodes
+ - compatible: must be "mti,mips14KEc"
diff --git a/MAINTAINERS b/MAINTAINERS
index 7d9bd4a..73fa2e0 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -9294,6 +9294,14 @@ F: include/linux/sunrpc/
F: include/uapi/linux/nfs*
F: include/uapi/linux/sunrpc/
+NI169445 MIPS ARCHITECTURE
+M: Nathan Sullivan <nathan.sulli...@ni.com>
+L: linux-m...@linux-mips.org
+S: Maintained
+F: arch/mips/boot/dts/ni/
+F: arch/mips/configs/generic/board-ni169445.config
+F: Documentation/devicetree/bindings/mips/ni.txt
+
NILFS2 FILESYSTEM
M: Ryusuke Konishi <konishi.ryus...@lab.ntt.co.jp>
L: linux-ni...@vger.kernel.org
diff --git a/arch/mips/boot/dts/Makefile b/arch/mips/boot/dts/Makefile
index b9db492..27b0f37 100644
--- a/arch/mips/boot/dts/Makefile
+++ b/arch/mips/boot/dts/Makefile
@@ -4,6 +4,7 @@ dts-dirs+= img
dts-dirs += ingenic
dts-dirs += lantiq
dts-dirs += mti
+dts-dirs += ni
dts-dirs += netlogic
dts-dirs += pic32
dts-dirs += qca
diff --git a/arch/mips/boot/dts/ni/169445.dts b/arch/mips/boot/dts/ni/169445.dts
new file mode 100644
index 000..5389ef4
--- /dev/null
+++ b/arch/mips/boot/dts/ni/169445.dts
@@ -0,0 +1,100 @@
+/dts-v1/;
+
+/ {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "ni,169445";
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ cpu@0 {
+ device_type = "cpu";
+ compatible = "mti,mips14KEc";
+ clocks = <>;
+ reg = <0>;
+ };
+ };
+
+ memory@0 {
+ device_type = "memory";
+ reg = <0x0 0x1000>;
+ };
+
+ baseclk: baseclock {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <5000>;
+ };
+
+ cpu_intc: interrupt-controller {
+ #address-cells = <0>;
+ compatible = "mti,cpu-interrupt-controller";
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ };
+
+ ahb@1f30 {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x1f30 0x80FFF>;
+
+ gpio1: gpio@10 {
+ compatible = "ni,169445-nand-gpio";
+ reg = <0x10 0x4>;
+ reg-names = "dat";
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpio2: gpio@14 {
+ compatible = "ni,169445-nand-gpio";
+ reg = <0x14 0x4>;
+ reg-names = "dat";
+ gpio-controller;
+ #gpio-cells = <2>;
+ no-output;
+ };
+
+ nand@0 {
+ compatible = "gpio-control-nand";
+ nand-on-flash-bbt;
+ nand-ecc-mode = "soft_bch";
+ nand-ecc-step-size = <512>;
+ nand-ecc-strength = <4>;
+ reg = <0x0 4>;
+
[PATCH v6] MIPS: NI 169445 board support
Support the National Instruments 169445 board.
Signed-off-by: Nathan Sullivan
---
Changes since v5:
- make device tree addresses on the internal bus relative, and compile with
W=2 to be sure they are in the right format.
Documentation/devicetree/bindings/mips/ni.txt | 7 ++
MAINTAINERS | 8 ++
arch/mips/boot/dts/Makefile | 1 +
arch/mips/boot/dts/ni/169445.dts| 100
arch/mips/boot/dts/ni/Makefile | 7 ++
arch/mips/configs/generic/board-ni169445.config | 27 +++
arch/mips/generic/Kconfig | 6 ++
arch/mips/generic/vmlinux.its.S | 25 ++
8 files changed, 181 insertions(+)
create mode 100644 Documentation/devicetree/bindings/mips/ni.txt
create mode 100644 arch/mips/boot/dts/ni/169445.dts
create mode 100644 arch/mips/boot/dts/ni/Makefile
create mode 100644 arch/mips/configs/generic/board-ni169445.config
diff --git a/Documentation/devicetree/bindings/mips/ni.txt
b/Documentation/devicetree/bindings/mips/ni.txt
new file mode 100644
index 000..722bf2d
--- /dev/null
+++ b/Documentation/devicetree/bindings/mips/ni.txt
@@ -0,0 +1,7 @@
+National Instruments MIPS platforms
+
+required root node properties:
+ - compatible: must be "ni,169445"
+
+CPU Nodes
+ - compatible: must be "mti,mips14KEc"
diff --git a/MAINTAINERS b/MAINTAINERS
index 7d9bd4a..73fa2e0 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -9294,6 +9294,14 @@ F: include/linux/sunrpc/
F: include/uapi/linux/nfs*
F: include/uapi/linux/sunrpc/
+NI169445 MIPS ARCHITECTURE
+M: Nathan Sullivan
+L: linux-m...@linux-mips.org
+S: Maintained
+F: arch/mips/boot/dts/ni/
+F: arch/mips/configs/generic/board-ni169445.config
+F: Documentation/devicetree/bindings/mips/ni.txt
+
NILFS2 FILESYSTEM
M: Ryusuke Konishi
L: linux-ni...@vger.kernel.org
diff --git a/arch/mips/boot/dts/Makefile b/arch/mips/boot/dts/Makefile
index b9db492..27b0f37 100644
--- a/arch/mips/boot/dts/Makefile
+++ b/arch/mips/boot/dts/Makefile
@@ -4,6 +4,7 @@ dts-dirs+= img
dts-dirs += ingenic
dts-dirs += lantiq
dts-dirs += mti
+dts-dirs += ni
dts-dirs += netlogic
dts-dirs += pic32
dts-dirs += qca
diff --git a/arch/mips/boot/dts/ni/169445.dts b/arch/mips/boot/dts/ni/169445.dts
new file mode 100644
index 000..5389ef4
--- /dev/null
+++ b/arch/mips/boot/dts/ni/169445.dts
@@ -0,0 +1,100 @@
+/dts-v1/;
+
+/ {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "ni,169445";
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ cpu@0 {
+ device_type = "cpu";
+ compatible = "mti,mips14KEc";
+ clocks = <>;
+ reg = <0>;
+ };
+ };
+
+ memory@0 {
+ device_type = "memory";
+ reg = <0x0 0x1000>;
+ };
+
+ baseclk: baseclock {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <5000>;
+ };
+
+ cpu_intc: interrupt-controller {
+ #address-cells = <0>;
+ compatible = "mti,cpu-interrupt-controller";
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ };
+
+ ahb@1f30 {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x1f30 0x80FFF>;
+
+ gpio1: gpio@10 {
+ compatible = "ni,169445-nand-gpio";
+ reg = <0x10 0x4>;
+ reg-names = "dat";
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpio2: gpio@14 {
+ compatible = "ni,169445-nand-gpio";
+ reg = <0x14 0x4>;
+ reg-names = "dat";
+ gpio-controller;
+ #gpio-cells = <2>;
+ no-output;
+ };
+
+ nand@0 {
+ compatible = "gpio-control-nand";
+ nand-on-flash-bbt;
+ nand-ecc-mode = "soft_bch";
+ nand-ecc-step-size = <512>;
+ nand-ecc-strength = <4>;
+ reg = <0x0 4>;
+ gpios = < 0 0>, /* rdy */
+ < 1 0>, /* nce */
+
[RESEND][PATCH v5] MIPS: NI 169445 board support
Support the National Instruments 169445 board.
Signed-off-by: Nathan Sullivan <nathan.sulli...@ni.com>
---
Changes from v4:
- Address Rob Herring's device tree feedback
Documentation/devicetree/bindings/mips/ni.txt | 7 ++
MAINTAINERS | 8 ++
arch/mips/boot/dts/Makefile | 1 +
arch/mips/boot/dts/ni/169445.dts| 100
arch/mips/boot/dts/ni/Makefile | 7 ++
arch/mips/configs/generic/board-ni169445.config | 27 +++
arch/mips/generic/Kconfig | 6 ++
arch/mips/generic/vmlinux.its.S | 25 ++
8 files changed, 181 insertions(+)
create mode 100644 Documentation/devicetree/bindings/mips/ni.txt
create mode 100644 arch/mips/boot/dts/ni/169445.dts
create mode 100644 arch/mips/boot/dts/ni/Makefile
create mode 100644 arch/mips/configs/generic/board-ni169445.config
diff --git a/Documentation/devicetree/bindings/mips/ni.txt
b/Documentation/devicetree/bindings/mips/ni.txt
new file mode 100644
index 000..722bf2d
--- /dev/null
+++ b/Documentation/devicetree/bindings/mips/ni.txt
@@ -0,0 +1,7 @@
+National Instruments MIPS platforms
+
+required root node properties:
+ - compatible: must be "ni,169445"
+
+CPU Nodes
+ - compatible: must be "mti,mips14KEc"
diff --git a/MAINTAINERS b/MAINTAINERS
index 7d9bd4a..73fa2e0 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -9294,6 +9294,14 @@ F: include/linux/sunrpc/
F: include/uapi/linux/nfs*
F: include/uapi/linux/sunrpc/
+NI169445 MIPS ARCHITECTURE
+M: Nathan Sullivan <nathan.sulli...@ni.com>
+L: linux-m...@linux-mips.org
+S: Maintained
+F: arch/mips/boot/dts/ni/
+F: arch/mips/configs/generic/board-ni169445.config
+F: Documentation/devicetree/bindings/mips/ni.txt
+
NILFS2 FILESYSTEM
M: Ryusuke Konishi <konishi.ryus...@lab.ntt.co.jp>
L: linux-ni...@vger.kernel.org
diff --git a/arch/mips/boot/dts/Makefile b/arch/mips/boot/dts/Makefile
index b9db492..27b0f37 100644
--- a/arch/mips/boot/dts/Makefile
+++ b/arch/mips/boot/dts/Makefile
@@ -4,6 +4,7 @@ dts-dirs+= img
dts-dirs += ingenic
dts-dirs += lantiq
dts-dirs += mti
+dts-dirs += ni
dts-dirs += netlogic
dts-dirs += pic32
dts-dirs += qca
diff --git a/arch/mips/boot/dts/ni/169445.dts b/arch/mips/boot/dts/ni/169445.dts
new file mode 100644
index 000..6a20036
--- /dev/null
+++ b/arch/mips/boot/dts/ni/169445.dts
@@ -0,0 +1,100 @@
+/dts-v1/;
+
+/ {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "ni,169445";
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ cpu@0 {
+ device_type = "cpu";
+ compatible = "mti,mips14KEc";
+ clocks = <>;
+ reg = <0>;
+ };
+ };
+
+ memory@0 {
+ device_type = "memory";
+ reg = <0x0 0x1000>;
+ };
+
+ baseclk: baseclock {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <5000>;
+ };
+
+ cpu_intc: interrupt-controller {
+ #address-cells = <0>;
+ compatible = "mti,cpu-interrupt-controller";
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ };
+
+ ahb@1f30 {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x1f30 0x80FFF>;
+
+ gpio1: gpio@1f300010 {
+ compatible = "ni,169445-nand-gpio";
+ reg = <0x10 0x4>;
+ reg-names = "dat";
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpio2: gpio@1f300014 {
+ compatible = "ni,169445-nand-gpio";
+ reg = <0x14 0x4>;
+ reg-names = "dat";
+ gpio-controller;
+ #gpio-cells = <2>;
+ no-output;
+ };
+
+ nand@1f30 {
+ compatible = "gpio-control-nand";
+ nand-on-flash-bbt;
+ nand-ecc-mode = "soft_bch";
+ nand-ecc-step-size = <512>;
+ nand-ecc-strength = <4>;
+ reg = <0x0 4>;
+ gpios = < 0 0>, /* rdy */
+ < 1 0&g
[RESEND][PATCH v5] MIPS: NI 169445 board support
Support the National Instruments 169445 board.
Signed-off-by: Nathan Sullivan
---
Changes from v4:
- Address Rob Herring's device tree feedback
Documentation/devicetree/bindings/mips/ni.txt | 7 ++
MAINTAINERS | 8 ++
arch/mips/boot/dts/Makefile | 1 +
arch/mips/boot/dts/ni/169445.dts| 100
arch/mips/boot/dts/ni/Makefile | 7 ++
arch/mips/configs/generic/board-ni169445.config | 27 +++
arch/mips/generic/Kconfig | 6 ++
arch/mips/generic/vmlinux.its.S | 25 ++
8 files changed, 181 insertions(+)
create mode 100644 Documentation/devicetree/bindings/mips/ni.txt
create mode 100644 arch/mips/boot/dts/ni/169445.dts
create mode 100644 arch/mips/boot/dts/ni/Makefile
create mode 100644 arch/mips/configs/generic/board-ni169445.config
diff --git a/Documentation/devicetree/bindings/mips/ni.txt
b/Documentation/devicetree/bindings/mips/ni.txt
new file mode 100644
index 000..722bf2d
--- /dev/null
+++ b/Documentation/devicetree/bindings/mips/ni.txt
@@ -0,0 +1,7 @@
+National Instruments MIPS platforms
+
+required root node properties:
+ - compatible: must be "ni,169445"
+
+CPU Nodes
+ - compatible: must be "mti,mips14KEc"
diff --git a/MAINTAINERS b/MAINTAINERS
index 7d9bd4a..73fa2e0 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -9294,6 +9294,14 @@ F: include/linux/sunrpc/
F: include/uapi/linux/nfs*
F: include/uapi/linux/sunrpc/
+NI169445 MIPS ARCHITECTURE
+M: Nathan Sullivan
+L: linux-m...@linux-mips.org
+S: Maintained
+F: arch/mips/boot/dts/ni/
+F: arch/mips/configs/generic/board-ni169445.config
+F: Documentation/devicetree/bindings/mips/ni.txt
+
NILFS2 FILESYSTEM
M: Ryusuke Konishi
L: linux-ni...@vger.kernel.org
diff --git a/arch/mips/boot/dts/Makefile b/arch/mips/boot/dts/Makefile
index b9db492..27b0f37 100644
--- a/arch/mips/boot/dts/Makefile
+++ b/arch/mips/boot/dts/Makefile
@@ -4,6 +4,7 @@ dts-dirs+= img
dts-dirs += ingenic
dts-dirs += lantiq
dts-dirs += mti
+dts-dirs += ni
dts-dirs += netlogic
dts-dirs += pic32
dts-dirs += qca
diff --git a/arch/mips/boot/dts/ni/169445.dts b/arch/mips/boot/dts/ni/169445.dts
new file mode 100644
index 000..6a20036
--- /dev/null
+++ b/arch/mips/boot/dts/ni/169445.dts
@@ -0,0 +1,100 @@
+/dts-v1/;
+
+/ {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "ni,169445";
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ cpu@0 {
+ device_type = "cpu";
+ compatible = "mti,mips14KEc";
+ clocks = <>;
+ reg = <0>;
+ };
+ };
+
+ memory@0 {
+ device_type = "memory";
+ reg = <0x0 0x1000>;
+ };
+
+ baseclk: baseclock {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <5000>;
+ };
+
+ cpu_intc: interrupt-controller {
+ #address-cells = <0>;
+ compatible = "mti,cpu-interrupt-controller";
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ };
+
+ ahb@1f30 {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x1f30 0x80FFF>;
+
+ gpio1: gpio@1f300010 {
+ compatible = "ni,169445-nand-gpio";
+ reg = <0x10 0x4>;
+ reg-names = "dat";
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpio2: gpio@1f300014 {
+ compatible = "ni,169445-nand-gpio";
+ reg = <0x14 0x4>;
+ reg-names = "dat";
+ gpio-controller;
+ #gpio-cells = <2>;
+ no-output;
+ };
+
+ nand@1f30 {
+ compatible = "gpio-control-nand";
+ nand-on-flash-bbt;
+ nand-ecc-mode = "soft_bch";
+ nand-ecc-step-size = <512>;
+ nand-ecc-strength = <4>;
+ reg = <0x0 4>;
+ gpios = < 0 0>, /* rdy */
+ < 1 0>, /* nce */
+ < 2 0>, /* ale */
+
[PATCH] MIPS: NI 169445 board support
Support the National Instruments 169445 board.
Signed-off-by: Nathan Sullivan <nathan.sulli...@ni.com>
---
Documentation/devicetree/bindings/mips/ni.txt | 7 ++
MAINTAINERS | 8 ++
arch/mips/boot/dts/Makefile | 1 +
arch/mips/boot/dts/ni/169445.dts| 100
arch/mips/boot/dts/ni/Makefile | 7 ++
arch/mips/configs/generic/board-ni169445.config | 27 +++
arch/mips/generic/Kconfig | 6 ++
arch/mips/generic/vmlinux.its.S | 25 ++
8 files changed, 181 insertions(+)
create mode 100644 Documentation/devicetree/bindings/mips/ni.txt
create mode 100644 arch/mips/boot/dts/ni/169445.dts
create mode 100644 arch/mips/boot/dts/ni/Makefile
create mode 100644 arch/mips/configs/generic/board-ni169445.config
diff --git a/Documentation/devicetree/bindings/mips/ni.txt
b/Documentation/devicetree/bindings/mips/ni.txt
new file mode 100644
index 000..722bf2d
--- /dev/null
+++ b/Documentation/devicetree/bindings/mips/ni.txt
@@ -0,0 +1,7 @@
+National Instruments MIPS platforms
+
+required root node properties:
+ - compatible: must be "ni,169445"
+
+CPU Nodes
+ - compatible: must be "mti,mips14KEc"
diff --git a/MAINTAINERS b/MAINTAINERS
index 7d9bd4a..73fa2e0 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -9294,6 +9294,14 @@ F: include/linux/sunrpc/
F: include/uapi/linux/nfs*
F: include/uapi/linux/sunrpc/
+NI169445 MIPS ARCHITECTURE
+M: Nathan Sullivan <nathan.sulli...@ni.com>
+L: linux-m...@linux-mips.org
+S: Maintained
+F: arch/mips/boot/dts/ni/
+F: arch/mips/configs/generic/board-ni169445.config
+F: Documentation/devicetree/bindings/mips/ni.txt
+
NILFS2 FILESYSTEM
M: Ryusuke Konishi <konishi.ryus...@lab.ntt.co.jp>
L: linux-ni...@vger.kernel.org
diff --git a/arch/mips/boot/dts/Makefile b/arch/mips/boot/dts/Makefile
index b9db492..27b0f37 100644
--- a/arch/mips/boot/dts/Makefile
+++ b/arch/mips/boot/dts/Makefile
@@ -4,6 +4,7 @@ dts-dirs+= img
dts-dirs += ingenic
dts-dirs += lantiq
dts-dirs += mti
+dts-dirs += ni
dts-dirs += netlogic
dts-dirs += pic32
dts-dirs += qca
diff --git a/arch/mips/boot/dts/ni/169445.dts b/arch/mips/boot/dts/ni/169445.dts
new file mode 100644
index 000..6a20036
--- /dev/null
+++ b/arch/mips/boot/dts/ni/169445.dts
@@ -0,0 +1,100 @@
+/dts-v1/;
+
+/ {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "ni,169445";
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ cpu@0 {
+ device_type = "cpu";
+ compatible = "mti,mips14KEc";
+ clocks = <>;
+ reg = <0>;
+ };
+ };
+
+ memory@0 {
+ device_type = "memory";
+ reg = <0x0 0x1000>;
+ };
+
+ baseclk: baseclock {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <5000>;
+ };
+
+ cpu_intc: interrupt-controller {
+ #address-cells = <0>;
+ compatible = "mti,cpu-interrupt-controller";
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ };
+
+ ahb@1f30 {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x1f30 0x80FFF>;
+
+ gpio1: gpio@1f300010 {
+ compatible = "ni,169445-nand-gpio";
+ reg = <0x10 0x4>;
+ reg-names = "dat";
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpio2: gpio@1f300014 {
+ compatible = "ni,169445-nand-gpio";
+ reg = <0x14 0x4>;
+ reg-names = "dat";
+ gpio-controller;
+ #gpio-cells = <2>;
+ no-output;
+ };
+
+ nand@1f30 {
+ compatible = "gpio-control-nand";
+ nand-on-flash-bbt;
+ nand-ecc-mode = "soft_bch";
+ nand-ecc-step-size = <512>;
+ nand-ecc-strength = <4>;
+ reg = <0x0 4>;
+ gpios = < 0 0>, /* rdy */
+ < 1 0>, /* nce */
+ < 2 0>,
[PATCH] MIPS: NI 169445 board support
Support the National Instruments 169445 board.
Signed-off-by: Nathan Sullivan
---
Documentation/devicetree/bindings/mips/ni.txt | 7 ++
MAINTAINERS | 8 ++
arch/mips/boot/dts/Makefile | 1 +
arch/mips/boot/dts/ni/169445.dts| 100
arch/mips/boot/dts/ni/Makefile | 7 ++
arch/mips/configs/generic/board-ni169445.config | 27 +++
arch/mips/generic/Kconfig | 6 ++
arch/mips/generic/vmlinux.its.S | 25 ++
8 files changed, 181 insertions(+)
create mode 100644 Documentation/devicetree/bindings/mips/ni.txt
create mode 100644 arch/mips/boot/dts/ni/169445.dts
create mode 100644 arch/mips/boot/dts/ni/Makefile
create mode 100644 arch/mips/configs/generic/board-ni169445.config
diff --git a/Documentation/devicetree/bindings/mips/ni.txt
b/Documentation/devicetree/bindings/mips/ni.txt
new file mode 100644
index 000..722bf2d
--- /dev/null
+++ b/Documentation/devicetree/bindings/mips/ni.txt
@@ -0,0 +1,7 @@
+National Instruments MIPS platforms
+
+required root node properties:
+ - compatible: must be "ni,169445"
+
+CPU Nodes
+ - compatible: must be "mti,mips14KEc"
diff --git a/MAINTAINERS b/MAINTAINERS
index 7d9bd4a..73fa2e0 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -9294,6 +9294,14 @@ F: include/linux/sunrpc/
F: include/uapi/linux/nfs*
F: include/uapi/linux/sunrpc/
+NI169445 MIPS ARCHITECTURE
+M: Nathan Sullivan
+L: linux-m...@linux-mips.org
+S: Maintained
+F: arch/mips/boot/dts/ni/
+F: arch/mips/configs/generic/board-ni169445.config
+F: Documentation/devicetree/bindings/mips/ni.txt
+
NILFS2 FILESYSTEM
M: Ryusuke Konishi
L: linux-ni...@vger.kernel.org
diff --git a/arch/mips/boot/dts/Makefile b/arch/mips/boot/dts/Makefile
index b9db492..27b0f37 100644
--- a/arch/mips/boot/dts/Makefile
+++ b/arch/mips/boot/dts/Makefile
@@ -4,6 +4,7 @@ dts-dirs+= img
dts-dirs += ingenic
dts-dirs += lantiq
dts-dirs += mti
+dts-dirs += ni
dts-dirs += netlogic
dts-dirs += pic32
dts-dirs += qca
diff --git a/arch/mips/boot/dts/ni/169445.dts b/arch/mips/boot/dts/ni/169445.dts
new file mode 100644
index 000..6a20036
--- /dev/null
+++ b/arch/mips/boot/dts/ni/169445.dts
@@ -0,0 +1,100 @@
+/dts-v1/;
+
+/ {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "ni,169445";
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ cpu@0 {
+ device_type = "cpu";
+ compatible = "mti,mips14KEc";
+ clocks = <>;
+ reg = <0>;
+ };
+ };
+
+ memory@0 {
+ device_type = "memory";
+ reg = <0x0 0x1000>;
+ };
+
+ baseclk: baseclock {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <5000>;
+ };
+
+ cpu_intc: interrupt-controller {
+ #address-cells = <0>;
+ compatible = "mti,cpu-interrupt-controller";
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ };
+
+ ahb@1f30 {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x1f30 0x80FFF>;
+
+ gpio1: gpio@1f300010 {
+ compatible = "ni,169445-nand-gpio";
+ reg = <0x10 0x4>;
+ reg-names = "dat";
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpio2: gpio@1f300014 {
+ compatible = "ni,169445-nand-gpio";
+ reg = <0x14 0x4>;
+ reg-names = "dat";
+ gpio-controller;
+ #gpio-cells = <2>;
+ no-output;
+ };
+
+ nand@1f30 {
+ compatible = "gpio-control-nand";
+ nand-on-flash-bbt;
+ nand-ecc-mode = "soft_bch";
+ nand-ecc-step-size = <512>;
+ nand-ecc-strength = <4>;
+ reg = <0x0 4>;
+ gpios = < 0 0>, /* rdy */
+ < 1 0>, /* nce */
+ < 2 0>, /* ale */
+ < 3 0>, /* cle */
+
RESEND PATCH v5
--- Changes from v4: - Address Rob Herring's device tree feedback
RESEND PATCH v5
--- Changes from v4: - Address Rob Herring's device tree feedback
[PATCH v5] MIPS: NI 169445 board support
Support the National Instruments 169445 board.
Signed-off-by: Nathan Sullivan <nathan.sulli...@ni.com>
---
Changes from v4:
- Address Rob Herring's device tree feedback
I'm still unclear on the vmlinux.its.S changes. The linux-mti tree has a
config in the image tree for each board it supports, and I followed that
pattern here. Rob was concerned about how the configs would scale wrt
the number of bootloaders around, but it's really just one per board/dt,
right?
---
Documentation/devicetree/bindings/mips/ni.txt | 7 ++
MAINTAINERS | 8 ++
arch/mips/boot/dts/Makefile | 1 +
arch/mips/boot/dts/ni/169445.dts| 100
arch/mips/boot/dts/ni/Makefile | 7 ++
arch/mips/configs/generic/board-ni169445.config | 27 +++
arch/mips/generic/Kconfig | 6 ++
arch/mips/generic/vmlinux.its.S | 25 ++
8 files changed, 181 insertions(+)
create mode 100644 Documentation/devicetree/bindings/mips/ni.txt
create mode 100644 arch/mips/boot/dts/ni/169445.dts
create mode 100644 arch/mips/boot/dts/ni/Makefile
create mode 100644 arch/mips/configs/generic/board-ni169445.config
diff --git a/Documentation/devicetree/bindings/mips/ni.txt
b/Documentation/devicetree/bindings/mips/ni.txt
new file mode 100644
index 000..722bf2d
--- /dev/null
+++ b/Documentation/devicetree/bindings/mips/ni.txt
@@ -0,0 +1,7 @@
+National Instruments MIPS platforms
+
+required root node properties:
+ - compatible: must be "ni,169445"
+
+CPU Nodes
+ - compatible: must be "mti,mips14KEc"
diff --git a/MAINTAINERS b/MAINTAINERS
index 053c3bd..e6662d0 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -9047,6 +9047,14 @@ F: include/linux/sunrpc/
F: include/uapi/linux/nfs*
F: include/uapi/linux/sunrpc/
+NI169445 MIPS ARCHITECTURE
+M: Nathan Sullivan <nathan.sulli...@ni.com>
+L: linux-m...@linux-mips.org
+S: Maintained
+F: arch/mips/boot/dts/ni/
+F: arch/mips/configs/generic/board-ni169445.config
+F: Documentation/devicetree/bindings/mips/ni.txt
+
NILFS2 FILESYSTEM
M: Ryusuke Konishi <konishi.ryus...@lab.ntt.co.jp>
L: linux-ni...@vger.kernel.org
diff --git a/arch/mips/boot/dts/Makefile b/arch/mips/boot/dts/Makefile
index b9db492..27b0f37 100644
--- a/arch/mips/boot/dts/Makefile
+++ b/arch/mips/boot/dts/Makefile
@@ -4,6 +4,7 @@ dts-dirs+= img
dts-dirs += ingenic
dts-dirs += lantiq
dts-dirs += mti
+dts-dirs += ni
dts-dirs += netlogic
dts-dirs += pic32
dts-dirs += qca
diff --git a/arch/mips/boot/dts/ni/169445.dts b/arch/mips/boot/dts/ni/169445.dts
new file mode 100644
index 000..6a20036
--- /dev/null
+++ b/arch/mips/boot/dts/ni/169445.dts
@@ -0,0 +1,100 @@
+/dts-v1/;
+
+/ {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "ni,169445";
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ cpu@0 {
+ device_type = "cpu";
+ compatible = "mti,mips14KEc";
+ clocks = <>;
+ reg = <0>;
+ };
+ };
+
+ memory@0 {
+ device_type = "memory";
+ reg = <0x0 0x1000>;
+ };
+
+ baseclk: baseclock {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <5000>;
+ };
+
+ cpu_intc: interrupt-controller {
+ #address-cells = <0>;
+ compatible = "mti,cpu-interrupt-controller";
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ };
+
+ ahb@1f30 {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x1f30 0x80FFF>;
+
+ gpio1: gpio@1f300010 {
+ compatible = "ni,169445-nand-gpio";
+ reg = <0x10 0x4>;
+ reg-names = "dat";
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpio2: gpio@1f300014 {
+ compatible = "ni,169445-nand-gpio";
+ reg = <0x14 0x4>;
+ reg-names = "dat";
+ gpio-controller;
+ #gpio-cells = <2>;
+ no-output;
+ };
+
+ nand@1f30 {
+ compatible = "gpio-control-nand";
+ nand-on-flash-bbt;
+
[PATCH v5] MIPS: NI 169445 board support
Support the National Instruments 169445 board.
Signed-off-by: Nathan Sullivan
---
Changes from v4:
- Address Rob Herring's device tree feedback
I'm still unclear on the vmlinux.its.S changes. The linux-mti tree has a
config in the image tree for each board it supports, and I followed that
pattern here. Rob was concerned about how the configs would scale wrt
the number of bootloaders around, but it's really just one per board/dt,
right?
---
Documentation/devicetree/bindings/mips/ni.txt | 7 ++
MAINTAINERS | 8 ++
arch/mips/boot/dts/Makefile | 1 +
arch/mips/boot/dts/ni/169445.dts| 100
arch/mips/boot/dts/ni/Makefile | 7 ++
arch/mips/configs/generic/board-ni169445.config | 27 +++
arch/mips/generic/Kconfig | 6 ++
arch/mips/generic/vmlinux.its.S | 25 ++
8 files changed, 181 insertions(+)
create mode 100644 Documentation/devicetree/bindings/mips/ni.txt
create mode 100644 arch/mips/boot/dts/ni/169445.dts
create mode 100644 arch/mips/boot/dts/ni/Makefile
create mode 100644 arch/mips/configs/generic/board-ni169445.config
diff --git a/Documentation/devicetree/bindings/mips/ni.txt
b/Documentation/devicetree/bindings/mips/ni.txt
new file mode 100644
index 000..722bf2d
--- /dev/null
+++ b/Documentation/devicetree/bindings/mips/ni.txt
@@ -0,0 +1,7 @@
+National Instruments MIPS platforms
+
+required root node properties:
+ - compatible: must be "ni,169445"
+
+CPU Nodes
+ - compatible: must be "mti,mips14KEc"
diff --git a/MAINTAINERS b/MAINTAINERS
index 053c3bd..e6662d0 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -9047,6 +9047,14 @@ F: include/linux/sunrpc/
F: include/uapi/linux/nfs*
F: include/uapi/linux/sunrpc/
+NI169445 MIPS ARCHITECTURE
+M: Nathan Sullivan
+L: linux-m...@linux-mips.org
+S: Maintained
+F: arch/mips/boot/dts/ni/
+F: arch/mips/configs/generic/board-ni169445.config
+F: Documentation/devicetree/bindings/mips/ni.txt
+
NILFS2 FILESYSTEM
M: Ryusuke Konishi
L: linux-ni...@vger.kernel.org
diff --git a/arch/mips/boot/dts/Makefile b/arch/mips/boot/dts/Makefile
index b9db492..27b0f37 100644
--- a/arch/mips/boot/dts/Makefile
+++ b/arch/mips/boot/dts/Makefile
@@ -4,6 +4,7 @@ dts-dirs+= img
dts-dirs += ingenic
dts-dirs += lantiq
dts-dirs += mti
+dts-dirs += ni
dts-dirs += netlogic
dts-dirs += pic32
dts-dirs += qca
diff --git a/arch/mips/boot/dts/ni/169445.dts b/arch/mips/boot/dts/ni/169445.dts
new file mode 100644
index 000..6a20036
--- /dev/null
+++ b/arch/mips/boot/dts/ni/169445.dts
@@ -0,0 +1,100 @@
+/dts-v1/;
+
+/ {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "ni,169445";
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ cpu@0 {
+ device_type = "cpu";
+ compatible = "mti,mips14KEc";
+ clocks = <>;
+ reg = <0>;
+ };
+ };
+
+ memory@0 {
+ device_type = "memory";
+ reg = <0x0 0x1000>;
+ };
+
+ baseclk: baseclock {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <5000>;
+ };
+
+ cpu_intc: interrupt-controller {
+ #address-cells = <0>;
+ compatible = "mti,cpu-interrupt-controller";
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ };
+
+ ahb@1f30 {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x1f30 0x80FFF>;
+
+ gpio1: gpio@1f300010 {
+ compatible = "ni,169445-nand-gpio";
+ reg = <0x10 0x4>;
+ reg-names = "dat";
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpio2: gpio@1f300014 {
+ compatible = "ni,169445-nand-gpio";
+ reg = <0x14 0x4>;
+ reg-names = "dat";
+ gpio-controller;
+ #gpio-cells = <2>;
+ no-output;
+ };
+
+ nand@1f30 {
+ compatible = "gpio-control-nand";
+ nand-on-flash-bbt;
+ nand-ecc-mode = "soft_bch";
+ nand
Re: [PATCH 2/2] MIPS: NI 169445 board support
On Thu, Mar 23, 2017 at 05:29:45PM -0500, Rob Herring wrote:
> On Tue, Mar 14, 2017 at 11:13:23AM -0500, Nathan Sullivan wrote:
> > Support the National Instruments 169445 board.
> >
> > Signed-off-by: Nathan Sullivan <nathan.sulli...@ni.com>
> > ---
> > Documentation/devicetree/bindings/mips/ni.txt | 7 ++
> > MAINTAINERS | 8 ++
> > arch/mips/boot/dts/Makefile | 1 +
> > arch/mips/boot/dts/ni/169445.dts| 100
> >
> > arch/mips/boot/dts/ni/Makefile | 7 ++
> > arch/mips/configs/generic/board-ni169445.config | 27 +++
> > arch/mips/generic/Kconfig | 6 ++
> > arch/mips/generic/vmlinux.its.S | 25 ++
> > 8 files changed, 181 insertions(+)
> > create mode 100644 Documentation/devicetree/bindings/mips/ni.txt
> > create mode 100644 arch/mips/boot/dts/ni/169445.dts
> > create mode 100644 arch/mips/boot/dts/ni/Makefile
> > create mode 100644 arch/mips/configs/generic/board-ni169445.config
> >
> > diff --git a/Documentation/devicetree/bindings/mips/ni.txt
> > b/Documentation/devicetree/bindings/mips/ni.txt
> > new file mode 100644
> > index 000..722bf2d
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/mips/ni.txt
> > @@ -0,0 +1,7 @@
> > +National Instruments MIPS platforms
> > +
> > +required root node properties:
> > + - compatible: must be "ni,169445"
> > +
> > +CPU Nodes
> > + - compatible: must be "mti,mips14KEc"
> > diff --git a/MAINTAINERS b/MAINTAINERS
> > index c265a5f..b72f059 100644
> > --- a/MAINTAINERS
> > +++ b/MAINTAINERS
> > @@ -8887,6 +8887,14 @@ F: include/linux/sunrpc/
> > F: include/uapi/linux/nfs*
> > F: include/uapi/linux/sunrpc/
> >
> > +NI169445 MIPS ARCHITECTURE
> > +M: Nathan Sullivan <nathan.sulli...@ni.com>
> > +L: linux-m...@linux-mips.org
> > +S: Maintained
> > +F: arch/mips/boot/dts/ni/
> > +F: arch/mips/configs/generic/board-ni169445.config
> > +F: Documentation/devicetree/bindings/mips/ni.txt
> > +
> > NILFS2 FILESYSTEM
> > M: Ryusuke Konishi <konishi.ryus...@lab.ntt.co.jp>
> > L: linux-ni...@vger.kernel.org
> > diff --git a/arch/mips/boot/dts/Makefile b/arch/mips/boot/dts/Makefile
> > index b9db492..27b0f37 100644
> > --- a/arch/mips/boot/dts/Makefile
> > +++ b/arch/mips/boot/dts/Makefile
> > @@ -4,6 +4,7 @@ dts-dirs+= img
> > dts-dirs += ingenic
> > dts-dirs += lantiq
> > dts-dirs += mti
> > +dts-dirs += ni
> > dts-dirs += netlogic
> > dts-dirs += pic32
> > dts-dirs += qca
> > diff --git a/arch/mips/boot/dts/ni/169445.dts
> > b/arch/mips/boot/dts/ni/169445.dts
> > new file mode 100644
> > index 000..9746576
> > --- /dev/null
> > +++ b/arch/mips/boot/dts/ni/169445.dts
> > @@ -0,0 +1,100 @@
> > +/dts-v1/;
> > +
> > +/ {
> > + #address-cells = <1>;
> > + #size-cells = <1>;
> > + compatible = "ni,169445";
> > +
> > + cpus {
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > + cpu@0 {
> > + device_type = "cpu";
> > + compatible = "mti,mips14KEc";
> > + clocks = <>;
> > + reg = <0>;
> > + };
> > + };
> > +
> > + memory@0 {
> > + device_type = "memory";
> > + reg = <0x0 0x1000>;
> > + };
> > +
> > + baseclk: baseclock {
> > + compatible = "fixed-clock";
> > + #clock-cells = <0>;
> > + clock-frequency = <5000>;
> > + };
> > +
> > + cpu_intc: cpu_intc {
>
> interrupt-controller {
>
> > + #address-cells = <0>;
> > + compatible = "mti,cpu-interrupt-controller";
> > + interrupt-controller;
> > + #interrupt-cells = <1>;
> > + };
> > +
> > + ahb@0 {
>
> ahb@1f30
>
> > + compatible = "simple-bus";
> > + #address-cells = <1>;
> > + #size-cells = <1>;
> > + ranges = <0x0 0x1f30 0x80FFF>;
> > +
> > + gpio1:gpio-controller@1f300010 {
> ^ space
Re: [PATCH 2/2] MIPS: NI 169445 board support
On Thu, Mar 23, 2017 at 05:29:45PM -0500, Rob Herring wrote:
> On Tue, Mar 14, 2017 at 11:13:23AM -0500, Nathan Sullivan wrote:
> > Support the National Instruments 169445 board.
> >
> > Signed-off-by: Nathan Sullivan
> > ---
> > Documentation/devicetree/bindings/mips/ni.txt | 7 ++
> > MAINTAINERS | 8 ++
> > arch/mips/boot/dts/Makefile | 1 +
> > arch/mips/boot/dts/ni/169445.dts| 100
> >
> > arch/mips/boot/dts/ni/Makefile | 7 ++
> > arch/mips/configs/generic/board-ni169445.config | 27 +++
> > arch/mips/generic/Kconfig | 6 ++
> > arch/mips/generic/vmlinux.its.S | 25 ++
> > 8 files changed, 181 insertions(+)
> > create mode 100644 Documentation/devicetree/bindings/mips/ni.txt
> > create mode 100644 arch/mips/boot/dts/ni/169445.dts
> > create mode 100644 arch/mips/boot/dts/ni/Makefile
> > create mode 100644 arch/mips/configs/generic/board-ni169445.config
> >
> > diff --git a/Documentation/devicetree/bindings/mips/ni.txt
> > b/Documentation/devicetree/bindings/mips/ni.txt
> > new file mode 100644
> > index 000..722bf2d
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/mips/ni.txt
> > @@ -0,0 +1,7 @@
> > +National Instruments MIPS platforms
> > +
> > +required root node properties:
> > + - compatible: must be "ni,169445"
> > +
> > +CPU Nodes
> > + - compatible: must be "mti,mips14KEc"
> > diff --git a/MAINTAINERS b/MAINTAINERS
> > index c265a5f..b72f059 100644
> > --- a/MAINTAINERS
> > +++ b/MAINTAINERS
> > @@ -8887,6 +8887,14 @@ F: include/linux/sunrpc/
> > F: include/uapi/linux/nfs*
> > F: include/uapi/linux/sunrpc/
> >
> > +NI169445 MIPS ARCHITECTURE
> > +M: Nathan Sullivan
> > +L: linux-m...@linux-mips.org
> > +S: Maintained
> > +F: arch/mips/boot/dts/ni/
> > +F: arch/mips/configs/generic/board-ni169445.config
> > +F: Documentation/devicetree/bindings/mips/ni.txt
> > +
> > NILFS2 FILESYSTEM
> > M: Ryusuke Konishi
> > L: linux-ni...@vger.kernel.org
> > diff --git a/arch/mips/boot/dts/Makefile b/arch/mips/boot/dts/Makefile
> > index b9db492..27b0f37 100644
> > --- a/arch/mips/boot/dts/Makefile
> > +++ b/arch/mips/boot/dts/Makefile
> > @@ -4,6 +4,7 @@ dts-dirs+= img
> > dts-dirs += ingenic
> > dts-dirs += lantiq
> > dts-dirs += mti
> > +dts-dirs += ni
> > dts-dirs += netlogic
> > dts-dirs += pic32
> > dts-dirs += qca
> > diff --git a/arch/mips/boot/dts/ni/169445.dts
> > b/arch/mips/boot/dts/ni/169445.dts
> > new file mode 100644
> > index 000..9746576
> > --- /dev/null
> > +++ b/arch/mips/boot/dts/ni/169445.dts
> > @@ -0,0 +1,100 @@
> > +/dts-v1/;
> > +
> > +/ {
> > + #address-cells = <1>;
> > + #size-cells = <1>;
> > + compatible = "ni,169445";
> > +
> > + cpus {
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > + cpu@0 {
> > + device_type = "cpu";
> > + compatible = "mti,mips14KEc";
> > + clocks = <>;
> > + reg = <0>;
> > + };
> > + };
> > +
> > + memory@0 {
> > + device_type = "memory";
> > + reg = <0x0 0x1000>;
> > + };
> > +
> > + baseclk: baseclock {
> > + compatible = "fixed-clock";
> > + #clock-cells = <0>;
> > + clock-frequency = <5000>;
> > + };
> > +
> > + cpu_intc: cpu_intc {
>
> interrupt-controller {
>
> > + #address-cells = <0>;
> > + compatible = "mti,cpu-interrupt-controller";
> > + interrupt-controller;
> > + #interrupt-cells = <1>;
> > + };
> > +
> > + ahb@0 {
>
> ahb@1f30
>
> > + compatible = "simple-bus";
> > + #address-cells = <1>;
> > + #size-cells = <1>;
> > + ranges = <0x0 0x1f30 0x80FFF>;
> > +
> > + gpio1:gpio-controller@1f300010 {
> ^ space
>
> 'gpio' is the standard node name, so
>
> gpio@...
>
> > + c
[PATCH 2/2] MIPS: NI 169445 board support
Support the National Instruments 169445 board.
Signed-off-by: Nathan Sullivan <nathan.sulli...@ni.com>
---
Documentation/devicetree/bindings/mips/ni.txt | 7 ++
MAINTAINERS | 8 ++
arch/mips/boot/dts/Makefile | 1 +
arch/mips/boot/dts/ni/169445.dts| 100
arch/mips/boot/dts/ni/Makefile | 7 ++
arch/mips/configs/generic/board-ni169445.config | 27 +++
arch/mips/generic/Kconfig | 6 ++
arch/mips/generic/vmlinux.its.S | 25 ++
8 files changed, 181 insertions(+)
create mode 100644 Documentation/devicetree/bindings/mips/ni.txt
create mode 100644 arch/mips/boot/dts/ni/169445.dts
create mode 100644 arch/mips/boot/dts/ni/Makefile
create mode 100644 arch/mips/configs/generic/board-ni169445.config
diff --git a/Documentation/devicetree/bindings/mips/ni.txt
b/Documentation/devicetree/bindings/mips/ni.txt
new file mode 100644
index 000..722bf2d
--- /dev/null
+++ b/Documentation/devicetree/bindings/mips/ni.txt
@@ -0,0 +1,7 @@
+National Instruments MIPS platforms
+
+required root node properties:
+ - compatible: must be "ni,169445"
+
+CPU Nodes
+ - compatible: must be "mti,mips14KEc"
diff --git a/MAINTAINERS b/MAINTAINERS
index c265a5f..b72f059 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -8887,6 +8887,14 @@ F: include/linux/sunrpc/
F: include/uapi/linux/nfs*
F: include/uapi/linux/sunrpc/
+NI169445 MIPS ARCHITECTURE
+M: Nathan Sullivan <nathan.sulli...@ni.com>
+L: linux-m...@linux-mips.org
+S: Maintained
+F: arch/mips/boot/dts/ni/
+F: arch/mips/configs/generic/board-ni169445.config
+F: Documentation/devicetree/bindings/mips/ni.txt
+
NILFS2 FILESYSTEM
M: Ryusuke Konishi <konishi.ryus...@lab.ntt.co.jp>
L: linux-ni...@vger.kernel.org
diff --git a/arch/mips/boot/dts/Makefile b/arch/mips/boot/dts/Makefile
index b9db492..27b0f37 100644
--- a/arch/mips/boot/dts/Makefile
+++ b/arch/mips/boot/dts/Makefile
@@ -4,6 +4,7 @@ dts-dirs+= img
dts-dirs += ingenic
dts-dirs += lantiq
dts-dirs += mti
+dts-dirs += ni
dts-dirs += netlogic
dts-dirs += pic32
dts-dirs += qca
diff --git a/arch/mips/boot/dts/ni/169445.dts b/arch/mips/boot/dts/ni/169445.dts
new file mode 100644
index 000..9746576
--- /dev/null
+++ b/arch/mips/boot/dts/ni/169445.dts
@@ -0,0 +1,100 @@
+/dts-v1/;
+
+/ {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "ni,169445";
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ cpu@0 {
+ device_type = "cpu";
+ compatible = "mti,mips14KEc";
+ clocks = <>;
+ reg = <0>;
+ };
+ };
+
+ memory@0 {
+ device_type = "memory";
+ reg = <0x0 0x1000>;
+ };
+
+ baseclk: baseclock {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <5000>;
+ };
+
+ cpu_intc: cpu_intc {
+ #address-cells = <0>;
+ compatible = "mti,cpu-interrupt-controller";
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ };
+
+ ahb@0 {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x1f30 0x80FFF>;
+
+ gpio1:gpio-controller@1f300010 {
+ compatible = "ni,169445-nand-gpio";
+ reg = <0x10 0x4>;
+ reg-names = "dat";
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpio2:gpio-controller@1f300014 {
+ compatible = "ni,169445-nand-gpio";
+ reg = <0x14 0x4>;
+ reg-names = "dat";
+ gpio-controller;
+ #gpio-cells = <2>;
+ no-output;
+ };
+
+ nand@1f30 {
+ compatible = "gpio-control-nand";
+ nand-on-flash-bbt;
+ nand-ecc-mode = "soft_bch";
+ nand-ecc-step-size = <512>;
+ nand-ecc-strength = <4>;
+ reg = <0x0 4>;
+ gpios = < 0 0>, /* rdy */
+ < 1 0>, /* nce */
+ < 2 0>,
[PATCH 2/2] MIPS: NI 169445 board support
Support the National Instruments 169445 board.
Signed-off-by: Nathan Sullivan
---
Documentation/devicetree/bindings/mips/ni.txt | 7 ++
MAINTAINERS | 8 ++
arch/mips/boot/dts/Makefile | 1 +
arch/mips/boot/dts/ni/169445.dts| 100
arch/mips/boot/dts/ni/Makefile | 7 ++
arch/mips/configs/generic/board-ni169445.config | 27 +++
arch/mips/generic/Kconfig | 6 ++
arch/mips/generic/vmlinux.its.S | 25 ++
8 files changed, 181 insertions(+)
create mode 100644 Documentation/devicetree/bindings/mips/ni.txt
create mode 100644 arch/mips/boot/dts/ni/169445.dts
create mode 100644 arch/mips/boot/dts/ni/Makefile
create mode 100644 arch/mips/configs/generic/board-ni169445.config
diff --git a/Documentation/devicetree/bindings/mips/ni.txt
b/Documentation/devicetree/bindings/mips/ni.txt
new file mode 100644
index 000..722bf2d
--- /dev/null
+++ b/Documentation/devicetree/bindings/mips/ni.txt
@@ -0,0 +1,7 @@
+National Instruments MIPS platforms
+
+required root node properties:
+ - compatible: must be "ni,169445"
+
+CPU Nodes
+ - compatible: must be "mti,mips14KEc"
diff --git a/MAINTAINERS b/MAINTAINERS
index c265a5f..b72f059 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -8887,6 +8887,14 @@ F: include/linux/sunrpc/
F: include/uapi/linux/nfs*
F: include/uapi/linux/sunrpc/
+NI169445 MIPS ARCHITECTURE
+M: Nathan Sullivan
+L: linux-m...@linux-mips.org
+S: Maintained
+F: arch/mips/boot/dts/ni/
+F: arch/mips/configs/generic/board-ni169445.config
+F: Documentation/devicetree/bindings/mips/ni.txt
+
NILFS2 FILESYSTEM
M: Ryusuke Konishi
L: linux-ni...@vger.kernel.org
diff --git a/arch/mips/boot/dts/Makefile b/arch/mips/boot/dts/Makefile
index b9db492..27b0f37 100644
--- a/arch/mips/boot/dts/Makefile
+++ b/arch/mips/boot/dts/Makefile
@@ -4,6 +4,7 @@ dts-dirs+= img
dts-dirs += ingenic
dts-dirs += lantiq
dts-dirs += mti
+dts-dirs += ni
dts-dirs += netlogic
dts-dirs += pic32
dts-dirs += qca
diff --git a/arch/mips/boot/dts/ni/169445.dts b/arch/mips/boot/dts/ni/169445.dts
new file mode 100644
index 000..9746576
--- /dev/null
+++ b/arch/mips/boot/dts/ni/169445.dts
@@ -0,0 +1,100 @@
+/dts-v1/;
+
+/ {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "ni,169445";
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ cpu@0 {
+ device_type = "cpu";
+ compatible = "mti,mips14KEc";
+ clocks = <>;
+ reg = <0>;
+ };
+ };
+
+ memory@0 {
+ device_type = "memory";
+ reg = <0x0 0x1000>;
+ };
+
+ baseclk: baseclock {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <5000>;
+ };
+
+ cpu_intc: cpu_intc {
+ #address-cells = <0>;
+ compatible = "mti,cpu-interrupt-controller";
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ };
+
+ ahb@0 {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x1f30 0x80FFF>;
+
+ gpio1:gpio-controller@1f300010 {
+ compatible = "ni,169445-nand-gpio";
+ reg = <0x10 0x4>;
+ reg-names = "dat";
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpio2:gpio-controller@1f300014 {
+ compatible = "ni,169445-nand-gpio";
+ reg = <0x14 0x4>;
+ reg-names = "dat";
+ gpio-controller;
+ #gpio-cells = <2>;
+ no-output;
+ };
+
+ nand@1f30 {
+ compatible = "gpio-control-nand";
+ nand-on-flash-bbt;
+ nand-ecc-mode = "soft_bch";
+ nand-ecc-step-size = <512>;
+ nand-ecc-strength = <4>;
+ reg = <0x0 4>;
+ gpios = < 0 0>, /* rdy */
+ < 1 0>, /* nce */
+ < 2 0>, /* ale */
+ < 3 0>, /* cle */
+
[PATCH v4] NI 169445 board support
Add support for the National Instruments 169445 board Changes from v3: - Remove unused ngpios DT property from documentation for the NAND GPIO bindings and the actual board device tree. - Add no-output property to the same, for the GPIO controller that is only used for input signals from NAND.
[PATCH 1/2] gpio: mmio: add support for NI 169445 NAND GPIO
The GPIO-based NAND controller on National Instruments 169445 hardware
exposes a set of simple lines for the control signals.
Signed-off-by: Nathan Sullivan <nathan.sulli...@ni.com>
---
.../bindings/gpio/ni,169445-nand-gpio.txt | 38 ++
drivers/gpio/gpio-mmio.c | 1 +
2 files changed, 39 insertions(+)
create mode 100644
Documentation/devicetree/bindings/gpio/ni,169445-nand-gpio.txt
diff --git a/Documentation/devicetree/bindings/gpio/ni,169445-nand-gpio.txt
b/Documentation/devicetree/bindings/gpio/ni,169445-nand-gpio.txt
new file mode 100644
index 000..ca2f8c7
--- /dev/null
+++ b/Documentation/devicetree/bindings/gpio/ni,169445-nand-gpio.txt
@@ -0,0 +1,38 @@
+Bindings for the National Instruments 169445 GPIO NAND controller
+
+The 169445 GPIO NAND controller has two memory mapped GPIO registers, one
+for input (the ready signal) and one for output (control signals). It is
+intended to be used with the GPIO NAND driver.
+
+Required properties:
+ - compatible: should be "ni,169445-nand-gpio"
+ - reg-names: must contain
+ "dat" - data register
+ - reg: address + size pairs describing the GPIO register sets;
+ order must correspond with the order of entries in reg-names
+ - #gpio-cells: must be set to 2. The first cell is the pin number and
+ the second cell is used to specify the gpio polarity:
+ 0 = active high
+ 1 = active low
+ - gpio-controller: Marks the device node as a gpio controller.
+
+Optional properties:
+ - no-output: disables driving output on the pins
+
+Examples:
+ gpio1: nand-gpio-out@1f300010 {
+ compatible = "ni,169445-nand-gpio";
+ reg = <0x1f300010 0x4>;
+ reg-names = "dat";
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpio2: nand-gpio-in@1f300014 {
+ compatible = "ni,169445-nand-gpio";
+ reg = <0x1f300014 0x4>;
+ reg-names = "dat";
+ gpio-controller;
+ #gpio-cells = <2>;
+ no-output;
+ };
diff --git a/drivers/gpio/gpio-mmio.c b/drivers/gpio/gpio-mmio.c
index d7d03ad..f7da40e 100644
--- a/drivers/gpio/gpio-mmio.c
+++ b/drivers/gpio/gpio-mmio.c
@@ -575,6 +575,7 @@ static void __iomem *bgpio_map(struct platform_device *pdev,
static const struct of_device_id bgpio_of_match[] = {
{ .compatible = "brcm,bcm6345-gpio" },
{ .compatible = "wd,mbl-gpio" },
+ { .compatible = "ni,169445-nand-gpio" },
{ }
};
MODULE_DEVICE_TABLE(of, bgpio_of_match);
--
2.1.4
[PATCH v4] NI 169445 board support
Add support for the National Instruments 169445 board Changes from v3: - Remove unused ngpios DT property from documentation for the NAND GPIO bindings and the actual board device tree. - Add no-output property to the same, for the GPIO controller that is only used for input signals from NAND.
[PATCH 1/2] gpio: mmio: add support for NI 169445 NAND GPIO
The GPIO-based NAND controller on National Instruments 169445 hardware
exposes a set of simple lines for the control signals.
Signed-off-by: Nathan Sullivan
---
.../bindings/gpio/ni,169445-nand-gpio.txt | 38 ++
drivers/gpio/gpio-mmio.c | 1 +
2 files changed, 39 insertions(+)
create mode 100644
Documentation/devicetree/bindings/gpio/ni,169445-nand-gpio.txt
diff --git a/Documentation/devicetree/bindings/gpio/ni,169445-nand-gpio.txt
b/Documentation/devicetree/bindings/gpio/ni,169445-nand-gpio.txt
new file mode 100644
index 000..ca2f8c7
--- /dev/null
+++ b/Documentation/devicetree/bindings/gpio/ni,169445-nand-gpio.txt
@@ -0,0 +1,38 @@
+Bindings for the National Instruments 169445 GPIO NAND controller
+
+The 169445 GPIO NAND controller has two memory mapped GPIO registers, one
+for input (the ready signal) and one for output (control signals). It is
+intended to be used with the GPIO NAND driver.
+
+Required properties:
+ - compatible: should be "ni,169445-nand-gpio"
+ - reg-names: must contain
+ "dat" - data register
+ - reg: address + size pairs describing the GPIO register sets;
+ order must correspond with the order of entries in reg-names
+ - #gpio-cells: must be set to 2. The first cell is the pin number and
+ the second cell is used to specify the gpio polarity:
+ 0 = active high
+ 1 = active low
+ - gpio-controller: Marks the device node as a gpio controller.
+
+Optional properties:
+ - no-output: disables driving output on the pins
+
+Examples:
+ gpio1: nand-gpio-out@1f300010 {
+ compatible = "ni,169445-nand-gpio";
+ reg = <0x1f300010 0x4>;
+ reg-names = "dat";
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpio2: nand-gpio-in@1f300014 {
+ compatible = "ni,169445-nand-gpio";
+ reg = <0x1f300014 0x4>;
+ reg-names = "dat";
+ gpio-controller;
+ #gpio-cells = <2>;
+ no-output;
+ };
diff --git a/drivers/gpio/gpio-mmio.c b/drivers/gpio/gpio-mmio.c
index d7d03ad..f7da40e 100644
--- a/drivers/gpio/gpio-mmio.c
+++ b/drivers/gpio/gpio-mmio.c
@@ -575,6 +575,7 @@ static void __iomem *bgpio_map(struct platform_device *pdev,
static const struct of_device_id bgpio_of_match[] = {
{ .compatible = "brcm,bcm6345-gpio" },
{ .compatible = "wd,mbl-gpio" },
+ { .compatible = "ni,169445-nand-gpio" },
{ }
};
MODULE_DEVICE_TABLE(of, bgpio_of_match);
--
2.1.4
[PATCH 2/2] MIPS: NI 169445 board support
Support the National Instruments 169445 board.
Signed-off-by: Nathan Sullivan <nathan.sulli...@ni.com>
---
Documentation/devicetree/bindings/mips/ni.txt | 7 ++
MAINTAINERS | 8 ++
arch/mips/boot/dts/Makefile | 1 +
arch/mips/boot/dts/ni/169445.dts| 101
arch/mips/boot/dts/ni/Makefile | 7 ++
arch/mips/configs/generic/board-ni169445.config | 27 +++
arch/mips/generic/Kconfig | 6 ++
arch/mips/generic/vmlinux.its.S | 25 ++
8 files changed, 182 insertions(+)
create mode 100644 Documentation/devicetree/bindings/mips/ni.txt
create mode 100644 arch/mips/boot/dts/ni/169445.dts
create mode 100644 arch/mips/boot/dts/ni/Makefile
create mode 100644 arch/mips/configs/generic/board-ni169445.config
diff --git a/Documentation/devicetree/bindings/mips/ni.txt
b/Documentation/devicetree/bindings/mips/ni.txt
new file mode 100644
index 000..722bf2d
--- /dev/null
+++ b/Documentation/devicetree/bindings/mips/ni.txt
@@ -0,0 +1,7 @@
+National Instruments MIPS platforms
+
+required root node properties:
+ - compatible: must be "ni,169445"
+
+CPU Nodes
+ - compatible: must be "mti,mips14KEc"
diff --git a/MAINTAINERS b/MAINTAINERS
index c265a5f..b72f059 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -8887,6 +8887,14 @@ F: include/linux/sunrpc/
F: include/uapi/linux/nfs*
F: include/uapi/linux/sunrpc/
+NI169445 MIPS ARCHITECTURE
+M: Nathan Sullivan <nathan.sulli...@ni.com>
+L: linux-m...@linux-mips.org
+S: Maintained
+F: arch/mips/boot/dts/ni/
+F: arch/mips/configs/generic/board-ni169445.config
+F: Documentation/devicetree/bindings/mips/ni.txt
+
NILFS2 FILESYSTEM
M: Ryusuke Konishi <konishi.ryus...@lab.ntt.co.jp>
L: linux-ni...@vger.kernel.org
diff --git a/arch/mips/boot/dts/Makefile b/arch/mips/boot/dts/Makefile
index b9db492..27b0f37 100644
--- a/arch/mips/boot/dts/Makefile
+++ b/arch/mips/boot/dts/Makefile
@@ -4,6 +4,7 @@ dts-dirs+= img
dts-dirs += ingenic
dts-dirs += lantiq
dts-dirs += mti
+dts-dirs += ni
dts-dirs += netlogic
dts-dirs += pic32
dts-dirs += qca
diff --git a/arch/mips/boot/dts/ni/169445.dts b/arch/mips/boot/dts/ni/169445.dts
new file mode 100644
index 000..58e74b5
--- /dev/null
+++ b/arch/mips/boot/dts/ni/169445.dts
@@ -0,0 +1,101 @@
+/dts-v1/;
+
+/ {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "ni,169445";
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ cpu@0 {
+ device_type = "cpu";
+ compatible = "mti,mips14KEc";
+ clocks = <>;
+ reg = <0>;
+ };
+ };
+
+ memory@0 {
+ device_type = "memory";
+ reg = <0x0 0x1000>;
+ };
+
+ baseclk: baseclock {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <5000>;
+ };
+
+ cpu_intc: cpu_intc {
+ #address-cells = <0>;
+ compatible = "mti,cpu-interrupt-controller";
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ };
+
+ ahb@0 {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x1f30 0x80FFF>;
+
+ gpio1:gpio-controller@1f300010 {
+ compatible = "ni,169445-nand-gpio";
+ reg = <0x10 0x4>;
+ reg-names = "dat";
+ gpio-controller;
+ #gpio-cells = <2>;
+ ngpios = <5>;
+ };
+
+ gpio2:gpio-controller@1f300014 {
+ compatible = "ni,169445-nand-gpio";
+ reg = <0x14 0x4>;
+ reg-names = "dat";
+ gpio-controller;
+ #gpio-cells = <2>;
+ ngpios = <1>;
+ };
+
+ nand@1f30 {
+ compatible = "gpio-control-nand";
+ nand-on-flash-bbt;
+ nand-ecc-mode = "soft_bch";
+ nand-ecc-step-size = <512>;
+ nand-ecc-strength = <4>;
+ reg = <0x0 4>;
+ gpios = < 0 0>, /* rdy */
+ <
[PATCH 2/2] MIPS: NI 169445 board support
Support the National Instruments 169445 board.
Signed-off-by: Nathan Sullivan
---
Documentation/devicetree/bindings/mips/ni.txt | 7 ++
MAINTAINERS | 8 ++
arch/mips/boot/dts/Makefile | 1 +
arch/mips/boot/dts/ni/169445.dts| 101
arch/mips/boot/dts/ni/Makefile | 7 ++
arch/mips/configs/generic/board-ni169445.config | 27 +++
arch/mips/generic/Kconfig | 6 ++
arch/mips/generic/vmlinux.its.S | 25 ++
8 files changed, 182 insertions(+)
create mode 100644 Documentation/devicetree/bindings/mips/ni.txt
create mode 100644 arch/mips/boot/dts/ni/169445.dts
create mode 100644 arch/mips/boot/dts/ni/Makefile
create mode 100644 arch/mips/configs/generic/board-ni169445.config
diff --git a/Documentation/devicetree/bindings/mips/ni.txt
b/Documentation/devicetree/bindings/mips/ni.txt
new file mode 100644
index 000..722bf2d
--- /dev/null
+++ b/Documentation/devicetree/bindings/mips/ni.txt
@@ -0,0 +1,7 @@
+National Instruments MIPS platforms
+
+required root node properties:
+ - compatible: must be "ni,169445"
+
+CPU Nodes
+ - compatible: must be "mti,mips14KEc"
diff --git a/MAINTAINERS b/MAINTAINERS
index c265a5f..b72f059 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -8887,6 +8887,14 @@ F: include/linux/sunrpc/
F: include/uapi/linux/nfs*
F: include/uapi/linux/sunrpc/
+NI169445 MIPS ARCHITECTURE
+M: Nathan Sullivan
+L: linux-m...@linux-mips.org
+S: Maintained
+F: arch/mips/boot/dts/ni/
+F: arch/mips/configs/generic/board-ni169445.config
+F: Documentation/devicetree/bindings/mips/ni.txt
+
NILFS2 FILESYSTEM
M: Ryusuke Konishi
L: linux-ni...@vger.kernel.org
diff --git a/arch/mips/boot/dts/Makefile b/arch/mips/boot/dts/Makefile
index b9db492..27b0f37 100644
--- a/arch/mips/boot/dts/Makefile
+++ b/arch/mips/boot/dts/Makefile
@@ -4,6 +4,7 @@ dts-dirs+= img
dts-dirs += ingenic
dts-dirs += lantiq
dts-dirs += mti
+dts-dirs += ni
dts-dirs += netlogic
dts-dirs += pic32
dts-dirs += qca
diff --git a/arch/mips/boot/dts/ni/169445.dts b/arch/mips/boot/dts/ni/169445.dts
new file mode 100644
index 000..58e74b5
--- /dev/null
+++ b/arch/mips/boot/dts/ni/169445.dts
@@ -0,0 +1,101 @@
+/dts-v1/;
+
+/ {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "ni,169445";
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ cpu@0 {
+ device_type = "cpu";
+ compatible = "mti,mips14KEc";
+ clocks = <>;
+ reg = <0>;
+ };
+ };
+
+ memory@0 {
+ device_type = "memory";
+ reg = <0x0 0x1000>;
+ };
+
+ baseclk: baseclock {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <5000>;
+ };
+
+ cpu_intc: cpu_intc {
+ #address-cells = <0>;
+ compatible = "mti,cpu-interrupt-controller";
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ };
+
+ ahb@0 {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x1f30 0x80FFF>;
+
+ gpio1:gpio-controller@1f300010 {
+ compatible = "ni,169445-nand-gpio";
+ reg = <0x10 0x4>;
+ reg-names = "dat";
+ gpio-controller;
+ #gpio-cells = <2>;
+ ngpios = <5>;
+ };
+
+ gpio2:gpio-controller@1f300014 {
+ compatible = "ni,169445-nand-gpio";
+ reg = <0x14 0x4>;
+ reg-names = "dat";
+ gpio-controller;
+ #gpio-cells = <2>;
+ ngpios = <1>;
+ };
+
+ nand@1f30 {
+ compatible = "gpio-control-nand";
+ nand-on-flash-bbt;
+ nand-ecc-mode = "soft_bch";
+ nand-ecc-step-size = <512>;
+ nand-ecc-strength = <4>;
+ reg = <0x0 4>;
+ gpios = < 0 0>, /* rdy */
+ < 1 0>, /* nce */
+ < 2 0>, /* ale */
+ <
[PATCH v3] NI 169445 board support
Add support for the National Instruments 169445 board Changes from v2: - Hand write the board config fragment, and make it more minimal. - Add myself as the maintainer of new dirs and files.
[PATCH v3] NI 169445 board support
Add support for the National Instruments 169445 board Changes from v2: - Hand write the board config fragment, and make it more minimal. - Add myself as the maintainer of new dirs and files.
[PATCH 1/2] gpio: mmio: add support for NI 169445 NAND GPIO
The GPIO-based NAND controller on National Instruments 169445 hardware
exposes a set of simple lines for the control signals.
Signed-off-by: Nathan Sullivan <nathan.sulli...@ni.com>
---
.../bindings/gpio/ni,169445-nand-gpio.txt | 36 ++
drivers/gpio/gpio-mmio.c | 1 +
2 files changed, 37 insertions(+)
create mode 100644
Documentation/devicetree/bindings/gpio/ni,169445-nand-gpio.txt
diff --git a/Documentation/devicetree/bindings/gpio/ni,169445-nand-gpio.txt
b/Documentation/devicetree/bindings/gpio/ni,169445-nand-gpio.txt
new file mode 100644
index 000..ca2c14f
--- /dev/null
+++ b/Documentation/devicetree/bindings/gpio/ni,169445-nand-gpio.txt
@@ -0,0 +1,36 @@
+Bindings for the National Instruments 169445 GPIO NAND controller
+
+The 169445 GPIO NAND controller has two memory mapped GPIO registers, one
+for input (the ready signal) and one for output (control signals). It is
+intended to be used with the GPIO NAND driver.
+
+Required properties:
+ - compatible: should be "ni,169445-nand-gpio"
+ - reg-names: must contain
+ "dat" - data register
+ - reg: address + size pairs describing the GPIO register sets;
+ order must correspond with the order of entries in reg-names
+ - #gpio-cells: must be set to 2. The first cell is the pin number and
+ the second cell is used to specify the gpio polarity:
+ 0 = active high
+ 1 = active low
+ - gpio-controller: Marks the device node as a gpio controller.
+
+Examples:
+ gpio1: nand-gpio-out@1f300010 {
+ compatible = "ni,169445-nand-gpio";
+ reg = <0x1f300010 0x4>;
+ reg-names = "dat";
+ gpio-controller;
+ #gpio-cells = <2>;
+ ngpios = <5>;
+ };
+
+ gpio2: nand-gpio-in@1f300014 {
+ compatible = "ni,169445-nand-gpio";
+ reg = <0x1f300014 0x4>;
+ reg-names = "dat";
+ gpio-controller;
+ #gpio-cells = <2>;
+ ngpios = <1>;
+ };
diff --git a/drivers/gpio/gpio-mmio.c b/drivers/gpio/gpio-mmio.c
index d7d03ad..f7da40e 100644
--- a/drivers/gpio/gpio-mmio.c
+++ b/drivers/gpio/gpio-mmio.c
@@ -575,6 +575,7 @@ static void __iomem *bgpio_map(struct platform_device *pdev,
static const struct of_device_id bgpio_of_match[] = {
{ .compatible = "brcm,bcm6345-gpio" },
{ .compatible = "wd,mbl-gpio" },
+ { .compatible = "ni,169445-nand-gpio" },
{ }
};
MODULE_DEVICE_TABLE(of, bgpio_of_match);
--
2.1.4
[PATCH 1/2] gpio: mmio: add support for NI 169445 NAND GPIO
The GPIO-based NAND controller on National Instruments 169445 hardware
exposes a set of simple lines for the control signals.
Signed-off-by: Nathan Sullivan
---
.../bindings/gpio/ni,169445-nand-gpio.txt | 36 ++
drivers/gpio/gpio-mmio.c | 1 +
2 files changed, 37 insertions(+)
create mode 100644
Documentation/devicetree/bindings/gpio/ni,169445-nand-gpio.txt
diff --git a/Documentation/devicetree/bindings/gpio/ni,169445-nand-gpio.txt
b/Documentation/devicetree/bindings/gpio/ni,169445-nand-gpio.txt
new file mode 100644
index 000..ca2c14f
--- /dev/null
+++ b/Documentation/devicetree/bindings/gpio/ni,169445-nand-gpio.txt
@@ -0,0 +1,36 @@
+Bindings for the National Instruments 169445 GPIO NAND controller
+
+The 169445 GPIO NAND controller has two memory mapped GPIO registers, one
+for input (the ready signal) and one for output (control signals). It is
+intended to be used with the GPIO NAND driver.
+
+Required properties:
+ - compatible: should be "ni,169445-nand-gpio"
+ - reg-names: must contain
+ "dat" - data register
+ - reg: address + size pairs describing the GPIO register sets;
+ order must correspond with the order of entries in reg-names
+ - #gpio-cells: must be set to 2. The first cell is the pin number and
+ the second cell is used to specify the gpio polarity:
+ 0 = active high
+ 1 = active low
+ - gpio-controller: Marks the device node as a gpio controller.
+
+Examples:
+ gpio1: nand-gpio-out@1f300010 {
+ compatible = "ni,169445-nand-gpio";
+ reg = <0x1f300010 0x4>;
+ reg-names = "dat";
+ gpio-controller;
+ #gpio-cells = <2>;
+ ngpios = <5>;
+ };
+
+ gpio2: nand-gpio-in@1f300014 {
+ compatible = "ni,169445-nand-gpio";
+ reg = <0x1f300014 0x4>;
+ reg-names = "dat";
+ gpio-controller;
+ #gpio-cells = <2>;
+ ngpios = <1>;
+ };
diff --git a/drivers/gpio/gpio-mmio.c b/drivers/gpio/gpio-mmio.c
index d7d03ad..f7da40e 100644
--- a/drivers/gpio/gpio-mmio.c
+++ b/drivers/gpio/gpio-mmio.c
@@ -575,6 +575,7 @@ static void __iomem *bgpio_map(struct platform_device *pdev,
static const struct of_device_id bgpio_of_match[] = {
{ .compatible = "brcm,bcm6345-gpio" },
{ .compatible = "wd,mbl-gpio" },
+ { .compatible = "ni,169445-nand-gpio" },
{ }
};
MODULE_DEVICE_TABLE(of, bgpio_of_match);
--
2.1.4
[PATCH v2] MIPS: NI 169445 board support
This adds support for the National Instruments 169445 MIPS system. Changes from v1: - Add GPIO patch and board support patch to one set - Address Rob Herring's device tree feedback - Convert the 169445 to a generic MIPS board - Switch to the newer stmmac driver for the board's ethernet core
[PATCH v2] MIPS: NI 169445 board support
This adds support for the National Instruments 169445 MIPS system. Changes from v1: - Add GPIO patch and board support patch to one set - Address Rob Herring's device tree feedback - Convert the 169445 to a generic MIPS board - Switch to the newer stmmac driver for the board's ethernet core
Re: [PATCH 2/2] MIPS: NI 169445 board support
On Mon, Mar 06, 2017 at 11:04:13PM +, James Hogan wrote: > Hi Nathan, > > On Mon, Mar 06, 2017 at 02:06:01PM -0600, Nathan Sullivan wrote: > > Support the National Instruments 169445 board. > > > > Signed-off-by: Nathan Sullivan <nathan.sulli...@ni.com> > > --- > > Documentation/devicetree/bindings/mips/ni.txt | 7 ++ > > arch/mips/boot/dts/Makefile | 1 + > > arch/mips/boot/dts/ni/169445.dts| 101 > > arch/mips/boot/dts/ni/Makefile | 7 ++ > > arch/mips/configs/generic/board-ni169445.config | 117 > > > > arch/mips/generic/Kconfig | 6 ++ > > arch/mips/generic/vmlinux.its.S | 25 + > > 7 files changed, 264 insertions(+) > > create mode 100644 Documentation/devicetree/bindings/mips/ni.txt > > create mode 100644 arch/mips/boot/dts/ni/169445.dts > > create mode 100644 arch/mips/boot/dts/ni/Makefile > > create mode 100644 arch/mips/configs/generic/board-ni169445.config > > > > nice :) > > I reckon an entry in MAINTAINERS listing the board specific > files/directories would probably be worthwhile too. > OK, will do. > > diff --git a/arch/mips/configs/generic/board-ni169445.config > > b/arch/mips/configs/generic/board-ni169445.config > > new file mode 100644 > > index 000..2c950a8 > > --- /dev/null > > +++ b/arch/mips/configs/generic/board-ni169445.config > > @@ -0,0 +1,117 @@ > > +CONFIG_MIPS_GENERIC=y > > +CONFIG_FIT_IMAGE_FDT_NI169445=y > > +CONFIG_CPU_LITTLE_ENDIAN=y > > +CONFIG_CPU_MIPS32_R2=y > > +CONFIG_HZ_100=y > > +CONFIG_MIPS_CMDLINE_FROM_BOOTLOADER=y > > +# CONFIG_SWAP is not set > > +CONFIG_SYSVIPC=y > > +CONFIG_HZ_PERIODIC=y > > +CONFIG_NO_HZ=y > > +CONFIG_HIGH_RES_TIMERS=y > > +CONFIG_IKCONFIG=y > > +CONFIG_IKCONFIG_PROC=y > > +CONFIG_LOG_BUF_SHIFT=15 > > +CONFIG_BPF_SYSCALL=y > > +# CONFIG_SHMEM is not set > > +CONFIG_USERFAULTFD=y > > +CONFIG_EMBEDDED=y > > +# CONFIG_COMPAT_BRK is not set > > +CONFIG_SLAB=y > > +CONFIG_PROFILING=y > > +CONFIG_CC_STACKPROTECTOR_REGULAR=y > > +# CONFIG_LBDAF is not set > > +# CONFIG_BLK_DEV_BSG is not set > > +# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set > > +# CONFIG_SUSPEND is not set > > +CONFIG_NET=y > > +CONFIG_PACKET=y > > +CONFIG_UNIX=y > > +CONFIG_INET=y > > +# CONFIG_INET_XFRM_MODE_TRANSPORT is not set > > +# CONFIG_INET_XFRM_MODE_TUNNEL is not set > > +# CONFIG_INET_XFRM_MODE_BEET is not set > > +# CONFIG_INET_DIAG is not set > > +# CONFIG_INET6_XFRM_MODE_TRANSPORT is not set > > +# CONFIG_INET6_XFRM_MODE_TUNNEL is not set > > +CONFIG_NETFILTER=y > > +CONFIG_NETFILTER_XT_MATCH_MULTIPORT=y > > +CONFIG_IP_NF_IPTABLES=y > > +CONFIG_IP_NF_FILTER=y > > +CONFIG_IP6_NF_IPTABLES=y > > +CONFIG_IP6_NF_FILTER=y > > +# CONFIG_WIRELESS is not set > > +CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" > > +CONFIG_DEVTMPFS=y > > +CONFIG_DEVTMPFS_MOUNT=y > > +CONFIG_MTD=y > > +CONFIG_MTD_CMDLINE_PARTS=y > > +CONFIG_MTD_BLOCK_RO=y > > +CONFIG_MTD_NAND=y > > +CONFIG_MTD_NAND_ECC_BCH=y > > +CONFIG_MTD_NAND_GPIO=y > > +CONFIG_MTD_UBI=y > > +CONFIG_MTD_UBI_BLOCK=y > > +# CONFIG_BLK_DEV is not set > > +CONFIG_NETDEVICES=y > > +# CONFIG_NET_VENDOR_ALACRITECH is not set > > +# CONFIG_NET_VENDOR_AMAZON is not set > > +# CONFIG_NET_VENDOR_AQUANTIA is not set > > +# CONFIG_NET_VENDOR_ARC is not set > > +# CONFIG_NET_CADENCE is not set > > +# CONFIG_NET_VENDOR_BROADCOM is not set > > +# CONFIG_NET_VENDOR_EZCHIP is not set > > +# CONFIG_NET_VENDOR_INTEL is not set > > +# CONFIG_NET_VENDOR_MARVELL is not set > > +# CONFIG_NET_VENDOR_MICREL is not set > > +# CONFIG_NET_VENDOR_NATSEMI is not set > > +# CONFIG_NET_VENDOR_NETRONOME is not set > > +# CONFIG_NET_VENDOR_QUALCOMM is not set > > +# CONFIG_NET_VENDOR_RENESAS is not set > > +# CONFIG_NET_VENDOR_ROCKER is not set > > +# CONFIG_NET_VENDOR_SAMSUNG is not set > > +# CONFIG_NET_VENDOR_SEEQ is not set > > +# CONFIG_NET_VENDOR_SOLARFLARE is not set > > +# CONFIG_NET_VENDOR_SMSC is not set > > +CONFIG_STMMAC_ETH=y > > +CONFIG_DWMAC_DWC_QOS_ETH=y > > +# CONFIG_NET_VENDOR_VIA is not set > > +# CONFIG_NET_VENDOR_WIZNET is not set > > +# CONFIG_NET_VENDOR_XILINX is not set > > +# CONFIG_WLAN is not set > > +# CONFIG_INPUT_KEYBOARD is not set > > +# CONFIG_INPUT_MOUSE is not se
Re: [PATCH 2/2] MIPS: NI 169445 board support
On Mon, Mar 06, 2017 at 11:04:13PM +, James Hogan wrote: > Hi Nathan, > > On Mon, Mar 06, 2017 at 02:06:01PM -0600, Nathan Sullivan wrote: > > Support the National Instruments 169445 board. > > > > Signed-off-by: Nathan Sullivan > > --- > > Documentation/devicetree/bindings/mips/ni.txt | 7 ++ > > arch/mips/boot/dts/Makefile | 1 + > > arch/mips/boot/dts/ni/169445.dts| 101 > > arch/mips/boot/dts/ni/Makefile | 7 ++ > > arch/mips/configs/generic/board-ni169445.config | 117 > > > > arch/mips/generic/Kconfig | 6 ++ > > arch/mips/generic/vmlinux.its.S | 25 + > > 7 files changed, 264 insertions(+) > > create mode 100644 Documentation/devicetree/bindings/mips/ni.txt > > create mode 100644 arch/mips/boot/dts/ni/169445.dts > > create mode 100644 arch/mips/boot/dts/ni/Makefile > > create mode 100644 arch/mips/configs/generic/board-ni169445.config > > > > nice :) > > I reckon an entry in MAINTAINERS listing the board specific > files/directories would probably be worthwhile too. > OK, will do. > > diff --git a/arch/mips/configs/generic/board-ni169445.config > > b/arch/mips/configs/generic/board-ni169445.config > > new file mode 100644 > > index 000..2c950a8 > > --- /dev/null > > +++ b/arch/mips/configs/generic/board-ni169445.config > > @@ -0,0 +1,117 @@ > > +CONFIG_MIPS_GENERIC=y > > +CONFIG_FIT_IMAGE_FDT_NI169445=y > > +CONFIG_CPU_LITTLE_ENDIAN=y > > +CONFIG_CPU_MIPS32_R2=y > > +CONFIG_HZ_100=y > > +CONFIG_MIPS_CMDLINE_FROM_BOOTLOADER=y > > +# CONFIG_SWAP is not set > > +CONFIG_SYSVIPC=y > > +CONFIG_HZ_PERIODIC=y > > +CONFIG_NO_HZ=y > > +CONFIG_HIGH_RES_TIMERS=y > > +CONFIG_IKCONFIG=y > > +CONFIG_IKCONFIG_PROC=y > > +CONFIG_LOG_BUF_SHIFT=15 > > +CONFIG_BPF_SYSCALL=y > > +# CONFIG_SHMEM is not set > > +CONFIG_USERFAULTFD=y > > +CONFIG_EMBEDDED=y > > +# CONFIG_COMPAT_BRK is not set > > +CONFIG_SLAB=y > > +CONFIG_PROFILING=y > > +CONFIG_CC_STACKPROTECTOR_REGULAR=y > > +# CONFIG_LBDAF is not set > > +# CONFIG_BLK_DEV_BSG is not set > > +# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set > > +# CONFIG_SUSPEND is not set > > +CONFIG_NET=y > > +CONFIG_PACKET=y > > +CONFIG_UNIX=y > > +CONFIG_INET=y > > +# CONFIG_INET_XFRM_MODE_TRANSPORT is not set > > +# CONFIG_INET_XFRM_MODE_TUNNEL is not set > > +# CONFIG_INET_XFRM_MODE_BEET is not set > > +# CONFIG_INET_DIAG is not set > > +# CONFIG_INET6_XFRM_MODE_TRANSPORT is not set > > +# CONFIG_INET6_XFRM_MODE_TUNNEL is not set > > +CONFIG_NETFILTER=y > > +CONFIG_NETFILTER_XT_MATCH_MULTIPORT=y > > +CONFIG_IP_NF_IPTABLES=y > > +CONFIG_IP_NF_FILTER=y > > +CONFIG_IP6_NF_IPTABLES=y > > +CONFIG_IP6_NF_FILTER=y > > +# CONFIG_WIRELESS is not set > > +CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" > > +CONFIG_DEVTMPFS=y > > +CONFIG_DEVTMPFS_MOUNT=y > > +CONFIG_MTD=y > > +CONFIG_MTD_CMDLINE_PARTS=y > > +CONFIG_MTD_BLOCK_RO=y > > +CONFIG_MTD_NAND=y > > +CONFIG_MTD_NAND_ECC_BCH=y > > +CONFIG_MTD_NAND_GPIO=y > > +CONFIG_MTD_UBI=y > > +CONFIG_MTD_UBI_BLOCK=y > > +# CONFIG_BLK_DEV is not set > > +CONFIG_NETDEVICES=y > > +# CONFIG_NET_VENDOR_ALACRITECH is not set > > +# CONFIG_NET_VENDOR_AMAZON is not set > > +# CONFIG_NET_VENDOR_AQUANTIA is not set > > +# CONFIG_NET_VENDOR_ARC is not set > > +# CONFIG_NET_CADENCE is not set > > +# CONFIG_NET_VENDOR_BROADCOM is not set > > +# CONFIG_NET_VENDOR_EZCHIP is not set > > +# CONFIG_NET_VENDOR_INTEL is not set > > +# CONFIG_NET_VENDOR_MARVELL is not set > > +# CONFIG_NET_VENDOR_MICREL is not set > > +# CONFIG_NET_VENDOR_NATSEMI is not set > > +# CONFIG_NET_VENDOR_NETRONOME is not set > > +# CONFIG_NET_VENDOR_QUALCOMM is not set > > +# CONFIG_NET_VENDOR_RENESAS is not set > > +# CONFIG_NET_VENDOR_ROCKER is not set > > +# CONFIG_NET_VENDOR_SAMSUNG is not set > > +# CONFIG_NET_VENDOR_SEEQ is not set > > +# CONFIG_NET_VENDOR_SOLARFLARE is not set > > +# CONFIG_NET_VENDOR_SMSC is not set > > +CONFIG_STMMAC_ETH=y > > +CONFIG_DWMAC_DWC_QOS_ETH=y > > +# CONFIG_NET_VENDOR_VIA is not set > > +# CONFIG_NET_VENDOR_WIZNET is not set > > +# CONFIG_NET_VENDOR_XILINX is not set > > +# CONFIG_WLAN is not set > > +# CONFIG_INPUT_KEYBOARD is not set > > +# CONFIG_INPUT_MOUSE is not set > > +# CONFIG_SERIO is not
[PATCH 2/2] MIPS: NI 169445 board support
Support the National Instruments 169445 board.
Signed-off-by: Nathan Sullivan <nathan.sulli...@ni.com>
---
Documentation/devicetree/bindings/mips/ni.txt | 7 ++
arch/mips/boot/dts/Makefile | 1 +
arch/mips/boot/dts/ni/169445.dts| 101
arch/mips/boot/dts/ni/Makefile | 7 ++
arch/mips/configs/generic/board-ni169445.config | 117
arch/mips/generic/Kconfig | 6 ++
arch/mips/generic/vmlinux.its.S | 25 +
7 files changed, 264 insertions(+)
create mode 100644 Documentation/devicetree/bindings/mips/ni.txt
create mode 100644 arch/mips/boot/dts/ni/169445.dts
create mode 100644 arch/mips/boot/dts/ni/Makefile
create mode 100644 arch/mips/configs/generic/board-ni169445.config
diff --git a/Documentation/devicetree/bindings/mips/ni.txt
b/Documentation/devicetree/bindings/mips/ni.txt
new file mode 100644
index 000..722bf2d
--- /dev/null
+++ b/Documentation/devicetree/bindings/mips/ni.txt
@@ -0,0 +1,7 @@
+National Instruments MIPS platforms
+
+required root node properties:
+ - compatible: must be "ni,169445"
+
+CPU Nodes
+ - compatible: must be "mti,mips14KEc"
diff --git a/arch/mips/boot/dts/Makefile b/arch/mips/boot/dts/Makefile
index b9db492..27b0f37 100644
--- a/arch/mips/boot/dts/Makefile
+++ b/arch/mips/boot/dts/Makefile
@@ -4,6 +4,7 @@ dts-dirs+= img
dts-dirs += ingenic
dts-dirs += lantiq
dts-dirs += mti
+dts-dirs += ni
dts-dirs += netlogic
dts-dirs += pic32
dts-dirs += qca
diff --git a/arch/mips/boot/dts/ni/169445.dts b/arch/mips/boot/dts/ni/169445.dts
new file mode 100644
index 000..58e74b5
--- /dev/null
+++ b/arch/mips/boot/dts/ni/169445.dts
@@ -0,0 +1,101 @@
+/dts-v1/;
+
+/ {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "ni,169445";
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ cpu@0 {
+ device_type = "cpu";
+ compatible = "mti,mips14KEc";
+ clocks = <>;
+ reg = <0>;
+ };
+ };
+
+ memory@0 {
+ device_type = "memory";
+ reg = <0x0 0x1000>;
+ };
+
+ baseclk: baseclock {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <5000>;
+ };
+
+ cpu_intc: cpu_intc {
+ #address-cells = <0>;
+ compatible = "mti,cpu-interrupt-controller";
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ };
+
+ ahb@0 {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x1f30 0x80FFF>;
+
+ gpio1:gpio-controller@1f300010 {
+ compatible = "ni,169445-nand-gpio";
+ reg = <0x10 0x4>;
+ reg-names = "dat";
+ gpio-controller;
+ #gpio-cells = <2>;
+ ngpios = <5>;
+ };
+
+ gpio2:gpio-controller@1f300014 {
+ compatible = "ni,169445-nand-gpio";
+ reg = <0x14 0x4>;
+ reg-names = "dat";
+ gpio-controller;
+ #gpio-cells = <2>;
+ ngpios = <1>;
+ };
+
+ nand@1f30 {
+ compatible = "gpio-control-nand";
+ nand-on-flash-bbt;
+ nand-ecc-mode = "soft_bch";
+ nand-ecc-step-size = <512>;
+ nand-ecc-strength = <4>;
+ reg = <0x0 4>;
+ gpios = < 0 0>, /* rdy */
+ < 1 0>, /* nce */
+ < 2 0>, /* ale */
+ < 3 0>, /* cle */
+ < 4 0>; /* nwp */
+ };
+
+ serial@1f38 {
+ compatible = "ns16550a";
+ reg = <0x8 0x1000>;
+ interrupt-parent = <_intc>;
+ interrupts = <6>;
+ clocks = <>;
+ reg-shift = <0>;
+ };
+
+ ethernet@1f34 {
+ compatible = "snps,dwmac-4.10a";
+
[PATCH 2/2] MIPS: NI 169445 board support
Support the National Instruments 169445 board.
Signed-off-by: Nathan Sullivan
---
Documentation/devicetree/bindings/mips/ni.txt | 7 ++
arch/mips/boot/dts/Makefile | 1 +
arch/mips/boot/dts/ni/169445.dts| 101
arch/mips/boot/dts/ni/Makefile | 7 ++
arch/mips/configs/generic/board-ni169445.config | 117
arch/mips/generic/Kconfig | 6 ++
arch/mips/generic/vmlinux.its.S | 25 +
7 files changed, 264 insertions(+)
create mode 100644 Documentation/devicetree/bindings/mips/ni.txt
create mode 100644 arch/mips/boot/dts/ni/169445.dts
create mode 100644 arch/mips/boot/dts/ni/Makefile
create mode 100644 arch/mips/configs/generic/board-ni169445.config
diff --git a/Documentation/devicetree/bindings/mips/ni.txt
b/Documentation/devicetree/bindings/mips/ni.txt
new file mode 100644
index 000..722bf2d
--- /dev/null
+++ b/Documentation/devicetree/bindings/mips/ni.txt
@@ -0,0 +1,7 @@
+National Instruments MIPS platforms
+
+required root node properties:
+ - compatible: must be "ni,169445"
+
+CPU Nodes
+ - compatible: must be "mti,mips14KEc"
diff --git a/arch/mips/boot/dts/Makefile b/arch/mips/boot/dts/Makefile
index b9db492..27b0f37 100644
--- a/arch/mips/boot/dts/Makefile
+++ b/arch/mips/boot/dts/Makefile
@@ -4,6 +4,7 @@ dts-dirs+= img
dts-dirs += ingenic
dts-dirs += lantiq
dts-dirs += mti
+dts-dirs += ni
dts-dirs += netlogic
dts-dirs += pic32
dts-dirs += qca
diff --git a/arch/mips/boot/dts/ni/169445.dts b/arch/mips/boot/dts/ni/169445.dts
new file mode 100644
index 000..58e74b5
--- /dev/null
+++ b/arch/mips/boot/dts/ni/169445.dts
@@ -0,0 +1,101 @@
+/dts-v1/;
+
+/ {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "ni,169445";
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ cpu@0 {
+ device_type = "cpu";
+ compatible = "mti,mips14KEc";
+ clocks = <>;
+ reg = <0>;
+ };
+ };
+
+ memory@0 {
+ device_type = "memory";
+ reg = <0x0 0x1000>;
+ };
+
+ baseclk: baseclock {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <5000>;
+ };
+
+ cpu_intc: cpu_intc {
+ #address-cells = <0>;
+ compatible = "mti,cpu-interrupt-controller";
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ };
+
+ ahb@0 {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x1f30 0x80FFF>;
+
+ gpio1:gpio-controller@1f300010 {
+ compatible = "ni,169445-nand-gpio";
+ reg = <0x10 0x4>;
+ reg-names = "dat";
+ gpio-controller;
+ #gpio-cells = <2>;
+ ngpios = <5>;
+ };
+
+ gpio2:gpio-controller@1f300014 {
+ compatible = "ni,169445-nand-gpio";
+ reg = <0x14 0x4>;
+ reg-names = "dat";
+ gpio-controller;
+ #gpio-cells = <2>;
+ ngpios = <1>;
+ };
+
+ nand@1f30 {
+ compatible = "gpio-control-nand";
+ nand-on-flash-bbt;
+ nand-ecc-mode = "soft_bch";
+ nand-ecc-step-size = <512>;
+ nand-ecc-strength = <4>;
+ reg = <0x0 4>;
+ gpios = < 0 0>, /* rdy */
+ < 1 0>, /* nce */
+ < 2 0>, /* ale */
+ < 3 0>, /* cle */
+ < 4 0>; /* nwp */
+ };
+
+ serial@1f38 {
+ compatible = "ns16550a";
+ reg = <0x8 0x1000>;
+ interrupt-parent = <_intc>;
+ interrupts = <6>;
+ clocks = <>;
+ reg-shift = <0>;
+ };
+
+ ethernet@1f34 {
+ compatible = "snps,dwmac-4.10a";
+
[PATCH 1/2] gpio: mmio: add support for NI 169445 NAND GPIO
The GPIO-based NAND controller on National Instruments 169445 hardware
exposes a set of simple lines for the control signals.
Signed-off-by: Nathan Sullivan <nathan.sulli...@ni.com>
---
.../bindings/gpio/ni,169445-nand-gpio.txt | 36 ++
drivers/gpio/gpio-mmio.c | 1 +
2 files changed, 37 insertions(+)
create mode 100644
Documentation/devicetree/bindings/gpio/ni,169445-nand-gpio.txt
diff --git a/Documentation/devicetree/bindings/gpio/ni,169445-nand-gpio.txt
b/Documentation/devicetree/bindings/gpio/ni,169445-nand-gpio.txt
new file mode 100644
index 000..ca2c14f
--- /dev/null
+++ b/Documentation/devicetree/bindings/gpio/ni,169445-nand-gpio.txt
@@ -0,0 +1,36 @@
+Bindings for the National Instruments 169445 GPIO NAND controller
+
+The 169445 GPIO NAND controller has two memory mapped GPIO registers, one
+for input (the ready signal) and one for output (control signals). It is
+intended to be used with the GPIO NAND driver.
+
+Required properties:
+ - compatible: should be "ni,169445-nand-gpio"
+ - reg-names: must contain
+ "dat" - data register
+ - reg: address + size pairs describing the GPIO register sets;
+ order must correspond with the order of entries in reg-names
+ - #gpio-cells: must be set to 2. The first cell is the pin number and
+ the second cell is used to specify the gpio polarity:
+ 0 = active high
+ 1 = active low
+ - gpio-controller: Marks the device node as a gpio controller.
+
+Examples:
+ gpio1: nand-gpio-out@1f300010 {
+ compatible = "ni,169445-nand-gpio";
+ reg = <0x1f300010 0x4>;
+ reg-names = "dat";
+ gpio-controller;
+ #gpio-cells = <2>;
+ ngpios = <5>;
+ };
+
+ gpio2: nand-gpio-in@1f300014 {
+ compatible = "ni,169445-nand-gpio";
+ reg = <0x1f300014 0x4>;
+ reg-names = "dat";
+ gpio-controller;
+ #gpio-cells = <2>;
+ ngpios = <1>;
+ };
diff --git a/drivers/gpio/gpio-mmio.c b/drivers/gpio/gpio-mmio.c
index d7d03ad..f7da40e 100644
--- a/drivers/gpio/gpio-mmio.c
+++ b/drivers/gpio/gpio-mmio.c
@@ -575,6 +575,7 @@ static void __iomem *bgpio_map(struct platform_device *pdev,
static const struct of_device_id bgpio_of_match[] = {
{ .compatible = "brcm,bcm6345-gpio" },
{ .compatible = "wd,mbl-gpio" },
+ { .compatible = "ni,169445-nand-gpio" },
{ }
};
MODULE_DEVICE_TABLE(of, bgpio_of_match);
--
2.1.4
[PATCH 1/2] gpio: mmio: add support for NI 169445 NAND GPIO
The GPIO-based NAND controller on National Instruments 169445 hardware
exposes a set of simple lines for the control signals.
Signed-off-by: Nathan Sullivan
---
.../bindings/gpio/ni,169445-nand-gpio.txt | 36 ++
drivers/gpio/gpio-mmio.c | 1 +
2 files changed, 37 insertions(+)
create mode 100644
Documentation/devicetree/bindings/gpio/ni,169445-nand-gpio.txt
diff --git a/Documentation/devicetree/bindings/gpio/ni,169445-nand-gpio.txt
b/Documentation/devicetree/bindings/gpio/ni,169445-nand-gpio.txt
new file mode 100644
index 000..ca2c14f
--- /dev/null
+++ b/Documentation/devicetree/bindings/gpio/ni,169445-nand-gpio.txt
@@ -0,0 +1,36 @@
+Bindings for the National Instruments 169445 GPIO NAND controller
+
+The 169445 GPIO NAND controller has two memory mapped GPIO registers, one
+for input (the ready signal) and one for output (control signals). It is
+intended to be used with the GPIO NAND driver.
+
+Required properties:
+ - compatible: should be "ni,169445-nand-gpio"
+ - reg-names: must contain
+ "dat" - data register
+ - reg: address + size pairs describing the GPIO register sets;
+ order must correspond with the order of entries in reg-names
+ - #gpio-cells: must be set to 2. The first cell is the pin number and
+ the second cell is used to specify the gpio polarity:
+ 0 = active high
+ 1 = active low
+ - gpio-controller: Marks the device node as a gpio controller.
+
+Examples:
+ gpio1: nand-gpio-out@1f300010 {
+ compatible = "ni,169445-nand-gpio";
+ reg = <0x1f300010 0x4>;
+ reg-names = "dat";
+ gpio-controller;
+ #gpio-cells = <2>;
+ ngpios = <5>;
+ };
+
+ gpio2: nand-gpio-in@1f300014 {
+ compatible = "ni,169445-nand-gpio";
+ reg = <0x1f300014 0x4>;
+ reg-names = "dat";
+ gpio-controller;
+ #gpio-cells = <2>;
+ ngpios = <1>;
+ };
diff --git a/drivers/gpio/gpio-mmio.c b/drivers/gpio/gpio-mmio.c
index d7d03ad..f7da40e 100644
--- a/drivers/gpio/gpio-mmio.c
+++ b/drivers/gpio/gpio-mmio.c
@@ -575,6 +575,7 @@ static void __iomem *bgpio_map(struct platform_device *pdev,
static const struct of_device_id bgpio_of_match[] = {
{ .compatible = "brcm,bcm6345-gpio" },
{ .compatible = "wd,mbl-gpio" },
+ { .compatible = "ni,169445-nand-gpio" },
{ }
};
MODULE_DEVICE_TABLE(of, bgpio_of_match);
--
2.1.4
Re: [PATCH] MIPS: NI 169445 board support
On Thu, Jan 05, 2017 at 06:33:53PM +, Joao Pinto wrote: > Hi, > > Às 6:28 PM de 1/5/2017, Niklas Cassel escreveu: > > On 01/04/2017 05:38 PM, Nathan Sullivan wrote: > >> On Tue, Dec 20, 2016 at 05:34:34PM +0100, Ralf Baechle wrote: > >>> On Fri, Dec 02, 2016 at 09:42:09AM -0600, Nathan Sullivan wrote: > >>>> Date: Fri, 2 Dec 2016 09:42:09 -0600 > >>>> From: Nathan Sullivan <nathan.sulli...@ni.com> > >>>> To: r...@linux-mips.org, mark.rutl...@arm.com, robh...@kernel.org > >>>> CC: linux-m...@linux-mips.org, devicet...@vger.kernel.org, > >>>> linux-kernel@vger.kernel.org, Nathan Sullivan <nathan.sulli...@ni.com> > >>>> Subject: [PATCH] MIPS: NI 169445 board support > >>>> Content-Type: text/plain > >>>> > >>>> Support the National Instruments 169445 board. > >>> Nathan, > >>> > >>> I assume you're going to repost the changes Rob asked for in > >>> https://urldefense.proofpoint.com/v2/url?u=https-3A__patchwork.linux-2Dmips.org_patch_14641_-2326924=DgICaQ=DPL6_X_6JkXFx7AXWqB0tg=s2fO0hii0OGNOv9qQy_HRXy-xAJUD1NNoEcc3io_kx0=5p7f9dIkvVVK4UFHimMpezq5NwIJfUpd08c-Zk4_c6c=_JwSwe4VFYtxV1tcYt6Z8r4hJX0xfoGhCixygUxlg5s= > >>> and resubmit? > >>> > >>> Thanks, > >>> > >>> Ralf > >> Hmm, I found the issue with the generic MIPS config and dwc_eth_qos. The > >> NIC > >> driver attempts to cache align a descriptor ring using the > >> ___cacheline_aligned > >> attribute on the descriptor struct, in combination with a "skip" feature in > >> hardware. However, the skip feature only has a three bit field, and the > >> generic > >> MIPS config selects MIPS_L1_CACHE_SHIFT_7. So, the line size is 128, and > >> with a > >> 64-bit bus, that means the NIC descriptor skip field would need to be set > >> to > >> 14 to align the 16-byte descriptors... > >> > >> I guess it makes sense for a generic MIPS kernel to align everything for > >> 128 byte > >> cache lines, and for me to fix the dwc_eth_qos driver to handle cases > >> where the > >> line size is too big for the hardware skip feature, right? > > > > I don't know if you've been following the discussion regarding > > dwc_eth_qos on netdev, but Joao Pinto from Synopsys is > > planning on removing the driver (since the stmmac driver > > now supports the same version of the IP, together with older > > versions of the IP). > > > > Since device tree bindings are treated as an ABI, > > Joao has implemented a glue layer for stmmac that parses > > the dwc_eth_qos binding, but uses stmmac under the hood. > > > > You can use any of the bindings, but since the dwc_eth_qos > > binding will be marked as deprecated, you might want to > > consider moving to the stmmac binding. > > A patch set to port dwc_eth_qos to stmmac is at this moment under review: > > http://patchwork.ozlabs.org/patch/711428/ > http://patchwork.ozlabs.org/patch/711438/ > http://patchwork.ozlabs.org/patch/711439/ > > Niklas has tested it and it works well, so after the patches are upstreamed > the > dwc_eth_qos will be removed as agreed with Lars. > > Thanks. > Thanks for the heads up, I'll wait, adjust my bindings and retest then. Nathan > > > >> > >> Thanks, > >> > >>Nathan > >> > >> > > >
Re: [PATCH] MIPS: NI 169445 board support
On Thu, Jan 05, 2017 at 06:33:53PM +, Joao Pinto wrote: > Hi, > > Às 6:28 PM de 1/5/2017, Niklas Cassel escreveu: > > On 01/04/2017 05:38 PM, Nathan Sullivan wrote: > >> On Tue, Dec 20, 2016 at 05:34:34PM +0100, Ralf Baechle wrote: > >>> On Fri, Dec 02, 2016 at 09:42:09AM -0600, Nathan Sullivan wrote: > >>>> Date: Fri, 2 Dec 2016 09:42:09 -0600 > >>>> From: Nathan Sullivan > >>>> To: r...@linux-mips.org, mark.rutl...@arm.com, robh...@kernel.org > >>>> CC: linux-m...@linux-mips.org, devicet...@vger.kernel.org, > >>>> linux-kernel@vger.kernel.org, Nathan Sullivan > >>>> Subject: [PATCH] MIPS: NI 169445 board support > >>>> Content-Type: text/plain > >>>> > >>>> Support the National Instruments 169445 board. > >>> Nathan, > >>> > >>> I assume you're going to repost the changes Rob asked for in > >>> https://urldefense.proofpoint.com/v2/url?u=https-3A__patchwork.linux-2Dmips.org_patch_14641_-2326924=DgICaQ=DPL6_X_6JkXFx7AXWqB0tg=s2fO0hii0OGNOv9qQy_HRXy-xAJUD1NNoEcc3io_kx0=5p7f9dIkvVVK4UFHimMpezq5NwIJfUpd08c-Zk4_c6c=_JwSwe4VFYtxV1tcYt6Z8r4hJX0xfoGhCixygUxlg5s= > >>> and resubmit? > >>> > >>> Thanks, > >>> > >>> Ralf > >> Hmm, I found the issue with the generic MIPS config and dwc_eth_qos. The > >> NIC > >> driver attempts to cache align a descriptor ring using the > >> ___cacheline_aligned > >> attribute on the descriptor struct, in combination with a "skip" feature in > >> hardware. However, the skip feature only has a three bit field, and the > >> generic > >> MIPS config selects MIPS_L1_CACHE_SHIFT_7. So, the line size is 128, and > >> with a > >> 64-bit bus, that means the NIC descriptor skip field would need to be set > >> to > >> 14 to align the 16-byte descriptors... > >> > >> I guess it makes sense for a generic MIPS kernel to align everything for > >> 128 byte > >> cache lines, and for me to fix the dwc_eth_qos driver to handle cases > >> where the > >> line size is too big for the hardware skip feature, right? > > > > I don't know if you've been following the discussion regarding > > dwc_eth_qos on netdev, but Joao Pinto from Synopsys is > > planning on removing the driver (since the stmmac driver > > now supports the same version of the IP, together with older > > versions of the IP). > > > > Since device tree bindings are treated as an ABI, > > Joao has implemented a glue layer for stmmac that parses > > the dwc_eth_qos binding, but uses stmmac under the hood. > > > > You can use any of the bindings, but since the dwc_eth_qos > > binding will be marked as deprecated, you might want to > > consider moving to the stmmac binding. > > A patch set to port dwc_eth_qos to stmmac is at this moment under review: > > http://patchwork.ozlabs.org/patch/711428/ > http://patchwork.ozlabs.org/patch/711438/ > http://patchwork.ozlabs.org/patch/711439/ > > Niklas has tested it and it works well, so after the patches are upstreamed > the > dwc_eth_qos will be removed as agreed with Lars. > > Thanks. > Thanks for the heads up, I'll wait, adjust my bindings and retest then. Nathan > > > >> > >> Thanks, > >> > >>Nathan > >> > >> > > >
Re: [PATCH] MIPS: NI 169445 board support
On Tue, Dec 20, 2016 at 05:34:34PM +0100, Ralf Baechle wrote: > On Fri, Dec 02, 2016 at 09:42:09AM -0600, Nathan Sullivan wrote: > > Date: Fri, 2 Dec 2016 09:42:09 -0600 > > From: Nathan Sullivan <nathan.sulli...@ni.com> > > To: r...@linux-mips.org, mark.rutl...@arm.com, robh...@kernel.org > > CC: linux-m...@linux-mips.org, devicet...@vger.kernel.org, > > linux-kernel@vger.kernel.org, Nathan Sullivan <nathan.sulli...@ni.com> > > Subject: [PATCH] MIPS: NI 169445 board support > > Content-Type: text/plain > > > > Support the National Instruments 169445 board. > > Nathan, > > I assume you're going to repost the changes Rob asked for in > https://patchwork.linux-mips.org/patch/14641/#26924 and resubmit? > > Thanks, > > Ralf Hmm, I found the issue with the generic MIPS config and dwc_eth_qos. The NIC driver attempts to cache align a descriptor ring using the ___cacheline_aligned attribute on the descriptor struct, in combination with a "skip" feature in hardware. However, the skip feature only has a three bit field, and the generic MIPS config selects MIPS_L1_CACHE_SHIFT_7. So, the line size is 128, and with a 64-bit bus, that means the NIC descriptor skip field would need to be set to 14 to align the 16-byte descriptors... I guess it makes sense for a generic MIPS kernel to align everything for 128 byte cache lines, and for me to fix the dwc_eth_qos driver to handle cases where the line size is too big for the hardware skip feature, right? Thanks, Nathan
Re: [PATCH] MIPS: NI 169445 board support
On Tue, Dec 20, 2016 at 05:34:34PM +0100, Ralf Baechle wrote: > On Fri, Dec 02, 2016 at 09:42:09AM -0600, Nathan Sullivan wrote: > > Date: Fri, 2 Dec 2016 09:42:09 -0600 > > From: Nathan Sullivan > > To: r...@linux-mips.org, mark.rutl...@arm.com, robh...@kernel.org > > CC: linux-m...@linux-mips.org, devicet...@vger.kernel.org, > > linux-kernel@vger.kernel.org, Nathan Sullivan > > Subject: [PATCH] MIPS: NI 169445 board support > > Content-Type: text/plain > > > > Support the National Instruments 169445 board. > > Nathan, > > I assume you're going to repost the changes Rob asked for in > https://patchwork.linux-mips.org/patch/14641/#26924 and resubmit? > > Thanks, > > Ralf Hmm, I found the issue with the generic MIPS config and dwc_eth_qos. The NIC driver attempts to cache align a descriptor ring using the ___cacheline_aligned attribute on the descriptor struct, in combination with a "skip" feature in hardware. However, the skip feature only has a three bit field, and the generic MIPS config selects MIPS_L1_CACHE_SHIFT_7. So, the line size is 128, and with a 64-bit bus, that means the NIC descriptor skip field would need to be set to 14 to align the 16-byte descriptors... I guess it makes sense for a generic MIPS kernel to align everything for 128 byte cache lines, and for me to fix the dwc_eth_qos driver to handle cases where the line size is too big for the hardware skip feature, right? Thanks, Nathan
Re: [PATCH] MIPS: NI 169445 board support
On Fri, Dec 09, 2016 at 03:18:28PM -0600, Rob Herring wrote: > On Fri, Dec 02, 2016 at 09:42:09AM -0600, Nathan Sullivan wrote: > > Support the National Instruments 169445 board. > > > > Signed-off-by: Nathan Sullivan <nathan.sulli...@ni.com> > > --- > > "gpio: mmio: add support for NI 169445 NAND GPIO" and > > "devicetree: add vendor prefix for National Instruments" are required for > > the > > NAND on this board to work. > > These should have been a series, but I already applied the first one. > > > > > Documentation/devicetree/bindings/mips/ni.txt | 7 ++ > > arch/mips/Kbuild.platforms| 1 + > > arch/mips/Kconfig | 26 ++ > > arch/mips/boot/dts/Makefile | 1 + > > arch/mips/boot/dts/ni/169445.dts | 99 + > > arch/mips/boot/dts/ni/Makefile| 9 ++ > > arch/mips/configs/ni169445_defconfig | 120 > > ++ > > arch/mips/ni169445/169445-console.c | 38 > > arch/mips/ni169445/169445-init.c | 39 + > > arch/mips/ni169445/169445-int.c | 34 > > arch/mips/ni169445/169445-setup.c | 58 + > > arch/mips/ni169445/169445-time.c | 35 > > arch/mips/ni169445/Makefile | 9 ++ > > arch/mips/ni169445/Platform | 6 ++ > > 14 files changed, 482 insertions(+) > > create mode 100644 Documentation/devicetree/bindings/mips/ni.txt > > create mode 100644 arch/mips/boot/dts/ni/169445.dts > > create mode 100644 arch/mips/boot/dts/ni/Makefile > > create mode 100644 arch/mips/configs/ni169445_defconfig > > create mode 100644 arch/mips/ni169445/169445-console.c > > create mode 100644 arch/mips/ni169445/169445-init.c > > create mode 100644 arch/mips/ni169445/169445-int.c > > create mode 100644 arch/mips/ni169445/169445-setup.c > > create mode 100644 arch/mips/ni169445/169445-time.c > > create mode 100644 arch/mips/ni169445/Makefile > > create mode 100644 arch/mips/ni169445/Platform > > > > diff --git a/Documentation/devicetree/bindings/mips/ni.txt > > b/Documentation/devicetree/bindings/mips/ni.txt > > new file mode 100644 > > index 000..722bf2d > > --- /dev/null > > +++ b/Documentation/devicetree/bindings/mips/ni.txt > > @@ -0,0 +1,7 @@ > > +National Instruments MIPS platforms > > + > > +required root node properties: > > + - compatible: must be "ni,169445" > > + > > +CPU Nodes > > + - compatible: must be "mti,mips14KEc" > > diff --git a/arch/mips/Kbuild.platforms b/arch/mips/Kbuild.platforms > > index f5f1bdb..f2d7b5c 100644 > > --- a/arch/mips/Kbuild.platforms > > +++ b/arch/mips/Kbuild.platforms > > @@ -20,6 +20,7 @@ platforms += loongson32 > > platforms += loongson64 > > platforms += mti-malta > > platforms += netlogic > > +platforms += ni169445 > > platforms += paravirt > > platforms += pic32 > > platforms += pistachio > > diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig > > index b3c5bde..d24d11f 100644 > > --- a/arch/mips/Kconfig > > +++ b/arch/mips/Kconfig > > @@ -574,6 +574,32 @@ config NXP_STB225 > > help > > Support for NXP Semiconductors STB225 Development Board. > > > > +config NI_169445 > > + bool "NI 169445 board" > > + select ARCH_WANT_OPTIONAL_GPIOLIB > > + select BOOT_ELF32 > > + select BOOT_RAW > > + select BUILTIN_DTB > > + select CEVT_R4K > > + select CSRC_R4K > > + select CPU_MIPSR2_IRQ_VI > > + select CPU_MIPSR2_IRQ_EI > > + select DMA_NONCOHERENT > > + select IRQ_MIPS_CPU > > + select LIBFDT > > + select MIPS_MSC > > + select SYS_HAS_CPU_MIPS32_R1 > > + select SYS_HAS_CPU_MIPS32_R2 > > + select SYS_HAS_EARLY_PRINTK > > + select SYS_SUPPORTS_32BIT_KERNEL > > + select SYS_SUPPORTS_LITTLE_ENDIAN > > + select USE_OF > > + select COMMON_CLK > > + help > > + This enables support for the National Instruments 169445A > > + board. > > + > > + > > config PMC_MSP > > bool "PMC-Sierra MSP chipsets" > > select CEVT_R4K > > diff --git a/arch/mips/boot/dts/Makefile b/arch/mips/boot/dts/Makefile > > index fc7a0a9..65a0ad8 100644 > > --- a/arch/mips/boot/dts/Makefile > > +++ b/arch/mips/boot/dts/Makefile > > @@ -3,6
Re: [PATCH] MIPS: NI 169445 board support
On Fri, Dec 09, 2016 at 03:18:28PM -0600, Rob Herring wrote: > On Fri, Dec 02, 2016 at 09:42:09AM -0600, Nathan Sullivan wrote: > > Support the National Instruments 169445 board. > > > > Signed-off-by: Nathan Sullivan > > --- > > "gpio: mmio: add support for NI 169445 NAND GPIO" and > > "devicetree: add vendor prefix for National Instruments" are required for > > the > > NAND on this board to work. > > These should have been a series, but I already applied the first one. > > > > > Documentation/devicetree/bindings/mips/ni.txt | 7 ++ > > arch/mips/Kbuild.platforms| 1 + > > arch/mips/Kconfig | 26 ++ > > arch/mips/boot/dts/Makefile | 1 + > > arch/mips/boot/dts/ni/169445.dts | 99 + > > arch/mips/boot/dts/ni/Makefile| 9 ++ > > arch/mips/configs/ni169445_defconfig | 120 > > ++ > > arch/mips/ni169445/169445-console.c | 38 > > arch/mips/ni169445/169445-init.c | 39 + > > arch/mips/ni169445/169445-int.c | 34 > > arch/mips/ni169445/169445-setup.c | 58 + > > arch/mips/ni169445/169445-time.c | 35 > > arch/mips/ni169445/Makefile | 9 ++ > > arch/mips/ni169445/Platform | 6 ++ > > 14 files changed, 482 insertions(+) > > create mode 100644 Documentation/devicetree/bindings/mips/ni.txt > > create mode 100644 arch/mips/boot/dts/ni/169445.dts > > create mode 100644 arch/mips/boot/dts/ni/Makefile > > create mode 100644 arch/mips/configs/ni169445_defconfig > > create mode 100644 arch/mips/ni169445/169445-console.c > > create mode 100644 arch/mips/ni169445/169445-init.c > > create mode 100644 arch/mips/ni169445/169445-int.c > > create mode 100644 arch/mips/ni169445/169445-setup.c > > create mode 100644 arch/mips/ni169445/169445-time.c > > create mode 100644 arch/mips/ni169445/Makefile > > create mode 100644 arch/mips/ni169445/Platform > > > > diff --git a/Documentation/devicetree/bindings/mips/ni.txt > > b/Documentation/devicetree/bindings/mips/ni.txt > > new file mode 100644 > > index 000..722bf2d > > --- /dev/null > > +++ b/Documentation/devicetree/bindings/mips/ni.txt > > @@ -0,0 +1,7 @@ > > +National Instruments MIPS platforms > > + > > +required root node properties: > > + - compatible: must be "ni,169445" > > + > > +CPU Nodes > > + - compatible: must be "mti,mips14KEc" > > diff --git a/arch/mips/Kbuild.platforms b/arch/mips/Kbuild.platforms > > index f5f1bdb..f2d7b5c 100644 > > --- a/arch/mips/Kbuild.platforms > > +++ b/arch/mips/Kbuild.platforms > > @@ -20,6 +20,7 @@ platforms += loongson32 > > platforms += loongson64 > > platforms += mti-malta > > platforms += netlogic > > +platforms += ni169445 > > platforms += paravirt > > platforms += pic32 > > platforms += pistachio > > diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig > > index b3c5bde..d24d11f 100644 > > --- a/arch/mips/Kconfig > > +++ b/arch/mips/Kconfig > > @@ -574,6 +574,32 @@ config NXP_STB225 > > help > > Support for NXP Semiconductors STB225 Development Board. > > > > +config NI_169445 > > + bool "NI 169445 board" > > + select ARCH_WANT_OPTIONAL_GPIOLIB > > + select BOOT_ELF32 > > + select BOOT_RAW > > + select BUILTIN_DTB > > + select CEVT_R4K > > + select CSRC_R4K > > + select CPU_MIPSR2_IRQ_VI > > + select CPU_MIPSR2_IRQ_EI > > + select DMA_NONCOHERENT > > + select IRQ_MIPS_CPU > > + select LIBFDT > > + select MIPS_MSC > > + select SYS_HAS_CPU_MIPS32_R1 > > + select SYS_HAS_CPU_MIPS32_R2 > > + select SYS_HAS_EARLY_PRINTK > > + select SYS_SUPPORTS_32BIT_KERNEL > > + select SYS_SUPPORTS_LITTLE_ENDIAN > > + select USE_OF > > + select COMMON_CLK > > + help > > + This enables support for the National Instruments 169445A > > + board. > > + > > + > > config PMC_MSP > > bool "PMC-Sierra MSP chipsets" > > select CEVT_R4K > > diff --git a/arch/mips/boot/dts/Makefile b/arch/mips/boot/dts/Makefile > > index fc7a0a9..65a0ad8 100644 > > --- a/arch/mips/boot/dts/Makefile > > +++ b/arch/mips/boot/dts/Makefile > > @@ -3,6 +3,7
Re: [PATCH] MIPS: NI 169445 board support
On Tue, Dec 13, 2016 at 06:40:31PM +, Paul Burton wrote: > Hi Nathan, > > On Friday, 2 December 2016 09:42:09 GMT Nathan Sullivan wrote: > > Support the National Instruments 169445 board. > > > > Signed-off-by: Nathan Sullivan <nathan.sulli...@ni.com> > > --- > > "gpio: mmio: add support for NI 169445 NAND GPIO" and > > "devicetree: add vendor prefix for National Instruments" are required for > > the NAND on this board to work. > > > > Documentation/devicetree/bindings/mips/ni.txt | 7 ++ > > arch/mips/Kbuild.platforms| 1 + > > arch/mips/Kconfig | 26 ++ > > arch/mips/boot/dts/Makefile | 1 + > > arch/mips/boot/dts/ni/169445.dts | 99 + > > arch/mips/boot/dts/ni/Makefile| 9 ++ > > arch/mips/configs/ni169445_defconfig | 120 > > ++ > > arch/mips/ni169445/169445-console.c | 38 > > arch/mips/ni169445/169445-init.c | 39 + > > arch/mips/ni169445/169445-int.c | 34 > > arch/mips/ni169445/169445-setup.c | 58 + > > arch/mips/ni169445/169445-time.c | 35 > > arch/mips/ni169445/Makefile | 9 ++ > > arch/mips/ni169445/Platform | 6 ++ > > 14 files changed, 482 insertions(+) > > create mode 100644 Documentation/devicetree/bindings/mips/ni.txt > > create mode 100644 arch/mips/boot/dts/ni/169445.dts > > create mode 100644 arch/mips/boot/dts/ni/Makefile > > create mode 100644 arch/mips/configs/ni169445_defconfig > > create mode 100644 arch/mips/ni169445/169445-console.c > > create mode 100644 arch/mips/ni169445/169445-init.c > > create mode 100644 arch/mips/ni169445/169445-int.c > > create mode 100644 arch/mips/ni169445/169445-setup.c > > create mode 100644 arch/mips/ni169445/169445-time.c > > create mode 100644 arch/mips/ni169445/Makefile > > create mode 100644 arch/mips/ni169445/Platform > > > > diff --git a/Documentation/devicetree/bindings/mips/ni.txt > > b/Documentation/devicetree/bindings/mips/ni.txt new file mode 100644 > > index 000..722bf2d > > --- /dev/null > > +++ b/Documentation/devicetree/bindings/mips/ni.txt > > @@ -0,0 +1,7 @@ > > +National Instruments MIPS platforms > > + > > +required root node properties: > > + - compatible: must be "ni,169445" > > + > > +CPU Nodes > > + - compatible: must be "mti,mips14KEc" > > This doesn't describe anything else you rely on, like the > mips-hpt-frequency property which you panic without. > > > diff --git a/arch/mips/Kbuild.platforms b/arch/mips/Kbuild.platforms > > index f5f1bdb..f2d7b5c 100644 > > --- a/arch/mips/Kbuild.platforms > > +++ b/arch/mips/Kbuild.platforms > > @@ -20,6 +20,7 @@ platforms += loongson32 > > platforms += loongson64 > > platforms += mti-malta > > platforms += netlogic > > +platforms += ni169445 > > platforms += paravirt > > platforms += pic32 > > platforms += pistachio > > diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig > > index b3c5bde..d24d11f 100644 > > --- a/arch/mips/Kconfig > > +++ b/arch/mips/Kconfig > > @@ -574,6 +574,32 @@ config NXP_STB225 > > help > > Support for NXP Semiconductors STB225 Development Board. > > > > +config NI_169445 > > + bool "NI 169445 board" > > + select ARCH_WANT_OPTIONAL_GPIOLIB > > + select BOOT_ELF32 > > + select BOOT_RAW > > + select BUILTIN_DTB > > + select CEVT_R4K > > + select CSRC_R4K > > + select CPU_MIPSR2_IRQ_VI > > + select CPU_MIPSR2_IRQ_EI > > + select DMA_NONCOHERENT > > + select IRQ_MIPS_CPU > > + select LIBFDT > > + select MIPS_MSC > > + select SYS_HAS_CPU_MIPS32_R1 > > + select SYS_HAS_CPU_MIPS32_R2 > > + select SYS_HAS_EARLY_PRINTK > > + select SYS_SUPPORTS_32BIT_KERNEL > > + select SYS_SUPPORTS_LITTLE_ENDIAN > > + select USE_OF > > + select COMMON_CLK > > + help > > + This enables support for the National Instruments 169445A > > + board. > > + > > + > > config PMC_MSP > > bool "PMC-Sierra MSP chipsets" > > select CEVT_R4K > > diff --git a/arch/mips/boot/dts/Makefile b/arch/mips/boot/dts/Makefile > > index fc7a0a9..65a0ad8 100644 > > --- a/arch/mips/boot/dts/Makefile >
Re: [PATCH] MIPS: NI 169445 board support
On Tue, Dec 13, 2016 at 06:40:31PM +, Paul Burton wrote: > Hi Nathan, > > On Friday, 2 December 2016 09:42:09 GMT Nathan Sullivan wrote: > > Support the National Instruments 169445 board. > > > > Signed-off-by: Nathan Sullivan > > --- > > "gpio: mmio: add support for NI 169445 NAND GPIO" and > > "devicetree: add vendor prefix for National Instruments" are required for > > the NAND on this board to work. > > > > Documentation/devicetree/bindings/mips/ni.txt | 7 ++ > > arch/mips/Kbuild.platforms| 1 + > > arch/mips/Kconfig | 26 ++ > > arch/mips/boot/dts/Makefile | 1 + > > arch/mips/boot/dts/ni/169445.dts | 99 + > > arch/mips/boot/dts/ni/Makefile| 9 ++ > > arch/mips/configs/ni169445_defconfig | 120 > > ++ > > arch/mips/ni169445/169445-console.c | 38 > > arch/mips/ni169445/169445-init.c | 39 + > > arch/mips/ni169445/169445-int.c | 34 > > arch/mips/ni169445/169445-setup.c | 58 + > > arch/mips/ni169445/169445-time.c | 35 > > arch/mips/ni169445/Makefile | 9 ++ > > arch/mips/ni169445/Platform | 6 ++ > > 14 files changed, 482 insertions(+) > > create mode 100644 Documentation/devicetree/bindings/mips/ni.txt > > create mode 100644 arch/mips/boot/dts/ni/169445.dts > > create mode 100644 arch/mips/boot/dts/ni/Makefile > > create mode 100644 arch/mips/configs/ni169445_defconfig > > create mode 100644 arch/mips/ni169445/169445-console.c > > create mode 100644 arch/mips/ni169445/169445-init.c > > create mode 100644 arch/mips/ni169445/169445-int.c > > create mode 100644 arch/mips/ni169445/169445-setup.c > > create mode 100644 arch/mips/ni169445/169445-time.c > > create mode 100644 arch/mips/ni169445/Makefile > > create mode 100644 arch/mips/ni169445/Platform > > > > diff --git a/Documentation/devicetree/bindings/mips/ni.txt > > b/Documentation/devicetree/bindings/mips/ni.txt new file mode 100644 > > index 000..722bf2d > > --- /dev/null > > +++ b/Documentation/devicetree/bindings/mips/ni.txt > > @@ -0,0 +1,7 @@ > > +National Instruments MIPS platforms > > + > > +required root node properties: > > + - compatible: must be "ni,169445" > > + > > +CPU Nodes > > + - compatible: must be "mti,mips14KEc" > > This doesn't describe anything else you rely on, like the > mips-hpt-frequency property which you panic without. > > > diff --git a/arch/mips/Kbuild.platforms b/arch/mips/Kbuild.platforms > > index f5f1bdb..f2d7b5c 100644 > > --- a/arch/mips/Kbuild.platforms > > +++ b/arch/mips/Kbuild.platforms > > @@ -20,6 +20,7 @@ platforms += loongson32 > > platforms += loongson64 > > platforms += mti-malta > > platforms += netlogic > > +platforms += ni169445 > > platforms += paravirt > > platforms += pic32 > > platforms += pistachio > > diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig > > index b3c5bde..d24d11f 100644 > > --- a/arch/mips/Kconfig > > +++ b/arch/mips/Kconfig > > @@ -574,6 +574,32 @@ config NXP_STB225 > > help > > Support for NXP Semiconductors STB225 Development Board. > > > > +config NI_169445 > > + bool "NI 169445 board" > > + select ARCH_WANT_OPTIONAL_GPIOLIB > > + select BOOT_ELF32 > > + select BOOT_RAW > > + select BUILTIN_DTB > > + select CEVT_R4K > > + select CSRC_R4K > > + select CPU_MIPSR2_IRQ_VI > > + select CPU_MIPSR2_IRQ_EI > > + select DMA_NONCOHERENT > > + select IRQ_MIPS_CPU > > + select LIBFDT > > + select MIPS_MSC > > + select SYS_HAS_CPU_MIPS32_R1 > > + select SYS_HAS_CPU_MIPS32_R2 > > + select SYS_HAS_EARLY_PRINTK > > + select SYS_SUPPORTS_32BIT_KERNEL > > + select SYS_SUPPORTS_LITTLE_ENDIAN > > + select USE_OF > > + select COMMON_CLK > > + help > > + This enables support for the National Instruments 169445A > > + board. > > + > > + > > config PMC_MSP > > bool "PMC-Sierra MSP chipsets" > > select CEVT_R4K > > diff --git a/arch/mips/boot/dts/Makefile b/arch/mips/boot/dts/Makefile > > index fc7a0a9..65a0ad8 100644 > > --- a/arch/mips/boot/dts/Makefile > > +++ b/arch/mips/boot/dts/Makefile >
Re: [PATCH] MIPS: NI 169445 board support
On Fri, Dec 02, 2016 at 04:21:59PM +, Zubair Lutfullah Kakakhel wrote: > Hi, > > On 12/02/2016 03:42 PM, Nathan Sullivan wrote: > >Support the National Instruments 169445 board. > > Interesting patch. > > But do you happen to have a link to a description of the board? > I couldn't find anything with a quick search. > Perhaps the public name is something else? > > Thanks, > ZubairLK This patch is for a pre-release board we have not made public yet. It's a straightforward MIPS system that will be used for networking, and we'd like to get Linux support in place ahead of release. Thanks, Nathan
Re: [PATCH] MIPS: NI 169445 board support
On Fri, Dec 02, 2016 at 04:21:59PM +, Zubair Lutfullah Kakakhel wrote: > Hi, > > On 12/02/2016 03:42 PM, Nathan Sullivan wrote: > >Support the National Instruments 169445 board. > > Interesting patch. > > But do you happen to have a link to a description of the board? > I couldn't find anything with a quick search. > Perhaps the public name is something else? > > Thanks, > ZubairLK This patch is for a pre-release board we have not made public yet. It's a straightforward MIPS system that will be used for networking, and we'd like to get Linux support in place ahead of release. Thanks, Nathan
[PATCH] MIPS: NI 169445 board support
Support the National Instruments 169445 board.
Signed-off-by: Nathan Sullivan <nathan.sulli...@ni.com>
---
"gpio: mmio: add support for NI 169445 NAND GPIO" and
"devicetree: add vendor prefix for National Instruments" are required for the
NAND on this board to work.
Documentation/devicetree/bindings/mips/ni.txt | 7 ++
arch/mips/Kbuild.platforms| 1 +
arch/mips/Kconfig | 26 ++
arch/mips/boot/dts/Makefile | 1 +
arch/mips/boot/dts/ni/169445.dts | 99 +
arch/mips/boot/dts/ni/Makefile| 9 ++
arch/mips/configs/ni169445_defconfig | 120 ++
arch/mips/ni169445/169445-console.c | 38
arch/mips/ni169445/169445-init.c | 39 +
arch/mips/ni169445/169445-int.c | 34
arch/mips/ni169445/169445-setup.c | 58 +
arch/mips/ni169445/169445-time.c | 35
arch/mips/ni169445/Makefile | 9 ++
arch/mips/ni169445/Platform | 6 ++
14 files changed, 482 insertions(+)
create mode 100644 Documentation/devicetree/bindings/mips/ni.txt
create mode 100644 arch/mips/boot/dts/ni/169445.dts
create mode 100644 arch/mips/boot/dts/ni/Makefile
create mode 100644 arch/mips/configs/ni169445_defconfig
create mode 100644 arch/mips/ni169445/169445-console.c
create mode 100644 arch/mips/ni169445/169445-init.c
create mode 100644 arch/mips/ni169445/169445-int.c
create mode 100644 arch/mips/ni169445/169445-setup.c
create mode 100644 arch/mips/ni169445/169445-time.c
create mode 100644 arch/mips/ni169445/Makefile
create mode 100644 arch/mips/ni169445/Platform
diff --git a/Documentation/devicetree/bindings/mips/ni.txt
b/Documentation/devicetree/bindings/mips/ni.txt
new file mode 100644
index 000..722bf2d
--- /dev/null
+++ b/Documentation/devicetree/bindings/mips/ni.txt
@@ -0,0 +1,7 @@
+National Instruments MIPS platforms
+
+required root node properties:
+ - compatible: must be "ni,169445"
+
+CPU Nodes
+ - compatible: must be "mti,mips14KEc"
diff --git a/arch/mips/Kbuild.platforms b/arch/mips/Kbuild.platforms
index f5f1bdb..f2d7b5c 100644
--- a/arch/mips/Kbuild.platforms
+++ b/arch/mips/Kbuild.platforms
@@ -20,6 +20,7 @@ platforms += loongson32
platforms += loongson64
platforms += mti-malta
platforms += netlogic
+platforms += ni169445
platforms += paravirt
platforms += pic32
platforms += pistachio
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index b3c5bde..d24d11f 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -574,6 +574,32 @@ config NXP_STB225
help
Support for NXP Semiconductors STB225 Development Board.
+config NI_169445
+ bool "NI 169445 board"
+ select ARCH_WANT_OPTIONAL_GPIOLIB
+ select BOOT_ELF32
+ select BOOT_RAW
+ select BUILTIN_DTB
+ select CEVT_R4K
+ select CSRC_R4K
+ select CPU_MIPSR2_IRQ_VI
+ select CPU_MIPSR2_IRQ_EI
+ select DMA_NONCOHERENT
+ select IRQ_MIPS_CPU
+ select LIBFDT
+ select MIPS_MSC
+ select SYS_HAS_CPU_MIPS32_R1
+ select SYS_HAS_CPU_MIPS32_R2
+ select SYS_HAS_EARLY_PRINTK
+ select SYS_SUPPORTS_32BIT_KERNEL
+ select SYS_SUPPORTS_LITTLE_ENDIAN
+ select USE_OF
+ select COMMON_CLK
+ help
+ This enables support for the National Instruments 169445A
+ board.
+
+
config PMC_MSP
bool "PMC-Sierra MSP chipsets"
select CEVT_R4K
diff --git a/arch/mips/boot/dts/Makefile b/arch/mips/boot/dts/Makefile
index fc7a0a9..65a0ad8 100644
--- a/arch/mips/boot/dts/Makefile
+++ b/arch/mips/boot/dts/Makefile
@@ -3,6 +3,7 @@ dts-dirs+= cavium-octeon
dts-dirs += ingenic
dts-dirs += lantiq
dts-dirs += mti
+dts-dirs += ni
dts-dirs += netlogic
dts-dirs += pic32
dts-dirs += qca
diff --git a/arch/mips/boot/dts/ni/169445.dts b/arch/mips/boot/dts/ni/169445.dts
new file mode 100644
index 000..a2b49f9
--- /dev/null
+++ b/arch/mips/boot/dts/ni/169445.dts
@@ -0,0 +1,99 @@
+/dts-v1/;
+
+/ {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "ni,169445";
+
+ cpus {
+ mips-hpt-frequency = <2500>;
+
+ cpu@0 {
+ compatible = "mti,mips14KEc";
+ };
+ };
+
+ memory {
+ device_type = "memory";
+ reg = <0x0 0x0800>;
+ };
+
+ clocks {
+ baseclk: baseclock {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <5000>;
+ };
+ };
+
+ cpu_intc: cpu_
[PATCH] MIPS: NI 169445 board support
Support the National Instruments 169445 board.
Signed-off-by: Nathan Sullivan
---
"gpio: mmio: add support for NI 169445 NAND GPIO" and
"devicetree: add vendor prefix for National Instruments" are required for the
NAND on this board to work.
Documentation/devicetree/bindings/mips/ni.txt | 7 ++
arch/mips/Kbuild.platforms| 1 +
arch/mips/Kconfig | 26 ++
arch/mips/boot/dts/Makefile | 1 +
arch/mips/boot/dts/ni/169445.dts | 99 +
arch/mips/boot/dts/ni/Makefile| 9 ++
arch/mips/configs/ni169445_defconfig | 120 ++
arch/mips/ni169445/169445-console.c | 38
arch/mips/ni169445/169445-init.c | 39 +
arch/mips/ni169445/169445-int.c | 34
arch/mips/ni169445/169445-setup.c | 58 +
arch/mips/ni169445/169445-time.c | 35
arch/mips/ni169445/Makefile | 9 ++
arch/mips/ni169445/Platform | 6 ++
14 files changed, 482 insertions(+)
create mode 100644 Documentation/devicetree/bindings/mips/ni.txt
create mode 100644 arch/mips/boot/dts/ni/169445.dts
create mode 100644 arch/mips/boot/dts/ni/Makefile
create mode 100644 arch/mips/configs/ni169445_defconfig
create mode 100644 arch/mips/ni169445/169445-console.c
create mode 100644 arch/mips/ni169445/169445-init.c
create mode 100644 arch/mips/ni169445/169445-int.c
create mode 100644 arch/mips/ni169445/169445-setup.c
create mode 100644 arch/mips/ni169445/169445-time.c
create mode 100644 arch/mips/ni169445/Makefile
create mode 100644 arch/mips/ni169445/Platform
diff --git a/Documentation/devicetree/bindings/mips/ni.txt
b/Documentation/devicetree/bindings/mips/ni.txt
new file mode 100644
index 000..722bf2d
--- /dev/null
+++ b/Documentation/devicetree/bindings/mips/ni.txt
@@ -0,0 +1,7 @@
+National Instruments MIPS platforms
+
+required root node properties:
+ - compatible: must be "ni,169445"
+
+CPU Nodes
+ - compatible: must be "mti,mips14KEc"
diff --git a/arch/mips/Kbuild.platforms b/arch/mips/Kbuild.platforms
index f5f1bdb..f2d7b5c 100644
--- a/arch/mips/Kbuild.platforms
+++ b/arch/mips/Kbuild.platforms
@@ -20,6 +20,7 @@ platforms += loongson32
platforms += loongson64
platforms += mti-malta
platforms += netlogic
+platforms += ni169445
platforms += paravirt
platforms += pic32
platforms += pistachio
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index b3c5bde..d24d11f 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -574,6 +574,32 @@ config NXP_STB225
help
Support for NXP Semiconductors STB225 Development Board.
+config NI_169445
+ bool "NI 169445 board"
+ select ARCH_WANT_OPTIONAL_GPIOLIB
+ select BOOT_ELF32
+ select BOOT_RAW
+ select BUILTIN_DTB
+ select CEVT_R4K
+ select CSRC_R4K
+ select CPU_MIPSR2_IRQ_VI
+ select CPU_MIPSR2_IRQ_EI
+ select DMA_NONCOHERENT
+ select IRQ_MIPS_CPU
+ select LIBFDT
+ select MIPS_MSC
+ select SYS_HAS_CPU_MIPS32_R1
+ select SYS_HAS_CPU_MIPS32_R2
+ select SYS_HAS_EARLY_PRINTK
+ select SYS_SUPPORTS_32BIT_KERNEL
+ select SYS_SUPPORTS_LITTLE_ENDIAN
+ select USE_OF
+ select COMMON_CLK
+ help
+ This enables support for the National Instruments 169445A
+ board.
+
+
config PMC_MSP
bool "PMC-Sierra MSP chipsets"
select CEVT_R4K
diff --git a/arch/mips/boot/dts/Makefile b/arch/mips/boot/dts/Makefile
index fc7a0a9..65a0ad8 100644
--- a/arch/mips/boot/dts/Makefile
+++ b/arch/mips/boot/dts/Makefile
@@ -3,6 +3,7 @@ dts-dirs+= cavium-octeon
dts-dirs += ingenic
dts-dirs += lantiq
dts-dirs += mti
+dts-dirs += ni
dts-dirs += netlogic
dts-dirs += pic32
dts-dirs += qca
diff --git a/arch/mips/boot/dts/ni/169445.dts b/arch/mips/boot/dts/ni/169445.dts
new file mode 100644
index 000..a2b49f9
--- /dev/null
+++ b/arch/mips/boot/dts/ni/169445.dts
@@ -0,0 +1,99 @@
+/dts-v1/;
+
+/ {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "ni,169445";
+
+ cpus {
+ mips-hpt-frequency = <2500>;
+
+ cpu@0 {
+ compatible = "mti,mips14KEc";
+ };
+ };
+
+ memory {
+ device_type = "memory";
+ reg = <0x0 0x0800>;
+ };
+
+ clocks {
+ baseclk: baseclock {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <5000>;
+ };
+ };
+
+ cpu_intc: cpu_intc {
+ #address-cells = <0
[PATCH] gpio: mmio: add support for NI 169445 NAND GPIO
The GPIO-based NAND controller on National Instruments 169445 hardware
exposes a set of simple lines for the control signals.
Signed-off-by: Nathan Sullivan <nathan.sulli...@ni.com>
---
"devicetree: add vendor prefix for National Instruments" added the ni vendor
prefix.
This patch is needed for "MIPS: NI 169445 board support", so that GPIO NAND can
work.
.../bindings/gpio/ni,169445-nand-gpio.txt | 36 ++
drivers/gpio/gpio-mmio.c | 1 +
2 files changed, 37 insertions(+)
create mode 100644
Documentation/devicetree/bindings/gpio/ni,169445-nand-gpio.txt
diff --git a/Documentation/devicetree/bindings/gpio/ni,169445-nand-gpio.txt
b/Documentation/devicetree/bindings/gpio/ni,169445-nand-gpio.txt
new file mode 100644
index 000..ca2c14f
--- /dev/null
+++ b/Documentation/devicetree/bindings/gpio/ni,169445-nand-gpio.txt
@@ -0,0 +1,36 @@
+Bindings for the National Instruments 169445 GPIO NAND controller
+
+The 169445 GPIO NAND controller has two memory mapped GPIO registers, one
+for input (the ready signal) and one for output (control signals). It is
+intended to be used with the GPIO NAND driver.
+
+Required properties:
+ - compatible: should be "ni,169445-nand-gpio"
+ - reg-names: must contain
+ "dat" - data register
+ - reg: address + size pairs describing the GPIO register sets;
+ order must correspond with the order of entries in reg-names
+ - #gpio-cells: must be set to 2. The first cell is the pin number and
+ the second cell is used to specify the gpio polarity:
+ 0 = active high
+ 1 = active low
+ - gpio-controller: Marks the device node as a gpio controller.
+
+Examples:
+ gpio1: nand-gpio-out@1f300010 {
+ compatible = "ni,169445-nand-gpio";
+ reg = <0x1f300010 0x4>;
+ reg-names = "dat";
+ gpio-controller;
+ #gpio-cells = <2>;
+ ngpios = <5>;
+ };
+
+ gpio2: nand-gpio-in@1f300014 {
+ compatible = "ni,169445-nand-gpio";
+ reg = <0x1f300014 0x4>;
+ reg-names = "dat";
+ gpio-controller;
+ #gpio-cells = <2>;
+ ngpios = <1>;
+ };
diff --git a/drivers/gpio/gpio-mmio.c b/drivers/gpio/gpio-mmio.c
index d7d03ad..f7da40e 100644
--- a/drivers/gpio/gpio-mmio.c
+++ b/drivers/gpio/gpio-mmio.c
@@ -575,6 +575,7 @@ static void __iomem *bgpio_map(struct platform_device *pdev,
static const struct of_device_id bgpio_of_match[] = {
{ .compatible = "brcm,bcm6345-gpio" },
{ .compatible = "wd,mbl-gpio" },
+ { .compatible = "ni,169445-nand-gpio" },
{ }
};
MODULE_DEVICE_TABLE(of, bgpio_of_match);
--
2.1.4
[PATCH] gpio: mmio: add support for NI 169445 NAND GPIO
The GPIO-based NAND controller on National Instruments 169445 hardware
exposes a set of simple lines for the control signals.
Signed-off-by: Nathan Sullivan
---
"devicetree: add vendor prefix for National Instruments" added the ni vendor
prefix.
This patch is needed for "MIPS: NI 169445 board support", so that GPIO NAND can
work.
.../bindings/gpio/ni,169445-nand-gpio.txt | 36 ++
drivers/gpio/gpio-mmio.c | 1 +
2 files changed, 37 insertions(+)
create mode 100644
Documentation/devicetree/bindings/gpio/ni,169445-nand-gpio.txt
diff --git a/Documentation/devicetree/bindings/gpio/ni,169445-nand-gpio.txt
b/Documentation/devicetree/bindings/gpio/ni,169445-nand-gpio.txt
new file mode 100644
index 000..ca2c14f
--- /dev/null
+++ b/Documentation/devicetree/bindings/gpio/ni,169445-nand-gpio.txt
@@ -0,0 +1,36 @@
+Bindings for the National Instruments 169445 GPIO NAND controller
+
+The 169445 GPIO NAND controller has two memory mapped GPIO registers, one
+for input (the ready signal) and one for output (control signals). It is
+intended to be used with the GPIO NAND driver.
+
+Required properties:
+ - compatible: should be "ni,169445-nand-gpio"
+ - reg-names: must contain
+ "dat" - data register
+ - reg: address + size pairs describing the GPIO register sets;
+ order must correspond with the order of entries in reg-names
+ - #gpio-cells: must be set to 2. The first cell is the pin number and
+ the second cell is used to specify the gpio polarity:
+ 0 = active high
+ 1 = active low
+ - gpio-controller: Marks the device node as a gpio controller.
+
+Examples:
+ gpio1: nand-gpio-out@1f300010 {
+ compatible = "ni,169445-nand-gpio";
+ reg = <0x1f300010 0x4>;
+ reg-names = "dat";
+ gpio-controller;
+ #gpio-cells = <2>;
+ ngpios = <5>;
+ };
+
+ gpio2: nand-gpio-in@1f300014 {
+ compatible = "ni,169445-nand-gpio";
+ reg = <0x1f300014 0x4>;
+ reg-names = "dat";
+ gpio-controller;
+ #gpio-cells = <2>;
+ ngpios = <1>;
+ };
diff --git a/drivers/gpio/gpio-mmio.c b/drivers/gpio/gpio-mmio.c
index d7d03ad..f7da40e 100644
--- a/drivers/gpio/gpio-mmio.c
+++ b/drivers/gpio/gpio-mmio.c
@@ -575,6 +575,7 @@ static void __iomem *bgpio_map(struct platform_device *pdev,
static const struct of_device_id bgpio_of_match[] = {
{ .compatible = "brcm,bcm6345-gpio" },
{ .compatible = "wd,mbl-gpio" },
+ { .compatible = "ni,169445-nand-gpio" },
{ }
};
MODULE_DEVICE_TABLE(of, bgpio_of_match);
--
2.1.4
[PATCH] devicetree: add vendor prefix for National Instruments
Signed-off-by: Nathan Sullivan <nathan.sulli...@ni.com> --- This is required by "gpio: mmio: add support for NI 169445 NAND GPIO" Documentation/devicetree/bindings/vendor-prefixes.txt | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/vendor-prefixes.txt b/Documentation/devicetree/bindings/vendor-prefixes.txt index f0a48ea..d37df5f 100644 --- a/Documentation/devicetree/bindings/vendor-prefixes.txt +++ b/Documentation/devicetree/bindings/vendor-prefixes.txt @@ -187,6 +187,7 @@ netgear NETGEAR netlogic Broadcom Corporation (formerly NetLogic Microsystems) netxeonShenzhen Netxeon Technology CO., LTD newhaven Newhaven Display International +ni National Instruments nintendo Nintendo nokia Nokia nuvotonNuvoton Technology Corporation -- 2.1.4
[PATCH] devicetree: add vendor prefix for National Instruments
Signed-off-by: Nathan Sullivan --- This is required by "gpio: mmio: add support for NI 169445 NAND GPIO" Documentation/devicetree/bindings/vendor-prefixes.txt | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/vendor-prefixes.txt b/Documentation/devicetree/bindings/vendor-prefixes.txt index f0a48ea..d37df5f 100644 --- a/Documentation/devicetree/bindings/vendor-prefixes.txt +++ b/Documentation/devicetree/bindings/vendor-prefixes.txt @@ -187,6 +187,7 @@ netgear NETGEAR netlogic Broadcom Corporation (formerly NetLogic Microsystems) netxeonShenzhen Netxeon Technology CO., LTD newhaven Newhaven Display International +ni National Instruments nintendo Nintendo nokia Nokia nuvotonNuvoton Technology Corporation -- 2.1.4
[PATCH] igb: adjust ptp timestamps for tx/rx latency
Table 7-62 on page 338 of the i210 datasheet lists TX and RX latencies
for the various speeds the chip supports. To give better ptp timestamp
accuracy, adjust the timestamps by the amounts Intel gives based on
current link speed.
Signed-off-by: Nathan Sullivan <nathan.sulli...@ni.com>
---
drivers/net/ethernet/intel/igb/igb.h |8 +++
drivers/net/ethernet/intel/igb/igb_ptp.c | 36 ++
2 files changed, 44 insertions(+)
diff --git a/drivers/net/ethernet/intel/igb/igb.h
b/drivers/net/ethernet/intel/igb/igb.h
index 9413fa6..7cee61f9 100644
--- a/drivers/net/ethernet/intel/igb/igb.h
+++ b/drivers/net/ethernet/intel/igb/igb.h
@@ -91,6 +91,14 @@ struct igb_adapter;
#define NVM_COMB_VER_OFF 0x0083
#define NVM_COMB_VER_PTR 0x003d
+/* Transmit and receive latency (for PTP timestamps) */
+#define IGB_I210_TX_LATENCY_10 9542
+#define IGB_I210_TX_LATENCY_1001024
+#define IGB_I210_TX_LATENCY_1000 178
+#define IGB_I210_RX_LATENCY_10 20662
+#define IGB_I210_RX_LATENCY_1002213
+#define IGB_I210_RX_LATENCY_1000 448
+
struct vf_data_storage {
unsigned char vf_mac_addresses[ETH_ALEN];
u16 vf_mc_hashes[IGB_MAX_VF_MC_ENTRIES];
diff --git a/drivers/net/ethernet/intel/igb/igb_ptp.c
b/drivers/net/ethernet/intel/igb/igb_ptp.c
index 22a8a29..76a896d 100644
--- a/drivers/net/ethernet/intel/igb/igb_ptp.c
+++ b/drivers/net/ethernet/intel/igb/igb_ptp.c
@@ -722,11 +722,29 @@ static void igb_ptp_tx_hwtstamp(struct igb_adapter
*adapter)
struct e1000_hw *hw = >hw;
struct skb_shared_hwtstamps shhwtstamps;
u64 regval;
+ int adjust = 0;
regval = rd32(E1000_TXSTMPL);
regval |= (u64)rd32(E1000_TXSTMPH) << 32;
igb_ptp_systim_to_hwtstamp(adapter, , regval);
+ /* adjust timestamp for the TX latency based on link speed */
+ if (adapter->hw.mac.type == e1000_i210) {
+ switch (adapter->link_speed) {
+ case SPEED_10:
+ adjust = IGB_I210_TX_LATENCY_10;
+ break;
+ case SPEED_100:
+ adjust = IGB_I210_TX_LATENCY_100;
+ break;
+ case SPEED_1000:
+ adjust = IGB_I210_TX_LATENCY_1000;
+ break;
+ }
+ }
+
+ shhwtstamps.hwtstamp = ktime_sub_ns(shhwtstamps.hwtstamp, adjust);
+
skb_tstamp_tx(adapter->ptp_tx_skb, );
dev_kfree_skb_any(adapter->ptp_tx_skb);
adapter->ptp_tx_skb = NULL;
@@ -771,6 +789,7 @@ void igb_ptp_rx_rgtstamp(struct igb_q_vector *q_vector,
struct igb_adapter *adapter = q_vector->adapter;
struct e1000_hw *hw = >hw;
u64 regval;
+ int adjust = 0;
/* If this bit is set, then the RX registers contain the time stamp. No
* other packet will be time stamped until we read these registers, so
@@ -790,6 +809,23 @@ void igb_ptp_rx_rgtstamp(struct igb_q_vector *q_vector,
igb_ptp_systim_to_hwtstamp(adapter, skb_hwtstamps(skb), regval);
+ /* adjust timestamp for the RX latency based on link speed */
+ if (adapter->hw.mac.type == e1000_i210) {
+ switch (adapter->link_speed) {
+ case SPEED_10:
+ adjust = IGB_I210_RX_LATENCY_10;
+ break;
+ case SPEED_100:
+ adjust = IGB_I210_RX_LATENCY_100;
+ break;
+ case SPEED_1000:
+ adjust = IGB_I210_RX_LATENCY_1000;
+ break;
+ }
+ }
+ skb_hwtstamps(skb)->hwtstamp =
+ ktime_add_ns(skb_hwtstamps(skb)->hwtstamp, adjust);
+
/* Update the last_rx_timestamp timer in order to enable watchdog check
* for error case of latched timestamp on a dropped packet.
*/
--
1.7.10.4
[PATCH] igb: adjust ptp timestamps for tx/rx latency
Table 7-62 on page 338 of the i210 datasheet lists TX and RX latencies
for the various speeds the chip supports. To give better ptp timestamp
accuracy, adjust the timestamps by the amounts Intel gives based on
current link speed.
Signed-off-by: Nathan Sullivan
---
drivers/net/ethernet/intel/igb/igb.h |8 +++
drivers/net/ethernet/intel/igb/igb_ptp.c | 36 ++
2 files changed, 44 insertions(+)
diff --git a/drivers/net/ethernet/intel/igb/igb.h
b/drivers/net/ethernet/intel/igb/igb.h
index 9413fa6..7cee61f9 100644
--- a/drivers/net/ethernet/intel/igb/igb.h
+++ b/drivers/net/ethernet/intel/igb/igb.h
@@ -91,6 +91,14 @@ struct igb_adapter;
#define NVM_COMB_VER_OFF 0x0083
#define NVM_COMB_VER_PTR 0x003d
+/* Transmit and receive latency (for PTP timestamps) */
+#define IGB_I210_TX_LATENCY_10 9542
+#define IGB_I210_TX_LATENCY_1001024
+#define IGB_I210_TX_LATENCY_1000 178
+#define IGB_I210_RX_LATENCY_10 20662
+#define IGB_I210_RX_LATENCY_1002213
+#define IGB_I210_RX_LATENCY_1000 448
+
struct vf_data_storage {
unsigned char vf_mac_addresses[ETH_ALEN];
u16 vf_mc_hashes[IGB_MAX_VF_MC_ENTRIES];
diff --git a/drivers/net/ethernet/intel/igb/igb_ptp.c
b/drivers/net/ethernet/intel/igb/igb_ptp.c
index 22a8a29..76a896d 100644
--- a/drivers/net/ethernet/intel/igb/igb_ptp.c
+++ b/drivers/net/ethernet/intel/igb/igb_ptp.c
@@ -722,11 +722,29 @@ static void igb_ptp_tx_hwtstamp(struct igb_adapter
*adapter)
struct e1000_hw *hw = >hw;
struct skb_shared_hwtstamps shhwtstamps;
u64 regval;
+ int adjust = 0;
regval = rd32(E1000_TXSTMPL);
regval |= (u64)rd32(E1000_TXSTMPH) << 32;
igb_ptp_systim_to_hwtstamp(adapter, , regval);
+ /* adjust timestamp for the TX latency based on link speed */
+ if (adapter->hw.mac.type == e1000_i210) {
+ switch (adapter->link_speed) {
+ case SPEED_10:
+ adjust = IGB_I210_TX_LATENCY_10;
+ break;
+ case SPEED_100:
+ adjust = IGB_I210_TX_LATENCY_100;
+ break;
+ case SPEED_1000:
+ adjust = IGB_I210_TX_LATENCY_1000;
+ break;
+ }
+ }
+
+ shhwtstamps.hwtstamp = ktime_sub_ns(shhwtstamps.hwtstamp, adjust);
+
skb_tstamp_tx(adapter->ptp_tx_skb, );
dev_kfree_skb_any(adapter->ptp_tx_skb);
adapter->ptp_tx_skb = NULL;
@@ -771,6 +789,7 @@ void igb_ptp_rx_rgtstamp(struct igb_q_vector *q_vector,
struct igb_adapter *adapter = q_vector->adapter;
struct e1000_hw *hw = >hw;
u64 regval;
+ int adjust = 0;
/* If this bit is set, then the RX registers contain the time stamp. No
* other packet will be time stamped until we read these registers, so
@@ -790,6 +809,23 @@ void igb_ptp_rx_rgtstamp(struct igb_q_vector *q_vector,
igb_ptp_systim_to_hwtstamp(adapter, skb_hwtstamps(skb), regval);
+ /* adjust timestamp for the RX latency based on link speed */
+ if (adapter->hw.mac.type == e1000_i210) {
+ switch (adapter->link_speed) {
+ case SPEED_10:
+ adjust = IGB_I210_RX_LATENCY_10;
+ break;
+ case SPEED_100:
+ adjust = IGB_I210_RX_LATENCY_100;
+ break;
+ case SPEED_1000:
+ adjust = IGB_I210_RX_LATENCY_1000;
+ break;
+ }
+ }
+ skb_hwtstamps(skb)->hwtstamp =
+ ktime_add_ns(skb_hwtstamps(skb)->hwtstamp, adjust);
+
/* Update the last_rx_timestamp timer in order to enable watchdog check
* for error case of latched timestamp on a dropped packet.
*/
--
1.7.10.4
Re: [PATCH v2] net: macb: do not scan PHYs manually
On Thu, Apr 28, 2016 at 08:43:03PM +0200, Andrew Lunn wrote: > > I agree that is a valid fix for AT91, however it won't solve our problem, > > since > > we have no children on the second ethernet MAC in our devices' device > > trees. I'm > > starting to feel like our second MAC shouldn't even really register the > > MDIO bus > > since it isn't being used - maybe adding a DT property to not have a bus is > > a > > better option? > > status = "disabled" > > would be the unusual way. > > Andrew Oh, sorry, I meant we use both MACs on Zynq, however the PHYs are on the MDIO bus of the first MAC. So, the second MAC is used for ethernet but not for MDIO, and so it does not have any PHYs under its DT node. It would be nice if there were a way to tell macb not to bother with MDIO for the second MAC, since that's handled by the first MAC. I guess a good longer-term solution to all these problems would be to treat the MAC and MDIO as seperate devices, like davinci seems to be doing.
Re: [PATCH v2] net: macb: do not scan PHYs manually
On Thu, Apr 28, 2016 at 08:43:03PM +0200, Andrew Lunn wrote: > > I agree that is a valid fix for AT91, however it won't solve our problem, > > since > > we have no children on the second ethernet MAC in our devices' device > > trees. I'm > > starting to feel like our second MAC shouldn't even really register the > > MDIO bus > > since it isn't being used - maybe adding a DT property to not have a bus is > > a > > better option? > > status = "disabled" > > would be the unusual way. > > Andrew Oh, sorry, I meant we use both MACs on Zynq, however the PHYs are on the MDIO bus of the first MAC. So, the second MAC is used for ethernet but not for MDIO, and so it does not have any PHYs under its DT node. It would be nice if there were a way to tell macb not to bother with MDIO for the second MAC, since that's handled by the first MAC. I guess a good longer-term solution to all these problems would be to treat the MAC and MDIO as seperate devices, like davinci seems to be doing.
Re: [PATCH v2] net: macb: do not scan PHYs manually
On Thu, Apr 28, 2016 at 06:32:07PM +0200, Andrew Lunn wrote:
> > Hmm, are AT91 platforms special in this regard? As far as I can tell, this
> > driver (macb) and Marvell PXA are the only ethernet drivers that call
> > mdiobus_scan directly, and PXA does it on a known address. I do see that
> > there
> > are trees that use macb and don't have a phy listed, which is unfortunate.
>
> How it is supposed to work is that you do one of two things:
>
> 1) Your device tree does not have an mdio node. In this case, you call
> mdiobus_register() and it will perform a scan of the bus, and find the
> phys.
>
> 2) Your device tree does have an MDIO node, and you list your PHYs.
>
> Having an MDIO node and not listing the PHYs is broken...
>
> There are however, a few broken device trees around, and a few drivers
> have workarounds. e.g. davinci_mdio.c
>
>/* register the mii bus
> * Create PHYs from DT only in case if PHY child nodes are explicitly
> * defined to support backward compatibility with DTs which assume
> that
> * Davinci MDIO will always scan the bus for PHYs detection.
> */
> if (dev->of_node && of_get_child_count(dev->of_node)) {
> data->skip_scan = true;
> ret = of_mdiobus_register(data->bus, dev->of_node);
> } else {
> ret = mdiobus_register(data->bus);
> }
>
> You probably need to do the same for AT91, count the number of
> children, and it if it zero, fall back to the non-DT way. It would
> also be good to print a warning to get people to fix their device
> tree.
>
> Andrew
I agree that is a valid fix for AT91, however it won't solve our problem, since
we have no children on the second ethernet MAC in our devices' device trees. I'm
starting to feel like our second MAC shouldn't even really register the MDIO bus
since it isn't being used - maybe adding a DT property to not have a bus is a
better option?
Re: [PATCH v2] net: macb: do not scan PHYs manually
On Thu, Apr 28, 2016 at 06:32:07PM +0200, Andrew Lunn wrote:
> > Hmm, are AT91 platforms special in this regard? As far as I can tell, this
> > driver (macb) and Marvell PXA are the only ethernet drivers that call
> > mdiobus_scan directly, and PXA does it on a known address. I do see that
> > there
> > are trees that use macb and don't have a phy listed, which is unfortunate.
>
> How it is supposed to work is that you do one of two things:
>
> 1) Your device tree does not have an mdio node. In this case, you call
> mdiobus_register() and it will perform a scan of the bus, and find the
> phys.
>
> 2) Your device tree does have an MDIO node, and you list your PHYs.
>
> Having an MDIO node and not listing the PHYs is broken...
>
> There are however, a few broken device trees around, and a few drivers
> have workarounds. e.g. davinci_mdio.c
>
>/* register the mii bus
> * Create PHYs from DT only in case if PHY child nodes are explicitly
> * defined to support backward compatibility with DTs which assume
> that
> * Davinci MDIO will always scan the bus for PHYs detection.
> */
> if (dev->of_node && of_get_child_count(dev->of_node)) {
> data->skip_scan = true;
> ret = of_mdiobus_register(data->bus, dev->of_node);
> } else {
> ret = mdiobus_register(data->bus);
> }
>
> You probably need to do the same for AT91, count the number of
> children, and it if it zero, fall back to the non-DT way. It would
> also be good to print a warning to get people to fix their device
> tree.
>
> Andrew
I agree that is a valid fix for AT91, however it won't solve our problem, since
we have no children on the second ethernet MAC in our devices' device trees. I'm
starting to feel like our second MAC shouldn't even really register the MDIO bus
since it isn't being used - maybe adding a DT property to not have a bus is a
better option?
Re: [PATCH v2] net: macb: do not scan PHYs manually
On Thu, Apr 28, 2016 at 05:44:14PM +0200, Nicolas Ferre wrote: > Le 28/04/2016 16:46, Nathan Sullivan a écrit : > > Since of_mdiobus_register and mdiobus_register will scan automatically, > > do not manually scan for PHY devices in the macb ethernet driver. Doing > > so will result in many nonexistent PHYs on the MDIO bus if the MDIO > > lines are floating or grounded, such as when they are not used. > > > > Signed-off-by: Nathan Sullivan <nathan.sulli...@ni.com> > > Well, as explained in the commit message that added this feature and in > the comment, if no phy is specified in the DT we end up without phy... > > There are AT91 platforms which lack specification for the phy node in > the DT. So, I don't know if there is a better way to deal with this case > but I see this removal as risky. > > Bye, > > Nicolas Ferre Hmm, are AT91 platforms special in this regard? As far as I can tell, this driver (macb) and Marvell PXA are the only ethernet drivers that call mdiobus_scan directly, and PXA does it on a known address. I do see that there are trees that use macb and don't have a phy listed, which is unfortunate. Another way to fix our issue would be to consider all 0x0s a bad ID in mdiobus_scan, so grounded MDIO lines do not get PHYs scanned. Or we could add a DT property to disable the manual scan. I'm not sure what the correct solution is, do you have a preference?
Re: [PATCH v2] net: macb: do not scan PHYs manually
On Thu, Apr 28, 2016 at 05:44:14PM +0200, Nicolas Ferre wrote: > Le 28/04/2016 16:46, Nathan Sullivan a écrit : > > Since of_mdiobus_register and mdiobus_register will scan automatically, > > do not manually scan for PHY devices in the macb ethernet driver. Doing > > so will result in many nonexistent PHYs on the MDIO bus if the MDIO > > lines are floating or grounded, such as when they are not used. > > > > Signed-off-by: Nathan Sullivan > > Well, as explained in the commit message that added this feature and in > the comment, if no phy is specified in the DT we end up without phy... > > There are AT91 platforms which lack specification for the phy node in > the DT. So, I don't know if there is a better way to deal with this case > but I see this removal as risky. > > Bye, > > Nicolas Ferre Hmm, are AT91 platforms special in this regard? As far as I can tell, this driver (macb) and Marvell PXA are the only ethernet drivers that call mdiobus_scan directly, and PXA does it on a known address. I do see that there are trees that use macb and don't have a phy listed, which is unfortunate. Another way to fix our issue would be to consider all 0x0s a bad ID in mdiobus_scan, so grounded MDIO lines do not get PHYs scanned. Or we could add a DT property to disable the manual scan. I'm not sure what the correct solution is, do you have a preference?
[PATCH v2] net: macb: do not scan PHYs manually
Since of_mdiobus_register and mdiobus_register will scan automatically,
do not manually scan for PHY devices in the macb ethernet driver. Doing
so will result in many nonexistent PHYs on the MDIO bus if the MDIO
lines are floating or grounded, such as when they are not used.
Signed-off-by: Nathan Sullivan <nathan.sulli...@ni.com>
---
drivers/net/ethernet/cadence/macb.c | 19 +--
1 file changed, 1 insertion(+), 18 deletions(-)
diff --git a/drivers/net/ethernet/cadence/macb.c
b/drivers/net/ethernet/cadence/macb.c
index 48a7d7d..6506b4e 100644
--- a/drivers/net/ethernet/cadence/macb.c
+++ b/drivers/net/ethernet/cadence/macb.c
@@ -424,7 +424,7 @@ static int macb_mii_init(struct macb *bp)
{
struct macb_platform_data *pdata;
struct device_node *np;
- int err = -ENXIO, i;
+ int err = -ENXIO;
/* Enable management port */
macb_writel(bp, NCR, MACB_BIT(MPE));
@@ -450,23 +450,6 @@ static int macb_mii_init(struct macb *bp)
if (np) {
/* try dt phy registration */
err = of_mdiobus_register(bp->mii_bus, np);
-
- /* fallback to standard phy registration if no phy were
- found during dt phy registration */
- if (!err && !phy_find_first(bp->mii_bus)) {
- for (i = 0; i < PHY_MAX_ADDR; i++) {
- struct phy_device *phydev;
-
- phydev = mdiobus_scan(bp->mii_bus, i);
- if (IS_ERR(phydev)) {
- err = PTR_ERR(phydev);
- break;
- }
- }
-
- if (err)
- goto err_out_unregister_bus;
- }
} else {
if (pdata)
bp->mii_bus->phy_mask = pdata->phy_mask;
--
1.7.10.4
[PATCH v2] net: macb: do not scan PHYs manually
Since of_mdiobus_register and mdiobus_register will scan automatically,
do not manually scan for PHY devices in the macb ethernet driver. Doing
so will result in many nonexistent PHYs on the MDIO bus if the MDIO
lines are floating or grounded, such as when they are not used.
Signed-off-by: Nathan Sullivan
---
drivers/net/ethernet/cadence/macb.c | 19 +--
1 file changed, 1 insertion(+), 18 deletions(-)
diff --git a/drivers/net/ethernet/cadence/macb.c
b/drivers/net/ethernet/cadence/macb.c
index 48a7d7d..6506b4e 100644
--- a/drivers/net/ethernet/cadence/macb.c
+++ b/drivers/net/ethernet/cadence/macb.c
@@ -424,7 +424,7 @@ static int macb_mii_init(struct macb *bp)
{
struct macb_platform_data *pdata;
struct device_node *np;
- int err = -ENXIO, i;
+ int err = -ENXIO;
/* Enable management port */
macb_writel(bp, NCR, MACB_BIT(MPE));
@@ -450,23 +450,6 @@ static int macb_mii_init(struct macb *bp)
if (np) {
/* try dt phy registration */
err = of_mdiobus_register(bp->mii_bus, np);
-
- /* fallback to standard phy registration if no phy were
- found during dt phy registration */
- if (!err && !phy_find_first(bp->mii_bus)) {
- for (i = 0; i < PHY_MAX_ADDR; i++) {
- struct phy_device *phydev;
-
- phydev = mdiobus_scan(bp->mii_bus, i);
- if (IS_ERR(phydev)) {
- err = PTR_ERR(phydev);
- break;
- }
- }
-
- if (err)
- goto err_out_unregister_bus;
- }
} else {
if (pdata)
bp->mii_bus->phy_mask = pdata->phy_mask;
--
1.7.10.4
[PATCH] net: macb: do not scan PHYs manually
Since of_mdiobus_register and mdiobus_register will scan automatically,
do not manually scan for PHY devices in the macb ethernet driver. Doing
so will result in many nonexistent PHYs on the MDIO bus if the MDIO
lines are floating or grounded, such as when they are not used.
Signed-off-by: Nathan Sullivan <nathan.sulli...@ni.com>
---
drivers/net/ethernet/cadence/macb.c | 17 -
1 file changed, 17 deletions(-)
diff --git a/drivers/net/ethernet/cadence/macb.c
b/drivers/net/ethernet/cadence/macb.c
index 48a7d7d..e80e487 100644
--- a/drivers/net/ethernet/cadence/macb.c
+++ b/drivers/net/ethernet/cadence/macb.c
@@ -450,23 +450,6 @@ static int macb_mii_init(struct macb *bp)
if (np) {
/* try dt phy registration */
err = of_mdiobus_register(bp->mii_bus, np);
-
- /* fallback to standard phy registration if no phy were
- found during dt phy registration */
- if (!err && !phy_find_first(bp->mii_bus)) {
- for (i = 0; i < PHY_MAX_ADDR; i++) {
- struct phy_device *phydev;
-
- phydev = mdiobus_scan(bp->mii_bus, i);
- if (IS_ERR(phydev)) {
- err = PTR_ERR(phydev);
- break;
- }
- }
-
- if (err)
- goto err_out_unregister_bus;
- }
} else {
if (pdata)
bp->mii_bus->phy_mask = pdata->phy_mask;
--
1.7.10.4
[PATCH] net: macb: do not scan PHYs manually
Since of_mdiobus_register and mdiobus_register will scan automatically,
do not manually scan for PHY devices in the macb ethernet driver. Doing
so will result in many nonexistent PHYs on the MDIO bus if the MDIO
lines are floating or grounded, such as when they are not used.
Signed-off-by: Nathan Sullivan
---
drivers/net/ethernet/cadence/macb.c | 17 -
1 file changed, 17 deletions(-)
diff --git a/drivers/net/ethernet/cadence/macb.c
b/drivers/net/ethernet/cadence/macb.c
index 48a7d7d..e80e487 100644
--- a/drivers/net/ethernet/cadence/macb.c
+++ b/drivers/net/ethernet/cadence/macb.c
@@ -450,23 +450,6 @@ static int macb_mii_init(struct macb *bp)
if (np) {
/* try dt phy registration */
err = of_mdiobus_register(bp->mii_bus, np);
-
- /* fallback to standard phy registration if no phy were
- found during dt phy registration */
- if (!err && !phy_find_first(bp->mii_bus)) {
- for (i = 0; i < PHY_MAX_ADDR; i++) {
- struct phy_device *phydev;
-
- phydev = mdiobus_scan(bp->mii_bus, i);
- if (IS_ERR(phydev)) {
- err = PTR_ERR(phydev);
- break;
- }
- }
-
- if (err)
- goto err_out_unregister_bus;
- }
} else {
if (pdata)
bp->mii_bus->phy_mask = pdata->phy_mask;
--
1.7.10.4
Re: [PATCH V4] usb: remove unnecessary CONFIG_PM dependency from USB_OTG
On Tue, Nov 03, 2015 at 07:56:55AM -0600, Felipe Balbi wrote: > > Hi, > > Nathan Sullivan writes: > > The USB OTG support currently depends on power management > > (CONFIG_PM) being enabled, but does not actually need it enabled. > > Remove this dependency. > > > > Tested on Bay Trail hardware with dwc3 USB. > > > > Signed-off-by: Nathan Sullivan > > --- > > drivers/usb/core/Kconfig |1 - > > 1 file changed, 1 deletion(-) > > > > diff --git a/drivers/usb/core/Kconfig b/drivers/usb/core/Kconfig > > index a99c89e..9c5cdf3 100644 > > --- a/drivers/usb/core/Kconfig > > +++ b/drivers/usb/core/Kconfig > > @@ -43,7 +43,6 @@ config USB_DYNAMIC_MINORS > > > > config USB_OTG > > bool "OTG support" > > - depends on PM > > I don't think this is correct. OTG depends on USB bus suspend, which is > only available on PM builds. Care to further detail why you think PM is > not needed on OTG ? > > -- > balbi I think we can drop this patch, actually. It looks like we confused gadget and OTG support at some point in the past, and we don't want PM on our hardware for latency reasons. We really only need USB gadget support, not full OTG. -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Re: [PATCH V4] usb: remove unnecessary CONFIG_PM dependency from USB_OTG
On Tue, Nov 03, 2015 at 07:56:55AM -0600, Felipe Balbi wrote: > > Hi, > > Nathan Sullivan <nathan.sulli...@ni.com> writes: > > The USB OTG support currently depends on power management > > (CONFIG_PM) being enabled, but does not actually need it enabled. > > Remove this dependency. > > > > Tested on Bay Trail hardware with dwc3 USB. > > > > Signed-off-by: Nathan Sullivan <nathan.sulli...@ni.com> > > --- > > drivers/usb/core/Kconfig |1 - > > 1 file changed, 1 deletion(-) > > > > diff --git a/drivers/usb/core/Kconfig b/drivers/usb/core/Kconfig > > index a99c89e..9c5cdf3 100644 > > --- a/drivers/usb/core/Kconfig > > +++ b/drivers/usb/core/Kconfig > > @@ -43,7 +43,6 @@ config USB_DYNAMIC_MINORS > > > > config USB_OTG > > bool "OTG support" > > - depends on PM > > I don't think this is correct. OTG depends on USB bus suspend, which is > only available on PM builds. Care to further detail why you think PM is > not needed on OTG ? > > -- > balbi I think we can drop this patch, actually. It looks like we confused gadget and OTG support at some point in the past, and we don't want PM on our hardware for latency reasons. We really only need USB gadget support, not full OTG. -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCH V4] usb: remove unnecessary CONFIG_PM dependency from USB_OTG
The USB OTG support currently depends on power management (CONFIG_PM) being enabled, but does not actually need it enabled. Remove this dependency. Tested on Bay Trail hardware with dwc3 USB. Signed-off-by: Nathan Sullivan --- drivers/usb/core/Kconfig |1 - 1 file changed, 1 deletion(-) diff --git a/drivers/usb/core/Kconfig b/drivers/usb/core/Kconfig index a99c89e..9c5cdf3 100644 --- a/drivers/usb/core/Kconfig +++ b/drivers/usb/core/Kconfig @@ -43,7 +43,6 @@ config USB_DYNAMIC_MINORS config USB_OTG bool "OTG support" - depends on PM default n help The most notable feature of USB OTG is support for a -- 1.7.10.4 -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCH V4] usb: remove unnecessary CONFIG_PM dependency from USB_OTG
The USB OTG support currently depends on power management (CONFIG_PM) being enabled, but does not actually need it enabled. Remove this dependency. Tested on Bay Trail hardware with dwc3 USB. Signed-off-by: Nathan Sullivan <nathan.sulli...@ni.com> --- drivers/usb/core/Kconfig |1 - 1 file changed, 1 deletion(-) diff --git a/drivers/usb/core/Kconfig b/drivers/usb/core/Kconfig index a99c89e..9c5cdf3 100644 --- a/drivers/usb/core/Kconfig +++ b/drivers/usb/core/Kconfig @@ -43,7 +43,6 @@ config USB_DYNAMIC_MINORS config USB_OTG bool "OTG support" - depends on PM default n help The most notable feature of USB OTG is support for a -- 1.7.10.4 -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCH V3] usb: remove unnecessary CONFIG_PM dependency from USB_OTG
The USB OTG support currently depends on power management (CONFIG_PM) being enabled, but does not actually need it enabled. Remove this dependency. Remove the unneeded "default n" from USB_OTG as well, the default is already n. Tested on Bay Trail hardware with dwc3 USB. Signed-off-by: Nathan Sullivan --- drivers/usb/core/Kconfig |2 -- 1 file changed, 2 deletions(-) diff --git a/drivers/usb/core/Kconfig b/drivers/usb/core/Kconfig index a99c89e..567454f 100644 --- a/drivers/usb/core/Kconfig +++ b/drivers/usb/core/Kconfig @@ -43,8 +43,6 @@ config USB_DYNAMIC_MINORS config USB_OTG bool "OTG support" - depends on PM - default n help The most notable feature of USB OTG is support for a "Dual-Role" device, which can act as either a device -- 1.7.10.4 -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCH V3] usb: remove unnecessary CONFIG_PM dependency from USB_OTG
The USB OTG support currently depends on power management (CONFIG_PM) being enabled, but does not actually need it enabled. Remove this dependency. Remove the unneeded "default n" from USB_OTG as well, the default is already n. Tested on Bay Trail hardware with dwc3 USB. Signed-off-by: Nathan Sullivan <nathan.sulli...@ni.com> --- drivers/usb/core/Kconfig |2 -- 1 file changed, 2 deletions(-) diff --git a/drivers/usb/core/Kconfig b/drivers/usb/core/Kconfig index a99c89e..567454f 100644 --- a/drivers/usb/core/Kconfig +++ b/drivers/usb/core/Kconfig @@ -43,8 +43,6 @@ config USB_DYNAMIC_MINORS config USB_OTG bool "OTG support" - depends on PM - default n help The most notable feature of USB OTG is support for a "Dual-Role" device, which can act as either a device -- 1.7.10.4 -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCH V2] usb: remove unnecessary CONFIG_PM dependency from USB_OTG
The USB OTG support currently depends on power management (CONFIG_PM) being enabled, but does not actually need it enabled. Remove this dependency. Tested on Bay Trail hardware with dwc3 USB. Signed-off-by: Nathan Sullivan --- drivers/usb/core/Kconfig |2 -- 1 file changed, 2 deletions(-) diff --git a/drivers/usb/core/Kconfig b/drivers/usb/core/Kconfig index a99c89e..567454f 100644 --- a/drivers/usb/core/Kconfig +++ b/drivers/usb/core/Kconfig @@ -43,8 +43,6 @@ config USB_DYNAMIC_MINORS config USB_OTG bool "OTG support" - depends on PM - default n help The most notable feature of USB OTG is support for a "Dual-Role" device, which can act as either a device -- 1.7.10.4 -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCH V2] usb: remove unnecessary CONFIG_PM dependency from USB_OTG
The USB OTG support currently depends on power management (CONFIG_PM) being enabled, but does not actually need it enabled. Remove this dependency. Tested on Bay Trail hardware with dwc3 USB. Signed-off-by: Nathan Sullivan <nathan.sulli...@ni.com> --- drivers/usb/core/Kconfig |2 -- 1 file changed, 2 deletions(-) diff --git a/drivers/usb/core/Kconfig b/drivers/usb/core/Kconfig index a99c89e..567454f 100644 --- a/drivers/usb/core/Kconfig +++ b/drivers/usb/core/Kconfig @@ -43,8 +43,6 @@ config USB_DYNAMIC_MINORS config USB_OTG bool "OTG support" - depends on PM - default n help The most notable feature of USB OTG is support for a "Dual-Role" device, which can act as either a device -- 1.7.10.4 -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[RESEND PATCH] usb: remove unnecessary CONFIG_PM dependency from USB_OTG
The USB gadget support currently depends on power management (CONFIG_PM) being enabled, but does not actually need it enabled. Remove this dependency. Tested on Bay Trail hardware with dwc3 USB. Signed-off-by: Nathan Sullivan --- drivers/usb/core/Kconfig |1 - 1 file changed, 1 deletion(-) diff --git a/drivers/usb/core/Kconfig b/drivers/usb/core/Kconfig index a99c89e..9c5cdf3 100644 --- a/drivers/usb/core/Kconfig +++ b/drivers/usb/core/Kconfig @@ -43,7 +43,6 @@ config USB_DYNAMIC_MINORS config USB_OTG bool "OTG support" - depends on PM default n help The most notable feature of USB OTG is support for a -- 1.7.10.4 -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[RESEND PATCH] usb: remove unnecessary CONFIG_PM dependency from USB_OTG
The USB gadget support currently depends on power management (CONFIG_PM) being enabled, but does not actually need it enabled. Remove this dependency. Tested on Bay Trail hardware with dwc3 USB. Signed-off-by: Nathan Sullivan <nathan.sulli...@ni.com> --- drivers/usb/core/Kconfig |1 - 1 file changed, 1 deletion(-) diff --git a/drivers/usb/core/Kconfig b/drivers/usb/core/Kconfig index a99c89e..9c5cdf3 100644 --- a/drivers/usb/core/Kconfig +++ b/drivers/usb/core/Kconfig @@ -43,7 +43,6 @@ config USB_DYNAMIC_MINORS config USB_OTG bool "OTG support" - depends on PM default n help The most notable feature of USB OTG is support for a -- 1.7.10.4 -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[RESEND PATCH] usb: remove unnecessary CONFIG_PM dependency from USB_OTG
From: Ben Shelton The USB gadget support currently depends on power management (CONFIG_PM) being enabled, but does not actually need it enabled. Remove this dependency. Tested on Bay Trail hardware with dwc3 USB. Signed-off-by: Nathan Sullivan --- drivers/usb/core/Kconfig |1 - 1 file changed, 1 deletion(-) diff --git a/drivers/usb/core/Kconfig b/drivers/usb/core/Kconfig index a99c89e..9c5cdf3 100644 --- a/drivers/usb/core/Kconfig +++ b/drivers/usb/core/Kconfig @@ -43,7 +43,6 @@ config USB_DYNAMIC_MINORS config USB_OTG bool "OTG support" - depends on PM default n help The most notable feature of USB OTG is support for a -- 1.7.10.4 -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Re: [PATCH] net/phy: micrel: Add workaround for bad autoneg
On Wed, Oct 21, 2015 at 12:20:21PM -0700, Florian Fainelli wrote:
> 2015-10-21 12:17 GMT-07:00 Nathan Sullivan :
> > Very rarely, the KSZ9031 will appear to complete autonegotiation, but
> > will drop all traffic afterwards. When this happens, the idle error
> > count will read 0xFF after autonegotiation completes. Reset the PHY
> > when in that state.
> >
> > Signed-off-by: Nathan Sullivan
> > ---
> > drivers/net/phy/micrel.c | 23 ++-
> > 1 file changed, 22 insertions(+), 1 deletion(-)
> >
> > diff --git a/drivers/net/phy/micrel.c b/drivers/net/phy/micrel.c
> > index 499185e..cf6312f 100644
> > --- a/drivers/net/phy/micrel.c
> > +++ b/drivers/net/phy/micrel.c
> > @@ -514,6 +514,27 @@ static int ksz8873mll_read_status(struct phy_device
> > *phydev)
> > return 0;
> > }
> >
> > +static int ksz9031_read_status(struct phy_device *phydev)
> > +{
> > + int err;
> > + int regval;
> > +
> > + err = genphy_read_status(phydev);
> > + if (err)
> > + return err;
> > +
> > + /* Make sure the PHY is not broken. Read idle error count,
> > +* and reset the PHY if it is maxed out.
> > +*/
> > + regval = phy_read(phydev, MII_STAT1000);
> > + if ((regval & 0xFF) == 0xFF) {
>
> Don't you also need to set phydev->state to PHY_READY here to force
> the state machine to restart?
>
I don't think so, we stay in the PHY_AN state since phy_init_hw will restart
autonegotiation. Setting link=0 will go through PHY_NOLINK then back to
PHY_AN, so we wait for autoneg to complete again.
> > + phy_init_hw(phydev);
> > + phydev->link = 0;
> > + }
> > +
> > + return 0;
> > +}
> > +
> > static int ksz8873mll_config_aneg(struct phy_device *phydev)
> > {
> > return 0;
> > @@ -772,7 +793,7 @@ static struct phy_driver ksphy_driver[] = {
> > .driver_data= _type,
> > .config_init= ksz9031_config_init,
> > .config_aneg= genphy_config_aneg,
> > - .read_status= genphy_read_status,
> > + .read_status= ksz9031_read_status,
> > .ack_interrupt = kszphy_ack_interrupt,
> > .config_intr= kszphy_config_intr,
> > .suspend= genphy_suspend,
> > --
> > 1.7.10.4
> >
>
>
>
> --
> Florian
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[PATCH] net/phy: micrel: Add workaround for bad autoneg
Very rarely, the KSZ9031 will appear to complete autonegotiation, but
will drop all traffic afterwards. When this happens, the idle error
count will read 0xFF after autonegotiation completes. Reset the PHY
when in that state.
Signed-off-by: Nathan Sullivan
---
drivers/net/phy/micrel.c | 23 ++-
1 file changed, 22 insertions(+), 1 deletion(-)
diff --git a/drivers/net/phy/micrel.c b/drivers/net/phy/micrel.c
index 499185e..cf6312f 100644
--- a/drivers/net/phy/micrel.c
+++ b/drivers/net/phy/micrel.c
@@ -514,6 +514,27 @@ static int ksz8873mll_read_status(struct phy_device
*phydev)
return 0;
}
+static int ksz9031_read_status(struct phy_device *phydev)
+{
+ int err;
+ int regval;
+
+ err = genphy_read_status(phydev);
+ if (err)
+ return err;
+
+ /* Make sure the PHY is not broken. Read idle error count,
+* and reset the PHY if it is maxed out.
+*/
+ regval = phy_read(phydev, MII_STAT1000);
+ if ((regval & 0xFF) == 0xFF) {
+ phy_init_hw(phydev);
+ phydev->link = 0;
+ }
+
+ return 0;
+}
+
static int ksz8873mll_config_aneg(struct phy_device *phydev)
{
return 0;
@@ -772,7 +793,7 @@ static struct phy_driver ksphy_driver[] = {
.driver_data= _type,
.config_init= ksz9031_config_init,
.config_aneg= genphy_config_aneg,
- .read_status= genphy_read_status,
+ .read_status= ksz9031_read_status,
.ack_interrupt = kszphy_ack_interrupt,
.config_intr= kszphy_config_intr,
.suspend= genphy_suspend,
--
1.7.10.4
--
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[PATCH] net/phy: micrel: Add workaround for bad autoneg
Very rarely, the KSZ9031 will appear to complete autonegotiation, but
will drop all traffic afterwards. When this happens, the idle error
count will read 0xFF after autonegotiation completes. Reset the PHY
when in that state.
Signed-off-by: Nathan Sullivan <nathan.sulli...@ni.com>
---
drivers/net/phy/micrel.c | 23 ++-
1 file changed, 22 insertions(+), 1 deletion(-)
diff --git a/drivers/net/phy/micrel.c b/drivers/net/phy/micrel.c
index 499185e..cf6312f 100644
--- a/drivers/net/phy/micrel.c
+++ b/drivers/net/phy/micrel.c
@@ -514,6 +514,27 @@ static int ksz8873mll_read_status(struct phy_device
*phydev)
return 0;
}
+static int ksz9031_read_status(struct phy_device *phydev)
+{
+ int err;
+ int regval;
+
+ err = genphy_read_status(phydev);
+ if (err)
+ return err;
+
+ /* Make sure the PHY is not broken. Read idle error count,
+* and reset the PHY if it is maxed out.
+*/
+ regval = phy_read(phydev, MII_STAT1000);
+ if ((regval & 0xFF) == 0xFF) {
+ phy_init_hw(phydev);
+ phydev->link = 0;
+ }
+
+ return 0;
+}
+
static int ksz8873mll_config_aneg(struct phy_device *phydev)
{
return 0;
@@ -772,7 +793,7 @@ static struct phy_driver ksphy_driver[] = {
.driver_data= _type,
.config_init= ksz9031_config_init,
.config_aneg= genphy_config_aneg,
- .read_status= genphy_read_status,
+ .read_status= ksz9031_read_status,
.ack_interrupt = kszphy_ack_interrupt,
.config_intr= kszphy_config_intr,
.suspend= genphy_suspend,
--
1.7.10.4
--
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Re: [PATCH] net/phy: micrel: Add workaround for bad autoneg
On Wed, Oct 21, 2015 at 12:20:21PM -0700, Florian Fainelli wrote:
> 2015-10-21 12:17 GMT-07:00 Nathan Sullivan <nathan.sulli...@ni.com>:
> > Very rarely, the KSZ9031 will appear to complete autonegotiation, but
> > will drop all traffic afterwards. When this happens, the idle error
> > count will read 0xFF after autonegotiation completes. Reset the PHY
> > when in that state.
> >
> > Signed-off-by: Nathan Sullivan <nathan.sulli...@ni.com>
> > ---
> > drivers/net/phy/micrel.c | 23 ++-
> > 1 file changed, 22 insertions(+), 1 deletion(-)
> >
> > diff --git a/drivers/net/phy/micrel.c b/drivers/net/phy/micrel.c
> > index 499185e..cf6312f 100644
> > --- a/drivers/net/phy/micrel.c
> > +++ b/drivers/net/phy/micrel.c
> > @@ -514,6 +514,27 @@ static int ksz8873mll_read_status(struct phy_device
> > *phydev)
> > return 0;
> > }
> >
> > +static int ksz9031_read_status(struct phy_device *phydev)
> > +{
> > + int err;
> > + int regval;
> > +
> > + err = genphy_read_status(phydev);
> > + if (err)
> > + return err;
> > +
> > + /* Make sure the PHY is not broken. Read idle error count,
> > +* and reset the PHY if it is maxed out.
> > +*/
> > + regval = phy_read(phydev, MII_STAT1000);
> > + if ((regval & 0xFF) == 0xFF) {
>
> Don't you also need to set phydev->state to PHY_READY here to force
> the state machine to restart?
>
I don't think so, we stay in the PHY_AN state since phy_init_hw will restart
autonegotiation. Setting link=0 will go through PHY_NOLINK then back to
PHY_AN, so we wait for autoneg to complete again.
> > + phy_init_hw(phydev);
> > + phydev->link = 0;
> > + }
> > +
> > + return 0;
> > +}
> > +
> > static int ksz8873mll_config_aneg(struct phy_device *phydev)
> > {
> > return 0;
> > @@ -772,7 +793,7 @@ static struct phy_driver ksphy_driver[] = {
> > .driver_data= _type,
> > .config_init= ksz9031_config_init,
> > .config_aneg= genphy_config_aneg,
> > - .read_status= genphy_read_status,
> > + .read_status= ksz9031_read_status,
> > .ack_interrupt = kszphy_ack_interrupt,
> > .config_intr= kszphy_config_intr,
> > .suspend= genphy_suspend,
> > --
> > 1.7.10.4
> >
>
>
>
> --
> Florian
--
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[RESEND PATCH] usb: remove unnecessary CONFIG_PM dependency from USB_OTG
From: Ben Shelton <ben.shel...@ni.com> The USB gadget support currently depends on power management (CONFIG_PM) being enabled, but does not actually need it enabled. Remove this dependency. Tested on Bay Trail hardware with dwc3 USB. Signed-off-by: Nathan Sullivan <nathan.sulli...@ni.com> --- drivers/usb/core/Kconfig |1 - 1 file changed, 1 deletion(-) diff --git a/drivers/usb/core/Kconfig b/drivers/usb/core/Kconfig index a99c89e..9c5cdf3 100644 --- a/drivers/usb/core/Kconfig +++ b/drivers/usb/core/Kconfig @@ -43,7 +43,6 @@ config USB_DYNAMIC_MINORS config USB_OTG bool "OTG support" - depends on PM default n help The most notable feature of USB OTG is support for a -- 1.7.10.4 -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Re: [PATCH] usb: remove unnecessary CONFIG_PM dependency from USB_OTG
On Mon, Oct 05, 2015 at 02:33:56PM -0500, Felipe Balbi wrote: > > IIRC we had this dependency because OTG needs support USB bus suspend > and afaict, that's only available on PM builds > > -- > balbi Hmm, our use case is separate device and host controllers on a Bay Trail system. We don't ever need to suspend the bus, since the roles are fixed. Also, the system is running RT tasks and we don't want PM on. Maybe the device-side USB option should be separate from the OTG option? We really don't want HNP or any of the dual-role features, just support for gadget drivers and USB device controllers. -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCH] usb: remove unnecessary CONFIG_PM dependency from USB_OTG
From: Ben Shelton The USB gadget support currently depends on power management (CONFIG_PM) being enabled, but does not actually need it enabled. Remove this dependency. Tested on Bay Trail hardware with dwc3 USB. Signed-off-by: Nathan Sullivan --- drivers/usb/core/Kconfig |1 - 1 file changed, 1 deletion(-) diff --git a/drivers/usb/core/Kconfig b/drivers/usb/core/Kconfig index a99c89e..9c5cdf3 100644 --- a/drivers/usb/core/Kconfig +++ b/drivers/usb/core/Kconfig @@ -43,7 +43,6 @@ config USB_DYNAMIC_MINORS config USB_OTG bool "OTG support" - depends on PM default n help The most notable feature of USB OTG is support for a -- 1.7.10.4 -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCH] usb: remove unnecessary CONFIG_PM dependency from USB_OTG
From: Ben Shelton <ben.shel...@ni.com> The USB gadget support currently depends on power management (CONFIG_PM) being enabled, but does not actually need it enabled. Remove this dependency. Tested on Bay Trail hardware with dwc3 USB. Signed-off-by: Nathan Sullivan <nathan.sulli...@ni.com> --- drivers/usb/core/Kconfig |1 - 1 file changed, 1 deletion(-) diff --git a/drivers/usb/core/Kconfig b/drivers/usb/core/Kconfig index a99c89e..9c5cdf3 100644 --- a/drivers/usb/core/Kconfig +++ b/drivers/usb/core/Kconfig @@ -43,7 +43,6 @@ config USB_DYNAMIC_MINORS config USB_OTG bool "OTG support" - depends on PM default n help The most notable feature of USB OTG is support for a -- 1.7.10.4 -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Re: [PATCH] usb: remove unnecessary CONFIG_PM dependency from USB_OTG
On Mon, Oct 05, 2015 at 02:33:56PM -0500, Felipe Balbi wrote: > > IIRC we had this dependency because OTG needs support USB bus suspend > and afaict, that's only available on PM builds > > -- > balbi Hmm, our use case is separate device and host controllers on a Bay Trail system. We don't ever need to suspend the bus, since the roles are fixed. Also, the system is running RT tasks and we don't want PM on. Maybe the device-side USB option should be separate from the OTG option? We really don't want HNP or any of the dual-role features, just support for gadget drivers and USB device controllers. -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCH v2 1/2] usb: chipidea: add xilinx zynq platform data
Due to having hardware tx buffers less than 512 bytes in size, streaming
must be enabled on the Zynq for the udc to work at all. Add platform data
specific to the Zynq udc, which does not set the CI_HDRC_DISABLE_STREAMING
flag.
Based on a patch by the same name from the Xilinx vendor tree.
Signed-off-by: Nathan Sullivan
---
Changes from v1 - better describe the issue in the description, the root cause
is that the Zynq hardware does not have big enough tx buffers to hold entire
packets, so streaming must be on.
---
drivers/usb/chipidea/ci_hdrc_usb2.c | 25 +++--
1 file changed, 19 insertions(+), 6 deletions(-)
diff --git a/drivers/usb/chipidea/ci_hdrc_usb2.c
b/drivers/usb/chipidea/ci_hdrc_usb2.c
index 9eae1a1..4456d2c 100644
--- a/drivers/usb/chipidea/ci_hdrc_usb2.c
+++ b/drivers/usb/chipidea/ci_hdrc_usb2.c
@@ -12,6 +12,7 @@
#include
#include
#include
+#include
#include
#include
#include
@@ -30,18 +31,36 @@ static const struct ci_hdrc_platform_data ci_default_pdata
= {
.flags = CI_HDRC_DISABLE_STREAMING,
};
+static struct ci_hdrc_platform_data ci_zynq_pdata = {
+ .capoffset = DEF_CAPOFFSET,
+};
+
+static const struct of_device_id ci_hdrc_usb2_of_match[] = {
+ { .compatible = "chipidea,usb2"},
+ { .compatible = "xlnx,zynq-usb-2.20a", .data = _zynq_pdata},
+ { }
+};
+MODULE_DEVICE_TABLE(of, ci_hdrc_usb2_of_match);
+
static int ci_hdrc_usb2_probe(struct platform_device *pdev)
{
struct device *dev = >dev;
struct ci_hdrc_usb2_priv *priv;
struct ci_hdrc_platform_data *ci_pdata = dev_get_platdata(dev);
int ret;
+ const struct of_device_id *match;
if (!ci_pdata) {
ci_pdata = devm_kmalloc(dev, sizeof(*ci_pdata), GFP_KERNEL);
*ci_pdata = ci_default_pdata; /* struct copy */
}
+ match = of_match_device(ci_hdrc_usb2_of_match, >dev);
+ if (match && match->data) {
+ /* struct copy */
+ *ci_pdata = *(struct ci_hdrc_platform_data *)match->data;
+ }
+
priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
if (!priv)
return -ENOMEM;
@@ -96,12 +115,6 @@ static int ci_hdrc_usb2_remove(struct platform_device *pdev)
return 0;
}
-static const struct of_device_id ci_hdrc_usb2_of_match[] = {
- { .compatible = "chipidea,usb2" },
- { }
-};
-MODULE_DEVICE_TABLE(of, ci_hdrc_usb2_of_match);
-
static struct platform_driver ci_hdrc_usb2_driver = {
.probe = ci_hdrc_usb2_probe,
.remove = ci_hdrc_usb2_remove,
--
1.7.10.4
--
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[PATCH v2 2/2] Documentation: bindings: add doc for zynq USB
Document the binding for the zynq specific chipidea UDC binding. Signed-off-by: Nathan Sullivan --- Documentation/devicetree/bindings/usb/ci-hdrc-usb2.txt |1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/usb/ci-hdrc-usb2.txt b/Documentation/devicetree/bindings/usb/ci-hdrc-usb2.txt index 553e2fa..29ec09e 100644 --- a/Documentation/devicetree/bindings/usb/ci-hdrc-usb2.txt +++ b/Documentation/devicetree/bindings/usb/ci-hdrc-usb2.txt @@ -6,6 +6,7 @@ Required properties: "lsi,zevio-usb" "qcom,ci-hdrc" "chipidea,usb2" + "xlnx,zynq-usb-2.20a" - reg: base address and length of the registers - interrupts: interrupt for the USB controller -- 1.7.10.4 -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCH v2 2/2] Documentation: bindings: add doc for zynq USB
Document the binding for the zynq specific chipidea UDC binding. Signed-off-by: Nathan Sullivan <nathan.sulli...@ni.com> --- Documentation/devicetree/bindings/usb/ci-hdrc-usb2.txt |1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/usb/ci-hdrc-usb2.txt b/Documentation/devicetree/bindings/usb/ci-hdrc-usb2.txt index 553e2fa..29ec09e 100644 --- a/Documentation/devicetree/bindings/usb/ci-hdrc-usb2.txt +++ b/Documentation/devicetree/bindings/usb/ci-hdrc-usb2.txt @@ -6,6 +6,7 @@ Required properties: "lsi,zevio-usb" "qcom,ci-hdrc" "chipidea,usb2" + "xlnx,zynq-usb-2.20a" - reg: base address and length of the registers - interrupts: interrupt for the USB controller -- 1.7.10.4 -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCH v2 1/2] usb: chipidea: add xilinx zynq platform data
Due to having hardware tx buffers less than 512 bytes in size, streaming
must be enabled on the Zynq for the udc to work at all. Add platform data
specific to the Zynq udc, which does not set the CI_HDRC_DISABLE_STREAMING
flag.
Based on a patch by the same name from the Xilinx vendor tree.
Signed-off-by: Nathan Sullivan <nathan.sulli...@ni.com>
---
Changes from v1 - better describe the issue in the description, the root cause
is that the Zynq hardware does not have big enough tx buffers to hold entire
packets, so streaming must be on.
---
drivers/usb/chipidea/ci_hdrc_usb2.c | 25 +++--
1 file changed, 19 insertions(+), 6 deletions(-)
diff --git a/drivers/usb/chipidea/ci_hdrc_usb2.c
b/drivers/usb/chipidea/ci_hdrc_usb2.c
index 9eae1a1..4456d2c 100644
--- a/drivers/usb/chipidea/ci_hdrc_usb2.c
+++ b/drivers/usb/chipidea/ci_hdrc_usb2.c
@@ -12,6 +12,7 @@
#include
#include
#include
+#include
#include
#include
#include
@@ -30,18 +31,36 @@ static const struct ci_hdrc_platform_data ci_default_pdata
= {
.flags = CI_HDRC_DISABLE_STREAMING,
};
+static struct ci_hdrc_platform_data ci_zynq_pdata = {
+ .capoffset = DEF_CAPOFFSET,
+};
+
+static const struct of_device_id ci_hdrc_usb2_of_match[] = {
+ { .compatible = "chipidea,usb2"},
+ { .compatible = "xlnx,zynq-usb-2.20a", .data = _zynq_pdata},
+ { }
+};
+MODULE_DEVICE_TABLE(of, ci_hdrc_usb2_of_match);
+
static int ci_hdrc_usb2_probe(struct platform_device *pdev)
{
struct device *dev = >dev;
struct ci_hdrc_usb2_priv *priv;
struct ci_hdrc_platform_data *ci_pdata = dev_get_platdata(dev);
int ret;
+ const struct of_device_id *match;
if (!ci_pdata) {
ci_pdata = devm_kmalloc(dev, sizeof(*ci_pdata), GFP_KERNEL);
*ci_pdata = ci_default_pdata; /* struct copy */
}
+ match = of_match_device(ci_hdrc_usb2_of_match, >dev);
+ if (match && match->data) {
+ /* struct copy */
+ *ci_pdata = *(struct ci_hdrc_platform_data *)match->data;
+ }
+
priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
if (!priv)
return -ENOMEM;
@@ -96,12 +115,6 @@ static int ci_hdrc_usb2_remove(struct platform_device *pdev)
return 0;
}
-static const struct of_device_id ci_hdrc_usb2_of_match[] = {
- { .compatible = "chipidea,usb2" },
- { }
-};
-MODULE_DEVICE_TABLE(of, ci_hdrc_usb2_of_match);
-
static struct platform_driver ci_hdrc_usb2_driver = {
.probe = ci_hdrc_usb2_probe,
.remove = ci_hdrc_usb2_remove,
--
1.7.10.4
--
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Re: [PATCH 1/2] usb: chipidea: add xilinx zynq platform data
On Fri, Aug 28, 2015 at 09:30:12AM +0800, Peter Chen wrote: > On Thu, Aug 27, 2015 at 09:33:07AM -0500, Nathan Sullivan wrote: > > On Thu, Aug 27, 2015 at 01:11:30PM +0530, punnaiah choudary kalluri wrote: > > > Hi, > > > > > > On Thu, Aug 27, 2015 at 10:03 AM, Peter Chen > > > wrote: > > > > On Thu, Aug 27, 2015 at 10:59:22AM +0530, sundeep subbaraya wrote: > > > >> Hi, > > > >> > > > >> > > > >> On Wed, Aug 26, 2015 at 8:57 PM, Nathan Sullivan > > > >> wrote: > > > >> > The Xilinx Zynq udc does not need the CI_HDRC_DISABLE_STREAMING flag, > > > >> > unlike the default platform data. Add platform data specific to the > > > >> > Zynq udc. > > > >> > > > > >> > Based on a patch by the same name from the Xilinx vendor tree. > > > >> > > > >> I am that Xilinx guy who sent this patch :). It is in Xilinx tree as > > > >> temporary fix and > > > >> I did not debug further why UDC works only when streaming is enabled. > > > >> Probably this is right time to post my question here. > > > >> I was expecting like: > > > >> Streaming disabled - both low bandwidth and high bandwidth systems > > > >> should work fine > > > >> Streaming enabled - only for high bandwidth systems > > > >> but this is not the case, Zynq UDC works only when Streaming is > > > >> enabled. > > > >> Please correct me if I am wrong. > > > > > > > > You are right, stream mode disabled should work at anytime. > > > > It is so strange why zynq UDC only works when stream mode is enabled. > > > > > > I am referring the section 8.5.2 in Synopsys usb 2.0 HS controllervDoc > > > 2.20a, > > > this is what it says about SDIS (streaming mode disable option) > > > > > > Before activating this mode, the user must check if the TX latency > > > buffers per endpoint are able to > > > accommodate at least one entire maximum size packet. The RX buffer > > > size must, at least, double the TX > > > buffer size per endpoint. To optimize the stream disable performance, > > > system bus burst must be set as high > > > as possible. > > > When the stream disable mode is used, the burst size (VUSB_HS_RX_BURST > > > and VUSB_HS_TX_BURST) > > > must be a integer sub-multiple of the latency buffer size > > > (VUSB_HS_RX_DEPTH for RX buffer and > > > VUSB_HS_TX_CHAN for the TX buffer). If this is not respected the > > > controller will not work properly in stream > > > disable mode. > > > The stream disable mode should just be used in situations where the > > > available system bandwidth is low or the > > > system bus access latency is high, in order to avoid underruns and > > > overruns in the latency buffers. This works > > > for all types of endpoints, except for ISO endpoints. > > > Such a system can't ensure the real time support that the ISO > > > endpoints require, so the ISO endpoints are not > > > supported when the SDIS bit is set. > > > > > > Definitely we need to root cause why disable streaming mode is not > > > working for zynq but from controller spec > > > point of view it is possible that controller not work properly in > > > stream disable mode. > > > > > > Regards, > > > Punnaiah > > > > > > > Maybe the burst size isn't set correctly by default? It does say the > > controller > > won't work correctly with stream disable set and an invalid burst size. > > Looks > > like TX and RX burst both default to 16, per the Zynq manual. > > > > With the stream disable bit set, the behvior we see on our hardware is > > that priming just stops, with an outstanding transfer in memory marked > > active in the status field by the controller. This happens at random, even > > when doing single transfers at a time like with g_ether set to have a queue > > size of 1. With SDIS clear everything works great. Given that the Zynq is > > not > > bandwidth constrained, it seems like SDIS clear should be the default. > > > > I suspect the possible reason is the tx buffer for each endpoint is > small (<=512 bytes), so it can't copy one packet (assume max packet size > for bulk) to tx buffer, then the prime can't be finished. > > Would you help to dump the registers HWTXBUF ($BASE + 0x10) and DCCPARAMS > ($BASE + 124)? > > tx buffer size = ((2 ^ HWTXBUF.VUSB_HS_TX_ADD) / DCCPARAMS.DEN) * > (DWORD_PER_BYTES) > > DWORD_PER_BYTES is 4 > > -- > > Best Regards, > Peter Chen HWTXBUF is 0x80060A10, DCCPARAMS is 0xE0003124. -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Re: [PATCH 1/2] usb: chipidea: add xilinx zynq platform data
On Fri, Aug 28, 2015 at 09:30:12AM +0800, Peter Chen wrote: On Thu, Aug 27, 2015 at 09:33:07AM -0500, Nathan Sullivan wrote: On Thu, Aug 27, 2015 at 01:11:30PM +0530, punnaiah choudary kalluri wrote: Hi, On Thu, Aug 27, 2015 at 10:03 AM, Peter Chen peter.c...@freescale.com wrote: On Thu, Aug 27, 2015 at 10:59:22AM +0530, sundeep subbaraya wrote: Hi, On Wed, Aug 26, 2015 at 8:57 PM, Nathan Sullivan nathan.sulli...@ni.com wrote: The Xilinx Zynq udc does not need the CI_HDRC_DISABLE_STREAMING flag, unlike the default platform data. Add platform data specific to the Zynq udc. Based on a patch by the same name from the Xilinx vendor tree. I am that Xilinx guy who sent this patch :). It is in Xilinx tree as temporary fix and I did not debug further why UDC works only when streaming is enabled. Probably this is right time to post my question here. I was expecting like: Streaming disabled - both low bandwidth and high bandwidth systems should work fine Streaming enabled - only for high bandwidth systems but this is not the case, Zynq UDC works only when Streaming is enabled. Please correct me if I am wrong. You are right, stream mode disabled should work at anytime. It is so strange why zynq UDC only works when stream mode is enabled. I am referring the section 8.5.2 in Synopsys usb 2.0 HS controllervDoc 2.20a, this is what it says about SDIS (streaming mode disable option) Before activating this mode, the user must check if the TX latency buffers per endpoint are able to accommodate at least one entire maximum size packet. The RX buffer size must, at least, double the TX buffer size per endpoint. To optimize the stream disable performance, system bus burst must be set as high as possible. When the stream disable mode is used, the burst size (VUSB_HS_RX_BURST and VUSB_HS_TX_BURST) must be a integer sub-multiple of the latency buffer size (VUSB_HS_RX_DEPTH for RX buffer and VUSB_HS_TX_CHAN for the TX buffer). If this is not respected the controller will not work properly in stream disable mode. The stream disable mode should just be used in situations where the available system bandwidth is low or the system bus access latency is high, in order to avoid underruns and overruns in the latency buffers. This works for all types of endpoints, except for ISO endpoints. Such a system can't ensure the real time support that the ISO endpoints require, so the ISO endpoints are not supported when the SDIS bit is set. Definitely we need to root cause why disable streaming mode is not working for zynq but from controller spec point of view it is possible that controller not work properly in stream disable mode. Regards, Punnaiah Maybe the burst size isn't set correctly by default? It does say the controller won't work correctly with stream disable set and an invalid burst size. Looks like TX and RX burst both default to 16, per the Zynq manual. With the stream disable bit set, the behvior we see on our hardware is that priming just stops, with an outstanding transfer in memory marked active in the status field by the controller. This happens at random, even when doing single transfers at a time like with g_ether set to have a queue size of 1. With SDIS clear everything works great. Given that the Zynq is not bandwidth constrained, it seems like SDIS clear should be the default. I suspect the possible reason is the tx buffer for each endpoint is small (=512 bytes), so it can't copy one packet (assume max packet size for bulk) to tx buffer, then the prime can't be finished. Would you help to dump the registers HWTXBUF ($BASE + 0x10) and DCCPARAMS ($BASE + 124)? tx buffer size = ((2 ^ HWTXBUF.VUSB_HS_TX_ADD) / DCCPARAMS.DEN) * (DWORD_PER_BYTES) DWORD_PER_BYTES is 4 -- Best Regards, Peter Chen HWTXBUF is 0x80060A10, DCCPARAMS is 0xE0003124. -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Re: [PATCH 1/2] usb: chipidea: add xilinx zynq platform data
On Thu, Aug 27, 2015 at 01:11:30PM +0530, punnaiah choudary kalluri wrote: > Hi, > > On Thu, Aug 27, 2015 at 10:03 AM, Peter Chen wrote: > > On Thu, Aug 27, 2015 at 10:59:22AM +0530, sundeep subbaraya wrote: > >> Hi, > >> > >> > >> On Wed, Aug 26, 2015 at 8:57 PM, Nathan Sullivan > >> wrote: > >> > The Xilinx Zynq udc does not need the CI_HDRC_DISABLE_STREAMING flag, > >> > unlike the default platform data. Add platform data specific to the > >> > Zynq udc. > >> > > >> > Based on a patch by the same name from the Xilinx vendor tree. > >> > >> I am that Xilinx guy who sent this patch :). It is in Xilinx tree as > >> temporary fix and > >> I did not debug further why UDC works only when streaming is enabled. > >> Probably this is right time to post my question here. > >> I was expecting like: > >> Streaming disabled - both low bandwidth and high bandwidth systems > >> should work fine > >> Streaming enabled - only for high bandwidth systems > >> but this is not the case, Zynq UDC works only when Streaming is enabled. > >> Please correct me if I am wrong. > > > > You are right, stream mode disabled should work at anytime. > > It is so strange why zynq UDC only works when stream mode is enabled. > > I am referring the section 8.5.2 in Synopsys usb 2.0 HS controllervDoc 2.20a, > this is what it says about SDIS (streaming mode disable option) > > Before activating this mode, the user must check if the TX latency > buffers per endpoint are able to > accommodate at least one entire maximum size packet. The RX buffer > size must, at least, double the TX > buffer size per endpoint. To optimize the stream disable performance, > system bus burst must be set as high > as possible. > When the stream disable mode is used, the burst size (VUSB_HS_RX_BURST > and VUSB_HS_TX_BURST) > must be a integer sub-multiple of the latency buffer size > (VUSB_HS_RX_DEPTH for RX buffer and > VUSB_HS_TX_CHAN for the TX buffer). If this is not respected the > controller will not work properly in stream > disable mode. > The stream disable mode should just be used in situations where the > available system bandwidth is low or the > system bus access latency is high, in order to avoid underruns and > overruns in the latency buffers. This works > for all types of endpoints, except for ISO endpoints. > Such a system can't ensure the real time support that the ISO > endpoints require, so the ISO endpoints are not > supported when the SDIS bit is set. > > Definitely we need to root cause why disable streaming mode is not > working for zynq but from controller spec > point of view it is possible that controller not work properly in > stream disable mode. > > Regards, > Punnaiah > Maybe the burst size isn't set correctly by default? It does say the controller won't work correctly with stream disable set and an invalid burst size. Looks like TX and RX burst both default to 16, per the Zynq manual. With the stream disable bit set, the behvior we see on our hardware is that priming just stops, with an outstanding transfer in memory marked active in the status field by the controller. This happens at random, even when doing single transfers at a time like with g_ether set to have a queue size of 1. With SDIS clear everything works great. Given that the Zynq is not bandwidth constrained, it seems like SDIS clear should be the default. > > > > Peter > >> -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Re: [PATCH 1/2] usb: chipidea: add xilinx zynq platform data
On Thu, Aug 27, 2015 at 01:11:30PM +0530, punnaiah choudary kalluri wrote: Hi, On Thu, Aug 27, 2015 at 10:03 AM, Peter Chen peter.c...@freescale.com wrote: On Thu, Aug 27, 2015 at 10:59:22AM +0530, sundeep subbaraya wrote: Hi, On Wed, Aug 26, 2015 at 8:57 PM, Nathan Sullivan nathan.sulli...@ni.com wrote: The Xilinx Zynq udc does not need the CI_HDRC_DISABLE_STREAMING flag, unlike the default platform data. Add platform data specific to the Zynq udc. Based on a patch by the same name from the Xilinx vendor tree. I am that Xilinx guy who sent this patch :). It is in Xilinx tree as temporary fix and I did not debug further why UDC works only when streaming is enabled. Probably this is right time to post my question here. I was expecting like: Streaming disabled - both low bandwidth and high bandwidth systems should work fine Streaming enabled - only for high bandwidth systems but this is not the case, Zynq UDC works only when Streaming is enabled. Please correct me if I am wrong. You are right, stream mode disabled should work at anytime. It is so strange why zynq UDC only works when stream mode is enabled. I am referring the section 8.5.2 in Synopsys usb 2.0 HS controllervDoc 2.20a, this is what it says about SDIS (streaming mode disable option) Before activating this mode, the user must check if the TX latency buffers per endpoint are able to accommodate at least one entire maximum size packet. The RX buffer size must, at least, double the TX buffer size per endpoint. To optimize the stream disable performance, system bus burst must be set as high as possible. When the stream disable mode is used, the burst size (VUSB_HS_RX_BURST and VUSB_HS_TX_BURST) must be a integer sub-multiple of the latency buffer size (VUSB_HS_RX_DEPTH for RX buffer and VUSB_HS_TX_CHAN for the TX buffer). If this is not respected the controller will not work properly in stream disable mode. The stream disable mode should just be used in situations where the available system bandwidth is low or the system bus access latency is high, in order to avoid underruns and overruns in the latency buffers. This works for all types of endpoints, except for ISO endpoints. Such a system can't ensure the real time support that the ISO endpoints require, so the ISO endpoints are not supported when the SDIS bit is set. Definitely we need to root cause why disable streaming mode is not working for zynq but from controller spec point of view it is possible that controller not work properly in stream disable mode. Regards, Punnaiah Maybe the burst size isn't set correctly by default? It does say the controller won't work correctly with stream disable set and an invalid burst size. Looks like TX and RX burst both default to 16, per the Zynq manual. With the stream disable bit set, the behvior we see on our hardware is that priming just stops, with an outstanding transfer in memory marked active in the status field by the controller. This happens at random, even when doing single transfers at a time like with g_ether set to have a queue size of 1. With SDIS clear everything works great. Given that the Zynq is not bandwidth constrained, it seems like SDIS clear should be the default. Peter -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCH 2/2] Documentation: bindings: add doc for zynq USB
Document the binding for the zynq specific chipidea UDC binding. Signed-off-by: Nathan Sullivan --- Documentation/devicetree/bindings/usb/ci-hdrc-usb2.txt |1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/usb/ci-hdrc-usb2.txt b/Documentation/devicetree/bindings/usb/ci-hdrc-usb2.txt index 553e2fa..29ec09e 100644 --- a/Documentation/devicetree/bindings/usb/ci-hdrc-usb2.txt +++ b/Documentation/devicetree/bindings/usb/ci-hdrc-usb2.txt @@ -6,6 +6,7 @@ Required properties: "lsi,zevio-usb" "qcom,ci-hdrc" "chipidea,usb2" + "xlnx,zynq-usb-2.20a" - reg: base address and length of the registers - interrupts: interrupt for the USB controller -- 1.7.10.4 -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCH 1/2] usb: chipidea: add xilinx zynq platform data
The Xilinx Zynq udc does not need the CI_HDRC_DISABLE_STREAMING flag,
unlike the default platform data. Add platform data specific to the
Zynq udc.
Based on a patch by the same name from the Xilinx vendor tree.
Signed-off-by: Nathan Sullivan
---
drivers/usb/chipidea/ci_hdrc_usb2.c | 25 +++--
1 file changed, 19 insertions(+), 6 deletions(-)
diff --git a/drivers/usb/chipidea/ci_hdrc_usb2.c
b/drivers/usb/chipidea/ci_hdrc_usb2.c
index 9eae1a1..4456d2c 100644
--- a/drivers/usb/chipidea/ci_hdrc_usb2.c
+++ b/drivers/usb/chipidea/ci_hdrc_usb2.c
@@ -12,6 +12,7 @@
#include
#include
#include
+#include
#include
#include
#include
@@ -30,18 +31,36 @@ static const struct ci_hdrc_platform_data ci_default_pdata
= {
.flags = CI_HDRC_DISABLE_STREAMING,
};
+static struct ci_hdrc_platform_data ci_zynq_pdata = {
+ .capoffset = DEF_CAPOFFSET,
+};
+
+static const struct of_device_id ci_hdrc_usb2_of_match[] = {
+ { .compatible = "chipidea,usb2"},
+ { .compatible = "xlnx,zynq-usb-2.20a", .data = _zynq_pdata},
+ { }
+};
+MODULE_DEVICE_TABLE(of, ci_hdrc_usb2_of_match);
+
static int ci_hdrc_usb2_probe(struct platform_device *pdev)
{
struct device *dev = >dev;
struct ci_hdrc_usb2_priv *priv;
struct ci_hdrc_platform_data *ci_pdata = dev_get_platdata(dev);
int ret;
+ const struct of_device_id *match;
if (!ci_pdata) {
ci_pdata = devm_kmalloc(dev, sizeof(*ci_pdata), GFP_KERNEL);
*ci_pdata = ci_default_pdata; /* struct copy */
}
+ match = of_match_device(ci_hdrc_usb2_of_match, >dev);
+ if (match && match->data) {
+ /* struct copy */
+ *ci_pdata = *(struct ci_hdrc_platform_data *)match->data;
+ }
+
priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
if (!priv)
return -ENOMEM;
@@ -96,12 +115,6 @@ static int ci_hdrc_usb2_remove(struct platform_device *pdev)
return 0;
}
-static const struct of_device_id ci_hdrc_usb2_of_match[] = {
- { .compatible = "chipidea,usb2" },
- { }
-};
-MODULE_DEVICE_TABLE(of, ci_hdrc_usb2_of_match);
-
static struct platform_driver ci_hdrc_usb2_driver = {
.probe = ci_hdrc_usb2_probe,
.remove = ci_hdrc_usb2_remove,
--
1.7.10.4
--
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Please read the FAQ at http://www.tux.org/lkml/
[PATCH 1/2] usb: chipidea: add xilinx zynq platform data
The Xilinx Zynq udc does not need the CI_HDRC_DISABLE_STREAMING flag,
unlike the default platform data. Add platform data specific to the
Zynq udc.
Based on a patch by the same name from the Xilinx vendor tree.
Signed-off-by: Nathan Sullivan nathan.sulli...@ni.com
---
drivers/usb/chipidea/ci_hdrc_usb2.c | 25 +++--
1 file changed, 19 insertions(+), 6 deletions(-)
diff --git a/drivers/usb/chipidea/ci_hdrc_usb2.c
b/drivers/usb/chipidea/ci_hdrc_usb2.c
index 9eae1a1..4456d2c 100644
--- a/drivers/usb/chipidea/ci_hdrc_usb2.c
+++ b/drivers/usb/chipidea/ci_hdrc_usb2.c
@@ -12,6 +12,7 @@
#include linux/dma-mapping.h
#include linux/module.h
#include linux/of.h
+#include linux/of_platform.h
#include linux/phy/phy.h
#include linux/platform_device.h
#include linux/usb/chipidea.h
@@ -30,18 +31,36 @@ static const struct ci_hdrc_platform_data ci_default_pdata
= {
.flags = CI_HDRC_DISABLE_STREAMING,
};
+static struct ci_hdrc_platform_data ci_zynq_pdata = {
+ .capoffset = DEF_CAPOFFSET,
+};
+
+static const struct of_device_id ci_hdrc_usb2_of_match[] = {
+ { .compatible = chipidea,usb2},
+ { .compatible = xlnx,zynq-usb-2.20a, .data = ci_zynq_pdata},
+ { }
+};
+MODULE_DEVICE_TABLE(of, ci_hdrc_usb2_of_match);
+
static int ci_hdrc_usb2_probe(struct platform_device *pdev)
{
struct device *dev = pdev-dev;
struct ci_hdrc_usb2_priv *priv;
struct ci_hdrc_platform_data *ci_pdata = dev_get_platdata(dev);
int ret;
+ const struct of_device_id *match;
if (!ci_pdata) {
ci_pdata = devm_kmalloc(dev, sizeof(*ci_pdata), GFP_KERNEL);
*ci_pdata = ci_default_pdata; /* struct copy */
}
+ match = of_match_device(ci_hdrc_usb2_of_match, pdev-dev);
+ if (match match-data) {
+ /* struct copy */
+ *ci_pdata = *(struct ci_hdrc_platform_data *)match-data;
+ }
+
priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
if (!priv)
return -ENOMEM;
@@ -96,12 +115,6 @@ static int ci_hdrc_usb2_remove(struct platform_device *pdev)
return 0;
}
-static const struct of_device_id ci_hdrc_usb2_of_match[] = {
- { .compatible = chipidea,usb2 },
- { }
-};
-MODULE_DEVICE_TABLE(of, ci_hdrc_usb2_of_match);
-
static struct platform_driver ci_hdrc_usb2_driver = {
.probe = ci_hdrc_usb2_probe,
.remove = ci_hdrc_usb2_remove,
--
1.7.10.4
--
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More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
[PATCH 2/2] Documentation: bindings: add doc for zynq USB
Document the binding for the zynq specific chipidea UDC binding. Signed-off-by: Nathan Sullivan nathan.sulli...@ni.com --- Documentation/devicetree/bindings/usb/ci-hdrc-usb2.txt |1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/usb/ci-hdrc-usb2.txt b/Documentation/devicetree/bindings/usb/ci-hdrc-usb2.txt index 553e2fa..29ec09e 100644 --- a/Documentation/devicetree/bindings/usb/ci-hdrc-usb2.txt +++ b/Documentation/devicetree/bindings/usb/ci-hdrc-usb2.txt @@ -6,6 +6,7 @@ Required properties: lsi,zevio-usb qcom,ci-hdrc chipidea,usb2 + xlnx,zynq-usb-2.20a - reg: base address and length of the registers - interrupts: interrupt for the USB controller -- 1.7.10.4 -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Re: [PATCH v2] net/phy: micrel: Reenable interrupts during resume
On Fri, Jul 31, 2015 at 12:22:04AM -0700, David Miller wrote: > From: Nathan Sullivan > Date: Thu, 30 Jul 2015 18:09:05 -0500 > > > On Thu, Jul 30, 2015 at 10:00:34AM -0700, David Miller wrote: > >> From: Nathan Sullivan > >> Date: Thu, 30 Jul 2015 10:15:48 -0500 > >> > >> > Changes for V2: Actually make sure it compiles this time. > >> > >> If V1 didn't compile, even for you, then I have a big problem. > >> > >> And that problem is that you didn't test this change at all. > > > > Sorry about that, I have tested it against 3.14, which is why I had > > the older interrupt function in v1. On HEAD, the phy no longer > > suspends when ethernet goes down on our hardware - I'm still working > > on figuring out why. I'm also surprised no one noticed this behavior > > before I did, but if the phy never goes into suspend you wouldn't. > > I think you should sort out the PHY suspending issue before we move > forward with this patch. I believe I found the issue, we are using this PHY with cadence macb as the MAC. The driver currently turns off the management port in macb_reset_hw, which we have stopped with a local change since our hardware typically has multiple phys on one mdio bus. That also prevents phy suspend from working correctly, since the bus goes down before the phy state machine can stop the phy. In our local patch, we have macb_reset_hw keep the mdio bus on if it's on already. Does that sound like an acceptable fix to you? -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Re: [PATCH v2] net/phy: micrel: Reenable interrupts during resume
On Fri, Jul 31, 2015 at 12:22:04AM -0700, David Miller wrote: From: Nathan Sullivan nathan.sulli...@ni.com Date: Thu, 30 Jul 2015 18:09:05 -0500 On Thu, Jul 30, 2015 at 10:00:34AM -0700, David Miller wrote: From: Nathan Sullivan nathan.sulli...@ni.com Date: Thu, 30 Jul 2015 10:15:48 -0500 Changes for V2: Actually make sure it compiles this time. If V1 didn't compile, even for you, then I have a big problem. And that problem is that you didn't test this change at all. Sorry about that, I have tested it against 3.14, which is why I had the older interrupt function in v1. On HEAD, the phy no longer suspends when ethernet goes down on our hardware - I'm still working on figuring out why. I'm also surprised no one noticed this behavior before I did, but if the phy never goes into suspend you wouldn't. I think you should sort out the PHY suspending issue before we move forward with this patch. I believe I found the issue, we are using this PHY with cadence macb as the MAC. The driver currently turns off the management port in macb_reset_hw, which we have stopped with a local change since our hardware typically has multiple phys on one mdio bus. That also prevents phy suspend from working correctly, since the bus goes down before the phy state machine can stop the phy. In our local patch, we have macb_reset_hw keep the mdio bus on if it's on already. Does that sound like an acceptable fix to you? -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Re: [PATCH v2] net/phy: micrel: Reenable interrupts during resume
On Thu, Jul 30, 2015 at 10:00:34AM -0700, David Miller wrote: > From: Nathan Sullivan > Date: Thu, 30 Jul 2015 10:15:48 -0500 > > > Changes for V2: Actually make sure it compiles this time. > > If V1 didn't compile, even for you, then I have a big problem. > > And that problem is that you didn't test this change at all. Sorry about that, I have tested it against 3.14, which is why I had the older interrupt function in v1. On HEAD, the phy no longer suspends when ethernet goes down on our hardware - I'm still working on figuring out why. I'm also surprised no one noticed this behavior before I did, but if the phy never goes into suspend you wouldn't. -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCH v2] net/phy: micrel: Reenable interrupts during resume
The ksz9031 has a behavior where it will clear the interrupt enable bits
when leaving power down. To work around this, make sure the interrupt
bits are in the state they are expected to be when resuming.
Signed-off-by: Nathan Sullivan
---
Changes for V2: Actually make sure it compiles this time.
---
drivers/net/phy/micrel.c | 18 +-
1 file changed, 17 insertions(+), 1 deletion(-)
diff --git a/drivers/net/phy/micrel.c b/drivers/net/phy/micrel.c
index 499185e..9774582 100644
--- a/drivers/net/phy/micrel.c
+++ b/drivers/net/phy/micrel.c
@@ -447,6 +447,22 @@ static int ksz9031_center_flp_timing(struct phy_device
*phydev)
return genphy_restart_aneg(phydev);
}
+static int ksz9031_resume(struct phy_device *phydev)
+{
+ int result;
+
+ result = genphy_resume(phydev);
+
+ if (result)
+ return result;
+
+ /* This phy will reset interrupt enables when leaving power down */
+ if (PHY_INTERRUPT_ENABLED & phydev->interrupts)
+ result = kszphy_config_intr(phydev);
+
+ return result;
+}
+
static int ksz9031_config_init(struct phy_device *phydev)
{
const struct device *dev = >dev;
@@ -776,7 +792,7 @@ static struct phy_driver ksphy_driver[] = {
.ack_interrupt = kszphy_ack_interrupt,
.config_intr= kszphy_config_intr,
.suspend= genphy_suspend,
- .resume = genphy_resume,
+ .resume = ksz9031_resume,
.driver = { .owner = THIS_MODULE, },
}, {
.phy_id = PHY_ID_KSZ8873MLL,
--
1.7.10.4
--
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[PATCH v2] net/phy: micrel: Reenable interrupts during resume
The ksz9031 has a behavior where it will clear the interrupt enable bits
when leaving power down. To work around this, make sure the interrupt
bits are in the state they are expected to be when resuming.
Signed-off-by: Nathan Sullivan nathan.sulli...@ni.com
---
Changes for V2: Actually make sure it compiles this time.
---
drivers/net/phy/micrel.c | 18 +-
1 file changed, 17 insertions(+), 1 deletion(-)
diff --git a/drivers/net/phy/micrel.c b/drivers/net/phy/micrel.c
index 499185e..9774582 100644
--- a/drivers/net/phy/micrel.c
+++ b/drivers/net/phy/micrel.c
@@ -447,6 +447,22 @@ static int ksz9031_center_flp_timing(struct phy_device
*phydev)
return genphy_restart_aneg(phydev);
}
+static int ksz9031_resume(struct phy_device *phydev)
+{
+ int result;
+
+ result = genphy_resume(phydev);
+
+ if (result)
+ return result;
+
+ /* This phy will reset interrupt enables when leaving power down */
+ if (PHY_INTERRUPT_ENABLED phydev-interrupts)
+ result = kszphy_config_intr(phydev);
+
+ return result;
+}
+
static int ksz9031_config_init(struct phy_device *phydev)
{
const struct device *dev = phydev-dev;
@@ -776,7 +792,7 @@ static struct phy_driver ksphy_driver[] = {
.ack_interrupt = kszphy_ack_interrupt,
.config_intr= kszphy_config_intr,
.suspend= genphy_suspend,
- .resume = genphy_resume,
+ .resume = ksz9031_resume,
.driver = { .owner = THIS_MODULE, },
}, {
.phy_id = PHY_ID_KSZ8873MLL,
--
1.7.10.4
--
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the body of a message to majord...@vger.kernel.org
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Please read the FAQ at http://www.tux.org/lkml/
Re: [PATCH v2] net/phy: micrel: Reenable interrupts during resume
On Thu, Jul 30, 2015 at 10:00:34AM -0700, David Miller wrote: From: Nathan Sullivan nathan.sulli...@ni.com Date: Thu, 30 Jul 2015 10:15:48 -0500 Changes for V2: Actually make sure it compiles this time. If V1 didn't compile, even for you, then I have a big problem. And that problem is that you didn't test this change at all. Sorry about that, I have tested it against 3.14, which is why I had the older interrupt function in v1. On HEAD, the phy no longer suspends when ethernet goes down on our hardware - I'm still working on figuring out why. I'm also surprised no one noticed this behavior before I did, but if the phy never goes into suspend you wouldn't. -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
