RE: [PATCH 04/10] remoteproc: imx_rproc: make syscon optional
> Subject: Re: [PATCH 04/10] remoteproc: imx_rproc: make syscon optional
>
> On Wed, Aug 19, 2020 at 12:51:27AM +0000, Peng Fan wrote:
> > > Subject: Re: [PATCH 04/10] remoteproc: imx_rproc: make syscon
> > > optional
> > >
> > > Hi Peng,
> > >
> > > On Fri, Jul 24, 2020 at 04:08:07PM +0800, Peng Fan wrote:
> > > > Make syscon optional, since i.MX8QM/QXP/7ULP not have SRC to
> > > > control
> > > M4.
> > > > But currently i.MX8QM/QXP/7ULP not added, so still check regmap
> > > > when start/stop to avoid unhappy things.
> > >
> > > On the i.MX8QM/QXP/7ULP processors, the remote processors are not
> > > handled by the remoteproc cores, as implemented in this patch. In
> > > such a scenario how does the remoteproc core know the remote
> > > processor has crashed and how does it recover from such a condition?
> >
> > For 7ULP dual boot case, A7 is under control of M4, so if m4 crash, I
> > suppose
> > A7 would not work properly.
>
> In that case I assume the whole system gets rebooted, which puts the A7 in a
> state where it can "attach" with the M4 again.
Yes. Whole system get rebooted.
>
> >
> > For 8QM/QXP partition case, M4 is in a standalone partition, if M4
> > crash or reboot, the system controller unit will restart M4 and notify
> > Acore that M4 restart.
>
> And how does that notification work exactly? Does rproc_report_crash() get
> called somewhere in that process in order for the remoteproc core to attach
> to the M4 again?
Yes. We registered a interrupt notification handler with system controller unit.
When M4 rebooted, the system controller will raise interrupt to A53 core.
Then the notification callback will be invoked, the callback will call
rproc_report_crash. I not included this part code in the patchset, since
this patchset is to add initial support for 8M case.
Thanks,
Peng.
>
> Many thanks for the help,
> Mathieu
>
> >
> > Thanks,
> > Peng.
> >
> > >
> > > Thanks,
> > > Mathieu
> > >
> > > >
> > > > Reviewed-by: Richard Zhu
> > > > Signed-off-by: Peng Fan
> > > > ---
> > > > drivers/remoteproc/imx_rproc.c | 11 +--
> > > > 1 file changed, 9 insertions(+), 2 deletions(-)
> > > >
> > > > diff --git a/drivers/remoteproc/imx_rproc.c
> > > > b/drivers/remoteproc/imx_rproc.c index 82594a800a1b..4fad5c0b1c05
> > > > 100644
> > > > --- a/drivers/remoteproc/imx_rproc.c
> > > > +++ b/drivers/remoteproc/imx_rproc.c
> > > > @@ -162,6 +162,9 @@ static int imx_rproc_start(struct rproc *rproc)
> > > > struct device *dev = priv->dev;
> > > > int ret;
> > > >
> > > > + if (!priv->regmap)
> > > > + return -EOPNOTSUPP;
> > > > +
> > > > ret = regmap_update_bits(priv->regmap, dcfg->src_reg,
> > > > dcfg->src_mask, dcfg->src_start);
> > > > if (ret)
> > > > @@ -177,6 +180,9 @@ static int imx_rproc_stop(struct rproc *rproc)
> > > > struct device *dev = priv->dev;
> > > > int ret;
> > > >
> > > > + if (!priv->regmap)
> > > > + return -EOPNOTSUPP;
> > > > +
> > > > ret = regmap_update_bits(priv->regmap, dcfg->src_reg,
> > > > dcfg->src_mask, dcfg->src_stop);
> > > > if (ret)
> > > > @@ -325,9 +331,10 @@ static int imx_rproc_probe(struct
> > > > platform_device
> > > *pdev)
> > > > regmap = syscon_regmap_lookup_by_phandle(np, "syscon");
> > > > if (IS_ERR(regmap)) {
> > > > dev_err(dev, "failed to find syscon\n");
> > > > - return PTR_ERR(regmap);
> > > > + regmap = NULL;
> > > > + } else {
> > > > + regmap_attach_dev(dev, regmap, );
> > > > }
> > > > - regmap_attach_dev(dev, regmap, );
> > > >
> > > > /* set some other name then imx */
> > > > rproc = rproc_alloc(dev, "imx-rproc", _rproc_ops,
> > > > --
> > > > 2.16.4
> > > >
RE: [PATCH 04/10] remoteproc: imx_rproc: make syscon optional
> Subject: Re: [PATCH 04/10] remoteproc: imx_rproc: make syscon optional
>
> Hi Peng,
>
> On Fri, Jul 24, 2020 at 04:08:07PM +0800, Peng Fan wrote:
> > Make syscon optional, since i.MX8QM/QXP/7ULP not have SRC to control
> M4.
> > But currently i.MX8QM/QXP/7ULP not added, so still check regmap when
> > start/stop to avoid unhappy things.
>
> On the i.MX8QM/QXP/7ULP processors, the remote processors are not
> handled by the remoteproc cores, as implemented in this patch. In such a
> scenario how does the remoteproc core know the remote processor has
> crashed and how does it recover from such a condition?
For 7ULP dual boot case, A7 is under control of M4, so if m4 crash, I suppose
A7 would not work properly.
For 8QM/QXP partition case, M4 is in a standalone partition, if M4 crash or
reboot, the system controller unit will restart M4 and notify Acore that M4
restart.
Thanks,
Peng.
>
> Thanks,
> Mathieu
>
> >
> > Reviewed-by: Richard Zhu
> > Signed-off-by: Peng Fan
> > ---
> > drivers/remoteproc/imx_rproc.c | 11 +--
> > 1 file changed, 9 insertions(+), 2 deletions(-)
> >
> > diff --git a/drivers/remoteproc/imx_rproc.c
> > b/drivers/remoteproc/imx_rproc.c index 82594a800a1b..4fad5c0b1c05
> > 100644
> > --- a/drivers/remoteproc/imx_rproc.c
> > +++ b/drivers/remoteproc/imx_rproc.c
> > @@ -162,6 +162,9 @@ static int imx_rproc_start(struct rproc *rproc)
> > struct device *dev = priv->dev;
> > int ret;
> >
> > + if (!priv->regmap)
> > + return -EOPNOTSUPP;
> > +
> > ret = regmap_update_bits(priv->regmap, dcfg->src_reg,
> > dcfg->src_mask, dcfg->src_start);
> > if (ret)
> > @@ -177,6 +180,9 @@ static int imx_rproc_stop(struct rproc *rproc)
> > struct device *dev = priv->dev;
> > int ret;
> >
> > + if (!priv->regmap)
> > + return -EOPNOTSUPP;
> > +
> > ret = regmap_update_bits(priv->regmap, dcfg->src_reg,
> > dcfg->src_mask, dcfg->src_stop);
> > if (ret)
> > @@ -325,9 +331,10 @@ static int imx_rproc_probe(struct platform_device
> *pdev)
> > regmap = syscon_regmap_lookup_by_phandle(np, "syscon");
> > if (IS_ERR(regmap)) {
> > dev_err(dev, "failed to find syscon\n");
> > - return PTR_ERR(regmap);
> > + regmap = NULL;
> > + } else {
> > + regmap_attach_dev(dev, regmap, );
> > }
> > - regmap_attach_dev(dev, regmap, );
> >
> > /* set some other name then imx */
> > rproc = rproc_alloc(dev, "imx-rproc", _rproc_ops,
> > --
> > 2.16.4
> >
[PATCH] perf bench numa: Remove dead code in parse_nodes_opt()
In the function parse_nodes_opt(), the statement "return 0;" is dead code, remove it. Signed-off-by: Peng Fan --- tools/perf/bench/numa.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/tools/perf/bench/numa.c b/tools/perf/bench/numa.c index 5797253..70c8c2c 100644 --- a/tools/perf/bench/numa.c +++ b/tools/perf/bench/numa.c @@ -729,8 +729,6 @@ static int parse_nodes_opt(const struct option *opt __maybe_unused, return -1; return parse_node_list(arg); - - return 0; } #define BIT(x) (1ul << x) -- 2.1.0
[PATCH 2/2] reset: imx7: add the cm4 reset for i.MX8MQ
From: Peng Fan
Add the cm4 reset used by the remoteproc driver
Signed-off-by: Peng Fan
---
drivers/reset/reset-imx7.c | 4
1 file changed, 4 insertions(+)
diff --git a/drivers/reset/reset-imx7.c b/drivers/reset/reset-imx7.c
index d170fe663210..87b6e2d46fb6 100644
--- a/drivers/reset/reset-imx7.c
+++ b/drivers/reset/reset-imx7.c
@@ -178,6 +178,9 @@ static const struct imx7_src_signal
imx8mq_src_signals[IMX8MQ_RESET_NUM] = {
[IMX8MQ_RESET_A53_SOC_DBG_RESET]= { SRC_A53RCR0, BIT(20) },
[IMX8MQ_RESET_A53_L2RESET] = { SRC_A53RCR0, BIT(21) },
[IMX8MQ_RESET_SW_NON_SCLR_M4C_RST] = { SRC_M4RCR, BIT(0) },
+ [IMX8MQ_RESET_SW_M4C_RST] = { SRC_M4RCR, BIT(1) },
+ [IMX8MQ_RESET_SW_M4P_RST] = { SRC_M4RCR, BIT(2) },
+ [IMX8MQ_RESET_M4_ENABLE]= { SRC_M4RCR, BIT(3) },
[IMX8MQ_RESET_OTG1_PHY_RESET] = { SRC_USBOPHY1_RCR, BIT(0) },
[IMX8MQ_RESET_OTG2_PHY_RESET] = { SRC_USBOPHY2_RCR, BIT(0) },
[IMX8MQ_RESET_MIPI_DSI_RESET_BYTE_N]= { SRC_MIPIPHY_RCR, BIT(1) },
@@ -238,6 +241,7 @@ static int imx8mq_reset_set(struct reset_controller_dev
*rcdev,
case IMX8MQ_RESET_MIPI_DSI_DPI_RESET_N: /* fallthrough */
case IMX8MQ_RESET_MIPI_DSI_RESET_N: /* fallthrough */
case IMX8MQ_RESET_MIPI_DSI_RESET_BYTE_N:/* fallthrough */
+ case IMX8MQ_RESET_M4_ENABLE:
value = assert ? 0 : bit;
break;
}
--
2.16.4
[PATCH 1/2] dt-bindings: reset: imx8mq: add m4 reset
From: Peng Fan Add the m4 reset used by the remoteproc driver Signed-off-by: Peng Fan --- include/dt-bindings/reset/imx8mq-reset.h | 5 - 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/include/dt-bindings/reset/imx8mq-reset.h b/include/dt-bindings/reset/imx8mq-reset.h index a5b570737582..705870693ec2 100644 --- a/include/dt-bindings/reset/imx8mq-reset.h +++ b/include/dt-bindings/reset/imx8mq-reset.h @@ -58,7 +58,10 @@ #define IMX8MQ_RESET_DDRC2_PRST47 /* i.MX8MM/i.MX8MN does NOT support */ #define IMX8MQ_RESET_DDRC2_CORE_RESET 48 /* i.MX8MM/i.MX8MN does NOT support */ #define IMX8MQ_RESET_DDRC2_PHY_RESET 49 /* i.MX8MM/i.MX8MN does NOT support */ +#define IMX8MQ_RESET_SW_M4C_RST50 +#define IMX8MQ_RESET_SW_M4P_RST51 +#define IMX8MQ_RESET_M4_ENABLE 52 -#define IMX8MQ_RESET_NUM 50 +#define IMX8MQ_RESET_NUM 53 #endif -- 2.16.4
RE: [PATCH] remoteproc: virtio: support sharing vdev buffer
Hi Mathieu,
> Subject: Re: [PATCH] remoteproc: virtio: support sharing vdev buffer
>
> Hi Peng,
>
> On Wed, Jul 22, 2020 at 09:15:43PM +0800, Peng Fan wrote:
> > Support sharing vdev buffer between multiple vdevs by using name
> > "vdevbuffer".
> >
> > Reviewed-by: Richard Zhu
> > Signed-off-by: Peng Fan
> > ---
> > drivers/remoteproc/remoteproc_virtio.c | 2 ++
> > 1 file changed, 2 insertions(+)
> >
> > diff --git a/drivers/remoteproc/remoteproc_virtio.c
> > b/drivers/remoteproc/remoteproc_virtio.c
> > index dfd3808c34fd..5d78ebea111e 100644
> > --- a/drivers/remoteproc/remoteproc_virtio.c
> > +++ b/drivers/remoteproc/remoteproc_virtio.c
> > @@ -343,6 +343,8 @@ int rproc_add_virtio_dev(struct rproc_vdev *rvdev,
> > int id)
> >
> > /* Try to find dedicated vdev buffer carveout */
> > mem = rproc_find_carveout_by_name(rproc, "vdev%dbuffer",
> > rvdev->index);
> > + if (!mem)
> > + mem = rproc_find_carveout_by_name(rproc, "vdevbuffer");
>
> We already have a way to share buffers [1], do you think it would work for
> you?
> I would rather proceed that way to avoid introducing a 3rd way to deal with
> vdev buffers.
That should work for me. I just need to move the vdevbuffer to the 1st one
inside the memory-region.
BTW: Do you have time to give a review for
https://patchwork.kernel.org/patch/11688751/
Thanks,
Peng.
>
> Thanks,
> Mathieu
>
> [1].
> https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Felixir.b
> ootlin.com%2Flinux%2Fv5.8-rc4%2Fsource%2Fdrivers%2Fremoteproc%2Frem
> oteproc_virtio.c%23L389data=02%7C01%7Cpeng.fan%40nxp.com%7C
> 760ae238005c49fe20db08d833e193ca%7C686ea1d3bc2b4c6fa92cd99c5c30
> 1635%7C0%7C0%7C637316391223184319sdata=UTN8YVaEynomrwFx
> 7aTCJ7fp0fjfIS8fscfGG67naKk%3Dreserved=0
>
> > if (mem) {
> > phys_addr_t pa;
> >
> > --
> > 2.16.4
> >
RE: [PATCH 1/2] clk: imx: imx8m: avoid memory leak
> Subject: Re: [PATCH 1/2] clk: imx: imx8m: avoid memory leak > > Quoting peng@nxp.com (2020-07-27 19:54:48) > > From: Peng Fan > > > > Use devm_kzalloc to avoid memory leak when probe fail. > > Please add () to functions in commit text. V2 is just out, please help review there. Thanks, Peng. > > > > > Signed-off-by: Peng Fan
RE: [PATCH 00/10] remoteproc: imx_rproc: support iMX8M and early boot
> Subject: Re: [PATCH 00/10] remoteproc: imx_rproc: support iMX8M and early > boot > > On Tue, Jul 28, 2020 at 07:50:04AM +0000, Peng Fan wrote: > > > Subject: Re: [PATCH 00/10] remoteproc: imx_rproc: support iMX8M and > > > early boot > > > > > > On Mon, Jul 27, 2020 at 09:18:31AM +, Peng Fan wrote: > > > > > Subject: Re: [PATCH 00/10] remoteproc: imx_rproc: support iMX8M > > > > > and early boot > > > > > > > > > > On Mon, Jul 27, 2020 at 06:44:32AM +, Peng Fan wrote: > > > > > > Hi Oleksij, > > > > > > > > > > > > > Subject: Re: [PATCH 00/10] remoteproc: imx_rproc: support > > > > > > > iMX8M and early boot > > > > > > > > > > > > > > Hi, > > > > > > > > > > > > > > On Fri, Jul 24, 2020 at 04:08:03PM +0800, Peng Fan wrote: > > > > > > > > This patchset is to support i.MX8MQ/M coproc booted before > linux. > > > > > > > > Since i.MX8MQ/M was not supported, several patches are > > > > > > > > needed to first support the platform, then support early boot > case. > > > > > > > > > > > > > > > > I intended to included i.MX8QM/QXP, but that would > > > > > > > > introduce a large patchset, so not included. But the > > > > > > > > clk/syscon optional patch for i.MX8QM/QXP was still kept here to > avoid rebase error. > > > > > > > > > > > > > > Thank you for your work. > > > > > > > > > > > > > > Can you please provide more information about big picture of > > > > > > > this > > > work. > > > > > > > > > > > > > > If I see it correctly, we have here support for i.MX8MM, > > > > > > > which seems to be able to fully control Cortex M4 (enable CPU > core, etc...). > > > > > > > > > > > > Yes. > > > > > > > > > > In this case, I would recommend to mainline the i.MX8MM part > > > > > first/separately. > > > > > > > > Only the last patch is to support earlyboot, all others is imx8mm part. > > > > > > ok > > > > > > > > > > > > > > > > > > > > > > And other case, where remoteproc is running on application > > > > > > > processor and can't or should not touch M4 (i.MX7ULP, > > > > > > > i.MX8QM/QXP..). Since M4 provides some functionality, you > > > > > > > are trying to reuse remoteproc framework to get resource > > > > > > > table present in ELF header and to dynamically load things. > > > > > > > For some reasons this header provides more information then > > > > > > > needed, so you are changing the ELF parser in the kernel > > > > > to workaround it. > > > > > > > > > > > > Not exactly. > > > > > > > > > > > > For i.MX8MM, we support two cases. M4 kicked by U-Boot, M4 > > > > > > kicked by > > > > > Linux remoteproc. > > > > > > For i.MX8QM/QXP, the typical usecase is M4 kicked by SCFW, but > > > > > > we will also add M4 kicked by Linux remoteproc. > > > > > > For i.MX7ULP, I would only support M4 dual boot case, M4 > > > > > > control > > > > > everything. > > > > > > > > > > From current state of discussion, i'm not sure what role plays > > > > > remoteproc in the scenario where M4 is started before linux. > > > > > Especially if we are not using resource table. > > > > > > > > We are using resource table from an address, not in elf file. > > > > This is the new feature in Linux-next to support coproc booted early. > > > > > > > > > > > > > > > The reason the change the elf parser is that when M4 elf is > > > > > > loaded by Linux remoteproc, It use memset to clear area. > > > > > > > > > > The use of memset, depends on ELF format. Fix/change the linker > > > > > script on your firmware and memset will be never called. > > > > > > > > > > > However we use ioremap, memset on ARM64 will report crash to > > > > > > device nGnRE
[PATCH 2/2] remoteproc: imx_rproc: add elf memory hooks
From: Peng Fan
Please not apply 2/2 for now, this 2/2 has not gone through
test on all i.MX8 platforms.
Signed-off-by: Peng Fan
---
drivers/remoteproc/imx_rproc.c | 13 +
1 file changed, 13 insertions(+)
diff --git a/drivers/remoteproc/imx_rproc.c b/drivers/remoteproc/imx_rproc.c
index 8957ed271d20..8ad860c65256 100644
--- a/drivers/remoteproc/imx_rproc.c
+++ b/drivers/remoteproc/imx_rproc.c
@@ -6,6 +6,7 @@
#include
#include
#include
+#include
#include
#include
#include
@@ -241,10 +242,22 @@ static void *imx_rproc_da_to_va(struct rproc *rproc, u64
da, size_t len)
return va;
}
+static void *imx_rproc_memcpy(struct rproc *rproc, void *dest, const void
*src, size_t count)
+{
+ memcpy_toio((void * __iomem)dest, src, count);
+}
+
+static void *imx_rproc_memset(struct rproc *rproc, void *s, int c, size_t
count)
+{
+ memset_io((void * __iomem)s, c, count);
+}
+
static const struct rproc_ops imx_rproc_ops = {
.start = imx_rproc_start,
.stop = imx_rproc_stop,
.da_to_va = imx_rproc_da_to_va,
+ .memset = imx_rproc_memset,
+ .memcpy = imx_rproc_memcpy,
};
static int imx_rproc_addr_init(struct imx_rproc *priv,
--
2.16.4
[PATCH 1/2] remoteproc: elf: support platform specific memory hook
From: Peng Fan
To arm64, "dc zva, dst" is used in memset.
Per ARM DDI 0487A.j, chapter C5.3.8 DC ZVA, Data Cache Zero by VA,
"If the memory region being zeroed is any type of Device memory,
this instruction can give an alignment fault which is prioritized
in the same way as other alignment faults that are determined
by the memory type."
On i.MX platforms, when elf is loaded to onchip TCM area, the region
is ioremapped, so "dc zva, dst" will trigger abort. And ioremap_wc()
on i.MX not able to write correct data to TCM area.
So we need to use io helpers, and extend the elf loader to support
platform specific memory functions.
Signed-off-by: Peng Fan
---
drivers/remoteproc/remoteproc_elf_loader.c | 20 ++--
include/linux/remoteproc.h | 2 ++
2 files changed, 20 insertions(+), 2 deletions(-)
diff --git a/drivers/remoteproc/remoteproc_elf_loader.c
b/drivers/remoteproc/remoteproc_elf_loader.c
index df68d87752e4..f442bac64432 100644
--- a/drivers/remoteproc/remoteproc_elf_loader.c
+++ b/drivers/remoteproc/remoteproc_elf_loader.c
@@ -129,6 +129,22 @@ u64 rproc_elf_get_boot_addr(struct rproc *rproc, const
struct firmware *fw)
}
EXPORT_SYMBOL(rproc_elf_get_boot_addr);
+static void *rproc_elf_memcpy(struct rproc *rproc, void *dest, const void
*src, size_t count)
+{
+ if (!rproc->ops->memcpy)
+ return memcpy(dest, src, count);
+
+ return rproc->ops->memcpy(rproc, dest, src, count);
+}
+
+static void *rproc_elf_memset(struct rproc *rproc, void *s, int c, size_t
count)
+{
+ if (!rproc->ops->memset)
+ return memset(s, c, count);
+
+ return rproc->ops->memset(rproc, s, c, count);
+}
+
/**
* rproc_elf_load_segments() - load firmware segments to memory
* @rproc: remote processor which will be booted using these fw segments
@@ -214,7 +230,7 @@ int rproc_elf_load_segments(struct rproc *rproc, const
struct firmware *fw)
/* put the segment where the remote processor expects it */
if (filesz)
- memcpy(ptr, elf_data + offset, filesz);
+ rproc_elf_memcpy(rproc, ptr, elf_data + offset, filesz);
/*
* Zero out remaining memory for this segment.
@@ -224,7 +240,7 @@ int rproc_elf_load_segments(struct rproc *rproc, const
struct firmware *fw)
* this.
*/
if (memsz > filesz)
- memset(ptr + filesz, 0, memsz - filesz);
+ rproc_elf_memset(rproc, ptr + filesz, 0, memsz -
filesz);
}
return ret;
diff --git a/include/linux/remoteproc.h b/include/linux/remoteproc.h
index 0e8d2ff575b4..88fc9643c1a8 100644
--- a/include/linux/remoteproc.h
+++ b/include/linux/remoteproc.h
@@ -391,6 +391,8 @@ struct rproc_ops {
int (*load)(struct rproc *rproc, const struct firmware *fw);
int (*sanity_check)(struct rproc *rproc, const struct firmware *fw);
u64 (*get_boot_addr)(struct rproc *rproc, const struct firmware *fw);
+ void *(*memcpy)(struct rproc *rproc, void *dest, const void *src,
size_t count);
+ void *(*memset)(struct rproc *rproc, void *s, int c, size_t count);
unsigned long (*panic)(struct rproc *rproc);
};
--
2.16.4
[PATCH 1/2] remoteproc: elf: support platform specific memory hook
From: Peng Fan
To arm64, "dc zva, dst" is used in memset.
Per ARM DDI 0487A.j, chapter C5.3.8 DC ZVA, Data Cache Zero by VA,
"If the memory region being zeroed is any type of Device memory,
this instruction can give an alignment fault which is prioritized
in the same way as other alignment faults that are determined
by the memory type."
On i.MX platforms, when elf is loaded to onchip TCM area, the region
is ioremapped, so "dc zva, dst" will trigger abort. And ioremap_wc()
on i.MX not able to write correct data to TCM area.
So we need to use io helpers, and extend the elf loader to support
platform specific memory functions.
Signed-off-by: Peng Fan
---
drivers/remoteproc/remoteproc_elf_loader.c | 20 ++--
include/linux/remoteproc.h | 2 ++
2 files changed, 20 insertions(+), 2 deletions(-)
diff --git a/drivers/remoteproc/remoteproc_elf_loader.c
b/drivers/remoteproc/remoteproc_elf_loader.c
index df68d87752e4..f442bac64432 100644
--- a/drivers/remoteproc/remoteproc_elf_loader.c
+++ b/drivers/remoteproc/remoteproc_elf_loader.c
@@ -129,6 +129,22 @@ u64 rproc_elf_get_boot_addr(struct rproc *rproc, const
struct firmware *fw)
}
EXPORT_SYMBOL(rproc_elf_get_boot_addr);
+static void *rproc_elf_memcpy(struct rproc *rproc, void *dest, const void
*src, size_t count)
+{
+ if (!rproc->ops->memcpy)
+ return memcpy(dest, src, count);
+
+ return rproc->ops->memcpy(rproc, dest, src, count);
+}
+
+static void *rproc_elf_memset(struct rproc *rproc, void *s, int c, size_t
count)
+{
+ if (!rproc->ops->memset)
+ return memset(s, c, count);
+
+ return rproc->ops->memset(rproc, s, c, count);
+}
+
/**
* rproc_elf_load_segments() - load firmware segments to memory
* @rproc: remote processor which will be booted using these fw segments
@@ -214,7 +230,7 @@ int rproc_elf_load_segments(struct rproc *rproc, const
struct firmware *fw)
/* put the segment where the remote processor expects it */
if (filesz)
- memcpy(ptr, elf_data + offset, filesz);
+ rproc_elf_memcpy(rproc, ptr, elf_data + offset, filesz);
/*
* Zero out remaining memory for this segment.
@@ -224,7 +240,7 @@ int rproc_elf_load_segments(struct rproc *rproc, const
struct firmware *fw)
* this.
*/
if (memsz > filesz)
- memset(ptr + filesz, 0, memsz - filesz);
+ rproc_elf_memset(rproc, ptr + filesz, 0, memsz -
filesz);
}
return ret;
diff --git a/include/linux/remoteproc.h b/include/linux/remoteproc.h
index 0e8d2ff575b4..88fc9643c1a8 100644
--- a/include/linux/remoteproc.h
+++ b/include/linux/remoteproc.h
@@ -391,6 +391,8 @@ struct rproc_ops {
int (*load)(struct rproc *rproc, const struct firmware *fw);
int (*sanity_check)(struct rproc *rproc, const struct firmware *fw);
u64 (*get_boot_addr)(struct rproc *rproc, const struct firmware *fw);
+ void *(*memcpy)(struct rproc *rproc, void *dest, const void *src,
size_t count);
+ void *(*memset)(struct rproc *rproc, void *s, int c, size_t count);
unsigned long (*panic)(struct rproc *rproc);
};
--
2.16.4
[PATCH 2/2] remoteproc: imx_rproc: add elf memory hooks
From: Peng Fan
Please not apply 2/2 for now, this 2/2 has not gone through
test on all i.MX8 platforms.
Signed-off-by: Peng Fan
---
drivers/remoteproc/imx_rproc.c | 13 +
1 file changed, 13 insertions(+)
diff --git a/drivers/remoteproc/imx_rproc.c b/drivers/remoteproc/imx_rproc.c
index 8957ed271d20..8ad860c65256 100644
--- a/drivers/remoteproc/imx_rproc.c
+++ b/drivers/remoteproc/imx_rproc.c
@@ -6,6 +6,7 @@
#include
#include
#include
+#include
#include
#include
#include
@@ -241,10 +242,22 @@ static void *imx_rproc_da_to_va(struct rproc *rproc, u64
da, size_t len)
return va;
}
+static void *imx_rproc_memcpy(struct rproc *rproc, void *dest, const void
*src, size_t count)
+{
+ memcpy_toio((void * __iomem)dest, src, count);
+}
+
+static void *imx_rproc_memset(struct rproc *rproc, void *s, int c, size_t
count)
+{
+ memset_io((void * __iomem)s, c, count);
+}
+
static const struct rproc_ops imx_rproc_ops = {
.start = imx_rproc_start,
.stop = imx_rproc_stop,
.da_to_va = imx_rproc_da_to_va,
+ .memset = imx_rproc_memset,
+ .memcpy = imx_rproc_memcpy,
};
static int imx_rproc_addr_init(struct imx_rproc *priv,
--
2.16.4
[PATCH v2 2/2] clk: imx: imx8m: use devm_of_clk_add_hw_provider()
From: Peng Fan
Use devm_of_clk_add_hw_provider() to simplify code.
To i.MX8MP, also add err handling.
Signed-off-by: Peng Fan
---
V2:
Add () to functions in commit log
drivers/clk/imx/clk-imx8mm.c | 9 ++---
drivers/clk/imx/clk-imx8mn.c | 9 ++---
drivers/clk/imx/clk-imx8mp.c | 8 ++--
drivers/clk/imx/clk-imx8mq.c | 9 ++---
4 files changed, 12 insertions(+), 23 deletions(-)
diff --git a/drivers/clk/imx/clk-imx8mm.c b/drivers/clk/imx/clk-imx8mm.c
index b43dbe305e7a..fc2c1a0c9ff2 100644
--- a/drivers/clk/imx/clk-imx8mm.c
+++ b/drivers/clk/imx/clk-imx8mm.c
@@ -615,10 +615,10 @@ static int imx8mm_clocks_probe(struct platform_device
*pdev)
imx_check_clk_hws(hws, IMX8MM_CLK_END);
- ret = of_clk_add_hw_provider(np, of_clk_hw_onecell_get, clk_hw_data);
+ ret = devm_of_clk_add_hw_provider(dev, of_clk_hw_onecell_get,
clk_hw_data);
if (ret < 0) {
dev_err(dev, "failed to register clks for i.MX8MM\n");
- goto unregister_hws;
+ return ret;
}
for (i = 0; i < ARRAY_SIZE(uart_clk_ids); i++) {
@@ -630,11 +630,6 @@ static int imx8mm_clocks_probe(struct platform_device
*pdev)
imx_register_uart_clocks(uart_hws);
return 0;
-
-unregister_hws:
- imx_unregister_hw_clocks(hws, IMX8MM_CLK_END);
-
- return ret;
}
static const struct of_device_id imx8mm_clk_of_match[] = {
diff --git a/drivers/clk/imx/clk-imx8mn.c b/drivers/clk/imx/clk-imx8mn.c
index 4189f7f6980e..3620a419eb83 100644
--- a/drivers/clk/imx/clk-imx8mn.c
+++ b/drivers/clk/imx/clk-imx8mn.c
@@ -562,10 +562,10 @@ static int imx8mn_clocks_probe(struct platform_device
*pdev)
imx_check_clk_hws(hws, IMX8MN_CLK_END);
- ret = of_clk_add_hw_provider(np, of_clk_hw_onecell_get, clk_hw_data);
+ ret = devm_of_clk_add_hw_provider(dev, of_clk_hw_onecell_get,
clk_hw_data);
if (ret < 0) {
dev_err(dev, "failed to register hws for i.MX8MN\n");
- goto unregister_hws;
+ return ret;
}
for (i = 0; i < ARRAY_SIZE(uart_clk_ids); i++) {
@@ -577,11 +577,6 @@ static int imx8mn_clocks_probe(struct platform_device
*pdev)
imx_register_uart_clocks(uart_hws);
return 0;
-
-unregister_hws:
- imx_unregister_hw_clocks(hws, IMX8MN_CLK_END);
-
- return ret;
}
static const struct of_device_id imx8mn_clk_of_match[] = {
diff --git a/drivers/clk/imx/clk-imx8mp.c b/drivers/clk/imx/clk-imx8mp.c
index f6ec7b2b8038..43117f387460 100644
--- a/drivers/clk/imx/clk-imx8mp.c
+++ b/drivers/clk/imx/clk-imx8mp.c
@@ -432,7 +432,7 @@ static int imx8mp_clocks_probe(struct platform_device *pdev)
struct device *dev = >dev;
struct device_node *np = dev->of_node;
void __iomem *anatop_base, *ccm_base;
- int i;
+ int ret, i;
np = of_find_compatible_node(NULL, NULL, "fsl,imx8mp-anatop");
anatop_base = of_iomap(np, 0);
@@ -741,7 +741,11 @@ static int imx8mp_clocks_probe(struct platform_device
*pdev)
imx_check_clk_hws(hws, IMX8MP_CLK_END);
- of_clk_add_hw_provider(np, of_clk_hw_onecell_get, clk_hw_data);
+ ret = devm_of_clk_add_hw_provider(dev, of_clk_hw_onecell_get,
clk_hw_data);
+ if (ret < 0) {
+ dev_err(dev, "failed to register hws for i.MX8MN\n");
+ return ret;
+ }
for (i = 0; i < ARRAY_SIZE(uart_clk_ids); i++) {
int index = uart_clk_ids[i];
diff --git a/drivers/clk/imx/clk-imx8mq.c b/drivers/clk/imx/clk-imx8mq.c
index 0106a33c24a4..7c0a84cc9501 100644
--- a/drivers/clk/imx/clk-imx8mq.c
+++ b/drivers/clk/imx/clk-imx8mq.c
@@ -600,10 +600,10 @@ static int imx8mq_clocks_probe(struct platform_device
*pdev)
imx_check_clk_hws(hws, IMX8MQ_CLK_END);
- err = of_clk_add_hw_provider(np, of_clk_hw_onecell_get, clk_hw_data);
+ err = devm_of_clk_add_hw_provider(dev, of_clk_hw_onecell_get,
clk_hw_data);
if (err < 0) {
dev_err(dev, "failed to register hws for i.MX8MQ\n");
- goto unregister_hws;
+ return err;
}
for (i = 0; i < ARRAY_SIZE(uart_clk_ids); i++) {
@@ -615,11 +615,6 @@ static int imx8mq_clocks_probe(struct platform_device
*pdev)
imx_register_uart_clocks(uart_hws);
return 0;
-
-unregister_hws:
- imx_unregister_hw_clocks(hws, IMX8MQ_CLK_END);
-
- return err;
}
static const struct of_device_id imx8mq_clk_of_match[] = {
--
2.16.4
[PATCH v2 1/2] clk: imx: imx8m: avoid memory leak
From: Peng Fan
Use devm_kzalloc() to avoid memory leak when probe fail.
Signed-off-by: Peng Fan
---
V2:
Add () to functions in commit log
drivers/clk/imx/clk-imx8mm.c | 3 +--
drivers/clk/imx/clk-imx8mn.c | 15 +--
drivers/clk/imx/clk-imx8mp.c | 2 +-
drivers/clk/imx/clk-imx8mq.c | 3 +--
4 files changed, 8 insertions(+), 15 deletions(-)
diff --git a/drivers/clk/imx/clk-imx8mm.c b/drivers/clk/imx/clk-imx8mm.c
index b793264c21c6..b43dbe305e7a 100644
--- a/drivers/clk/imx/clk-imx8mm.c
+++ b/drivers/clk/imx/clk-imx8mm.c
@@ -306,8 +306,7 @@ static int imx8mm_clocks_probe(struct platform_device *pdev)
void __iomem *base;
int ret, i;
- clk_hw_data = kzalloc(struct_size(clk_hw_data, hws,
- IMX8MM_CLK_END), GFP_KERNEL);
+ clk_hw_data = devm_kzalloc(dev, struct_size(clk_hw_data, hws,
IMX8MM_CLK_END), GFP_KERNEL);
if (WARN_ON(!clk_hw_data))
return -ENOMEM;
diff --git a/drivers/clk/imx/clk-imx8mn.c b/drivers/clk/imx/clk-imx8mn.c
index 213cc37b3173..4189f7f6980e 100644
--- a/drivers/clk/imx/clk-imx8mn.c
+++ b/drivers/clk/imx/clk-imx8mn.c
@@ -299,8 +299,7 @@ static int imx8mn_clocks_probe(struct platform_device *pdev)
void __iomem *base;
int ret, i;
- clk_hw_data = kzalloc(struct_size(clk_hw_data, hws,
- IMX8MN_CLK_END), GFP_KERNEL);
+ clk_hw_data = devm_kzalloc(dev, struct_size(clk_hw_data, hws,
IMX8MN_CLK_END), GFP_KERNEL);
if (WARN_ON(!clk_hw_data))
return -ENOMEM;
@@ -318,10 +317,8 @@ static int imx8mn_clocks_probe(struct platform_device
*pdev)
np = of_find_compatible_node(NULL, NULL, "fsl,imx8mn-anatop");
base = of_iomap(np, 0);
of_node_put(np);
- if (WARN_ON(!base)) {
- ret = -ENOMEM;
- goto unregister_hws;
- }
+ if (WARN_ON(!base))
+ return -ENOMEM;
hws[IMX8MN_AUDIO_PLL1_REF_SEL] = imx_clk_hw_mux("audio_pll1_ref_sel",
base + 0x0, 0, 2, pll_ref_sels, ARRAY_SIZE(pll_ref_sels));
hws[IMX8MN_AUDIO_PLL2_REF_SEL] = imx_clk_hw_mux("audio_pll2_ref_sel",
base + 0x14, 0, 2, pll_ref_sels, ARRAY_SIZE(pll_ref_sels));
@@ -407,10 +404,8 @@ static int imx8mn_clocks_probe(struct platform_device
*pdev)
np = dev->of_node;
base = devm_platform_ioremap_resource(pdev, 0);
- if (WARN_ON(IS_ERR(base))) {
- ret = PTR_ERR(base);
- goto unregister_hws;
- }
+ if (WARN_ON(IS_ERR(base)))
+ return PTR_ERR(base);
/* CORE */
hws[IMX8MN_CLK_A53_DIV] = imx8m_clk_hw_composite_core("arm_a53_div",
imx8mn_a53_sels, base + 0x8000);
diff --git a/drivers/clk/imx/clk-imx8mp.c b/drivers/clk/imx/clk-imx8mp.c
index ca747712400f..f6ec7b2b8038 100644
--- a/drivers/clk/imx/clk-imx8mp.c
+++ b/drivers/clk/imx/clk-imx8mp.c
@@ -447,7 +447,7 @@ static int imx8mp_clocks_probe(struct platform_device *pdev)
return PTR_ERR(ccm_base);
}
- clk_hw_data = kzalloc(struct_size(clk_hw_data, hws, IMX8MP_CLK_END),
GFP_KERNEL);
+ clk_hw_data = devm_kzalloc(dev, struct_size(clk_hw_data, hws,
IMX8MP_CLK_END), GFP_KERNEL);
if (WARN_ON(!clk_hw_data)) {
iounmap(anatop_base);
return -ENOMEM;
diff --git a/drivers/clk/imx/clk-imx8mq.c b/drivers/clk/imx/clk-imx8mq.c
index a64aace213c2..0106a33c24a4 100644
--- a/drivers/clk/imx/clk-imx8mq.c
+++ b/drivers/clk/imx/clk-imx8mq.c
@@ -288,8 +288,7 @@ static int imx8mq_clocks_probe(struct platform_device *pdev)
void __iomem *base;
int err, i;
- clk_hw_data = kzalloc(struct_size(clk_hw_data, hws,
- IMX8MQ_CLK_END), GFP_KERNEL);
+ clk_hw_data = devm_kzalloc(dev, struct_size(clk_hw_data, hws,
IMX8MQ_CLK_END), GFP_KERNEL);
if (WARN_ON(!clk_hw_data))
return -ENOMEM;
--
2.16.4
[PATCH] ARM: imx_v6_v7_defconfig: Support i.MX8MN/P/Q
From: Peng Fan i.MX8MN/P/Q is built with AArch64 hardware, this is to support it could run in AArch32 mode with clock and pinctrl driver enabled. Signed-off-by: Peng Fan --- arch/arm/configs/imx_v6_v7_defconfig | 6 ++ 1 file changed, 6 insertions(+) diff --git a/arch/arm/configs/imx_v6_v7_defconfig b/arch/arm/configs/imx_v6_v7_defconfig index 82d3ffb18e70..fbd02365e3b6 100644 --- a/arch/arm/configs/imx_v6_v7_defconfig +++ b/arch/arm/configs/imx_v6_v7_defconfig @@ -218,6 +218,9 @@ CONFIG_SPI_GPIO=y CONFIG_SPI_IMX=y CONFIG_SPI_FSL_DSPI=y CONFIG_PINCTRL_IMX8MM=y +CONFIG_PINCTRL_IMX8MN=y +CONFIG_PINCTRL_IMX8MP=y +CONFIG_PINCTRL_IMX8MQ=y CONFIG_GPIO_SYSFS=y CONFIG_GPIO_SIOX=m CONFIG_GPIO_MAX732X=y @@ -407,6 +410,9 @@ CONFIG_STAGING_MEDIA=y CONFIG_VIDEO_IMX_MEDIA=y CONFIG_COMMON_CLK_PWM=y CONFIG_CLK_IMX8MM=y +CONFIG_CLK_IMX8MN=y +CONFIG_CLK_IMX8MP=y +CONFIG_CLK_IMX8MQ=y CONFIG_SOC_IMX8M=y CONFIG_IIO=y CONFIG_MMA8452=y -- 2.16.4
RE: [PATCH 00/10] remoteproc: imx_rproc: support iMX8M and early boot
> Subject: Re: [PATCH 00/10] remoteproc: imx_rproc: support iMX8M and early > boot > > On Mon, Jul 27, 2020 at 09:18:31AM +0000, Peng Fan wrote: > > > Subject: Re: [PATCH 00/10] remoteproc: imx_rproc: support iMX8M and > > > early boot > > > > > > On Mon, Jul 27, 2020 at 06:44:32AM +, Peng Fan wrote: > > > > Hi Oleksij, > > > > > > > > > Subject: Re: [PATCH 00/10] remoteproc: imx_rproc: support iMX8M > > > > > and early boot > > > > > > > > > > Hi, > > > > > > > > > > On Fri, Jul 24, 2020 at 04:08:03PM +0800, Peng Fan wrote: > > > > > > This patchset is to support i.MX8MQ/M coproc booted before linux. > > > > > > Since i.MX8MQ/M was not supported, several patches are needed > > > > > > to first support the platform, then support early boot case. > > > > > > > > > > > > I intended to included i.MX8QM/QXP, but that would introduce a > > > > > > large patchset, so not included. But the clk/syscon optional > > > > > > patch for i.MX8QM/QXP was still kept here to avoid rebase error. > > > > > > > > > > Thank you for your work. > > > > > > > > > > Can you please provide more information about big picture of this > work. > > > > > > > > > > If I see it correctly, we have here support for i.MX8MM, which > > > > > seems to be able to fully control Cortex M4 (enable CPU core, etc...). > > > > > > > > Yes. > > > > > > In this case, I would recommend to mainline the i.MX8MM part > > > first/separately. > > > > Only the last patch is to support earlyboot, all others is imx8mm part. > > ok > > > > > > > > > > > > > > And other case, where remoteproc is running on application > > > > > processor and can't or should not touch M4 (i.MX7ULP, > > > > > i.MX8QM/QXP..). Since M4 provides some functionality, you are > > > > > trying to reuse remoteproc framework to get resource table > > > > > present in ELF header and to dynamically load things. For some > > > > > reasons this header provides more information then needed, so > > > > > you are changing the ELF parser in the kernel > > > to workaround it. > > > > > > > > Not exactly. > > > > > > > > For i.MX8MM, we support two cases. M4 kicked by U-Boot, M4 kicked > > > > by > > > Linux remoteproc. > > > > For i.MX8QM/QXP, the typical usecase is M4 kicked by SCFW, but we > > > > will also add M4 kicked by Linux remoteproc. > > > > For i.MX7ULP, I would only support M4 dual boot case, M4 control > > > everything. > > > > > > From current state of discussion, i'm not sure what role plays > > > remoteproc in the scenario where M4 is started before linux. > > > Especially if we are not using resource table. > > > > We are using resource table from an address, not in elf file. > > This is the new feature in Linux-next to support coproc booted early. > > > > > > > > > The reason the change the elf parser is that when M4 elf is loaded > > > > by Linux remoteproc, It use memset to clear area. > > > > > > The use of memset, depends on ELF format. Fix/change the linker > > > script on your firmware and memset will be never called. > > > > > > > However we use ioremap, memset on ARM64 will report crash to > > > > device nGnRE memory. And we could not use ioremap_wc to TCM area, > > > > since it could have data correctly written into TCM. > > > > > > I have strong feeling, that we are talking about badly or not > > > properly formatted ELF binary. I would prefer to double check it, > > > before we will apply fixes on wrong place. > > > > > > > Maintainer not wanna to drop memset in common code, and TI guys > > > > suggest add i.MX specific elf stuff. So I add elf handler in i.MX code. > > > > > > I think, removing memset may damage current users of imx_rproc driver. > > > Since, like I said: the use of memset depends on ELF format. > > > > In my elf file, the last PT_LOAD contains data/bss/heap/stack. I'll > > check with our MCU guys, we only need the specific data loaded. > > > > Elf file type is EXEC (Executable file) Entry point 0x1ffe0355 There > > are 3 program headers, starting a
[PATCH 1/2] clk: imx: imx8m: avoid memory leak
From: Peng Fan
Use devm_kzalloc to avoid memory leak when probe fail.
Signed-off-by: Peng Fan
---
drivers/clk/imx/clk-imx8mm.c | 3 +--
drivers/clk/imx/clk-imx8mn.c | 15 +--
drivers/clk/imx/clk-imx8mp.c | 2 +-
drivers/clk/imx/clk-imx8mq.c | 3 +--
4 files changed, 8 insertions(+), 15 deletions(-)
diff --git a/drivers/clk/imx/clk-imx8mm.c b/drivers/clk/imx/clk-imx8mm.c
index b793264c21c6..b43dbe305e7a 100644
--- a/drivers/clk/imx/clk-imx8mm.c
+++ b/drivers/clk/imx/clk-imx8mm.c
@@ -306,8 +306,7 @@ static int imx8mm_clocks_probe(struct platform_device *pdev)
void __iomem *base;
int ret, i;
- clk_hw_data = kzalloc(struct_size(clk_hw_data, hws,
- IMX8MM_CLK_END), GFP_KERNEL);
+ clk_hw_data = devm_kzalloc(dev, struct_size(clk_hw_data, hws,
IMX8MM_CLK_END), GFP_KERNEL);
if (WARN_ON(!clk_hw_data))
return -ENOMEM;
diff --git a/drivers/clk/imx/clk-imx8mn.c b/drivers/clk/imx/clk-imx8mn.c
index 213cc37b3173..4189f7f6980e 100644
--- a/drivers/clk/imx/clk-imx8mn.c
+++ b/drivers/clk/imx/clk-imx8mn.c
@@ -299,8 +299,7 @@ static int imx8mn_clocks_probe(struct platform_device *pdev)
void __iomem *base;
int ret, i;
- clk_hw_data = kzalloc(struct_size(clk_hw_data, hws,
- IMX8MN_CLK_END), GFP_KERNEL);
+ clk_hw_data = devm_kzalloc(dev, struct_size(clk_hw_data, hws,
IMX8MN_CLK_END), GFP_KERNEL);
if (WARN_ON(!clk_hw_data))
return -ENOMEM;
@@ -318,10 +317,8 @@ static int imx8mn_clocks_probe(struct platform_device
*pdev)
np = of_find_compatible_node(NULL, NULL, "fsl,imx8mn-anatop");
base = of_iomap(np, 0);
of_node_put(np);
- if (WARN_ON(!base)) {
- ret = -ENOMEM;
- goto unregister_hws;
- }
+ if (WARN_ON(!base))
+ return -ENOMEM;
hws[IMX8MN_AUDIO_PLL1_REF_SEL] = imx_clk_hw_mux("audio_pll1_ref_sel",
base + 0x0, 0, 2, pll_ref_sels, ARRAY_SIZE(pll_ref_sels));
hws[IMX8MN_AUDIO_PLL2_REF_SEL] = imx_clk_hw_mux("audio_pll2_ref_sel",
base + 0x14, 0, 2, pll_ref_sels, ARRAY_SIZE(pll_ref_sels));
@@ -407,10 +404,8 @@ static int imx8mn_clocks_probe(struct platform_device
*pdev)
np = dev->of_node;
base = devm_platform_ioremap_resource(pdev, 0);
- if (WARN_ON(IS_ERR(base))) {
- ret = PTR_ERR(base);
- goto unregister_hws;
- }
+ if (WARN_ON(IS_ERR(base)))
+ return PTR_ERR(base);
/* CORE */
hws[IMX8MN_CLK_A53_DIV] = imx8m_clk_hw_composite_core("arm_a53_div",
imx8mn_a53_sels, base + 0x8000);
diff --git a/drivers/clk/imx/clk-imx8mp.c b/drivers/clk/imx/clk-imx8mp.c
index ca747712400f..f6ec7b2b8038 100644
--- a/drivers/clk/imx/clk-imx8mp.c
+++ b/drivers/clk/imx/clk-imx8mp.c
@@ -447,7 +447,7 @@ static int imx8mp_clocks_probe(struct platform_device *pdev)
return PTR_ERR(ccm_base);
}
- clk_hw_data = kzalloc(struct_size(clk_hw_data, hws, IMX8MP_CLK_END),
GFP_KERNEL);
+ clk_hw_data = devm_kzalloc(dev, struct_size(clk_hw_data, hws,
IMX8MP_CLK_END), GFP_KERNEL);
if (WARN_ON(!clk_hw_data)) {
iounmap(anatop_base);
return -ENOMEM;
diff --git a/drivers/clk/imx/clk-imx8mq.c b/drivers/clk/imx/clk-imx8mq.c
index a64aace213c2..0106a33c24a4 100644
--- a/drivers/clk/imx/clk-imx8mq.c
+++ b/drivers/clk/imx/clk-imx8mq.c
@@ -288,8 +288,7 @@ static int imx8mq_clocks_probe(struct platform_device *pdev)
void __iomem *base;
int err, i;
- clk_hw_data = kzalloc(struct_size(clk_hw_data, hws,
- IMX8MQ_CLK_END), GFP_KERNEL);
+ clk_hw_data = devm_kzalloc(dev, struct_size(clk_hw_data, hws,
IMX8MQ_CLK_END), GFP_KERNEL);
if (WARN_ON(!clk_hw_data))
return -ENOMEM;
--
2.16.4
[PATCH 2/2] clk: imx: imx8m: use devm_of_clk_add_hw_provider
From: Peng Fan
Use devm_of_clk_add_hw_provider to simplify code.
To i.MX8MP, also add err handling.
Signed-off-by: Peng Fan
---
drivers/clk/imx/clk-imx8mm.c | 9 ++---
drivers/clk/imx/clk-imx8mn.c | 9 ++---
drivers/clk/imx/clk-imx8mp.c | 8 ++--
drivers/clk/imx/clk-imx8mq.c | 9 ++---
4 files changed, 12 insertions(+), 23 deletions(-)
diff --git a/drivers/clk/imx/clk-imx8mm.c b/drivers/clk/imx/clk-imx8mm.c
index b43dbe305e7a..fc2c1a0c9ff2 100644
--- a/drivers/clk/imx/clk-imx8mm.c
+++ b/drivers/clk/imx/clk-imx8mm.c
@@ -615,10 +615,10 @@ static int imx8mm_clocks_probe(struct platform_device
*pdev)
imx_check_clk_hws(hws, IMX8MM_CLK_END);
- ret = of_clk_add_hw_provider(np, of_clk_hw_onecell_get, clk_hw_data);
+ ret = devm_of_clk_add_hw_provider(dev, of_clk_hw_onecell_get,
clk_hw_data);
if (ret < 0) {
dev_err(dev, "failed to register clks for i.MX8MM\n");
- goto unregister_hws;
+ return ret;
}
for (i = 0; i < ARRAY_SIZE(uart_clk_ids); i++) {
@@ -630,11 +630,6 @@ static int imx8mm_clocks_probe(struct platform_device
*pdev)
imx_register_uart_clocks(uart_hws);
return 0;
-
-unregister_hws:
- imx_unregister_hw_clocks(hws, IMX8MM_CLK_END);
-
- return ret;
}
static const struct of_device_id imx8mm_clk_of_match[] = {
diff --git a/drivers/clk/imx/clk-imx8mn.c b/drivers/clk/imx/clk-imx8mn.c
index 4189f7f6980e..3620a419eb83 100644
--- a/drivers/clk/imx/clk-imx8mn.c
+++ b/drivers/clk/imx/clk-imx8mn.c
@@ -562,10 +562,10 @@ static int imx8mn_clocks_probe(struct platform_device
*pdev)
imx_check_clk_hws(hws, IMX8MN_CLK_END);
- ret = of_clk_add_hw_provider(np, of_clk_hw_onecell_get, clk_hw_data);
+ ret = devm_of_clk_add_hw_provider(dev, of_clk_hw_onecell_get,
clk_hw_data);
if (ret < 0) {
dev_err(dev, "failed to register hws for i.MX8MN\n");
- goto unregister_hws;
+ return ret;
}
for (i = 0; i < ARRAY_SIZE(uart_clk_ids); i++) {
@@ -577,11 +577,6 @@ static int imx8mn_clocks_probe(struct platform_device
*pdev)
imx_register_uart_clocks(uart_hws);
return 0;
-
-unregister_hws:
- imx_unregister_hw_clocks(hws, IMX8MN_CLK_END);
-
- return ret;
}
static const struct of_device_id imx8mn_clk_of_match[] = {
diff --git a/drivers/clk/imx/clk-imx8mp.c b/drivers/clk/imx/clk-imx8mp.c
index f6ec7b2b8038..43117f387460 100644
--- a/drivers/clk/imx/clk-imx8mp.c
+++ b/drivers/clk/imx/clk-imx8mp.c
@@ -432,7 +432,7 @@ static int imx8mp_clocks_probe(struct platform_device *pdev)
struct device *dev = >dev;
struct device_node *np = dev->of_node;
void __iomem *anatop_base, *ccm_base;
- int i;
+ int ret, i;
np = of_find_compatible_node(NULL, NULL, "fsl,imx8mp-anatop");
anatop_base = of_iomap(np, 0);
@@ -741,7 +741,11 @@ static int imx8mp_clocks_probe(struct platform_device
*pdev)
imx_check_clk_hws(hws, IMX8MP_CLK_END);
- of_clk_add_hw_provider(np, of_clk_hw_onecell_get, clk_hw_data);
+ ret = devm_of_clk_add_hw_provider(dev, of_clk_hw_onecell_get,
clk_hw_data);
+ if (ret < 0) {
+ dev_err(dev, "failed to register hws for i.MX8MN\n");
+ return ret;
+ }
for (i = 0; i < ARRAY_SIZE(uart_clk_ids); i++) {
int index = uart_clk_ids[i];
diff --git a/drivers/clk/imx/clk-imx8mq.c b/drivers/clk/imx/clk-imx8mq.c
index 0106a33c24a4..7c0a84cc9501 100644
--- a/drivers/clk/imx/clk-imx8mq.c
+++ b/drivers/clk/imx/clk-imx8mq.c
@@ -600,10 +600,10 @@ static int imx8mq_clocks_probe(struct platform_device
*pdev)
imx_check_clk_hws(hws, IMX8MQ_CLK_END);
- err = of_clk_add_hw_provider(np, of_clk_hw_onecell_get, clk_hw_data);
+ err = devm_of_clk_add_hw_provider(dev, of_clk_hw_onecell_get,
clk_hw_data);
if (err < 0) {
dev_err(dev, "failed to register hws for i.MX8MQ\n");
- goto unregister_hws;
+ return err;
}
for (i = 0; i < ARRAY_SIZE(uart_clk_ids); i++) {
@@ -615,11 +615,6 @@ static int imx8mq_clocks_probe(struct platform_device
*pdev)
imx_register_uart_clocks(uart_hws);
return 0;
-
-unregister_hws:
- imx_unregister_hw_clocks(hws, IMX8MQ_CLK_END);
-
- return err;
}
static const struct of_device_id imx8mq_clk_of_match[] = {
--
2.16.4
RE: [PATCH 00/10] remoteproc: imx_rproc: support iMX8M and early boot
> Subject: Re: [PATCH 00/10] remoteproc: imx_rproc: support iMX8M and early > boot > > On Mon, Jul 27, 2020 at 06:44:32AM +0000, Peng Fan wrote: > > Hi Oleksij, > > > > > Subject: Re: [PATCH 00/10] remoteproc: imx_rproc: support iMX8M and > > > early boot > > > > > > Hi, > > > > > > On Fri, Jul 24, 2020 at 04:08:03PM +0800, Peng Fan wrote: > > > > This patchset is to support i.MX8MQ/M coproc booted before linux. > > > > Since i.MX8MQ/M was not supported, several patches are needed to > > > > first support the platform, then support early boot case. > > > > > > > > I intended to included i.MX8QM/QXP, but that would introduce a > > > > large patchset, so not included. But the clk/syscon optional patch > > > > for i.MX8QM/QXP was still kept here to avoid rebase error. > > > > > > Thank you for your work. > > > > > > Can you please provide more information about big picture of this work. > > > > > > If I see it correctly, we have here support for i.MX8MM, which seems > > > to be able to fully control Cortex M4 (enable CPU core, etc...). > > > > Yes. > > In this case, I would recommend to mainline the i.MX8MM part > first/separately. Only the last patch is to support earlyboot, all others is imx8mm part. > > > > > > > And other case, where remoteproc is running on application processor > > > and can't or should not touch M4 (i.MX7ULP, i.MX8QM/QXP..). Since M4 > > > provides some functionality, you are trying to reuse remoteproc > > > framework to get resource table present in ELF header and to > > > dynamically load things. For some reasons this header provides more > > > information then needed, so you are changing the ELF parser in the kernel > to workaround it. > > > > Not exactly. > > > > For i.MX8MM, we support two cases. M4 kicked by U-Boot, M4 kicked by > Linux remoteproc. > > For i.MX8QM/QXP, the typical usecase is M4 kicked by SCFW, but we will > > also add M4 kicked by Linux remoteproc. > > For i.MX7ULP, I would only support M4 dual boot case, M4 control > everything. > > From current state of discussion, i'm not sure what role plays remoteproc in > the scenario where M4 is started before linux. Especially if we are not using > resource table. We are using resource table from an address, not in elf file. This is the new feature in Linux-next to support coproc booted early. > > > The reason the change the elf parser is that when M4 elf is loaded by > > Linux remoteproc, It use memset to clear area. > > The use of memset, depends on ELF format. Fix/change the linker script on > your firmware and memset will be never called. > > > However we use ioremap, memset on ARM64 will report crash to device > > nGnRE memory. And we could not use ioremap_wc to TCM area, since it > > could have data correctly written into TCM. > > I have strong feeling, that we are talking about badly or not properly > formatted ELF binary. I would prefer to double check it, before we will apply > fixes on wrong place. > > > Maintainer not wanna to drop memset in common code, and TI guys > > suggest add i.MX specific elf stuff. So I add elf handler in i.MX code. > > I think, removing memset may damage current users of imx_rproc driver. > Since, like I said: the use of memset depends on ELF format. In my elf file, the last PT_LOAD contains data/bss/heap/stack. I'll check with our MCU guys, we only need the specific data loaded. Elf file type is EXEC (Executable file) Entry point 0x1ffe0355 There are 3 program headers, starting at offset 52 Program Headers: Type Offset VirtAddr PhysAddr FileSiz MemSiz Flg Align LOAD 0x01 0x1ffe 0x1ffe 0x00240 0x00240 R 0x1 LOAD 0x010240 0x1ffe0240 0x1ffe0240 0x03e90 0x03e90 RWE 0x1 LOAD 0x02 0x2000 0x1ffe40d0 0x00068 0x0ad00 RW 0x1 Section to Segment mapping: Segment Sections... 00 .interrupts 01 .resource_table .text .ARM .init_array .fini_array 02 .data .bss .heap .stack Thanks, Peng. > > > Thanks, > > Peng. > > > > > > > > Correct? > > > > > > > Peng Fan (10): > > > > dt-bindings: remoteproc: imx_rproc: add i.MX8MQ/M > > > > remoteproc: imx_rproc: correct err message > > > > remoteproc: imx: use devm_ioremap > > > > remoteproc: imx_rproc: make syscon optional > > > > remoteproc: imx_rproc: make clk optional > > > > remoteproc: imx_rproc: add load hook > > > > rem
RE: [PATCH 03/10] remoteproc: imx: use devm_ioremap
> Subject: Re: [PATCH 03/10] remoteproc: imx: use devm_ioremap
>
> On Mon, Jul 27, 2020 at 06:51:00AM +0000, Peng Fan wrote:
> > > Subject: Re: [PATCH 03/10] remoteproc: imx: use devm_ioremap
> > >
> > > On Mon, Jul 27, 2020 at 06:28:20AM +, Peng Fan wrote:
> > > > Hi Oleksij,
> > > >
> > > > > Subject: Re: [PATCH 03/10] remoteproc: imx: use devm_ioremap
> > > > >
> > > > > On Fri, Jul 24, 2020 at 04:08:06PM +0800, Peng Fan wrote:
> > > > > > We might need to map an region multiple times, becaue the
> > > > > > region might be shared between remote processors, such i.MX8QM
> > > > > > with dual
> > > M4 cores.
> > > > > > So use devm_ioremap, not devm_ioremap_resource.
> > > > >
> > > > > Can you please give an example of this kind of shared resources
> > > > > and how they should be handled by two separate devices?
> > > >
> > > > This is to share vdevbuffer space, there is a vdevbuffer in device
> > > > tree, it will be shared between M4_0 and M4_1.
> > > >
> > > > For the buffer, it is Linux DMA API will handle the space.
> > >
> > > Why remoteproc need to care about it? If I see it correctly, from
> > > the linux perspective, it is one buffer and one driver is
> > > responsible for it. Or do I missing some thing?
> >
> > We not have the vdev buffer in resource table, so I added in device tree,
> > see
> below:
>
> Hm.. if vdev is not in resource table and should not be controlled by
> remoteproc, why do we need remoteproc?
I use same approach as stm32 rproc driver.
The resource table here only publish vring address.
>
> > imx8qm_cm40: imx8qm_cm4@0 {
> > compatible = "fsl,imx8qm-cm4";
> > rsc-da = <0x9000>;
> > mbox-names = "tx", "rx", "rxdb";
> > mboxes = <_mu5 0 1
> > _mu5 1 1
> > _mu5 3 1>;
> > mub-partition = <3>;
> > memory-region = <>, <>,
> <>,
> > <>, <>;
> > core-index = <0>;
> > core-id = ;
> > status = "okay";
> > power-domains = < IMX_SC_R_M4_0_PID0>,
> > < IMX_SC_R_M4_0_MU_1A>;
> > };
> >
> > imx8qm_cm41: imx8x_cm4@1 {
> > compatible = "fsl,imx8qm-cm4";
> > rsc-da = <0x9010>;
> > mbox-names = "tx", "rx", "rxdb";
> > mboxes = <_mu6 0 1
> > _mu6 1 1
> > _mu6 3 1>;
> > mub-partition = <4>;
> > memory-region = <>, <>,
> <>,
> > <>, <>;
> > core-index = <1>;
> > core-id = ;
> > status = "okay";
> > power-domains = < IMX_SC_R_M4_1_PID0>,
> > < IMX_SC_R_M4_1_MU_1A>;
> > };
> >
> > vdevbuffer: vdevbuffer {
> > compatible = "shared-dma-pool";
> > reg = <0 0x9040 0 0x10>;
> > no-map;
> > };
> >
> > I have the upper vdevbuffer node shared between M40 and M41 node.
> > The vdevbuffer will be used as virtio data buffer.
> >
> > And I have the following in rproc_add_virtio_dev to share vdevbuffer:
> > /* Try to find dedicated vdev buffer carveout */
> > mem = rproc_find_carveout_by_name(rproc, "vdev%dbuffer",
> rvdev->index);
> > if (!mem)
> > mem = rproc_find_carveout_by_name(rproc,
> > "vdevbuffer");
>
> With kernel v5.8-rc7 i get following call chain:
Please use Linux-next which has support of M4 booted before Linux in
in remoteproc.
> rproc_boot()
> rproc_fw_boot()
> rproc_handle_vdev
> rproc_vdev_do_start()
> rproc_add_virtio_dev()
>
>
> So, at the end, we will call rproc_add_virtio_dev() only if we boot firmware
> by
> linux, or if we get at least the resource table.
Resource table could be got from elf file if it is booted by Linux, or got from
an address if M4 is booted before Linux.
Thanks,
Peng.
>
> Since none of this seems to be the case, i still do not understand how it
> should
> work.
>
> > Hope this is clear.
>
> :) i still need some time to understand it.
>
> --
> Pengutronix e.K. |
> |
> Steuerwalder Str. 21 |
> http://www.pengutronix.de/ |
> 31137 Hildesheim, Germany | Phone:
> +49-5121-206917-0|
> Amtsgericht Hildesheim, HRA 2686 | Fax:
> +49-5121-206917- |
RE: [PATCH 03/10] remoteproc: imx: use devm_ioremap
> Subject: Re: [PATCH 03/10] remoteproc: imx: use devm_ioremap
>
> On Mon, Jul 27, 2020 at 06:28:20AM +0000, Peng Fan wrote:
> > Hi Oleksij,
> >
> > > Subject: Re: [PATCH 03/10] remoteproc: imx: use devm_ioremap
> > >
> > > On Fri, Jul 24, 2020 at 04:08:06PM +0800, Peng Fan wrote:
> > > > We might need to map an region multiple times, becaue the region
> > > > might be shared between remote processors, such i.MX8QM with dual
> M4 cores.
> > > > So use devm_ioremap, not devm_ioremap_resource.
> > >
> > > Can you please give an example of this kind of shared resources and
> > > how they should be handled by two separate devices?
> >
> > This is to share vdevbuffer space, there is a vdevbuffer in device
> > tree, it will be shared between M4_0 and M4_1.
> >
> > For the buffer, it is Linux DMA API will handle the space.
>
> Why remoteproc need to care about it? If I see it correctly, from the linux
> perspective, it is one buffer and one driver is responsible for it. Or do I
> missing
> some thing?
We not have the vdev buffer in resource table, so I added in device tree, see
below:
imx8qm_cm40: imx8qm_cm4@0 {
compatible = "fsl,imx8qm-cm4";
rsc-da = <0x9000>;
mbox-names = "tx", "rx", "rxdb";
mboxes = <_mu5 0 1
_mu5 1 1
_mu5 3 1>;
mub-partition = <3>;
memory-region = <>, <>, <>,
<>, <>;
core-index = <0>;
core-id = ;
status = "okay";
power-domains = < IMX_SC_R_M4_0_PID0>,
< IMX_SC_R_M4_0_MU_1A>;
};
imx8qm_cm41: imx8x_cm4@1 {
compatible = "fsl,imx8qm-cm4";
rsc-da = <0x9010>;
mbox-names = "tx", "rx", "rxdb";
mboxes = <_mu6 0 1
_mu6 1 1
_mu6 3 1>;
mub-partition = <4>;
memory-region = <>, <>, <>,
<>, <>;
core-index = <1>;
core-id = ;
status = "okay";
power-domains = < IMX_SC_R_M4_1_PID0>,
< IMX_SC_R_M4_1_MU_1A>;
};
vdevbuffer: vdevbuffer {
compatible = "shared-dma-pool";
reg = <0 0x9040 0 0x10>;
no-map;
};
I have the upper vdevbuffer node shared between M40 and M41 node.
The vdevbuffer will be used as virtio data buffer.
And I have the following in rproc_add_virtio_dev to share vdevbuffer:
/* Try to find dedicated vdev buffer carveout */
mem = rproc_find_carveout_by_name(rproc, "vdev%dbuffer", rvdev->index);
if (!mem)
mem = rproc_find_carveout_by_name(rproc, "vdevbuffer");
Hope this is clear.
Thanks,
Peng.
>
> > Thanks,
> > Peng.
> >
> > >
> > > > Reviewed-by: Richard Zhu
> > > > Signed-off-by: Peng Fan
> > > > ---
> > > > drivers/remoteproc/imx_rproc.c | 5 +++--
> > > > 1 file changed, 3 insertions(+), 2 deletions(-)
> > > >
> > > > diff --git a/drivers/remoteproc/imx_rproc.c
> > > > b/drivers/remoteproc/imx_rproc.c index 3b3904ebac75..82594a800a1b
> > > > 100644
> > > > --- a/drivers/remoteproc/imx_rproc.c
> > > > +++ b/drivers/remoteproc/imx_rproc.c
> > > > @@ -296,9 +296,10 @@ static int imx_rproc_addr_init(struct
> > > > imx_rproc
> > > *priv,
> > > > if (b >= IMX7D_RPROC_MEM_MAX)
> > > > break;
> > > >
> > > > - priv->mem[b].cpu_addr =
> devm_ioremap_resource(>dev,
> > > );
> > > > + /* Not use resource version, because we might share
> > > > region*/
> > > > + priv->mem[b].cpu_addr = devm_ioremap(>dev,
> res.start,
> > > > +resource_size());
> > > > if (IS_ERR(priv->mem[b].cpu_addr)) {
> > > > - dev_err(dev, "devm_ioremap_resource failed\n");
> > > > + dev_err(dev, "devm_ioremap %pR failed\n", );
> > > > err = PTR_ERR(priv->mem[b].cpu_addr);
> > > > return err;
> > > > }
> > > > --
> > > > 2.16.4
> > > >
> > > >
> > >
> > > --
> > > Pengutronix e.K. |
> > > |
> > > Steuerwalder Str. 21 |
> > > http://www.pengutronix.de/ |
> > > 31137 Hildesheim, Germany | Phone:
> > > +49-5121-206917-0|
> > > Amtsgericht Hildesheim, HRA 2686 | Fax:
> > > +49-5121-206917- |
>
> --
> Pengutronix e.K. |
> |
> Steuerwalder Str. 21 |
> http://www.pengutronix.de/ |
> 31137 Hildesheim, Germany | Phone:
> +49-5121-206917-0|
> Amtsgericht Hildesheim, HRA 2686 | Fax:
> +49-5121-206917- |
RE: [PATCH 00/10] remoteproc: imx_rproc: support iMX8M and early boot
Hi Oleksij, > Subject: Re: [PATCH 00/10] remoteproc: imx_rproc: support iMX8M and early > boot > > Hi, > > On Fri, Jul 24, 2020 at 04:08:03PM +0800, Peng Fan wrote: > > This patchset is to support i.MX8MQ/M coproc booted before linux. > > Since i.MX8MQ/M was not supported, several patches are needed to first > > support the platform, then support early boot case. > > > > I intended to included i.MX8QM/QXP, but that would introduce a large > > patchset, so not included. But the clk/syscon optional patch for > > i.MX8QM/QXP was still kept here to avoid rebase error. > > Thank you for your work. > > Can you please provide more information about big picture of this work. > > If I see it correctly, we have here support for i.MX8MM, which seems to be > able to fully control Cortex M4 (enable CPU core, etc...). Yes. > > And other case, where remoteproc is running on application processor and > can't or should not touch M4 (i.MX7ULP, i.MX8QM/QXP..). Since M4 provides > some functionality, you are trying to reuse remoteproc framework to get > resource table present in ELF header and to dynamically load things. For some > reasons this header provides more information then needed, so you are > changing the ELF parser in the kernel to workaround it. Not exactly. For i.MX8MM, we support two cases. M4 kicked by U-Boot, M4 kicked by Linux remoteproc. For i.MX8QM/QXP, the typical usecase is M4 kicked by SCFW, but we will also add M4 kicked by Linux remoteproc. For i.MX7ULP, I would only support M4 dual boot case, M4 control everything. The reason the change the elf parser is that when M4 elf is loaded by Linux remoteproc, It use memset to clear area. However we use ioremap, memset on ARM64 will report crash to device nGnRE memory. And we could not use ioremap_wc to TCM area, since it could have data correctly written into TCM. Maintainer not wanna to drop memset in common code, and TI guys suggest add i.MX specific elf stuff. So I add elf handler in i.MX code. Thanks, Peng. > > Correct? > > > Peng Fan (10): > > dt-bindings: remoteproc: imx_rproc: add i.MX8MQ/M > > remoteproc: imx_rproc: correct err message > > remoteproc: imx: use devm_ioremap > > remoteproc: imx_rproc: make syscon optional > > remoteproc: imx_rproc: make clk optional > > remoteproc: imx_rproc: add load hook > > remoteproc: imx_rproc: add i.MX specific parse fw hook > > remoteproc: imx_rproc: support i.MX8MQ/M > > remoteproc: imx_proc: enable virtio/mailbox > > remoteproc: imx_rproc: support coproc booting before Linux > > > > .../devicetree/bindings/remoteproc/imx-rproc.txt | 3 + > > drivers/remoteproc/imx_rproc.c | 409 > - > > 2 files changed, 401 insertions(+), 11 deletions(-) > > > > -- > > 2.16.4 > > > > > > ___ > > linux-arm-kernel mailing list > > linux-arm-ker...@lists.infradead.org > > http://lists.infradead.org/mailman/listinfo/linux-arm-kernel > > > > -- > Pengutronix e.K. | > | > Steuerwalder Str. 21 | > http://www.pengutronix.de/ | > 31137 Hildesheim, Germany | Phone: > +49-5121-206917-0| > Amtsgericht Hildesheim, HRA 2686 | Fax: > +49-5121-206917- |
RE: [PATCH 03/10] remoteproc: imx: use devm_ioremap
Hi Oleksij,
> Subject: Re: [PATCH 03/10] remoteproc: imx: use devm_ioremap
>
> On Fri, Jul 24, 2020 at 04:08:06PM +0800, Peng Fan wrote:
> > We might need to map an region multiple times, becaue the region might
> > be shared between remote processors, such i.MX8QM with dual M4 cores.
> > So use devm_ioremap, not devm_ioremap_resource.
>
> Can you please give an example of this kind of shared resources and how they
> should be handled by two separate devices?
This is to share vdevbuffer space, there is a vdevbuffer in device tree, it
will be
shared between M4_0 and M4_1.
For the buffer, it is Linux DMA API will handle the space.
Thanks,
Peng.
>
> > Reviewed-by: Richard Zhu
> > Signed-off-by: Peng Fan
> > ---
> > drivers/remoteproc/imx_rproc.c | 5 +++--
> > 1 file changed, 3 insertions(+), 2 deletions(-)
> >
> > diff --git a/drivers/remoteproc/imx_rproc.c
> > b/drivers/remoteproc/imx_rproc.c index 3b3904ebac75..82594a800a1b
> > 100644
> > --- a/drivers/remoteproc/imx_rproc.c
> > +++ b/drivers/remoteproc/imx_rproc.c
> > @@ -296,9 +296,10 @@ static int imx_rproc_addr_init(struct imx_rproc
> *priv,
> > if (b >= IMX7D_RPROC_MEM_MAX)
> > break;
> >
> > - priv->mem[b].cpu_addr = devm_ioremap_resource(>dev,
> );
> > + /* Not use resource version, because we might share region*/
> > + priv->mem[b].cpu_addr = devm_ioremap(>dev, res.start,
> > +resource_size());
> > if (IS_ERR(priv->mem[b].cpu_addr)) {
> > - dev_err(dev, "devm_ioremap_resource failed\n");
> > + dev_err(dev, "devm_ioremap %pR failed\n", );
> > err = PTR_ERR(priv->mem[b].cpu_addr);
> > return err;
> > }
> > --
> > 2.16.4
> >
> >
>
> --
> Pengutronix e.K. |
> |
> Steuerwalder Str. 21 |
> http://www.pengutronix.de/ |
> 31137 Hildesheim, Germany | Phone:
> +49-5121-206917-0|
> Amtsgericht Hildesheim, HRA 2686 | Fax:
> +49-5121-206917- |
[PATCH 10/10] remoteproc: imx_rproc: support coproc booting before Linux
Detect Coproc booted or not and Parse resource table
Set remoteproc state to RPROC_DETACHED when M4 is booted early
Add attach hook
Signed-off-by: Peng Fan
---
drivers/remoteproc/imx_rproc.c | 75 --
1 file changed, 73 insertions(+), 2 deletions(-)
diff --git a/drivers/remoteproc/imx_rproc.c b/drivers/remoteproc/imx_rproc.c
index a8ce97c04e1e..0863b3162777 100644
--- a/drivers/remoteproc/imx_rproc.c
+++ b/drivers/remoteproc/imx_rproc.c
@@ -91,6 +91,7 @@ struct imx_rproc {
const struct imx_rproc_dcfg *dcfg;
struct imx_rproc_memmem[IMX7D_RPROC_MEM_MAX];
struct clk *clk;
+ boolearly_boot;
void*rsc_va;
struct mbox_client cl;
struct mbox_chan*tx_ch;
@@ -235,6 +236,8 @@ static int imx_rproc_stop(struct rproc *rproc)
dcfg->src_mask, dcfg->src_stop);
if (ret)
dev_err(dev, "Failed to stop M4!\n");
+ else
+ priv->early_boot = false;
return ret;
}
@@ -390,6 +393,32 @@ static int imx_rproc_parse_fw(struct rproc *rproc, const
struct firmware *fw)
return 0;
}
+static int imx_rproc_get_loaded_rsc_table(struct device *dev,
+ struct rproc *rproc)
+{
+ struct imx_rproc *priv = rproc->priv;
+ struct device_node *np = dev->of_node;
+ u32 da;
+ int ret;
+
+ ret = of_property_read_u32(np, "rsc-da", );
+ if (!ret)
+ priv->rsc_va = rproc_da_to_va(rproc, (u64)da, SZ_1K);
+ else
+ return 0;
+
+ if (!priv->rsc_va) {
+ dev_err(priv->dev, "no map for rsc-da: %x\n", da);
+ return PTR_ERR(priv->rsc_va);
+ }
+
+ rproc->table_ptr = (struct resource_table *)priv->rsc_va;
+ rproc->table_sz = SZ_1K;
+ rproc->cached_table = NULL;
+
+ return 0;
+}
+
static int imx_rproc_elf_load_segments(struct rproc *rproc, const struct
firmware *fw)
{
struct device *dev = >dev;
@@ -472,9 +501,15 @@ static void imx_rproc_kick(struct rproc *rproc, int vqid)
__func__, vqid, err);
}
+static int imx_rproc_attach(struct rproc *rproc)
+{
+ return 0;
+}
+
static const struct rproc_ops imx_rproc_ops = {
.start = imx_rproc_start,
.stop = imx_rproc_stop,
+ .attach = imx_rproc_attach,
.kick = imx_rproc_kick,
.da_to_va = imx_rproc_da_to_va,
.load = imx_rproc_elf_load_segments,
@@ -609,6 +644,36 @@ static int imx_rproc_xtr_mbox_init(struct rproc *rproc)
return ret;
}
+static int imx_rproc_detect_mode(struct imx_rproc *priv)
+{
+ const struct imx_rproc_dcfg *dcfg = priv->dcfg;
+ struct device *dev = priv->dev;
+ int ret;
+ u32 val;
+
+ ret = regmap_read(priv->regmap, dcfg->src_reg, );
+ if (ret) {
+ dev_err(dev, "Failed to read src\n");
+ return ret;
+ }
+
+ priv->early_boot = !(val & dcfg->src_stop);
+
+ if (priv->early_boot) {
+ priv->rproc->state = RPROC_DETACHED;
+
+ ret = imx_rproc_parse_memory_regions(priv->rproc);
+ if (ret)
+ return ret;
+
+ ret = imx_rproc_get_loaded_rsc_table(dev, priv->rproc);
+ if (ret)
+ return ret;
+ }
+
+ return 0;
+}
+
static int imx_rproc_probe(struct platform_device *pdev)
{
struct device *dev = >dev;
@@ -661,6 +726,10 @@ static int imx_rproc_probe(struct platform_device *pdev)
goto err_put_mbox;
}
+ ret = imx_rproc_detect_mode(priv);
+ if (ret)
+ goto err_put_mbox;
+
priv->clk = devm_clk_get_optional(dev, NULL);
if (IS_ERR(priv->clk)) {
dev_err(dev, "Failed to get clock\n");
@@ -689,7 +758,8 @@ static int imx_rproc_probe(struct platform_device *pdev)
return 0;
err_put_clk:
- clk_disable_unprepare(priv->clk);
+ if (!priv->early_boot)
+ clk_disable_unprepare(priv->clk);
err_put_mbox:
if (!IS_ERR(priv->tx_ch))
mbox_free_channel(priv->tx_ch);
@@ -706,7 +776,8 @@ static int imx_rproc_remove(struct platform_device *pdev)
struct rproc *rproc = platform_get_drvdata(pdev);
struct imx_rproc *priv = rproc->priv;
- clk_disable_unprepare(priv->clk);
+ if (!priv->early_boot)
+ clk_disable_unprepare(priv->clk);
rproc_del(rproc);
rproc_free(rproc);
--
2.16.4
[PATCH 08/10] remoteproc: imx_rproc: support i.MX8MQ/M
Add i.MX8MQ dev/sys addr map and configuration data structure
i.MX8MM share i.MX8MQ settings.
Reviewed-by: Richard Zhu
Signed-off-by: Peng Fan
---
drivers/remoteproc/imx_rproc.c | 39 +++
1 file changed, 39 insertions(+)
diff --git a/drivers/remoteproc/imx_rproc.c b/drivers/remoteproc/imx_rproc.c
index 43000a992455..03382290d6a5 100644
--- a/drivers/remoteproc/imx_rproc.c
+++ b/drivers/remoteproc/imx_rproc.c
@@ -93,6 +93,34 @@ struct imx_rproc {
void*rsc_va;
};
+static const struct imx_rproc_att imx_rproc_att_imx8mq[] = {
+ /* dev addr , sys addr , size , flags */
+ /* TCML - alias */
+ { 0x, 0x007e, 0x0002, 0 },
+ /* OCRAM_S */
+ { 0x0018, 0x0018, 0x8000, 0 },
+ /* OCRAM */
+ { 0x0090, 0x0090, 0x0002, 0 },
+ /* OCRAM */
+ { 0x0092, 0x0092, 0x0002, 0 },
+ /* QSPI Code - alias */
+ { 0x0800, 0x0800, 0x0800, 0 },
+ /* DDR (Code) - alias */
+ { 0x1000, 0x8000, 0x0FFE, 0 },
+ /* TCML */
+ { 0x1FFE, 0x007E, 0x0002, ATT_OWN },
+ /* TCMU */
+ { 0x2000, 0x0080, 0x0002, ATT_OWN },
+ /* OCRAM_S */
+ { 0x2018, 0x0018, 0x8000, ATT_OWN },
+ /* OCRAM */
+ { 0x2020, 0x0090, 0x0002, ATT_OWN },
+ /* OCRAM */
+ { 0x2022, 0x0092, 0x0002, ATT_OWN },
+ /* DDR (Data) */
+ { 0x4000, 0x4000, 0x8000, 0 },
+};
+
static const struct imx_rproc_att imx_rproc_att_imx7d[] = {
/* dev addr , sys addr , size , flags */
/* OCRAM_S (M4 Boot code) - alias */
@@ -143,6 +171,15 @@ static const struct imx_rproc_att imx_rproc_att_imx6sx[] =
{
{ 0x8000, 0x8000, 0x6000, 0 },
};
+static const struct imx_rproc_dcfg imx_rproc_cfg_imx8mq = {
+ .src_reg= IMX7D_SRC_SCR,
+ .src_mask = IMX7D_M4_RST_MASK,
+ .src_start = IMX7D_M4_START,
+ .src_stop = IMX7D_M4_STOP,
+ .att= imx_rproc_att_imx8mq,
+ .att_size = ARRAY_SIZE(imx_rproc_att_imx8mq),
+};
+
static const struct imx_rproc_dcfg imx_rproc_cfg_imx7d = {
.src_reg= IMX7D_SRC_SCR,
.src_mask = IMX7D_M4_RST_MASK,
@@ -583,6 +620,8 @@ static int imx_rproc_remove(struct platform_device *pdev)
static const struct of_device_id imx_rproc_of_match[] = {
{ .compatible = "fsl,imx7d-cm4", .data = _rproc_cfg_imx7d },
{ .compatible = "fsl,imx6sx-cm4", .data = _rproc_cfg_imx6sx },
+ { .compatible = "fsl,imx8mq-cm4", .data = _rproc_cfg_imx8mq },
+ { .compatible = "fsl,imx8mm-cm4", .data = _rproc_cfg_imx8mq },
{},
};
MODULE_DEVICE_TABLE(of, imx_rproc_of_match);
--
2.16.4
[PATCH 07/10] remoteproc: imx_rproc: add i.MX specific parse fw hook
The hook is used to parse memory-regions and load resource table
from the address the remote processor published.
Signed-off-by: Peng Fan
---
drivers/remoteproc/imx_rproc.c | 99 +-
1 file changed, 98 insertions(+), 1 deletion(-)
diff --git a/drivers/remoteproc/imx_rproc.c b/drivers/remoteproc/imx_rproc.c
index c23726091228..43000a992455 100644
--- a/drivers/remoteproc/imx_rproc.c
+++ b/drivers/remoteproc/imx_rproc.c
@@ -11,6 +11,7 @@
#include
#include
#include
+#include
#include
#include
#include
@@ -89,6 +90,7 @@ struct imx_rproc {
const struct imx_rproc_dcfg *dcfg;
struct imx_rproc_memmem[IMX7D_RPROC_MEM_MAX];
struct clk *clk;
+ void*rsc_va;
};
static const struct imx_rproc_att imx_rproc_att_imx7d[] = {
@@ -251,6 +253,101 @@ static void *imx_rproc_da_to_va(struct rproc *rproc, u64
da, size_t len)
return va;
}
+static int imx_rproc_mem_alloc(struct rproc *rproc,
+ struct rproc_mem_entry *mem)
+{
+ struct device *dev = rproc->dev.parent;
+ void *va;
+
+ dev_dbg(dev, "map memory: %p+%zx\n", >dma, mem->len);
+ va = ioremap_wc(mem->dma, mem->len);
+ if (IS_ERR_OR_NULL(va)) {
+ dev_err(dev, "Unable to map memory region: %p+%zx\n",
+ >dma, mem->len);
+ return -ENOMEM;
+ }
+
+ /* Update memory entry va */
+ mem->va = va;
+
+ return 0;
+}
+
+static int imx_rproc_mem_release(struct rproc *rproc,
+struct rproc_mem_entry *mem)
+{
+ dev_dbg(rproc->dev.parent, "unmap memory: %pa\n", >dma);
+ iounmap(mem->va);
+
+ return 0;
+}
+
+static int imx_rproc_parse_memory_regions(struct rproc *rproc)
+{
+ struct imx_rproc *priv = rproc->priv;
+ struct device_node *np = priv->dev->of_node;
+ struct of_phandle_iterator it;
+ struct rproc_mem_entry *mem;
+ struct reserved_mem *rmem;
+ int index = 0;
+ u32 da;
+
+ /* Register associated reserved memory regions */
+ of_phandle_iterator_init(, np, "memory-region", NULL, 0);
+ while (of_phandle_iterator_next() == 0) {
+ rmem = of_reserved_mem_lookup(it.node);
+ if (!rmem) {
+ dev_err(priv->dev, "unable to acquire memory-region\n");
+ return -EINVAL;
+ }
+
+ /* No need to translate pa to da, i.MX use same map */
+ da = rmem->base;
+
+ if (strcmp(it.node->name, "vdev0buffer")) {
+ /* Register memory region */
+ mem = rproc_mem_entry_init(priv->dev, NULL,
+ (dma_addr_t)rmem->base,
+ rmem->size, da,
+ imx_rproc_mem_alloc,
+ imx_rproc_mem_release,
+ it.node->name);
+
+ if (mem)
+ rproc_coredump_add_segment(rproc, da,
+ rmem->size);
+ } else {
+ /* Register reserved memory for vdev buffer alloc */
+ mem = rproc_of_resm_mem_entry_init(priv->dev, index,
+ rmem->size,
+ rmem->base,
+ it.node->name);
+ }
+
+ if (!mem)
+ return -ENOMEM;
+
+ rproc_add_carveout(rproc, mem);
+ index++;
+ }
+
+ return 0;
+}
+
+static int imx_rproc_parse_fw(struct rproc *rproc, const struct firmware *fw)
+{
+ int ret = imx_rproc_parse_memory_regions(rproc);
+
+ if (ret)
+ return ret;
+
+ ret = rproc_elf_load_rsc_table(rproc, fw);
+ if (ret)
+ dev_info(>dev, "No resource table in elf\n");
+
+ return 0;
+}
+
static int imx_rproc_elf_load_segments(struct rproc *rproc, const struct
firmware *fw)
{
struct device *dev = >dev;
@@ -323,7 +420,7 @@ static const struct rproc_ops imx_rproc_ops = {
.stop = imx_rproc_stop,
.da_to_va = imx_rproc_da_to_va,
.load = imx_rproc_elf_load_segments,
- .parse_fw = rproc_elf_load_rsc_table,
+ .parse_fw = imx_rproc_parse_fw,
.find_loaded_rsc_table = rproc_elf_find_loaded_rsc_table,
.sanity_check = rproc_elf_sanity_check,
.get_boot_addr = rproc_elf_get_boot_addr,
--
2.16.4
[PATCH 09/10] remoteproc: imx_proc: enable virtio/mailbox
Use virtio/mailbox to build connection between Remote Proccessors
and Linux. Add delayed work to handle incoming messages.
Reviewed-by: Richard Zhu
Signed-off-by: Peng Fan
---
drivers/remoteproc/imx_rproc.c | 102 +++--
1 file changed, 99 insertions(+), 3 deletions(-)
diff --git a/drivers/remoteproc/imx_rproc.c b/drivers/remoteproc/imx_rproc.c
index 03382290d6a5..a8ce97c04e1e 100644
--- a/drivers/remoteproc/imx_rproc.c
+++ b/drivers/remoteproc/imx_rproc.c
@@ -8,6 +8,7 @@
#include
#include
#include
+#include
#include
#include
#include
@@ -91,6 +92,10 @@ struct imx_rproc {
struct imx_rproc_memmem[IMX7D_RPROC_MEM_MAX];
struct clk *clk;
void*rsc_va;
+ struct mbox_client cl;
+ struct mbox_chan*tx_ch;
+ struct mbox_chan*rx_ch;
+ struct delayed_work rproc_work;
};
static const struct imx_rproc_att imx_rproc_att_imx8mq[] = {
@@ -452,9 +457,25 @@ static int imx_rproc_elf_load_segments(struct rproc
*rproc, const struct firmwar
return ret;
}
+static void imx_rproc_kick(struct rproc *rproc, int vqid)
+{
+ struct imx_rproc *priv = rproc->priv;
+ int err;
+ __u32 mmsg;
+
+ mmsg = vqid << 16;
+
+ priv->cl.tx_tout = 20;
+ err = mbox_send_message(priv->tx_ch, (void *));
+ if (err < 0)
+ dev_err(priv->dev, "%s: failed (%d, err:%d)\n",
+ __func__, vqid, err);
+}
+
static const struct rproc_ops imx_rproc_ops = {
.start = imx_rproc_start,
.stop = imx_rproc_stop,
+ .kick = imx_rproc_kick,
.da_to_va = imx_rproc_da_to_va,
.load = imx_rproc_elf_load_segments,
.parse_fw = imx_rproc_parse_fw,
@@ -527,6 +548,67 @@ static int imx_rproc_addr_init(struct imx_rproc *priv,
return 0;
}
+static void imx_rproc_vq_work(struct work_struct *work)
+{
+ struct delayed_work *dwork = to_delayed_work(work);
+ struct imx_rproc *priv = container_of(dwork, struct imx_rproc,
+ rproc_work);
+
+ rproc_vq_interrupt(priv->rproc, 0);
+ rproc_vq_interrupt(priv->rproc, 1);
+}
+
+static void imx_rproc_rx_callback(struct mbox_client *cl, void *msg)
+{
+ struct rproc *rproc = dev_get_drvdata(cl->dev);
+ struct imx_rproc *priv = rproc->priv;
+
+ schedule_delayed_work(&(priv->rproc_work), 0);
+}
+
+static int imx_rproc_xtr_mbox_init(struct rproc *rproc)
+{
+ struct imx_rproc *priv = rproc->priv;
+ struct device *dev = priv->dev;
+ struct mbox_client *cl;
+ int ret = 0;
+
+ cl = >cl;
+ cl->dev = dev;
+ cl->tx_block = true;
+ cl->tx_tout = 20;
+ cl->knows_txdone = false;
+ cl->rx_callback = imx_rproc_rx_callback;
+
+ priv->tx_ch = mbox_request_channel_byname(cl, "tx");
+ if (IS_ERR(priv->tx_ch)) {
+ if (PTR_ERR(priv->tx_ch) == -EPROBE_DEFER)
+ return -EPROBE_DEFER;
+ ret = PTR_ERR(priv->tx_ch);
+ dev_dbg(cl->dev, "failed to request mbox tx chan, ret %d\n",
+ ret);
+ goto err_out;
+ }
+
+ priv->rx_ch = mbox_request_channel_byname(cl, "rx");
+ if (IS_ERR(priv->rx_ch)) {
+ ret = PTR_ERR(priv->rx_ch);
+ dev_dbg(cl->dev, "failed to request mbox rx chan, ret %d\n",
+ ret);
+ goto err_out;
+ }
+
+ return ret;
+
+err_out:
+ if (!IS_ERR(priv->tx_ch))
+ mbox_free_channel(priv->tx_ch);
+ if (!IS_ERR(priv->rx_ch))
+ mbox_free_channel(priv->rx_ch);
+
+ return ret;
+}
+
static int imx_rproc_probe(struct platform_device *pdev)
{
struct device *dev = >dev;
@@ -566,17 +648,24 @@ static int imx_rproc_probe(struct platform_device *pdev)
dev_set_drvdata(dev, rproc);
+ ret = imx_rproc_xtr_mbox_init(rproc);
+ if (ret) {
+ if (ret == -EPROBE_DEFER)
+ goto err_put_rproc;
+ /* mbox is optional, so not fail here */
+ }
+
ret = imx_rproc_addr_init(priv, pdev);
if (ret) {
dev_err(dev, "failed on imx_rproc_addr_init\n");
- goto err_put_rproc;
+ goto err_put_mbox;
}
priv->clk = devm_clk_get_optional(dev, NULL);
if (IS_ERR(priv->clk)) {
dev_err(dev, "Failed to get clock\n");
ret = PTR_ERR(priv->clk);
- goto err_put_rproc;
+ goto err_put_mbox;
}
/*
@@ -586,9 +6
[PATCH 04/10] remoteproc: imx_rproc: make syscon optional
Make syscon optional, since i.MX8QM/QXP/7ULP not have SRC to control M4.
But currently i.MX8QM/QXP/7ULP not added, so still check regmap
when start/stop to avoid unhappy things.
Reviewed-by: Richard Zhu
Signed-off-by: Peng Fan
---
drivers/remoteproc/imx_rproc.c | 11 +--
1 file changed, 9 insertions(+), 2 deletions(-)
diff --git a/drivers/remoteproc/imx_rproc.c b/drivers/remoteproc/imx_rproc.c
index 82594a800a1b..4fad5c0b1c05 100644
--- a/drivers/remoteproc/imx_rproc.c
+++ b/drivers/remoteproc/imx_rproc.c
@@ -162,6 +162,9 @@ static int imx_rproc_start(struct rproc *rproc)
struct device *dev = priv->dev;
int ret;
+ if (!priv->regmap)
+ return -EOPNOTSUPP;
+
ret = regmap_update_bits(priv->regmap, dcfg->src_reg,
dcfg->src_mask, dcfg->src_start);
if (ret)
@@ -177,6 +180,9 @@ static int imx_rproc_stop(struct rproc *rproc)
struct device *dev = priv->dev;
int ret;
+ if (!priv->regmap)
+ return -EOPNOTSUPP;
+
ret = regmap_update_bits(priv->regmap, dcfg->src_reg,
dcfg->src_mask, dcfg->src_stop);
if (ret)
@@ -325,9 +331,10 @@ static int imx_rproc_probe(struct platform_device *pdev)
regmap = syscon_regmap_lookup_by_phandle(np, "syscon");
if (IS_ERR(regmap)) {
dev_err(dev, "failed to find syscon\n");
- return PTR_ERR(regmap);
+ regmap = NULL;
+ } else {
+ regmap_attach_dev(dev, regmap, );
}
- regmap_attach_dev(dev, regmap, );
/* set some other name then imx */
rproc = rproc_alloc(dev, "imx-rproc", _rproc_ops,
--
2.16.4
[PATCH 00/10] remoteproc: imx_rproc: support iMX8M and early boot
This patchset is to support i.MX8MQ/M coproc booted before linux. Since i.MX8MQ/M was not supported, several patches are needed to first support the platform, then support early boot case. I intended to included i.MX8QM/QXP, but that would introduce a large patchset, so not included. But the clk/syscon optional patch for i.MX8QM/QXP was still kept here to avoid rebase error. Peng Fan (10): dt-bindings: remoteproc: imx_rproc: add i.MX8MQ/M remoteproc: imx_rproc: correct err message remoteproc: imx: use devm_ioremap remoteproc: imx_rproc: make syscon optional remoteproc: imx_rproc: make clk optional remoteproc: imx_rproc: add load hook remoteproc: imx_rproc: add i.MX specific parse fw hook remoteproc: imx_rproc: support i.MX8MQ/M remoteproc: imx_proc: enable virtio/mailbox remoteproc: imx_rproc: support coproc booting before Linux .../devicetree/bindings/remoteproc/imx-rproc.txt | 3 + drivers/remoteproc/imx_rproc.c | 409 - 2 files changed, 401 insertions(+), 11 deletions(-) -- 2.16.4
[PATCH 05/10] remoteproc: imx_rproc: make clk optional
To i.MX7ULP Dual Boot, M4 is the master to control everything,
so it not need clk from A7.
Reviewed-by: Richard Zhu
Signed-off-by: Peng Fan
---
drivers/remoteproc/imx_rproc.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/remoteproc/imx_rproc.c b/drivers/remoteproc/imx_rproc.c
index 4fad5c0b1c05..aee790efbf7b 100644
--- a/drivers/remoteproc/imx_rproc.c
+++ b/drivers/remoteproc/imx_rproc.c
@@ -362,7 +362,7 @@ static int imx_rproc_probe(struct platform_device *pdev)
goto err_put_rproc;
}
- priv->clk = devm_clk_get(dev, NULL);
+ priv->clk = devm_clk_get_optional(dev, NULL);
if (IS_ERR(priv->clk)) {
dev_err(dev, "Failed to get clock\n");
ret = PTR_ERR(priv->clk);
--
2.16.4
[PATCH 06/10] remoteproc: imx_rproc: add load hook
To i.MX8, we not able to see the correct data written into TCM when
using ioremap_wc, so use ioremap.
However common elf loader using memset.
To arm64, "dc zva, dst" is used in memset.
Per ARM DDI 0487A.j, chapter C5.3.8 DC ZVA, Data Cache Zero by VA,
"If the memory region being zeroed is any type of Device memory,
this instruction can give an alignment fault which is prioritized
in the same way as other alignment faults that are determined
by the memory type."
On i.MX platforms, when elf is loaded to onchip TCM area, the region
is ioremapped, so "dc zva, dst" will trigger abort.
So add i.MX specific loader to address the TCM write issue.
The change not impact i.MX6/7 function.
Signed-off-by: Peng Fan
---
drivers/remoteproc/imx_rproc.c | 76 ++
1 file changed, 76 insertions(+)
diff --git a/drivers/remoteproc/imx_rproc.c b/drivers/remoteproc/imx_rproc.c
index aee790efbf7b..c23726091228 100644
--- a/drivers/remoteproc/imx_rproc.c
+++ b/drivers/remoteproc/imx_rproc.c
@@ -4,6 +4,7 @@
*/
#include
+#include
#include
#include
#include
@@ -15,6 +16,9 @@
#include
#include
+#include "remoteproc_internal.h"
+#include "remoteproc_elf_helpers.h"
+
#define IMX7D_SRC_SCR 0x0C
#define IMX7D_ENABLE_M4BIT(3)
#define IMX7D_SW_M4P_RST BIT(2)
@@ -247,10 +251,82 @@ static void *imx_rproc_da_to_va(struct rproc *rproc, u64
da, size_t len)
return va;
}
+static int imx_rproc_elf_load_segments(struct rproc *rproc, const struct
firmware *fw)
+{
+ struct device *dev = >dev;
+ const void *ehdr, *phdr;
+ int i, ret = 0;
+ u16 phnum;
+ const u8 *elf_data = fw->data;
+ u8 class = fw_elf_get_class(fw);
+ u32 elf_phdr_get_size = elf_size_of_phdr(class);
+
+ ehdr = elf_data;
+ phnum = elf_hdr_get_e_phnum(class, ehdr);
+ phdr = elf_data + elf_hdr_get_e_phoff(class, ehdr);
+
+ /* go through the available ELF segments */
+ for (i = 0; i < phnum; i++, phdr += elf_phdr_get_size) {
+ u64 da = elf_phdr_get_p_paddr(class, phdr);
+ u64 memsz = elf_phdr_get_p_memsz(class, phdr);
+ u64 filesz = elf_phdr_get_p_filesz(class, phdr);
+ u64 offset = elf_phdr_get_p_offset(class, phdr);
+ u32 type = elf_phdr_get_p_type(class, phdr);
+ void *ptr;
+
+ if (type != PT_LOAD)
+ continue;
+
+ dev_dbg(dev, "phdr: type %d da 0x%llx memsz 0x%llx filesz
0x%llx\n",
+ type, da, memsz, filesz);
+
+ if (filesz > memsz) {
+ dev_err(dev, "bad phdr filesz 0x%llx memsz 0x%llx\n",
+ filesz, memsz);
+ ret = -EINVAL;
+ break;
+ }
+
+ if (offset + filesz > fw->size) {
+ dev_err(dev, "truncated fw: need 0x%llx avail 0x%zx\n",
+ offset + filesz, fw->size);
+ ret = -EINVAL;
+ break;
+ }
+
+ if (!rproc_u64_fit_in_size_t(memsz)) {
+ dev_err(dev, "size (%llx) does not fit in size_t
type\n",
+ memsz);
+ ret = -EOVERFLOW;
+ break;
+ }
+
+ /* grab the kernel address for this device address */
+ ptr = rproc_da_to_va(rproc, da, memsz);
+ if (!ptr) {
+ dev_err(dev, "bad phdr da 0x%llx mem 0x%llx\n", da,
+ memsz);
+ ret = -EINVAL;
+ break;
+ }
+
+ /* put the segment where the remote processor expects it */
+ if (filesz)
+ memcpy_toio(ptr, elf_data + offset, filesz);
+ }
+
+ return ret;
+}
+
static const struct rproc_ops imx_rproc_ops = {
.start = imx_rproc_start,
.stop = imx_rproc_stop,
.da_to_va = imx_rproc_da_to_va,
+ .load = imx_rproc_elf_load_segments,
+ .parse_fw = rproc_elf_load_rsc_table,
+ .find_loaded_rsc_table = rproc_elf_find_loaded_rsc_table,
+ .sanity_check = rproc_elf_sanity_check,
+ .get_boot_addr = rproc_elf_get_boot_addr,
};
static int imx_rproc_addr_init(struct imx_rproc *priv,
--
2.16.4
[PATCH 02/10] remoteproc: imx_rproc: correct err message
It is using devm_ioremap, so not devm_ioremap_resource. Correct
the error message and print out sa/size.
Signed-off-by: Peng Fan
---
drivers/remoteproc/imx_rproc.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/remoteproc/imx_rproc.c b/drivers/remoteproc/imx_rproc.c
index 8957ed271d20..3b3904ebac75 100644
--- a/drivers/remoteproc/imx_rproc.c
+++ b/drivers/remoteproc/imx_rproc.c
@@ -268,7 +268,7 @@ static int imx_rproc_addr_init(struct imx_rproc *priv,
priv->mem[b].cpu_addr = devm_ioremap(>dev,
att->sa, att->size);
if (!priv->mem[b].cpu_addr) {
- dev_err(dev, "devm_ioremap_resource failed\n");
+ dev_err(dev, "devm_ioremap sa:0x%x size:0x%x failed\n",
att->sa, att->size);
return -ENOMEM;
}
priv->mem[b].sys_addr = att->sa;
--
2.16.4
[PATCH 01/10] dt-bindings: remoteproc: imx_rproc: add i.MX8MQ/M
Add i.MX8MQ/M compatible string
Signed-off-by: Peng Fan
---
Documentation/devicetree/bindings/remoteproc/imx-rproc.txt | 3 +++
1 file changed, 3 insertions(+)
diff --git a/Documentation/devicetree/bindings/remoteproc/imx-rproc.txt
b/Documentation/devicetree/bindings/remoteproc/imx-rproc.txt
index fbcefd965dc4..46f7623512db 100644
--- a/Documentation/devicetree/bindings/remoteproc/imx-rproc.txt
+++ b/Documentation/devicetree/bindings/remoteproc/imx-rproc.txt
@@ -8,6 +8,8 @@ Required properties:
- compatible Should be one of:
"fsl,imx7d-cm4"
"fsl,imx6sx-cm4"
+ "fsl,imx8mq-cm4"
+ "fsl,imx8mm-cm4"
- clocks Clock for co-processor (See:
../clock/clock-bindings.txt)
- syscon Phandle to syscon block which provide access to
System Reset Controller
@@ -15,6 +17,7 @@ Required properties:
Optional properties:
- memory-regionlist of phandels to the reserved memory regions.
(See: ../reserved-memory/reserved-memory.txt)
+- rsc-da address of resource table
Example:
m4_reserved_sysmem1: cm4@8000 {
--
2.16.4
[PATCH 03/10] remoteproc: imx: use devm_ioremap
We might need to map an region multiple times, becaue the region might
be shared between remote processors, such i.MX8QM with dual M4 cores.
So use devm_ioremap, not devm_ioremap_resource.
Reviewed-by: Richard Zhu
Signed-off-by: Peng Fan
---
drivers/remoteproc/imx_rproc.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/remoteproc/imx_rproc.c b/drivers/remoteproc/imx_rproc.c
index 3b3904ebac75..82594a800a1b 100644
--- a/drivers/remoteproc/imx_rproc.c
+++ b/drivers/remoteproc/imx_rproc.c
@@ -296,9 +296,10 @@ static int imx_rproc_addr_init(struct imx_rproc *priv,
if (b >= IMX7D_RPROC_MEM_MAX)
break;
- priv->mem[b].cpu_addr = devm_ioremap_resource(>dev, );
+ /* Not use resource version, because we might share region*/
+ priv->mem[b].cpu_addr = devm_ioremap(>dev, res.start,
resource_size());
if (IS_ERR(priv->mem[b].cpu_addr)) {
- dev_err(dev, "devm_ioremap_resource failed\n");
+ dev_err(dev, "devm_ioremap %pR failed\n", );
err = PTR_ERR(priv->mem[b].cpu_addr);
return err;
}
--
2.16.4
RE: [PATCH v6 0/9] remoteproc: Add support for attaching with rproc
> Subject: [PATCH v6 0/9] remoteproc: Add support for attaching with rproc For the series, Tested-by: Peng Fan Regards, Peng. > > This set provides functionality allowing the remoteproc core to attach to a > remote processor that was started by another entity. > > New in V6: > 1) Added Arnaud's reviewed-by and tested-by tags. > > Applies cleanly on rproc-next (0cf17702d872) > > Thanks, > Mathieu > > Mathieu Poirier (9): > remoteproc: Add new RPROC_DETACHED state > remoteproc: Add new attach() remoteproc operation > remoteproc: Introducing function rproc_attach() > remoteproc: Introducing function rproc_actuate() > remoteproc: Introducing function rproc_validate() > remoteproc: Refactor function rproc_boot() > remoteproc: Refactor function rproc_trigger_auto_boot() > remoteproc: Refactor function rproc_free_vring() > remoteproc: Properly handle firmware name when attaching > > drivers/remoteproc/remoteproc_core.c | 213 > +-- > drivers/remoteproc/remoteproc_internal.h | 8 + > drivers/remoteproc/remoteproc_sysfs.c| 17 +- > include/linux/remoteproc.h | 9 +- > 4 files changed, 230 insertions(+), 17 deletions(-) > > -- > 2.25.1
[PATCH] tracing/uprobe: Remove dead code in trace_uprobe_register()
In the function trace_uprobe_register(), the statement "return 0;" out of switch case is dead code, remove it. Signed-off-by: Peng Fan --- kernel/trace/trace_uprobe.c | 1 - 1 file changed, 1 deletion(-) diff --git a/kernel/trace/trace_uprobe.c b/kernel/trace/trace_uprobe.c index fdd47f9..f4286c9 100644 --- a/kernel/trace/trace_uprobe.c +++ b/kernel/trace/trace_uprobe.c @@ -1456,7 +1456,6 @@ trace_uprobe_register(struct trace_event_call *event, enum trace_reg type, default: return 0; } - return 0; } static int uprobe_dispatcher(struct uprobe_consumer *con, struct pt_regs *regs) -- 2.1.0
[PATCH] remoteproc: virtio: support sharing vdev buffer
Support sharing vdev buffer between multiple vdevs by using name
"vdevbuffer".
Reviewed-by: Richard Zhu
Signed-off-by: Peng Fan
---
drivers/remoteproc/remoteproc_virtio.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/remoteproc/remoteproc_virtio.c
b/drivers/remoteproc/remoteproc_virtio.c
index dfd3808c34fd..5d78ebea111e 100644
--- a/drivers/remoteproc/remoteproc_virtio.c
+++ b/drivers/remoteproc/remoteproc_virtio.c
@@ -343,6 +343,8 @@ int rproc_add_virtio_dev(struct rproc_vdev *rvdev, int id)
/* Try to find dedicated vdev buffer carveout */
mem = rproc_find_carveout_by_name(rproc, "vdev%dbuffer", rvdev->index);
+ if (!mem)
+ mem = rproc_find_carveout_by_name(rproc, "vdevbuffer");
if (mem) {
phys_addr_t pa;
--
2.16.4
RE: [PATCH 2/7] firmware: imx: scu: Support reception of messages of any size
> Subject: [PATCH 2/7] firmware: imx: scu: Support reception of messages of
> any size
Could fast_ipc be used for your case? I am not fans to use the legacy method
which is error prone.
Thanks,
Peng.
>
> From: Franck LENORMAND
>
> The word of a message can arrive in any order and the current driver cannot
> receive more than 4-word message.
>
> To fix this, a new variable rx_pos is added to imx_sc_chan structure to save
> the position at which the word receive must be stored.
>
> The position is initialized by the index of the channel.
>
> The position is incremented by SCU_MU_RX_CHAN_NUM each time a word
> is received on the channel.
>
> This allow the words to be received in any order and be stored in the
> expected order.
>
> Signed-off-by: Franck LENORMAND
> ---
> drivers/firmware/imx/imx-scu.c | 21 +++--
> 1 file changed, 15 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/firmware/imx/imx-scu.c b/drivers/firmware/imx/imx-scu.c
> index 2ab0482..7c13595 100644
> --- a/drivers/firmware/imx/imx-scu.c
> +++ b/drivers/firmware/imx/imx-scu.c
> @@ -1,6 +1,6 @@
> // SPDX-License-Identifier: GPL-2.0+
> /*
> - * Copyright 2018 NXP
> + * Copyright 2018,2020 NXP
> * Author: Dong Aisheng
> *
> * Implementation of the SCU IPC functions using MUs (client side).
> @@ -19,6 +19,8 @@
> #include
> #include
>
> +#define SCU_MU_TX_CHAN_NUM 4
> +#define SCU_MU_RX_CHAN_NUM 4
> #define SCU_MU_CHAN_NUM 8
> #define MAX_RX_TIMEOUT (msecs_to_jiffies(30))
>
> @@ -29,6 +31,7 @@ struct imx_sc_chan {
> struct mbox_chan *ch;
> int idx;
> struct completion tx_done;
> + u8 rx_pos;
> };
>
> struct imx_sc_ipc {
> @@ -136,16 +139,14 @@ static void imx_scu_rx_callback(struct mbox_client
> *c, void *msg)
> return;
> }
>
> - if (sc_chan->idx == 0) {
> + if (sc_chan->rx_pos == 0) {
> hdr = msg;
> sc_ipc->rx_size = hdr->size;
> dev_dbg(sc_ipc->dev, "msg rx size %u\n", sc_ipc->rx_size);
> - if (sc_ipc->rx_size > 4)
> - dev_warn(sc_ipc->dev, "RPC does not support receiving
> over 4
> words: %u\n",
> - sc_ipc->rx_size);
> }
>
> - sc_ipc->msg[sc_chan->idx] = *data;
> + sc_ipc->msg[sc_chan->rx_pos] = *data;
> + sc_chan->rx_pos += SCU_MU_RX_CHAN_NUM;
> sc_ipc->count++;
>
> dev_dbg(sc_ipc->dev, "mu %u msg %u 0x%x\n", sc_chan->idx, @@
> -205,6 +206,7 @@ int imx_scu_call_rpc(struct imx_sc_ipc *sc_ipc, void *msg,
> bool have_resp)
> uint8_t saved_svc, saved_func;
> struct imx_sc_rpc_msg *hdr;
> int ret;
> + int i;
>
> if (WARN_ON(!sc_ipc || !msg))
> return -EINVAL;
> @@ -212,6 +214,13 @@ int imx_scu_call_rpc(struct imx_sc_ipc *sc_ipc, void
> *msg, bool have_resp)
> mutex_lock(_ipc->lock);
> reinit_completion(_ipc->done);
>
> + /* Set the indexes for the reception chans */
> + for (i = SCU_MU_TX_CHAN_NUM; i < SCU_MU_CHAN_NUM; i++) {
> + struct imx_sc_chan *sc_chan = _ipc->chans[i];
> +
> + sc_chan->rx_pos = sc_chan->idx;
> + }
> +
> if (have_resp) {
> sc_ipc->msg = msg;
> saved_svc = ((struct imx_sc_rpc_msg *)msg)->svc;
> --
> 2.7.4
RE: [PATCH 1/7] firmware: imx: scu-rm: Add Resource Management APIs
Hi Franck,
> Subject: [PATCH 1/7] firmware: imx: scu-rm: Add Resource Management APIs
Are you using an old base? This was already in tree.
Regards,
Peng.
>
> From: Franck LENORMAND
>
> This patch adds the imx_sc_rm_is_resource_owned indicating if a specific
> resource is owned by the caller.
>
> Signed-off-by: Franck LENORMAND
> ---
> drivers/firmware/imx/Makefile | 2 +-
> drivers/firmware/imx/rm.c | 44 +++
> include/linux/firmware/imx/sci.h| 1 +
> include/linux/firmware/imx/svc/rm.h | 69
> +
> 4 files changed, 115 insertions(+), 1 deletion(-) create mode 100644
> drivers/firmware/imx/rm.c create mode 100644
> include/linux/firmware/imx/svc/rm.h
>
> diff --git a/drivers/firmware/imx/Makefile b/drivers/firmware/imx/Makefile
> index 08bc9dd..17ea361 100644
> --- a/drivers/firmware/imx/Makefile
> +++ b/drivers/firmware/imx/Makefile
> @@ -1,4 +1,4 @@
> # SPDX-License-Identifier: GPL-2.0
> obj-$(CONFIG_IMX_DSP)+= imx-dsp.o
> -obj-$(CONFIG_IMX_SCU)+= imx-scu.o misc.o imx-scu-irq.o
> +obj-$(CONFIG_IMX_SCU)+= imx-scu.o misc.o imx-scu-irq.o rm.o
> obj-$(CONFIG_IMX_SCU_PD) += scu-pd.o
> diff --git a/drivers/firmware/imx/rm.c b/drivers/firmware/imx/rm.c new file
> mode 100644 index ..a397c6b
> --- /dev/null
> +++ b/drivers/firmware/imx/rm.c
> @@ -0,0 +1,44 @@
> +// SPDX-License-Identifier: GPL-2.0+
> +/*
> + * Copyright (C) 2016 Freescale Semiconductor, Inc.
> + * Copyright 2017-2020 NXP
> + *
> + * File containing client-side RPC functions for the RM service. These
> + * functions are ported to clients that communicate to the SC.
> + */
> +
> +#include
> +
> +struct imx_sc_msg_rm_rsrc_owned {
> + struct imx_sc_rpc_msg hdr;
> + u16 resource;
> +} __packed __aligned(4);
> +
> +/**
> + * imx_sc_rm_is_resource_owned() - Checks @resource is owned by current
> + * partition or not
> + *
> + * @ipc: IPC handle
> + * @resource: resource the control is associated with
> + *
> + * Return:
> + * 0 - OK
> + * < 0 - error.
> + */
> +bool imx_sc_rm_is_resource_owned(struct imx_sc_ipc *ipc, u16 resource)
> +{
> + struct imx_sc_msg_rm_rsrc_owned msg;
> + struct imx_sc_rpc_msg *hdr =
> +
> + hdr->ver = IMX_SC_RPC_VERSION;
> + hdr->svc = IMX_SC_RPC_SVC_RM;
> + hdr->func = IMX_SC_RM_FUNC_IS_RESOURCE_OWNED;
> + hdr->size = 2;
> +
> + msg.resource = resource;
> +
> + imx_scu_call_rpc(ipc, , true);
> +
> + return hdr->func;
> +}
> +EXPORT_SYMBOL(imx_sc_rm_is_resource_owned);
> diff --git a/include/linux/firmware/imx/sci.h
> b/include/linux/firmware/imx/sci.h
> index 3fa418a..3c459f5 100644
> --- a/include/linux/firmware/imx/sci.h
> +++ b/include/linux/firmware/imx/sci.h
> @@ -14,6 +14,7 @@
>
> #include #include
>
> +#include
>
> int imx_scu_enable_general_irq_channel(struct device *dev); int
> imx_scu_irq_register_notifier(struct notifier_block *nb); diff --git
> a/include/linux/firmware/imx/svc/rm.h
> b/include/linux/firmware/imx/svc/rm.h
> new file mode 100644
> index ..9924216
> --- /dev/null
> +++ b/include/linux/firmware/imx/svc/rm.h
> @@ -0,0 +1,69 @@
> +/* SPDX-License-Identifier: GPL-2.0+ */
> +/*
> + * Copyright (C) 2016 Freescale Semiconductor, Inc.
> + * Copyright 2017-2020 NXP
> + *
> + * Header file containing the public API for the System Controller (SC)
> + * Power Management (PM) function. This includes functions for power
> +state
> + * control, clock control, reset control, and wake-up event control.
> + *
> + * RM_SVC (SVC) Resource Management Service
> + *
> + * Module for the Resource Management (RM) service.
> + */
> +
> +#ifndef _SC_RM_API_H
> +#define _SC_RM_API_H
> +
> +#include
> +
> +/*
> + * This type is used to indicate RPC RM function calls.
> + */
> +enum imx_sc_rm_func {
> + IMX_SC_RM_FUNC_UNKNOWN = 0,
> + IMX_SC_RM_FUNC_PARTITION_ALLOC = 1,
> + IMX_SC_RM_FUNC_SET_CONFIDENTIAL = 31,
> + IMX_SC_RM_FUNC_PARTITION_FREE = 2,
> + IMX_SC_RM_FUNC_GET_DID = 26,
> + IMX_SC_RM_FUNC_PARTITION_STATIC = 3,
> + IMX_SC_RM_FUNC_PARTITION_LOCK = 4,
> + IMX_SC_RM_FUNC_GET_PARTITION = 5,
> + IMX_SC_RM_FUNC_SET_PARENT = 6,
> + IMX_SC_RM_FUNC_MOVE_ALL = 7,
> + IMX_SC_RM_FUNC_ASSIGN_RESOURCE = 8,
> + IMX_SC_RM_FUNC_SET_RESOURCE_MOVABLE = 9,
> + IMX_SC_RM_FUNC_SET_SUBSYS_RSRC_MOVABLE = 28,
> + IMX_SC_RM_FUNC_SET_MASTER_ATTRIBUTES = 10,
> + IMX_SC_RM_FUNC_SET_MASTER_SID = 11,
> + IMX_SC_RM_FUNC_SET_PERIPHERAL_PERMISSIONS = 12,
> + IMX_SC_RM_FUNC_IS_RESOURCE_OWNED = 13,
> + IMX_SC_RM_FUNC_GET_RESOURCE_OWNER = 33,
> + IMX_SC_RM_FUNC_IS_RESOURCE_MASTER = 14,
> + IMX_SC_RM_FUNC_IS_RESOURCE_PERIPHERAL = 15,
> + IMX_SC_RM_FUNC_GET_RESOURCE_INFO = 16,
> + IMX_SC_RM_FUNC_MEMREG_ALLOC = 17,
> + IMX_SC_RM_FUNC_MEMREG_SPLIT = 29,
> + IMX_SC_RM_FUNC_MEMREG_FRAG = 32,
> + IMX_SC_RM_FUNC_MEMREG_FREE = 18,
> +
[PATCH v2] mips/vdso: Fix resource leaks in genvdso.c
Close "fd" before the return of map_vdso() and close "out_file"
in main().
Signed-off-by: Peng Fan
---
v2:
- add one missing fclose()
---
arch/mips/vdso/genvdso.c | 10 ++
1 file changed, 10 insertions(+)
diff --git a/arch/mips/vdso/genvdso.c b/arch/mips/vdso/genvdso.c
index be57b832..ccba50e 100644
--- a/arch/mips/vdso/genvdso.c
+++ b/arch/mips/vdso/genvdso.c
@@ -122,6 +122,7 @@ static void *map_vdso(const char *path, size_t *_size)
if (fstat(fd, ) != 0) {
fprintf(stderr, "%s: Failed to stat '%s': %s\n", program_name,
path, strerror(errno));
+ close(fd);
return NULL;
}
@@ -130,6 +131,7 @@ static void *map_vdso(const char *path, size_t *_size)
if (addr == MAP_FAILED) {
fprintf(stderr, "%s: Failed to map '%s': %s\n", program_name,
path, strerror(errno));
+ close(fd);
return NULL;
}
@@ -139,6 +141,7 @@ static void *map_vdso(const char *path, size_t *_size)
if (memcmp(ehdr->e_ident, ELFMAG, SELFMAG) != 0) {
fprintf(stderr, "%s: '%s' is not an ELF file\n", program_name,
path);
+ close(fd);
return NULL;
}
@@ -150,6 +153,7 @@ static void *map_vdso(const char *path, size_t *_size)
default:
fprintf(stderr, "%s: '%s' has invalid ELF class\n",
program_name, path);
+ close(fd);
return NULL;
}
@@ -161,6 +165,7 @@ static void *map_vdso(const char *path, size_t *_size)
default:
fprintf(stderr, "%s: '%s' has invalid ELF data order\n",
program_name, path);
+ close(fd);
return NULL;
}
@@ -168,15 +173,18 @@ static void *map_vdso(const char *path, size_t *_size)
fprintf(stderr,
"%s: '%s' has invalid ELF machine (expected EM_MIPS)\n",
program_name, path);
+ close(fd);
return NULL;
} else if (swap_uint16(ehdr->e_type) != ET_DYN) {
fprintf(stderr,
"%s: '%s' has invalid ELF type (expected ET_DYN)\n",
program_name, path);
+ close(fd);
return NULL;
}
*_size = stat.st_size;
+ close(fd);
return addr;
}
@@ -293,10 +301,12 @@ int main(int argc, char **argv)
/* Calculate and write symbol offsets to */
if (!get_symbols(dbg_vdso_path, dbg_vdso)) {
unlink(out_path);
+ fclose(out_file);
return EXIT_FAILURE;
}
fprintf(out_file, "};\n");
+ fclose(out_file);
return EXIT_SUCCESS;
}
--
2.1.0
[PATCH] mips/vdso: Fix resource leaks in genvdso.c
Close "fd" before the return of map_vdso() and close "out_file"
in main().
Signed-off-by: Peng Fan
---
arch/mips/vdso/genvdso.c | 9 +
1 file changed, 9 insertions(+)
diff --git a/arch/mips/vdso/genvdso.c b/arch/mips/vdso/genvdso.c
index be57b832..f459c7a 100644
--- a/arch/mips/vdso/genvdso.c
+++ b/arch/mips/vdso/genvdso.c
@@ -122,6 +122,7 @@ static void *map_vdso(const char *path, size_t *_size)
if (fstat(fd, ) != 0) {
fprintf(stderr, "%s: Failed to stat '%s': %s\n", program_name,
path, strerror(errno));
+ close(fd);
return NULL;
}
@@ -130,6 +131,7 @@ static void *map_vdso(const char *path, size_t *_size)
if (addr == MAP_FAILED) {
fprintf(stderr, "%s: Failed to map '%s': %s\n", program_name,
path, strerror(errno));
+ close(fd);
return NULL;
}
@@ -139,6 +141,7 @@ static void *map_vdso(const char *path, size_t *_size)
if (memcmp(ehdr->e_ident, ELFMAG, SELFMAG) != 0) {
fprintf(stderr, "%s: '%s' is not an ELF file\n", program_name,
path);
+ close(fd);
return NULL;
}
@@ -150,6 +153,7 @@ static void *map_vdso(const char *path, size_t *_size)
default:
fprintf(stderr, "%s: '%s' has invalid ELF class\n",
program_name, path);
+ close(fd);
return NULL;
}
@@ -161,6 +165,7 @@ static void *map_vdso(const char *path, size_t *_size)
default:
fprintf(stderr, "%s: '%s' has invalid ELF data order\n",
program_name, path);
+ close(fd);
return NULL;
}
@@ -168,15 +173,18 @@ static void *map_vdso(const char *path, size_t *_size)
fprintf(stderr,
"%s: '%s' has invalid ELF machine (expected EM_MIPS)\n",
program_name, path);
+ close(fd);
return NULL;
} else if (swap_uint16(ehdr->e_type) != ET_DYN) {
fprintf(stderr,
"%s: '%s' has invalid ELF type (expected ET_DYN)\n",
program_name, path);
+ close(fd);
return NULL;
}
*_size = stat.st_size;
+ close(fd);
return addr;
}
@@ -297,6 +305,7 @@ int main(int argc, char **argv)
}
fprintf(out_file, "};\n");
+ fclose(out_file);
return EXIT_SUCCESS;
}
--
2.1.0
RE: [PATCH] xen: introduce xen_vring_use_dma
> Subject: Re: [PATCH] xen: introduce xen_vring_use_dma > > Sorry for the late reply -- a couple of conferences kept me busy. > > > On Wed, 1 Jul 2020, Michael S. Tsirkin wrote: > > On Wed, Jul 01, 2020 at 10:34:53AM -0700, Stefano Stabellini wrote: > > > Would you be in favor of a more flexible check along the lines of > > > the one proposed in the patch that started this thread: > > > > > > if (xen_vring_use_dma()) > > > return true; > > > > > > > > > xen_vring_use_dma would be implemented so that it returns true when > > > xen_swiotlb is required and false otherwise. > > > > Just to stress - with a patch like this virtio can *still* use DMA API > > if PLATFORM_ACCESS is set. So if DMA API is broken on some platforms > > as you seem to be saying, you guys should fix it before doing > > something like this.. > > Yes, DMA API is broken with some interfaces (specifically: rpmesg and trusty), > but for them PLATFORM_ACCESS is never set. That is why the errors weren't > reported before. Xen special case aside, there is no problem under normal > circumstances. > > > If you are OK with this patch (after a little bit of clean-up), Peng, are you > OK > with sending an update or do you want me to? If you could help, that would be great. You have more expertise in knowing the whole picture. Thanks, Peng.
[PATCH] ARM: imx_v6_v7_defconfig: Support i.MX8MM
From: Peng Fan i.MX8MM is built with AArch64 hardware, this is to support it could run in Aarch32 mode with clock and pinctrl driver enabled. Signed-off-by: Peng Fan --- To make kernel boot, needs the GIC_V3 select patch: https://patchwork.kernel.org/patch/11655383/ arch/arm/configs/imx_v6_v7_defconfig | 3 +++ 1 file changed, 3 insertions(+) diff --git a/arch/arm/configs/imx_v6_v7_defconfig b/arch/arm/configs/imx_v6_v7_defconfig index 87e6400c436b..cb335478ac37 100644 --- a/arch/arm/configs/imx_v6_v7_defconfig +++ b/arch/arm/configs/imx_v6_v7_defconfig @@ -217,6 +217,7 @@ CONFIG_SPI=y CONFIG_SPI_GPIO=y CONFIG_SPI_IMX=y CONFIG_SPI_FSL_DSPI=y +CONFIG_PINCTRL_IMX8MM=y CONFIG_GPIO_SYSFS=y CONFIG_GPIO_SIOX=m CONFIG_GPIO_MAX732X=y @@ -406,6 +407,8 @@ CONFIG_STAGING=y CONFIG_STAGING_MEDIA=y CONFIG_VIDEO_IMX_MEDIA=y CONFIG_COMMON_CLK_PWM=y +CONFIG_CLK_IMX8MM=y +CONFIG_SOC_IMX8M=y CONFIG_IIO=y CONFIG_MMA8452=y CONFIG_IMX7D_ADC=y -- 2.16.4
[PATCH V2] soc: imx: select ARM_GIC_V3 for i.MX8M
From: Peng Fan Select ARM_GIC_V3, then it is able to use gic v3 driver in aarch32 mode linux on aarch64 hardware. For aarch64 mode, it not hurts to select ARM_GIC_V3. Acked-by: Arnd Bergmann Signed-off-by: Peng Fan --- V2: Select GIC V3 when ARCH_MXC is selected to avoid compile test error https://patchwork.kernel.org/patch/11516553/#23321403 drivers/soc/imx/Kconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/soc/imx/Kconfig b/drivers/soc/imx/Kconfig index d515d2cc20ed..7da10bc99d21 100644 --- a/drivers/soc/imx/Kconfig +++ b/drivers/soc/imx/Kconfig @@ -22,6 +22,7 @@ config SOC_IMX8M depends on ARCH_MXC || COMPILE_TEST default ARCH_MXC && ARM64 select SOC_BUS + select ARM_GIC_V3 if ARCH_MXC help If you say yes here you get support for the NXP i.MX8M family support, it will provide the SoC info like SoC family, -- 2.16.4
Re: Re: linux-next: build warning after merge of the spi tree
Hi, Browm, Stephen
Firstly, feel sorry for the problem introduced by me. I think I must modify
my bad,but should I send another patch to delete the label "out_free" or
re-send patch of v2(which maybe need to go back)?
Could you give me some advices? Sorry again.
Thanks
Peng Fan fanp...@loongson.cnwrote:
> Very sorry for that, I will re-send v2 later.
>
> Stephen Rothwell s...@canb.auug.org.auwrote:
> > Hi all,
> >
> > After merging the spi tree, today's linux-next build (arm
> > multi_v7_defconfig) produced this warning:
> >
> > drivers/spi/spi-atmel.c: In function 'atmel_spi_probe':
> > drivers/spi/spi-atmel.c:1680:1: warning: label 'out_free' defined but not
> > used [-Wunused-label]
> > 1680 | out_free:
> > | ^~~~
> >
> > Introduced by commit
> >
> > 2d9a744685bc ("spi: atmel: No need to call spi_master_put() if
> > spi_alloc_master() failed")
> >
> > --
> > Cheers,
> > Stephen Rothwell
Re: linux-next: build warning after merge of the spi tree
Very sorry for that, I will re-send v2 later.
Stephen Rothwell s...@canb.auug.org.auwrote:
> Hi all,
>
> After merging the spi tree, today's linux-next build (arm
> multi_v7_defconfig) produced this warning:
>
> drivers/spi/spi-atmel.c: In function 'atmel_spi_probe':
> drivers/spi/spi-atmel.c:1680:1: warning: label 'out_free' defined but not
> used [-Wunused-label]
> 1680 | out_free:
> | ^~~~
>
> Introduced by commit
>
> 2d9a744685bc ("spi: atmel: No need to call spi_master_put() if
> spi_alloc_master() failed")
>
> --
> Cheers,
> Stephen Rothwell
[PATCH] spi: atmel: No need to call spi_master_put() if spi_alloc_master() failed
There is no need to call spi_master_put() if spi_alloc_master() failed, it should return -ENOMEM directly. Signed-off-by: Peng Fan --- drivers/spi/spi-atmel.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/drivers/spi/spi-atmel.c b/drivers/spi/spi-atmel.c index 57ee8c3..6ed7abd 100644 --- a/drivers/spi/spi-atmel.c +++ b/drivers/spi/spi-atmel.c @@ -1546,10 +1546,9 @@ static int atmel_spi_probe(struct platform_device *pdev) return PTR_ERR(clk); /* setup spi core then atmel-specific driver state */ - ret = -ENOMEM; master = spi_alloc_master(>dev, sizeof(*as)); if (!master) - goto out_free; + return -ENOMEM; /* the spi->mode bits understood by this driver: */ master->use_gpio_descriptors = true; -- 2.1.0
RE: [PATCH V3 0/3] ARM: imx: move cpu code to drivers/soc/imx
> Subject: Re: [PATCH V3 0/3] ARM: imx: move cpu code to drivers/soc/imx > > On 5/20/2020 9:01 AM, Peng Fan wrote: > > From: Peng Fan > > > > V3: > > Rebased to latest next tree > > Resolved the conflicts with vf610 soc patch > > > > V2: > > Keep i.MX1/2/3/5 cpu type for completness Correct return value in > > patch 1/3 use CONFIG_ARM to guard compile soc-imx.c in patch 3/3 > > > > V1: > > https://patchwork.kernel.org/cover/11433689/ > > RFC version : > > https://patchwork.kernel.org/cover/11336433/ > > > > Nothing changed in v1, just rename to formal patches > > > > Shawn, > > The original concern has been eliminated in RFC discussion, so this > > patchset is ready to be in next. > > Thanks. > > > > Follow i.MX8, move the soc device register code to drivers/soc/imx to > > simplify arch/arm/mach-imx/cpu.c > > > > I planned to use similar logic as soc-imx8m.c to restructure soc-imx.c > > and merged the two files into one. But not sure, so still keep the > > logic in cpu.c. > > > > There is one change is the platform devices are not under > > /sys/devices/soc0 after patch 1/4. Actually ARM64 platform devices are > > not under /sys/devices/soc0, such as i.MX8/8M. > > So it should not hurt to let the platform devices under platform dir. > > > > Peng Fan (3): > > ARM: imx: use device_initcall for imx_soc_device_init > > ARM: imx: move cpu definitions into a header > > soc: imx: move cpu code to drivers/soc/imx > > > This patch series has the side effect of LS1021A platform now reporting that > it's part of "i.MX family". > > caam driver relies on the SoC bus / SoC attributes (ID, family) to determine > if > it's running on an i.MX SoC or other (Layerscape, QorIQ). Sorry to break LS1021A. But I wonder why i.MX code would affect LS? Regards, Peng. > > With this patch set, driver fails to probe on LS1021A: > [5.998928] caam 170.crypto: No clock data provided for i.MX SoC > [6.005306] caam: probe of 170.crypto failed with error -22 > > Horia
[PATCH] power: supply: rt5033_battery: Fix error code in rt5033_battery_probe()
In the function rt5033_battery_probe(), it should return -ENOMEM instead of -EINVAL when call function devm_kzalloc() failed. Signed-off-by: Peng Fan --- drivers/power/supply/rt5033_battery.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/power/supply/rt5033_battery.c b/drivers/power/supply/rt5033_battery.c index d8667a9..f330452 100644 --- a/drivers/power/supply/rt5033_battery.c +++ b/drivers/power/supply/rt5033_battery.c @@ -125,7 +125,7 @@ static int rt5033_battery_probe(struct i2c_client *client, battery = devm_kzalloc(>dev, sizeof(*battery), GFP_KERNEL); if (!battery) - return -EINVAL; + return -ENOMEM; battery->client = client; battery->regmap = devm_regmap_init_i2c(client, -- 2.1.0
RE: [PATCH] xen: introduce xen_vring_use_dma
> Subject: RE: [PATCH] xen: introduce xen_vring_use_dma > > On Mon, 29 Jun 2020, Peng Fan wrote: > > > > If that is the case, how is it possible that virtio breaks on ARM > > > > using the default dma_ops? The breakage is not Xen related (except > > > > that Xen turns dma_ops on). The original message from Peng was: > > > > > > > > vring_map_one_sg -> vring_use_dma_api > > > >-> dma_map_page > > > >-> __swiotlb_map_page > > > > ->swiotlb_map_page > > > > > > > > ->__dma_map_area(phys_to_virt(dma_to_phys(dev, > > > dev_addr)), size, dir); > > > > However we are using per device dma area for rpmsg, phys_to_virt > > > > could not return a correct virtual address for virtual address in > > > > vmalloc area. Then kernel panic. > > > > > > > > I must be missing something. Maybe it is because it has to do with > RPMesg? > > > > > > I think it's an RPMesg bug, yes > > > > rpmsg bug is another issue, it should not use dma_alloc_coherent for > > reserved area, and use vmalloc_to_page. > > > > Anyway here using dma api will also trigger issue. > > Is the stack trace above for the RPMesg issue or for the Trusty issue? The stack trace you pasted is rpmsg issue. > If it is the stack trace for RPMesg, can you also post the Trusty stack > trace? Or > are they indentical? There is no stack dump here. It successfully using swiotlb to do a map, but we actually no need swiotlb in domu to do the map. Thanks, Peng.
RE: [PATCH] xen: introduce xen_vring_use_dma
> Subject: Re: [PATCH] xen: introduce xen_vring_use_dma > > On Mon, Jun 29, 2020 at 06:25:41AM +0000, Peng Fan wrote: > > > > > > Anyway, re-reading the last messages of the original thread > > > > > > [1], it looks like Peng had a clear idea on how to fix the general > > > > > > issue. > > > > > > Peng, what happened with that? > > > > > > > > We shrinked the rpmsg reserved area to workaround the issue. > > > > So still use the dma apis in rpmsg. > > > > > > > > But here I am going to address domu android trusty issue using virtio. > > > > > > My suggestion is to first of all fix DMA API so it works properly. > > > > Could you please elaborate more details? > > > > You mean the DMA API usage of rpmsg? Or xen domu dma_ops? > > > > Thanks, > > Peng. > > Not 100% sure but I think xen dma ops. Sorry to ask again, could you explain more details about what issues do you see of current xen ARM domu dma_ops? Or Dom0 swiotlb xen dma_ops? Thanks, Pen.g > > -- > MST
RE: [PATCH] xen: introduce xen_vring_use_dma
> Subject: Re: [PATCH] xen: introduce xen_vring_use_dma > > On Mon, Jun 29, 2020 at 03:05:19AM +0000, Peng Fan wrote: > > > Subject: Re: [PATCH] xen: introduce xen_vring_use_dma > > > > > > On Thu, Jun 25, 2020 at 10:31:27AM -0700, Stefano Stabellini wrote: > > > > On Wed, 24 Jun 2020, Michael S. Tsirkin wrote: > > > > > On Wed, Jun 24, 2020 at 02:53:54PM -0700, Stefano Stabellini wrote: > > > > > > On Wed, 24 Jun 2020, Michael S. Tsirkin wrote: > > > > > > > On Wed, Jun 24, 2020 at 10:59:47AM -0700, Stefano Stabellini > wrote: > > > > > > > > On Wed, 24 Jun 2020, Michael S. Tsirkin wrote: > > > > > > > > > On Wed, Jun 24, 2020 at 05:17:32PM +0800, Peng Fan wrote: > > > > > > > > > > Export xen_swiotlb for all platforms using xen swiotlb > > > > > > > > > > > > > > > > > > > > Use xen_swiotlb to determine when vring should use dma > > > > > > > > > > APIs to map the > > > > > > > > > > ring: when xen_swiotlb is enabled the dma API is required. > > > > > > > > > > When it is disabled, it is not required. > > > > > > > > > > > > > > > > > > > > Signed-off-by: Peng Fan > > > > > > > > > > > > > > > > > > Isn't there some way to use VIRTIO_F_IOMMU_PLATFORM for > > > this? > > > > > > > > > Xen was there first, but everyone else is using that now. > > > > > > > > > > > > > > > > Unfortunately it is complicated and it is not related to > > > > > > > > VIRTIO_F_IOMMU_PLATFORM :-( > > > > > > > > > > > > > > > > > > > > > > > > The Xen subsystem in Linux uses dma_ops via swiotlb_xen to > > > > > > > > translate foreign mappings (memory coming from other VMs) > > > > > > > > to > > > physical addresses. > > > > > > > > On x86, it also uses dma_ops to translate Linux's idea of > > > > > > > > a physical address into a real physical address (this is > > > > > > > > unneeded on ARM.) > > > > > > > > > > > > > > > > > > > > > > > > So regardless of VIRTIO_F_IOMMU_PLATFORM, dma_ops should > > > > > > > > be used on Xen/x86 always and on Xen/ARM if Linux is Dom0 > > > > > > > > (because it has foreign > > > > > > > > mappings.) That is why we have the if (xen_domain) return > > > > > > > > true; in vring_use_dma_api. > > > > > > > > > > > > > > VIRTIO_F_IOMMU_PLATFORM makes guest always use DMA ops. > > > > > > > > > > > > > > Xen hack predates VIRTIO_F_IOMMU_PLATFORM so it *also* > > > > > > > forces DMA ops even if VIRTIO_F_IOMMU_PLATFORM is clear. > > > > > > > > > > > > > > Unfortunately as a result Xen never got around to properly > > > > > > > setting VIRTIO_F_IOMMU_PLATFORM. > > > > > > > > > > > > I don't think VIRTIO_F_IOMMU_PLATFORM would be correct for > > > > > > this because the usage of swiotlb_xen is not a property of > > > > > > virtio, > > > > > > > > > > > > > > > Basically any device without VIRTIO_F_ACCESS_PLATFORM (that is > > > > > it's name in latest virtio spec, VIRTIO_F_IOMMU_PLATFORM is what > > > > > linux calls it) is declared as "special, don't follow normal > > > > > rules for access". > > > > > > > > > > So yes swiotlb_xen is not a property of virtio, but what *is* a > > > > > property of virtio is that it's not special, just a regular > > > > > device from DMA > > > POV. > > > > > > > > I am trying to understand what you meant but I think I am missing > > > > something. > > > > > > > > Are you saying that modern virtio should always have > > > > VIRTIO_F_ACCESS_PLATFORM, hence use normal dma_ops as any other > > > devices? > > > > > > I am saying it's a safe default. Clear VIRTIO_F_ACCESS_PLATFORM if > > > you have some special needs e.g. you are very sure it's ok t
RE: [PATCH] xen: introduce xen_vring_use_dma
> Subject: Re: [PATCH] xen: introduce xen_vring_use_dma > > On Thu, Jun 25, 2020 at 10:31:27AM -0700, Stefano Stabellini wrote: > > On Wed, 24 Jun 2020, Michael S. Tsirkin wrote: > > > On Wed, Jun 24, 2020 at 02:53:54PM -0700, Stefano Stabellini wrote: > > > > On Wed, 24 Jun 2020, Michael S. Tsirkin wrote: > > > > > On Wed, Jun 24, 2020 at 10:59:47AM -0700, Stefano Stabellini wrote: > > > > > > On Wed, 24 Jun 2020, Michael S. Tsirkin wrote: > > > > > > > On Wed, Jun 24, 2020 at 05:17:32PM +0800, Peng Fan wrote: > > > > > > > > Export xen_swiotlb for all platforms using xen swiotlb > > > > > > > > > > > > > > > > Use xen_swiotlb to determine when vring should use dma > > > > > > > > APIs to map the > > > > > > > > ring: when xen_swiotlb is enabled the dma API is required. > > > > > > > > When it is disabled, it is not required. > > > > > > > > > > > > > > > > Signed-off-by: Peng Fan > > > > > > > > > > > > > > Isn't there some way to use VIRTIO_F_IOMMU_PLATFORM for > this? > > > > > > > Xen was there first, but everyone else is using that now. > > > > > > > > > > > > Unfortunately it is complicated and it is not related to > > > > > > VIRTIO_F_IOMMU_PLATFORM :-( > > > > > > > > > > > > > > > > > > The Xen subsystem in Linux uses dma_ops via swiotlb_xen to > > > > > > translate foreign mappings (memory coming from other VMs) to > physical addresses. > > > > > > On x86, it also uses dma_ops to translate Linux's idea of a > > > > > > physical address into a real physical address (this is > > > > > > unneeded on ARM.) > > > > > > > > > > > > > > > > > > So regardless of VIRTIO_F_IOMMU_PLATFORM, dma_ops should be > > > > > > used on Xen/x86 always and on Xen/ARM if Linux is Dom0 > > > > > > (because it has foreign > > > > > > mappings.) That is why we have the if (xen_domain) return > > > > > > true; in vring_use_dma_api. > > > > > > > > > > VIRTIO_F_IOMMU_PLATFORM makes guest always use DMA ops. > > > > > > > > > > Xen hack predates VIRTIO_F_IOMMU_PLATFORM so it *also* forces > > > > > DMA ops even if VIRTIO_F_IOMMU_PLATFORM is clear. > > > > > > > > > > Unfortunately as a result Xen never got around to properly > > > > > setting VIRTIO_F_IOMMU_PLATFORM. > > > > > > > > I don't think VIRTIO_F_IOMMU_PLATFORM would be correct for this > > > > because the usage of swiotlb_xen is not a property of virtio, > > > > > > > > > Basically any device without VIRTIO_F_ACCESS_PLATFORM (that is it's > > > name in latest virtio spec, VIRTIO_F_IOMMU_PLATFORM is what linux > > > calls it) is declared as "special, don't follow normal rules for > > > access". > > > > > > So yes swiotlb_xen is not a property of virtio, but what *is* a > > > property of virtio is that it's not special, just a regular device from > > > DMA > POV. > > > > I am trying to understand what you meant but I think I am missing > > something. > > > > Are you saying that modern virtio should always have > > VIRTIO_F_ACCESS_PLATFORM, hence use normal dma_ops as any other > devices? > > I am saying it's a safe default. Clear VIRTIO_F_ACCESS_PLATFORM if you have > some special needs e.g. you are very sure it's ok to bypass DMA ops, or you > need to support a legacy guest (produced in the window between virtio 1 > support in 2014 and support for VIRTIO_F_ACCESS_PLATFORM in 2016). > > > > If that is the case, how is it possible that virtio breaks on ARM > > using the default dma_ops? The breakage is not Xen related (except > > that Xen turns dma_ops on). The original message from Peng was: > > > > vring_map_one_sg -> vring_use_dma_api > >-> dma_map_page > >-> __swiotlb_map_page > > ->swiotlb_map_page > > ->__dma_map_area(phys_to_virt(dma_to_phys(dev, > dev_addr)), size, dir); > > However we are using per device dma area for rpmsg, phys_to_virt > > could not return a correct virtual address for virtu
RE: [PATCH] xen: introduce xen_vring_use_dma
> Subject: Re: [PATCH] xen: introduce xen_vring_use_dma > > On Wed, 24 Jun 2020, Michael S. Tsirkin wrote: > > On Wed, Jun 24, 2020 at 02:53:54PM -0700, Stefano Stabellini wrote: > > > On Wed, 24 Jun 2020, Michael S. Tsirkin wrote: > > > > On Wed, Jun 24, 2020 at 10:59:47AM -0700, Stefano Stabellini wrote: > > > > > On Wed, 24 Jun 2020, Michael S. Tsirkin wrote: > > > > > > On Wed, Jun 24, 2020 at 05:17:32PM +0800, Peng Fan wrote: > > > > > > > Export xen_swiotlb for all platforms using xen swiotlb > > > > > > > > > > > > > > Use xen_swiotlb to determine when vring should use dma APIs > > > > > > > to map the > > > > > > > ring: when xen_swiotlb is enabled the dma API is required. > > > > > > > When it is disabled, it is not required. > > > > > > > > > > > > > > Signed-off-by: Peng Fan > > > > > > > > > > > > Isn't there some way to use VIRTIO_F_IOMMU_PLATFORM for this? > > > > > > Xen was there first, but everyone else is using that now. > > > > > > > > > > Unfortunately it is complicated and it is not related to > > > > > VIRTIO_F_IOMMU_PLATFORM :-( > > > > > > > > > > > > > > > The Xen subsystem in Linux uses dma_ops via swiotlb_xen to > > > > > translate foreign mappings (memory coming from other VMs) to > physical addresses. > > > > > On x86, it also uses dma_ops to translate Linux's idea of a > > > > > physical address into a real physical address (this is unneeded > > > > > on ARM.) > > > > > > > > > > > > > > > So regardless of VIRTIO_F_IOMMU_PLATFORM, dma_ops should be > used > > > > > on Xen/x86 always and on Xen/ARM if Linux is Dom0 (because it > > > > > has foreign > > > > > mappings.) That is why we have the if (xen_domain) return true; > > > > > in vring_use_dma_api. > > > > > > > > VIRTIO_F_IOMMU_PLATFORM makes guest always use DMA ops. > > > > > > > > Xen hack predates VIRTIO_F_IOMMU_PLATFORM so it *also* forces > DMA > > > > ops even if VIRTIO_F_IOMMU_PLATFORM is clear. > > > > > > > > Unfortunately as a result Xen never got around to properly setting > > > > VIRTIO_F_IOMMU_PLATFORM. > > > > > > I don't think VIRTIO_F_IOMMU_PLATFORM would be correct for this > > > because the usage of swiotlb_xen is not a property of virtio, > > > > > > Basically any device without VIRTIO_F_ACCESS_PLATFORM (that is it's > > name in latest virtio spec, VIRTIO_F_IOMMU_PLATFORM is what linux > > calls it) is declared as "special, don't follow normal rules for > > access". > > > > So yes swiotlb_xen is not a property of virtio, but what *is* a > > property of virtio is that it's not special, just a regular device from DMA > > POV. > > I am trying to understand what you meant but I think I am missing something. > > Are you saying that modern virtio should always have > VIRTIO_F_ACCESS_PLATFORM, hence use normal dma_ops as any other > devices? > > If that is the case, how is it possible that virtio breaks on ARM using the > default dma_ops? The breakage is not Xen related (except that Xen turns > dma_ops on). The original message from Peng was: > > vring_map_one_sg -> vring_use_dma_api >-> dma_map_page > -> __swiotlb_map_page > ->swiotlb_map_page > ->__dma_map_area(phys_to_virt(dma_to_phys(dev, > dev_addr)), size, dir); > However we are using per device dma area for rpmsg, phys_to_virt > could not return a correct virtual address for virtual address in > vmalloc area. Then kernel panic. > > I must be missing something. Maybe it is because it has to do with RPMesg? I am not going to fix the rpmsg issue with this patch. It is when ARM DomU Android os communicate with secure world trusty os using virtio, the vring_use_dma_api will return true for xen domu, but I no need it return true and fall into swiotlb. Thanks, Peng. > > > > > > > You might have noticed that I missed one possible case above: > > > > > Xen/ARM DomU :-) > > > > > > > > > > Xen/ARM domUs don't need swiotlb_xen, it is not even > > > > > initialized. So if > > > > > (xen_domain) return true; would give the wrong answer i
[PATCH] xen: introduce xen_vring_use_dma
Export xen_swiotlb for all platforms using xen swiotlb
Use xen_swiotlb to determine when vring should use dma APIs to map the
ring: when xen_swiotlb is enabled the dma API is required. When it is
disabled, it is not required.
Signed-off-by: Peng Fan
---
V2:
This is a modified version from Stefano's patch
https://lore.kernel.org/patchwork/patch/1033801/#1222404
Note: This is not to address rpmsg virtio issue, this is
to let DomU virtio not using xen swiotlb could use non dma vring
on ARM64 platforms.
arch/arm/xen/mm.c | 1 +
arch/x86/include/asm/xen/swiotlb-xen.h | 2 --
arch/x86/xen/pci-swiotlb-xen.c | 2 --
drivers/virtio/virtio_ring.c | 2 +-
drivers/xen/swiotlb-xen.c | 3 +++
include/xen/swiotlb-xen.h | 6 ++
include/xen/xen.h | 6 ++
7 files changed, 17 insertions(+), 5 deletions(-)
diff --git a/arch/arm/xen/mm.c b/arch/arm/xen/mm.c
index d40e9e5fc52b..6a493ea087f0 100644
--- a/arch/arm/xen/mm.c
+++ b/arch/arm/xen/mm.c
@@ -139,6 +139,7 @@ static int __init xen_mm_init(void)
struct gnttab_cache_flush cflush;
if (!xen_initial_domain())
return 0;
+ xen_swiotlb = 1;
xen_swiotlb_init(1, false);
cflush.op = 0;
diff --git a/arch/x86/include/asm/xen/swiotlb-xen.h
b/arch/x86/include/asm/xen/swiotlb-xen.h
index 6b56d0d45d15..bb5ce02b4e20 100644
--- a/arch/x86/include/asm/xen/swiotlb-xen.h
+++ b/arch/x86/include/asm/xen/swiotlb-xen.h
@@ -3,12 +3,10 @@
#define _ASM_X86_SWIOTLB_XEN_H
#ifdef CONFIG_SWIOTLB_XEN
-extern int xen_swiotlb;
extern int __init pci_xen_swiotlb_detect(void);
extern void __init pci_xen_swiotlb_init(void);
extern int pci_xen_swiotlb_init_late(void);
#else
-#define xen_swiotlb (0)
static inline int __init pci_xen_swiotlb_detect(void) { return 0; }
static inline void __init pci_xen_swiotlb_init(void) { }
static inline int pci_xen_swiotlb_init_late(void) { return -ENXIO; }
diff --git a/arch/x86/xen/pci-swiotlb-xen.c b/arch/x86/xen/pci-swiotlb-xen.c
index 33293ce01d8d..071fbe0e1a91 100644
--- a/arch/x86/xen/pci-swiotlb-xen.c
+++ b/arch/x86/xen/pci-swiotlb-xen.c
@@ -18,8 +18,6 @@
#endif
#include
-int xen_swiotlb __read_mostly;
-
/*
* pci_xen_swiotlb_detect - set xen_swiotlb to 1 if necessary
*
diff --git a/drivers/virtio/virtio_ring.c b/drivers/virtio/virtio_ring.c
index a2de775801af..768afd79f67a 100644
--- a/drivers/virtio/virtio_ring.c
+++ b/drivers/virtio/virtio_ring.c
@@ -252,7 +252,7 @@ static bool vring_use_dma_api(struct virtio_device *vdev)
* the DMA API if we're a Xen guest, which at least allows
* all of the sensible Xen configurations to work correctly.
*/
- if (xen_domain())
+ if (xen_vring_use_dma())
return true;
return false;
diff --git a/drivers/xen/swiotlb-xen.c b/drivers/xen/swiotlb-xen.c
index b6d27762c6f8..25747e72e6fe 100644
--- a/drivers/xen/swiotlb-xen.c
+++ b/drivers/xen/swiotlb-xen.c
@@ -40,6 +40,9 @@
#include
#define MAX_DMA_BITS 32
+
+int xen_swiotlb __read_mostly;
+
/*
* Used to do a quick range check in swiotlb_tbl_unmap_single and
* swiotlb_tbl_sync_single_*, to see if the memory was in fact allocated by
this
diff --git a/include/xen/swiotlb-xen.h b/include/xen/swiotlb-xen.h
index ffc0d3902b71..235babcde848 100644
--- a/include/xen/swiotlb-xen.h
+++ b/include/xen/swiotlb-xen.h
@@ -12,4 +12,10 @@ void xen_dma_sync_for_device(dma_addr_t handle, phys_addr_t
paddr, size_t size,
extern int xen_swiotlb_init(int verbose, bool early);
extern const struct dma_map_ops xen_swiotlb_dma_ops;
+#ifdef CONFIG_SWIOTLB_XEN
+extern int xen_swiotlb;
+#else
+#define xen_swiotlb (0)
+#endif
+
#endif /* __LINUX_SWIOTLB_XEN_H */
diff --git a/include/xen/xen.h b/include/xen/xen.h
index 19a72f591e2b..c51c46f5d739 100644
--- a/include/xen/xen.h
+++ b/include/xen/xen.h
@@ -52,4 +52,10 @@ bool xen_biovec_phys_mergeable(const struct bio_vec *vec1,
extern u64 xen_saved_max_mem_size;
#endif
+#include
+static inline int xen_vring_use_dma(void)
+{
+ return !!xen_swiotlb;
+}
+
#endif /* _XEN_XEN_H */
--
2.16.4
[PATCH] fs/read_write.c: Fix memory leak in read_write.c
kmemleak report: unreferenced object 0x9802bb591d00 (size 256): comm "ftest03", pid 24778, jiffies 4301603810 (age 490.665s) hex dump (first 32 bytes): 00 01 04 20 01 00 00 00 80 00 00 00 00 00 00 00 ... f0 02 04 20 01 00 00 00 80 00 00 00 00 00 00 00 ... backtrace: [<50b162cb>] __kmalloc+0x234/0x438 [<491da9c7>] rw_copy_check_uvector+0x1ac/0x1f0 [<b0dddb43>] import_iovec+0x50/0xe8 [<ae843d73>] vfs_readv+0x50/0xb0 [<c7216b06>] do_readv+0x80/0x160 [<cad79c3f>] syscall_common+0x34/0x58 This is because "iov" allocated by kmalloc() is not destroyed. Under normal circumstances, "ret_pointer" should be equal to "iov". But if the previous statements fails to execute, and the allocation is successful, then the block of memory will not be released, because it is necessary to determine whether they are equal. So we need to change the order. Signed-off-by: Peng Fan --- fs/read_write.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/fs/read_write.c b/fs/read_write.c index bbfa9b1..aa4f7c5 100644 --- a/fs/read_write.c +++ b/fs/read_write.c @@ -832,8 +832,8 @@ ssize_t rw_copy_check_uvector(int type, const struct iovec __user * uvector, } ret += len; } -out: *ret_pointer = iov; +out: return ret; } -- 2.1.0
RE: [PATCH 2/3] arm64: dts: imx8qxp: add i2c aliases
Hi Shawn,
> Subject: Re: [PATCH 2/3] arm64: dts: imx8qxp: add i2c aliases
>
> On Mon, Jun 01, 2020 at 10:06:19AM +0800, peng@nxp.com wrote:
> > From: Peng Fan
> >
> > The devices could be enumerated properly with aliases.
> >
> > Signed-off-by: Peng Fan
> > ---
> > arch/arm64/boot/dts/freescale/imx8qxp.dtsi | 4
> > 1 file changed, 4 insertions(+)
> >
> > diff --git a/arch/arm64/boot/dts/freescale/imx8qxp.dtsi
> > b/arch/arm64/boot/dts/freescale/imx8qxp.dtsi
> > index 33363c127478..8ce997110cd6 100644
> > --- a/arch/arm64/boot/dts/freescale/imx8qxp.dtsi
> > +++ b/arch/arm64/boot/dts/freescale/imx8qxp.dtsi
> > @@ -19,6 +19,10 @@
> > #size-cells = <2>;
> >
> > aliases {
> > + i2c0 = _i2c0;
> > + i2c1 = _i2c1;
> > + i2c2 = _i2c2;
> > + i2c3 = _i2c3;
>
> Had a second look. It breaks alphabetical order. So dropped the series.
V2 has this addressed.
https://patchwork.kernel.org/cover/11619867/
Thanks,
Peng.
>
> Shawn
>
> > gpio0 = _gpio0;
> > gpio1 = _gpio1;
> > gpio2 = _gpio2;
> > --
> > 2.16.4
> >
[PATCH V2 0/3] arm64: dts: imx8qxp: dtb aliases fix/update
From: Peng Fan V2: Fix order in patch 2/3, no other changes Minor patchset to fix and update alias for i.MX8QXP Peng Fan (3): arm64: dts: imx8qxp: add alias for lsio MU arm64: dts: imx8qxp: add i2c aliases arm64: dts: imx8qxp: Add ethernet alias arch/arm64/boot/dts/freescale/imx8qxp.dtsi | 10 ++ 1 file changed, 10 insertions(+) -- 2.16.4
[PATCH V2 1/3] arm64: dts: imx8qxp: add alias for lsio MU
From: Peng Fan Add lsio mu alias for all lsio MUs that could communicate with SCU, imx_scu_enable_general_irq_channel will parse the alias to get the mu resource id, if using other MU, not MU1, the `mu_resource_id` is not what we expect, so add alias to fix this issue. Signed-off-by: Peng Fan --- arch/arm64/boot/dts/freescale/imx8qxp.dtsi | 4 1 file changed, 4 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/imx8qxp.dtsi b/arch/arm64/boot/dts/freescale/imx8qxp.dtsi index d1c3c98e4b39..33363c127478 100644 --- a/arch/arm64/boot/dts/freescale/imx8qxp.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8qxp.dtsi @@ -30,7 +30,11 @@ mmc0 = mmc1 = mmc2 = + mu0 = _mu0; mu1 = _mu1; + mu2 = _mu2; + mu3 = _mu3; + mu4 = _mu4; serial0 = _lpuart0; serial1 = _lpuart1; serial2 = _lpuart2; -- 2.16.4
[PATCH V2 2/3] arm64: dts: imx8qxp: add i2c aliases
From: Peng Fan The devices could be enumerated properly with aliases. Signed-off-by: Peng Fan --- arch/arm64/boot/dts/freescale/imx8qxp.dtsi | 4 1 file changed, 4 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/imx8qxp.dtsi b/arch/arm64/boot/dts/freescale/imx8qxp.dtsi index 33363c127478..3b2fada99c09 100644 --- a/arch/arm64/boot/dts/freescale/imx8qxp.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8qxp.dtsi @@ -27,6 +27,10 @@ gpio5 = _gpio5; gpio6 = _gpio6; gpio7 = _gpio7; + i2c0 = _i2c0; + i2c1 = _i2c1; + i2c2 = _i2c2; + i2c3 = _i2c3; mmc0 = mmc1 = mmc2 = -- 2.16.4
[PATCH V2 3/3] arm64: dts: imx8qxp: Add ethernet alias
From: Peng Fan
Add ethernet alias, so bootloader code can use this to find the
primary ethernet device, and set the MAC address.
Signed-off-by: Peng Fan
---
arch/arm64/boot/dts/freescale/imx8qxp.dtsi | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8qxp.dtsi
b/arch/arm64/boot/dts/freescale/imx8qxp.dtsi
index 3b2fada99c09..e46faac1fe71 100644
--- a/arch/arm64/boot/dts/freescale/imx8qxp.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8qxp.dtsi
@@ -19,6 +19,8 @@
#size-cells = <2>;
aliases {
+ ethernet0 =
+ ethernet1 =
gpio0 = _gpio0;
gpio1 = _gpio1;
gpio2 = _gpio2;
--
2.16.4
[PATCH] tools: PCI: Fix memory leak in run_test
We should free "test" before the return of run_test.
Signed-off-by: Peng Fan
---
tools/pci/pcitest.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/tools/pci/pcitest.c b/tools/pci/pcitest.c
index 0a1344c..7c20332 100644
--- a/tools/pci/pcitest.c
+++ b/tools/pci/pcitest.c
@@ -47,6 +47,7 @@ static int run_test(struct pci_test *test)
fd = open(test->device, O_RDWR);
if (fd < 0) {
perror("can't open PCI Endpoint Test device");
+ free(test);
return -ENODEV;
}
@@ -151,6 +152,7 @@ static int run_test(struct pci_test *test)
fflush(stdout);
close(fd);
+ free(test);
return (ret < 0) ? ret : 1 - ret; /* return 0 if test succeeded */
}
--
2.1.0
[PATCH V3 0/3] firmware: imx: fix/update cm4 and add resource check
From: Peng Fan V3: Fix comments Add R-b tag V2: Add R-b tag Drop patch 3/4 from V1 Add comments and update Copyright for patch 2/3 keep code consistency in Patch 3/3 V1: https://patchwork.kernel.org/cover/11505045/ Fix cm40 power domain, update to add more cm4 resources Add resource owner check, to not register if not owned by Linux. Peng Fan (3): firmware: imx: scu-pd: fix cm40 power domain firmware: imx: add resource management api firmware: imx: scu-pd: add more cm4 resources drivers/firmware/imx/Makefile | 2 +- drivers/firmware/imx/rm.c | 45 drivers/firmware/imx/scu-pd.c | 14 ++-- include/linux/firmware/imx/sci.h| 1 + include/linux/firmware/imx/svc/rm.h | 69 + 5 files changed, 128 insertions(+), 3 deletions(-) create mode 100644 drivers/firmware/imx/rm.c create mode 100644 include/linux/firmware/imx/svc/rm.h -- 2.16.4
[PATCH V3 3/3] firmware: imx: scu-pd: add more cm4 resources
From: Peng Fan
Add more cm4 resources, then linux could use cm4's i2c/lpuart and
could kick cm4 core.
Reviewed-by: Dong Aisheng
Signed-off-by: Peng Fan
---
drivers/firmware/imx/scu-pd.c | 14 --
1 file changed, 12 insertions(+), 2 deletions(-)
diff --git a/drivers/firmware/imx/scu-pd.c b/drivers/firmware/imx/scu-pd.c
index d1b313fa7b96..af3d6d9ead28 100644
--- a/drivers/firmware/imx/scu-pd.c
+++ b/drivers/firmware/imx/scu-pd.c
@@ -167,8 +167,18 @@ static const struct imx_sc_pd_range
imx8qxp_scu_pd_ranges[] = {
{ "dc0-pll", IMX_SC_R_DC_0_PLL_0, 2, true, 0 },
/* CM40 SS */
- { "cm40_i2c", IMX_SC_R_M4_0_I2C, 1, false, 0 },
- { "cm40_intmux", IMX_SC_R_M4_0_INTMUX, 1, false, 0 },
+ { "cm40-i2c", IMX_SC_R_M4_0_I2C, 1, false, 0 },
+ { "cm40-intmux", IMX_SC_R_M4_0_INTMUX, 1, false, 0 },
+ { "cm40-pid", IMX_SC_R_M4_0_PID0, 5, true, 0},
+ { "cm40-mu-a1", IMX_SC_R_M4_0_MU_1A, 1, false, 0},
+ { "cm40-lpuart", IMX_SC_R_M4_0_UART, 1, false, 0},
+
+ /* CM41 SS */
+ { "cm41-i2c", IMX_SC_R_M4_1_I2C, 1, false, 0 },
+ { "cm41-intmux", IMX_SC_R_M4_1_INTMUX, 1, false, 0 },
+ { "cm41-pid", IMX_SC_R_M4_1_PID0, 5, true, 0},
+ { "cm41-mu-a1", IMX_SC_R_M4_1_MU_1A, 1, false, 0},
+ { "cm41-lpuart", IMX_SC_R_M4_1_UART, 1, false, 0},
};
static const struct imx_sc_pd_soc imx8qxp_scu_pd = {
--
2.16.4
[PATCH V3 1/3] firmware: imx: scu-pd: fix cm40 power domain
From: Peng Fan
The postfix needs to be false. Alought compiler use 0 for postfix now,
and take start_from as 0, it is better we add explicit false to postfix.
Fixes: 705dcca91d0a("firmware: imx: scu-pd: add power domain for I2C and INTMUX
in CM40 SS")
Signed-off-by: Peng Fan
Reviewed-by: Dong Aisheng
---
drivers/firmware/imx/scu-pd.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/firmware/imx/scu-pd.c b/drivers/firmware/imx/scu-pd.c
index fb5523aa16ee..d1b313fa7b96 100644
--- a/drivers/firmware/imx/scu-pd.c
+++ b/drivers/firmware/imx/scu-pd.c
@@ -167,8 +167,8 @@ static const struct imx_sc_pd_range imx8qxp_scu_pd_ranges[]
= {
{ "dc0-pll", IMX_SC_R_DC_0_PLL_0, 2, true, 0 },
/* CM40 SS */
- { "cm40_i2c", IMX_SC_R_M4_0_I2C, 1, 0 },
- { "cm40_intmux", IMX_SC_R_M4_0_INTMUX, 1, 0 },
+ { "cm40_i2c", IMX_SC_R_M4_0_I2C, 1, false, 0 },
+ { "cm40_intmux", IMX_SC_R_M4_0_INTMUX, 1, false, 0 },
};
static const struct imx_sc_pd_soc imx8qxp_scu_pd = {
--
2.16.4
[PATCH V3 2/3] firmware: imx: add resource management api
From: Peng Fan
Add resource management API, when we have multiple
partition running together, resources not owned to current
partition should not be used.
Reviewed-by: Leonard Crestez
Reviewed-by: Dong Aisheng
Signed-off-by: Peng Fan
---
drivers/firmware/imx/Makefile | 2 +-
drivers/firmware/imx/rm.c | 45
include/linux/firmware/imx/sci.h| 1 +
include/linux/firmware/imx/svc/rm.h | 69 +
4 files changed, 116 insertions(+), 1 deletion(-)
create mode 100644 drivers/firmware/imx/rm.c
create mode 100644 include/linux/firmware/imx/svc/rm.h
diff --git a/drivers/firmware/imx/Makefile b/drivers/firmware/imx/Makefile
index 08bc9ddfbdfb..17ea3613e142 100644
--- a/drivers/firmware/imx/Makefile
+++ b/drivers/firmware/imx/Makefile
@@ -1,4 +1,4 @@
# SPDX-License-Identifier: GPL-2.0
obj-$(CONFIG_IMX_DSP) += imx-dsp.o
-obj-$(CONFIG_IMX_SCU) += imx-scu.o misc.o imx-scu-irq.o
+obj-$(CONFIG_IMX_SCU) += imx-scu.o misc.o imx-scu-irq.o rm.o
obj-$(CONFIG_IMX_SCU_PD) += scu-pd.o
diff --git a/drivers/firmware/imx/rm.c b/drivers/firmware/imx/rm.c
new file mode 100644
index ..a12db6ff323b
--- /dev/null
+++ b/drivers/firmware/imx/rm.c
@@ -0,0 +1,45 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2020 NXP
+ *
+ * File containing client-side RPC functions for the RM service. These
+ * function are ported to clients that communicate to the SC.
+ */
+
+#include
+
+struct imx_sc_msg_rm_rsrc_owned {
+ struct imx_sc_rpc_msg hdr;
+ u16 resource;
+} __packed __aligned(4);
+
+/*
+ * This function check @resource is owned by current partition or not
+ *
+ * @param[in] ipc IPC handle
+ * @param[in] resourceresource the control is associated with
+ *
+ * @return Returns 0 for not owned and 1 for owned.
+ */
+bool imx_sc_rm_is_resource_owned(struct imx_sc_ipc *ipc, u16 resource)
+{
+ struct imx_sc_msg_rm_rsrc_owned msg;
+ struct imx_sc_rpc_msg *hdr =
+
+ hdr->ver = IMX_SC_RPC_VERSION;
+ hdr->svc = IMX_SC_RPC_SVC_RM;
+ hdr->func = IMX_SC_RM_FUNC_IS_RESOURCE_OWNED;
+ hdr->size = 2;
+
+ msg.resource = resource;
+
+ /*
+* SCU firmware only returns value 0 or 1
+* for resource owned check which means not owned or owned.
+* So it is always successful.
+*/
+ imx_scu_call_rpc(ipc, , true);
+
+ return hdr->func;
+}
+EXPORT_SYMBOL(imx_sc_rm_is_resource_owned);
diff --git a/include/linux/firmware/imx/sci.h b/include/linux/firmware/imx/sci.h
index 3fa418a4ca67..3c459f54a88f 100644
--- a/include/linux/firmware/imx/sci.h
+++ b/include/linux/firmware/imx/sci.h
@@ -14,6 +14,7 @@
#include
#include
+#include
int imx_scu_enable_general_irq_channel(struct device *dev);
int imx_scu_irq_register_notifier(struct notifier_block *nb);
diff --git a/include/linux/firmware/imx/svc/rm.h
b/include/linux/firmware/imx/svc/rm.h
new file mode 100644
index ..456b6a59d29b
--- /dev/null
+++ b/include/linux/firmware/imx/svc/rm.h
@@ -0,0 +1,69 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright (C) 2016 Freescale Semiconductor, Inc.
+ * Copyright 2017-2020 NXP
+ *
+ * Header file containing the public API for the System Controller (SC)
+ * Resource Management (RM) function. This includes functions for
+ * partitioning resources, pads, and memory regions.
+ *
+ * RM_SVC (SVC) Resource Management Service
+ *
+ * Module for the Resource Management (RM) service.
+ */
+
+#ifndef _SC_RM_API_H
+#define _SC_RM_API_H
+
+#include
+
+/*
+ * This type is used to indicate RPC RM function calls.
+ */
+enum imx_sc_rm_func {
+ IMX_SC_RM_FUNC_UNKNOWN = 0,
+ IMX_SC_RM_FUNC_PARTITION_ALLOC = 1,
+ IMX_SC_RM_FUNC_SET_CONFIDENTIAL = 31,
+ IMX_SC_RM_FUNC_PARTITION_FREE = 2,
+ IMX_SC_RM_FUNC_GET_DID = 26,
+ IMX_SC_RM_FUNC_PARTITION_STATIC = 3,
+ IMX_SC_RM_FUNC_PARTITION_LOCK = 4,
+ IMX_SC_RM_FUNC_GET_PARTITION = 5,
+ IMX_SC_RM_FUNC_SET_PARENT = 6,
+ IMX_SC_RM_FUNC_MOVE_ALL = 7,
+ IMX_SC_RM_FUNC_ASSIGN_RESOURCE = 8,
+ IMX_SC_RM_FUNC_SET_RESOURCE_MOVABLE = 9,
+ IMX_SC_RM_FUNC_SET_SUBSYS_RSRC_MOVABLE = 28,
+ IMX_SC_RM_FUNC_SET_MASTER_ATTRIBUTES = 10,
+ IMX_SC_RM_FUNC_SET_MASTER_SID = 11,
+ IMX_SC_RM_FUNC_SET_PERIPHERAL_PERMISSIONS = 12,
+ IMX_SC_RM_FUNC_IS_RESOURCE_OWNED = 13,
+ IMX_SC_RM_FUNC_GET_RESOURCE_OWNER = 33,
+ IMX_SC_RM_FUNC_IS_RESOURCE_MASTER = 14,
+ IMX_SC_RM_FUNC_IS_RESOURCE_PERIPHERAL = 15,
+ IMX_SC_RM_FUNC_GET_RESOURCE_INFO = 16,
+ IMX_SC_RM_FUNC_MEMREG_ALLOC = 17,
+ IMX_SC_RM_FUNC_MEMREG_SPLIT = 29,
+ IMX_SC_RM_FUNC_MEMREG_FRAG = 32,
+ IMX_SC_RM_FUNC_MEMREG_FREE = 18,
+ IMX_SC_RM_FUNC_FIND_MEMREG = 30,
+ IMX_SC_RM_FUNC_ASSIGN_MEMREG = 19,
+ IMX_SC_RM_FUNC_SET_MEMREG_PERMISSIONS = 20,
+ IMX_SC_RM_FUNC_
RE: [PATCH V2 2/3] firmware: imx: add resource management api
> Subject: RE: [PATCH V2 2/3] firmware: imx: add resource management api > [...] > > +/* > > + * Copyright (C) 2016 Freescale Semiconductor, Inc. > > + * Copyright 2017-2020 NXP > > + * > > + * Header file containing the public API for the System Controller > > +(SC) > > + * Power Management (PM) function. This includes functions for power > > +state > > + * control, clock control, reset control, and wake-up event control. > > Fix the code comments. Oops, forgot this comment in v1. Will fix in v3. Thanks, Peng. > Otherwise: > Dong Aisheng > > Regards > Aisheng
[PATCH] soc: imx: scu: use devm_kasprintf
From: Peng Fan
Use devm_kasprintf to simplify code
Signed-off-by: Peng Fan
---
drivers/soc/imx/soc-imx-scu.c | 37 +++--
1 file changed, 11 insertions(+), 26 deletions(-)
diff --git a/drivers/soc/imx/soc-imx-scu.c b/drivers/soc/imx/soc-imx-scu.c
index 20d37eaeb5f2..92448ca9a6f8 100644
--- a/drivers/soc/imx/soc-imx-scu.c
+++ b/drivers/soc/imx/soc-imx-scu.c
@@ -115,43 +115,28 @@ static int imx_scu_soc_probe(struct platform_device *pdev)
/* format soc_id value passed from SCU firmware */
val = id & 0x1f;
- soc_dev_attr->soc_id = kasprintf(GFP_KERNEL, "0x%x", val);
+ soc_dev_attr->soc_id = devm_kasprintf(>dev, GFP_KERNEL, "0x%x",
val);
if (!soc_dev_attr->soc_id)
return -ENOMEM;
/* format revision value passed from SCU firmware */
val = (id >> 5) & 0xf;
val = (((val >> 2) + 1) << 4) | (val & 0x3);
- soc_dev_attr->revision = kasprintf(GFP_KERNEL,
- "%d.%d",
- (val >> 4) & 0xf,
- val & 0xf);
- if (!soc_dev_attr->revision) {
- ret = -ENOMEM;
- goto free_soc_id;
- }
+ soc_dev_attr->revision = devm_kasprintf(>dev, GFP_KERNEL, "%d.%d",
+ (val >> 4) & 0xf, val & 0xf);
+ if (!soc_dev_attr->revision)
+ return -ENOMEM;
- soc_dev_attr->serial_number = kasprintf(GFP_KERNEL, "%016llX", uid);
- if (!soc_dev_attr->serial_number) {
- ret = -ENOMEM;
- goto free_revision;
- }
+ soc_dev_attr->serial_number = devm_kasprintf(>dev, GFP_KERNEL,
+"%016llX", uid);
+ if (!soc_dev_attr->serial_number)
+ return -ENOMEM;
soc_dev = soc_device_register(soc_dev_attr);
- if (IS_ERR(soc_dev)) {
- ret = PTR_ERR(soc_dev);
- goto free_serial_number;
- }
+ if (IS_ERR(soc_dev))
+ return PTR_ERR(soc_dev);
return 0;
-
-free_serial_number:
- kfree(soc_dev_attr->serial_number);
-free_revision:
- kfree(soc_dev_attr->revision);
-free_soc_id:
- kfree(soc_dev_attr->soc_id);
- return ret;
}
static struct platform_driver imx_scu_soc_driver = {
--
2.16.4
[PATCH V4 1/2] arm64: dts: imx8m: add mu node
From: Peng Fan
Add mu node to let A53 could communicate with M Core.
Reviewed-by: Dong Aisheng
Signed-off-by: Peng Fan
---
arch/arm64/boot/dts/freescale/imx8mm.dtsi | 8
arch/arm64/boot/dts/freescale/imx8mn.dtsi | 8
arch/arm64/boot/dts/freescale/imx8mp.dtsi | 8
arch/arm64/boot/dts/freescale/imx8mq.dtsi | 8
4 files changed, 32 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8mm.dtsi
b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
index aaf6e71101a1..d9e787ea246f 100644
--- a/arch/arm64/boot/dts/freescale/imx8mm.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
@@ -775,6 +775,14 @@
status = "disabled";
};
+ mu: mailbox@30aa {
+ compatible = "fsl,imx8mm-mu", "fsl,imx6sx-mu";
+ reg = <0x30aa 0x1>;
+ interrupts = ;
+ clocks = < IMX8MM_CLK_MU_ROOT>;
+ #mbox-cells = <2>;
+ };
+
usdhc1: mmc@30b4 {
compatible = "fsl,imx8mm-usdhc",
"fsl,imx7d-usdhc";
reg = <0x30b4 0x1>;
diff --git a/arch/arm64/boot/dts/freescale/imx8mn.dtsi
b/arch/arm64/boot/dts/freescale/imx8mn.dtsi
index 9a4b65a267d4..3dca1fb34ea3 100644
--- a/arch/arm64/boot/dts/freescale/imx8mn.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mn.dtsi
@@ -675,6 +675,14 @@
status = "disabled";
};
+ mu: mailbox@30aa {
+ compatible = "fsl,imx8mn-mu", "fsl,imx6sx-mu";
+ reg = <0x30aa 0x1>;
+ interrupts = ;
+ clocks = < IMX8MN_CLK_MU_ROOT>;
+ #mbox-cells = <2>;
+ };
+
usdhc1: mmc@30b4 {
compatible = "fsl,imx8mn-usdhc",
"fsl,imx7d-usdhc";
reg = <0x30b4 0x1>;
diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
index 45e2c0a4e889..1bc14bb44d90 100644
--- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
@@ -621,6 +621,14 @@
status = "disabled";
};
+ mu: mailbox@30aa {
+ compatible = "fsl,imx8mp-mu", "fsl,imx6sx-mu";
+ reg = <0x30aa 0x1>;
+ interrupts = ;
+ clocks = < IMX8MP_CLK_MU_ROOT>;
+ #mbox-cells = <2>;
+ };
+
i2c5: i2c@30ad {
compatible = "fsl,imx8mp-i2c", "fsl,imx21-i2c";
#address-cells = <1>;
diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi
b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
index 978f8122c0d2..3e762919d61f 100644
--- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
@@ -959,6 +959,14 @@
status = "disabled";
};
+ mu: mailbox@30aa {
+ compatible = "fsl,imx8mq-mu", "fsl,imx6sx-mu";
+ reg = <0x30aa 0x1>;
+ interrupts = ;
+ clocks = < IMX8MQ_CLK_MU_ROOT>;
+ #mbox-cells = <2>;
+ };
+
usdhc1: mmc@30b4 {
compatible = "fsl,imx8mq-usdhc",
"fsl,imx7d-usdhc";
--
2.16.4
[PATCH V4 2/2] clk: imx8mp: add mu root clk
From: Peng Fan
Add mu root clk for mu mailbox usage.
Reviewed-by: Dong Aisheng
Signed-off-by: Peng Fan
---
drivers/clk/imx/clk-imx8mp.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/clk/imx/clk-imx8mp.c b/drivers/clk/imx/clk-imx8mp.c
index b4d9db9d5bf1..ca747712400f 100644
--- a/drivers/clk/imx/clk-imx8mp.c
+++ b/drivers/clk/imx/clk-imx8mp.c
@@ -680,6 +680,7 @@ static int imx8mp_clocks_probe(struct platform_device *pdev)
hws[IMX8MP_CLK_I2C2_ROOT] = imx_clk_hw_gate4("i2c2_root_clk", "i2c2",
ccm_base + 0x4180, 0);
hws[IMX8MP_CLK_I2C3_ROOT] = imx_clk_hw_gate4("i2c3_root_clk", "i2c3",
ccm_base + 0x4190, 0);
hws[IMX8MP_CLK_I2C4_ROOT] = imx_clk_hw_gate4("i2c4_root_clk", "i2c4",
ccm_base + 0x41a0, 0);
+ hws[IMX8MP_CLK_MU_ROOT] = imx_clk_hw_gate4("mu_root_clk", "ipg_root",
ccm_base + 0x4210, 0);
hws[IMX8MP_CLK_OCOTP_ROOT] = imx_clk_hw_gate4("ocotp_root_clk",
"ipg_root", ccm_base + 0x4220, 0);
hws[IMX8MP_CLK_PCIE_ROOT] = imx_clk_hw_gate4("pcie_root_clk",
"pcie_aux", ccm_base + 0x4250, 0);
hws[IMX8MP_CLK_PWM1_ROOT] = imx_clk_hw_gate4("pwm1_root_clk", "pwm1",
ccm_base + 0x4280, 0);
--
2.16.4
[PATCH V4 0/2] imx8m: add mu support
From: Peng Fan V4: Drop patch 1/3, since https://lkml.org/lkml/2020/6/1/370 already has the yaml changes V3: Add R-b tag Remove undocumented property V2: Add dt-bindings Merge dts changes into one patch, since all is to add mu node Add mu dt bindings Add mu node Add i.MX8MP mu root clk Peng Fan (2): arm64: dts: imx8m: add mu node clk: imx8mp: add mu root clk arch/arm64/boot/dts/freescale/imx8mm.dtsi | 8 arch/arm64/boot/dts/freescale/imx8mn.dtsi | 8 arch/arm64/boot/dts/freescale/imx8mp.dtsi | 8 arch/arm64/boot/dts/freescale/imx8mq.dtsi | 8 drivers/clk/imx/clk-imx8mp.c | 1 + 5 files changed, 33 insertions(+) -- 2.16.4
[PATCH V2 1/3] firmware: imx: scu-pd: fix cm40 power domain
From: Peng Fan
The postfix needs to be false. Alought compiler use 0 for postfix now,
and take start_from as 0, it is better we add explicit false to postfix.
Fixes: 705dcca91d0a("firmware: imx: scu-pd: add power domain for I2C and INTMUX
in CM40 SS")
Signed-off-by: Peng Fan
Reviewed-by: Dong Aisheng
---
drivers/firmware/imx/scu-pd.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/firmware/imx/scu-pd.c b/drivers/firmware/imx/scu-pd.c
index fb5523aa16ee..d1b313fa7b96 100644
--- a/drivers/firmware/imx/scu-pd.c
+++ b/drivers/firmware/imx/scu-pd.c
@@ -167,8 +167,8 @@ static const struct imx_sc_pd_range imx8qxp_scu_pd_ranges[]
= {
{ "dc0-pll", IMX_SC_R_DC_0_PLL_0, 2, true, 0 },
/* CM40 SS */
- { "cm40_i2c", IMX_SC_R_M4_0_I2C, 1, 0 },
- { "cm40_intmux", IMX_SC_R_M4_0_INTMUX, 1, 0 },
+ { "cm40_i2c", IMX_SC_R_M4_0_I2C, 1, false, 0 },
+ { "cm40_intmux", IMX_SC_R_M4_0_INTMUX, 1, false, 0 },
};
static const struct imx_sc_pd_soc imx8qxp_scu_pd = {
--
2.16.4
[PATCH V2 2/3] firmware: imx: add resource management api
From: Peng Fan
Add resource management API, when we have multiple
partition running together, resources not owned to current
partition should not be used.
Reviewed-by: Leonard Crestez
Signed-off-by: Peng Fan
---
drivers/firmware/imx/Makefile | 2 +-
drivers/firmware/imx/rm.c | 45
include/linux/firmware/imx/sci.h| 1 +
include/linux/firmware/imx/svc/rm.h | 69 +
4 files changed, 116 insertions(+), 1 deletion(-)
create mode 100644 drivers/firmware/imx/rm.c
create mode 100644 include/linux/firmware/imx/svc/rm.h
diff --git a/drivers/firmware/imx/Makefile b/drivers/firmware/imx/Makefile
index 08bc9ddfbdfb..17ea3613e142 100644
--- a/drivers/firmware/imx/Makefile
+++ b/drivers/firmware/imx/Makefile
@@ -1,4 +1,4 @@
# SPDX-License-Identifier: GPL-2.0
obj-$(CONFIG_IMX_DSP) += imx-dsp.o
-obj-$(CONFIG_IMX_SCU) += imx-scu.o misc.o imx-scu-irq.o
+obj-$(CONFIG_IMX_SCU) += imx-scu.o misc.o imx-scu-irq.o rm.o
obj-$(CONFIG_IMX_SCU_PD) += scu-pd.o
diff --git a/drivers/firmware/imx/rm.c b/drivers/firmware/imx/rm.c
new file mode 100644
index ..a12db6ff323b
--- /dev/null
+++ b/drivers/firmware/imx/rm.c
@@ -0,0 +1,45 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2020 NXP
+ *
+ * File containing client-side RPC functions for the RM service. These
+ * function are ported to clients that communicate to the SC.
+ */
+
+#include
+
+struct imx_sc_msg_rm_rsrc_owned {
+ struct imx_sc_rpc_msg hdr;
+ u16 resource;
+} __packed __aligned(4);
+
+/*
+ * This function check @resource is owned by current partition or not
+ *
+ * @param[in] ipc IPC handle
+ * @param[in] resourceresource the control is associated with
+ *
+ * @return Returns 0 for not owned and 1 for owned.
+ */
+bool imx_sc_rm_is_resource_owned(struct imx_sc_ipc *ipc, u16 resource)
+{
+ struct imx_sc_msg_rm_rsrc_owned msg;
+ struct imx_sc_rpc_msg *hdr =
+
+ hdr->ver = IMX_SC_RPC_VERSION;
+ hdr->svc = IMX_SC_RPC_SVC_RM;
+ hdr->func = IMX_SC_RM_FUNC_IS_RESOURCE_OWNED;
+ hdr->size = 2;
+
+ msg.resource = resource;
+
+ /*
+* SCU firmware only returns value 0 or 1
+* for resource owned check which means not owned or owned.
+* So it is always successful.
+*/
+ imx_scu_call_rpc(ipc, , true);
+
+ return hdr->func;
+}
+EXPORT_SYMBOL(imx_sc_rm_is_resource_owned);
diff --git a/include/linux/firmware/imx/sci.h b/include/linux/firmware/imx/sci.h
index 3fa418a4ca67..3c459f54a88f 100644
--- a/include/linux/firmware/imx/sci.h
+++ b/include/linux/firmware/imx/sci.h
@@ -14,6 +14,7 @@
#include
#include
+#include
int imx_scu_enable_general_irq_channel(struct device *dev);
int imx_scu_irq_register_notifier(struct notifier_block *nb);
diff --git a/include/linux/firmware/imx/svc/rm.h
b/include/linux/firmware/imx/svc/rm.h
new file mode 100644
index ..9924216f3e45
--- /dev/null
+++ b/include/linux/firmware/imx/svc/rm.h
@@ -0,0 +1,69 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright (C) 2016 Freescale Semiconductor, Inc.
+ * Copyright 2017-2020 NXP
+ *
+ * Header file containing the public API for the System Controller (SC)
+ * Power Management (PM) function. This includes functions for power state
+ * control, clock control, reset control, and wake-up event control.
+ *
+ * RM_SVC (SVC) Resource Management Service
+ *
+ * Module for the Resource Management (RM) service.
+ */
+
+#ifndef _SC_RM_API_H
+#define _SC_RM_API_H
+
+#include
+
+/*
+ * This type is used to indicate RPC RM function calls.
+ */
+enum imx_sc_rm_func {
+ IMX_SC_RM_FUNC_UNKNOWN = 0,
+ IMX_SC_RM_FUNC_PARTITION_ALLOC = 1,
+ IMX_SC_RM_FUNC_SET_CONFIDENTIAL = 31,
+ IMX_SC_RM_FUNC_PARTITION_FREE = 2,
+ IMX_SC_RM_FUNC_GET_DID = 26,
+ IMX_SC_RM_FUNC_PARTITION_STATIC = 3,
+ IMX_SC_RM_FUNC_PARTITION_LOCK = 4,
+ IMX_SC_RM_FUNC_GET_PARTITION = 5,
+ IMX_SC_RM_FUNC_SET_PARENT = 6,
+ IMX_SC_RM_FUNC_MOVE_ALL = 7,
+ IMX_SC_RM_FUNC_ASSIGN_RESOURCE = 8,
+ IMX_SC_RM_FUNC_SET_RESOURCE_MOVABLE = 9,
+ IMX_SC_RM_FUNC_SET_SUBSYS_RSRC_MOVABLE = 28,
+ IMX_SC_RM_FUNC_SET_MASTER_ATTRIBUTES = 10,
+ IMX_SC_RM_FUNC_SET_MASTER_SID = 11,
+ IMX_SC_RM_FUNC_SET_PERIPHERAL_PERMISSIONS = 12,
+ IMX_SC_RM_FUNC_IS_RESOURCE_OWNED = 13,
+ IMX_SC_RM_FUNC_GET_RESOURCE_OWNER = 33,
+ IMX_SC_RM_FUNC_IS_RESOURCE_MASTER = 14,
+ IMX_SC_RM_FUNC_IS_RESOURCE_PERIPHERAL = 15,
+ IMX_SC_RM_FUNC_GET_RESOURCE_INFO = 16,
+ IMX_SC_RM_FUNC_MEMREG_ALLOC = 17,
+ IMX_SC_RM_FUNC_MEMREG_SPLIT = 29,
+ IMX_SC_RM_FUNC_MEMREG_FRAG = 32,
+ IMX_SC_RM_FUNC_MEMREG_FREE = 18,
+ IMX_SC_RM_FUNC_FIND_MEMREG = 30,
+ IMX_SC_RM_FUNC_ASSIGN_MEMREG = 19,
+ IMX_SC_RM_FUNC_SET_MEMREG_PERMISSIONS = 20,
+ IMX_SC_RM_FUNC_
[PATCH V2 3/3] firmware: imx: scu-pd: add more cm4 resources
From: Peng Fan
Add more cm4 resources, then linux could use cm4's i2c/lpuart and
could kick cm4 core.
Reviewed-by: Dong Aisheng
Signed-off-by: Peng Fan
---
drivers/firmware/imx/scu-pd.c | 14 --
1 file changed, 12 insertions(+), 2 deletions(-)
diff --git a/drivers/firmware/imx/scu-pd.c b/drivers/firmware/imx/scu-pd.c
index d1b313fa7b96..af3d6d9ead28 100644
--- a/drivers/firmware/imx/scu-pd.c
+++ b/drivers/firmware/imx/scu-pd.c
@@ -167,8 +167,18 @@ static const struct imx_sc_pd_range
imx8qxp_scu_pd_ranges[] = {
{ "dc0-pll", IMX_SC_R_DC_0_PLL_0, 2, true, 0 },
/* CM40 SS */
- { "cm40_i2c", IMX_SC_R_M4_0_I2C, 1, false, 0 },
- { "cm40_intmux", IMX_SC_R_M4_0_INTMUX, 1, false, 0 },
+ { "cm40-i2c", IMX_SC_R_M4_0_I2C, 1, false, 0 },
+ { "cm40-intmux", IMX_SC_R_M4_0_INTMUX, 1, false, 0 },
+ { "cm40-pid", IMX_SC_R_M4_0_PID0, 5, true, 0},
+ { "cm40-mu-a1", IMX_SC_R_M4_0_MU_1A, 1, false, 0},
+ { "cm40-lpuart", IMX_SC_R_M4_0_UART, 1, false, 0},
+
+ /* CM41 SS */
+ { "cm41-i2c", IMX_SC_R_M4_1_I2C, 1, false, 0 },
+ { "cm41-intmux", IMX_SC_R_M4_1_INTMUX, 1, false, 0 },
+ { "cm41-pid", IMX_SC_R_M4_1_PID0, 5, true, 0},
+ { "cm41-mu-a1", IMX_SC_R_M4_1_MU_1A, 1, false, 0},
+ { "cm41-lpuart", IMX_SC_R_M4_1_UART, 1, false, 0},
};
static const struct imx_sc_pd_soc imx8qxp_scu_pd = {
--
2.16.4
[PATCH V2 0/3] firmware: imx: fix/update cm4 and add resource check
From: Peng Fan V2: Add R-b tag Drop patch 3/4 from V1 Add comments and update Copyright for patch 2/3 keep code consistency in Patch 3/3 V1: https://patchwork.kernel.org/cover/11505045/ Fix cm40 power domain, update to add more cm4 resources Add resource owner check, to not register if not owned by Linux. Peng Fan (3): firmware: imx: scu-pd: fix cm40 power domain firmware: imx: add resource management api firmware: imx: scu-pd: add more cm4 resources drivers/firmware/imx/Makefile | 2 +- drivers/firmware/imx/rm.c | 45 drivers/firmware/imx/scu-pd.c | 14 ++-- include/linux/firmware/imx/sci.h| 1 + include/linux/firmware/imx/svc/rm.h | 69 + 5 files changed, 128 insertions(+), 3 deletions(-) create mode 100644 drivers/firmware/imx/rm.c create mode 100644 include/linux/firmware/imx/svc/rm.h -- 2.16.4
RE: [PATCH V3 1/3] dt-bindings: mailbox: imx-mu: support i.MX8M
> Subject: [PATCH V3 1/3] dt-bindings: mailbox: imx-mu: support i.MX8M I'll drop this patch for yaml update, since https://lkml.org/lkml/2020/6/1/370 includes imx8mq/mm/n/p. Thanks, Peng. > > From: Peng Fan > > Add i.MX8MQ/M/N/P compatible string to support i.MX8M SoCs > > Reviewed-by: Dong Aisheng > Signed-off-by: Peng Fan > --- > Documentation/devicetree/bindings/mailbox/fsl,mu.txt | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) > > diff --git a/Documentation/devicetree/bindings/mailbox/fsl,mu.txt > b/Documentation/devicetree/bindings/mailbox/fsl,mu.txt > index 26b7a88c2fea..906377acf2cd 100644 > --- a/Documentation/devicetree/bindings/mailbox/fsl,mu.txt > +++ b/Documentation/devicetree/bindings/mailbox/fsl,mu.txt > @@ -18,7 +18,8 @@ Messaging Unit Device Node: > Required properties: > --- > - compatible : should be "fsl,-mu", the supported chips include > - imx6sx, imx7s, imx8qxp, imx8qm. > + imx6sx, imx7s, imx8qxp, imx8qm, imx8mq, imx8mm, imx8mn, > + imx8mp. > The "fsl,imx6sx-mu" compatible is seen as generic and should > be included together with SoC specific compatible. > There is a version 1.0 MU on imx7ulp, use "fsl,imx7ulp-mu" > -- > 2.16.4
RE: [PATCH 2/4] firmware: imx: add resource management api
> Subject: RE: [PATCH 2/4] firmware: imx: add resource management api > > > From: Peng Fan > > Sent: Tuesday, June 2, 2020 12:51 PM > > > > > > > From: Peng Fan > > > > Sent: Monday, June 1, 2020 8:40 PM > > > > > > > > > > > From: Peng Fan > > > > > > Sent: Friday, April 24, 2020 9:12 AM > > > > > > > > > > > > > > > From: Peng Fan > > > > > > > > Sent: Thursday, April 23, 2020 6:57 PM > > > > > > > > > > From: Peng Fan > > > > > > > > > > Sent: Thursday, April 23, 2020 3:00 PM > > > > > > > > > > > > > > > > > > > > Add resource management API, when we have multiple > > > > > > > > > > partition running together, resources not owned to > > > > > > > > > > current partition should not be > > > > > > > used. > > > > > > > > > > > > > > > > > > > > Reviewed-by: Leonard Crestez > > > > > > > > > > Signed-off-by: Peng Fan > > > > > > > > > > > > > > > > > > Right now I'm still not quite understand if we really need > > > > > > > > > this. > > > > > > > > > As current resource is bound to power domains, if it's > > > > > > > > > not owned by one specific SW execution environment, > > > > > > > > > power on will also > > > > fail. > > > > > > > > > Can you clarify if any exceptions? > > > > > > > > > > > > > > > > There will be lots of failures when boot Linux domu if no check. > > > > > > > > > > > > > > > > > > > > > > What kind of features did you mean? > > > > > > > Could you clarify a bit more? I'd like to understand this issue > better. > > > > > > > > > > > > When supporting hypervisor with dual Linux running, 1st Linux > > > > > > and the 2nd Linux will have their own dedicated resources. > > > > > > > > > > > > If no resource check, that means 1st/2nd Linux will register > > > > > > all the resources, then both will see fail logs when register > > > > > > resources not owned to > > > > > itself. > > > > > > > > > > > > Same to partitioned m4 case. > > > > > > > > > > > > Would it be better without the failure log? > > > > > > > > > > > > > > > > Is it power up failure? > > > > > If yes, it's expected because we actually use power up to check > > > > > if resources are owned by this partition. It functions the same > > > > > as calling resource check API. > > > > > That's current design. > > > > > > > > > > Or it's other failures? Log? > > > > Sorry for long late reply. > > > > > > > > Part of my XEN DomU log, there are lots of failure log. I think > > > > better not have such logs by add a resource own check. > > > > > > Those error logs are intended. > > > Resource owner check actually behaves the same as power up. > > > > If resource is not owned, it will not register the power domain. > > > > Without resource own check, it will continue register the power domain > > and hook it into genpd list. > > > > That's the intended behavior to save the resource owner checking as it's very > time cost to send SCU cmd for each domain during booting which benefits > nothing except not exposing them in genpd list. > > > I prefer we not expose the power domain not owned to current partition > > and keep the err msg for people to easy see where it goes wrong. > > If we really want to to do, I wonder probably another better approach is > trying to re-use the partition Information built by bootloader as uboot > already > did that one time, not necessary to re-do It again for kernel as it's time > cost. > e.g. introduce a resource partition property in dt and initialized and passed > by > bootloarder to kernel to use later. This will not work for hypervisor based VM runtime partition create and resource assignment. > Then we can still save those huge number of resource owner check CMDs. So we have to live
RE: [PATCH V3 1/3] dt-bindings: mailbox: imx-mu: support i.MX8M
Hi Oleksij, > Subject: Re: [PATCH V3 1/3] dt-bindings: mailbox: imx-mu: support i.MX8M > > On Mon, Jun 01, 2020 at 04:20:00PM +0800, peng@nxp.com wrote: > > From: Peng Fan > > > > Add i.MX8MQ/M/N/P compatible string to support i.MX8M SoCs > > > > Reviewed-by: Dong Aisheng > > Signed-off-by: Peng Fan > > --- > > Documentation/devicetree/bindings/mailbox/fsl,mu.txt | 3 ++- > > 1 file changed, 2 insertions(+), 1 deletion(-) > > > > diff --git a/Documentation/devicetree/bindings/mailbox/fsl,mu.txt > > b/Documentation/devicetree/bindings/mailbox/fsl,mu.txt > > index 26b7a88c2fea..906377acf2cd 100644 > > --- a/Documentation/devicetree/bindings/mailbox/fsl,mu.txt > > +++ b/Documentation/devicetree/bindings/mailbox/fsl,mu.txt > > @@ -18,7 +18,8 @@ Messaging Unit Device Node: > > Required properties: > > --- > > - compatible : should be "fsl,-mu", the supported chips include > > - imx6sx, imx7s, imx8qxp, imx8qm. > > + imx6sx, imx7s, imx8qxp, imx8qm, imx8mq, imx8mm, imx8mn, > > + imx8mp. > > The "fsl,imx6sx-mu" compatible is seen as generic and should > > be included together with SoC specific compatible. > > There is a version 1.0 MU on imx7ulp, use "fsl,imx7ulp-mu" > > -- > > 2.16.4 > > > > > > Hi Peng, > > The fsl,mu.yaml was already taken by Rob, so one or other patch will break by > merge. I assume you should drop this change. Yes. I'll rebase this patch based on Rob's tree. Thanks for reminding me. Thanks, Peng. > > > Regards, > Oleksij > -- > Pengutronix e.K. | > | > Steuerwalder Str. 21 | > http://www.pengutronix.de/ | > 31137 Hildesheim, Germany | Phone: > +49-5121-206917-0| > Amtsgericht Hildesheim, HRA 2686 | Fax: > +49-5121-206917- |
RE: [PATCH 2/4] firmware: imx: add resource management api
> Subject: RE: [PATCH 2/4] firmware: imx: add resource management api
>
> > From: Peng Fan
> > Sent: Thursday, April 23, 2020 3:00 PM
> >
> > Add resource management API, when we have multiple partition running
> > together, resources not owned to current partition should not be used.
> >
> > Reviewed-by: Leonard Crestez
> > Signed-off-by: Peng Fan
> > ---
> > drivers/firmware/imx/Makefile | 2 +-
> > drivers/firmware/imx/rm.c | 40 +
> > include/linux/firmware/imx/sci.h| 1 +
> > include/linux/firmware/imx/svc/rm.h | 69
> > +
> > 4 files changed, 111 insertions(+), 1 deletion(-) create mode 100644
> > drivers/firmware/imx/rm.c create mode 100644
> > include/linux/firmware/imx/svc/rm.h
> >
> > diff --git a/drivers/firmware/imx/Makefile
> > b/drivers/firmware/imx/Makefile index 08bc9ddfbdfb..17ea3613e142
> > 100644
> > --- a/drivers/firmware/imx/Makefile
> > +++ b/drivers/firmware/imx/Makefile
> > @@ -1,4 +1,4 @@
> > # SPDX-License-Identifier: GPL-2.0
> > obj-$(CONFIG_IMX_DSP) += imx-dsp.o
> > -obj-$(CONFIG_IMX_SCU) += imx-scu.o misc.o imx-scu-irq.o
> > +obj-$(CONFIG_IMX_SCU) += imx-scu.o misc.o imx-scu-irq.o rm.o
> > obj-$(CONFIG_IMX_SCU_PD) += scu-pd.o
> > diff --git a/drivers/firmware/imx/rm.c b/drivers/firmware/imx/rm.c new
> > file mode 100644 index ..7b0334de5486
> > --- /dev/null
> > +++ b/drivers/firmware/imx/rm.c
> > @@ -0,0 +1,40 @@
> > +// SPDX-License-Identifier: GPL-2.0+
> > +/*
> > + * Copyright 2020 NXP
> > + *
> > + * File containing client-side RPC functions for the RM service.
> > +These
> > + * function are ported to clients that communicate to the SC.
> > + */
> > +
> > +#include
> > +
> > +struct imx_sc_msg_rm_rsrc_owned {
> > + struct imx_sc_rpc_msg hdr;
> > + u16 resource;
> > +} __packed __aligned(4);
> > +
> > +/*
> > + * This function check @resource is owned by current partition or not
> > + *
> > + * @param[in] ipc IPC handle
> > + * @param[in] resourceresource the control is associated with
> > + *
> > + * @return Returns 0 for success and < 0 for errors.
> > + */
> > +bool imx_sc_rm_is_resource_owned(struct imx_sc_ipc *ipc, u16
> > +resource) {
> > + struct imx_sc_msg_rm_rsrc_owned msg;
> > + struct imx_sc_rpc_msg *hdr =
> > +
> > + hdr->ver = IMX_SC_RPC_VERSION;
> > + hdr->svc = IMX_SC_RPC_SVC_RM;
> > + hdr->func = IMX_SC_RM_FUNC_IS_RESOURCE_OWNED;
> > + hdr->size = 2;
> > +
> > + msg.resource = resource;
> > +
> > + imx_scu_call_rpc(ipc, , true);
>
> No need check err return?
No. it use hdr->func as the resource owner bool.
However imx_scu_call_rpc also use hdr->func
to check error value or not.
When hdr->func is 1, imx_sc_to_linux_errno
will report it -EINVAL. However here 1 means
not owned.
>
> > +
> > + return hdr->func;
> > +}
> > +EXPORT_SYMBOL(imx_sc_rm_is_resource_owned);
> > diff --git a/include/linux/firmware/imx/sci.h
> > b/include/linux/firmware/imx/sci.h
> > index 17ba4e405129..b5c5a56f29be 100644
> > --- a/include/linux/firmware/imx/sci.h
> > +++ b/include/linux/firmware/imx/sci.h
> > @@ -15,6 +15,7 @@
> >
> > #include #include
> >
> > +#include
> >
> > int imx_scu_enable_general_irq_channel(struct device *dev); int
> > imx_scu_irq_register_notifier(struct notifier_block *nb); diff --git
> > a/include/linux/firmware/imx/svc/rm.h
> > b/include/linux/firmware/imx/svc/rm.h
> > new file mode 100644
> > index ..fc6ea62d9d0e
> > --- /dev/null
> > +++ b/include/linux/firmware/imx/svc/rm.h
> > @@ -0,0 +1,69 @@
> > +/* SPDX-License-Identifier: GPL-2.0+ */
> > +/*
> > + * Copyright (C) 2016 Freescale Semiconductor, Inc.
> > + * Copyright 2017-2019 NXP
>
> Update copyright
ok
>
> > + *
> > + * Header file containing the public API for the System Controller
> > +(SC)
> > + * Power Management (PM) function. This includes functions for power
> > +state
> > + * control, clock control, reset control, and wake-up event control.
>
> Fix the code comments
>
> Otherwise, I'm fine with this patch.
Ok.
Thanks,
Peng.
>
> Regards
> Aisheng
>
> > + *
> > + * RM_SVC (SVC) Resource Management Service
> > + *
> > + * Module for the Resourc
RE: [PATCH 2/4] firmware: imx: add resource management api
> Subject: RE: [PATCH 2/4] firmware: imx: add resource management api > > > From: Peng Fan > > Sent: Monday, June 1, 2020 8:40 PM > > > > > > > From: Peng Fan > > > > Sent: Friday, April 24, 2020 9:12 AM > > > > > > > > > > > From: Peng Fan > > > > > > Sent: Thursday, April 23, 2020 6:57 PM > > > > > > > > From: Peng Fan > > > > > > > > Sent: Thursday, April 23, 2020 3:00 PM > > > > > > > > > > > > > > > > Add resource management API, when we have multiple > > > > > > > > partition running together, resources not owned to current > > > > > > > > partition should not be > > > > > used. > > > > > > > > > > > > > > > > Reviewed-by: Leonard Crestez > > > > > > > > Signed-off-by: Peng Fan > > > > > > > > > > > > > > Right now I'm still not quite understand if we really need this. > > > > > > > As current resource is bound to power domains, if it's not > > > > > > > owned by one specific SW execution environment, power on > > > > > > > will also > > fail. > > > > > > > Can you clarify if any exceptions? > > > > > > > > > > > > There will be lots of failures when boot Linux domu if no check. > > > > > > > > > > > > > > > > What kind of features did you mean? > > > > > Could you clarify a bit more? I'd like to understand this issue > > > > > better. > > > > > > > > When supporting hypervisor with dual Linux running, 1st Linux and > > > > the 2nd Linux will have their own dedicated resources. > > > > > > > > If no resource check, that means 1st/2nd Linux will register all > > > > the resources, then both will see fail logs when register > > > > resources not owned to > > > itself. > > > > > > > > Same to partitioned m4 case. > > > > > > > > Would it be better without the failure log? > > > > > > > > > > Is it power up failure? > > > If yes, it's expected because we actually use power up to check if > > > resources are owned by this partition. It functions the same as > > > calling resource check API. > > > That's current design. > > > > > > Or it's other failures? Log? > > Sorry for long late reply. > > > > Part of my XEN DomU log, there are lots of failure log. I think better > > not have such logs by add a resource own check. > > Those error logs are intended. > Resource owner check actually behaves the same as power up. If resource is not owned, it will not register the power domain. Without resource own check, it will continue register the power domain and hook it into genpd list. I prefer we not expose the power domain not owned to current partition and keep the err msg for people to easy see where it goes wrong. Regards, Peng. > So not quite necessary to add a double check. > If we're concerning about the error log, we can change it to dev_dbg(). > > BTW, as resource management will be needed by seco drivers later, So I will > continue to review the patch. > > Regards > Aisheng > > > > > [2.034774] imx6q-pcie 5f00.pcie:IO 0x6ff8..0x6ff8 -> > > 0x > > [2.034801] imx6q-pcie 5f00.pcie: MEM 0x6000..0x6fef > -> > > 0x6000 > > [2.035072] sdhc1: failed to power up resource 249 ret -13 > > [2.035619] sdhc2: failed to power up resource 250 ret -13 > > [2.036126] enet0: failed to power up resource 251 ret -13 > > [2.036584] enet1: failed to power up resource 252 ret -13 > > [2.037040] mlb0: failed to power up resource 253 ret -13 > > [2.037495] nand: failed to power up resource 265 ret -13 > > [2.037951] nand: failed to power up resource 265 ret -13 > > [2.038416] pwm0: failed to power up resource 191 ret -13 > > [2.038868] pwm1: failed to power up resource 192 ret -13 > > [2.039320] pwm2: failed to power up resource 193 ret -13 > > [2.039786] pwm3: failed to power up resource 194 ret -13 > > [2.040239] pwm4: failed to power up resource 195 ret -13 > > [2.040692] pwm5: failed to power up resource 196 ret -13 > > [2.041142] pwm6: failed to power up resource 197 ret -13 > > [2.041596] pwm7: failed to power
RE: [PATCH 2/4] firmware: imx: add resource management api
> Subject: RE: [PATCH 2/4] firmware: imx: add resource management api > > > From: Peng Fan > > Sent: Friday, April 24, 2020 9:12 AM > > > > > > > From: Peng Fan > > > > Sent: Thursday, April 23, 2020 6:57 PM > > > > > > From: Peng Fan > > > > > > Sent: Thursday, April 23, 2020 3:00 PM > > > > > > > > > > > > Add resource management API, when we have multiple partition > > > > > > running together, resources not owned to current partition > > > > > > should not be > > > used. > > > > > > > > > > > > Reviewed-by: Leonard Crestez > > > > > > Signed-off-by: Peng Fan > > > > > > > > > > Right now I'm still not quite understand if we really need this. > > > > > As current resource is bound to power domains, if it's not owned > > > > > by one specific SW execution environment, power on will also fail. > > > > > Can you clarify if any exceptions? > > > > > > > > There will be lots of failures when boot Linux domu if no check. > > > > > > > > > > What kind of features did you mean? > > > Could you clarify a bit more? I'd like to understand this issue better. > > > > When supporting hypervisor with dual Linux running, 1st Linux and the > > 2nd Linux will have their own dedicated resources. > > > > If no resource check, that means 1st/2nd Linux will register all the > > resources, then both will see fail logs when register resources not owned to > itself. > > > > Same to partitioned m4 case. > > > > Would it be better without the failure log? > > > > Is it power up failure? > If yes, it's expected because we actually use power up to check if resources > are owned by this partition. It functions the same as calling resource check > API. > That's current design. > > Or it's other failures? Log? Sorry for long late reply. Part of my XEN DomU log, there are lots of failure log. I think better not have such logs by add a resource own check. [2.034774] imx6q-pcie 5f00.pcie:IO 0x6ff8..0x6ff8 -> 0x [2.034801] imx6q-pcie 5f00.pcie: MEM 0x6000..0x6fef -> 0x6000 [2.035072] sdhc1: failed to power up resource 249 ret -13 [2.035619] sdhc2: failed to power up resource 250 ret -13 [2.036126] enet0: failed to power up resource 251 ret -13 [2.036584] enet1: failed to power up resource 252 ret -13 [2.037040] mlb0: failed to power up resource 253 ret -13 [2.037495] nand: failed to power up resource 265 ret -13 [2.037951] nand: failed to power up resource 265 ret -13 [2.038416] pwm0: failed to power up resource 191 ret -13 [2.038868] pwm1: failed to power up resource 192 ret -13 [2.039320] pwm2: failed to power up resource 193 ret -13 [2.039786] pwm3: failed to power up resource 194 ret -13 [2.040239] pwm4: failed to power up resource 195 ret -13 [2.040692] pwm5: failed to power up resource 196 ret -13 [2.041142] pwm6: failed to power up resource 197 ret -13 [2.041596] pwm7: failed to power up resource 198 ret -13 [2.042073] amix: failed to power up resource 458 ret -13 [2.042558] lpspi0: failed to power up resource 53 ret -13 [2.043033] lpspi1: failed to power up resource 54 ret -13 [2.043501] lpspi2: failed to power up resource 55 ret -13 [2.043992] lpspi3: failed to power up resource 56 ret -13 [2.044460] lpuart0: failed to power up resource 57 ret -13 [2.044935] lpuart2: failed to power up resource 59 ret -13 [2.045409] lpuart3: failed to power up resource 60 ret -13 [2.055014] sim0: failed to power up resource 62 ret -13 [2.055510] adc0: failed to power up resource 101 ret -13 [2.056467] lpi2c0: failed to power up resource 96 ret -13 [2.056946] lpi2c1: failed to power up resource 97 ret -13 [2.057424] lpi2c2: failed to power up resource 98 ret -13 [2.057898] lpi2c3: failed to power up resource 99 ret -13 [2.058371] can0: failed to power up resource 105 ret -13 [2.059289] can1: failed to power up resource 106 ret -13 [2.059801] can2: failed to power up resource 107 ret -13 [2.060281] nand: failed to power up resource 265 ret -13 [2.062764] dpu-core 5618.dpu: driver probed Thanks, Peng. > > Regards > Aisheng > > > Thanks, > > Peng. > > > > > > > > > > Regards > > > Aisheng > > > > > > > Thanks, > > > > Peng. > > > > > > > > > > > > > > Regards > > > > > Aisheng > > > > > >
[PATCH V3 0/3] imx8m: add mu support
From: Peng Fan V3: Add R-b tag Remove undocumented property V2: Add dt-bindings Merge dts changes into one patch, since all is to add mu node Add mu dt bindings Add mu node Add i.MX8MP mu root clk Peng Fan (3): dt-bindings: mailbox: imx-mu: support i.MX8M arm64: dts: imx8m: add mu node clk: imx8mp: add mu root clk Documentation/devicetree/bindings/mailbox/fsl,mu.txt | 3 ++- arch/arm64/boot/dts/freescale/imx8mm.dtsi| 8 arch/arm64/boot/dts/freescale/imx8mn.dtsi| 8 arch/arm64/boot/dts/freescale/imx8mp.dtsi| 8 arch/arm64/boot/dts/freescale/imx8mq.dtsi| 8 drivers/clk/imx/clk-imx8mp.c | 1 + 6 files changed, 35 insertions(+), 1 deletion(-) -- 2.16.4
[PATCH V3 2/3] arm64: dts: imx8m: add mu node
From: Peng Fan
Add mu node to let A53 could communicate with M Core.
Signed-off-by: Peng Fan
---
arch/arm64/boot/dts/freescale/imx8mm.dtsi | 8
arch/arm64/boot/dts/freescale/imx8mn.dtsi | 8
arch/arm64/boot/dts/freescale/imx8mp.dtsi | 8
arch/arm64/boot/dts/freescale/imx8mq.dtsi | 8
4 files changed, 32 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8mm.dtsi
b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
index aaf6e71101a1..d9e787ea246f 100644
--- a/arch/arm64/boot/dts/freescale/imx8mm.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
@@ -775,6 +775,14 @@
status = "disabled";
};
+ mu: mailbox@30aa {
+ compatible = "fsl,imx8mm-mu", "fsl,imx6sx-mu";
+ reg = <0x30aa 0x1>;
+ interrupts = ;
+ clocks = < IMX8MM_CLK_MU_ROOT>;
+ #mbox-cells = <2>;
+ };
+
usdhc1: mmc@30b4 {
compatible = "fsl,imx8mm-usdhc",
"fsl,imx7d-usdhc";
reg = <0x30b4 0x1>;
diff --git a/arch/arm64/boot/dts/freescale/imx8mn.dtsi
b/arch/arm64/boot/dts/freescale/imx8mn.dtsi
index 9a4b65a267d4..3dca1fb34ea3 100644
--- a/arch/arm64/boot/dts/freescale/imx8mn.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mn.dtsi
@@ -675,6 +675,14 @@
status = "disabled";
};
+ mu: mailbox@30aa {
+ compatible = "fsl,imx8mn-mu", "fsl,imx6sx-mu";
+ reg = <0x30aa 0x1>;
+ interrupts = ;
+ clocks = < IMX8MN_CLK_MU_ROOT>;
+ #mbox-cells = <2>;
+ };
+
usdhc1: mmc@30b4 {
compatible = "fsl,imx8mn-usdhc",
"fsl,imx7d-usdhc";
reg = <0x30b4 0x1>;
diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
index 45e2c0a4e889..1bc14bb44d90 100644
--- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
@@ -621,6 +621,14 @@
status = "disabled";
};
+ mu: mailbox@30aa {
+ compatible = "fsl,imx8mp-mu", "fsl,imx6sx-mu";
+ reg = <0x30aa 0x1>;
+ interrupts = ;
+ clocks = < IMX8MP_CLK_MU_ROOT>;
+ #mbox-cells = <2>;
+ };
+
i2c5: i2c@30ad {
compatible = "fsl,imx8mp-i2c", "fsl,imx21-i2c";
#address-cells = <1>;
diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi
b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
index 978f8122c0d2..3e762919d61f 100644
--- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
@@ -959,6 +959,14 @@
status = "disabled";
};
+ mu: mailbox@30aa {
+ compatible = "fsl,imx8mq-mu", "fsl,imx6sx-mu";
+ reg = <0x30aa 0x1>;
+ interrupts = ;
+ clocks = < IMX8MQ_CLK_MU_ROOT>;
+ #mbox-cells = <2>;
+ };
+
usdhc1: mmc@30b4 {
compatible = "fsl,imx8mq-usdhc",
"fsl,imx7d-usdhc";
--
2.16.4
[PATCH V3 1/3] dt-bindings: mailbox: imx-mu: support i.MX8M
From: Peng Fan Add i.MX8MQ/M/N/P compatible string to support i.MX8M SoCs Reviewed-by: Dong Aisheng Signed-off-by: Peng Fan --- Documentation/devicetree/bindings/mailbox/fsl,mu.txt | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/mailbox/fsl,mu.txt b/Documentation/devicetree/bindings/mailbox/fsl,mu.txt index 26b7a88c2fea..906377acf2cd 100644 --- a/Documentation/devicetree/bindings/mailbox/fsl,mu.txt +++ b/Documentation/devicetree/bindings/mailbox/fsl,mu.txt @@ -18,7 +18,8 @@ Messaging Unit Device Node: Required properties: --- - compatible : should be "fsl,-mu", the supported chips include - imx6sx, imx7s, imx8qxp, imx8qm. + imx6sx, imx7s, imx8qxp, imx8qm, imx8mq, imx8mm, imx8mn, + imx8mp. The "fsl,imx6sx-mu" compatible is seen as generic and should be included together with SoC specific compatible. There is a version 1.0 MU on imx7ulp, use "fsl,imx7ulp-mu" -- 2.16.4
[PATCH V3 3/3] clk: imx8mp: add mu root clk
From: Peng Fan
Add mu root clk for mu mailbox usage.
Reviewed-by: Dong Aisheng
Signed-off-by: Peng Fan
---
drivers/clk/imx/clk-imx8mp.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/clk/imx/clk-imx8mp.c b/drivers/clk/imx/clk-imx8mp.c
index b4d9db9d5bf1..ca747712400f 100644
--- a/drivers/clk/imx/clk-imx8mp.c
+++ b/drivers/clk/imx/clk-imx8mp.c
@@ -680,6 +680,7 @@ static int imx8mp_clocks_probe(struct platform_device *pdev)
hws[IMX8MP_CLK_I2C2_ROOT] = imx_clk_hw_gate4("i2c2_root_clk", "i2c2",
ccm_base + 0x4180, 0);
hws[IMX8MP_CLK_I2C3_ROOT] = imx_clk_hw_gate4("i2c3_root_clk", "i2c3",
ccm_base + 0x4190, 0);
hws[IMX8MP_CLK_I2C4_ROOT] = imx_clk_hw_gate4("i2c4_root_clk", "i2c4",
ccm_base + 0x41a0, 0);
+ hws[IMX8MP_CLK_MU_ROOT] = imx_clk_hw_gate4("mu_root_clk", "ipg_root",
ccm_base + 0x4210, 0);
hws[IMX8MP_CLK_OCOTP_ROOT] = imx_clk_hw_gate4("ocotp_root_clk",
"ipg_root", ccm_base + 0x4220, 0);
hws[IMX8MP_CLK_PCIE_ROOT] = imx_clk_hw_gate4("pcie_root_clk",
"pcie_aux", ccm_base + 0x4250, 0);
hws[IMX8MP_CLK_PWM1_ROOT] = imx_clk_hw_gate4("pwm1_root_clk", "pwm1",
ccm_base + 0x4280, 0);
--
2.16.4
RE: [PATCH V2 2/3] arm64: dts: imx8m: add mu node
> Subject: RE: [PATCH V2 2/3] arm64: dts: imx8m: add mu node
>
> > From: Peng Fan
> > Sent: Monday, June 1, 2020 11:43 AM
> >
> > Add mu node to let A53 could communicate with M Core.
> >
> > Signed-off-by: Peng Fan
> > ---
> > arch/arm64/boot/dts/freescale/imx8mm.dtsi | 9 +
> > arch/arm64/boot/dts/freescale/imx8mn.dtsi | 9 +
> > arch/arm64/boot/dts/freescale/imx8mp.dtsi | 9 +
> > arch/arm64/boot/dts/freescale/imx8mq.dtsi | 9 +
> > 4 files changed, 36 insertions(+)
> >
> > diff --git a/arch/arm64/boot/dts/freescale/imx8mm.dtsi
> > b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
> > index aaf6e71101a1..fc001fb971e9 100644
> > --- a/arch/arm64/boot/dts/freescale/imx8mm.dtsi
> > +++ b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
> > @@ -775,6 +775,15 @@
> > status = "disabled";
> > };
> >
> > + mu: mailbox@30aa {
> > + compatible = "fsl,imx8mm-mu", "fsl,imx6sx-mu";
> > + reg = <0x30aa 0x1>;
> > + interrupts = ;
> > + clocks = < IMX8MM_CLK_MU_ROOT>;
> > + clock-names = "mu";
>
> You missed my comments about this unneeded line in the last round of
> review.
> https://lore.kernel.org/patchwork/patch/1244752/
oops, will update in v3.
Thanks,
Peng.
>
> Regards
> Aisheng
>
> > + #mbox-cells = <2>;
> > + };
> > +
> > usdhc1: mmc@30b4 {
> > compatible = "fsl,imx8mm-usdhc",
> > "fsl,imx7d-usdhc";
> > reg = <0x30b4 0x1>;
> > diff --git a/arch/arm64/boot/dts/freescale/imx8mn.dtsi
> > b/arch/arm64/boot/dts/freescale/imx8mn.dtsi
> > index 9a4b65a267d4..c8290d21ccc9 100644
> > --- a/arch/arm64/boot/dts/freescale/imx8mn.dtsi
> > +++ b/arch/arm64/boot/dts/freescale/imx8mn.dtsi
> > @@ -675,6 +675,15 @@
> > status = "disabled";
> > };
> >
> > + mu: mailbox@30aa {
> > + compatible = "fsl,imx8mn-mu", "fsl,imx6sx-mu";
> > + reg = <0x30aa 0x1>;
> > + interrupts = ;
> > + clocks = < IMX8MN_CLK_MU_ROOT>;
> > + clock-names = "mu";
> > + #mbox-cells = <2>;
> > + };
> > +
> > usdhc1: mmc@30b4 {
> > compatible = "fsl,imx8mn-usdhc",
> > "fsl,imx7d-usdhc";
> > reg = <0x30b4 0x1>;
> > diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> > b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> > index 45e2c0a4e889..b530804f763e 100644
> > --- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> > +++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> > @@ -621,6 +621,15 @@
> > status = "disabled";
> > };
> >
> > + mu: mailbox@30aa {
> > + compatible = "fsl,imx8mp-mu", "fsl,imx6sx-mu";
> > + reg = <0x30aa 0x1>;
> > + interrupts = ;
> > + clocks = < IMX8MP_CLK_MU_ROOT>;
> > + clock-names = "mu";
> > + #mbox-cells = <2>;
> > + };
> > +
> > i2c5: i2c@30ad {
> > compatible = "fsl,imx8mp-i2c", "fsl,imx21-i2c";
> > #address-cells = <1>;
> > diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi
> > b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
> > index 978f8122c0d2..66ba8da704f6 100644
> > --- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi
> > +++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
> > @@ -959,6 +959,15 @@
> > status = "disabled";
> > };
> >
> > + mu: mailbox@30aa {
> > + compatible = "fsl,imx8mq-mu", "fsl,imx6sx-mu";
> > + reg = <0x30aa 0x1>;
> > + interrupts = ;
> > + clocks = < IMX8MQ_CLK_MU_ROOT>;
> > + clock-names = "mu";
> > + #mbox-cells = <2>;
> > + };
> > +
> > usdhc1: mmc@30b4 {
> > compatible = "fsl,imx8mq-usdhc",
> > "fsl,imx7d-usdhc";
> > --
> > 2.16.4
[PATCH V2 3/3] clk: imx8mp: add mu root clk
From: Peng Fan
Add mu root clk for mu mailbox usage.
Signed-off-by: Peng Fan
Reviewed-by: Dong Aisheng
---
drivers/clk/imx/clk-imx8mp.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/clk/imx/clk-imx8mp.c b/drivers/clk/imx/clk-imx8mp.c
index b4d9db9d5bf1..ca747712400f 100644
--- a/drivers/clk/imx/clk-imx8mp.c
+++ b/drivers/clk/imx/clk-imx8mp.c
@@ -680,6 +680,7 @@ static int imx8mp_clocks_probe(struct platform_device *pdev)
hws[IMX8MP_CLK_I2C2_ROOT] = imx_clk_hw_gate4("i2c2_root_clk", "i2c2",
ccm_base + 0x4180, 0);
hws[IMX8MP_CLK_I2C3_ROOT] = imx_clk_hw_gate4("i2c3_root_clk", "i2c3",
ccm_base + 0x4190, 0);
hws[IMX8MP_CLK_I2C4_ROOT] = imx_clk_hw_gate4("i2c4_root_clk", "i2c4",
ccm_base + 0x41a0, 0);
+ hws[IMX8MP_CLK_MU_ROOT] = imx_clk_hw_gate4("mu_root_clk", "ipg_root",
ccm_base + 0x4210, 0);
hws[IMX8MP_CLK_OCOTP_ROOT] = imx_clk_hw_gate4("ocotp_root_clk",
"ipg_root", ccm_base + 0x4220, 0);
hws[IMX8MP_CLK_PCIE_ROOT] = imx_clk_hw_gate4("pcie_root_clk",
"pcie_aux", ccm_base + 0x4250, 0);
hws[IMX8MP_CLK_PWM1_ROOT] = imx_clk_hw_gate4("pwm1_root_clk", "pwm1",
ccm_base + 0x4280, 0);
--
2.16.4
[PATCH V2 2/3] arm64: dts: imx8m: add mu node
From: Peng Fan
Add mu node to let A53 could communicate with M Core.
Signed-off-by: Peng Fan
---
arch/arm64/boot/dts/freescale/imx8mm.dtsi | 9 +
arch/arm64/boot/dts/freescale/imx8mn.dtsi | 9 +
arch/arm64/boot/dts/freescale/imx8mp.dtsi | 9 +
arch/arm64/boot/dts/freescale/imx8mq.dtsi | 9 +
4 files changed, 36 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8mm.dtsi
b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
index aaf6e71101a1..fc001fb971e9 100644
--- a/arch/arm64/boot/dts/freescale/imx8mm.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
@@ -775,6 +775,15 @@
status = "disabled";
};
+ mu: mailbox@30aa {
+ compatible = "fsl,imx8mm-mu", "fsl,imx6sx-mu";
+ reg = <0x30aa 0x1>;
+ interrupts = ;
+ clocks = < IMX8MM_CLK_MU_ROOT>;
+ clock-names = "mu";
+ #mbox-cells = <2>;
+ };
+
usdhc1: mmc@30b4 {
compatible = "fsl,imx8mm-usdhc",
"fsl,imx7d-usdhc";
reg = <0x30b4 0x1>;
diff --git a/arch/arm64/boot/dts/freescale/imx8mn.dtsi
b/arch/arm64/boot/dts/freescale/imx8mn.dtsi
index 9a4b65a267d4..c8290d21ccc9 100644
--- a/arch/arm64/boot/dts/freescale/imx8mn.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mn.dtsi
@@ -675,6 +675,15 @@
status = "disabled";
};
+ mu: mailbox@30aa {
+ compatible = "fsl,imx8mn-mu", "fsl,imx6sx-mu";
+ reg = <0x30aa 0x1>;
+ interrupts = ;
+ clocks = < IMX8MN_CLK_MU_ROOT>;
+ clock-names = "mu";
+ #mbox-cells = <2>;
+ };
+
usdhc1: mmc@30b4 {
compatible = "fsl,imx8mn-usdhc",
"fsl,imx7d-usdhc";
reg = <0x30b4 0x1>;
diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
index 45e2c0a4e889..b530804f763e 100644
--- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
@@ -621,6 +621,15 @@
status = "disabled";
};
+ mu: mailbox@30aa {
+ compatible = "fsl,imx8mp-mu", "fsl,imx6sx-mu";
+ reg = <0x30aa 0x1>;
+ interrupts = ;
+ clocks = < IMX8MP_CLK_MU_ROOT>;
+ clock-names = "mu";
+ #mbox-cells = <2>;
+ };
+
i2c5: i2c@30ad {
compatible = "fsl,imx8mp-i2c", "fsl,imx21-i2c";
#address-cells = <1>;
diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi
b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
index 978f8122c0d2..66ba8da704f6 100644
--- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
@@ -959,6 +959,15 @@
status = "disabled";
};
+ mu: mailbox@30aa {
+ compatible = "fsl,imx8mq-mu", "fsl,imx6sx-mu";
+ reg = <0x30aa 0x1>;
+ interrupts = ;
+ clocks = < IMX8MQ_CLK_MU_ROOT>;
+ clock-names = "mu";
+ #mbox-cells = <2>;
+ };
+
usdhc1: mmc@30b4 {
compatible = "fsl,imx8mq-usdhc",
"fsl,imx7d-usdhc";
--
2.16.4
[PATCH V2 1/3] dt-bindings: mailbox: imx-mu: support i.MX8M
From: Peng Fan Add i.MX8MQ/M/N/P compatible string to support i.MX8M SoCs Signed-off-by: Peng Fan --- Documentation/devicetree/bindings/mailbox/fsl,mu.txt | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/mailbox/fsl,mu.txt b/Documentation/devicetree/bindings/mailbox/fsl,mu.txt index 26b7a88c2fea..906377acf2cd 100644 --- a/Documentation/devicetree/bindings/mailbox/fsl,mu.txt +++ b/Documentation/devicetree/bindings/mailbox/fsl,mu.txt @@ -18,7 +18,8 @@ Messaging Unit Device Node: Required properties: --- - compatible : should be "fsl,-mu", the supported chips include - imx6sx, imx7s, imx8qxp, imx8qm. + imx6sx, imx7s, imx8qxp, imx8qm, imx8mq, imx8mm, imx8mn, + imx8mp. The "fsl,imx6sx-mu" compatible is seen as generic and should be included together with SoC specific compatible. There is a version 1.0 MU on imx7ulp, use "fsl,imx7ulp-mu" -- 2.16.4
[PATCH V2 0/3] imx8m: add mu support
From: Peng Fan V2: Add dt-bindings Merge dts changes into one patch, since all is to add mu node Add mu dt bindings Add mu node Add i.MX8MP mu root clk Peng Fan (3): dt-bindings: mailbox: imx-mu: support i.MX8M arm64: dts: imx8m: add mu node clk: imx8mp: add mu root clk Documentation/devicetree/bindings/mailbox/fsl,mu.txt | 3 ++- arch/arm64/boot/dts/freescale/imx8mm.dtsi| 9 + arch/arm64/boot/dts/freescale/imx8mn.dtsi| 9 + arch/arm64/boot/dts/freescale/imx8mp.dtsi| 9 + arch/arm64/boot/dts/freescale/imx8mq.dtsi| 9 + drivers/clk/imx/clk-imx8mp.c | 1 + 6 files changed, 39 insertions(+), 1 deletion(-) -- 2.16.4
[PATCH 3/3] arm64: dts: imx8qxp: Add ethernet alias
From: Peng Fan Add ethernet alias, so bootloader code can use this to find the primary ethernet device, and set the MAC address. Signed-off-by: Peng Fan --- arch/arm64/boot/dts/freescale/imx8qxp.dtsi | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/imx8qxp.dtsi b/arch/arm64/boot/dts/freescale/imx8qxp.dtsi index 8ce997110cd6..ff6368af7d39 100644 --- a/arch/arm64/boot/dts/freescale/imx8qxp.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8qxp.dtsi @@ -23,6 +23,8 @@ i2c1 = _i2c1; i2c2 = _i2c2; i2c3 = _i2c3; + ethernet0 = + ethernet1 = gpio0 = _gpio0; gpio1 = _gpio1; gpio2 = _gpio2; -- 2.16.4
[PATCH 2/3] arm64: dts: imx8qxp: add i2c aliases
From: Peng Fan
The devices could be enumerated properly with aliases.
Signed-off-by: Peng Fan
---
arch/arm64/boot/dts/freescale/imx8qxp.dtsi | 4
1 file changed, 4 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8qxp.dtsi
b/arch/arm64/boot/dts/freescale/imx8qxp.dtsi
index 33363c127478..8ce997110cd6 100644
--- a/arch/arm64/boot/dts/freescale/imx8qxp.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8qxp.dtsi
@@ -19,6 +19,10 @@
#size-cells = <2>;
aliases {
+ i2c0 = _i2c0;
+ i2c1 = _i2c1;
+ i2c2 = _i2c2;
+ i2c3 = _i2c3;
gpio0 = _gpio0;
gpio1 = _gpio1;
gpio2 = _gpio2;
--
2.16.4
[PATCH 1/3] arm64: dts: imx8qxp: add alias for lsio MU
From: Peng Fan Add lsio mu alias for all lsio MUs that could communicate with SCU, imx_scu_enable_general_irq_channel will parse the alias to get the mu resource id, if using other MU, not MU1, the `mu_resource_id` is not what we expect, so add alias to fix this issue. Signed-off-by: Peng Fan --- arch/arm64/boot/dts/freescale/imx8qxp.dtsi | 4 1 file changed, 4 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/imx8qxp.dtsi b/arch/arm64/boot/dts/freescale/imx8qxp.dtsi index d1c3c98e4b39..33363c127478 100644 --- a/arch/arm64/boot/dts/freescale/imx8qxp.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8qxp.dtsi @@ -30,7 +30,11 @@ mmc0 = mmc1 = mmc2 = + mu0 = _mu0; mu1 = _mu1; + mu2 = _mu2; + mu3 = _mu3; + mu4 = _mu4; serial0 = _lpuart0; serial1 = _lpuart1; serial2 = _lpuart2; -- 2.16.4
[PATCH 0/3] arm64: dts: imx8qxp: dtb aliases fix/update
From: Peng Fan Minor patchset to fix and update alias for i.MX8QXP Peng Fan (3): arm64: dts: imx8qxp: add alias for lsio MU arm64: dts: imx8qxp: add i2c aliases arm64: dts: imx8qxp: Add ethernet alias arch/arm64/boot/dts/freescale/imx8qxp.dtsi | 10 ++ 1 file changed, 10 insertions(+) -- 2.16.4
RE: [PATCH v1 2/2] arm64: dts: imx8mn-ddr4-evk: correct ldo1/ldo2 voltage range
> Subject: [PATCH v1 2/2] arm64: dts: imx8mn-ddr4-evk: correct ldo1/ldo2
> voltage range
>
> Correct ldo1 voltage range from wrong high group(3.0v~3.3v) to low group
> (1.6v~1.9v) because the ldo1 should be 1.8v. Actually, two voltage groups
> have been supported at bd718x7-regulator driver, hence, just corrrect the
> voltage range to 1.6v~3.3v. For ldo2@0.8v, correct voltage range too.
> Otherwise, ldo1 would be kept @3.0v and ldo2@0.9v which violate i.mx8mm
> datasheet as the below warning log in kernel:
>
> [0.995524] LDO1: Bringing 180uV into 300-300uV
> [0.999196] LDO2: Bringing 80uV into 90-90uV
>
> Signed-off-by: Robin Gong
> ---
> arch/arm64/boot/dts/freescale/imx8mn-ddr4-evk.dts | 4 ++--
> arch/arm64/boot/dts/freescale/imx8mn-evk.dts | 9 +
> 2 files changed, 11 insertions(+), 2 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/freescale/imx8mn-ddr4-evk.dts
> b/arch/arm64/boot/dts/freescale/imx8mn-ddr4-evk.dts
> index d07e0e6..a1e5483 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mn-ddr4-evk.dts
> +++ b/arch/arm64/boot/dts/freescale/imx8mn-ddr4-evk.dts
> @@ -113,7 +113,7 @@
>
> ldo1_reg: LDO1 {
> regulator-name = "LDO1";
> - regulator-min-microvolt = <300>;
> + regulator-min-microvolt = <160>;
> regulator-max-microvolt = <330>;
> regulator-boot-on;
> regulator-always-on;
> @@ -121,7 +121,7 @@
>
> ldo2_reg: LDO2 {
> regulator-name = "LDO2";
> - regulator-min-microvolt = <90>;
> + regulator-min-microvolt = <80>;
> regulator-max-microvolt = <90>;
> regulator-boot-on;
> regulator-always-on;
> diff --git a/arch/arm64/boot/dts/freescale/imx8mn-evk.dts
> b/arch/arm64/boot/dts/freescale/imx8mn-evk.dts
> index 61f3519..117ff4b 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mn-evk.dts
> +++ b/arch/arm64/boot/dts/freescale/imx8mn-evk.dts
> @@ -13,6 +13,15 @@
> compatible = "fsl,imx8mn-evk", "fsl,imx8mn"; };
>
> + {
> + status = "okay";
> +spidev0: spi@0 {
> + compatible = "ge,achc";
> + reg = <0>;
> + spi-max-frequency = <100>;
> + };
> +};
> +
This was added by mistake?
Regards,
Peng.
> _0 {
> /delete-property/operating-points-v2;
> };
> --
> 2.7.4
RE: [PATCH V2 0/3] ARM: imx: move cpu code to drivers/soc/imx
Hi Shawn, > Subject: Re: [PATCH V2 0/3] ARM: imx: move cpu code to drivers/soc/imx > > On Wed, May 20, 2020 at 8:57 AM Shawn Guo > wrote: > > > > On Wed, Apr 29, 2020 at 05:17:20PM +0800, peng@nxp.com wrote: > > > From: Peng Fan > > > > > > V2: > > > Keep i.MX1/2/3/5 cpu type for completness Correct return value in > > > patch 1/3 use CONFIG_ARM to guard compile soc-imx.c in patch 3/3 > > > > > > V1: > > > https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fpa > > > > tchwork.kernel.org%2Fcover%2F11433689%2Fdata=02%7C01%7Cpen > g.fan > > > %40nxp.com%7C3fe49570a6824631476908d7fc6e5cd3%7C686ea1d3bc2 > b4c6fa92c > > > > d99c5c301635%7C0%7C0%7C637255423274738401sdata=ELtEt3Nbg > kUg83w4 > > > UbCftkVMu0toYDUXJy4MgLc8qbQ%3Dreserved=0 > > > RFC version : > > > https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fpa > > > > tchwork.kernel.org%2Fcover%2F11336433%2Fdata=02%7C01%7Cpen > g.fan > > > %40nxp.com%7C3fe49570a6824631476908d7fc6e5cd3%7C686ea1d3bc2 > b4c6fa92c > > > > d99c5c301635%7C0%7C0%7C637255423274738401sdata=RE%2Fprw > CLb7fQpY > > > hmszlnXxTBKJVdEXsjMBrd2ZHmKc8%3Dreserved=0 > > > > > > Nothing changed in v1, just rename to formal patches > > > > > > Shawn, > > > The original concern has been eliminated in RFC discussion, so > > > this patchset is ready to be in next. > > > Thanks. > > > > > > Follow i.MX8, move the soc device register code to drivers/soc/imx > > > to simplify arch/arm/mach-imx/cpu.c > > > > > > I planned to use similar logic as soc-imx8m.c to restructure > > > soc-imx.c and merged the two files into one. But not sure, so still > > > keep the logic in cpu.c. > > > > > > There is one change is the platform devices are not under > > > /sys/devices/soc0 after patch 1/4. Actually ARM64 platform devices > > > are not under /sys/devices/soc0, such as i.MX8/8M. > > > So it should not hurt to let the platform devices under platform dir. > > > > > > Peng Fan (3): > > > ARM: imx: use device_initcall for imx_soc_device_init > > > ARM: imx: move cpu definitions into a header > > > soc: imx: move cpu code to drivers/soc/imx > > > > Applied all, thanks. > > Unfortunately, I have to drop this, as it turns out the series needs a rebase > onto for-next. The series conflicts with 'ARM: vf610: report soc info via soc > device' there. I just posted out v3 which rebased on latest next tree and resolved the conflicts. Thanks, Peng. > > Shawn
[PATCH V3 0/3] ARM: imx: move cpu code to drivers/soc/imx
From: Peng Fan V3: Rebased to latest next tree Resolved the conflicts with vf610 soc patch V2: Keep i.MX1/2/3/5 cpu type for completness Correct return value in patch 1/3 use CONFIG_ARM to guard compile soc-imx.c in patch 3/3 V1: https://patchwork.kernel.org/cover/11433689/ RFC version : https://patchwork.kernel.org/cover/11336433/ Nothing changed in v1, just rename to formal patches Shawn, The original concern has been eliminated in RFC discussion, so this patchset is ready to be in next. Thanks. Follow i.MX8, move the soc device register code to drivers/soc/imx to simplify arch/arm/mach-imx/cpu.c I planned to use similar logic as soc-imx8m.c to restructure soc-imx.c and merged the two files into one. But not sure, so still keep the logic in cpu.c. There is one change is the platform devices are not under /sys/devices/soc0 after patch 1/4. Actually ARM64 platform devices are not under /sys/devices/soc0, such as i.MX8/8M. So it should not hurt to let the platform devices under platform dir. Peng Fan (3): ARM: imx: use device_initcall for imx_soc_device_init ARM: imx: move cpu definitions into a header soc: imx: move cpu code to drivers/soc/imx arch/arm/mach-imx/common.h | 1 - arch/arm/mach-imx/cpu.c | 175 --- arch/arm/mach-imx/mach-imx6q.c | 8 +- arch/arm/mach-imx/mach-imx6sl.c | 8 +- arch/arm/mach-imx/mach-imx6sx.c | 8 +- arch/arm/mach-imx/mach-imx6ul.c | 8 +- arch/arm/mach-imx/mach-imx7d.c | 6 -- arch/arm/mach-imx/mach-imx7ulp.c | 2 +- arch/arm/mach-imx/mach-vf610.c | 8 +- arch/arm/mach-imx/mxc.h | 28 +- drivers/soc/imx/Makefile | 3 + drivers/soc/imx/soc-imx.c| 192 +++ include/soc/imx/cpu.h| 36 13 files changed, 238 insertions(+), 245 deletions(-) create mode 100644 drivers/soc/imx/soc-imx.c create mode 100644 include/soc/imx/cpu.h -- 2.16.4
[PATCH V3 2/3] ARM: imx: move cpu definitions into a header
From: Peng Fan The soc device register code will be moved to drivers/soc/imx/, the code needs the cpu type definitions. So let's move the cpu type definitions to a header. Signed-off-by: Peng Fan --- arch/arm/mach-imx/mxc.h | 28 +--- include/soc/imx/cpu.h | 36 2 files changed, 37 insertions(+), 27 deletions(-) create mode 100644 include/soc/imx/cpu.h diff --git a/arch/arm/mach-imx/mxc.h b/arch/arm/mach-imx/mxc.h index 48e6d781f15b..fe2d0f5abfcc 100644 --- a/arch/arm/mach-imx/mxc.h +++ b/arch/arm/mach-imx/mxc.h @@ -8,41 +8,15 @@ #define __ASM_ARCH_MXC_H__ #include +#include #ifndef __ASM_ARCH_MXC_HARDWARE_H__ #error "Do not include directly." #endif -#define MXC_CPU_MX11 -#define MXC_CPU_MX21 21 -#define MXC_CPU_MX25 25 -#define MXC_CPU_MX27 27 -#define MXC_CPU_MX31 31 -#define MXC_CPU_MX35 35 -#define MXC_CPU_MX51 51 -#define MXC_CPU_MX53 53 -#define MXC_CPU_IMX6SL 0x60 -#define MXC_CPU_IMX6DL 0x61 -#define MXC_CPU_IMX6SX 0x62 -#define MXC_CPU_IMX6Q 0x63 -#define MXC_CPU_IMX6UL 0x64 -#define MXC_CPU_IMX6ULL0x65 -/* virtual cpu id for i.mx6ulz */ -#define MXC_CPU_IMX6ULZ0x6b -#define MXC_CPU_IMX6SLL0x67 -#define MXC_CPU_IMX7D 0x72 -#define MXC_CPU_IMX7ULP0xff - -#define MXC_CPU_VFx10 0x010 -#define MXC_CPU_VF500 0x500 -#define MXC_CPU_VF510 (MXC_CPU_VF500 | MXC_CPU_VFx10) -#define MXC_CPU_VF600 0x600 -#define MXC_CPU_VF610 (MXC_CPU_VF600 | MXC_CPU_VFx10) - #define IMX_DDR_TYPE_LPDDR21 #ifndef __ASSEMBLY__ -extern unsigned int __mxc_cpu_type; #ifdef CONFIG_SOC_IMX6SL static inline bool cpu_is_imx6sl(void) diff --git a/include/soc/imx/cpu.h b/include/soc/imx/cpu.h new file mode 100644 index ..42d6aeb951fa --- /dev/null +++ b/include/soc/imx/cpu.h @@ -0,0 +1,36 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + +#ifndef __IMX_CPU_H__ +#define __IMX_CPU_H__ + +#define MXC_CPU_MX11 +#define MXC_CPU_MX21 21 +#define MXC_CPU_MX25 25 +#define MXC_CPU_MX27 27 +#define MXC_CPU_MX31 31 +#define MXC_CPU_MX35 35 +#define MXC_CPU_MX51 51 +#define MXC_CPU_MX53 53 +#define MXC_CPU_IMX6SL 0x60 +#define MXC_CPU_IMX6DL 0x61 +#define MXC_CPU_IMX6SX 0x62 +#define MXC_CPU_IMX6Q 0x63 +#define MXC_CPU_IMX6UL 0x64 +#define MXC_CPU_IMX6ULL0x65 +/* virtual cpu id for i.mx6ulz */ +#define MXC_CPU_IMX6ULZ0x6b +#define MXC_CPU_IMX6SLL0x67 +#define MXC_CPU_IMX7D 0x72 +#define MXC_CPU_IMX7ULP0xff + +#define MXC_CPU_VFx10 0x010 +#define MXC_CPU_VF500 0x500 +#define MXC_CPU_VF510 (MXC_CPU_VF500 | MXC_CPU_VFx10) +#define MXC_CPU_VF600 0x600 +#define MXC_CPU_VF610 (MXC_CPU_VF600 | MXC_CPU_VFx10) + +#ifndef __ASSEMBLY__ +extern unsigned int __mxc_cpu_type; +#endif + +#endif -- 2.16.4
[PATCH V3 1/3] ARM: imx: use device_initcall for imx_soc_device_init
From: Peng Fan
This is preparation to move imx_soc_device_init to drivers/soc/imx/
There is no reason to must put dt devices under /sys/devices/soc0,
they could also be under /sys/devices/platform, so we could
pass NULL as parent when calling of_platform_default_populate.
Following soc-imx8.c soc-imx-scu.c using device_initcall, need
to change return type to int type for imx_soc_device_init.
Signed-off-by: Peng Fan
---
arch/arm/mach-imx/common.h | 1 -
arch/arm/mach-imx/cpu.c | 21 ++---
arch/arm/mach-imx/mach-imx6q.c | 8 +---
arch/arm/mach-imx/mach-imx6sl.c | 8 +---
arch/arm/mach-imx/mach-imx6sx.c | 8 +---
arch/arm/mach-imx/mach-imx6ul.c | 8 +---
arch/arm/mach-imx/mach-imx7d.c | 6 --
arch/arm/mach-imx/mach-imx7ulp.c | 2 +-
arch/arm/mach-imx/mach-vf610.c | 8 +---
9 files changed, 20 insertions(+), 50 deletions(-)
diff --git a/arch/arm/mach-imx/common.h b/arch/arm/mach-imx/common.h
index 5aa5796cff0e..72c3fcc32910 100644
--- a/arch/arm/mach-imx/common.h
+++ b/arch/arm/mach-imx/common.h
@@ -49,7 +49,6 @@ void imx_aips_allow_unprivileged_access(const char *compat);
int mxc_device_init(void);
void imx_set_soc_revision(unsigned int rev);
void imx_init_revision_from_anatop(void);
-struct device *imx_soc_device_init(void);
void imx6_enable_rbc(bool enable);
void imx_gpc_check_dt(void);
void imx_gpc_set_arm_power_in_lpm(bool power_off);
diff --git a/arch/arm/mach-imx/cpu.c b/arch/arm/mach-imx/cpu.c
index e3d12b21d6f6..75ffcba9f878 100644
--- a/arch/arm/mach-imx/cpu.c
+++ b/arch/arm/mach-imx/cpu.c
@@ -83,7 +83,7 @@ void __init imx_aips_allow_unprivileged_access(
}
}
-struct device * __init imx_soc_device_init(void)
+static int __init imx_soc_device_init(void)
{
struct soc_device_attribute *soc_dev_attr;
const char *ocotp_compat = NULL;
@@ -97,7 +97,7 @@ struct device * __init imx_soc_device_init(void)
soc_dev_attr = kzalloc(sizeof(*soc_dev_attr), GFP_KERNEL);
if (!soc_dev_attr)
- return NULL;
+ return -ENOMEM;
soc_dev_attr->family = "Freescale i.MX";
@@ -224,18 +224,24 @@ struct device * __init imx_soc_device_init(void)
soc_dev_attr->revision = kasprintf(GFP_KERNEL, "%d.%d",
(imx_soc_revision >> 4) & 0xf,
imx_soc_revision & 0xf);
- if (!soc_dev_attr->revision)
+ if (!soc_dev_attr->revision) {
+ ret = -ENOMEM;
goto free_soc;
+ }
soc_dev_attr->serial_number = kasprintf(GFP_KERNEL, "%016llX", soc_uid);
- if (!soc_dev_attr->serial_number)
+ if (!soc_dev_attr->serial_number) {
+ ret = -ENOMEM;
goto free_rev;
+ }
soc_dev = soc_device_register(soc_dev_attr);
- if (IS_ERR(soc_dev))
+ if (IS_ERR(soc_dev)) {
+ ret = PTR_ERR(soc_dev);
goto free_serial_number;
+ }
- return soc_device_to_device(soc_dev);
+ return 0;
free_serial_number:
kfree(soc_dev_attr->serial_number);
@@ -243,5 +249,6 @@ struct device * __init imx_soc_device_init(void)
kfree(soc_dev_attr->revision);
free_soc:
kfree(soc_dev_attr);
- return NULL;
+ return ret;
}
+device_initcall(imx_soc_device_init);
diff --git a/arch/arm/mach-imx/mach-imx6q.c b/arch/arm/mach-imx/mach-imx6q.c
index 284bce1112d2..85c084a716ab 100644
--- a/arch/arm/mach-imx/mach-imx6q.c
+++ b/arch/arm/mach-imx/mach-imx6q.c
@@ -245,21 +245,15 @@ static void __init imx6q_axi_init(void)
static void __init imx6q_init_machine(void)
{
- struct device *parent;
-
if (cpu_is_imx6q() && imx_get_soc_revision() == IMX_CHIP_REVISION_2_0)
imx_print_silicon_rev("i.MX6QP", IMX_CHIP_REVISION_1_0);
else
imx_print_silicon_rev(cpu_is_imx6dl() ? "i.MX6DL" : "i.MX6Q",
imx_get_soc_revision());
- parent = imx_soc_device_init();
- if (parent == NULL)
- pr_warn("failed to initialize soc device\n");
-
imx6q_enet_phy_init();
- of_platform_default_populate(NULL, NULL, parent);
+ of_platform_default_populate(NULL, NULL, NULL);
imx_anatop_init();
cpu_is_imx6q() ? imx6q_pm_init() : imx6dl_pm_init();
diff --git a/arch/arm/mach-imx/mach-imx6sl.c b/arch/arm/mach-imx/mach-imx6sl.c
index e27a6889cc56..f6e87363d605 100644
--- a/arch/arm/mach-imx/mach-imx6sl.c
+++ b/arch/arm/mach-imx/mach-imx6sl.c
@@ -45,13 +45,7 @@ static void __init imx6sl_init_late(void)
static void __init imx6sl_init_machine(void)
{
- struct device *parent;
-
- parent = imx_soc_device_init();
- if (parent == NULL)
- pr_warn("failed to initialize soc d
[PATCH V3 3/3] soc: imx: move cpu code to drivers/soc/imx
From: Peng Fan
Move the soc device register code to drivers/soc/imx to align with
i.MX8.
Signed-off-by: Peng Fan
---
arch/arm/mach-imx/cpu.c | 182 ---
drivers/soc/imx/Makefile | 3 +
drivers/soc/imx/soc-imx.c | 192 ++
3 files changed, 195 insertions(+), 182 deletions(-)
create mode 100644 drivers/soc/imx/soc-imx.c
diff --git a/arch/arm/mach-imx/cpu.c b/arch/arm/mach-imx/cpu.c
index 75ffcba9f878..65c7224f5250 100644
--- a/arch/arm/mach-imx/cpu.c
+++ b/arch/arm/mach-imx/cpu.c
@@ -1,25 +1,13 @@
// SPDX-License-Identifier: GPL-2.0
#include
-#include
#include
#include
#include
#include
-#include
-#include
-#include
#include "hardware.h"
#include "common.h"
-#define OCOTP_UID_H0x420
-#define OCOTP_UID_L0x410
-
-#define OCOTP_ULP_UID_10x4b0
-#define OCOTP_ULP_UID_20x4c0
-#define OCOTP_ULP_UID_30x4d0
-#define OCOTP_ULP_UID_40x4e0
-
unsigned int __mxc_cpu_type;
static unsigned int imx_soc_revision;
@@ -82,173 +70,3 @@ void __init imx_aips_allow_unprivileged_access(
imx_set_aips(aips_base_addr);
}
}
-
-static int __init imx_soc_device_init(void)
-{
- struct soc_device_attribute *soc_dev_attr;
- const char *ocotp_compat = NULL;
- struct soc_device *soc_dev;
- struct device_node *root;
- struct regmap *ocotp = NULL;
- const char *soc_id;
- u64 soc_uid = 0;
- u32 val;
- int ret;
-
- soc_dev_attr = kzalloc(sizeof(*soc_dev_attr), GFP_KERNEL);
- if (!soc_dev_attr)
- return -ENOMEM;
-
- soc_dev_attr->family = "Freescale i.MX";
-
- root = of_find_node_by_path("/");
- ret = of_property_read_string(root, "model", _dev_attr->machine);
- of_node_put(root);
- if (ret)
- goto free_soc;
-
- switch (__mxc_cpu_type) {
- case MXC_CPU_MX1:
- soc_id = "i.MX1";
- break;
- case MXC_CPU_MX21:
- soc_id = "i.MX21";
- break;
- case MXC_CPU_MX25:
- soc_id = "i.MX25";
- break;
- case MXC_CPU_MX27:
- soc_id = "i.MX27";
- break;
- case MXC_CPU_MX31:
- soc_id = "i.MX31";
- break;
- case MXC_CPU_MX35:
- soc_id = "i.MX35";
- break;
- case MXC_CPU_MX51:
- soc_id = "i.MX51";
- break;
- case MXC_CPU_MX53:
- soc_id = "i.MX53";
- break;
- case MXC_CPU_IMX6SL:
- ocotp_compat = "fsl,imx6sl-ocotp";
- soc_id = "i.MX6SL";
- break;
- case MXC_CPU_IMX6DL:
- ocotp_compat = "fsl,imx6q-ocotp";
- soc_id = "i.MX6DL";
- break;
- case MXC_CPU_IMX6SX:
- ocotp_compat = "fsl,imx6sx-ocotp";
- soc_id = "i.MX6SX";
- break;
- case MXC_CPU_IMX6Q:
- ocotp_compat = "fsl,imx6q-ocotp";
- soc_id = "i.MX6Q";
- break;
- case MXC_CPU_IMX6UL:
- ocotp_compat = "fsl,imx6ul-ocotp";
- soc_id = "i.MX6UL";
- break;
- case MXC_CPU_IMX6ULL:
- ocotp_compat = "fsl,imx6ull-ocotp";
- soc_id = "i.MX6ULL";
- break;
- case MXC_CPU_IMX6ULZ:
- ocotp_compat = "fsl,imx6ull-ocotp";
- soc_id = "i.MX6ULZ";
- break;
- case MXC_CPU_IMX6SLL:
- ocotp_compat = "fsl,imx6sll-ocotp";
- soc_id = "i.MX6SLL";
- break;
- case MXC_CPU_IMX7D:
- ocotp_compat = "fsl,imx7d-ocotp";
- soc_id = "i.MX7D";
- break;
- case MXC_CPU_IMX7ULP:
- ocotp_compat = "fsl,imx7ulp-ocotp";
- soc_id = "i.MX7ULP";
- break;
- case MXC_CPU_VF500:
- ocotp_compat = "fsl,vf610-ocotp";
- soc_id = "VF500";
- break;
- case MXC_CPU_VF510:
- ocotp_compat = "fsl,vf610-ocotp";
- soc_id = "VF510";
- break;
- case MXC_CPU_VF600:
- ocotp_compat = "fsl,vf610-ocotp";
- soc_id = "VF600";
- break;
- case MXC_CPU_VF610:
- ocotp_compat = "fsl,vf610-ocotp";
- soc_id = &quo
