[PATCH] ARM: at91/dt: sam9x5: fix ADC compatible string
Use the correct compatible string for the ADC of the at91sam9x5 family of SoCs.
Signed-off-by: Alexandre Belloni alexandre.bell...@free-electrons.com
---
arch/arm/boot/dts/at91sam9x5.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/at91sam9x5.dtsi
b/arch/arm/boot/dts/at91sam9x5.dtsi
index 2c0d6ea3ab41..5d7cf394f537 100644
--- a/arch/arm/boot/dts/at91sam9x5.dtsi
+++ b/arch/arm/boot/dts/at91sam9x5.dtsi
@@ -964,7 +964,7 @@
adc0: adc@f804c000 {
#address-cells = 1;
#size-cells = 0;
- compatible = atmel,at91sam9260-adc;
+ compatible = atmel,at91sam9x5-adc;
reg = 0xf804c000 0x100;
interrupts = 19 IRQ_TYPE_LEVEL_HIGH 0;
clocks = adc_clk,
--
1.9.1
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Re: [PATCH v2 07/12] usb: chipidea: add a generic driver
On 01/07/2014 at 16:30:08 +0800, Peter Chen wrote : Well, there is nothing specific about the Berlin CI. Some subsystems use the 'generic' keyword in these cases. Do you see a particular reason I should use some Berlin related compatible here? Not must, one suggestion is: can you change the compatible string to chipidea-usb-generic? I don't know about ChipIdea/ARC/DW's product portfolio but I guess the compatible should also carry '2.0' or 'usb2' in it. Or we just use some version number like 'chipidea,ci13000' or 'chipidea,ci13xxx'. The recommended format for compatible string is: manufacturer,model, I agree with chipidea,ci13xxx, thanks. I think we should probably avoid using wildcards in the compatible string. -- Alexandre Belloni, Free Electrons Embedded Linux, Kernel and Android engineering http://free-electrons.com -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCH 05/33] ARM: at91/dt: rm9200: define clocks
Signed-off-by: Alexandre Belloni alexandre.bell...@free-electrons.com
---
arch/arm/boot/dts/at91rm9200.dtsi | 304 ++
1 file changed, 304 insertions(+)
diff --git a/arch/arm/boot/dts/at91rm9200.dtsi
b/arch/arm/boot/dts/at91rm9200.dtsi
index c61b16fba79b..477cfe570f47 100644
--- a/arch/arm/boot/dts/at91rm9200.dtsi
+++ b/arch/arm/boot/dts/at91rm9200.dtsi
@@ -14,6 +14,7 @@
#include dt-bindings/pinctrl/at91.h
#include dt-bindings/interrupt-controller/irq.h
#include dt-bindings/gpio/gpio.h
+#include dt-bindings/clock/at91.h
/ {
model = Atmel AT91RM9200 family SoC;
@@ -51,6 +52,20 @@
reg = 0x2000 0x0400;
};
+ clocks {
+ slow_xtal: slow_xtal {
+ compatible = fixed-clock;
+ #clock-cells = 0;
+ clock-frequency = 0;
+ };
+
+ main_xtal: main_xtal {
+ compatible = fixed-clock;
+ #clock-cells = 0;
+ clock-frequency = 0;
+ };
+ };
+
ahb {
compatible = simple-bus;
#address-cells = 1;
@@ -79,6 +94,260 @@
pmc: pmc@fc00 {
compatible = atmel,at91rm9200-pmc;
reg = 0xfc00 0x100;
+ interrupts = 1 IRQ_TYPE_LEVEL_HIGH 7;
+ interrupt-controller;
+ #address-cells = 1;
+ #size-cells = 0;
+ #interrupt-cells = 1;
+
+ main_osc: main_osc {
+ compatible =
atmel,at91rm9200-clk-main-osc;
+ #clock-cells = 0;
+ interrupts-extended = pmc
AT91_PMC_MOSCS;
+ clocks = main_xtal;
+ };
+
+ main: mainck {
+ compatible =
atmel,at91rm9200-clk-main;
+ #clock-cells = 0;
+ clocks = main_osc;
+ };
+
+ plla: pllack {
+ compatible = atmel,at91rm9200-clk-pll;
+ #clock-cells = 0;
+ interrupts-extended = pmc
AT91_PMC_LOCKA;
+ clocks = main;
+ reg = 0;
+ atmel,clk-input-range = 100
3200;
+ #atmel,pll-clk-output-range-cells = 3;
+ atmel,pll-clk-output-ranges = 8000
16000 0,
+ 15000
18000 2;
+ };
+
+ pllb: pllbck {
+ compatible = atmel,at91rm9200-clk-pll;
+ #clock-cells = 0;
+ interrupts-extended = pmc
AT91_PMC_LOCKB;
+ clocks = main;
+ reg = 1;
+ atmel,clk-input-range = 100
3200;
+ #atmel,pll-clk-output-range-cells = 3;
+ atmel,pll-clk-output-ranges = 8000
16000 0,
+ 15000
18000 2;
+ };
+
+ mck: masterck {
+ compatible =
atmel,at91rm9200-clk-master;
+ #clock-cells = 0;
+ interrupts-extended = pmc
AT91_PMC_MCKRDY;
+ clocks = slow_xtal, main,
plla, pllb;
+ atmel,clk-output-range = 0 8000;
+ atmel,clk-divisors = 1 2 3 4;
+ };
+
+ usb: usbck {
+ compatible = atmel,at91rm9200-clk-usb;
+ #clock-cells = 0;
+ atmel,clk-divisors = 1 2;
+ clocks = pllb;
+ };
+
+ prog: progck {
+ compatible =
atmel,at91rm9200-clk-programmable;
+ #address-cells = 1;
+ #size-cells = 0
[PATCH 03/33] clk: at91: main: warn when the main crystal frequency is not set
When the main crystal frequency is not set, the main clock is approximated using the MAINF value in the CKGR_MCFR register. Warn the user in that case. Signed-off-by: Alexandre Belloni alexandre.bell...@free-electrons.com --- drivers/clk/at91/clk-main.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/clk/at91/clk-main.c b/drivers/clk/at91/clk-main.c index 733306131b99..59fa3cc96c9e 100644 --- a/drivers/clk/at91/clk-main.c +++ b/drivers/clk/at91/clk-main.c @@ -388,6 +388,7 @@ static unsigned long clk_main_recalc_rate(struct at91_pmc *pmc, if (parent_rate) return parent_rate; + pr_warn(Main crystal frequency not set, using approximate value\n); tmp = pmc_read(pmc, AT91_CKGR_MCFR); if (!(tmp AT91_PMC_MAINRDY)) return 0; -- 1.9.1 -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCH 07/33] ARM: at91/dt: at91rm9200ek: define crystals frequencies
Define at91rm9200ek main and slow crystals frequencies.
Signed-off-by: Alexandre Belloni alexandre.bell...@free-electrons.com
---
arch/arm/boot/dts/at91rm9200ek.dts | 8
1 file changed, 8 insertions(+)
diff --git a/arch/arm/boot/dts/at91rm9200ek.dts
b/arch/arm/boot/dts/at91rm9200ek.dts
index df6b0aa0e4dd..43eb779dd6f6 100644
--- a/arch/arm/boot/dts/at91rm9200ek.dts
+++ b/arch/arm/boot/dts/at91rm9200ek.dts
@@ -25,6 +25,14 @@
compatible = atmel,osc, fixed-clock;
clock-frequency = 18432000;
};
+
+ slow_xtal {
+ clock-frequency = 32768;
+ };
+
+ main_xtal {
+ clock-frequency = 18432000;
+ };
};
ahb {
--
1.9.1
--
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[PATCH 00/33] ARM: at91: Switch remaining SoCs and boards to CCF
This patch set adds support for the common clock framwork to the remaining atml SoCs: at91rm9200, at91sam9260, at91sam9263, at91sam9g45. It also defines the necessary main crystal and slow crystal frequencies. I couldn't find datasheets for the following boards: - mpa1600 - ge863-pro3 - animeo_ip - tny_a9260 For those, I assumed the 32kHz crystal is present on the board as this is the most common implementation (only one board doesn't have it). Please correct me if this is wrong. I could not test at91rm9200 as I don't own any board with that chip. Cc: Douglas Gilbert dgilb...@interlog.com Cc: Gregory Hermant gregory.herm...@calao-systems.com Cc: Joachim Eastwood manab...@gmail.com Cc: Fabio Porcedda fabio.porce...@gmail.com Cc: Jiri Prchal jiri.prc...@aksignal.cz Cc: Tim Schendekehl tim.schendek...@egnite.de Cc: Gael Portay g.por...@overkiz.com Cc: Rodolfo Giometti giome...@linux.it Alexandre Belloni (33): Documentation: dt: document all the atmel pmc compatibles ARM: at91/dt: ariag25: define crystals frequencies clk: at91: main: warn when the main crystal frequency is not set ARM: at91: prepare common clk transition for rm9200 ARM: at91/dt: rm9200: define clocks ARM: at91: move at91rm9200 SoC to the CCF ARM: at91/dt: at91rm9200ek: define crystals frequencies ARM: at91: prepare common clk transition for sam9260 ARM: at91/dt: sam9260: define clocks ARM: at91/dt: sam9g20: define clocks ARM: at91: move at91sam9260 SoCs to the CCF ARM: at91/dt: at91sam9g20ek: define crystals frequencies ARM: at91/dt: foxg20: define crystals frequencies ARM: at91/dt: usb_a9260: define crystals frequencies ARM: at91/dt: tny_a9260: define crystals frequencies ARM: at91/dt: qil_a9260: define crystals frequencies ARM: at91/dt: mpa1600: define crytals frequencies ARM: at91/dt: ge863-pro3: define crystals frequencies ARM: at91/dt: ethernut5: define crystals frequencies ARM: at91/dt: animeo_ip: define crystals frequencies ARM: at91/dt: kizbox: define main crystal frequency ARM: at91: prepare common clk transition for sam9g45 ARM: at91/dt: sam9g45: define clocks ARM: at91: move at91sam9g45 SoC to the CCF ARM: at91/dt: sam9m10g45ek: define crystals frequencies ARM: at91/dt: pm9g45: crystals frequencies ARM: at91/dt: cosino define crystals frequencies ARM: at91: prepare common clk transition for sam9263 ARM: at91/dt: sam9263: define clocks ARM: at91: move at91sam9263 SoC to the CCF ARM: at91/dt: sam9263ek: define crystals frequencies ARM: at91/dt: tny_a9263: define crystals frequencies ARM: at91/dt: usb_a9263: define crystals frequencies .../devicetree/bindings/arm/atmel-pmc.txt | 5 +- arch/arm/boot/dts/animeo_ip.dts| 8 + arch/arm/boot/dts/at91-ariag25.dts | 8 + arch/arm/boot/dts/at91-cosino.dtsi | 8 + arch/arm/boot/dts/at91-foxg20.dts | 8 + arch/arm/boot/dts/at91-qil_a9260.dts | 8 + arch/arm/boot/dts/at91rm9200.dtsi | 304 ++ arch/arm/boot/dts/at91rm9200ek.dts | 8 + arch/arm/boot/dts/at91sam9260.dtsi | 314 ++- arch/arm/boot/dts/at91sam9263.dtsi | 311 +++ arch/arm/boot/dts/at91sam9263ek.dts| 8 + arch/arm/boot/dts/at91sam9g20.dtsi | 24 ++ arch/arm/boot/dts/at91sam9g20ek_common.dtsi| 8 + arch/arm/boot/dts/at91sam9g45.dtsi | 340 - arch/arm/boot/dts/at91sam9m10g45ek.dts | 8 + arch/arm/boot/dts/ethernut5.dts| 10 + arch/arm/boot/dts/ge863-pro3.dtsi | 8 + arch/arm/boot/dts/kizbox.dts | 4 + arch/arm/boot/dts/mpa1600.dts | 8 + arch/arm/boot/dts/pm9g45.dts | 8 + arch/arm/boot/dts/tny_a9260_common.dtsi| 8 + arch/arm/boot/dts/tny_a9263.dts| 8 + arch/arm/boot/dts/usb_a9260_common.dtsi| 8 + arch/arm/boot/dts/usb_a9263.dts| 8 + arch/arm/mach-at91/Kconfig | 4 - arch/arm/mach-at91/at91rm9200.c| 6 +- arch/arm/mach-at91/at91sam9260.c | 6 +- arch/arm/mach-at91/at91sam9263.c | 6 +- arch/arm/mach-at91/at91sam9g45.c | 6 +- drivers/clk/at91/clk-main.c| 1 + 30 files changed, 1458 insertions(+), 11 deletions(-) -- 1.9.1 -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCH 13/33] ARM: at91/dt: foxg20: define crystals frequencies
Define Acme Systems srl Fox G20 main and slow crystals frequencies.
Signed-off-by: Alexandre Belloni alexandre.bell...@free-electrons.com
Cc: Douglas Gilbert dgilb...@interlog.com
---
arch/arm/boot/dts/at91-foxg20.dts | 8
1 file changed, 8 insertions(+)
diff --git a/arch/arm/boot/dts/at91-foxg20.dts
b/arch/arm/boot/dts/at91-foxg20.dts
index cbe967343997..f89598af4c2b 100644
--- a/arch/arm/boot/dts/at91-foxg20.dts
+++ b/arch/arm/boot/dts/at91-foxg20.dts
@@ -31,6 +31,14 @@
compatible = atmel,osc, fixed-clock;
clock-frequency = 18432000;
};
+
+ slow_xtal {
+ clock-frequency = 32768;
+ };
+
+ main_xtal {
+ clock-frequency = 18432000;
+ };
};
ahb {
--
1.9.1
--
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[PATCH 21/33] ARM: at91/dt: kizbox: define main crystal frequency
Define kizbox board's main crystal frequency.
Signed-off-by: Alexandre Belloni alexandre.bell...@free-electrons.com
Cc: Gael Portay g.por...@overkiz.com
---
arch/arm/boot/dts/kizbox.dts | 4
1 file changed, 4 insertions(+)
diff --git a/arch/arm/boot/dts/kizbox.dts b/arch/arm/boot/dts/kizbox.dts
index 928f6eef2d59..e83e4f9310b8 100644
--- a/arch/arm/boot/dts/kizbox.dts
+++ b/arch/arm/boot/dts/kizbox.dts
@@ -30,6 +30,10 @@
compatible = atmel,osc, fixed-clock;
clock-frequency = 18432000;
};
+
+ main_xtal {
+ clock-frequency = 18432000;
+ };
};
ahb {
--
1.9.1
--
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[PATCH 12/33] ARM: at91/dt: at91sam9g20ek: define crystals frequencies
Define at91sam9g20ek main and slow crystals frequencies.
Signed-off-by: Alexandre Belloni alexandre.bell...@free-electrons.com
---
arch/arm/boot/dts/at91sam9g20ek_common.dtsi | 8
1 file changed, 8 insertions(+)
diff --git a/arch/arm/boot/dts/at91sam9g20ek_common.dtsi
b/arch/arm/boot/dts/at91sam9g20ek_common.dtsi
index cb2c010e08e2..d2919108e92d 100644
--- a/arch/arm/boot/dts/at91sam9g20ek_common.dtsi
+++ b/arch/arm/boot/dts/at91sam9g20ek_common.dtsi
@@ -26,6 +26,14 @@
compatible = atmel,osc, fixed-clock;
clock-frequency = 18432000;
};
+
+ slow_xtal {
+ clock-frequency = 32768;
+ };
+
+ main_xtal {
+ clock-frequency = 18432000;
+ };
};
ahb {
--
1.9.1
--
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[PATCH 23/33] ARM: at91/dt: sam9g45: define clocks
Define the at91sam9g45 clocks in the SoC dtsi file.
Signed-off-by: Alexandre Belloni alexandre.bell...@free-electrons.com
---
arch/arm/boot/dts/at91sam9g45.dtsi | 340 -
1 file changed, 339 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/at91sam9g45.dtsi
b/arch/arm/boot/dts/at91sam9g45.dtsi
index ace6bf197b70..c76a60a2e239 100644
--- a/arch/arm/boot/dts/at91sam9g45.dtsi
+++ b/arch/arm/boot/dts/at91sam9g45.dtsi
@@ -14,6 +14,7 @@
#include dt-bindings/pinctrl/at91.h
#include dt-bindings/interrupt-controller/irq.h
#include dt-bindings/gpio/gpio.h
+#include dt-bindings/clock/at91.h
/ {
model = Atmel AT91SAM9G45 family SoC;
@@ -53,6 +54,26 @@
reg = 0x7000 0x1000;
};
+ clocks {
+ slow_xtal: slow_xtal {
+ compatible = fixed-clock;
+ #clock-cells = 0;
+ clock-frequency = 0;
+ };
+
+ main_xtal: main_xtal {
+ compatible = fixed-clock;
+ #clock-cells = 0;
+ clock-frequency = 0;
+ };
+
+ adc_op_clk: adc_op_clk{
+ compatible = fixed-clock;
+ #clock-cells = 0;
+ clock-frequency = 30;
+ };
+ };
+
ahb {
compatible = simple-bus;
#address-cells = 1;
@@ -80,8 +101,274 @@
};
pmc: pmc@fc00 {
- compatible = atmel,at91rm9200-pmc;
+ compatible = atmel,at91sam9g45-pmc;
reg = 0xfc00 0x100;
+ interrupts = 1 IRQ_TYPE_LEVEL_HIGH 7;
+ interrupt-controller;
+ #address-cells = 1;
+ #size-cells = 0;
+ #interrupt-cells = 1;
+
+ main_osc: main_osc {
+ compatible =
atmel,at91rm9200-clk-main-osc;
+ #clock-cells = 0;
+ interrupts-extended = pmc
AT91_PMC_MOSCS;
+ clocks = main_xtal;
+ };
+
+ main: mainck {
+ compatible =
atmel,at91rm9200-clk-main;
+ #clock-cells = 0;
+ clocks = main_osc;
+ };
+
+ plla: pllack {
+ compatible = atmel,at91rm9200-clk-pll;
+ #clock-cells = 0;
+ interrupts-extended = pmc
AT91_PMC_LOCKA;
+ clocks = main;
+ reg = 0;
+ atmel,clk-input-range = 200
3200;
+ #atmel,pll-clk-output-range-cells = 4;
+ atmel,pll-clk-output-ranges =
74500 8 0 0
+
69500 75000 1 0
+
64500 7 2 0
+
59500 65000 3 0
+
54500 6 0 1
+
49500 55500 1 1
+
44500 5 2 1
+
4 45000 3 1;
+ };
+
+ plladiv: plladivck {
+ compatible =
atmel,at91sam9x5-clk-plldiv;
+ #clock-cells = 0;
+ clocks = plla;
+ };
+
+ utmi: utmick {
+ compatible =
atmel,at91sam9x5-clk-utmi;
+ #clock-cells = 0;
+ interrupts-extended = pmc
AT91_PMC_LOCKU;
+ clocks = main;
+ };
+
+ mck: masterck {
+ compatible =
atmel,at91rm9200-clk-master;
+ #clock-cells = 0;
+ interrupts-extended = pmc
AT91_PMC_MCKRDY
[PATCH 31/33] ARM: at91/dt: sam9263ek: define crystals frequencies
Define at91sam9263ek main and slow crystals frequencies.
Signed-off-by: Alexandre Belloni alexandre.bell...@free-electrons.com
---
arch/arm/boot/dts/at91sam9263ek.dts | 8
1 file changed, 8 insertions(+)
diff --git a/arch/arm/boot/dts/at91sam9263ek.dts
b/arch/arm/boot/dts/at91sam9263ek.dts
index 15009c9f2293..5cf93eecd8f1 100644
--- a/arch/arm/boot/dts/at91sam9263ek.dts
+++ b/arch/arm/boot/dts/at91sam9263ek.dts
@@ -29,6 +29,14 @@
compatible = atmel,osc, fixed-clock;
clock-frequency = 16367660;
};
+
+ slow_xtal {
+ clock-frequency = 32768;
+ };
+
+ main_xtal {
+ clock-frequency = 16367660;
+ };
};
ahb {
--
1.9.1
--
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[PATCH 26/33] ARM: at91/dt: pm9g45: crystals frequencies
Define Ronetix pm9g45 main and slow crystals frequencies.
Signed-off-by: Alexandre Belloni alexandre.bell...@free-electrons.com
---
arch/arm/boot/dts/pm9g45.dts | 8
1 file changed, 8 insertions(+)
diff --git a/arch/arm/boot/dts/pm9g45.dts b/arch/arm/boot/dts/pm9g45.dts
index 33ffabe9c4c8..66afcff67fde 100644
--- a/arch/arm/boot/dts/pm9g45.dts
+++ b/arch/arm/boot/dts/pm9g45.dts
@@ -29,6 +29,14 @@
compatible = atmel,osc, fixed-clock;
clock-frequency = 1200;
};
+
+ slow_xtal {
+ clock-frequency = 32768;
+ };
+
+ main_xtal {
+ clock-frequency = 1200;
+ };
};
ahb {
--
1.9.1
--
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[PATCH 33/33] ARM: at91/dt: usb_a9263: define crystals frequencies
Define Calao USB-A9263 main and slow crystals frequencies.
Signed-off-by: Alexandre Belloni alexandre.bell...@free-electrons.com
Cc: Gregory Hermant gregory.herm...@calao-systems.com
---
arch/arm/boot/dts/usb_a9263.dts | 8
1 file changed, 8 insertions(+)
diff --git a/arch/arm/boot/dts/usb_a9263.dts b/arch/arm/boot/dts/usb_a9263.dts
index 290e60383baf..68c0de36c339 100644
--- a/arch/arm/boot/dts/usb_a9263.dts
+++ b/arch/arm/boot/dts/usb_a9263.dts
@@ -29,6 +29,14 @@
compatible = atmel,osc, fixed-clock;
clock-frequency = 1200;
};
+
+ slow_xtal {
+ clock-frequency = 32768;
+ };
+
+ main_xtal {
+ clock-frequency = 1200;
+ };
};
ahb {
--
1.9.1
--
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[PATCH 32/33] ARM: at91/dt: tny_a9263: define crystals frequencies
Define Calao TNY-A9263 main and slow crystals frequencies.
Signed-off-by: Alexandre Belloni alexandre.bell...@free-electrons.com
Cc: Gregory Hermant gregory.herm...@calao-systems.com
---
arch/arm/boot/dts/tny_a9263.dts | 8
1 file changed, 8 insertions(+)
diff --git a/arch/arm/boot/dts/tny_a9263.dts b/arch/arm/boot/dts/tny_a9263.dts
index 0751a6a979a8..3043296345b7 100644
--- a/arch/arm/boot/dts/tny_a9263.dts
+++ b/arch/arm/boot/dts/tny_a9263.dts
@@ -29,6 +29,14 @@
compatible = atmel,osc, fixed-clock;
clock-frequency = 1200;
};
+
+ slow_xtal {
+ clock-frequency = 32768;
+ };
+
+ main_xtal {
+ clock-frequency = 1200;
+ };
};
ahb {
--
1.9.1
--
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[PATCH 30/33] ARM: at91: move at91sam9263 SoC to the CCF
This patch removes the selection of AT91_USE_OLD_CLK when selecting at91sam9263 SoC support. This will automatically enable COMMON_CLK_AT91 option and add support for at91 common clock implementation. Signed-off-by: Alexandre Belloni alexandre.bell...@free-electrons.com --- arch/arm/mach-at91/Kconfig | 1 - 1 file changed, 1 deletion(-) diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig index 461966d0ee4d..6cc6f7aebdae 100644 --- a/arch/arm/mach-at91/Kconfig +++ b/arch/arm/mach-at91/Kconfig @@ -138,7 +138,6 @@ config SOC_AT91SAM9263 select HAVE_AT91_DBGU1 select HAVE_FB_ATMEL select SOC_AT91SAM9 - select AT91_USE_OLD_CLK select HAVE_AT91_USB_CLK config SOC_AT91SAM9RL -- 1.9.1 -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCH 29/33] ARM: at91/dt: sam9263: define clocks
Define the at91sam9263 clocks in the SoC dtsi file.
Signed-off-by: Alexandre Belloni alexandre.bell...@free-electrons.com
---
arch/arm/boot/dts/at91sam9263.dtsi | 311 +
1 file changed, 311 insertions(+)
diff --git a/arch/arm/boot/dts/at91sam9263.dtsi
b/arch/arm/boot/dts/at91sam9263.dtsi
index fece8665fb63..88a03f453d9d 100644
--- a/arch/arm/boot/dts/at91sam9263.dtsi
+++ b/arch/arm/boot/dts/at91sam9263.dtsi
@@ -10,6 +10,7 @@
#include dt-bindings/pinctrl/at91.h
#include dt-bindings/interrupt-controller/irq.h
#include dt-bindings/gpio/gpio.h
+#include dt-bindings/clock/at91.h
/ {
model = Atmel AT91SAM9263 family SoC;
@@ -32,6 +33,7 @@
ssc1 = ssc1;
pwm0 = pwm0;
};
+
cpus {
#address-cells = 0;
#size-cells = 0;
@@ -46,6 +48,20 @@
reg = 0x2000 0x0800;
};
+ clocks {
+ main_xtal: main_xtal {
+ compatible = fixed-clock;
+ #clock-cells = 0;
+ clock-frequency = 0;
+ };
+
+ slow_xtal: slow_xtal {
+ compatible = fixed-clock;
+ #clock-cells = 0;
+ clock-frequency = 0;
+ };
+ };
+
ahb {
compatible = simple-bus;
#address-cells = 1;
@@ -69,6 +85,264 @@
pmc: pmc@fc00 {
compatible = atmel,at91rm9200-pmc;
reg = 0xfc00 0x100;
+ interrupts = 1 IRQ_TYPE_LEVEL_HIGH 7;
+ interrupt-controller;
+ #address-cells = 1;
+ #size-cells = 0;
+ #interrupt-cells = 1;
+
+ main_osc: main_osc {
+ compatible =
atmel,at91rm9200-clk-main-osc;
+ #clock-cells = 0;
+ interrupts-extended = pmc
AT91_PMC_MOSCS;
+ clocks = main_xtal;
+ };
+
+ main: mainck {
+ compatible =
atmel,at91rm9200-clk-main;
+ #clock-cells = 0;
+ clocks = main_osc;
+ };
+
+ plla: pllack {
+ compatible = atmel,at91rm9200-clk-pll;
+ #clock-cells = 0;
+ interrupts-extended = pmc
AT91_PMC_LOCKA;
+ clocks = main;
+ reg = 0;
+ atmel,clk-input-range = 100
3200;
+ #atmel,pll-clk-output-range-cells = 4;
+ atmel,pll-clk-output-ranges = 8000
2 0 1,
+ 19000
24000 2 1;
+ };
+
+ pllb: pllbck {
+ compatible = atmel,at91rm9200-clk-pll;
+ #clock-cells = 0;
+ interrupts-extended = pmc
AT91_PMC_LOCKB;
+ clocks = main;
+ reg = 1;
+ atmel,clk-input-range = 100
500;
+ #atmel,pll-clk-output-range-cells = 4;
+ atmel,pll-clk-output-ranges = 7000
13000 1 1;
+ };
+
+ mck: masterck {
+ compatible =
atmel,at91rm9200-clk-master;
+ #clock-cells = 0;
+ interrupts-extended = pmc
AT91_PMC_MCKRDY;
+ clocks = slow_xtal, main,
plla, pllb;
+ atmel,clk-output-range = 0 12000;
+ atmel,clk-divisors = 1 2 4 0;
+ };
+
+ usb: usbck {
+ compatible = atmel,at91rm9200-clk-usb;
+ #clock-cells = 0;
+ atmel,clk-divisors = 1 2 4 0;
+ clocks = pllb;
+ };
+
+ prog: progck {
+ compatible =
atmel,at91rm9200-clk
[PATCH 25/33] ARM: at91/dt: sam9m10g45ek: define crystals frequencies
Define at91sam9m10g45ek main and slow crystals frequencies.
Signed-off-by: Alexandre Belloni alexandre.bell...@free-electrons.com
---
arch/arm/boot/dts/at91sam9m10g45ek.dts | 8
1 file changed, 8 insertions(+)
diff --git a/arch/arm/boot/dts/at91sam9m10g45ek.dts
b/arch/arm/boot/dts/at91sam9m10g45ek.dts
index 9f5b0a674995..96ccc7de4f0a 100644
--- a/arch/arm/boot/dts/at91sam9m10g45ek.dts
+++ b/arch/arm/boot/dts/at91sam9m10g45ek.dts
@@ -31,6 +31,14 @@
compatible = atmel,osc, fixed-clock;
clock-frequency = 1200;
};
+
+ slow_xtal {
+ clock-frequency = 32768;
+ };
+
+ main_xtal {
+ clock-frequency = 1200;
+ };
};
ahb {
--
1.9.1
--
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the body of a message to majord...@vger.kernel.org
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Please read the FAQ at http://www.tux.org/lkml/
[PATCH 27/33] ARM: at91/dt: cosino define crystals frequencies
Define Cosino boards main and slow crystals frequencies.
Signed-off-by: Alexandre Belloni alexandre.bell...@free-electrons.com
Cc: Rodolfo Giometti giome...@linux.it
---
arch/arm/boot/dts/at91-cosino.dtsi | 8
1 file changed, 8 insertions(+)
diff --git a/arch/arm/boot/dts/at91-cosino.dtsi
b/arch/arm/boot/dts/at91-cosino.dtsi
index df4b78695695..b6ea3f4a7206 100644
--- a/arch/arm/boot/dts/at91-cosino.dtsi
+++ b/arch/arm/boot/dts/at91-cosino.dtsi
@@ -34,6 +34,14 @@
compatible = atmel,osc, fixed-clock;
clock-frequency = 1200;
};
+
+ slow_xtal {
+ clock-frequency = 32768;
+ };
+
+ main_xtal {
+ clock-frequency = 1200;
+ };
};
ahb {
--
1.9.1
--
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the body of a message to majord...@vger.kernel.org
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[PATCH 28/33] ARM: at91: prepare common clk transition for sam9263
Enclose the sam9263 old clk registration in #if defined(CONFIG_OLD_CLK_AT91) #endif Signed-off-by: Alexandre Belloni alexandre.bell...@free-electrons.com --- arch/arm/mach-at91/at91sam9263.c | 6 +- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/arch/arm/mach-at91/at91sam9263.c b/arch/arm/mach-at91/at91sam9263.c index f30290572293..c07465361947 100644 --- a/arch/arm/mach-at91/at91sam9263.c +++ b/arch/arm/mach-at91/at91sam9263.c @@ -25,10 +25,11 @@ #include at91_rstc.h #include soc.h #include generic.h -#include clock.h #include sam9_smc.h #include pm.h +#if defined(CONFIG_OLD_CLK_AT91) +#include clock.h /* * Clocks * */ @@ -280,6 +281,9 @@ static void __init at91sam9263_register_clocks(void) clk_register(pck2); clk_register(pck3); } +#else +#define at91sam9263_register_clocks NULL +#endif /* * GPIO -- 1.9.1 -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCH 22/33] ARM: at91: prepare common clk transition for sam9g45
Enclose the sam9g45 old clk registration in #if defined(CONFIG_OLD_CLK_AT91) #endif Signed-off-by: Alexandre Belloni alexandre.bell...@free-electrons.com --- arch/arm/mach-at91/at91sam9g45.c | 6 +- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/arch/arm/mach-at91/at91sam9g45.c b/arch/arm/mach-at91/at91sam9g45.c index 9d3d544ac19c..0d5d85797cd6 100644 --- a/arch/arm/mach-at91/at91sam9g45.c +++ b/arch/arm/mach-at91/at91sam9g45.c @@ -25,10 +25,11 @@ #include at91_aic.h #include soc.h #include generic.h -#include clock.h #include sam9_smc.h #include pm.h +#if defined(CONFIG_OLD_CLK_AT91) +#include clock.h /* * Clocks * */ @@ -331,6 +332,9 @@ static void __init at91sam9g45_register_clocks(void) clk_register(pck0); clk_register(pck1); } +#else +#define at91sam9g45_register_clocks NULL +#endif /* * GPIO -- 1.9.1 -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCH 24/33] ARM: at91: move at91sam9g45 SoC to the CCF
This patch removes the selection of AT91_USE_OLD_CLK when selecting at91sam9g45 SoC support. This will automatically enable COMMON_CLK_AT91 option and add support for at91 common clock implementation. Signed-off-by: Alexandre Belloni alexandre.bell...@free-electrons.com --- arch/arm/mach-at91/Kconfig | 1 - 1 file changed, 1 deletion(-) diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig index a2efe6e1e224..461966d0ee4d 100644 --- a/arch/arm/mach-at91/Kconfig +++ b/arch/arm/mach-at91/Kconfig @@ -153,7 +153,6 @@ config SOC_AT91SAM9G45 select HAVE_AT91_DBGU1 select HAVE_FB_ATMEL select SOC_AT91SAM9 - select AT91_USE_OLD_CLK select HAVE_AT91_UTMI select HAVE_AT91_USB_CLK help -- 1.9.1 -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCH 20/33] ARM: at91/dt: animeo_ip: define crystals frequencies
Define Somfy Animeo IP main and slow crystals frequencies.
Signed-off-by: Alexandre Belloni alexandre.bell...@free-electrons.com
---
arch/arm/boot/dts/animeo_ip.dts | 8
1 file changed, 8 insertions(+)
diff --git a/arch/arm/boot/dts/animeo_ip.dts b/arch/arm/boot/dts/animeo_ip.dts
index 3c4f6d983cbd..4e0ad3b82796 100644
--- a/arch/arm/boot/dts/animeo_ip.dts
+++ b/arch/arm/boot/dts/animeo_ip.dts
@@ -40,6 +40,14 @@
compatible = atmel,osc, fixed-clock;
clock-frequency = 18432000;
};
+
+ slow_xtal {
+ clock-frequency = 32768;
+ };
+
+ main_xtal {
+ clock-frequency = 18432000;
+ };
};
ahb {
--
1.9.1
--
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the body of a message to majord...@vger.kernel.org
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Please read the FAQ at http://www.tux.org/lkml/
[PATCH 18/33] ARM: at91/dt: ge863-pro3: define crystals frequencies
Define Telit GE863-PRO3, AK signal CDU and Telit EVK-PRO3 main and slow
crystals frequencies.
Signed-off-by: Alexandre Belloni alexandre.bell...@free-electrons.com
Cc: Fabio Porcedda fabio.porce...@gmail.com
Cc: Jiri Prchal jiri.prc...@aksignal.cz
---
arch/arm/boot/dts/ge863-pro3.dtsi | 8
1 file changed, 8 insertions(+)
diff --git a/arch/arm/boot/dts/ge863-pro3.dtsi
b/arch/arm/boot/dts/ge863-pro3.dtsi
index 230099bb31c8..a32fdbefbbd9 100644
--- a/arch/arm/boot/dts/ge863-pro3.dtsi
+++ b/arch/arm/boot/dts/ge863-pro3.dtsi
@@ -19,6 +19,14 @@
compatible = atmel,osc, fixed-clock;
clock-frequency = 600;
};
+
+ slow_xtal {
+ clock-frequency = 32768;
+ };
+
+ main_xtal {
+ clock-frequency = 600;
+ };
};
ahb {
--
1.9.1
--
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the body of a message to majord...@vger.kernel.org
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Please read the FAQ at http://www.tux.org/lkml/
[PATCH 15/33] ARM: at91/dt: tny_a9260: define crystals frequencies
Define Calao TNY-A9260 and TNY-A9G20 main and slow crystals frequencies.
Signed-off-by: Alexandre Belloni alexandre.bell...@free-electrons.com
Cc: Gregory Hermant gregory.herm...@calao-systems.com
---
arch/arm/boot/dts/tny_a9260_common.dtsi | 8
1 file changed, 8 insertions(+)
diff --git a/arch/arm/boot/dts/tny_a9260_common.dtsi
b/arch/arm/boot/dts/tny_a9260_common.dtsi
index 0e6d3de2e09e..ce7138c3af1b 100644
--- a/arch/arm/boot/dts/tny_a9260_common.dtsi
+++ b/arch/arm/boot/dts/tny_a9260_common.dtsi
@@ -24,6 +24,14 @@
compatible = atmel,osc, fixed-clock;
clock-frequency = 1200;
};
+
+ slow_xtal {
+ clock-frequency = 32768;
+ };
+
+ main_xtal {
+ clock-frequency = 1200;
+ };
};
ahb {
--
1.9.1
--
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the body of a message to majord...@vger.kernel.org
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Please read the FAQ at http://www.tux.org/lkml/
[PATCH 19/33] ARM: at91/dt: ethernut5: define crystals frequencies
Define egnite Ethernut 5 main and slow crystals frequencies.
Signed-off-by: Alexandre Belloni alexandre.bell...@free-electrons.com
Cc: Tim Schendekehl tim.schendek...@egnite.de
---
arch/arm/boot/dts/ethernut5.dts | 10 ++
1 file changed, 10 insertions(+)
diff --git a/arch/arm/boot/dts/ethernut5.dts b/arch/arm/boot/dts/ethernut5.dts
index 143b6d25bc80..8f941c2db7c6 100644
--- a/arch/arm/boot/dts/ethernut5.dts
+++ b/arch/arm/boot/dts/ethernut5.dts
@@ -20,6 +20,16 @@
reg = 0x2000 0x0800;
};
+ clocks {
+ slow_xtal {
+ clock-frequency = 32768;
+ };
+
+ main_xtal {
+ clock-frequency = 18432000;
+ };
+ };
+
ahb {
apb {
dbgu: serial@f200 {
--
1.9.1
--
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Please read the FAQ at http://www.tux.org/lkml/
[PATCH 17/33] ARM: at91/dt: mpa1600: define crytals frequencies
Define Phontech MPA 1600 main and slow crystals frequencies.
Signed-off-by: Alexandre Belloni alexandre.bell...@free-electrons.com
Cc: Joachim Eastwood manab...@gmail.com
---
arch/arm/boot/dts/mpa1600.dts | 8
1 file changed, 8 insertions(+)
diff --git a/arch/arm/boot/dts/mpa1600.dts b/arch/arm/boot/dts/mpa1600.dts
index ccf9ea242f72..f0f5e1098928 100644
--- a/arch/arm/boot/dts/mpa1600.dts
+++ b/arch/arm/boot/dts/mpa1600.dts
@@ -25,6 +25,14 @@
compatible = atmel,osc, fixed-clock;
clock-frequency = 18432000;
};
+
+ slow_xtal {
+ clock-frequency = 32768;
+ };
+
+ main_xtal {
+ clock-frequency = 18432000;
+ };
};
ahb {
--
1.9.1
--
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the body of a message to majord...@vger.kernel.org
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Please read the FAQ at http://www.tux.org/lkml/
[PATCH 14/33] ARM: at91/dt: usb_a9260: define crystals frequencies
Define Calao USB-A9260, USB-A9G20 and USB-A9G20-LPW main and slow crystals
frequencies.
Signed-off-by: Alexandre Belloni alexandre.bell...@free-electrons.com
Cc: Gregory Hermant gregory.herm...@calao-systems.com
---
arch/arm/boot/dts/usb_a9260_common.dtsi | 8
1 file changed, 8 insertions(+)
diff --git a/arch/arm/boot/dts/usb_a9260_common.dtsi
b/arch/arm/boot/dts/usb_a9260_common.dtsi
index 285977682cf3..12edafefd44a 100644
--- a/arch/arm/boot/dts/usb_a9260_common.dtsi
+++ b/arch/arm/boot/dts/usb_a9260_common.dtsi
@@ -16,6 +16,14 @@
compatible = atmel,osc, fixed-clock;
clock-frequency = 1200;
};
+
+ slow_xtal {
+ clock-frequency = 32768;
+ };
+
+ main_xtal {
+ clock-frequency = 1200;
+ };
};
ahb {
--
1.9.1
--
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the body of a message to majord...@vger.kernel.org
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Please read the FAQ at http://www.tux.org/lkml/
[PATCH 11/33] ARM: at91: move at91sam9260 SoCs to the CCF
This patch removes the selection of AT91_USE_OLD_CLK when selecting at91sam9260 SoCs support. This will automatically enable COMMON_CLK_AT91 option and add support for at91 common clk implementation. Signed-off-by: Alexandre Belloni alexandre.bell...@free-electrons.com --- arch/arm/mach-at91/Kconfig | 1 - 1 file changed, 1 deletion(-) diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig index c818136a74b8..a2efe6e1e224 100644 --- a/arch/arm/mach-at91/Kconfig +++ b/arch/arm/mach-at91/Kconfig @@ -119,7 +119,6 @@ config SOC_AT91SAM9260 bool AT91SAM9260, AT91SAM9XE or AT91SAM9G20 select HAVE_AT91_DBGU0 select SOC_AT91SAM9 - select AT91_USE_OLD_CLK select HAVE_AT91_USB_CLK help Select this if you are using one of Atmel's AT91SAM9260, AT91SAM9XE -- 1.9.1 -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCH 16/33] ARM: at91/dt: qil_a9260: define crystals frequencies
Define Calao QIL-A9260 main and slow crystals frequencies.
Signed-off-by: Alexandre Belloni alexandre.bell...@free-electrons.com
Cc: Gregory Hermant gregory.herm...@calao-systems.com
---
arch/arm/boot/dts/at91-qil_a9260.dts | 8
1 file changed, 8 insertions(+)
diff --git a/arch/arm/boot/dts/at91-qil_a9260.dts
b/arch/arm/boot/dts/at91-qil_a9260.dts
index 5576ae8786c0..a9aef53ab764 100644
--- a/arch/arm/boot/dts/at91-qil_a9260.dts
+++ b/arch/arm/boot/dts/at91-qil_a9260.dts
@@ -28,6 +28,14 @@
compatible = atmel,osc, fixed-clock;
clock-frequency = 1200;
};
+
+ slow_xtal {
+ clock-frequency = 32768;
+ };
+
+ main_xtal {
+ clock-frequency = 1200;
+ };
};
ahb {
--
1.9.1
--
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the body of a message to majord...@vger.kernel.org
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Please read the FAQ at http://www.tux.org/lkml/
[PATCH 10/33] ARM: at91/dt: sam9g20: define clocks
Define the at91sam9g20 clocks that differ from at91sam9260 in the SoC dtsi file.
Signed-off-by: Alexandre Belloni alexandre.bell...@free-electrons.com
---
arch/arm/boot/dts/at91sam9g20.dtsi | 24
1 file changed, 24 insertions(+)
diff --git a/arch/arm/boot/dts/at91sam9g20.dtsi
b/arch/arm/boot/dts/at91sam9g20.dtsi
index b8e79466014f..31f7652612fc 100644
--- a/arch/arm/boot/dts/at91sam9g20.dtsi
+++ b/arch/arm/boot/dts/at91sam9g20.dtsi
@@ -25,6 +25,30 @@
adc0: adc@fffe {
atmel,adc-startup-time = 40;
};
+
+ pmc: pmc@fc00 {
+ plla: pllack {
+ atmel,clk-input-range = 200
3200;
+ atmel,pll-clk-output-ranges =
74500 8 0 0,
+ 69500
75000 1 0,
+ 64500
7 2 0,
+ 59500
65000 3 0,
+ 54500
6 0 1,
+ 49500
55000 1 1,
+ 44500
5 2 1,
+ 4
45000 3 1;
+ };
+
+ pllb: pllbck {
+ atmel,clk-input-range = 200
3200;
+ atmel,pll-clk-output-ranges = 3000
1 0 0;
+ };
+
+ mck: masterck {
+ atmel,clk-output-range = 0 13300;
+ atmel,clk-divisors = 1 2 4 6;
+ };
+ };
};
};
};
--
1.9.1
--
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Please read the FAQ at http://www.tux.org/lkml/
[PATCH 04/33] ARM: at91: prepare common clk transition for rm9200
Enclose the rm9200 old clk registration in #if defined(CONFIG_OLD_CLK_AT91) #endif Signed-off-by: Alexandre Belloni alexandre.bell...@free-electrons.com --- arch/arm/mach-at91/at91rm9200.c | 6 +- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/arch/arm/mach-at91/at91rm9200.c b/arch/arm/mach-at91/at91rm9200.c index 787bb50a4dff..038702ee8bc6 100644 --- a/arch/arm/mach-at91/at91rm9200.c +++ b/arch/arm/mach-at91/at91rm9200.c @@ -26,10 +26,11 @@ #include at91_aic.h #include soc.h #include generic.h -#include clock.h #include sam9_smc.h #include pm.h +#if defined(CONFIG_OLD_CLK_AT91) +#include clock.h /* * Clocks * */ @@ -277,6 +278,9 @@ static void __init at91rm9200_register_clocks(void) clk_register(pck2); clk_register(pck3); } +#else +#define at91rm9200_register_clocks NULL +#endif /* * GPIO -- 1.9.1 -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCH 08/33] ARM: at91: prepare common clk transition for sam9260
Enclose the sam9260 old clk registration in #if defined(CONFIG_OLD_CLK_AT91) #endif Signed-off-by: Alexandre Belloni alexandre.bell...@free-electrons.com --- arch/arm/mach-at91/at91sam9260.c | 6 +- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/arch/arm/mach-at91/at91sam9260.c b/arch/arm/mach-at91/at91sam9260.c index c3d22be73b7c..3477ba94c4c5 100644 --- a/arch/arm/mach-at91/at91sam9260.c +++ b/arch/arm/mach-at91/at91sam9260.c @@ -27,10 +27,11 @@ #include at91_rstc.h #include soc.h #include generic.h -#include clock.h #include sam9_smc.h #include pm.h +#if defined(CONFIG_OLD_CLK_AT91) +#include clock.h /* * Clocks * */ @@ -288,6 +289,9 @@ static void __init at91sam9260_register_clocks(void) clk_register(pck0); clk_register(pck1); } +#else +#define at91sam9260_register_clocks NULL +#endif /* * GPIO -- 1.9.1 -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCH 02/33] ARM: at91/dt: ariag25: define crystals frequencies
Define Acme Systems Aria G25 board main and slow crystals frequencies.
Signed-off-by: Alexandre Belloni alexandre.bell...@free-electrons.com
---
arch/arm/boot/dts/at91-ariag25.dts | 8
1 file changed, 8 insertions(+)
diff --git a/arch/arm/boot/dts/at91-ariag25.dts
b/arch/arm/boot/dts/at91-ariag25.dts
index 55ab6180e350..e9ced30159a7 100644
--- a/arch/arm/boot/dts/at91-ariag25.dts
+++ b/arch/arm/boot/dts/at91-ariag25.dts
@@ -42,6 +42,14 @@
compatible = atmel,osc, fixed-clock;
clock-frequency = 1200;
};
+
+ slow_xtal {
+ clock-frequency = 32768;
+ };
+
+ main_xtal {
+ clock-frequency = 1200;
+ };
};
ahb {
--
1.9.1
--
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[PATCH 01/33] Documentation: dt: document all the atmel pmc compatibles
Documentation for atmel-pmc only list one compatible, add the remaining compatible strings. Signed-off-by: Alexandre Belloni alexandre.bell...@free-electrons.com --- Documentation/devicetree/bindings/arm/atmel-pmc.txt | 5 - 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/arm/atmel-pmc.txt b/Documentation/devicetree/bindings/arm/atmel-pmc.txt index 389bed5056e8..4ce09d1acdc9 100644 --- a/Documentation/devicetree/bindings/arm/atmel-pmc.txt +++ b/Documentation/devicetree/bindings/arm/atmel-pmc.txt @@ -1,7 +1,10 @@ * Power Management Controller (PMC) Required properties: -- compatible: Should be atmel,at91rm9200-pmc +- compatible: Should be atmel,chip-pmc. + chip can be: at91rm9200, at91sam9260, at91sam9g45, at91sam9n12, + at91sam9x5 + - reg: Should contain PMC registers location and length Examples: -- 1.9.1 -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCH 09/33] ARM: at91/dt: sam9260: define clocks
Define the at91sam9260 clocks in the SoC dtsi file.
Signed-off-by: Alexandre Belloni alexandre.bell...@free-electrons.com
---
arch/arm/boot/dts/at91sam9260.dtsi | 314 -
1 file changed, 313 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/at91sam9260.dtsi
b/arch/arm/boot/dts/at91sam9260.dtsi
index c0e0eae16a27..0aa6679db4ab 100644
--- a/arch/arm/boot/dts/at91sam9260.dtsi
+++ b/arch/arm/boot/dts/at91sam9260.dtsi
@@ -12,6 +12,7 @@
#include dt-bindings/pinctrl/at91.h
#include dt-bindings/interrupt-controller/irq.h
#include dt-bindings/gpio/gpio.h
+#include dt-bindings/clock/at91.h
/ {
model = Atmel AT91SAM9260 family SoC;
@@ -48,6 +49,26 @@
reg = 0x2000 0x0400;
};
+ clocks {
+ slow_xtal: slow_xtal {
+ compatible = fixed-clock;
+ #clock-cells = 0;
+ clock-frequency = 0;
+ };
+
+ main_xtal: main_xtal {
+ compatible = fixed-clock;
+ #clock-cells = 0;
+ clock-frequency = 0;
+ };
+
+ adc_op_clk: adc_op_clk{
+ compatible = fixed-clock;
+ #clock-cells = 0;
+ clock-frequency = 500;
+ };
+ };
+
ahb {
compatible = simple-bus;
#address-cells = 1;
@@ -74,8 +95,260 @@
};
pmc: pmc@fc00 {
- compatible = atmel,at91rm9200-pmc;
+ compatible = atmel,at91sam9260-pmc;
reg = 0xfc00 0x100;
+ interrupts = 1 IRQ_TYPE_LEVEL_HIGH 7;
+ interrupt-controller;
+ #address-cells = 1;
+ #size-cells = 0;
+ #interrupt-cells = 1;
+
+ main_osc: main_osc {
+ compatible =
atmel,at91rm9200-clk-main-osc;
+ #clock-cells = 0;
+ interrupts-extended = pmc
AT91_PMC_MOSCS;
+ clocks = main_xtal;
+ };
+
+ main: mainck {
+ compatible =
atmel,at91rm9200-clk-main;
+ #clock-cells = 0;
+ clocks = main_osc;
+ };
+
+ slow_rc_osc: slow_rc_osc {
+ compatible = fixed-clock;
+ #clock-cells = 0;
+ clock-frequency = 32768;
+ clock-accuracy = 5000;
+ };
+
+ clk32k: slck {
+ compatible =
atmel,at91sam9260-clk-slow;
+ #clock-cells = 0;
+ clocks = slow_rc_osc, slow_xtal;
+ };
+
+ plla: pllack {
+ compatible = atmel,at91rm9200-clk-pll;
+ #clock-cells = 0;
+ interrupts-extended = pmc
AT91_PMC_LOCKA;
+ clocks = main;
+ reg = 0;
+ atmel,clk-input-range = 100
3200;
+ #atmel,pll-clk-output-range-cells = 4;
+ atmel,pll-clk-output-ranges = 8000
16000 0 1,
+ 15000
24000 2 1;
+ };
+
+ pllb: pllbck {
+ compatible = atmel,at91rm9200-clk-pll;
+ #clock-cells = 0;
+ interrupts-extended = pmc
AT91_PMC_LOCKB;
+ clocks = main;
+ reg = 1;
+ atmel,clk-input-range = 100
500;
+ #atmel,pll-clk-output-range-cells = 4;
+ atmel,pll-clk-output-ranges = 7000
13000 1 1;
+ };
+
+ mck: masterck {
+ compatible =
atmel,at91rm9200-clk-master;
+ #clock-cells = 0
[PATCH 06/33] ARM: at91: move at91rm9200 SoC to the CCF
This patch removes the selection of AT91_USE_OLD_CLK when selecting at91rm9200 SoC support. This will automatically enable COMMON_CLK_AT91 option and add support for at91 common clk implementation. Signed-off-by: Alexandre Belloni alexandre.bell...@free-electrons.com --- arch/arm/mach-at91/Kconfig | 1 - 1 file changed, 1 deletion(-) diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig index 45b55e0f0db6..c818136a74b8 100644 --- a/arch/arm/mach-at91/Kconfig +++ b/arch/arm/mach-at91/Kconfig @@ -113,7 +113,6 @@ config SOC_AT91RM9200 select HAVE_AT91_DBGU0 select MULTI_IRQ_HANDLER select SPARSE_IRQ - select AT91_USE_OLD_CLK select HAVE_AT91_USB_CLK config SOC_AT91SAM9260 -- 1.9.1 -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Re: [PATCH v2 03/18] AT91: G45: DT: Declare a second ram controller
Hi,
On 07/07/2014 at 16:25:16 +0200, Maxime Ripard wrote :
The G45 has two identical ram controller, that are defined as a single one,
with two reg cells.
The proper way to support such a case is to have two separate DT nodes.
This is also the case for the sam9263, please fix it there too.
Signed-off-by: Maxime Ripard maxime.rip...@free-electrons.com
---
arch/arm/boot/dts/at91sam9g45.dtsi | 8 ++--
1 file changed, 6 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/at91sam9g45.dtsi
b/arch/arm/boot/dts/at91sam9g45.dtsi
index ace6bf197b70..6f648b85b725 100644
--- a/arch/arm/boot/dts/at91sam9g45.dtsi
+++ b/arch/arm/boot/dts/at91sam9g45.dtsi
@@ -75,8 +75,12 @@
ramc0: ramc@e400 {
compatible = atmel,at91sam9g45-ddramc;
- reg = 0xe400 0x200
-0xe600 0x200;
+ reg = 0xe400 0x200;
+ };
+
+ ramc1: ramc@e600 {
+ compatible = atmel,at91sam9g45-ddramc;
+ reg = 0xe600 0x200;
};
pmc: pmc@fc00 {
--
2.0.1
--
Alexandre Belloni, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
--
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Re: [PATCH v2 04/18] AT91: Rework ramc mapping code
On 07/07/2014 at 16:25:17 +0200, Maxime Ripard wrote :
Adapt the ramc mapping code to handle multiple ram controllers in the DT.
Signed-off-by: Maxime Ripard maxime.rip...@free-electrons.com
---
arch/arm/mach-at91/setup.c | 26 ++
1 file changed, 14 insertions(+), 12 deletions(-)
I believe you also need to update the documentation in
Documentation/devicetree/bindings/arm/atmel-at91.txt
diff --git a/arch/arm/mach-at91/setup.c b/arch/arm/mach-at91/setup.c
index 9c4c7fb323fb..cc520596f23b 100644
--- a/arch/arm/mach-at91/setup.c
+++ b/arch/arm/mach-at91/setup.c
@@ -393,24 +393,26 @@ static void at91_dt_ramc(void)
{
struct device_node *np;
const struct of_device_id *of_id;
+ int idx = 0;
- np = of_find_matching_node(NULL, ramc_ids);
- if (!np)
- panic(pr_fmt(unable to find compatible ram controller node in
dtb\n));
+ for_each_matching_node(np, ramc_ids) {
+ at91_ramc_base[idx] = of_iomap(np, 0);
+ if (!at91_ramc_base[idx])
+ panic(pr_fmt(unable to map ramc[%d] cpu registers\n),
idx);
- at91_ramc_base[0] = of_iomap(np, 0);
- if (!at91_ramc_base[0])
- panic(pr_fmt(unable to map ramc[0] cpu registers\n));
- /* the controller may have 2 banks */
- at91_ramc_base[1] = of_iomap(np, 1);
+ idx++;
+ }
+
+ if (!idx)
+ panic(pr_fmt(unable to find compatible ram controller node in
dtb\n));
of_id = of_match_node(ramc_ids, np);
- if (!of_id)
+ if (!of_id) {
pr_warn(ramc no standby function available\n);
- else
- at91_pm_set_standby(of_id-data);
+ return;
+ }
- of_node_put(np);
+ at91_pm_set_standby(of_id-data);
}
static struct of_device_id shdwc_ids[] = {
--
2.0.1
--
Alexandre Belloni, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
--
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Re: [PATCH v2 00/18] AT91: cleanup of the reset and poweroff code
On 07/07/2014 at 16:25:13 +0200, Maxime Ripard wrote : Hi, This patchset is an attempt to further cleanup mach-at91 by removing code that can be put into a driver nowadays. This time, the target is the reset and poweroff code, that can now be put in drivers/power/reset. Apart from my two other comments, I'm fine with the full series. Maxime Changes from v1: - Added the missing copyrights in the new reset and poweroff drivers - Renamed the platform names for the reset driver to match the name of the first SoC that introduced them - Fixed a few typos in the commit logs - Added missing comments in the assembly code in the reset driver - Splitted the reset probe to handle the DT and platform probe in separate functions. Maxime Ripard (18): power: reset: Add if statement isntead of multiple depends on AT91: setup: Switch to pr_fmt AT91: G45: DT: Declare a second ram controller AT91: Rework ramc mapping code AT91: SAMA5D3: DT: Add shutdown controller power: reset: Add AT91 reset driver AT91: DT: Remove the old-style reset probing AT91: soc: Introduce register_devices callback AT91: Probe the reset driver AT91: Call at91_register_devices in the board files AT91: Remove reset code from the machine code power: reset: Add AT91 poweroff driver AT91: DT: Remove poweroff DT probing AT91: Register the poweroff driver AT91: Remove poweroff code AT91: pm: Remove show_reset_status function AT91: Remove rstc and shdwnc global base addresses AT91: Remove rstc and shdwc headers arch/arm/boot/dts/at91sam9g45.dtsi | 8 +- arch/arm/boot/dts/sama5d3.dtsi | 5 + arch/arm/mach-at91/Kconfig | 8 -- arch/arm/mach-at91/Makefile | 2 - arch/arm/mach-at91/at91_rstc.h | 53 --- arch/arm/mach-at91/at91_shdwc.h | 50 --- arch/arm/mach-at91/at91sam9260.c| 45 +- arch/arm/mach-at91/at91sam9261.c| 45 +- arch/arm/mach-at91/at91sam9263.c| 45 +- arch/arm/mach-at91/at91sam9_alt_reset.S | 40 -- arch/arm/mach-at91/at91sam9g45.c| 49 ++- arch/arm/mach-at91/at91sam9g45_reset.S | 45 -- arch/arm/mach-at91/at91sam9rl.c | 45 +- arch/arm/mach-at91/board-afeb-9260v1.c | 2 + arch/arm/mach-at91/board-cam60.c| 2 + arch/arm/mach-at91/board-cpu9krea.c | 2 + arch/arm/mach-at91/board-flexibity.c| 2 + arch/arm/mach-at91/board-sam9-l9260.c | 2 + arch/arm/mach-at91/board-sam9260ek.c| 3 +- arch/arm/mach-at91/board-sam9261ek.c| 3 +- arch/arm/mach-at91/board-sam9263ek.c| 3 +- arch/arm/mach-at91/board-sam9m10g45ek.c | 3 +- arch/arm/mach-at91/board-sam9rlek.c | 3 +- arch/arm/mach-at91/board-snapper9260.c | 2 + arch/arm/mach-at91/generic.h| 10 +- arch/arm/mach-at91/pm.c | 72 -- arch/arm/mach-at91/setup.c | 178 --- arch/arm/mach-at91/soc.h| 1 + drivers/power/reset/Kconfig | 31 ++-- drivers/power/reset/Makefile| 2 + drivers/power/reset/at91-poweroff.c | 156 drivers/power/reset/at91-reset.c| 246 32 files changed, 701 insertions(+), 462 deletions(-) delete mode 100644 arch/arm/mach-at91/at91_rstc.h delete mode 100644 arch/arm/mach-at91/at91_shdwc.h delete mode 100644 arch/arm/mach-at91/at91sam9_alt_reset.S delete mode 100644 arch/arm/mach-at91/at91sam9g45_reset.S create mode 100644 drivers/power/reset/at91-poweroff.c create mode 100644 drivers/power/reset/at91-reset.c -- 2.0.1 -- Alexandre Belloni, Free Electrons Embedded Linux, Kernel and Android engineering http://free-electrons.com -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCH 2/5] ARM: at91: select ATMEL_RAMC when using OF
When using device tree, select the Atmel RAM controller driver to handle its clocks. Signed-off-by: Alexandre Belloni alexandre.bell...@free-electrons.com --- arch/arm/mach-at91/Kconfig | 4 1 file changed, 4 insertions(+) diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig index 45b55e0f0db6..ad6b2b8b6afd 100644 --- a/arch/arm/mach-at91/Kconfig +++ b/arch/arm/mach-at91/Kconfig @@ -49,6 +49,8 @@ config SOC_AT91SAM9 select GENERIC_CLOCKEVENTS select MULTI_IRQ_HANDLER select SPARSE_IRQ + select MEMORY if USE_OF + select ATMEL_RAMC if USE_OF config SOC_SAMA5 bool @@ -58,6 +60,8 @@ config SOC_SAMA5 select MULTI_IRQ_HANDLER select SPARSE_IRQ select USE_OF + select MEMORY + select ATMEL_RAMC menu Atmel AT91 System-on-Chip -- 1.9.1 -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCH 5/5] clk: at91: remove the useless CLK_IGNORE_UNUSED flag
The CLK_IGNORE_UNUSED flag was added on all the system clocks because of the ddrck. Now that it is handled by the ram controller driver, we can drop it. Signed-off-by: Alexandre Belloni alexandre.bell...@free-electrons.com --- drivers/clk/at91/clk-system.c | 8 +--- 1 file changed, 1 insertion(+), 7 deletions(-) diff --git a/drivers/clk/at91/clk-system.c b/drivers/clk/at91/clk-system.c index 8c96307d7363..a76d03fd577b 100644 --- a/drivers/clk/at91/clk-system.c +++ b/drivers/clk/at91/clk-system.c @@ -119,13 +119,7 @@ at91_clk_register_system(struct at91_pmc *pmc, const char *name, init.ops = system_ops; init.parent_names = parent_name; init.num_parents = 1; - /* -* CLK_IGNORE_UNUSED is used to avoid ddrck switch off. -* TODO : we should implement a driver supporting at91 ddr controller -* (see drivers/memory) which would request and enable the ddrck clock. -* When this is done we will be able to remove CLK_IGNORE_UNUSED flag. -*/ - init.flags = CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED; + init.flags = CLK_SET_RATE_PARENT; sys-id = id; sys-hw.init = init; -- 1.9.1 -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCH 1/5] memory: add a driver for atmel ram controllers
Atmel SoCs have one or multiple RAM controllers that need one or multiple clocks
to run.
This driver handle those clocks.
Signed-off-by: Alexandre Belloni alexandre.bell...@free-electrons.com
---
.../devicetree/bindings/arm/atmel-at91.txt | 1 +
drivers/memory/Kconfig | 8 ++
drivers/memory/Makefile| 1 +
drivers/memory/atmel-ramc.c| 96 ++
4 files changed, 106 insertions(+)
create mode 100644 drivers/memory/atmel-ramc.c
diff --git a/Documentation/devicetree/bindings/arm/atmel-at91.txt
b/Documentation/devicetree/bindings/arm/atmel-at91.txt
index 16f60b41c147..54dc3aefb12a 100644
--- a/Documentation/devicetree/bindings/arm/atmel-at91.txt
+++ b/Documentation/devicetree/bindings/arm/atmel-at91.txt
@@ -61,6 +61,7 @@ RAMC SDRAM/DDR Controller required properties:
- compatible: Should be atmel,at91rm9200-sdramc,
atmel,at91sam9260-sdramc,
atmel,at91sam9g45-ddramc,
+ atmel,sama5d3-mpddramc,
- reg: Should contain registers location and length
For at91sam9263 and at91sam9g45 you must specify 2 entries.
diff --git a/drivers/memory/Kconfig b/drivers/memory/Kconfig
index c59e9c96e86d..e49b9caa1b30 100644
--- a/drivers/memory/Kconfig
+++ b/drivers/memory/Kconfig
@@ -7,6 +7,14 @@ menuconfig MEMORY
if MEMORY
+config ATMEL_RAMC
+ bool Atmel (Multi-port DDR-)SDRAM Controller
+ default y
+ depends on ARCH_AT91 OF
+ help
+ This driver is for Atmel SDRAM Controller or Atmel Multi-port
+ DDR-SDRAM Controller available on Atmel AT91SAM9 and SAMA5 SoCs
+
config TI_AEMIF
tristate Texas Instruments AEMIF driver
depends on (ARCH_DAVINCI || ARCH_KEYSTONE) OF
diff --git a/drivers/memory/Makefile b/drivers/memory/Makefile
index 71160a2b7313..eb5d7716efa4 100644
--- a/drivers/memory/Makefile
+++ b/drivers/memory/Makefile
@@ -5,6 +5,7 @@
ifeq ($(CONFIG_DDR),y)
obj-$(CONFIG_OF) += of_memory.o
endif
+obj-$(CONFIG_ATMEL_RAMC) += atmel-ramc.o
obj-$(CONFIG_TI_AEMIF) += ti-aemif.o
obj-$(CONFIG_TI_EMIF) += emif.o
obj-$(CONFIG_FSL_IFC) += fsl_ifc.o
diff --git a/drivers/memory/atmel-ramc.c b/drivers/memory/atmel-ramc.c
new file mode 100644
index ..1d12d3d01cbd
--- /dev/null
+++ b/drivers/memory/atmel-ramc.c
@@ -0,0 +1,96 @@
+/*
+ * Atmel (Multi-port DDR-)SDRAM Controller driver
+ *
+ * Copyright (C) 2014 Atmel
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see http://www.gnu.org/licenses/.
+ *
+ */
+
+#include linux/clk.h
+#include linux/err.h
+#include linux/kernel.h
+#include linux/module.h
+#include linux/of_platform.h
+#include linux/platform_device.h
+
+struct at91_ramc_caps {
+ bool has_ddrck;
+ bool has_mpddr_clk;
+};
+
+static const struct at91_ramc_caps at91rm9200_caps = { };
+
+static const struct at91_ramc_caps at91sam9g45_caps = {
+ .has_ddrck = 1,
+ .has_mpddr_clk = 0,
+};
+
+static const struct at91_ramc_caps sama5d3_caps = {
+ .has_ddrck = 1,
+ .has_mpddr_clk = 1,
+};
+
+static const struct of_device_id atmel_ramc_of_match[] = {
+ { .compatible = atmel,at91rm9200-sdramc, .data = at91rm9200_caps, },
+ { .compatible = atmel,at91sam9260-sdramc, .data = at91rm9200_caps, },
+ { .compatible = atmel,at91sam9g45-ddramc, .data = at91sam9g45_caps,
},
+ { .compatible = atmel,sama5d3-mpddramc, .data = sama5d3_caps, },
+ {},
+};
+MODULE_DEVICE_TABLE(of, atmel_ramc_of_match);
+
+static int atmel_ramc_probe(struct platform_device *pdev)
+{
+ const struct of_device_id *match;
+ const struct at91_ramc_caps *caps;
+ struct clk *clk;
+
+ match = of_match_device(atmel_ramc_of_match, pdev-dev);
+ caps = match-data;
+
+ if (caps-has_ddrck) {
+ clk = devm_clk_get(pdev-dev, ddrck);
+ if (IS_ERR(clk))
+ return PTR_ERR(clk);
+ clk_prepare_enable(clk);
+ }
+
+ if (caps-has_mpddr_clk) {
+ clk = devm_clk_get(pdev-dev, mpddr);
+ if (WARN_ON(IS_ERR(clk)))
+ return 0;
+ clk_prepare_enable(clk);
+ }
+
+ return 0;
+}
+
+static struct platform_driver atmel_ramc_driver = {
+ .probe = atmel_ramc_probe,
+ .driver = {
+ .name = atmel-ramc
[PATCH 3/5] ARM: at91/dt: sama5d3: define mpddr clock and ramc clocks
Define the available clock for mprddr and take both mpddr_clk and ddrck in the
ram controller driver.
Signed-off-by: Alexandre Belloni alexandre.bell...@free-electrons.com
---
arch/arm/boot/dts/sama5d3.dtsi | 9 -
1 file changed, 8 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/sama5d3.dtsi b/arch/arm/boot/dts/sama5d3.dtsi
index e0b15a6e8897..3bd8db9e069b 100644
--- a/arch/arm/boot/dts/sama5d3.dtsi
+++ b/arch/arm/boot/dts/sama5d3.dtsi
@@ -402,8 +402,10 @@
};
ramc0: ramc@ea00 {
- compatible = atmel,at91sam9g45-ddramc;
+ compatible = atmel,sama5d3-mpddramc,
atmel,at91sam9g45-ddramc;
reg = 0xea00 0x200;
+ clocks = ddrck, mpddr_clk;
+ clock-names = ddrck, mpddr;
};
dbgu: serial@ee00 {
@@ -1170,6 +1172,11 @@
#clock-cells = 0;
reg = 48;
};
+
+ mpddr_clk: mpddr_clk {
+ #clock-cells = 0;
+ reg = 49;
+ };
};
};
--
1.9.1
--
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[PATCH 4/5] ARM: at91/dt: at91sam9: use ddrck in ramc
Make the ram controller driver take the ddrck clock for at91sam9n12 and
at91sam9x5. For at91sam9g45, use mck instead.
Signed-off-by: Alexandre Belloni alexandre.bell...@free-electrons.com
---
arch/arm/boot/dts/at91sam9n12.dtsi | 2 ++
arch/arm/boot/dts/at91sam9x5.dtsi | 2 ++
2 files changed, 4 insertions(+)
diff --git a/arch/arm/boot/dts/at91sam9n12.dtsi
b/arch/arm/boot/dts/at91sam9n12.dtsi
index 287795985e32..3d48255c4ed1 100644
--- a/arch/arm/boot/dts/at91sam9n12.dtsi
+++ b/arch/arm/boot/dts/at91sam9n12.dtsi
@@ -85,6 +85,8 @@
ramc0: ramc@e800 {
compatible = atmel,at91sam9g45-ddramc;
reg = 0xe800 0x200;
+ clocks = ddrck;
+ clock-names = ddrck;
};
pmc: pmc@fc00 {
diff --git a/arch/arm/boot/dts/at91sam9x5.dtsi
b/arch/arm/boot/dts/at91sam9x5.dtsi
index d6133f497207..74722853e667 100644
--- a/arch/arm/boot/dts/at91sam9x5.dtsi
+++ b/arch/arm/boot/dts/at91sam9x5.dtsi
@@ -93,6 +93,8 @@
ramc0: ramc@e800 {
compatible = atmel,at91sam9g45-ddramc;
reg = 0xe800 0x200;
+ clocks = ddrck;
+ clock-names = ddrck;
};
pmc: pmc@fc00 {
--
1.9.1
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[PATCH 0/5] Add a driver for the atmel ram controller
The atmel ram controller needs one or more clocks to work. For now the CLK_IGNORE_UNUSED flag is used on those clocks. This patch set introduce a driver that will take care of taking those clocks. The final goal is also to move the ioremap done in mach-at91 to that driver with a proper power management driver. Alexandre Belloni (5): memory: add a driver for atmel ram controllers ARM: at91: select ATMEL_RAMC when using OF ARM: at91/dt: sama5d3: define mpddr clock and ramc clocks ARM: at91/dt: at91sam9: use ddrck in ramc clk: at91: remove the useless CLK_IGNORE_UNUSED flag .../devicetree/bindings/arm/atmel-at91.txt | 1 + arch/arm/boot/dts/at91sam9n12.dtsi | 2 + arch/arm/boot/dts/at91sam9x5.dtsi | 2 + arch/arm/boot/dts/sama5d3.dtsi | 9 +- arch/arm/mach-at91/Kconfig | 4 + drivers/clk/at91/clk-system.c | 8 +- drivers/memory/Kconfig | 8 ++ drivers/memory/Makefile| 1 + drivers/memory/atmel-ramc.c| 96 ++ 9 files changed, 123 insertions(+), 8 deletions(-) create mode 100644 drivers/memory/atmel-ramc.c -- 1.9.1 -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Re: [PATCH 1/5] memory: add a driver for atmel ram controllers
Hi, On 07/07/2014 at 17:46:42 +0200, Boris Brezillon wrote : On Mon, 7 Jul 2014 17:19:11 +0200 Alexandre Belloni alexandre.bell...@free-electrons.com wrote: Atmel SoCs have one or multiple RAM controllers that need one or multiple clocks to run. This driver handle those clocks. Actually this controller is an SDRAM controller which, depending on the SoC, might support SDR SDRAMs, DDR SDRAMs or both. This is just a nitpick, but if you don't mind I'd rather replace references to RAMC by SDRAMC (ATMEL_RAMC - ATMEL_SDRAMC) and just state that in some cases (at least this is the case for the DDRSDRC available in at91sam9g45 SoC) it supports both type of SDRAM (DDR and SDR). The same goes for the source file name (atmel-ramc.c - atmel-sdramc.c). will do. diff --git a/Documentation/devicetree/bindings/arm/atmel-at91.txt b/Documentation/devicetree/bindings/arm/atmel-at91.txt index 16f60b41c147..54dc3aefb12a 100644 --- a/Documentation/devicetree/bindings/arm/atmel-at91.txt +++ b/Documentation/devicetree/bindings/arm/atmel-at91.txt @@ -61,6 +61,7 @@ RAMC SDRAM/DDR Controller required properties: - compatible: Should be atmel,at91rm9200-sdramc, atmel,at91sam9260-sdramc, atmel,at91sam9g45-ddramc, + atmel,sama5d3-mpddramc, - reg: Should contain registers location and length For at91sam9263 and at91sam9g45 you must specify 2 entries. Shouldn't we move the documentation in Documentation/devicetree/bindings/memory-controllers/ (though this should be done in different patch). I guess we should move it later, to avoid merge conflicts -- Alexandre Belloni, Free Electrons Embedded Linux, Kernel and Android engineering http://free-electrons.com -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Re: [PATCH 1/5] memory: add a driver for atmel ram controllers
On 07/07/2014 at 20:33:40 +0200, Jean-Christophe PLAGNIOL-VILLARD wrote :
+ if (caps-has_mpddr_clk) {
+ clk = devm_clk_get(pdev-dev, mpddr);
+ if (WARN_ON(IS_ERR(clk)))
+ return 0;
I don't like this warn_on this need to be an error
What would you prefer ? pr_err() and panic or BUG_ON ?. We can also
probably simply put a single pr_err(), anyway, the platform will stop
just before switching to userspace.
--
Alexandre Belloni, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
--
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Re: [PATCH 3/5] ARM: at91/dt: sama5d3: define mpddr clock and ramc clocks
On 07/07/2014 at 20:32:36 +0200, Jean-Christophe PLAGNIOL-VILLARD wrote : - compatible = atmel,at91sam9g45-ddramc; + compatible = atmel,sama5d3-mpddramc, atmel,at91sam9g45-ddramc; the sama5 ddr controler is not back compitble with 9g45 one the compatible is wrong Keeping atmel,at91sam9g45-ddramc allows to reuse the old code for the iomap needed for the PM code without adding a new compatible in the ramc_ids[] array. -- Alexandre Belloni, Free Electrons Embedded Linux, Kernel and Android engineering http://free-electrons.com -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCHv2 19/32] ARM: at91/dt: animeo_ip: define crystals frequencies
Define Somfy Animeo IP main and slow crystals frequencies.
Signed-off-by: Alexandre Belloni alexandre.bell...@free-electrons.com
---
arch/arm/boot/dts/animeo_ip.dts | 8
1 file changed, 8 insertions(+)
diff --git a/arch/arm/boot/dts/animeo_ip.dts b/arch/arm/boot/dts/animeo_ip.dts
index 3c4f6d983cbd..4e0ad3b82796 100644
--- a/arch/arm/boot/dts/animeo_ip.dts
+++ b/arch/arm/boot/dts/animeo_ip.dts
@@ -40,6 +40,14 @@
compatible = atmel,osc, fixed-clock;
clock-frequency = 18432000;
};
+
+ slow_xtal {
+ clock-frequency = 32768;
+ };
+
+ main_xtal {
+ clock-frequency = 18432000;
+ };
};
ahb {
--
1.9.1
--
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[PATCHv2 21/32] ARM: at91: prepare common clk transition for sam9g45
Enclose the sam9g45 old clk registration in #if defined(CONFIG_OLD_CLK_AT91) #endif Signed-off-by: Alexandre Belloni alexandre.bell...@free-electrons.com --- arch/arm/mach-at91/at91sam9g45.c | 6 +- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/arch/arm/mach-at91/at91sam9g45.c b/arch/arm/mach-at91/at91sam9g45.c index 9d3d544ac19c..0d5d85797cd6 100644 --- a/arch/arm/mach-at91/at91sam9g45.c +++ b/arch/arm/mach-at91/at91sam9g45.c @@ -25,10 +25,11 @@ #include at91_aic.h #include soc.h #include generic.h -#include clock.h #include sam9_smc.h #include pm.h +#if defined(CONFIG_OLD_CLK_AT91) +#include clock.h /* * Clocks * */ @@ -331,6 +332,9 @@ static void __init at91sam9g45_register_clocks(void) clk_register(pck0); clk_register(pck1); } +#else +#define at91sam9g45_register_clocks NULL +#endif /* * GPIO -- 1.9.1 -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCHv2 26/32] ARM: at91/dt: cosino define crystals frequencies
Define Cosino boards main and slow crystals frequencies.
Signed-off-by: Alexandre Belloni alexandre.bell...@free-electrons.com
Cc: Rodolfo Giometti giome...@linux.it
---
arch/arm/boot/dts/at91-cosino.dtsi | 8
1 file changed, 8 insertions(+)
diff --git a/arch/arm/boot/dts/at91-cosino.dtsi
b/arch/arm/boot/dts/at91-cosino.dtsi
index df4b78695695..b6ea3f4a7206 100644
--- a/arch/arm/boot/dts/at91-cosino.dtsi
+++ b/arch/arm/boot/dts/at91-cosino.dtsi
@@ -34,6 +34,14 @@
compatible = atmel,osc, fixed-clock;
clock-frequency = 1200;
};
+
+ slow_xtal {
+ clock-frequency = 32768;
+ };
+
+ main_xtal {
+ clock-frequency = 1200;
+ };
};
ahb {
--
1.9.1
--
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[PATCHv2 30/32] ARM: at91/dt: sam9263ek: define crystals frequencies
Define at91sam9263ek main and slow crystals frequencies.
Signed-off-by: Alexandre Belloni alexandre.bell...@free-electrons.com
---
arch/arm/boot/dts/at91sam9263ek.dts | 8
1 file changed, 8 insertions(+)
diff --git a/arch/arm/boot/dts/at91sam9263ek.dts
b/arch/arm/boot/dts/at91sam9263ek.dts
index 15009c9f2293..5cf93eecd8f1 100644
--- a/arch/arm/boot/dts/at91sam9263ek.dts
+++ b/arch/arm/boot/dts/at91sam9263ek.dts
@@ -29,6 +29,14 @@
compatible = atmel,osc, fixed-clock;
clock-frequency = 16367660;
};
+
+ slow_xtal {
+ clock-frequency = 32768;
+ };
+
+ main_xtal {
+ clock-frequency = 16367660;
+ };
};
ahb {
--
1.9.1
--
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[PATCHv2 31/32] ARM: at91/dt: tny_a9263: define crystals frequencies
Define Calao TNY-A9263 main and slow crystals frequencies.
Signed-off-by: Alexandre Belloni alexandre.bell...@free-electrons.com
Cc: Gregory Hermant gregory.herm...@calao-systems.com
---
arch/arm/boot/dts/tny_a9263.dts | 8
1 file changed, 8 insertions(+)
diff --git a/arch/arm/boot/dts/tny_a9263.dts b/arch/arm/boot/dts/tny_a9263.dts
index 0751a6a979a8..3043296345b7 100644
--- a/arch/arm/boot/dts/tny_a9263.dts
+++ b/arch/arm/boot/dts/tny_a9263.dts
@@ -29,6 +29,14 @@
compatible = atmel,osc, fixed-clock;
clock-frequency = 1200;
};
+
+ slow_xtal {
+ clock-frequency = 32768;
+ };
+
+ main_xtal {
+ clock-frequency = 1200;
+ };
};
ahb {
--
1.9.1
--
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[PATCHv2 32/32] ARM: at91/dt: usb_a9263: define crystals frequencies
Define Calao USB-A9263 main and slow crystals frequencies.
Signed-off-by: Alexandre Belloni alexandre.bell...@free-electrons.com
Cc: Gregory Hermant gregory.herm...@calao-systems.com
---
arch/arm/boot/dts/usb_a9263.dts | 8
1 file changed, 8 insertions(+)
diff --git a/arch/arm/boot/dts/usb_a9263.dts b/arch/arm/boot/dts/usb_a9263.dts
index 290e60383baf..68c0de36c339 100644
--- a/arch/arm/boot/dts/usb_a9263.dts
+++ b/arch/arm/boot/dts/usb_a9263.dts
@@ -29,6 +29,14 @@
compatible = atmel,osc, fixed-clock;
clock-frequency = 1200;
};
+
+ slow_xtal {
+ clock-frequency = 32768;
+ };
+
+ main_xtal {
+ clock-frequency = 1200;
+ };
};
ahb {
--
1.9.1
--
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[PATCHv2 29/32] ARM: at91: move at91sam9263 SoC to the CCF
This patch removes the selection of AT91_USE_OLD_CLK when selecting at91sam9263 SoC support. This will automatically enable COMMON_CLK_AT91 option and add support for at91 common clock implementation. Signed-off-by: Alexandre Belloni alexandre.bell...@free-electrons.com --- arch/arm/mach-at91/Kconfig | 1 - 1 file changed, 1 deletion(-) diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig index 461966d0ee4d..6cc6f7aebdae 100644 --- a/arch/arm/mach-at91/Kconfig +++ b/arch/arm/mach-at91/Kconfig @@ -138,7 +138,6 @@ config SOC_AT91SAM9263 select HAVE_AT91_DBGU1 select HAVE_FB_ATMEL select SOC_AT91SAM9 - select AT91_USE_OLD_CLK select HAVE_AT91_USB_CLK config SOC_AT91SAM9RL -- 1.9.1 -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCHv2 27/32] ARM: at91: prepare common clk transition for sam9263
Enclose the sam9263 old clk registration in #if defined(CONFIG_OLD_CLK_AT91) #endif Signed-off-by: Alexandre Belloni alexandre.bell...@free-electrons.com --- arch/arm/mach-at91/at91sam9263.c | 6 +- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/arch/arm/mach-at91/at91sam9263.c b/arch/arm/mach-at91/at91sam9263.c index f30290572293..c07465361947 100644 --- a/arch/arm/mach-at91/at91sam9263.c +++ b/arch/arm/mach-at91/at91sam9263.c @@ -25,10 +25,11 @@ #include at91_rstc.h #include soc.h #include generic.h -#include clock.h #include sam9_smc.h #include pm.h +#if defined(CONFIG_OLD_CLK_AT91) +#include clock.h /* * Clocks * */ @@ -280,6 +281,9 @@ static void __init at91sam9263_register_clocks(void) clk_register(pck2); clk_register(pck3); } +#else +#define at91sam9263_register_clocks NULL +#endif /* * GPIO -- 1.9.1 -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCHv2 25/32] ARM: at91/dt: pm9g45: crystals frequencies
Define Ronetix pm9g45 main and slow crystals frequencies.
Signed-off-by: Alexandre Belloni alexandre.bell...@free-electrons.com
---
arch/arm/boot/dts/pm9g45.dts | 8
1 file changed, 8 insertions(+)
diff --git a/arch/arm/boot/dts/pm9g45.dts b/arch/arm/boot/dts/pm9g45.dts
index 33ffabe9c4c8..66afcff67fde 100644
--- a/arch/arm/boot/dts/pm9g45.dts
+++ b/arch/arm/boot/dts/pm9g45.dts
@@ -29,6 +29,14 @@
compatible = atmel,osc, fixed-clock;
clock-frequency = 1200;
};
+
+ slow_xtal {
+ clock-frequency = 32768;
+ };
+
+ main_xtal {
+ clock-frequency = 1200;
+ };
};
ahb {
--
1.9.1
--
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[PATCHv2 28/32] ARM: at91/dt: sam9263: define clocks
Define the at91sam9263 clocks in the SoC dtsi file.
Signed-off-by: Alexandre Belloni alexandre.bell...@free-electrons.com
---
arch/arm/boot/dts/at91sam9263.dtsi | 311 +
1 file changed, 311 insertions(+)
diff --git a/arch/arm/boot/dts/at91sam9263.dtsi
b/arch/arm/boot/dts/at91sam9263.dtsi
index fece8665fb63..bb23c2d33cf8 100644
--- a/arch/arm/boot/dts/at91sam9263.dtsi
+++ b/arch/arm/boot/dts/at91sam9263.dtsi
@@ -10,6 +10,7 @@
#include dt-bindings/pinctrl/at91.h
#include dt-bindings/interrupt-controller/irq.h
#include dt-bindings/gpio/gpio.h
+#include dt-bindings/clock/at91.h
/ {
model = Atmel AT91SAM9263 family SoC;
@@ -32,6 +33,7 @@
ssc1 = ssc1;
pwm0 = pwm0;
};
+
cpus {
#address-cells = 0;
#size-cells = 0;
@@ -46,6 +48,20 @@
reg = 0x2000 0x0800;
};
+ clocks {
+ main_xtal: main_xtal {
+ compatible = fixed-clock;
+ #clock-cells = 0;
+ clock-frequency = 0;
+ };
+
+ slow_xtal: slow_xtal {
+ compatible = fixed-clock;
+ #clock-cells = 0;
+ clock-frequency = 0;
+ };
+ };
+
ahb {
compatible = simple-bus;
#address-cells = 1;
@@ -69,6 +85,264 @@
pmc: pmc@fc00 {
compatible = atmel,at91rm9200-pmc;
reg = 0xfc00 0x100;
+ interrupts = 1 IRQ_TYPE_LEVEL_HIGH 7;
+ interrupt-controller;
+ #address-cells = 1;
+ #size-cells = 0;
+ #interrupt-cells = 1;
+
+ main_osc: main_osc {
+ compatible =
atmel,at91rm9200-clk-main-osc;
+ #clock-cells = 0;
+ interrupts-extended = pmc
AT91_PMC_MOSCS;
+ clocks = main_xtal;
+ };
+
+ main: mainck {
+ compatible =
atmel,at91rm9200-clk-main;
+ #clock-cells = 0;
+ clocks = main_osc;
+ };
+
+ plla: pllack {
+ compatible = atmel,at91rm9200-clk-pll;
+ #clock-cells = 0;
+ interrupts-extended = pmc
AT91_PMC_LOCKA;
+ clocks = main;
+ reg = 0;
+ atmel,clk-input-range = 100
3200;
+ #atmel,pll-clk-output-range-cells = 4;
+ atmel,pll-clk-output-ranges = 8000
2 0 1,
+ 19000
24000 2 1;
+ };
+
+ pllb: pllbck {
+ compatible = atmel,at91rm9200-clk-pll;
+ #clock-cells = 0;
+ interrupts-extended = pmc
AT91_PMC_LOCKB;
+ clocks = main;
+ reg = 1;
+ atmel,clk-input-range = 100
500;
+ #atmel,pll-clk-output-range-cells = 4;
+ atmel,pll-clk-output-ranges = 7000
13000 1 1;
+ };
+
+ mck: masterck {
+ compatible =
atmel,at91rm9200-clk-master;
+ #clock-cells = 0;
+ interrupts-extended = pmc
AT91_PMC_MCKRDY;
+ clocks = slow_xtal, main,
plla, pllb;
+ atmel,clk-output-range = 0 12000;
+ atmel,clk-divisors = 1 2 4 0;
+ };
+
+ usb: usbck {
+ compatible = atmel,at91rm9200-clk-usb;
+ #clock-cells = 0;
+ atmel,clk-divisors = 1 2 4 0;
+ clocks = pllb;
+ };
+
+ prog: progck {
+ compatible =
atmel,at91rm9200-clk
[PATCHv2 23/32] ARM: at91: move at91sam9g45 SoC to the CCF
This patch removes the selection of AT91_USE_OLD_CLK when selecting at91sam9g45 SoC support. This will automatically enable COMMON_CLK_AT91 option and add support for at91 common clock implementation. Signed-off-by: Alexandre Belloni alexandre.bell...@free-electrons.com --- arch/arm/mach-at91/Kconfig | 1 - 1 file changed, 1 deletion(-) diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig index a2efe6e1e224..461966d0ee4d 100644 --- a/arch/arm/mach-at91/Kconfig +++ b/arch/arm/mach-at91/Kconfig @@ -153,7 +153,6 @@ config SOC_AT91SAM9G45 select HAVE_AT91_DBGU1 select HAVE_FB_ATMEL select SOC_AT91SAM9 - select AT91_USE_OLD_CLK select HAVE_AT91_UTMI select HAVE_AT91_USB_CLK help -- 1.9.1 -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCHv2 24/32] ARM: at91/dt: sam9m10g45ek: define crystals frequencies
Define at91sam9m10g45ek main and slow crystals frequencies.
Signed-off-by: Alexandre Belloni alexandre.bell...@free-electrons.com
---
arch/arm/boot/dts/at91sam9m10g45ek.dts | 8
1 file changed, 8 insertions(+)
diff --git a/arch/arm/boot/dts/at91sam9m10g45ek.dts
b/arch/arm/boot/dts/at91sam9m10g45ek.dts
index 9f5b0a674995..96ccc7de4f0a 100644
--- a/arch/arm/boot/dts/at91sam9m10g45ek.dts
+++ b/arch/arm/boot/dts/at91sam9m10g45ek.dts
@@ -31,6 +31,14 @@
compatible = atmel,osc, fixed-clock;
clock-frequency = 1200;
};
+
+ slow_xtal {
+ clock-frequency = 32768;
+ };
+
+ main_xtal {
+ clock-frequency = 1200;
+ };
};
ahb {
--
1.9.1
--
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[PATCHv2 15/32] ARM: at91/dt: qil_a9260: define crystals frequencies
Define Calao QIL-A9260 main and slow crystals frequencies.
Signed-off-by: Alexandre Belloni alexandre.bell...@free-electrons.com
Cc: Gregory Hermant gregory.herm...@calao-systems.com
---
arch/arm/boot/dts/at91-qil_a9260.dts | 8
1 file changed, 8 insertions(+)
diff --git a/arch/arm/boot/dts/at91-qil_a9260.dts
b/arch/arm/boot/dts/at91-qil_a9260.dts
index 5576ae8786c0..a9aef53ab764 100644
--- a/arch/arm/boot/dts/at91-qil_a9260.dts
+++ b/arch/arm/boot/dts/at91-qil_a9260.dts
@@ -28,6 +28,14 @@
compatible = atmel,osc, fixed-clock;
clock-frequency = 1200;
};
+
+ slow_xtal {
+ clock-frequency = 32768;
+ };
+
+ main_xtal {
+ clock-frequency = 1200;
+ };
};
ahb {
--
1.9.1
--
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[PATCHv2 22/32] ARM: at91/dt: sam9g45: define clocks
Define the at91sam9g45 clocks in the SoC dtsi file.
Signed-off-by: Alexandre Belloni alexandre.bell...@free-electrons.com
---
arch/arm/boot/dts/at91sam9g45.dtsi | 340 -
1 file changed, 339 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/at91sam9g45.dtsi
b/arch/arm/boot/dts/at91sam9g45.dtsi
index ace6bf197b70..c76a60a2e239 100644
--- a/arch/arm/boot/dts/at91sam9g45.dtsi
+++ b/arch/arm/boot/dts/at91sam9g45.dtsi
@@ -14,6 +14,7 @@
#include dt-bindings/pinctrl/at91.h
#include dt-bindings/interrupt-controller/irq.h
#include dt-bindings/gpio/gpio.h
+#include dt-bindings/clock/at91.h
/ {
model = Atmel AT91SAM9G45 family SoC;
@@ -53,6 +54,26 @@
reg = 0x7000 0x1000;
};
+ clocks {
+ slow_xtal: slow_xtal {
+ compatible = fixed-clock;
+ #clock-cells = 0;
+ clock-frequency = 0;
+ };
+
+ main_xtal: main_xtal {
+ compatible = fixed-clock;
+ #clock-cells = 0;
+ clock-frequency = 0;
+ };
+
+ adc_op_clk: adc_op_clk{
+ compatible = fixed-clock;
+ #clock-cells = 0;
+ clock-frequency = 30;
+ };
+ };
+
ahb {
compatible = simple-bus;
#address-cells = 1;
@@ -80,8 +101,274 @@
};
pmc: pmc@fc00 {
- compatible = atmel,at91rm9200-pmc;
+ compatible = atmel,at91sam9g45-pmc;
reg = 0xfc00 0x100;
+ interrupts = 1 IRQ_TYPE_LEVEL_HIGH 7;
+ interrupt-controller;
+ #address-cells = 1;
+ #size-cells = 0;
+ #interrupt-cells = 1;
+
+ main_osc: main_osc {
+ compatible =
atmel,at91rm9200-clk-main-osc;
+ #clock-cells = 0;
+ interrupts-extended = pmc
AT91_PMC_MOSCS;
+ clocks = main_xtal;
+ };
+
+ main: mainck {
+ compatible =
atmel,at91rm9200-clk-main;
+ #clock-cells = 0;
+ clocks = main_osc;
+ };
+
+ plla: pllack {
+ compatible = atmel,at91rm9200-clk-pll;
+ #clock-cells = 0;
+ interrupts-extended = pmc
AT91_PMC_LOCKA;
+ clocks = main;
+ reg = 0;
+ atmel,clk-input-range = 200
3200;
+ #atmel,pll-clk-output-range-cells = 4;
+ atmel,pll-clk-output-ranges =
74500 8 0 0
+
69500 75000 1 0
+
64500 7 2 0
+
59500 65000 3 0
+
54500 6 0 1
+
49500 55500 1 1
+
44500 5 2 1
+
4 45000 3 1;
+ };
+
+ plladiv: plladivck {
+ compatible =
atmel,at91sam9x5-clk-plldiv;
+ #clock-cells = 0;
+ clocks = plla;
+ };
+
+ utmi: utmick {
+ compatible =
atmel,at91sam9x5-clk-utmi;
+ #clock-cells = 0;
+ interrupts-extended = pmc
AT91_PMC_LOCKU;
+ clocks = main;
+ };
+
+ mck: masterck {
+ compatible =
atmel,at91rm9200-clk-master;
+ #clock-cells = 0;
+ interrupts-extended = pmc
AT91_PMC_MCKRDY
[PATCHv2 20/32] ARM: at91/dt: kizbox: define main crystal frequency
Define kizbox board's main crystal frequency.
Signed-off-by: Alexandre Belloni alexandre.bell...@free-electrons.com
Cc: Gael Portay g.por...@overkiz.com
---
arch/arm/boot/dts/kizbox.dts | 4
1 file changed, 4 insertions(+)
diff --git a/arch/arm/boot/dts/kizbox.dts b/arch/arm/boot/dts/kizbox.dts
index 928f6eef2d59..e83e4f9310b8 100644
--- a/arch/arm/boot/dts/kizbox.dts
+++ b/arch/arm/boot/dts/kizbox.dts
@@ -30,6 +30,10 @@
compatible = atmel,osc, fixed-clock;
clock-frequency = 18432000;
};
+
+ main_xtal {
+ clock-frequency = 18432000;
+ };
};
ahb {
--
1.9.1
--
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the body of a message to majord...@vger.kernel.org
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Please read the FAQ at http://www.tux.org/lkml/
[PATCHv2 18/32] ARM: at91/dt: ethernut5: define crystals frequencies
Define egnite Ethernut 5 main and slow crystals frequencies.
Signed-off-by: Alexandre Belloni alexandre.bell...@free-electrons.com
Cc: Tim Schendekehl tim.schendek...@egnite.de
---
arch/arm/boot/dts/ethernut5.dts | 10 ++
1 file changed, 10 insertions(+)
diff --git a/arch/arm/boot/dts/ethernut5.dts b/arch/arm/boot/dts/ethernut5.dts
index 143b6d25bc80..8f941c2db7c6 100644
--- a/arch/arm/boot/dts/ethernut5.dts
+++ b/arch/arm/boot/dts/ethernut5.dts
@@ -20,6 +20,16 @@
reg = 0x2000 0x0800;
};
+ clocks {
+ slow_xtal {
+ clock-frequency = 32768;
+ };
+
+ main_xtal {
+ clock-frequency = 18432000;
+ };
+ };
+
ahb {
apb {
dbgu: serial@f200 {
--
1.9.1
--
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Please read the FAQ at http://www.tux.org/lkml/
[PATCHv2 12/32] ARM: at91/dt: foxg20: define crystals frequencies
Define Acme Systems srl Fox G20 main and slow crystals frequencies.
Signed-off-by: Alexandre Belloni alexandre.bell...@free-electrons.com
Cc: Douglas Gilbert dgilb...@interlog.com
---
arch/arm/boot/dts/at91-foxg20.dts | 8
1 file changed, 8 insertions(+)
diff --git a/arch/arm/boot/dts/at91-foxg20.dts
b/arch/arm/boot/dts/at91-foxg20.dts
index cbe967343997..f89598af4c2b 100644
--- a/arch/arm/boot/dts/at91-foxg20.dts
+++ b/arch/arm/boot/dts/at91-foxg20.dts
@@ -31,6 +31,14 @@
compatible = atmel,osc, fixed-clock;
clock-frequency = 18432000;
};
+
+ slow_xtal {
+ clock-frequency = 32768;
+ };
+
+ main_xtal {
+ clock-frequency = 18432000;
+ };
};
ahb {
--
1.9.1
--
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Please read the FAQ at http://www.tux.org/lkml/
[PATCHv2 17/32] ARM: at91/dt: ge863-pro3: define crystals frequencies
Define Telit GE863-PRO3, AK signal CDU and Telit EVK-PRO3 main and slow
crystals frequencies.
Signed-off-by: Alexandre Belloni alexandre.bell...@free-electrons.com
Cc: Fabio Porcedda fabio.porce...@gmail.com
Cc: Jiri Prchal jiri.prc...@aksignal.cz
---
arch/arm/boot/dts/ge863-pro3.dtsi | 8
1 file changed, 8 insertions(+)
diff --git a/arch/arm/boot/dts/ge863-pro3.dtsi
b/arch/arm/boot/dts/ge863-pro3.dtsi
index 230099bb31c8..a32fdbefbbd9 100644
--- a/arch/arm/boot/dts/ge863-pro3.dtsi
+++ b/arch/arm/boot/dts/ge863-pro3.dtsi
@@ -19,6 +19,14 @@
compatible = atmel,osc, fixed-clock;
clock-frequency = 600;
};
+
+ slow_xtal {
+ clock-frequency = 32768;
+ };
+
+ main_xtal {
+ clock-frequency = 600;
+ };
};
ahb {
--
1.9.1
--
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Please read the FAQ at http://www.tux.org/lkml/
[PATCHv2 16/32] ARM: at91/dt: mpa1600: define crytals frequencies
Define Phontech MPA 1600 main and slow crystals frequencies.
Signed-off-by: Alexandre Belloni alexandre.bell...@free-electrons.com
Cc: Joachim Eastwood manab...@gmail.com
---
arch/arm/boot/dts/mpa1600.dts | 8
1 file changed, 8 insertions(+)
diff --git a/arch/arm/boot/dts/mpa1600.dts b/arch/arm/boot/dts/mpa1600.dts
index ccf9ea242f72..f0f5e1098928 100644
--- a/arch/arm/boot/dts/mpa1600.dts
+++ b/arch/arm/boot/dts/mpa1600.dts
@@ -25,6 +25,14 @@
compatible = atmel,osc, fixed-clock;
clock-frequency = 18432000;
};
+
+ slow_xtal {
+ clock-frequency = 32768;
+ };
+
+ main_xtal {
+ clock-frequency = 18432000;
+ };
};
ahb {
--
1.9.1
--
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Please read the FAQ at http://www.tux.org/lkml/
[PATCHv2 13/32] ARM: at91/dt: usb_a9260: define crystals frequencies
Define Calao USB-A9260, USB-A9G20 and USB-A9G20-LPW main and slow crystals
frequencies.
Signed-off-by: Alexandre Belloni alexandre.bell...@free-electrons.com
Cc: Gregory Hermant gregory.herm...@calao-systems.com
---
arch/arm/boot/dts/usb_a9260_common.dtsi | 8
1 file changed, 8 insertions(+)
diff --git a/arch/arm/boot/dts/usb_a9260_common.dtsi
b/arch/arm/boot/dts/usb_a9260_common.dtsi
index 285977682cf3..12edafefd44a 100644
--- a/arch/arm/boot/dts/usb_a9260_common.dtsi
+++ b/arch/arm/boot/dts/usb_a9260_common.dtsi
@@ -16,6 +16,14 @@
compatible = atmel,osc, fixed-clock;
clock-frequency = 1200;
};
+
+ slow_xtal {
+ clock-frequency = 32768;
+ };
+
+ main_xtal {
+ clock-frequency = 1200;
+ };
};
ahb {
--
1.9.1
--
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Please read the FAQ at http://www.tux.org/lkml/
[PATCHv2 11/32] ARM: at91/dt: at91sam9g20ek: define crystals frequencies
Define at91sam9g20ek main and slow crystals frequencies.
Signed-off-by: Alexandre Belloni alexandre.bell...@free-electrons.com
---
arch/arm/boot/dts/at91sam9g20ek_common.dtsi | 8
1 file changed, 8 insertions(+)
diff --git a/arch/arm/boot/dts/at91sam9g20ek_common.dtsi
b/arch/arm/boot/dts/at91sam9g20ek_common.dtsi
index cb2c010e08e2..d2919108e92d 100644
--- a/arch/arm/boot/dts/at91sam9g20ek_common.dtsi
+++ b/arch/arm/boot/dts/at91sam9g20ek_common.dtsi
@@ -26,6 +26,14 @@
compatible = atmel,osc, fixed-clock;
clock-frequency = 18432000;
};
+
+ slow_xtal {
+ clock-frequency = 32768;
+ };
+
+ main_xtal {
+ clock-frequency = 18432000;
+ };
};
ahb {
--
1.9.1
--
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Please read the FAQ at http://www.tux.org/lkml/
[PATCHv2 02/32] ARM: at91/dt: ariag25: define crystals frequencies
Define Acme Systems Aria G25 board main and slow crystals frequencies.
Signed-off-by: Alexandre Belloni alexandre.bell...@free-electrons.com
---
arch/arm/boot/dts/at91-ariag25.dts | 8
1 file changed, 8 insertions(+)
diff --git a/arch/arm/boot/dts/at91-ariag25.dts
b/arch/arm/boot/dts/at91-ariag25.dts
index 55ab6180e350..e9ced30159a7 100644
--- a/arch/arm/boot/dts/at91-ariag25.dts
+++ b/arch/arm/boot/dts/at91-ariag25.dts
@@ -42,6 +42,14 @@
compatible = atmel,osc, fixed-clock;
clock-frequency = 1200;
};
+
+ slow_xtal {
+ clock-frequency = 32768;
+ };
+
+ main_xtal {
+ clock-frequency = 1200;
+ };
};
ahb {
--
1.9.1
--
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Please read the FAQ at http://www.tux.org/lkml/
[PATCHv2 14/32] ARM: at91/dt: tny_a9260: define crystals frequencies
Define Calao TNY-A9260 and TNY-A9G20 main and slow crystals frequencies.
Signed-off-by: Alexandre Belloni alexandre.bell...@free-electrons.com
Cc: Gregory Hermant gregory.herm...@calao-systems.com
---
arch/arm/boot/dts/tny_a9260_common.dtsi | 8
1 file changed, 8 insertions(+)
diff --git a/arch/arm/boot/dts/tny_a9260_common.dtsi
b/arch/arm/boot/dts/tny_a9260_common.dtsi
index 0e6d3de2e09e..ce7138c3af1b 100644
--- a/arch/arm/boot/dts/tny_a9260_common.dtsi
+++ b/arch/arm/boot/dts/tny_a9260_common.dtsi
@@ -24,6 +24,14 @@
compatible = atmel,osc, fixed-clock;
clock-frequency = 1200;
};
+
+ slow_xtal {
+ clock-frequency = 32768;
+ };
+
+ main_xtal {
+ clock-frequency = 1200;
+ };
};
ahb {
--
1.9.1
--
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Please read the FAQ at http://www.tux.org/lkml/
[PATCHv2 06/32] ARM: at91/dt: at91rm9200ek: define crystals frequencies
Define at91rm9200ek main and slow crystals frequencies.
Signed-off-by: Alexandre Belloni alexandre.bell...@free-electrons.com
---
arch/arm/boot/dts/at91rm9200ek.dts | 8
1 file changed, 8 insertions(+)
diff --git a/arch/arm/boot/dts/at91rm9200ek.dts
b/arch/arm/boot/dts/at91rm9200ek.dts
index df6b0aa0e4dd..43eb779dd6f6 100644
--- a/arch/arm/boot/dts/at91rm9200ek.dts
+++ b/arch/arm/boot/dts/at91rm9200ek.dts
@@ -25,6 +25,14 @@
compatible = atmel,osc, fixed-clock;
clock-frequency = 18432000;
};
+
+ slow_xtal {
+ clock-frequency = 32768;
+ };
+
+ main_xtal {
+ clock-frequency = 18432000;
+ };
};
ahb {
--
1.9.1
--
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[PATCHv2 10/32] ARM: at91: move at91sam9260 SoCs to the CCF
This patch removes the selection of AT91_USE_OLD_CLK when selecting at91sam9260 SoCs support. This will automatically enable COMMON_CLK_AT91 option and add support for at91 common clk implementation. Signed-off-by: Alexandre Belloni alexandre.bell...@free-electrons.com --- arch/arm/mach-at91/Kconfig | 1 - 1 file changed, 1 deletion(-) diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig index c818136a74b8..a2efe6e1e224 100644 --- a/arch/arm/mach-at91/Kconfig +++ b/arch/arm/mach-at91/Kconfig @@ -119,7 +119,6 @@ config SOC_AT91SAM9260 bool AT91SAM9260, AT91SAM9XE or AT91SAM9G20 select HAVE_AT91_DBGU0 select SOC_AT91SAM9 - select AT91_USE_OLD_CLK select HAVE_AT91_USB_CLK help Select this if you are using one of Atmel's AT91SAM9260, AT91SAM9XE -- 1.9.1 -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCHv2 01/32] Documentation: dt: document all the atmel pmc compatibles
Documentation for atmel-pmc only list one compatible, add the remaining compatible strings. Signed-off-by: Alexandre Belloni alexandre.bell...@free-electrons.com --- Documentation/devicetree/bindings/arm/atmel-pmc.txt | 5 - 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/arm/atmel-pmc.txt b/Documentation/devicetree/bindings/arm/atmel-pmc.txt index 389bed5056e8..795cc78543fe 100644 --- a/Documentation/devicetree/bindings/arm/atmel-pmc.txt +++ b/Documentation/devicetree/bindings/arm/atmel-pmc.txt @@ -1,7 +1,10 @@ * Power Management Controller (PMC) Required properties: -- compatible: Should be atmel,at91rm9200-pmc +- compatible: Should be atmel,chip-pmc. + chip can be: at91rm9200, at91sam9260, at91sam9g45, at91sam9n12, + at91sam9x5, sama5d3 + - reg: Should contain PMC registers location and length Examples: -- 1.9.1 -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCHv2 07/32] ARM: at91: prepare common clk transition for sam9260
Enclose the sam9260 old clk registration in #if defined(CONFIG_OLD_CLK_AT91) #endif Signed-off-by: Alexandre Belloni alexandre.bell...@free-electrons.com --- arch/arm/mach-at91/at91sam9260.c | 6 +- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/arch/arm/mach-at91/at91sam9260.c b/arch/arm/mach-at91/at91sam9260.c index c3d22be73b7c..3477ba94c4c5 100644 --- a/arch/arm/mach-at91/at91sam9260.c +++ b/arch/arm/mach-at91/at91sam9260.c @@ -27,10 +27,11 @@ #include at91_rstc.h #include soc.h #include generic.h -#include clock.h #include sam9_smc.h #include pm.h +#if defined(CONFIG_OLD_CLK_AT91) +#include clock.h /* * Clocks * */ @@ -288,6 +289,9 @@ static void __init at91sam9260_register_clocks(void) clk_register(pck0); clk_register(pck1); } +#else +#define at91sam9260_register_clocks NULL +#endif /* * GPIO -- 1.9.1 -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCHv2 09/32] ARM: at91/dt: sam9g20: define clocks
Define the at91sam9g20 clocks that differ from at91sam9260 in the SoC dtsi file.
Signed-off-by: Alexandre Belloni alexandre.bell...@free-electrons.com
---
arch/arm/boot/dts/at91sam9g20.dtsi | 24
1 file changed, 24 insertions(+)
diff --git a/arch/arm/boot/dts/at91sam9g20.dtsi
b/arch/arm/boot/dts/at91sam9g20.dtsi
index b8e79466014f..31f7652612fc 100644
--- a/arch/arm/boot/dts/at91sam9g20.dtsi
+++ b/arch/arm/boot/dts/at91sam9g20.dtsi
@@ -25,6 +25,30 @@
adc0: adc@fffe {
atmel,adc-startup-time = 40;
};
+
+ pmc: pmc@fc00 {
+ plla: pllack {
+ atmel,clk-input-range = 200
3200;
+ atmel,pll-clk-output-ranges =
74500 8 0 0,
+ 69500
75000 1 0,
+ 64500
7 2 0,
+ 59500
65000 3 0,
+ 54500
6 0 1,
+ 49500
55000 1 1,
+ 44500
5 2 1,
+ 4
45000 3 1;
+ };
+
+ pllb: pllbck {
+ atmel,clk-input-range = 200
3200;
+ atmel,pll-clk-output-ranges = 3000
1 0 0;
+ };
+
+ mck: masterck {
+ atmel,clk-output-range = 0 13300;
+ atmel,clk-divisors = 1 2 4 6;
+ };
+ };
};
};
};
--
1.9.1
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[PATCHv2 08/32] ARM: at91/dt: sam9260: define clocks
Define the at91sam9260 clocks in the SoC dtsi file.
Signed-off-by: Alexandre Belloni alexandre.bell...@free-electrons.com
---
arch/arm/boot/dts/at91sam9260.dtsi | 314 -
1 file changed, 313 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/at91sam9260.dtsi
b/arch/arm/boot/dts/at91sam9260.dtsi
index c0e0eae16a27..cb100b03a362 100644
--- a/arch/arm/boot/dts/at91sam9260.dtsi
+++ b/arch/arm/boot/dts/at91sam9260.dtsi
@@ -12,6 +12,7 @@
#include dt-bindings/pinctrl/at91.h
#include dt-bindings/interrupt-controller/irq.h
#include dt-bindings/gpio/gpio.h
+#include dt-bindings/clock/at91.h
/ {
model = Atmel AT91SAM9260 family SoC;
@@ -48,6 +49,26 @@
reg = 0x2000 0x0400;
};
+ clocks {
+ slow_xtal: slow_xtal {
+ compatible = fixed-clock;
+ #clock-cells = 0;
+ clock-frequency = 0;
+ };
+
+ main_xtal: main_xtal {
+ compatible = fixed-clock;
+ #clock-cells = 0;
+ clock-frequency = 0;
+ };
+
+ adc_op_clk: adc_op_clk{
+ compatible = fixed-clock;
+ #clock-cells = 0;
+ clock-frequency = 500;
+ };
+ };
+
ahb {
compatible = simple-bus;
#address-cells = 1;
@@ -74,8 +95,260 @@
};
pmc: pmc@fc00 {
- compatible = atmel,at91rm9200-pmc;
+ compatible = atmel,at91sam9260-pmc;
reg = 0xfc00 0x100;
+ interrupts = 1 IRQ_TYPE_LEVEL_HIGH 7;
+ interrupt-controller;
+ #address-cells = 1;
+ #size-cells = 0;
+ #interrupt-cells = 1;
+
+ main_osc: main_osc {
+ compatible =
atmel,at91rm9200-clk-main-osc;
+ #clock-cells = 0;
+ interrupts-extended = pmc
AT91_PMC_MOSCS;
+ clocks = main_xtal;
+ };
+
+ main: mainck {
+ compatible =
atmel,at91rm9200-clk-main;
+ #clock-cells = 0;
+ clocks = main_osc;
+ };
+
+ slow_rc_osc: slow_rc_osc {
+ compatible = fixed-clock;
+ #clock-cells = 0;
+ clock-frequency = 32768;
+ clock-accuracy = 5000;
+ };
+
+ clk32k: slck {
+ compatible =
atmel,at91sam9260-clk-slow;
+ #clock-cells = 0;
+ clocks = slow_rc_osc, slow_xtal;
+ };
+
+ plla: pllack {
+ compatible = atmel,at91rm9200-clk-pll;
+ #clock-cells = 0;
+ interrupts-extended = pmc
AT91_PMC_LOCKA;
+ clocks = main;
+ reg = 0;
+ atmel,clk-input-range = 100
3200;
+ #atmel,pll-clk-output-range-cells = 4;
+ atmel,pll-clk-output-ranges = 8000
16000 0 1,
+ 15000
24000 2 1;
+ };
+
+ pllb: pllbck {
+ compatible = atmel,at91rm9200-clk-pll;
+ #clock-cells = 0;
+ interrupts-extended = pmc
AT91_PMC_LOCKB;
+ clocks = main;
+ reg = 1;
+ atmel,clk-input-range = 100
500;
+ #atmel,pll-clk-output-range-cells = 4;
+ atmel,pll-clk-output-ranges = 7000
13000 1 1;
+ };
+
+ mck: masterck {
+ compatible =
atmel,at91rm9200-clk-master;
+ #clock-cells = 0
[PATCHv2 05/32] ARM: at91: move at91rm9200 SoC to the CCF
This patch removes the selection of AT91_USE_OLD_CLK when selecting at91rm9200 SoC support. This will automatically enable COMMON_CLK_AT91 option and add support for at91 common clk implementation. Signed-off-by: Alexandre Belloni alexandre.bell...@free-electrons.com Acked-by: Boris BREZILLON boris.brezil...@free-electrons.com --- arch/arm/mach-at91/Kconfig | 1 - 1 file changed, 1 deletion(-) diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig index 45b55e0f0db6..c818136a74b8 100644 --- a/arch/arm/mach-at91/Kconfig +++ b/arch/arm/mach-at91/Kconfig @@ -113,7 +113,6 @@ config SOC_AT91RM9200 select HAVE_AT91_DBGU0 select MULTI_IRQ_HANDLER select SPARSE_IRQ - select AT91_USE_OLD_CLK select HAVE_AT91_USB_CLK config SOC_AT91SAM9260 -- 1.9.1 -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCHv2 03/32] ARM: at91: prepare common clk transition for rm9200
Enclose the rm9200 old clk registration in #if defined(CONFIG_OLD_CLK_AT91) #endif Signed-off-by: Alexandre Belloni alexandre.bell...@free-electrons.com Acked-by: Boris BREZILLON boris.brezil...@free-electrons.com --- arch/arm/mach-at91/at91rm9200.c | 6 +- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/arch/arm/mach-at91/at91rm9200.c b/arch/arm/mach-at91/at91rm9200.c index 787bb50a4dff..038702ee8bc6 100644 --- a/arch/arm/mach-at91/at91rm9200.c +++ b/arch/arm/mach-at91/at91rm9200.c @@ -26,10 +26,11 @@ #include at91_aic.h #include soc.h #include generic.h -#include clock.h #include sam9_smc.h #include pm.h +#if defined(CONFIG_OLD_CLK_AT91) +#include clock.h /* * Clocks * */ @@ -277,6 +278,9 @@ static void __init at91rm9200_register_clocks(void) clk_register(pck2); clk_register(pck3); } +#else +#define at91rm9200_register_clocks NULL +#endif /* * GPIO -- 1.9.1 -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCHv2 04/32] ARM: at91/dt: rm9200: define clocks
Signed-off-by: Alexandre Belloni alexandre.bell...@free-electrons.com
---
arch/arm/boot/dts/at91rm9200.dtsi | 304 ++
1 file changed, 304 insertions(+)
diff --git a/arch/arm/boot/dts/at91rm9200.dtsi
b/arch/arm/boot/dts/at91rm9200.dtsi
index c61b16fba79b..65ccf564b9a5 100644
--- a/arch/arm/boot/dts/at91rm9200.dtsi
+++ b/arch/arm/boot/dts/at91rm9200.dtsi
@@ -14,6 +14,7 @@
#include dt-bindings/pinctrl/at91.h
#include dt-bindings/interrupt-controller/irq.h
#include dt-bindings/gpio/gpio.h
+#include dt-bindings/clock/at91.h
/ {
model = Atmel AT91RM9200 family SoC;
@@ -51,6 +52,20 @@
reg = 0x2000 0x0400;
};
+ clocks {
+ slow_xtal: slow_xtal {
+ compatible = fixed-clock;
+ #clock-cells = 0;
+ clock-frequency = 0;
+ };
+
+ main_xtal: main_xtal {
+ compatible = fixed-clock;
+ #clock-cells = 0;
+ clock-frequency = 0;
+ };
+ };
+
ahb {
compatible = simple-bus;
#address-cells = 1;
@@ -79,6 +94,260 @@
pmc: pmc@fc00 {
compatible = atmel,at91rm9200-pmc;
reg = 0xfc00 0x100;
+ interrupts = 1 IRQ_TYPE_LEVEL_HIGH 7;
+ interrupt-controller;
+ #address-cells = 1;
+ #size-cells = 0;
+ #interrupt-cells = 1;
+
+ main_osc: main_osc {
+ compatible =
atmel,at91rm9200-clk-main-osc;
+ #clock-cells = 0;
+ interrupts-extended = pmc
AT91_PMC_MOSCS;
+ clocks = main_xtal;
+ };
+
+ main: mainck {
+ compatible =
atmel,at91rm9200-clk-main;
+ #clock-cells = 0;
+ clocks = main_osc;
+ };
+
+ plla: pllack {
+ compatible = atmel,at91rm9200-clk-pll;
+ #clock-cells = 0;
+ interrupts-extended = pmc
AT91_PMC_LOCKA;
+ clocks = main;
+ reg = 0;
+ atmel,clk-input-range = 100
3200;
+ #atmel,pll-clk-output-range-cells = 3;
+ atmel,pll-clk-output-ranges = 8000
16000 0,
+ 15000
18000 2;
+ };
+
+ pllb: pllbck {
+ compatible = atmel,at91rm9200-clk-pll;
+ #clock-cells = 0;
+ interrupts-extended = pmc
AT91_PMC_LOCKB;
+ clocks = main;
+ reg = 1;
+ atmel,clk-input-range = 100
3200;
+ #atmel,pll-clk-output-range-cells = 3;
+ atmel,pll-clk-output-ranges = 8000
16000 0,
+ 15000
18000 2;
+ };
+
+ mck: masterck {
+ compatible =
atmel,at91rm9200-clk-master;
+ #clock-cells = 0;
+ interrupts-extended = pmc
AT91_PMC_MCKRDY;
+ clocks = slow_xtal, main,
plla, pllb;
+ atmel,clk-output-range = 0 8000;
+ atmel,clk-divisors = 1 2 3 4;
+ };
+
+ usb: usbck {
+ compatible = atmel,at91rm9200-clk-usb;
+ #clock-cells = 0;
+ atmel,clk-divisors = 1 2;
+ clocks = pllb;
+ };
+
+ prog: progck {
+ compatible =
atmel,at91rm9200-clk-programmable;
+ #address-cells = 1;
+ #size-cells = 0
[PATCHv2 00/32] ARM: at91: Switch remaining SoCs and boards to CCF
This patch set adds support for the common clock framwork to the remaining atml SoCs: at91rm9200, at91sam9260, at91sam9263, at91sam9g45. It also defines the necessary main crystal and slow crystal frequencies. I couldn't find datasheets for the following boards: - mpa1600 - ge863-pro3 - animeo_ip - tny_a9260 For those, I assumed the 32kHz crystal is present on the board as this is the most common implementation (only one board doesn't have it). Please correct me if this is wrong. I could not test at91rm9200 as I don't own any board with that chip. Changes in v2: - Drop patch 3 that has been taken in the clock tree - rename tcb*_clk in tc*_clk for rm9200 an sam9260 - rename tc0_clk in tcb_clk for sam9263 Cc: Douglas Gilbert dgilb...@interlog.com Cc: Gregory Hermant gregory.herm...@calao-systems.com Cc: Joachim Eastwood manab...@gmail.com Cc: Fabio Porcedda fabio.porce...@gmail.com Cc: Jiri Prchal jiri.prc...@aksignal.cz Cc: Tim Schendekehl tim.schendek...@egnite.de Cc: Gael Portay g.por...@overkiz.com Cc: Rodolfo Giometti giome...@linux.it Alexandre Belloni (33): Alexandre Belloni (32): Documentation: dt: document all the atmel pmc compatibles ARM: at91/dt: ariag25: define crystals frequencies ARM: at91: prepare common clk transition for rm9200 ARM: at91/dt: rm9200: define clocks ARM: at91: move at91rm9200 SoC to the CCF ARM: at91/dt: at91rm9200ek: define crystals frequencies ARM: at91: prepare common clk transition for sam9260 ARM: at91/dt: sam9260: define clocks ARM: at91/dt: sam9g20: define clocks ARM: at91: move at91sam9260 SoCs to the CCF ARM: at91/dt: at91sam9g20ek: define crystals frequencies ARM: at91/dt: foxg20: define crystals frequencies ARM: at91/dt: usb_a9260: define crystals frequencies ARM: at91/dt: tny_a9260: define crystals frequencies ARM: at91/dt: qil_a9260: define crystals frequencies ARM: at91/dt: mpa1600: define crytals frequencies ARM: at91/dt: ge863-pro3: define crystals frequencies ARM: at91/dt: ethernut5: define crystals frequencies ARM: at91/dt: animeo_ip: define crystals frequencies ARM: at91/dt: kizbox: define main crystal frequency ARM: at91: prepare common clk transition for sam9g45 ARM: at91/dt: sam9g45: define clocks ARM: at91: move at91sam9g45 SoC to the CCF ARM: at91/dt: sam9m10g45ek: define crystals frequencies ARM: at91/dt: pm9g45: crystals frequencies ARM: at91/dt: cosino define crystals frequencies ARM: at91: prepare common clk transition for sam9263 ARM: at91/dt: sam9263: define clocks ARM: at91: move at91sam9263 SoC to the CCF ARM: at91/dt: sam9263ek: define crystals frequencies ARM: at91/dt: tny_a9263: define crystals frequencies ARM: at91/dt: usb_a9263: define crystals frequencies .../devicetree/bindings/arm/atmel-pmc.txt | 5 +- arch/arm/boot/dts/animeo_ip.dts| 8 + arch/arm/boot/dts/at91-ariag25.dts | 8 + arch/arm/boot/dts/at91-cosino.dtsi | 8 + arch/arm/boot/dts/at91-foxg20.dts | 8 + arch/arm/boot/dts/at91-qil_a9260.dts | 8 + arch/arm/boot/dts/at91rm9200.dtsi | 304 ++ arch/arm/boot/dts/at91rm9200ek.dts | 8 + arch/arm/boot/dts/at91sam9260.dtsi | 314 ++- arch/arm/boot/dts/at91sam9263.dtsi | 311 +++ arch/arm/boot/dts/at91sam9263ek.dts| 8 + arch/arm/boot/dts/at91sam9g20.dtsi | 24 ++ arch/arm/boot/dts/at91sam9g20ek_common.dtsi| 8 + arch/arm/boot/dts/at91sam9g45.dtsi | 340 - arch/arm/boot/dts/at91sam9m10g45ek.dts | 8 + arch/arm/boot/dts/ethernut5.dts| 10 + arch/arm/boot/dts/ge863-pro3.dtsi | 8 + arch/arm/boot/dts/kizbox.dts | 4 + arch/arm/boot/dts/mpa1600.dts | 8 + arch/arm/boot/dts/pm9g45.dts | 8 + arch/arm/boot/dts/tny_a9260_common.dtsi| 8 + arch/arm/boot/dts/tny_a9263.dts| 8 + arch/arm/boot/dts/usb_a9260_common.dtsi| 8 + arch/arm/boot/dts/usb_a9263.dts| 8 + arch/arm/mach-at91/Kconfig | 4 - arch/arm/mach-at91/at91rm9200.c| 6 +- arch/arm/mach-at91/at91sam9260.c | 6 +- arch/arm/mach-at91/at91sam9263.c | 6 +- arch/arm/mach-at91/at91sam9g45.c | 6 +- 29 files changed, 1457 insertions(+), 11 deletions(-) -- 1.9.1 -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Re: [PATCHv2 17/32] ARM: at91/dt: ge863-pro3: define crystals frequencies
On 08/07/2014 at 08:11:29 +0200, Jiří Prchal wrote :
Hi,
the slow crystal is not on the module ge863-pro3, but it's usually
on application board. So I think this clock should be in board dts.
Right, I'll move the 32kHz crystal to the board dts.
Dne 7.7.2014 22:23, Alexandre Belloni napsal(a):
Define Telit GE863-PRO3, AK signal CDU and Telit EVK-PRO3 main and slow
crystals frequencies.
Signed-off-by: Alexandre Belloni alexandre.bell...@free-electrons.com
Cc: Fabio Porcedda fabio.porce...@gmail.com
Cc: Jiri Prchal jiri.prc...@aksignal.cz
---
arch/arm/boot/dts/ge863-pro3.dtsi | 8
1 file changed, 8 insertions(+)
diff --git a/arch/arm/boot/dts/ge863-pro3.dtsi
b/arch/arm/boot/dts/ge863-pro3.dtsi
index 230099bb31c8..a32fdbefbbd9 100644
--- a/arch/arm/boot/dts/ge863-pro3.dtsi
+++ b/arch/arm/boot/dts/ge863-pro3.dtsi
@@ -19,6 +19,14 @@
compatible = atmel,osc, fixed-clock;
clock-frequency = 600;
};
+
+slow_xtal {
+clock-frequency = 32768;
+};
+
+main_xtal {
+clock-frequency = 600;
+};
};
ahb {
--
Alexandre Belloni, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
--
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Please read the FAQ at http://www.tux.org/lkml/
[PATCHv2 3/6] ARM: at91: select ATMEL_SDRAMC when using OF
When using device tree, select the Atmel RAM controller driver to handle its clocks. Signed-off-by: Alexandre Belloni alexandre.bell...@free-electrons.com --- arch/arm/mach-at91/Kconfig | 4 1 file changed, 4 insertions(+) diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig index 45b55e0f0db6..7a69ffd93b6b 100644 --- a/arch/arm/mach-at91/Kconfig +++ b/arch/arm/mach-at91/Kconfig @@ -49,6 +49,8 @@ config SOC_AT91SAM9 select GENERIC_CLOCKEVENTS select MULTI_IRQ_HANDLER select SPARSE_IRQ + select MEMORY if USE_OF + select ATMEL_SDRAMC if USE_OF config SOC_SAMA5 bool @@ -58,6 +60,8 @@ config SOC_SAMA5 select MULTI_IRQ_HANDLER select SPARSE_IRQ select USE_OF + select MEMORY + select ATMEL_SDRAMC menu Atmel AT91 System-on-Chip -- 1.9.1 -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCHv2 2/6] memory: add a driver for atmel ram controllers
Atmel SoCs have one or multiple RAM controllers that need one or multiple clocks
to run.
This driver handle those clocks.
Signed-off-by: Alexandre Belloni alexandre.bell...@free-electrons.com
---
drivers/memory/Kconfig| 10 +
drivers/memory/Makefile | 1 +
drivers/memory/atmel-sdramc.c | 98 +++
3 files changed, 109 insertions(+)
create mode 100644 drivers/memory/atmel-sdramc.c
diff --git a/drivers/memory/Kconfig b/drivers/memory/Kconfig
index c59e9c96e86d..257061c3c816 100644
--- a/drivers/memory/Kconfig
+++ b/drivers/memory/Kconfig
@@ -7,6 +7,16 @@ menuconfig MEMORY
if MEMORY
+config ATMEL_SDRAMC
+ bool Atmel (Multi-port DDR-)SDRAM Controller
+ default y
+ depends on ARCH_AT91 OF
+ help
+ This driver is for Atmel SDRAM Controller or Atmel Multi-port
+ DDR-SDRAM Controller available on Atmel AT91SAM9 and SAMA5 SoCs.
+ Starting with the at91sam9g45, this controller supports SDR, DDR and
+ LP-DDR memories.
+
config TI_AEMIF
tristate Texas Instruments AEMIF driver
depends on (ARCH_DAVINCI || ARCH_KEYSTONE) OF
diff --git a/drivers/memory/Makefile b/drivers/memory/Makefile
index 71160a2b7313..b8637261e1a1 100644
--- a/drivers/memory/Makefile
+++ b/drivers/memory/Makefile
@@ -5,6 +5,7 @@
ifeq ($(CONFIG_DDR),y)
obj-$(CONFIG_OF) += of_memory.o
endif
+obj-$(CONFIG_ATMEL_SDRAMC) += atmel-sdramc.o
obj-$(CONFIG_TI_AEMIF) += ti-aemif.o
obj-$(CONFIG_TI_EMIF) += emif.o
obj-$(CONFIG_FSL_IFC) += fsl_ifc.o
diff --git a/drivers/memory/atmel-sdramc.c b/drivers/memory/atmel-sdramc.c
new file mode 100644
index ..fed04e8efe75
--- /dev/null
+++ b/drivers/memory/atmel-sdramc.c
@@ -0,0 +1,98 @@
+/*
+ * Atmel (Multi-port DDR-)SDRAM Controller driver
+ *
+ * Copyright (C) 2014 Atmel
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see http://www.gnu.org/licenses/.
+ *
+ */
+
+#include linux/clk.h
+#include linux/err.h
+#include linux/kernel.h
+#include linux/module.h
+#include linux/of_platform.h
+#include linux/platform_device.h
+
+struct at91_ramc_caps {
+ bool has_ddrck;
+ bool has_mpddr_clk;
+};
+
+static const struct at91_ramc_caps at91rm9200_caps = { };
+
+static const struct at91_ramc_caps at91sam9g45_caps = {
+ .has_ddrck = 1,
+ .has_mpddr_clk = 0,
+};
+
+static const struct at91_ramc_caps sama5d3_caps = {
+ .has_ddrck = 1,
+ .has_mpddr_clk = 1,
+};
+
+static const struct of_device_id atmel_ramc_of_match[] = {
+ { .compatible = atmel,at91rm9200-sdramc, .data = at91rm9200_caps, },
+ { .compatible = atmel,at91sam9260-sdramc, .data = at91rm9200_caps, },
+ { .compatible = atmel,at91sam9g45-ddramc, .data = at91sam9g45_caps,
},
+ { .compatible = atmel,sama5d3-ddramc, .data = sama5d3_caps, },
+ {},
+};
+MODULE_DEVICE_TABLE(of, atmel_ramc_of_match);
+
+static int atmel_ramc_probe(struct platform_device *pdev)
+{
+ const struct of_device_id *match;
+ const struct at91_ramc_caps *caps;
+ struct clk *clk;
+
+ match = of_match_device(atmel_ramc_of_match, pdev-dev);
+ caps = match-data;
+
+ if (caps-has_ddrck) {
+ clk = devm_clk_get(pdev-dev, ddrck);
+ if (IS_ERR(clk))
+ return PTR_ERR(clk);
+ clk_prepare_enable(clk);
+ }
+
+ if (caps-has_mpddr_clk) {
+ clk = devm_clk_get(pdev-dev, mpddr);
+ if (IS_ERR(clk)) {
+ pr_err(AT91 RAMC: couldn't get mpddr clock\n);
+ return PTR_ERR(clk);
+ }
+ clk_prepare_enable(clk);
+ }
+
+ return 0;
+}
+
+static struct platform_driver atmel_ramc_driver = {
+ .probe = atmel_ramc_probe,
+ .driver = {
+ .name = atmel-ramc,
+ .owner = THIS_MODULE,
+ .of_match_table = atmel_ramc_of_match,
+ },
+};
+
+static int __init atmel_ramc_init(void)
+{
+ return platform_driver_register(atmel_ramc_driver);
+}
+module_init(atmel_ramc_init);
+
+MODULE_LICENSE(GPL v2);
+MODULE_AUTHOR(Alexandre Belloni alexandre.bell...@free-electrons.com);
+MODULE_DESCRIPTION(Atmel (Multi-port DDR-)SDRAM Controller);
--
1.9.1
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[PATCHv2 6/6] clk: at91: remove the useless CLK_IGNORE_UNUSED flag
The CLK_IGNORE_UNUSED flag was added on all the system clocks because of the ddrck. Now that it is handled by the ram controller driver, we can drop it. Signed-off-by: Alexandre Belloni alexandre.bell...@free-electrons.com --- drivers/clk/at91/clk-system.c | 8 +--- 1 file changed, 1 insertion(+), 7 deletions(-) diff --git a/drivers/clk/at91/clk-system.c b/drivers/clk/at91/clk-system.c index 8c96307d7363..a76d03fd577b 100644 --- a/drivers/clk/at91/clk-system.c +++ b/drivers/clk/at91/clk-system.c @@ -119,13 +119,7 @@ at91_clk_register_system(struct at91_pmc *pmc, const char *name, init.ops = system_ops; init.parent_names = parent_name; init.num_parents = 1; - /* -* CLK_IGNORE_UNUSED is used to avoid ddrck switch off. -* TODO : we should implement a driver supporting at91 ddr controller -* (see drivers/memory) which would request and enable the ddrck clock. -* When this is done we will be able to remove CLK_IGNORE_UNUSED flag. -*/ - init.flags = CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED; + init.flags = CLK_SET_RATE_PARENT; sys-id = id; sys-hw.init = init; -- 1.9.1 -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCHv2 0/6] Add a driver for the atmel ram controller
The atmel ram controller needs one or more clocks to work. For now the CLK_IGNORE_UNUSED flag is used on those clocks. This patch set introduce a driver that will take care of taking those clocks. The final goal is also to move the ioremap done in mach-at91 to that driver with a proper power management driver. Changes in v2: - use ATMEL_SDRAMC instead of ATMEL_RAMC - use atmel,sama5d3-ddramc instead of atmel,sama5d3-mpddramc - not getting mpddrck is now an error - handle atmel,sama5d3-ddramc in mach-at91/setup.c Alexandre Belloni (6): ARM: at91: Add new binding for sama5d3-ddramc memory: add a driver for atmel ram controllers ARM: at91: select ATMEL_SDRAMC when using OF ARM: at91/dt: sama5d3: define mpddr clock and ramc clocks ARM: at91/dt: at91sam9: use ddrck in ramc clk: at91: remove the useless CLK_IGNORE_UNUSED flag .../devicetree/bindings/arm/atmel-at91.txt | 1 + arch/arm/boot/dts/at91sam9n12.dtsi | 2 + arch/arm/boot/dts/at91sam9x5.dtsi | 2 + arch/arm/boot/dts/sama5d3.dtsi | 9 +- arch/arm/mach-at91/Kconfig | 4 + arch/arm/mach-at91/setup.c | 1 + drivers/clk/at91/clk-system.c | 8 +- drivers/memory/Kconfig | 10 +++ drivers/memory/Makefile| 1 + drivers/memory/atmel-sdramc.c | 98 ++ 10 files changed, 128 insertions(+), 8 deletions(-) create mode 100644 drivers/memory/atmel-sdramc.c -- 1.9.1 -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCHv2 4/6] ARM: at91/dt: sama5d3: define mpddr clock and ramc clocks
Define the available clock for mprddr and take both mpddr_clk and ddrck in the
ram controller driver.
Signed-off-by: Alexandre Belloni alexandre.bell...@free-electrons.com
---
arch/arm/boot/dts/sama5d3.dtsi | 9 -
1 file changed, 8 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/sama5d3.dtsi b/arch/arm/boot/dts/sama5d3.dtsi
index e0b15a6e8897..04c35ce1e33e 100644
--- a/arch/arm/boot/dts/sama5d3.dtsi
+++ b/arch/arm/boot/dts/sama5d3.dtsi
@@ -402,8 +402,10 @@
};
ramc0: ramc@ea00 {
- compatible = atmel,at91sam9g45-ddramc;
+ compatible = atmel,sama5d3-ddramc;
reg = 0xea00 0x200;
+ clocks = ddrck, mpddr_clk;
+ clock-names = ddrck, mpddr;
};
dbgu: serial@ee00 {
@@ -1170,6 +1172,11 @@
#clock-cells = 0;
reg = 48;
};
+
+ mpddr_clk: mpddr_clk {
+ #clock-cells = 0;
+ reg = 49;
+ };
};
};
--
1.9.1
--
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[PATCHv2 5/6] ARM: at91/dt: at91sam9: use ddrck in ramc
Make the ram controller driver take the ddrck clock for at91sam9n12 and
at91sam9x5.
Signed-off-by: Alexandre Belloni alexandre.bell...@free-electrons.com
---
arch/arm/boot/dts/at91sam9n12.dtsi | 2 ++
arch/arm/boot/dts/at91sam9x5.dtsi | 2 ++
2 files changed, 4 insertions(+)
diff --git a/arch/arm/boot/dts/at91sam9n12.dtsi
b/arch/arm/boot/dts/at91sam9n12.dtsi
index 287795985e32..3d48255c4ed1 100644
--- a/arch/arm/boot/dts/at91sam9n12.dtsi
+++ b/arch/arm/boot/dts/at91sam9n12.dtsi
@@ -85,6 +85,8 @@
ramc0: ramc@e800 {
compatible = atmel,at91sam9g45-ddramc;
reg = 0xe800 0x200;
+ clocks = ddrck;
+ clock-names = ddrck;
};
pmc: pmc@fc00 {
diff --git a/arch/arm/boot/dts/at91sam9x5.dtsi
b/arch/arm/boot/dts/at91sam9x5.dtsi
index d6133f497207..74722853e667 100644
--- a/arch/arm/boot/dts/at91sam9x5.dtsi
+++ b/arch/arm/boot/dts/at91sam9x5.dtsi
@@ -93,6 +93,8 @@
ramc0: ramc@e800 {
compatible = atmel,at91sam9g45-ddramc;
reg = 0xe800 0x200;
+ clocks = ddrck;
+ clock-names = ddrck;
};
pmc: pmc@fc00 {
--
1.9.1
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[PATCHv2 1/6] ARM: at91: Add new binding for sama5d3-ddramc
The IP for the SDRAM controller found on sama5d3 SoCs is different from the g45
one. Introduce a new compatible string to reflect that.
Signed-off-by: Alexandre Belloni alexandre.bell...@free-electrons.com
---
Documentation/devicetree/bindings/arm/atmel-at91.txt | 1 +
arch/arm/mach-at91/setup.c | 1 +
2 files changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/arm/atmel-at91.txt
b/Documentation/devicetree/bindings/arm/atmel-at91.txt
index 16f60b41c147..54dc3aefb12a 100644
--- a/Documentation/devicetree/bindings/arm/atmel-at91.txt
+++ b/Documentation/devicetree/bindings/arm/atmel-at91.txt
@@ -61,6 +61,7 @@ RAMC SDRAM/DDR Controller required properties:
- compatible: Should be atmel,at91rm9200-sdramc,
atmel,at91sam9260-sdramc,
atmel,at91sam9g45-ddramc,
+ atmel,sama5d3-ddramc,
- reg: Should contain registers location and length
For at91sam9263 and at91sam9g45 you must specify 2 entries.
diff --git a/arch/arm/mach-at91/setup.c b/arch/arm/mach-at91/setup.c
index f7a07a58ebb6..faff1eae3e65 100644
--- a/arch/arm/mach-at91/setup.c
+++ b/arch/arm/mach-at91/setup.c
@@ -384,6 +384,7 @@ static struct of_device_id ramc_ids[] = {
{ .compatible = atmel,at91rm9200-sdramc, .data = at91rm9200_standby },
{ .compatible = atmel,at91sam9260-sdramc, .data =
at91sam9_sdram_standby },
{ .compatible = atmel,at91sam9g45-ddramc, .data = at91_ddr_standby },
+ { .compatible = atmel,sama5d3-ddramc, .data = at91_ddr_standby },
{ /*sentinel*/ }
};
--
1.9.1
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Re: [GIT PULL] at91: dt for 3.17 #1
Hi, On 12/07/2014 at 21:35:44 -0700, Olof Johansson wrote : Looks good, you might want to ask him to write better tag descriptions though, or fill them in a bit yourself when you do the merge. I will definitely do better next time, I was thinking this would not appear anywhere. -- Alexandre Belloni, Free Electrons Embedded Linux, Kernel and Android engineering http://free-electrons.com -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Re: [PATCH v2 00/14] AT91: PIT: Cleanups and move to drivers/clocksource
On 01/07/2014 at 11:33:13 +0200, Maxime Ripard wrote : Hi everyone, This series cleans up the PIT driver in order for it to not depend on anything in mach-at91 anymore, and in the end move it out of mach-at91. Along the way, these patches also do a bit of cleanup. This has been tested on a G45-EK without DT and an Xplained with DT. On the whole series, Acked-by: Alexandre Belloni alexandre.bell...@free-electrons.com Thanks, Maxime Changes from v1: - Changed Kconfig option to ATMEL_PIT - Used DIV_ROUND_CLOSEST to compute the pit rate Maxime Ripard (14): AT91: PIT: Follow the general coding rules AT91: generic.h: Add include safe guards AT91: PIT: Use DIV_ROUND_CLOSEST to compute the cycles AT91: PIT: Use of_have_populated_dt instead of CONFIG_OF AT91: PIT: Rework probe functions AT91: dt: Remove init_time definitions AT91: PIT: Use consistent exit path in probe AT91: PIT: Use pr_fmt AT91: PIT: use request_irq instead of setup_irq AT91: PIT: (Almost) remove the global variables AT91: soc: Add init_time callback AT91: Convert the boards to the init_time callback AT91: PIT: Convert to an early_platform_device AT91: PIT: Move the driver to drivers/clocksource arch/arm/mach-at91/Kconfig | 5 - arch/arm/mach-at91/Makefile | 1 - arch/arm/mach-at91/at91sam9260.c| 34 +++- arch/arm/mach-at91/at91sam9261.c| 34 +++- arch/arm/mach-at91/at91sam9263.c| 34 +++- arch/arm/mach-at91/at91sam926x_time.c | 294 -- arch/arm/mach-at91/at91sam9g45.c| 35 +++- arch/arm/mach-at91/at91sam9rl.c | 34 +++- arch/arm/mach-at91/board-afeb-9260v1.c | 2 +- arch/arm/mach-at91/board-cam60.c| 2 +- arch/arm/mach-at91/board-cpu9krea.c | 2 +- arch/arm/mach-at91/board-dt-sam9.c | 10 -- arch/arm/mach-at91/board-dt-sama5.c | 9 - arch/arm/mach-at91/board-flexibity.c| 2 +- arch/arm/mach-at91/board-foxg20.c | 2 +- arch/arm/mach-at91/board-gsia18s.c | 2 +- arch/arm/mach-at91/board-pcontrol-g20.c | 2 +- arch/arm/mach-at91/board-sam9-l9260.c | 2 +- arch/arm/mach-at91/board-sam9260ek.c| 2 +- arch/arm/mach-at91/board-sam9261ek.c| 4 +- arch/arm/mach-at91/board-sam9263ek.c| 2 +- arch/arm/mach-at91/board-sam9g20ek.c| 4 +- arch/arm/mach-at91/board-sam9m10g45ek.c | 2 +- arch/arm/mach-at91/board-sam9rlek.c | 2 +- arch/arm/mach-at91/board-snapper9260.c | 2 +- arch/arm/mach-at91/board-stamp9g20.c| 4 +- arch/arm/mach-at91/generic.h| 8 +- arch/arm/mach-at91/setup.c | 5 + arch/arm/mach-at91/soc.h| 1 + drivers/clocksource/Kconfig | 4 + drivers/clocksource/Makefile| 1 + drivers/clocksource/timer-atmel-pit.c | 304 32 files changed, 506 insertions(+), 345 deletions(-) delete mode 100644 arch/arm/mach-at91/at91sam926x_time.c create mode 100644 drivers/clocksource/timer-atmel-pit.c -- 2.0.0 -- Alexandre Belloni, Free Electrons Embedded Linux, Kernel and Android engineering http://free-electrons.com -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Re: [PATCH 00/33] ARM: at91: Switch remaining SoCs and boards to CCF
Hi, On 01/07/2014 at 18:35:50 +0200, Arnd Bergmann wrote : On Tuesday 01 July 2014 16:12:09 Alexandre Belloni wrote: Looks good overall, but I think this Kconfig snippet should be cleaned up a little now: config AT91_USE_OLD_CLK bool config AT91_PMC_UNIT bool default !ARCH_AT91X40 config COMMON_CLK_AT91 bool default AT91_PMC_UNIT USE_OF !AT91_USE_OLD_CLK select COMMON_CLK config OLD_CLK_AT91 bool default AT91_PMC_UNIT AT91_USE_OLD_CLK If I read this right, disabling 'USE_OF' results in still using the old clock interface. Is that intentional? If you want to always use COMMON_CLK now, the above can probably be simplified to config AT91_PMC_UNIT def_bool !ARCH_AT91X40 select COMMON_CLK and all references to AT91_USE_OLD_CLK, COMMON_CLK_AT91 and OLD_CLK_AT91 be removed. Yeah, this is intentional we still have 30 or so boards that we have to migrate to DT. Until then, we want to be able to boot a kernel without CCF. The next step in the migration is to switch those boards to DT, possibly using an hybrid DT/pdata approach until we can get rid of the board files. Then, we will be able to get rid of the old clk implementation (and a few other drivers still living in mach-at91). -- Alexandre Belloni, Free Electrons Embedded Linux, Kernel and Android engineering http://free-electrons.com -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Re: [PATCH 00/33] ARM: at91: Switch remaining SoCs and boards to CCF
On 01/07/2014 at 19:01:12 +0200, Arnd Bergmann wrote : On Tuesday 01 July 2014 18:48:51 Alexandre Belloni wrote: On 01/07/2014 at 18:35:50 +0200, Arnd Bergmann wrote : If I read this right, disabling 'USE_OF' results in still using the old clock interface. Is that intentional? If you want to always use COMMON_CLK now, the above can probably be simplified to config AT91_PMC_UNIT def_bool !ARCH_AT91X40 select COMMON_CLK and all references to AT91_USE_OLD_CLK, COMMON_CLK_AT91 and OLD_CLK_AT91 be removed. Yeah, this is intentional we still have 30 or so boards that we have to migrate to DT. Until then, we want to be able to boot a kernel without CCF. The next step in the migration is to switch those boards to DT, possibly using an hybrid DT/pdata approach until we can get rid of the board files. Then, we will be able to get rid of the old clk implementation (and a few other drivers still living in mach-at91). Ok, I see. Do you expect those 30 boards to work if COMMON_CLK_AT91 is enabled, or are there known problems with that? If you have reason to believe it doesn't work, maybe you can expose the selection of the clock interface to users, e.g. like We actually do the opposite, when a board without DT support is selected, the old clock support is also selected even when also selecting CONFIG_OF. -- Alexandre Belloni, Free Electrons Embedded Linux, Kernel and Android engineering http://free-electrons.com -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCHv5 0/4] iio: mxs-lradc: add support to optional divider_by_two
Hello, This is v5 of the patchset that adds support to the optional divider_by_two of LRADC channels. Changes since v4: - moved enum mxs_lradc_divbytwo to the third patch - added a fourth patch to convert is_divided to a bitmap. I did that in a separated patch for review and copyright attribution purposes. This was tested on a custom i.MX28 platform. Alexandre Belloni (1): iio: mxs-lradc: convert is_divided to a bitmap Hector Palacios (3): iio: mxs-lradc: add scale attribute to channels iio: mxs-lradc: add scale_available file to channels iio: mxs-lradc: add write_raw function to modify scale drivers/staging/iio/adc/mxs-lradc.c | 222 +++- 1 file changed, 219 insertions(+), 3 deletions(-) -- 1.8.3.2 -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCHv5 2/4] iio: mxs-lradc: add scale_available file to channels
From: Hector Palacios hector.palac...@digi.com
Adds in_voltageX_scale_available file for every channel to read
the different available scales.
There are two scales per channel:
[0] = divider_by_two disabled (default)
[1] = divider_by_two enabled
The scale is a struct made of integer and nano parts to build
a long decimal number.
Signed-off-by: Hector Palacios hector.palac...@digi.com
Signed-off-by: Alexandre Belloni alexandre.bell...@free-electrons.com
Acked-by: Marek Vasut ma...@denx.de
---
drivers/staging/iio/adc/mxs-lradc.c | 106 +++-
1 file changed, 105 insertions(+), 1 deletion(-)
diff --git a/drivers/staging/iio/adc/mxs-lradc.c
b/drivers/staging/iio/adc/mxs-lradc.c
index 22fef0a408db..c63b312e54fd 100644
--- a/drivers/staging/iio/adc/mxs-lradc.c
+++ b/drivers/staging/iio/adc/mxs-lradc.c
@@ -38,6 +38,7 @@
#include linux/clk.h
#include linux/iio/iio.h
+#include linux/iio/sysfs.h
#include linux/iio/buffer.h
#include linux/iio/trigger.h
#include linux/iio/trigger_consumer.h
@@ -184,6 +185,11 @@ enum lradc_ts_plate {
LRADC_SAMPLE_VALID,
};
+struct mxs_lradc_scale {
+ unsigned intinteger;
+ unsigned intnano;
+};
+
struct mxs_lradc {
struct device *dev;
void __iomem*base;
@@ -199,6 +205,7 @@ struct mxs_lradc {
struct completion completion;
const uint32_t *vref_mv;
+ struct mxs_lradc_scale scale_avail[LRADC_MAX_TOTAL_CHANS][2];
/*
* Touchscreen LRADC channels receives a private slot in the CTRL4
@@ -929,9 +936,84 @@ static int mxs_lradc_read_raw(struct iio_dev *iio_dev,
return -EINVAL;
}
+static ssize_t mxs_lradc_show_scale_available_ch(struct device *dev,
+ struct device_attribute *attr,
+ char *buf,
+ int ch)
+{
+ struct iio_dev *iio = dev_to_iio_dev(dev);
+ struct mxs_lradc *lradc = iio_priv(iio);
+ int i, len = 0;
+
+ for (i = 0; i ARRAY_SIZE(lradc-scale_avail[ch]); i++)
+ len += sprintf(buf + len, %d.%09u ,
+ lradc-scale_avail[ch][i].integer,
+ lradc-scale_avail[ch][i].nano);
+
+ len += sprintf(buf + len, \n);
+
+ return len;
+}
+
+static ssize_t mxs_lradc_show_scale_available(struct device *dev,
+ struct device_attribute *attr,
+ char *buf)
+{
+ struct iio_dev_attr *iio_attr = to_iio_dev_attr(attr);
+
+ return mxs_lradc_show_scale_available_ch(dev, attr, buf,
+iio_attr-address);
+}
+
+#define SHOW_SCALE_AVAILABLE_ATTR(ch) \
+static IIO_DEVICE_ATTR(in_voltage##ch##_scale_available, S_IRUGO, \
+ mxs_lradc_show_scale_available, NULL, ch)
+
+SHOW_SCALE_AVAILABLE_ATTR(0);
+SHOW_SCALE_AVAILABLE_ATTR(1);
+SHOW_SCALE_AVAILABLE_ATTR(2);
+SHOW_SCALE_AVAILABLE_ATTR(3);
+SHOW_SCALE_AVAILABLE_ATTR(4);
+SHOW_SCALE_AVAILABLE_ATTR(5);
+SHOW_SCALE_AVAILABLE_ATTR(6);
+SHOW_SCALE_AVAILABLE_ATTR(7);
+SHOW_SCALE_AVAILABLE_ATTR(8);
+SHOW_SCALE_AVAILABLE_ATTR(9);
+SHOW_SCALE_AVAILABLE_ATTR(10);
+SHOW_SCALE_AVAILABLE_ATTR(11);
+SHOW_SCALE_AVAILABLE_ATTR(12);
+SHOW_SCALE_AVAILABLE_ATTR(13);
+SHOW_SCALE_AVAILABLE_ATTR(14);
+SHOW_SCALE_AVAILABLE_ATTR(15);
+
+static struct attribute *mxs_lradc_attributes[] = {
+ iio_dev_attr_in_voltage0_scale_available.dev_attr.attr,
+ iio_dev_attr_in_voltage1_scale_available.dev_attr.attr,
+ iio_dev_attr_in_voltage2_scale_available.dev_attr.attr,
+ iio_dev_attr_in_voltage3_scale_available.dev_attr.attr,
+ iio_dev_attr_in_voltage4_scale_available.dev_attr.attr,
+ iio_dev_attr_in_voltage5_scale_available.dev_attr.attr,
+ iio_dev_attr_in_voltage6_scale_available.dev_attr.attr,
+ iio_dev_attr_in_voltage7_scale_available.dev_attr.attr,
+ iio_dev_attr_in_voltage8_scale_available.dev_attr.attr,
+ iio_dev_attr_in_voltage9_scale_available.dev_attr.attr,
+ iio_dev_attr_in_voltage10_scale_available.dev_attr.attr,
+ iio_dev_attr_in_voltage11_scale_available.dev_attr.attr,
+ iio_dev_attr_in_voltage12_scale_available.dev_attr.attr,
+ iio_dev_attr_in_voltage13_scale_available.dev_attr.attr,
+ iio_dev_attr_in_voltage14_scale_available.dev_attr.attr,
+ iio_dev_attr_in_voltage15_scale_available.dev_attr.attr,
+ NULL
+};
+
+static const struct attribute_group mxs_lradc_attribute_group = {
+ .attrs = mxs_lradc_attributes,
+};
+
static const struct iio_info mxs_lradc_iio_info = {
.driver_module = THIS_MODULE,
.read_raw = mxs_lradc_read_raw,
+ .attrs = mxs_lradc_attribute_group,
};
static int mxs_lradc_ts_open(struct input_dev *dev)
@@ -1241,6 +1323,7 @@ static const struct iio_buffer_setup_ops
mxs_lradc_buffer_ops = {
.info_mask_separate
[PATCHv5 4/4] iio: mxs-lradc: convert is_divided to a bitmap
mxs_lradc.is_divided was an unsigned long array. Convert it to a bitmap to save
some memory.
Signed-off-by: Alexandre Belloni alexandre.bell...@free-electrons.com
---
drivers/staging/iio/adc/mxs-lradc.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/staging/iio/adc/mxs-lradc.c
b/drivers/staging/iio/adc/mxs-lradc.c
index a58c6aaa94d3..df71669bb60e 100644
--- a/drivers/staging/iio/adc/mxs-lradc.c
+++ b/drivers/staging/iio/adc/mxs-lradc.c
@@ -211,7 +211,7 @@ struct mxs_lradc {
const uint32_t *vref_mv;
struct mxs_lradc_scale scale_avail[LRADC_MAX_TOTAL_CHANS][2];
- unsigned intis_divided[LRADC_MAX_TOTAL_CHANS];
+ unsigned long is_divided;
/*
* Touchscreen LRADC channels receives a private slot in the CTRL4
@@ -920,7 +920,7 @@ static int mxs_lradc_read_raw(struct iio_dev *iio_dev,
*val = lradc-vref_mv[chan-channel];
*val2 = chan-scan_type.realbits -
- lradc-is_divided[chan-channel];
+ test_bit(chan-channel, lradc-is_divided);
return IIO_VAL_FRACTIONAL_LOG2;
case IIO_CHAN_INFO_OFFSET:
@@ -965,14 +965,14 @@ static int mxs_lradc_write_raw(struct iio_dev *iio_dev,
/* divider by two disabled */
writel(1 LRADC_CTRL2_DIVIDE_BY_TWO_OFFSET,
lradc-base + LRADC_CTRL2 + STMP_OFFSET_REG_CLR);
- lradc-is_divided[chan-channel] = 0;
+ clear_bit(chan-channel, lradc-is_divided);
ret = 0;
} else if (val == scale_avail[MXS_LRADC_DIV_ENABLED].integer
val2 == scale_avail[MXS_LRADC_DIV_ENABLED].nano) {
/* divider by two enabled */
writel(1 LRADC_CTRL2_DIVIDE_BY_TWO_OFFSET,
lradc-base + LRADC_CTRL2 + STMP_OFFSET_REG_SET);
- lradc-is_divided[chan-channel] = 1;
+ set_bit(chan-channel, lradc-is_divided);
ret = 0;
}
--
1.8.3.2
--
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[PATCHv5 3/4] iio: mxs-lradc: add write_raw function to modify scale
From: Hector Palacios hector.palac...@digi.com
Added write_raw function to manipulate the optional divider_by_two
through the scaling attribute out of the available scales.
Signed-off-by: Hector Palacios hector.palac...@digi.com
Signed-off-by: Alexandre Belloni alexandre.bell...@free-electrons.com
Acked-by: Marek Vasut ma...@denx.de
---
drivers/staging/iio/adc/mxs-lradc.c | 62 -
1 file changed, 61 insertions(+), 1 deletion(-)
diff --git a/drivers/staging/iio/adc/mxs-lradc.c
b/drivers/staging/iio/adc/mxs-lradc.c
index c63b312e54fd..a58c6aaa94d3 100644
--- a/drivers/staging/iio/adc/mxs-lradc.c
+++ b/drivers/staging/iio/adc/mxs-lradc.c
@@ -185,6 +185,11 @@ enum lradc_ts_plate {
LRADC_SAMPLE_VALID,
};
+enum mxs_lradc_divbytwo {
+ MXS_LRADC_DIV_DISABLED = 0,
+ MXS_LRADC_DIV_ENABLED,
+};
+
struct mxs_lradc_scale {
unsigned intinteger;
unsigned intnano;
@@ -206,6 +211,7 @@ struct mxs_lradc {
const uint32_t *vref_mv;
struct mxs_lradc_scale scale_avail[LRADC_MAX_TOTAL_CHANS][2];
+ unsigned intis_divided[LRADC_MAX_TOTAL_CHANS];
/*
* Touchscreen LRADC channels receives a private slot in the CTRL4
@@ -295,6 +301,7 @@ struct mxs_lradc {
#defineLRADC_CTRL1_LRADC_IRQ_OFFSET0
#defineLRADC_CTRL2 0x20
+#defineLRADC_CTRL2_DIVIDE_BY_TWO_OFFSET24
#defineLRADC_CTRL2_TEMPSENSE_PWD (1 15)
#defineLRADC_STATUS0x40
@@ -912,7 +919,8 @@ static int mxs_lradc_read_raw(struct iio_dev *iio_dev,
}
*val = lradc-vref_mv[chan-channel];
- *val2 = chan-scan_type.realbits;
+ *val2 = chan-scan_type.realbits -
+ lradc-is_divided[chan-channel];
return IIO_VAL_FRACTIONAL_LOG2;
case IIO_CHAN_INFO_OFFSET:
@@ -936,6 +944,56 @@ static int mxs_lradc_read_raw(struct iio_dev *iio_dev,
return -EINVAL;
}
+static int mxs_lradc_write_raw(struct iio_dev *iio_dev,
+ const struct iio_chan_spec *chan,
+ int val, int val2, long m)
+{
+ struct mxs_lradc *lradc = iio_priv(iio_dev);
+ struct mxs_lradc_scale *scale_avail =
+ lradc-scale_avail[chan-channel];
+ int ret;
+
+ ret = mutex_trylock(lradc-lock);
+ if (!ret)
+ return -EBUSY;
+
+ switch (m) {
+ case IIO_CHAN_INFO_SCALE:
+ ret = -EINVAL;
+ if (val == scale_avail[MXS_LRADC_DIV_DISABLED].integer
+ val2 == scale_avail[MXS_LRADC_DIV_DISABLED].nano) {
+ /* divider by two disabled */
+ writel(1 LRADC_CTRL2_DIVIDE_BY_TWO_OFFSET,
+ lradc-base + LRADC_CTRL2 + STMP_OFFSET_REG_CLR);
+ lradc-is_divided[chan-channel] = 0;
+ ret = 0;
+ } else if (val == scale_avail[MXS_LRADC_DIV_ENABLED].integer
+ val2 == scale_avail[MXS_LRADC_DIV_ENABLED].nano) {
+ /* divider by two enabled */
+ writel(1 LRADC_CTRL2_DIVIDE_BY_TWO_OFFSET,
+ lradc-base + LRADC_CTRL2 + STMP_OFFSET_REG_SET);
+ lradc-is_divided[chan-channel] = 1;
+ ret = 0;
+ }
+
+ break;
+ default:
+ ret = -EINVAL;
+ break;
+ }
+
+ mutex_unlock(lradc-lock);
+
+ return ret;
+}
+
+static int mxs_lradc_write_raw_get_fmt(struct iio_dev *iio_dev,
+ const struct iio_chan_spec *chan,
+ long m)
+{
+ return IIO_VAL_INT_PLUS_NANO;
+}
+
static ssize_t mxs_lradc_show_scale_available_ch(struct device *dev,
struct device_attribute *attr,
char *buf,
@@ -1013,6 +1071,8 @@ static const struct attribute_group
mxs_lradc_attribute_group = {
static const struct iio_info mxs_lradc_iio_info = {
.driver_module = THIS_MODULE,
.read_raw = mxs_lradc_read_raw,
+ .write_raw = mxs_lradc_write_raw,
+ .write_raw_get_fmt = mxs_lradc_write_raw_get_fmt,
.attrs = mxs_lradc_attribute_group,
};
--
1.8.3.2
--
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[PATCHv5 1/4] iio: mxs-lradc: add scale attribute to channels
From: Hector Palacios hector.palac...@digi.com
Some LRADC channels have fixed pre-dividers and all have an optional
divider by two which allows a maximum input voltage of VDDIO - 50mV.
This patch
- adds the scaling info flag to all channels
- grabs the max reference voltage per channel
(where the fixed pre-dividers apply)
- allows to read the scaling attribute (computed from the Vref)
Signed-off-by: Hector Palacios hector.palac...@digi.com.
Signed-off-by: Alexandre Belloni alexandre.bell...@free-electrons.com
Acked-by: Marek Vasut ma...@denx.de
---
drivers/staging/iio/adc/mxs-lradc.c | 56 +++--
1 file changed, 54 insertions(+), 2 deletions(-)
diff --git a/drivers/staging/iio/adc/mxs-lradc.c
b/drivers/staging/iio/adc/mxs-lradc.c
index 5a4499c3d22a..22fef0a408db 100644
--- a/drivers/staging/iio/adc/mxs-lradc.c
+++ b/drivers/staging/iio/adc/mxs-lradc.c
@@ -111,16 +111,59 @@ static const char * const mx28_lradc_irq_names[] = {
struct mxs_lradc_of_config {
const int irq_count;
const char * const *irq_name;
+ const uint32_t *vref_mv;
+};
+
+#define VREF_MV_BASE 1850
+
+static const uint32_t mx23_vref_mv[LRADC_MAX_TOTAL_CHANS] = {
+ VREF_MV_BASE, /* CH0 */
+ VREF_MV_BASE, /* CH1 */
+ VREF_MV_BASE, /* CH2 */
+ VREF_MV_BASE, /* CH3 */
+ VREF_MV_BASE, /* CH4 */
+ VREF_MV_BASE, /* CH5 */
+ VREF_MV_BASE * 2, /* CH6 VDDIO */
+ VREF_MV_BASE * 4, /* CH7 VBATT */
+ VREF_MV_BASE, /* CH8 Temp sense 0 */
+ VREF_MV_BASE, /* CH9 Temp sense 1 */
+ VREF_MV_BASE, /* CH10 */
+ VREF_MV_BASE, /* CH11 */
+ VREF_MV_BASE, /* CH12 USB_DP */
+ VREF_MV_BASE, /* CH13 USB_DN */
+ VREF_MV_BASE, /* CH14 VBG */
+ VREF_MV_BASE * 4, /* CH15 VDD5V */
+};
+
+static const uint32_t mx28_vref_mv[LRADC_MAX_TOTAL_CHANS] = {
+ VREF_MV_BASE, /* CH0 */
+ VREF_MV_BASE, /* CH1 */
+ VREF_MV_BASE, /* CH2 */
+ VREF_MV_BASE, /* CH3 */
+ VREF_MV_BASE, /* CH4 */
+ VREF_MV_BASE, /* CH5 */
+ VREF_MV_BASE, /* CH6 */
+ VREF_MV_BASE * 4, /* CH7 VBATT */
+ VREF_MV_BASE, /* CH8 Temp sense 0 */
+ VREF_MV_BASE, /* CH9 Temp sense 1 */
+ VREF_MV_BASE * 2, /* CH10 VDDIO */
+ VREF_MV_BASE, /* CH11 VTH */
+ VREF_MV_BASE * 2, /* CH12 VDDA */
+ VREF_MV_BASE, /* CH13 VDDD */
+ VREF_MV_BASE, /* CH14 VBG */
+ VREF_MV_BASE * 4, /* CH15 VDD5V */
};
static const struct mxs_lradc_of_config mxs_lradc_of_config[] = {
[IMX23_LRADC] = {
.irq_count = ARRAY_SIZE(mx23_lradc_irq_names),
.irq_name = mx23_lradc_irq_names,
+ .vref_mv= mx23_vref_mv,
},
[IMX28_LRADC] = {
.irq_count = ARRAY_SIZE(mx28_lradc_irq_names),
.irq_name = mx28_lradc_irq_names,
+ .vref_mv= mx28_vref_mv,
},
};
@@ -155,6 +198,8 @@ struct mxs_lradc {
struct completion completion;
+ const uint32_t *vref_mv;
+
/*
* Touchscreen LRADC channels receives a private slot in the CTRL4
* register, the slot #7. Therefore only 7 slots instead of 8 in the
@@ -836,6 +881,8 @@ static int mxs_lradc_read_raw(struct iio_dev *iio_dev,
const struct iio_chan_spec *chan,
int *val, int *val2, long m)
{
+ struct mxs_lradc *lradc = iio_priv(iio_dev);
+
/* Check for invalid channel */
if (chan-channel LRADC_MAX_TOTAL_CHANS)
return -EINVAL;
@@ -857,7 +904,9 @@ static int mxs_lradc_read_raw(struct iio_dev *iio_dev,
return IIO_VAL_INT_PLUS_MICRO;
}
- return -EINVAL;
+ *val = lradc-vref_mv[chan-channel];
+ *val2 = chan-scan_type.realbits;
+ return IIO_VAL_FRACTIONAL_LOG2;
case IIO_CHAN_INFO_OFFSET:
if (chan-type == IIO_TEMP) {
@@ -1189,7 +1238,8 @@ static const struct iio_buffer_setup_ops
mxs_lradc_buffer_ops = {
.type = (chan_type),\
.indexed = 1, \
.scan_index = (idx),\
- .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
+ .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
+ BIT(IIO_CHAN_INFO_SCALE), \
.channel = (idx), \
.scan_type = { \
.sign
[PATCHv5 RESEND 0/4] iio: mxs-lradc: add support to optional divider_by_two
Hello, This is v5 of the patchset that adds support to the optional divider_by_two of LRADC channels. Changes since v4: - moved enum mxs_lradc_divbytwo to the third patch - added a fourth patch to convert is_divided to a bitmap. I did that in a separated patch for review and copyright attribution purposes. This was tested on a custom i.MX28 platform. Alexandre Belloni (1): iio: mxs-lradc: convert is_divided to a bitmap Hector Palacios (3): iio: mxs-lradc: add scale attribute to channels iio: mxs-lradc: add scale_available file to channels iio: mxs-lradc: add write_raw function to modify scale drivers/staging/iio/adc/mxs-lradc.c | 222 +++- 1 file changed, 219 insertions(+), 3 deletions(-) -- 1.8.3.2 -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCHv5 RESEND 3/4] iio: mxs-lradc: add write_raw function to modify scale
From: Hector Palacios hector.palac...@digi.com
Added write_raw function to manipulate the optional divider_by_two
through the scaling attribute out of the available scales.
Signed-off-by: Hector Palacios hector.palac...@digi.com
Signed-off-by: Alexandre Belloni alexandre.bell...@free-electrons.com
Acked-by: Marek Vasut ma...@denx.de
---
drivers/staging/iio/adc/mxs-lradc.c | 62 -
1 file changed, 61 insertions(+), 1 deletion(-)
diff --git a/drivers/staging/iio/adc/mxs-lradc.c
b/drivers/staging/iio/adc/mxs-lradc.c
index c63b312e54fd..a58c6aaa94d3 100644
--- a/drivers/staging/iio/adc/mxs-lradc.c
+++ b/drivers/staging/iio/adc/mxs-lradc.c
@@ -185,6 +185,11 @@ enum lradc_ts_plate {
LRADC_SAMPLE_VALID,
};
+enum mxs_lradc_divbytwo {
+ MXS_LRADC_DIV_DISABLED = 0,
+ MXS_LRADC_DIV_ENABLED,
+};
+
struct mxs_lradc_scale {
unsigned intinteger;
unsigned intnano;
@@ -206,6 +211,7 @@ struct mxs_lradc {
const uint32_t *vref_mv;
struct mxs_lradc_scale scale_avail[LRADC_MAX_TOTAL_CHANS][2];
+ unsigned intis_divided[LRADC_MAX_TOTAL_CHANS];
/*
* Touchscreen LRADC channels receives a private slot in the CTRL4
@@ -295,6 +301,7 @@ struct mxs_lradc {
#defineLRADC_CTRL1_LRADC_IRQ_OFFSET0
#defineLRADC_CTRL2 0x20
+#defineLRADC_CTRL2_DIVIDE_BY_TWO_OFFSET24
#defineLRADC_CTRL2_TEMPSENSE_PWD (1 15)
#defineLRADC_STATUS0x40
@@ -912,7 +919,8 @@ static int mxs_lradc_read_raw(struct iio_dev *iio_dev,
}
*val = lradc-vref_mv[chan-channel];
- *val2 = chan-scan_type.realbits;
+ *val2 = chan-scan_type.realbits -
+ lradc-is_divided[chan-channel];
return IIO_VAL_FRACTIONAL_LOG2;
case IIO_CHAN_INFO_OFFSET:
@@ -936,6 +944,56 @@ static int mxs_lradc_read_raw(struct iio_dev *iio_dev,
return -EINVAL;
}
+static int mxs_lradc_write_raw(struct iio_dev *iio_dev,
+ const struct iio_chan_spec *chan,
+ int val, int val2, long m)
+{
+ struct mxs_lradc *lradc = iio_priv(iio_dev);
+ struct mxs_lradc_scale *scale_avail =
+ lradc-scale_avail[chan-channel];
+ int ret;
+
+ ret = mutex_trylock(lradc-lock);
+ if (!ret)
+ return -EBUSY;
+
+ switch (m) {
+ case IIO_CHAN_INFO_SCALE:
+ ret = -EINVAL;
+ if (val == scale_avail[MXS_LRADC_DIV_DISABLED].integer
+ val2 == scale_avail[MXS_LRADC_DIV_DISABLED].nano) {
+ /* divider by two disabled */
+ writel(1 LRADC_CTRL2_DIVIDE_BY_TWO_OFFSET,
+ lradc-base + LRADC_CTRL2 + STMP_OFFSET_REG_CLR);
+ lradc-is_divided[chan-channel] = 0;
+ ret = 0;
+ } else if (val == scale_avail[MXS_LRADC_DIV_ENABLED].integer
+ val2 == scale_avail[MXS_LRADC_DIV_ENABLED].nano) {
+ /* divider by two enabled */
+ writel(1 LRADC_CTRL2_DIVIDE_BY_TWO_OFFSET,
+ lradc-base + LRADC_CTRL2 + STMP_OFFSET_REG_SET);
+ lradc-is_divided[chan-channel] = 1;
+ ret = 0;
+ }
+
+ break;
+ default:
+ ret = -EINVAL;
+ break;
+ }
+
+ mutex_unlock(lradc-lock);
+
+ return ret;
+}
+
+static int mxs_lradc_write_raw_get_fmt(struct iio_dev *iio_dev,
+ const struct iio_chan_spec *chan,
+ long m)
+{
+ return IIO_VAL_INT_PLUS_NANO;
+}
+
static ssize_t mxs_lradc_show_scale_available_ch(struct device *dev,
struct device_attribute *attr,
char *buf,
@@ -1013,6 +1071,8 @@ static const struct attribute_group
mxs_lradc_attribute_group = {
static const struct iio_info mxs_lradc_iio_info = {
.driver_module = THIS_MODULE,
.read_raw = mxs_lradc_read_raw,
+ .write_raw = mxs_lradc_write_raw,
+ .write_raw_get_fmt = mxs_lradc_write_raw_get_fmt,
.attrs = mxs_lradc_attribute_group,
};
--
1.8.3.2
--
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the body of a message to majord...@vger.kernel.org
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