Re: [PATCH v2 2/6] reset: qcom: PDC Global (Power Domain Controller) reset controller
Hi Bjorn/Matthias,
Thanks for the review, will fix them in the next-respin.
On 2018-08-28 08:32, Bjorn Andersson wrote:
On Mon 27 Aug 17:22 PDT 2018, Matthias Kaehlcke wrote:
On Fri, Aug 24, 2018 at 06:48:56PM +0530, Sibi Sankar wrote:
> diff --git a/drivers/reset/reset-qcom-pdc.c b/drivers/reset/reset-qcom-pdc.c
[..]
> +struct qcom_pdc_desc {
> + const struct regmap_config *config;
> + const struct qcom_pdc_reset_map *resets;
> + size_t num_resets;
> +};
Not sure if this structure adds much value or just a layer of
indirection:
- .config is only accessed in _probe(), sdm845_pdc_regmap_config could
be used directly
- .resets is used in _(de)assert(), sdm845_pdc_resets could be used
directly
- .num_resets is only accessed in _probe(),
ARRAY_SIZE(sdm845_pdc_resets) could be used instead
It probably makes sense if it is planned to support reset controllers
of other SoCs with this driver.
I like this suggestion, once we need the configurability we can add the
type for it. It also shows that only .resets would need to be
referenced
by qcom_pdc_reset_data.
Will change it accordingly
> +struct qcom_pdc_reset_data {
> + struct reset_controller_dev rcdev;
> + struct regmap *regmap;
> + const struct qcom_pdc_desc *desc;
> +};
[..]
> +static int qcom_pdc_reset_probe(struct platform_device *pdev)
> +{
[..]
> + data->regmap = devm_regmap_init_mmio(dev, base, desc->config);
> + if (IS_ERR(data->regmap)) {
> + dev_err(dev, "Unable to get pdc-global regmap");
Add missing '\n'
Say 'pdc-reset' instead of 'pdc-global'? (see also my other comment
below).
This regmap is created out of the single anonymous "reg", so I think
the
error should be reduced to "Unable to initialize regmap\n".
Sure will add it but aren't we trying to regmap the entire pdc-global
register space though?
[..]
> +static const struct of_device_id qcom_pdc_reset_of_match[] = {
> + { .compatible = "qcom,sdm845-pdc-global", .data = &sdm845_pdc_desc },
Should this be 'qcom,sdm845-pdc-reset' which is more specific than
'global' and in line with the name and purpose of the driver?
Obviously this would require to adjust the bindings doc too.
No, the binding describes the hardware block named "PDC Global",
currently implemented as a reset controller. The reason for doing this
is so that we one day can expose additional interfaces in a backwards
compatible fashion.
Regards,
Bjorn
--
-- Sibi Sankar --
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project.
Re: [PATCH] remoteproc: qcom: adsp: Add SDM845 ADSP and CDSP support
Tested-by: Sibi Sankar
On 2018-08-28 12:44, Bjorn Andersson wrote:
Add support for booting the Audio and Compute DSPs found in Qualcomm's
SDM845 platform.
As with the previous platforms the power rail handling needs to be
updated once the appropriate support lands upstream.
Signed-off-by: Bjorn Andersson
---
.../devicetree/bindings/remoteproc/qcom,adsp.txt | 2 ++
drivers/remoteproc/qcom_q6v5_pas.c | 12
2 files changed, 14 insertions(+)
diff --git
a/Documentation/devicetree/bindings/remoteproc/qcom,adsp.txt
b/Documentation/devicetree/bindings/remoteproc/qcom,adsp.txt
index 728e4193f7a6..b7d058228185 100644
--- a/Documentation/devicetree/bindings/remoteproc/qcom,adsp.txt
+++ b/Documentation/devicetree/bindings/remoteproc/qcom,adsp.txt
@@ -10,6 +10,8 @@ on the Qualcomm ADSP Hexagon core.
"qcom,msm8974-adsp-pil"
"qcom,msm8996-adsp-pil"
"qcom,msm8996-slpi-pil"
+ "qcom,sdm845-adsp-pas"
+ "qcom,sdm845-cdsp-pas"
- interrupts-extended:
Usage: required
diff --git a/drivers/remoteproc/qcom_q6v5_pas.c
b/drivers/remoteproc/qcom_q6v5_pas.c
index 2478ef3cd519..53eff2afda06 100644
--- a/drivers/remoteproc/qcom_q6v5_pas.c
+++ b/drivers/remoteproc/qcom_q6v5_pas.c
@@ -342,6 +342,16 @@ static const struct adsp_data adsp_resource_init =
{
.ssctl_id = 0x14,
};
+static const struct adsp_data cdsp_resource_init = {
+ .crash_reason_smem = 601,
+ .firmware_name = "cdsp.mdt",
+ .pas_id = 18,
+ .has_aggre2_clk = false,
+ .ssr_name = "cdsp",
+ .sysmon_name = "cdsp",
+ .ssctl_id = 0x17,
+};
+
static const struct adsp_data slpi_resource_init = {
.crash_reason_smem = 424,
.firmware_name = "slpi.mdt",
@@ -355,6 +365,8 @@ static const struct adsp_data slpi_resource_init =
{
static const struct of_device_id adsp_of_match[] = {
{ .compatible = "qcom,msm8974-adsp-pil", .data =
&adsp_resource_init},
{ .compatible = "qcom,msm8996-adsp-pil", .data =
&adsp_resource_init},
{ .compatible = "qcom,msm8996-slpi-pil", .data =
&slpi_resource_init},
+ { .compatible = "qcom,sdm845-adsp-pas", .data = &adsp_resource_init},
+ { .compatible = "qcom,sdm845-cdsp-pas", .data = &cdsp_resource_init},
{ },
};
--
-- Sibi Sankar --
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project.
Re: [PATCH] arm64: dts: qcom: sdm845: Add smp2p nodes
Reviewed-by: Sibi Sankar
On 2018-08-28 12:42, Bjorn Andersson wrote:
Add the SMP2P nodes for the remoteproc states for adsp, cdsp, mpss and
slpi.
Signed-off-by: Bjorn Andersson
---
arch/arm64/boot/dts/qcom/sdm845.dtsi | 88
1 file changed, 88 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi
b/arch/arm64/boot/dts/qcom/sdm845.dtsi
index 0c9a2aa6a1b5..d977117acac4 100644
--- a/arch/arm64/boot/dts/qcom/sdm845.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi
@@ -230,6 +230,94 @@
hwlocks = <&tcsr_mutex 3>;
};
+ smp2p-cdsp {
+ compatible = "qcom,smp2p";
+ qcom,smem = <94>, <432>;
+
+ interrupts = ;
+
+ mboxes = <&apss_shared 6>;
+
+ qcom,local-pid = <0>;
+ qcom,remote-pid = <5>;
+
+ cdsp_smp2p_out: master-kernel {
+ qcom,entry-name = "master-kernel";
+ #qcom,smem-state-cells = <1>;
+ };
+
+ cdsp_smp2p_in: slave-kernel {
+ qcom,entry-name = "slave-kernel";
+
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+ };
+
+ smp2p-lpass {
+ compatible = "qcom,smp2p";
+ qcom,smem = <443>, <429>;
+
+ interrupts = ;
+
+ mboxes = <&apss_shared 10>;
+
+ qcom,local-pid = <0>;
+ qcom,remote-pid = <2>;
+
+ adsp_smp2p_out: master-kernel {
+ qcom,entry-name = "master-kernel";
+ #qcom,smem-state-cells = <1>;
+ };
+
+ adsp_smp2p_in: slave-kernel {
+ qcom,entry-name = "slave-kernel";
+
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+ };
+
+ smp2p-mpss {
+ compatible = "qcom,smp2p";
+ qcom,smem = <435>, <428>;
+ interrupts = ;
+ mboxes = <&apss_shared 14>;
+ qcom,local-pid = <0>;
+ qcom,remote-pid = <1>;
+
+ modem_smp2p_out: master-kernel {
+ qcom,entry-name = "master-kernel";
+ #qcom,smem-state-cells = <1>;
+ };
+
+ modem_smp2p_in: slave-kernel {
+ qcom,entry-name = "slave-kernel";
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+ };
+
+ smp2p-slpi {
+ compatible = "qcom,smp2p";
+ qcom,smem = <481>, <430>;
+ interrupts = ;
+ mboxes = <&apss_shared 26>;
+ qcom,local-pid = <0>;
+ qcom,remote-pid = <3>;
+
+ slpi_smp2p_out: master-kernel {
+ qcom,entry-name = "master-kernel";
+ #qcom,smem-state-cells = <1>;
+ };
+
+ slpi_smp2p_in: slave-kernel {
+ qcom,entry-name = "slave-kernel";
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+ };
+
psci {
compatible = "arm,psci-1.0";
method = "smc";
--
-- Sibi Sankar --
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project.
Re: [PATCH v2 3/6] dt-bindings: remoteproc: Remove additional definition tag
Hi Matthias, Thanks for the review! On 2018-08-28 06:14, Matthias Kaehlcke wrote: Hi Sibi, Subject: dt-bindings: remoteproc: Remove additional definition tag nit: the subject is a bit generic, you probably should at least add 'qcom: ' to the 'path'. Will add On Fri, Aug 24, 2018 at 06:48:57PM +0530, Sibi Sankar wrote: Remove the additional definition tag declared for WCSS sub-system under reset-names. Signed-off-by: Sibi Sankar --- Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt b/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt index 601dd9f389aa..c45e4c131fa2 100644 --- a/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt +++ b/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt @@ -58,7 +58,7 @@ on the Qualcomm Hexagon core. Usage: required Value type: Definition: must be "mss_restart" for the modem sub-system - Definition: must be "wcss_aon_reset", "wcss_reset", "wcss_q6_reset" + must be "wcss_aon_reset", "wcss_reset", "wcss_q6_reset" for the wcss syb-system Since you are already at it you might also want to fix the typo in 'wcss syb-system'. nice catch, will correct it. I missed your query in the other thread, APPS refers to the pdc_sync reset line for the Application processor. Other than the nits: Reviewed-by: Matthias Kaehlcke -- -- Sibi Sankar -- Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, a Linux Foundation Collaborative Project.
[PATCH v3 1/6] dt-bindings: reset: Add PDC Global binding for SDM845 SoCs
Add PDC Global (Power Domain Controller) binding for SDM845 SoCs.
Reviewed-by: Bjorn Andersson
Reviewed-by: Rob Herring
Signed-off-by: Sibi Sankar
---
.../bindings/reset/qcom,pdc-global.txt| 52 +++
include/dt-bindings/reset/qcom,sdm845-pdc.h | 20 +++
2 files changed, 72 insertions(+)
create mode 100644 Documentation/devicetree/bindings/reset/qcom,pdc-global.txt
create mode 100644 include/dt-bindings/reset/qcom,sdm845-pdc.h
diff --git a/Documentation/devicetree/bindings/reset/qcom,pdc-global.txt
b/Documentation/devicetree/bindings/reset/qcom,pdc-global.txt
new file mode 100644
index ..a62a492843e7
--- /dev/null
+++ b/Documentation/devicetree/bindings/reset/qcom,pdc-global.txt
@@ -0,0 +1,52 @@
+PDC Global
+==
+
+This binding describes a reset-controller found on PDC-Global (Power Domain
+Controller) block for Qualcomm Technologies Inc SDM845 SoCs.
+
+Required properties:
+- compatible:
+ Usage: required
+ Value type:
+ Definition: must be:
+ "qcom,sdm845-pdc-global"
+
+- reg:
+ Usage: required
+ Value type:
+ Definition: must specify the base address and size of the register
+ space.
+
+- #reset-cells:
+ Usage: required
+ Value type:
+ Definition: must be 1; cell entry represents the reset index.
+
+Example:
+
+pdc_reset: reset-controller@b2e {
+ compatible = "qcom,sdm845-pdc-global";
+ reg = <0xb2e 0x2>;
+ #reset-cells = <1>;
+};
+
+PDC reset clients
+==
+
+Device nodes that need access to reset lines should
+specify them as a reset phandle in their corresponding node as
+specified in reset.txt.
+
+For a list of all valid reset indices see
+
+
+Example:
+
+modem-pil@408 {
+ ...
+
+ resets = <&pdc_reset PDC_MODEM_SYNC_RESET>;
+ reset-names = "pdc_reset";
+
+ ...
+};
diff --git a/include/dt-bindings/reset/qcom,sdm845-pdc.h
b/include/dt-bindings/reset/qcom,sdm845-pdc.h
new file mode 100644
index ..53c37f9c319a
--- /dev/null
+++ b/include/dt-bindings/reset/qcom,sdm845-pdc.h
@@ -0,0 +1,20 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2018 The Linux Foundation. All rights reserved.
+ */
+
+#ifndef _DT_BINDINGS_RESET_PDC_SDM_845_H
+#define _DT_BINDINGS_RESET_PDC_SDM_845_H
+
+#define PDC_APPS_SYNC_RESET0
+#define PDC_SP_SYNC_RESET 1
+#define PDC_AUDIO_SYNC_RESET 2
+#define PDC_SENSORS_SYNC_RESET 3
+#define PDC_AOP_SYNC_RESET 4
+#define PDC_DEBUG_SYNC_RESET 5
+#define PDC_GPU_SYNC_RESET 6
+#define PDC_DISPLAY_SYNC_RESET 7
+#define PDC_COMPUTE_SYNC_RESET 8
+#define PDC_MODEM_SYNC_RESET 9
+
+#endif
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project
[PATCH v3 0/6] Add support for PDC Global on SDM845 SoCs
This patch series add support for PDC Global (Power Domain Controller) on SDM845 SoCs and adds pdc reset lines assert/deassert to remoteproc Q6v5 modem-pil. The first two patches adds PDC Global reset driver to control reset signals of Modem, Compute, Display, GPU, Debug, AOP, Sensors, Audio, SP and APPS. The last four patches (cleans up)/adds pdc reset lines to q6v5 bindings and asserts/deasserts in modem start/stop path. V3: refactored pdc reset driver to remove unused layer of indirection as suggested by Matthias Other minor fixes suggested by Matthias/Bjorn V2: Incorporated Philipp/Bjorn/Rob suggestions Renamed reset binding to pdc-global.txt replaced offset with #define of register name replaced with devm_reset_control_get_exclusive() Separted dt binding from the drivers Sibi Sankar (6): dt-bindings: reset: Add PDC Global binding for SDM845 SoCs reset: qcom: PDC Global (Power Domain Controller) reset controller dt-bindings: remoteproc: qcom: Remove additional definition tag dt-bindings: remoteproc: Add PDC reset binding for Q6V5 PIL remoteproc: qcom: q6v5-pil: Explicitly get mss_restart line remoteproc: qcom: q6v5-pil: Add PDC reset for modem on SDM845 SoCs .../bindings/remoteproc/qcom,q6v5.txt | 8 +- .../bindings/reset/qcom,pdc-global.txt| 52 drivers/remoteproc/qcom_q6v5_pil.c| 31 - drivers/reset/Kconfig | 9 ++ drivers/reset/Makefile| 1 + drivers/reset/reset-qcom-pdc.c| 124 ++ include/dt-bindings/reset/qcom,sdm845-pdc.h | 20 +++ 7 files changed, 237 insertions(+), 8 deletions(-) create mode 100644 Documentation/devicetree/bindings/reset/qcom,pdc-global.txt create mode 100644 drivers/reset/reset-qcom-pdc.c create mode 100644 include/dt-bindings/reset/qcom,sdm845-pdc.h -- The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project
[PATCH v3 3/6] dt-bindings: remoteproc: qcom: Remove additional definition tag
Remove the additional definition tag declared for WCSS sub-system under reset-names. Reviewed-by: Matthias Kaehlcke Signed-off-by: Sibi Sankar --- Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt b/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt index 601dd9f389aa..3a66cde5895a 100644 --- a/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt +++ b/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt @@ -58,8 +58,8 @@ on the Qualcomm Hexagon core. Usage: required Value type: Definition: must be "mss_restart" for the modem sub-system - Definition: must be "wcss_aon_reset", "wcss_reset", "wcss_q6_reset" - for the wcss syb-system + must be "wcss_aon_reset", "wcss_reset", "wcss_q6_reset" + for the wcss sub-system - cx-supply: - mss-supply: -- The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project
[PATCH v3 4/6] dt-bindings: remoteproc: Add PDC reset binding for Q6V5 PIL
Add additional pdc_reset binding required for Q6V5 Modem PIL on SDM845 SoCs. Reviewed-by: Rob Herring Signed-off-by: Sibi Sankar --- Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt | 4 1 file changed, 4 insertions(+) diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt b/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt index 3a66cde5895a..9ff5b0309417 100644 --- a/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt +++ b/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt @@ -53,6 +53,8 @@ on the Qualcomm Hexagon core. Definition: reference to the reset-controller for the modem sub-system reference to the list of 3 reset-controllers for the wcss sub-system + reference to the list of 2 reset-controllers for the modem + sub-system on SDM845 SoCs - reset-names: Usage: required @@ -60,6 +62,8 @@ on the Qualcomm Hexagon core. Definition: must be "mss_restart" for the modem sub-system must be "wcss_aon_reset", "wcss_reset", "wcss_q6_reset" for the wcss sub-system + must be "mss_restart", "pdc_reset" for the modem + sub-system on SDM845 SoCs - cx-supply: - mss-supply: -- The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project
[PATCH v3 2/6] reset: qcom: PDC Global (Power Domain Controller) reset controller
Add reset controller for SDM845 SoCs to control reset signals provided
by PDC Global for Modem, Compute, Display, GPU, Debug, AOP, Sensors,
Audio, SP and APPS
Signed-off-by: Sibi Sankar
---
drivers/reset/Kconfig | 9 +++
drivers/reset/Makefile | 1 +
drivers/reset/reset-qcom-pdc.c | 124 +
3 files changed, 134 insertions(+)
create mode 100644 drivers/reset/reset-qcom-pdc.c
diff --git a/drivers/reset/Kconfig b/drivers/reset/Kconfig
index 13d28fdbdbb5..c21da9fe51ec 100644
--- a/drivers/reset/Kconfig
+++ b/drivers/reset/Kconfig
@@ -98,6 +98,15 @@ config RESET_QCOM_AOSS
reset signals provided by AOSS for Modem, Venus, ADSP,
GPU, Camera, Wireless, Display subsystem. Otherwise, say N.
+config RESET_QCOM_PDC
+ tristate "Qualcomm PDC Reset Driver"
+ depends on ARCH_QCOM || COMPILE_TEST
+ help
+ This enables the PDC (Power Domain Controller) reset driver
+ for Qualcomm Technologies Inc SDM845 SoCs. Say Y if you want
+ to control reset signals provided by PDC for Modem, Compute,
+ Display, GPU, Debug, AOP, Sensors, Audio, SP and APPS.
+
config RESET_SIMPLE
bool "Simple Reset Controller Driver" if COMPILE_TEST
default ARCH_SOCFPGA || ARCH_STM32 || ARCH_STRATIX10 || ARCH_SUNXI ||
ARCH_ZX || ARCH_ASPEED
diff --git a/drivers/reset/Makefile b/drivers/reset/Makefile
index 4243c38228e2..d08e8b90046a 100644
--- a/drivers/reset/Makefile
+++ b/drivers/reset/Makefile
@@ -16,6 +16,7 @@ obj-$(CONFIG_RESET_MESON_AUDIO_ARB) += reset-meson-audio-arb.o
obj-$(CONFIG_RESET_OXNAS) += reset-oxnas.o
obj-$(CONFIG_RESET_PISTACHIO) += reset-pistachio.o
obj-$(CONFIG_RESET_QCOM_AOSS) += reset-qcom-aoss.o
+obj-$(CONFIG_RESET_QCOM_PDC) += reset-qcom-pdc.o
obj-$(CONFIG_RESET_SIMPLE) += reset-simple.o
obj-$(CONFIG_RESET_STM32MP157) += reset-stm32mp1.o
obj-$(CONFIG_RESET_SUNXI) += reset-sunxi.o
diff --git a/drivers/reset/reset-qcom-pdc.c b/drivers/reset/reset-qcom-pdc.c
new file mode 100644
index ..ab74bccd4a5b
--- /dev/null
+++ b/drivers/reset/reset-qcom-pdc.c
@@ -0,0 +1,124 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2018 The Linux Foundation. All rights reserved.
+ */
+
+#include
+#include
+#include
+#include
+#include
+
+#include
+
+#define RPMH_PDC_SYNC_RESET0x100
+
+struct qcom_pdc_reset_map {
+ u8 bit;
+};
+
+struct qcom_pdc_reset_data {
+ struct reset_controller_dev rcdev;
+ struct regmap *regmap;
+};
+
+static const struct regmap_config sdm845_pdc_regmap_config = {
+ .name = "pdc-reset",
+ .reg_bits = 32,
+ .reg_stride = 4,
+ .val_bits = 32,
+ .max_register = 0x2,
+ .fast_io= true,
+};
+
+static const struct qcom_pdc_reset_map sdm845_pdc_resets[] = {
+ [PDC_APPS_SYNC_RESET] = {0},
+ [PDC_SP_SYNC_RESET] = {1},
+ [PDC_AUDIO_SYNC_RESET] = {2},
+ [PDC_SENSORS_SYNC_RESET] = {3},
+ [PDC_AOP_SYNC_RESET] = {4},
+ [PDC_DEBUG_SYNC_RESET] = {5},
+ [PDC_GPU_SYNC_RESET] = {6},
+ [PDC_DISPLAY_SYNC_RESET] = {7},
+ [PDC_COMPUTE_SYNC_RESET] = {8},
+ [PDC_MODEM_SYNC_RESET] = {9},
+};
+
+static inline struct qcom_pdc_reset_data *to_qcom_pdc_reset_data(
+ struct reset_controller_dev *rcdev)
+{
+ return container_of(rcdev, struct qcom_pdc_reset_data, rcdev);
+}
+
+static int qcom_pdc_control_assert(struct reset_controller_dev *rcdev,
+ unsigned long idx)
+{
+ struct qcom_pdc_reset_data *data = to_qcom_pdc_reset_data(rcdev);
+
+ return regmap_update_bits(data->regmap, RPMH_PDC_SYNC_RESET,
+ BIT(sdm845_pdc_resets[idx].bit),
+ BIT(sdm845_pdc_resets[idx].bit));
+}
+
+static int qcom_pdc_control_deassert(struct reset_controller_dev *rcdev,
+ unsigned long idx)
+{
+ struct qcom_pdc_reset_data *data = to_qcom_pdc_reset_data(rcdev);
+
+ return regmap_update_bits(data->regmap, RPMH_PDC_SYNC_RESET,
+ BIT(sdm845_pdc_resets[idx].bit), 0);
+}
+
+static const struct reset_control_ops qcom_pdc_reset_ops = {
+ .assert = qcom_pdc_control_assert,
+ .deassert = qcom_pdc_control_deassert,
+};
+
+static int qcom_pdc_reset_probe(struct platform_device *pdev)
+{
+ struct qcom_pdc_reset_data *data;
+ struct device *dev = &pdev->dev;
+ void __iomem *base;
+ struct resource *res;
+
+ data = devm_kzalloc(dev, sizeof(*data), GFP_KERNEL);
+ if (!data)
+ return -ENOMEM;
+
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ base = devm_ioremap_resource(dev, res);
+ if (IS_ERR(base))
+ return PTR_ERR(base);
+
+ dat
[PATCH v3 5/6] remoteproc: qcom: q6v5-pil: Explicitly get mss_restart line
Explicitly get mss_restart to facilitate adding PDC reset line
for modem on SDM845 SoCs
Signed-off-by: Sibi Sankar
---
drivers/remoteproc/qcom_q6v5_pil.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/remoteproc/qcom_q6v5_pil.c
b/drivers/remoteproc/qcom_q6v5_pil.c
index b1296d614b8b..968413edf0c8 100644
--- a/drivers/remoteproc/qcom_q6v5_pil.c
+++ b/drivers/remoteproc/qcom_q6v5_pil.c
@@ -1177,7 +1177,7 @@ static int q6v5_init_clocks(struct device *dev, struct
clk **clks,
static int q6v5_init_reset(struct q6v5 *qproc)
{
qproc->mss_restart = devm_reset_control_get_exclusive(qproc->dev,
- NULL);
+ "mss_restart");
if (IS_ERR(qproc->mss_restart)) {
dev_err(qproc->dev, "failed to acquire mss restart\n");
return PTR_ERR(qproc->mss_restart);
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project
[PATCH v3 6/6] remoteproc: qcom: q6v5-pil: Add PDC reset for modem on SDM845 SoCs
In the presence of a PDC block working with subsystem RSC, assert/deassert
PDC reset in modem start/stop path.
Signed-off-by: Sibi Sankar
---
drivers/remoteproc/qcom_q6v5_pil.c | 29 -
1 file changed, 24 insertions(+), 5 deletions(-)
diff --git a/drivers/remoteproc/qcom_q6v5_pil.c
b/drivers/remoteproc/qcom_q6v5_pil.c
index 968413edf0c8..835fa005fe3e 100644
--- a/drivers/remoteproc/qcom_q6v5_pil.c
+++ b/drivers/remoteproc/qcom_q6v5_pil.c
@@ -149,6 +149,7 @@ struct q6v5 {
u32 halt_nc;
struct reset_control *mss_restart;
+ struct reset_control *pdc_reset;
struct qcom_q6v5 q6v5;
@@ -349,10 +350,17 @@ static int q6v5_load(struct rproc *rproc, const struct
firmware *fw)
static int q6v5_reset_assert(struct q6v5 *qproc)
{
- if (qproc->has_alt_reset)
- return reset_control_reset(qproc->mss_restart);
- else
- return reset_control_assert(qproc->mss_restart);
+ int ret;
+
+ if (qproc->has_alt_reset) {
+ reset_control_assert(qproc->pdc_reset);
+ ret = reset_control_reset(qproc->mss_restart);
+ reset_control_deassert(qproc->pdc_reset);
+ } else {
+ ret = reset_control_assert(qproc->mss_restart);
+ }
+
+ return ret;
}
static int q6v5_reset_deassert(struct q6v5 *qproc)
@@ -360,9 +368,11 @@ static int q6v5_reset_deassert(struct q6v5 *qproc)
int ret;
if (qproc->has_alt_reset) {
+ reset_control_assert(qproc->pdc_reset);
writel(1, qproc->rmb_base + RMB_MBA_ALT_RESET);
ret = reset_control_reset(qproc->mss_restart);
writel(0, qproc->rmb_base + RMB_MBA_ALT_RESET);
+ reset_control_deassert(qproc->pdc_reset);
} else {
ret = reset_control_deassert(qproc->mss_restart);
}
@@ -1183,6 +1193,15 @@ static int q6v5_init_reset(struct q6v5 *qproc)
return PTR_ERR(qproc->mss_restart);
}
+ if (qproc->has_alt_reset) {
+ qproc->pdc_reset = devm_reset_control_get_exclusive(qproc->dev,
+ "pdc_reset");
+ if (IS_ERR(qproc->pdc_reset)) {
+ dev_err(qproc->dev, "failed to acquire pdc reset\n");
+ return PTR_ERR(qproc->pdc_reset);
+ }
+ }
+
return 0;
}
@@ -1303,12 +1322,12 @@ static int q6v5_probe(struct platform_device *pdev)
}
qproc->active_reg_count = ret;
+ qproc->has_alt_reset = desc->has_alt_reset;
ret = q6v5_init_reset(qproc);
if (ret)
goto free_rproc;
qproc->version = desc->version;
- qproc->has_alt_reset = desc->has_alt_reset;
qproc->need_mem_protection = desc->need_mem_protection;
ret = qcom_q6v5_init(&qproc->q6v5, pdev, rproc, MPSS_CRASH_REASON_SMEM,
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project
Re: [PATCH v3 1/6] remoteproc: Introduce custom dump function for each remoteproc segment
Hi Vinod,
Thanks for the review,
On 08/07/2018 11:45 AM, Vinod wrote:
Hi Sibi,
On 27-07-18, 20:49, Sibi Sankar wrote:
Introduce custom dump function per remoteproc segment. It is responsible
for filling the device memory segment associated with coredump
Signed-off-by: Sibi Sankar
---
drivers/remoteproc/remoteproc_core.c | 15 ++-
include/linux/remoteproc.h | 3 +++
2 files changed, 13 insertions(+), 5 deletions(-)
diff --git a/drivers/remoteproc/remoteproc_core.c
b/drivers/remoteproc/remoteproc_core.c
index 283b258f5e0f..ec56cd822b26 100644
--- a/drivers/remoteproc/remoteproc_core.c
+++ b/drivers/remoteproc/remoteproc_core.c
@@ -1183,13 +1183,18 @@ static void rproc_coredump(struct rproc *rproc)
phdr->p_align = 0;
ptr = rproc_da_to_va(rproc, segment->da, segment->size);
- if (!ptr) {
- dev_err(&rproc->dev,
+
+ if (segment->dump) {
+ segment->dump(rproc, ptr, segment->size, data + offset);
Am not sure I follow, you are calling this w/o checking if ptr is valid,
so you maybe passing null to segment->dump() ?
the rationale behind passing ptr directly to dump_fn is that it will
help in tracking the segments being core dumped (q6v5_pil in particular
requires to unlock mba before dumping and cleanup after all the segments
are dumped which is currently decided based on a mask that is
maintained). It also allows the remoteproc driver to fill the memory as
needed (instead of the default 0xff). This is applicable to drivers that
implement dump_fn, for others the default behavior is maintained.
+ } else {
+ if (!ptr) {
+ dev_err(&rproc->dev,
"invalid coredump segment (%pad, %zu)\n",
&segment->da, segment->size);
- memset(data + offset, 0xff, segment->size);
- } else {
- memcpy(data + offset, ptr, segment->size);
+ memset(data + offset, 0xff, segment->size);
+ } else {
+ memcpy(data + offset, ptr, segment->size);
+ }
--
Qualcomm Innovation Center, Inc.
Qualcomm Innovation Center, Inc, is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project
Re: [PATCH 1/4] dt-bindings: reset: Add PDC reset binding for SDM845 SoCs
Hi Rob,
Thanks for the review
On 08/07/2018 11:46 PM, Rob Herring wrote:
On Tue, Jul 31, 2018 at 06:27:24PM +0530, Sibi S wrote:
Hi Philipp,
Thanks for the review!
On 07/31/2018 02:12 PM, Philipp Zabel wrote:
Hi Sibi,
On Fri, 2018-07-27 at 20:58 +0530, Sibi Sankar wrote:
Add SDM845 PDC (Power Domain Controller) reset controller binding
Signed-off-by: Sibi Sankar
---
.../bindings/reset/qcom,pdc-reset.txt | 52 +++
include/dt-bindings/reset/qcom,sdm845-pdc.h | 20 +++
2 files changed, 72 insertions(+)
create mode 100644 Documentation/devicetree/bindings/reset/qcom,pdc-reset.txt
create mode 100644 include/dt-bindings/reset/qcom,sdm845-pdc.h
diff --git a/Documentation/devicetree/bindings/reset/qcom,pdc-reset.txt
b/Documentation/devicetree/bindings/reset/qcom,pdc-reset.txt
new file mode 100644
index ..85e159962e08
--- /dev/null
+++ b/Documentation/devicetree/bindings/reset/qcom,pdc-reset.txt
@@ -0,0 +1,52 @@
+PDC Reset Controller
+==
+
+This binding describes a reset-controller found on PDC-Global(Power Domain
+Controller) block for Qualcomm Technologies Inc SDM845 SoCs.
+
+Required properties:
+- compatible:
+ Usage: required
+ Value type:
+ Definition: must be:
+ "qcom,sdm845-pdc-global"
+
+- reg:
+ Usage: required
+ Value type:
+ Definition: must specify the base address and size of the register
+ space.
+
+- #reset-cells:
+ Usage: required
+ Value type:
+ Definition: must be 1; cell entry represents the reset index.
+
+Example:
+
+pdc_reset: reset-controller@b2e {
Is this really just a reset controller?
The name makes it sound like a driver binding to this should also
provide pm_genpd and the binding should probably call this a power-
controller: Documentation/devicetree/bindings/power/power_domain.txt.
The PDC-global reg space which is a part of PDC-wrapper reg space seems
to be only used for the reset lines.
Couple of other drivers use other parts of the PDC-wrapper reg space:
https://patchwork.kernel.org/patch/10223701/ (PDC-Interrupt controller)
https://patchwork.kernel.org/patch/10255767/ (GMU-PDC incorrectly tries
to occupy the entire pdc-wrapper reg space)
since it couldn't be logically mapped into pdc-interrupt driver, it had
to be included as a separate reset driver.
You can't have overlapping regions in DT (well, you can because we have
to work-around existing DTs that do, but you shouldn't).
A single node can be multiple providers such as interrupt controller and
reset controller. It's an OS problem to split that into multiple
drivers.
There will be no overlaps. Jordan will be changing the dt binding of
gmu_pdc so that there is no overlap I guess. What I meant to say is that
pdc-global is a separate reg-space and currently has no other
functionality other than exposing the reset lines.
+ compatible = "qcom,sdm845-pdc-global";
+ reg = <0xb2e 0x2>;
This looks like this is the register space of the complete PDC, not just
the reset register?
The entire register space was chosen because it is only used for its
reset lines (had a good look at the downstream kernel and had a conversation
with Lina) and to ensure break backward compatibility for
the for the dt entry if the reg-space was used for other purposes in
the future.
Why do you want to ensure breaking backwards compatibility?
Similar to the AOSS reset driver which had a unused clock part, this
driver also exposes a reg space of which only reset lines are used.
Rob
--
Qualcomm Innovation Center, Inc.
Qualcomm Innovation Center, Inc, is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project
Re: [PATCH 4/4] remoteproc: qcom: q6v5-pil: Add PDC restart for modem on SDM845 SoCs
On 08/07/2018 11:48 PM, Rob Herring wrote: On Fri, Jul 27, 2018 at 08:58:11PM +0530, Sibi Sankar wrote: In the presence of a PDC block working with subsystem RSC, assert/deassert PDC restart in modem start/stop path. Signed-off-by: Sibi Sankar --- .../bindings/remoteproc/qcom,q6v5.txt | 4 +++ Please split bindings to separate patch. Okay will split them. drivers/remoteproc/qcom_q6v5_pil.c| 27 --- 2 files changed, 27 insertions(+), 4 deletions(-) diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt b/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt index 601dd9f389aa..124fb1dc6fb8 100644 --- a/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt +++ b/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt @@ -51,6 +51,8 @@ on the Qualcomm Hexagon core. Usage: required Value type: Definition: reference to the reset-controller for the modem sub-system + reference to the list of 2 reset-controllers for the modem + sub-system on SDM845 SoCs reference to the list of 3 reset-controllers for the wcss sub-system @@ -58,6 +60,8 @@ on the Qualcomm Hexagon core. Usage: required Value type: Definition: must be "mss_restart" for the modem sub-system + Definition: must be "mss_restart", "pdc_restart" for the modem + sub-system on SDM845 SoCs Definition: must be "wcss_aon_reset", "wcss_reset", "wcss_q6_reset" for the wcss syb-system -- Qualcomm Innovation Center, Inc. Qualcomm Innovation Center, Inc, is a member of Code Aurora Forum, a Linux Foundation Collaborative Project
[PATCH v2 1/6] dt-bindings: reset: Add PDC Global binding for SDM845 SoCs
Add PDC Global(Power Domain Controller) binding for SDM845 SoCs.
Signed-off-by: Sibi Sankar
---
.../bindings/reset/qcom,pdc-global.txt| 52 +++
include/dt-bindings/reset/qcom,sdm845-pdc.h | 20 +++
2 files changed, 72 insertions(+)
create mode 100644 Documentation/devicetree/bindings/reset/qcom,pdc-global.txt
create mode 100644 include/dt-bindings/reset/qcom,sdm845-pdc.h
diff --git a/Documentation/devicetree/bindings/reset/qcom,pdc-global.txt
b/Documentation/devicetree/bindings/reset/qcom,pdc-global.txt
new file mode 100644
index ..69f9edca9503
--- /dev/null
+++ b/Documentation/devicetree/bindings/reset/qcom,pdc-global.txt
@@ -0,0 +1,52 @@
+PDC Global
+==
+
+This binding describes a reset-controller found on PDC-Global(Power Domain
+Controller) block for Qualcomm Technologies Inc SDM845 SoCs.
+
+Required properties:
+- compatible:
+ Usage: required
+ Value type:
+ Definition: must be:
+ "qcom,sdm845-pdc-global"
+
+- reg:
+ Usage: required
+ Value type:
+ Definition: must specify the base address and size of the register
+ space.
+
+- #reset-cells:
+ Usage: required
+ Value type:
+ Definition: must be 1; cell entry represents the reset index.
+
+Example:
+
+pdc_reset: reset-controller@b2e {
+ compatible = "qcom,sdm845-pdc-global";
+ reg = <0xb2e 0x2>;
+ #reset-cells = <1>;
+};
+
+PDC reset clients
+==
+
+Device nodes that need access to reset lines should
+specify them as a reset phandle in their corresponding node as
+specified in reset.txt.
+
+For list of all valid reset indicies see
+
+
+Example:
+
+modem-pil@408 {
+ ...
+
+ resets = <&pdc_reset PDC_MODEM_SYNC_RESET>;
+ reset-names = "pdc_reset";
+
+ ...
+};
diff --git a/include/dt-bindings/reset/qcom,sdm845-pdc.h
b/include/dt-bindings/reset/qcom,sdm845-pdc.h
new file mode 100644
index ..53c37f9c319a
--- /dev/null
+++ b/include/dt-bindings/reset/qcom,sdm845-pdc.h
@@ -0,0 +1,20 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2018 The Linux Foundation. All rights reserved.
+ */
+
+#ifndef _DT_BINDINGS_RESET_PDC_SDM_845_H
+#define _DT_BINDINGS_RESET_PDC_SDM_845_H
+
+#define PDC_APPS_SYNC_RESET0
+#define PDC_SP_SYNC_RESET 1
+#define PDC_AUDIO_SYNC_RESET 2
+#define PDC_SENSORS_SYNC_RESET 3
+#define PDC_AOP_SYNC_RESET 4
+#define PDC_DEBUG_SYNC_RESET 5
+#define PDC_GPU_SYNC_RESET 6
+#define PDC_DISPLAY_SYNC_RESET 7
+#define PDC_COMPUTE_SYNC_RESET 8
+#define PDC_MODEM_SYNC_RESET 9
+
+#endif
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project
[PATCH v2 0/6] Add support for PDC Global on SDM845 SoCs
This patch series add support for PDC Global (Power Domain Controller) on SDM845 SoCs and adds pdc reset lines assert/deassert to remoteproc Q6v5 modem-pil. The first two patches adds PDC Global reset driver to control reset signals of Modem, Compute, Display, GPU, Debug, AOP, Sensors, Audio, SP and APPS. The last four patches (cleans up)/adds pdc reset lines to q6v5 bindings and asserts/deasserts in modem start/stop path. v2: Incorporated Philipp/Bjorn/Rob suggestions Renamed reset binding to pdc-global.txt replaced offset with #define of register name replaced with devm_reset_control_get_exclusive() Separted dt binding from the drivers The last 4 remoteproc patches can be picked up after the pdc global reset driver lands on linux-next. Sibi Sankar (6): dt-bindings: reset: Add PDC Global binding for SDM845 SoCs reset: qcom: PDC Global (Power Domain Controller) reset controller dt-bindings: remoteproc: Remove additional definition tag dt-bindings: remoteproc: Add PDC reset binding for Q6V5 PIL remoteproc: qcom: q6v5-pil: Explicitly get mss_restart line remoteproc: qcom: q6v5-pil: Add PDC reset for modem on SDM845 SoCs .../bindings/remoteproc/qcom,q6v5.txt | 6 +- .../bindings/reset/qcom,pdc-global.txt| 52 +++ drivers/remoteproc/qcom_q6v5_pil.c| 31 +++- drivers/reset/Kconfig | 9 ++ drivers/reset/Makefile| 1 + drivers/reset/reset-qcom-pdc.c| 142 ++ include/dt-bindings/reset/qcom,sdm845-pdc.h | 20 +++ 7 files changed, 254 insertions(+), 7 deletions(-) create mode 100644 Documentation/devicetree/bindings/reset/qcom,pdc-global.txt create mode 100644 drivers/reset/reset-qcom-pdc.c create mode 100644 include/dt-bindings/reset/qcom,sdm845-pdc.h -- The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project
[PATCH v2 2/6] reset: qcom: PDC Global (Power Domain Controller) reset controller
Add reset controller for SDM845 SoCs to control reset signals provided
by PDC Global for Modem, Compute, Display, GPU, Debug, AOP, Sensors,
Audio, SP and APPS
Signed-off-by: Sibi Sankar
---
drivers/reset/Kconfig | 9 +++
drivers/reset/Makefile | 1 +
drivers/reset/reset-qcom-pdc.c | 142 +
3 files changed, 152 insertions(+)
create mode 100644 drivers/reset/reset-qcom-pdc.c
diff --git a/drivers/reset/Kconfig b/drivers/reset/Kconfig
index 13d28fdbdbb5..c21da9fe51ec 100644
--- a/drivers/reset/Kconfig
+++ b/drivers/reset/Kconfig
@@ -98,6 +98,15 @@ config RESET_QCOM_AOSS
reset signals provided by AOSS for Modem, Venus, ADSP,
GPU, Camera, Wireless, Display subsystem. Otherwise, say N.
+config RESET_QCOM_PDC
+ tristate "Qualcomm PDC Reset Driver"
+ depends on ARCH_QCOM || COMPILE_TEST
+ help
+ This enables the PDC (Power Domain Controller) reset driver
+ for Qualcomm Technologies Inc SDM845 SoCs. Say Y if you want
+ to control reset signals provided by PDC for Modem, Compute,
+ Display, GPU, Debug, AOP, Sensors, Audio, SP and APPS.
+
config RESET_SIMPLE
bool "Simple Reset Controller Driver" if COMPILE_TEST
default ARCH_SOCFPGA || ARCH_STM32 || ARCH_STRATIX10 || ARCH_SUNXI ||
ARCH_ZX || ARCH_ASPEED
diff --git a/drivers/reset/Makefile b/drivers/reset/Makefile
index 4243c38228e2..d08e8b90046a 100644
--- a/drivers/reset/Makefile
+++ b/drivers/reset/Makefile
@@ -16,6 +16,7 @@ obj-$(CONFIG_RESET_MESON_AUDIO_ARB) += reset-meson-audio-arb.o
obj-$(CONFIG_RESET_OXNAS) += reset-oxnas.o
obj-$(CONFIG_RESET_PISTACHIO) += reset-pistachio.o
obj-$(CONFIG_RESET_QCOM_AOSS) += reset-qcom-aoss.o
+obj-$(CONFIG_RESET_QCOM_PDC) += reset-qcom-pdc.o
obj-$(CONFIG_RESET_SIMPLE) += reset-simple.o
obj-$(CONFIG_RESET_STM32MP157) += reset-stm32mp1.o
obj-$(CONFIG_RESET_SUNXI) += reset-sunxi.o
diff --git a/drivers/reset/reset-qcom-pdc.c b/drivers/reset/reset-qcom-pdc.c
new file mode 100644
index ..bb6a5e5ee0f8
--- /dev/null
+++ b/drivers/reset/reset-qcom-pdc.c
@@ -0,0 +1,142 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2018 The Linux Foundation. All rights reserved.
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+
+#define RPMH_PDC_SYNC_RESET0x100
+
+struct qcom_pdc_reset_map {
+ u8 bit;
+};
+
+struct qcom_pdc_desc {
+ const struct regmap_config *config;
+ const struct qcom_pdc_reset_map *resets;
+ size_t num_resets;
+};
+
+struct qcom_pdc_reset_data {
+ struct reset_controller_dev rcdev;
+ struct regmap *regmap;
+ const struct qcom_pdc_desc *desc;
+};
+
+static const struct regmap_config sdm845_pdc_regmap_config = {
+ .name = "pdc-reset",
+ .reg_bits = 32,
+ .reg_stride = 4,
+ .val_bits = 32,
+ .max_register = 0x2,
+ .fast_io= true,
+};
+
+static const struct qcom_pdc_reset_map sdm845_pdc_resets[] = {
+ [PDC_APPS_SYNC_RESET] = {0},
+ [PDC_SP_SYNC_RESET] = {1},
+ [PDC_AUDIO_SYNC_RESET] = {2},
+ [PDC_SENSORS_SYNC_RESET] = {3},
+ [PDC_AOP_SYNC_RESET] = {4},
+ [PDC_DEBUG_SYNC_RESET] = {5},
+ [PDC_GPU_SYNC_RESET] = {6},
+ [PDC_DISPLAY_SYNC_RESET] = {7},
+ [PDC_COMPUTE_SYNC_RESET] = {8},
+ [PDC_MODEM_SYNC_RESET] = {9},
+};
+
+static const struct qcom_pdc_desc sdm845_pdc_desc = {
+ .config = &sdm845_pdc_regmap_config,
+ .resets = sdm845_pdc_resets,
+ .num_resets = ARRAY_SIZE(sdm845_pdc_resets),
+};
+
+static inline struct qcom_pdc_reset_data *to_qcom_pdc_reset_data(
+ struct reset_controller_dev *rcdev)
+{
+ return container_of(rcdev, struct qcom_pdc_reset_data, rcdev);
+}
+
+static int qcom_pdc_control_assert(struct reset_controller_dev *rcdev,
+ unsigned long idx)
+{
+ struct qcom_pdc_reset_data *data = to_qcom_pdc_reset_data(rcdev);
+ const struct qcom_pdc_reset_map *map = &data->desc->resets[idx];
+
+ return regmap_update_bits(data->regmap, RPMH_PDC_SYNC_RESET,
+ BIT(map->bit), BIT(map->bit));
+}
+
+static int qcom_pdc_control_deassert(struct reset_controller_dev *rcdev,
+ unsigned long idx)
+{
+ struct qcom_pdc_reset_data *data = to_qcom_pdc_reset_data(rcdev);
+ const struct qcom_pdc_reset_map *map = &data->desc->resets[idx];
+
+ return regmap_update_bits(data->regmap, RPMH_PDC_SYNC_RESET,
+ BIT(map->bit), 0);
+}
+
+static const struct reset_control_ops qcom_pdc_reset_ops = {
+ .assert = qcom_pdc_control_assert,
+ .deassert = qcom_pdc_control_deassert,
+};
+
+static int qcom_pdc_reset_probe(struct platform_device *pdev)
+{
+ stru
[PATCH v2 3/6] dt-bindings: remoteproc: Remove additional definition tag
Remove the additional definition tag declared for WCSS sub-system under reset-names. Signed-off-by: Sibi Sankar --- Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt b/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt index 601dd9f389aa..c45e4c131fa2 100644 --- a/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt +++ b/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt @@ -58,7 +58,7 @@ on the Qualcomm Hexagon core. Usage: required Value type: Definition: must be "mss_restart" for the modem sub-system - Definition: must be "wcss_aon_reset", "wcss_reset", "wcss_q6_reset" + must be "wcss_aon_reset", "wcss_reset", "wcss_q6_reset" for the wcss syb-system - cx-supply: -- The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project
[PATCH v2 4/6] dt-bindings: remoteproc: Add PDC reset binding for Q6V5 PIL
Add additional pdc_reset binding required for Q6V5 Modem PIL on SDM845 SoCs. Signed-off-by: Sibi Sankar --- Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt | 4 1 file changed, 4 insertions(+) diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt b/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt index c45e4c131fa2..4c5473aeb697 100644 --- a/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt +++ b/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt @@ -53,6 +53,8 @@ on the Qualcomm Hexagon core. Definition: reference to the reset-controller for the modem sub-system reference to the list of 3 reset-controllers for the wcss sub-system + reference to the list of 2 reset-controllers for the modem + sub-system on SDM845 SoCs - reset-names: Usage: required @@ -60,6 +62,8 @@ on the Qualcomm Hexagon core. Definition: must be "mss_restart" for the modem sub-system must be "wcss_aon_reset", "wcss_reset", "wcss_q6_reset" for the wcss syb-system + must be "mss_restart", "pdc_reset" for the modem + sub-system on SDM845 SoCs - cx-supply: - mss-supply: -- The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project
[PATCH v2 5/6] remoteproc: qcom: q6v5-pil: Explicitly get mss_restart line
Explicitly get mss_restart to facilitate adding PDC reset line
for modem on SDM845 SoCs
Signed-off-by: Sibi Sankar
---
drivers/remoteproc/qcom_q6v5_pil.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/remoteproc/qcom_q6v5_pil.c
b/drivers/remoteproc/qcom_q6v5_pil.c
index b1296d614b8b..968413edf0c8 100644
--- a/drivers/remoteproc/qcom_q6v5_pil.c
+++ b/drivers/remoteproc/qcom_q6v5_pil.c
@@ -1177,7 +1177,7 @@ static int q6v5_init_clocks(struct device *dev, struct
clk **clks,
static int q6v5_init_reset(struct q6v5 *qproc)
{
qproc->mss_restart = devm_reset_control_get_exclusive(qproc->dev,
- NULL);
+ "mss_restart");
if (IS_ERR(qproc->mss_restart)) {
dev_err(qproc->dev, "failed to acquire mss restart\n");
return PTR_ERR(qproc->mss_restart);
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project
[PATCH v2 6/6] remoteproc: qcom: q6v5-pil: Add PDC reset for modem on SDM845 SoCs
In the presence of a PDC block working with subsystem RSC, assert/deassert
PDC reset in modem start/stop path.
Signed-off-by: Sibi Sankar
---
drivers/remoteproc/qcom_q6v5_pil.c | 29 -
1 file changed, 24 insertions(+), 5 deletions(-)
diff --git a/drivers/remoteproc/qcom_q6v5_pil.c
b/drivers/remoteproc/qcom_q6v5_pil.c
index 968413edf0c8..835fa005fe3e 100644
--- a/drivers/remoteproc/qcom_q6v5_pil.c
+++ b/drivers/remoteproc/qcom_q6v5_pil.c
@@ -149,6 +149,7 @@ struct q6v5 {
u32 halt_nc;
struct reset_control *mss_restart;
+ struct reset_control *pdc_reset;
struct qcom_q6v5 q6v5;
@@ -349,10 +350,17 @@ static int q6v5_load(struct rproc *rproc, const struct
firmware *fw)
static int q6v5_reset_assert(struct q6v5 *qproc)
{
- if (qproc->has_alt_reset)
- return reset_control_reset(qproc->mss_restart);
- else
- return reset_control_assert(qproc->mss_restart);
+ int ret;
+
+ if (qproc->has_alt_reset) {
+ reset_control_assert(qproc->pdc_reset);
+ ret = reset_control_reset(qproc->mss_restart);
+ reset_control_deassert(qproc->pdc_reset);
+ } else {
+ ret = reset_control_assert(qproc->mss_restart);
+ }
+
+ return ret;
}
static int q6v5_reset_deassert(struct q6v5 *qproc)
@@ -360,9 +368,11 @@ static int q6v5_reset_deassert(struct q6v5 *qproc)
int ret;
if (qproc->has_alt_reset) {
+ reset_control_assert(qproc->pdc_reset);
writel(1, qproc->rmb_base + RMB_MBA_ALT_RESET);
ret = reset_control_reset(qproc->mss_restart);
writel(0, qproc->rmb_base + RMB_MBA_ALT_RESET);
+ reset_control_deassert(qproc->pdc_reset);
} else {
ret = reset_control_deassert(qproc->mss_restart);
}
@@ -1183,6 +1193,15 @@ static int q6v5_init_reset(struct q6v5 *qproc)
return PTR_ERR(qproc->mss_restart);
}
+ if (qproc->has_alt_reset) {
+ qproc->pdc_reset = devm_reset_control_get_exclusive(qproc->dev,
+ "pdc_reset");
+ if (IS_ERR(qproc->pdc_reset)) {
+ dev_err(qproc->dev, "failed to acquire pdc reset\n");
+ return PTR_ERR(qproc->pdc_reset);
+ }
+ }
+
return 0;
}
@@ -1303,12 +1322,12 @@ static int q6v5_probe(struct platform_device *pdev)
}
qproc->active_reg_count = ret;
+ qproc->has_alt_reset = desc->has_alt_reset;
ret = q6v5_init_reset(qproc);
if (ret)
goto free_rproc;
qproc->version = desc->version;
- qproc->has_alt_reset = desc->has_alt_reset;
qproc->need_mem_protection = desc->need_mem_protection;
ret = qcom_q6v5_init(&qproc->q6v5, pdev, rproc, MPSS_CRASH_REASON_SMEM,
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project
[PATCH v3 5/6] remoteproc: qcom: q6v5-pil: Register segments/dumpfn for coredump
Register the MDT segments and custom dumpfn with the remoteproc core
dump functionality.
Signed-off-by: Sibi Sankar
---
drivers/remoteproc/qcom_q6v5_pil.c | 40 ++
1 file changed, 40 insertions(+)
diff --git a/drivers/remoteproc/qcom_q6v5_pil.c
b/drivers/remoteproc/qcom_q6v5_pil.c
index ac3342f9ea5a..22bb049c3e7f 100644
--- a/drivers/remoteproc/qcom_q6v5_pil.c
+++ b/drivers/remoteproc/qcom_q6v5_pil.c
@@ -1058,10 +1058,50 @@ static void *q6v5_da_to_va(struct rproc *rproc, u64 da,
int len)
return qproc->mpss_region + offset;
}
+static int qcom_q6v5_register_dump_segments(struct rproc *rproc,
+ const struct firmware *fw_unused)
+{
+ const struct firmware *fw;
+ const struct elf32_phdr *phdrs;
+ const struct elf32_phdr *phdr;
+ const struct elf32_hdr *ehdr;
+ struct q6v5 *qproc = (struct q6v5 *)rproc->priv;
+ int ret;
+ int i;
+
+ ret = request_firmware(&fw, "modem.mdt", qproc->dev);
+ if (ret < 0) {
+ dev_err(qproc->dev, "unable to load modem.mdt\n");
+ return ret;
+ }
+
+ qproc->valid_mask = 0;
+ ehdr = (struct elf32_hdr *)fw->data;
+ phdrs = (struct elf32_phdr *)(ehdr + 1);
+
+ for (i = 0; i < ehdr->e_phnum; i++) {
+ phdr = &phdrs[i];
+
+ if (!q6v5_phdr_valid(phdr))
+ continue;
+
+ ret = rproc_coredump_add_custom_segment(rproc, phdr->p_paddr,
+ phdr->p_memsz, qcom_q6v5_dump_segment);
+ if (ret)
+ break;
+
+ qproc->valid_mask++;
+ }
+
+ release_firmware(fw);
+ return ret;
+}
+
static const struct rproc_ops q6v5_ops = {
.start = q6v5_start,
.stop = q6v5_stop,
.da_to_va = q6v5_da_to_va,
+ .parse_fw = qcom_q6v5_register_dump_segments,
.load = q6v5_load,
};
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project
[PATCH v3 2/6] remoteproc: Add mechanism for custom dump function assignment
This patch adds a mechanism for assigning each rproc segment with
a custom dump function. It is to be called for each rproc segment
during coredump if assigned.
Signed-off-by: Sibi Sankar
---
drivers/remoteproc/remoteproc_core.c | 37
include/linux/remoteproc.h | 5
2 files changed, 42 insertions(+)
diff --git a/drivers/remoteproc/remoteproc_core.c
b/drivers/remoteproc/remoteproc_core.c
index ec56cd822b26..3d70b7dd1f18 100644
--- a/drivers/remoteproc/remoteproc_core.c
+++ b/drivers/remoteproc/remoteproc_core.c
@@ -1120,6 +1120,43 @@ int rproc_coredump_add_segment(struct rproc *rproc,
dma_addr_t da, size_t size)
}
EXPORT_SYMBOL(rproc_coredump_add_segment);
+/**
+ * rproc_coredump_add_custom_segment() - add segment of device memory to
+ * coredump and extend it with custom
+ * dump function
+ * @rproc: handle of a remote processor
+ * @da:device address
+ * @size: size of segment
+ * @dumpfn:custom dump function called for each segment during coredump
+ *
+ * Add device memory to the list of segments to be included in a coredump for
+ * the remoteproc and associate the segment with the given custom dump
+ * function.
+ *
+ * Return: 0 on success, negative errno on error.
+ */
+int rproc_coredump_add_custom_segment(struct rproc *rproc,
+ dma_addr_t da, size_t size,
+ void (*dumpfn)(struct rproc *rproc,
+void *ptr, size_t len,
+void *priv))
+{
+ struct rproc_dump_segment *segment;
+
+ segment = kzalloc(sizeof(*segment), GFP_KERNEL);
+ if (!segment)
+ return -ENOMEM;
+
+ segment->da = da;
+ segment->size = size;
+ segment->dump = dumpfn;
+
+ list_add_tail(&segment->node, &rproc->dump_segments);
+
+ return 0;
+}
+EXPORT_SYMBOL(rproc_coredump_add_custom_segment);
+
/**
* rproc_coredump() - perform coredump
* @rproc: rproc handle
diff --git a/include/linux/remoteproc.h b/include/linux/remoteproc.h
index 0fbb01a9955c..5a1ad008ec28 100644
--- a/include/linux/remoteproc.h
+++ b/include/linux/remoteproc.h
@@ -560,6 +560,11 @@ int rproc_boot(struct rproc *rproc);
void rproc_shutdown(struct rproc *rproc);
void rproc_report_crash(struct rproc *rproc, enum rproc_crash_type type);
int rproc_coredump_add_segment(struct rproc *rproc, dma_addr_t da, size_t
size);
+int rproc_coredump_add_custom_segment(struct rproc *rproc,
+ dma_addr_t da, size_t size,
+ void (*dumpfn)(struct rproc *rproc,
+void *ptr, size_t len,
+void *priv));
static inline struct rproc_vdev *vdev_to_rvdev(struct virtio_device *vdev)
{
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project
[PATCH v3 3/6] remoteproc: qcom: q6v5-pil: Refactor mba load/unload sequence
Refactor re-useable parts of mba load/unload sequence into mba_load and
mba_reclaim respectively and introduce mba_load flag. This is done in
order to prevent code duplication for modem coredump which requires the
mba to be loaded.
Signed-off-by: Sibi Sankar
---
drivers/remoteproc/qcom_q6v5_pil.c | 243 +
1 file changed, 144 insertions(+), 99 deletions(-)
diff --git a/drivers/remoteproc/qcom_q6v5_pil.c
b/drivers/remoteproc/qcom_q6v5_pil.c
index d7a4b9eca5d2..eacf9f0bf49e 100644
--- a/drivers/remoteproc/qcom_q6v5_pil.c
+++ b/drivers/remoteproc/qcom_q6v5_pil.c
@@ -165,6 +165,7 @@ struct q6v5 {
int proxy_reg_count;
bool running;
+ bool mba_loaded;
phys_addr_t mba_phys;
void *mba_region;
@@ -669,6 +670,145 @@ static bool q6v5_phdr_valid(const struct elf32_phdr *phdr)
return true;
}
+static int q6v5_mba_load(struct q6v5 *qproc)
+{
+ int ret;
+ int xfermemop_ret;
+
+ ret = q6v5_regulator_enable(qproc, qproc->proxy_regs,
+ qproc->proxy_reg_count);
+ if (ret) {
+ dev_err(qproc->dev, "failed to enable proxy supplies\n");
+ return ret;
+ }
+
+ ret = q6v5_clk_enable(qproc->dev, qproc->proxy_clks,
+ qproc->proxy_clk_count);
+ if (ret) {
+ dev_err(qproc->dev, "failed to enable proxy clocks\n");
+ goto disable_proxy_reg;
+ }
+
+ ret = q6v5_regulator_enable(qproc, qproc->active_regs,
+ qproc->active_reg_count);
+ if (ret) {
+ dev_err(qproc->dev, "failed to enable supplies\n");
+ goto disable_proxy_clk;
+ }
+
+ ret = q6v5_clk_enable(qproc->dev, qproc->reset_clks,
+ qproc->reset_clk_count);
+ if (ret) {
+ dev_err(qproc->dev, "failed to enable reset clocks\n");
+ goto disable_vdd;
+ }
+
+ ret = q6v5_reset_deassert(qproc);
+ if (ret) {
+ dev_err(qproc->dev, "failed to deassert mss restart\n");
+ goto disable_reset_clks;
+ }
+
+ ret = q6v5_clk_enable(qproc->dev, qproc->active_clks,
+ qproc->active_clk_count);
+ if (ret) {
+ dev_err(qproc->dev, "failed to enable clocks\n");
+ goto assert_reset;
+ }
+
+ /* Assign MBA image access in DDR to q6 */
+ ret = q6v5_xfer_mem_ownership(qproc, &qproc->mba_perm, true,
+ qproc->mba_phys, qproc->mba_size);
+ if (ret) {
+ dev_err(qproc->dev,
+ "assigning Q6 access to mba memory failed: %d\n", ret);
+ goto disable_active_clks;
+ }
+
+ writel(qproc->mba_phys, qproc->rmb_base + RMB_MBA_IMAGE_REG);
+
+ ret = q6v5proc_reset(qproc);
+ if (ret)
+ goto reclaim_mba;
+
+ ret = q6v5_rmb_mba_wait(qproc, 0, 5000);
+ if (ret == -ETIMEDOUT) {
+ dev_err(qproc->dev, "MBA boot timed out\n");
+ goto halt_axi_ports;
+ } else if (ret != RMB_MBA_XPU_UNLOCKED &&
+ ret != RMB_MBA_XPU_UNLOCKED_SCRIBBLED) {
+ dev_err(qproc->dev, "MBA returned unexpected status %d\n", ret);
+ ret = -EINVAL;
+ goto halt_axi_ports;
+ }
+
+ qproc->mba_loaded = true;
+ return 0;
+
+halt_axi_ports:
+ q6v5proc_halt_axi_port(qproc, qproc->halt_map, qproc->halt_q6);
+ q6v5proc_halt_axi_port(qproc, qproc->halt_map, qproc->halt_modem);
+ q6v5proc_halt_axi_port(qproc, qproc->halt_map, qproc->halt_nc);
+
+reclaim_mba:
+ xfermemop_ret = q6v5_xfer_mem_ownership(qproc, &qproc->mba_perm, false,
+ qproc->mba_phys,
+ qproc->mba_size);
+ if (xfermemop_ret) {
+ dev_err(qproc->dev,
+ "Failed to reclaim mba buffer, system may become
unstable\n");
+ }
+
+disable_active_clks:
+ q6v5_clk_disable(qproc->dev, qproc->active_clks,
+qproc->active_clk_count);
+assert_reset:
+ q6v5_reset_assert(qproc);
+disable_reset_clks:
+ q6v5_clk_disable(qproc->dev, qproc->reset_clks,
+qproc->reset_clk_count);
+disable_vdd:
+ q6v5_regulator_disable(qproc, qproc->active_regs,
+ qproc->active_reg_count);
+disable_proxy_clk:
+ q6v5_clk_disable(qproc->dev, qproc->proxy_clks,
+qproc->proxy_clk_count);
+disable_proxy_reg:
+ q6v5_regulator_disable(qproc,
[PATCH v3 1/6] remoteproc: Introduce custom dump function for each remoteproc segment
Introduce custom dump function per remoteproc segment. It is responsible
for filling the device memory segment associated with coredump
Signed-off-by: Sibi Sankar
---
drivers/remoteproc/remoteproc_core.c | 15 ++-
include/linux/remoteproc.h | 3 +++
2 files changed, 13 insertions(+), 5 deletions(-)
diff --git a/drivers/remoteproc/remoteproc_core.c
b/drivers/remoteproc/remoteproc_core.c
index 283b258f5e0f..ec56cd822b26 100644
--- a/drivers/remoteproc/remoteproc_core.c
+++ b/drivers/remoteproc/remoteproc_core.c
@@ -1183,13 +1183,18 @@ static void rproc_coredump(struct rproc *rproc)
phdr->p_align = 0;
ptr = rproc_da_to_va(rproc, segment->da, segment->size);
- if (!ptr) {
- dev_err(&rproc->dev,
+
+ if (segment->dump) {
+ segment->dump(rproc, ptr, segment->size, data + offset);
+ } else {
+ if (!ptr) {
+ dev_err(&rproc->dev,
"invalid coredump segment (%pad, %zu)\n",
&segment->da, segment->size);
- memset(data + offset, 0xff, segment->size);
- } else {
- memcpy(data + offset, ptr, segment->size);
+ memset(data + offset, 0xff, segment->size);
+ } else {
+ memcpy(data + offset, ptr, segment->size);
+ }
}
offset += phdr->p_filesz;
diff --git a/include/linux/remoteproc.h b/include/linux/remoteproc.h
index e3c5d856b6da..0fbb01a9955c 100644
--- a/include/linux/remoteproc.h
+++ b/include/linux/remoteproc.h
@@ -399,6 +399,8 @@ enum rproc_crash_type {
* @node: list node related to the rproc segment list
* @da:device address of the segment
* @size: size of the segment
+ * @dump: custom dump function to fill device memory segment associated
+ * with coredump
*/
struct rproc_dump_segment {
struct list_head node;
@@ -406,6 +408,7 @@ struct rproc_dump_segment {
dma_addr_t da;
size_t size;
+ void (*dump)(struct rproc *rproc, void *ptr, size_t len, void *priv);
loff_t offset;
};
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project
[PATCH v3 0/6] Add coredump support for Q6v5 Modem remoteproc
This patch series add coredump support for modem on SDM845, MSM8996 and MSM8916 SoCs. Modem requires the mba to be loaded before a coredump can be performed and this is achieved using a custom per segment dump function. V3: [bjorn]:replace prepare/unprepare ops with a more generalised per segment dump function V2: Introduce prepare/unprepare ops for rproc coredump Sibi Sankar (6): remoteproc: Introduce custom dump function for each remoteproc segment remoteproc: Add mechanism for custom dump function assignment remoteproc: qcom: q6v5-pil: Refactor mba load/unload sequence remoteproc: qcom: q6v5-pil: Add custom dump function for modem remoteproc: qcom: q6v5-pil: Register segments/dumpfn for coredump remoteproc: qcom: q6v5-pil: Assign the relocated address drivers/remoteproc/qcom_q6v5_pil.c | 307 ++- drivers/remoteproc/remoteproc_core.c | 52 - include/linux/remoteproc.h | 8 + 3 files changed, 264 insertions(+), 103 deletions(-) -- The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project
[PATCH v3 4/6] remoteproc: qcom: q6v5-pil: Add custom dump function for modem
The per segment dump function is responsible for loading the mba
before device memory segments associated with coredump can be populated
and for cleaning up the resources post coredump.
Signed-off-by: Sibi Sankar
---
drivers/remoteproc/qcom_q6v5_pil.c | 25 +
1 file changed, 25 insertions(+)
diff --git a/drivers/remoteproc/qcom_q6v5_pil.c
b/drivers/remoteproc/qcom_q6v5_pil.c
index eacf9f0bf49e..ac3342f9ea5a 100644
--- a/drivers/remoteproc/qcom_q6v5_pil.c
+++ b/drivers/remoteproc/qcom_q6v5_pil.c
@@ -182,6 +182,7 @@ struct q6v5 {
struct qcom_sysmon *sysmon;
bool need_mem_protection;
bool has_alt_reset;
+ u32 valid_mask;
int mpss_perm;
int mba_perm;
int version;
@@ -924,6 +925,30 @@ static int q6v5_mpss_load(struct q6v5 *qproc)
return ret < 0 ? ret : 0;
}
+static void qcom_q6v5_dump_segment(struct rproc *rproc, void *ptr, size_t len,
+ void *priv)
+{
+ int ret = 0;
+ struct q6v5 *qproc = (struct q6v5 *)rproc->priv;
+ static u32 pending_mask;
+
+ /* Unlock mba before copying segments */
+ if (!qproc->mba_loaded)
+ ret = q6v5_mba_load(qproc);
+
+ if (!ptr || ret)
+ memset(priv, 0xff, len);
+ else
+ memcpy(priv, ptr, len);
+
+ pending_mask++;
+ if (pending_mask == qproc->valid_mask) {
+ if (qproc->mba_loaded)
+ q6v5_mba_reclaim(qproc);
+ pending_mask = 0;
+ }
+}
+
static int q6v5_start(struct rproc *rproc)
{
struct q6v5 *qproc = (struct q6v5 *)rproc->priv;
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project
[PATCH v3 6/6] remoteproc: qcom: q6v5-pil: Assign the relocated address
Assign the relocated base of the modem image, as the offsets
from the virtual memory might not be based on the physical
address.
Signed-off-by: Sibi Sankar
---
drivers/remoteproc/qcom_q6v5_pil.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/remoteproc/qcom_q6v5_pil.c
b/drivers/remoteproc/qcom_q6v5_pil.c
index 22bb049c3e7f..b1296d614b8b 100644
--- a/drivers/remoteproc/qcom_q6v5_pil.c
+++ b/drivers/remoteproc/qcom_q6v5_pil.c
@@ -862,6 +862,7 @@ static int q6v5_mpss_load(struct q6v5 *qproc)
}
mpss_reloc = relocate ? min_addr : qproc->mpss_phys;
+ qproc->mpss_reloc = mpss_reloc;
/* Load firmware segments */
for (i = 0; i < ehdr->e_phnum; i++) {
phdr = &phdrs[i];
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project
[PATCH 1/4] dt-bindings: reset: Add PDC reset binding for SDM845 SoCs
Add SDM845 PDC (Power Domain Controller) reset controller binding
Signed-off-by: Sibi Sankar
---
.../bindings/reset/qcom,pdc-reset.txt | 52 +++
include/dt-bindings/reset/qcom,sdm845-pdc.h | 20 +++
2 files changed, 72 insertions(+)
create mode 100644 Documentation/devicetree/bindings/reset/qcom,pdc-reset.txt
create mode 100644 include/dt-bindings/reset/qcom,sdm845-pdc.h
diff --git a/Documentation/devicetree/bindings/reset/qcom,pdc-reset.txt
b/Documentation/devicetree/bindings/reset/qcom,pdc-reset.txt
new file mode 100644
index ..85e159962e08
--- /dev/null
+++ b/Documentation/devicetree/bindings/reset/qcom,pdc-reset.txt
@@ -0,0 +1,52 @@
+PDC Reset Controller
+==
+
+This binding describes a reset-controller found on PDC-Global(Power Domain
+Controller) block for Qualcomm Technologies Inc SDM845 SoCs.
+
+Required properties:
+- compatible:
+ Usage: required
+ Value type:
+ Definition: must be:
+ "qcom,sdm845-pdc-global"
+
+- reg:
+ Usage: required
+ Value type:
+ Definition: must specify the base address and size of the register
+ space.
+
+- #reset-cells:
+ Usage: required
+ Value type:
+ Definition: must be 1; cell entry represents the reset index.
+
+Example:
+
+pdc_reset: reset-controller@b2e {
+ compatible = "qcom,sdm845-pdc-global";
+ reg = <0xb2e 0x2>;
+ #reset-cells = <1>;
+};
+
+PDC reset clients
+==
+
+Device nodes that need access to reset lines should
+specify them as a reset phandle in their corresponding node as
+specified in reset.txt.
+
+For list of all valid reset indicies see
+
+
+Example:
+
+modem-pil@408 {
+ ...
+
+ resets = <&pdc_reset PDC_MODEM_SYNC_RESET>;
+ reset-names = "pdc_restart";
+
+ ...
+};
diff --git a/include/dt-bindings/reset/qcom,sdm845-pdc.h
b/include/dt-bindings/reset/qcom,sdm845-pdc.h
new file mode 100644
index ..53c37f9c319a
--- /dev/null
+++ b/include/dt-bindings/reset/qcom,sdm845-pdc.h
@@ -0,0 +1,20 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2018 The Linux Foundation. All rights reserved.
+ */
+
+#ifndef _DT_BINDINGS_RESET_PDC_SDM_845_H
+#define _DT_BINDINGS_RESET_PDC_SDM_845_H
+
+#define PDC_APPS_SYNC_RESET0
+#define PDC_SP_SYNC_RESET 1
+#define PDC_AUDIO_SYNC_RESET 2
+#define PDC_SENSORS_SYNC_RESET 3
+#define PDC_AOP_SYNC_RESET 4
+#define PDC_DEBUG_SYNC_RESET 5
+#define PDC_GPU_SYNC_RESET 6
+#define PDC_DISPLAY_SYNC_RESET 7
+#define PDC_COMPUTE_SYNC_RESET 8
+#define PDC_MODEM_SYNC_RESET 9
+
+#endif
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project
[PATCH 2/4] reset: qcom: PDC (Power Domain Controller) reset controller
Add reset controller for SDM845 SoC to control reset signals
provided by PDC for Modem, Compute, Display, GPU, Debug, AOP,
Sensors, Audio, SP and APPS
Signed-off-by: Sibi Sankar
---
drivers/reset/Kconfig | 9 +++
drivers/reset/Makefile | 1 +
drivers/reset/reset-qcom-pdc.c | 139 +
3 files changed, 149 insertions(+)
create mode 100644 drivers/reset/reset-qcom-pdc.c
diff --git a/drivers/reset/Kconfig b/drivers/reset/Kconfig
index 13d28fdbdbb5..5344e202a630 100644
--- a/drivers/reset/Kconfig
+++ b/drivers/reset/Kconfig
@@ -98,6 +98,15 @@ config RESET_QCOM_AOSS
reset signals provided by AOSS for Modem, Venus, ADSP,
GPU, Camera, Wireless, Display subsystem. Otherwise, say N.
+config RESET_QCOM_PDC
+ bool "Qcom PDC Reset Driver"
+ depends on ARCH_QCOM || COMPILE_TEST
+ help
+ This enables the PDC (Power Domain Controller) reset driver
+ for Qualcomm Technologies Inc SDM845 SoCs. Say Y if you want
+ to control reset signals provided by PDC for Modem, Compute,
+ Display, GPU, Debug, AOP, Sensors, Audio, SP and APPS.
+
config RESET_SIMPLE
bool "Simple Reset Controller Driver" if COMPILE_TEST
default ARCH_SOCFPGA || ARCH_STM32 || ARCH_STRATIX10 || ARCH_SUNXI ||
ARCH_ZX || ARCH_ASPEED
diff --git a/drivers/reset/Makefile b/drivers/reset/Makefile
index 4243c38228e2..d08e8b90046a 100644
--- a/drivers/reset/Makefile
+++ b/drivers/reset/Makefile
@@ -16,6 +16,7 @@ obj-$(CONFIG_RESET_MESON_AUDIO_ARB) += reset-meson-audio-arb.o
obj-$(CONFIG_RESET_OXNAS) += reset-oxnas.o
obj-$(CONFIG_RESET_PISTACHIO) += reset-pistachio.o
obj-$(CONFIG_RESET_QCOM_AOSS) += reset-qcom-aoss.o
+obj-$(CONFIG_RESET_QCOM_PDC) += reset-qcom-pdc.o
obj-$(CONFIG_RESET_SIMPLE) += reset-simple.o
obj-$(CONFIG_RESET_STM32MP157) += reset-stm32mp1.o
obj-$(CONFIG_RESET_SUNXI) += reset-sunxi.o
diff --git a/drivers/reset/reset-qcom-pdc.c b/drivers/reset/reset-qcom-pdc.c
new file mode 100644
index ..64a0041e3452
--- /dev/null
+++ b/drivers/reset/reset-qcom-pdc.c
@@ -0,0 +1,139 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2018 The Linux Foundation. All rights reserved.
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+
+struct qcom_pdc_reset_map {
+ u8 bit;
+};
+
+struct qcom_pdc_desc {
+ const struct regmap_config *config;
+ const struct qcom_pdc_reset_map *resets;
+ size_t num_resets;
+};
+
+struct qcom_pdc_reset_data {
+ struct reset_controller_dev rcdev;
+ struct regmap *regmap;
+ const struct qcom_pdc_desc *desc;
+};
+
+static const struct regmap_config sdm845_pdc_regmap_config = {
+ .name = "pdc-reset",
+ .reg_bits = 32,
+ .reg_stride = 4,
+ .val_bits = 32,
+ .max_register = 0x2,
+ .fast_io= true,
+};
+
+static const struct qcom_pdc_reset_map sdm845_pdc_resets[] = {
+ [PDC_APPS_SYNC_RESET] = {0},
+ [PDC_SP_SYNC_RESET] = {1},
+ [PDC_AUDIO_SYNC_RESET] = {2},
+ [PDC_SENSORS_SYNC_RESET] = {3},
+ [PDC_AOP_SYNC_RESET] = {4},
+ [PDC_DEBUG_SYNC_RESET] = {5},
+ [PDC_GPU_SYNC_RESET] = {6},
+ [PDC_DISPLAY_SYNC_RESET] = {7},
+ [PDC_COMPUTE_SYNC_RESET] = {8},
+ [PDC_MODEM_SYNC_RESET] = {9},
+};
+
+static const struct qcom_pdc_desc sdm845_pdc_desc = {
+ .config = &sdm845_pdc_regmap_config,
+ .resets = sdm845_pdc_resets,
+ .num_resets = ARRAY_SIZE(sdm845_pdc_resets),
+};
+
+static inline struct qcom_pdc_reset_data *to_qcom_pdc_reset_data(
+ struct reset_controller_dev *rcdev)
+{
+ return container_of(rcdev, struct qcom_pdc_reset_data, rcdev);
+}
+
+static int qcom_pdc_control_assert(struct reset_controller_dev *rcdev,
+ unsigned long idx)
+{
+ struct qcom_pdc_reset_data *data = to_qcom_pdc_reset_data(rcdev);
+ const struct qcom_pdc_reset_map *map = &data->desc->resets[idx];
+
+ return regmap_update_bits(data->regmap, 0x100,
+ BIT(map->bit), BIT(map->bit));
+}
+
+static int qcom_pdc_control_deassert(struct reset_controller_dev *rcdev,
+ unsigned long idx)
+{
+ struct qcom_pdc_reset_data *data = to_qcom_pdc_reset_data(rcdev);
+ const struct qcom_pdc_reset_map *map = &data->desc->resets[idx];
+
+ return regmap_update_bits(data->regmap, 0x100, BIT(map->bit), 0);
+}
+
+static const struct reset_control_ops qcom_pdc_reset_ops = {
+ .assert = qcom_pdc_control_assert,
+ .deassert = qcom_pdc_control_deassert,
+};
+
+static int qcom_pdc_reset_probe(struct platform_device *pdev)
+{
+ struct qcom_pdc_reset_data *data;
+ struct device *dev = &pdev->dev;
+ const struct qcom_pdc_desc *de
[PATCH 3/4] remoteproc: qcom: q6v5-pil: Explicitly get mss_restart line
Explicitly get mss_restart to facilitate adding PDC
restart line for modem on SDM845 SoCs
Signed-off-by: Sibi Sankar
---
drivers/remoteproc/qcom_q6v5_pil.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/drivers/remoteproc/qcom_q6v5_pil.c
b/drivers/remoteproc/qcom_q6v5_pil.c
index b1296d614b8b..d57fdb34e3dd 100644
--- a/drivers/remoteproc/qcom_q6v5_pil.c
+++ b/drivers/remoteproc/qcom_q6v5_pil.c
@@ -1176,8 +1176,7 @@ static int q6v5_init_clocks(struct device *dev, struct
clk **clks,
static int q6v5_init_reset(struct q6v5 *qproc)
{
- qproc->mss_restart = devm_reset_control_get_exclusive(qproc->dev,
- NULL);
+ qproc->mss_restart = devm_reset_control_get(qproc->dev, "mss_restart");
if (IS_ERR(qproc->mss_restart)) {
dev_err(qproc->dev, "failed to acquire mss restart\n");
return PTR_ERR(qproc->mss_restart);
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project
[PATCH 4/4] remoteproc: qcom: q6v5-pil: Add PDC restart for modem on SDM845 SoCs
In the presence of a PDC block working with subsystem RSC,
assert/deassert PDC restart in modem start/stop path.
Signed-off-by: Sibi Sankar
---
.../bindings/remoteproc/qcom,q6v5.txt | 4 +++
drivers/remoteproc/qcom_q6v5_pil.c| 27 ---
2 files changed, 27 insertions(+), 4 deletions(-)
diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt
b/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt
index 601dd9f389aa..124fb1dc6fb8 100644
--- a/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt
+++ b/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt
@@ -51,6 +51,8 @@ on the Qualcomm Hexagon core.
Usage: required
Value type:
Definition: reference to the reset-controller for the modem sub-system
+ reference to the list of 2 reset-controllers for the modem
+ sub-system on SDM845 SoCs
reference to the list of 3 reset-controllers for the
wcss sub-system
@@ -58,6 +60,8 @@ on the Qualcomm Hexagon core.
Usage: required
Value type:
Definition: must be "mss_restart" for the modem sub-system
+ Definition: must be "mss_restart", "pdc_restart" for the modem
+ sub-system on SDM845 SoCs
Definition: must be "wcss_aon_reset", "wcss_reset", "wcss_q6_reset"
for the wcss syb-system
diff --git a/drivers/remoteproc/qcom_q6v5_pil.c
b/drivers/remoteproc/qcom_q6v5_pil.c
index d57fdb34e3dd..5be794639fc3 100644
--- a/drivers/remoteproc/qcom_q6v5_pil.c
+++ b/drivers/remoteproc/qcom_q6v5_pil.c
@@ -149,6 +149,7 @@ struct q6v5 {
u32 halt_nc;
struct reset_control *mss_restart;
+ struct reset_control *pdc_restart;
struct qcom_q6v5 q6v5;
@@ -349,10 +350,17 @@ static int q6v5_load(struct rproc *rproc, const struct
firmware *fw)
static int q6v5_reset_assert(struct q6v5 *qproc)
{
- if (qproc->has_alt_reset)
- return reset_control_reset(qproc->mss_restart);
- else
- return reset_control_assert(qproc->mss_restart);
+ int ret;
+
+ if (qproc->has_alt_reset) {
+ reset_control_assert(qproc->pdc_restart);
+ ret = reset_control_reset(qproc->mss_restart);
+ reset_control_deassert(qproc->pdc_restart);
+ } else {
+ ret = reset_control_assert(qproc->mss_restart);
+ }
+
+ return ret;
}
static int q6v5_reset_deassert(struct q6v5 *qproc)
@@ -360,9 +368,11 @@ static int q6v5_reset_deassert(struct q6v5 *qproc)
int ret;
if (qproc->has_alt_reset) {
+ reset_control_assert(qproc->pdc_restart);
writel(1, qproc->rmb_base + RMB_MBA_ALT_RESET);
ret = reset_control_reset(qproc->mss_restart);
writel(0, qproc->rmb_base + RMB_MBA_ALT_RESET);
+ reset_control_deassert(qproc->pdc_restart);
} else {
ret = reset_control_deassert(qproc->mss_restart);
}
@@ -1182,6 +1192,15 @@ static int q6v5_init_reset(struct q6v5 *qproc)
return PTR_ERR(qproc->mss_restart);
}
+ if (qproc->has_alt_reset) {
+ qproc->pdc_restart = devm_reset_control_get(qproc->dev,
+ "pdc_restart");
+ if (IS_ERR(qproc->pdc_restart)) {
+ dev_err(qproc->dev, "failed to acquire pdc restart\n");
+ return PTR_ERR(qproc->pdc_restart);
+ }
+ }
+
return 0;
}
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project
Re: [PATCH] remoteproc: qcom: pas: Add QCS404 remoteprocs
On 2018-09-26 05:05, Bjorn Andersson wrote:
On Tue 25 Sep 03:18 PDT 2018, Sibi Sankar wrote:
On 2018-09-20 22:52, Bjorn Andersson wrote:
> diff --git a/drivers/remoteproc/qcom_adsp_pil.c
> b/drivers/remoteproc/qcom_adsp_pil.c
> index da2254ea1135..fcbb816a9698 100644
> --- a/drivers/remoteproc/qcom_adsp_pil.c
> +++ b/drivers/remoteproc/qcom_adsp_pil.c
> @@ -362,10 +362,22 @@ static const struct adsp_data slpi_resource_init =
> {
>.ssctl_id = 0x16,
> };
>
> +static const struct adsp_data wcss_resource_init = {
> + .crash_reason_smem = 421,
> + .firmware_name = "wcnss.mdt",
> + .pas_id = 6,
> + .ssr_name = "mpss",
> + .sysmon_name = "wlan",
Shouldn't the sysmon name be "wcnss" instead of "wlan"?
I derived this from the downstream kernel, perhaps I got it wrong?
I could see that the label is "wcnss" and glink-label is "mpss"
downstream.
Regards,
Bjorn
--
-- Sibi Sankar --
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project.
Re: [PATCH v2] remoteproc: qcom: pas: Add QCS404 remoteprocs
On 2018-09-28 00:33, Bjorn Andersson wrote:
Add compatibles for the three PAS based remote processors found in
QCS404.
Signed-off-by: Bjorn Andersson
---
Reviewed-by: Sibi Sankar
Changes since v1:
- Fixed incorrect sysmon_name, as pointed out by Sibi.
.../devicetree/bindings/remoteproc/qcom,adsp.txt | 3 +++
drivers/remoteproc/qcom_adsp_pil.c | 12
2 files changed, 15 insertions(+)
diff --git
a/Documentation/devicetree/bindings/remoteproc/qcom,adsp.txt
b/Documentation/devicetree/bindings/remoteproc/qcom,adsp.txt
index b7d058228185..9c0cff3a5ed8 100644
--- a/Documentation/devicetree/bindings/remoteproc/qcom,adsp.txt
+++ b/Documentation/devicetree/bindings/remoteproc/qcom,adsp.txt
@@ -10,6 +10,9 @@ on the Qualcomm ADSP Hexagon core.
"qcom,msm8974-adsp-pil"
"qcom,msm8996-adsp-pil"
"qcom,msm8996-slpi-pil"
+ "qcom,qcs404-adsp-pas"
+ "qcom,qcs404-cdsp-pas"
+ "qcom,qcs404-wcss-pas"
"qcom,sdm845-adsp-pas"
"qcom,sdm845-cdsp-pas"
diff --git a/drivers/remoteproc/qcom_adsp_pil.c
b/drivers/remoteproc/qcom_adsp_pil.c
index da2254ea1135..d5e58235e83a 100644
--- a/drivers/remoteproc/qcom_adsp_pil.c
+++ b/drivers/remoteproc/qcom_adsp_pil.c
@@ -362,10 +362,22 @@ static const struct adsp_data slpi_resource_init
= {
.ssctl_id = 0x16,
};
+static const struct adsp_data wcss_resource_init = {
+ .crash_reason_smem = 421,
+ .firmware_name = "wcnss.mdt",
+ .pas_id = 6,
+ .ssr_name = "mpss",
+ .sysmon_name = "wcnss",
+ .ssctl_id = 0x12,
+};
+
static const struct of_device_id adsp_of_match[] = {
{ .compatible = "qcom,msm8974-adsp-pil", .data =
&adsp_resource_init},
{ .compatible = "qcom,msm8996-adsp-pil", .data =
&adsp_resource_init},
{ .compatible = "qcom,msm8996-slpi-pil", .data =
&slpi_resource_init},
+ { .compatible = "qcom,qcs404-adsp-pas", .data = &adsp_resource_init
},
+ { .compatible = "qcom,qcs404-cdsp-pas", .data = &cdsp_resource_init
},
+ { .compatible = "qcom,qcs404-wcss-pas", .data = &wcss_resource_init
},
{ .compatible = "qcom,sdm845-adsp-pas", .data = &adsp_resource_init},
{ .compatible = "qcom,sdm845-cdsp-pas", .data = &cdsp_resource_init},
{ },
--
-- Sibi Sankar --
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project.
[PATCH] arm64: dts: qcom: sdm845: Add Q6V5 MSS node
This patch adds Q6V5 MSS remoteproc node for SDM845 SoCs.
Signed-off-by: Sibi Sankar
---
The remoteproc mss node depends on the following bindings:
https://patchwork.kernel.org/patch/10490559/ - rpmhp dt bindings
https://patchwork.kernel.org/patch/10678301/ - AOP QMP dt bindings
https://patchwork.kernel.org/patch/10691215/ - mss power-domain dt bindings
https://patchwork.kernel.org/patch/10691213/ - shutdown-ack dt bindings
It also depends on the mpss and mba memory regions and pdc reset node.
https://patchwork.kernel.org/patch/10662089/
https://patchwork.kernel.org/patch/10657325/
arch/arm64/boot/dts/qcom/sdm845.dtsi | 63
1 file changed, 63 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi
b/arch/arm64/boot/dts/qcom/sdm845.dtsi
index 58870273dbc9..df16ee464872 100644
--- a/arch/arm64/boot/dts/qcom/sdm845.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi
@@ -1095,6 +1095,69 @@
};
};
+ remoteproc@408 {
+ compatible = "qcom,sdm845-mss-pil";
+ reg = <0x0408 0x408>, <0x0418 0x48>;
+
+ reg-names = "qdsp6", "rmb";
+
+ interrupts-extended =
+ <&intc GIC_SPI 266 IRQ_TYPE_EDGE_RISING>,
+ <&modem_smp2p_in 0 IRQ_TYPE_EDGE_RISING>,
+ <&modem_smp2p_in 1 IRQ_TYPE_EDGE_RISING>,
+ <&modem_smp2p_in 2 IRQ_TYPE_EDGE_RISING>,
+ <&modem_smp2p_in 3 IRQ_TYPE_EDGE_RISING>,
+ <&modem_smp2p_in 7 IRQ_TYPE_EDGE_RISING>;
+
+ interrupt-names = "wdog", "fatal", "ready",
+ "handover", "stop-ack",
+ "shutdown-ack";
+
+ clocks = <&gcc GCC_MSS_CFG_AHB_CLK>,
+<&gcc GCC_MSS_Q6_MEMNOC_AXI_CLK>,
+<&gcc GCC_BOOT_ROM_AHB_CLK>,
+<&gcc GCC_MSS_GPLL0_DIV_CLK_SRC>,
+<&gcc GCC_MSS_SNOC_AXI_CLK>,
+<&gcc GCC_MSS_MFAB_AXIS_CLK>,
+<&gcc GCC_PRNG_AHB_CLK>,
+<&rpmhcc RPMH_CXO_CLK>;
+
+ clock-names = "iface", "bus", "mem", "gpll0_mss",
+ "snoc_axi", "mnoc_axi", "prng", "xo";
+
+ qcom,smem-states = <&modem_smp2p_out 0>;
+ qcom,smem-state-names = "stop";
+
+ resets = <&aoss_reset AOSS_CC_MSS_RESTART>,
+<&pdc_reset PDC_MODEM_SYNC_RESET>;
+ reset-names = "mss_restart", "pdc_reset";
+
+ qcom,halt-regs = <&tcsr_mutex_regs
+ 0x23000 0x25000 0x24000>;
+
+ power-domains = <&aoss_qmp_pd AOSS_QMP_LS_MODEM>,
+ <&rpmhpd SDM845_CX>,
+ <&rpmhpd SDM845_MX>,
+ <&rpmhpd SDM845_MSS>;
+ power-domain-names = "aop", "cx", "mx", "mss";
+
+ mba {
+ memory-region = <&mba_region>;
+ };
+
+ mpss {
+ memory-region = <&mpss_region>;
+ };
+
+ glink-edge {
+ interrupts = ;
+ label = "modem";
+ qcom,remote-pid = <1>;
+ mboxes = <&apss_shared 12>;
+ mbox-names = "mpss_smem";
+ };
+ };
+
usb_1_hsphy: phy@88e2000 {
compatible = "qcom,sdm845-qusb2-phy";
reg = <0x88e2000 0x400>;
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project
[PATCH 1/2] dt-bindings: remoteproc: qcom: Add shutdown-ack irq for Q6v5
Add optional shutdown-irq binding required for sysmon shutdown on SDM845/MSM8996/QCS404 SoCs. Signed-off-by: Sibi Sankar --- Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt b/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt index 9ff5b0309417..14947562bc67 100644 --- a/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt +++ b/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt @@ -29,12 +29,13 @@ on the Qualcomm Hexagon core. Usage: required Value type: Definition: must list the watchdog, fatal IRQs ready, handover and - stop-ack IRQs + stop-ack IRQs and may optionally list shutdown-ack IRQ - interrupt-names: Usage: required Value type: - Definition: must be "wdog", "fatal", "ready", "handover", "stop-ack" + Definition: must be "wdog", "fatal", "ready", "handover", "stop-ack", + "shutdown-ack" - clocks: Usage: required -- The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project
[PATCH 2/2] remoteproc: sysmon: Wait for shutdown-ack/ind on sysmon shutdown
After sending a sysmon shutdown request to the SSCTL service on the
subsystem, wait for the service to send shutdown-ack interrupt or
an indication message back.
Signed-off-by: Sibi Sankar
---
drivers/remoteproc/qcom_sysmon.c | 59 +++-
1 file changed, 58 insertions(+), 1 deletion(-)
diff --git a/drivers/remoteproc/qcom_sysmon.c b/drivers/remoteproc/qcom_sysmon.c
index e976a602b015..a545181341d1 100644
--- a/drivers/remoteproc/qcom_sysmon.c
+++ b/drivers/remoteproc/qcom_sysmon.c
@@ -3,6 +3,7 @@
* Copyright (c) 2017, Linaro Ltd.
*/
#include
+#include
#include
#include
#include
@@ -25,6 +26,7 @@ struct qcom_sysmon {
const char *name;
+ int shutdown_irq;
int ssctl_version;
int ssctl_instance;
@@ -34,6 +36,7 @@ struct qcom_sysmon {
struct rpmsg_endpoint *ept;
struct completion comp;
+ struct completion shutdown_comp;
struct mutex lock;
bool ssr_ack;
@@ -137,6 +140,7 @@ static int sysmon_callback(struct rpmsg_device *rpdev, void
*data, int count,
}
#define SSCTL_SHUTDOWN_REQ 0x21
+#define SSCTL_SHUTDOWN_READY_IND 0x21
#define SSCTL_SUBSYS_EVENT_REQ 0x23
#define SSCTL_MAX_MSG_LEN 7
@@ -252,6 +256,29 @@ static struct qmi_elem_info ssctl_subsys_event_resp_ei[] =
{
{}
};
+static struct qmi_elem_info ssctl_shutdown_ind_ei[] = {
+ {}
+};
+
+static void sysmon_ind_cb(struct qmi_handle *qmi, struct sockaddr_qrtr *sq,
+ struct qmi_txn *txn, const void *data)
+{
+ struct qcom_sysmon *sysmon = container_of(qmi, struct qcom_sysmon, qmi);
+
+ complete(&sysmon->shutdown_comp);
+}
+
+static struct qmi_msg_handler qmi_indication_handler[] = {
+ {
+ .type = QMI_INDICATION,
+ .msg_id = SSCTL_SHUTDOWN_READY_IND,
+ .ei = ssctl_shutdown_ind_ei,
+ .decoded_size = 0,
+ .fn = sysmon_ind_cb
+ },
+ {}
+};
+
/**
* ssctl_request_shutdown() - request shutdown via SSCTL QMI service
* @sysmon:sysmon context
@@ -262,6 +289,7 @@ static void ssctl_request_shutdown(struct qcom_sysmon
*sysmon)
struct qmi_txn txn;
int ret;
+ reinit_completion(&sysmon->shutdown_comp);
ret = qmi_txn_init(&sysmon->qmi, &txn, ssctl_shutdown_resp_ei, &resp);
if (ret < 0) {
dev_err(sysmon->dev, "failed to allocate QMI txn\n");
@@ -283,6 +311,14 @@ static void ssctl_request_shutdown(struct qcom_sysmon
*sysmon)
dev_err(sysmon->dev, "shutdown request failed\n");
else
dev_dbg(sysmon->dev, "shutdown request completed\n");
+
+ if (sysmon->shutdown_irq > 0) {
+ ret = wait_for_completion_timeout(&sysmon->shutdown_comp,
+ msecs_to_jiffies(5000));
+ if (!ret)
+ dev_err(sysmon->dev,
+ "timeout waiting for shutdown ack\n");
+ }
}
/**
@@ -432,6 +468,15 @@ static int sysmon_notify(struct notifier_block *nb,
unsigned long event,
return NOTIFY_DONE;
}
+static irqreturn_t sysmon_shutdown_interrupt(int irq, void *data)
+{
+ struct qcom_sysmon *sysmon = data;
+
+ complete(&sysmon->shutdown_comp);
+
+ return IRQ_HANDLED;
+}
+
/**
* qcom_add_sysmon_subdev() - create a sysmon subdev for the given remoteproc
* @rproc: rproc context to associate the subdev with
@@ -445,6 +490,7 @@ struct qcom_sysmon *qcom_add_sysmon_subdev(struct rproc
*rproc,
int ssctl_instance)
{
struct qcom_sysmon *sysmon;
+ struct platform_device *pdev;
int ret;
sysmon = kzalloc(sizeof(*sysmon), GFP_KERNEL);
@@ -453,14 +499,25 @@ struct qcom_sysmon *qcom_add_sysmon_subdev(struct rproc
*rproc,
sysmon->dev = rproc->dev.parent;
sysmon->rproc = rproc;
+ pdev = container_of(sysmon->dev, struct platform_device, dev);
sysmon->name = name;
sysmon->ssctl_instance = ssctl_instance;
init_completion(&sysmon->comp);
+ init_completion(&sysmon->shutdown_comp);
mutex_init(&sysmon->lock);
- ret = qmi_handle_init(&sysmon->qmi, SSCTL_MAX_MSG_LEN, &ssctl_ops,
NULL);
+ sysmon->shutdown_irq = platform_get_irq_byname(pdev, "shutdown-ack");
+ ret = devm_request_threaded_irq(sysmon->dev, sysmon->shutdown_irq,
+ NULL, sysmon_shutdown_interrupt,
+ IRQF_TRIGGER_RISING | IRQF_ONESHOT,
+ "q6v5 shutdown-ack", sysmon);
+ if (ret)
+ dev_err(sysmon->dev, "failed to acquire shutdown-
[PATCH] dt-bindings: remoteproc: qcom: Add power-domain bindings for Q6V5
Add power-domain bindings for Q6V5 MSS on SDM845 SoCs. Signed-off-by: Sibi Sankar --- Add dt-binding corresponding to https://patchwork.kernel.org/patch/10586893/ (remoteproc: q6v5: Add support to vote for rpmh power domains) .../devicetree/bindings/remoteproc/qcom,q6v5.txt | 11 +++ 1 file changed, 11 insertions(+) diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt b/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt index 14947562bc67..bd9f4882fcf0 100644 --- a/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt +++ b/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt @@ -75,6 +75,17 @@ on the Qualcomm Hexagon core. Definition: reference to the regulators to be held on behalf of the booting of the Hexagon core +- power-domains: + Usage: required + Value type: + Definition: reference to the cx, mx and mss power-domains to be held on + behalf of the booting the Hexagon core + +- power-domain-names: + Usage: required + Value type: + Definition: must be "cx", "mx", "mss" + - qcom,smem-states: Usage: required Value type: -- The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project
Re: [PATCH v5 14/18] arm64: dts: qcom: qcs404: Add remoteproc nodes
Hi Bjorn/Vinod,
On 2018-11-09 15:14, Vinod Koul wrote:
From: Bjorn Andersson
Add the TrustZone based remoteproc nodes and their glink edges for
adsp, cdsp and wcss. Enable them for EVB common DTS.
Signed-off-by: Bjorn Andersson
Signed-off-by: Vinod Koul
---
arch/arm64/boot/dts/qcom/qcs404-evb.dtsi | 12 +
arch/arm64/boot/dts/qcom/qcs404.dtsi | 93
2 files changed, 105 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/qcs404-evb.dtsi
b/arch/arm64/boot/dts/qcom/qcs404-evb.dtsi
index db035fef67d9..a39924efebe4 100644
--- a/arch/arm64/boot/dts/qcom/qcs404-evb.dtsi
+++ b/arch/arm64/boot/dts/qcom/qcs404-evb.dtsi
@@ -21,6 +21,18 @@
};
};
+&remoteproc_adsp {
+ status = "ok";
+};
+
+&remoteproc_cdsp {
+ status = "ok";
+};
+
+&remoteproc_wcss {
+ status = "ok";
+};
+
&rpm_requests {
pms405-regulators {
compatible = "qcom,rpm-pms405-regulators";
diff --git a/arch/arm64/boot/dts/qcom/qcs404.dtsi
b/arch/arm64/boot/dts/qcom/qcs404.dtsi
index 46fce264c8fe..06607419c9d6 100644
--- a/arch/arm64/boot/dts/qcom/qcs404.dtsi
+++ b/arch/arm64/boot/dts/qcom/qcs404.dtsi
@@ -80,6 +80,99 @@
method = "smc";
};
+ remoteproc_adsp: remoteproc-adsp {
+ compatible = "qcom,qcs404-adsp-pas";
+
+ interrupts-extended = <&intc GIC_SPI 293 IRQ_TYPE_EDGE_RISING>,
+ <&adsp_smp2p_in 0 IRQ_TYPE_EDGE_RISING>,
+ <&adsp_smp2p_in 1 IRQ_TYPE_EDGE_RISING>,
+ <&adsp_smp2p_in 2 IRQ_TYPE_EDGE_RISING>,
+ <&adsp_smp2p_in 3 IRQ_TYPE_EDGE_RISING>;
+ interrupt-names = "wdog", "fatal", "ready",
+ "handover", "stop-ack";
+
+ clocks = <&xo_board>;
+ clock-names = "xo";
+
+ memory-region = <&adsp_fw_mem>;
+
+ qcom,smem-states = <&adsp_smp2p_out 0>;
+ qcom,smem-state-names = "stop";
+
+ status = "disabled";
+
+ glink-edge {
+ interrupts = ;
+
+ qcom,remote-pid = <2>;
+ mboxes = <&apcs_glb 8>;
+
+ label = "adsp";
+ };
+ };
+
+ remoteproc_cdsp: remoteproc-cdsp {
+ compatible = "qcom,qcs404-cdsp-pas";
+
+ interrupts-extended = <&intc GIC_SPI 229 IRQ_TYPE_EDGE_RISING>,
+ <&cdsp_smp2p_in 0 IRQ_TYPE_EDGE_RISING>,
+ <&cdsp_smp2p_in 1 IRQ_TYPE_EDGE_RISING>,
+ <&cdsp_smp2p_in 2 IRQ_TYPE_EDGE_RISING>,
+ <&cdsp_smp2p_in 3 IRQ_TYPE_EDGE_RISING>;
+ interrupt-names = "wdog", "fatal", "ready",
+ "handover", "stop-ack";
+
+ clocks = <&xo_board>;
+ clock-names = "xo";
+
+ memory-region = <&cdsp_fw_mem>;
+
+ qcom,smem-states = <&cdsp_smp2p_out 0>;
+ qcom,smem-state-names = "stop";
+
+ status = "disabled";
+
+ glink-edge {
+ interrupts = ;
+
+ qcom,remote-pid = <5>;
+ mboxes = <&apcs_glb 12>;
+
+ label = "cdsp";
+ };
+ };
+
+ remoteproc_wcss: remoteproc-wcss {
+ compatible = "qcom,qcs404-wcss-pas";
+
+ interrupts-extended = <&intc GIC_SPI 153 IRQ_TYPE_EDGE_RISING>,
+ <&wcss_smp2p_in 0 IRQ_TYPE_EDGE_RISING>,
+ <&wcss_smp2p_in 1 IRQ_TYPE_EDGE_RISING>,
+ <&wcss_smp2p_in 2 IRQ_TYPE_EDGE_RISING>,
+ <&wcss_smp2p_in 3 IRQ_TYPE_EDGE_RISING>;
+ interrupt-names = "wdog", "fatal", "ready",
+ "handover", "stop-ack";
I can see that wcss remoteproc uses an additional smp2p interrupt called
shutdown-ack
downstream you may want to skip wcss entry for now till the shutdown-ack
gets posted,
reviewed and merged.
+
+ clocks = <&xo_board>;
+ clock-names = "xo";
+
+ memory-region = <&
Re: [PATCH] dt-bindings: remoteproc: qcom: Add power-domain bindings for Q6V5
Hi Bjorn, Thanks for the review! On 2018-12-06 22:28, Bjorn Andersson wrote: On Tue 20 Nov 13:08 PST 2018, Sibi Sankar wrote: Add power-domain bindings for Q6V5 MSS on SDM845 SoCs. Thanks Sibi, Signed-off-by: Sibi Sankar --- Add dt-binding corresponding to https://patchwork.kernel.org/patch/10586893/ (remoteproc: q6v5: Add support to vote for rpmh power domains) .../devicetree/bindings/remoteproc/qcom,q6v5.txt | 11 +++ 1 file changed, 11 insertions(+) diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt b/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt index 14947562bc67..bd9f4882fcf0 100644 --- a/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt +++ b/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt @@ -75,6 +75,17 @@ on the Qualcomm Hexagon core. Definition: reference to the regulators to be held on behalf of the booting of the Hexagon core +- power-domains: + Usage: required + Value type: + Definition: reference to the cx, mx and mss power-domains to be held on + behalf of the booting the Hexagon core This should mention that these are the domains for SDM845, as the list seems to differ somewhat between platforms. Please also define the requirements for MSM8996 (cx & mx) here, while you're at it. Let's also make sure it includes the "load_state", for SDM845. I'll list the power domains per SoC in the next respin Regards, Bjorn + +- power-domain-names: + Usage: required + Value type: + Definition: must be "cx", "mx", "mss" + - qcom,smem-states: Usage: required Value type: -- The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project -- -- Sibi Sankar -- Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, a Linux Foundation Collaborative Project.
[PATCH] remoteproc: qcom: q6v5-pil: fix modem hang on SDM845 after axis2 clk unvote
GCC_MSS_AXIS2 clock is used for disabling boot IMEM (a part of
AP boot up). With Boot IMEM disable now a part TZ/ATF, AXIS2
clock is no longer required post AP boot up and expected to
remain untouched. However if the clock is turned ON after Q6
is brought out of reset and later turned off, it results in
modem hang. When Q6 attempts a power collapse the internal
handshaking to check if AXIS2 is idle never goes through since
it is turned off preventing the RSC from getting triggered,
leaving modem in a funky state. Hence removing AXIS2 clk
enable/disable from the driver.
[bjorn: identified unvoting axis2 clk caused modem hang]
Signed-off-by: Sibi Sankar
---
drivers/remoteproc/qcom_q6v5_pil.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/drivers/remoteproc/qcom_q6v5_pil.c
b/drivers/remoteproc/qcom_q6v5_pil.c
index e04319573c91..d7a4b9eca5d2 100644
--- a/drivers/remoteproc/qcom_q6v5_pil.c
+++ b/drivers/remoteproc/qcom_q6v5_pil.c
@@ -1243,7 +1243,6 @@ static const struct rproc_hexagon_res sdm845_mss = {
.hexagon_mba_image = "mba.mbn",
.proxy_clk_names = (char*[]){
"xo",
- "axis2",
"prng",
NULL
},
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project
[PATCH v6 1/8] dt-bindings: reset: Add AOSS reset bindings for SDM845 SoCs
Add SDM845 AOSS (always on subsystem) reset controller binding
Signed-off-by: Sibi Sankar
---
Not including Rob's earlier Reviewed-by due to change in compatible
.../bindings/reset/qcom,aoss-reset.txt| 52 +++
include/dt-bindings/reset/qcom,sdm845-aoss.h | 17 ++
2 files changed, 69 insertions(+)
create mode 100644 Documentation/devicetree/bindings/reset/qcom,aoss-reset.txt
create mode 100644 include/dt-bindings/reset/qcom,sdm845-aoss.h
diff --git a/Documentation/devicetree/bindings/reset/qcom,aoss-reset.txt
b/Documentation/devicetree/bindings/reset/qcom,aoss-reset.txt
new file mode 100644
index ..510c748656ec
--- /dev/null
+++ b/Documentation/devicetree/bindings/reset/qcom,aoss-reset.txt
@@ -0,0 +1,52 @@
+Qualcomm AOSS Reset Controller
+==
+
+This binding describes a reset-controller found on AOSS-CC (always on
subsystem)
+for Qualcomm SDM845 SoCs.
+
+Required properties:
+- compatible:
+ Usage: required
+ Value type:
+ Definition: must be:
+ "qcom,sdm845-aoss-cc"
+
+- reg:
+ Usage: required
+ Value type:
+ Definition: must specify the base address and size of the register
+ space.
+
+- #reset-cells:
+ Usage: required
+ Value type:
+ Definition: must be 1; cell entry represents the reset index.
+
+Example:
+
+aoss_reset: reset-controller@c2a {
+ compatible = "qcom,sdm845-aoss-cc";
+ reg = <0xc2a 0x31000>;
+ #reset-cells = <1>;
+};
+
+Specifying reset lines connected to IP modules
+==
+
+Device nodes that need access to reset lines should
+specify them as a reset phandle in their corresponding node as
+specified in reset.txt.
+
+For list of all valid reset indicies see
+
+
+Example:
+
+modem-pil@408 {
+ ...
+
+ resets = <&aoss_reset AOSS_CC_MSS_RESTART>;
+ reset-names = "mss_restart";
+
+ ...
+};
diff --git a/include/dt-bindings/reset/qcom,sdm845-aoss.h
b/include/dt-bindings/reset/qcom,sdm845-aoss.h
new file mode 100644
index ..476c5fc873b6
--- /dev/null
+++ b/include/dt-bindings/reset/qcom,sdm845-aoss.h
@@ -0,0 +1,17 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2018 The Linux Foundation. All rights reserved.
+ */
+
+#ifndef _DT_BINDINGS_RESET_AOSS_SDM_845_H
+#define _DT_BINDINGS_RESET_AOSS_SDM_845_H
+
+#define AOSS_CC_MSS_RESTART0
+#define AOSS_CC_CAMSS_RESTART 1
+#define AOSS_CC_VENUS_RESTART 2
+#define AOSS_CC_GPU_RESTART3
+#define AOSS_CC_DISPSS_RESTART 4
+#define AOSS_CC_WCSS_RESTART 5
+#define AOSS_CC_LPASS_RESTART 6
+
+#endif
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project
[PATCH v6 2/8] reset: qcom: AOSS (always on subsystem) reset controller
Add reset controller driver for Qualcomm SDM845 SoC to
control reset signals provided by AOSS for Modem, Venus
ADSP, GPU, Camera, Wireless, Display subsystem
Reviewed-by: Bjorn Andersson
Signed-off-by: Sibi Sankar
---
drivers/reset/Kconfig | 9 +++
drivers/reset/Makefile | 1 +
drivers/reset/reset-qcom-aoss.c | 133
3 files changed, 143 insertions(+)
create mode 100644 drivers/reset/reset-qcom-aoss.c
diff --git a/drivers/reset/Kconfig b/drivers/reset/Kconfig
index c0b292be1b72..756ad2b27d0f 100644
--- a/drivers/reset/Kconfig
+++ b/drivers/reset/Kconfig
@@ -82,6 +82,15 @@ config RESET_PISTACHIO
help
This enables the reset driver for ImgTec Pistachio SoCs.
+config RESET_QCOM_AOSS
+ bool "Qcom AOSS Reset Driver"
+ depends on ARCH_QCOM || COMPILE_TEST
+ help
+ This enables the AOSS (always on subsystem) reset driver
+ for Qualcomm SDM845 SoCs. Say Y if you want to control
+ reset signals provided by AOSS for Modem, Venus, ADSP,
+ GPU, Camera, Wireless, Display subsystem. Otherwise, say N.
+
config RESET_SIMPLE
bool "Simple Reset Controller Driver" if COMPILE_TEST
default ARCH_SOCFPGA || ARCH_STM32 || ARCH_STRATIX10 || ARCH_SUNXI ||
ARCH_ZX || ARCH_ASPEED
diff --git a/drivers/reset/Makefile b/drivers/reset/Makefile
index c1261dcfe9ad..6881e4d287f0 100644
--- a/drivers/reset/Makefile
+++ b/drivers/reset/Makefile
@@ -14,6 +14,7 @@ obj-$(CONFIG_RESET_LPC18XX) += reset-lpc18xx.o
obj-$(CONFIG_RESET_MESON) += reset-meson.o
obj-$(CONFIG_RESET_OXNAS) += reset-oxnas.o
obj-$(CONFIG_RESET_PISTACHIO) += reset-pistachio.o
+obj-$(CONFIG_RESET_QCOM_AOSS) += reset-qcom-aoss.o
obj-$(CONFIG_RESET_SIMPLE) += reset-simple.o
obj-$(CONFIG_RESET_STM32MP157) += reset-stm32mp1.o
obj-$(CONFIG_RESET_SUNXI) += reset-sunxi.o
diff --git a/drivers/reset/reset-qcom-aoss.c b/drivers/reset/reset-qcom-aoss.c
new file mode 100644
index ..36db96750450
--- /dev/null
+++ b/drivers/reset/reset-qcom-aoss.c
@@ -0,0 +1,133 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2018 The Linux Foundation. All rights reserved.
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+struct qcom_aoss_reset_map {
+ unsigned int reg;
+};
+
+struct qcom_aoss_desc {
+ const struct qcom_aoss_reset_map *resets;
+ size_t num_resets;
+};
+
+struct qcom_aoss_reset_data {
+ struct reset_controller_dev rcdev;
+ void __iomem *base;
+ const struct qcom_aoss_desc *desc;
+};
+
+static const struct qcom_aoss_reset_map sdm845_aoss_resets[] = {
+ [AOSS_CC_MSS_RESTART] = {0x1},
+ [AOSS_CC_CAMSS_RESTART] = {0x11000},
+ [AOSS_CC_VENUS_RESTART] = {0x12000},
+ [AOSS_CC_GPU_RESTART] = {0x13000},
+ [AOSS_CC_DISPSS_RESTART] = {0x14000},
+ [AOSS_CC_WCSS_RESTART] = {0x2},
+ [AOSS_CC_LPASS_RESTART] = {0x3},
+};
+
+static const struct qcom_aoss_desc sdm845_aoss_desc = {
+ .resets = sdm845_aoss_resets,
+ .num_resets = ARRAY_SIZE(sdm845_aoss_resets),
+};
+
+static inline struct qcom_aoss_reset_data *to_qcom_aoss_reset_data(
+ struct reset_controller_dev *rcdev)
+{
+ return container_of(rcdev, struct qcom_aoss_reset_data, rcdev);
+}
+
+static int qcom_aoss_control_assert(struct reset_controller_dev *rcdev,
+ unsigned long idx)
+{
+ struct qcom_aoss_reset_data *data = to_qcom_aoss_reset_data(rcdev);
+ const struct qcom_aoss_reset_map *map = &data->desc->resets[idx];
+
+ writel(1, data->base + map->reg);
+ /* Wait 6 32kHz sleep cycles for reset */
+ usleep_range(200, 300);
+ return 0;
+}
+
+static int qcom_aoss_control_deassert(struct reset_controller_dev *rcdev,
+ unsigned long idx)
+{
+ struct qcom_aoss_reset_data *data = to_qcom_aoss_reset_data(rcdev);
+ const struct qcom_aoss_reset_map *map = &data->desc->resets[idx];
+
+ writel(0, data->base + map->reg);
+ /* Wait 6 32kHz sleep cycles for reset */
+ usleep_range(200, 300);
+ return 0;
+}
+
+static int qcom_aoss_control_reset(struct reset_controller_dev *rcdev,
+ unsigned long idx)
+{
+ qcom_aoss_control_assert(rcdev, idx);
+
+ return qcom_aoss_control_deassert(rcdev, idx);
+}
+
+static const struct reset_control_ops qcom_aoss_reset_ops = {
+ .reset = qcom_aoss_control_reset,
+ .assert = qcom_aoss_control_assert,
+ .deassert = qcom_aoss_control_deassert,
+};
+
+static int qcom_aoss_reset_probe(struct platform_device *pdev)
+{
+ struct qcom_aoss_reset_data *data;
+ struct device *dev = &pdev->dev;
+ const struct qcom_aoss_desc *desc;
+ struct resource *res;
+
+ desc = of_device_get_match_data(dev);
+
[PATCH] remoteproc: Introduce prepare/unprepare ops for rproc coredump
In some occasions the remoteproc device might need to
prepare some hardware before the coredump can be performed
and cleanup the state afterwards.
Q6V5 modem requires the mba to be loaded before the
coredump and some cleanup of the resources afterwards.
Signed-off-by: Sibi Sankar
---
This patch depends on:
https://patchwork.kernel.org/patch/10363399/
drivers/remoteproc/qcom_q6v5_pil.c | 64
drivers/remoteproc/remoteproc_core.c | 5 ++
drivers/remoteproc/remoteproc_internal.h | 16 ++
include/linux/remoteproc.h | 4 ++
4 files changed, 79 insertions(+), 10 deletions(-)
diff --git a/drivers/remoteproc/qcom_q6v5_pil.c
b/drivers/remoteproc/qcom_q6v5_pil.c
index 1f861b214850..ef643c0aec5f 100644
--- a/drivers/remoteproc/qcom_q6v5_pil.c
+++ b/drivers/remoteproc/qcom_q6v5_pil.c
@@ -160,6 +160,7 @@ struct q6v5 {
struct completion start_done;
struct completion stop_done;
bool running;
+ bool coredump_pending;
phys_addr_t mba_phys;
void *mba_region;
@@ -663,6 +664,7 @@ static int q6v5_mpss_load(struct q6v5 *qproc)
}
mpss_reloc = relocate ? min_addr : qproc->mpss_phys;
+ qproc->mpss_reloc = mpss_reloc;
/* Load firmware segments */
for (i = 0; i < ehdr->e_phnum; i++) {
phdr = &phdrs[i];
@@ -737,7 +739,7 @@ static int q6v5_start(struct rproc *rproc)
qproc->proxy_reg_count);
if (ret) {
dev_err(qproc->dev, "failed to enable proxy supplies\n");
- return ret;
+ goto clear_coredump_pending;
}
ret = q6v5_clk_enable(qproc->dev, qproc->proxy_clks,
@@ -793,6 +795,21 @@ static int q6v5_start(struct rproc *rproc)
goto halt_axi_ports;
}
+ if (qproc->coredump_pending) {
+ dev_info(qproc->dev, "MBA booted, skipping mpss for
coredump\n");
+ qproc->coredump_pending = false;
+ enable_irq(qproc->handover_interrupt);
+ enable_irq(qproc->wdog_interrupt);
+ enable_irq(qproc->fatal_interrupt);
+ xfermemop_ret = q6v5_xfer_mem_ownership(qproc,
+ &qproc->mba_perm, false,
+ qproc->mba_phys,
+ qproc->mba_size);
+ if (xfermemop_ret)
+ dev_err(qproc->dev, "Failed to reclaim mba buffer\n");
+ return 0;
+ }
+
dev_info(qproc->dev, "MBA booted, loading mpss\n");
ret = q6v5_mpss_load(qproc);
@@ -859,6 +876,8 @@ static int q6v5_start(struct rproc *rproc)
disable_proxy_reg:
q6v5_regulator_disable(qproc, qproc->proxy_regs,
qproc->proxy_reg_count);
+clear_coredump_pending:
+ qproc->coredump_pending = false;
return ret;
}
@@ -869,17 +888,19 @@ static int q6v5_stop(struct rproc *rproc)
int ret;
u32 val;
- qproc->running = false;
-
- qcom_smem_state_update_bits(qproc->state,
- BIT(qproc->stop_bit), BIT(qproc->stop_bit));
+ if (qproc->running) {
+ qproc->running = false;
+ qcom_smem_state_update_bits(qproc->state,
+ BIT(qproc->stop_bit), BIT(qproc->stop_bit));
- ret = wait_for_completion_timeout(&qproc->stop_done,
- msecs_to_jiffies(5000));
- if (ret == 0)
- dev_err(qproc->dev, "timed out on wait\n");
+ ret = wait_for_completion_timeout(&qproc->stop_done,
+ msecs_to_jiffies(5000));
+ if (ret == 0)
+ dev_err(qproc->dev, "timed out on wait\n");
- qcom_smem_state_update_bits(qproc->state, BIT(qproc->stop_bit), 0);
+ qcom_smem_state_update_bits(qproc->state,
+ BIT(qproc->stop_bit), 0);
+ }
q6v5proc_halt_axi_port(qproc, qproc->halt_map, qproc->halt_q6);
q6v5proc_halt_axi_port(qproc, qproc->halt_map, qproc->halt_modem);
@@ -930,10 +951,31 @@ static void *q6v5_da_to_va(struct rproc *rproc, u64 da,
int len)
return qproc->mpss_region + offset;
}
+static int qcom_mpss_register_dump_segments(struct rproc *rproc,
+ const struct firmware *fw_unused)
+{
+ const struct firmware *fw;
+ struct q6v5 *qproc = (struct q6v5 *)rproc->priv;
+ int ret;
+
+ ret = request_firmware(&fw, "modem.mdt", qproc->dev);
+ if (ret < 0) {
+ dev_err(qproc->dev, &quo
[PATCH 1/2] dt-bindings: remoteproc: qcom: Add firmware bindings for Q6V5 MSS
Add optional firmware bindings for Q6V5 MSS. It lists the two relative firmware paths which are used for booting and authenticating the Hexagon core. Signed-off-by: Sibi Sankar --- Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt | 7 +++ 1 file changed, 7 insertions(+) diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt b/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt index 9ff5b0309417..1f6988a60636 100644 --- a/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt +++ b/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt @@ -36,6 +36,13 @@ on the Qualcomm Hexagon core. Value type: Definition: must be "wdog", "fatal", "ready", "handover", "stop-ack" +- qcom,firmware: + Usage: optional + Value type: + Definition: must list the 2 relative firmware paths (mba and modem + metadata respectively) which are used for booting and + authenticating the Hexagon core. + - clocks: Usage: required Value type: -- The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project
[PATCH 0/2] Add firmware bindings for Q6V5 MSS
Q6V5 MSS on certain SoCs like SDM845 are capable of operating under
completely different configuration (like Non-Modem WLAN configuration)
depending on the firmware loaded without any change in boot sequence
of the Hexagon core. The patch series is ultimately aimed to avoid
multiple compatibles per SoC to just specify different upstreamed firmware
locations. This is achieved by introducing "qcom,firmware" binding
to store the relative path of mba and modem metadata.
remoteproc@408 {
...
qcom,firmware = "qcom/sdm845/mss/mba.mbn",
"qcom/sdm845/mss/modem.mdt";
...
}
Suggested-by: Bjorn Andersson
SibiSankar (2):
dt-bindings: remoteproc: qcom: Add firmware bindings for Q6V5 MSS
remoteproc: qcom: q6v5-mss: Add support for parsing fw dt bindings
.../bindings/remoteproc/qcom,q6v5.txt | 7 +++
drivers/remoteproc/qcom_q6v5_mss.c| 49 ---
2 files changed, 48 insertions(+), 8 deletions(-)
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project
[PATCH 2/2] remoteproc: qcom: q6v5-mss: Add support for parsing fw dt bindings
Add support for parsing "qcom,firmware" dt bindings which specifies
the relative paths of mba and modem metadata as a list of strings.
Fallback to the default paths for mba/modem on -EINVAL.
Signed-off-by: Sibi Sankar
---
drivers/remoteproc/qcom_q6v5_mss.c | 49 +-
1 file changed, 41 insertions(+), 8 deletions(-)
diff --git a/drivers/remoteproc/qcom_q6v5_mss.c
b/drivers/remoteproc/qcom_q6v5_mss.c
index 01be7314e176..c4e7700aee0f 100644
--- a/drivers/remoteproc/qcom_q6v5_mss.c
+++ b/drivers/remoteproc/qcom_q6v5_mss.c
@@ -22,6 +22,7 @@
#include
#include
#include
+#include
#include
#include
#include
@@ -30,6 +31,7 @@
#include
#include
#include
+#include
#include
#include "remoteproc_internal.h"
@@ -188,6 +190,7 @@ struct q6v5 {
bool has_alt_reset;
int mpss_perm;
int mba_perm;
+ const char *hexagon_mdt_image;
int version;
};
@@ -860,17 +863,29 @@ static int q6v5_mpss_load(struct q6v5 *qproc)
phys_addr_t min_addr = PHYS_ADDR_MAX;
phys_addr_t max_addr = 0;
bool relocate = false;
- char seg_name[10];
+ char seg_name[35];
+ char *fw_prefix;
+ char *tmp;
ssize_t offset;
size_t size = 0;
void *ptr;
int ret;
int i;
- ret = request_firmware(&fw, "modem.mdt", qproc->dev);
+ fw_prefix = kstrdup(qproc->hexagon_mdt_image, GFP_KERNEL);
+ if (!fw_prefix)
+ return -ENOMEM;
+
+ /* strip out the fw extn */
+ tmp = strrchr(fw_prefix, '.');
+ if (tmp)
+ *tmp = '\0';
+
+ ret = request_firmware(&fw, qproc->hexagon_mdt_image, qproc->dev);
if (ret < 0) {
- dev_err(qproc->dev, "unable to load modem.mdt\n");
- return ret;
+ dev_err(qproc->dev, "unable to load %s\n",
+ qproc->hexagon_mdt_image);
+ goto release_fw_prefix;
}
/* Initialize the RMB validator */
@@ -918,7 +933,8 @@ static int q6v5_mpss_load(struct q6v5 *qproc)
ptr = qproc->mpss_region + offset;
if (phdr->p_filesz) {
- snprintf(seg_name, sizeof(seg_name), "modem.b%02d", i);
+ snprintf(seg_name, sizeof(seg_name), "%s.b%02d",
+fw_prefix, i);
ret = request_firmware(&seg_fw, seg_name, qproc->dev);
if (ret) {
dev_err(qproc->dev, "failed to load %s\n",
seg_name);
@@ -960,6 +976,8 @@ static int q6v5_mpss_load(struct q6v5 *qproc)
release_firmware:
release_firmware(fw);
+release_fw_prefix:
+ kfree(fw_prefix);
return ret < 0 ? ret : 0;
}
@@ -1075,9 +1093,10 @@ static int qcom_q6v5_register_dump_segments(struct rproc
*rproc,
unsigned long i;
int ret;
- ret = request_firmware(&fw, "modem.mdt", qproc->dev);
+ ret = request_firmware(&fw, qproc->hexagon_mdt_image, qproc->dev);
if (ret < 0) {
- dev_err(qproc->dev, "unable to load modem.mdt\n");
+ dev_err(qproc->dev, "unable to load %s\n",
+ qproc->hexagon_mdt_image);
return ret;
}
@@ -1253,6 +1272,8 @@ static int q6v5_probe(struct platform_device *pdev)
const struct rproc_hexagon_res *desc;
struct q6v5 *qproc;
struct rproc *rproc;
+ const char *mba_image;
+ const char *fw_name[2];
int ret;
desc = of_device_get_match_data(&pdev->dev);
@@ -1262,8 +1283,19 @@ static int q6v5_probe(struct platform_device *pdev)
if (desc->need_mem_protection && !qcom_scm_is_available())
return -EPROBE_DEFER;
+ ret = of_property_count_strings(pdev->dev.of_node, "qcom,firmware");
+ if (ret != -EINVAL && ret != 2)
+ return -EINVAL;
+
+ ret = of_property_read_string_array(pdev->dev.of_node, "qcom,firmware",
+ fw_name, 2);
+ if (ret != -EINVAL && ret != 2)
+ return -EINVAL;
+
+ mba_image = (ret != 2) ? desc->hexagon_mba_image : fw_name[0];
+
rproc = rproc_alloc(&pdev->dev, pdev->name, &q6v5_ops,
- desc->hexagon_mba_image, sizeof(*qproc));
+ mba_image, sizeof(*qproc));
if (!rproc) {
dev_err(&pdev->dev, "failed to allocate rproc\n");
return -ENOMEM;
@@ -1272,6 +1304,7 @@ static int q6v5_probe(struct platform_device *pdev)
qproc = (struct q6v5 *)rproc->priv;
qproc->dev = &pdev->dev;
qproc->rproc = rproc;
+ qproc->hexagon_mdt_image = (ret != 2) ? "modem.mdt" : fw_name[1];
platform_set_drvdata(pdev, qproc);
ret = q6v5_init_mem(qproc, pdev);
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project
[PATCH v4] PM / devfreq: Restart previous governor if new governor fails to start
From: Saravana Kannan
If the new governor fails to start, switch back to old governor so that the
devfreq state is not left in some weird limbo.
Signed-off-by: Sibi Sankar
Signed-off-by: Saravana Kannan
Reviewed-by: Chanwoo Choi
---
V4:
* Removed prev_governor check.
V3:
* Fix NULL deref for real this time.
* Addressed some style preferences.
V2:
* Fixed typo in commit text
* Fixed potential NULL deref
drivers/devfreq/devfreq.c | 11 +--
1 file changed, 9 insertions(+), 2 deletions(-)
diff --git a/drivers/devfreq/devfreq.c b/drivers/devfreq/devfreq.c
index 141413067b5c..ba2875a0b90e 100644
--- a/drivers/devfreq/devfreq.c
+++ b/drivers/devfreq/devfreq.c
@@ -1024,7 +1024,7 @@ static ssize_t governor_store(struct device *dev, struct
device_attribute *attr,
struct devfreq *df = to_devfreq(dev);
int ret;
char str_governor[DEVFREQ_NAME_LEN + 1];
- struct devfreq_governor *governor;
+ const struct devfreq_governor *governor, *prev_governor;
ret = sscanf(buf, "%" __stringify(DEVFREQ_NAME_LEN) "s", str_governor);
if (ret != 1)
@@ -1053,12 +1053,19 @@ static ssize_t governor_store(struct device *dev,
struct device_attribute *attr,
goto out;
}
}
+ prev_governor = df->governor;
df->governor = governor;
strncpy(df->governor_name, governor->name, DEVFREQ_NAME_LEN);
ret = df->governor->event_handler(df, DEVFREQ_GOV_START, NULL);
- if (ret)
+ if (ret) {
dev_warn(dev, "%s: Governor %s not started(%d)\n",
__func__, df->governor->name, ret);
+ df->governor = prev_governor;
+ strncpy(df->governor_name, prev_governor->name,
+ DEVFREQ_NAME_LEN);
+ df->governor->event_handler(df, DEVFREQ_GOV_START,
+ NULL);
+ }
out:
mutex_unlock(&devfreq_list_lock);
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project
Re: [PATCH v2 1/7] dt-bindings: soc: qcom: Add remote-pid binding for GLINK SMEM
Hi Doug,
Thanks for the review :)
On 2018-12-18 05:29, Doug Anderson wrote:
Hi,
On Mon, Dec 17, 2018 at 2:07 AM Sibi Sankar
wrote:
Add missing qcom,remote-pid dt binding required for GLINK SMEM
which specifies the remote endpoint of the GLINK edge.
Signed-off-by: Sibi Sankar
---
Documentation/devicetree/bindings/soc/qcom/qcom,glink.txt | 5 +
1 file changed, 5 insertions(+)
Fixes: 2b41d6c8e696 ("dt-bindings: soc: qcom: Extend GLINK to cover
SMEM")
diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,glink.txt
b/Documentation/devicetree/bindings/soc/qcom/qcom,glink.txt
index 0b8cc533ca83..59ae603ba520 100644
--- a/Documentation/devicetree/bindings/soc/qcom/qcom,glink.txt
+++ b/Documentation/devicetree/bindings/soc/qcom/qcom,glink.txt
@@ -21,6 +21,11 @@ edge.
Definition: should specify the IRQ used by the remote
processor to
signal this processor about communication related
events
+- qcom,remote-pid:
+ Usage: required for glink-smem
+ Value type:
+ Definition: specifies the identfier of the remote endpoint of
this edge
s/identfier/identifier/
missed this, will correct it in v3.
Other than the typo this seems right to me. Feel free to add my
Reviewed-by tag when that's fixed.
-Doug
--
-- Sibi Sankar --
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project.
Re: [PATCH v2 2/7] dt-bindings: remoteproc: qcom: Add clock bindings for Q6V5
Hi Doug,
Thanks for the review :)
On 2018-12-18 05:29, Doug Anderson wrote:
Hi,
On Mon, Dec 17, 2018 at 2:07 AM Sibi Sankar
wrote:
Add missing clock bindings for Q6V5 MSS on SDM845 SoCs.
Signed-off-by: Sibi Sankar
---
.../devicetree/bindings/remoteproc/qcom,q6v5.txt | 10
+++---
1 file changed, 7 insertions(+), 3 deletions(-)
Fixes: 9f058fa2efb1 ("remoteproc: qcom: Add support for mss remoteproc
on msm8996")
Fixes: fb22022ff63d ("dt-bindings: remoteproc: Add Q6v5 Modem PIL
binding for SDM845")
...it probably doesn't matter too much but if we wanted to be really
careful we could split into two patches, one for the msm8996 and one
for sdm845. I don't think people care that much about stable
backports of bindings though (someone can feel free to correct me)...
I did think of splitting this up but it doesn't
actually fix 9f058fa2efb1 yet. I noticed a few missing
clocks for mss on 8996 when I did a diff with the
corresponding CAF tree. Hence couldn't add bindings for
it. Will add them once I validate mss on 8996 with the
necessary changes.
diff --git
a/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt
b/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt
index 9ff5b0309417..780adc043b37 100644
--- a/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt
+++ b/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt
@@ -39,13 +39,17 @@ on the Qualcomm Hexagon core.
- clocks:
Usage: required
Value type:
- Definition: reference to the iface, bus and mem clocks to be
held on
- behalf of the booting of the Hexagon core
+ Definition: reference to the list of 4 clocks for the modem
sub-system
+ reference to the list of 8 clocks for the modem
sub-system
+ on SDM845 SoCs
The above is confusing because you don't list the SoCs that are
supposed to use the 4 clocks. How about instead:
Definition: reference to the clocks that match clock-names
AFAIK, only the exceptions are captured. I am fine
with both, I'll wait for Bjorn/Rob's preference.
- clock-names:
Usage: required
Value type:
- Definition: must be "iface", "bus", "mem"
+ Definition: must be "iface", "bus", "mem", "xo" for the modem
sub-system
+ must be "iface", "bus", "mem", "gpll0_mss",
"snoc_axi",
+ "mnoc_axi", "prng", "xo" for the modem sub-system
on SDM845
+ SoCs
Same here where it's confusing. ...but also, it it correct? As far
as I can tell you're missing msm8996. It's better to just be explicit
and list each one, ideally without all the prose.
Definition: The clocks needed depend on the compatible string:
ditto
qcom,sdm845-mss-pil: "xo", "prng", "iface", "snoc_axi", "bus", "mem",
"gpll0_mss", "mnoc_axi"
qcom,msm8996-mss-pil: "xo", "pnoc", "iface", "bus", "mem",
"gpll0_mss_clk"
ditto
qcom,msm8974-mss-pil: "xo", "iface", "bus", "mem"
qcom,msm8916-mss-pil: "xo", "iface", "bus", "mem"
qcom,q6v5-pil: "xo", "iface", "bus", "mem"
...as far as I can tell this binding is supposed to account for
"qcom,ipq8074-wcss-pil" too but it seems that one doesn't have
clock-names.
Yeah the lack of clocks have to be documented
for ipq8074-wcss-pil.. will do it in v3
-Doug
--
-- Sibi Sankar --
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project.
Re: [PATCH v2 4/7] dt-bindings: remoteproc: qcom: Add power-domain bindings for Q6V5
Hi Doug, Thanks for the review :) On 2018-12-18 05:31, Doug Anderson wrote: Hi, On Mon, Dec 17, 2018 at 2:08 AM Sibi Sankar wrote: Add power-domain bindings for Q6V5 MSS on MSM8996 and SDM845 SoCs. Reviewed-by: Rob Herring Signed-off-by: Sibi Sankar --- v2: * Add load_state power-domain * List cx and mx power-domains for MSM8996 .../devicetree/bindings/remoteproc/qcom,q6v5.txt | 16 1 file changed, 16 insertions(+) diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt b/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt index 98894e6ad456..50695cd86397 100644 --- a/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt +++ b/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt @@ -80,6 +80,22 @@ on the Qualcomm Hexagon core. reference to the pll-supply regulator to be held on behalf of the booting of the Hexagon core on MSM8996 SoCs +- power-domains: + Usage: required + Value type: + Definition: reference to the list of 2 power-domains for the modem + sub-system on MSM8996 SoCs This is truly required for msm8996 SoCs? The code I'm looking at doesn't try to get these power domains for 8996 so presumably you're breaking backward compatibility with old device tree files by making this required now. I don't personally know how widespread msm8996 usage is w/ upstream, so I'd let Bjorn comment on whether he thinks this is OK. This is one of the reasons why the dt node for mss on 8996 has not been posted/merged upstream. Hence backward compatibility is not broken yet in mainline :) .. However it will break on official linaro integration releases (old dt + new kernel) As with the other patches in this series, I personally prefer less prose and more lists / tables of exactly what is required for which compatible string. + reference to the list of 4 power-domains for the modem + sub-system on SDM845 SoCs + +- power-domain-names: + Usage: required + Value type: + Definition: must be "cx", "mx" for the modem sub-system on MSM8996 + SoCs + must be "cx", "mx", "mss", "load_state" for the modem + sub-system on SDM845 SoCs I haven't see a patch for using "load_state". Can you point at it? I guess this was "aop" in your last version? using load_state was Bjorn's suggestion and seemed more appropriate than aop -Doug -- -- Sibi Sankar -- Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, a Linux Foundation Collaborative Project.
Re: [PATCH v2 5/7] arm64: dts: qcom: sdm845: Add Q6V5 MSS node
Hi Doug, Thanks for the review :) On 2018-12-18 05:32, Doug Anderson wrote: Hi, On Mon, Dec 17, 2018 at 2:08 AM Sibi Sankar wrote: This patch adds Q6V5 MSS remoteproc node for SDM845 SoCs. Signed-off-by: Sibi Sankar --- v2: * Fixed style changes * Added missing clocks in the dt-bindings * Split mss remoteproc node into a number of patches I know there was some off-list suggestion to split this into a number of patches, but to actually make that useful to anyone we'd actually need to _also_ post up patches to make the driver probe / work without these power domains. ...and as per other discussions it's kinda "lucky" that it happens to work without them and Bjorn wasn't supportive of making this optional. So I'd actually fold patch 6 into patch 5 and focus on getting the "aoss_qmp_pd" landed sooner rather than later. I'll fold them in v3 Keeping the "shutdown-ack" as a separate patch makes sense though since the bindings currently list that as "optional" and I guess things work OK w/out it. Once patch #6 is folded into patch #5 feel free to add my Reviewed-by tag. okay -- -- Sibi Sankar -- Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, a Linux Foundation Collaborative Project.
Re: [PATCH v2 6/7] arm64: dts: qcom: sdm845: Add power-domain for Q6V5 MSS node
Hi Doug, Thanks for the review :) On 2018-12-18 05:32, Doug Anderson wrote: Hi, On Mon, Dec 17, 2018 at 2:08 AM Sibi Sankar wrote: Add power-domains cx, mx, mss and load_state for Q6V5 MSS node. Signed-off-by: Sibi Sankar --- This patch depends on the following bindings: https://patchwork.kernel.org/patch/10725801/ - rpmhpd dt bindings https://patchwork.kernel.org/patch/10725793/ - rpmhpd dt node https://patchwork.kernel.org/patch/10678301/ - AOP QMP dt bindings arch/arm64/boot/dts/qcom/sdm845.dtsi | 6 ++ 1 file changed, 6 insertions(+) As per my comments on patch #5, I think this patch (AKA patch #6) should be folded in there. okay diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi index 33ff8668828f..56f5f55db9e2 100644 --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi @@ -1401,6 +1401,12 @@ qcom,halt-regs = <&tcsr_mutex_regs 0x23000 0x25000 0x24000>; + power-domains = <&aoss_qmp_pd AOSS_QMP_LS_MODEM>, + <&rpmhpd SDM845_CX>, + <&rpmhpd SDM845_MX>, + <&rpmhpd SDM845_MSS>; + power-domain-names = "load_state", "cx", "mx", "mss"; I guess you changed this to "load_state" from "aop" before? Is there code that actually uses this? Bjorn said he will be posting the patch for handling power-domains for mss.. -Doug -Doug -- -- Sibi Sankar -- Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, a Linux Foundation Collaborative Project.
Re: [PATCH v2 3/7] dt-bindings: remoteproc: qcom: Fixup regulator dependencies
Hi Doug, Thanks for the review :) On 2018-12-18 05:30, Doug Anderson wrote: Hi, On Mon, Dec 17, 2018 at 2:08 AM Sibi Sankar wrote: Fixup regulator supply dependencies for Q6V5 MSS on MSM996 SoCs. Signed-off-by: Sibi Sankar --- Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt b/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt index 780adc043b37..98894e6ad456 100644 --- a/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt +++ b/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt @@ -76,7 +76,9 @@ on the Qualcomm Hexagon core. Usage: required Value type: Definition: reference to the regulators to be held on behalf of the - booting of the Hexagon core + booting of the Hexagon core on MSM8916 SoCs + reference to the pll-supply regulator to be held on behalf + of the booting of the Hexagon core on MSM8996 SoCs The prose gets in the way and doesn't add anything. I also don't understand what you're saying for msm8996. You're saying that "pll-supply" is required there but none of the others? That doesn't seem to be true in the code I have in front of me, but maybe I'm missing some patch. For me, I'd write: AFAIK, only the exceptions are captured. But your suggestion seems more simple/complete. Perhaps I'll replace SoCs instead of compatibles? Anyway I'll wait for Bjorn/Rob's preference. For the compatible strings below the following supplies are required: "qcom,q6v5-pil" "qcom,msm8916-mss-pil", "qcom,msm8974-mss-pil" - cx-supply: - mss-supply: - mx-supply: - pll-supply: Usage: required Value type: Definition: reference to the regulators to be held on behalf of the booting of the Hexagon core ...and if msm8996 actually needs "pll-supply", you could add in... For the compatible strings below the following supplies are required: "qcom,msm8996-mss-pil" - pll-supply: Usage: required Value type: Definition: reference to the regulators to be held on behalf of the booting of the Hexagon core -- -- Sibi Sankar -- Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, a Linux Foundation Collaborative Project.
Re: [PATCH v2 2/7] dt-bindings: remoteproc: qcom: Add clock bindings for Q6V5
Hi Rob, Thanks for the review! On 2018-12-18 22:57, Rob Herring wrote: On Mon, Dec 17, 2018 at 03:37:19PM +0530, Sibi Sankar wrote: Add missing clock bindings for Q6V5 MSS on SDM845 SoCs. Signed-off-by: Sibi Sankar --- .../devicetree/bindings/remoteproc/qcom,q6v5.txt | 10 +++--- 1 file changed, 7 insertions(+), 3 deletions(-) diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt b/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt index 9ff5b0309417..780adc043b37 100644 --- a/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt +++ b/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt @@ -39,13 +39,17 @@ on the Qualcomm Hexagon core. - clocks: Usage: required Value type: - Definition: reference to the iface, bus and mem clocks to be held on - behalf of the booting of the Hexagon core + Definition: reference to the list of 4 clocks for the modem sub-system + reference to the list of 8 clocks for the modem sub-system + on SDM845 SoCs - clock-names: Usage: required Value type: - Definition: must be "iface", "bus", "mem" + Definition: must be "iface", "bus", "mem", "xo" for the modem sub-system + must be "iface", "bus", "mem", "gpll0_mss", "snoc_axi", + "mnoc_axi", "prng", "xo" for the modem sub-system on SDM845 + SoCs This seems to me a list of all clocks you need enabled, not what clocks actually go to the modem. Specifically, shouldn't the *noc_axi clocks be managed by the interconnect driver? clocks = ..., <&gcc GCC_MSS_SNOC_AXI_CLK>, <&gcc GCC_MSS_MFAB_AXIS_CLK>, ...; clock-names = ..., "snoc_axi", "mnoc_axi",...; snoc_axi and mnoc_axi maps to above GCC clks and both of them fall under the MSS functional group Rob -- -- Sibi Sankar -- Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, a Linux Foundation Collaborative Project.
Re: [PATCH] arm64: dts: qcom: sdm845: Add Q6V5 MSS node
Hi Doug,
Thanks for the review!
On 2018-12-14 03:47, Doug Anderson wrote:
Hi,
On Tue, Nov 27, 2018 at 12:58 AM Sibi Sankar
wrote:
This patch adds Q6V5 MSS remoteproc node for SDM845 SoCs.
Signed-off-by: Sibi Sankar
---
The remoteproc mss node depends on the following bindings:
https://patchwork.kernel.org/patch/10490559/ - rpmhp dt bindings
This is an older version of the patch. Now at v7 at
<https://patchwork.kernel.org/patch/10725801/>
https://patchwork.kernel.org/patch/10678301/ - AOP QMP dt bindings
https://patchwork.kernel.org/patch/10691215/ - mss power-domain dt
bindings
https://patchwork.kernel.org/patch/10691213/ - shutdown-ack dt
bindings
It also depends on the mpss and mba memory regions and pdc reset node.
https://patchwork.kernel.org/patch/10662089/
https://patchwork.kernel.org/patch/10657325/
arch/arm64/boot/dts/qcom/sdm845.dtsi | 63
1 file changed, 63 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi
b/arch/arm64/boot/dts/qcom/sdm845.dtsi
index 58870273dbc9..df16ee464872 100644
--- a/arch/arm64/boot/dts/qcom/sdm845.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi
@@ -1095,6 +1095,69 @@
};
};
+ remoteproc@408 {
+ compatible = "qcom,sdm845-mss-pil";
+ reg = <0x0408 0x408>, <0x0418 0x48>;
s/0x0408/0x408 to appease the DT folks.
as you said in the other thread will leave the
padding untouched
+ reg-names = "qdsp6", "rmb";
+
+ interrupts-extended =
+ <&intc GIC_SPI 266
IRQ_TYPE_EDGE_RISING>,
+ <&modem_smp2p_in 0
IRQ_TYPE_EDGE_RISING>,
+ <&modem_smp2p_in 1
IRQ_TYPE_EDGE_RISING>,
+ <&modem_smp2p_in 2
IRQ_TYPE_EDGE_RISING>,
+ <&modem_smp2p_in 3
IRQ_TYPE_EDGE_RISING>,
+ <&modem_smp2p_in 7
IRQ_TYPE_EDGE_RISING>;
+
+ interrupt-names = "wdog", "fatal", "ready",
+ "handover", "stop-ack",
+ "shutdown-ack";
nit: maybe remove blank line between "interrupts-extended" and
"interrupt-names". Nice to keep -names close to the things they're
naming.
sure will do that.. I guess I'll have to remove
the blank line in clock-names as well
+ clocks = <&gcc GCC_MSS_CFG_AHB_CLK>,
+<&gcc GCC_MSS_Q6_MEMNOC_AXI_CLK>,
+<&gcc GCC_BOOT_ROM_AHB_CLK>,
+<&gcc GCC_MSS_GPLL0_DIV_CLK_SRC>,
+<&gcc GCC_MSS_SNOC_AXI_CLK>,
+<&gcc GCC_MSS_MFAB_AXIS_CLK>,
+<&gcc GCC_PRNG_AHB_CLK>,
+<&rpmhcc RPMH_CXO_CLK>;
+
+ clock-names = "iface", "bus", "mem",
"gpll0_mss",
+ "snoc_axi", "mnoc_axi", "prng",
"xo";
Bindings list clock-names as "iface", "bus", "mem". You have "iface",
"bus", "mem", "gpll0_mss", "snoc_axi", "mnoc_axi", "prng", "xo". It
looks like these extra clocks were added in commit 231f67d1fb2f
("remoteproc: q6v5: Add support for mss remoteproc on SDM845") but you
forgot to update the bindings. Looking in that patch I also see an
"axis2" which you seem to be missing. Do you need it?
yes missed adding them..will add them in the next respin
+ qcom,smem-states = <&modem_smp2p_out 0>;
+ qcom,smem-state-names = "stop";
+
+ resets = <&aoss_reset AOSS_CC_MSS_RESTART>,
+<&pdc_reset PDC_MODEM_SYNC_RESET>;
+ reset-names = "mss_restart", "pdc_reset";
+
+ qcom,halt-regs = <&tcsr_mutex_regs
+ 0x23000 0x25000
0x24000>;
+
+ power-domains = <&aoss_qmp_pd
AOSS_QMP_LS_MODEM>,
+ <&rpmhpd SDM845_CX>,
+ <&rpmhpd SDM845_MX>,
+ <&rpmhpd SDM845_MSS>;
+ power-domain-names = "ao
Re: [PATCH 2/2] remoteproc: sysmon: Wait for shutdown-ack/ind on sysmon shutdown
Hi Bjorn,
Thanks for the review!
On 2018-12-06 12:46, Bjorn Andersson wrote:
On Tue 20 Nov 13:02 PST 2018, Sibi Sankar wrote:
After sending a sysmon shutdown request to the SSCTL service on the
subsystem, wait for the service to send shutdown-ack interrupt or
an indication message back.
So we get a reply immediate on the shutdown request, and then some time
later we get either an indication or an interrupt to state that it's
actually complete?
Yes, after the immediate qmi result response
we get either indication/shutdown-ack interrupt
or both. This would indicate that the graceful
shutdown is complete and wouldn't further require
a qcom_q6v5_request_stop.
Signed-off-by: Sibi Sankar
---
drivers/remoteproc/qcom_sysmon.c | 59
+++-
1 file changed, 58 insertions(+), 1 deletion(-)
diff --git a/drivers/remoteproc/qcom_sysmon.c
b/drivers/remoteproc/qcom_sysmon.c
[..]
@@ -283,6 +311,14 @@ static void ssctl_request_shutdown(struct
qcom_sysmon *sysmon)
dev_err(sysmon->dev, "shutdown request failed\n");
else
dev_dbg(sysmon->dev, "shutdown request completed\n");
+
+ if (sysmon->shutdown_irq > 0) {
+ ret = wait_for_completion_timeout(&sysmon->shutdown_comp,
+ msecs_to_jiffies(5000));
5 * HZ
sure
+ if (!ret)
+ dev_err(sysmon->dev,
+ "timeout waiting for shutdown ack\n");
+ }
}
[..]
@@ -453,14 +499,25 @@ struct qcom_sysmon
*qcom_add_sysmon_subdev(struct rproc *rproc,
sysmon->dev = rproc->dev.parent;
sysmon->rproc = rproc;
+ pdev = container_of(sysmon->dev, struct platform_device, dev);
sysmon->name = name;
sysmon->ssctl_instance = ssctl_instance;
init_completion(&sysmon->comp);
+ init_completion(&sysmon->shutdown_comp);
mutex_init(&sysmon->lock);
- ret = qmi_handle_init(&sysmon->qmi, SSCTL_MAX_MSG_LEN, &ssctl_ops,
NULL);
+ sysmon->shutdown_irq = platform_get_irq_byname(pdev,
"shutdown-ack");
Use of_irq_get_byname() on sysmon->dev instead of relying on the fact
that the remoteproc driver is a platform_device.
Also, check and handle the return value - because an EPROBE_DEFER here
will be turned into a -EINVAL by devm_request_threaded_irq().
handling -EPROBE_DEFER would require changing the prototype
of add_sysmon_subdev, so can it come as a separate patch?
+ ret = devm_request_threaded_irq(sysmon->dev, sysmon->shutdown_irq,
+ NULL, sysmon_shutdown_interrupt,
+ IRQF_TRIGGER_RISING | IRQF_ONESHOT,
+ "q6v5 shutdown-ack", sysmon);
+ if (ret)
+ dev_err(sysmon->dev, "failed to acquire shutdown-ack IRQ\n");
In the event that sysmon->shutdown_irq is != -ENODATA, you should fail
here.
don't we want this to be a optional property? meaning we
shouldn't fail for -EINVAL..
+
+ ret = qmi_handle_init(&sysmon->qmi, SSCTL_MAX_MSG_LEN, &ssctl_ops,
+ qmi_indication_handler);
Regards,
Bjorn
--
-- Sibi Sankar --
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project.
[PATCH v2 2/7] dt-bindings: remoteproc: qcom: Add clock bindings for Q6V5
Add missing clock bindings for Q6V5 MSS on SDM845 SoCs. Signed-off-by: Sibi Sankar --- .../devicetree/bindings/remoteproc/qcom,q6v5.txt | 10 +++--- 1 file changed, 7 insertions(+), 3 deletions(-) diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt b/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt index 9ff5b0309417..780adc043b37 100644 --- a/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt +++ b/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt @@ -39,13 +39,17 @@ on the Qualcomm Hexagon core. - clocks: Usage: required Value type: - Definition: reference to the iface, bus and mem clocks to be held on - behalf of the booting of the Hexagon core + Definition: reference to the list of 4 clocks for the modem sub-system + reference to the list of 8 clocks for the modem sub-system + on SDM845 SoCs - clock-names: Usage: required Value type: - Definition: must be "iface", "bus", "mem" + Definition: must be "iface", "bus", "mem", "xo" for the modem sub-system + must be "iface", "bus", "mem", "gpll0_mss", "snoc_axi", + "mnoc_axi", "prng", "xo" for the modem sub-system on SDM845 + SoCs - resets: Usage: required -- The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project
[PATCH v2 1/7] dt-bindings: soc: qcom: Add remote-pid binding for GLINK SMEM
Add missing qcom,remote-pid dt binding required for GLINK SMEM which specifies the remote endpoint of the GLINK edge. Signed-off-by: Sibi Sankar --- Documentation/devicetree/bindings/soc/qcom/qcom,glink.txt | 5 + 1 file changed, 5 insertions(+) diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,glink.txt b/Documentation/devicetree/bindings/soc/qcom/qcom,glink.txt index 0b8cc533ca83..59ae603ba520 100644 --- a/Documentation/devicetree/bindings/soc/qcom/qcom,glink.txt +++ b/Documentation/devicetree/bindings/soc/qcom/qcom,glink.txt @@ -21,6 +21,11 @@ edge. Definition: should specify the IRQ used by the remote processor to signal this processor about communication related events +- qcom,remote-pid: + Usage: required for glink-smem + Value type: + Definition: specifies the identfier of the remote endpoint of this edge + - qcom,rpm-msg-ram: Usage: required for glink-rpm Value type: -- The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project
[PATCH v2 4/7] dt-bindings: remoteproc: qcom: Add power-domain bindings for Q6V5
Add power-domain bindings for Q6V5 MSS on MSM8996 and SDM845 SoCs. Reviewed-by: Rob Herring Signed-off-by: Sibi Sankar --- v2: * Add load_state power-domain * List cx and mx power-domains for MSM8996 .../devicetree/bindings/remoteproc/qcom,q6v5.txt | 16 1 file changed, 16 insertions(+) diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt b/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt index 98894e6ad456..50695cd86397 100644 --- a/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt +++ b/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt @@ -80,6 +80,22 @@ on the Qualcomm Hexagon core. reference to the pll-supply regulator to be held on behalf of the booting of the Hexagon core on MSM8996 SoCs +- power-domains: + Usage: required + Value type: + Definition: reference to the list of 2 power-domains for the modem + sub-system on MSM8996 SoCs + reference to the list of 4 power-domains for the modem + sub-system on SDM845 SoCs + +- power-domain-names: + Usage: required + Value type: + Definition: must be "cx", "mx" for the modem sub-system on MSM8996 + SoCs + must be "cx", "mx", "mss", "load_state" for the modem + sub-system on SDM845 SoCs + - qcom,smem-states: Usage: required Value type: -- The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project
[PATCH v2 5/7] arm64: dts: qcom: sdm845: Add Q6V5 MSS node
This patch adds Q6V5 MSS remoteproc node for SDM845 SoCs.
Signed-off-by: Sibi Sankar
---
v2:
* Fixed style changes
* Added missing clocks in the dt-bindings
* Split mss remoteproc node into a number of patches
This patch depends on the mpss and mba memory regions and pdc reset node.
https://patchwork.kernel.org/patch/10662089/
https://patchwork.kernel.org/patch/10657325/
arch/arm64/boot/dts/qcom/sdm845.dtsi | 52
1 file changed, 52 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi
b/arch/arm64/boot/dts/qcom/sdm845.dtsi
index 5da9fa1feb8a..33ff8668828f 100644
--- a/arch/arm64/boot/dts/qcom/sdm845.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi
@@ -1366,6 +1366,58 @@
};
};
+ remoteproc@408 {
+ compatible = "qcom,sdm845-mss-pil";
+ reg = <0x0408 0x408>, <0x0418 0x48>;
+ reg-names = "qdsp6", "rmb";
+
+ interrupts-extended =
+ <&intc GIC_SPI 266 IRQ_TYPE_EDGE_RISING>,
+ <&modem_smp2p_in 0 IRQ_TYPE_EDGE_RISING>,
+ <&modem_smp2p_in 1 IRQ_TYPE_EDGE_RISING>,
+ <&modem_smp2p_in 2 IRQ_TYPE_EDGE_RISING>,
+ <&modem_smp2p_in 3 IRQ_TYPE_EDGE_RISING>;
+ interrupt-names = "wdog", "fatal", "ready",
+ "handover", "stop-ack";
+
+ clocks = <&gcc GCC_MSS_CFG_AHB_CLK>,
+<&gcc GCC_MSS_Q6_MEMNOC_AXI_CLK>,
+<&gcc GCC_BOOT_ROM_AHB_CLK>,
+<&gcc GCC_MSS_GPLL0_DIV_CLK_SRC>,
+<&gcc GCC_MSS_SNOC_AXI_CLK>,
+<&gcc GCC_MSS_MFAB_AXIS_CLK>,
+<&gcc GCC_PRNG_AHB_CLK>,
+<&rpmhcc RPMH_CXO_CLK>;
+ clock-names = "iface", "bus", "mem", "gpll0_mss",
+ "snoc_axi", "mnoc_axi", "prng", "xo";
+
+ qcom,smem-states = <&modem_smp2p_out 0>;
+ qcom,smem-state-names = "stop";
+
+ resets = <&aoss_reset AOSS_CC_MSS_RESTART>,
+<&pdc_reset PDC_MODEM_SYNC_RESET>;
+ reset-names = "mss_restart", "pdc_reset";
+
+ qcom,halt-regs = <&tcsr_mutex_regs
+ 0x23000 0x25000 0x24000>;
+
+ mba {
+ memory-region = <&mba_region>;
+ };
+
+ mpss {
+ memory-region = <&mpss_region>;
+ };
+
+ glink-edge {
+ interrupts = ;
+ label = "modem";
+ qcom,remote-pid = <1>;
+ mboxes = <&apss_shared 12>;
+ mbox-names = "mpss_smem";
+ };
+ };
+
usb_1_hsphy: phy@88e2000 {
compatible = "qcom,sdm845-qusb2-phy";
reg = <0x88e2000 0x400>;
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project
[PATCH v2 3/7] dt-bindings: remoteproc: qcom: Fixup regulator dependencies
Fixup regulator supply dependencies for Q6V5 MSS on MSM996 SoCs. Signed-off-by: Sibi Sankar --- Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt b/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt index 780adc043b37..98894e6ad456 100644 --- a/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt +++ b/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt @@ -76,7 +76,9 @@ on the Qualcomm Hexagon core. Usage: required Value type: Definition: reference to the regulators to be held on behalf of the - booting of the Hexagon core + booting of the Hexagon core on MSM8916 SoCs + reference to the pll-supply regulator to be held on behalf + of the booting of the Hexagon core on MSM8996 SoCs - qcom,smem-states: Usage: required -- The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project
[PATCH v2 6/7] arm64: dts: qcom: sdm845: Add power-domain for Q6V5 MSS node
Add power-domains cx, mx, mss and load_state for Q6V5 MSS node.
Signed-off-by: Sibi Sankar
---
This patch depends on the following bindings:
https://patchwork.kernel.org/patch/10725801/ - rpmhpd dt bindings
https://patchwork.kernel.org/patch/10725793/ - rpmhpd dt node
https://patchwork.kernel.org/patch/10678301/ - AOP QMP dt bindings
arch/arm64/boot/dts/qcom/sdm845.dtsi | 6 ++
1 file changed, 6 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi
b/arch/arm64/boot/dts/qcom/sdm845.dtsi
index 33ff8668828f..56f5f55db9e2 100644
--- a/arch/arm64/boot/dts/qcom/sdm845.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi
@@ -1401,6 +1401,12 @@
qcom,halt-regs = <&tcsr_mutex_regs
0x23000 0x25000 0x24000>;
+ power-domains = <&aoss_qmp_pd AOSS_QMP_LS_MODEM>,
+ <&rpmhpd SDM845_CX>,
+ <&rpmhpd SDM845_MX>,
+ <&rpmhpd SDM845_MSS>;
+ power-domain-names = "load_state", "cx", "mx", "mss";
+
mba {
memory-region = <&mba_region>;
};
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project
[PATCH v2 7/7] arm64: dts: qcom: sdm845: Add shutdown-ack for Q6V5 MSS node
Add shutdown-ack smp2p interrupt for Q6V5 MSS node. Signed-off-by: Sibi Sankar --- This patch depends on: https://patchwork.kernel.org/patch/10691213/ - shutdown-ack dt bindings arch/arm64/boot/dts/qcom/sdm845.dtsi | 6 -- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi index 56f5f55db9e2..db17216a5bce 100644 --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi @@ -1376,9 +1376,11 @@ <&modem_smp2p_in 0 IRQ_TYPE_EDGE_RISING>, <&modem_smp2p_in 1 IRQ_TYPE_EDGE_RISING>, <&modem_smp2p_in 2 IRQ_TYPE_EDGE_RISING>, - <&modem_smp2p_in 3 IRQ_TYPE_EDGE_RISING>; + <&modem_smp2p_in 3 IRQ_TYPE_EDGE_RISING>, + <&modem_smp2p_in 7 IRQ_TYPE_EDGE_RISING>; interrupt-names = "wdog", "fatal", "ready", - "handover", "stop-ack"; + "handover", "stop-ack", + "shutdown-ack"; clocks = <&gcc GCC_MSS_CFG_AHB_CLK>, <&gcc GCC_MSS_Q6_MEMNOC_AXI_CLK>, -- The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project
Re: [PATCH v2 3/4] remoteproc: qcom: Wait for shutdown-ack/ind on sysmon shutdown
Hi Bjorn,
Thanks for the review!
On 2019-01-04 05:03, Bjorn Andersson wrote:
On Mon 24 Dec 00:48 PST 2018, Sibi Sankar wrote:
After sending a sysmon shutdown request to the SSCTL service on the
subsystem, wait for the service to send shutdown-ack interrupt or
an indication message to signal the completion of graceful shutdown.
Signed-off-by: Sibi Sankar
I prefer something closer to v1, where you kept the handling of the
interrupt within the sysmon driver.
What I didn't like was the fact that you resolved the mss
platform_device to get to the irq, not that you grabbed the irq from
the
parent's DT node from within the sysmon device.
You can get the remoteproc's DT node by rproc->dev.parent->of_node and
use of_irq_get_byname() to get an irq number, which you can request in
the sysmon device - which will work regardless of the remoteproc driver
being a platform_driver or something else.
All the logic looks sound, but by shuffling things around we should get
less coupling of the implementation (DT binding looks good).
will make it closer to v1 in the next re-spin
Regards,
Bjorn
---
drivers/remoteproc/qcom_sysmon.c | 40
+++-
1 file changed, 39 insertions(+), 1 deletion(-)
diff --git a/drivers/remoteproc/qcom_sysmon.c
b/drivers/remoteproc/qcom_sysmon.c
index c0d6ee8de995..0da83638ca99 100644
--- a/drivers/remoteproc/qcom_sysmon.c
+++ b/drivers/remoteproc/qcom_sysmon.c
@@ -36,6 +36,7 @@ struct qcom_sysmon {
struct rpmsg_endpoint *ept;
struct completion comp;
+ struct completion ind_comp;
struct mutex lock;
bool ssr_ack;
@@ -139,6 +140,7 @@ static int sysmon_callback(struct rpmsg_device
*rpdev, void *data, int count,
}
#define SSCTL_SHUTDOWN_REQ 0x21
+#define SSCTL_SHUTDOWN_READY_IND 0x21
#define SSCTL_SUBSYS_EVENT_REQ 0x23
#define SSCTL_MAX_MSG_LEN 7
@@ -254,6 +256,29 @@ static struct qmi_elem_info
ssctl_subsys_event_resp_ei[] = {
{}
};
+static struct qmi_elem_info ssctl_shutdown_ind_ei[] = {
+ {}
+};
+
+static void sysmon_ind_cb(struct qmi_handle *qmi, struct
sockaddr_qrtr *sq,
+ struct qmi_txn *txn, const void *data)
+{
+ struct qcom_sysmon *sysmon = container_of(qmi, struct qcom_sysmon,
qmi);
+
+ complete(&sysmon->ind_comp);
+}
+
+static struct qmi_msg_handler qmi_indication_handler[] = {
+ {
+ .type = QMI_INDICATION,
+ .msg_id = SSCTL_SHUTDOWN_READY_IND,
+ .ei = ssctl_shutdown_ind_ei,
+ .decoded_size = 0,
+ .fn = sysmon_ind_cb
+ },
+ {}
+};
+
/**
* ssctl_request_shutdown() - request shutdown via SSCTL QMI service
* @sysmon:sysmon context
@@ -264,6 +289,7 @@ static void ssctl_request_shutdown(struct
qcom_sysmon *sysmon)
struct qmi_txn txn;
int ret;
+ reinit_completion(&sysmon->ind_comp);
ret = qmi_txn_init(&sysmon->qmi, &txn, ssctl_shutdown_resp_ei,
&resp);
if (ret < 0) {
dev_err(sysmon->dev, "failed to allocate QMI txn\n");
@@ -285,6 +311,16 @@ static void ssctl_request_shutdown(struct
qcom_sysmon *sysmon)
dev_err(sysmon->dev, "shutdown request failed\n");
else
dev_dbg(sysmon->dev, "shutdown request completed\n");
+
+ if (sysmon->q6v5) {
+ ret = qcom_q6v5_wait_for_shutdown(sysmon->q6v5, 10 * HZ);
+ if (ret) {
+ ret = try_wait_for_completion(&sysmon->ind_comp);
+ if (!ret)
+ dev_err(sysmon->dev,
+ "timeout waiting for shutdown ack\n");
+ }
+ }
}
/**
@@ -462,9 +498,11 @@ struct qcom_sysmon *qcom_add_sysmon_subdev(struct
rproc *rproc,
sysmon->q6v5 = q6v5;
init_completion(&sysmon->comp);
+ init_completion(&sysmon->ind_comp);
mutex_init(&sysmon->lock);
- ret = qmi_handle_init(&sysmon->qmi, SSCTL_MAX_MSG_LEN, &ssctl_ops,
NULL);
+ ret = qmi_handle_init(&sysmon->qmi, SSCTL_MAX_MSG_LEN, &ssctl_ops,
+ qmi_indication_handler);
if (ret < 0) {
dev_err(sysmon->dev, "failed to initialize qmi handle\n");
kfree(sysmon);
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora
Forum,
a Linux Foundation Collaborative Project
--
-- Sibi Sankar --
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project.
[PATCH v3 1/3] dt-bindings: remoteproc: qcom: Introduce shutdown-ack irq for Q6V5
Introduce shutdown-irq binding required for sysmon shutdown for Q6V5 MSS on SDM845/MSM8996 SoCs and for WCSS Q6V5 on QCS404 SoC. Reviewed-by: Rob Herring Signed-off-by: Sibi Sankar --- v2: * Make shutdown-ack mandatory for MSS on SDM845/MSM8996 and for WCSS on QCS404 (Dropping Rob's reviewed-by due to this) .../bindings/remoteproc/qcom,adsp.txt | 17 ++--- .../bindings/remoteproc/qcom,q6v5.txt | 15 --- 2 files changed, 26 insertions(+), 6 deletions(-) diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,adsp.txt b/Documentation/devicetree/bindings/remoteproc/qcom,adsp.txt index 60ee0f73071a..292dfda9770d 100644 --- a/Documentation/devicetree/bindings/remoteproc/qcom,adsp.txt +++ b/Documentation/devicetree/bindings/remoteproc/qcom,adsp.txt @@ -19,13 +19,24 @@ on the Qualcomm ADSP Hexagon core. - interrupts-extended: Usage: required Value type: - Definition: must list the watchdog, fatal IRQs ready, handover and - stop-ack IRQs + Definition: reference to the interrupts that match interrupt-names - interrupt-names: Usage: required Value type: - Definition: must be "wdog", "fatal", "ready", "handover", "stop-ack" + Definition: The interrupts needed depends on the compatible + string: + qcom,msm8974-adsp-pil: + qcom,msm8996-adsp-pil: + qcom,msm8996-slpi-pil: + qcom,qcs404-adsp-pas: + qcom,qcs404-cdsp-pas: + qcom,sdm845-adsp-pas: + qcom,sdm845-cdsp-pas: + must be "wdog", "fatal", "ready", "handover", "stop-ack" + qcom,qcs404-wcss-pas: + must be "wdog", "fatal", "ready", "handover", "stop-ack", + "shutdown-ack" - firmware-name: Usage: optional diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt b/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt index 401e49ebee39..41ca5df5be5a 100644 --- a/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt +++ b/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt @@ -28,13 +28,22 @@ on the Qualcomm Hexagon core. - interrupts-extended: Usage: required Value type: - Definition: must list the watchdog, fatal IRQs ready, handover and - stop-ack IRQs + Definition: reference to the interrupts that match interrupt-names - interrupt-names: Usage: required Value type: - Definition: must be "wdog", "fatal", "ready", "handover", "stop-ack" + Definition: The interrupts needed depends on the the compatible + string: + qcom,q6v5-pil: + qcom,ipq8074-wcss-pil: + qcom,msm8916-mss-pil: + qcom,msm8974-mss-pil: + must be "wdog", "fatal", "ready", "handover", "stop-ack" + qcom,msm8996-mss-pil: + qcom,sdm845-mss-pil: + must be "wdog", "fatal", "ready", "handover", "stop-ack", + "shutdown-ack" - firmware-name: Usage: optional -- The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project
[PATCH v3 2/3] remoteproc: qcom: Add shutdown-ack irq
Add shutdown-ack irq handling required for sysmon shutdown for
Q6V5 MSS on SDM845/MSM8996 and for WCSS Q6V5 on QCS404 SoC.
Signed-off-by: Sibi Sankar
---
v3:
* Move shutdown-irq handling back to sysmon and
modify qcom_add_sysmon_subdev to handle -EPROBE_DEFER
* Dropped has_shutdown_irq flag
v2:
* Move shutdown-irq get to Q6V5 from sysmon to handle
-EPROBE_DEFER cases
drivers/remoteproc/qcom_common.h| 16 +
drivers/remoteproc/qcom_q6v5_adsp.c | 9 +++--
drivers/remoteproc/qcom_q6v5_mss.c | 4 ++-
drivers/remoteproc/qcom_q6v5_pas.c | 9 +++--
drivers/remoteproc/qcom_sysmon.c| 52 +
drivers/remoteproc/qcom_wcnss.c | 5 ++-
6 files changed, 73 insertions(+), 22 deletions(-)
diff --git a/drivers/remoteproc/qcom_common.h b/drivers/remoteproc/qcom_common.h
index 58de71e4781c..afea598fdc9d 100644
--- a/drivers/remoteproc/qcom_common.h
+++ b/drivers/remoteproc/qcom_common.h
@@ -43,16 +43,18 @@ void qcom_add_ssr_subdev(struct rproc *rproc, struct
qcom_rproc_ssr *ssr,
void qcom_remove_ssr_subdev(struct rproc *rproc, struct qcom_rproc_ssr *ssr);
#if IS_ENABLED(CONFIG_QCOM_SYSMON)
-struct qcom_sysmon *qcom_add_sysmon_subdev(struct rproc *rproc,
- const char *name,
- int ssctl_instance);
+int qcom_add_sysmon_subdev(struct rproc *rproc,
+ struct qcom_sysmon *rproc_sysmon,
+ const char *name,
+ int ssctl_instance);
void qcom_remove_sysmon_subdev(struct qcom_sysmon *sysmon);
#else
-static inline struct qcom_sysmon *qcom_add_sysmon_subdev(struct rproc *rproc,
-const char *name,
-int ssctl_instance)
+static inline int qcom_add_sysmon_subdev(struct rproc *rproc,
+struct qcom_sysmon *rproc_sysmon,
+const char *name,
+int ssctl_instance)
{
- return NULL;
+ return 0;
}
static inline void qcom_remove_sysmon_subdev(struct qcom_sysmon *sysmon)
diff --git a/drivers/remoteproc/qcom_q6v5_adsp.c
b/drivers/remoteproc/qcom_q6v5_adsp.c
index 79374d1de311..e1db2c7a08bd 100644
--- a/drivers/remoteproc/qcom_q6v5_adsp.c
+++ b/drivers/remoteproc/qcom_q6v5_adsp.c
@@ -436,9 +436,12 @@ static int adsp_probe(struct platform_device *pdev)
qcom_add_glink_subdev(rproc, &adsp->glink_subdev);
qcom_add_ssr_subdev(rproc, &adsp->ssr_subdev, desc->ssr_name);
- adsp->sysmon = qcom_add_sysmon_subdev(rproc,
- desc->sysmon_name,
- desc->ssctl_id);
+ ret = qcom_add_sysmon_subdev(rproc,
+adsp->sysmon,
+desc->sysmon_name,
+desc->ssctl_id);
+ if (ret)
+ goto disable_pm;
ret = rproc_add(rproc);
if (ret)
diff --git a/drivers/remoteproc/qcom_q6v5_mss.c
b/drivers/remoteproc/qcom_q6v5_mss.c
index c86dc40cfb8c..7a256fdb2f64 100644
--- a/drivers/remoteproc/qcom_q6v5_mss.c
+++ b/drivers/remoteproc/qcom_q6v5_mss.c
@@ -1340,7 +1340,9 @@ static int q6v5_probe(struct platform_device *pdev)
qcom_add_glink_subdev(rproc, &qproc->glink_subdev);
qcom_add_smd_subdev(rproc, &qproc->smd_subdev);
qcom_add_ssr_subdev(rproc, &qproc->ssr_subdev, "mpss");
- qproc->sysmon = qcom_add_sysmon_subdev(rproc, "modem", 0x12);
+ ret = qcom_add_sysmon_subdev(rproc, qproc->sysmon, "modem", 0x12);
+ if (ret)
+ goto free_rproc;
ret = rproc_add(rproc);
if (ret)
diff --git a/drivers/remoteproc/qcom_q6v5_pas.c
b/drivers/remoteproc/qcom_q6v5_pas.c
index b1e63fcd5fdf..942804b5fafa 100644
--- a/drivers/remoteproc/qcom_q6v5_pas.c
+++ b/drivers/remoteproc/qcom_q6v5_pas.c
@@ -301,9 +301,12 @@ static int adsp_probe(struct platform_device *pdev)
qcom_add_glink_subdev(rproc, &adsp->glink_subdev);
qcom_add_smd_subdev(rproc, &adsp->smd_subdev);
qcom_add_ssr_subdev(rproc, &adsp->ssr_subdev, desc->ssr_name);
- adsp->sysmon = qcom_add_sysmon_subdev(rproc,
- desc->sysmon_name,
- desc->ssctl_id);
+ ret = qcom_add_sysmon_subdev(rproc,
+adsp->sysmon,
+desc->sysmon_name,
+desc->ssctl_id);
+ if (ret)
+ goto free_rproc;
ret = rproc_add(rproc);
if (ret)
diff --git a/drivers/remoteproc/qcom_sysmon.c b/dr
[PATCH v3 3/3] remoteproc: qcom: Wait for shutdown-ack/ind on sysmon shutdown
After sending a sysmon shutdown request to the SSCTL service on the
subsystem, wait for the service to send shutdown-ack interrupt or
an indication message to signal the completion of graceful shutdown.
Signed-off-by: Sibi Sankar
---
v2:
* Correct the shutdown-irq wait time to 10 * HZ
drivers/remoteproc/qcom_sysmon.c | 42 +++-
1 file changed, 41 insertions(+), 1 deletion(-)
diff --git a/drivers/remoteproc/qcom_sysmon.c b/drivers/remoteproc/qcom_sysmon.c
index b17727dfc271..19b732e1427d 100644
--- a/drivers/remoteproc/qcom_sysmon.c
+++ b/drivers/remoteproc/qcom_sysmon.c
@@ -37,6 +37,7 @@ struct qcom_sysmon {
struct rpmsg_endpoint *ept;
struct completion comp;
+ struct completion ind_comp;
struct completion shutdown_comp;
struct mutex lock;
@@ -141,6 +142,7 @@ static int sysmon_callback(struct rpmsg_device *rpdev, void
*data, int count,
}
#define SSCTL_SHUTDOWN_REQ 0x21
+#define SSCTL_SHUTDOWN_READY_IND 0x21
#define SSCTL_SUBSYS_EVENT_REQ 0x23
#define SSCTL_MAX_MSG_LEN 7
@@ -256,6 +258,29 @@ static struct qmi_elem_info ssctl_subsys_event_resp_ei[] =
{
{}
};
+static struct qmi_elem_info ssctl_shutdown_ind_ei[] = {
+ {}
+};
+
+static void sysmon_ind_cb(struct qmi_handle *qmi, struct sockaddr_qrtr *sq,
+ struct qmi_txn *txn, const void *data)
+{
+ struct qcom_sysmon *sysmon = container_of(qmi, struct qcom_sysmon, qmi);
+
+ complete(&sysmon->ind_comp);
+}
+
+static struct qmi_msg_handler qmi_indication_handler[] = {
+ {
+ .type = QMI_INDICATION,
+ .msg_id = SSCTL_SHUTDOWN_READY_IND,
+ .ei = ssctl_shutdown_ind_ei,
+ .decoded_size = 0,
+ .fn = sysmon_ind_cb
+ },
+ {}
+};
+
/**
* ssctl_request_shutdown() - request shutdown via SSCTL QMI service
* @sysmon:sysmon context
@@ -266,6 +291,8 @@ static void ssctl_request_shutdown(struct qcom_sysmon
*sysmon)
struct qmi_txn txn;
int ret;
+ reinit_completion(&sysmon->ind_comp);
+ reinit_completion(&sysmon->shutdown_comp);
ret = qmi_txn_init(&sysmon->qmi, &txn, ssctl_shutdown_resp_ei, &resp);
if (ret < 0) {
dev_err(sysmon->dev, "failed to allocate QMI txn\n");
@@ -287,6 +314,17 @@ static void ssctl_request_shutdown(struct qcom_sysmon
*sysmon)
dev_err(sysmon->dev, "shutdown request failed\n");
else
dev_dbg(sysmon->dev, "shutdown request completed\n");
+
+ if (sysmon->shutdown_irq > 0) {
+ ret = wait_for_completion_timeout(&sysmon->shutdown_comp,
+ 10 * HZ);
+ if (!ret) {
+ ret = try_wait_for_completion(&sysmon->ind_comp);
+ if (!ret)
+ dev_err(sysmon->dev,
+ "timeout waiting for shutdown ack\n");
+ }
+ }
}
/**
@@ -473,6 +511,7 @@ int qcom_add_sysmon_subdev(struct rproc *rproc,
sysmon->ssctl_instance = ssctl_instance;
init_completion(&sysmon->comp);
+ init_completion(&sysmon->ind_comp);
init_completion(&sysmon->shutdown_comp);
mutex_init(&sysmon->lock);
@@ -497,7 +536,8 @@ int qcom_add_sysmon_subdev(struct rproc *rproc,
}
}
- ret = qmi_handle_init(&sysmon->qmi, SSCTL_MAX_MSG_LEN, &ssctl_ops,
NULL);
+ ret = qmi_handle_init(&sysmon->qmi, SSCTL_MAX_MSG_LEN, &ssctl_ops,
+ qmi_indication_handler);
if (ret < 0) {
dev_err(sysmon->dev, "failed to initialize qmi handle\n");
kfree(sysmon);
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project
Re: [PATCH v4 1/8] dt-bindings: soc: qcom: Add remote-pid binding for GLINK SMEM
Hi Bjorn,
Thanks for the review!
On 2019-01-04 01:47, Bjorn Andersson wrote:
On Fri 28 Dec 10:53 PST 2018, Sibi Sankar wrote:
Add missing qcom,remote-pid dt binding required for GLINK SMEM
which specifies the remote endpoint of the GLINK edge.
Fixes: 2b41d6c8e696 ("dt-bindings: soc: qcom: Extend GLINK to cover
SMEM")
Signed-off-by: Sibi Sankar
Reviewed-by: Doug Anderson
Reviewed-by: Rob Herring
Thanks for the updates Sibi!
@Andy, as this relates to rpmsg I'll take this (patch 1/8) through the
rpmsg tree.
And I'm picking 2-7 through the remoteproc tree.
PS. Please use a --cover-letter when sending a series of patches.
sure will do... this was never meant to be a
series (started of as a single patch) :P
Regards,
Bjorn
---
v3:
* Fixed typo
Documentation/devicetree/bindings/soc/qcom/qcom,glink.txt | 5 +
1 file changed, 5 insertions(+)
diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,glink.txt
b/Documentation/devicetree/bindings/soc/qcom/qcom,glink.txt
index 0b8cc533ca83..587bb1ddc8cc 100644
--- a/Documentation/devicetree/bindings/soc/qcom/qcom,glink.txt
+++ b/Documentation/devicetree/bindings/soc/qcom/qcom,glink.txt
@@ -21,6 +21,11 @@ edge.
Definition: should specify the IRQ used by the remote processor to
signal this processor about communication related events
+- qcom,remote-pid:
+ Usage: required for glink-smem
+ Value type:
+ Definition: specifies the identifier of the remote endpoint of this
edge
+
- qcom,rpm-msg-ram:
Usage: required for glink-rpm
Value type:
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora
Forum,
a Linux Foundation Collaborative Project
--
-- Sibi Sankar --
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project.
Re: [PATCH v2 2/2] remoteproc: qcom: Add support for parsing fw dt bindings
Hi Brian,
Thanks for the review!
On 2019-01-04 05:14, Brian Norris wrote:
On Fri, Dec 28, 2018 at 10:18:19AM +0530, Sibi Sankar wrote:
Add support for parsing "firmware-name" dt bindings which specifies
the relative paths of mba/modem/pas image as strings. Fallback to
the default paths for mba/modem/pas image on -EINVAL.
Signed-off-by: Sibi Sankar
---
drivers/remoteproc/qcom_q6v5_mss.c | 46
+++---
drivers/remoteproc/qcom_q6v5_pas.c | 11 ++-
2 files changed, 46 insertions(+), 11 deletions(-)
diff --git a/drivers/remoteproc/qcom_q6v5_mss.c
b/drivers/remoteproc/qcom_q6v5_mss.c
index 01be7314e176..c75179006e24 100644
--- a/drivers/remoteproc/qcom_q6v5_mss.c
+++ b/drivers/remoteproc/qcom_q6v5_mss.c
@@ -188,6 +188,7 @@ struct q6v5 {
bool has_alt_reset;
int mpss_perm;
int mba_perm;
+ const char *hexagon_mdt_image;
int version;
};
@@ -860,17 +861,27 @@ static int q6v5_mpss_load(struct q6v5 *qproc)
phys_addr_t min_addr = PHYS_ADDR_MAX;
phys_addr_t max_addr = 0;
bool relocate = false;
- char seg_name[10];
+ char *fw_name;
+ size_t fw_name_len;
ssize_t offset;
size_t size = 0;
void *ptr;
int ret;
int i;
- ret = request_firmware(&fw, "modem.mdt", qproc->dev);
+ fw_name_len = strlen(qproc->hexagon_mdt_image);
+ if (fw_name_len <= 4)
+ return -EINVAL;
+
+ fw_name = kstrdup(qproc->hexagon_mdt_image, GFP_KERNEL);
+ if (!fw_name)
+ return -ENOMEM;
+
+ ret = request_firmware(&fw, qproc->hexagon_mdt_image, qproc->dev);
if (ret < 0) {
- dev_err(qproc->dev, "unable to load modem.mdt\n");
- return ret;
+ dev_err(qproc->dev, "unable to load %s\n",
+ qproc->hexagon_mdt_image);
+ goto out;
}
/* Initialize the RMB validator */
@@ -918,10 +929,12 @@ static int q6v5_mpss_load(struct q6v5 *qproc)
ptr = qproc->mpss_region + offset;
if (phdr->p_filesz) {
- snprintf(seg_name, sizeof(seg_name), "modem.b%02d", i);
- ret = request_firmware(&seg_fw, seg_name, qproc->dev);
+ snprintf(fw_name + fw_name_len - 3, fw_name_len,
+"b%02d", i);
So, you're assuming that 'fw_name' ends in '.XXX' (for some 3-char
value
of 'XXX')? Seems a bit odd. But if you really want this, it feels like
you should enforce this, and either comment on what you're doing or
else
use a proper computation that makes it clear (e.g., strlen("bin")).
Brian
we want to construct the names of the fw blobs
incrementally i.e xxx.xxx to xxx.bxx. Given
that we restrict the fw_name_len to be greater
than 4 at the beginning, I'll probably do
something like this.
/* Replace "xxx.xxx" with "xxx.bxx" */
sprintf(fw_name + fw_name_len - 3, "b%02d", i);
+ ret = request_firmware(&seg_fw, fw_name, qproc->dev);
if (ret) {
- dev_err(qproc->dev, "failed to load %s\n",
seg_name);
+ dev_err(qproc->dev, "failed to load %s\n",
+ fw_name);
goto release_firmware;
}
@@ -960,6 +973,8 @@ static int q6v5_mpss_load(struct q6v5 *qproc)
release_firmware:
release_firmware(fw);
+out:
+ kfree(fw_name);
return ret < 0 ? ret : 0;
}
@@ -1075,9 +1090,10 @@ static int
qcom_q6v5_register_dump_segments(struct rproc *rproc,
unsigned long i;
int ret;
- ret = request_firmware(&fw, "modem.mdt", qproc->dev);
+ ret = request_firmware(&fw, qproc->hexagon_mdt_image, qproc->dev);
if (ret < 0) {
- dev_err(qproc->dev, "unable to load modem.mdt\n");
+ dev_err(qproc->dev, "unable to load %s\n",
+ qproc->hexagon_mdt_image);
return ret;
}
@@ -1253,6 +1269,8 @@ static int q6v5_probe(struct platform_device
*pdev)
const struct rproc_hexagon_res *desc;
struct q6v5 *qproc;
struct rproc *rproc;
+ const char *mba_image;
+ const char *fw_name[2];
int ret;
desc = of_device_get_match_data(&pdev->dev);
@@ -1262,8 +1280,15 @@ static int q6v5_probe(struct platform_device
*pdev)
if (desc->need_mem_protection && !qcom_scm_is_available())
return -EPROBE_DEFER;
+ ret = of_property_read_string_array(pdev->dev.of_node,
"firmware-name",
+
Re: [PATCH v2 1/2] dt-bindings: remoteproc: qcom: Add firmware bindings for Q6V5
Hi Brian/Bjorn,
Thanks for the review!
On 2019-01-05 07:24, Brian Norris wrote:
Hi again,
On Thu, Jan 03, 2019 at 04:11:58PM -0800, Brian Norris wrote:
On Thu, Jan 03, 2019 at 04:01:45PM -0800, Bjorn Andersson wrote:
> I share your concern about this, but I came to suggest this as the
> driver cares about platforms but the firmware is (often?)
> device/product-specific.
>
> E.g. we will serve the MTP and Pixel 3 with the qcom,sdm845-adsp-pas
> compatible, but they are unlikely to run the same adsp firmware. This
> allows the individual dtb to specify which firmware the driver should
> use.
I understand this, but that still doesn't mean we should be suggesting
each DTB to clutter the top-level firmware search path, especially
since
lazy people will probably just use "modem.mdt" and similar. That means
you no longer can ship the same rootfs that supports both QCOM and
modems, if modem also uses the same lazy format.
It seems like a much better practice to at least enforce a particular
prefix to things. e.g., the driver could assume:
qcom/sdm845-adsp-pas/ (or if you must, just qcom/)
and your DTB only gets to add .../ to that path.
In case it isn't clear: I think it's also severely misguided that the
existing driver gets away with lines like
request_firmware(&fw, "modem.mdt", ...);
today ;)
To add to my thoughts, since I think maybe Sibi was a little unclear of
my thoughts:
One of my primary concerns with the existing approach is that it's
basically a complete free-for-all. We should have some minimal
standards
(enforced in code) such that our DTB can never point us at something
like /lib/firmware//foo.bin (or /lib/firmware/modem.mdt;
or lots of other bad examples). This could probably be done simply by
always prefixing 'qcom/' (I don't remember -- does request_firmware()
follow '..'? e.g., 'firmware-name = "../bar/foo.bin"'.)
As a bonus: it would be very nice if we can provide a little more
structure by default, and avoid arbitrary hierarchy in the DTS. That's
where I brought up ath10k's "variant" as an example; if we can use
'compatible' to capture most of this particular Hexagon core's
properties, then we only leave a single level of variability to the
DTS.
But I might be off-base with the "bonus" paragraph. So I'd also be
somewhat happy with something much less ambitious, like just a built-in
prefix ('qcom/').
And you can also just ignore my thoughts entirely (and I'll be even
less
happy), since Rob did already provide his Reviewed-by ;) I mostly
wanted
to give food for thought, in the hopes that something in here would
help
improve this a bit.
Bjorn,
let me know how you want it implemented.
I am okay with either of the following:
* (variant tag based solution)
or
* (simply going ahead with what we have now).
Regards,
Brian
--
-- Sibi Sankar --
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project.
[PATCH v2 1/4] dt-bindings: remoteproc: qcom: Introduce shutdown-ack irq for Q6V5
Introduce shutdown-irq binding required for sysmon shutdown for Q6V5 MSS on SDM845/MSM8996 SoCs and for WCSS Q6V5 on QCS404 SoC. Signed-off-by: Sibi Sankar --- v2: Make shutdown-ack mandatory for MSS on SDM845/MSM8996 and for WCSS on QCS404 (Dropping Rob's reviewed-by due to this) .../bindings/remoteproc/qcom,adsp.txt | 17 ++--- .../bindings/remoteproc/qcom,q6v5.txt | 15 --- 2 files changed, 26 insertions(+), 6 deletions(-) diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,adsp.txt b/Documentation/devicetree/bindings/remoteproc/qcom,adsp.txt index 9c0cff3a5ed8..50df9936763b 100644 --- a/Documentation/devicetree/bindings/remoteproc/qcom,adsp.txt +++ b/Documentation/devicetree/bindings/remoteproc/qcom,adsp.txt @@ -19,13 +19,24 @@ on the Qualcomm ADSP Hexagon core. - interrupts-extended: Usage: required Value type: - Definition: must list the watchdog, fatal IRQs ready, handover and - stop-ack IRQs + Definition: reference to the interrupts that match interrupt-names - interrupt-names: Usage: required Value type: - Definition: must be "wdog", "fatal", "ready", "handover", "stop-ack" + Definition: The interrupts needed depends on the compatible + string: + qcom,msm8974-adsp-pil: + qcom,msm8996-adsp-pil: + qcom,msm8996-slpi-pil: + qcom,qcs404-adsp-pas: + qcom,qcs404-cdsp-pas: + qcom,sdm845-adsp-pas: + qcom,sdm845-cdsp-pas: + must be "wdog", "fatal", "ready", "handover", "stop-ack" + qcom,qcs404-wcss-pas: + must be "wdog", "fatal", "ready", "handover", "stop-ack", + "shutdown-ack" - clocks: Usage: required diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt b/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt index 5d0b2975387e..cacbdd368fe1 100644 --- a/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt +++ b/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt @@ -28,13 +28,22 @@ on the Qualcomm Hexagon core. - interrupts-extended: Usage: required Value type: - Definition: must list the watchdog, fatal IRQs ready, handover and - stop-ack IRQs + Definition: reference to the interrupts that match interrupt-names - interrupt-names: Usage: required Value type: - Definition: must be "wdog", "fatal", "ready", "handover", "stop-ack" + Definition: The interrupts needed depends on the the compatible + string: + qcom,q6v5-pil: + qcom,ipq8074-wcss-pil: + qcom,msm8916-mss-pil: + qcom,msm8974-mss-pil: + must be "wdog", "fatal", "ready", "handover", "stop-ack" + qcom,msm8996-mss-pil: + qcom,sdm845-mss-pil: + must be "wdog", "fatal", "ready", "handover", "stop-ack", + "shutdown-ack" - clocks: Usage: required -- The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project
[PATCH v2 2/4] remoteproc: qcom: q6v5: Add shutdown-ack irq
Add shutdown-ack irq handling for Q6V5. This patch includes enabling
shutdown-ack irq on those Q6V5 instances with "has_shutdown_irq"
flag set and exposing Q6V5 state information to the sysmon instance
which is required to ascertain graceful shutdown completion.
Signed-off-by: Sibi Sankar
---
v2:
Move shutdown-irq get to Q6V5 from sysmon to handle
-EPROBE_DEFER cases
Correct the shutdown-irq wait time to 10 * HZ
drivers/remoteproc/qcom_common.h| 7 ++--
drivers/remoteproc/qcom_q6v5.c | 53 +
drivers/remoteproc/qcom_q6v5.h | 5 +++
drivers/remoteproc/qcom_q6v5_adsp.c | 3 +-
drivers/remoteproc/qcom_q6v5_mss.c | 3 +-
drivers/remoteproc/qcom_q6v5_pas.c | 3 +-
drivers/remoteproc/qcom_sysmon.c| 6 +++-
drivers/remoteproc/qcom_wcnss.c | 3 +-
8 files changed, 76 insertions(+), 7 deletions(-)
diff --git a/drivers/remoteproc/qcom_common.h b/drivers/remoteproc/qcom_common.h
index 58de71e4781c..d938b09ad02c 100644
--- a/drivers/remoteproc/qcom_common.h
+++ b/drivers/remoteproc/qcom_common.h
@@ -7,6 +7,7 @@
#include
struct qcom_sysmon;
+struct qcom_q6v5;
struct qcom_rproc_glink {
struct rproc_subdev subdev;
@@ -45,12 +46,14 @@ void qcom_remove_ssr_subdev(struct rproc *rproc, struct
qcom_rproc_ssr *ssr);
#if IS_ENABLED(CONFIG_QCOM_SYSMON)
struct qcom_sysmon *qcom_add_sysmon_subdev(struct rproc *rproc,
const char *name,
- int ssctl_instance);
+ int ssctl_instance,
+ struct qcom_q6v5 *q6v5);
void qcom_remove_sysmon_subdev(struct qcom_sysmon *sysmon);
#else
static inline struct qcom_sysmon *qcom_add_sysmon_subdev(struct rproc *rproc,
const char *name,
-int ssctl_instance)
+int ssctl_instance,
+struct qcom_q6v5 *q6v5)
{
return NULL;
}
diff --git a/drivers/remoteproc/qcom_q6v5.c b/drivers/remoteproc/qcom_q6v5.c
index 0d33e3079f0d..a4c2ecae6a0f 100644
--- a/drivers/remoteproc/qcom_q6v5.c
+++ b/drivers/remoteproc/qcom_q6v5.c
@@ -25,6 +25,7 @@ int qcom_q6v5_prepare(struct qcom_q6v5 *q6v5)
{
reinit_completion(&q6v5->start_done);
reinit_completion(&q6v5->stop_done);
+ reinit_completion(&q6v5->shutdown_done);
q6v5->running = true;
q6v5->handover_issued = false;
@@ -141,6 +142,35 @@ static irqreturn_t q6v5_stop_interrupt(int irq, void *data)
return IRQ_HANDLED;
}
+static irqreturn_t q6v5_shutdown_interrupt(int irq, void *data)
+{
+ struct qcom_q6v5 *q6v5 = data;
+
+ complete(&q6v5->shutdown_done);
+
+ return IRQ_HANDLED;
+}
+
+/**
+ * qcom_q6v5_wait_for_shutdown() - wait for remote processor shutdown signal
+ * @q6v5: reference to qcom_q6v5 context
+ * @timeout: timeout to wait for the event, in jiffies
+ *
+ * Return: 0 on success, -ETIMEDOUT on timeout
+ */
+int qcom_q6v5_wait_for_shutdown(struct qcom_q6v5 *q6v5, int timeout)
+{
+ int ret;
+
+ if (!q6v5->has_shutdown_irq)
+ return 0;
+
+ ret = wait_for_completion_timeout(&q6v5->shutdown_done, timeout);
+
+ return !ret ? -ETIMEDOUT : 0;
+}
+EXPORT_SYMBOL_GPL(qcom_q6v5_wait_for_shutdown);
+
/**
* qcom_q6v5_request_stop() - request the remote processor to stop
* @q6v5: reference to qcom_q6v5 context
@@ -185,6 +215,7 @@ int qcom_q6v5_init(struct qcom_q6v5 *q6v5, struct
platform_device *pdev,
init_completion(&q6v5->start_done);
init_completion(&q6v5->stop_done);
+ init_completion(&q6v5->shutdown_done);
q6v5->wdog_irq = platform_get_irq_byname(pdev, "wdog");
if (q6v5->wdog_irq < 0) {
@@ -277,6 +308,28 @@ int qcom_q6v5_init(struct qcom_q6v5 *q6v5, struct
platform_device *pdev,
return ret;
}
+ if (q6v5->has_shutdown_irq) {
+ q6v5->shutdown_irq = platform_get_irq_byname(pdev,
+"shutdown-ack");
+ if (q6v5->shutdown_irq < 0) {
+ if (q6v5->shutdown_irq != -EPROBE_DEFER)
+ dev_err(&pdev->dev,
+ "failed to get shutdown-ack IRQ: %d\n",
+ q6v5->shutdown_irq);
+ return q6v5->shutdown_irq;
+ }
+
+ ret = devm_request_threaded_irq(&pdev->dev, q6v5->shutdown_irq,
+ NULL, q6v5_shutdown_interrupt,
+ I
[PATCH v2 4/4] remoteproc: qcom: Enable shutdown-ack irq on Q6V5
Enable shutdown-ack irq handling for MSS Q6V5 on SDM845/MSM8996
SoCs and for WCSS Q6V5 on QCS404 SoC.
Signed-off-by: Sibi Sankar
---
drivers/remoteproc/qcom_q6v5_mss.c | 11 ---
drivers/remoteproc/qcom_q6v5_pas.c | 9 +++--
2 files changed, 15 insertions(+), 5 deletions(-)
diff --git a/drivers/remoteproc/qcom_q6v5_mss.c
b/drivers/remoteproc/qcom_q6v5_mss.c
index 3bc2dec85928..fdb18d1ea177 100644
--- a/drivers/remoteproc/qcom_q6v5_mss.c
+++ b/drivers/remoteproc/qcom_q6v5_mss.c
@@ -134,6 +134,7 @@ struct rproc_hexagon_res {
int version;
bool need_mem_protection;
bool has_alt_reset;
+ u8 has_shutdown_irq;
};
struct q6v5 {
@@ -1252,6 +1253,7 @@ static int q6v5_probe(struct platform_device *pdev)
{
const struct rproc_hexagon_res *desc;
struct q6v5 *qproc;
+ struct qcom_q6v5 *q6v5;
struct rproc *rproc;
int ret;
@@ -1273,6 +1275,7 @@ static int q6v5_probe(struct platform_device *pdev)
qproc->dev = &pdev->dev;
qproc->rproc = rproc;
platform_set_drvdata(pdev, qproc);
+ q6v5 = &qproc->q6v5;
ret = q6v5_init_mem(qproc, pdev);
if (ret)
@@ -1330,7 +1333,8 @@ static int q6v5_probe(struct platform_device *pdev)
qproc->version = desc->version;
qproc->need_mem_protection = desc->need_mem_protection;
- ret = qcom_q6v5_init(&qproc->q6v5, pdev, rproc, MPSS_CRASH_REASON_SMEM,
+ q6v5->has_shutdown_irq = desc->has_shutdown_irq;
+ ret = qcom_q6v5_init(q6v5, pdev, rproc, MPSS_CRASH_REASON_SMEM,
qcom_msa_handover);
if (ret)
goto free_rproc;
@@ -1340,8 +1344,7 @@ static int q6v5_probe(struct platform_device *pdev)
qcom_add_glink_subdev(rproc, &qproc->glink_subdev);
qcom_add_smd_subdev(rproc, &qproc->smd_subdev);
qcom_add_ssr_subdev(rproc, &qproc->ssr_subdev, "mpss");
- qproc->sysmon = qcom_add_sysmon_subdev(rproc, "modem", 0x12,
- &qproc->q6v5);
+ qproc->sysmon = qcom_add_sysmon_subdev(rproc, "modem", 0x12, q6v5);
ret = rproc_add(rproc);
if (ret)
@@ -1391,6 +1394,7 @@ static const struct rproc_hexagon_res sdm845_mss = {
},
.need_mem_protection = true,
.has_alt_reset = true,
+ .has_shutdown_irq = true,
.version = MSS_SDM845,
};
@@ -1410,6 +1414,7 @@ static const struct rproc_hexagon_res msm8996_mss = {
},
.need_mem_protection = true,
.has_alt_reset = false,
+ .has_shutdown_irq = true,
.version = MSS_MSM8996,
};
diff --git a/drivers/remoteproc/qcom_q6v5_pas.c
b/drivers/remoteproc/qcom_q6v5_pas.c
index 920a39ea6609..2d6ff59575cd 100644
--- a/drivers/remoteproc/qcom_q6v5_pas.c
+++ b/drivers/remoteproc/qcom_q6v5_pas.c
@@ -43,6 +43,7 @@ struct adsp_data {
const char *ssr_name;
const char *sysmon_name;
int ssctl_id;
+ u8 has_shutdown_irq;
};
struct qcom_adsp {
@@ -257,6 +258,7 @@ static int adsp_probe(struct platform_device *pdev)
{
const struct adsp_data *desc;
struct qcom_adsp *adsp;
+ struct qcom_q6v5 *q6v5;
struct rproc *rproc;
int ret;
@@ -280,6 +282,7 @@ static int adsp_probe(struct platform_device *pdev)
adsp->pas_id = desc->pas_id;
adsp->has_aggre2_clk = desc->has_aggre2_clk;
platform_set_drvdata(pdev, adsp);
+ q6v5 = &adsp->q6v5;
ret = adsp_alloc_memory_region(adsp);
if (ret)
@@ -293,7 +296,8 @@ static int adsp_probe(struct platform_device *pdev)
if (ret)
goto free_rproc;
- ret = qcom_q6v5_init(&adsp->q6v5, pdev, rproc, desc->crash_reason_smem,
+ q6v5->has_shutdown_irq = desc->has_shutdown_irq;
+ ret = qcom_q6v5_init(q6v5, pdev, rproc, desc->crash_reason_smem,
qcom_pas_handover);
if (ret)
goto free_rproc;
@@ -304,7 +308,7 @@ static int adsp_probe(struct platform_device *pdev)
adsp->sysmon = qcom_add_sysmon_subdev(rproc,
desc->sysmon_name,
desc->ssctl_id,
- &adsp->q6v5);
+ q6v5);
ret = rproc_add(rproc);
if (ret)
@@ -366,6 +370,7 @@ static const struct adsp_data slpi_resource_init = {
static const struct adsp_data wcss_resource_init = {
.crash_reason_smem = 421,
.firmware_name = "wcnss.mdt",
+ .has_shutdown_irq = true,
.pas_id = 6,
.ssr_name = "mpss",
.sysmon_name = "wcnss",
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project
[PATCH v2 3/4] remoteproc: qcom: Wait for shutdown-ack/ind on sysmon shutdown
After sending a sysmon shutdown request to the SSCTL service on the
subsystem, wait for the service to send shutdown-ack interrupt or
an indication message to signal the completion of graceful shutdown.
Signed-off-by: Sibi Sankar
---
drivers/remoteproc/qcom_sysmon.c | 40 +++-
1 file changed, 39 insertions(+), 1 deletion(-)
diff --git a/drivers/remoteproc/qcom_sysmon.c b/drivers/remoteproc/qcom_sysmon.c
index c0d6ee8de995..0da83638ca99 100644
--- a/drivers/remoteproc/qcom_sysmon.c
+++ b/drivers/remoteproc/qcom_sysmon.c
@@ -36,6 +36,7 @@ struct qcom_sysmon {
struct rpmsg_endpoint *ept;
struct completion comp;
+ struct completion ind_comp;
struct mutex lock;
bool ssr_ack;
@@ -139,6 +140,7 @@ static int sysmon_callback(struct rpmsg_device *rpdev, void
*data, int count,
}
#define SSCTL_SHUTDOWN_REQ 0x21
+#define SSCTL_SHUTDOWN_READY_IND 0x21
#define SSCTL_SUBSYS_EVENT_REQ 0x23
#define SSCTL_MAX_MSG_LEN 7
@@ -254,6 +256,29 @@ static struct qmi_elem_info ssctl_subsys_event_resp_ei[] =
{
{}
};
+static struct qmi_elem_info ssctl_shutdown_ind_ei[] = {
+ {}
+};
+
+static void sysmon_ind_cb(struct qmi_handle *qmi, struct sockaddr_qrtr *sq,
+ struct qmi_txn *txn, const void *data)
+{
+ struct qcom_sysmon *sysmon = container_of(qmi, struct qcom_sysmon, qmi);
+
+ complete(&sysmon->ind_comp);
+}
+
+static struct qmi_msg_handler qmi_indication_handler[] = {
+ {
+ .type = QMI_INDICATION,
+ .msg_id = SSCTL_SHUTDOWN_READY_IND,
+ .ei = ssctl_shutdown_ind_ei,
+ .decoded_size = 0,
+ .fn = sysmon_ind_cb
+ },
+ {}
+};
+
/**
* ssctl_request_shutdown() - request shutdown via SSCTL QMI service
* @sysmon:sysmon context
@@ -264,6 +289,7 @@ static void ssctl_request_shutdown(struct qcom_sysmon
*sysmon)
struct qmi_txn txn;
int ret;
+ reinit_completion(&sysmon->ind_comp);
ret = qmi_txn_init(&sysmon->qmi, &txn, ssctl_shutdown_resp_ei, &resp);
if (ret < 0) {
dev_err(sysmon->dev, "failed to allocate QMI txn\n");
@@ -285,6 +311,16 @@ static void ssctl_request_shutdown(struct qcom_sysmon
*sysmon)
dev_err(sysmon->dev, "shutdown request failed\n");
else
dev_dbg(sysmon->dev, "shutdown request completed\n");
+
+ if (sysmon->q6v5) {
+ ret = qcom_q6v5_wait_for_shutdown(sysmon->q6v5, 10 * HZ);
+ if (ret) {
+ ret = try_wait_for_completion(&sysmon->ind_comp);
+ if (!ret)
+ dev_err(sysmon->dev,
+ "timeout waiting for shutdown ack\n");
+ }
+ }
}
/**
@@ -462,9 +498,11 @@ struct qcom_sysmon *qcom_add_sysmon_subdev(struct rproc
*rproc,
sysmon->q6v5 = q6v5;
init_completion(&sysmon->comp);
+ init_completion(&sysmon->ind_comp);
mutex_init(&sysmon->lock);
- ret = qmi_handle_init(&sysmon->qmi, SSCTL_MAX_MSG_LEN, &ssctl_ops,
NULL);
+ ret = qmi_handle_init(&sysmon->qmi, SSCTL_MAX_MSG_LEN, &ssctl_ops,
+ qmi_indication_handler);
if (ret < 0) {
dev_err(sysmon->dev, "failed to initialize qmi handle\n");
kfree(sysmon);
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project
[PATCH v3 1/8] dt-bindings: soc: qcom: Add remote-pid binding for GLINK SMEM
Add missing qcom,remote-pid dt binding required for GLINK SMEM
which specifies the remote endpoint of the GLINK edge.
Fixes: 2b41d6c8e696 ("dt-bindings: soc: qcom: Extend GLINK to cover
SMEM")
Signed-off-by: Sibi Sankar
Reviewed-by: Doug Anderson
---
v3:
* Fixed typo
Documentation/devicetree/bindings/soc/qcom/qcom,glink.txt | 5 +
1 file changed, 5 insertions(+)
diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,glink.txt
b/Documentation/devicetree/bindings/soc/qcom/qcom,glink.txt
index 0b8cc533ca83..587bb1ddc8cc 100644
--- a/Documentation/devicetree/bindings/soc/qcom/qcom,glink.txt
+++ b/Documentation/devicetree/bindings/soc/qcom/qcom,glink.txt
@@ -21,6 +21,11 @@ edge.
Definition: should specify the IRQ used by the remote processor to
signal this processor about communication related events
+- qcom,remote-pid:
+ Usage: required for glink-smem
+ Value type:
+ Definition: specifies the identifier of the remote endpoint of this edge
+
- qcom,rpm-msg-ram:
Usage: required for glink-rpm
Value type:
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project
[PATCH v3 7/8] dt-bindings: remoteproc: qcom: Add power-domain bindings for Q6V5
Add power-domain bindings for Q6V5 MSS on MSM8996 and SDM845 SoCs. Signed-off-by: Sibi Sankar --- v3: * Fixup dt-binding documentation as suggested by Doug * Dropping Rob's Reviewed-by due to documentation style change v2: * Add load_state power-domain * List cx and mx power-domains for MSM8996 .../bindings/remoteproc/qcom,q6v5.txt | 19 +++ 1 file changed, 19 insertions(+) diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt b/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt index 65713de70be5..17ecaae5e5e0 100644 --- a/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt +++ b/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt @@ -106,6 +106,25 @@ For the compatible string below the following supplies are required: Definition: reference to the regulators to be held on behalf of the booting of the Hexagon core +- power-domains: + Usage: required + Value type: + Definition: reference to power-domains that match power-domain-names + +- power-domain-names: + Usage: required + Value type: + Definition: The power-domains needed depend on the compatible string: + qcom,q6v5-pil: + qcom,ipq8074-wcss-pil: + qcom,msm8916-mss-pil: + qcom,msm8974-mss-pil: + no power-domain names required + qcom,msm8996-mss-pil: + must be "cx", "mx" + qcom,sdm845-mss-pil: + must be "cx", "mx", "mss", "load_state" + - qcom,smem-states: Usage: required Value type: -- The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project
[PATCH v3 2/8] dt-bindings: remoteproc: qcom: Add missing clocks for SDM845
Add missing clock bindings for Q6V5 MSS on SDM845 SoCs.
Fixes: fb22022ff63d ("dt-bindings: remoteproc: Add Q6v5 Modem PIL
binding for SDM845")
Signed-off-by: Sibi Sankar
---
v3:
* Fixup dt-binding documentation as suggested by Doug
.../devicetree/bindings/remoteproc/qcom,q6v5.txt | 14 +++---
1 file changed, 11 insertions(+), 3 deletions(-)
diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt
b/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt
index 9ff5b0309417..20dd19f9ed99 100644
--- a/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt
+++ b/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt
@@ -39,13 +39,21 @@ on the Qualcomm Hexagon core.
- clocks:
Usage: required
Value type:
- Definition: reference to the iface, bus and mem clocks to be held on
- behalf of the booting of the Hexagon core
+ Definition: reference to the clocks that match clock-names
- clock-names:
Usage: required
Value type:
- Definition: must be "iface", "bus", "mem"
+ Definition: The clocks needed depend on the compatible string:
+ qcom,ipq8074-wcss-pil:
+ no clock names required
+ qcom,q6v5-pil:
+ qcom,msm8916-mss-pil:
+ qcom,msm8974-mss-pil:
+ must be "iface", "bus", "mem", "xo"
+ qcom,sdm845-mss-pil:
+ must be "xo", "prng", "iface", "bus", "mem", "gpll0_mss",
+ "snoc_axi", "mnoc_axi"
- resets:
Usage: required
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project
[PATCH v3 3/8] dt-bindings: remoteproc: qcom: Add missing clocks for MSM8996
Add missing clock bindings for Q6V5 MSS on MSM8996 SoCs.
Fixes: 9f058fa2efb1 ("remoteproc: qcom: Add support for mss remoteproc
on msm8996")
Signed-off-by: Sibi Sankar
---
v3:
* Fixup dt-binding documentation as suggested by Doug
Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt | 3 +++
1 file changed, 3 insertions(+)
diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt
b/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt
index 20dd19f9ed99..af8788783e2b 100644
--- a/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt
+++ b/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt
@@ -51,6 +51,9 @@ on the Qualcomm Hexagon core.
qcom,msm8916-mss-pil:
qcom,msm8974-mss-pil:
must be "iface", "bus", "mem", "xo"
+ qcom,msm8996-mss-pil:
+ must be "xo", "pnoc", "qdss", "iface", "bus", "mem",
+ "gpll0_mss_clk", "snoc_axi", "mnoc_axi"
qcom,sdm845-mss-pil:
must be "xo", "prng", "iface", "bus", "mem", "gpll0_mss",
"snoc_axi", "mnoc_axi"
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project
[PATCH v3 8/8] arm64: dts: qcom: sdm845: Add Q6V5 MSS node
This patch adds Q6V5 MSS remoteproc node for SDM845 SoCs.
Signed-off-by: Sibi Sankar
Reviewed-by: Douglas Anderson
---
v3:
* with shutdown-ack irq redesign make it mandatory,
merge multiple patches into a single one
v2:
* Fixed style changes
* Added missing clocks in the dt-bindings
* Split mss remoteproc node into a number of patches
This patch depends on the following bindings:
https://patchwork.kernel.org/patch/10662089/ - mba/mpss reserved regions
https://patchwork.kernel.org/patch/10657325/ - pdc reset node
https://patchwork.kernel.org/patch/10740127/ - rpmhpd dt bindings
https://patchwork.kernel.org/patch/10740109/ - rpmhpd dt node
https://patchwork.kernel.org/patch/10678301/ - AOP QMP dt bindings
https://patchwork.kernel.org/patch/10742083/ - shutdown-irq binding
arch/arm64/boot/dts/qcom/sdm845.dtsi | 60
1 file changed, 60 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi
b/arch/arm64/boot/dts/qcom/sdm845.dtsi
index 5da9fa1feb8a..db17216a5bce 100644
--- a/arch/arm64/boot/dts/qcom/sdm845.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi
@@ -1366,6 +1366,66 @@
};
};
+ remoteproc@408 {
+ compatible = "qcom,sdm845-mss-pil";
+ reg = <0x0408 0x408>, <0x0418 0x48>;
+ reg-names = "qdsp6", "rmb";
+
+ interrupts-extended =
+ <&intc GIC_SPI 266 IRQ_TYPE_EDGE_RISING>,
+ <&modem_smp2p_in 0 IRQ_TYPE_EDGE_RISING>,
+ <&modem_smp2p_in 1 IRQ_TYPE_EDGE_RISING>,
+ <&modem_smp2p_in 2 IRQ_TYPE_EDGE_RISING>,
+ <&modem_smp2p_in 3 IRQ_TYPE_EDGE_RISING>,
+ <&modem_smp2p_in 7 IRQ_TYPE_EDGE_RISING>;
+ interrupt-names = "wdog", "fatal", "ready",
+ "handover", "stop-ack",
+ "shutdown-ack";
+
+ clocks = <&gcc GCC_MSS_CFG_AHB_CLK>,
+<&gcc GCC_MSS_Q6_MEMNOC_AXI_CLK>,
+<&gcc GCC_BOOT_ROM_AHB_CLK>,
+<&gcc GCC_MSS_GPLL0_DIV_CLK_SRC>,
+<&gcc GCC_MSS_SNOC_AXI_CLK>,
+<&gcc GCC_MSS_MFAB_AXIS_CLK>,
+<&gcc GCC_PRNG_AHB_CLK>,
+<&rpmhcc RPMH_CXO_CLK>;
+ clock-names = "iface", "bus", "mem", "gpll0_mss",
+ "snoc_axi", "mnoc_axi", "prng", "xo";
+
+ qcom,smem-states = <&modem_smp2p_out 0>;
+ qcom,smem-state-names = "stop";
+
+ resets = <&aoss_reset AOSS_CC_MSS_RESTART>,
+<&pdc_reset PDC_MODEM_SYNC_RESET>;
+ reset-names = "mss_restart", "pdc_reset";
+
+ qcom,halt-regs = <&tcsr_mutex_regs
+ 0x23000 0x25000 0x24000>;
+
+ power-domains = <&aoss_qmp_pd AOSS_QMP_LS_MODEM>,
+ <&rpmhpd SDM845_CX>,
+ <&rpmhpd SDM845_MX>,
+ <&rpmhpd SDM845_MSS>;
+ power-domain-names = "load_state", "cx", "mx", "mss";
+
+ mba {
+ memory-region = <&mba_region>;
+ };
+
+ mpss {
+ memory-region = <&mpss_region>;
+ };
+
+ glink-edge {
+ interrupts = ;
+ label = "modem";
+ qcom,remote-pid = <1>;
+ mboxes = <&apss_shared 12>;
+ mbox-names = "mpss_smem";
+ };
+ };
+
usb_1_hsphy: phy@88e2000 {
compatible = "qcom,sdm845-qusb2-phy";
reg = <0x88e2000 0x400>;
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project
[PATCH v3 6/8] remoteproc: qcom: q6v5-mss: Add missing regulator for MSM8996
Add proxy vote for pll supply on MSM8996 SoC.
Fixes: 9f058fa2efb1 ("remoteproc: qcom: Add support for mss remoteproc
on msm8996")
Signed-off-by: Sibi Sankar
---
drivers/remoteproc/qcom_q6v5_mss.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/drivers/remoteproc/qcom_q6v5_mss.c
b/drivers/remoteproc/qcom_q6v5_mss.c
index 2f12901dd1a7..f80b17b16e98 100644
--- a/drivers/remoteproc/qcom_q6v5_mss.c
+++ b/drivers/remoteproc/qcom_q6v5_mss.c
@@ -1395,6 +1395,13 @@ static const struct rproc_hexagon_res sdm845_mss = {
static const struct rproc_hexagon_res msm8996_mss = {
.hexagon_mba_image = "mba.mbn",
+ .proxy_supply = (struct qcom_mss_reg_res[]) {
+ {
+ .supply = "pll",
+ .uA = 10,
+ },
+ {}
+ },
.proxy_clk_names = (char*[]){
"xo",
"pnoc",
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project
[PATCH v3 5/8] dt-bindings: remoteproc: qcom: Fixup regulator dependencies
Fixup regulator supply dependencies for Q6V5 MSS on MSM996 SoCs.
Fixes: 9f058fa2efb1 ("remoteproc: qcom: Add support for mss remoteproc
on msm8996")
Signed-off-by: Sibi Sankar
---
v3:
* Fixup dt-binding documentation as suggested by Doug
.../bindings/remoteproc/qcom,q6v5.txt | 21 +++
1 file changed, 21 insertions(+)
diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt
b/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt
index af8788783e2b..65713de70be5 100644
--- a/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt
+++ b/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt
@@ -76,6 +76,19 @@ on the Qualcomm Hexagon core.
must be "mss_restart", "pdc_reset" for the modem
sub-system on SDM845 SoCs
+For the compatible strings below the following supplies are required:
+ "qcom,q6v5-pil"
+ "qcom,msm8916-mss-pil",
+- cx-supply:
+- mx-supply:
+- pll-supply:
+ Usage: required
+ Value type:
+ Definition: reference to the regulators to be held on behalf of the
+ booting of the Hexagon core
+
+For the compatible string below the following supplies are required:
+ "qcom,msm8974-mss-pil"
- cx-supply:
- mss-supply:
- mx-supply:
@@ -85,6 +98,14 @@ on the Qualcomm Hexagon core.
Definition: reference to the regulators to be held on behalf of the
booting of the Hexagon core
+For the compatible string below the following supplies are required:
+ "qcom,msm8996-mss-pil"
+- pll-supply:
+ Usage: required
+ Value type:
+ Definition: reference to the regulators to be held on behalf of the
+ booting of the Hexagon core
+
- qcom,smem-states:
Usage: required
Value type:
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project
[PATCH v3 4/8] remoteproc: qcom: q6v5-mss: Add missing clocks for MSM8996
Proxy vote for QDSS clock and remove vote on handover interrupt
to provide MSS PBL with access to STM hardware registers during
boot. Add "snoc_axi" and "mnoc_axi" to the active clock list.
Fixes: 9f058fa2efb1 ("remoteproc: qcom: Add support for mss remoteproc
on msm8996")
Signed-off-by: Sibi Sankar
---
drivers/remoteproc/qcom_q6v5_mss.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/remoteproc/qcom_q6v5_mss.c
b/drivers/remoteproc/qcom_q6v5_mss.c
index 01be7314e176..2f12901dd1a7 100644
--- a/drivers/remoteproc/qcom_q6v5_mss.c
+++ b/drivers/remoteproc/qcom_q6v5_mss.c
@@ -1398,6 +1398,7 @@ static const struct rproc_hexagon_res msm8996_mss = {
.proxy_clk_names = (char*[]){
"xo",
"pnoc",
+ "qdss",
NULL
},
.active_clk_names = (char*[]){
@@ -1405,6 +1406,8 @@ static const struct rproc_hexagon_res msm8996_mss = {
"bus",
"mem",
"gpll0_mss_clk",
+ "snoc_axi",
+ "mnoc_axi",
NULL
},
.need_mem_protection = true,
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project
Re: [PATCH v3 2/8] dt-bindings: remoteproc: qcom: Add missing clocks for SDM845
Hi Rob,
Thanks for the review!
On 2018-12-28 02:51, Rob Herring wrote:
On Wed, Dec 26, 2018 at 06:22:23PM +0530, Sibi Sankar wrote:
Add missing clock bindings for Q6V5 MSS on SDM845 SoCs.
Fixes: fb22022ff63d ("dt-bindings: remoteproc: Add Q6v5 Modem PIL
binding for SDM845")
Signed-off-by: Sibi Sankar
---
v3:
* Fixup dt-binding documentation as suggested by Doug
.../devicetree/bindings/remoteproc/qcom,q6v5.txt | 14
+++---
1 file changed, 11 insertions(+), 3 deletions(-)
diff --git
a/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt
b/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt
index 9ff5b0309417..20dd19f9ed99 100644
--- a/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt
+++ b/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt
@@ -39,13 +39,21 @@ on the Qualcomm Hexagon core.
- clocks:
Usage: required
Value type:
- Definition: reference to the iface, bus and mem clocks to be held on
- behalf of the booting of the Hexagon core
+ Definition: reference to the clocks that match clock-names
- clock-names:
Usage: required
Value type:
- Definition: must be "iface", "bus", "mem"
+ Definition: The clocks needed depend on the compatible string:
+ qcom,ipq8074-wcss-pil:
+ no clock names required
+ qcom,q6v5-pil:
+ qcom,msm8916-mss-pil:
+ qcom,msm8974-mss-pil:
+ must be "iface", "bus", "mem", "xo"
+ qcom,sdm845-mss-pil:
+ must be "xo", "prng", "iface", "bus", "mem", "gpll0_mss",
+ "snoc_axi", "mnoc_axi"
Please keep the same order for the 4 clocks which are the same.
Will re-order them in the next re-spin.
Rob
--
-- Sibi Sankar --
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project.
Re: [PATCH 1/2] dt-bindings: remoteproc: qcom: Add firmware bindings for Q6V5 MSS
Hi Rob, Thanks for the review :) On 2018-12-21 01:40, Rob Herring wrote: On Wed, Dec 12, 2018 at 06:14:55PM +0530, Sibi Sankar wrote: Add optional firmware bindings for Q6V5 MSS. It lists the two relative firmware paths which are used for booting and authenticating the Hexagon core. Signed-off-by: Sibi Sankar --- Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt | 7 +++ 1 file changed, 7 insertions(+) diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt b/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt index 9ff5b0309417..1f6988a60636 100644 --- a/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt +++ b/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt @@ -36,6 +36,13 @@ on the Qualcomm Hexagon core. Value type: Definition: must be "wdog", "fatal", "ready", "handover", "stop-ack" +- qcom,firmware: We already have a standard name 'firmware-name'. Use that. I'm fine with allowing it to be more than 1 string. sure will replace "qcom,firmware" with "firmware-name" in the next re-spin + Usage: optional + Value type: + Definition: must list the 2 relative firmware paths (mba and modem + metadata respectively) which are used for booting and + authenticating the Hexagon core. + - clocks: Usage: required Value type: -- The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project -- -- Sibi Sankar -- Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, a Linux Foundation Collaborative Project.
[PATCH v2 1/2] dt-bindings: remoteproc: qcom: Add firmware bindings for Q6V5
Add optional "firmware-name" bindings for Q6V5 MSS and PAS based remoteprocs. For Q6V5 MSS/PAS the two/one relative firmware paths/path are to be listed respectively. Fallback to the default images for mba/modem for Q6V5 MSS or the default Hexagon image for Q6V5 PAS if the "firmware-name" binding is not present. Signed-off-by: Sibi Sankar --- Documentation/devicetree/bindings/remoteproc/qcom,adsp.txt | 6 ++ Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt | 7 +++ 2 files changed, 13 insertions(+) diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,adsp.txt b/Documentation/devicetree/bindings/remoteproc/qcom,adsp.txt index 9c0cff3a5ed8..60ee0f73071a 100644 --- a/Documentation/devicetree/bindings/remoteproc/qcom,adsp.txt +++ b/Documentation/devicetree/bindings/remoteproc/qcom,adsp.txt @@ -27,6 +27,12 @@ on the Qualcomm ADSP Hexagon core. Value type: Definition: must be "wdog", "fatal", "ready", "handover", "stop-ack" +- firmware-name: + Usage: optional + Value type: + Definition: must list the relative firmware image path for the + Hexagon Core. + - clocks: Usage: required Value type: diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt b/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt index 9ff5b0309417..3a99e7379d8c 100644 --- a/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt +++ b/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt @@ -36,6 +36,13 @@ on the Qualcomm Hexagon core. Value type: Definition: must be "wdog", "fatal", "ready", "handover", "stop-ack" +- firmware-name: + Usage: optional + Value type: + Definition: must list the relative firmware image paths for mba and + modem. They are used for booting and authenticating the + Hexagon core. + - clocks: Usage: required Value type: -- The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project
[PATCH v2 0/2] Add firmware bindings for Q6V5 MSS/PAS
Q6V5 MSS on certain SoCs like SDM845 are capable of operating under
completely different configuration (like Non-Modem WLAN configuration)
depending on the firmware loaded without any change in boot sequence
of the Hexagon core. The patch series is ultimately aimed to avoid
multiple compatibles per SoC to just specify different upstreamed firmware
locations. This is achieved by using "firmware-name" binding to store
the relative path of mba/modem/pas firmware images.
remoteproc@408 {
...
firmware-name = "qcom/sdm845/mss/mba.mbn",
"qcom/sdm845/mss/modem.mdt";
...
}
remoteproc@1730 {
...
firmware-name = "qcom/sdm845/lpass/adsp.mdt";
...
}
Suggested-by: Bjorn Andersson
v2:
* Replace "qcom,firmware" with "firmware-name" as suggested
by Rob
* Include dt-bindings/parsing logic for PAS based remoteprocs
Sibi Sankar (2):
dt-bindings: remoteproc: qcom: Add firmware bindings for Q6V5
remoteproc: qcom: Add support for parsing fw dt bindings
.../bindings/remoteproc/qcom,adsp.txt | 6 +++
.../bindings/remoteproc/qcom,q6v5.txt | 7 +++
drivers/remoteproc/qcom_q6v5_mss.c| 46 +++
drivers/remoteproc/qcom_q6v5_pas.c| 11 -
4 files changed, 59 insertions(+), 11 deletions(-)
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project
[PATCH v2 2/2] remoteproc: qcom: Add support for parsing fw dt bindings
Add support for parsing "firmware-name" dt bindings which specifies
the relative paths of mba/modem/pas image as strings. Fallback to
the default paths for mba/modem/pas image on -EINVAL.
Signed-off-by: Sibi Sankar
---
drivers/remoteproc/qcom_q6v5_mss.c | 46 +++---
drivers/remoteproc/qcom_q6v5_pas.c | 11 ++-
2 files changed, 46 insertions(+), 11 deletions(-)
diff --git a/drivers/remoteproc/qcom_q6v5_mss.c
b/drivers/remoteproc/qcom_q6v5_mss.c
index 01be7314e176..c75179006e24 100644
--- a/drivers/remoteproc/qcom_q6v5_mss.c
+++ b/drivers/remoteproc/qcom_q6v5_mss.c
@@ -188,6 +188,7 @@ struct q6v5 {
bool has_alt_reset;
int mpss_perm;
int mba_perm;
+ const char *hexagon_mdt_image;
int version;
};
@@ -860,17 +861,27 @@ static int q6v5_mpss_load(struct q6v5 *qproc)
phys_addr_t min_addr = PHYS_ADDR_MAX;
phys_addr_t max_addr = 0;
bool relocate = false;
- char seg_name[10];
+ char *fw_name;
+ size_t fw_name_len;
ssize_t offset;
size_t size = 0;
void *ptr;
int ret;
int i;
- ret = request_firmware(&fw, "modem.mdt", qproc->dev);
+ fw_name_len = strlen(qproc->hexagon_mdt_image);
+ if (fw_name_len <= 4)
+ return -EINVAL;
+
+ fw_name = kstrdup(qproc->hexagon_mdt_image, GFP_KERNEL);
+ if (!fw_name)
+ return -ENOMEM;
+
+ ret = request_firmware(&fw, qproc->hexagon_mdt_image, qproc->dev);
if (ret < 0) {
- dev_err(qproc->dev, "unable to load modem.mdt\n");
- return ret;
+ dev_err(qproc->dev, "unable to load %s\n",
+ qproc->hexagon_mdt_image);
+ goto out;
}
/* Initialize the RMB validator */
@@ -918,10 +929,12 @@ static int q6v5_mpss_load(struct q6v5 *qproc)
ptr = qproc->mpss_region + offset;
if (phdr->p_filesz) {
- snprintf(seg_name, sizeof(seg_name), "modem.b%02d", i);
- ret = request_firmware(&seg_fw, seg_name, qproc->dev);
+ snprintf(fw_name + fw_name_len - 3, fw_name_len,
+"b%02d", i);
+ ret = request_firmware(&seg_fw, fw_name, qproc->dev);
if (ret) {
- dev_err(qproc->dev, "failed to load %s\n",
seg_name);
+ dev_err(qproc->dev, "failed to load %s\n",
+ fw_name);
goto release_firmware;
}
@@ -960,6 +973,8 @@ static int q6v5_mpss_load(struct q6v5 *qproc)
release_firmware:
release_firmware(fw);
+out:
+ kfree(fw_name);
return ret < 0 ? ret : 0;
}
@@ -1075,9 +1090,10 @@ static int qcom_q6v5_register_dump_segments(struct rproc
*rproc,
unsigned long i;
int ret;
- ret = request_firmware(&fw, "modem.mdt", qproc->dev);
+ ret = request_firmware(&fw, qproc->hexagon_mdt_image, qproc->dev);
if (ret < 0) {
- dev_err(qproc->dev, "unable to load modem.mdt\n");
+ dev_err(qproc->dev, "unable to load %s\n",
+ qproc->hexagon_mdt_image);
return ret;
}
@@ -1253,6 +1269,8 @@ static int q6v5_probe(struct platform_device *pdev)
const struct rproc_hexagon_res *desc;
struct q6v5 *qproc;
struct rproc *rproc;
+ const char *mba_image;
+ const char *fw_name[2];
int ret;
desc = of_device_get_match_data(&pdev->dev);
@@ -1262,8 +1280,15 @@ static int q6v5_probe(struct platform_device *pdev)
if (desc->need_mem_protection && !qcom_scm_is_available())
return -EPROBE_DEFER;
+ ret = of_property_read_string_array(pdev->dev.of_node, "firmware-name",
+ fw_name, 2);
+ if (ret != -EINVAL && ret != 2)
+ return ret > 0 ? -EINVAL : ret;
+
+ mba_image = (ret != 2) ? desc->hexagon_mba_image : fw_name[0];
+
rproc = rproc_alloc(&pdev->dev, pdev->name, &q6v5_ops,
- desc->hexagon_mba_image, sizeof(*qproc));
+ mba_image, sizeof(*qproc));
if (!rproc) {
dev_err(&pdev->dev, "failed to allocate rproc\n");
return -ENOMEM;
@@ -1272,6 +1297,7 @@ static int q6v5_probe(struct platform_device *pdev)
qproc = (struct q6v5 *)rproc->priv;
qproc->dev = &pdev->dev;
qproc->rproc = rproc;
+ qproc->hexagon_mdt_image = (r
[PATCH v4 4/8] remoteproc: qcom: q6v5-mss: Add missing clocks for MSM8996
Proxy vote for QDSS clock and remove vote on handover interrupt
to provide MSS PBL with access to STM hardware registers during
boot. Add "snoc_axi" and "mnoc_axi" to the active clock list.
Rename "gpll0_mss_clk" to "gpll0_mss" for consistency across SoCs.
Fixes: 9f058fa2efb1 ("remoteproc: qcom: Add support for mss remoteproc
on msm8996")
Signed-off-by: Sibi Sankar
---
v4:
* Rename "gpll0_mss_clk" to "gpll0_mss" for consistency across
SoCs
drivers/remoteproc/qcom_q6v5_mss.c | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/remoteproc/qcom_q6v5_mss.c
b/drivers/remoteproc/qcom_q6v5_mss.c
index 01be7314e176..cb5f0d3ac6a3 100644
--- a/drivers/remoteproc/qcom_q6v5_mss.c
+++ b/drivers/remoteproc/qcom_q6v5_mss.c
@@ -1398,13 +1398,16 @@ static const struct rproc_hexagon_res msm8996_mss = {
.proxy_clk_names = (char*[]){
"xo",
"pnoc",
+ "qdss",
NULL
},
.active_clk_names = (char*[]){
"iface",
"bus",
"mem",
- "gpll0_mss_clk",
+ "gpll0_mss",
+ "snoc_axi",
+ "mnoc_axi",
NULL
},
.need_mem_protection = true,
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project
[PATCH v4 3/8] dt-bindings: remoteproc: qcom: Add missing clocks for MSM8996
Add missing clock bindings for Q6V5 MSS on MSM8996 SoCs.
Fixes: 9f058fa2efb1 ("remoteproc: qcom: Add support for mss remoteproc
on msm8996")
Signed-off-by: Sibi Sankar
---
v4:
* Re-order clocks for consistency as suggested by Rob
v3:
* Fixup dt-binding documentation as suggested by Doug
Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt | 3 +++
1 file changed, 3 insertions(+)
diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt
b/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt
index d645c8db29fd..bba3d6be71c0 100644
--- a/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt
+++ b/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt
@@ -51,6 +51,9 @@ on the Qualcomm Hexagon core.
qcom,msm8916-mss-pil:
qcom,msm8974-mss-pil:
must be "iface", "bus", "mem", "xo"
+ qcom,msm8996-mss-pil:
+ must be "iface", "bus", "mem", "xo", "gpll0_mss",
+ "snoc_axi", "mnoc_axi", "pnoc", "qdss"
qcom,sdm845-mss-pil:
must be "iface", "bus", "mem", "xo", "gpll0_mss",
"snoc_axi", "mnoc_axi", "prng"
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project
[PATCH v4 2/8] dt-bindings: remoteproc: qcom: Add missing clocks for SDM845
Add missing clock bindings for Q6V5 MSS on SDM845 SoCs.
Fixes: fb22022ff63d ("dt-bindings: remoteproc: Add Q6v5 Modem PIL
binding for SDM845")
Signed-off-by: Sibi Sankar
---
v4:
* Re-order clocks for consistency as suggested by Rob
v3:
* Fixup dt-binding documentation as suggested by Doug
.../devicetree/bindings/remoteproc/qcom,q6v5.txt | 14 +++---
1 file changed, 11 insertions(+), 3 deletions(-)
diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt
b/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt
index 9ff5b0309417..d645c8db29fd 100644
--- a/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt
+++ b/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt
@@ -39,13 +39,21 @@ on the Qualcomm Hexagon core.
- clocks:
Usage: required
Value type:
- Definition: reference to the iface, bus and mem clocks to be held on
- behalf of the booting of the Hexagon core
+ Definition: reference to the clocks that match clock-names
- clock-names:
Usage: required
Value type:
- Definition: must be "iface", "bus", "mem"
+ Definition: The clocks needed depend on the compatible string:
+ qcom,ipq8074-wcss-pil:
+ no clock names required
+ qcom,q6v5-pil:
+ qcom,msm8916-mss-pil:
+ qcom,msm8974-mss-pil:
+ must be "iface", "bus", "mem", "xo"
+ qcom,sdm845-mss-pil:
+ must be "iface", "bus", "mem", "xo", "gpll0_mss",
+ "snoc_axi", "mnoc_axi", "prng"
- resets:
Usage: required
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project
[PATCH v4 1/8] dt-bindings: soc: qcom: Add remote-pid binding for GLINK SMEM
Add missing qcom,remote-pid dt binding required for GLINK SMEM
which specifies the remote endpoint of the GLINK edge.
Fixes: 2b41d6c8e696 ("dt-bindings: soc: qcom: Extend GLINK to cover
SMEM")
Signed-off-by: Sibi Sankar
Reviewed-by: Doug Anderson
Reviewed-by: Rob Herring
---
v3:
* Fixed typo
Documentation/devicetree/bindings/soc/qcom/qcom,glink.txt | 5 +
1 file changed, 5 insertions(+)
diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,glink.txt
b/Documentation/devicetree/bindings/soc/qcom/qcom,glink.txt
index 0b8cc533ca83..587bb1ddc8cc 100644
--- a/Documentation/devicetree/bindings/soc/qcom/qcom,glink.txt
+++ b/Documentation/devicetree/bindings/soc/qcom/qcom,glink.txt
@@ -21,6 +21,11 @@ edge.
Definition: should specify the IRQ used by the remote processor to
signal this processor about communication related events
+- qcom,remote-pid:
+ Usage: required for glink-smem
+ Value type:
+ Definition: specifies the identifier of the remote endpoint of this edge
+
- qcom,rpm-msg-ram:
Usage: required for glink-rpm
Value type:
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project
[PATCH v4 5/8] dt-bindings: remoteproc: qcom: Fixup regulator dependencies
Fixup regulator supply dependencies for Q6V5 MSS on MSM996 SoCs.
Fixes: 9f058fa2efb1 ("remoteproc: qcom: Add support for mss remoteproc
on msm8996")
Signed-off-by: Sibi Sankar
Reviewed-by: Rob Herring
---
v3:
* Fixup dt-binding documentation as suggested by Doug
.../bindings/remoteproc/qcom,q6v5.txt | 21 +++
1 file changed, 21 insertions(+)
diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt
b/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt
index bba3d6be71c0..9db371da4897 100644
--- a/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt
+++ b/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt
@@ -76,6 +76,19 @@ on the Qualcomm Hexagon core.
must be "mss_restart", "pdc_reset" for the modem
sub-system on SDM845 SoCs
+For the compatible strings below the following supplies are required:
+ "qcom,q6v5-pil"
+ "qcom,msm8916-mss-pil",
+- cx-supply:
+- mx-supply:
+- pll-supply:
+ Usage: required
+ Value type:
+ Definition: reference to the regulators to be held on behalf of the
+ booting of the Hexagon core
+
+For the compatible string below the following supplies are required:
+ "qcom,msm8974-mss-pil"
- cx-supply:
- mss-supply:
- mx-supply:
@@ -85,6 +98,14 @@ on the Qualcomm Hexagon core.
Definition: reference to the regulators to be held on behalf of the
booting of the Hexagon core
+For the compatible string below the following supplies are required:
+ "qcom,msm8996-mss-pil"
+- pll-supply:
+ Usage: required
+ Value type:
+ Definition: reference to the regulators to be held on behalf of the
+ booting of the Hexagon core
+
- qcom,smem-states:
Usage: required
Value type:
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project
[PATCH v4 6/8] remoteproc: qcom: q6v5-mss: Add missing regulator for MSM8996
Add proxy vote for pll supply on MSM8996 SoC.
Fixes: 9f058fa2efb1 ("remoteproc: qcom: Add support for mss remoteproc
on msm8996")
Signed-off-by: Sibi Sankar
---
drivers/remoteproc/qcom_q6v5_mss.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/drivers/remoteproc/qcom_q6v5_mss.c
b/drivers/remoteproc/qcom_q6v5_mss.c
index cb5f0d3ac6a3..c86dc40cfb8c 100644
--- a/drivers/remoteproc/qcom_q6v5_mss.c
+++ b/drivers/remoteproc/qcom_q6v5_mss.c
@@ -1395,6 +1395,13 @@ static const struct rproc_hexagon_res sdm845_mss = {
static const struct rproc_hexagon_res msm8996_mss = {
.hexagon_mba_image = "mba.mbn",
+ .proxy_supply = (struct qcom_mss_reg_res[]) {
+ {
+ .supply = "pll",
+ .uA = 10,
+ },
+ {}
+ },
.proxy_clk_names = (char*[]){
"xo",
"pnoc",
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project
[PATCH v4 8/8] arm64: dts: qcom: sdm845: Add Q6V5 MSS node
This patch adds Q6V5 MSS remoteproc node for SDM845 SoCs.
Signed-off-by: Sibi Sankar
Reviewed-by: Douglas Anderson
---
v3:
* with shutdown-ack irq redesign make it mandatory,
merge multiple patches into a single one
v2:
* Fixed style changes
* Added missing clocks in the dt-bindings
* Split mss remoteproc node into a number of patches
This patch depends on the following bindings:
https://patchwork.kernel.org/patch/10662089/ - mba/mpss reserved regions
https://patchwork.kernel.org/patch/10657325/ - pdc reset node
https://patchwork.kernel.org/patch/10740127/ - rpmhpd dt bindings
https://patchwork.kernel.org/patch/10740109/ - rpmhpd dt node
https://patchwork.kernel.org/patch/10678301/ - AOP QMP dt bindings
https://patchwork.kernel.org/patch/10742083/ - shutdown-irq binding
arch/arm64/boot/dts/qcom/sdm845.dtsi | 60
1 file changed, 60 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi
b/arch/arm64/boot/dts/qcom/sdm845.dtsi
index 5da9fa1feb8a..db17216a5bce 100644
--- a/arch/arm64/boot/dts/qcom/sdm845.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi
@@ -1366,6 +1366,66 @@
};
};
+ remoteproc@408 {
+ compatible = "qcom,sdm845-mss-pil";
+ reg = <0x0408 0x408>, <0x0418 0x48>;
+ reg-names = "qdsp6", "rmb";
+
+ interrupts-extended =
+ <&intc GIC_SPI 266 IRQ_TYPE_EDGE_RISING>,
+ <&modem_smp2p_in 0 IRQ_TYPE_EDGE_RISING>,
+ <&modem_smp2p_in 1 IRQ_TYPE_EDGE_RISING>,
+ <&modem_smp2p_in 2 IRQ_TYPE_EDGE_RISING>,
+ <&modem_smp2p_in 3 IRQ_TYPE_EDGE_RISING>,
+ <&modem_smp2p_in 7 IRQ_TYPE_EDGE_RISING>;
+ interrupt-names = "wdog", "fatal", "ready",
+ "handover", "stop-ack",
+ "shutdown-ack";
+
+ clocks = <&gcc GCC_MSS_CFG_AHB_CLK>,
+<&gcc GCC_MSS_Q6_MEMNOC_AXI_CLK>,
+<&gcc GCC_BOOT_ROM_AHB_CLK>,
+<&gcc GCC_MSS_GPLL0_DIV_CLK_SRC>,
+<&gcc GCC_MSS_SNOC_AXI_CLK>,
+<&gcc GCC_MSS_MFAB_AXIS_CLK>,
+<&gcc GCC_PRNG_AHB_CLK>,
+<&rpmhcc RPMH_CXO_CLK>;
+ clock-names = "iface", "bus", "mem", "gpll0_mss",
+ "snoc_axi", "mnoc_axi", "prng", "xo";
+
+ qcom,smem-states = <&modem_smp2p_out 0>;
+ qcom,smem-state-names = "stop";
+
+ resets = <&aoss_reset AOSS_CC_MSS_RESTART>,
+<&pdc_reset PDC_MODEM_SYNC_RESET>;
+ reset-names = "mss_restart", "pdc_reset";
+
+ qcom,halt-regs = <&tcsr_mutex_regs
+ 0x23000 0x25000 0x24000>;
+
+ power-domains = <&aoss_qmp_pd AOSS_QMP_LS_MODEM>,
+ <&rpmhpd SDM845_CX>,
+ <&rpmhpd SDM845_MX>,
+ <&rpmhpd SDM845_MSS>;
+ power-domain-names = "load_state", "cx", "mx", "mss";
+
+ mba {
+ memory-region = <&mba_region>;
+ };
+
+ mpss {
+ memory-region = <&mpss_region>;
+ };
+
+ glink-edge {
+ interrupts = ;
+ label = "modem";
+ qcom,remote-pid = <1>;
+ mboxes = <&apss_shared 12>;
+ mbox-names = "mpss_smem";
+ };
+ };
+
usb_1_hsphy: phy@88e2000 {
compatible = "qcom,sdm845-qusb2-phy";
reg = <0x88e2000 0x400>;
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project
[PATCH v4 7/8] dt-bindings: remoteproc: qcom: Add power-domain bindings for Q6V5
Add power-domain bindings for Q6V5 MSS on MSM8996 and SDM845 SoCs. Signed-off-by: Sibi Sankar Reviewed-by: Rob Herring --- v3: * Fixup dt-binding documentation as suggested by Doug * Dropping Rob's Reviewed-by due to documentation style change v2: * Add load_state power-domain * List cx and mx power-domains for MSM8996 .../bindings/remoteproc/qcom,q6v5.txt | 19 +++ 1 file changed, 19 insertions(+) diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt b/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt index 9db371da4897..36e91c9d76e0 100644 --- a/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt +++ b/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt @@ -106,6 +106,25 @@ For the compatible string below the following supplies are required: Definition: reference to the regulators to be held on behalf of the booting of the Hexagon core +- power-domains: + Usage: required + Value type: + Definition: reference to power-domains that match power-domain-names + +- power-domain-names: + Usage: required + Value type: + Definition: The power-domains needed depend on the compatible string: + qcom,q6v5-pil: + qcom,ipq8074-wcss-pil: + qcom,msm8916-mss-pil: + qcom,msm8974-mss-pil: + no power-domain names required + qcom,msm8996-mss-pil: + must be "cx", "mx" + qcom,sdm845-mss-pil: + must be "cx", "mx", "mss", "load_state" + - qcom,smem-states: Usage: required Value type: -- The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project
Re: [PATCH v3 1/6] remoteproc: Introduce custom dump function for each remoteproc segment
Hi Bjorn,
Thanks for the review :)
On 2018-10-08 11:53, Bjorn Andersson wrote:
On Fri 27 Jul 08:19 PDT 2018, Sibi Sankar wrote:
Introduce custom dump function per remoteproc segment. It is
responsible
for filling the device memory segment associated with coredump
Signed-off-by: Sibi Sankar
---
drivers/remoteproc/remoteproc_core.c | 15 ++-
include/linux/remoteproc.h | 3 +++
2 files changed, 13 insertions(+), 5 deletions(-)
diff --git a/drivers/remoteproc/remoteproc_core.c
b/drivers/remoteproc/remoteproc_core.c
index 283b258f5e0f..ec56cd822b26 100644
--- a/drivers/remoteproc/remoteproc_core.c
+++ b/drivers/remoteproc/remoteproc_core.c
@@ -1183,13 +1183,18 @@ static void rproc_coredump(struct rproc
*rproc)
phdr->p_align = 0;
ptr = rproc_da_to_va(rproc, segment->da, segment->size);
- if (!ptr) {
- dev_err(&rproc->dev,
+
+ if (segment->dump) {
+ segment->dump(rproc, ptr, segment->size, data + offset);
rproc_da_to_va() is an exported symbol, so if you pass segment to the
dump function the driver can, if it needs to, call the function itself.
A typical use case, that I see, is to use the custom dump function to
write out CPU or hardware state to the dump file, in which case the
"da"
won't be valid.
So please make this call dump(rproc, segment, data + offset) and move
the rproc_da_to_va() into the else block.
yup will redefine it.
+ } else {
+ if (!ptr) {
+ dev_err(&rproc->dev,
"invalid coredump segment (%pad, %zu)\n",
&segment->da, segment->size);
- memset(data + offset, 0xff, segment->size);
- } else {
- memcpy(data + offset, ptr, segment->size);
+ memset(data + offset, 0xff, segment->size);
+ } else {
+ memcpy(data + offset, ptr, segment->size);
+ }
}
offset += phdr->p_filesz;
diff --git a/include/linux/remoteproc.h b/include/linux/remoteproc.h
index e3c5d856b6da..0fbb01a9955c 100644
--- a/include/linux/remoteproc.h
+++ b/include/linux/remoteproc.h
@@ -399,6 +399,8 @@ enum rproc_crash_type {
* @node: list node related to the rproc segment list
* @da:device address of the segment
* @size: size of the segment
+ * @dump: custom dump function to fill device memory segment
associated
+ * with coredump
*/
struct rproc_dump_segment {
struct list_head node;
@@ -406,6 +408,7 @@ struct rproc_dump_segment {
dma_addr_t da;
size_t size;
+ void (*dump)(struct rproc *rproc, void *ptr, size_t len, void
*priv);
"priv" isn't the best name to represent the memory to which you expect
dump to write to. Please call it "dest".
will rename it
loff_t offset;
};
Regards,
Bjorn
--
-- Sibi Sankar --
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project.
Re: [PATCH v3 4/6] remoteproc: qcom: q6v5-pil: Add custom dump function for modem
Hi Bjorn,
Thanks for the review !
On 2018-10-08 12:15, Bjorn Andersson wrote:
On Fri 27 Jul 08:20 PDT 2018, Sibi Sankar wrote:
diff --git a/drivers/remoteproc/qcom_q6v5_pil.c
b/drivers/remoteproc/qcom_q6v5_pil.c
[..]
+static void qcom_q6v5_dump_segment(struct rproc *rproc, void *ptr,
size_t len,
+ void *priv)
+{
+ int ret = 0;
+ struct q6v5 *qproc = (struct q6v5 *)rproc->priv;
+ static u32 pending_mask;
I dislike that this is a static variable. And it tracks the segments
that has already been dumped, i.e. the !pending.
+
+ /* Unlock mba before copying segments */
+ if (!qproc->mba_loaded)
+ ret = q6v5_mba_load(qproc);
+
+ if (!ptr || ret)
+ memset(priv, 0xff, len);
+ else
+ memcpy(priv, ptr, len);
+
+ pending_mask++;
This is a "count" and not a "mask".
will rename it to count in the next re-spin. We can implement this as
a mask as well, the only disadvantage I see in that case is the need
for another flag to determine if mba is loaded since the mask for the
first segment may not be zero (the first segment may not be valid).
I can see a few different cases where one would like to be able to pass
custom data/information from the segment-registration to the dump
function. So how about adding a "void *priv" to the dump segment.
For this particular case we could typecast segment->priv to an unsigned
long (as this is always the same size) and use that as a bitmask, which
we use to update pending_mask.
sure will do the same
+ if (pending_mask == qproc->valid_mask) {
+ if (qproc->mba_loaded)
+ q6v5_mba_reclaim(qproc);
+ pending_mask = 0;
+ }
I think it would be cleaner to reset pending_mask in the start
function,
and then return early in this function when we have dumped all the
segments.
If so can pending_mask == 0 and pending_mask == all be the triggers for
loading and reclaiming the mba? So we don't have two different trackers
for this?
with the private data stored per dump segment this becomes much simpler
:)
+}
+
Regards,
Bjorn
--
-- Sibi Sankar --
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project.
Re: [PATCH v3 5/6] remoteproc: qcom: q6v5-pil: Register segments/dumpfn for coredump
Hi Bjorn,
Thanks for the review !
On 2018-10-08 12:18, Bjorn Andersson wrote:
On Fri 27 Jul 08:20 PDT 2018, Sibi Sankar wrote:
Register the MDT segments and custom dumpfn with the remoteproc core
dump functionality.
Signed-off-by: Sibi Sankar
---
drivers/remoteproc/qcom_q6v5_pil.c | 40
++
1 file changed, 40 insertions(+)
diff --git a/drivers/remoteproc/qcom_q6v5_pil.c
b/drivers/remoteproc/qcom_q6v5_pil.c
index ac3342f9ea5a..22bb049c3e7f 100644
--- a/drivers/remoteproc/qcom_q6v5_pil.c
+++ b/drivers/remoteproc/qcom_q6v5_pil.c
@@ -1058,10 +1058,50 @@ static void *q6v5_da_to_va(struct rproc
*rproc, u64 da, int len)
return qproc->mpss_region + offset;
}
+static int qcom_q6v5_register_dump_segments(struct rproc *rproc,
+ const struct firmware *fw_unused)
How about naming it mba_fw instead of unused? Just as unused, but
easier
to understand why it isn't used.
sure
+{
+ const struct firmware *fw;
+ const struct elf32_phdr *phdrs;
+ const struct elf32_phdr *phdr;
+ const struct elf32_hdr *ehdr;
+ struct q6v5 *qproc = (struct q6v5 *)rproc->priv;
No need for an explicit typecast from void *.
will remove it
The rest looks good!
Regards,
Bjorn
--
-- Sibi Sankar --
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project.
[PATCH v4 0/5] Add coredump support for Q6v5 Modem remoteproc
This patch series add coredump support for modem on SDM845, MSM8996 and MSM8916 SoCs. Modem requires the mba to be loaded before a coredump can be performed and this is achieved using a custom per segment dump function. V4: Addressed Bjorn's comments. V3: [bjorn]:replace prepare/unprepare ops with a more generalised per segment dump function V2: Introduce prepare/unprepare ops for rproc coredump Sibi Sankar (5): remoteproc: Introduce custom dump function for each remoteproc segment remoteproc: Add mechanism for custom dump function assignment remoteproc: qcom: q6v5-mss: Refactor mba load/unload sequence remoteproc: qcom: q6v5-mss: Add custom dump function for modem remoteproc: qcom: q6v5-mss: Register segments/dumpfn for coredump drivers/remoteproc/qcom_q6v5_mss.c | 307 ++- drivers/remoteproc/remoteproc_core.c | 55 - include/linux/remoteproc.h | 11 + 3 files changed, 268 insertions(+), 105 deletions(-) -- The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project
