Re: [PATCH] ARM: S3C2443: SPI clock channel setup is fixed
I also want to point, that irq resource in arch/arm/plat-samsung/devs.c
for s3c2410-spi driver on S3C2443 points to wrong IRQ (SPI0 instead of
SPI1). I've solved it with board specific code, but it is not most
correct way, i think.
20.11.2012 15:46, Kukjin Kim пишет:
Alexander Varnin wrote:
Actually, SPI channel 0 on 2443 is mapped to HS SPI controller,
and to enable s3c2410-spi controller, we should power on channel
1 in PCLKCON. There is no channel 0 SPI on s3c2443, so delete its
clock.
Signed-off-by: Alexander Varnin fenix...@mail.ru
Reviewed-by: Heiko Stuebner he...@sntech.de
---
arch/arm/mach-s3c24xx/clock-s3c2443.c |6 --
1 files changed, 0 insertions(+), 6 deletions(-)
diff --git a/arch/arm/mach-s3c24xx/clock-s3c2443.c
b/arch/arm/mach-s3c24xx/clock-s3c2443.c
index 7f689ce..bdaba59 100644
--- a/arch/arm/mach-s3c24xx/clock-s3c2443.c
+++ b/arch/arm/mach-s3c24xx/clock-s3c2443.c
@@ -158,12 +158,6 @@ static struct clk init_clocks_off[] = {
.devname= s3c2410-spi.0,
.parent = clk_p,
.enable = s3c2443_clkcon_enable_p,
- .ctrlbit= S3C2443_PCLKCON_SPI0,
- }, {
- .name = spi,
- .devname= s3c2410-spi.1,
- .parent = clk_p,
- .enable = s3c2443_clkcon_enable_p,
.ctrlbit= S3C2443_PCLKCON_SPI1,
}
};
--
1.7.2.5
Applied, thanks.
K-Gene kg...@kernel.org
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Re: [PATCH 1/4] thermal: Add new thermal trend type to support quick cooling
On 22 November 2012 06:52, Zhang Rui rui.zh...@intel.com wrote:
On Thu, 2012-11-08 at 09:56 +0530, Amit Daniel Kachhap wrote:
This modification adds 2 new thermal trend type THERMAL_TREND_RAISE_FULL
and THERMAL_TREND_DROP_FULL. This thermal trend can be used to quickly
jump to the upper or lower cooling level instead of incremental increase
or decrease. This is needed for temperature sensors which support
rising/falling
threshold interrupts and polling can be totally avoided.
Signed-off-by: Amit Daniel Kachhap amit.dan...@samsung.com
Signed-off-by: Amit Daniel Kachhap amit.kach...@linaro.org
---
drivers/thermal/step_wise.c | 19 +++
include/linux/thermal.h |2 ++
2 files changed, 17 insertions(+), 4 deletions(-)
diff --git a/drivers/thermal/step_wise.c b/drivers/thermal/step_wise.c
index 1242cff..0d2d8d6 100644
--- a/drivers/thermal/step_wise.c
+++ b/drivers/thermal/step_wise.c
@@ -35,6 +35,10 @@
* state for this trip point
*b. if the trend is THERMAL_TREND_DROPPING, use lower cooling
* state for this trip point
+ *c. if the trend is THERMAL_TREND_RAISE_FULL, use highest cooling
+ * state for this trip point
+ *d. if the trend is THERMAL_TREND_DROP_FULL, use lowest cooling
+ * state for this trip point
*/
static unsigned long get_target_state(struct thermal_instance *instance,
enum thermal_trend trend)
@@ -50,7 +54,10 @@ static unsigned long get_target_state(struct
thermal_instance *instance,
} else if (trend == THERMAL_TREND_DROPPING) {
cur_state = cur_state instance-lower ?
(cur_state - 1) : instance-lower;
- }
+ } else if (trend == THERMAL_TREND_RAISE_FULL)
+ cur_state = instance-upper;
+ else if (trend == THERMAL_TREND_DROP_FULL)
+ cur_state = instance-lower;
return cur_state;
}
@@ -87,7 +94,8 @@ static void update_instance_for_throttle(struct
thermal_zone_device *tz,
}
static void update_instance_for_dethrottle(struct thermal_zone_device *tz,
- int trip, enum thermal_trip_type trip_type)
+ int trip, enum thermal_trip_type trip_type,
+ enum thermal_trend trend)
{
struct thermal_instance *instance;
struct thermal_cooling_device *cdev;
@@ -101,7 +109,10 @@ static void update_instance_for_dethrottle(struct
thermal_zone_device *tz,
cdev = instance-cdev;
cdev-ops-get_cur_state(cdev, cur_state);
- instance-target = cur_state instance-lower ?
+ if (trend == THERMAL_TREND_DROP_FULL)
+ instance-target = instance-lower;
+ else
+ instance-target = cur_state instance-lower ?
(cur_state - 1) : THERMAL_NO_TARGET;
what do you expect to happen if the trend is THERMAL_TREND_RAISE_FULL at
this time?
Hi Rui,
I suppose this is dethrotle routine and hence this will be called when
only drop in temperature happens. Also I did not used get_target_state
here because I thought it might cause regression in the other existing
thermal drivers(I am not sure) But I guess calling get_target_state is
the good way to know next target state and is fine if you agree.
Also one suggestion, 2 functions for throttle/dethrottle can be merged
as both look same and just get_target_state can be used in that
function
Thanks,
Amit Daniel
thanks,
rui
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Re: [PATCH 1/4] thermal: Add new thermal trend type to support quick cooling
On Thu, 2012-11-22 at 10:11 +0530, Amit Kachhap wrote:
On 22 November 2012 06:52, Zhang Rui rui.zh...@intel.com wrote:
On Thu, 2012-11-08 at 09:56 +0530, Amit Daniel Kachhap wrote:
This modification adds 2 new thermal trend type THERMAL_TREND_RAISE_FULL
and THERMAL_TREND_DROP_FULL. This thermal trend can be used to quickly
jump to the upper or lower cooling level instead of incremental increase
or decrease. This is needed for temperature sensors which support
rising/falling
threshold interrupts and polling can be totally avoided.
Signed-off-by: Amit Daniel Kachhap amit.dan...@samsung.com
Signed-off-by: Amit Daniel Kachhap amit.kach...@linaro.org
---
drivers/thermal/step_wise.c | 19 +++
include/linux/thermal.h |2 ++
2 files changed, 17 insertions(+), 4 deletions(-)
diff --git a/drivers/thermal/step_wise.c b/drivers/thermal/step_wise.c
index 1242cff..0d2d8d6 100644
--- a/drivers/thermal/step_wise.c
+++ b/drivers/thermal/step_wise.c
@@ -35,6 +35,10 @@
* state for this trip point
*b. if the trend is THERMAL_TREND_DROPPING, use lower cooling
* state for this trip point
+ *c. if the trend is THERMAL_TREND_RAISE_FULL, use highest cooling
+ * state for this trip point
+ *d. if the trend is THERMAL_TREND_DROP_FULL, use lowest cooling
+ * state for this trip point
*/
static unsigned long get_target_state(struct thermal_instance *instance,
enum thermal_trend trend)
@@ -50,7 +54,10 @@ static unsigned long get_target_state(struct
thermal_instance *instance,
} else if (trend == THERMAL_TREND_DROPPING) {
cur_state = cur_state instance-lower ?
(cur_state - 1) : instance-lower;
- }
+ } else if (trend == THERMAL_TREND_RAISE_FULL)
+ cur_state = instance-upper;
+ else if (trend == THERMAL_TREND_DROP_FULL)
+ cur_state = instance-lower;
return cur_state;
}
@@ -87,7 +94,8 @@ static void update_instance_for_throttle(struct
thermal_zone_device *tz,
}
static void update_instance_for_dethrottle(struct thermal_zone_device *tz,
- int trip, enum thermal_trip_type trip_type)
+ int trip, enum thermal_trip_type trip_type,
+ enum thermal_trend trend)
{
struct thermal_instance *instance;
struct thermal_cooling_device *cdev;
@@ -101,7 +109,10 @@ static void update_instance_for_dethrottle(struct
thermal_zone_device *tz,
cdev = instance-cdev;
cdev-ops-get_cur_state(cdev, cur_state);
- instance-target = cur_state instance-lower ?
+ if (trend == THERMAL_TREND_DROP_FULL)
+ instance-target = instance-lower;
+ else
+ instance-target = cur_state instance-lower ?
(cur_state - 1) : THERMAL_NO_TARGET;
what do you expect to happen if the trend is THERMAL_TREND_RAISE_FULL at
this time?
Hi Rui,
I suppose this is dethrotle routine and hence this will be called when
only drop in temperature happens. Also I did not used get_target_state
here because I thought it might cause regression in the other existing
thermal drivers(I am not sure) But I guess calling get_target_state is
the good way to know next target state and is fine if you agree.
Also one suggestion, 2 functions for throttle/dethrottle can be merged
as both look same and just get_target_state can be used in that
function
agree.
patches have been refreshed, please review.
thanks,
rui
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[PATCH] ARM: S3C2443: Workaround for 2443 EXTINT error
S3C2443 CPU has a problem with incorrect reading from EXTINTn
registers. So s3c_irqext_type function wrongly modifies them.
So add special function for s3c2443, to handle this case.
Signed-off-by: Alexander Varnin fenix...@mail.ru
---
arch/arm/mach-s3c24xx/s3c2443.c |8
arch/arm/plat-s3c24xx/irq.c | 89 +++
2 files changed, 97 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-s3c24xx/s3c2443.c b/arch/arm/mach-s3c24xx/s3c2443.c
index ab648ad..99eef31 100644
--- a/arch/arm/mach-s3c24xx/s3c2443.c
+++ b/arch/arm/mach-s3c24xx/s3c2443.c
@@ -67,8 +67,11 @@ void s3c2443_restart(char mode, const char *cmd)
__raw_writel(S3C2443_SWRST_RESET, S3C2443_SWRST);
}
+extern int s3c2443_irqext_type(struct irq_data *data, unsigned int type);
+
int __init s3c2443_init(void)
{
+ struct irq_chip * chip;
printk(S3C2443: Initialising architecture\n);
s3c_nand_setname(s3c2412-nand);
@@ -81,6 +84,11 @@ int __init s3c2443_init(void)
s3c_device_wdt.resource[1].start = IRQ_S3C2443_WDT;
s3c_device_wdt.resource[1].end = IRQ_S3C2443_WDT;
+ chip = irq_get_chip(IRQ_EINT0);
+ chip-irq_set_type=s3c2443_irqext_type;
+ chip = irq_get_chip(IRQ_EINT4);
+ chip-irq_set_type=s3c2443_irqext_type;
+
return device_register(s3c2443_dev);
}
diff --git a/arch/arm/plat-s3c24xx/irq.c b/arch/arm/plat-s3c24xx/irq.c
index fe57bbb..9c815f3 100644
--- a/arch/arm/plat-s3c24xx/irq.c
+++ b/arch/arm/plat-s3c24xx/irq.c
@@ -224,7 +224,96 @@ s3c_irqext_type(struct irq_data *data, unsigned int type)
return 0;
}
+#if defined(CONFIG_CPU_S3C2443)
+int
+s3c2443_irqext_type(struct irq_data *data, unsigned int type)
+{
+ int i;
+ int fixed;
+ void __iomem *extint_reg;
+ void __iomem *gpcon_reg;
+ unsigned long gpcon_offset, extint_offset;
+ unsigned long newvalue = 0, value;
+
+ if ((data-irq = IRQ_EINT0) (data-irq = IRQ_EINT3)) {
+ gpcon_reg = S3C2410_GPFCON;
+ extint_reg = S3C24XX_EXTINT0;
+ gpcon_offset = (data-irq - IRQ_EINT0) * 2;
+ extint_offset = (data-irq - IRQ_EINT0) * 4;
+ } else if ((data-irq = IRQ_EINT4) (data-irq = IRQ_EINT7)) {
+ gpcon_reg = S3C2410_GPFCON;
+ extint_reg = S3C24XX_EXTINT0;
+ gpcon_offset = (data-irq - (EXTINT_OFF)) * 2;
+ extint_offset = (data-irq - (EXTINT_OFF)) * 4;
+ } else if ((data-irq = IRQ_EINT8) (data-irq = IRQ_EINT15)) {
+ gpcon_reg = S3C2410_GPGCON;
+ extint_reg = S3C24XX_EXTINT1;
+ gpcon_offset = (data-irq - IRQ_EINT8) * 2;
+ extint_offset = (data-irq - IRQ_EINT8) * 4;
+ } else if ((data-irq = IRQ_EINT16) (data-irq = IRQ_EINT23)) {
+ gpcon_reg = S3C2410_GPGCON;
+ extint_reg = S3C24XX_EXTINT2;
+ gpcon_offset = (data-irq - IRQ_EINT8) * 2;
+ extint_offset = (data-irq - IRQ_EINT16) * 4;
+ } else {
+ return -1;
+ }
+ /* Set the GPIO to external interrupt mode */
+ value = __raw_readl(gpcon_reg);
+ value = (value ~(3 gpcon_offset)) | (0x02 gpcon_offset);
+ __raw_writel(value, gpcon_reg);
+
+ /* Set the external interrupt to pointed trigger type */
+ switch (type)
+ {
+ case IRQ_TYPE_NONE:
+ printk(KERN_WARNING No edge setting!\n);
+ break;
+
+ case IRQ_TYPE_EDGE_RISING:
+ newvalue = S3C2410_EXTINT_RISEEDGE;
+ break;
+
+ case IRQ_TYPE_EDGE_FALLING:
+ newvalue = S3C2410_EXTINT_FALLEDGE;
+ break;
+
+ case IRQ_TYPE_EDGE_BOTH:
+ newvalue = S3C2410_EXTINT_BOTHEDGE;
+ break;
+
+ case IRQ_TYPE_LEVEL_LOW:
+ newvalue = S3C2410_EXTINT_LOWLEV;
+ break;
+
+ case IRQ_TYPE_LEVEL_HIGH:
+ newvalue = S3C2410_EXTINT_HILEV;
+ break;
+
+ default:
+ printk(KERN_ERR No such irq type %d, type);
+ return -1;
+ }
+
+ value = __raw_readl(extint_reg);
+ //Hack for 2443 error workaround
+ fixed = 0;
+ if(extint_reg == S3C24XX_EXTINT1 || extint_reg == S3C24XX_EXTINT2)
+ for(i=0; i7;i++)
+ fixed |= (((value ((7-i)*4+1)) 7) | ((value
((7-i)*4-3)) 8)) i*4;
+ else
+ for(i=0; i7;i++)
+ fixed |= ( (value (7-i)*4) 0xf ) i*4;
+fixed |= (((value1) 7) | ((value3) 8)) 27;
+ value = fixed;
+
+ value = (value ~(7 extint_offset)) | (newvalue extint_offset);
+ __raw_writel(value, extint_reg);
+
+ return 0;
+}
+#endif
RE: [PATCH v2] ARM: exynos: add UART3 to DEBUG_LL ports
Doug Anderson wrote: From: Olof Johansson o...@lixom.net Add support for using UART3 for DEBUG_LL on exynos. [dianders: added depend on ARCH_EXYNOS.] Signed-off-by: Olof Johansson o...@lixom.net Signed-off-by: Doug Anderson diand...@chromium.org --- Changes in v2: - Matched Olof's commit message. - Added ARCH_EXYNOS to depend list. arch/arm/Kconfig.debug| 11 +++ arch/arm/plat-samsung/Kconfig |1 + 2 files changed, 12 insertions(+), 0 deletions(-) diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug index 33a8930..f54f170 100644 --- a/arch/arm/Kconfig.debug +++ b/arch/arm/Kconfig.debug @@ -355,6 +355,17 @@ choice The uncompressor code port configuration is now handled by CONFIG_S3C_LOWLEVEL_UART_PORT. + config DEBUG_S3C_UART3 + depends on PLAT_SAMSUNG ARCH_EXYNOS + bool Use S3C UART 3 for low-level debug + help + Say Y here if you want the debug print routines to direct + their output to UART 3. The port must have been initialised + by the boot-loader before use. + + The uncompressor code port configuration is now handled + by CONFIG_S3C_LOWLEVEL_UART_PORT. + config DEBUG_SOCFPGA_UART depends on ARCH_SOCFPGA bool Use SOCFPGA UART for low-level debug diff --git a/arch/arm/plat-samsung/Kconfig b/arch/arm/plat-samsung/Kconfig index 59401e1..d342ed0 100644 --- a/arch/arm/plat-samsung/Kconfig +++ b/arch/arm/plat-samsung/Kconfig @@ -502,5 +502,6 @@ config DEBUG_S3C_UART default 0 if DEBUG_S3C_UART0 default 1 if DEBUG_S3C_UART1 default 2 if DEBUG_S3C_UART2 + default 3 if DEBUG_S3C_UART3 endif -- 1.7.7.3 Applied, thanks. Best regards, Kgene. -- Kukjin Kim kgene@samsung.com, Senior Engineer, SW Solution Development Team, Samsung Electronics Co., Ltd. -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
RE: [PATCH] ARM: SAMSUNG: Add s3c24xx/s3c64xx CAMIF GPIO setup helpers
Sylwester Nawrocki wrote:
This patch adds default helper functions for the camera port
pin configuration. Whenever pinctrl support for s3c24xx/s3c64xx
SoCs is available these code should be removed and proper pinctrl
API should be used in the CAMIF driver.
Signed-off-by: Sylwester Nawrocki sylvester.nawro...@gmail.com
---
arch/arm/mach-s3c24xx/Kconfig |1 +
arch/arm/plat-samsung/Kconfig |5 ++
arch/arm/plat-samsung/Makefile |1 +
arch/arm/plat-samsung/setup-camif.c | 70
+++
4 files changed, 77 insertions(+), 0 deletions(-)
create mode 100644 arch/arm/plat-samsung/setup-camif.c
diff --git a/arch/arm/mach-s3c24xx/Kconfig b/arch/arm/mach-s3c24xx/Kconfig
index 2b6cb5f..01f70c9 100644
--- a/arch/arm/mach-s3c24xx/Kconfig
+++ b/arch/arm/mach-s3c24xx/Kconfig
@@ -405,6 +405,7 @@ config MACH_MINI2440
select NEW_LEDS
select S3C_DEV_NAND
select S3C_DEV_USB_HOST
+ select S3C_SETUP_CAMIF
help
Say Y here to select support for the MINI2440. Is a 10cm x 10cm
board
available via various sources. It can come with a 3.5 or 7
touch LCD.
diff --git a/arch/arm/plat-samsung/Kconfig b/arch/arm/plat-samsung/Kconfig
index 59401e1..95360e6 100644
--- a/arch/arm/plat-samsung/Kconfig
+++ b/arch/arm/plat-samsung/Kconfig
@@ -414,6 +414,11 @@ config S5P_SETUP_MIPIPHY
help
Compile in common setup code for MIPI-CSIS and MIPI-DSIM devices
+config S3C_SETUP_CAMIF
+ bool
+ help
+ Compile in common setup code for S3C CAMIF devices
+
# DMA
config S3C_DMA
diff --git a/arch/arm/plat-samsung/Makefile b/arch/arm/plat-
samsung/Makefile
index 9e40e8d..3a7c64d 100644
--- a/arch/arm/plat-samsung/Makefile
+++ b/arch/arm/plat-samsung/Makefile
@@ -41,6 +41,7 @@ obj-$(CONFIG_S5P_DEV_UART) += s5p-dev-uart.o
obj-$(CONFIG_SAMSUNG_DEV_BACKLIGHT) += dev-backlight.o
+obj-$(CONFIG_S3C_SETUP_CAMIF)+= setup-camif.o
obj-$(CONFIG_S5P_SETUP_MIPIPHY) += setup-mipiphy.o
# DMA support
diff --git a/arch/arm/plat-samsung/setup-camif.c b/arch/arm/plat-
samsung/setup-camif.c
new file mode 100644
index 000..e01bf76
--- /dev/null
+++ b/arch/arm/plat-samsung/setup-camif.c
@@ -0,0 +1,70 @@
+/*
+ * Copyright (C) 2012 Sylwester Nawrocki sylvester.nawro...@gmail.com
+ *
+ * Helper functions for S3C24XX/S3C64XX SoC series CAMIF driver
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include linux/gpio.h
+#include plat/gpio-cfg.h
+
+/* Number of camera port pins, without FIELD */
+#define S3C_CAMIF_NUM_GPIOS 13
+
+/* Default camera port configuration helpers. */
+
+static void camif_get_gpios(int *gpio_start, int *gpio_reset)
+{
+#ifdef CONFIG_ARCH_S3C24XX
+ *gpio_start = S3C2410_GPJ(0);
+ *gpio_reset = S3C2410_GPJ(12);
+#else
+ /* s3c64xx */
+ *gpio_start = S3C64XX_GPF(0);
+ *gpio_reset = S3C64XX_GPF(3);
+#endif
+}
+
+int s3c_camif_gpio_get(void)
+{
+ int gpio_start, gpio_reset;
+ int ret, i;
+
+ camif_get_gpios(gpio_start, gpio_reset);
+
+ for (i = 0; i S3C_CAMIF_NUM_GPIOS; i++) {
+ int gpio = gpio_start + i;
+
+ if (gpio == gpio_reset)
+ continue;
+
+ ret = gpio_request(gpio, camif);
+ if (!ret)
+ ret = s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2));
+ if (ret) {
+ pr_err(failed to configure GPIO %d\n, gpio);
+ for (--i; i = 0; i--)
+ gpio_free(gpio--);
+ return ret;
+ }
+ s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
+ }
+
+ return 0;
+}
+
+void s3c_camif_gpio_put(void)
+{
+ int i, gpio_start, gpio_reset;
+
+ camif_get_gpios(gpio_start, gpio_reset);
+
+ for (i = 0; i S3C_CAMIF_NUM_GPIOS; i++) {
+ int gpio = gpio_start + i;
+ if (gpio != gpio_reset)
+ gpio_free(gpio);
+ }
+}
--
1.7.4.1
Yes, we can move on using pinctrl later when it is available. OK, applied.
Thanks.
K-Gene kg...@kernel.org
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RE: [PATCH 1/2] ARM: S3C24XX: Add clkdev entry for camif-upll clock
Sylwester Nawrocki wrote:
The s3c-camif driver uses camera clock conn_id for the camif-upll
(s3c244x) and camera (s3c64xx) platform clock. By adding this new
clkdev entry the platform differences are isolated from the driver.
Signed-off-by: Sylwester Nawrocki sylvester.nawro...@gmail.com
---
arch/arm/mach-s3c24xx/clock-s3c2440.c |1 +
1 files changed, 1 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-s3c24xx/clock-s3c2440.c b/arch/arm/mach-
s3c24xx/clock-s3c2440.c
index 4407b17..04b87ec 100644
--- a/arch/arm/mach-s3c24xx/clock-s3c2440.c
+++ b/arch/arm/mach-s3c24xx/clock-s3c2440.c
@@ -161,6 +161,7 @@ static struct clk_lookup s3c2440_clk_lookup[] = {
CLKDEV_INIT(NULL, clk_uart_baud1, s3c24xx_uclk),
CLKDEV_INIT(NULL, clk_uart_baud2, clk_p),
CLKDEV_INIT(NULL, clk_uart_baud3, s3c2440_clk_fclk_n),
+ CLKDEV_INIT(s3c2440-camif, camera, s3c2440_clk_cam_upll),
};
static int __init_refok s3c2440_clk_add(struct device *dev, struct
subsys_interface *sif)
--
1.7.4.1
Applied, thanks.
K-Gene kg...@kernel.org
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Re: [PATCH] regulator: max8997: skip gpio dvs setup if not used
Dear Mr. Ham,
Thanks for your comments.
On 21 November 2012 20:01, MyungJoo Ham myungjoo@samsung.com wrote:
On Wed, Nov 21, 2012 at 11:23 PM, Thomas Abraham
thomas.abra...@linaro.org wrote:
If gpio based voltage selection for buck 1/2/5 are not used, then the
execution
of gpio dvs setup code during probe can be skipped completly.
Even if GPIO-DVS feature is turned off, you need to setup BUCKxDVS1 anyway.
Otherwise, you may get unspecified behavior from the BUCK1/2/5,
which may incur unstable system.
I was looking into the documents but I did not find that this
condition being documented. Anyways, based on your comments, I have
tested two changes in the max8997 driver.
The first change moves the programming of the DVS related BUCK
registers above the programming of the BUCKxCTRL register. This is
required because by the time the BUCKxCTRL register is configured, the
corresponding voltage levels should already be programmed in BUCKxDVSx
registers.
diff --git a/drivers/regulator/max8997.c b/drivers/regulator/max8997.c
index cea9ec9..8901371 100644
--- a/drivers/regulator/max8997.c
+++ b/drivers/regulator/max8997.c
@@ -1019,6 +1019,19 @@ static int max8997_pmic_probe(struct
platform_device *pdev)
max_buck5, 0x3f);
}
+ /* Initialize all the DVS related BUCK registers */
+ for (i = 0; i 8; i++) {
+ max8997_update_reg(i2c, MAX8997_REG_BUCK1DVS1 + i,
+ max8997-buck1_vol[i],
+ 0x3f);
+ max8997_update_reg(i2c, MAX8997_REG_BUCK2DVS1 + i,
+ max8997-buck2_vol[i],
+ 0x3f);
+ max8997_update_reg(i2c, MAX8997_REG_BUCK5DVS1 + i,
+ max8997-buck5_vol[i],
+ 0x3f);
+ }
+
/*
* If buck 1, 2, and 5 do not care DVS GPIO settings, ignore them.
* If at least one of them cares, set gpios.
@@ -1068,19 +1081,6 @@ static int max8997_pmic_probe(struct
platform_device *pdev)
max8997_update_reg(i2c, MAX8997_REG_BUCK5CTRL, (pdata-buck5_gpiodvs) ?
(1 1) : (0 1), 1 1);
- /* Initialize all the DVS related BUCK registers */
- for (i = 0; i 8; i++) {
- max8997_update_reg(i2c, MAX8997_REG_BUCK1DVS1 + i,
- max8997-buck1_vol[i],
- 0x3f);
- max8997_update_reg(i2c, MAX8997_REG_BUCK2DVS1 + i,
- max8997-buck2_vol[i],
- 0x3f);
- max8997_update_reg(i2c, MAX8997_REG_BUCK5DVS1 + i,
- max8997-buck5_vol[i],
- 0x3f);
- }
-
/* Misc Settings */
max8997-ramp_delay = 10; /* set 10mV/us, which is the default */
max8997_write_reg(i2c, MAX8997_REG_BUCKRAMP, (0xf 4) | 0x9);
In the second change, if the DVS feature is used, all the 8 BUCKxDVSx
registers are programmed. If DVS feature is not used, only BUCKxDVS1
register is programmed.
diff --git a/drivers/regulator/max8997.c b/drivers/regulator/max8997.c
index 8901371..231fcdb 100644
--- a/drivers/regulator/max8997.c
+++ b/drivers/regulator/max8997.c
@@ -941,7 +941,7 @@ static int max8997_pmic_probe(struct platform_device *pdev)
struct regulator_dev **rdev;
struct max8997_data *max8997;
struct i2c_client *i2c;
- int i, ret, size;
+ int i, ret, size, nr_dvs;
u8 max_buck1 = 0, max_buck2 = 0, max_buck5 = 0;
if (!pdata) {
@@ -973,7 +973,10 @@ static int max8997_pmic_probe(struct platform_device *pdev)
memcpy(max8997-buck125_gpios, pdata-buck125_gpios, sizeof(int) * 3);
max8997-ignore_gpiodvs_side_effect = pdata-ignore_gpiodvs_side_effect;
- for (i = 0; i 8; i++) {
+ nr_dvs = (pdata-buck1_gpiodvs || pdata-buck2_gpiodvs ||
+ pdata-buck5_gpiodvs) ? 8 : 1;
+
+ for (i = 0; i nr_dvs; i++) {
max8997-buck1_vol[i] = ret =
max8997_get_voltage_proper_val(
buck1245_voltage_map_desc,
@@ -1020,7 +1023,7 @@ static int max8997_pmic_probe(struct
platform_device *pdev)
}
/* Initialize all the DVS related BUCK registers */
- for (i = 0; i 8; i++) {
+ for (i = 0; i nr_dvs; i++) {
max8997_update_reg(i2c, MAX8997_REG_BUCK1DVS1 + i,
max8997-buck1_vol[i],
0x3f);
If these changes are correct, could you please let me know. I will
submit patches for these changes.
Thanks for your time.
Regards,
Thomas.
Cheers,
MyungJoo
--
MyungJoo Ham, Ph.D.
Mobile Software Platform Lab, DMC Business, Samsung Electronics
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RE: [PATCH 2/2] i2c: s3c2410: Get the i2c bus number from alias id
Doug Anderson wrote: On Tue, Nov 20, 2012 at 8:09 PM, Mark Brown broo...@opensource.wolfsonmicro.com wrote: On Tue, Nov 20, 2012 at 02:27:04PM -0800, Doug Anderson wrote: From: Padmavathi Venna padm...@samsung.com Get the i2c bus number that the device is connected to using the alias id. This makes debugging / grokking of kernel messages much easier. This doesn't look like a s3c2410 specific change - it's a generic device tree issue. This suggests that it sohuld be implemented in the framework so that all I2C controllers with DT can use it. Good suggestion. I have posted a series with the title Add automatic bus number support for i2c busses with device tree. It contains the i2c-core patch as well as a patch removing similar code from the pxa i2c driver. Kukjin: please consider this patch abandoned and superseded by the new i2c-core patch. As Olof said, the patch for adding aliases for exynos4 should still be fine to apply. OK, I see. Thanks. Best regards, Kgene. -- Kukjin Kim kgene@samsung.com, Senior Engineer, SW Solution Development Team, Samsung Electronics Co., Ltd. -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH v4 01/12] ARM: EXYNOS: Add clk_ops for gating clocks of System MMU
Touching some System MMU needs its master devices' clock to be enabled
before. This commit adds clk_ops.set_parent of gating clocks of System
MMU to ensure gating clocks of System MMU's mater devices are enabled
when enabling gating clocks of System MMU.
Signed-off-by: KyongHo Cho pullip@samsung.com
---
arch/arm/mach-exynos/clock-exynos5.c | 24
1 file changed, 24 insertions(+)
diff --git a/arch/arm/mach-exynos/clock-exynos5.c
b/arch/arm/mach-exynos/clock-exynos5.c
index e48d7c2..a86e88e 100644
--- a/arch/arm/mach-exynos/clock-exynos5.c
+++ b/arch/arm/mach-exynos/clock-exynos5.c
@@ -614,6 +614,16 @@ static struct clksrc_clk exynos5_clk_aclk_300_gscl = {
.reg_src = { .reg = EXYNOS5_CLKSRC_TOP3, .shift = 10, .size = 1 },
};
+static int exynos5_gate_clk_set_parent(struct clk *clk, struct clk *parent)
+{
+ clk-parent = parent;
+ return 0;
+}
+
+static struct clk_ops exynos5_gate_clk_ops = {
+ .set_parent = exynos5_gate_clk_set_parent
+};
+
static struct clk exynos5_init_clocks_off[] = {
{
.name = timers,
@@ -855,71 +865,85 @@ static struct clk exynos5_init_clocks_off[] = {
.name = SYSMMU_CLOCK_NAME,
.devname= SYSMMU_CLOCK_DEVNAME(mfc_l, 0),
.enable = exynos5_clk_ip_mfc_ctrl,
+ .ops= exynos5_gate_clk_ops,
.ctrlbit= (1 1),
}, {
.name = SYSMMU_CLOCK_NAME,
.devname= SYSMMU_CLOCK_DEVNAME(mfc_r, 1),
.enable = exynos5_clk_ip_mfc_ctrl,
+ .ops= exynos5_gate_clk_ops,
.ctrlbit= (1 2),
}, {
.name = SYSMMU_CLOCK_NAME,
.devname= SYSMMU_CLOCK_DEVNAME(tv, 2),
.enable = exynos5_clk_ip_disp1_ctrl,
+ .ops= exynos5_gate_clk_ops,
.ctrlbit= (1 9)
}, {
.name = SYSMMU_CLOCK_NAME,
.devname= SYSMMU_CLOCK_DEVNAME(jpeg, 3),
.enable = exynos5_clk_ip_gen_ctrl,
+ .ops= exynos5_gate_clk_ops,
.ctrlbit= (1 7),
}, {
.name = SYSMMU_CLOCK_NAME,
.devname= SYSMMU_CLOCK_DEVNAME(rot, 4),
.enable = exynos5_clk_ip_gen_ctrl,
+ .ops= exynos5_gate_clk_ops,
.ctrlbit= (1 6)
}, {
.name = SYSMMU_CLOCK_NAME,
.devname= SYSMMU_CLOCK_DEVNAME(gsc0, 5),
.enable = exynos5_clk_ip_gscl_ctrl,
+ .ops= exynos5_gate_clk_ops,
.ctrlbit= (1 7),
}, {
.name = SYSMMU_CLOCK_NAME,
.devname= SYSMMU_CLOCK_DEVNAME(gsc1, 6),
.enable = exynos5_clk_ip_gscl_ctrl,
+ .ops= exynos5_gate_clk_ops,
.ctrlbit= (1 8),
}, {
.name = SYSMMU_CLOCK_NAME,
.devname= SYSMMU_CLOCK_DEVNAME(gsc2, 7),
.enable = exynos5_clk_ip_gscl_ctrl,
+ .ops= exynos5_gate_clk_ops,
.ctrlbit= (1 9),
}, {
.name = SYSMMU_CLOCK_NAME,
.devname= SYSMMU_CLOCK_DEVNAME(gsc3, 8),
.enable = exynos5_clk_ip_gscl_ctrl,
+ .ops= exynos5_gate_clk_ops,
.ctrlbit= (1 10),
}, {
.name = SYSMMU_CLOCK_NAME,
.devname= SYSMMU_CLOCK_DEVNAME(isp, 9),
.enable = exynos5_clk_ip_isp0_ctrl,
+ .ops= exynos5_gate_clk_ops,
.ctrlbit= (0x3F 8),
}, {
.name = SYSMMU_CLOCK_NAME2,
.devname= SYSMMU_CLOCK_DEVNAME(isp, 9),
.enable = exynos5_clk_ip_isp1_ctrl,
+ .ops= exynos5_gate_clk_ops,
.ctrlbit= (0xF 4),
}, {
.name = SYSMMU_CLOCK_NAME,
.devname= SYSMMU_CLOCK_DEVNAME(camif0, 12),
.enable = exynos5_clk_ip_gscl_ctrl,
+ .ops= exynos5_gate_clk_ops,
.ctrlbit= (1 11),
}, {
.name = SYSMMU_CLOCK_NAME,
.devname= SYSMMU_CLOCK_DEVNAME(camif1, 13),
.enable = exynos5_clk_ip_gscl_ctrl,
+ .ops= exynos5_gate_clk_ops,
.ctrlbit= (1 12),
}, {
.name =
[PATCH v4 06/12] iommu/exynos: allocate lv2 page table from own slab
Since kmalloc() does not guarantee the alignment of 1KB when it
allocates 1KB, it is required to allocate lv2 page table from
own slab that guarantees alignment of 1KB.
Signed-off-by: KyongHo Cho pullip@samsung.com
---
drivers/iommu/exynos-iommu.c | 24
1 file changed, 20 insertions(+), 4 deletions(-)
diff --git a/drivers/iommu/exynos-iommu.c b/drivers/iommu/exynos-iommu.c
index 4061b17..0bb194e 100644
--- a/drivers/iommu/exynos-iommu.c
+++ b/drivers/iommu/exynos-iommu.c
@@ -104,6 +104,8 @@
#define REG_PB1_SADDR 0x054
#define REG_PB1_EADDR 0x058
+static struct kmem_cache *lv2table_kmem_cache;
+
static unsigned long *section_entry(unsigned long *pgtable, unsigned long iova)
{
return pgtable + lv1ent_offset(iova);
@@ -865,7 +867,8 @@ static void exynos_iommu_domain_destroy(struct iommu_domain
*domain)
for (i = 0; i NUM_LV1ENTRIES; i++)
if (lv1ent_page(priv-pgtable + i))
- kfree(__va(lv2table_base(priv-pgtable + i)));
+ kmem_cache_free(lv2table_kmem_cache,
+ __va(lv2table_base(priv-pgtable + i)));
free_pages((unsigned long)priv-pgtable, 2);
free_pages((unsigned long)priv-lv2entcnt, 1);
@@ -959,7 +962,7 @@ static unsigned long *alloc_lv2entry(unsigned long *sent,
unsigned long iova,
if (lv1ent_fault(sent)) {
unsigned long *pent;
- pent = kzalloc(LV2TABLE_SIZE, GFP_ATOMIC);
+ pent = kmem_cache_zalloc(lv2table_kmem_cache, GFP_ATOMIC);
BUG_ON((unsigned long)pent (LV2TABLE_SIZE - 1));
if (!pent)
return NULL;
@@ -982,7 +985,7 @@ static int lv1set_section(unsigned long *sent, phys_addr_t
paddr, short *pgcnt)
if (*pgcnt != NUM_LV2ENTRIES)
return -EADDRINUSE;
- kfree(page_entry(sent, 0));
+ kmem_cache_free(lv2table_kmem_cache, page_entry(sent, 0));
*pgcnt = 0;
}
@@ -1168,10 +1171,23 @@ static int __init exynos_iommu_init(void)
{
int ret;
+ lv2table_kmem_cache = kmem_cache_create(exynos-iommu-lv2table,
+ LV2TABLE_SIZE, LV2TABLE_SIZE, 0, NULL);
+ if (!lv2table_kmem_cache) {
+ pr_err(%s: failed to create kmem cache\n, __func__);
+ return -ENOMEM;
+ }
+
ret = platform_driver_register(exynos_sysmmu_driver);
if (ret == 0)
- bus_set_iommu(platform_bus_type, exynos_iommu_ops);
+ ret = bus_set_iommu(platform_bus_type, exynos_iommu_ops);
+
+ if (ret) {
+ pr_err(%s: Failed to register exynos-iommu driver.\n,
+ __func__);
+ kmem_cache_destroy(lv2table_kmem_cache);
+ }
return ret;
}
--
1.8.0
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Re: [PATCH v3 0/6] ARM: EXYNOS: Add secure firmware support
Hi Kgene, On Thursday 22 of November 2012 15:52:14 Kukjin Kim wrote: Tomasz Figa wrote: On Monday 12 of November 2012 09:55:30 Russell King - ARM Linux wrote: On Mon, Nov 12, 2012 at 04:39:28PM +0900, Kukjin Kim wrote: (+ Russell King) I think there's still an amount of work to do here; it's not a generic interface at the moment because it makes some assumptions about how things are done (eg, it assumes that there _will_ be a CPU boot register; that is not always true. Moreover, the 'cpu' arguments given seem to be uncertain whether they're logical CPU numbers or physical CPU numbers. Lastly, where is this interface actually documented? It's just a bunch of code _without_ _any_ documentation. That means people will interpret it differently, and it'll get used differently from platform to platform. Let's have some documentation on this. Right, I will include documentation in next version of this patchset. Any updates on this? Thanks. Best regards, Kgene. -- Kukjin Kim kgene@samsung.com, Senior Engineer, SW Solution Development Team, Samsung Electronics Co., Ltd. I was waiting for some comments about my proposals, but since there is no new input I will prepare and post next version today. Best regards. -- Tomasz Figa Samsung Poland RD Center SW Solution Development, Linux Platform -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH v4 04/12] iommu/exynos: support for device tree
This commit adds device tree support for System MMU.
Signed-off-by: KyongHo Cho pullip@samsung.com
---
drivers/iommu/Kconfig| 2 +-
drivers/iommu/exynos-iommu.c | 289 ++-
2 files changed, 177 insertions(+), 114 deletions(-)
diff --git a/drivers/iommu/Kconfig b/drivers/iommu/Kconfig
index e39f9db..64586f1 100644
--- a/drivers/iommu/Kconfig
+++ b/drivers/iommu/Kconfig
@@ -168,7 +168,7 @@ config TEGRA_IOMMU_SMMU
config EXYNOS_IOMMU
bool Exynos IOMMU Support
- depends on ARCH_EXYNOS EXYNOS_DEV_SYSMMU
+ depends on ARCH_EXYNOS
select IOMMU_API
help
Support for the IOMMU(System MMU) of Samsung Exynos application
diff --git a/drivers/iommu/exynos-iommu.c b/drivers/iommu/exynos-iommu.c
index 7fe44f8..53972c8 100644
--- a/drivers/iommu/exynos-iommu.c
+++ b/drivers/iommu/exynos-iommu.c
@@ -1,6 +1,6 @@
-/* linux/drivers/iommu/exynos_iommu.c
+/* linux/drivers/iommu/exynos-iommu.c
*
- * Copyright (c) 2011 Samsung Electronics Co., Ltd.
+ * Copyright (c) 2011-2012 Samsung Electronics Co., Ltd.
* http://www.samsung.com
*
* This program is free software; you can redistribute it and/or modify
@@ -12,6 +12,7 @@
#define DEBUG
#endif
+#include linux/kernel.h
#include linux/io.h
#include linux/interrupt.h
#include linux/platform_device.h
@@ -25,11 +26,10 @@
#include linux/list.h
#include linux/memblock.h
#include linux/export.h
+#include linux/of.h
+#include linux/of_platform.h
#include asm/cacheflush.h
-#include asm/pgtable.h
-
-#include mach/sysmmu.h
/* We does not consider super section mapping (16MB) */
#define SECT_ORDER 20
@@ -169,15 +169,14 @@ struct sysmmu_drvdata {
struct list_head node; /* entry of exynos_iommu_domain.clients */
struct device *sysmmu; /* System MMU's device descriptor */
struct device *dev; /* Owner of system MMU */
- char *dbgname;
int nsfrs;
- void __iomem **sfrbases;
- struct clk *clk[2];
+ struct clk *clk;
int activations;
rwlock_t lock;
struct iommu_domain *domain;
sysmmu_fault_handler_t fault_handler;
unsigned long pgtable;
+ void __iomem *sfrbases[0];
};
static bool set_sysmmu_active(struct sysmmu_drvdata *data)
@@ -384,8 +383,8 @@ static irqreturn_t exynos_sysmmu_irq(int irq, void *dev_id)
if (!ret (itype != SYSMMU_FAULT_UNKNOWN))
__raw_writel(1 itype, data-sfrbases[i] + REG_INT_CLEAR);
else
- dev_dbg(data-sysmmu, (%s) %s is not handled.\n,
- data-dbgname, sysmmu_fault_name[itype]);
+ dev_dbg(data-sysmmu, %s is not handled.\n,
+ sysmmu_fault_name[itype]);
if (itype != SYSMMU_FAULT_UNKNOWN)
sysmmu_unblock(data-sfrbases[i]);
@@ -409,10 +408,8 @@ static bool __exynos_sysmmu_disable(struct sysmmu_drvdata
*data)
for (i = 0; i data-nsfrs; i++)
__raw_writel(CTRL_DISABLE, data-sfrbases[i] + REG_MMU_CTRL);
- if (data-clk[1])
- clk_disable(data-clk[1]);
- if (data-clk[0])
- clk_disable(data-clk[0]);
+ if (data-clk)
+ clk_disable(data-clk);
disabled = true;
data-pgtable = 0;
@@ -421,10 +418,10 @@ finish:
write_unlock_irqrestore(data-lock, flags);
if (disabled)
- dev_dbg(data-sysmmu, (%s) Disabled\n, data-dbgname);
+ dev_dbg(data-sysmmu, Disabled\n);
else
- dev_dbg(data-sysmmu, (%s) %d times left to be disabled\n,
- data-dbgname, data-activations);
+ dev_dbg(data-sysmmu, %d times left to be disabled\n,
+ data-activations);
return disabled;
}
@@ -451,14 +448,12 @@ static int __exynos_sysmmu_enable(struct sysmmu_drvdata
*data,
ret = 1;
}
- dev_dbg(data-sysmmu, (%s) Already enabled\n, data-dbgname);
+ dev_dbg(data-sysmmu, Already enabled\n);
goto finish;
}
- if (data-clk[0])
- clk_enable(data-clk[0]);
- if (data-clk[1])
- clk_enable(data-clk[1]);
+ if (data-clk)
+ clk_enable(data-clk);
data-pgtable = pgtable;
@@ -478,7 +473,7 @@ static int __exynos_sysmmu_enable(struct sysmmu_drvdata
*data,
data-domain = domain;
- dev_dbg(data-sysmmu, (%s) Enabled\n, data-dbgname);
+ dev_dbg(data-sysmmu, Enabled\n);
finish:
write_unlock_irqrestore(data-lock, flags);
@@ -494,7 +489,7 @@ int exynos_sysmmu_enable(struct device *dev, unsigned long
pgtable)
ret = pm_runtime_get_sync(data-sysmmu);
if (ret 0) {
- dev_dbg(data-sysmmu, (%s) Failed to enable\n, data-dbgname);
+ dev_dbg(data-sysmmu, Failed to enable\n);
[PATCH v4 08/12] iommu/exynos: set System MMU as the parent of client device
[PATCH v4 08/12] iommu/exynos: set System MMU as the parent of client device
This commit sets System MM as the parent of the client device for
power management. If System MMU is the parent of a device, it is
guaranteed that System MMU is suspended later than the device and
resumed earlier. Runtime suspend/resume on the device is also
propagated to the System MMU.
If a device is configured to have more than one System MMU, the
advantage of power management also works and the System MMUs are
also have relationships of parent and child. In this situation,
the client device is still the descendant of its System MMUs.
Cc: Rahul Sharma rahul.sha...@samsung.com
Signed-off-by: KyongHo Cho pullip@samsung.com
---
drivers/iommu/exynos-iommu.c | 540 ---
1 file changed, 360 insertions(+), 180 deletions(-)
diff --git a/drivers/iommu/exynos-iommu.c b/drivers/iommu/exynos-iommu.c
index e39ddac..576f6b1 100644
--- a/drivers/iommu/exynos-iommu.c
+++ b/drivers/iommu/exynos-iommu.c
@@ -104,6 +104,17 @@
#define REG_PB1_SADDR 0x054
#define REG_PB1_EADDR 0x058
+static void *sysmmu_placeholder; /* Inidcate if a device is System MMU */
+
+#define is_sysmmu(sysmmu) (sysmmu-archdata.iommu == sysmmu_placeholder)
+#define has_sysmmu(dev)
\
+ (dev-parent dev-archdata.iommu is_sysmmu(dev-parent))
+#define for_each_sysmmu(dev, sysmmu) \
+ for (sysmmu = dev-parent; sysmmu is_sysmmu(sysmmu); \
+ sysmmu = sysmmu-parent)
+#define for_each_sysmmu_until(dev, sysmmu, until) \
+ for (sysmmu = dev-parent; sysmmu != until; sysmmu = sysmmu-parent)
+
static struct kmem_cache *lv2table_kmem_cache;
static unsigned long *section_entry(unsigned long *pgtable, unsigned long iova)
@@ -170,6 +181,16 @@ struct exynos_iommu_domain {
spinlock_t pgtablelock; /* lock for modifying page table @ pgtable */
};
+/* exynos_iommu_owner
+ * Metadata attached to the owner of a group of System MMUs that belong
+ * to the same owner device.
+ */
+struct exynos_iommu_owner {
+ struct list_head client; /* entry of exynos_iommu_domain.clients */
+ struct device *dev;
+ spinlock_t lock;/* Lock to preserve consistency of System MMU */
+};
+
struct sysmmu_version {
unsigned char major; /* major = 0 means that driver must use MMU_VERSION
register instead of this structure */
@@ -177,9 +198,8 @@ struct sysmmu_version {
};
struct sysmmu_drvdata {
- struct list_head node; /* entry of exynos_iommu_domain.clients */
struct device *sysmmu; /* System MMU's device descriptor */
- struct device *dev; /* Owner of system MMU */
+ struct device *master; /* Client device that needs System MMU */
int nsfrs;
struct clk *clk;
int activations;
@@ -281,62 +301,70 @@ void exynos_sysmmu_set_prefbuf(struct device *dev,
unsigned long base0, unsigned long size0,
unsigned long base1, unsigned long size1)
{
- struct sysmmu_drvdata *data = dev_get_drvdata(dev-archdata.iommu);
- unsigned long flags;
- int i;
+ struct device *sysmmu;
- BUG_ON((base0 + size0) = base0);
- BUG_ON((size1 0) ((base1 + size1) = base1));
+ for_each_sysmmu(dev, sysmmu) {
+ int i;
+ unsigned long flags;
+ struct sysmmu_drvdata *data = dev_get_drvdata(sysmmu);
- spin_lock_irqsave(data-lock, flags);
- if (!is_sysmmu_active(data))
- goto finish;
+ BUG_ON((base0 + size0) = base0);
+ BUG_ON((size1 0) ((base1 + size1) = base1));
- for (i = 0; i data-nsfrs; i++) {
- if (__sysmmu_version(data, i, NULL) == 3) {
- if (!sysmmu_block(data-sfrbases[i]))
- continue;
-
- if (size1 == 0) {
- if (size0 = SZ_128K) {
- base1 = base0;
- size1 = size0;
- } else {
- size1 = size0 -
+ spin_lock_irqsave(data-lock, flags);
+ if (!is_sysmmu_active(data)) {
+ spin_unlock_irqrestore(data-lock, flags);
+ continue;
+ }
+
+ for (i = 0; i data-nsfrs; i++) {
+ if (__sysmmu_version(data, i, NULL) == 3) {
+ if (!sysmmu_block(data-sfrbases[i]))
+ continue;
+
+ if (size1 == 0) {
+ if (size0 = SZ_128K) {
+ base1 = base0;
+
[PATCH v4 07/12] iommu/exynos: change rwlock to spinlock
Since acquiring read_lock is not more frequent than write_lock, it is
not beneficial to use rwlock, this commit changes rwlock to spinlock.
Signed-off-by: KyongHo Cho pullip@samsung.com
---
drivers/iommu/exynos-iommu.c | 32
1 file changed, 16 insertions(+), 16 deletions(-)
diff --git a/drivers/iommu/exynos-iommu.c b/drivers/iommu/exynos-iommu.c
index 0bb194e..e39ddac 100644
--- a/drivers/iommu/exynos-iommu.c
+++ b/drivers/iommu/exynos-iommu.c
@@ -184,7 +184,7 @@ struct sysmmu_drvdata {
struct clk *clk;
int activations;
struct sysmmu_version ver;
- rwlock_t lock;
+ spinlock_t lock;
struct iommu_domain *domain;
sysmmu_fault_handler_t fault_handler;
unsigned long pgtable;
@@ -288,7 +288,7 @@ void exynos_sysmmu_set_prefbuf(struct device *dev,
BUG_ON((base0 + size0) = base0);
BUG_ON((size1 0) ((base1 + size1) = base1));
- read_lock_irqsave(data-lock, flags);
+ spin_lock_irqsave(data-lock, flags);
if (!is_sysmmu_active(data))
goto finish;
@@ -318,7 +318,7 @@ void exynos_sysmmu_set_prefbuf(struct device *dev,
}
}
finish:
- read_unlock_irqrestore(data-lock, flags);
+ spin_unlock_irqrestore(data-lock, flags);
}
static void __set_fault_handler(struct sysmmu_drvdata *data,
@@ -326,9 +326,9 @@ static void __set_fault_handler(struct sysmmu_drvdata *data,
{
unsigned long flags;
- write_lock_irqsave(data-lock, flags);
+ spin_lock_irqsave(data-lock, flags);
data-fault_handler = handler;
- write_unlock_irqrestore(data-lock, flags);
+ spin_unlock_irqrestore(data-lock, flags);
}
void exynos_sysmmu_set_fault_handler(struct device *dev,
@@ -376,7 +376,7 @@ static irqreturn_t exynos_sysmmu_irq(int irq, void *dev_id)
int i, ret = -ENOSYS;
- read_lock(data-lock);
+ spin_lock(data-lock);
WARN_ON(!is_sysmmu_active(data));
@@ -420,7 +420,7 @@ static irqreturn_t exynos_sysmmu_irq(int irq, void *dev_id)
if (itype != SYSMMU_FAULT_UNKNOWN)
sysmmu_unblock(data-sfrbases[i]);
- read_unlock(data-lock);
+ spin_unlock(data-lock);
return IRQ_HANDLED;
}
@@ -431,7 +431,7 @@ static bool __exynos_sysmmu_disable(struct sysmmu_drvdata
*data)
bool disabled = false;
int i;
- write_lock_irqsave(data-lock, flags);
+ spin_lock_irqsave(data-lock, flags);
if (!set_sysmmu_inactive(data))
goto finish;
@@ -446,7 +446,7 @@ static bool __exynos_sysmmu_disable(struct sysmmu_drvdata
*data)
data-pgtable = 0;
data-domain = NULL;
finish:
- write_unlock_irqrestore(data-lock, flags);
+ spin_unlock_irqrestore(data-lock, flags);
if (disabled)
dev_dbg(data-sysmmu, Disabled\n);
@@ -469,7 +469,7 @@ static int __exynos_sysmmu_enable(struct sysmmu_drvdata
*data,
int i, ret = 0;
unsigned long flags;
- write_lock_irqsave(data-lock, flags);
+ spin_lock_irqsave(data-lock, flags);
if (!set_sysmmu_active(data)) {
if (WARN_ON(pgtable != data-pgtable)) {
@@ -506,7 +506,7 @@ static int __exynos_sysmmu_enable(struct sysmmu_drvdata
*data,
dev_dbg(data-sysmmu, Enabled\n);
finish:
- write_unlock_irqrestore(data-lock, flags);
+ spin_unlock_irqrestore(data-lock, flags);
return ret;
}
@@ -553,7 +553,7 @@ static void sysmmu_tlb_invalidate_entry(struct device *dev,
unsigned long iova)
unsigned long flags;
struct sysmmu_drvdata *data = dev_get_drvdata(dev-archdata.iommu);
- read_lock_irqsave(data-lock, flags);
+ spin_lock_irqsave(data-lock, flags);
if (is_sysmmu_active(data)) {
int i;
@@ -569,7 +569,7 @@ static void sysmmu_tlb_invalidate_entry(struct device *dev,
unsigned long iova)
Disabled. Skipping invalidating TLB.\n);
}
- read_unlock_irqrestore(data-lock, flags);
+ spin_unlock_irqrestore(data-lock, flags);
}
void exynos_sysmmu_tlb_invalidate(struct device *dev)
@@ -577,7 +577,7 @@ void exynos_sysmmu_tlb_invalidate(struct device *dev)
unsigned long flags;
struct sysmmu_drvdata *data = dev_get_drvdata(dev-archdata.iommu);
- read_lock_irqsave(data-lock, flags);
+ spin_lock_irqsave(data-lock, flags);
if (is_sysmmu_active(data)) {
int i;
@@ -592,7 +592,7 @@ void exynos_sysmmu_tlb_invalidate(struct device *dev)
Disabled. Skipping invalidating TLB.\n);
}
- read_unlock_irqrestore(data-lock, flags);
+ spin_unlock_irqrestore(data-lock, flags);
}
static int __init __sysmmu_init_clock(struct device *sysmmu,
@@ -748,7 +748,7 @@ static int __init exynos_sysmmu_probe(struct
platform_device *pdev)
ret = __sysmmu_setup(dev, data);
if (!ret) {
[PATCH v4 11/12] iommu/exynos: add literal name of System MMU for debugging
This commit adds System MMU name to the driver data of each System
MMU. It is used by fault information.
Signed-off-by: KyongHo Cho pullip@samsung.com
---
drivers/iommu/exynos-iommu.c | 100 ---
1 file changed, 76 insertions(+), 24 deletions(-)
diff --git a/drivers/iommu/exynos-iommu.c b/drivers/iommu/exynos-iommu.c
index 985d317..4981afe 100644
--- a/drivers/iommu/exynos-iommu.c
+++ b/drivers/iommu/exynos-iommu.c
@@ -26,6 +26,7 @@
#include linux/list.h
#include linux/memblock.h
#include linux/export.h
+#include linux/string.h
#include linux/of.h
#include linux/of_platform.h
@@ -150,15 +151,21 @@ enum exynos_sysmmu_inttype {
SYSMMU_FAULTS_NUM
};
-/*
+/**
+ * fault handler function type
+ * @dev: the client device
+ * @mmuname: name of the System MMU that generates fault
* @itype: type of fault.
* @pgtable_base: the physical address of page table base. This is 0 if @itype
*is SYSMMU_BUSERROR.
* @fault_addr: the device (virtual) address that the System MMU tried to
* translated. This is 0 if @itype is SYSMMU_BUSERROR.
*/
-typedef int (*sysmmu_fault_handler_t)(enum exynos_sysmmu_inttype itype,
- unsigned long pgtable_base, unsigned long fault_addr);
+typedef int (*sysmmu_fault_handler_t)(struct device *dev,
+ const char *mmuname,
+ enum exynos_sysmmu_inttype itype,
+ unsigned long pgtable_base,
+ unsigned long fault_addr);
static unsigned short fault_reg_offset[SYSMMU_FAULTS_NUM] = {
REG_PAGE_FAULT_ADDR,
@@ -234,6 +241,7 @@ struct sysmmu_drvdata {
sysmmu_fault_handler_t fault_handler;
unsigned long pgtable;
bool runtime_active;
+ const char **mmuname;
void __iomem *sfrbases[0];
};
@@ -611,16 +619,18 @@ void exynos_sysmmu_set_fault_handler(struct device *dev,
spin_unlock_irqrestore(owner-lock, flags);
}
-static int default_fault_handler(enum exynos_sysmmu_inttype itype,
-unsigned long pgtable_base, unsigned long fault_addr)
+static int default_fault_handler(struct device *dev, const char *mmuname,
+ enum exynos_sysmmu_inttype itype,
+ unsigned long pgtable_base,
+ unsigned long fault_addr)
{
unsigned long *ent;
if ((itype = SYSMMU_FAULTS_NUM) || (itype SYSMMU_PAGEFAULT))
itype = SYSMMU_FAULT_UNKNOWN;
- pr_err(%s occurred at 0x%lx(Page table base: 0x%lx)\n,
- sysmmu_fault_name[itype], fault_addr, pgtable_base);
+ dev_err(dev, %s occured at 0x%lx by '%s'(Page table base: 0x%lx)\n,
+ sysmmu_fault_name[itype], fault_addr, mmuname, pgtable_base);
ent = section_entry(__va(pgtable_base), fault_addr);
pr_err(\tLv1 entry: 0x%lx\n, *ent);
@@ -641,25 +651,30 @@ static irqreturn_t exynos_sysmmu_irq(int irq, void
*dev_id)
{
/* SYSMMU is in blocked when interrupt occurred. */
struct sysmmu_drvdata *data = dev_id;
- struct resource *irqres;
- struct platform_device *pdev;
+ struct exynos_iommu_owner *owner = NULL;
enum exynos_sysmmu_inttype itype;
unsigned long addr = -1;
-
+ const char *mmuname = NULL;
int i, ret = -ENOSYS;
- spin_lock(data-lock);
+ if (data-master)
+ owner = data-master-archdata.iommu;
+
+ if (owner)
+ spin_lock(owner-lock);
WARN_ON(!is_sysmmu_active(data));
- pdev = to_platform_device(data-sysmmu);
- for (i = 0; i (pdev-num_resources / 2); i++) {
- irqres = platform_get_resource(pdev, IORESOURCE_IRQ, i);
+ for (i = 0; i data-nsfrs; i++) {
+ struct resource *irqres;
+ irqres = platform_get_resource(
+ to_platform_device(data-sysmmu),
+ IORESOURCE_IRQ, i);
if (irqres ((int)irqres-start == irq))
break;
}
- if (i == pdev-num_resources) {
+ if (i == data-nsfrs) {
itype = SYSMMU_FAULT_UNKNOWN;
} else {
itype = (enum exynos_sysmmu_inttype)
@@ -671,28 +686,34 @@ static irqreturn_t exynos_sysmmu_irq(int irq, void
*dev_id)
data-sfrbases[i] + fault_reg_offset[itype]);
}
- if (data-domain)
- ret = report_iommu_fault(data-domain, data-master,
+ if (data-domain) /* owner is always set if data-domain exists */
+ ret = report_iommu_fault(data-domain, owner-dev,
addr, itype);
if ((ret == -ENOSYS) data-fault_handler) {
unsigned long base = data-pgtable;
+ mmuname
[PATCH v4 12/12] iommu/exynos: add debugfs entries for System MMU
This commit adds debugfs directory and nodes for inspecting internal
state of System MMU.
Signed-off-by: KyongHo Cho pullip@samsung.com
---
drivers/iommu/exynos-iommu.c | 204 +--
1 file changed, 198 insertions(+), 6 deletions(-)
diff --git a/drivers/iommu/exynos-iommu.c b/drivers/iommu/exynos-iommu.c
index 4981afe..93885a3 100644
--- a/drivers/iommu/exynos-iommu.c
+++ b/drivers/iommu/exynos-iommu.c
@@ -26,12 +26,17 @@
#include linux/list.h
#include linux/memblock.h
#include linux/export.h
+#include linux/fs.h
+#include linux/seq_file.h
+#include linux/debugfs.h
#include linux/string.h
#include linux/of.h
#include linux/of_platform.h
#include asm/cacheflush.h
+#define MODULE_NAME exynos-sysmmu
+
/* We does not consider super section mapping (16MB) */
#define SECT_ORDER 20
#define LPAGE_ORDER 16
@@ -237,6 +242,7 @@ struct sysmmu_drvdata {
spinlock_t lock;
struct sysmmu_prefbuf pbufs[MAX_NUM_PBUF];
int num_pbufs;
+ struct dentry *debugfs_root;
struct iommu_domain *domain;
sysmmu_fault_handler_t fault_handler;
unsigned long pgtable;
@@ -1095,6 +1101,8 @@ static void __init __sysmmu_init_mmuname(struct device
*sysmmu,
}
}
+static void __create_debugfs_entry(struct sysmmu_drvdata *drvdata);
+
static int __init exynos_sysmmu_probe(struct platform_device *pdev)
{
int i, ret;
@@ -1165,6 +1173,8 @@ static int __init exynos_sysmmu_probe(struct
platform_device *pdev)
__set_fault_handler(data, default_fault_handler);
+ __create_debugfs_entry(data);
+
platform_set_drvdata(pdev, data);
dev-archdata.iommu = sysmmu_placeholder;
@@ -1269,7 +1279,7 @@ static struct platform_driver exynos_sysmmu_driver
__refdata = {
.probe = exynos_sysmmu_probe,
.driver = {
.owner = THIS_MODULE,
- .name = exynos-sysmmu,
+ .name = MODULE_NAME,
.pm = __pm_ops,
.of_match_table = of_match_ptr(sysmmu_of_match),
}
@@ -1646,6 +1656,8 @@ static struct iommu_ops exynos_iommu_ops = {
.pgsize_bitmap = SECT_SIZE | LPAGE_SIZE | SPAGE_SIZE,
};
+static struct dentry *sysmmu_debugfs_root; /* /sys/kernel/debug/sysmmu */
+
static int __init exynos_iommu_init(void)
{
int ret;
@@ -1657,17 +1669,197 @@ static int __init exynos_iommu_init(void)
return -ENOMEM;
}
- ret = platform_driver_register(exynos_sysmmu_driver);
+ ret = bus_set_iommu(platform_bus_type, exynos_iommu_ops);
+ if (ret) {
+ kmem_cache_destroy(lv2table_kmem_cache);
+ pr_err(%s: Failed to register IOMMU ops\n, __func__);
+ return -EFAULT;
+ }
- if (ret == 0)
- ret = bus_set_iommu(platform_bus_type, exynos_iommu_ops);
+ sysmmu_debugfs_root = debugfs_create_dir(sysmmu, NULL);
+ if (!sysmmu_debugfs_root)
+ pr_err(%s: Failed to create debugfs entry, 'sysmmu'\n,
+ __func__);
+ if (IS_ERR(sysmmu_debugfs_root))
+ sysmmu_debugfs_root = NULL;
+ ret = platform_driver_register(exynos_sysmmu_driver);
if (ret) {
- pr_err(%s: Failed to register exynos-iommu driver.\n,
- __func__);
kmem_cache_destroy(lv2table_kmem_cache);
+ pr_err(%s: Failed to register System MMU driver\n, __func__);
}
return ret;
}
subsys_initcall(exynos_iommu_init);
+
+static int debug_string_show(struct seq_file *s, void *unused)
+{
+ char *str = s-private;
+
+ seq_printf(s, %s\n, str);
+
+ return 0;
+}
+
+static int debug_sysmmu_list_show(struct seq_file *s, void *unused)
+{
+ struct sysmmu_drvdata *drvdata = s-private;
+ struct platform_device *pdev = to_platform_device(drvdata-sysmmu);
+ int idx, maj, min, ret;
+
+ seq_printf(s, SysMMU Name | Ver | SFR Base\n);
+
+ if (pm_runtime_enabled(drvdata-sysmmu)) {
+ ret = pm_runtime_get_sync(drvdata-sysmmu);
+ if (ret 0)
+ return ret;
+ }
+
+ for (idx = 0; idx drvdata-nsfrs; idx++) {
+ struct resource *res;
+
+ res = platform_get_resource(pdev, IORESOURCE_MEM, idx);
+ if (!res)
+ break;
+
+ maj = __sysmmu_version(drvdata, idx, min);
+
+ if (drvdata-mmuname) {
+ if (maj == 0)
+ seq_printf(s, %11.s | N/A | 0x%08x\n,
+ drvdata-mmuname[idx], res-start);
+ else
+ seq_printf(s, %11.s | %d.%d | 0x%08x\n,
+
Re: [PATCH] cpufreq: exynos: Broadcast frequency change notifications for all cores
On Wednesday, November 21, 2012 10:23:02 PM Tomasz Figa wrote:
Hi Rafael,
On Wednesday 21 of November 2012 21:47:42 Rafael J. Wysocki wrote:
On Wednesday, November 21, 2012 02:52:26 PM Tomasz Figa wrote:
On Tuesday 13 of November 2012 10:26:12 Tomasz Figa wrote:
On Exynos SoCs all cores share the same frequency setting, so
changing
frequency of one core will affect rest of cores.
This patch modifies the exynos-cpufreq driver to inform cpufreq core
about this behavior and broadcast frequency change notifications for
all cores.
Signed-off-by: Tomasz Figa t.f...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
drivers/cpufreq/exynos-cpufreq.c | 7 +--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/drivers/cpufreq/exynos-cpufreq.c
b/drivers/cpufreq/exynos-cpufreq.c index af2d81e..c0d54a8 100644
--- a/drivers/cpufreq/exynos-cpufreq.c
+++ b/drivers/cpufreq/exynos-cpufreq.c
@@ -100,7 +100,8 @@ static int exynos_target(struct cpufreq_policy
*policy, }
arm_volt = volt_table[index];
- cpufreq_notify_transition(freqs, CPUFREQ_PRECHANGE);
+ for_each_cpu(freqs.cpu, policy-cpus)
+ cpufreq_notify_transition(freqs, CPUFREQ_PRECHANGE);
/* When the new frequency is higher than current frequency */
if ((freqs.new freqs.old) !safe_arm_volt) {
@@ -115,7 +116,8 @@ static int exynos_target(struct cpufreq_policy
*policy, if (freqs.new != freqs.old)
exynos_info-set_freq(old_index, index);
- cpufreq_notify_transition(freqs, CPUFREQ_POSTCHANGE);
+ for_each_cpu(freqs.cpu, policy-cpus)
+ cpufreq_notify_transition(freqs, CPUFREQ_POSTCHANGE);
/* When the new frequency is lower than current frequency */
if ((freqs.new freqs.old) ||
@@ -235,6 +237,7 @@ static int exynos_cpufreq_cpu_init(struct
cpufreq_policy *policy) cpumask_copy(policy-related_cpus,
cpu_possible_mask);
cpumask_copy(policy-cpus, cpu_online_mask);
} else {
+ policy-shared_type = CPUFREQ_SHARED_TYPE_ANY;
cpumask_setall(policy-cpus);
}
Ping.
Am I supposed to handle this?
I guess. Would be really nice if you could apply this patch for 3.8.
OK
Applied to linux-pm.git/linux-next as v3.8 material.
Thanks,
Rafael
--
I speak only for myself.
Rafael J. Wysocki, Intel Open Source Technology Center.
--
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[PATCH v4 02/12] ARM: EXYNOS: add System MMU definition to DT
This commit adds System MMU nodes to DT of Exynos SoCs.
Signed-off-by: KyongHo Cho pullip@samsung.com
---
.../devicetree/bindings/arm/exynos/system-mmu.txt | 86
arch/arm/boot/dts/exynos4210.dtsi | 96 ++
arch/arm/boot/dts/exynos4x12.dtsi | 124 +
arch/arm/boot/dts/exynos5250.dtsi | 147 -
4 files changed, 451 insertions(+), 2 deletions(-)
create mode 100644 Documentation/devicetree/bindings/arm/exynos/system-mmu.txt
diff --git a/Documentation/devicetree/bindings/arm/exynos/system-mmu.txt
b/Documentation/devicetree/bindings/arm/exynos/system-mmu.txt
new file mode 100644
index 000..9c30a36
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/exynos/system-mmu.txt
@@ -0,0 +1,86 @@
+* Samsung Exynos System MMU
+
+Samsung's Exynos architecture includes System MMU that enables scattered
+physical chunks to be visible as a contiguous region to DMA-capabile peripheral
+devices like MFC, FIMC, FIMD, GScaler, FIMC-IS and so forth.
+
+System MMU is a sort of IOMMU and support identical translation table format to
+ARMv7 translation tables with minimum set of page properties including access
+permissions, shareability and security protection. In addition System MMU has
+another capabilities like L2 TLB or block-fetch buffers to minimize translation
+latency
+
+Each System MMU is included in the H/W block of a peripheral device. Thus, it
is
+important to specify that a System MMU is dedicated to which peripheral device
+before using System MMU. System initialization must specify the relationships
+between a System MMU and a peripheral device that owns the System MMU.
+
+Some device drivers may control several peripheral devices with a single device
+descriptor like MFC. Since handling a System MMU with IOMMU API requires a
+device descriptor that needs the System MMU, it is best to combine the System
+MMUs of the peripheral devices and control them with a single System MMU device
+descriptor. If it is unable to combine them into a single device descriptor,
+they can be linked with each other by the means of device.parent relationship.
+
+Required properties:
+- compatible: Should be samsung,exynos-sysmmu.
+- reg: Tuples of base address and size of System MMU registers. The number of
+ tuples can be more than one if two or more System MMUs are controlled
+ by a single device descriptor.
+- interrupt-parent: The phandle of the interrupt controller of System MMU
+- interrupts: Tuples of numbers that indicates the interrupt source. The
+ number of elements in the tuple is dependent upon
+ 'interrupt-parent' property. The number of tuples in this property
+ must be the same with 'reg' property.
+
+Optional properties:
+- mmuname: Strings of the name of System MMU for debugging purpose. The number
+ of strings must be the same with the number of tuples in 'reg'
+ property.
+- mmu-master: phandle to the device node that owns System MMU. Only the device
+ that is specified whith this property can control System MMU with
+ IOMMU API.
+
+Examples:
+
+MFC has 2 System MMUs for each port that MFC is attached. Thus it seems natural
+to define 2 System MMUs for each port of the MFC:
+
+ sysmmu-mfc-l {
+ mmuname = mfc_l;
+ reg = 0x1121 0x1000;
+ compatible = samsung,exynos-sysmmu;
+ interrupt-parent = combiner;
+ interrupts = 8 5;
+ mmu-master = mfc;
+ };
+
+ sysmmu-mfc-r {
+ mmuname = mfc_r;
+ reg = 0x1120 0x1000;
+ compatible = samsung,exynos-sysmmu;
+ interrupt-parent = combiner;
+ interrupts = 6 2;
+ mmu-master = mfc;
+ };
+
+Actually, MFC device driver requires sub-devices that represents each port and
+above 'mmu-master' properties of sysmmu-mfc-l and sysmmu-mfc-r have the
phandles
+to those sub-devices.
+
+However, it is also a good idea that treats the above System MMUs as one System
+MMU because those System MMUs are actually required by the MFC device:
+
+ sysmmu-mfc {
+ mmuname = mfc_l, mfc_r;
+ reg = 0x1121 0x1000
+ 0x1120 0x1000;
+ compatible = samsung,exynos-sysmmu;
+ interrupt-parent = combiner;
+ interrupts = 8 5
+ 6 2;
+ mmu-master = mfc;
+ };
+
+If System MMU of MFC is defined like the above, the number of elements and the
+order of list in 'mmuname', 'reg' and 'interrupts' must be the same.
diff --git a/arch/arm/boot/dts/exynos4210.dtsi
b/arch/arm/boot/dts/exynos4210.dtsi
index 939f639..d7a7a06 100644
--- a/arch/arm/boot/dts/exynos4210.dtsi
+++ b/arch/arm/boot/dts/exynos4210.dtsi
@@ -71,4 +71,100 @@
reg = 0x100C 0x100;
[PATCH v4 03/12] ARM: EXYNOS: remove system mmu initialization from exynos tree
This removes System MMU initialization from arch/arm/mach-exynos/
to move them to DT and the exynos-iommu driver except gating clock
definitions.
Signed-off-by: KyongHo Cho pullip@samsung.com
---
arch/arm/mach-exynos/Kconfig | 5 -
arch/arm/mach-exynos/Makefile | 1 -
arch/arm/mach-exynos/clock-exynos4.c | 41 +++--
arch/arm/mach-exynos/clock-exynos4210.c| 9 +-
arch/arm/mach-exynos/clock-exynos4212.c| 23 ++-
arch/arm/mach-exynos/clock-exynos5.c | 62 ---
arch/arm/mach-exynos/dev-sysmmu.c | 274 -
arch/arm/mach-exynos/include/mach/sysmmu.h | 66 ---
arch/arm/mach-exynos/mach-exynos4-dt.c | 34
arch/arm/mach-exynos/mach-exynos5-dt.c | 30
10 files changed, 137 insertions(+), 408 deletions(-)
delete mode 100644 arch/arm/mach-exynos/dev-sysmmu.c
delete mode 100644 arch/arm/mach-exynos/include/mach/sysmmu.h
diff --git a/arch/arm/mach-exynos/Kconfig b/arch/arm/mach-exynos/Kconfig
index bb3b09a..d5157d7 100644
--- a/arch/arm/mach-exynos/Kconfig
+++ b/arch/arm/mach-exynos/Kconfig
@@ -94,11 +94,6 @@ config EXYNOS4_SETUP_FIMD0
help
Common setup code for FIMD0.
-config EXYNOS_DEV_SYSMMU
- bool
- help
- Common setup code for SYSTEM MMU in EXYNOS platforms
-
config EXYNOS4_DEV_DWMCI
bool
help
diff --git a/arch/arm/mach-exynos/Makefile b/arch/arm/mach-exynos/Makefile
index 1797dee..7460ba2 100644
--- a/arch/arm/mach-exynos/Makefile
+++ b/arch/arm/mach-exynos/Makefile
@@ -53,7 +53,6 @@ obj-$(CONFIG_EXYNOS4_DEV_AHCI)+= dev-ahci.o
obj-$(CONFIG_EXYNOS4_DEV_DWMCI)+= dev-dwmci.o
obj-$(CONFIG_EXYNOS_DEV_DMA) += dma.o
obj-$(CONFIG_EXYNOS4_DEV_USB_OHCI) += dev-ohci.o
-obj-$(CONFIG_EXYNOS_DEV_SYSMMU)+= dev-sysmmu.o
obj-$(CONFIG_ARCH_EXYNOS) += setup-i2c0.o
obj-$(CONFIG_EXYNOS4_SETUP_FIMC) += setup-fimc.o
diff --git a/arch/arm/mach-exynos/clock-exynos4.c
b/arch/arm/mach-exynos/clock-exynos4.c
index efead60..c81a0ca 100644
--- a/arch/arm/mach-exynos/clock-exynos4.c
+++ b/arch/arm/mach-exynos/clock-exynos4.c
@@ -24,7 +24,6 @@
#include mach/map.h
#include mach/regs-clock.h
-#include mach/sysmmu.h
#include common.h
#include clock-exynos4.h
@@ -709,53 +708,53 @@ static struct clk exynos4_init_clocks_off[] = {
.enable = exynos4_clk_ip_peril_ctrl,
.ctrlbit= (1 14),
}, {
- .name = SYSMMU_CLOCK_NAME,
- .devname= SYSMMU_CLOCK_DEVNAME(mfc_l, 0),
+ .name = sysmmu,
+ .devname= exynos-sysmmu.0,
.enable = exynos4_clk_ip_mfc_ctrl,
.ctrlbit= (1 1),
}, {
- .name = SYSMMU_CLOCK_NAME,
- .devname= SYSMMU_CLOCK_DEVNAME(mfc_r, 1),
+ .name = sysmmu,
+ .devname= exynos-sysmmu.1,
.enable = exynos4_clk_ip_mfc_ctrl,
.ctrlbit= (1 2),
}, {
- .name = SYSMMU_CLOCK_NAME,
- .devname= SYSMMU_CLOCK_DEVNAME(tv, 2),
+ .name = sysmmu,
+ .devname= exynos-sysmmu.2,
.enable = exynos4_clk_ip_tv_ctrl,
.ctrlbit= (1 4),
}, {
- .name = SYSMMU_CLOCK_NAME,
- .devname= SYSMMU_CLOCK_DEVNAME(jpeg, 3),
+ .name = sysmmu,
+ .devname= exynos-sysmmu.3,
.enable = exynos4_clk_ip_cam_ctrl,
.ctrlbit= (1 11),
}, {
- .name = SYSMMU_CLOCK_NAME,
- .devname= SYSMMU_CLOCK_DEVNAME(rot, 4),
+ .name = sysmmu,
+ .devname= exynos-sysmmu.4,
.enable = exynos4_clk_ip_image_ctrl,
.ctrlbit= (1 4),
}, {
- .name = SYSMMU_CLOCK_NAME,
- .devname= SYSMMU_CLOCK_DEVNAME(fimc0, 5),
+ .name = sysmmu,
+ .devname= exynos-sysmmu.5,
.enable = exynos4_clk_ip_cam_ctrl,
.ctrlbit= (1 7),
}, {
- .name = SYSMMU_CLOCK_NAME,
- .devname= SYSMMU_CLOCK_DEVNAME(fimc1, 6),
+ .name = sysmmu,
+ .devname= exynos-sysmmu.6,
.enable = exynos4_clk_ip_cam_ctrl,
.ctrlbit= (1 8),
}, {
- .name = SYSMMU_CLOCK_NAME,
- .devname= SYSMMU_CLOCK_DEVNAME(fimc2, 7),
+ .name = sysmmu,
+ .devname=
RE: [PATCH 2/2] mmc: dw_mmc: Handle wp-gpios from device tree
Hi,
wp-gpios has been implemented in dw_mmc-exynos.c
It can be reused for EXYNOS platform? We need to modify some though.
Thanks,
Seungwon Jeon
On Thursday, November 22, 2012, Doug Anderson diand...@chromium.org wrote:
On some SoCs (like exynos5250) you need to use an external GPIO for
write protect. Add support for wp-gpios to the core dw_mmc driver
since it could be useful across multiple SoCs.
With this change I am able to make use of the write protect for the
external SD slot on exynos5250-snow.
Signed-off-by: Doug Anderson diand...@chromium.org
---
drivers/mmc/host/dw_mmc.c | 35 +++
1 files changed, 35 insertions(+), 0 deletions(-)
diff --git a/drivers/mmc/host/dw_mmc.c b/drivers/mmc/host/dw_mmc.c
index 5b41348..9c79870 100644
--- a/drivers/mmc/host/dw_mmc.c
+++ b/drivers/mmc/host/dw_mmc.c
@@ -34,6 +34,7 @@
#include linux/regulator/consumer.h
#include linux/workqueue.h
#include linux/of.h
+#include linux/of_gpio.h
#include dw_mmc.h
@@ -74,6 +75,7 @@ struct idmac_desc {
* struct dw_mci_slot - MMC slot state
* @mmc: The mmc_host representing this slot.
* @host: The MMC controller this slot is using.
+ * @wp_gpio: If gpio_is_valid() we'll use this to read write protect.
* @ctype: Card type for this slot.
* @mrq: mmc_request currently being processed or waiting to be
* processed, or NULL when the slot is idle.
@@ -88,6 +90,8 @@ struct dw_mci_slot {
struct mmc_host *mmc;
struct dw_mci *host;
+ int wp_gpio;
+
u32 ctype;
struct mmc_request *mrq;
@@ -832,6 +836,8 @@ static int dw_mci_get_ro(struct mmc_host *mmc)
read_only = 0;
else if (brd-get_ro)
read_only = brd-get_ro(slot-id);
+ else if (gpio_is_valid(slot-wp_gpio))
+ read_only = gpio_get_value(slot-wp_gpio);
else
read_only =
mci_readl(slot-host, WRTPRT) (1 slot-id) ? 1 : 0;
@@ -1802,6 +1808,29 @@ static u32 dw_mci_of_get_bus_wd(struct device *dev, u8
slot)
as 1\n);
return bus_wd;
}
+
+/* find the write protect gpio for a given slot; or -1 if none specified */
+static u32 dw_mci_of_get_wp_gpio(struct device *dev, u8 slot)
+{
+ struct device_node *np = dw_mci_of_find_slot_node(dev, slot);
+ int gpio;
+
+ if (!np)
+ return -1;
+
+ gpio = of_get_named_gpio(np, wp-gpios, 0);
+
+ /* Having a missing entry is valid; return silently */
+ if (!gpio_is_valid(gpio))
+ return -1;
+
+ if (devm_gpio_request(dev, gpio, dw-mci-wp)) {
+ dev_warn(dev, gpio [%d] request failed\n, gpio);
+ return -1;
+ }
+
+ return gpio;
+}
#else /* CONFIG_OF */
static u32 dw_mci_of_get_bus_wd(struct device *dev, u8 slot)
{
@@ -1811,6 +1840,10 @@ static struct device_node
*dw_mci_of_find_slot_node(struct device *dev, u8 slot)
{
return NULL;
}
+static u32 dw_mci_of_get_wp_gpio(struct device *dev, u8 slot)
+{
+ return -1;
+}
#endif /* CONFIG_OF */
static int dw_mci_init_slot(struct dw_mci *host, unsigned int id)
@@ -1923,6 +1956,8 @@ static int dw_mci_init_slot(struct dw_mci *host,
unsigned int id)
else
clear_bit(DW_MMC_CARD_PRESENT, slot-flags);
+ slot-wp_gpio = dw_mci_of_get_wp_gpio(host-dev, slot-id);
+
mmc_add_host(mmc);
#if defined(CONFIG_DEBUG_FS)
--
1.7.7.3
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RE: [PATCH 2/2] mmc: dw_mmc: Handle wp-gpios from device tree
On Thursday, November 22, 2012, Doug Anderson diand...@chromium.org wrote: On Wed, Nov 21, 2012 at 5:42 PM, Seungwon Jeon tgih@samsung.com wrote: Hi, wp-gpios has been implemented in dw_mmc-exynos.c It can be reused for EXYNOS platform? We need to modify some though. Yup, I've seen that. Patch 1/2 (mmc: dw_mmc: exynos: Stop claiming wp-gpio) addressed that. For some reason I can't find that on LKML.org yet. Strange. :-/ I'll forward it on to you shortly. In any case: I found that the exynos code didn't actually work. It claimed the GPIO but didn't ever look at it. I have the beginnings of the code to implement this properly in the exynos code but I stopped working on it when I decided that other SoCs could also benefit from the code and it fit better in the general dw_mmc driver. If you disagree and would like me to cleanup the version of this patch that's just in the exynos driver and post that, I will. Just let me know. Yes, origin code of dw_mmc-exynos didn't work fine. We need to modify it. Anyway, some problem in mailing? I didn't get 1/2 of patch. In addition, it's not found in any mail-archive. After resolved, I can review. Thanks, Seungwon Jeon Thanks for the review! -Doug -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH] ARM: EXYNOS: Add support for secondary CPU bring-up on Exynos4412
Exynos4412 uses different information register for each core. This patch
adjusts the bring-up code to take that into account.
Signed-off-by: Tomasz Figa t.f...@samsung.com
Reviewed-by: Kyungmin Park kyungmin.p...@samsung.com
---
arch/arm/mach-exynos/platsmp.c | 30 --
1 file changed, 24 insertions(+), 6 deletions(-)
diff --git a/arch/arm/mach-exynos/platsmp.c b/arch/arm/mach-exynos/platsmp.c
index f93d820..4ca8ff1 100644
--- a/arch/arm/mach-exynos/platsmp.c
+++ b/arch/arm/mach-exynos/platsmp.c
@@ -36,8 +36,22 @@
extern void exynos4_secondary_startup(void);
-#define CPU1_BOOT_REG (samsung_rev() == EXYNOS4210_REV_1_1 ? \
- S5P_INFORM5 : S5P_VA_SYSRAM)
+static inline void __iomem *cpu_boot_reg_base(void)
+{
+ if (soc_is_exynos4210() samsung_rev() == EXYNOS4210_REV_1_1)
+ return S5P_INFORM5;
+ return S5P_VA_SYSRAM;
+}
+
+static inline void __iomem *cpu_boot_reg(int cpu)
+{
+ void __iomem *boot_reg;
+
+ boot_reg = cpu_boot_reg_base();
+ if (soc_is_exynos4412())
+ boot_reg += 4*cpu;
+ return boot_reg;
+}
/*
* Write pen_release in a way that is guaranteed to be visible to all
@@ -84,6 +98,7 @@ static void __cpuinit exynos_secondary_init(unsigned int cpu)
static int __cpuinit exynos_boot_secondary(unsigned int cpu, struct
task_struct *idle)
{
unsigned long timeout;
+ unsigned long phys_cpu = cpu_logical_map(cpu);
/*
* Set synchronisation state between this boot processor
@@ -99,7 +114,7 @@ static int __cpuinit exynos_boot_secondary(unsigned int cpu,
struct task_struct
* Note that pen_release is the hardware CPU ID, whereas
* cpu is Linux's internal ID.
*/
- write_pen_release(cpu_logical_map(cpu));
+ write_pen_release(phys_cpu);
if (!(__raw_readl(S5P_ARM_CORE1_STATUS) S5P_CORE_LOCAL_PWR_EN)) {
__raw_writel(S5P_CORE_LOCAL_PWR_EN,
@@ -133,7 +148,7 @@ static int __cpuinit exynos_boot_secondary(unsigned int
cpu, struct task_struct
smp_rmb();
__raw_writel(virt_to_phys(exynos4_secondary_startup),
- CPU1_BOOT_REG);
+ cpu_boot_reg(phys_cpu));
gic_raise_softirq(cpumask_of(cpu), 0);
if (pen_release == -1)
@@ -181,6 +196,8 @@ static void __init exynos_smp_init_cpus(void)
static void __init exynos_smp_prepare_cpus(unsigned int max_cpus)
{
+ int i;
+
if (!soc_is_exynos5250())
scu_enable(scu_base_addr());
@@ -190,8 +207,9 @@ static void __init exynos_smp_prepare_cpus(unsigned int
max_cpus)
* until it receives a soft interrupt, and then the
* secondary CPU branches to this address.
*/
- __raw_writel(virt_to_phys(exynos4_secondary_startup),
- CPU1_BOOT_REG);
+ for (i = 1; i max_cpus; ++i)
+ __raw_writel(virt_to_phys(exynos4_secondary_startup),
+ cpu_boot_reg(cpu_logical_map(i)));
}
struct smp_operations exynos_smp_ops __initdata = {
--
1.8.0
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[PATCH v4 1/5] ARM: Add interface for registering and calling firmware-specific operations
Some boards are running with secure firmware running in TrustZone secure
world, which changes the way some things have to be initialized.
This patch adds an interface for platforms to specify available firmware
operations and call them.
A wrapper macro, call_firmware_op(), checks if the operation is provided
and calls it if so, otherwise returns -ENOSYS to allow fallback to
legacy operation..
By default no operations are provided.
Example of use:
In code using firmware ops:
__raw_writel(virt_to_phys(exynos4_secondary_startup),
CPU1_BOOT_REG);
/* Call Exynos specific smc call */
if (call_firmware_op(cpu_boot, cpu) == -ENOSYS)
cpu_boot_legacy(...); /* Try legacy way */
gic_raise_softirq(cpumask_of(cpu), 1);
In board-/platform-specific code:
static int platformX_do_idle(void)
{
/* tell platformX firmware to enter idle */
return 0;
}
static int platformX_cpu_boot(int i)
{
/* tell platformX firmware to boot CPU i */
return 0;
}
static const struct firmware_ops platformX_firmware_ops = {
.do_idle= exynos_do_idle,
.cpu_boot = exynos_cpu_boot,
/* other operations not available on platformX */
};
static void __init board_init_early(void)
{
register_firmware_ops(platformX_firmware_ops);
}
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
Signed-off-by: Tomasz Figa t.f...@samsung.com
---
Documentation/arm/firmware.txt | 88 +
arch/arm/common/Makefile| 2 +
arch/arm/common/firmware.c | 18 +
arch/arm/include/asm/firmware.h | 66 +++
4 files changed, 174 insertions(+)
create mode 100644 Documentation/arm/firmware.txt
create mode 100644 arch/arm/common/firmware.c
create mode 100644 arch/arm/include/asm/firmware.h
diff --git a/Documentation/arm/firmware.txt b/Documentation/arm/firmware.txt
new file mode 100644
index 000..c2e468f
--- /dev/null
+++ b/Documentation/arm/firmware.txt
@@ -0,0 +1,88 @@
+Interface for registering and calling firmware-specific operations for ARM.
+
+Written by Tomasz Figa t.f...@samsung.com
+
+Some boards are running with secure firmware running in TrustZone secure
+world, which changes the way some things have to be initialized. This makes
+a need to provide an interface for such platforms to specify available firmware
+operations and call them when needed.
+
+Firmware operations can be specified using struct firmware_ops
+
+ struct firmware_ops {
+ /*
+ * Enters CPU idle mode
+ */
+ int (*do_idle)(void);
+ /*
+ * Sets boot address of specified physical CPU
+ */
+ int (*set_cpu_boot_addr)(int cpu, unsigned long boot_addr);
+ /*
+ * Boots specified physical CPU
+ */
+ int (*cpu_boot)(int cpu);
+ /*
+ * Initializes L2 cache
+ */
+ int (*l2x0_init)(void);
+ };
+
+and then registered with register_firmware_ops function
+
+ void register_firmware_ops(const struct firmware_ops *ops)
+
+the ops pointer must be non-NULL.
+
+There is a default, empty set of operations provided, so there is no need to
+set anything if platform does not require firmware operations.
+
+To call a firmware operation, a helper macro is provided
+
+ #define call_firmware_op(op, ...) \
+ ((firmware_ops-op) ? firmware_ops-op(__VA_ARGS__) : (-ENOSYS))
+
+the macro checks if the operation is provided and calls it or otherwise returns
+-ENOSYS to signal that given operation is not available (for example, to allow
+fallback to legacy operation).
+
+Example of registering firmware operations:
+
+ /* board file */
+
+ static int platformX_do_idle(void)
+ {
+ /* tell platformX firmware to enter idle */
+ return 0;
+ }
+
+ static int platformX_cpu_boot(int i)
+ {
+ /* tell platformX firmware to boot CPU i */
+ return 0;
+ }
+
+ static const struct firmware_ops platformX_firmware_ops = {
+ .do_idle= exynos_do_idle,
+ .cpu_boot = exynos_cpu_boot,
+ /* other operations not available on platformX */
+ };
+
+ /* init_early callback of machine descriptor */
+ static void __init board_init_early(void)
+ {
+ register_firmware_ops(platformX_firmware_ops);
+ }
+
+Example of using a firmware operation:
+
+ /* some platform code, e.g. SMP initialization */
+
+ __raw_writel(virt_to_phys(exynos4_secondary_startup),
+
[PATCH 2/2] mmc: dw_mmc: Handle wp-gpios from device tree
On some SoCs (like exynos5250) you need to use an external GPIO for
write protect. Add support for wp-gpios to the core dw_mmc driver
since it could be useful across multiple SoCs.
With this change I am able to make use of the write protect for the
external SD slot on exynos5250-snow.
Signed-off-by: Doug Anderson diand...@chromium.org
---
drivers/mmc/host/dw_mmc.c | 35 +++
1 files changed, 35 insertions(+), 0 deletions(-)
diff --git a/drivers/mmc/host/dw_mmc.c b/drivers/mmc/host/dw_mmc.c
index 5b41348..9c79870 100644
--- a/drivers/mmc/host/dw_mmc.c
+++ b/drivers/mmc/host/dw_mmc.c
@@ -34,6 +34,7 @@
#include linux/regulator/consumer.h
#include linux/workqueue.h
#include linux/of.h
+#include linux/of_gpio.h
#include dw_mmc.h
@@ -74,6 +75,7 @@ struct idmac_desc {
* struct dw_mci_slot - MMC slot state
* @mmc: The mmc_host representing this slot.
* @host: The MMC controller this slot is using.
+ * @wp_gpio: If gpio_is_valid() we'll use this to read write protect.
* @ctype: Card type for this slot.
* @mrq: mmc_request currently being processed or waiting to be
* processed, or NULL when the slot is idle.
@@ -88,6 +90,8 @@ struct dw_mci_slot {
struct mmc_host *mmc;
struct dw_mci *host;
+ int wp_gpio;
+
u32 ctype;
struct mmc_request *mrq;
@@ -832,6 +836,8 @@ static int dw_mci_get_ro(struct mmc_host *mmc)
read_only = 0;
else if (brd-get_ro)
read_only = brd-get_ro(slot-id);
+ else if (gpio_is_valid(slot-wp_gpio))
+ read_only = gpio_get_value(slot-wp_gpio);
else
read_only =
mci_readl(slot-host, WRTPRT) (1 slot-id) ? 1 : 0;
@@ -1802,6 +1808,29 @@ static u32 dw_mci_of_get_bus_wd(struct device *dev, u8
slot)
as 1\n);
return bus_wd;
}
+
+/* find the write protect gpio for a given slot; or -1 if none specified */
+static u32 dw_mci_of_get_wp_gpio(struct device *dev, u8 slot)
+{
+ struct device_node *np = dw_mci_of_find_slot_node(dev, slot);
+ int gpio;
+
+ if (!np)
+ return -1;
+
+ gpio = of_get_named_gpio(np, wp-gpios, 0);
+
+ /* Having a missing entry is valid; return silently */
+ if (!gpio_is_valid(gpio))
+ return -1;
+
+ if (devm_gpio_request(dev, gpio, dw-mci-wp)) {
+ dev_warn(dev, gpio [%d] request failed\n, gpio);
+ return -1;
+ }
+
+ return gpio;
+}
#else /* CONFIG_OF */
static u32 dw_mci_of_get_bus_wd(struct device *dev, u8 slot)
{
@@ -1811,6 +1840,10 @@ static struct device_node
*dw_mci_of_find_slot_node(struct device *dev, u8 slot)
{
return NULL;
}
+static u32 dw_mci_of_get_wp_gpio(struct device *dev, u8 slot)
+{
+ return -1;
+}
#endif /* CONFIG_OF */
static int dw_mci_init_slot(struct dw_mci *host, unsigned int id)
@@ -1923,6 +1956,8 @@ static int dw_mci_init_slot(struct dw_mci *host, unsigned
int id)
else
clear_bit(DW_MMC_CARD_PRESENT, slot-flags);
+ slot-wp_gpio = dw_mci_of_get_wp_gpio(host-dev, slot-id);
+
mmc_add_host(mmc);
#if defined(CONFIG_DEBUG_FS)
--
1.7.7.3
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[PATCH v4 4/5] ARM: EXYNOS: Add IO mapping for non-secure SYSRAM.
On TrustZone-enabled boards the non-secure SYSRAM is used for secondary
CPU bring-up, so add a mapping for it.
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
Signed-off-by: Tomasz Figa t.f...@samsung.com
---
arch/arm/mach-exynos/common.c| 35
arch/arm/mach-exynos/include/mach/map.h | 3 +++
arch/arm/plat-samsung/include/plat/map-s5p.h | 1 +
3 files changed, 39 insertions(+)
diff --git a/arch/arm/mach-exynos/common.c b/arch/arm/mach-exynos/common.c
index 95c0882..e984546 100644
--- a/arch/arm/mach-exynos/common.c
+++ b/arch/arm/mach-exynos/common.c
@@ -231,6 +231,33 @@ static struct map_desc exynos4_iodesc1[] __initdata = {
},
};
+static struct map_desc exynos4210_iodesc[] __initdata = {
+ {
+ .virtual= (unsigned long)S5P_VA_SYSRAM_NS,
+ .pfn= __phys_to_pfn(EXYNOS4210_PA_SYSRAM_NS),
+ .length = SZ_4K,
+ .type = MT_DEVICE,
+ },
+};
+
+static struct map_desc exynos4x12_iodesc[] __initdata = {
+ {
+ .virtual= (unsigned long)S5P_VA_SYSRAM_NS,
+ .pfn= __phys_to_pfn(EXYNOS4x12_PA_SYSRAM_NS),
+ .length = SZ_4K,
+ .type = MT_DEVICE,
+ },
+};
+
+static struct map_desc exynos5250_iodesc[] __initdata = {
+ {
+ .virtual= (unsigned long)S5P_VA_SYSRAM_NS,
+ .pfn= __phys_to_pfn(EXYNOS5250_PA_SYSRAM_NS),
+ .length = SZ_4K,
+ .type = MT_DEVICE,
+ },
+};
+
static struct map_desc exynos5_iodesc[] __initdata = {
{
.virtual= (unsigned long)S3C_VA_SYS,
@@ -354,6 +381,11 @@ static void __init exynos4_map_io(void)
else
iotable_init(exynos4_iodesc1, ARRAY_SIZE(exynos4_iodesc1));
+ if (soc_is_exynos4210())
+ iotable_init(exynos4210_iodesc, ARRAY_SIZE(exynos4210_iodesc));
+ if (soc_is_exynos4212() || soc_is_exynos4412())
+ iotable_init(exynos4x12_iodesc, ARRAY_SIZE(exynos4x12_iodesc));
+
/* initialize device information early */
exynos4_default_sdhci0();
exynos4_default_sdhci1();
@@ -386,6 +418,9 @@ static void __init exynos4_map_io(void)
static void __init exynos5_map_io(void)
{
iotable_init(exynos5_iodesc, ARRAY_SIZE(exynos5_iodesc));
+
+ if (soc_is_exynos5250())
+ iotable_init(exynos5250_iodesc, ARRAY_SIZE(exynos5250_iodesc));
}
static void __init exynos4_init_clocks(int xtal)
diff --git a/arch/arm/mach-exynos/include/mach/map.h
b/arch/arm/mach-exynos/include/mach/map.h
index 1df6abb..b8ea67e 100644
--- a/arch/arm/mach-exynos/include/mach/map.h
+++ b/arch/arm/mach-exynos/include/mach/map.h
@@ -26,6 +26,9 @@
#define EXYNOS4_PA_SYSRAM0 0x02025000
#define EXYNOS4_PA_SYSRAM1 0x0202
#define EXYNOS5_PA_SYSRAM 0x0202
+#define EXYNOS4210_PA_SYSRAM_NS0x0203F000
+#define EXYNOS4x12_PA_SYSRAM_NS0x0204F000
+#define EXYNOS5250_PA_SYSRAM_NS0x0204F000
#define EXYNOS4_PA_FIMC0 0x1180
#define EXYNOS4_PA_FIMC1 0x1181
diff --git a/arch/arm/plat-samsung/include/plat/map-s5p.h
b/arch/arm/plat-samsung/include/plat/map-s5p.h
index c2d7bda..c186786 100644
--- a/arch/arm/plat-samsung/include/plat/map-s5p.h
+++ b/arch/arm/plat-samsung/include/plat/map-s5p.h
@@ -22,6 +22,7 @@
#define S5P_VA_GPIO3 S3C_ADDR(0x0228)
#define S5P_VA_SYSRAM S3C_ADDR(0x0240)
+#define S5P_VA_SYSRAM_NS S3C_ADDR(0x0241)
#define S5P_VA_DMC0S3C_ADDR(0x0244)
#define S5P_VA_DMC1S3C_ADDR(0x0248)
#define S5P_VA_SROMC S3C_ADDR(0x024C)
--
1.8.0
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[PATCH v4 0/5] ARM: EXYNOS: Add secure firmware support
Some Exynos-based boards are running with secure firmware running in TrustZone secure world, which changes the way some things have to be initialized. This series adds support for specifying firmware operations, implements some firmware operations for Exynos secure firmware and adds a method of enabling secure firmware operations on Exynos-based boards through board file and device tree. Depends on: - ARM: EXYNOS: Add support for secondary CPU bring-up on Exynos4412 Changes since v3 ( http://thread.gmane.org/gmane.linux.kernel.samsung-soc/13442 ) - Replaced cpu_boot_reg call with cpu_set_boot_addr - Added interface documentation - Separated from Exynos4x12 secondary CPU bring-up patch Changes since v2 ( http://thread.gmane.org/gmane.linux.kernel.samsung-soc/12848 ) - Made Exynos firmware binding require address - Minor style fixes Changes since v1 ( http://thread.gmane.org/gmane.linux.kernel.samsung-soc/12583/focus=12820 ) - Changed return types of all operations to int - Defined all operations to return 0 on success, -ENOSYS when not implemented or appropriate error code on error Tomasz Figa (5): ARM: Add interface for registering and calling firmware-specific operations ARM: EXYNOS: Add support for secure monitor calls ARM: EXYNOS: Add support for Exynos secure firmware ARM: EXYNOS: Add IO mapping for non-secure SYSRAM. ARM: EXYNOS: Add secure firmware support to secondary CPU bring-up Documentation/arm/firmware.txt | 88 ++ .../devicetree/bindings/arm/samsung-boards.txt | 10 +++ arch/arm/common/Makefile | 2 + arch/arm/common/firmware.c | 18 + arch/arm/include/asm/firmware.h| 66 arch/arm/mach-exynos/Makefile | 6 ++ arch/arm/mach-exynos/common.c | 35 + arch/arm/mach-exynos/common.h | 2 + arch/arm/mach-exynos/exynos-smc.S | 22 ++ arch/arm/mach-exynos/firmware.c| 70 + arch/arm/mach-exynos/include/mach/map.h| 3 + arch/arm/mach-exynos/mach-exynos4-dt.c | 1 + arch/arm/mach-exynos/platsmp.c | 32 ++-- arch/arm/mach-exynos/smc.h | 31 arch/arm/plat-samsung/include/plat/map-s5p.h | 1 + 15 files changed, 382 insertions(+), 5 deletions(-) create mode 100644 Documentation/arm/firmware.txt create mode 100644 arch/arm/common/firmware.c create mode 100644 arch/arm/include/asm/firmware.h create mode 100644 arch/arm/mach-exynos/exynos-smc.S create mode 100644 arch/arm/mach-exynos/firmware.c create mode 100644 arch/arm/mach-exynos/smc.h -- 1.8.0 -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH v4 5/5] ARM: EXYNOS: Add secure firmware support to secondary CPU bring-up
Boards using secure firmware must use different CPU boot registers and
call secure firmware to boot the CPU.
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
Signed-off-by: Tomasz Figa t.f...@samsung.com
---
arch/arm/mach-exynos/platsmp.c | 32 +++-
1 file changed, 27 insertions(+), 5 deletions(-)
diff --git a/arch/arm/mach-exynos/platsmp.c b/arch/arm/mach-exynos/platsmp.c
index 4ca8ff1..7dc2f88 100644
--- a/arch/arm/mach-exynos/platsmp.c
+++ b/arch/arm/mach-exynos/platsmp.c
@@ -25,6 +25,7 @@
#include asm/hardware/gic.h
#include asm/smp_plat.h
#include asm/smp_scu.h
+#include asm/firmware.h
#include mach/hardware.h
#include mach/regs-clock.h
@@ -145,10 +146,21 @@ static int __cpuinit exynos_boot_secondary(unsigned int
cpu, struct task_struct
timeout = jiffies + (1 * HZ);
while (time_before(jiffies, timeout)) {
+ unsigned long boot_addr;
+
smp_rmb();
- __raw_writel(virt_to_phys(exynos4_secondary_startup),
- cpu_boot_reg(phys_cpu));
+ boot_addr = virt_to_phys(exynos4_secondary_startup);
+
+ /*
+* Try to set boot address using firmware first
+* and fall back to boot register if it fails.
+*/
+ if (call_firmware_op(set_cpu_boot_addr, phys_cpu, boot_addr))
+ __raw_writel(boot_addr, cpu_boot_reg(phys_cpu));
+
+ call_firmware_op(cpu_boot, phys_cpu);
+
gic_raise_softirq(cpumask_of(cpu), 0);
if (pen_release == -1)
@@ -206,10 +218,20 @@ static void __init exynos_smp_prepare_cpus(unsigned int
max_cpus)
* system-wide flags register. The boot monitor waits
* until it receives a soft interrupt, and then the
* secondary CPU branches to this address.
+*
+* Try using firmware operation first and fall back to
+* boot register if it fails.
*/
- for (i = 1; i max_cpus; ++i)
- __raw_writel(virt_to_phys(exynos4_secondary_startup),
- cpu_boot_reg(cpu_logical_map(i)));
+ for (i = 1; i max_cpus; ++i) {
+ unsigned long phys_cpu;
+ unsigned long boot_addr;
+
+ phys_cpu = cpu_logical_map(i);
+ boot_addr = virt_to_phys(exynos4_secondary_startup);
+
+ if (call_firmware_op(set_cpu_boot_addr, phys_cpu, boot_addr))
+ __raw_writel(boot_addr, cpu_boot_reg(phys_cpu));
+ }
}
struct smp_operations exynos_smp_ops __initdata = {
--
1.8.0
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[PATCH v4 2/5] ARM: EXYNOS: Add support for secure monitor calls
Some boards use secure monitor calls to communicate with secure
firmware.
This patch adds exynos_smc function which uses smc assembly instruction
to do secure monitor calls.
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
Signed-off-by: Tomasz Figa t.f...@samsung.com
---
arch/arm/mach-exynos/Makefile | 5 +
arch/arm/mach-exynos/exynos-smc.S | 22 ++
arch/arm/mach-exynos/smc.h| 31 +++
3 files changed, 58 insertions(+)
create mode 100644 arch/arm/mach-exynos/exynos-smc.S
create mode 100644 arch/arm/mach-exynos/smc.h
diff --git a/arch/arm/mach-exynos/Makefile b/arch/arm/mach-exynos/Makefile
index c12ed6a..a031012 100644
--- a/arch/arm/mach-exynos/Makefile
+++ b/arch/arm/mach-exynos/Makefile
@@ -30,6 +30,11 @@ obj-$(CONFIG_EXYNOS4_MCT)+= mct.o
obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o
+obj-$(CONFIG_ARCH_EXYNOS) += exynos-smc.o
+
+plus_sec := $(call as-instr,.arch_extension sec,+sec)
+AFLAGS_exynos-smc.o:=-Wa,-march=armv7-a$(plus_sec)
+
# machine support
obj-$(CONFIG_MACH_SMDKC210)+= mach-smdkv310.o
diff --git a/arch/arm/mach-exynos/exynos-smc.S
b/arch/arm/mach-exynos/exynos-smc.S
new file mode 100644
index 000..2e27aa3
--- /dev/null
+++ b/arch/arm/mach-exynos/exynos-smc.S
@@ -0,0 +1,22 @@
+/*
+ * Copyright (C) 2012 Samsung Electronics.
+ *
+ * Copied from omap-smc.S Copyright (C) 2010 Texas Instruments, Inc.
+ *
+ * This program is free software,you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include linux/linkage.h
+
+/*
+ * Function signature: void exynos_smc(u32 cmd, u32 arg1, u32 arg2, u32 arg3)
+ */
+
+ENTRY(exynos_smc)
+ stmfd sp!, {r4-r11, lr}
+ dsb
+ smc #0
+ ldmfd sp!, {r4-r11, pc}
+ENDPROC(exynos_smc)
diff --git a/arch/arm/mach-exynos/smc.h b/arch/arm/mach-exynos/smc.h
new file mode 100644
index 000..e972390
--- /dev/null
+++ b/arch/arm/mach-exynos/smc.h
@@ -0,0 +1,31 @@
+/*
+ * Copyright (c) 2012 Samsung Electronics.
+ *
+ * EXYNOS - SMC Call
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef __ASM_ARCH_EXYNOS_SMC_H
+#define __ASM_ARCH_EXYNOS_SMC_H
+
+#define SMC_CMD_INIT(-1)
+#define SMC_CMD_INFO(-2)
+/* For Power Management */
+#define SMC_CMD_SLEEP (-3)
+#define SMC_CMD_CPU1BOOT(-4)
+#define SMC_CMD_CPU0AFTR(-5)
+/* For CP15 Access */
+#define SMC_CMD_C15RESUME (-11)
+/* For L2 Cache Access */
+#define SMC_CMD_L2X0CTRL(-21)
+#define SMC_CMD_L2X0SETUP1 (-22)
+#define SMC_CMD_L2X0SETUP2 (-23)
+#define SMC_CMD_L2X0INVALL (-24)
+#define SMC_CMD_L2X0DEBUG (-25)
+
+extern void exynos_smc(u32 cmd, u32 arg1, u32 arg2, u32 arg3);
+
+#endif
--
1.8.0
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[PATCH v4 3/5] ARM: EXYNOS: Add support for Exynos secure firmware
Some Exynos-based boards contain secure firmware and must use firmware
operations to set up some hardware.
This patch adds firmware operations for Exynos secure firmware and a way
for board code and device tree to specify that they must be used.
Example of use:
In board code:
...MACHINE_START(...)
/* ... */
.init_early = exynos_firmware_init,
/* ... */
MACHINE_END
In device tree:
/ {
/* ... */
firmware@0203F000 {
compatible = samsung,secure-firmware;
reg = 0x0203F000 0x1000;
};
/* ... */
};
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
Signed-off-by: Tomasz Figa t.f...@samsung.com
---
.../devicetree/bindings/arm/samsung-boards.txt | 10
arch/arm/mach-exynos/Makefile | 1 +
arch/arm/mach-exynos/common.h | 2 +
arch/arm/mach-exynos/firmware.c| 70 ++
arch/arm/mach-exynos/mach-exynos4-dt.c | 1 +
5 files changed, 84 insertions(+)
create mode 100644 arch/arm/mach-exynos/firmware.c
diff --git a/Documentation/devicetree/bindings/arm/samsung-boards.txt
b/Documentation/devicetree/bindings/arm/samsung-boards.txt
index 0bf68be..2168ed3 100644
--- a/Documentation/devicetree/bindings/arm/samsung-boards.txt
+++ b/Documentation/devicetree/bindings/arm/samsung-boards.txt
@@ -6,3 +6,13 @@ Required root node properties:
- compatible = should be one or more of the following.
(a) samsung,smdkv310 - for Samsung's SMDKV310 eval board.
(b) samsung,exynos4210 - for boards based on Exynos4210 SoC.
+
+Optional:
+- firmware node, specifying presence and type of secure firmware:
+- compatible: only samsung,secure-firmware is currently supported
+- reg: address of non-secure SYSRAM used for communication with
firmware
+
+ firmware@0203F000 {
+ compatible = samsung,secure-firmware;
+ reg = 0x0203F000 0x1000;
+ };
diff --git a/arch/arm/mach-exynos/Makefile b/arch/arm/mach-exynos/Makefile
index a031012..685e4a7 100644
--- a/arch/arm/mach-exynos/Makefile
+++ b/arch/arm/mach-exynos/Makefile
@@ -31,6 +31,7 @@ obj-$(CONFIG_EXYNOS4_MCT) += mct.o
obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o
obj-$(CONFIG_ARCH_EXYNOS) += exynos-smc.o
+obj-$(CONFIG_ARCH_EXYNOS) += firmware.o
plus_sec := $(call as-instr,.arch_extension sec,+sec)
AFLAGS_exynos-smc.o:=-Wa,-march=armv7-a$(plus_sec)
diff --git a/arch/arm/mach-exynos/common.h b/arch/arm/mach-exynos/common.h
index dac146d..5f1d393 100644
--- a/arch/arm/mach-exynos/common.h
+++ b/arch/arm/mach-exynos/common.h
@@ -22,6 +22,8 @@ void exynos4_restart(char mode, const char *cmd);
void exynos5_restart(char mode, const char *cmd);
void exynos_init_late(void);
+void exynos_firmware_init(void);
+
#ifdef CONFIG_PM_GENERIC_DOMAINS
int exynos_pm_late_initcall(void);
#else
diff --git a/arch/arm/mach-exynos/firmware.c b/arch/arm/mach-exynos/firmware.c
new file mode 100644
index 000..88e3eed
--- /dev/null
+++ b/arch/arm/mach-exynos/firmware.c
@@ -0,0 +1,70 @@
+/*
+ * Copyright (C) 2012 Samsung Electronics.
+ * Kyungmin Park kyungmin.p...@samsung.com
+ * Tomasz Figa t.f...@samsung.com
+ *
+ * This program is free software,you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include linux/kernel.h
+#include linux/io.h
+#include linux/init.h
+#include linux/of.h
+#include linux/of_address.h
+
+#include asm/firmware.h
+
+#include mach/map.h
+
+#include smc.h
+
+static int exynos_do_idle(void)
+{
+exynos_smc(SMC_CMD_SLEEP, 0, 0, 0);
+return 0;
+}
+
+static int exynos_cpu_boot(int cpu)
+{
+ exynos_smc(SMC_CMD_CPU1BOOT, cpu, 0, 0);
+ return 0;
+}
+
+static int exynos_set_cpu_boot_addr(int cpu, unsigned long boot_addr)
+{
+ void __iomem *boot_reg = S5P_VA_SYSRAM_NS + 0x1c + 4*cpu;
+
+ __raw_writel(boot_addr, boot_reg);
+ return 0;
+}
+
+static const struct firmware_ops exynos_firmware_ops = {
+ .do_idle= exynos_do_idle,
+ .set_cpu_boot_addr = exynos_set_cpu_boot_addr,
+ .cpu_boot = exynos_cpu_boot,
+};
+
+void __init exynos_firmware_init(void)
+{
+ if (of_have_populated_dt()) {
+ struct device_node *nd;
+ const __be32 *addr;
+
+ nd = of_find_compatible_node(NULL, NULL,
+ samsung,secure-firmware);
+ if (!nd)
+ return;
+
+ addr = of_get_address(nd, 0, NULL, NULL);
+ if (!addr) {
+ pr_err(%s: No address specified.\n, __func__);
+ return;
+ }
+ }
+
+
Re: [PATCH 2/2] mmc: dw_mmc: Handle wp-gpios from device tree
On 11/22/2012 07:03 AM, Doug Anderson wrote:
On some SoCs (like exynos5250) you need to use an external GPIO for
write protect. Add support for wp-gpios to the core dw_mmc driver
since it could be useful across multiple SoCs.
With this change I am able to make use of the write protect for the
external SD slot on exynos5250-snow.
Signed-off-by: Doug Anderson diand...@chromium.org
---
drivers/mmc/host/dw_mmc.c | 35 +++
1 files changed, 35 insertions(+), 0 deletions(-)
diff --git a/drivers/mmc/host/dw_mmc.c b/drivers/mmc/host/dw_mmc.c
index 5b41348..9c79870 100644
--- a/drivers/mmc/host/dw_mmc.c
+++ b/drivers/mmc/host/dw_mmc.c
@@ -34,6 +34,7 @@
#include linux/regulator/consumer.h
#include linux/workqueue.h
#include linux/of.h
+#include linux/of_gpio.h
#include dw_mmc.h
@@ -74,6 +75,7 @@ struct idmac_desc {
* struct dw_mci_slot - MMC slot state
* @mmc: The mmc_host representing this slot.
* @host: The MMC controller this slot is using.
+ * @wp_gpio: If gpio_is_valid() we'll use this to read write protect.
* @ctype: Card type for this slot.
* @mrq: mmc_request currently being processed or waiting to be
* processed, or NULL when the slot is idle.
@@ -88,6 +90,8 @@ struct dw_mci_slot {
struct mmc_host *mmc;
struct dw_mci *host;
+ int wp_gpio;
+
u32 ctype;
struct mmc_request *mrq;
@@ -832,6 +836,8 @@ static int dw_mci_get_ro(struct mmc_host *mmc)
read_only = 0;
else if (brd-get_ro)
read_only = brd-get_ro(slot-id);
+ else if (gpio_is_valid(slot-wp_gpio))
+ read_only = gpio_get_value(slot-wp_gpio);
else
read_only =
mci_readl(slot-host, WRTPRT) (1 slot-id) ? 1 : 0;
@@ -1802,6 +1808,29 @@ static u32 dw_mci_of_get_bus_wd(struct device *dev, u8
slot)
as 1\n);
return bus_wd;
}
+
+/* find the write protect gpio for a given slot; or -1 if none specified */
+static u32 dw_mci_of_get_wp_gpio(struct device *dev, u8 slot)
+{
+ struct device_node *np = dw_mci_of_find_slot_node(dev, slot);
+ int gpio;
+
+ if (!np)
+ return -1;
I think good that use the error number instead of -1. Also the below code.
+
+ gpio = of_get_named_gpio(np, wp-gpios, 0);
+
+ /* Having a missing entry is valid; return silently */
+ if (!gpio_is_valid(gpio))
+ return -1;
+
+ if (devm_gpio_request(dev, gpio, dw-mci-wp)) {
+ dev_warn(dev, gpio [%d] request failed\n, gpio);
+ return -1;
+ }
+
+ return gpio;
gpio is int type, but return type is u32?
Best Regards,
Jaehoon Chung
+}
#else /* CONFIG_OF */
static u32 dw_mci_of_get_bus_wd(struct device *dev, u8 slot)
{
@@ -1811,6 +1840,10 @@ static struct device_node
*dw_mci_of_find_slot_node(struct device *dev, u8 slot)
{
return NULL;
}
+static u32 dw_mci_of_get_wp_gpio(struct device *dev, u8 slot)
+{
+ return -1;
+}
#endif /* CONFIG_OF */
static int dw_mci_init_slot(struct dw_mci *host, unsigned int id)
@@ -1923,6 +1956,8 @@ static int dw_mci_init_slot(struct dw_mci *host,
unsigned int id)
else
clear_bit(DW_MMC_CARD_PRESENT, slot-flags);
+ slot-wp_gpio = dw_mci_of_get_wp_gpio(host-dev, slot-id);
+
mmc_add_host(mmc);
#if defined(CONFIG_DEBUG_FS)
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[PATCH] serial: samsung: fix potential soft lockup during uart write
Certain tty line discipline implementations such slip and bluetooth hci invoke
the serial core uart_write() api in their write_wakeup callback. This leads to
a soft lockup with samsung serial driver since the uart port lock is taken in
the driver's interrupt handler and uart_write() attempts to take the same lock
again.
Fix this issue by releasing the uart port lock before the call to
uart_write_wakeup() in the tx handler. Also move the spin-lock/unlock sequence
from s3c64xx_serial_handle_irq() function into the tx and rx irq handlers so
that this change is applicable to s3c24xx platforms as well.
Reported-by: Kyungmin Park kyungmin.p...@samsung.com
Reported-by: Hyeonkook Kim hk619@samsung.com
Signed-off-by: Thomas Abraham thomas.abra...@linaro.org
---
drivers/tty/serial/samsung.c | 16
1 files changed, 12 insertions(+), 4 deletions(-)
diff --git a/drivers/tty/serial/samsung.c b/drivers/tty/serial/samsung.c
index 7f04717..97bac4c 100644
--- a/drivers/tty/serial/samsung.c
+++ b/drivers/tty/serial/samsung.c
@@ -223,8 +223,11 @@ s3c24xx_serial_rx_chars(int irq, void *dev_id)
struct uart_port *port = ourport-port;
struct tty_struct *tty = port-state-port.tty;
unsigned int ufcon, ch, flag, ufstat, uerstat;
+ unsigned long flags;
int max_count = 64;
+ spin_lock_irqsave(port-lock, flags);
+
while (max_count-- 0) {
ufcon = rd_regl(port, S3C2410_UFCON);
ufstat = rd_regl(port, S3C2410_UFSTAT);
@@ -299,6 +302,7 @@ s3c24xx_serial_rx_chars(int irq, void *dev_id)
tty_flip_buffer_push(tty);
out:
+ spin_unlock_irqrestore(port-lock, flags);
return IRQ_HANDLED;
}
@@ -307,8 +311,11 @@ static irqreturn_t s3c24xx_serial_tx_chars(int irq, void
*id)
struct s3c24xx_uart_port *ourport = id;
struct uart_port *port = ourport-port;
struct circ_buf *xmit = port-state-xmit;
+ unsigned long flags;
int count = 256;
+ spin_lock_irqsave(port-lock, flags);
+
if (port-x_char) {
wr_regb(port, S3C2410_UTXH, port-x_char);
port-icount.tx++;
@@ -336,13 +343,17 @@ static irqreturn_t s3c24xx_serial_tx_chars(int irq, void
*id)
port-icount.tx++;
}
- if (uart_circ_chars_pending(xmit) WAKEUP_CHARS)
+ if (uart_circ_chars_pending(xmit) WAKEUP_CHARS) {
+ spin_unlock(port-lock);
uart_write_wakeup(port);
+ spin_lock(port-lock);
+ }
if (uart_circ_empty(xmit))
s3c24xx_serial_stop_tx(port);
out:
+ spin_unlock_irqrestore(port-lock, flags);
return IRQ_HANDLED;
}
@@ -352,10 +363,8 @@ static irqreturn_t s3c64xx_serial_handle_irq(int irq, void
*id)
struct s3c24xx_uart_port *ourport = id;
struct uart_port *port = ourport-port;
unsigned int pend = rd_regl(port, S3C64XX_UINTP);
- unsigned long flags;
irqreturn_t ret = IRQ_HANDLED;
- spin_lock_irqsave(port-lock, flags);
if (pend S3C64XX_UINTM_RXD_MSK) {
ret = s3c24xx_serial_rx_chars(irq, id);
wr_regl(port, S3C64XX_UINTP, S3C64XX_UINTM_RXD_MSK);
@@ -364,7 +373,6 @@ static irqreturn_t s3c64xx_serial_handle_irq(int irq, void
*id)
ret = s3c24xx_serial_tx_chars(irq, id);
wr_regl(port, S3C64XX_UINTP, S3C64XX_UINTM_TXD_MSK);
}
- spin_unlock_irqrestore(port-lock, flags);
return ret;
}
--
1.6.6.rc2
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[PATCH v4 10/12] iommu/exynos: add support for System MMU 3.2 and 3.3
Since System MMU 3.2 and 3.3 have more prefetch buffers than 2, the
existing function to set prefetch buffers, exynos_sysmmu_set_prefbuf()
is not able to support them.
This commit removes exynos_sysmmu_set_prefbuf() and introduces new
interface, exynos_sysmmu_set_pbuf() that can pass information of
more buffers than 2. It is safe to remove the existing function
because there is no device driver in the kernel yet that calls the
removed function.
Signed-off-by: KyongHo Cho pullip@samsung.com
---
drivers/iommu/exynos-iommu.c | 336 +--
1 file changed, 290 insertions(+), 46 deletions(-)
diff --git a/drivers/iommu/exynos-iommu.c b/drivers/iommu/exynos-iommu.c
index c2525ed..985d317 100644
--- a/drivers/iommu/exynos-iommu.c
+++ b/drivers/iommu/exynos-iommu.c
@@ -80,6 +80,13 @@
#define CTRL_BLOCK 0x7
#define CTRL_DISABLE 0x0
+#define CFG_LRU0x1
+#define CFG_QOS(n) ((n 0xF) 7)
+#define CFG_MASK 0x0050 /* Selecting bit 0-15, 20, 22 */
+#define CFG_SYSSEL (1 22) /* System MMU 3.2 only */
+#define CFG_FLPDCACHE (1 20) /* System MMU 3.2+ only */
+#define CFG_SHAREABLE (1 12) /* System MMU 3.x only */
+
#define REG_MMU_CTRL 0x000
#define REG_MMU_CFG0x004
#define REG_MMU_STATUS 0x008
@@ -88,6 +95,10 @@
#define REG_PT_BASE_ADDR 0x014
#define REG_INT_STATUS 0x018
#define REG_INT_CLEAR 0x01C
+#define REG_PB_INFO0x400
+#define REG_PB_LMM 0x404
+#define REG_PB_INDICATE0x408
+#define REG_PB_CFG 0x40C
#define REG_PAGE_FAULT_ADDR0x024
#define REG_AW_FAULT_ADDR 0x028
@@ -99,10 +110,9 @@
#define MMU_MAJ_VER(reg) (reg 28)
#define MMU_MIN_VER(reg) ((reg 21) 0x7F)
-#define REG_PB0_SADDR 0x04C
-#define REG_PB0_EADDR 0x050
-#define REG_PB1_SADDR 0x054
-#define REG_PB1_EADDR 0x058
+#define MAX_NUM_PBUF 6
+
+#define NUM_MINOR_OF_SYSMMU_V3 4
static void *sysmmu_placeholder; /* Inidcate if a device is System MMU */
@@ -197,6 +207,19 @@ struct sysmmu_version {
unsigned char minor;
};
+#define SYSMMU_PBUFCFG_TLB_UPDATE (1 16)
+#define SYSMMU_PBUFCFG_ASCENDING (1 12)
+#define SYSMMU_PBUFCFG_DSECENDING (0 12) /* default */
+#define SYSMMU_PBUFCFG_PREFETCH(1 8)
+#define SYSMMU_PBUFCFG_WRITE (1 4)
+#define SYSMMU_PBUFCFG_READ(0 4) /* default */
+
+struct sysmmu_prefbuf {
+ unsigned long base;
+ unsigned long size;
+ unsigned long config;
+};
+
struct sysmmu_drvdata {
struct device *sysmmu; /* System MMU's device descriptor */
struct device *master; /* Client device that needs System MMU */
@@ -205,6 +228,8 @@ struct sysmmu_drvdata {
int activations;
struct sysmmu_version ver;
spinlock_t lock;
+ struct sysmmu_prefbuf pbufs[MAX_NUM_PBUF];
+ int num_pbufs;
struct iommu_domain *domain;
sysmmu_fault_handler_t fault_handler;
unsigned long pgtable;
@@ -291,59 +316,277 @@ static void __sysmmu_set_ptbase(void __iomem *sfrbase,
__sysmmu_tlb_invalidate(sfrbase);
}
-static void __sysmmu_set_prefbuf(void __iomem *sfrbase, unsigned long base,
- unsigned long size, int idx)
+static void __sysmmu_set_prefbuf(void __iomem *pbufbase, unsigned long base,
+ unsigned long size, int idx)
+{
+ __raw_writel(base, pbufbase + idx * 8);
+ __raw_writel(size - 1 + base, pbufbase + 4 + idx * 8);
+}
+
+/*
+ * Offset of prefetch buffer setting registers are different
+ * between SysMMU 3.1 and 3.2. 3.3 has a single prefetch buffer setting.
+ */
+static unsigned short
+ pbuf_offset[NUM_MINOR_OF_SYSMMU_V3] = {0x04C, 0x04C, 0x070, 0x410};
+
+/**
+ * __sysmmu_sort_prefbuf - sort the given @prefbuf in descending order.
+ * @prefbuf: array of buffer information
+ * @nbufs: number of elements of @prefbuf
+ * @check_size: whether to compare buffer sizes. See below description.
+ *
+ * return value is valid if @check_size is ture. If the size of first buffer
+ * in @prefbuf is larger than or equal to the sum of the sizes of the other
+ * buffers, returns 1. If the size of the first buffer is smaller than the
+ * sum of other sizes, returns -1. Returns 0, otherwise.
+ */
+static int __sysmmu_sort_prefbuf(struct sysmmu_prefbuf prefbuf[],
+ int nbufs, bool check_size)
+{
+ int i;
+
+ for (i = 0; i nbufs; i++) {
+ int j;
+ for (j = i + 1; j nbufs; j++)
+ if (prefbuf[i].size prefbuf[j].size)
+ swap(prefbuf[i], prefbuf[j]);
+ }
+
+ if (check_size) {
+ unsigned long sum = 0;
+ for (i = 1; i nbufs; i++)
+ sum += prefbuf[i].size;
[PATCH v4 09/12] iommu/exynos: add support for runtime pm and suspend/resume
This change enables the client device drivers not to care about
the state of System MMU since the internal state of System MMU
is controlled by the runtime PM and suspend/resume callback functions.
Signed-off-by: KyongHo Cho pullip@samsung.com
---
drivers/iommu/exynos-iommu.c | 175 ++-
1 file changed, 89 insertions(+), 86 deletions(-)
diff --git a/drivers/iommu/exynos-iommu.c b/drivers/iommu/exynos-iommu.c
index 576f6b1..c2525ed 100644
--- a/drivers/iommu/exynos-iommu.c
+++ b/drivers/iommu/exynos-iommu.c
@@ -208,6 +208,7 @@ struct sysmmu_drvdata {
struct iommu_domain *domain;
sysmmu_fault_handler_t fault_handler;
unsigned long pgtable;
+ bool runtime_active;
void __iomem *sfrbases[0];
};
@@ -477,7 +478,8 @@ static bool __sysmmu_disable(struct sysmmu_drvdata *drvdata)
drvdata-pgtable = 0;
drvdata-domain = NULL;
- __sysmmu_disable_nocount(drvdata);
+ if (drvdata-runtime_active)
+ __sysmmu_disable_nocount(drvdata);
dev_dbg(drvdata-sysmmu, Disabled\n);
} else {
@@ -490,30 +492,6 @@ static bool __sysmmu_disable(struct sysmmu_drvdata
*drvdata)
return disabled;
}
-static bool __exynos_sysmmu_disable(struct device *dev)
-{
- unsigned long flags;
- bool disabled = true;
- struct exynos_iommu_owner *owner = dev-archdata.iommu;
- struct device *sysmmu;
-
- BUG_ON(!has_sysmmu(dev));
-
- spin_lock_irqsave(owner-lock, flags);
-
- /* Every call to __sysmmu_disable() must return same result */
- for_each_sysmmu(dev, sysmmu) {
- struct sysmmu_drvdata *drvdata = dev_get_drvdata(sysmmu);
- disabled = __sysmmu_disable(drvdata);
- if (disabled)
- drvdata-master = NULL;
- }
-
- spin_unlock_irqrestore(owner-lock, flags);
-
- return disabled;
-}
-
static void __sysmmu_enable_nocount(struct sysmmu_drvdata *drvdata)
{
int i;
@@ -554,7 +532,8 @@ static int __sysmmu_enable(struct sysmmu_drvdata *drvdata,
drvdata-pgtable = pgtable;
drvdata-domain = domain;
- __sysmmu_enable_nocount(drvdata);
+ if (drvdata-runtime_active)
+ __sysmmu_enable_nocount(drvdata);
dev_dbg(drvdata-sysmmu, Enabled\n);
} else {
@@ -610,42 +589,31 @@ static int __exynos_sysmmu_enable(struct device *dev,
unsigned long pgtable,
int exynos_sysmmu_enable(struct device *dev, unsigned long pgtable)
{
- int ret;
- struct device *sysmmu;
-
BUG_ON(!memblock_is_memory(pgtable));
- for_each_sysmmu(dev, sysmmu) {
- ret = pm_runtime_get_sync(sysmmu);
- if (ret 0)
- break;
- }
-
- if (ret 0) {
- struct device *start;
- for_each_sysmmu_until(dev, start, sysmmu)
- pm_runtime_put(start);
-
- return ret;
- }
-
- ret = __exynos_sysmmu_enable(dev, pgtable, NULL);
- if (ret 0)
- for_each_sysmmu(dev, sysmmu)
- pm_runtime_put(sysmmu);
-
- return ret;
+ return __exynos_sysmmu_enable(dev, pgtable, NULL);
}
bool exynos_sysmmu_disable(struct device *dev)
{
- bool disabled;
+ unsigned long flags;
+ bool disabled = true;
+ struct exynos_iommu_owner *owner = dev-archdata.iommu;
struct device *sysmmu;
- disabled = __exynos_sysmmu_disable(dev);
+ BUG_ON(!has_sysmmu(dev));
- for_each_sysmmu(dev, sysmmu)
- pm_runtime_put(sysmmu);
+ spin_lock_irqsave(owner-lock, flags);
+
+ /* Every call to __sysmmu_disable() must return same result */
+ for_each_sysmmu(dev, sysmmu) {
+ struct sysmmu_drvdata *drvdata = dev_get_drvdata(sysmmu);
+ disabled = __sysmmu_disable(drvdata);
+ if (disabled)
+ drvdata-master = NULL;
+ }
+
+ spin_unlock_irqrestore(owner-lock, flags);
return disabled;
}
@@ -661,7 +629,8 @@ static void sysmmu_tlb_invalidate_entry(struct device *dev,
unsigned long iova)
data = dev_get_drvdata(sysmmu);
spin_lock_irqsave(data-lock, flags);
- if (is_sysmmu_active(data)) {
+ if (is_sysmmu_active(data)
+ data-runtime_active) {
int i;
for (i = 0; i data-nsfrs; i++) {
if (sysmmu_block(data-sfrbases[i])) {
@@ -895,6 +864,7 @@ static int __init exynos_sysmmu_probe(struct
platform_device *pdev)
ret = __sysmmu_setup(dev, data);
if (!ret) {
+ data-runtime_active = !pm_runtime_enabled(dev);
data-sysmmu = dev;
[PATCH v4 05/12] iommu/exynos: pass version information from DT
System MMUs in some implementation of Exynos core does not include
correct version information in the System MMU. If the version
information is not correct, exynos-iommu driver cannot take advantages
of feature of higher versions of System MMu like prefetching page
table entries prior to TLB miss.
This commit allows passing version information from DT to the driver.
If DT does not pass version information, the driver will read the
information from System MMU.
Signed-off-by: KyongHo Cho pullip@samsung.com
---
drivers/iommu/exynos-iommu.c | 40 ++--
1 file changed, 38 insertions(+), 2 deletions(-)
diff --git a/drivers/iommu/exynos-iommu.c b/drivers/iommu/exynos-iommu.c
index 53972c8..4061b17 100644
--- a/drivers/iommu/exynos-iommu.c
+++ b/drivers/iommu/exynos-iommu.c
@@ -96,6 +96,9 @@
#define REG_MMU_VERSION0x034
+#define MMU_MAJ_VER(reg) (reg 28)
+#define MMU_MIN_VER(reg) ((reg 21) 0x7F)
+
#define REG_PB0_SADDR 0x04C
#define REG_PB0_EADDR 0x050
#define REG_PB1_SADDR 0x054
@@ -165,6 +168,12 @@ struct exynos_iommu_domain {
spinlock_t pgtablelock; /* lock for modifying page table @ pgtable */
};
+struct sysmmu_version {
+ unsigned char major; /* major = 0 means that driver must use MMU_VERSION
+ register instead of this structure */
+ unsigned char minor;
+};
+
struct sysmmu_drvdata {
struct list_head node; /* entry of exynos_iommu_domain.clients */
struct device *sysmmu; /* System MMU's device descriptor */
@@ -172,6 +181,7 @@ struct sysmmu_drvdata {
int nsfrs;
struct clk *clk;
int activations;
+ struct sysmmu_version ver;
rwlock_t lock;
struct iommu_domain *domain;
sysmmu_fault_handler_t fault_handler;
@@ -198,6 +208,25 @@ static bool is_sysmmu_active(struct sysmmu_drvdata *data)
return data-activations 0;
}
+static unsigned int __sysmmu_version(struct sysmmu_drvdata *drvdata,
+ int idx, unsigned int *minor)
+{
+ unsigned int major;
+
+ if (drvdata-ver.major == 0) {
+ major = readl(
+ drvdata-sfrbases[idx] + REG_MMU_VERSION);
+ if (minor)
+ *minor = MMU_MIN_VER(major);
+ major = MMU_MAJ_VER(major);
+ } else {
+ major = drvdata-ver.major;
+ if (minor)
+ *minor = drvdata-ver.minor;
+ }
+ return major;
+}
+
static void sysmmu_unblock(void __iomem *sfrbase)
{
__raw_writel(CTRL_ENABLE, sfrbase + REG_MMU_CTRL);
@@ -262,7 +291,7 @@ void exynos_sysmmu_set_prefbuf(struct device *dev,
goto finish;
for (i = 0; i data-nsfrs; i++) {
- if ((readl(data-sfrbases[i] + REG_MMU_VERSION) 28) == 3) {
+ if (__sysmmu_version(data, i, NULL) == 3) {
if (!sysmmu_block(data-sfrbases[i]))
continue;
@@ -460,7 +489,7 @@ static int __exynos_sysmmu_enable(struct sysmmu_drvdata
*data,
for (i = 0; i data-nsfrs; i++) {
__sysmmu_set_ptbase(data-sfrbases[i], pgtable);
- if ((readl(data-sfrbases[i] + REG_MMU_VERSION) 28) == 3) {
+ if (__sysmmu_version(data, i, NULL) == 3) {
/* System MMU version is 3.x */
__raw_writel((1 12) | (2 28),
data-sfrbases[i] + REG_MMU_CFG);
@@ -618,8 +647,15 @@ static int __init __sysmmu_setup(struct device *sysmmu,
const char *compat;
struct platform_device *pmaster = NULL;
u32 master_inst_no = -1;
+ u32 ver[2];
int ret;
+ if (!of_property_read_u32_array(sysmmu-of_node, version, ver, 2)) {
+ drvdata-ver.major = (unsigned char)ver[0];
+ drvdata-ver.minor = (unsigned char)ver[1];
+ dev_dbg(sysmmu, Found version %d.%d\n, ver[0], ver[1]);
+ }
+
master_node = of_parse_phandle(sysmmu-of_node, mmu-master, 0);
if (!master_node !of_property_read_string(
sysmmu-of_node, mmu-master-compat, compat)) {
--
1.8.0
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[PATCH v4 00/12] iommu/exynos: Fixes and Enhancements of System MMU driver with DT
The current exynos-iommu(System MMU) driver does not work autonomously since it is lack of support for power management of peripheral blocks. For example, MFC device driver must ensure that its System MMU is disabled before MFC block is power-down not to invalidate IOTLB in the System MMU when I/O memory mapping is changed. Because A System MMU is resides in the same H/W block, access to control registers of System MMU while the H/W block is turned off must be prohibited. This set of changes solves the above problem with setting each System MMUs as the parent of the device which owns the System MMU to recieve the information when the device is turned off or turned on. Another big change to the driver is the support for devicetree. The bindings for System MMU is described in Documentation/devicetree/bindings/arm/samsung/system-mmu.txt In addition, this patchset also includes several bug fixes and enhancements of the current driver. Change log: v4: - Remove Change-Id from v3 patches - Change the order of the third and the first patch Thanks to Kukjin Kim. - Fix memory leak when allocating and assigning exynos_iommu_owner to client device if the client device has multiple System MMUs. Thanks to Rahul Sharma. v3: - Fix prefetch buffer flag definition for System MMU 3.3 (patch 10/12) - Fix incorrect setting for SET_RUNTIME_PM_OPS (patch 09/12) Thanks to Prathyush. v2: - Split the patch to iommu/exynos into 9 patches - Support for System MMU 3.3 - Some code compaction Patch summary: [PATCH v4 01/12] ARM: EXYNOS: Add clk_ops for gating clocks of System MMU [PATCH v4 02/12] ARM: EXYNOS: add System MMU definition to DT [PATCH v4 03/12] ARM: EXYNOS: remove system mmu initialization from exynos tree [PATCH v4 04/12] iommu/exynos: support for device tree [PATCH v4 05/12] iommu/exynos: pass version information from DT [PATCH v4 06/12] iommu/exynos: allocate lv2 page table from own slab [PATCH v4 07/12] iommu/exynos: change rwlock to spinlock [PATCH v4 08/12] iommu/exynos: set System MMU as the parent of client device [PATCH v4 09/12] iommu/exynos: add support for runtime pm and suspend/resume [PATCH v4 10/12] iommu/exynos: add support for System MMU 3.2 and 3.3 [PATCH v4 11/12] iommu/exynos: add literal name of System MMU for debugging [PATCH v4 12/12] iommu/exynos: add debugfs entries for System MMU Diffstats: .../devicetree/bindings/arm/exynos/system-mmu.txt | 86 ++ arch/arm/boot/dts/exynos4210.dtsi | 96 ++ arch/arm/boot/dts/exynos4x12.dtsi | 124 ++ arch/arm/boot/dts/exynos5250.dtsi | 147 +- arch/arm/mach-exynos/Kconfig |5 - arch/arm/mach-exynos/Makefile |1 - arch/arm/mach-exynos/clock-exynos4.c | 41 +- arch/arm/mach-exynos/clock-exynos4210.c|9 +- arch/arm/mach-exynos/clock-exynos4212.c| 23 +- arch/arm/mach-exynos/clock-exynos5.c | 86 +- arch/arm/mach-exynos/dev-sysmmu.c | 274 arch/arm/mach-exynos/include/mach/sysmmu.h | 66 - arch/arm/mach-exynos/mach-exynos4-dt.c | 34 + arch/arm/mach-exynos/mach-exynos5-dt.c | 30 + drivers/iommu/Kconfig |2 +- drivers/iommu/exynos-iommu.c | 1428 +++- 16 files changed, 1720 insertions(+), 732 deletions(-) -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 2/2] mmc: dw_mmc: Handle wp-gpios from device tree
On Wed, Nov 21, 2012 at 5:42 PM, Seungwon Jeon tgih@samsung.com wrote: Hi, wp-gpios has been implemented in dw_mmc-exynos.c It can be reused for EXYNOS platform? We need to modify some though. Yup, I've seen that. Patch 1/2 (mmc: dw_mmc: exynos: Stop claiming wp-gpio) addressed that. For some reason I can't find that on LKML.org yet. Strange. :-/ I'll forward it on to you shortly. In any case: I found that the exynos code didn't actually work. It claimed the GPIO but didn't ever look at it. I have the beginnings of the code to implement this properly in the exynos code but I stopped working on it when I decided that other SoCs could also benefit from the code and it fit better in the general dw_mmc driver. If you disagree and would like me to cleanup the version of this patch that's just in the exynos driver and post that, I will. Just let me know. Thanks for the review! -Doug -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
RE: [PATCH v3 0/6] ARM: EXYNOS: Add secure firmware support
Tomasz Figa wrote: On Monday 12 of November 2012 09:55:30 Russell King - ARM Linux wrote: On Mon, Nov 12, 2012 at 04:39:28PM +0900, Kukjin Kim wrote: (+ Russell King) I think there's still an amount of work to do here; it's not a generic interface at the moment because it makes some assumptions about how things are done (eg, it assumes that there _will_ be a CPU boot register; that is not always true. Moreover, the 'cpu' arguments given seem to be uncertain whether they're logical CPU numbers or physical CPU numbers. Lastly, where is this interface actually documented? It's just a bunch of code _without_ _any_ documentation. That means people will interpret it differently, and it'll get used differently from platform to platform. Let's have some documentation on this. Right, I will include documentation in next version of this patchset. Any updates on this? Thanks. Best regards, Kgene. -- Kukjin Kim kgene@samsung.com, Senior Engineer, SW Solution Development Team, Samsung Electronics Co., Ltd. -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 3/4] ARM: dts: exynos4: add node for PL330 MDMA1 controller
Hi Kukjin,
Could you also apply this patch?
Best regards,
--
Bartlomiej Zolnierkiewicz
Samsung Poland RD Center
From: Bartlomiej Zolnierkiewicz b.zolnier...@samsung.com
Subject: [PATCH v2] ARM: dts: exynos4: add node for PL330 MDMA1 controller
Add missing PL330 MDMA1 controller node to the device tree (DT).
[ Currently there is no problem with using 'non-secure' mdma1 address
instead of 'secure' one on revision 0 of Exynos4210 SOC (as used by
Universal C210 board) as this SOC revision is unsupported by DT. ]
Reviewed-by: Tomasz Figa t.f...@samsung.com
Cc: Kukjin Kim kgene@samsung.com
Signed-off-by: Bartlomiej Zolnierkiewicz b.zolnier...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
v2: refreshed againt next-20121115 and added Reviewed-by tag
arch/arm/boot/dts/exynos4.dtsi |6 ++
arch/arm/mach-exynos/mach-exynos4-dt.c |1 +
2 files changed, 7 insertions(+)
Index: b/arch/arm/boot/dts/exynos4.dtsi
===
--- a/arch/arm/boot/dts/exynos4.dtsi2012-11-22 11:40:51.0 +0100
+++ b/arch/arm/boot/dts/exynos4.dtsi2012-11-22 11:53:29.520815274 +0100
@@ -244,5 +244,11 @@
reg = 0x1269 0x1000;
interrupts = 0 36 0;
};
+
+ mdma1: mdma@1285 {
+ compatible = arm,pl330, arm,primecell;
+ reg = 0x1285 0x1000;
+ interrupts = 0 34 0;
+ };
};
};
Index: b/arch/arm/mach-exynos/mach-exynos4-dt.c
===
--- a/arch/arm/mach-exynos/mach-exynos4-dt.c2012-11-22 11:40:51.0
+0100
+++ b/arch/arm/mach-exynos/mach-exynos4-dt.c2012-11-22 11:53:55.248815271
+0100
@@ -77,6 +77,7 @@ static const struct of_dev_auxdata exyno
exynos4210-spi.2, NULL),
OF_DEV_AUXDATA(arm,pl330, EXYNOS4_PA_PDMA0, dma-pl330.0, NULL),
OF_DEV_AUXDATA(arm,pl330, EXYNOS4_PA_PDMA1, dma-pl330.1, NULL),
+ OF_DEV_AUXDATA(arm,pl330, EXYNOS4_PA_MDMA1, dma-pl330.2, NULL),
OF_DEV_AUXDATA(samsung,exynos4210-tmu, EXYNOS4_PA_TMU,
exynos-tmu, NULL),
{},
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Re: [PATCH 1/4] thermal: Add new thermal trend type to support quick cooling
On Thu, 2012-11-08 at 09:56 +0530, Amit Daniel Kachhap wrote:
This modification adds 2 new thermal trend type THERMAL_TREND_RAISE_FULL
and THERMAL_TREND_DROP_FULL. This thermal trend can be used to quickly
jump to the upper or lower cooling level instead of incremental increase
or decrease. This is needed for temperature sensors which support
rising/falling
threshold interrupts and polling can be totally avoided.
Signed-off-by: Amit Daniel Kachhap amit.dan...@samsung.com
Signed-off-by: Amit Daniel Kachhap amit.kach...@linaro.org
---
drivers/thermal/step_wise.c | 19 +++
include/linux/thermal.h |2 ++
2 files changed, 17 insertions(+), 4 deletions(-)
diff --git a/drivers/thermal/step_wise.c b/drivers/thermal/step_wise.c
index 1242cff..0d2d8d6 100644
--- a/drivers/thermal/step_wise.c
+++ b/drivers/thermal/step_wise.c
@@ -35,6 +35,10 @@
* state for this trip point
*b. if the trend is THERMAL_TREND_DROPPING, use lower cooling
* state for this trip point
+ *c. if the trend is THERMAL_TREND_RAISE_FULL, use highest cooling
+ * state for this trip point
+ *d. if the trend is THERMAL_TREND_DROP_FULL, use lowest cooling
+ * state for this trip point
*/
static unsigned long get_target_state(struct thermal_instance *instance,
enum thermal_trend trend)
@@ -50,7 +54,10 @@ static unsigned long get_target_state(struct
thermal_instance *instance,
} else if (trend == THERMAL_TREND_DROPPING) {
cur_state = cur_state instance-lower ?
(cur_state - 1) : instance-lower;
- }
+ } else if (trend == THERMAL_TREND_RAISE_FULL)
+ cur_state = instance-upper;
+ else if (trend == THERMAL_TREND_DROP_FULL)
+ cur_state = instance-lower;
return cur_state;
}
@@ -87,7 +94,8 @@ static void update_instance_for_throttle(struct
thermal_zone_device *tz,
}
static void update_instance_for_dethrottle(struct thermal_zone_device *tz,
- int trip, enum thermal_trip_type trip_type)
+ int trip, enum thermal_trip_type trip_type,
+ enum thermal_trend trend)
{
struct thermal_instance *instance;
struct thermal_cooling_device *cdev;
@@ -101,7 +109,10 @@ static void update_instance_for_dethrottle(struct
thermal_zone_device *tz,
cdev = instance-cdev;
cdev-ops-get_cur_state(cdev, cur_state);
- instance-target = cur_state instance-lower ?
+ if (trend == THERMAL_TREND_DROP_FULL)
+ instance-target = instance-lower;
+ else
+ instance-target = cur_state instance-lower ?
(cur_state - 1) : THERMAL_NO_TARGET;
what do you expect to happen if the trend is THERMAL_TREND_RAISE_FULL at
this time?
thanks,
rui
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Re: [PATCH 2/2] mmc: dw_mmc: Handle wp-gpios from device tree
Jaehoon,
Thanks for the review. See below for comments. I'll plan on a new
patch either Monday or Tuesday when I have a chance to spin and
re-test.
On Wed, Nov 21, 2012 at 5:55 PM, Jaehoon Chung jh80.ch...@samsung.com wrote:
On 11/22/2012 07:03 AM, Doug Anderson wrote:
On some SoCs (like exynos5250) you need to use an external GPIO for
write protect. Add support for wp-gpios to the core dw_mmc driver
since it could be useful across multiple SoCs.
With this change I am able to make use of the write protect for the
external SD slot on exynos5250-snow.
Signed-off-by: Doug Anderson diand...@chromium.org
---
drivers/mmc/host/dw_mmc.c | 35 +++
1 files changed, 35 insertions(+), 0 deletions(-)
diff --git a/drivers/mmc/host/dw_mmc.c b/drivers/mmc/host/dw_mmc.c
index 5b41348..9c79870 100644
--- a/drivers/mmc/host/dw_mmc.c
+++ b/drivers/mmc/host/dw_mmc.c
@@ -34,6 +34,7 @@
#include linux/regulator/consumer.h
#include linux/workqueue.h
#include linux/of.h
+#include linux/of_gpio.h
#include dw_mmc.h
@@ -74,6 +75,7 @@ struct idmac_desc {
* struct dw_mci_slot - MMC slot state
* @mmc: The mmc_host representing this slot.
* @host: The MMC controller this slot is using.
+ * @wp_gpio: If gpio_is_valid() we'll use this to read write protect.
* @ctype: Card type for this slot.
* @mrq: mmc_request currently being processed or waiting to be
* processed, or NULL when the slot is idle.
@@ -88,6 +90,8 @@ struct dw_mci_slot {
struct mmc_host *mmc;
struct dw_mci *host;
+ int wp_gpio;
+
u32 ctype;
struct mmc_request *mrq;
@@ -832,6 +836,8 @@ static int dw_mci_get_ro(struct mmc_host *mmc)
read_only = 0;
else if (brd-get_ro)
read_only = brd-get_ro(slot-id);
+ else if (gpio_is_valid(slot-wp_gpio))
+ read_only = gpio_get_value(slot-wp_gpio);
else
read_only =
mci_readl(slot-host, WRTPRT) (1 slot-id) ? 1 :
0;
@@ -1802,6 +1808,29 @@ static u32 dw_mci_of_get_bus_wd(struct device *dev,
u8 slot)
as 1\n);
return bus_wd;
}
+
+/* find the write protect gpio for a given slot; or -1 if none specified */
+static u32 dw_mci_of_get_wp_gpio(struct device *dev, u8 slot)
+{
+ struct device_node *np = dw_mci_of_find_slot_node(dev, slot);
+ int gpio;
+
+ if (!np)
+ return -1;
I think good that use the error number instead of -1. Also the below code.
In this case it's not really returning an error code which is why I
chose -1. It's returning a gpio number or anything that is a sentinel
value indicating that the GPIO is not valid.
...but you're right, an error code would work. I'll replace with
-EINVAL in my next patch.
+
+ gpio = of_get_named_gpio(np, wp-gpios, 0);
+
+ /* Having a missing entry is valid; return silently */
+ if (!gpio_is_valid(gpio))
+ return -1;
+
+ if (devm_gpio_request(dev, gpio, dw-mci-wp)) {
+ dev_warn(dev, gpio [%d] request failed\n, gpio);
+ return -1;
+ }
+
+ return gpio;
gpio is int type, but return type is u32?
Good catch. Will fix.
Best Regards,
Jaehoon Chung
+}
#else /* CONFIG_OF */
static u32 dw_mci_of_get_bus_wd(struct device *dev, u8 slot)
{
@@ -1811,6 +1840,10 @@ static struct device_node
*dw_mci_of_find_slot_node(struct device *dev, u8 slot)
{
return NULL;
}
+static u32 dw_mci_of_get_wp_gpio(struct device *dev, u8 slot)
+{
+ return -1;
+}
#endif /* CONFIG_OF */
static int dw_mci_init_slot(struct dw_mci *host, unsigned int id)
@@ -1923,6 +1956,8 @@ static int dw_mci_init_slot(struct dw_mci *host,
unsigned int id)
else
clear_bit(DW_MMC_CARD_PRESENT, slot-flags);
+ slot-wp_gpio = dw_mci_of_get_wp_gpio(host-dev, slot-id);
+
mmc_add_host(mmc);
#if defined(CONFIG_DEBUG_FS)
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RE: [PATCH] ARM: S3C2443: SPI clock channel setup is fixed
Alexander Varnin I also want to point, that irq resource in arch/arm/plat-samsung/devs.c for s3c2410-spi driver on S3C2443 points to wrong IRQ (SPI0 instead of Sounds that you cannot use platform_device in plat-samsung/devs.c for SPI on S3C2443. Yes, could be... SPI1). I've solved it with board specific code, but it is not most correct way, i think. Hmm, if provided platform_device is in plat-samsung/devs.c cannot support, we can do as you said temporarily but we know it's wrong way because the value depends on SoC not board. How about following? 8 diff --git a/arch/arm/mach-s3c24xx/s3c2443.c b/arch/arm/mach-s3c24xx/s3c2443.c index 165b6a6..22eead3 100644 --- a/arch/arm/mach-s3c24xx/s3c2443.c +++ b/arch/arm/mach-s3c24xx/s3c2443.c @@ -82,6 +82,10 @@ int __init s3c2443_init(void) s3c_device_wdt.resource[1].start = IRQ_S3C2443_WDT; s3c_device_wdt.resource[1].end = IRQ_S3C2443_WDT; + /* change SPI IRQ number */ + s3c_device_spi0.resource[1].start = IRQ_SPI1; + s3c_device_spi0.resource[1].end = IRQ_SPI1; + return device_register(s3c2443_dev); } 8 K-Gene kg...@kernel.org -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH v2 1/2] mmc: dw_mmc: exynos: Stop claiming wp-gpio
The exynos code claimed wp-gpio with devm_gpio_request() but never did
anything with it. That meant that anyone using a write protect GPIO
would effectively be write protected all the time.
A future change will move the wp-gpio support to the core dw_mmc.c
file. Now the exynos-specific code won't claim the GPIO but will
just set the DW_MCI_QUIRK_NO_WRITE_PROTECT quirk if write protect
won't be used.
Signed-off-by: Doug Anderson diand...@chromium.org
---
Changes in v2:
- Nothing new in this patch
drivers/mmc/host/dw_mmc-exynos.c | 12 ++--
1 files changed, 6 insertions(+), 6 deletions(-)
diff --git a/drivers/mmc/host/dw_mmc-exynos.c b/drivers/mmc/host/dw_mmc-exynos.c
index 4d50da6..58cc03e 100644
--- a/drivers/mmc/host/dw_mmc-exynos.c
+++ b/drivers/mmc/host/dw_mmc-exynos.c
@@ -175,12 +175,12 @@ static int dw_mci_exynos_setup_bus(struct dw_mci *host,
}
}
- gpio = of_get_named_gpio(slot_np, wp-gpios, 0);
- if (gpio_is_valid(gpio)) {
- if (devm_gpio_request(host-dev, gpio, dw-mci-wp))
- dev_info(host-dev, gpio [%d] request failed\n,
- gpio);
- } else {
+ /*
+* If there are no write-protect GPIOs present then we assume no write
+* protect. The mci_readl() in dw_mmc.c won't work since it's not
+* hooked up on exynos.
+*/
+ if (!of_find_property(slot_np, wp-gpios, NULL)) {
dev_info(host-dev, wp gpio not available);
host-pdata-quirks |= DW_MCI_QUIRK_NO_WRITE_PROTECT;
}
--
1.7.7.3
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[PATCH v2 2/2] mmc: dw_mmc: Handle wp-gpios from device tree
On some SoCs (like exynos5250) you need to use an external GPIO for
write protect. Add support for wp-gpios to the core dw_mmc driver
since it could be useful across multiple SoCs.
With this change I am able to make use of the write protect for the
external SD slot on exynos5250-snow.
Signed-off-by: Doug Anderson diand...@chromium.org
---
Changes in v2:
- Fixed return type from u32 to int
- Return -EINVAL instead of -1
drivers/mmc/host/dw_mmc.c | 35 +++
1 files changed, 35 insertions(+), 0 deletions(-)
diff --git a/drivers/mmc/host/dw_mmc.c b/drivers/mmc/host/dw_mmc.c
index 5b41348..42d4f19 100644
--- a/drivers/mmc/host/dw_mmc.c
+++ b/drivers/mmc/host/dw_mmc.c
@@ -34,6 +34,7 @@
#include linux/regulator/consumer.h
#include linux/workqueue.h
#include linux/of.h
+#include linux/of_gpio.h
#include dw_mmc.h
@@ -74,6 +75,7 @@ struct idmac_desc {
* struct dw_mci_slot - MMC slot state
* @mmc: The mmc_host representing this slot.
* @host: The MMC controller this slot is using.
+ * @wp_gpio: If gpio_is_valid() we'll use this to read write protect.
* @ctype: Card type for this slot.
* @mrq: mmc_request currently being processed or waiting to be
* processed, or NULL when the slot is idle.
@@ -88,6 +90,8 @@ struct dw_mci_slot {
struct mmc_host *mmc;
struct dw_mci *host;
+ int wp_gpio;
+
u32 ctype;
struct mmc_request *mrq;
@@ -832,6 +836,8 @@ static int dw_mci_get_ro(struct mmc_host *mmc)
read_only = 0;
else if (brd-get_ro)
read_only = brd-get_ro(slot-id);
+ else if (gpio_is_valid(slot-wp_gpio))
+ read_only = gpio_get_value(slot-wp_gpio);
else
read_only =
mci_readl(slot-host, WRTPRT) (1 slot-id) ? 1 : 0;
@@ -1802,6 +1808,29 @@ static u32 dw_mci_of_get_bus_wd(struct device *dev, u8
slot)
as 1\n);
return bus_wd;
}
+
+/* find the write protect gpio for a given slot; or -1 if none specified */
+static int dw_mci_of_get_wp_gpio(struct device *dev, u8 slot)
+{
+ struct device_node *np = dw_mci_of_find_slot_node(dev, slot);
+ int gpio;
+
+ if (!np)
+ return -EINVAL;
+
+ gpio = of_get_named_gpio(np, wp-gpios, 0);
+
+ /* Having a missing entry is valid; return silently */
+ if (!gpio_is_valid(gpio))
+ return -EINVAL;
+
+ if (devm_gpio_request(dev, gpio, dw-mci-wp)) {
+ dev_warn(dev, gpio [%d] request failed\n, gpio);
+ return -EINVAL;
+ }
+
+ return gpio;
+}
#else /* CONFIG_OF */
static u32 dw_mci_of_get_bus_wd(struct device *dev, u8 slot)
{
@@ -1811,6 +1840,10 @@ static struct device_node
*dw_mci_of_find_slot_node(struct device *dev, u8 slot)
{
return NULL;
}
+static int dw_mci_of_get_wp_gpio(struct device *dev, u8 slot)
+{
+ return -EINVAL;
+}
#endif /* CONFIG_OF */
static int dw_mci_init_slot(struct dw_mci *host, unsigned int id)
@@ -1923,6 +1956,8 @@ static int dw_mci_init_slot(struct dw_mci *host, unsigned
int id)
else
clear_bit(DW_MMC_CARD_PRESENT, slot-flags);
+ slot-wp_gpio = dw_mci_of_get_wp_gpio(host-dev, slot-id);
+
mmc_add_host(mmc);
#if defined(CONFIG_DEBUG_FS)
--
1.7.7.3
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Re: [PATCH] ARM: S3C2443: Workaround for 2443 EXTINT error
Hi Alexander,
first of all could you elaborate a bit more on the error you experience,
because I currently have problems to understand it from the code alone :-) .
More inline.
Am Donnerstag, 22. November 2012, 14:00:01 schrieb Alexander Varnin:
S3C2443 CPU has a problem with incorrect reading from EXTINTn
registers. So s3c_irqext_type function wrongly modifies them.
So add special function for s3c2443, to handle this case.
Signed-off-by: Alexander Varnin fenix...@mail.ru
---
arch/arm/mach-s3c24xx/s3c2443.c |8
arch/arm/plat-s3c24xx/irq.c | 89
+++ 2 files changed, 97 insertions(+),
0 deletions(-)
diff --git a/arch/arm/mach-s3c24xx/s3c2443.c
b/arch/arm/mach-s3c24xx/s3c2443.c index ab648ad..99eef31 100644
--- a/arch/arm/mach-s3c24xx/s3c2443.c
+++ b/arch/arm/mach-s3c24xx/s3c2443.c
@@ -67,8 +67,11 @@ void s3c2443_restart(char mode, const char *cmd)
__raw_writel(S3C2443_SWRST_RESET, S3C2443_SWRST);
}
+extern int s3c2443_irqext_type(struct irq_data *data, unsigned int type);
+
int __init s3c2443_init(void)
{
+ struct irq_chip * chip;
printk(S3C2443: Initialising architecture\n);
s3c_nand_setname(s3c2412-nand);
@@ -81,6 +84,11 @@ int __init s3c2443_init(void)
s3c_device_wdt.resource[1].start = IRQ_S3C2443_WDT;
s3c_device_wdt.resource[1].end = IRQ_S3C2443_WDT;
+ chip = irq_get_chip(IRQ_EINT0);
+ chip-irq_set_type=s3c2443_irqext_type;
+ chip = irq_get_chip(IRQ_EINT4);
+ chip-irq_set_type=s3c2443_irqext_type;
+
return device_register(s3c2443_dev);
}
both this and your new exttype function would be more suitable for
irq-s3c2443.c .
diff --git a/arch/arm/plat-s3c24xx/irq.c b/arch/arm/plat-s3c24xx/irq.c
index fe57bbb..9c815f3 100644
--- a/arch/arm/plat-s3c24xx/irq.c
+++ b/arch/arm/plat-s3c24xx/irq.c
@@ -224,7 +224,96 @@ s3c_irqext_type(struct irq_data *data, unsigned int
type)
return 0;
}
+#if defined(CONFIG_CPU_S3C2443)
+int
+s3c2443_irqext_type(struct irq_data *data, unsigned int type)
+{
+ int i;
+ int fixed;
+ void __iomem *extint_reg;
+ void __iomem *gpcon_reg;
+ unsigned long gpcon_offset, extint_offset;
+ unsigned long newvalue = 0, value;
+
+ if ((data-irq = IRQ_EINT0) (data-irq = IRQ_EINT3)) {
+ gpcon_reg = S3C2410_GPFCON;
+ extint_reg = S3C24XX_EXTINT0;
+ gpcon_offset = (data-irq - IRQ_EINT0) * 2;
+ extint_offset = (data-irq - IRQ_EINT0) * 4;
+ } else if ((data-irq = IRQ_EINT4) (data-irq = IRQ_EINT7)) {
+ gpcon_reg = S3C2410_GPFCON;
+ extint_reg = S3C24XX_EXTINT0;
+ gpcon_offset = (data-irq - (EXTINT_OFF)) * 2;
+ extint_offset = (data-irq - (EXTINT_OFF)) * 4;
+ } else if ((data-irq = IRQ_EINT8) (data-irq = IRQ_EINT15)) {
+ gpcon_reg = S3C2410_GPGCON;
+ extint_reg = S3C24XX_EXTINT1;
+ gpcon_offset = (data-irq - IRQ_EINT8) * 2;
+ extint_offset = (data-irq - IRQ_EINT8) * 4;
+ } else if ((data-irq = IRQ_EINT16) (data-irq = IRQ_EINT23)) {
+ gpcon_reg = S3C2410_GPGCON;
+ extint_reg = S3C24XX_EXTINT2;
+ gpcon_offset = (data-irq - IRQ_EINT8) * 2;
+ extint_offset = (data-irq - IRQ_EINT16) * 4;
+ } else {
+ return -1;
+ }
+ /* Set the GPIO to external interrupt mode */
+ value = __raw_readl(gpcon_reg);
+ value = (value ~(3 gpcon_offset)) | (0x02 gpcon_offset);
+ __raw_writel(value, gpcon_reg);
+
+ /* Set the external interrupt to pointed trigger type */
+ switch (type)
+ {
+ case IRQ_TYPE_NONE:
+ printk(KERN_WARNING No edge setting!\n);
+ break;
+
+ case IRQ_TYPE_EDGE_RISING:
+ newvalue = S3C2410_EXTINT_RISEEDGE;
+ break;
+
+ case IRQ_TYPE_EDGE_FALLING:
+ newvalue = S3C2410_EXTINT_FALLEDGE;
+ break;
+
+ case IRQ_TYPE_EDGE_BOTH:
+ newvalue = S3C2410_EXTINT_BOTHEDGE;
+ break;
+
+ case IRQ_TYPE_LEVEL_LOW:
+ newvalue = S3C2410_EXTINT_LOWLEV;
+ break;
+
+ case IRQ_TYPE_LEVEL_HIGH:
+ newvalue = S3C2410_EXTINT_HILEV;
+ break;
+
+ default:
+ printk(KERN_ERR No such irq type %d, type);
+ return -1;
+ }
+
+ value = __raw_readl(extint_reg);
+ //Hack for 2443 error workaround
+ fixed = 0;
+ if(extint_reg == S3C24XX_EXTINT1 || extint_reg == S3C24XX_EXTINT2)
+ for(i=0; i7;i++)
+ fixed |= (((value ((7-i)*4+1)) 7) | ((value
((7-i)*4-3)) 8)) i*4;
+ else
+ for(i=0;
[PATCH 1/2] mmc: dw_mmc: exynos: Stop claiming wp-gpio
The exynos code claimed wp-gpio with devm_gpio_request() but never did
anything with it. That meant that anyone using a write protect GPIO
would effectively be write protected all the time.
A future change will move the wp-gpio support to the core dw_mmc.c
file. Now the exynos-specific code won't claim the GPIO but will
just set the DW_MCI_QUIRK_NO_WRITE_PROTECT quirk if write protect
won't be used.
Signed-off-by: Doug Anderson diand...@chromium.org
---
drivers/mmc/host/dw_mmc-exynos.c | 12 ++--
1 files changed, 6 insertions(+), 6 deletions(-)
diff --git a/drivers/mmc/host/dw_mmc-exynos.c b/drivers/mmc/host/dw_mmc-exynos.c
index 4d50da6..58cc03e 100644
--- a/drivers/mmc/host/dw_mmc-exynos.c
+++ b/drivers/mmc/host/dw_mmc-exynos.c
@@ -175,12 +175,12 @@ static int dw_mci_exynos_setup_bus(struct dw_mci *host,
}
}
- gpio = of_get_named_gpio(slot_np, wp-gpios, 0);
- if (gpio_is_valid(gpio)) {
- if (devm_gpio_request(host-dev, gpio, dw-mci-wp))
- dev_info(host-dev, gpio [%d] request failed\n,
- gpio);
- } else {
+ /*
+* If there are no write-protect GPIOs present then we assume no write
+* protect. The mci_readl() in dw_mmc.c won't work since it's not
+* hooked up on exynos.
+*/
+ if (!of_find_property(slot_np, wp-gpios, NULL)) {
dev_info(host-dev, wp gpio not available);
host-pdata-quirks |= DW_MCI_QUIRK_NO_WRITE_PROTECT;
}
--
1.7.7.3
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[GIT PULL 3/3] Samsung exynos5440 for v3.8
Arnd, Olof, This is adding support for exynos5440, including Quad ARM Cortex-A15 cores and its reference board SSDK5440. Note, at this moment, just enabled minimal system part for initial kernel boot and pinctrl driver. Please pull from: git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung.git next/soc-exynos5440 Thanks. Best regards, Kgene. -- Kukjin Kim kgene@samsung.com, Senior Engineer, SW Solution Development Team, Samsung Electronics Co., Ltd. The following changes since commit 77b67063bb6bce6d475e910d3b886a606d0d91f7: Linux 3.7-rc5 (2012-11-11 13:44:33 +0100) are available in the git repository at: git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung.git next/soc-exynos5440 Kukjin Kim (2): ARM: EXYNOS: add support for EXYNOS5440 SoC ARM: dts: add initial dts file for EXYNOS5440, SSDK5440 Thomas Abraham (2): pinctrl: exynos5440: add pinctrl driver for Samsung EXYNOS5440 SoC ARM: dts: Add pin controller node for Samsung EXYNOS5440 SoC arch/arm/boot/dts/Makefile |3 +- arch/arm/boot/dts/exynos5440-ssdk5440.dts| 46 ++ arch/arm/boot/dts/exynos5440.dtsi| 159 + arch/arm/mach-exynos/Kconfig | 11 +- arch/arm/mach-exynos/Makefile|2 +- arch/arm/mach-exynos/common.c| 68 ++- arch/arm/mach-exynos/include/mach/irqs.h |5 + arch/arm/mach-exynos/include/mach/map.h |5 + arch/arm/mach-exynos/include/mach/regs-pmu.h |1 + arch/arm/mach-exynos/mach-exynos5-dt.c | 31 +- arch/arm/mach-exynos/mct.c | 11 +- arch/arm/mach-exynos/setup-i2c0.c|2 +- arch/arm/plat-samsung/include/plat/cpu.h |8 + drivers/pinctrl/Kconfig |5 + drivers/pinctrl/Makefile |1 + drivers/pinctrl/pinctrl-exynos5440.c | 919 ++ drivers/tty/serial/samsung.c |3 +- 17 files changed, 1258 insertions(+), 22 deletions(-) create mode 100644 arch/arm/boot/dts/exynos5440-ssdk5440.dts create mode 100644 arch/arm/boot/dts/exynos5440.dtsi create mode 100644 drivers/pinctrl/pinctrl-exynos5440.c -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[GIT PULL 2/3] Samsung dt-2 for v3.8
Arnd, Olof,
Here is second Samsung DT stuff for v3.8.
This is including power domain DT support for exynos and Google ARM
Chromebook, Snow board and exynos4210-origen updates.
Please pull from:
git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung.git
next/dt-samsung-2
Note that this is based on previous Samsung DT branch 'next/dt-samsung'
And following, my prefer resolution would be helpful when merge conflict
happens between Samsung dt branch and other Samsung stuff.
8--
commit 9df1e1c9ce3126321b37b3fae47c343e83982572
Merge: cc24b98 d80162e
Author: Kukjin Kim kgene@samsung.com
Date: Thu Nov 22 16:15:55 2012 +0900
Merge branch 'next/dt-samsung-2' into for-next
Conflicts:
arch/arm/boot/dts/exynos5250-smdk5250.dts
arch/arm/boot/dts/exynos5250.dtsi
arch/arm/mach-exynos/mach-exynos5-dt.c
diff --cc arch/arm/boot/dts/exynos5250-smdk5250.dts
index 9b9e77f,371182f..5cd16ea
--- a/arch/arm/boot/dts/exynos5250-smdk5250.dts
+++ b/arch/arm/boot/dts/exynos5250-smdk5250.dts
@@@ -102,17 -90,7 +98,17 @@@
status = disabled;
};
+ i2c@12CE {
+ samsung,i2c-sda-delay = 100;
+ samsung,i2c-max-bus-freq = 66000;
+
+ hdmiphy@38 {
+ compatible = samsung,exynos5-hdmiphy;
+ reg = 0x38;
+ };
+ };
+
- dwmmc_0: dwmmc0@1220 {
+ dwmmc0@1220 {
num-slots = 1;
supports-highspeed;
broken-cd;
diff --cc arch/arm/boot/dts/exynos5250.dtsi
index 733060a,71a3e0b..39fc4bd
--- a/arch/arm/boot/dts/exynos5250.dtsi
+++ b/arch/arm/boot/dts/exynos5250.dtsi
@@@ -31,16 -31,10 +31,20 @@@
gsc1 = gsc_1;
gsc2 = gsc_2;
gsc3 = gsc_3;
+ i2c0 = i2c_0;
+ i2c1 = i2c_1;
+ i2c2 = i2c_2;
+ i2c3 = i2c_3;
+ i2c4 = i2c_4;
+ i2c5 = i2c_5;
+ i2c6 = i2c_6;
+ i2c7 = i2c_7;
+ i2c8 = i2c_8;
+ i2c9 = i2c_9;
+ mshc0 = dwmmc_0;
+ mshc1 = dwmmc_1;
+ mshc2 = dwmmc_2;
+ mshc3 = dwmmc_3;
};
gic:interrupt-controller@10481000 {
diff --cc arch/arm/mach-exynos/mach-exynos5-dt.c
index 10f681b,a032678..08f1074
--- a/arch/arm/mach-exynos/mach-exynos5-dt.c
+++ b/arch/arm/mach-exynos/mach-exynos5-dt.c
@@@ -52,10 -50,16 +52,20 @@@ static const struct of_dev_auxdata exyn
s3c2440-i2c.0, NULL),
OF_DEV_AUXDATA(samsung,s3c2440-i2c, EXYNOS5_PA_IIC(1),
s3c2440-i2c.1, NULL),
+ OF_DEV_AUXDATA(samsung,s3c2440-i2c, EXYNOS5_PA_IIC(2),
+ s3c2440-i2c.2, NULL),
+ OF_DEV_AUXDATA(samsung,s3c2440-i2c, EXYNOS5_PA_IIC(3),
+ s3c2440-i2c.3, NULL),
+ OF_DEV_AUXDATA(samsung,s3c2440-i2c, EXYNOS5_PA_IIC(4),
+ s3c2440-i2c.4, NULL),
+ OF_DEV_AUXDATA(samsung,s3c2440-i2c, EXYNOS5_PA_IIC(5),
+ s3c2440-i2c.5, NULL),
+ OF_DEV_AUXDATA(samsung,s3c2440-i2c, EXYNOS5_PA_IIC(6),
+ s3c2440-i2c.6, NULL),
+ OF_DEV_AUXDATA(samsung,s3c2440-i2c, EXYNOS5_PA_IIC(7),
+ s3c2440-i2c.7, NULL),
+ OF_DEV_AUXDATA(samsung,s3c2440-hdmiphy-i2c, EXYNOS5_PA_IIC(8),
+ s3c2440-hdmiphy-i2c, NULL),
OF_DEV_AUXDATA(samsung,exynos5250-dw-mshc, EXYNOS5_PA_DWMCI0,
dw_mmc.0, NULL),
OF_DEV_AUXDATA(samsung,exynos5250-dw-mshc, EXYNOS5_PA_DWMCI1,
8
If any problems, please kindly let me know.
Thanks.
Best regards,
Kgene.
--
Kukjin Kim kgene@samsung.com, Senior Engineer,
SW Solution Development Team, Samsung Electronics Co., Ltd.
The following changes since commit c47d244a646d08e2161b7fa22c5512e7988762ae:
ARM: EXYNOS: DT Support for SATA and SATA PHY (2012-11-20 21:02:17 +0900)
are available in the git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung.git
next/dt-samsung-2
Doug Anderson (3):
ARM: dts: Move the dwmmc aliases from smdk5250 dts to exynos
ARM: dts: Add board dts file for Snow board (ARM Chromebook)
ARM: dts: Add aliases for i2c controller for exynos4
Olof Johansson (1):
ARM: EXYNOS: add all i2c busses to auxdata for DT
Tomasz Figa (9):
ARM: dts: Split memory sections for exynos4210-origen
ARM: dts: Update for pinctrl-samsung driver for exynos4210-origen
ARM: dts: Update sdhci nodes for current bindings for
exynos4210-origen
ARM: dts: Add vmmc fixed voltage regulator for exynos4210-origen
ARM: EXYNOS: Detect power domain state on
[GIT PULL 1/3] Samsung devel-2 for v3.8
Hi Arnd, Olof Here is second Samsung development patches for v3.8. This includes properly enabling PM support and UART3 DEBUG_LL for exynos5 and CAMIF for s3c24xx/s3c64xx. Please pull from: git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung.git next/devel-samsung-2 Thanks. Best regards, Kgene. -- Kukjin Kim kgene@samsung.com, Senior Engineer, SW Solution Development Team, Samsung Electronics Co., Ltd. The following changes since commit f4a75d2eb7b1e2206094b901be09adb31ba63681: Linux 3.7-rc6 (2012-11-16 17:42:40 -0800) are available in the git repository at: git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung.git next/devel-samsung-2 Abhilash Kesavan (3): ARM: EXYNOS: fix the hotplug for Cortex-A15 ARM: EXYNOS: Remove scu_enable from cpuidle ARM: EXYNOS: Add flush_cache_all in suspend finisher Inderpal Singh (2): ARM: EXYNOS: Add support for rtc wakeup ARM: EXYNOS: Fix soft reboot hang after suspend/resume Olof Johansson (1): ARM: EXYNOS: add UART3 to DEBUG_LL ports Sachin Kamat (1): ARM: S3C24XX: Fix potential NULL pointer dereference error Sylwester Nawrocki (2): ARM: SAMSUNG: Add s3c24xx/s3c64xx CAMIF GPIO setup helpers ARM: S3C24XX: Add clkdev entry for camif-upll clock arch/arm/Kconfig.debug | 11 + arch/arm/mach-exynos/common.c |2 + arch/arm/mach-exynos/cpuidle.c |3 +- arch/arm/mach-exynos/hotplug.c | 45 ++- arch/arm/mach-exynos/pm.c |7 +++ arch/arm/mach-s3c24xx/Kconfig |1 + arch/arm/mach-s3c24xx/clock-s3c2440.c |1 + arch/arm/plat-s3c24xx/dma.c |9 ++-- arch/arm/plat-samsung/Kconfig |6 +++ arch/arm/plat-samsung/Makefile |1 + arch/arm/plat-samsung/include/plat/pm.h |2 + arch/arm/plat-samsung/setup-camif.c | 70 +++ 12 files changed, 150 insertions(+), 8 deletions(-) create mode 100644 arch/arm/plat-samsung/setup-camif.c -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
RE: [GIT PULL] Samsung fixes-3 for v3.7
Kukjin Kim wrote: Hi Arnd, Olof Here is Samsung fixes for v3.7 and it is for fixing of mdma1 address for exynos4210 rev0 SoC. Please pull from: git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung.git v3.7-samsung-fixes-3 Probably, missed? Thanks. Best regards, Kgene. -- Kukjin Kim kgene@samsung.com, Senior Engineer, SW Solution Development Team, Samsung Electronics Co., Ltd. Thanks. Best regards, Kgene. -- Kukjin Kim kgene@samsung.com, Senior Engineer, SW Solution Development Team, Samsung Electronics Co., Ltd. The following changes since commit f4a75d2eb7b1e2206094b901be09adb31ba63681: Linux 3.7-rc6 (2012-11-16 17:42:40 -0800) are available in the git repository at: git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung.git v3.7-samsung-fixes-3 Bartlomiej Zolnierkiewicz (1): ARM: EXYNOS: PL330 MDMA1 fix for revision 0 of Exynos4210 SOC arch/arm/mach-exynos/dma.c |3 +++ arch/arm/mach-exynos/include/mach/map.h |1 + 2 files changed, 4 insertions(+), 0 deletions(-) -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
RE: [PATCH 3/4] ARM: dts: exynos4: add node for PL330 MDMA1 controller
Bartlomiej Zolnierkiewicz wrote:
Hi Kukjin,
Hi Bart,
Could you also apply this patch?
Yeah, looks good to me :-)
Will apply, thanks.
Best regards,
Kgene.
--
Kukjin Kim kgene@samsung.com, Senior Engineer,
SW Solution Development Team, Samsung Electronics Co., Ltd.
From: Bartlomiej Zolnierkiewicz b.zolnier...@samsung.com
Subject: [PATCH v2] ARM: dts: exynos4: add node for PL330 MDMA1 controller
Add missing PL330 MDMA1 controller node to the device tree (DT).
[ Currently there is no problem with using 'non-secure' mdma1 address
instead of 'secure' one on revision 0 of Exynos4210 SOC (as used by
Universal C210 board) as this SOC revision is unsupported by DT. ]
Reviewed-by: Tomasz Figa t.f...@samsung.com
Cc: Kukjin Kim kgene@samsung.com
Signed-off-by: Bartlomiej Zolnierkiewicz b.zolnier...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
v2: refreshed againt next-20121115 and added Reviewed-by tag
arch/arm/boot/dts/exynos4.dtsi |6 ++
arch/arm/mach-exynos/mach-exynos4-dt.c |1 +
2 files changed, 7 insertions(+)
Index: b/arch/arm/boot/dts/exynos4.dtsi
===
--- a/arch/arm/boot/dts/exynos4.dtsi 2012-11-22 11:40:51.0
+0100
+++ b/arch/arm/boot/dts/exynos4.dtsi 2012-11-22 11:53:29.520815274
+0100
@@ -244,5 +244,11 @@
reg = 0x1269 0x1000;
interrupts = 0 36 0;
};
+
+ mdma1: mdma@1285 {
+ compatible = arm,pl330, arm,primecell;
+ reg = 0x1285 0x1000;
+ interrupts = 0 34 0;
+ };
};
};
Index: b/arch/arm/mach-exynos/mach-exynos4-dt.c
===
--- a/arch/arm/mach-exynos/mach-exynos4-dt.c 2012-11-22
11:40:51.0 +0100
+++ b/arch/arm/mach-exynos/mach-exynos4-dt.c 2012-11-22
11:53:55.248815271 +0100
@@ -77,6 +77,7 @@ static const struct of_dev_auxdata exyno
exynos4210-spi.2, NULL),
OF_DEV_AUXDATA(arm,pl330, EXYNOS4_PA_PDMA0, dma-pl330.0, NULL),
OF_DEV_AUXDATA(arm,pl330, EXYNOS4_PA_PDMA1, dma-pl330.1, NULL),
+ OF_DEV_AUXDATA(arm,pl330, EXYNOS4_PA_MDMA1, dma-pl330.2, NULL),
OF_DEV_AUXDATA(samsung,exynos4210-tmu, EXYNOS4_PA_TMU,
exynos-tmu, NULL),
{},
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[PATCH] ARM: dts: Add node for GMAC for exynos5440
From: Byungho An bh74...@samsung.com
This patch adds node for GMAC for exynos5440.
Signed-off-by: Byungho An bh74...@samsung.com
Signed-off-by: Kukjin Kim kgene@samsung.com
---
arch/arm/boot/dts/exynos5440.dtsi |9 +
1 file changed, 9 insertions(+)
diff --git a/arch/arm/boot/dts/exynos5440.dtsi
b/arch/arm/boot/dts/exynos5440.dtsi
index 024269d..b8de8e3 100644
--- a/arch/arm/boot/dts/exynos5440.dtsi
+++ b/arch/arm/boot/dts/exynos5440.dtsi
@@ -131,6 +131,15 @@
interrupts = 0 1 0;
};
+ gmac: ethernet@0023 {
+ compatible = snps,dwmac-3.70a;
+ reg = 0x0023 0x8000;
+ interrupt-parent = gic;
+ interrupts = 0 31 4;
+ interrupt-name = macirq;
+ phy-mode = sgmii;
+ };
+
amba {
#address-cells = 1;
#size-cells = 1;
--
1.7.9.5
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RE: [PATCH] ARM: EXYNOS: Add support for secondary CPU bring-up on Exynos4412
Tomasz Figa wrote:
Exynos4412 uses different information register for each core. This patch
adjusts the bring-up code to take that into account.
Signed-off-by: Tomasz Figa t.f...@samsung.com
Reviewed-by: Kyungmin Park kyungmin.p...@samsung.com
---
arch/arm/mach-exynos/platsmp.c | 30 --
1 file changed, 24 insertions(+), 6 deletions(-)
diff --git a/arch/arm/mach-exynos/platsmp.c b/arch/arm/mach-exynos/platsmp.c
index f93d820..4ca8ff1 100644
--- a/arch/arm/mach-exynos/platsmp.c
+++ b/arch/arm/mach-exynos/platsmp.c
@@ -36,8 +36,22 @@
extern void exynos4_secondary_startup(void);
-#define CPU1_BOOT_REG(samsung_rev() == EXYNOS4210_REV_1_1 ? \
- S5P_INFORM5 : S5P_VA_SYSRAM)
+static inline void __iomem *cpu_boot_reg_base(void)
+{
+ if (soc_is_exynos4210() samsung_rev() == EXYNOS4210_REV_1_1)
+ return S5P_INFORM5;
+ return S5P_VA_SYSRAM;
+}
+
+static inline void __iomem *cpu_boot_reg(int cpu)
+{
+ void __iomem *boot_reg;
+
+ boot_reg = cpu_boot_reg_base();
+ if (soc_is_exynos4412())
+ boot_reg += 4*cpu;
+ return boot_reg;
+}
/*
* Write pen_release in a way that is guaranteed to be visible to all
@@ -84,6 +98,7 @@ static void __cpuinit exynos_secondary_init(unsigned int
cpu)
static int __cpuinit exynos_boot_secondary(unsigned int cpu, struct
task_struct *idle)
{
unsigned long timeout;
+ unsigned long phys_cpu = cpu_logical_map(cpu);
/*
* Set synchronisation state between this boot processor
@@ -99,7 +114,7 @@ static int __cpuinit exynos_boot_secondary(unsigned int
cpu, struct task_struct
* Note that pen_release is the hardware CPU ID, whereas
* cpu is Linux's internal ID.
*/
- write_pen_release(cpu_logical_map(cpu));
+ write_pen_release(phys_cpu);
if (!(__raw_readl(S5P_ARM_CORE1_STATUS) S5P_CORE_LOCAL_PWR_EN)) {
__raw_writel(S5P_CORE_LOCAL_PWR_EN,
@@ -133,7 +148,7 @@ static int __cpuinit exynos_boot_secondary(unsigned int
cpu, struct task_struct
smp_rmb();
__raw_writel(virt_to_phys(exynos4_secondary_startup),
- CPU1_BOOT_REG);
+ cpu_boot_reg(phys_cpu));
gic_raise_softirq(cpumask_of(cpu), 0);
if (pen_release == -1)
@@ -181,6 +196,8 @@ static void __init exynos_smp_init_cpus(void)
static void __init exynos_smp_prepare_cpus(unsigned int max_cpus)
{
+ int i;
+
if (!soc_is_exynos5250())
scu_enable(scu_base_addr());
@@ -190,8 +207,9 @@ static void __init exynos_smp_prepare_cpus(unsigned int
max_cpus)
* until it receives a soft interrupt, and then the
* secondary CPU branches to this address.
*/
- __raw_writel(virt_to_phys(exynos4_secondary_startup),
- CPU1_BOOT_REG);
+ for (i = 1; i max_cpus; ++i)
+ __raw_writel(virt_to_phys(exynos4_secondary_startup),
+ cpu_boot_reg(cpu_logical_map(i)));
}
struct smp_operations exynos_smp_ops __initdata = {
--
1.8.0
Looks OK to me, will apply.
Thanks.
Best regards,
Kgene.
--
Kukjin Kim kgene@samsung.com, Senior Engineer,
SW Solution Development Team, Samsung Electronics Co., Ltd.
--
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Re: [PATCH 230/493] input: remove use of __devinit
On Mon, Nov 19, 2012 at 7:22 PM, Bill Pemberton wf...@virginia.edu wrote: CONFIG_HOTPLUG is going away as an option so __devinit is no longer needed. drivers/input/touchscreen/cyttsp_i2c.c | 2 +- drivers/input/touchscreen/cyttsp_spi.c | 2 +- For these two, Acked-by: Javier Martinez Canillas jav...@dowhile0.org Thanks Best regards, Javier -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 1/4] thermal: Add new thermal trend type to support quick cooling
On 22 November 2012 13:42, Zhang Rui rui.zh...@intel.com wrote:
On Thu, 2012-11-22 at 10:11 +0530, Amit Kachhap wrote:
On 22 November 2012 06:52, Zhang Rui rui.zh...@intel.com wrote:
On Thu, 2012-11-08 at 09:56 +0530, Amit Daniel Kachhap wrote:
This modification adds 2 new thermal trend type THERMAL_TREND_RAISE_FULL
and THERMAL_TREND_DROP_FULL. This thermal trend can be used to quickly
jump to the upper or lower cooling level instead of incremental increase
or decrease. This is needed for temperature sensors which support
rising/falling
threshold interrupts and polling can be totally avoided.
Signed-off-by: Amit Daniel Kachhap amit.dan...@samsung.com
Signed-off-by: Amit Daniel Kachhap amit.kach...@linaro.org
---
drivers/thermal/step_wise.c | 19 +++
include/linux/thermal.h |2 ++
2 files changed, 17 insertions(+), 4 deletions(-)
diff --git a/drivers/thermal/step_wise.c b/drivers/thermal/step_wise.c
index 1242cff..0d2d8d6 100644
--- a/drivers/thermal/step_wise.c
+++ b/drivers/thermal/step_wise.c
@@ -35,6 +35,10 @@
* state for this trip point
*b. if the trend is THERMAL_TREND_DROPPING, use lower cooling
* state for this trip point
+ *c. if the trend is THERMAL_TREND_RAISE_FULL, use highest cooling
+ * state for this trip point
+ *d. if the trend is THERMAL_TREND_DROP_FULL, use lowest cooling
+ * state for this trip point
*/
static unsigned long get_target_state(struct thermal_instance *instance,
enum thermal_trend trend)
@@ -50,7 +54,10 @@ static unsigned long get_target_state(struct
thermal_instance *instance,
} else if (trend == THERMAL_TREND_DROPPING) {
cur_state = cur_state instance-lower ?
(cur_state - 1) : instance-lower;
- }
+ } else if (trend == THERMAL_TREND_RAISE_FULL)
+ cur_state = instance-upper;
+ else if (trend == THERMAL_TREND_DROP_FULL)
+ cur_state = instance-lower;
return cur_state;
}
@@ -87,7 +94,8 @@ static void update_instance_for_throttle(struct
thermal_zone_device *tz,
}
static void update_instance_for_dethrottle(struct thermal_zone_device
*tz,
- int trip, enum thermal_trip_type trip_type)
+ int trip, enum thermal_trip_type trip_type,
+ enum thermal_trend trend)
{
struct thermal_instance *instance;
struct thermal_cooling_device *cdev;
@@ -101,7 +109,10 @@ static void update_instance_for_dethrottle(struct
thermal_zone_device *tz,
cdev = instance-cdev;
cdev-ops-get_cur_state(cdev, cur_state);
- instance-target = cur_state instance-lower ?
+ if (trend == THERMAL_TREND_DROP_FULL)
+ instance-target = instance-lower;
+ else
+ instance-target = cur_state instance-lower ?
(cur_state - 1) : THERMAL_NO_TARGET;
what do you expect to happen if the trend is THERMAL_TREND_RAISE_FULL at
this time?
Hi Rui,
I suppose this is dethrotle routine and hence this will be called when
only drop in temperature happens. Also I did not used get_target_state
here because I thought it might cause regression in the other existing
thermal drivers(I am not sure) But I guess calling get_target_state is
the good way to know next target state and is fine if you agree.
Also one suggestion, 2 functions for throttle/dethrottle can be merged
as both look same and just get_target_state can be used in that
function
agree.
patches have been refreshed, please review.
Thanks Rui, Your patches looks nice. I will re-base my patches against
your implementation and submit them shortly.
Thanks,
Amit D
thanks,
rui
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Re: [PATCH v8 2/2] usb: s3c-hsotg: Adding phy driver support
On Thu, Nov 22, 2012 at 1:41 AM, Tomasz Figa tomasz.f...@gmail.com wrote:
Hi Praveen,
On Wednesday 14 of November 2012 15:57:16 Praveen Paneri wrote:
Adding the transceiver to hsotg driver. Keeping the platform data
for continuing the smooth operation for boards which still uses it
Signed-off-by: Praveen Paneri p.pan...@samsung.com
Acked-by: Kyungmin Park kyungmin.p...@samsung.com
---
drivers/usb/gadget/s3c-hsotg.c | 37
+++-- 1 files changed, 27
insertions(+), 10 deletions(-)
diff --git a/drivers/usb/gadget/s3c-hsotg.c
b/drivers/usb/gadget/s3c-hsotg.c index 6f696ee..bc30a2d 100644
--- a/drivers/usb/gadget/s3c-hsotg.c
+++ b/drivers/usb/gadget/s3c-hsotg.c
@@ -32,6 +32,7 @@
#include linux/usb/ch9.h
#include linux/usb/gadget.h
+#include linux/usb/phy.h
#include linux/platform_data/s3c-hsotg.h
#include mach/map.h
@@ -133,7 +134,9 @@ struct s3c_hsotg_ep {
* struct s3c_hsotg - driver state.
* @dev: The parent device supplied to the probe function
* @driver: USB gadget driver
- * @plat: The platform specific configuration data.
+ * @phy: The otg phy transceiver structure for phy control.
+ * @plat: The platform specific configuration data. This can be removed
once + * all SoCs support usb transceiver.
* @regs: The memory area mapped for accessing registers.
* @irq: The IRQ number we are using
* @supplies: Definition of USB power supplies
@@ -153,6 +156,7 @@ struct s3c_hsotg_ep {
struct s3c_hsotg {
struct device*dev;
struct usb_gadget_driver *driver;
+ struct usb_phy *phy;
struct s3c_hsotg_plat*plat;
spinlock_t lock;
@@ -2854,7 +2858,10 @@ static void s3c_hsotg_phy_enable(struct s3c_hsotg
*hsotg) struct platform_device *pdev = to_platform_device(hsotg-dev);
dev_dbg(hsotg-dev, pdev 0x%p\n, pdev);
- if (hsotg-plat-phy_init)
+
+ if (hsotg-phy)
+ usb_phy_init(hsotg-phy);
+ else if (hsotg-plat-phy_init)
hsotg-plat-phy_init(pdev, hsotg-plat-phy_type);
}
@@ -2869,7 +2876,9 @@ static void s3c_hsotg_phy_disable(struct s3c_hsotg
*hsotg) {
struct platform_device *pdev = to_platform_device(hsotg-dev);
- if (hsotg-plat-phy_exit)
+ if (hsotg-phy)
+ usb_phy_shutdown(hsotg-phy);
+ else if (hsotg-plat-phy_exit)
hsotg-plat-phy_exit(pdev, hsotg-plat-phy_type);
}
@@ -3493,6 +3502,7 @@ static void s3c_hsotg_release(struct device *dev)
static int __devinit s3c_hsotg_probe(struct platform_device *pdev)
{
struct s3c_hsotg_plat *plat = pdev-dev.platform_data;
+ struct usb_phy *phy;
struct device *dev = pdev-dev;
struct s3c_hsotg_ep *eps;
struct s3c_hsotg *hsotg;
@@ -3501,20 +3511,27 @@ static int __devinit s3c_hsotg_probe(struct
platform_device *pdev) int ret;
int i;
- plat = pdev-dev.platform_data;
- if (!plat) {
- dev_err(pdev-dev, no platform data defined\n);
- return -EINVAL;
- }
-
hsotg = devm_kzalloc(pdev-dev, sizeof(struct s3c_hsotg),
GFP_KERNEL); if (!hsotg) {
dev_err(dev, cannot get memory\n);
return -ENOMEM;
}
+ phy = devm_usb_get_phy(dev, USB_PHY_TYPE_USB2);
+ if (IS_ERR_OR_NULL(phy)) {
+ /* Fallback for pdata */
+ plat = pdev-dev.platform_data;
+ if (!plat) {
+ dev_err(pdev-dev, no platform data or transceiver
defined\n);
+ return -EPROBE_DEFER;
+ } else {
+ hsotg-plat = plat;
+ }
nitpick: The hsotg-plat = plat; assignment can be made without the else
statement as well.
True!
We will anyway remove the platform data part soon. If you say I can
resend it again.
Best regards,
Tomasz Figa
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Re: [PATCH v8 1/2] usb: phy: samsung: Introducing usb phy driver for hsotg
Hi Tomasz, On Thu, Nov 22, 2012 at 1:36 AM, Tomasz Figa tomasz.f...@gmail.com wrote: Hi Praveen, See some minor comments inline. Thanks for your comments On Wednesday 14 of November 2012 15:57:15 Praveen Paneri wrote: This driver uses usb_phy interface to interact with s3c-hsotg. Supports phy_init and phy_shutdown functions to enable/disable usb phy. Support will be extended to host controllers and more Samsung SoCs. Signed-off-by: Praveen Paneri p.pan...@samsung.com Acked-by: Heiko Stuebner he...@sntech.de Acked-by: Kyungmin Park kyungmin.p...@samsung.com --- .../devicetree/bindings/usb/samsung-usbphy.txt | 11 + drivers/usb/phy/Kconfig|8 + drivers/usb/phy/Makefile |1 + drivers/usb/phy/samsung-usbphy.c | 360 include/linux/platform_data/samsung-usbphy.h | 27 ++ 5 files changed, 407 insertions(+), 0 deletions(-) create mode 100644 Documentation/devicetree/bindings/usb/samsung-usbphy.txt create mode 100644 drivers/usb/phy/samsung-usbphy.c create mode 100644 include/linux/platform_data/samsung-usbphy.h diff --git a/Documentation/devicetree/bindings/usb/samsung-usbphy.txt b/Documentation/devicetree/bindings/usb/samsung-usbphy.txt new file mode 100644 index 000..7b26e2d --- /dev/null +++ b/Documentation/devicetree/bindings/usb/samsung-usbphy.txt @@ -0,0 +1,11 @@ +* Samsung's usb phy transceiver + +The Samsung's phy transceiver is used for controlling usb otg phy for +s3c-hsotg usb device controller. +TODO: Adding the PHY binding with controller(s) according to the under +developement generic PHY driver. + +Required properties: +- compatible : should be samsung,exynos4210-usbphy +- reg : base physical address of the phy registers and length of memory mapped + region. diff --git a/drivers/usb/phy/Kconfig b/drivers/usb/phy/Kconfig index 7eb73c5..17ad743 100644 --- a/drivers/usb/phy/Kconfig +++ b/drivers/usb/phy/Kconfig @@ -44,3 +44,11 @@ config USB_RCAR_PHY To compile this driver as a module, choose M here: the module will be called rcar-phy. + +config SAMSUNG_USBPHY + bool Samsung USB PHY controller Driver + depends on USB_S3C_HSOTG + select USB_OTG_UTILS + help + Enable this to support Samsung USB phy controller for samsung + SoCs. diff --git a/drivers/usb/phy/Makefile b/drivers/usb/phy/Makefile index 1a579a8..ec304f6 100644 --- a/drivers/usb/phy/Makefile +++ b/drivers/usb/phy/Makefile @@ -9,3 +9,4 @@ obj-$(CONFIG_USB_ISP1301) += isp1301.o obj-$(CONFIG_MV_U3D_PHY) += mv_u3d_phy.o obj-$(CONFIG_USB_EHCI_TEGRA) += tegra_usb_phy.o obj-$(CONFIG_USB_RCAR_PHY) += rcar-phy.o +obj-$(CONFIG_SAMSUNG_USBPHY) += samsung-usbphy.o diff --git a/drivers/usb/phy/samsung-usbphy.c b/drivers/usb/phy/samsung-usbphy.c new file mode 100644 index 000..3c84aab --- /dev/null +++ b/drivers/usb/phy/samsung-usbphy.c @@ -0,0 +1,360 @@ +/* linux/drivers/usb/phy/samsung-usbphy.c + * + * Copyright (c) 2012 Samsung Electronics Co., Ltd. + * http://www.samsung.com + * + * Author: Praveen Paneri p.pan...@samsung.com + * + * Samsung USB2.0 High-speed OTG transceiver, talks to S3C HS OTG controller + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include linux/module.h +#include linux/platform_device.h +#include linux/clk.h +#include linux/delay.h +#include linux/err.h +#include linux/io.h +#include linux/of.h +#include linux/usb/otg.h +#include linux/platform_data/samsung-usbphy.h + +/* Register definitions */ + +#define SAMSUNG_PHYPWR (0x00) + +#define PHYPWR_NORMAL_MASK (0x19 0) +#define PHYPWR_OTG_DISABLE (0x1 4) +#define PHYPWR_ANALOG_POWERDOWN (0x1 3) +#define PHYPWR_FORCE_SUSPEND (0x1 1) +/* For Exynos4 */ +#define PHYPWR_NORMAL_MASK_PHY0 (0x39 0) +#define PHYPWR_SLEEP_PHY0(0x1 5) + +#define SAMSUNG_PHYCLK (0x04) + +#define PHYCLK_MODE_USB11(0x1 6) +#define PHYCLK_EXT_OSC (0x1 5) +#define PHYCLK_COMMON_ON_N (0x1 4) +#define PHYCLK_ID_PULL (0x1 2) +#define PHYCLK_CLKSEL_MASK (0x3 0) +#define PHYCLK_CLKSEL_48M(0x0 0) +#define PHYCLK_CLKSEL_12M(0x2 0)
Re: [PATCH v8 1/3] ARM: S3C64XX: Removing old phy setup code
On Thu, Nov 22, 2012 at 1:44 AM, Tomasz Figa tomasz.f...@gmail.com wrote:
Hi Praveen,
On Wednesday 14 of November 2012 16:15:36 Praveen Paneri wrote:
This patch removes old phy code from platform side. 'setup-usb-phy.c'
will be used for providing transceiver platform data in next
patch. Not all of the platform data code is removed as there are others
making use of platform_data defined for hsotg. That can be removed once
all the SoCs start using the new transceiver for usb phy setup.
Signed-off-by: Praveen Paneri p.pan...@samsung.com
---
arch/arm/mach-s3c64xx/mach-crag6410.c |3 -
arch/arm/mach-s3c64xx/mach-smartq.c |3 -
arch/arm/mach-s3c64xx/mach-smdk6410.c |3 -
arch/arm/mach-s3c64xx/setup-usb-phy.c | 79
- 4 files changed, 0 insertions(+), 88
deletions(-)
diff --git a/arch/arm/mach-s3c64xx/mach-crag6410.c
b/arch/arm/mach-s3c64xx/mach-crag6410.c index 2abe95d..48f4a2d 100644
--- a/arch/arm/mach-s3c64xx/mach-crag6410.c
+++ b/arch/arm/mach-s3c64xx/mach-crag6410.c
@@ -31,7 +31,6 @@
#include linux/spi/spi.h
#include linux/i2c/pca953x.h
-#include linux/platform_data/s3c-hsotg.h
#include video/platform_lcd.h
@@ -805,7 +804,6 @@ static const struct gpio_led_platform_data
gpio_leds_pdata = { .num_leds = ARRAY_SIZE(gpio_leds),
};
-static struct s3c_hsotg_plat crag6410_hsotg_pdata;
static void __init crag6410_machine_init(void)
{
@@ -831,7 +829,6 @@ static void __init crag6410_machine_init(void)
s3c_i2c0_set_platdata(i2c0_pdata);
s3c_i2c1_set_platdata(i2c1_pdata);
s3c_fb_set_platdata(crag6410_lcd_pdata);
- s3c_hsotg_set_platdata(crag6410_hsotg_pdata);
i2c_register_board_info(0, i2c_devs0, ARRAY_SIZE(i2c_devs0));
i2c_register_board_info(1, i2c_devs1, ARRAY_SIZE(i2c_devs1));
diff --git a/arch/arm/mach-s3c64xx/mach-smartq.c
b/arch/arm/mach-s3c64xx/mach-smartq.c index c6d7390..59bb34c 100644
--- a/arch/arm/mach-s3c64xx/mach-smartq.c
+++ b/arch/arm/mach-s3c64xx/mach-smartq.c
@@ -18,7 +18,6 @@
#include linux/serial_core.h
#include linux/spi/spi_gpio.h
#include linux/usb/gpio_vbus.h
-#include linux/platform_data/s3c-hsotg.h
#include asm/mach-types.h
#include asm/mach/map.h
@@ -187,7 +186,6 @@ static struct s3c_hwmon_pdata smartq_hwmon_pdata
__initdata = { },
};
-static struct s3c_hsotg_plat smartq_hsotg_pdata;
static int __init smartq_lcd_setup_gpio(void)
{
@@ -385,7 +383,6 @@ void __init smartq_map_io(void)
void __init smartq_machine_init(void)
{
s3c_i2c0_set_platdata(NULL);
- s3c_hsotg_set_platdata(smartq_hsotg_pdata);
s3c_hwmon_set_platdata(smartq_hwmon_pdata);
s3c_sdhci1_set_platdata(smartq_internal_hsmmc_pdata);
s3c_sdhci2_set_platdata(smartq_internal_hsmmc_pdata);
diff --git a/arch/arm/mach-s3c64xx/mach-smdk6410.c
b/arch/arm/mach-s3c64xx/mach-smdk6410.c index da1a771..123f452 100644
--- a/arch/arm/mach-s3c64xx/mach-smdk6410.c
+++ b/arch/arm/mach-s3c64xx/mach-smdk6410.c
@@ -30,7 +30,6 @@
#include linux/regulator/fixed.h
#include linux/regulator/machine.h
#include linux/pwm_backlight.h
-#include linux/platform_data/s3c-hsotg.h
#ifdef CONFIG_SMDK6410_WM1190_EV1
#include linux/mfd/wm8350/core.h
@@ -627,7 +626,6 @@ static struct platform_pwm_backlight_data
smdk6410_bl_data = { .pwm_id = 1,
};
-static struct s3c_hsotg_plat smdk6410_hsotg_pdata;
static void __init smdk6410_map_io(void)
{
@@ -657,7 +655,6 @@ static void __init smdk6410_machine_init(void)
s3c_i2c0_set_platdata(NULL);
s3c_i2c1_set_platdata(NULL);
s3c_fb_set_platdata(smdk6410_lcd_pdata);
- s3c_hsotg_set_platdata(smdk6410_hsotg_pdata);
samsung_keypad_set_platdata(smdk6410_keypad_data);
diff --git a/arch/arm/mach-s3c64xx/setup-usb-phy.c
b/arch/arm/mach-s3c64xx/setup-usb-phy.c index f6757e0..7a09553 100644
--- a/arch/arm/mach-s3c64xx/setup-usb-phy.c
+++ b/arch/arm/mach-s3c64xx/setup-usb-phy.c
@@ -9,82 +9,3 @@
*
*/
-#include linux/clk.h
-#include linux/delay.h
-#include linux/err.h
-#include linux/io.h
-#include linux/platform_device.h
-#include mach/map.h
-#include mach/regs-sys.h
-#include plat/cpu.h
-#include plat/regs-usb-hsotg-phy.h
-#include plat/usb-phy.h
-
-static int s3c_usb_otgphy_init(struct platform_device *pdev)
-{
- struct clk *xusbxti;
- u32 phyclk;
-
- writel(readl(S3C64XX_OTHERS) | S3C64XX_OTHERS_USBMASK,
S3C64XX_OTHERS); -
- /* set clock frequency for PLL */
- phyclk = readl(S3C_PHYCLK) ~S3C_PHYCLK_CLKSEL_MASK;
-
- xusbxti = clk_get(pdev-dev, xusbxti);
- if (xusbxti !IS_ERR(xusbxti)) {
- switch (clk_get_rate(xusbxti)) {
- case 12 * MHZ:
- phyclk |= S3C_PHYCLK_CLKSEL_12M;
- break;
- case 24 * MHZ:
- phyclk |= S3C_PHYCLK_CLKSEL_24M;
- break;
- default:
- case 48 * MHZ:
-
Re: [GIT PULL] Samsung fixes-3 for v3.7
On Thu, Nov 22, 2012 at 5:51 PM, Kukjin Kim kgene@samsung.com wrote: Kukjin Kim wrote: Hi Arnd, Olof Here is Samsung fixes for v3.7 and it is for fixing of mdma1 address for exynos4210 rev0 SoC. Please pull from: git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung.git v3.7-samsung-fixes-3 Probably, missed? Yes, thanks for the reminder. By the way, I didn't know you supported rev0 silicon? Pulled in now, I'll send a fresh pull request tomorrow. -Olof -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v8 3/3] ARM: EXYNOS: Enabling samsung-usbphy driver for EXYNOS4210
On Thu, Nov 22, 2012 at 1:16 AM, Tomasz Figa tomasz.f...@gmail.com wrote:
Hi Praveen,
On Wednesday 14 of November 2012 16:15:38 Praveen Paneri wrote:
Adding usbphy node for Exynos4210 along with the platform data.
Signed-off-by: Praveen Paneri p.pan...@samsung.com
---
arch/arm/boot/dts/exynos4210-smdkv310.dts |5 +
arch/arm/mach-exynos/Kconfig |1 +
arch/arm/mach-exynos/include/mach/map.h |1 +
arch/arm/mach-exynos/mach-exynos4-dt.c|8
arch/arm/mach-exynos/setup-usb-phy.c | 13 +
5 files changed, 28 insertions(+), 0 deletions(-)
diff --git a/arch/arm/boot/dts/exynos4210-smdkv310.dts
b/arch/arm/boot/dts/exynos4210-smdkv310.dts index 9b23a82..550903a
100644
--- a/arch/arm/boot/dts/exynos4210-smdkv310.dts
+++ b/arch/arm/boot/dts/exynos4210-smdkv310.dts
@@ -59,6 +59,11 @@
status = okay;
};
+ usbphy@125B {
+ compatible = samsung,exynos4210-usbphy;
+ reg = 0x125B 0x100;
+ };
+
keypad@100A {
samsung,keypad-num-rows = 2;
samsung,keypad-num-columns = 8;
diff --git a/arch/arm/mach-exynos/Kconfig b/arch/arm/mach-exynos/Kconfig
index bb3b09a..315308c 100644
--- a/arch/arm/mach-exynos/Kconfig
+++ b/arch/arm/mach-exynos/Kconfig
@@ -410,6 +410,7 @@ config MACH_EXYNOS4_DT
select PINCTRL
select PINCTRL_EXYNOS4
select USE_OF
+ select EXYNOS4_SETUP_USB_PHY
help
Machine support for Samsung Exynos4 machine with device tree
enabled. Select this if a fdt blob is available for the Exynos4 SoC
based board. diff --git a/arch/arm/mach-exynos/include/mach/map.h
b/arch/arm/mach-exynos/include/mach/map.h index ef4958b..e64fe1c 100644
--- a/arch/arm/mach-exynos/include/mach/map.h
+++ b/arch/arm/mach-exynos/include/mach/map.h
@@ -244,6 +244,7 @@
#define S3C_PA_SPI1 EXYNOS4_PA_SPI1
#define S3C_PA_SPI2 EXYNOS4_PA_SPI2
#define S3C_PA_USB_HSOTG EXYNOS4_PA_HSOTG
+#define S3C_PA_USB_PHY EXYNOS4_PA_HSPHY
#define S5P_PA_EHCI EXYNOS4_PA_EHCI
#define S5P_PA_FIMC0 EXYNOS4_PA_FIMC0
diff --git a/arch/arm/mach-exynos/mach-exynos4-dt.c
b/arch/arm/mach-exynos/mach-exynos4-dt.c index 8858068..f7887e5 100644
--- a/arch/arm/mach-exynos/mach-exynos4-dt.c
+++ b/arch/arm/mach-exynos/mach-exynos4-dt.c
@@ -13,6 +13,7 @@
#include linux/of_platform.h
#include linux/serial_core.h
+#include linux/platform_data/samsung-usbphy.h
#include asm/mach/arch.h
#include asm/hardware/gic.h
@@ -20,9 +21,14 @@
#include plat/cpu.h
#include plat/regs-serial.h
+#include plat/usb-phy.h
#include common.h
+static struct samsung_usbphy_data exynos4_usbphy_pdata = {
+ .pmu_isolation = s5p_usb_phy_pmu_isolation,
+};
+
/*
* The following lookup table is used to override device names when
devices * are registered from device tree. This is temporarily added to
enable @@ -79,6 +85,8 @@ static const struct of_dev_auxdata
exynos4_auxdata_lookup[] __initconst = { OF_DEV_AUXDATA(arm,pl330,
EXYNOS4_PA_PDMA1, dma-pl330.1, NULL),
OF_DEV_AUXDATA(samsung,exynos4210-tmu, EXYNOS4_PA_TMU,
exynos-tmu, NULL),
+ OF_DEV_AUXDATA(samsung,exynos4210-usbphy, EXYNOS4_PA_HSPHY,
+ s3c-usbphy, exynos4_usbphy_pdata),
You should consider reworking the usb phy driver to avoid the need to
specify platform data through of auxdata, because auxdata array in mach-
exynos4-dt is going to be removed after including common clock framework
support for Exynos4.
I am aware of this. We had some discussion earlier
https://patchwork.kernel.org/patch/1266221/
Please suggest a way for the same, that will be helpful.
Regards,
Best regards,
Tomasz Figa
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RE: [GIT PULL] Samsung fixes-3 for v3.7
Olof Johansson wrote: [...] Probably, missed? Yes, thanks for the reminder. By the way, I didn't know you supported rev0 silicon? Yeah, only for exynos4210. Note that there were discussions about that in mailing list and actually there are many exynos4210 rev0 board for test and development in Samsung mobile and SPRC. So I decided to support exynos4210 rev0 at that time. Pulled in now, I'll send a fresh pull request tomorrow. Thanks. Best regards, Kgene. -- Kukjin Kim kgene@samsung.com, Senior Engineer, SW Solution Development Team, Samsung Electronics Co., Ltd. -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v8 2/3] ARM: S3C64XX: Enabling samsung-usbphy driver
On Thu, Nov 22, 2012 at 1:54 AM, Tomasz Figa tomasz.f...@gmail.com wrote:
Hi Praveen,
On Wednesday 14 of November 2012 16:15:37 Praveen Paneri wrote:
Adding platform device for samsung-usbphy driver. Enabling it for
s3c64xx based machines using s3c-hsotg.
Signed-off-by: Praveen Paneri p.pan...@samsung.com
---
arch/arm/mach-s3c64xx/include/mach/map.h |2 +
arch/arm/mach-s3c64xx/mach-crag6410.c|7 ++
arch/arm/mach-s3c64xx/mach-smartq.c |8 +++
arch/arm/mach-s3c64xx/mach-smdk6410.c|7 ++
arch/arm/mach-s3c64xx/setup-usb-phy.c| 14 +
arch/arm/plat-samsung/devs.c | 28
++ arch/arm/plat-samsung/include/plat/devs.h
|1 +
arch/arm/plat-samsung/include/plat/usb-phy.h |1 +
8 files changed, 68 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-s3c64xx/include/mach/map.h
b/arch/arm/mach-s3c64xx/include/mach/map.h index 8e2097b..dc482bb
100644
--- a/arch/arm/mach-s3c64xx/include/mach/map.h
+++ b/arch/arm/mach-s3c64xx/include/mach/map.h
@@ -65,6 +65,7 @@
#define S3C64XX_PA_NAND (0x7020)
#define S3C64XX_PA_FB(0x7710)
+#define S3C64XX_PA_USB_HSPHY (0x7C10)
#define S3C64XX_PA_USB_HSOTG (0x7C00)
#define S3C64XX_PA_WATCHDOG (0x7E004000)
#define S3C64XX_PA_RTC (0x7E005000)
@@ -113,6 +114,7 @@
#define S3C_PA_FBS3C64XX_PA_FB
#define S3C_PA_USBHOST S3C64XX_PA_USBHOST
#define S3C_PA_USB_HSOTG S3C64XX_PA_USB_HSOTG
+#define S3C_PA_USB_PHY S3C64XX_PA_USB_HSPHY
#define S3C_PA_RTC S3C64XX_PA_RTC
#define S3C_PA_WDT S3C64XX_PA_WATCHDOG
#define S3C_PA_SPI0 S3C64XX_PA_SPI0
diff --git a/arch/arm/mach-s3c64xx/mach-crag6410.c
b/arch/arm/mach-s3c64xx/mach-crag6410.c index 48f4a2d..c602379 100644
--- a/arch/arm/mach-s3c64xx/mach-crag6410.c
+++ b/arch/arm/mach-s3c64xx/mach-crag6410.c
@@ -31,6 +31,7 @@
#include linux/spi/spi.h
#include linux/i2c/pca953x.h
+#include linux/platform_data/samsung-usbphy.h
#include video/platform_lcd.h
@@ -69,6 +70,7 @@
#include plat/adc.h
#include linux/platform_data/i2c-s3c2410.h
#include plat/pm.h
+#include plat/usb-phy.h
#include common.h
@@ -353,6 +355,7 @@ static struct platform_device wallvdd_device = {
};
static struct platform_device *crag6410_devices[] __initdata = {
+ samsung_device_usbphy,
s3c_device_hsmmc0,
s3c_device_hsmmc2,
s3c_device_i2c0,
@@ -804,6 +807,9 @@ static const struct gpio_led_platform_data
gpio_leds_pdata = { .num_leds = ARRAY_SIZE(gpio_leds),
};
+static struct samsung_usbphy_data crag6410_usbphy_pdata __initdata = {
+ .pmu_isolation = s5p_usb_phy_pmu_isolation,
+};
Why not define default platform data somewhere and always use it for
s3c64xx, without redefining the same structure in all boards?
static void __init crag6410_machine_init(void)
{
@@ -829,6 +835,7 @@ static void __init crag6410_machine_init(void)
s3c_i2c0_set_platdata(i2c0_pdata);
s3c_i2c1_set_platdata(i2c1_pdata);
s3c_fb_set_platdata(crag6410_lcd_pdata);
+ samsung_usbphy_set_pdata(crag6410_usbphy_pdata);
i2c_register_board_info(0, i2c_devs0, ARRAY_SIZE(i2c_devs0));
i2c_register_board_info(1, i2c_devs1, ARRAY_SIZE(i2c_devs1));
diff --git a/arch/arm/mach-s3c64xx/mach-smartq.c
b/arch/arm/mach-s3c64xx/mach-smartq.c index 59bb34c..f18a0ab 100644
--- a/arch/arm/mach-s3c64xx/mach-smartq.c
+++ b/arch/arm/mach-s3c64xx/mach-smartq.c
@@ -18,6 +18,7 @@
#include linux/serial_core.h
#include linux/spi/spi_gpio.h
#include linux/usb/gpio_vbus.h
+#include linux/platform_data/samsung-usbphy.h
#include asm/mach-types.h
#include asm/mach/map.h
@@ -36,6 +37,7 @@
#include linux/platform_data/usb-ohci-s3c2410.h
#include plat/sdhci.h
#include linux/platform_data/touchscreen-s3c2410.h
+#include plat/usb-phy.h
#include video/platform_lcd.h
@@ -234,6 +236,7 @@ static struct i2c_board_info smartq_i2c_devs[]
__initdata = { };
static struct platform_device *smartq_devices[] __initdata = {
+ samsung_device_usbphy,
s3c_device_hsmmc1, /* Init iNAND first, ... */
s3c_device_hsmmc0, /* ... then the external SD card */
s3c_device_hsmmc2,
@@ -380,9 +383,14 @@ void __init smartq_map_io(void)
smartq_lcd_mode_set();
}
+static struct samsung_usbphy_data smartq_usbphy_pdata __initdata = {
+ .pmu_isolation = s5p_usb_phy_pmu_isolation,
+};
+
void __init smartq_machine_init(void)
{
s3c_i2c0_set_platdata(NULL);
+ samsung_usbphy_set_pdata(smartq_usbphy_pdata);
s3c_hwmon_set_platdata(smartq_hwmon_pdata);
s3c_sdhci1_set_platdata(smartq_internal_hsmmc_pdata);
s3c_sdhci2_set_platdata(smartq_internal_hsmmc_pdata);
diff --git a/arch/arm/mach-s3c64xx/mach-smdk6410.c
b/arch/arm/mach-s3c64xx/mach-smdk6410.c index
[PATCH 0/7] i2c: s3c2410: Add devm_* apis and cleanup
This patchset cleans up the probe function of i2c-s3c2410 driver. These have been tested on Exynos4210 based Origen board. Tushar Behera (7): i2c: s3c2410: Remove unnecessary label err_noclk i2c: s3c2410: Convert to use devm_clk_get() i2c: s3c2410: Convert to use devm_request_mem_region() i2c: s3c2410: Convert to use devm_ioremap() i2c: s3c2410: Convert to use devm_request_irq() i2c: s3c2410: Move location of clk_prepare_enable() call in probe function i2c: s3c2410: Remove err_cpufreq label drivers/i2c/busses/i2c-s3c2410.c | 74 -- 1 files changed, 23 insertions(+), 51 deletions(-) -- 1.7.4.1 -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 1/7] i2c: s3c2410: Remove unnecessary label err_noclk
err_noclk label redirects to a simple return statement. Move the
return statement to the caller location and remove the label.
Signed-off-by: Tushar Behera tushar.beh...@linaro.org
---
drivers/i2c/busses/i2c-s3c2410.c |9 +++--
1 files changed, 3 insertions(+), 6 deletions(-)
diff --git a/drivers/i2c/busses/i2c-s3c2410.c b/drivers/i2c/busses/i2c-s3c2410.c
index 3e0335f..7522f40 100644
--- a/drivers/i2c/busses/i2c-s3c2410.c
+++ b/drivers/i2c/busses/i2c-s3c2410.c
@@ -945,8 +945,8 @@ static int s3c24xx_i2c_probe(struct platform_device *pdev)
i2c-pdata = devm_kzalloc(pdev-dev, sizeof(*pdata), GFP_KERNEL);
if (!i2c-pdata) {
- ret = -ENOMEM;
- goto err_noclk;
+ dev_err(pdev-dev, no memory for platform data\n);
+ return -ENOMEM;
}
i2c-quirks = s3c24xx_get_device_quirks(pdev);
@@ -971,8 +971,7 @@ static int s3c24xx_i2c_probe(struct platform_device *pdev)
i2c-clk = clk_get(pdev-dev, i2c);
if (IS_ERR(i2c-clk)) {
dev_err(pdev-dev, cannot get clock\n);
- ret = -ENOENT;
- goto err_noclk;
+ return -ENOENT;
}
dev_dbg(pdev-dev, clock source %p\n, i2c-clk);
@@ -1084,8 +1083,6 @@ static int s3c24xx_i2c_probe(struct platform_device *pdev)
err_clk:
clk_disable_unprepare(i2c-clk);
clk_put(i2c-clk);
-
- err_noclk:
return ret;
}
--
1.7.4.1
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[PATCH 2/7] i2c: s3c2410: Convert to use devm_clk_get()
Signed-off-by: Tushar Behera tushar.beh...@linaro.org
---
drivers/i2c/busses/i2c-s3c2410.c |4 +---
1 files changed, 1 insertions(+), 3 deletions(-)
diff --git a/drivers/i2c/busses/i2c-s3c2410.c b/drivers/i2c/busses/i2c-s3c2410.c
index 7522f40..019c3d7 100644
--- a/drivers/i2c/busses/i2c-s3c2410.c
+++ b/drivers/i2c/busses/i2c-s3c2410.c
@@ -968,7 +968,7 @@ static int s3c24xx_i2c_probe(struct platform_device *pdev)
/* find the clock and enable it */
i2c-dev = pdev-dev;
- i2c-clk = clk_get(pdev-dev, i2c);
+ i2c-clk = devm_clk_get(pdev-dev, i2c);
if (IS_ERR(i2c-clk)) {
dev_err(pdev-dev, cannot get clock\n);
return -ENOENT;
@@ -1082,7 +1082,6 @@ static int s3c24xx_i2c_probe(struct platform_device *pdev)
err_clk:
clk_disable_unprepare(i2c-clk);
- clk_put(i2c-clk);
return ret;
}
@@ -1104,7 +1103,6 @@ static int s3c24xx_i2c_remove(struct platform_device
*pdev)
free_irq(i2c-irq, i2c);
clk_disable_unprepare(i2c-clk);
- clk_put(i2c-clk);
iounmap(i2c-regs);
--
1.7.4.1
--
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[PATCH 3/7] i2c: s3c2410: Convert to use devm_request_mem_region()
Signed-off-by: Tushar Behera tushar.beh...@linaro.org
---
drivers/i2c/busses/i2c-s3c2410.c | 12 +++-
1 files changed, 3 insertions(+), 9 deletions(-)
diff --git a/drivers/i2c/busses/i2c-s3c2410.c b/drivers/i2c/busses/i2c-s3c2410.c
index 019c3d7..a274ef7 100644
--- a/drivers/i2c/busses/i2c-s3c2410.c
+++ b/drivers/i2c/busses/i2c-s3c2410.c
@@ -987,8 +987,8 @@ static int s3c24xx_i2c_probe(struct platform_device *pdev)
goto err_clk;
}
- i2c-ioarea = request_mem_region(res-start, resource_size(res),
-pdev-name);
+ i2c-ioarea = devm_request_mem_region(pdev-dev, res-start,
+ resource_size(res), pdev-name);
if (i2c-ioarea == NULL) {
dev_err(pdev-dev, cannot request IO\n);
@@ -1001,7 +1001,7 @@ static int s3c24xx_i2c_probe(struct platform_device *pdev)
if (i2c-regs == NULL) {
dev_err(pdev-dev, cannot map IO\n);
ret = -ENXIO;
- goto err_ioarea;
+ goto err_clk;
}
dev_dbg(pdev-dev, registers %p (%p, %p)\n,
@@ -1076,10 +1076,6 @@ static int s3c24xx_i2c_probe(struct platform_device
*pdev)
err_iomap:
iounmap(i2c-regs);
- err_ioarea:
- release_resource(i2c-ioarea);
- kfree(i2c-ioarea);
-
err_clk:
clk_disable_unprepare(i2c-clk);
return ret;
@@ -1106,9 +1102,7 @@ static int s3c24xx_i2c_remove(struct platform_device
*pdev)
iounmap(i2c-regs);
- release_resource(i2c-ioarea);
s3c24xx_i2c_dt_gpio_free(i2c);
- kfree(i2c-ioarea);
return 0;
}
--
1.7.4.1
--
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[PATCH 4/7] i2c: s3c2410: Convert to use devm_ioremap()
Signed-off-by: Tushar Behera tushar.beh...@linaro.org
---
drivers/i2c/busses/i2c-s3c2410.c | 13 -
1 files changed, 4 insertions(+), 9 deletions(-)
diff --git a/drivers/i2c/busses/i2c-s3c2410.c b/drivers/i2c/busses/i2c-s3c2410.c
index a274ef7..3446af2 100644
--- a/drivers/i2c/busses/i2c-s3c2410.c
+++ b/drivers/i2c/busses/i2c-s3c2410.c
@@ -996,7 +996,7 @@ static int s3c24xx_i2c_probe(struct platform_device *pdev)
goto err_clk;
}
- i2c-regs = ioremap(res-start, resource_size(res));
+ i2c-regs = devm_ioremap(pdev-dev, res-start, resource_size(res));
if (i2c-regs == NULL) {
dev_err(pdev-dev, cannot map IO\n);
@@ -1016,7 +1016,7 @@ static int s3c24xx_i2c_probe(struct platform_device *pdev)
ret = s3c24xx_i2c_init(i2c);
if (ret != 0)
- goto err_iomap;
+ goto err_clk;
/* find the IRQ for this unit (note, this relies on the init call to
* ensure no current IRQs pending
@@ -1025,7 +1025,7 @@ static int s3c24xx_i2c_probe(struct platform_device *pdev)
i2c-irq = ret = platform_get_irq(pdev, 0);
if (ret = 0) {
dev_err(pdev-dev, cannot find IRQ\n);
- goto err_iomap;
+ goto err_clk;
}
ret = request_irq(i2c-irq, s3c24xx_i2c_irq, 0,
@@ -1033,7 +1033,7 @@ static int s3c24xx_i2c_probe(struct platform_device *pdev)
if (ret != 0) {
dev_err(pdev-dev, cannot claim IRQ %d\n, i2c-irq);
- goto err_iomap;
+ goto err_clk;
}
ret = s3c24xx_i2c_register_cpufreq(i2c);
@@ -1073,9 +1073,6 @@ static int s3c24xx_i2c_probe(struct platform_device *pdev)
err_irq:
free_irq(i2c-irq, i2c);
- err_iomap:
- iounmap(i2c-regs);
-
err_clk:
clk_disable_unprepare(i2c-clk);
return ret;
@@ -1100,8 +1097,6 @@ static int s3c24xx_i2c_remove(struct platform_device
*pdev)
clk_disable_unprepare(i2c-clk);
- iounmap(i2c-regs);
-
s3c24xx_i2c_dt_gpio_free(i2c);
return 0;
--
1.7.4.1
--
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[PATCH 5/7] i2c: s3c2410: Convert to use devm_request_irq()
Signed-off-by: Tushar Behera tushar.beh...@linaro.org
---
drivers/i2c/busses/i2c-s3c2410.c | 10 +++---
1 files changed, 3 insertions(+), 7 deletions(-)
diff --git a/drivers/i2c/busses/i2c-s3c2410.c b/drivers/i2c/busses/i2c-s3c2410.c
index 3446af2..3e4143c 100644
--- a/drivers/i2c/busses/i2c-s3c2410.c
+++ b/drivers/i2c/busses/i2c-s3c2410.c
@@ -1028,8 +1028,8 @@ static int s3c24xx_i2c_probe(struct platform_device *pdev)
goto err_clk;
}
- ret = request_irq(i2c-irq, s3c24xx_i2c_irq, 0,
- dev_name(pdev-dev), i2c);
+ ret = devm_request_irq(pdev-dev, i2c-irq, s3c24xx_i2c_irq, 0,
+ dev_name(pdev-dev), i2c);
if (ret != 0) {
dev_err(pdev-dev, cannot claim IRQ %d\n, i2c-irq);
@@ -1039,7 +1039,7 @@ static int s3c24xx_i2c_probe(struct platform_device *pdev)
ret = s3c24xx_i2c_register_cpufreq(i2c);
if (ret 0) {
dev_err(pdev-dev, failed to register cpufreq notifier\n);
- goto err_irq;
+ goto err_clk;
}
/* Note, previous versions of the driver used i2c_add_adapter()
@@ -1070,9 +1070,6 @@ static int s3c24xx_i2c_probe(struct platform_device *pdev)
err_cpufreq:
s3c24xx_i2c_deregister_cpufreq(i2c);
- err_irq:
- free_irq(i2c-irq, i2c);
-
err_clk:
clk_disable_unprepare(i2c-clk);
return ret;
@@ -1093,7 +1090,6 @@ static int s3c24xx_i2c_remove(struct platform_device
*pdev)
s3c24xx_i2c_deregister_cpufreq(i2c);
i2c_del_adapter(i2c-adap);
- free_irq(i2c-irq, i2c);
clk_disable_unprepare(i2c-clk);
--
1.7.4.1
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[PATCH 6/7] i2c: s3c2410: Move location of clk_prepare_enable() call in probe function
In probe call, only s3c24xx_i2c_init() needs the I2C clock to be enabled.
Moving clk_prepare_enable() and clk_disable_unprepare() calls to around
this function simplifies the return path of probe call.
Signed-off-by: Tushar Behera tushar.beh...@linaro.org
---
drivers/i2c/busses/i2c-s3c2410.c | 29 -
1 files changed, 12 insertions(+), 17 deletions(-)
diff --git a/drivers/i2c/busses/i2c-s3c2410.c b/drivers/i2c/busses/i2c-s3c2410.c
index 3e4143c..707efaf 100644
--- a/drivers/i2c/busses/i2c-s3c2410.c
+++ b/drivers/i2c/busses/i2c-s3c2410.c
@@ -976,15 +976,13 @@ static int s3c24xx_i2c_probe(struct platform_device *pdev)
dev_dbg(pdev-dev, clock source %p\n, i2c-clk);
- clk_prepare_enable(i2c-clk);
/* map the registers */
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
if (res == NULL) {
dev_err(pdev-dev, cannot find IO resource\n);
- ret = -ENOENT;
- goto err_clk;
+ return -ENOENT;
}
i2c-ioarea = devm_request_mem_region(pdev-dev, res-start,
@@ -992,16 +990,14 @@ static int s3c24xx_i2c_probe(struct platform_device *pdev)
if (i2c-ioarea == NULL) {
dev_err(pdev-dev, cannot request IO\n);
- ret = -ENXIO;
- goto err_clk;
+ return -ENXIO;
}
i2c-regs = devm_ioremap(pdev-dev, res-start, resource_size(res));
if (i2c-regs == NULL) {
dev_err(pdev-dev, cannot map IO\n);
- ret = -ENXIO;
- goto err_clk;
+ return -ENXIO;
}
dev_dbg(pdev-dev, registers %p (%p, %p)\n,
@@ -1014,10 +1010,13 @@ static int s3c24xx_i2c_probe(struct platform_device
*pdev)
/* initialise the i2c controller */
+ clk_prepare_enable(i2c-clk);
ret = s3c24xx_i2c_init(i2c);
- if (ret != 0)
- goto err_clk;
-
+ clk_disable_unprepare(i2c-clk);
+ if (ret != 0) {
+ dev_err(pdev-dev, I2C controller init failed\n);
+ return ret;
+ }
/* find the IRQ for this unit (note, this relies on the init call to
* ensure no current IRQs pending
*/
@@ -1025,7 +1024,7 @@ static int s3c24xx_i2c_probe(struct platform_device *pdev)
i2c-irq = ret = platform_get_irq(pdev, 0);
if (ret = 0) {
dev_err(pdev-dev, cannot find IRQ\n);
- goto err_clk;
+ return ret;
}
ret = devm_request_irq(pdev-dev, i2c-irq, s3c24xx_i2c_irq, 0,
@@ -1033,13 +1032,13 @@ static int s3c24xx_i2c_probe(struct platform_device
*pdev)
if (ret != 0) {
dev_err(pdev-dev, cannot claim IRQ %d\n, i2c-irq);
- goto err_clk;
+ return ret;
}
ret = s3c24xx_i2c_register_cpufreq(i2c);
if (ret 0) {
dev_err(pdev-dev, failed to register cpufreq notifier\n);
- goto err_clk;
+ return ret;
}
/* Note, previous versions of the driver used i2c_add_adapter()
@@ -1064,14 +1063,10 @@ static int s3c24xx_i2c_probe(struct platform_device
*pdev)
pm_runtime_enable(i2c-adap.dev);
dev_info(pdev-dev, %s: S3C I2C adapter\n, dev_name(i2c-adap.dev));
- clk_disable_unprepare(i2c-clk);
return 0;
err_cpufreq:
s3c24xx_i2c_deregister_cpufreq(i2c);
-
- err_clk:
- clk_disable_unprepare(i2c-clk);
return ret;
}
--
1.7.4.1
--
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[PATCH 7/7] i2c: s3c2410: Remove err_cpufreq label
err_cpufreq label is now used only once. It can be removed and related
code can be moved to the caller location.
Signed-off-by: Tushar Behera tushar.beh...@linaro.org
---
drivers/i2c/busses/i2c-s3c2410.c |7 ++-
1 files changed, 2 insertions(+), 5 deletions(-)
diff --git a/drivers/i2c/busses/i2c-s3c2410.c b/drivers/i2c/busses/i2c-s3c2410.c
index 707efaf..c934ec8 100644
--- a/drivers/i2c/busses/i2c-s3c2410.c
+++ b/drivers/i2c/busses/i2c-s3c2410.c
@@ -1053,7 +1053,8 @@ static int s3c24xx_i2c_probe(struct platform_device *pdev)
ret = i2c_add_numbered_adapter(i2c-adap);
if (ret 0) {
dev_err(pdev-dev, failed to add bus to i2c core\n);
- goto err_cpufreq;
+ s3c24xx_i2c_deregister_cpufreq(i2c);
+ return ret;
}
of_i2c_register_devices(i2c-adap);
@@ -1064,10 +1065,6 @@ static int s3c24xx_i2c_probe(struct platform_device
*pdev)
dev_info(pdev-dev, %s: S3C I2C adapter\n, dev_name(i2c-adap.dev));
return 0;
-
- err_cpufreq:
- s3c24xx_i2c_deregister_cpufreq(i2c);
- return ret;
}
/* s3c24xx_i2c_remove
--
1.7.4.1
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Re: [PATCH 4/7] i2c: s3c2410: Convert to use devm_ioremap()
Hi Tushar,
On 23 November 2012 11:29, Tushar Behera tushar.beh...@linaro.org wrote:
Signed-off-by: Tushar Behera tushar.beh...@linaro.org
---
drivers/i2c/busses/i2c-s3c2410.c | 13 -
1 files changed, 4 insertions(+), 9 deletions(-)
diff --git a/drivers/i2c/busses/i2c-s3c2410.c
b/drivers/i2c/busses/i2c-s3c2410.c
index a274ef7..3446af2 100644
--- a/drivers/i2c/busses/i2c-s3c2410.c
+++ b/drivers/i2c/busses/i2c-s3c2410.c
@@ -996,7 +996,7 @@ static int s3c24xx_i2c_probe(struct platform_device *pdev)
goto err_clk;
}
- i2c-regs = ioremap(res-start, resource_size(res));
+ i2c-regs = devm_ioremap(pdev-dev, res-start, resource_size(res));
request_mem_region and ioremap and be replaced using a single
devm_request_and_ioremap() call.
Also you may squash patches 2-5 into single convert to devm_* functions patch.
if (i2c-regs == NULL) {
dev_err(pdev-dev, cannot map IO\n);
@@ -1016,7 +1016,7 @@ static int s3c24xx_i2c_probe(struct platform_device
*pdev)
ret = s3c24xx_i2c_init(i2c);
if (ret != 0)
- goto err_iomap;
+ goto err_clk;
/* find the IRQ for this unit (note, this relies on the init call to
* ensure no current IRQs pending
@@ -1025,7 +1025,7 @@ static int s3c24xx_i2c_probe(struct platform_device
*pdev)
i2c-irq = ret = platform_get_irq(pdev, 0);
if (ret = 0) {
dev_err(pdev-dev, cannot find IRQ\n);
- goto err_iomap;
+ goto err_clk;
}
ret = request_irq(i2c-irq, s3c24xx_i2c_irq, 0,
@@ -1033,7 +1033,7 @@ static int s3c24xx_i2c_probe(struct platform_device
*pdev)
if (ret != 0) {
dev_err(pdev-dev, cannot claim IRQ %d\n, i2c-irq);
- goto err_iomap;
+ goto err_clk;
}
ret = s3c24xx_i2c_register_cpufreq(i2c);
@@ -1073,9 +1073,6 @@ static int s3c24xx_i2c_probe(struct platform_device
*pdev)
err_irq:
free_irq(i2c-irq, i2c);
- err_iomap:
- iounmap(i2c-regs);
-
err_clk:
clk_disable_unprepare(i2c-clk);
return ret;
@@ -1100,8 +1097,6 @@ static int s3c24xx_i2c_remove(struct platform_device
*pdev)
clk_disable_unprepare(i2c-clk);
- iounmap(i2c-regs);
-
s3c24xx_i2c_dt_gpio_free(i2c);
return 0;
--
1.7.4.1
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Re: [PATCH 0/7] i2c: s3c2410: Add devm_* apis and cleanup
On Fri, Nov 23, 2012 at 11:29 AM, Tushar Behera tushar.beh...@linaro.org wrote: This patchset cleans up the probe function of i2c-s3c2410 driver. These have been tested on Exynos4210 based Origen board. Tushar Behera (7): i2c: s3c2410: Remove unnecessary label err_noclk i2c: s3c2410: Convert to use devm_clk_get() i2c: s3c2410: Convert to use devm_request_mem_region() i2c: s3c2410: Convert to use devm_ioremap() i2c: s3c2410: Convert to use devm_request_irq() You may want to consider request_and_ioremap. i2c: s3c2410: Move location of clk_prepare_enable() call in probe function i2c: s3c2410: Remove err_cpufreq label drivers/i2c/busses/i2c-s3c2410.c | 74 -- 1 files changed, 23 insertions(+), 51 deletions(-) -- 1.7.4.1 -- To unsubscribe from this list: send the line unsubscribe linux-i2c in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 1/4] thermal: Add new thermal trend type to support quick cooling
On Fri, 2012-11-23 at 09:35 +0530, Amit Kachhap wrote:
On 22 November 2012 13:42, Zhang Rui rui.zh...@intel.com wrote:
On Thu, 2012-11-22 at 10:11 +0530, Amit Kachhap wrote:
On 22 November 2012 06:52, Zhang Rui rui.zh...@intel.com wrote:
On Thu, 2012-11-08 at 09:56 +0530, Amit Daniel Kachhap wrote:
This modification adds 2 new thermal trend type THERMAL_TREND_RAISE_FULL
and THERMAL_TREND_DROP_FULL. This thermal trend can be used to quickly
jump to the upper or lower cooling level instead of incremental increase
or decrease. This is needed for temperature sensors which support
rising/falling
threshold interrupts and polling can be totally avoided.
Signed-off-by: Amit Daniel Kachhap amit.dan...@samsung.com
Signed-off-by: Amit Daniel Kachhap amit.kach...@linaro.org
---
drivers/thermal/step_wise.c | 19 +++
include/linux/thermal.h |2 ++
2 files changed, 17 insertions(+), 4 deletions(-)
diff --git a/drivers/thermal/step_wise.c b/drivers/thermal/step_wise.c
index 1242cff..0d2d8d6 100644
--- a/drivers/thermal/step_wise.c
+++ b/drivers/thermal/step_wise.c
@@ -35,6 +35,10 @@
* state for this trip point
*b. if the trend is THERMAL_TREND_DROPPING, use lower cooling
* state for this trip point
+ *c. if the trend is THERMAL_TREND_RAISE_FULL, use highest cooling
+ * state for this trip point
+ *d. if the trend is THERMAL_TREND_DROP_FULL, use lowest cooling
+ * state for this trip point
*/
static unsigned long get_target_state(struct thermal_instance
*instance,
enum thermal_trend trend)
@@ -50,7 +54,10 @@ static unsigned long get_target_state(struct
thermal_instance *instance,
} else if (trend == THERMAL_TREND_DROPPING) {
cur_state = cur_state instance-lower ?
(cur_state - 1) : instance-lower;
- }
+ } else if (trend == THERMAL_TREND_RAISE_FULL)
+ cur_state = instance-upper;
+ else if (trend == THERMAL_TREND_DROP_FULL)
+ cur_state = instance-lower;
return cur_state;
}
@@ -87,7 +94,8 @@ static void update_instance_for_throttle(struct
thermal_zone_device *tz,
}
static void update_instance_for_dethrottle(struct thermal_zone_device
*tz,
- int trip, enum thermal_trip_type
trip_type)
+ int trip, enum thermal_trip_type
trip_type,
+ enum thermal_trend trend)
{
struct thermal_instance *instance;
struct thermal_cooling_device *cdev;
@@ -101,7 +109,10 @@ static void update_instance_for_dethrottle(struct
thermal_zone_device *tz,
cdev = instance-cdev;
cdev-ops-get_cur_state(cdev, cur_state);
- instance-target = cur_state instance-lower ?
+ if (trend == THERMAL_TREND_DROP_FULL)
+ instance-target = instance-lower;
+ else
+ instance-target = cur_state instance-lower ?
(cur_state - 1) : THERMAL_NO_TARGET;
what do you expect to happen if the trend is THERMAL_TREND_RAISE_FULL at
this time?
Hi Rui,
I suppose this is dethrotle routine and hence this will be called when
only drop in temperature happens. Also I did not used get_target_state
here because I thought it might cause regression in the other existing
thermal drivers(I am not sure) But I guess calling get_target_state is
the good way to know next target state and is fine if you agree.
Also one suggestion, 2 functions for throttle/dethrottle can be merged
as both look same and just get_target_state can be used in that
function
agree.
patches have been refreshed, please review.
Thanks Rui, Your patches looks nice. I will re-base my patches against
your implementation and submit them shortly.
great. please rebase your patch on top of thermal-thermal tree.
thanks,
rui
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Re: [PATCH 4/7] i2c: s3c2410: Convert to use devm_ioremap()
On 11/23/2012 11:44 AM, Sachin Kamat wrote:
Hi Tushar,
On 23 November 2012 11:29, Tushar Behera tushar.beh...@linaro.org wrote:
Signed-off-by: Tushar Behera tushar.beh...@linaro.org
---
drivers/i2c/busses/i2c-s3c2410.c | 13 -
1 files changed, 4 insertions(+), 9 deletions(-)
diff --git a/drivers/i2c/busses/i2c-s3c2410.c
b/drivers/i2c/busses/i2c-s3c2410.c
index a274ef7..3446af2 100644
--- a/drivers/i2c/busses/i2c-s3c2410.c
+++ b/drivers/i2c/busses/i2c-s3c2410.c
@@ -996,7 +996,7 @@ static int s3c24xx_i2c_probe(struct platform_device
*pdev)
goto err_clk;
}
- i2c-regs = ioremap(res-start, resource_size(res));
+ i2c-regs = devm_ioremap(pdev-dev, res-start, resource_size(res));
request_mem_region and ioremap and be replaced using a single
devm_request_and_ioremap() call.
Thanks. I will redo the patch.
Also you may squash patches 2-5 into single convert to devm_* functions patch.
Ok. In that case, I will squash these patches to a single patch.
if (i2c-regs == NULL) {
dev_err(pdev-dev, cannot map IO\n);
@@ -1016,7 +1016,7 @@ static int s3c24xx_i2c_probe(struct platform_device
*pdev)
ret = s3c24xx_i2c_init(i2c);
if (ret != 0)
- goto err_iomap;
+ goto err_clk;
/* find the IRQ for this unit (note, this relies on the init call to
* ensure no current IRQs pending
@@ -1025,7 +1025,7 @@ static int s3c24xx_i2c_probe(struct platform_device
*pdev)
i2c-irq = ret = platform_get_irq(pdev, 0);
if (ret = 0) {
dev_err(pdev-dev, cannot find IRQ\n);
- goto err_iomap;
+ goto err_clk;
}
ret = request_irq(i2c-irq, s3c24xx_i2c_irq, 0,
@@ -1033,7 +1033,7 @@ static int s3c24xx_i2c_probe(struct platform_device
*pdev)
if (ret != 0) {
dev_err(pdev-dev, cannot claim IRQ %d\n, i2c-irq);
- goto err_iomap;
+ goto err_clk;
}
ret = s3c24xx_i2c_register_cpufreq(i2c);
@@ -1073,9 +1073,6 @@ static int s3c24xx_i2c_probe(struct platform_device
*pdev)
err_irq:
free_irq(i2c-irq, i2c);
- err_iomap:
- iounmap(i2c-regs);
-
err_clk:
clk_disable_unprepare(i2c-clk);
return ret;
@@ -1100,8 +1097,6 @@ static int s3c24xx_i2c_remove(struct platform_device
*pdev)
clk_disable_unprepare(i2c-clk);
- iounmap(i2c-regs);
-
s3c24xx_i2c_dt_gpio_free(i2c);
return 0;
--
1.7.4.1
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Re: [PATCH 0/7] i2c: s3c2410: Add devm_* apis and cleanup
On 11/23/2012 11:45 AM, Shubhrajyoti Datta wrote: On Fri, Nov 23, 2012 at 11:29 AM, Tushar Behera tushar.beh...@linaro.org wrote: This patchset cleans up the probe function of i2c-s3c2410 driver. These have been tested on Exynos4210 based Origen board. Tushar Behera (7): i2c: s3c2410: Remove unnecessary label err_noclk i2c: s3c2410: Convert to use devm_clk_get() i2c: s3c2410: Convert to use devm_request_mem_region() i2c: s3c2410: Convert to use devm_ioremap() i2c: s3c2410: Convert to use devm_request_irq() You may want to consider request_and_ioremap. Thanks. I will redo the patchset and submit again. i2c: s3c2410: Move location of clk_prepare_enable() call in probe function i2c: s3c2410: Remove err_cpufreq label drivers/i2c/busses/i2c-s3c2410.c | 74 -- 1 files changed, 23 insertions(+), 51 deletions(-) -- 1.7.4.1 -- To unsubscribe from this list: send the line unsubscribe linux-i2c in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html -- Tushar Behera -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 0/3] regulator: max8997: minor updates and device tree support
This patch series includes two minor updates to the gpio dvs code in max8997 regulator driver and adds device tree support for the same driver. Thomas Abraham (3): regulator: max8997: reorder buck1/2/5 dvs setup code regulator: max8997: limit the number of dvs registers programmed in non-dvs mode regulator: add device tree support for max8997 .../bindings/regulator/max8997-regulator.txt | 146 drivers/mfd/max8997.c | 73 - drivers/regulator/max8997.c| 181 ++-- include/linux/mfd/max8997-private.h|1 + include/linux/mfd/max8997.h|1 + 5 files changed, 384 insertions(+), 18 deletions(-) create mode 100644 Documentation/devicetree/bindings/regulator/max8997-regulator.txt -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 1/3] regulator: max8997: reorder buck1/2/5 dvs setup code
The BUCKxDVSx register programming is now moved prior to setting up of the
gpio based dvs mode. This will ensure that all the BUCKxDVSx registers
are programmed with appropriate voltage values before the gpio based dvs
mode is selected for buck1/2/5.
Cc: MyungJoo Ham myungjoo@samsung.com
Signed-off-by: Thomas Abraham thomas.abra...@linaro.org
---
drivers/regulator/max8997.c | 26 +-
1 files changed, 13 insertions(+), 13 deletions(-)
diff --git a/drivers/regulator/max8997.c b/drivers/regulator/max8997.c
index cea9ec9..8901371 100644
--- a/drivers/regulator/max8997.c
+++ b/drivers/regulator/max8997.c
@@ -1019,6 +1019,19 @@ static int max8997_pmic_probe(struct platform_device
*pdev)
max_buck5, 0x3f);
}
+ /* Initialize all the DVS related BUCK registers */
+ for (i = 0; i 8; i++) {
+ max8997_update_reg(i2c, MAX8997_REG_BUCK1DVS1 + i,
+ max8997-buck1_vol[i],
+ 0x3f);
+ max8997_update_reg(i2c, MAX8997_REG_BUCK2DVS1 + i,
+ max8997-buck2_vol[i],
+ 0x3f);
+ max8997_update_reg(i2c, MAX8997_REG_BUCK5DVS1 + i,
+ max8997-buck5_vol[i],
+ 0x3f);
+ }
+
/*
* If buck 1, 2, and 5 do not care DVS GPIO settings, ignore them.
* If at least one of them cares, set gpios.
@@ -1068,19 +1081,6 @@ static int max8997_pmic_probe(struct platform_device
*pdev)
max8997_update_reg(i2c, MAX8997_REG_BUCK5CTRL, (pdata-buck5_gpiodvs) ?
(1 1) : (0 1), 1 1);
- /* Initialize all the DVS related BUCK registers */
- for (i = 0; i 8; i++) {
- max8997_update_reg(i2c, MAX8997_REG_BUCK1DVS1 + i,
- max8997-buck1_vol[i],
- 0x3f);
- max8997_update_reg(i2c, MAX8997_REG_BUCK2DVS1 + i,
- max8997-buck2_vol[i],
- 0x3f);
- max8997_update_reg(i2c, MAX8997_REG_BUCK5DVS1 + i,
- max8997-buck5_vol[i],
- 0x3f);
- }
-
/* Misc Settings */
max8997-ramp_delay = 10; /* set 10mV/us, which is the default */
max8997_write_reg(i2c, MAX8997_REG_BUCKRAMP, (0xf 4) | 0x9);
--
1.6.6.rc2
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[PATCH 2/3] regulator: max8997: limit the number of dvs registers programmed in non-dvs mode
In case the gpio based volatage selection mode is not used for either of
buck 1/2/5, then only the BUCKxDVS1 register need to be programmed. So
determine whether dvs mode is used and limit the loop count appropriately.
Cc: MyungJoo Ham myungjoo@samsung.com
Signed-off-by: Thomas Abraham thomas.abra...@linaro.org
---
drivers/regulator/max8997.c |9 ++---
1 files changed, 6 insertions(+), 3 deletions(-)
diff --git a/drivers/regulator/max8997.c b/drivers/regulator/max8997.c
index 8901371..231fcdb 100644
--- a/drivers/regulator/max8997.c
+++ b/drivers/regulator/max8997.c
@@ -941,7 +941,7 @@ static int max8997_pmic_probe(struct platform_device *pdev)
struct regulator_dev **rdev;
struct max8997_data *max8997;
struct i2c_client *i2c;
- int i, ret, size;
+ int i, ret, size, nr_dvs;
u8 max_buck1 = 0, max_buck2 = 0, max_buck5 = 0;
if (!pdata) {
@@ -973,7 +973,10 @@ static int max8997_pmic_probe(struct platform_device *pdev)
memcpy(max8997-buck125_gpios, pdata-buck125_gpios, sizeof(int) * 3);
max8997-ignore_gpiodvs_side_effect = pdata-ignore_gpiodvs_side_effect;
- for (i = 0; i 8; i++) {
+ nr_dvs = (pdata-buck1_gpiodvs || pdata-buck2_gpiodvs ||
+ pdata-buck5_gpiodvs) ? 8 : 1;
+
+ for (i = 0; i nr_dvs; i++) {
max8997-buck1_vol[i] = ret =
max8997_get_voltage_proper_val(
buck1245_voltage_map_desc,
@@ -1020,7 +1023,7 @@ static int max8997_pmic_probe(struct platform_device
*pdev)
}
/* Initialize all the DVS related BUCK registers */
- for (i = 0; i 8; i++) {
+ for (i = 0; i nr_dvs; i++) {
max8997_update_reg(i2c, MAX8997_REG_BUCK1DVS1 + i,
max8997-buck1_vol[i],
0x3f);
--
1.6.6.rc2
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[PATCH 3/3] regulator: add device tree support for max8997
Add device tree based discovery support for max8997.
Cc: Karol Lewandowski k.lewando...@samsung.com
Cc: Rajendra Nayak rna...@ti.com
Cc: Rob Herring rob.herr...@calxeda.com
Cc: Grant Likely grant.lik...@secretlab.ca
Signed-off-by: Thomas Abraham thomas.abra...@linaro.org
Acked-by: MyungJoo Ham myungjoo@samsung.com
---
This is the sixth version of this patch. The link to v5 version of this patch
is http://www.mail-archive.com/linux-samsung-soc@vger.kernel.org/msg10368.html.
The v5 of this patch was merged by Mark Brown and later reverted from his tree
(http://lkml.indiana.edu/hypermail/linux/kernel/1204.2/00963.html) since there
was conflict in the first patch of the series which was then later corrected
by Chanwoo Choi cw00.c...@samsung.com (https://lkml.org/lkml/2012/7/5/256).
This v6 patch is rebased to the latest max8997 driver code and there are no
functional changes from v5.
.../bindings/regulator/max8997-regulator.txt | 146 +++
drivers/mfd/max8997.c | 73 ++-
drivers/regulator/max8997.c| 148 +++-
include/linux/mfd/max8997-private.h|1 +
include/linux/mfd/max8997.h|1 +
5 files changed, 366 insertions(+), 3 deletions(-)
create mode 100644
Documentation/devicetree/bindings/regulator/max8997-regulator.txt
diff --git a/Documentation/devicetree/bindings/regulator/max8997-regulator.txt
b/Documentation/devicetree/bindings/regulator/max8997-regulator.txt
new file mode 100644
index 000..d3fbc36
--- /dev/null
+++ b/Documentation/devicetree/bindings/regulator/max8997-regulator.txt
@@ -0,0 +1,146 @@
+* Maxim MAX8997 Voltage and Current Regulator
+
+The Maxim MAX8997 is a multi-function device which includes volatage and
+current regulators, rtc, charger controller and other sub-blocks. It is
+interfaced to the host controller using a i2c interface. Each sub-block is
+addressed by the host system using different i2c slave address. This document
+describes the bindings for 'pmic' sub-block of max8997.
+
+Required properties:
+- compatible: Should be maxim,max8997-pmic.
+- reg: Specifies the i2c slave address of the pmic block. It should be 0x66.
+
+- max8997,pmic-buck1-dvs-voltage: A set of 8 voltage values in micro-volt (uV)
+ units for buck1 when changing voltage using gpio dvs. Refer to [1] below
+ for additional information.
+
+- max8997,pmic-buck2-dvs-voltage: A set of 8 voltage values in micro-volt (uV)
+ units for buck2 when changing voltage using gpio dvs. Refer to [1] below
+ for additional information.
+
+- max8997,pmic-buck5-dvs-voltage: A set of 8 voltage values in micro-volt (uV)
+ units for buck5 when changing voltage using gpio dvs. Refer to [1] below
+ for additional information.
+
+[1] If none of the 'max8997,pmic-buck[1/2/5]-uses-gpio-dvs' optional
+property is specified, the 'max8997,pmic-buck[1/2/5]-dvs-voltage'
+property should specify atleast one voltage level (which would be a
+safe operating voltage).
+
+If either of the 'max8997,pmic-buck[1/2/5]-uses-gpio-dvs' optional
+property is specified, then all the eigth voltage values for the
+'max8997,pmic-buck[1/2/5]-dvs-voltage' should be specified.
+
+Optional properties:
+- interrupt-parent: Specifies the phandle of the interrupt controller to which
+ the interrupts from max8997 are delivered to.
+- interrupts: Interrupt specifiers for two interrupt sources.
+ - First interrupt specifier is for 'irq1' interrupt.
+ - Second interrupt specifier is for 'alert' interrupt.
+- max8997,pmic-buck1-uses-gpio-dvs: 'buck1' can be controlled by gpio dvs.
+- max8997,pmic-buck2-uses-gpio-dvs: 'buck2' can be controlled by gpio dvs.
+- max8997,pmic-buck5-uses-gpio-dvs: 'buck5' can be controlled by gpio dvs.
+
+Additional properties required if either of the optional properties are used:
+- max8997,pmic-ignore-gpiodvs-side-effect: When GPIO-DVS mode is used for
+ multiple bucks, changing the voltage value of one of the bucks may affect
+ that of another buck, which is the side effect of the change (set_voltage).
+ Use this property to ignore such side effects and change the voltage.
+
+- max8997,pmic-buck125-default-dvs-idx: Default voltage setting selected from
+ the possible 8 options selectable by the dvs gpios. The value of this
+ property should be between 0 and 7. If not specified or if out of range, the
+ default value of this property is set to 0.
+
+- max8997,pmic-buck125-dvs-gpios: GPIO specifiers for three host gpio's used
+ for dvs. The format of the gpio specifier depends in the gpio controller.
+
+Regulators: The regulators of max8997 that have to be instantiated should be
+included in a sub-node named 'regulators'. Regulator nodes included in this
+sub-node should be of the format as listed below.
+
+ regulator_name {
+ standard regulator bindings here
+ };
+
+The following are the names of the regulators that the
