Re: [PATCH 2/2] dt-bindings: clock: Move exynos-audss-clk.h to dt-bindings/clock

2014-03-05 Thread Sachin Kamat
On 6 March 2014 11:34, Tushar Behera  wrote:
> Most of the clock related dt-binding header files are located in
> dt-bindings/clock folder. It would be good to keep all the similar
> header files at a single location.
>
> Signed-off-by: Tushar Behera 
> CC: Kukjin Kim 
> CC: Tomasz Figa 
> ---

Sensible move.
Reviewed-by: Sachin Kamat 

Now that the dt-bindings/clk folder is empty (with these 2 patches
applied), it can be deleted as well.

-- 
With warm regards,
Sachin
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[RFC 2/4] drm: add ioctl to write into binary blob KMS properties

2014-03-05 Thread Rahul Sharma
Add a new ioctl to common drm framework which can be used to
set variable length binary data from the user space. 'Blob'
is the only KMS property which can hold more than 64 bits. So
far, it has been implemented as read only property for user
application (only used for EDID data).

Signed-off-by: Rahul Sharma 
---
 drivers/gpu/drm/drm_crtc.c  |   73 ++-
 drivers/gpu/drm/drm_drv.c   |1 +
 include/drm/drm_crtc.h  |2 ++
 include/uapi/drm/drm.h  |1 +
 include/uapi/drm/drm_mode.h |8 +
 5 files changed, 84 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/drm_crtc.c b/drivers/gpu/drm/drm_crtc.c
index 9a2215c..a2b87a5 100644
--- a/drivers/gpu/drm/drm_crtc.c
+++ b/drivers/gpu/drm/drm_crtc.c
@@ -3300,7 +3300,6 @@ static bool drm_property_change_is_valid(struct 
drm_property *property,
valid_mask |= (1ULL << property->values[i]);
return !(value & ~valid_mask);
} else if (property->flags & DRM_MODE_PROP_BLOB) {
-   /* Only the driver knows */
return true;
} else {
int i;
@@ -3492,6 +3491,78 @@ out:
return ret;
 }
 
+int drm_mode_setblob_ioctl(struct drm_device *dev, void *data,
+ struct drm_file *file_priv)
+{
+   struct drm_mode_object *arg_obj;
+   struct drm_mode_object *blob_obj;
+   struct drm_mode_object *prop_obj;
+   struct drm_property *property;
+   struct drm_mode_set_blob *arg = data;
+   struct drm_property_blob *blob;
+   int ret = -EINVAL, i;
+   void __user *blob_ptr;
+
+   if (!drm_core_check_feature(dev, DRIVER_MODESET))
+   return -EINVAL;
+
+   drm_modeset_lock_all(dev);
+
+   blob_obj = drm_mode_object_find(dev, arg->blob_id, 
DRM_MODE_OBJECT_BLOB);
+   if (!blob_obj)
+   goto done;
+
+   blob = obj_to_blob(blob_obj);
+
+   arg_obj = drm_mode_object_find(dev, arg->obj_id, arg->obj_type);
+   if (!arg_obj)
+   goto done;
+
+   if (!arg_obj->properties)
+   goto done;
+
+   for (i = 0; i < arg_obj->properties->count; i++)
+   if (arg_obj->properties->values[i] == arg->blob_id)
+   break;
+
+   if (i == arg_obj->properties->count)
+   goto done;
+
+   prop_obj = drm_mode_object_find(dev, arg_obj->properties->ids[i],
+   DRM_MODE_OBJECT_PROPERTY);
+   if (!prop_obj)
+   goto done;
+   property = obj_to_property(prop_obj);
+
+   if (!drm_property_change_is_valid(property, arg->blob_id))
+   goto done;
+
+   if (arg->length == blob->length) {
+   blob_ptr = (void __user *)(unsigned long)arg->data;
+   if (copy_from_user(blob->data, blob_ptr, blob->length)) {
+   ret = -EFAULT;
+   goto done;
+   }
+   }
+
+   switch (arg_obj->type) {
+   case DRM_MODE_OBJECT_CONNECTOR:
+   ret = drm_mode_connector_set_obj_prop(arg_obj, property,
+ arg->blob_id);
+   break;
+   case DRM_MODE_OBJECT_CRTC:
+   ret = drm_mode_crtc_set_obj_prop(arg_obj, property, 
arg->blob_id);
+   break;
+   case DRM_MODE_OBJECT_PLANE:
+   ret = drm_mode_plane_set_obj_prop(arg_obj, property, 
arg->blob_id);
+   break;
+   }
+
+done:
+   drm_modeset_unlock_all(dev);
+   return ret;
+}
+
 int drm_mode_connector_attach_encoder(struct drm_connector *connector,
  struct drm_encoder *encoder)
 {
diff --git a/drivers/gpu/drm/drm_drv.c b/drivers/gpu/drm/drm_drv.c
index 345be03..7cdb501 100644
--- a/drivers/gpu/drm/drm_drv.c
+++ b/drivers/gpu/drm/drm_drv.c
@@ -167,6 +167,7 @@ static const struct drm_ioctl_desc drm_ioctls[] = {
DRM_IOCTL_DEF(DRM_IOCTL_MODE_OBJ_GETPROPERTIES, 
drm_mode_obj_get_properties_ioctl, DRM_CONTROL_ALLOW|DRM_UNLOCKED),
DRM_IOCTL_DEF(DRM_IOCTL_MODE_OBJ_SETPROPERTY, 
drm_mode_obj_set_property_ioctl, DRM_MASTER|DRM_CONTROL_ALLOW|DRM_UNLOCKED),
DRM_IOCTL_DEF(DRM_IOCTL_MODE_CURSOR2, drm_mode_cursor2_ioctl, 
DRM_MASTER|DRM_CONTROL_ALLOW|DRM_UNLOCKED),
+   DRM_IOCTL_DEF(DRM_IOCTL_MODE_SETPROPBLOB, drm_mode_setblob_ioctl, 
DRM_MASTER|DRM_CONTROL_ALLOW|DRM_UNLOCKED),
 };
 
 #define DRM_CORE_IOCTL_COUNT   ARRAY_SIZE( drm_ioctls )
diff --git a/include/drm/drm_crtc.h b/include/drm/drm_crtc.h
index f764654..82f2016 100644
--- a/include/drm/drm_crtc.h
+++ b/include/drm/drm_crtc.h
@@ -1124,6 +1124,8 @@ extern int drm_mode_getproperty_ioctl(struct drm_device 
*dev,
  void *data, struct drm_file *file_priv);
 extern int drm_mode_getblob_ioctl(struct drm_device *dev,
  void *data, struct drm_file *file_priv);
+extern int drm_mode_setblob

[RFC 3/4] drm: add generic blob properties for image enhancement

2014-03-05 Thread Rahul Sharma
Add generic KMS blob properties to core drm framework. These
are writable blob properties which can be used to set Image
Enhancement parameters. The properties which are added here
are meant for color reproduction, color saturation and edge
enhancement.

Signed-off-by: Rahul Sharma 
---
 drivers/gpu/drm/drm_crtc.c  |  115 +++
 include/drm/drm_crtc.h  |   13 +
 include/uapi/drm/drm_mode.h |   41 +++
 3 files changed, 169 insertions(+)

diff --git a/drivers/gpu/drm/drm_crtc.c b/drivers/gpu/drm/drm_crtc.c
index a2b87a5..8771abf 100644
--- a/drivers/gpu/drm/drm_crtc.c
+++ b/drivers/gpu/drm/drm_crtc.c
@@ -1260,6 +1260,121 @@ int drm_mode_create_dirty_info_property(struct 
drm_device *dev)
 }
 EXPORT_SYMBOL(drm_mode_create_dirty_info_property);
 
+/**
+ * drm_mode_create_color_saturation_property - create property for color 
saturation
+ * @dev: DRM device
+ *
+ */
+int drm_mode_create_color_saturation_property(
+   struct drm_device *dev)
+{
+   struct drm_mode_color_saturation *params;
+   struct drm_property *prop;
+   char prop_name[] = "color saturation";
+
+   if (dev->mode_config.color_saturation_property ||
+   dev->mode_config.color_saturation_blob_ptr)
+   return -EEXIST;
+
+   prop = drm_property_create(dev, DRM_MODE_PROP_BLOB,
+   prop_name, 0);
+   if (!prop) {
+   DRM_ERROR("fail to create %s property.\n", prop_name);
+   return -ENOMEM;
+   }
+
+   dev->mode_config.color_saturation_blob_ptr =
+   drm_property_create_blob(dev, sizeof(*params),
+   NULL);
+   if (!dev->mode_config.color_saturation_blob_ptr) {
+   DRM_ERROR("failed to allocate blob for %s.\n", prop_name);
+   drm_property_destroy(dev, prop);
+   return -ENOMEM;
+   }
+
+   dev->mode_config.color_saturation_property = prop;
+
+   return 0;
+}
+EXPORT_SYMBOL(drm_mode_create_color_saturation_property);
+
+/**
+ * drm_mode_create_color_reproduction_property - create property for color 
reproduction
+ * @dev: DRM device
+ *
+ */
+int drm_mode_create_color_reproduction_property(
+   struct drm_device *dev)
+{
+   struct drm_mode_color_reproduction *params;
+   struct drm_property *prop;
+   char prop_name[] = "color reproduction";
+
+   if (dev->mode_config.color_reproduction_property ||
+   dev->mode_config.color_reproduction_blob_ptr)
+   return -EEXIST;
+
+   prop = drm_property_create(dev, DRM_MODE_PROP_BLOB,
+   prop_name, 0);
+   if (!prop) {
+   DRM_ERROR("fail to create %s property.\n", prop_name);
+   return -ENOMEM;
+   }
+
+   dev->mode_config.color_reproduction_blob_ptr =
+   drm_property_create_blob(dev, sizeof(*params),
+   NULL);
+   if (!dev->mode_config.color_reproduction_blob_ptr) {
+   DRM_ERROR("failed to allocate blob for %s\n", prop_name);
+   drm_property_destroy(dev, prop);
+   return -ENOMEM;
+   }
+
+   dev->mode_config.color_reproduction_property = prop;
+
+   return 0;
+}
+EXPORT_SYMBOL(drm_mode_create_color_reproduction_property);
+
+
+/**
+ * drm_mode_create_edge_enhancement_property - create property for edge 
enhancement
+ * @dev: DRM device
+ *
+ */
+int drm_mode_create_edge_enhancement_property(
+   struct drm_device *dev)
+{
+   struct drm_mode_edge_enhancement *params;
+   struct drm_property *prop;
+   char prop_name[] = "edge enhancement";
+
+   if (dev->mode_config.edge_enhancement_property ||
+   dev->mode_config.edge_enhancement_blob_ptr)
+   return -EEXIST;
+
+   prop = drm_property_create(dev, DRM_MODE_PROP_BLOB,
+   prop_name, 0);
+   if (!prop) {
+   DRM_ERROR("fail to create %s property.\n", prop_name);
+   return -ENOMEM;
+   }
+
+   dev->mode_config.edge_enhancement_blob_ptr =
+   drm_property_create_blob(dev, sizeof(*params),
+   NULL);
+   if (!dev->mode_config.edge_enhancement_blob_ptr) {
+   DRM_ERROR("failed to allocate blob for %s\n", prop_name);
+   drm_property_destroy(dev, prop);
+   return -ENOMEM;
+   }
+
+   dev->mode_config.edge_enhancement_property = prop;
+
+   return  0;
+}
+EXPORT_SYMBOL(drm_mode_create_edge_enhancement_property);
+
 static int drm_mode_group_init(struct drm_device *dev, struct drm_mode_group 
*group)
 {
uint32_t total_objects = 0;
diff --git a/include/drm/drm_crtc.h b/include/drm/drm_crtc.h
index 82f2016..df7b178 100644
--- a/include/drm/drm_crtc.h
+++ b/include/drm/drm_crtc.h
@@ -901,6 +901,13 @@ struct drm_mode_config {
/* Optional properties */
struct drm_property *scaling

[RFC 0/4] drm: add generic KMS blob properties for image enhancement

2014-03-05 Thread Rahul Sharma
From: Rahul Sharma 

Patch set has following proposal.

1) Add writable KMS blob properties
patch 1: drm: allow to create blank writable blob properties
patch 2: drm: add ioctl to write into binary blob KMS properties

2) Add generic image enhancement properties. Added as per exynos hardware
requirements (to start).
patch 3: drm: add generic blob properties for image enhancement

3) Allow drivers to create writable blob properties
patch 4: drm: export create and destroy function for blob properties

Initial discussion before preparing this RFC is at
http://comments.gmane.org/gmane.linux.kernel.samsung-soc/27278

This series is based on Dave's drm-next branch at
http://cgit.freedesktop.org/~airlied/linux/

Rahul Sharma (4):
  drm: allow to create blank writable blob properties
  drm: add ioctl to write into binary blob KMS properties
  drm: add generic blob properties for image enhancement
  drm: export create and destroy function for blob properties

 drivers/gpu/drm/drm_crtc.c  |  201 +--
 drivers/gpu/drm/drm_drv.c   |1 +
 include/drm/drm_crtc.h  |   19 
 include/uapi/drm/drm.h  |1 +
 include/uapi/drm/drm_mode.h |   49 +++
 5 files changed, 265 insertions(+), 6 deletions(-)

-- 
1.7.9.5

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[RFC 1/4] drm: allow to create blank writable blob properties

2014-03-05 Thread Rahul Sharma
There is no provision to create a blob property without
providing binary data. This data is needed to fill inside
the blob.

With subsequent patches, blob properties are modified to
receive well defined structures by the user application.
DRM creates a blank blob (initialized with all zeros) which
can be filled by user application through set_blob ioctl.

Signed-off-by: Rahul Sharma 
---
 drivers/gpu/drm/drm_crtc.c |5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/drm_crtc.c b/drivers/gpu/drm/drm_crtc.c
index 35ea15d..9a2215c 100644
--- a/drivers/gpu/drm/drm_crtc.c
+++ b/drivers/gpu/drm/drm_crtc.c
@@ -3190,7 +3190,7 @@ static struct drm_property_blob 
*drm_property_create_blob(struct drm_device *dev
struct drm_property_blob *blob;
int ret;
 
-   if (!length || !data)
+   if (!length)
return NULL;
 
blob = kzalloc(sizeof(struct drm_property_blob)+length, GFP_KERNEL);
@@ -3205,7 +3205,8 @@ static struct drm_property_blob 
*drm_property_create_blob(struct drm_device *dev
 
blob->length = length;
 
-   memcpy(blob->data, data, length);
+   if (data)
+   memcpy(blob->data, data, length);
 
list_add_tail(&blob->head, &dev->mode_config.property_blob_list);
return blob;
-- 
1.7.9.5

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[RFC 4/4] drm: export create and destroy function for blob properties

2014-03-05 Thread Rahul Sharma
Drm drivers can also create and attach private blob properties.
This patch exports functions to create and destroy blob properties.

Signed-off-by: Rahul Sharma 
---
 drivers/gpu/drm/drm_crtc.c |8 +---
 include/drm/drm_crtc.h |4 
 2 files changed, 9 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/drm_crtc.c b/drivers/gpu/drm/drm_crtc.c
index 8771abf..f1939c2 100644
--- a/drivers/gpu/drm/drm_crtc.c
+++ b/drivers/gpu/drm/drm_crtc.c
@@ -3299,8 +3299,8 @@ done:
return ret;
 }
 
-static struct drm_property_blob *drm_property_create_blob(struct drm_device 
*dev, int length,
- void *data)
+struct drm_property_blob *drm_property_create_blob(struct drm_device *dev,
+   int length, void *data)
 {
struct drm_property_blob *blob;
int ret;
@@ -3326,14 +3326,16 @@ static struct drm_property_blob 
*drm_property_create_blob(struct drm_device *dev
list_add_tail(&blob->head, &dev->mode_config.property_blob_list);
return blob;
 }
+EXPORT_SYMBOL(drm_property_create_blob);
 
-static void drm_property_destroy_blob(struct drm_device *dev,
+void drm_property_destroy_blob(struct drm_device *dev,
   struct drm_property_blob *blob)
 {
drm_mode_object_put(dev, &blob->base);
list_del(&blob->head);
kfree(blob);
 }
+EXPORT_SYMBOL(drm_property_destroy_blob);
 
 int drm_mode_getblob_ioctl(struct drm_device *dev,
   void *data, struct drm_file *file_priv)
diff --git a/include/drm/drm_crtc.h b/include/drm/drm_crtc.h
index df7b178..8bf7fb2 100644
--- a/include/drm/drm_crtc.h
+++ b/include/drm/drm_crtc.h
@@ -1077,6 +1077,10 @@ struct drm_property *drm_property_create_bitmask(struct 
drm_device *dev,
 struct drm_property *drm_property_create_range(struct drm_device *dev, int 
flags,
 const char *name,
 uint64_t min, uint64_t max);
+extern struct drm_property_blob *drm_property_create_blob(struct drm_device 
*dev,
+   int length, void *data);
+extern void drm_property_destroy_blob(struct drm_device *dev,
+   struct drm_property_blob *blob);
 extern void drm_property_destroy(struct drm_device *dev, struct drm_property 
*property);
 extern int drm_property_add_enum(struct drm_property *property, int index,
 uint64_t value, const char *name);
-- 
1.7.9.5

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[PATCH 1/2] dt-bindings: clock: Move at91.h to dt-bindigs/clock

2014-03-05 Thread Tushar Behera
Most of the clock related dt-binding header files are located in
dt-bindings/clock folder. It would be good to keep all the similar
header files at a single location.

Signed-off-by: Tushar Behera 
CC: Rob Landley 
CC: Andrew Victor 
CC: Jean-Christophe Plagniol-Villard 
---
 .../devicetree/bindings/clock/at91-clock.txt   |2 +-
 arch/arm/boot/dts/sama5d3.dtsi |2 +-
 arch/arm/boot/dts/sama5d3_mci2.dtsi|2 +-
 arch/arm/boot/dts/sama5d3_tcb1.dtsi|2 +-
 arch/arm/boot/dts/sama5d3_uart.dtsi|2 +-
 include/dt-bindings/{clk => clock}/at91.h  |0
 6 files changed, 5 insertions(+), 5 deletions(-)
 rename include/dt-bindings/{clk => clock}/at91.h (100%)

diff --git a/Documentation/devicetree/bindings/clock/at91-clock.txt 
b/Documentation/devicetree/bindings/clock/at91-clock.txt
index cd5e239..6794cdc 100644
--- a/Documentation/devicetree/bindings/clock/at91-clock.txt
+++ b/Documentation/devicetree/bindings/clock/at91-clock.txt
@@ -62,7 +62,7 @@ Required properties for PMC node:
 - interrupt-controller : tell that the PMC is an interrupt controller.
 - #interrupt-cells : must be set to 1. The first cell encodes the interrupt id,
and reflect the bit position in the PMC_ER/DR/SR registers.
-   You can use the dt macros defined in dt-bindings/clk/at91.h.
+   You can use the dt macros defined in dt-bindings/clock/at91.h.
0 (AT91_PMC_MOSCS) -> main oscillator ready
1 (AT91_PMC_LOCKA) -> PLL A ready
2 (AT91_PMC_LOCKB) -> PLL B ready
diff --git a/arch/arm/boot/dts/sama5d3.dtsi b/arch/arm/boot/dts/sama5d3.dtsi
index 3d5faf8..8c977b5 100644
--- a/arch/arm/boot/dts/sama5d3.dtsi
+++ b/arch/arm/boot/dts/sama5d3.dtsi
@@ -13,7 +13,7 @@
 #include 
 #include 
 #include 
-#include 
+#include 
 
 / {
model = "Atmel SAMA5D3 family SoC";
diff --git a/arch/arm/boot/dts/sama5d3_mci2.dtsi 
b/arch/arm/boot/dts/sama5d3_mci2.dtsi
index b029fe7..1b02208 100644
--- a/arch/arm/boot/dts/sama5d3_mci2.dtsi
+++ b/arch/arm/boot/dts/sama5d3_mci2.dtsi
@@ -9,7 +9,7 @@
 
 #include 
 #include 
-#include 
+#include 
 
 / {
ahb {
diff --git a/arch/arm/boot/dts/sama5d3_tcb1.dtsi 
b/arch/arm/boot/dts/sama5d3_tcb1.dtsi
index 382b044..0284845 100644
--- a/arch/arm/boot/dts/sama5d3_tcb1.dtsi
+++ b/arch/arm/boot/dts/sama5d3_tcb1.dtsi
@@ -9,7 +9,7 @@
 
 #include 
 #include 
-#include 
+#include 
 
 / {
aliases {
diff --git a/arch/arm/boot/dts/sama5d3_uart.dtsi 
b/arch/arm/boot/dts/sama5d3_uart.dtsi
index a9fa75e..7a8d4c6 100644
--- a/arch/arm/boot/dts/sama5d3_uart.dtsi
+++ b/arch/arm/boot/dts/sama5d3_uart.dtsi
@@ -9,7 +9,7 @@
 
 #include 
 #include 
-#include 
+#include 
 
 / {
aliases {
diff --git a/include/dt-bindings/clk/at91.h b/include/dt-bindings/clock/at91.h
similarity index 100%
rename from include/dt-bindings/clk/at91.h
rename to include/dt-bindings/clock/at91.h
-- 
1.7.9.5

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[PATCH 2/2] dt-bindings: clock: Move exynos-audss-clk.h to dt-bindings/clock

2014-03-05 Thread Tushar Behera
Most of the clock related dt-binding header files are located in
dt-bindings/clock folder. It would be good to keep all the similar
header files at a single location.

Signed-off-by: Tushar Behera 
CC: Kukjin Kim 
CC: Tomasz Figa 
---
 arch/arm/boot/dts/exynos5250.dtsi  |2 +-
 arch/arm/boot/dts/exynos5420.dtsi  |2 +-
 drivers/clk/samsung/clk-exynos-audss.c |2 +-
 .../dt-bindings/{clk => clock}/exynos-audss-clk.h  |0
 4 files changed, 3 insertions(+), 3 deletions(-)
 rename include/dt-bindings/{clk => clock}/exynos-audss-clk.h (100%)

diff --git a/arch/arm/boot/dts/exynos5250.dtsi 
b/arch/arm/boot/dts/exynos5250.dtsi
index 8f6300f..2048012 100644
--- a/arch/arm/boot/dts/exynos5250.dtsi
+++ b/arch/arm/boot/dts/exynos5250.dtsi
@@ -20,7 +20,7 @@
 #include "exynos5.dtsi"
 #include "exynos5250-pinctrl.dtsi"
 
-#include 
+#include 
 
 / {
compatible = "samsung,exynos5250";
diff --git a/arch/arm/boot/dts/exynos5420.dtsi 
b/arch/arm/boot/dts/exynos5420.dtsi
index 45e2e65..64c7f6d 100644
--- a/arch/arm/boot/dts/exynos5420.dtsi
+++ b/arch/arm/boot/dts/exynos5420.dtsi
@@ -16,7 +16,7 @@
 #include "exynos5.dtsi"
 #include "exynos5420-pinctrl.dtsi"
 
-#include 
+#include 
 
 / {
compatible = "samsung,exynos5420";
diff --git a/drivers/clk/samsung/clk-exynos-audss.c 
b/drivers/clk/samsung/clk-exynos-audss.c
index 884187f..13eae14c 100644
--- a/drivers/clk/samsung/clk-exynos-audss.c
+++ b/drivers/clk/samsung/clk-exynos-audss.c
@@ -17,7 +17,7 @@
 #include 
 #include 
 
-#include 
+#include 
 
 enum exynos_audss_clk_type {
TYPE_EXYNOS4210,
diff --git a/include/dt-bindings/clk/exynos-audss-clk.h 
b/include/dt-bindings/clock/exynos-audss-clk.h
similarity index 100%
rename from include/dt-bindings/clk/exynos-audss-clk.h
rename to include/dt-bindings/clock/exynos-audss-clk.h
-- 
1.7.9.5

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[PATCH 0/2] Move header files from dt-bindings/clk to dt-bindings/clock

2014-03-05 Thread Tushar Behera
Clock related headers files are mostly located in include/dt-bindings/clock
folder. There are only 2 header files left in include/dt-bindings/clk. Move them
to the most used folder.

All changes related to a single file movement are contained in a single patch
to avoid any build breakage.

The patches are based next-20140305.

Tushar Behera (2):
  dt-bindings: clock: Move at91.h to dt-bindigs/clock
  dt-bindings: clock: Move exynos-audss-clk.h to dt-bindings/clock

 .../devicetree/bindings/clock/at91-clock.txt   |2 +-
 arch/arm/boot/dts/exynos5250.dtsi  |2 +-
 arch/arm/boot/dts/exynos5420.dtsi  |2 +-
 arch/arm/boot/dts/sama5d3.dtsi |2 +-
 arch/arm/boot/dts/sama5d3_mci2.dtsi|2 +-
 arch/arm/boot/dts/sama5d3_tcb1.dtsi|2 +-
 arch/arm/boot/dts/sama5d3_uart.dtsi|2 +-
 drivers/clk/samsung/clk-exynos-audss.c |2 +-
 include/dt-bindings/{clk => clock}/at91.h  |0
 .../dt-bindings/{clk => clock}/exynos-audss-clk.h  |0
 10 files changed, 8 insertions(+), 8 deletions(-)
 rename include/dt-bindings/{clk => clock}/at91.h (100%)
 rename include/dt-bindings/{clk => clock}/exynos-audss-clk.h (100%)

-- 
1.7.9.5

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[PATCH] [media] s5p-mfc: Add a control for IVF format for VP8 encoder

2014-03-05 Thread Arun Kumar K
From: Pawel Osciak 

Add a control to enable/disable IVF output stream format for VP8 encode.
Set the IVF format output to disabled as default.

Signed-off-by: Pawel Osciak 
Signed-off-by: Arun Kumar K 
---
 Documentation/DocBook/media/v4l/controls.xml|8 
 drivers/media/platform/s5p-mfc/s5p_mfc_common.h |1 +
 drivers/media/platform/s5p-mfc/s5p_mfc_enc.c|   11 +++
 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c |2 ++
 drivers/media/v4l2-core/v4l2-ctrls.c|1 +
 include/uapi/linux/v4l2-controls.h  |1 +
 6 files changed, 24 insertions(+)

diff --git a/Documentation/DocBook/media/v4l/controls.xml 
b/Documentation/DocBook/media/v4l/controls.xml
index 0e1770c..07fb64a 100644
--- a/Documentation/DocBook/media/v4l/controls.xml
+++ b/Documentation/DocBook/media/v4l/controls.xml
@@ -3222,6 +3222,14 @@ V4L2_CID_MPEG_VIDEO_VPX_GOLDEN_FRAME_REF_PERIOD as a 
golden frame.
 Acceptable values are 0, 1, 2 and 3 corresponding to encoder profiles 0, 1, 2 
and 3.
  
 
+ 
+ 
+   V4L2_CID_MPEG_VIDEO_VPX_IVF_FORMAT 
+   boolean
+ 
+ Outputs the VP8 encoded stream in 
IVF file format.
+ 
+
   
 
   
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_common.h 
b/drivers/media/platform/s5p-mfc/s5p_mfc_common.h
index 5c28cc3..4d17df9 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_common.h
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_common.h
@@ -418,6 +418,7 @@ struct s5p_mfc_vp8_enc_params {
u8 rc_frame_qp;
u8 rc_p_frame_qp;
u8 profile;
+   bool ivf;
 };
 
 /**
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_enc.c 
b/drivers/media/platform/s5p-mfc/s5p_mfc_enc.c
index df83cd1..a67913e 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_enc.c
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_enc.c
@@ -676,6 +676,14 @@ static struct mfc_control controls[] = {
.step = 1,
.default_value = 0,
},
+   {
+   .id = V4L2_CID_MPEG_VIDEO_VPX_IVF_FORMAT,
+   .type = V4L2_CTRL_TYPE_BOOLEAN,
+   .minimum = 0,
+   .maximum = 1,
+   .step = 1,
+   .default_value = 0,
+   },
 };
 
 #define NUM_CTRLS ARRAY_SIZE(controls)
@@ -1636,6 +1644,9 @@ static int s5p_mfc_enc_s_ctrl(struct v4l2_ctrl *ctrl)
case V4L2_CID_MPEG_VIDEO_VPX_PROFILE:
p->codec.vp8.profile = ctrl->val;
break;
+   case V4L2_CID_MPEG_VIDEO_VPX_IVF_FORMAT:
+   p->codec.vp8.ivf = ctrl->val;
+   break;
default:
v4l2_err(&dev->v4l2_dev, "Invalid control, id=%d, val=%d\n",
ctrl->id, ctrl->val);
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c 
b/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c
index f64621a..90edb19 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c
@@ -1243,6 +1243,8 @@ static int s5p_mfc_set_enc_params_vp8(struct s5p_mfc_ctx 
*ctx)
 
/* VP8 specific params */
reg = 0;
+   /* Bit set to 1 disables IVF stream format. */
+   reg |= p_vp8->ivf ? 0 : (0x1 << 12);
reg |= (p_vp8->imd_4x4 & 0x1) << 10;
switch (p_vp8->num_partitions) {
case V4L2_CID_MPEG_VIDEO_VPX_1_PARTITION:
diff --git a/drivers/media/v4l2-core/v4l2-ctrls.c 
b/drivers/media/v4l2-core/v4l2-ctrls.c
index e9e12c4..19e78df 100644
--- a/drivers/media/v4l2-core/v4l2-ctrls.c
+++ b/drivers/media/v4l2-core/v4l2-ctrls.c
@@ -752,6 +752,7 @@ const char *v4l2_ctrl_get_name(u32 id)
case V4L2_CID_MPEG_VIDEO_VPX_I_FRAME_QP:return "VPX 
I-Frame QP Value";
case V4L2_CID_MPEG_VIDEO_VPX_P_FRAME_QP:return "VPX 
P-Frame QP Value";
case V4L2_CID_MPEG_VIDEO_VPX_PROFILE:   return "VPX 
Profile";
+   case V4L2_CID_MPEG_VIDEO_VPX_IVF_FORMAT:return "VPX 
Output stream in IVF format";
 
/* CAMERA controls */
/* Keep the order of the 'case's the same as in videodev2.h! */
diff --git a/include/uapi/linux/v4l2-controls.h 
b/include/uapi/linux/v4l2-controls.h
index cda6fa0..b2763d6 100644
--- a/include/uapi/linux/v4l2-controls.h
+++ b/include/uapi/linux/v4l2-controls.h
@@ -565,6 +565,7 @@ enum v4l2_vp8_golden_frame_sel {
 #define V4L2_CID_MPEG_VIDEO_VPX_I_FRAME_QP (V4L2_CID_MPEG_BASE+509)
 #define V4L2_CID_MPEG_VIDEO_VPX_P_FRAME_QP (V4L2_CID_MPEG_BASE+510)
 #define V4L2_CID_MPEG_VIDEO_VPX_PROFILE
(V4L2_CID_MPEG_BASE+511)
+#define V4L2_CID_MPEG_VIDEO_VPX_IVF_FORMAT (V4L2_CID_MPEG_BASE+512)
 
 /*  MPEG-class control IDs specific to the CX2341x driver as defined by V4L2 */
 #define V4L2_CID_MPEG_CX2341X_BASE 
(V4L2_CTRL_CLASS_MPEG | 0x1000)
-- 
1.7.9.5

--
To unsu

Re: [PATCH v2 3/6] PCI: rcar: use new OF interrupt mapping when possible

2014-03-05 Thread Simon Horman
On Wed, Mar 05, 2014 at 02:25:48PM +0100, Lucas Stach wrote:
> This is the recommended method of doing the IRQ
> mapping. Still fall back to the old method in order
> to not break the just submitted board files.
> 
> Signed-off-by: Lucas Stach 

Assuming that it does what it says on the wrapper:

Acked-by: Simon Horman 


> ---
> v2: pass in parent device to pci_common_init(), to
> make DT parsing work.
> ---
>  drivers/pci/host/pci-rcar-gen2.c | 12 +---
>  1 file changed, 9 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/pci/host/pci-rcar-gen2.c 
> b/drivers/pci/host/pci-rcar-gen2.c
> index ceec147baec3..3a0914163ad0 100644
> --- a/drivers/pci/host/pci-rcar-gen2.c
> +++ b/drivers/pci/host/pci-rcar-gen2.c
> @@ -15,6 +15,7 @@
>  #include 
>  #include 
>  #include 
> +#include 
>  #include 
>  #include 
>  #include 
> @@ -160,8 +161,13 @@ static int __init rcar_pci_map_irq(const struct pci_dev 
> *dev, u8 slot, u8 pin)
>  {
>   struct pci_sys_data *sys = dev->bus->sysdata;
>   struct rcar_pci_priv *priv = sys->private_data;
> + int irq;
> +
> + irq = of_irq_parse_and_map_pci(dev, slot, pin);
> + if (!irq)
> + irq = priv->irq;
>  
> - return priv->irq;
> + return irq;
>  }
>  
>  /* PCI host controller setup */
> @@ -249,6 +255,8 @@ static int __init rcar_pci_add_controller(struct 
> rcar_pci_priv *priv)
>   void **private_data;
>   int count;
>  
> + pci_common_init_dev(priv->dev, &rcar_hw_pci);
> +
>   if (rcar_hw_pci.nr_controllers < rcar_pci_count)
>   goto add_priv;
>  
> @@ -322,8 +330,6 @@ static int __init rcar_pci_init(void)
>   int retval;
>  
>   retval = platform_driver_probe(&rcar_pci_driver, rcar_pci_probe);
> - if (!retval)
> - pci_common_init(&rcar_hw_pci);
>  
>   /* Private data pointer array is not needed any more */
>   kfree(rcar_hw_pci.private_data);
> -- 
> 1.9.0
> 
> --
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Re: [PATCH v2 6/6] PCI: designware: use new OF interrupt mapping when possible

2014-03-05 Thread Jingoo Han
On Wednesday, March 05, 2014 10:26 PM, Lucas Stach wrote:
> 
> This is the recommended method of doing the IRQ
> mapping. For old devicetrees we fall back to the
> previous practice.
> 
> Signed-off-by: Lucas Stach 
> Acked-by: Arnd Bergmann 

(+cc Mohit KUMAR, Richard Zhu, Pratyush Anand, Marek Vasut,
   Kishon Vijay Abraham I)

Acked-by: Jingoo Han 

It works properly on Exynos platform.
Thank you.

Best regards,
Jingoo Han

> ---
> v2: pass in parent dev to relevant functions, to make DT parsing
> work (spotted by Tim Harvey )
> ---
>  drivers/pci/host/pcie-designware.c | 12 +---
>  1 file changed, 9 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/pci/host/pcie-designware.c 
> b/drivers/pci/host/pcie-designware.c
> index 17ce88f79d2b..98c118e04dba 100644
> --- a/drivers/pci/host/pcie-designware.c
> +++ b/drivers/pci/host/pcie-designware.c
> @@ -17,6 +17,7 @@
>  #include 
>  #include 
>  #include 
> +#include 
>  #include 
>  #include 
>  #include 
> @@ -492,7 +493,7 @@ int __init dw_pcie_host_init(struct pcie_port *pp)
>   dw_pci.nr_controllers = 1;
>   dw_pci.private_data = (void **)&pp;
> 
> - pci_common_init(&dw_pci);
> + pci_common_init_dev(pp->dev, &dw_pci);
>   pci_assign_unassigned_resources();
>  #ifdef CONFIG_PCI_DOMAINS
>   dw_pci.domain++;
> @@ -725,7 +726,7 @@ static struct pci_bus *dw_pcie_scan_bus(int nr, struct 
> pci_sys_data *sys)
> 
>   if (pp) {
>   pp->root_bus_nr = sys->busnr;
> - bus = pci_scan_root_bus(NULL, sys->busnr, &dw_pcie_ops,
> + bus = pci_scan_root_bus(pp->dev, sys->busnr, &dw_pcie_ops,
>   sys, &sys->resources);
>   } else {
>   bus = NULL;
> @@ -738,8 +739,13 @@ static struct pci_bus *dw_pcie_scan_bus(int nr, struct 
> pci_sys_data *sys)
>  static int dw_pcie_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
>  {
>   struct pcie_port *pp = sys_to_pcie(dev->bus->sysdata);
> + int irq;
> 
> - return pp->irq;
> + irq = of_irq_parse_and_map_pci(dev, slot, pin);
> + if (!irq)
> + irq = pp->irq;
> +
> + return irq;
>  }
> 
>  static void dw_pcie_add_bus(struct pci_bus *bus)
> --
> 1.9.0

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Re: [PATCH v2 4/6] ARM: dts: exynos5440: fix PCIe interrupt mapping

2014-03-05 Thread Jingoo Han
On Wednesday, March 05, 2014 10:26 PM, Lucas Stach wrote:
> 
> So it actually works.
> 
> Signed-off-by: Lucas Stach 
> Acked-by: Arnd Bergmann 

Acked-by: Jingoo Han 

It works properly on Exynos platform.
Thank you.

Best regards,
Jingoo Han

> ---
> v2: fix build breakage by including arm-gic.h
> ---
>  arch/arm/boot/dts/exynos5440.dtsi | 6 --
>  1 file changed, 4 insertions(+), 2 deletions(-)
> 
> diff --git a/arch/arm/boot/dts/exynos5440.dtsi 
> b/arch/arm/boot/dts/exynos5440.dtsi
> index 02a0a1226cef..7628e2edf1b6 100644
> --- a/arch/arm/boot/dts/exynos5440.dtsi
> +++ b/arch/arm/boot/dts/exynos5440.dtsi
> @@ -9,6 +9,8 @@
>   * published by the Free Software Foundation.
>  */
> 
> +#include 
> +
>  #include "skeleton.dtsi"
> 
>  / {
> @@ -274,7 +276,7 @@
> 0x8200 0 0x40011000 0x40011000 0 0x1ffef000>; /* 
> non-prefetchable memory */
>   #interrupt-cells = <1>;
>   interrupt-map-mask = <0 0 0 0>;
> - interrupt-map = <0x0 0 &gic 53>;
> + interrupt-map = <0 0 0 0 &gic GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
>   num-lanes = <4>;
>   status = "disabled";
>   };
> @@ -295,7 +297,7 @@
> 0x8200 0 0x60011000 0x60011000 0 0x1ffef000>; /* 
> non-prefetchable memory */
>   #interrupt-cells = <1>;
>   interrupt-map-mask = <0 0 0 0>;
> - interrupt-map = <0x0 0 &gic 56>;
> + interrupt-map = <0 0 0 0 &gic GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
>   num-lanes = <4>;
>   status = "disabled";
>   };
> --
> 1.9.0

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Re: [PATCH] iommu/exynos: Remove driver

2014-03-05 Thread Kyungmin Park
On Fri, Feb 14, 2014 at 9:17 AM, Cho KyongHo  wrote:
>> -Original Message-
>> From: Olof Johansson [mailto:o...@lixom.net]
>> Sent: Friday, February 14, 2014 4:34 AM
>>
>> On Mon, Feb 10, 2014 at 10:21 PM, Kukjin Kim  wrote:
>>
>> > Just adding KyongHo Cho.
>> >
>> > If he can fixup for this time, it would be best solution because he knows
>> > well than others, I think.
>>
>> It's not so much a matter of "fixup for this time", it's a about
>> having ownership of the driver, making sure it works (and keeps
>> working if there is related development). The posted patches have not
>> been followed through on and the result is a broken driver. :(
>>
>> I definitely appreciate his expertise, and we should make sure that he
>> gets to review the code, but if someone else is able to spend time on
>> reworking the driver (or rewriting a newer one) and maintaining it
>> longer-term, then we should not stop them from doing so. And there is
>> no reason to keep broken stale code in the kernel meanwhile.
>>
>
> Thank you for your concerning.
> I also definitely agree with you that the driver must work.
> I am always concerning about it but it was not easy to make some time
> for the patches.
>
> I will continue to post the next version of patches, of course.
> I think it is not far from now to show it.

Lots of time is going from last reply. there are two options.
1. just waiting more
2. remove it as patch and start it again by someone.

what's the opinions?

Thank you,
Kyungmin Park
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Re: [PATCH v9 0/4] phy: Add new Exynos USB 2.0 PHY driver

2014-03-05 Thread Tobias Jakobi
Hello Kamil,

this looks very good. I just tested the patchset on my ODROID-X2
(Exynos4412-based board) and the USB stability issues I mentioned to you
before (with the older patchset) seem to be gone.

All devices on the USB behave normally (mass storage, ethernet and
bluetooth).


With best wishes,
Tobias


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Re: [PATCH v2 1/6] ARM: dts: tegra: add PCIe interrupt mapping properties

2014-03-05 Thread Stephen Warren
On 03/05/2014 06:25 AM, Lucas Stach wrote:
> Those are defined by the common PCI binding.

It sounds like there's no dependency between pathces 1/6 and 2/6, so I
should apply 1/6 to the Tegra tree, and Bjorn apply 2/6 to the PCI tree?
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[PATCH 5/5] samsung: xgmac: Mostly whitespace neatening

2014-03-05 Thread Joe Perches
Alignment to parenthesis and adding parenthesis where appropriate.
Added a conversion of if (foo < x) bar ; else return baz to
if (foo >= x) return baz; and unindented.

git diff -w shows trivial changes.
Added a few > 80 column lines.

Signed-off-by: Joe Perches 
---
 drivers/net/ethernet/samsung/xgmac_common.h   |  32 ++---
 drivers/net/ethernet/samsung/xgmac_core.c |  19 ++-
 drivers/net/ethernet/samsung/xgmac_desc.c |  10 +-
 drivers/net/ethernet/samsung/xgmac_desc.h |  14 +-
 drivers/net/ethernet/samsung/xgmac_dma.c  |  14 +-
 drivers/net/ethernet/samsung/xgmac_dma.h  |  10 +-
 drivers/net/ethernet/samsung/xgmac_ethtool.c  |  23 ++--
 drivers/net/ethernet/samsung/xgmac_main.c |  95 +++---
 drivers/net/ethernet/samsung/xgmac_mdio.c |  33 +++--
 drivers/net/ethernet/samsung/xgmac_mtl.c  |   4 +-
 drivers/net/ethernet/samsung/xgmac_mtl.h  |  14 +-
 drivers/net/ethernet/samsung/xgmac_platform.c |  28 ++--
 drivers/net/ethernet/samsung/xgmac_reg.h  | 182 +-
 13 files changed, 240 insertions(+), 238 deletions(-)

diff --git a/drivers/net/ethernet/samsung/xgmac_common.h 
b/drivers/net/ethernet/samsung/xgmac_common.h
index 4c46504..47721b6 100644
--- a/drivers/net/ethernet/samsung/xgmac_common.h
+++ b/drivers/net/ethernet/samsung/xgmac_common.h
@@ -8,7 +8,7 @@
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License version 2 as
  * published by the Free Software Foundation.
-*/
+ */
 
 #ifndef __XGMAC_COMMON_H__
 #define __XGMAC_COMMON_H__
@@ -167,21 +167,21 @@ enum dma_irq_status {
handle_rx = BIT(5),
 };
 
-#define NETIF_F_HW_VLAN_ALL (NETIF_F_HW_VLAN_CTAG_RX |\
-   NETIF_F_HW_VLAN_STAG_RX |\
-   NETIF_F_HW_VLAN_CTAG_TX |\
-   NETIF_F_HW_VLAN_STAG_TX |\
-   NETIF_F_HW_VLAN_CTAG_FILTER |\
-   NETIF_F_HW_VLAN_STAG_FILTER)
+#define NETIF_F_HW_VLAN_ALL (NETIF_F_HW_VLAN_CTAG_RX | \
+NETIF_F_HW_VLAN_STAG_RX |  \
+NETIF_F_HW_VLAN_CTAG_TX |  \
+NETIF_F_HW_VLAN_STAG_TX |  \
+NETIF_F_HW_VLAN_CTAG_FILTER |  \
+NETIF_F_HW_VLAN_STAG_FILTER)
 
 /* MMC control defines */
 #define XGMAC_MMC_CTRL_CNT_FRZ  0x0008
 
 /* XGMAC HW ADDR regs */
 #define XGMAC_ADDR_HIGH(reg)(((reg > 15) ? 0x0800 : 0x0040) + \
-   (reg * 8))
+(reg * 8))
 #define XGMAC_ADDR_LOW(reg) (((reg > 15) ? 0x0804 : 0x0044) + \
-   (reg * 8))
+(reg * 8))
 #define XGMAC_MAX_PERFECT_ADDRESSES 32 /* Maximum unicast perfect filtering */
 #define XGMAC_FRAME_FILTER   0x0004  /* Frame Filter */
 
@@ -207,7 +207,7 @@ enum dma_irq_status {
 #define MIN_MTU 68
 #define MAX_MTU 9000
 
-#define XGMAC_FOR_EACH_QUEUE(max_queues, queue_num) \
+#define XGMAC_FOR_EACH_QUEUE(max_queues, queue_num)\
for (queue_num = 0; queue_num < max_queues; queue_num++)
 
 #define DRV_VERSION "1.0.0"
@@ -331,7 +331,7 @@ struct xgmac_hwtimestamp {
int (*init_systime)(void __iomem *ioaddr, u32 sec, u32 nsec);
int (*config_addend)(void __iomem *ioaddr, u32 addend);
int (*adjust_systime)(void __iomem *ioaddr, u32 sec, u32 nsec,
-  int add_sub);
+ int add_sub);
u64 (*get_systime)(void __iomem *ioaddr);
 };
 
@@ -353,14 +353,14 @@ struct xgmac_core_ops {
void (*dump_regs)(void __iomem *ioaddr);
/* Handle extra events on specific interrupts hw dependent */
int (*host_irq_status)(void __iomem *ioaddr,
-   struct xgmac_extra_stats *x);
+  struct xgmac_extra_stats *x);
/* Set power management mode (e.g. magic frame) */
void (*pmt)(void __iomem *ioaddr, unsigned long mode);
/* Set/Get Unicast MAC addresses */
void (*set_umac_addr)(void __iomem *ioaddr, unsigned char *addr,
-  unsigned int reg_n);
+ unsigned int reg_n);
void (*get_umac_addr)(void __iomem *ioaddr, unsigned char *addr,
-  unsigned int reg_n);
+ unsigned int reg_n);
void (*enable_rx)(void __iomem *ioaddr, bool enable);
void (*enable_tx)(void __iomem *ioaddr, bool enable);
 
@@ -369,7 +369,7 @@ struct xgmac_core_ops {
 
/* If supported then get the optional core features */
unsigned int (*get_hw_feature)(void __iomem *ioaddr,
-   unsigned char feature_index);
+  

[PATCH 4/5] samsung: xgmac: Neaten comments

2014-03-05 Thread Joe Perches
Fix a couple of typos
Fix some comments that seem to have been kernel-doc style.
Fix alignment where noticed.

Signed-off-by: Joe Perches 
---
 drivers/net/ethernet/samsung/xgmac_core.c |  1 -
 drivers/net/ethernet/samsung/xgmac_desc.c | 14 +++---
 drivers/net/ethernet/samsung/xgmac_desc.h |  2 +-
 drivers/net/ethernet/samsung/xgmac_dma.c  |  3 ++-
 drivers/net/ethernet/samsung/xgmac_dma.h  |  2 +-
 drivers/net/ethernet/samsung/xgmac_main.c | 14 --
 drivers/net/ethernet/samsung/xgmac_reg.h  |  8 
 7 files changed, 23 insertions(+), 21 deletions(-)

diff --git a/drivers/net/ethernet/samsung/xgmac_core.c 
b/drivers/net/ethernet/samsung/xgmac_core.c
index c5afba4..40b1946 100644
--- a/drivers/net/ethernet/samsung/xgmac_core.c
+++ b/drivers/net/ethernet/samsung/xgmac_core.c
@@ -1,4 +1,3 @@
-
 /* 10G controller driver for Samsung SoCs
  *
  * Copyright (C) 2013 Samsung Electronics Co., Ltd.
diff --git a/drivers/net/ethernet/samsung/xgmac_desc.c 
b/drivers/net/ethernet/samsung/xgmac_desc.c
index ef25efd..2a7fd21 100644
--- a/drivers/net/ethernet/samsung/xgmac_desc.c
+++ b/drivers/net/ethernet/samsung/xgmac_desc.c
@@ -84,7 +84,7 @@ static void xgmac_release_tx_desc(struct xgmac_tx_norm_desc 
*p)
 
 /* Clear interrupt on tx frame completion. When this bit is
  * set an interrupt happens as soon as the frame is transmitted
-*/
+ */
 static void xgmac_clear_tx_ic(struct xgmac_tx_norm_desc *p)
 {
p->tdes23.tx_rd_des23.int_on_com = 0;
@@ -158,8 +158,8 @@ static void xgmac_tx_ctxt_desc_reset_ostc(struct 
xgmac_tx_ctxt_desc *p)
 
 /* Set IVLAN information */
 static void xgmac_tx_ctxt_desc_set_ivlantag(struct xgmac_tx_ctxt_desc *p,
-int is_ivlanvalid, int ivlan_tag,
-int ivlan_ctl)
+   int is_ivlanvalid, int ivlan_tag,
+   int ivlan_ctl)
 {
if (is_ivlanvalid) {
p->ivlan_tag_valid = is_ivlanvalid;
@@ -176,7 +176,7 @@ static int xgmac_tx_ctxt_desc_get_ivlantag(struct 
xgmac_tx_ctxt_desc *p)
 
 /* Set VLAN Tag */
 static void xgmac_tx_ctxt_desc_set_vlantag(struct xgmac_tx_ctxt_desc *p,
-   int is_vlanvalid, int vlan_tag)
+  int is_vlanvalid, int vlan_tag)
 {
if (is_vlanvalid) {
p->vltag_valid = is_vlanvalid;
@@ -214,7 +214,7 @@ static int xgmac_tx_ctxt_desc_get_cde(struct 
xgmac_tx_ctxt_desc *p)
 
 /* DMA RX descriptor ring initialization */
 static void xgmac_init_rx_desc(struct xgmac_rx_norm_desc *p, int disable_rx_ic,
-   int mode, int end)
+  int mode, int end)
 {
p->rdes23.rx_rd_des23.own_bit = 1;
if (disable_rx_ic)
@@ -413,7 +413,7 @@ static void xgmac_set_ctxt_rx_owner(struct 
xgmac_rx_ctxt_desc *p)
 
 /* Return the reception status looking at Context control information */
 static void xgmac_rx_ctxt_wbstatus(struct xgmac_rx_ctxt_desc *p,
-   struct xgmac_extra_stats *x)
+  struct xgmac_extra_stats *x)
 {
if (p->tstamp_dropped)
x->timestamp_dropped++;
@@ -445,7 +445,7 @@ static void xgmac_rx_ctxt_wbstatus(struct 
xgmac_rx_ctxt_desc *p,
x->rx_ptp_resv_msg_type++;
 }
 
-/* get rx timestamp status */
+/* Get rx timestamp status */
 static int xgmac_get_rx_ctxt_tstamp_status(struct xgmac_rx_ctxt_desc *p)
 {
if ((p->tstamp_hi == 0x) && (p->tstamp_lo == 0x)) {
diff --git a/drivers/net/ethernet/samsung/xgmac_desc.h 
b/drivers/net/ethernet/samsung/xgmac_desc.h
index 028b505..8433030 100644
--- a/drivers/net/ethernet/samsung/xgmac_desc.h
+++ b/drivers/net/ethernet/samsung/xgmac_desc.h
@@ -14,7 +14,7 @@
 
 #define XGMAC_DESC_SIZE_BYTES  16
 
-/* forward declatarion */
+/* forward declaration */
 struct xgmac_extra_stats;
 
 /* Transmit checksum insertion control */
diff --git a/drivers/net/ethernet/samsung/xgmac_dma.c 
b/drivers/net/ethernet/samsung/xgmac_dma.c
index 384866c..9a22990a 100644
--- a/drivers/net/ethernet/samsung/xgmac_dma.c
+++ b/drivers/net/ethernet/samsung/xgmac_dma.c
@@ -20,9 +20,10 @@
 #include "xgmac_dma.h"
 #include "xgmac_reg.h"
 #include "xgmac_desc.h"
+
 /* DMA core initialization */
 static int xgmac_dma_init(void __iomem *ioaddr, int fix_burst,
-int burst_map, int adv_addr_mode)
+ int burst_map, int adv_addr_mode)
 {
int retry_count = 10;
u32 reg_val;
diff --git a/drivers/net/ethernet/samsung/xgmac_dma.h 
b/drivers/net/ethernet/samsung/xgmac_dma.h
index 2e76ae0..022fd2b 100644
--- a/drivers/net/ethernet/samsung/xgmac_dma.h
+++ b/drivers/net/ethernet/samsung/xgmac_dma.h
@@ -12,7 +12,7 @@
 #ifndef __XGMAC_DMA_H__
 #define __XGMAC_DMA_H__
 
-/* forward declatarion */
+/* forward declaration */
 struct xgmac_extra_stats;
 
 #define XGMAC_DMA_BLENMA

[PATCH 3/5] samsung: xgmac: Use more current logging style

2014-03-05 Thread Joe Perches
Use netdev_ and netif_ where appropriate.
Remove else and unnecessary indentation around if goto else.

Signed-off-by: Joe Perches 
---
 drivers/net/ethernet/samsung/xgmac_ethtool.c  |   2 +-
 drivers/net/ethernet/samsung/xgmac_main.c | 185 --
 drivers/net/ethernet/samsung/xgmac_mdio.c |  13 +-
 drivers/net/ethernet/samsung/xgmac_platform.c |   4 +-
 4 files changed, 95 insertions(+), 109 deletions(-)

diff --git a/drivers/net/ethernet/samsung/xgmac_ethtool.c 
b/drivers/net/ethernet/samsung/xgmac_ethtool.c
index 576b23e..378f6f1 100644
--- a/drivers/net/ethernet/samsung/xgmac_ethtool.c
+++ b/drivers/net/ethernet/samsung/xgmac_ethtool.c
@@ -203,7 +203,7 @@ static int xgmac_set_wol(struct net_device *dev, struct 
ethtool_wolinfo *wol)
return -EOPNOTSUPP;
 
if (wol->wolopts) {
-   pr_info("wakeup enable\n");
+   netdev_info(dev, "wakeup enable\n");
device_set_wakeup_enable(priv->device, true);
enable_irq_wake(priv->wol_irq);
} else {
diff --git a/drivers/net/ethernet/samsung/xgmac_main.c 
b/drivers/net/ethernet/samsung/xgmac_main.c
index a212abf..f642c99 100644
--- a/drivers/net/ethernet/samsung/xgmac_main.c
+++ b/drivers/net/ethernet/samsung/xgmac_main.c
@@ -267,9 +267,9 @@ static void xgmac_adjust_link(struct net_device *dev)
speed = XGMAC_SPEED_1G;
break;
default:
-   if (netif_msg_link(priv))
-   pr_err("%s: Speed (%d) not supported\n",
-  dev->name, phydev->speed);
+   netif_err(priv, link, dev,
+ "Speed (%d) not supported\n",
+ phydev->speed);
}
 
priv->speed = phydev->speed;
@@ -323,12 +323,12 @@ static int xgmac_init_phy(struct net_device *ndev)
 
snprintf(phy_id_fmt, MII_BUS_ID_SIZE + 3, PHY_ID_FMT, bus_id,
 priv->plat->phy_addr);
-   pr_debug("%s: trying to attach to %s\n", __func__, phy_id_fmt);
+   netdev_dbg(ndev, "%s: trying to attach to %s\n", __func__, phy_id_fmt);
 
phydev = phy_connect(ndev, phy_id_fmt, &xgmac_adjust_link, phy_iface);
 
if (IS_ERR(phydev)) {
-   pr_err("%s: Could not attach to PHY\n", ndev->name);
+   netdev_err(ndev, "Could not attach to PHY\n");
return PTR_ERR(phydev);
}
 
@@ -342,8 +342,8 @@ static int xgmac_init_phy(struct net_device *ndev)
return -ENODEV;
}
 
-   pr_debug("%s: %s: attached to PHY (UID 0x%x) Link = %d\n",
-__func__, ndev->name, phydev->phy_id, phydev->link);
+   netdev_dbg(ndev, "%s: attached to PHY (UID 0x%x) Link = %d\n",
+  __func__, phydev->phy_id, phydev->link);
 
/* save phy device in private structure */
priv->phydev = phydev;
@@ -387,7 +387,7 @@ static int xgmac_init_rx_buffers(struct net_device *dev,
 
skb = __netdev_alloc_skb(dev, dma_buf_sz, GFP_KERNEL);
if (!skb) {
-   pr_err("%s: Rx init fails; skb is NULL\n", __func__);
+   netdev_err(dev, "%s: Rx init fails; skb is NULL\n", __func__);
return -ENOMEM;
}
skb_reserve(skb, NET_IP_ALIGN);
@@ -397,9 +397,9 @@ static int xgmac_init_rx_buffers(struct net_device *dev,
dma_buf_sz, DMA_FROM_DEVICE);
 
if (dma_mapping_error(priv->device, rx_ring->rx_skbuff_dma[i])) {
-   pr_err("%s: DMA mapping error\n", __func__);
-   dev_kfree_skb_any(skb);
-   return -EINVAL;
+   netdev_err(dev, "%s: DMA mapping error\n", __func__);
+   dev_kfree_skb_any(skb);
+   return -EINVAL;
}
 
p->rdes23.rx_rd_des23.buf2_addr = rx_ring->rx_skbuff_dma[i];
@@ -499,60 +499,51 @@ static int init_rx_ring(struct net_device *dev, u8 
queue_no,
/* Set the max buffer size according to the MTU. */
bfsize = ALIGN(dev->mtu + ETH_HLEN + ETH_FCS_LEN + NET_IP_ALIGN, 8);
 
-   if (netif_msg_probe(priv))
-   pr_debug("%s: bfsize %d\n", __func__, bfsize);
+   netif_dbg(priv, probe, dev, "%s: bfsize %d\n", __func__, bfsize);
 
/* RX ring is not allcoated */
if (rx_ring == NULL) {
-   pr_err("No memory for RX queue\n");
+   netdev_err(dev, "No memory for RX queue\n");
goto error;
-   } else {
-   /* assign queue number */
-   rx_ring->queue_no = queue_no;
-
-   /* allocate memory for RX descriptors */
-   rx_ring->dma_rx = dma_zalloc_coherent(priv->device,
-   rx_rsize * sizeof(struct xgmac_rx_norm_desc),

[PATCH 0/5] samsung: xgmac:

2014-03-05 Thread Joe Perches
Mostly neatening and logging cleanups on top of the initial submittal.

Joe Perches (5):
  samsung: xgmac: Neatening
  samsung: xgmac: Fix pr_ uses
  samsung: xgmac: Use more current logging style
  samsung: xgmac: Neaten comments
  samsung: xgmac: Mostly whitespace neatening

 drivers/net/ethernet/samsung/xgmac_common.h   |  56 ++--
 drivers/net/ethernet/samsung/xgmac_core.c |  28 +-
 drivers/net/ethernet/samsung/xgmac_desc.c |  39 ++-
 drivers/net/ethernet/samsung/xgmac_desc.h |  16 +-
 drivers/net/ethernet/samsung/xgmac_dma.c  |  49 ++--
 drivers/net/ethernet/samsung/xgmac_dma.h  |  12 +-
 drivers/net/ethernet/samsung/xgmac_ethtool.c  |  95 ---
 drivers/net/ethernet/samsung/xgmac_main.c | 389 +-
 drivers/net/ethernet/samsung/xgmac_mdio.c |  58 ++--
 drivers/net/ethernet/samsung/xgmac_mtl.c  |  15 +-
 drivers/net/ethernet/samsung/xgmac_mtl.h  |  14 +-
 drivers/net/ethernet/samsung/xgmac_platform.c |  45 +--
 drivers/net/ethernet/samsung/xgmac_reg.h  | 190 ++---
 13 files changed, 502 insertions(+), 504 deletions(-)

-- 
1.8.1.2.459.gbcd45b4.dirty

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[PATCH 1/5] samsung: xgmac: Neatening

2014-03-05 Thread Joe Perches
Quiet checkpatch noise:
o Multi-line statement alignment
o Add braces
o Move logical continuations
o Remove externs from .h
o Remove unnecessary blank lines around braces

Typo fixes where noticed.
Change logic to return first to reduce indentation.

Signed-off-by: Joe Perches 
---
 drivers/net/ethernet/samsung/xgmac_common.h  | 24 
 drivers/net/ethernet/samsung/xgmac_desc.c|  4 --
 drivers/net/ethernet/samsung/xgmac_dma.c | 32 +-
 drivers/net/ethernet/samsung/xgmac_ethtool.c | 67 ++--
 drivers/net/ethernet/samsung/xgmac_main.c| 92 +---
 drivers/net/ethernet/samsung/xgmac_mdio.c| 13 ++--
 drivers/net/ethernet/samsung/xgmac_mtl.c |  4 +-
 7 files changed, 115 insertions(+), 121 deletions(-)

diff --git a/drivers/net/ethernet/samsung/xgmac_common.h 
b/drivers/net/ethernet/samsung/xgmac_common.h
index 4932824..4c46504 100644
--- a/drivers/net/ethernet/samsung/xgmac_common.h
+++ b/drivers/net/ethernet/samsung/xgmac_common.h
@@ -544,24 +544,24 @@ struct xgmac_priv_data {
 };
 
 /* Function prototypes */
-extern struct xgmac_priv_data *xgmac_dvr_probe(struct device *device,
+struct xgmac_priv_data *xgmac_dvr_probe(struct device *device,
struct xgmac_plat_data *plat_dat,
void __iomem *addr);
-extern int xgmac_dvr_remove(struct net_device *ndev);
-extern void xgmac_set_ethtool_ops(struct net_device *netdev);
-extern int xgmac_mdio_unregister(struct net_device *ndev);
-extern int xgmac_mdio_register(struct net_device *ndev);
-extern int xgmac_register_platform(void);
-extern void xgmac_unregister_platform(void);
+int xgmac_dvr_remove(struct net_device *ndev);
+void xgmac_set_ethtool_ops(struct net_device *netdev);
+int xgmac_mdio_unregister(struct net_device *ndev);
+int xgmac_mdio_register(struct net_device *ndev);
+int xgmac_register_platform(void);
+void xgmac_unregister_platform(void);
 
 #ifdef CONFIG_PM
-extern int xgmac_suspend(struct net_device *ndev);
-extern int xgmac_resume(struct net_device *ndev);
-extern int xgmac_freeze(struct net_device *ndev);
-extern int xgmac_restore(struct net_device *ndev);
+int xgmac_suspend(struct net_device *ndev);
+int xgmac_resume(struct net_device *ndev);
+int xgmac_freeze(struct net_device *ndev);
+int xgmac_restore(struct net_device *ndev);
 #endif /* CONFIG_PM */
 
-extern const struct xgmac_mtl_ops *xgmac_get_mtl_ops(void);
+const struct xgmac_mtl_ops *xgmac_get_mtl_ops(void);
 
 void xgmac_disable_eee_mode(struct xgmac_priv_data * const priv);
 bool xgmac_eee_init(struct xgmac_priv_data * const priv);
diff --git a/drivers/net/ethernet/samsung/xgmac_desc.c 
b/drivers/net/ethernet/samsung/xgmac_desc.c
index c5417de..ddf3e94 100644
--- a/drivers/net/ethernet/samsung/xgmac_desc.c
+++ b/drivers/net/ethernet/samsung/xgmac_desc.c
@@ -196,7 +196,6 @@ static void xgmac_tx_ctxt_desc_set_tstamp(struct 
xgmac_tx_ctxt_desc *p,
p->tstamp_lo = (u32) tstamp;
p->tstamp_hi = (u32) (tstamp>>32);
}
-
 }
 /* Close TX context descriptor */
 static void xgmac_tx_ctxt_desc_close(struct xgmac_tx_ctxt_desc *p)
@@ -217,7 +216,6 @@ static void xgmac_init_rx_desc(struct xgmac_rx_norm_desc 
*p, int disable_rx_ic,
p->rdes23.rx_rd_des23.own_bit = 1;
if (disable_rx_ic)
p->rdes23.rx_rd_des23.int_on_com = disable_rx_ic;
-
 }
 
 /* Get RX own bit */
@@ -337,7 +335,6 @@ static int xgmac_rx_wbstatus(struct xgmac_rx_norm_desc *p,
pr_err("\tInvalid L2 Packet type\n");
break;
}
-
}
 
/* L3/L4 Pkt type */
@@ -443,7 +440,6 @@ static void xgmac_rx_ctxt_wbstatus(struct 
xgmac_rx_ctxt_desc *p,
x->rx_ptp_signal++;
else if (p->ptp_msgtype == RX_PTP_RESV_MSG)
x->rx_ptp_resv_msg_type++;
-
 }
 
 /* get rx timestamp status */
diff --git a/drivers/net/ethernet/samsung/xgmac_dma.c 
b/drivers/net/ethernet/samsung/xgmac_dma.c
index 47945a3..384866c 100644
--- a/drivers/net/ethernet/samsung/xgmac_dma.c
+++ b/drivers/net/ethernet/samsung/xgmac_dma.c
@@ -85,14 +85,14 @@ static void xgmac_dma_channel_init(void __iomem *ioaddr, 
int cha_num,
 
/* program desc registers */
writel((dma_tx >> 32),
-   ioaddr + XGMAC_DMA_CHA_TXDESC_HADD_REG(cha_num));
+  ioaddr + XGMAC_DMA_CHA_TXDESC_HADD_REG(cha_num));
writel((dma_tx & 0x),
-   ioaddr + XGMAC_DMA_CHA_TXDESC_LADD_REG(cha_num));
+  ioaddr + XGMAC_DMA_CHA_TXDESC_LADD_REG(cha_num));
 
writel((dma_rx >> 32),
-   ioaddr + XGMAC_DMA_CHA_RXDESC_HADD_REG(cha_num));
+  ioaddr + XGMAC_DMA_CHA_RXDESC_HADD_REG(cha_num));
writel((dma_rx & 0x),
-   ioaddr + XGMAC_DMA_CHA_RXDESC_LADD_REG(cha_num));
+  ioaddr + XGMAC_DMA_CHA_RXDESC_LADD_REG(cha_num));
 
/* program ta

[PATCH 2/5] samsung: xgmac: Fix pr_ uses

2014-03-05 Thread Joe Perches
Use pr_fmt to prefix messages consistently with "samsung_xgmac: ".
Add missing newlines.
Use print_hex_dump_debug.
Alignment neatening of pr_ uses.

Signed-off-by: Joe Perches 
---
 drivers/net/ethernet/samsung/xgmac_core.c |  8 ++--
 drivers/net/ethernet/samsung/xgmac_desc.c | 11 +++--
 drivers/net/ethernet/samsung/xgmac_ethtool.c  |  5 +-
 drivers/net/ethernet/samsung/xgmac_main.c | 69 +--
 drivers/net/ethernet/samsung/xgmac_mdio.c |  5 +-
 drivers/net/ethernet/samsung/xgmac_mtl.c  |  7 ++-
 drivers/net/ethernet/samsung/xgmac_platform.c | 15 +++---
 7 files changed, 67 insertions(+), 53 deletions(-)

diff --git a/drivers/net/ethernet/samsung/xgmac_core.c 
b/drivers/net/ethernet/samsung/xgmac_core.c
index 8fa2241..c5afba4 100644
--- a/drivers/net/ethernet/samsung/xgmac_core.c
+++ b/drivers/net/ethernet/samsung/xgmac_core.c
@@ -11,6 +11,8 @@
  * published by the Free Software Foundation.
  */
 
+#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
+
 #include 
 #include 
 #include 
@@ -92,15 +94,15 @@ static void xgmac_core_pmt(void __iomem *ioaddr, unsigned 
long mode)
unsigned int pmt = 0;
 
if (mode & WAKE_MAGIC) {
-   pr_debug("GMAC: WOL Magic frame\n");
+   pr_debug("WOL Magic frame\n");
pmt |= PMT_MGPKT_EN;
}
if (mode & WAKE_UCAST) {
-   pr_debug("GMAC: WOL on global unicast\n");
+   pr_debug("WOL on global unicast\n");
pmt |= PMT_GUCAST_EN;
}
if (mode & (WAKE_MCAST | WAKE_BCAST)) {
-   pr_debug("GMAC: WOL on any other packet\n");
+   pr_debug("WOL on any other packet\n");
pmt |= PMT_RWKPKT_EN;
}
 
diff --git a/drivers/net/ethernet/samsung/xgmac_desc.c 
b/drivers/net/ethernet/samsung/xgmac_desc.c
index ddf3e94..ef25efd 100644
--- a/drivers/net/ethernet/samsung/xgmac_desc.c
+++ b/drivers/net/ethernet/samsung/xgmac_desc.c
@@ -9,6 +9,9 @@
  * it under the terms of the GNU General Public License version 2 as
  * published by the Free Software Foundation.
  */
+
+#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
+
 #include 
 #include 
 #include 
@@ -287,7 +290,7 @@ static int xgmac_rx_wbstatus(struct xgmac_rx_norm_desc *p,
x->overflow_error++;
break;
default:
-   pr_err("\tInvalid Error type\n");
+   pr_err("Invalid Error type\n");
break;
}
} else {
@@ -332,7 +335,7 @@ static int xgmac_rx_wbstatus(struct xgmac_rx_norm_desc *p,
x->dvlan_ocvlan_icvlan_pkt++;
break;
default:
-   pr_err("\tInvalid L2 Packet type\n");
+   pr_err("Invalid L2 Packet type\n");
break;
}
}
@@ -367,7 +370,7 @@ static int xgmac_rx_wbstatus(struct xgmac_rx_norm_desc *p,
x->ip6_unknown_pkt++;
break;
default:
-   pr_err("\tInvalid L3/L4 Packet type\n");
+   pr_err("Invalid L3/L4 Packet type\n");
break;
}
 
@@ -446,7 +449,7 @@ static void xgmac_rx_ctxt_wbstatus(struct 
xgmac_rx_ctxt_desc *p,
 static int xgmac_get_rx_ctxt_tstamp_status(struct xgmac_rx_ctxt_desc *p)
 {
if ((p->tstamp_hi == 0x) && (p->tstamp_lo == 0x)) {
-   pr_err("\tTime stamp corrupted\n");
+   pr_err("Time stamp corrupted\n");
return 0;
}
 
diff --git a/drivers/net/ethernet/samsung/xgmac_ethtool.c 
b/drivers/net/ethernet/samsung/xgmac_ethtool.c
index 3f0698a..576b23e 100644
--- a/drivers/net/ethernet/samsung/xgmac_ethtool.c
+++ b/drivers/net/ethernet/samsung/xgmac_ethtool.c
@@ -9,6 +9,9 @@
  * it under the terms of the GNU General Public License version 2 as
  * published by the Free Software Foundation.
  */
+
+#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
+
 #include 
 #include 
 #include 
@@ -200,7 +203,7 @@ static int xgmac_set_wol(struct net_device *dev, struct 
ethtool_wolinfo *wol)
return -EOPNOTSUPP;
 
if (wol->wolopts) {
-   pr_info("xgmac: wakeup enable\n");
+   pr_info("wakeup enable\n");
device_set_wakeup_enable(priv->device, true);
enable_irq_wake(priv->wol_irq);
} else {
diff --git a/drivers/net/ethernet/samsung/xgmac_main.c 
b/drivers/net/ethernet/samsung/xgmac_main.c
index 05853d2..a212abf 100644
--- a/drivers/net/ethernet/samsung/xgmac_main.c
+++ b/drivers/net/ethernet/samsung/xgmac_main.c
@@ -9,6 +9,9 @@
  * it under the terms of the GNU General Public License version 2 as
  * published by the Free Software Foundation.
  */
+
+#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
+
 #include 
 #include 
 #include 
@@ -166,7 +169,7 @@ bool xgmac_eee_init(struct xgmac_priv_data * const priv)
   

Re: [PATCH v2 6/6] PCI: designware: use new OF interrupt mapping when possible

2014-03-05 Thread Jason Gunthorpe
On Wed, Mar 05, 2014 at 02:25:51PM +0100, Lucas Stach wrote:
> - return pp->irq;
> + irq = of_irq_parse_and_map_pci(dev, slot, pin);
> + if (!irq)
> + irq = pp->irq;

In light of the two bugs that Tim found, it might be wise to throw a
'dev_warn(FW_BUG "Missing DT interrupt mapping")' in the fall back
path, so it doesn't continue to silently cover up errors on the OF/DT
side..

Regards,
Jason
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Re: [PATCH 1/7] net: xgmac: add basic framework for Samsung 10Gb ethernet driver

2014-03-05 Thread Joe Perches
On Wed, 2014-03-05 at 20:28 +0900, Byungho An wrote:
> From: Siva Reddy 

Just a few trivial comments on a brief scan.

> +/* Context descriptor structure */
> +struct xgmac_tx_ctxt_desc {
> + u32 tstamp_lo:32;
> + u32 tstamp_hi:32;

I think u32 foo:32; is odd at best
and may cause compiler oddities.

> diff --git a/drivers/net/ethernet/samsung/xgmac_main.c 
> b/drivers/net/ethernet/samsung/xgmac_main.c
[]
> +static void print_pkt(unsigned char *buf, int len)
> +{
> + int j;
> + pr_debug("len = %d byte, buf addr: 0x%p", len, buf);
> + for (j = 0; j < len; j++) {
> + if ((j % 16) == 0)
> + pr_debug("\n %03x:", j);
> + pr_debug(" %02x", buf[j]);
> + }
> + pr_debug("\n");
> +}

This will make a mess.  Use print_hex_dump_debug.

> +static int xgmac_open(struct net_device *dev)
> +{
[]
>   if (ret) {
> + pr_err("%s: Cannot attach to PHY (error: %d)\n",
> + __func__, ret);

A lot of the message logging would be better using
more verbose forms like;

netdev_(dev, etc...)

[]

> +/* xgmac_config - entry point for changing configuration mode passed on by
> + * ifconfig
> + * @dev : pointer to the device structure
> + * @map : pointer to the device mapping structure
> + * Description:
> + * This function is a driver entry point which gets called by the kernel
> + * whenever some device configuration is changed.
> + * Return value:
> + * This function returns 0 if success and appropriate error otherwise.
> + */

It might be nicer if you used kernel-doc forms startig with
/**
for these comments everywhere.


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Re: [PATCH v2 03/11] ARM: exynos: Move to generic power domain bindings

2014-03-05 Thread Tomasz Figa

Hi Bartek,

On 05.03.2014 17:15, Bartlomiej Zolnierkiewicz wrote:


Hi Tomek,

On Monday, March 03, 2014 05:02:08 PM Tomasz Figa wrote:

This patch moves Exynos power domain code to use the new generic power
domain look-up framework introduced by previous patch, allowing the new
code to be compiled with CONFIG_ARCH_EXYNOS selected as well.

Signed-off-by: Tomasz Figa 
---
  .../bindings/arm/exynos/power_domain.txt   | 12 ++--
  arch/arm/mach-exynos/pm_domains.c  | 80 +-
  kernel/power/Kconfig   |  2 +-
  3 files changed, 7 insertions(+), 87 deletions(-)

diff --git a/Documentation/devicetree/bindings/arm/exynos/power_domain.txt 
b/Documentation/devicetree/bindings/arm/exynos/power_domain.txt
index 5216b41..60f26a8 100644
--- a/Documentation/devicetree/bindings/arm/exynos/power_domain.txt
+++ b/Documentation/devicetree/bindings/arm/exynos/power_domain.txt
@@ -8,6 +8,8 @@ Required Properties:
  * samsung,exynos4210-pd - for exynos4210 type power domain.
  - reg: physical base address of the controller and length of memory mapped
  region.
+- #power-domain-cells: number of cells in power domain specifier;
+must be 0.

  Node of a device using power domains must have a samsung,power-domain property
  defined with a phandle to respective power domain.
@@ -17,12 +19,8 @@ Example:
lcd0: power-domain-lcd0 {
compatible = "samsung,exynos4210-pd";
reg = <0x10023C00 0x10>;
+   #power-domain-cells = <0>;
};

-Example of the node using power domain:
-
-   node {
-   /* ... */
-   samsung,power-domain = <&lcd0>;
-   /* ... */
-   };
+See Documentation/devicetree/bindings/power/power_domain.txt for description
+of consumer-side bindings.
diff --git a/arch/arm/mach-exynos/pm_domains.c 
b/arch/arm/mach-exynos/pm_domains.c
index 8fd2488..48ee6c9 100644
--- a/arch/arm/mach-exynos/pm_domains.c
+++ b/arch/arm/mach-exynos/pm_domains.c
@@ -75,78 +75,6 @@ static int exynos_pd_power_off(struct generic_pm_domain 
*domain)
return exynos_pd_power(domain, false);
  }

-static void exynos_add_device_to_domain(struct exynos_pm_domain *pd,
-struct device *dev)
-{
-   int ret;
-
-   dev_dbg(dev, "adding to power domain %s\n", pd->pd.name);
-
-   while (1) {
-   ret = pm_genpd_add_device(&pd->pd, dev);
-   if (ret != -EAGAIN)
-   break;
-   cond_resched();
-   }
-
-   pm_genpd_dev_need_restore(dev, true);
-}
-
-static void exynos_remove_device_from_domain(struct device *dev)
-{
-   struct generic_pm_domain *genpd = dev_to_genpd(dev);
-   int ret;
-
-   dev_dbg(dev, "removing from power domain %s\n", genpd->name);
-
-   while (1) {
-   ret = pm_genpd_remove_device(genpd, dev);
-   if (ret != -EAGAIN)
-   break;
-   cond_resched();
-   }
-}
-
-static void exynos_read_domain_from_dt(struct device *dev)
-{
-   struct platform_device *pd_pdev;
-   struct exynos_pm_domain *pd;
-   struct device_node *node;
-
-   node = of_parse_phandle(dev->of_node, "samsung,power-domain", 0);


This removes "samsung,power-domain" phandle handling but I cannot find
in your patch series updates to existing EXYNOS dts files converting
them to use the new "power-domain" property.  Am I missing something?


Patch 01/11 adds generic parsing code along with fallback to the legacy 
"samsung,power-domain" property, if the generic one is not present, as 
it was pretty straightforward to implement it there.


Best regards,
Tomasz
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Re: [PATCH v2 03/11] ARM: exynos: Move to generic power domain bindings

2014-03-05 Thread Bartlomiej Zolnierkiewicz

Hi Tomek,

On Monday, March 03, 2014 05:02:08 PM Tomasz Figa wrote:
> This patch moves Exynos power domain code to use the new generic power
> domain look-up framework introduced by previous patch, allowing the new
> code to be compiled with CONFIG_ARCH_EXYNOS selected as well.
> 
> Signed-off-by: Tomasz Figa 
> ---
>  .../bindings/arm/exynos/power_domain.txt   | 12 ++--
>  arch/arm/mach-exynos/pm_domains.c  | 80 
> +-
>  kernel/power/Kconfig   |  2 +-
>  3 files changed, 7 insertions(+), 87 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/arm/exynos/power_domain.txt 
> b/Documentation/devicetree/bindings/arm/exynos/power_domain.txt
> index 5216b41..60f26a8 100644
> --- a/Documentation/devicetree/bindings/arm/exynos/power_domain.txt
> +++ b/Documentation/devicetree/bindings/arm/exynos/power_domain.txt
> @@ -8,6 +8,8 @@ Required Properties:
>  * samsung,exynos4210-pd - for exynos4210 type power domain.
>  - reg: physical base address of the controller and length of memory mapped
>  region.
> +- #power-domain-cells: number of cells in power domain specifier;
> +must be 0.
>  
>  Node of a device using power domains must have a samsung,power-domain 
> property
>  defined with a phandle to respective power domain.
> @@ -17,12 +19,8 @@ Example:
>   lcd0: power-domain-lcd0 {
>   compatible = "samsung,exynos4210-pd";
>   reg = <0x10023C00 0x10>;
> + #power-domain-cells = <0>;
>   };
>  
> -Example of the node using power domain:
> -
> - node {
> - /* ... */
> - samsung,power-domain = <&lcd0>;
> - /* ... */
> - };
> +See Documentation/devicetree/bindings/power/power_domain.txt for description
> +of consumer-side bindings.
> diff --git a/arch/arm/mach-exynos/pm_domains.c 
> b/arch/arm/mach-exynos/pm_domains.c
> index 8fd2488..48ee6c9 100644
> --- a/arch/arm/mach-exynos/pm_domains.c
> +++ b/arch/arm/mach-exynos/pm_domains.c
> @@ -75,78 +75,6 @@ static int exynos_pd_power_off(struct generic_pm_domain 
> *domain)
>   return exynos_pd_power(domain, false);
>  }
>  
> -static void exynos_add_device_to_domain(struct exynos_pm_domain *pd,
> -  struct device *dev)
> -{
> - int ret;
> -
> - dev_dbg(dev, "adding to power domain %s\n", pd->pd.name);
> -
> - while (1) {
> - ret = pm_genpd_add_device(&pd->pd, dev);
> - if (ret != -EAGAIN)
> - break;
> - cond_resched();
> - }
> -
> - pm_genpd_dev_need_restore(dev, true);
> -}
> -
> -static void exynos_remove_device_from_domain(struct device *dev)
> -{
> - struct generic_pm_domain *genpd = dev_to_genpd(dev);
> - int ret;
> -
> - dev_dbg(dev, "removing from power domain %s\n", genpd->name);
> -
> - while (1) {
> - ret = pm_genpd_remove_device(genpd, dev);
> - if (ret != -EAGAIN)
> - break;
> - cond_resched();
> - }
> -}
> -
> -static void exynos_read_domain_from_dt(struct device *dev)
> -{
> - struct platform_device *pd_pdev;
> - struct exynos_pm_domain *pd;
> - struct device_node *node;
> -
> - node = of_parse_phandle(dev->of_node, "samsung,power-domain", 0);

This removes "samsung,power-domain" phandle handling but I cannot find
in your patch series updates to existing EXYNOS dts files converting
them to use the new "power-domain" property.  Am I missing something?

Best regards,
--
Bartlomiej Zolnierkiewicz
Samsung R&D Institute Poland
Samsung Electronics

> - if (!node)
> - return;
> - pd_pdev = of_find_device_by_node(node);
> - if (!pd_pdev)
> - return;
> - pd = platform_get_drvdata(pd_pdev);
> - exynos_add_device_to_domain(pd, dev);
> -}
> -
> -static int exynos_pm_notifier_call(struct notifier_block *nb,
> - unsigned long event, void *data)
> -{
> - struct device *dev = data;
> -
> - switch (event) {
> - case BUS_NOTIFY_BIND_DRIVER:
> - if (dev->of_node)
> - exynos_read_domain_from_dt(dev);
> -
> - break;
> -
> - case BUS_NOTIFY_UNBOUND_DRIVER:
> - exynos_remove_device_from_domain(dev);
> -
> - break;
> - }
> - return NOTIFY_DONE;
> -}
> -
> -static struct notifier_block platform_nb = {
> - .notifier_call = exynos_pm_notifier_call,
> -};
> -
>  static __init int exynos4_pm_init_power_domain(void)
>  {
>   struct platform_device *pdev;
> @@ -156,8 +84,6 @@ static __init int exynos4_pm_init_power_domain(void)
>   struct exynos_pm_domain *pd;
>   int on;
>  
> - pdev = of_find_device_by_node(np);
> -
>   pd = kzalloc(sizeof(*pd), GFP_KERNEL);
>   if (!pd) {
>   pr_err("%s: failed to allocate memory for domain\n",
> @@ -170,17 +96,13 @@ 

Re: [PATCH v9 3/4] phy: Add new Exynos USB 2.0 PHY driver

2014-03-05 Thread Tomasz Figa

On 05.03.2014 16:28, Kamil Debski wrote:

Add a new driver for the Exynos USB 2.0 PHY. The new driver uses the generic
PHY framework. The driver includes support for the Exynos 4x10 and 4x12
SoC families.

Signed-off-by: Kamil Debski 
---
  .../devicetree/bindings/phy/samsung-phy.txt|   53 
  Documentation/phy/samsung-usb2.txt |  134 
  drivers/phy/Kconfig|   29 ++
  drivers/phy/Makefile   |3 +
  drivers/phy/phy-exynos4210-usb2.c  |  261 
  drivers/phy/phy-exynos4x12-usb2.c  |  328 
  drivers/phy/phy-samsung-usb2.c |  222 +
  drivers/phy/phy-samsung-usb2.h |   66 
  8 files changed, 1096 insertions(+)
  create mode 100644 Documentation/phy/samsung-usb2.txt
  create mode 100644 drivers/phy/phy-exynos4210-usb2.c
  create mode 100644 drivers/phy/phy-exynos4x12-usb2.c
  create mode 100644 drivers/phy/phy-samsung-usb2.c
  create mode 100644 drivers/phy/phy-samsung-usb2.h


Reviewed-by: Tomasz Figa 

Best regards,
Tomasz
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Re: [PATCH v9 2/4] phy: core: Add devm_of_phy_get to phy-core

2014-03-05 Thread Tomasz Figa

On 05.03.2014 16:28, Kamil Debski wrote:

Adding devm_of_phy_get will allow to get phys by supplying a
pointer to the struct device_node instead of struct device.

Signed-off-by: Kamil Debski 
---
  drivers/phy/phy-core.c  |   31 +++
  include/linux/phy/phy.h |8 
  2 files changed, 39 insertions(+)


Reviewed-by: Tomasz Figa 

Best regards,
Tomasz
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Re: [PATCH v9 1/4] phy: core: Add an exported of_phy_get function

2014-03-05 Thread Tomasz Figa

On 05.03.2014 16:28, Kamil Debski wrote:

Previously the of_phy_get function took a struct device * and
was declared static. It was impossible to call it from
another driver and thus it was impossible to get phy defined
for a given node. The old function was renamed to _of_phy_get
and was left for internal use. of_phy_get function was added
and it was exported. The function enables to get a phy for
a given device tree node.

Signed-off-by: Kamil Debski 
---
  drivers/phy/phy-core.c  |   45 -
  include/linux/phy/phy.h |6 ++
  2 files changed, 42 insertions(+), 9 deletions(-)


Reviewed-by: Tomasz Figa 

Best regards,
Tomasz
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Re: [PATCH 1/1] ARM: EXYNOS: Map SYSRAM address through DT

2014-03-05 Thread Tomasz Figa



On 05.03.2014 16:36, Sachin Kamat wrote:

On 5 March 2014 18:56, Andreas Oberritter  wrote:

On 05.03.2014 09:23, Sachin Kamat wrote:

diff --git a/arch/arm/boot/dts/exynos4210-universal_c210.dts 
b/arch/arm/boot/dts/exynos4210-universal_c210.dts
index d2e3f5f5916d..3ca3fb6aa5f4 100644
--- a/arch/arm/boot/dts/exynos4210-universal_c210.dts
+++ b/arch/arm/boot/dts/exynos4210-universal_c210.dts
@@ -28,6 +28,11 @@
 bootargs = "console=ttySAC2,115200N8 root=/dev/mmcblk0p5 rw 
rootwait earlyprintk panic=5 maxcpus=1";
 };

+   sysram@0202 {

   ^

+   compatible = "samsung,exynos4210-sysram";
+   reg = <0x02025000 0x1000>;

   ^

+   };
+


Shouldn't these two addresses match?


Ideally they should. However in this case, this particular board uses
older revision
of the SoC which has a different register address. I did not want to
create a compatible
string just for this (exceptional) case alone and hence did it this
way to override the reg. address.
Other option was not to have the register address in the node name.


What about overriding status of sysram@0202 node to "disabled" and 
adding a new sysram@02025000 node in universal C210 dts?


However, I'm still a bit concerned about using such platform and 
use-case specific compatible strings here. SYSRAM is basically a normal 
SRAM memory and usually just some specific areas of it are reserved for 
special purposes.


Best regards,
Tomasz
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Re: [PATCH 1/1] ARM: EXYNOS: Map SYSRAM address through DT

2014-03-05 Thread Sachin Kamat
On 5 March 2014 18:56, Andreas Oberritter  wrote:
> On 05.03.2014 09:23, Sachin Kamat wrote:
>>> diff --git a/arch/arm/boot/dts/exynos4210-universal_c210.dts 
>>> b/arch/arm/boot/dts/exynos4210-universal_c210.dts
>>> index d2e3f5f5916d..3ca3fb6aa5f4 100644
>>> --- a/arch/arm/boot/dts/exynos4210-universal_c210.dts
>>> +++ b/arch/arm/boot/dts/exynos4210-universal_c210.dts
>>> @@ -28,6 +28,11 @@
>>> bootargs = "console=ttySAC2,115200N8 root=/dev/mmcblk0p5 rw 
>>> rootwait earlyprintk panic=5 maxcpus=1";
>>> };
>>>
>>> +   sysram@0202 {
>   ^
>>> +   compatible = "samsung,exynos4210-sysram";
>>> +   reg = <0x02025000 0x1000>;
>   ^
>>> +   };
>>> +
>
> Shouldn't these two addresses match?

Ideally they should. However in this case, this particular board uses
older revision
of the SoC which has a different register address. I did not want to
create a compatible
string just for this (exceptional) case alone and hence did it this
way to override the reg. address.
Other option was not to have the register address in the node name.

 --
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Re: [PATCH 1/1] ARM: Exynos: Add generic compatible string

2014-03-05 Thread Sachin Kamat
On 5 March 2014 17:42, Tomasz Figa  wrote:
> On 05.03.2014 09:25, Sachin Kamat wrote:
>>
>> On 25 February 2014 17:12, Arnd Bergmann  wrote:
>>>
>>> On Tuesday 25 February 2014, Olof Johansson wrote:

 I disagree. I don't know what Samsung has in mind, but the revision of
 the CPU doesn't have all that much to do with the rest of the SoC.
 It's quite likely that some vendors (maybe not Samsung, but the same
 concept applies) will ship 64-bit SoCs that are very similar to their
 preceding 32-bit ones, same IP, similar busses, etc. I'm pretty sure
 at least some vendors will do very close to that.
>>>
>>>
>>> Right.
>>>
 So, if EXYNOS4 and EXYNOS5 can share a compatible value when they use
 different CPUs, then there's no reason that whatever future 64-bit
 ones can also share it.
>>>
>>>
>>> How about putting both 'samsung,exynos' and 'samsung,exynos4' in DT then
>>> and having the platform code match exynos4 and exynos5 but not exynos?
>>>
>>> That way, I think we are consistent and future-proof. Any code that needs
>>> to know if it's running on some exynos version can just check for the
>>> 'samsung,exynos' compatible value and that will work on both arm32 and
>>> arm64. Also, if we ever decide we want to run a 32-bit kernel on a 64-bit
>>> exynos, we can just add 'samsung,exynos6' (or whatever number that will
>>> be) to the list.
>>>
>>> My usual disclaimer for this: You should never ever consider actually
>>> running a 32-bit kernel on a 64-bit CPU, but at the same time there
>>> shouldn't be any reason why it won't work either, given that we require
>>> arm64 based systems to have all SoC specific code in drivers and we
>>> can use the same drivers on arm32.
>>
>>
>> Kukjin, Tomasz,
>>
>> What is your opinion about Arnd's suggestion?
>>
>
> I would still prefer introducing a generic string for 32-bit Exynos SoCs,
> but I don't think it really matters a lot. I guess we can stick to just
> exynos4 and exynos5 compatible strings then, as long as we can merge the
> "board"-files and common.c together, since the code is pretty much
> SoC-independent now.

OK. Just wanted a confirmation before sending out the patches.
Thanks.

-- 
With warm regards,
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[PATCH v9 3/4] phy: Add new Exynos USB 2.0 PHY driver

2014-03-05 Thread Kamil Debski
Add a new driver for the Exynos USB 2.0 PHY. The new driver uses the generic
PHY framework. The driver includes support for the Exynos 4x10 and 4x12
SoC families.

Signed-off-by: Kamil Debski 
---
 .../devicetree/bindings/phy/samsung-phy.txt|   53 
 Documentation/phy/samsung-usb2.txt |  134 
 drivers/phy/Kconfig|   29 ++
 drivers/phy/Makefile   |3 +
 drivers/phy/phy-exynos4210-usb2.c  |  261 
 drivers/phy/phy-exynos4x12-usb2.c  |  328 
 drivers/phy/phy-samsung-usb2.c |  222 +
 drivers/phy/phy-samsung-usb2.h |   66 
 8 files changed, 1096 insertions(+)
 create mode 100644 Documentation/phy/samsung-usb2.txt
 create mode 100644 drivers/phy/phy-exynos4210-usb2.c
 create mode 100644 drivers/phy/phy-exynos4x12-usb2.c
 create mode 100644 drivers/phy/phy-samsung-usb2.c
 create mode 100644 drivers/phy/phy-samsung-usb2.h

diff --git a/Documentation/devicetree/bindings/phy/samsung-phy.txt 
b/Documentation/devicetree/bindings/phy/samsung-phy.txt
index c0fccaa..bf955ab 100644
--- a/Documentation/devicetree/bindings/phy/samsung-phy.txt
+++ b/Documentation/devicetree/bindings/phy/samsung-phy.txt
@@ -20,3 +20,56 @@ Required properties:
 - compatible : should be "samsung,exynos5250-dp-video-phy";
 - reg : offset and length of the Display Port PHY register set;
 - #phy-cells : from the generic PHY bindings, must be 0;
+
+Samsung S5P/EXYNOS SoC series USB PHY
+-
+
+Required properties:
+- compatible : should be one of the listed compatibles:
+   - "samsung,exynos4210-usb2-phy"
+   - "samsung,exynos4x12-usb2-phy"
+- reg : a list of registers used by phy driver
+   - first and obligatory is the location of phy modules registers
+- samsung,sysreg-phandle - handle to syscon used to control the system 
registers
+- samsung,pmureg-phandle - handle to syscon used to control PMU registers
+- #phy-cells : from the generic phy bindings, must be 1;
+- clocks and clock-names:
+   - the "phy" clock is required by the phy module, used as a gate
+   - the "ref" clock is used to get the rate of the clock provided to the
+ PHY module
+
+The first phandle argument in the PHY specifier identifies the PHY, its
+meaning is compatible dependent. For the currently supported SoCs (Exynos 4210
+and Exynos 4212) it is as follows:
+  0 - USB device ("device"),
+  1 - USB host ("host"),
+  2 - HSIC0 ("hsic0"),
+  3 - HSIC1 ("hsic1"),
+
+Exynos 4210 and Exynos 4212 use mode switching and require that mode switch
+register is supplied.
+
+Example:
+
+For Exynos 4412 (compatible with Exynos 4212):
+
+usbphy: phy@125b {
+   compatible = "samsung,exynos4x12-usb2-phy";
+   reg = <0x125b 0x100>;
+   clocks = <&clock 305>, <&clock 2>;
+   clock-names = "phy", "ref";
+   status = "okay";
+   #phy-cells = <1>;
+   samsung,sysreg-phandle = <&sys_reg>;
+   samsung,pmureg-phandle = <&pmu_reg>;
+};
+
+Then the PHY can be used in other nodes such as:
+
+phy-consumer@1234 {
+   phys = <&usbphy 2>;
+   phy-names = "phy";
+};
+
+Refer to DT bindings documentation of particular PHY consumer devices for more
+information about required PHYs and the way of specification.
diff --git a/Documentation/phy/samsung-usb2.txt 
b/Documentation/phy/samsung-usb2.txt
new file mode 100644
index 000..0c8e260
--- /dev/null
+++ b/Documentation/phy/samsung-usb2.txt
@@ -0,0 +1,134 @@
+.--+
+|  Samsung USB 2.0 PHY adaptation layer   |
++-+'
+
+| 1. Description
++
+
+The architecture of the USB 2.0 PHY module in Samsung SoCs is similar
+among many SoCs. In spite of the similarities it proved difficult to
+create a one driver that would fit all these PHY controllers. Often
+the differences were minor and were found in particular bits of the
+registers of the PHY. In some rare cases the order of register writes or
+the PHY powering up process had to be altered. This adaptation layer is
+a compromise between having separate drivers and having a single driver
+with added support for many special cases.
+
+| 2. Files description
++--
+
+- phy-samsung-usb2.c
+   This is the main file of the adaptation layer. This file contains
+   the probe function and provides two callbacks to the Generic PHY
+   Framework. This two callbacks are used to power on and power off the
+   phy. They carry out the common work that has to be done on all version
+   of the PHY module. Depending on which SoC was chosen they execute SoC
+   specific callbacks. The specific SoC version is selected by choosing
+   the appropriate compatible string. In addi

[PATCH v9 2/4] phy: core: Add devm_of_phy_get to phy-core

2014-03-05 Thread Kamil Debski
Adding devm_of_phy_get will allow to get phys by supplying a
pointer to the struct device_node instead of struct device.

Signed-off-by: Kamil Debski 
---
 drivers/phy/phy-core.c  |   31 +++
 include/linux/phy/phy.h |8 
 2 files changed, 39 insertions(+)

diff --git a/drivers/phy/phy-core.c b/drivers/phy/phy-core.c
index 7c1b0e1..623b71c 100644
--- a/drivers/phy/phy-core.c
+++ b/drivers/phy/phy-core.c
@@ -526,6 +526,37 @@ struct phy *devm_phy_optional_get(struct device *dev, 
const char *string)
 EXPORT_SYMBOL_GPL(devm_phy_optional_get);
 
 /**
+ * devm_of_phy_get() - lookup and obtain a reference to a phy.
+ * @dev: device that requests this phy
+ * @np: node containing the phy
+ * @con_id: name of the phy from device's point of view
+ *
+ * Gets the phy using of_phy_get(), and associates a device with it using
+ * devres. On driver detach, release function is invoked on the devres data,
+ * then, devres data is freed.
+ */
+struct phy *devm_of_phy_get(struct device *dev, struct device_node *np,
+   const char *con_id)
+{
+   struct phy **ptr, *phy;
+
+   ptr = devres_alloc(devm_phy_release, sizeof(*ptr), GFP_KERNEL);
+   if (!ptr)
+   return ERR_PTR(-ENOMEM);
+
+   phy = of_phy_get(np, con_id);
+   if (!IS_ERR(phy)) {
+   *ptr = phy;
+   devres_add(dev, ptr);
+   } else {
+   devres_free(ptr);
+   }
+
+   return phy;
+}
+EXPORT_SYMBOL_GPL(devm_of_phy_get);
+
+/**
  * phy_create() - create a new phy
  * @dev: device that is creating the new phy
  * @ops: function pointers for performing phy operations
diff --git a/include/linux/phy/phy.h b/include/linux/phy/phy.h
index 2fe3194..bcbf96c 100644
--- a/include/linux/phy/phy.h
+++ b/include/linux/phy/phy.h
@@ -149,6 +149,8 @@ struct phy *phy_get(struct device *dev, const char *string);
 struct phy *phy_optional_get(struct device *dev, const char *string);
 struct phy *devm_phy_get(struct device *dev, const char *string);
 struct phy *devm_phy_optional_get(struct device *dev, const char *string);
+struct phy *devm_of_phy_get(struct device *dev, struct device_node *np,
+   const char *con_id);
 void phy_put(struct phy *phy);
 void devm_phy_put(struct device *dev, struct phy *phy);
 struct phy *of_phy_get(struct device_node *np, const char *con_id);
@@ -252,6 +254,12 @@ static inline struct phy *devm_phy_optional_get(struct 
device *dev,
return ERR_PTR(-ENOSYS);
 }
 
+struct phy *devm_of_phy_get(struct device *dev, struct device_node *np,
+   const char *con_id)
+{
+   return ERR_PTR(-ENOSYS);
+}
+
 static inline void phy_put(struct phy *phy)
 {
 }
-- 
1.7.9.5

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[PATCH v9 4/4] phy: Add Exynos 5250 support to the Exynos USB 2.0 PHY driver

2014-03-05 Thread Kamil Debski
Add support for Exynos 5250. This driver is to replace the old
USB 2.0 PHY driver.

Signed-off-by: Kamil Debski 
---
 .../devicetree/bindings/phy/samsung-phy.txt|1 +
 drivers/phy/Kconfig|   11 +
 drivers/phy/Makefile   |1 +
 drivers/phy/phy-exynos5250-usb2.c  |  404 
 drivers/phy/phy-samsung-usb2.c |6 +
 drivers/phy/phy-samsung-usb2.h |1 +
 6 files changed, 424 insertions(+)
 create mode 100644 drivers/phy/phy-exynos5250-usb2.c

diff --git a/Documentation/devicetree/bindings/phy/samsung-phy.txt 
b/Documentation/devicetree/bindings/phy/samsung-phy.txt
index bf955ab..28f9edb 100644
--- a/Documentation/devicetree/bindings/phy/samsung-phy.txt
+++ b/Documentation/devicetree/bindings/phy/samsung-phy.txt
@@ -28,6 +28,7 @@ Required properties:
 - compatible : should be one of the listed compatibles:
- "samsung,exynos4210-usb2-phy"
- "samsung,exynos4x12-usb2-phy"
+   - "samsung,exynos5250-usb2-phy"
 - reg : a list of registers used by phy driver
- first and obligatory is the location of phy modules registers
 - samsung,sysreg-phandle - handle to syscon used to control the system 
registers
diff --git a/drivers/phy/Kconfig b/drivers/phy/Kconfig
index fc5a44a..c206e25 100644
--- a/drivers/phy/Kconfig
+++ b/drivers/phy/Kconfig
@@ -125,4 +125,15 @@ config PHY_EXYNOS4X12_USB2
  Samsung USB 2.0 PHY driver is enabled and means that support for this
  particular SoC is compiled in the driver. In case of Exynos 4x12 four
  phys are available - device, host, HSIC0 and HSIC1.
+
+config PHY_EXYNOS5250_USB2
+   bool "Support for Exynos 5250"
+   depends on PHY_SAMSUNG_USB2
+   depends on SOC_EXYNOS5250
+   help
+ Enable USB PHY support for Exynos 5250. This option requires that
+ Samsung USB 2.0 PHY driver is enabled and means that support for this
+ particular SoC is compiled in the driver. In case of Exynos 5250 four
+ phys are available - device, host, HSIC0 and HSIC.
+
 endmenu
diff --git a/drivers/phy/Makefile b/drivers/phy/Makefile
index 0ea36ff..f76c239 100644
--- a/drivers/phy/Makefile
+++ b/drivers/phy/Makefile
@@ -14,3 +14,4 @@ obj-$(CONFIG_PHY_SUN4I_USB)   += phy-sun4i-usb.o
 obj-$(CONFIG_PHY_SAMSUNG_USB2) += phy-samsung-usb2.o
 obj-$(CONFIG_PHY_EXYNOS4210_USB2)  += phy-exynos4210-usb2.o
 obj-$(CONFIG_PHY_EXYNOS4X12_USB2)  += phy-exynos4x12-usb2.o
+obj-$(CONFIG_PHY_EXYNOS5250_USB2)  += phy-exynos5250-usb2.o
diff --git a/drivers/phy/phy-exynos5250-usb2.c 
b/drivers/phy/phy-exynos5250-usb2.c
new file mode 100644
index 000..94179af
--- /dev/null
+++ b/drivers/phy/phy-exynos5250-usb2.c
@@ -0,0 +1,404 @@
+/*
+ * Samsung SoC USB 1.1/2.0 PHY driver - Exynos 5250 support
+ *
+ * Copyright (C) 2013 Samsung Electronics Co., Ltd.
+ * Author: Kamil Debski 
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include "phy-samsung-usb2.h"
+
+/* Exynos USB PHY registers */
+#define EXYNOS_5250_REFCLKSEL_CRYSTAL  0x0
+#define EXYNOS_5250_REFCLKSEL_XO   0x1
+#define EXYNOS_5250_REFCLKSEL_CLKCORE  0x2
+
+#define EXYNOS_5250_FSEL_9MHZ6 0x0
+#define EXYNOS_5250_FSEL_10MHZ 0x1
+#define EXYNOS_5250_FSEL_12MHZ 0x2
+#define EXYNOS_5250_FSEL_19MHZ20x3
+#define EXYNOS_5250_FSEL_20MHZ 0x4
+#define EXYNOS_5250_FSEL_24MHZ 0x5
+#define EXYNOS_5250_FSEL_50MHZ 0x7
+
+/* Normal host */
+#define EXYNOS_5250_HOSTPHYCTRL0   0x0
+
+#define EXYNOS_5250_HOSTPHYCTRL0_PHYSWRSTALL   BIT(31)
+#define EXYNOS_5250_HOSTPHYCTRL0_REFCLKSEL_SHIFT   19
+#define EXYNOS_5250_HOSTPHYCTRL0_REFCLKSEL_MASK\
+   (0x3 << EXYNOS_5250_HOSTPHYCTRL0_REFCLKSEL_SHIFT)
+#define EXYNOS_5250_HOSTPHYCTRL0_FSEL_SHIFT16
+#define EXYNOS_5250_HOSTPHYCTRL0_FSEL_MASK \
+   (0x7 << EXYNOS_5250_HOSTPHYCTRL0_FSEL_SHIFT)
+#define EXYNOS_5250_HOSTPHYCTRL0_TESTBURNINBIT(11)
+#define EXYNOS_5250_HOSTPHYCTRL0_RETENABLE BIT(10)
+#define EXYNOS_5250_HOSTPHYCTRL0_COMMON_ON_N   BIT(9)
+#define EXYNOS_5250_HOSTPHYCTRL0_VATESTENB_MASK(0x3 << 7)
+#define EXYNOS_5250_HOSTPHYCTRL0_VATESTENB_DUAL(0x0 << 7)
+#define EXYNOS_5250_HOSTPHYCTRL0_VATESTENB_ID0 (0x1 << 7)
+#define EXYNOS_5250_HOSTPHYCTRL0_VATESTENB_ANALOGTEST  (0x2 << 7)
+#define EXYNOS_5250_HOSTPHYCTRL0_SIDDQ BIT(6)
+#define EXYNOS_5250_HOSTPHYCTRL0_FORCESLEEPBIT(5)
+#define EXYNOS_5250_HOSTPHYCTRL0_FORCESUSPEND  BIT(4)
+#define EXYNOS_5250_HOSTPHYCTRL0_WORDINTERFACE BIT(3)
+#define EXYNOS_5250_HOSTPHYCTRL0_UTMISWRS

[PATCH v9 0/4] phy: Add new Exynos USB 2.0 PHY driver

2014-03-05 Thread Kamil Debski
Hi,

This is the ninth version of this patchset. First and most significant change
since v6 is that this patchset includes only patches touching the Generic PHY
Framework. Patches to the USB controllers were stripped as they require
additional work. S5PV210 support is also omitted - it requires more testing.

Since v7 this patch includes fixes for checkpath errors and was rebased onto
Kishon's next branch. v9 brings whitespace corrections compared to v8.

Best wishes,
Kamil Debski

--
Changes from v8:
1) phy: core: Add an exported of_phy_get function
   - No changes since v8.
2) phy: core: Add devm_of_phy_get to phy-core
   - No changes since v8.
3) phy: Add new Exynos USB 2.0 PHY driver
   - Fix empty blank line at EOF errors
4) phy: Add Exynos 5250 support to the Exynos USB 2.0 PHY
   - Fix empty blank line at EOF error

--
Changes from v7:
1) phy: core: Add an exported of_phy_get function
   - No changes since v7.
2) phy: core: Add devm_of_phy_get to phy-core
   - No changes since v7.
3) phy: Add new Exynos USB 2.0 PHY driver
   - Fix checkpatch errors with code indentation and corrected whitespace.
4) phy: Add Exynos 5250 support to the Exynos USB 2.0 PHY
   - Fix checkpatch errors with code indentation and corrected whitespace.

--
Changes from v6: (not including the change that controller patches were removed
form this patchset, also this patchset excludes S5PV210 support - it needs more
testing)
1) phy: core: Add an exported of_phy_get function
   - No changes since v6.
2) phy: core: Add devm_of_phy_get to phy-core
   - No changes since v6.
3) phy: Add new Exynos USB 2.0 PHY driver
   - Changed the way clocks are supplied to the driver. Prior to version v7
 there were reference clocks for every phy instance, now a single "ref"
 clock was introduced.
   - Updated documentation to match the aforementioned change.
   - Add offset EXYNOS_*_UPHYCLK_PHYFSEL_OFFSET to the clock register content
 defines.
   - Corrected way clock register is modified. Instead of a simple write, a
 proper read, modify, write sequence was introduced.
   - Important stability fix - added udelay after PHY reset. This fixes a bug
 causing instability in USB LAN adapters. Without the delay the DMA burst
 mode was could not be enabled.
4) phy: Add Exynos 5250 support to the Exynos USB 2.0 PHY
   - Changed handling of clocks to use a single "ref" clock.


Changes from v5:
1) phy: core: Add an exported of_phy_get function
- corrected behaviour of the modification when GENERIC_PHY is not enabled
  by adding a stub of the of_phy_get function
2) phy: core: Add devm_of_phy_get to phy-core
- corrected behaviour of the modification when GENERIC_PHY is not enabled
  by adding a stub of the devm_of_phy_get function
3) dts: Add usb2phy to Exynos 4
- no change
4) dts: Add usb2phy to Exynos 5250
- in the previous version, this patch included some phy-exynos5250-usb2.c code
  by mistake, the code has been remove and added to the proper patch
5) phy: Add new Exynos USB PHY driver
- changed strings from Exynos 4212 to Exynos 4x12, as the Exynos 4212 driver is
  actually a driver for the whole Exynos 4x12 family
- added documentation to the Exynos USB 2.0 PHY driver adaptaion layer
- corrected strings HSCI -> HSIC
- fixed a problem introduced by previous change - on Exynos 4x12 the HSIC did
  not work on its own
- mode switch support was added to Exynos 4x12 (same io pins are used by host
  and device)
- support for phy_set_bus_width introduced by Matt Porter was added
6) phy: Add support for S5PV210 to the Exynos USB PHY
- setting of clk register was fixed
7) phy: Add Exynos 5250 support to the Exynos USB 2.0 PHY
- supoprt was added for HSIC and device
8) usb: ehci-exynos: Change to use phy provided by the generic phy framework
- DT documentation was moved from usb-ehci.txt to exynos-usb.txt


Changes from v4:
1) phy: core: Add an exported of_phy_get function
- the new exported function of_phy_get was changed to take the phy's name as a
  parameter instead of the index
2) phy: core: Add devm_of_phy_get to phy-core
- fixes made in the comments to devm_of_phy_get
3) phy: Add new Exynos USB PHY driver
- move the documentation from a new to an existing file - samsung-phy.txt
- fix typos and uppercase hex addresses
- add more explanations to Kconfig (checkpatch still complains, but I find it
  hard to think what else could I add)
- add selects MFD_SYSCON as the driver needs it (Thank you, Tobias!)
- cleanup included headers in both *.c and .h files
- use BIT(x) macro instead of (1 << x)
- replaced HOST and DEV with PHY0 and PHY1 in phy-exynos4212-usb2.c, the
  registers are described as PHYx in the documentation hence the decision to
  leave the PHYx naming
- fixed typo in exynos4210_rate_to_clk reg -> *reg
- change hax_mode_switch and enabled type to bool
4) usb: ehci-s5p: Change to use phy provided by the generic phy framework
- Put the issue of phy->otg in o

[PATCH v9 1/4] phy: core: Add an exported of_phy_get function

2014-03-05 Thread Kamil Debski
Previously the of_phy_get function took a struct device * and
was declared static. It was impossible to call it from
another driver and thus it was impossible to get phy defined
for a given node. The old function was renamed to _of_phy_get
and was left for internal use. of_phy_get function was added
and it was exported. The function enables to get a phy for
a given device tree node.

Signed-off-by: Kamil Debski 
---
 drivers/phy/phy-core.c  |   45 -
 include/linux/phy/phy.h |6 ++
 2 files changed, 42 insertions(+), 9 deletions(-)

diff --git a/drivers/phy/phy-core.c b/drivers/phy/phy-core.c
index 6c73837..7c1b0e1 100644
--- a/drivers/phy/phy-core.c
+++ b/drivers/phy/phy-core.c
@@ -274,8 +274,8 @@ int phy_power_off(struct phy *phy)
 EXPORT_SYMBOL_GPL(phy_power_off);
 
 /**
- * of_phy_get() - lookup and obtain a reference to a phy by phandle
- * @dev: device that requests this phy
+ * _of_phy_get() - lookup and obtain a reference to a phy by phandle
+ * @np: device_node for which to get the phy
  * @index: the index of the phy
  *
  * Returns the phy associated with the given phandle value,
@@ -284,20 +284,17 @@ EXPORT_SYMBOL_GPL(phy_power_off);
  * not yet loaded. This function uses of_xlate call back function provided
  * while registering the phy_provider to find the phy instance.
  */
-static struct phy *of_phy_get(struct device *dev, int index)
+static struct phy *_of_phy_get(struct device_node *np, int index)
 {
int ret;
struct phy_provider *phy_provider;
struct phy *phy = NULL;
struct of_phandle_args args;
 
-   ret = of_parse_phandle_with_args(dev->of_node, "phys", "#phy-cells",
+   ret = of_parse_phandle_with_args(np, "phys", "#phy-cells",
index, &args);
-   if (ret) {
-   dev_dbg(dev, "failed to get phy in %s node\n",
-   dev->of_node->full_name);
+   if (ret)
return ERR_PTR(-ENODEV);
-   }
 
mutex_lock(&phy_provider_mutex);
phy_provider = of_phy_provider_lookup(args.np);
@@ -317,6 +314,36 @@ err0:
 }
 
 /**
+ * of_phy_get() - lookup and obtain a reference to a phy using a device_node.
+ * @np: device_node for which to get the phy
+ * @con_id: name of the phy from device's point of view
+ *
+ * Returns the phy driver, after getting a refcount to it; or
+ * -ENODEV if there is no such phy. The caller is responsible for
+ * calling phy_put() to release that count.
+ */
+struct phy *of_phy_get(struct device_node *np, const char *con_id)
+{
+   struct phy *phy = NULL;
+   int index = 0;
+
+   if (con_id)
+   index = of_property_match_string(np, "phy-names", con_id);
+
+   phy = _of_phy_get(np, index);
+   if (IS_ERR(phy))
+   return phy;
+
+   if (!try_module_get(phy->ops->owner))
+   return ERR_PTR(-EPROBE_DEFER);
+
+   get_device(&phy->dev);
+
+   return phy;
+}
+EXPORT_SYMBOL_GPL(of_phy_get);
+
+/**
  * phy_put() - release the PHY
  * @phy: the phy returned by phy_get()
  *
@@ -407,7 +434,7 @@ struct phy *phy_get(struct device *dev, const char *string)
if (dev->of_node) {
index = of_property_match_string(dev->of_node, "phy-names",
string);
-   phy = of_phy_get(dev, index);
+   phy = _of_phy_get(dev->of_node, index);
} else {
phy = phy_lookup(dev, string);
}
diff --git a/include/linux/phy/phy.h b/include/linux/phy/phy.h
index 3f83459..2fe3194 100644
--- a/include/linux/phy/phy.h
+++ b/include/linux/phy/phy.h
@@ -151,6 +151,7 @@ struct phy *devm_phy_get(struct device *dev, const char 
*string);
 struct phy *devm_phy_optional_get(struct device *dev, const char *string);
 void phy_put(struct phy *phy);
 void devm_phy_put(struct device *dev, struct phy *phy);
+struct phy *of_phy_get(struct device_node *np, const char *con_id);
 struct phy *of_phy_simple_xlate(struct device *dev,
struct of_phandle_args *args);
 struct phy *phy_create(struct device *dev, const struct phy_ops *ops,
@@ -259,6 +260,11 @@ static inline void devm_phy_put(struct device *dev, struct 
phy *phy)
 {
 }
 
+struct phy *of_phy_get(struct device_node *np, const char *con_id)
+{
+   return ERR_PTR(-ENOSYS);
+}
+
 static inline struct phy *of_phy_simple_xlate(struct device *dev,
struct of_phandle_args *args)
 {
-- 
1.7.9.5

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Re: [PATCH v8 4/4] phy: Add Exynos 5250 support to the Exynos USB 2.0 PHY driver

2014-03-05 Thread Kishon Vijay Abraham I

Hi,

On Wednesday 05 March 2014 07:48 PM, Kamil Debski wrote:

Add support for Exynos 5250. This driver is to replace the old
USB 2.0 PHY driver.


Pls fix this error too..

Applying: phy: Add Exynos 5250 support to the Exynos USB 2.0 PHY driver
/home/kishon/repos/linux-phy/.git/rebase-apply/patch:462: new blank line 
at EOF.

+
warning: 1 line adds whitespace errors.

Thanks
Kishon


Signed-off-by: Kamil Debski 
---
  .../devicetree/bindings/phy/samsung-phy.txt|1 +
  drivers/phy/Kconfig|   11 +
  drivers/phy/Makefile   |1 +
  drivers/phy/phy-exynos5250-usb2.c  |  405 
  drivers/phy/phy-samsung-usb2.c |6 +
  drivers/phy/phy-samsung-usb2.h |1 +
  6 files changed, 425 insertions(+)
  create mode 100644 drivers/phy/phy-exynos5250-usb2.c

diff --git a/Documentation/devicetree/bindings/phy/samsung-phy.txt 
b/Documentation/devicetree/bindings/phy/samsung-phy.txt
index bf955ab..28f9edb 100644
--- a/Documentation/devicetree/bindings/phy/samsung-phy.txt
+++ b/Documentation/devicetree/bindings/phy/samsung-phy.txt
@@ -28,6 +28,7 @@ Required properties:
  - compatible : should be one of the listed compatibles:
- "samsung,exynos4210-usb2-phy"
- "samsung,exynos4x12-usb2-phy"
+   - "samsung,exynos5250-usb2-phy"
  - reg : a list of registers used by phy driver
- first and obligatory is the location of phy modules registers
  - samsung,sysreg-phandle - handle to syscon used to control the system 
registers
diff --git a/drivers/phy/Kconfig b/drivers/phy/Kconfig
index fc5a44a..c206e25 100644
--- a/drivers/phy/Kconfig
+++ b/drivers/phy/Kconfig
@@ -125,4 +125,15 @@ config PHY_EXYNOS4X12_USB2
  Samsung USB 2.0 PHY driver is enabled and means that support for this
  particular SoC is compiled in the driver. In case of Exynos 4x12 four
  phys are available - device, host, HSIC0 and HSIC1.
+
+config PHY_EXYNOS5250_USB2
+   bool "Support for Exynos 5250"
+   depends on PHY_SAMSUNG_USB2
+   depends on SOC_EXYNOS5250
+   help
+ Enable USB PHY support for Exynos 5250. This option requires that
+ Samsung USB 2.0 PHY driver is enabled and means that support for this
+ particular SoC is compiled in the driver. In case of Exynos 5250 four
+ phys are available - device, host, HSIC0 and HSIC.
+
  endmenu
diff --git a/drivers/phy/Makefile b/drivers/phy/Makefile
index 0ea36ff..f76c239 100644
--- a/drivers/phy/Makefile
+++ b/drivers/phy/Makefile
@@ -14,3 +14,4 @@ obj-$(CONFIG_PHY_SUN4I_USB)   += phy-sun4i-usb.o
  obj-$(CONFIG_PHY_SAMSUNG_USB2)+= phy-samsung-usb2.o
  obj-$(CONFIG_PHY_EXYNOS4210_USB2) += phy-exynos4210-usb2.o
  obj-$(CONFIG_PHY_EXYNOS4X12_USB2) += phy-exynos4x12-usb2.o
+obj-$(CONFIG_PHY_EXYNOS5250_USB2)  += phy-exynos5250-usb2.o
diff --git a/drivers/phy/phy-exynos5250-usb2.c 
b/drivers/phy/phy-exynos5250-usb2.c
new file mode 100644
index 000..877994e
--- /dev/null
+++ b/drivers/phy/phy-exynos5250-usb2.c
@@ -0,0 +1,405 @@
+/*
+ * Samsung SoC USB 1.1/2.0 PHY driver - Exynos 5250 support
+ *
+ * Copyright (C) 2013 Samsung Electronics Co., Ltd.
+ * Author: Kamil Debski 
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include "phy-samsung-usb2.h"
+
+/* Exynos USB PHY registers */
+#define EXYNOS_5250_REFCLKSEL_CRYSTAL  0x0
+#define EXYNOS_5250_REFCLKSEL_XO   0x1
+#define EXYNOS_5250_REFCLKSEL_CLKCORE  0x2
+
+#define EXYNOS_5250_FSEL_9MHZ6 0x0
+#define EXYNOS_5250_FSEL_10MHZ 0x1
+#define EXYNOS_5250_FSEL_12MHZ 0x2
+#define EXYNOS_5250_FSEL_19MHZ20x3
+#define EXYNOS_5250_FSEL_20MHZ 0x4
+#define EXYNOS_5250_FSEL_24MHZ 0x5
+#define EXYNOS_5250_FSEL_50MHZ 0x7
+
+/* Normal host */
+#define EXYNOS_5250_HOSTPHYCTRL0   0x0
+
+#define EXYNOS_5250_HOSTPHYCTRL0_PHYSWRSTALL   BIT(31)
+#define EXYNOS_5250_HOSTPHYCTRL0_REFCLKSEL_SHIFT   19
+#define EXYNOS_5250_HOSTPHYCTRL0_REFCLKSEL_MASK\
+   (0x3 << EXYNOS_5250_HOSTPHYCTRL0_REFCLKSEL_SHIFT)
+#define EXYNOS_5250_HOSTPHYCTRL0_FSEL_SHIFT16
+#define EXYNOS_5250_HOSTPHYCTRL0_FSEL_MASK \
+   (0x7 << EXYNOS_5250_HOSTPHYCTRL0_FSEL_SHIFT)
+#define EXYNOS_5250_HOSTPHYCTRL0_TESTBURNINBIT(11)
+#define EXYNOS_5250_HOSTPHYCTRL0_RETENABLE BIT(10)
+#define EXYNOS_5250_HOSTPHYCTRL0_COMMON_ON_N   BIT(9)
+#define EXYNOS_5250_HOSTPHYCTRL0_VATESTENB_MASK(0x3 << 7)
+#define EXYNOS_5250_HOSTPHYCTRL0_VATESTENB_DUAL(0x0 << 7)
+#define EXYNOS_5250_HOSTPHYCTRL0_VATESTENB_ID0 (0x1 << 7)
+#define EXYNOS_5250_HOSTPHYCTRL0_VA

Re: [PATCH v8 3/4] phy: Add new Exynos USB 2.0 PHY driver

2014-03-05 Thread Kishon Vijay Abraham I

Kamil,

On Wednesday 05 March 2014 07:48 PM, Kamil Debski wrote:

Add a new driver for the Exynos USB 2.0 PHY. The new driver uses the generic
PHY framework. The driver includes support for the Exynos 4x10 and 4x12
SoC families.


Pls fix these errors which I get while applying your patch.

Applying: phy: Add new Exynos USB 2.0 PHY driver
/home/kishon/repos/linux-phy/.git/rebase-apply/patch:534: new blank line 
at EOF.

+
/home/kishon/repos/linux-phy/.git/rebase-apply/patch:869: new blank line 
at EOF.

+
/home/kishon/repos/linux-phy/.git/rebase-apply/patch:1098: new blank 
line at EOF.

+
/home/kishon/repos/linux-phy/.git/rebase-apply/patch:1171: new blank 
line at EOF.

+
warning: 4 lines add whitespace errors.

Thanks
Kishon



Signed-off-by: Kamil Debski 
---
  .../devicetree/bindings/phy/samsung-phy.txt|   53 
  Documentation/phy/samsung-usb2.txt |  134 
  drivers/phy/Kconfig|   29 ++
  drivers/phy/Makefile   |3 +
  drivers/phy/phy-exynos4210-usb2.c  |  262 
  drivers/phy/phy-exynos4x12-usb2.c  |  329 
  drivers/phy/phy-samsung-usb2.c |  223 +
  drivers/phy/phy-samsung-usb2.h |   67 
  8 files changed, 1100 insertions(+)
  create mode 100644 Documentation/phy/samsung-usb2.txt
  create mode 100644 drivers/phy/phy-exynos4210-usb2.c
  create mode 100644 drivers/phy/phy-exynos4x12-usb2.c
  create mode 100644 drivers/phy/phy-samsung-usb2.c
  create mode 100644 drivers/phy/phy-samsung-usb2.h

diff --git a/Documentation/devicetree/bindings/phy/samsung-phy.txt 
b/Documentation/devicetree/bindings/phy/samsung-phy.txt
index c0fccaa..bf955ab 100644
--- a/Documentation/devicetree/bindings/phy/samsung-phy.txt
+++ b/Documentation/devicetree/bindings/phy/samsung-phy.txt
@@ -20,3 +20,56 @@ Required properties:
  - compatible : should be "samsung,exynos5250-dp-video-phy";
  - reg : offset and length of the Display Port PHY register set;
  - #phy-cells : from the generic PHY bindings, must be 0;
+
+Samsung S5P/EXYNOS SoC series USB PHY
+-
+
+Required properties:
+- compatible : should be one of the listed compatibles:
+   - "samsung,exynos4210-usb2-phy"
+   - "samsung,exynos4x12-usb2-phy"
+- reg : a list of registers used by phy driver
+   - first and obligatory is the location of phy modules registers
+- samsung,sysreg-phandle - handle to syscon used to control the system 
registers
+- samsung,pmureg-phandle - handle to syscon used to control PMU registers
+- #phy-cells : from the generic phy bindings, must be 1;
+- clocks and clock-names:
+   - the "phy" clock is required by the phy module, used as a gate
+   - the "ref" clock is used to get the rate of the clock provided to the
+ PHY module
+
+The first phandle argument in the PHY specifier identifies the PHY, its
+meaning is compatible dependent. For the currently supported SoCs (Exynos 4210
+and Exynos 4212) it is as follows:
+  0 - USB device ("device"),
+  1 - USB host ("host"),
+  2 - HSIC0 ("hsic0"),
+  3 - HSIC1 ("hsic1"),
+
+Exynos 4210 and Exynos 4212 use mode switching and require that mode switch
+register is supplied.
+
+Example:
+
+For Exynos 4412 (compatible with Exynos 4212):
+
+usbphy: phy@125b {
+   compatible = "samsung,exynos4x12-usb2-phy";
+   reg = <0x125b 0x100>;
+   clocks = <&clock 305>, <&clock 2>;
+   clock-names = "phy", "ref";
+   status = "okay";
+   #phy-cells = <1>;
+   samsung,sysreg-phandle = <&sys_reg>;
+   samsung,pmureg-phandle = <&pmu_reg>;
+};
+
+Then the PHY can be used in other nodes such as:
+
+phy-consumer@1234 {
+   phys = <&usbphy 2>;
+   phy-names = "phy";
+};
+
+Refer to DT bindings documentation of particular PHY consumer devices for more
+information about required PHYs and the way of specification.
diff --git a/Documentation/phy/samsung-usb2.txt 
b/Documentation/phy/samsung-usb2.txt
new file mode 100644
index 000..0c8e260
--- /dev/null
+++ b/Documentation/phy/samsung-usb2.txt
@@ -0,0 +1,134 @@
+.--+
+|  Samsung USB 2.0 PHY adaptation layer   |
++-+'
+
+| 1. Description
++
+
+The architecture of the USB 2.0 PHY module in Samsung SoCs is similar
+among many SoCs. In spite of the similarities it proved difficult to
+create a one driver that would fit all these PHY controllers. Often
+the differences were minor and were found in particular bits of the
+registers of the PHY. In some rare cases the order of register writes or
+the PHY powering up process had to be altered. This adaptation layer is
+a compromise between having separate drivers and having a single driver
+wit

[PATCH v8 4/4] phy: Add Exynos 5250 support to the Exynos USB 2.0 PHY driver

2014-03-05 Thread Kamil Debski
Add support for Exynos 5250. This driver is to replace the old
USB 2.0 PHY driver.

Signed-off-by: Kamil Debski 
---
 .../devicetree/bindings/phy/samsung-phy.txt|1 +
 drivers/phy/Kconfig|   11 +
 drivers/phy/Makefile   |1 +
 drivers/phy/phy-exynos5250-usb2.c  |  405 
 drivers/phy/phy-samsung-usb2.c |6 +
 drivers/phy/phy-samsung-usb2.h |1 +
 6 files changed, 425 insertions(+)
 create mode 100644 drivers/phy/phy-exynos5250-usb2.c

diff --git a/Documentation/devicetree/bindings/phy/samsung-phy.txt 
b/Documentation/devicetree/bindings/phy/samsung-phy.txt
index bf955ab..28f9edb 100644
--- a/Documentation/devicetree/bindings/phy/samsung-phy.txt
+++ b/Documentation/devicetree/bindings/phy/samsung-phy.txt
@@ -28,6 +28,7 @@ Required properties:
 - compatible : should be one of the listed compatibles:
- "samsung,exynos4210-usb2-phy"
- "samsung,exynos4x12-usb2-phy"
+   - "samsung,exynos5250-usb2-phy"
 - reg : a list of registers used by phy driver
- first and obligatory is the location of phy modules registers
 - samsung,sysreg-phandle - handle to syscon used to control the system 
registers
diff --git a/drivers/phy/Kconfig b/drivers/phy/Kconfig
index fc5a44a..c206e25 100644
--- a/drivers/phy/Kconfig
+++ b/drivers/phy/Kconfig
@@ -125,4 +125,15 @@ config PHY_EXYNOS4X12_USB2
  Samsung USB 2.0 PHY driver is enabled and means that support for this
  particular SoC is compiled in the driver. In case of Exynos 4x12 four
  phys are available - device, host, HSIC0 and HSIC1.
+
+config PHY_EXYNOS5250_USB2
+   bool "Support for Exynos 5250"
+   depends on PHY_SAMSUNG_USB2
+   depends on SOC_EXYNOS5250
+   help
+ Enable USB PHY support for Exynos 5250. This option requires that
+ Samsung USB 2.0 PHY driver is enabled and means that support for this
+ particular SoC is compiled in the driver. In case of Exynos 5250 four
+ phys are available - device, host, HSIC0 and HSIC.
+
 endmenu
diff --git a/drivers/phy/Makefile b/drivers/phy/Makefile
index 0ea36ff..f76c239 100644
--- a/drivers/phy/Makefile
+++ b/drivers/phy/Makefile
@@ -14,3 +14,4 @@ obj-$(CONFIG_PHY_SUN4I_USB)   += phy-sun4i-usb.o
 obj-$(CONFIG_PHY_SAMSUNG_USB2) += phy-samsung-usb2.o
 obj-$(CONFIG_PHY_EXYNOS4210_USB2)  += phy-exynos4210-usb2.o
 obj-$(CONFIG_PHY_EXYNOS4X12_USB2)  += phy-exynos4x12-usb2.o
+obj-$(CONFIG_PHY_EXYNOS5250_USB2)  += phy-exynos5250-usb2.o
diff --git a/drivers/phy/phy-exynos5250-usb2.c 
b/drivers/phy/phy-exynos5250-usb2.c
new file mode 100644
index 000..877994e
--- /dev/null
+++ b/drivers/phy/phy-exynos5250-usb2.c
@@ -0,0 +1,405 @@
+/*
+ * Samsung SoC USB 1.1/2.0 PHY driver - Exynos 5250 support
+ *
+ * Copyright (C) 2013 Samsung Electronics Co., Ltd.
+ * Author: Kamil Debski 
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include "phy-samsung-usb2.h"
+
+/* Exynos USB PHY registers */
+#define EXYNOS_5250_REFCLKSEL_CRYSTAL  0x0
+#define EXYNOS_5250_REFCLKSEL_XO   0x1
+#define EXYNOS_5250_REFCLKSEL_CLKCORE  0x2
+
+#define EXYNOS_5250_FSEL_9MHZ6 0x0
+#define EXYNOS_5250_FSEL_10MHZ 0x1
+#define EXYNOS_5250_FSEL_12MHZ 0x2
+#define EXYNOS_5250_FSEL_19MHZ20x3
+#define EXYNOS_5250_FSEL_20MHZ 0x4
+#define EXYNOS_5250_FSEL_24MHZ 0x5
+#define EXYNOS_5250_FSEL_50MHZ 0x7
+
+/* Normal host */
+#define EXYNOS_5250_HOSTPHYCTRL0   0x0
+
+#define EXYNOS_5250_HOSTPHYCTRL0_PHYSWRSTALL   BIT(31)
+#define EXYNOS_5250_HOSTPHYCTRL0_REFCLKSEL_SHIFT   19
+#define EXYNOS_5250_HOSTPHYCTRL0_REFCLKSEL_MASK\
+   (0x3 << EXYNOS_5250_HOSTPHYCTRL0_REFCLKSEL_SHIFT)
+#define EXYNOS_5250_HOSTPHYCTRL0_FSEL_SHIFT16
+#define EXYNOS_5250_HOSTPHYCTRL0_FSEL_MASK \
+   (0x7 << EXYNOS_5250_HOSTPHYCTRL0_FSEL_SHIFT)
+#define EXYNOS_5250_HOSTPHYCTRL0_TESTBURNINBIT(11)
+#define EXYNOS_5250_HOSTPHYCTRL0_RETENABLE BIT(10)
+#define EXYNOS_5250_HOSTPHYCTRL0_COMMON_ON_N   BIT(9)
+#define EXYNOS_5250_HOSTPHYCTRL0_VATESTENB_MASK(0x3 << 7)
+#define EXYNOS_5250_HOSTPHYCTRL0_VATESTENB_DUAL(0x0 << 7)
+#define EXYNOS_5250_HOSTPHYCTRL0_VATESTENB_ID0 (0x1 << 7)
+#define EXYNOS_5250_HOSTPHYCTRL0_VATESTENB_ANALOGTEST  (0x2 << 7)
+#define EXYNOS_5250_HOSTPHYCTRL0_SIDDQ BIT(6)
+#define EXYNOS_5250_HOSTPHYCTRL0_FORCESLEEPBIT(5)
+#define EXYNOS_5250_HOSTPHYCTRL0_FORCESUSPEND  BIT(4)
+#define EXYNOS_5250_HOSTPHYCTRL0_WORDINTERFACE BIT(3)
+#define EXYNOS_5250_HOSTPHYCTRL0_UTMISWRS

[PATCH v8 1/4] phy: core: Add an exported of_phy_get function

2014-03-05 Thread Kamil Debski
Previously the of_phy_get function took a struct device * and
was declared static. It was impossible to call it from
another driver and thus it was impossible to get phy defined
for a given node. The old function was renamed to _of_phy_get
and was left for internal use. of_phy_get function was added
and it was exported. The function enables to get a phy for
a given device tree node.

Signed-off-by: Kamil Debski 
---
 drivers/phy/phy-core.c  |   45 -
 include/linux/phy/phy.h |6 ++
 2 files changed, 42 insertions(+), 9 deletions(-)

diff --git a/drivers/phy/phy-core.c b/drivers/phy/phy-core.c
index 6c73837..7c1b0e1 100644
--- a/drivers/phy/phy-core.c
+++ b/drivers/phy/phy-core.c
@@ -274,8 +274,8 @@ int phy_power_off(struct phy *phy)
 EXPORT_SYMBOL_GPL(phy_power_off);
 
 /**
- * of_phy_get() - lookup and obtain a reference to a phy by phandle
- * @dev: device that requests this phy
+ * _of_phy_get() - lookup and obtain a reference to a phy by phandle
+ * @np: device_node for which to get the phy
  * @index: the index of the phy
  *
  * Returns the phy associated with the given phandle value,
@@ -284,20 +284,17 @@ EXPORT_SYMBOL_GPL(phy_power_off);
  * not yet loaded. This function uses of_xlate call back function provided
  * while registering the phy_provider to find the phy instance.
  */
-static struct phy *of_phy_get(struct device *dev, int index)
+static struct phy *_of_phy_get(struct device_node *np, int index)
 {
int ret;
struct phy_provider *phy_provider;
struct phy *phy = NULL;
struct of_phandle_args args;
 
-   ret = of_parse_phandle_with_args(dev->of_node, "phys", "#phy-cells",
+   ret = of_parse_phandle_with_args(np, "phys", "#phy-cells",
index, &args);
-   if (ret) {
-   dev_dbg(dev, "failed to get phy in %s node\n",
-   dev->of_node->full_name);
+   if (ret)
return ERR_PTR(-ENODEV);
-   }
 
mutex_lock(&phy_provider_mutex);
phy_provider = of_phy_provider_lookup(args.np);
@@ -317,6 +314,36 @@ err0:
 }
 
 /**
+ * of_phy_get() - lookup and obtain a reference to a phy using a device_node.
+ * @np: device_node for which to get the phy
+ * @con_id: name of the phy from device's point of view
+ *
+ * Returns the phy driver, after getting a refcount to it; or
+ * -ENODEV if there is no such phy. The caller is responsible for
+ * calling phy_put() to release that count.
+ */
+struct phy *of_phy_get(struct device_node *np, const char *con_id)
+{
+   struct phy *phy = NULL;
+   int index = 0;
+
+   if (con_id)
+   index = of_property_match_string(np, "phy-names", con_id);
+
+   phy = _of_phy_get(np, index);
+   if (IS_ERR(phy))
+   return phy;
+
+   if (!try_module_get(phy->ops->owner))
+   return ERR_PTR(-EPROBE_DEFER);
+
+   get_device(&phy->dev);
+
+   return phy;
+}
+EXPORT_SYMBOL_GPL(of_phy_get);
+
+/**
  * phy_put() - release the PHY
  * @phy: the phy returned by phy_get()
  *
@@ -407,7 +434,7 @@ struct phy *phy_get(struct device *dev, const char *string)
if (dev->of_node) {
index = of_property_match_string(dev->of_node, "phy-names",
string);
-   phy = of_phy_get(dev, index);
+   phy = _of_phy_get(dev->of_node, index);
} else {
phy = phy_lookup(dev, string);
}
diff --git a/include/linux/phy/phy.h b/include/linux/phy/phy.h
index 3f83459..2fe3194 100644
--- a/include/linux/phy/phy.h
+++ b/include/linux/phy/phy.h
@@ -151,6 +151,7 @@ struct phy *devm_phy_get(struct device *dev, const char 
*string);
 struct phy *devm_phy_optional_get(struct device *dev, const char *string);
 void phy_put(struct phy *phy);
 void devm_phy_put(struct device *dev, struct phy *phy);
+struct phy *of_phy_get(struct device_node *np, const char *con_id);
 struct phy *of_phy_simple_xlate(struct device *dev,
struct of_phandle_args *args);
 struct phy *phy_create(struct device *dev, const struct phy_ops *ops,
@@ -259,6 +260,11 @@ static inline void devm_phy_put(struct device *dev, struct 
phy *phy)
 {
 }
 
+struct phy *of_phy_get(struct device_node *np, const char *con_id)
+{
+   return ERR_PTR(-ENOSYS);
+}
+
 static inline struct phy *of_phy_simple_xlate(struct device *dev,
struct of_phandle_args *args)
 {
-- 
1.7.9.5

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[PATCH v8 0/4] phy: Add new Exynos USB 2.0 PHY driver

2014-03-05 Thread Kamil Debski
Hi,

This is the eighth version of this patchset. First and most significant change
since v6 is that this patchset includes only patches touching the Generic PHY
Framework. Patches to the USB controllers were stripped as they require
additional work. S5PV210 support is also omitted - it requires more testing.

Since v7 this patch includes fixes for checkpath errors and was rebased onto
Kishon's next branch.

Best wishes,
Kamil Debski

--
Changes from v7:
1) phy: core: Add an exported of_phy_get function
   - No changes since v7.
2) phy: core: Add devm_of_phy_get to phy-core
   - No changes since v7.
3) phy: Add new Exynos USB 2.0 PHY driver
   - Fix checkpatch errors with code indentation and corrected whitespace.
4) phy: Add Exynos 5250 support to the Exynos USB 2.0 PHY
   - Fix checkpatch errors with code indentation and corrected whitespace.

--
Changes from v6: (not including the change that controller patches were removed
form this patchset, also this patchset excludes S5PV210 support - it needs more
testing)
1) phy: core: Add an exported of_phy_get function
   - No changes since v6.
2) phy: core: Add devm_of_phy_get to phy-core
   - No changes since v6.
3) phy: Add new Exynos USB 2.0 PHY driver
   - Changed the way clocks are supplied to the driver. Prior to version v7
 there were reference clocks for every phy instance, now a single "ref"
 clock was introduced.
   - Updated documentation to match the aforementioned change.
   - Add offset EXYNOS_*_UPHYCLK_PHYFSEL_OFFSET to the clock register content
 defines.
   - Corrected way clock register is modified. Instead of a simple write, a
 proper read, modify, write sequence was introduced.
   - Important stability fix - added udelay after PHY reset. This fixes a bug
 causing instability in USB LAN adapters. Without the delay the DMA burst
 mode was could not be enabled.
4) phy: Add Exynos 5250 support to the Exynos USB 2.0 PHY
   - Changed handling of clocks to use a single "ref" clock.


Changes from v5:
1) phy: core: Add an exported of_phy_get function
- corrected behaviour of the modification when GENERIC_PHY is not enabled
  by adding a stub of the of_phy_get function
2) phy: core: Add devm_of_phy_get to phy-core
- corrected behaviour of the modification when GENERIC_PHY is not enabled
  by adding a stub of the devm_of_phy_get function
3) dts: Add usb2phy to Exynos 4
- no change
4) dts: Add usb2phy to Exynos 5250
- in the previous version, this patch included some phy-exynos5250-usb2.c code
  by mistake, the code has been remove and added to the proper patch
5) phy: Add new Exynos USB PHY driver
- changed strings from Exynos 4212 to Exynos 4x12, as the Exynos 4212 driver is
  actually a driver for the whole Exynos 4x12 family
- added documentation to the Exynos USB 2.0 PHY driver adaptaion layer
- corrected strings HSCI -> HSIC
- fixed a problem introduced by previous change - on Exynos 4x12 the HSIC did
  not work on its own
- mode switch support was added to Exynos 4x12 (same io pins are used by host
  and device)
- support for phy_set_bus_width introduced by Matt Porter was added
6) phy: Add support for S5PV210 to the Exynos USB PHY
- setting of clk register was fixed
7) phy: Add Exynos 5250 support to the Exynos USB 2.0 PHY
- supoprt was added for HSIC and device
8) usb: ehci-exynos: Change to use phy provided by the generic phy framework
- DT documentation was moved from usb-ehci.txt to exynos-usb.txt


Changes from v4:
1) phy: core: Add an exported of_phy_get function
- the new exported function of_phy_get was changed to take the phy's name as a
  parameter instead of the index
2) phy: core: Add devm_of_phy_get to phy-core
- fixes made in the comments to devm_of_phy_get
3) phy: Add new Exynos USB PHY driver
- move the documentation from a new to an existing file - samsung-phy.txt
- fix typos and uppercase hex addresses
- add more explanations to Kconfig (checkpatch still complains, but I find it
  hard to think what else could I add)
- add selects MFD_SYSCON as the driver needs it (Thank you, Tobias!)
- cleanup included headers in both *.c and .h files
- use BIT(x) macro instead of (1 << x)
- replaced HOST and DEV with PHY0 and PHY1 in phy-exynos4212-usb2.c, the
  registers are described as PHYx in the documentation hence the decision to
  leave the PHYx naming
- fixed typo in exynos4210_rate_to_clk reg -> *reg
- change hax_mode_switch and enabled type to bool
4) usb: ehci-s5p: Change to use phy provided by the generic phy framework
- Put the issue of phy->otg in order - since the new phy driver does not provide
  this field. With the new driver the switch between host and device is done in
  power_on of the respective host and device phys.
5) usb: s3c-hsotg: Use the new Exynos USB phy driver with the generic phy
   framework
- fixed the example in the documentation
6) phy: Add support for S5PV210 to the Exynos USB PHY driver
- include files cleanup
- use BIT(x) ma

[PATCH v8 3/4] phy: Add new Exynos USB 2.0 PHY driver

2014-03-05 Thread Kamil Debski
Add a new driver for the Exynos USB 2.0 PHY. The new driver uses the generic
PHY framework. The driver includes support for the Exynos 4x10 and 4x12
SoC families.

Signed-off-by: Kamil Debski 
---
 .../devicetree/bindings/phy/samsung-phy.txt|   53 
 Documentation/phy/samsung-usb2.txt |  134 
 drivers/phy/Kconfig|   29 ++
 drivers/phy/Makefile   |3 +
 drivers/phy/phy-exynos4210-usb2.c  |  262 
 drivers/phy/phy-exynos4x12-usb2.c  |  329 
 drivers/phy/phy-samsung-usb2.c |  223 +
 drivers/phy/phy-samsung-usb2.h |   67 
 8 files changed, 1100 insertions(+)
 create mode 100644 Documentation/phy/samsung-usb2.txt
 create mode 100644 drivers/phy/phy-exynos4210-usb2.c
 create mode 100644 drivers/phy/phy-exynos4x12-usb2.c
 create mode 100644 drivers/phy/phy-samsung-usb2.c
 create mode 100644 drivers/phy/phy-samsung-usb2.h

diff --git a/Documentation/devicetree/bindings/phy/samsung-phy.txt 
b/Documentation/devicetree/bindings/phy/samsung-phy.txt
index c0fccaa..bf955ab 100644
--- a/Documentation/devicetree/bindings/phy/samsung-phy.txt
+++ b/Documentation/devicetree/bindings/phy/samsung-phy.txt
@@ -20,3 +20,56 @@ Required properties:
 - compatible : should be "samsung,exynos5250-dp-video-phy";
 - reg : offset and length of the Display Port PHY register set;
 - #phy-cells : from the generic PHY bindings, must be 0;
+
+Samsung S5P/EXYNOS SoC series USB PHY
+-
+
+Required properties:
+- compatible : should be one of the listed compatibles:
+   - "samsung,exynos4210-usb2-phy"
+   - "samsung,exynos4x12-usb2-phy"
+- reg : a list of registers used by phy driver
+   - first and obligatory is the location of phy modules registers
+- samsung,sysreg-phandle - handle to syscon used to control the system 
registers
+- samsung,pmureg-phandle - handle to syscon used to control PMU registers
+- #phy-cells : from the generic phy bindings, must be 1;
+- clocks and clock-names:
+   - the "phy" clock is required by the phy module, used as a gate
+   - the "ref" clock is used to get the rate of the clock provided to the
+ PHY module
+
+The first phandle argument in the PHY specifier identifies the PHY, its
+meaning is compatible dependent. For the currently supported SoCs (Exynos 4210
+and Exynos 4212) it is as follows:
+  0 - USB device ("device"),
+  1 - USB host ("host"),
+  2 - HSIC0 ("hsic0"),
+  3 - HSIC1 ("hsic1"),
+
+Exynos 4210 and Exynos 4212 use mode switching and require that mode switch
+register is supplied.
+
+Example:
+
+For Exynos 4412 (compatible with Exynos 4212):
+
+usbphy: phy@125b {
+   compatible = "samsung,exynos4x12-usb2-phy";
+   reg = <0x125b 0x100>;
+   clocks = <&clock 305>, <&clock 2>;
+   clock-names = "phy", "ref";
+   status = "okay";
+   #phy-cells = <1>;
+   samsung,sysreg-phandle = <&sys_reg>;
+   samsung,pmureg-phandle = <&pmu_reg>;
+};
+
+Then the PHY can be used in other nodes such as:
+
+phy-consumer@1234 {
+   phys = <&usbphy 2>;
+   phy-names = "phy";
+};
+
+Refer to DT bindings documentation of particular PHY consumer devices for more
+information about required PHYs and the way of specification.
diff --git a/Documentation/phy/samsung-usb2.txt 
b/Documentation/phy/samsung-usb2.txt
new file mode 100644
index 000..0c8e260
--- /dev/null
+++ b/Documentation/phy/samsung-usb2.txt
@@ -0,0 +1,134 @@
+.--+
+|  Samsung USB 2.0 PHY adaptation layer   |
++-+'
+
+| 1. Description
++
+
+The architecture of the USB 2.0 PHY module in Samsung SoCs is similar
+among many SoCs. In spite of the similarities it proved difficult to
+create a one driver that would fit all these PHY controllers. Often
+the differences were minor and were found in particular bits of the
+registers of the PHY. In some rare cases the order of register writes or
+the PHY powering up process had to be altered. This adaptation layer is
+a compromise between having separate drivers and having a single driver
+with added support for many special cases.
+
+| 2. Files description
++--
+
+- phy-samsung-usb2.c
+   This is the main file of the adaptation layer. This file contains
+   the probe function and provides two callbacks to the Generic PHY
+   Framework. This two callbacks are used to power on and power off the
+   phy. They carry out the common work that has to be done on all version
+   of the PHY module. Depending on which SoC was chosen they execute SoC
+   specific callbacks. The specific SoC version is selected by choosing
+   the appropriate compatible string. In addi

[PATCH v8 2/4] phy: core: Add devm_of_phy_get to phy-core

2014-03-05 Thread Kamil Debski
Adding devm_of_phy_get will allow to get phys by supplying a
pointer to the struct device_node instead of struct device.

Signed-off-by: Kamil Debski 
---
 drivers/phy/phy-core.c  |   31 +++
 include/linux/phy/phy.h |8 
 2 files changed, 39 insertions(+)

diff --git a/drivers/phy/phy-core.c b/drivers/phy/phy-core.c
index 7c1b0e1..623b71c 100644
--- a/drivers/phy/phy-core.c
+++ b/drivers/phy/phy-core.c
@@ -526,6 +526,37 @@ struct phy *devm_phy_optional_get(struct device *dev, 
const char *string)
 EXPORT_SYMBOL_GPL(devm_phy_optional_get);
 
 /**
+ * devm_of_phy_get() - lookup and obtain a reference to a phy.
+ * @dev: device that requests this phy
+ * @np: node containing the phy
+ * @con_id: name of the phy from device's point of view
+ *
+ * Gets the phy using of_phy_get(), and associates a device with it using
+ * devres. On driver detach, release function is invoked on the devres data,
+ * then, devres data is freed.
+ */
+struct phy *devm_of_phy_get(struct device *dev, struct device_node *np,
+   const char *con_id)
+{
+   struct phy **ptr, *phy;
+
+   ptr = devres_alloc(devm_phy_release, sizeof(*ptr), GFP_KERNEL);
+   if (!ptr)
+   return ERR_PTR(-ENOMEM);
+
+   phy = of_phy_get(np, con_id);
+   if (!IS_ERR(phy)) {
+   *ptr = phy;
+   devres_add(dev, ptr);
+   } else {
+   devres_free(ptr);
+   }
+
+   return phy;
+}
+EXPORT_SYMBOL_GPL(devm_of_phy_get);
+
+/**
  * phy_create() - create a new phy
  * @dev: device that is creating the new phy
  * @ops: function pointers for performing phy operations
diff --git a/include/linux/phy/phy.h b/include/linux/phy/phy.h
index 2fe3194..bcbf96c 100644
--- a/include/linux/phy/phy.h
+++ b/include/linux/phy/phy.h
@@ -149,6 +149,8 @@ struct phy *phy_get(struct device *dev, const char *string);
 struct phy *phy_optional_get(struct device *dev, const char *string);
 struct phy *devm_phy_get(struct device *dev, const char *string);
 struct phy *devm_phy_optional_get(struct device *dev, const char *string);
+struct phy *devm_of_phy_get(struct device *dev, struct device_node *np,
+   const char *con_id);
 void phy_put(struct phy *phy);
 void devm_phy_put(struct device *dev, struct phy *phy);
 struct phy *of_phy_get(struct device_node *np, const char *con_id);
@@ -252,6 +254,12 @@ static inline struct phy *devm_phy_optional_get(struct 
device *dev,
return ERR_PTR(-ENOSYS);
 }
 
+struct phy *devm_of_phy_get(struct device *dev, struct device_node *np,
+   const char *con_id)
+{
+   return ERR_PTR(-ENOSYS);
+}
+
 static inline void phy_put(struct phy *phy)
 {
 }
-- 
1.7.9.5

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Re: [PATCH 1/1] ARM: EXYNOS: Map SYSRAM address through DT

2014-03-05 Thread Andreas Oberritter
On 05.03.2014 09:23, Sachin Kamat wrote:
>> diff --git a/arch/arm/boot/dts/exynos4210-universal_c210.dts 
>> b/arch/arm/boot/dts/exynos4210-universal_c210.dts
>> index d2e3f5f5916d..3ca3fb6aa5f4 100644
>> --- a/arch/arm/boot/dts/exynos4210-universal_c210.dts
>> +++ b/arch/arm/boot/dts/exynos4210-universal_c210.dts
>> @@ -28,6 +28,11 @@
>> bootargs = "console=ttySAC2,115200N8 root=/dev/mmcblk0p5 rw 
>> rootwait earlyprintk panic=5 maxcpus=1";
>> };
>>
>> +   sysram@0202 {
  ^
>> +   compatible = "samsung,exynos4210-sysram";
>> +   reg = <0x02025000 0x1000>;
  ^
>> +   };
>> +

Shouldn't these two addresses match?

Regards,
Andreas
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[PATCH v2 2/6] PCI: tegra: use new OF interrupt mapping when possible

2014-03-05 Thread Lucas Stach
This is the recommended method of doing the IRQ
mapping. For old devicetrees we fall back to the
previous practice.

Signed-off-by: Lucas Stach 
Acked-by: Arnd Bergmann 
---
 drivers/pci/host/pci-tegra.c | 7 ++-
 1 file changed, 6 insertions(+), 1 deletion(-)

diff --git a/drivers/pci/host/pci-tegra.c b/drivers/pci/host/pci-tegra.c
index 330f7e3a32dd..083cf37ca047 100644
--- a/drivers/pci/host/pci-tegra.c
+++ b/drivers/pci/host/pci-tegra.c
@@ -639,10 +639,15 @@ static int tegra_pcie_setup(int nr, struct pci_sys_data 
*sys)
 static int tegra_pcie_map_irq(const struct pci_dev *pdev, u8 slot, u8 pin)
 {
struct tegra_pcie *pcie = sys_to_pcie(pdev->bus->sysdata);
+   int irq;
 
tegra_cpuidle_pcie_irqs_in_use();
 
-   return pcie->irq;
+   irq = of_irq_parse_and_map_pci(pdev, slot, pin);
+   if (!irq)
+   irq = pcie->irq;
+
+   return irq;
 }
 
 static void tegra_pcie_add_bus(struct pci_bus *bus)
-- 
1.9.0

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[PATCH v2 1/6] ARM: dts: tegra: add PCIe interrupt mapping properties

2014-03-05 Thread Lucas Stach
Those are defined by the common PCI binding.

Signed-off-by: Lucas Stach 
Acked-by: Arnd Bergmann 
---
 Documentation/devicetree/bindings/pci/nvidia,tegra20-pcie.txt | 8 
 arch/arm/boot/dts/tegra20.dtsi| 4 
 arch/arm/boot/dts/tegra30.dtsi| 4 
 3 files changed, 16 insertions(+)

diff --git a/Documentation/devicetree/bindings/pci/nvidia,tegra20-pcie.txt 
b/Documentation/devicetree/bindings/pci/nvidia,tegra20-pcie.txt
index 24cee06915c9..c300391e8d3e 100644
--- a/Documentation/devicetree/bindings/pci/nvidia,tegra20-pcie.txt
+++ b/Documentation/devicetree/bindings/pci/nvidia,tegra20-pcie.txt
@@ -42,6 +42,10 @@ Required properties:
 - 0xc200: prefetchable memory region
   Please refer to the standard PCI bus binding document for a more detailed
   explanation.
+- #interrupt-cells: Size representation for interrupts (must be 1)
+- interrupt-map-mask and interrupt-map: Standard PCI IRQ mapping properties
+  Please refer to the standard PCI bus binding document for a more detailed
+  explanation.
 - clocks: Must contain an entry for each entry in clock-names.
   See ../clocks/clock-bindings.txt for details.
 - clock-names: Must include the following entries:
@@ -86,6 +90,10 @@ SoC DTSI:
  0 99 0x04>; /* MSI interrupt */
interrupt-names = "intr", "msi";
 
+   #interrupt-cells = <1>;
+   interrupt-map-mask = <0 0 0 0>;
+   interrupt-map = <0 0 0 0 &intc GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
+
bus-range = <0x00 0xff>;
#address-cells = <3>;
#size-cells = <2>;
diff --git a/arch/arm/boot/dts/tegra20.dtsi b/arch/arm/boot/dts/tegra20.dtsi
index 480ecda3416b..52ef2cf0b142 100644
--- a/arch/arm/boot/dts/tegra20.dtsi
+++ b/arch/arm/boot/dts/tegra20.dtsi
@@ -552,6 +552,10 @@
  GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>; /* MSI interrupt 
*/
interrupt-names = "intr", "msi";
 
+   #interrupt-cells = <1>;
+   interrupt-map-mask = <0 0 0 0>;
+   interrupt-map = <0 0 0 0 &intc GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
+
bus-range = <0x00 0xff>;
#address-cells = <3>;
#size-cells = <2>;
diff --git a/arch/arm/boot/dts/tegra30.dtsi b/arch/arm/boot/dts/tegra30.dtsi
index ed8e7700b46d..e5ab7adbc28a 100644
--- a/arch/arm/boot/dts/tegra30.dtsi
+++ b/arch/arm/boot/dts/tegra30.dtsi
@@ -28,6 +28,10 @@
  GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>; /* MSI interrupt 
*/
interrupt-names = "intr", "msi";
 
+   #interrupt-cells = <1>;
+   interrupt-map-mask = <0 0 0 0>;
+   interrupt-map = <0 0 0 0 &intc GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
+
bus-range = <0x00 0xff>;
#address-cells = <3>;
#size-cells = <2>;
-- 
1.9.0

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[PATCH v2 6/6] PCI: designware: use new OF interrupt mapping when possible

2014-03-05 Thread Lucas Stach
This is the recommended method of doing the IRQ
mapping. For old devicetrees we fall back to the
previous practice.

Signed-off-by: Lucas Stach 
Acked-by: Arnd Bergmann 
---
v2: pass in parent dev to relevant functions, to make DT parsing
work (spotted by Tim Harvey )
---
 drivers/pci/host/pcie-designware.c | 12 +---
 1 file changed, 9 insertions(+), 3 deletions(-)

diff --git a/drivers/pci/host/pcie-designware.c 
b/drivers/pci/host/pcie-designware.c
index 17ce88f79d2b..98c118e04dba 100644
--- a/drivers/pci/host/pcie-designware.c
+++ b/drivers/pci/host/pcie-designware.c
@@ -17,6 +17,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -492,7 +493,7 @@ int __init dw_pcie_host_init(struct pcie_port *pp)
dw_pci.nr_controllers = 1;
dw_pci.private_data = (void **)&pp;
 
-   pci_common_init(&dw_pci);
+   pci_common_init_dev(pp->dev, &dw_pci);
pci_assign_unassigned_resources();
 #ifdef CONFIG_PCI_DOMAINS
dw_pci.domain++;
@@ -725,7 +726,7 @@ static struct pci_bus *dw_pcie_scan_bus(int nr, struct 
pci_sys_data *sys)
 
if (pp) {
pp->root_bus_nr = sys->busnr;
-   bus = pci_scan_root_bus(NULL, sys->busnr, &dw_pcie_ops,
+   bus = pci_scan_root_bus(pp->dev, sys->busnr, &dw_pcie_ops,
sys, &sys->resources);
} else {
bus = NULL;
@@ -738,8 +739,13 @@ static struct pci_bus *dw_pcie_scan_bus(int nr, struct 
pci_sys_data *sys)
 static int dw_pcie_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
 {
struct pcie_port *pp = sys_to_pcie(dev->bus->sysdata);
+   int irq;
 
-   return pp->irq;
+   irq = of_irq_parse_and_map_pci(dev, slot, pin);
+   if (!irq)
+   irq = pp->irq;
+
+   return irq;
 }
 
 static void dw_pcie_add_bus(struct pci_bus *bus)
-- 
1.9.0

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[PATCH v2 3/6] PCI: rcar: use new OF interrupt mapping when possible

2014-03-05 Thread Lucas Stach
This is the recommended method of doing the IRQ
mapping. Still fall back to the old method in order
to not break the just submitted board files.

Signed-off-by: Lucas Stach 
---
v2: pass in parent device to pci_common_init(), to
make DT parsing work.
---
 drivers/pci/host/pci-rcar-gen2.c | 12 +---
 1 file changed, 9 insertions(+), 3 deletions(-)

diff --git a/drivers/pci/host/pci-rcar-gen2.c b/drivers/pci/host/pci-rcar-gen2.c
index ceec147baec3..3a0914163ad0 100644
--- a/drivers/pci/host/pci-rcar-gen2.c
+++ b/drivers/pci/host/pci-rcar-gen2.c
@@ -15,6 +15,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -160,8 +161,13 @@ static int __init rcar_pci_map_irq(const struct pci_dev 
*dev, u8 slot, u8 pin)
 {
struct pci_sys_data *sys = dev->bus->sysdata;
struct rcar_pci_priv *priv = sys->private_data;
+   int irq;
+
+   irq = of_irq_parse_and_map_pci(dev, slot, pin);
+   if (!irq)
+   irq = priv->irq;
 
-   return priv->irq;
+   return irq;
 }
 
 /* PCI host controller setup */
@@ -249,6 +255,8 @@ static int __init rcar_pci_add_controller(struct 
rcar_pci_priv *priv)
void **private_data;
int count;
 
+   pci_common_init_dev(priv->dev, &rcar_hw_pci);
+
if (rcar_hw_pci.nr_controllers < rcar_pci_count)
goto add_priv;
 
@@ -322,8 +330,6 @@ static int __init rcar_pci_init(void)
int retval;
 
retval = platform_driver_probe(&rcar_pci_driver, rcar_pci_probe);
-   if (!retval)
-   pci_common_init(&rcar_hw_pci);
 
/* Private data pointer array is not needed any more */
kfree(rcar_hw_pci.private_data);
-- 
1.9.0

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[PATCH v2 4/6] ARM: dts: exynos5440: fix PCIe interrupt mapping

2014-03-05 Thread Lucas Stach
So it actually works.

Signed-off-by: Lucas Stach 
Acked-by: Arnd Bergmann 
---
v2: fix build breakage by including arm-gic.h
---
 arch/arm/boot/dts/exynos5440.dtsi | 6 --
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/arch/arm/boot/dts/exynos5440.dtsi 
b/arch/arm/boot/dts/exynos5440.dtsi
index 02a0a1226cef..7628e2edf1b6 100644
--- a/arch/arm/boot/dts/exynos5440.dtsi
+++ b/arch/arm/boot/dts/exynos5440.dtsi
@@ -9,6 +9,8 @@
  * published by the Free Software Foundation.
 */
 
+#include 
+
 #include "skeleton.dtsi"
 
 / {
@@ -274,7 +276,7 @@
  0x8200 0 0x40011000 0x40011000 0 0x1ffef000>; /* 
non-prefetchable memory */
#interrupt-cells = <1>;
interrupt-map-mask = <0 0 0 0>;
-   interrupt-map = <0x0 0 &gic 53>;
+   interrupt-map = <0 0 0 0 &gic GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
num-lanes = <4>;
status = "disabled";
};
@@ -295,7 +297,7 @@
  0x8200 0 0x60011000 0x60011000 0 0x1ffef000>; /* 
non-prefetchable memory */
#interrupt-cells = <1>;
interrupt-map-mask = <0 0 0 0>;
-   interrupt-map = <0x0 0 &gic 56>;
+   interrupt-map = <0 0 0 0 &gic GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
num-lanes = <4>;
status = "disabled";
};
-- 
1.9.0

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[PATCH v2 5/6] ARM: dts: imx6: add PCIe interrupt mapping properties

2014-03-05 Thread Lucas Stach
As defined by the common PCI bindings.

Signed-off-by: Lucas Stach 
Acked-by: Arnd Bergmann 
---
v2: drop blank lines
---
 arch/arm/boot/dts/imx6qdl.dtsi | 8 
 1 file changed, 8 insertions(+)

diff --git a/arch/arm/boot/dts/imx6qdl.dtsi b/arch/arm/boot/dts/imx6qdl.dtsi
index fb28b2ecb1db..c1c06d25decc 100644
--- a/arch/arm/boot/dts/imx6qdl.dtsi
+++ b/arch/arm/boot/dts/imx6qdl.dtsi
@@ -10,6 +10,8 @@
  * http://www.gnu.org/copyleft/gpl.html
  */
 
+#include 
+
 #include "skeleton.dtsi"
 
 / {
@@ -127,6 +129,12 @@
  0x8200 0 0x0100 0x0100 0 
0x00f0>; /* non-prefetchable memory */
num-lanes = <1>;
interrupts = <0 123 0x04>;
+   #interrupt-cells = <1>;
+   interrupt-map-mask = <0 0 0 0x7>;
+   interrupt-map = <0 0 0 1 &intc GIC_SPI 123 
IRQ_TYPE_LEVEL_HIGH>,
+   <0 0 0 2 &intc GIC_SPI 122 
IRQ_TYPE_LEVEL_HIGH>,
+   <0 0 0 3 &intc GIC_SPI 121 
IRQ_TYPE_LEVEL_HIGH>,
+   <0 0 0 4 &intc GIC_SPI 120 
IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clks 189>, <&clks 187>, <&clks 206>, <&clks 
144>;
clock-names = "pcie_ref_125m", "sata_ref_100m", 
"lvds_gate", "pcie_axi";
status = "disabled";
-- 
1.9.0

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[PATCH v2 0/6] PCI irq mapping fixes and cleanups

2014-03-05 Thread Lucas Stach
This series cleans up the PCI irq mapping for all
the ARM PCI host drivers, so they handle it in the
way defined in the common PCI bindings.

I've worked in all the feedback I received on the first
round of this series and left out the i.MX pcie driver
changes, as these need more work includig breaking
of the existing binding, which I'll send as a separate
series.

Lucas Stach (6):
  ARM: dts: tegra: add PCIe interrupt mapping properties
  PCI: tegra: use new OF interrupt mapping when possible
  PCI: rcar: use new OF interrupt mapping when possible
  ARM: dts: exynos5440: fix PCIe interrupt mapping
  ARM: dts: imx6: add PCIe interrupt mapping properties
  PCI: designware: use new OF interrupt mapping when possible

 .../devicetree/bindings/pci/nvidia,tegra20-pcie.txt  |  8 
 arch/arm/boot/dts/exynos5440.dtsi|  6 --
 arch/arm/boot/dts/imx6qdl.dtsi   |  8 
 arch/arm/boot/dts/tegra20.dtsi   |  4 
 arch/arm/boot/dts/tegra30.dtsi   |  4 
 drivers/pci/host/pci-rcar-gen2.c | 12 +---
 drivers/pci/host/pci-tegra.c |  7 ++-
 drivers/pci/host/pcie-designware.c   | 12 +---
 8 files changed, 52 insertions(+), 9 deletions(-)

-- 
1.9.0

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Re: [PATCH v2 01/11] base: power: Add generic OF-based power domain look-up

2014-03-05 Thread Tomasz Figa

On 05.03.2014 12:47, Tomasz Figa wrote:

Hi Ulf,

On 05.03.2014 08:19, Ulf Hansson wrote:

@@ -2177,3 +2181,297 @@ void pm_genpd_init(struct generic_pm_domain
*genpd,
 list_add(&genpd->gpd_list_node, &gpd_list);
 mutex_unlock(&gpd_list_lock);
  }
+
+#ifdef CONFIG_PM_GENERIC_DOMAINS_OF


Do we need a new config for this? Can't we just use CONFIG_OF?



I guess we could, but initially it would have to be CONFIG_OF &&
!CONFIG_ARCH_EXYNOS until patch 03/11 converts Exynos to use the common
code.


+   if (ret < 0) {
+   dev_err(dev, "failed to add to power domain %s: %d",
+   pd->name, ret);
+   return ret;
+   }
+
+   pm_genpd_dev_need_restore(dev, true);


So this will reflect the device as being inactive, which I think is
the wrong approach.

Usually we should expect drivers that's being probed successfully to
leave their devices in active state, right?


It depends on domain power state, but actually it seems to be already
handled in __pm_genpd_add_device(), so this line might be not needed
indeed.

Strangely enough, it seemed to be needed on Exynos for correct
operation, but maybe in the meantime some fixes in genpd code showed up.
This will need some extra testing.


Hmm, after removing this line, power domains no longer work correctly on 
Exynos (thanks Marek for testing). Unfortunately I'm on a sick leave 
right now and I won't be able to debug this issue on Exynos for some 
time, but I'll see if I can reproduce it on s3c64xx board I have here at 
home.


Best regards,
Tomasz
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Re: [PATCH 1/1] ARM: Exynos: Add generic compatible string

2014-03-05 Thread Tomasz Figa

On 05.03.2014 09:25, Sachin Kamat wrote:

On 25 February 2014 17:12, Arnd Bergmann  wrote:

On Tuesday 25 February 2014, Olof Johansson wrote:

I disagree. I don't know what Samsung has in mind, but the revision of
the CPU doesn't have all that much to do with the rest of the SoC.
It's quite likely that some vendors (maybe not Samsung, but the same
concept applies) will ship 64-bit SoCs that are very similar to their
preceding 32-bit ones, same IP, similar busses, etc. I'm pretty sure
at least some vendors will do very close to that.


Right.


So, if EXYNOS4 and EXYNOS5 can share a compatible value when they use
different CPUs, then there's no reason that whatever future 64-bit
ones can also share it.


How about putting both 'samsung,exynos' and 'samsung,exynos4' in DT then
and having the platform code match exynos4 and exynos5 but not exynos?

That way, I think we are consistent and future-proof. Any code that needs
to know if it's running on some exynos version can just check for the
'samsung,exynos' compatible value and that will work on both arm32 and
arm64. Also, if we ever decide we want to run a 32-bit kernel on a 64-bit
exynos, we can just add 'samsung,exynos6' (or whatever number that will
be) to the list.

My usual disclaimer for this: You should never ever consider actually
running a 32-bit kernel on a 64-bit CPU, but at the same time there
shouldn't be any reason why it won't work either, given that we require
arm64 based systems to have all SoC specific code in drivers and we
can use the same drivers on arm32.


Kukjin, Tomasz,

What is your opinion about Arnd's suggestion?



I would still prefer introducing a generic string for 32-bit Exynos 
SoCs, but I don't think it really matters a lot. I guess we can stick to 
just exynos4 and exynos5 compatible strings then, as long as we can 
merge the "board"-files and common.c together, since the code is pretty 
much SoC-independent now.


Best regards,
Tomasz
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Re: [RFC PATCH v2 19/21] ARM: dts: exynos5250-arndale: add dsi and panel nodes

2014-03-05 Thread Inki Dae
Sorry for interrupting,


2014-03-04 21:00 GMT+09:00 Andrzej Hajda :
> On 02/28/2014 02:39 PM, Tomi Valkeinen wrote:
>> On 28/02/14 15:31, Tomi Valkeinen wrote:
>>
>>> Compared to what I've done on OMAP, you don't seem to specify the video
>>> inputs for the tc358764 at all. In this case it's obvious, as the chip
>>> is a child of the DSI master. But the chip could as well be controlled
>>> via i2c, and so be placed as a child of the i2c nodes.
>>>
>>> So even if the driver doesn't use it, maybe it would be more future
>>> proof to have both input and output endpoints for the tc358764?
>> Oh, and one addition: how me and Laurent see the DSI case (and other
>> similar ones), the child/parent relationship gives the control bus path,
>> and the video ports give the video data path.
>>
>> So both are always needed. A DSI panel may be controlled via DSI, i2c,
>> spi, but the video path will always go from DSI master to the panel.
> I have made video path binding optional, in case of video bus
> if the specific video path is not present driver uses the bus it is
> connected to.

You mean the case that video path isn't wrote in dt file for some
machine? If so, shouldn't we always write video patch in the dt file
correctly? I'm not sure the optional binding is needed because which
bus and which panel are used depends on machine.

And If I understood correctly the video interfaces document, it seems
that you don't deal with the document.

The below is simple dt binding I think in case that video path goes
from MIPI-DSI to LVDS bridge, and then from LVDS bridge to LCD Panel,

panel {
...
port {
...
panel_0: endpoint {
remote-endpoint=<&lvds_1>;
};
};
};

lvds {
   ...
   port@1 {
   ...
   lvds_0: endpoint {
   remote-endpoint=<&dsi_0>;
   };
   };
   port@2 {
  ...
  lvds_1: endpoint {
   remote-endpoint=<&panel_0>;
  };
   };
};

dsi {
...
port {
dsi_0: endpoint {
remote-endpoint=<&lvds_0>;
};
};
};

panel and lvds node could be a child of other masters, maybe i2c or spi.

Thanks,
Inki Dae


> In case DSI panel is controlled via different bus the path should be
> specified
> explicitly.
>
> I have no strong feelings against making this binding required but as
> you have
> stated above "in this case it's obvious" and for me quite redundant.
>
> What is the gain in specifying explicitly video paths in such cases?
>
>
>> Or, as a theoretical panel, you could have a DSI controlled panel, being
>> a child of the DSI master, but the video data would come via, say,
>> parallel RGB. You can actually do that with some panels/encoders, even
>> if the concept is silly.
>
> In this case explicit binding will work also.
>
> Regards
> Andrzej
>
> ___
> dri-devel mailing list
> dri-de...@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/dri-devel
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Re: [PATCH v2 01/11] base: power: Add generic OF-based power domain look-up

2014-03-05 Thread Tomasz Figa

On 04.03.2014 19:23, Stephen Boyd wrote:

On 03/03, Tomasz Figa wrote:

diff --git a/drivers/base/power/domain.c b/drivers/base/power/domain.c
index dc127e5..006b455 100644
--- a/drivers/base/power/domain.c
+++ b/drivers/base/power/domain.c
@@ -3,12 +3,16 @@
   *
   * Copyright (C) 2011 Rafael J. Wysocki , Renesas Electronics 
Corp.
   *
+ * Support for Device Tree based power domain providers:
+ * Copyright (C) 2014 Tomasz Figa 
+ *
   * This file is released under the GPLv2.
   */

  #include 
  #include 
  #include 
+#include 


Is this still needed?



Probably not.


  #include 
  #include 
  #include 

[...]

+
+/*
+ * DEVICE<->DOMAIN BINDING USING DEVICE TREE LOOK-UP
+ *
+ * The code below registers a notifier for platform bus devices'
+ * BUS_NOTIFY_BIND_DRIVER events and tries to attach devices to their power
+ * domains by looking them up using Device Tree.
+ *
+ * Similarly in BUS_NOTIFY_UNBOUND_DRIVER the device is detached from its
+ * domain, since it no longer supports runtime PM without any driver bound
+ * to it.


This looks outdated.



Oops, missed this one. Thanks for pointing out.

Best regards,
Tomasz
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Re: [PATCH v2 01/11] base: power: Add generic OF-based power domain look-up

2014-03-05 Thread Tomasz Figa

Hi Ulf,

On 05.03.2014 08:19, Ulf Hansson wrote:

@@ -2177,3 +2181,297 @@ void pm_genpd_init(struct generic_pm_domain *genpd,
 list_add(&genpd->gpd_list_node, &gpd_list);
 mutex_unlock(&gpd_list_lock);
  }
+
+#ifdef CONFIG_PM_GENERIC_DOMAINS_OF


Do we need a new config for this? Can't we just use CONFIG_OF?



I guess we could, but initially it would have to be CONFIG_OF && 
!CONFIG_ARCH_EXYNOS until patch 03/11 converts Exynos to use the common 
code.



+   if (ret < 0) {
+   dev_err(dev, "failed to add to power domain %s: %d",
+   pd->name, ret);
+   return ret;
+   }
+
+   pm_genpd_dev_need_restore(dev, true);


So this will reflect the device as being inactive, which I think is
the wrong approach.

Usually we should expect drivers that's being probed successfully to
leave their devices in active state, right?


It depends on domain power state, but actually it seems to be already 
handled in __pm_genpd_add_device(), so this line might be not needed indeed.


Strangely enough, it seemed to be needed on Exynos for correct 
operation, but maybe in the meantime some fixes in genpd code showed up. 
This will need some extra testing.


Best regards,
Tomasz
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2014-03-05 Thread Loans
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[PATCH 7/7] MAINTAINERS: add maintainer for Samsung xgmac driver

2014-03-05 Thread Byungho An
From: Byungho An 

Signed-off-by: Byungho An 
---
 MAINTAINERS |9 +
 1 file changed, 9 insertions(+)

diff --git a/MAINTAINERS b/MAINTAINERS
index c6d0e93..10cb617 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -7526,6 +7526,15 @@ S:   Supported
 L: linux-samsung-soc@vger.kernel.org (moderated for non-subscribers)
 F: drivers/clk/samsung/
 
+SAMSUNG XGMAC DRIVERS
+M: Byungho An 
+M: Girish K S 
+M: Siva Reddy Kallam 
+M: Vipul Pandya 
+S: Supported
+L: net...@vger.kernel.org
+F: drivers/net/ethernet/samsung/
+
 SERIAL DRIVERS
 M: Greg Kroah-Hartman 
 L: linux-ser...@vger.kernel.org
-- 
1.7.10.4


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[PATCH 6/7] net: xgmac: add ethtool related functions support xgmac

2014-03-05 Thread Byungho An
From: Vipul Pandya 

This patch adds ethtool related functions.

Signed-off-by: Vipul Pandya 
Signed-off-by: Byungho An 
---
 drivers/net/ethernet/samsung/xgmac_common.h  |   28 +-
 drivers/net/ethernet/samsung/xgmac_ethtool.c |  508 +-
 drivers/net/ethernet/samsung/xgmac_main.c|   14 +-
 drivers/net/ethernet/samsung/xgmac_reg.h |6 +
 4 files changed, 538 insertions(+), 18 deletions(-)

diff --git a/drivers/net/ethernet/samsung/xgmac_common.h 
b/drivers/net/ethernet/samsung/xgmac_common.h
index b7764aa..4932824 100644
--- a/drivers/net/ethernet/samsung/xgmac_common.h
+++ b/drivers/net/ethernet/samsung/xgmac_common.h
@@ -42,8 +42,12 @@ struct xgmac_mtl_ops;
 #define XGMAC_RX_QUEUES   16
 
 /* Max/Min RI Watchdog Timer count value */
-#define XGMAC_MAX_DMA_RIWT 0xff
-#define XGMAC_MIN_DMA_RIWT 0x20
+/* Calculated based how much time does it take to fill 256KB Rx memory
+ * at 10Gb speed at 156MHz clock rate and considered little less then
+ * the actual value.
+ */
+#define XGMAC_MAX_DMA_RIWT 0x70
+#define XGMAC_MIN_DMA_RIWT 0x01
 
 /* Tx coalesce parameters */
 #define XGMAC_COAL_TX_TIMER4
@@ -206,6 +210,20 @@ enum dma_irq_status {
 #define XGMAC_FOR_EACH_QUEUE(max_queues, queue_num) \
for (queue_num = 0; queue_num < max_queues; queue_num++)
 
+#define DRV_VERSION "1.0.0"
+
+#define XGMAC_MAX_RX_CHANNELS  16
+#define XGMAC_MAX_TX_CHANNELS  16
+
+#define START_MAC_REG_OFFSET   0x
+#define MAX_MAC_REG_OFFSET 0x0DFC
+#define START_MTL_REG_OFFSET   0x1000
+#define MAX_MTL_REG_OFFSET 0x18FC
+#define START_DMA_REG_OFFSET   0x3000
+#define MAX_DMA_REG_OFFSET 0x38FC
+
+#define REG_SPACE_SIZE 0x2000
+
 /* xgmac statistics counters */
 struct xgmac_extra_stats {
/* TX/RX IRQ events */
@@ -488,7 +506,8 @@ struct xgmac_priv_data {
int oldlink;
int speed;
int oldduplex;
-   unsigned int flow_ctrl;
+   u8 rx_pause;
+   u8 tx_pause;
unsigned int pause;
struct mii_bus *mii;
int mii_irq[PHY_MAX_ADDR];
@@ -508,6 +527,7 @@ struct xgmac_priv_data {
u32 adv_ts;
int use_riwt;
spinlock_t ptp_lock;
+   struct ptp_clock *ptp_clock;
 
/* EEE-LPI specific members */
struct timer_list eee_ctrl_timer;
@@ -546,4 +566,6 @@ extern const struct xgmac_mtl_ops *xgmac_get_mtl_ops(void);
 void xgmac_disable_eee_mode(struct xgmac_priv_data * const priv);
 bool xgmac_eee_init(struct xgmac_priv_data * const priv);
 
+int xgmac_set_flow_ctrl(struct xgmac_priv_data *priv, int rx, int tx);
+
 #endif /* __XGMAC_COMMON_H__ */
diff --git a/drivers/net/ethernet/samsung/xgmac_ethtool.c 
b/drivers/net/ethernet/samsung/xgmac_ethtool.c
index 08d0b17..74af3865 100644
--- a/drivers/net/ethernet/samsung/xgmac_ethtool.c
+++ b/drivers/net/ethernet/samsung/xgmac_ethtool.c
@@ -9,12 +9,17 @@
  * it under the terms of the GNU General Public License version 2 as
  * published by the Free Software Foundation.
  */
+#include 
 #include 
 #include 
 #include 
+#include 
 #include 
+#include 
 
 #include "xgmac_common.h"
+#include "xgmac_reg.h"
+#include "xgmac_dma.h"
 
 struct xgmac_stats {
char stat_string[ETH_GSTRING_LEN];
@@ -27,16 +32,105 @@ struct xgmac_stats {
offsetof(struct xgmac_priv_data, xstats.m)}
 
 static const struct xgmac_stats xgmac_gstrings_stats[] = {
+   /* TX/RX IRQ events */
+   XGMAC_STAT(tx_process_stopped_irq),
+   XGMAC_STAT(tx_ctxt_desc_err),
+   XGMAC_STAT(tx_threshold),
+   XGMAC_STAT(rx_threshold),
+   XGMAC_STAT(tx_pkt_n),
+   XGMAC_STAT(rx_pkt_n),
+   XGMAC_STAT(normal_irq_n),
+   XGMAC_STAT(tx_normal_irq_n),
+   XGMAC_STAT(rx_normal_irq_n),
+   XGMAC_STAT(napi_poll),
+   XGMAC_STAT(tx_clean),
+   XGMAC_STAT(tx_reset_ic_bit),
+   XGMAC_STAT(rx_process_stopped_irq),
+   XGMAC_STAT(rx_underflow_irq),
+
+   /* Bus access errors */
+   XGMAC_STAT(fatal_bus_error_irq),
+   XGMAC_STAT(tx_read_transfer_err),
+   XGMAC_STAT(tx_write_transfer_err),
+   XGMAC_STAT(tx_desc_access_err),
+   XGMAC_STAT(tx_buffer_access_err),
+   XGMAC_STAT(tx_data_transfer_err),
+   XGMAC_STAT(rx_read_transfer_err),
+   XGMAC_STAT(rx_write_transfer_err),
+   XGMAC_STAT(rx_desc_access_err),
+   XGMAC_STAT(rx_buffer_access_err),
+   XGMAC_STAT(rx_data_transfer_err),
+   XGMAC_STAT(pmt_irq_event_n),
+
+   /* EEE-LPI stats */
XGMAC_STAT(tx_lpi_entry_n),
XGMAC_STAT(tx_lpi_exit_n),
XGMAC_STAT(rx_lpi_entry_n),
XGMAC_STAT(rx_lpi_exit_n),
XGMAC_STAT(eee_wakeup_error_n),
-   XGMAC_STAT(pmt_irq_event_n),
+
+   /* RX specific */
+   /* L2 error */
+   XGMAC_STAT(rx_code_gmii_err),
+   XGMAC_STAT(rx_watchdog_err),
+   XGMAC_STAT(rx_crc_err),
+   XGMAC_STAT(rx_gaint_pkt_err),
+   XGMAC_STAT(ip_hdr_err),
+   XGMAC_STAT(ip_payload_err),
+   XGMAC_STAT(overflow_error),
+
+

[PATCH 2/7] net: xgmac: add TSO support for Samsung xgmac

2014-03-05 Thread Byungho An
From: Vipul Pandya 

Enable TSO during initialization for each DMA channels

Signed-off-by: Vipul Pandya 
Signed-off-by: Byungho An 
---
 drivers/net/ethernet/samsung/xgmac_desc.c |   47 +++---
 drivers/net/ethernet/samsung/xgmac_desc.h |   17 +--
 drivers/net/ethernet/samsung/xgmac_dma.c  |   10 
 drivers/net/ethernet/samsung/xgmac_dma.h  |2 +
 drivers/net/ethernet/samsung/xgmac_main.c |   76 ++---
 5 files changed, 131 insertions(+), 21 deletions(-)

diff --git a/drivers/net/ethernet/samsung/xgmac_desc.c 
b/drivers/net/ethernet/samsung/xgmac_desc.c
index 791b5ec..51b7e71 100644
--- a/drivers/net/ethernet/samsung/xgmac_desc.c
+++ b/drivers/net/ethernet/samsung/xgmac_desc.c
@@ -25,6 +25,16 @@ static void xgmac_init_tx_desc(struct xgmac_tx_norm_desc *p)
p->tdes23.tx_rd_des23.own_bit = 0;
 }
 
+static void xgmac_tx_desc_enable_tse(struct xgmac_tx_norm_desc *p, u8 is_tse,
+ u32 total_hdr_len, u32 tcp_hdr_len,
+ u32 tcp_payload_len)
+{
+   p->tdes23.tx_rd_des23.tse_bit = is_tse;
+   p->tdes23.tx_rd_des23.buf1_size = total_hdr_len;
+   p->tdes23.tx_rd_des23.tcp_hdr_len = tcp_hdr_len / 4;
+   p->tdes23.tx_rd_des23.tx_pkt_len.tcp_payload_len  = tcp_payload_len;
+}
+
 /* Assign buffer lengths for descriptor */
 static void xgmac_prepare_tx_desc(struct xgmac_tx_norm_desc *p, u8 is_fd,
int buf1_len, int pkt_len)
@@ -99,36 +109,47 @@ static int xgmac_get_tx_timestamp_status(struct 
xgmac_tx_norm_desc *p)
 }
 
 /* TX Context Descripto Specific */
-static void xgmac_init_tx_ctxtdesc(struct xgmac_tx_ctxt_desc *p)
+static void xgmac_tx_ctxt_desc_set_ctxt(struct xgmac_tx_ctxt_desc *p)
 {
p->ctxt_bit = 1;
-   p->own_bit = 0;
 }
 
 /* Set the owner of TX context descriptor */
-static void xgmac_set_tx_ctxt_owner(struct xgmac_tx_ctxt_desc *p)
+static void xgmac_tx_ctxt_desc_set_owner(struct xgmac_tx_ctxt_desc *p)
 {
p->own_bit = 1;
 }
 
 /* Get the owner of TX context descriptor */
-static int xgmac_get_tx_ctxt_owner(struct xgmac_tx_ctxt_desc *p)
+static int xgmac_tx_ctxt_desc_get_owner(struct xgmac_tx_ctxt_desc *p)
 {
return p->own_bit;
 }
 
 /* Set TX mss in TX context Descriptor */
-static void xgmac_tx_ctxt_desc_setmss(struct xgmac_tx_ctxt_desc *p, int mss)
+static void xgmac_tx_ctxt_desc_set_mss(struct xgmac_tx_ctxt_desc *p, u16 mss)
 {
p->maxseg_size = mss;
 }
 
 /* Get TX mss from TX context Descriptor */
-static int xgmac_tx_ctxt_desc_getmss(struct xgmac_tx_ctxt_desc *p)
+static int xgmac_tx_ctxt_desc_get_mss(struct xgmac_tx_ctxt_desc *p)
 {
return p->maxseg_size;
 }
 
+/* Set TX tcmssv in TX context Descriptor */
+static void xgmac_tx_ctxt_desc_set_tcmssv(struct xgmac_tx_ctxt_desc *p)
+{
+   p->tcmssv = 1;
+}
+
+/* Reset TX ostc in TX context Descriptor */
+static void xgmac_tx_ctxt_desc_reset_ostc(struct xgmac_tx_ctxt_desc *p)
+{
+   p->ostc = 0;
+}
+
 /* Set IVLAN information */
 static void xgmac_tx_ctxt_desc_set_ivlantag(struct xgmac_tx_ctxt_desc *p,
 int is_ivlanvalid, int ivlan_tag,
@@ -175,13 +196,13 @@ static void xgmac_tx_ctxt_desc_set_tstamp(struct 
xgmac_tx_ctxt_desc *p,
 
 }
 /* Close TX context descriptor */
-static void xgmac_close_tx_ctxt_desc(struct xgmac_tx_ctxt_desc *p)
+static void xgmac_tx_ctxt_desc_close(struct xgmac_tx_ctxt_desc *p)
 {
p->own_bit = 1;
 }
 
 /* WB status of context descriptor */
-static int xgmac_get_tx_ctxt_cde(struct xgmac_tx_ctxt_desc *p)
+static int xgmac_tx_ctxt_desc_get_cde(struct xgmac_tx_ctxt_desc *p)
 {
return p->ctxt_desc_err;
 }
@@ -433,6 +454,7 @@ static u64 xgmac_get_rx_timestamp(struct xgmac_rx_ctxt_desc 
*p)
 
 static const struct xgmac_desc_ops desc_ops = {
.init_tx_desc = xgmac_init_tx_desc,
+   .tx_desc_enable_tse = xgmac_tx_desc_enable_tse,
.prepare_tx_desc = xgmac_prepare_tx_desc,
.tx_vlanctl_desc = xgmac_tx_vlanctl_desc,
.set_tx_owner = xgmac_set_tx_owner,
@@ -444,11 +466,20 @@ static const struct xgmac_desc_ops desc_ops = {
.get_tx_len = xgmac_get_tx_len,
.tx_enable_tstamp = xgmac_tx_enable_tstamp,
.get_tx_timestamp_status = xgmac_get_tx_timestamp_status,
+   .tx_ctxt_desc_set_ctxt = xgmac_tx_ctxt_desc_set_ctxt,
+   .tx_ctxt_desc_set_owner =  xgmac_tx_ctxt_desc_set_owner,
+   .get_tx_ctxt_owner = xgmac_tx_ctxt_desc_get_owner,
+   .tx_ctxt_desc_set_mss = xgmac_tx_ctxt_desc_set_mss,
+   .tx_ctxt_desc_get_mss = xgmac_tx_ctxt_desc_get_mss,
+   .tx_ctxt_desc_set_tcmssv = xgmac_tx_ctxt_desc_set_tcmssv,
+   .tx_ctxt_desc_reset_ostc = xgmac_tx_ctxt_desc_reset_ostc,
.tx_ctxt_desc_set_ivlantag = xgmac_tx_ctxt_desc_set_ivlantag,
.tx_ctxt_desc_get_ivlantag = xgmac_tx_ctxt_desc_get_ivlantag,
.tx_ctxt_desc_set_vlantag = xgmac_tx_ctxt_desc_set_vlantag,
.tx_ctxt_desc_get_vlantag = xgmac_tx_ctxt_d

[PATCH 3/7] net: xgmac: add EEE(Energy Efficient Ethernet) for Samsung xgmac

2014-03-05 Thread Byungho An
From: Girish K S 

Added support for the EEE(Energy Efficient Ethernet)
in 10G ethernet driver.

Signed-off-by: Girish K S 
Signed-off-by: Byungho An 
---
 drivers/net/ethernet/samsung/xgmac_common.h   |   54 +
 drivers/net/ethernet/samsung/xgmac_core.c |   86 +-
 drivers/net/ethernet/samsung/xgmac_ethtool.c  |   47 
 drivers/net/ethernet/samsung/xgmac_main.c |  152 -
 drivers/net/ethernet/samsung/xgmac_platform.c |4 +
 drivers/net/ethernet/samsung/xgmac_reg.h  |5 +
 6 files changed, 346 insertions(+), 2 deletions(-)

diff --git a/drivers/net/ethernet/samsung/xgmac_common.h 
b/drivers/net/ethernet/samsung/xgmac_common.h
index eb78c84..6b7f1de 100644
--- a/drivers/net/ethernet/samsung/xgmac_common.h
+++ b/drivers/net/ethernet/samsung/xgmac_common.h
@@ -118,6 +118,33 @@ struct xgmac_mtl_ops;
 #define RX_PTP_SIGNAL  0x0A
 #define RX_PTP_RESV_MSG0x0F
 
+/* EEE-LPI mode  flags*/
+#define TX_ENTRY_LPI_MODE  0x10
+#define TX_EXIT_LPI_MODE   0x20
+#define RX_ENTRY_LPI_MODE  0x40
+#define RX_EXIT_LPI_MODE   0x80
+
+/* EEE-LPI Interrupt status flag */
+#define LPI_INT_STATUS BIT(5)
+
+/* EEE-LPI Default timer values */
+#define LPI_LINK_STATUS_TIMER  0x3E8
+#define LPI_MAC_WAIT_TIMER 0x00
+
+/* EEE-LPI Control and status definitions */
+#define LPI_CTRL_STATUS_TXABIT(19)
+#define LPI_CTRL_STATUS_PLSDIS BIT(18)
+#define LPI_CTRL_STATUS_PLSBIT(17)
+#define LPI_CTRL_STATUS_LPIEN  BIT(16)
+#define LPI_CTRL_STATUS_TXRSTP BIT(11)
+#define LPI_CTRL_STATUS_RXRSTP BIT(10)
+#define LPI_CTRL_STATUS_RLPIST BIT(9)
+#define LPI_CTRL_STATUS_TLPIST BIT(8)
+#define LPI_CTRL_STATUS_RLPIEX BIT(3)
+#define LPI_CTRL_STATUS_RLPIEN BIT(2)
+#define LPI_CTRL_STATUS_TLPIEX BIT(1)
+#define LPI_CTRL_STATUS_TLPIEN BIT(0)
+
 enum dma_irq_status {
tx_hard_error = BIT(0),
tx_bump_tc = BIT(1),
@@ -202,6 +229,13 @@ struct xgmac_extra_stats {
unsigned long rx_buffer_access_err;
unsigned long rx_data_transfer_err;
 
+   /* EEE-LPI stats */
+   unsigned long tx_lpi_entry_n;
+   unsigned long tx_lpi_exit_n;
+   unsigned long rx_lpi_entry_n;
+   unsigned long rx_lpi_exit_n;
+   unsigned long eee_wakeup_error_n;
+
/* RX specific */
/* L2 error */
unsigned long rx_code_gmii_err;
@@ -310,6 +344,13 @@ struct xgmac_core_ops {
unsigned char feature_index);
/* adjust XGMAC speed */
void (*set_speed)(void __iomem *ioaddr, unsigned char speed);
+
+   /* EEE-LPI specific operations */
+   void (*set_eee_mode)(void __iomem *ioaddr);
+   void (*reset_eee_mode)(void __iomem *ioaddr);
+   void (*set_eee_timer)(void __iomem *ioaddr, const int ls,
+   const int tw);
+   void (*set_eee_pls)(void __iomem *ioaddr, const int link);
 };
 
 const struct xgmac_core_ops *xgmac_get_core_ops(void);
@@ -371,6 +412,8 @@ struct xgmac_hw_features {
/* IEEE 1588-2008 */
unsigned int atime_stamp;
 
+   unsigned int eee;
+
unsigned int tx_csum_offload;
unsigned int rx_csum_offload;
unsigned int multi_macaddr;
@@ -451,6 +494,14 @@ struct xgmac_priv_data {
u32 adv_ts;
int use_riwt;
spinlock_t ptp_lock;
+
+   /* EEE-LPI specific members */
+   struct timer_list eee_ctrl_timer;
+   bool tx_path_in_lpi_mode;
+   int lpi_irq;
+   int eee_enabled;
+   int eee_active;
+   int tx_lpi_timer;
 };
 
 /* Function prototypes */
@@ -473,4 +524,7 @@ extern int xgmac_restore(struct net_device *ndev);
 
 extern const struct xgmac_mtl_ops *xgmac_get_mtl_ops(void);
 
+void xgmac_disable_eee_mode(struct xgmac_priv_data * const priv);
+bool xgmac_eee_init(struct xgmac_priv_data * const priv);
+
 #endif /* __XGMAC_COMMON_H__ */
diff --git a/drivers/net/ethernet/samsung/xgmac_core.c 
b/drivers/net/ethernet/samsung/xgmac_core.c
index 931d05b..ed475fa 100644
--- a/drivers/net/ethernet/samsung/xgmac_core.c
+++ b/drivers/net/ethernet/samsung/xgmac_core.c
@@ -46,11 +46,38 @@ static void xgmac_core_dump_regs(void __iomem *ioaddr)
 {
 }
 
+static int xgmac_get_lpi_status(void __iomem *ioaddr, const u32 irq_status)
+{
+   int status = 0;
+   int lpi_status;
+
+   /* Reading this register shall clear all the LPI status bits */
+   lpi_status = readl(ioaddr + XGMAC_CORE_LPI_CTRL_STATUS);
+
+   if (lpi_status & LPI_CTRL_STATUS_TLPIEN)
+   status |= TX_ENTRY_LPI_MODE;
+   if (lpi_status & LPI_CTRL_STATUS_TLPIEX)
+   status |= TX_EXIT_LPI_MODE;
+   if (lpi_status & LPI_CTRL_STATUS_RLPIEN)
+   status |= RX_ENTRY_LPI_MODE;
+   if (lpi_status & LPI_CTRL_STATUS_RLPIEX)
+   status |= RX_EXIT_LPI_MODE;
+
+   return status;
+}
+
 /* Handle extra events on specific interrupts hw dependent */
 static int xgmac_core_host_irq_status(void __iomem *

[PATCH 5/7] net: xgmac: add WOL(Wakeup-On-Lan)support for Samsung xgmac

2014-03-05 Thread Byungho An
From: Girish K S 

This patch adds support for wake up on magic frame arrival.
Also remote wake up on all other packets (unicast, multicast
broadcast) is supported.

Signed-off-by: Girish K S 
Signed-off-by: Byungho An 
---
 drivers/net/ethernet/samsung/xgmac_common.h   |   15 ++
 drivers/net/ethernet/samsung/xgmac_core.c |   29 ++
 drivers/net/ethernet/samsung/xgmac_ethtool.c  |   47 
 drivers/net/ethernet/samsung/xgmac_main.c |   71 +
 drivers/net/ethernet/samsung/xgmac_mtl.c  |   43 ++-
 drivers/net/ethernet/samsung/xgmac_mtl.h  |4 ++
 drivers/net/ethernet/samsung/xgmac_platform.c |4 ++
 drivers/net/ethernet/samsung/xgmac_reg.h  |3 ++
 8 files changed, 215 insertions(+), 1 deletion(-)

diff --git a/drivers/net/ethernet/samsung/xgmac_common.h 
b/drivers/net/ethernet/samsung/xgmac_common.h
index 349cddc..b7764aa 100644
--- a/drivers/net/ethernet/samsung/xgmac_common.h
+++ b/drivers/net/ethernet/samsung/xgmac_common.h
@@ -124,9 +124,18 @@ struct xgmac_mtl_ops;
 #define RX_ENTRY_LPI_MODE  0x40
 #define RX_EXIT_LPI_MODE   0x80
 
+/* PMT mode bits */
+#define PMT_PWRDWN BIT(0)
+#define PMT_MGPKT_EN   BIT(1)
+#define PMT_RWKPKT_EN  BIT(2)
+#define PMT_GUCAST_EN  BIT(9)
+
 /* EEE-LPI Interrupt status flag */
 #define LPI_INT_STATUS BIT(5)
 
+/* PMT Interrupt status */
+#define PMT_INT_STATUS BIT(4)
+
 /* EEE-LPI Default timer values */
 #define LPI_LINK_STATUS_TIMER  0x3E8
 #define LPI_MAC_WAIT_TIMER 0x00
@@ -228,6 +237,7 @@ struct xgmac_extra_stats {
unsigned long rx_desc_access_err;
unsigned long rx_buffer_access_err;
unsigned long rx_data_transfer_err;
+   unsigned long pmt_irq_event_n;
 
/* EEE-LPI stats */
unsigned long tx_lpi_entry_n;
@@ -506,6 +516,11 @@ struct xgmac_priv_data {
int eee_enabled;
int eee_active;
int tx_lpi_timer;
+
+   /* PM-WOL specific members */
+   int wolopts;
+   int wolenabled;
+   int wol_irq;
 };
 
 /* Function prototypes */
diff --git a/drivers/net/ethernet/samsung/xgmac_core.c 
b/drivers/net/ethernet/samsung/xgmac_core.c
index 43d093c..8fa2241 100644
--- a/drivers/net/ethernet/samsung/xgmac_core.c
+++ b/drivers/net/ethernet/samsung/xgmac_core.c
@@ -77,12 +77,41 @@ static int xgmac_core_host_irq_status(void __iomem *ioaddr,
if (unlikely(irq_status & LPI_INT_STATUS))
status |= xgmac_get_lpi_status(ioaddr, irq_status);
 
+   if (unlikely(irq_status & PMT_INT_STATUS)) {
+   /* clear the PMT bits 5 and 6 by reading the PMT status reg */
+   readl(ioaddr + XGMAC_CORE_PMT_CTL_STATUS_REG);
+   x->pmt_irq_event_n++;
+   }
+
return status;
 }
 
 /* Set power management mode (e.g. magic frame) */
 static void xgmac_core_pmt(void __iomem *ioaddr, unsigned long mode)
 {
+   unsigned int pmt = 0;
+
+   if (mode & WAKE_MAGIC) {
+   pr_debug("GMAC: WOL Magic frame\n");
+   pmt |= PMT_MGPKT_EN;
+   }
+   if (mode & WAKE_UCAST) {
+   pr_debug("GMAC: WOL on global unicast\n");
+   pmt |= PMT_GUCAST_EN;
+   }
+   if (mode & (WAKE_MCAST | WAKE_BCAST)) {
+   pr_debug("GMAC: WOL on any other packet\n");
+   pmt |= PMT_RWKPKT_EN;
+   }
+
+   writel(pmt, ioaddr + XGMAC_CORE_PMT_CTL_STATUS_REG);
+
+   /* Enable power down bit if any of the requested mode is enabled */
+   if (pmt) {
+   writel(XGMAC_RX_ENABLE, ioaddr + XGMAC_CORE_RX_CONFIG_REG);
+pmt |= PMT_PWRDWN;
+   writel(pmt, ioaddr + XGMAC_CORE_PMT_CTL_STATUS_REG);
+   }
 }
 
 /* Set/Get Unicast MAC addresses */
diff --git a/drivers/net/ethernet/samsung/xgmac_ethtool.c 
b/drivers/net/ethernet/samsung/xgmac_ethtool.c
index 48ef13e..08d0b17 100644
--- a/drivers/net/ethernet/samsung/xgmac_ethtool.c
+++ b/drivers/net/ethernet/samsung/xgmac_ethtool.c
@@ -9,6 +9,7 @@
  * it under the terms of the GNU General Public License version 2 as
  * published by the Free Software Foundation.
  */
+#include 
 #include 
 #include 
 #include 
@@ -31,6 +32,7 @@ static const struct xgmac_stats xgmac_gstrings_stats[] = {
XGMAC_STAT(rx_lpi_entry_n),
XGMAC_STAT(rx_lpi_exit_n),
XGMAC_STAT(eee_wakeup_error_n),
+   XGMAC_STAT(pmt_irq_event_n),
 };
 #define XGMAC_STATS_LEN ARRAY_SIZE(xgmac_gstrings_stats)
 
@@ -74,9 +76,54 @@ static int xgmac_ethtool_set_eee(struct net_device *dev,
return phy_ethtool_set_eee(priv->phydev, edata);
 }
 
+static void xgmac_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
+{
+   struct xgmac_priv_data *priv = netdev_priv(dev);
+
+   wol->wolopts = 0;
+   if (!device_can_wakeup(priv->device)) {
+   dev_err(priv->device, "cannot wakeup device\n");
+   return;
+   }
+
+   if (priv->hw_cap.pm

[PATCH 4/7] net: xgmac: add Checksum offload support for Samsung xgmac

2014-03-05 Thread Byungho An
From: Vipul Pandya 

This patch adds TX and RX checksum offload support.

Signed-off-by: Vipul Pandya 
Signed-off-by: Byungho An 
---
 drivers/net/ethernet/samsung/xgmac_common.h |6 +++-
 drivers/net/ethernet/samsung/xgmac_core.c   |   20 
 drivers/net/ethernet/samsung/xgmac_desc.c   |   29 +
 drivers/net/ethernet/samsung/xgmac_desc.h   |8 ++---
 drivers/net/ethernet/samsung/xgmac_main.c   |   46 ---
 5 files changed, 86 insertions(+), 23 deletions(-)

diff --git a/drivers/net/ethernet/samsung/xgmac_common.h 
b/drivers/net/ethernet/samsung/xgmac_common.h
index 6b7f1de..349cddc 100644
--- a/drivers/net/ethernet/samsung/xgmac_common.h
+++ b/drivers/net/ethernet/samsung/xgmac_common.h
@@ -351,6 +351,10 @@ struct xgmac_core_ops {
void (*set_eee_timer)(void __iomem *ioaddr, const int ls,
const int tw);
void (*set_eee_pls)(void __iomem *ioaddr, const int link);
+
+   /* Enable disable checksum offload operations */
+   void (*enable_rx_csum)(void __iomem *ioaddr);
+   void (*disable_rx_csum)(void __iomem *ioaddr);
 };
 
 const struct xgmac_core_ops *xgmac_get_core_ops(void);
@@ -466,7 +470,7 @@ struct xgmac_priv_data {
struct net_device *dev;
struct device *device;
struct xgmac_ops *hw;/* xgmac specific ops */
-   int no_csum_insertion;
+   int rxcsum_insertion;
spinlock_t lock;
spinlock_t stats_lock;
 
diff --git a/drivers/net/ethernet/samsung/xgmac_core.c 
b/drivers/net/ethernet/samsung/xgmac_core.c
index ed475fa..43d093c 100644
--- a/drivers/net/ethernet/samsung/xgmac_core.c
+++ b/drivers/net/ethernet/samsung/xgmac_core.c
@@ -217,6 +217,24 @@ static void  xgmac_set_eee_timer(void __iomem *ioaddr,
writel(value, ioaddr + XGMAC_CORE_LPI_TIMER_CTRL);
 }
 
+static void xgmac_enable_rx_csum(void __iomem *ioaddr)
+{
+   u32 ctrl;
+
+   ctrl = readl(ioaddr + XGMAC_CORE_RX_CONFIG_REG);
+   ctrl |= XGMAC_RX_CSUMOFFLOAD_ENABLE;
+   writel(ctrl, ioaddr + XGMAC_CORE_RX_CONFIG_REG);
+}
+
+static void xgmac_disable_rx_csum(void __iomem *ioaddr)
+{
+   u32 ctrl;
+
+   ctrl = readl(ioaddr + XGMAC_CORE_RX_CONFIG_REG);
+   ctrl &= ~XGMAC_RX_CSUMOFFLOAD_ENABLE;
+   writel(ctrl, ioaddr + XGMAC_CORE_RX_CONFIG_REG);
+}
+
 const struct xgmac_core_ops core_ops = {
.core_init = xgmac_core_init,
.dump_regs = xgmac_core_dump_regs,
@@ -233,6 +251,8 @@ const struct xgmac_core_ops core_ops = {
.reset_eee_mode = xgmac_reset_eee_mode,
.set_eee_timer = xgmac_set_eee_timer,
.set_eee_pls = xgmac_set_eee_pls,
+   .enable_rx_csum = xgmac_enable_rx_csum,
+   .disable_rx_csum = xgmac_disable_rx_csum,
 };
 
 const struct xgmac_core_ops *xgmac_get_core_ops(void)
diff --git a/drivers/net/ethernet/samsung/xgmac_desc.c 
b/drivers/net/ethernet/samsung/xgmac_desc.c
index 51b7e71..c5417de 100644
--- a/drivers/net/ethernet/samsung/xgmac_desc.c
+++ b/drivers/net/ethernet/samsung/xgmac_desc.c
@@ -37,13 +37,16 @@ static void xgmac_tx_desc_enable_tse(struct 
xgmac_tx_norm_desc *p, u8 is_tse,
 
 /* Assign buffer lengths for descriptor */
 static void xgmac_prepare_tx_desc(struct xgmac_tx_norm_desc *p, u8 is_fd,
-   int buf1_len, int pkt_len)
+   int buf1_len, int pkt_len, int cksum)
 {
p->tdes23.tx_rd_des23.first_desc = is_fd;
p->tdes23.tx_rd_des23.buf1_size = buf1_len;
 
p->tdes23.tx_rd_des23.tx_pkt_len.cksum_pktlen.total_pkt_len = pkt_len;
 
+   if (cksum)
+   p->tdes23.tx_rd_des23.tx_pkt_len.cksum_pktlen.cksum_ctl =
+   cic_full;
 }
 
 /* Set VLAN control information */
@@ -249,31 +252,40 @@ static int xgmac_get_rx_ld_status(struct 
xgmac_rx_norm_desc *p)
 
 
 /* Return the RX status looking at the WB fields */
-static void xgmac_rx_wbstatus(struct xgmac_rx_norm_desc *p,
-   struct xgmac_extra_stats *x)
+static int xgmac_rx_wbstatus(struct xgmac_rx_norm_desc *p,
+struct xgmac_extra_stats *x, int *checksum)
 {
+   int status = 0;
 
+   *checksum = CHECKSUM_UNNECESSARY;
if (p->rdes23.rx_wb_des23.err_summary) {
switch (p->rdes23.rx_wb_des23.err_l2_type) {
case RX_GMII_ERR:
+   status = -EINVAL;
x->rx_code_gmii_err++;
break;
case RX_WATCHDOG_ERR:
+   status = -EINVAL;
x->rx_watchdog_err++;
break;
case RX_CRC_ERR:
+   status = -EINVAL;
x->rx_crc_err++;
break;
case RX_GAINT_ERR:
+   status = -EINVAL;
x->rx_gaint_pkt_err++;
break;
case RX_IP_HDR_ERR:
+  

[PATCH 0/7] add new Samsung xgmac driver

2014-03-05 Thread Byungho An
Hi all,

This series adds Samsung xgmac driver.


Byungho An (1):
  MAINTAINERS: add maintainer for Samsung xgmac driver

Girish K S (2):
  net: xgmac: add EEE(Energy Efficient Ethernet) for Samsung xgmac
  net: xgmac: add WOL(Wakeup-On-Lan)support for Samsung xgmac

Siva Reddy (1):
  net: xgmac: add basic framework for Samsung 10Gb ethernet driver

Vipul Pandya (3):
  net: xgmac: add TSO support for Samsung xgmac
  net: xgmac: add Checksum offload support for Samsung xgmac
  net: xgmac: add ethtool related functions support Samsung xgmac

 .../devicetree/bindings/net/samsung-xgmac.txt  |   39 +
 MAINTAINERS|9 +
 drivers/net/ethernet/Kconfig   |1 +
 drivers/net/ethernet/Makefile  |1 +
 drivers/net/ethernet/samsung/Kconfig   |7 +
 drivers/net/ethernet/samsung/Makefile  |4 +
 drivers/net/ethernet/samsung/xgmac_common.h|  571 +
 drivers/net/ethernet/samsung/xgmac_core.c  |  290 +++
 drivers/net/ethernet/samsung/xgmac_desc.c  |  515 
 drivers/net/ethernet/samsung/xgmac_desc.h  |  298 +++
 drivers/net/ethernet/samsung/xgmac_dma.c   |  381 +++
 drivers/net/ethernet/samsung/xgmac_dma.h   |   51 +
 drivers/net/ethernet/samsung/xgmac_ethtool.c   |  628 +
 drivers/net/ethernet/samsung/xgmac_main.c  | 2447 
 drivers/net/ethernet/samsung/xgmac_mdio.c  |  274 +++
 drivers/net/ethernet/samsung/xgmac_mtl.c   |  279 +++
 drivers/net/ethernet/samsung/xgmac_mtl.h   |  108 +
 drivers/net/ethernet/samsung/xgmac_platform.c  |  272 +++
 drivers/net/ethernet/samsung/xgmac_reg.h   |  491 
 drivers/net/ethernet/samsung/xgmac_xpcs.c  |   92 +
 drivers/net/ethernet/samsung/xgmac_xpcs.h  |   38 +
 include/linux/xgmac_platform.h |   54 +
 22 files changed, 6850 insertions(+)

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Re: [PATCH v7 0/4] phy: Add new Exynos USB 2.0 PHY driver

2014-03-05 Thread Kishon Vijay Abraham I

Hi,

On Tuesday 04 March 2014 08:53 PM, Kamil Debski wrote:

Hi,

This is the seventh version of this patchset. First and most significant change
is that this patchset includes only patches touching the Generic PHY Framework.
Patches to the USB controllers were stripped as they require additional work.
S5PV210 support is also omitted - it requires more testing.

Thank you to everyone who joined the discussion, reviewed the patched and
contributed to making the code and consequently the Linux Kernel better.


Can you refresh your patches on
git://git.kernel.org/pub/scm/linux/kernel/git/kishon/linux-phy.git next
It's not applying cleanly.

While at that pls fix these checkpatch errors/warnings

on patch 3.
ERROR: code indent should use tabs where possible
#854: FILE: drivers/phy/phy-exynos4x12-usb2.c:233:
+^I^I^IEXYNOS_4x12_MODE_SWITCH_OFFSET,$

CHECK: Alignment should match open parenthesis
#854: FILE: drivers/phy/phy-exynos4x12-usb2.c:233:
+   regmap_update_bits(drv->reg_sys,
+   EXYNOS_4x12_MODE_SWITCH_OFFSET,

ERROR: code indent should use tabs where possible
#855: FILE: drivers/phy/phy-exynos4x12-usb2.c:234:
+^I^I^IEXYNOS_4x12_MODE_SWITCH_MASK,$

CHECK: Alignment should match open parenthesis
#986: FILE: drivers/phy/phy-samsung-usb2.c:29:
+   dev_dbg(drv->dev, "Request to power_on \"%s\" usb phy\n",
+   inst->cfg->label);

CHECK: Alignment should match open parenthesis
#1014: FILE: drivers/phy/phy-samsung-usb2.c:57:
+   dev_dbg(drv->dev, "Request to power_off \"%s\" usb phy\n",
+   inst->cfg->label);

CHECK: Alignment should match open parenthesis
#1146: FILE: drivers/phy/phy-samsung-usb2.c:189:
+   dev_err(drv->dev, "Failed to create usb2_phy \"%s\"\n",
+

And on patch 4

CHECK: Alignment should match open parenthesis
#350: FILE: drivers/phy/phy-exynos5250-usb2.c:212:
+   regmap_update_bits(drv->reg_sys,
+   EXYNOS_5250_MODE_SWITCH_OFFSET,

-Kishon
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Re: [PATCH 3/3] Documentation: mfd: s2mps11: Document support for S2MPS14

2014-03-05 Thread Sachin Kamat
Hi Krzysztof,

On 5 March 2014 14:52, Krzysztof Kozlowski  wrote:
> Add bindings documentation for S2MPS14 device to the s2mps11 driver.

nit: s/s2mps11/S2MPS11

>
> Signed-off-by: Krzysztof Kozlowski 
> Cc: Mark Brown 
> Cc: Liam Girdwood 
> Cc: Tomasz Figa 
> Cc: devicet...@vger.kernel.org
> Cc: Rob Herring 
> Cc: Pawel Moll 
> Cc: Mark Rutland 
> Cc: Ian Campbell 
> Cc: Kumar Gala 
> Acked-by: Tomasz Figa 
> ---
>  Documentation/devicetree/bindings/mfd/s2mps11.txt |   12 
>  1 file changed, 8 insertions(+), 4 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/mfd/s2mps11.txt 
> b/Documentation/devicetree/bindings/mfd/s2mps11.txt
> index 15ee89c3cc7b..f69bec294f02 100644
> --- a/Documentation/devicetree/bindings/mfd/s2mps11.txt
> +++ b/Documentation/devicetree/bindings/mfd/s2mps11.txt
> @@ -1,5 +1,5 @@
>
> -* Samsung S2MPS11 Voltage and Current Regulator
> +* Samsung S2MPS11 and S2MPS14 Voltage and Current Regulator
>
>  The Samsung S2MPS11 is a multi-function device which includes voltage and
>  current regulators, RTC, charger controller and other sub-blocks. It is
> @@ -7,7 +7,7 @@ interfaced to the host controller using an I2C interface. 
> Each sub-block is
>  addressed by the host system using different I2C slave addresses.
>
>  Required properties:
> -- compatible: Should be "samsung,s2mps11-pmic".
> +- compatible: Should be "samsung,s2mps11-pmic" or "samsung,s2mps14-pmic".
>  - reg: Specifies the I2C slave address of the pmic block. It should be 0x66.
>
>  Optional properties:
> @@ -59,10 +59,14 @@ supports. Note: The 'n' in LDOn and BUCKn represents the 
> LDO or BUCK number
>  as per the datasheet of s2mps11.
>
> - LDOn
> - - valid values for n are 1 to 38
> + - valid values for n are:
> +   - S2MPS11: 1 to 38
> +   - S2MPS14: 1 to 25
>   - Example: LDO1, LD02, LDO28
> - BUCKn
> - - valid values for n are 1 to 10.
> + - valid values for n are:
> +   - S2MPS11: 1 to 10
> +   - S2MPS14: 1 to 5
>   - Example: BUCK1, BUCK2, BUCK9
>
>  Example:
> --
> 1.7.9.5
>
Looks good.
Acked-by: Sachin Kamat 


-- 
With warm regards,
Sachin
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Re: [PATCH 2/3] regulator: s2mps11: Add set_suspend_disable for S2MPS14

2014-03-05 Thread Lee Jones
> S2MPS14 regulators support suspend mode where their status is controlled
> by PWREN coming from SoC. This patch implements the set_suspend_disable
> for S2MPS14 regulators.
> 
> Signed-off-by: Krzysztof Kozlowski 
> ---
>  drivers/regulator/s2mps11.c |   26 ++
>  include/linux/mfd/samsung/s2mps14.h |2 ++
>  2 files changed, 28 insertions(+)

For the MFD changes:
  Acked-by: Lee Jones 

-- 
Lee Jones
Linaro STMicroelectronics Landing Team Lead
Linaro.org │ Open source software for ARM SoCs
Follow Linaro: Facebook | Twitter | Blog
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[PATCH 1/3] regulator: s2mps11: Add support for S2MPS14 regulators

2014-03-05 Thread Krzysztof Kozlowski
Add support for S2MPS14 PMIC regulators to s2mps11 driver. The S2MPS14
has fewer BUCK-s and LDO-s than S2MPS11. It also does not support
controlling the BUCK ramp delay.

Signed-off-by: Krzysztof Kozlowski 
Cc: Mark Brown 
Cc: Liam Girdwood 
Reviewed-by: Yadwinder Singh Brar 
---
 drivers/regulator/Kconfig   |9 +-
 drivers/regulator/s2mps11.c |  252 ---
 2 files changed, 196 insertions(+), 65 deletions(-)

diff --git a/drivers/regulator/Kconfig b/drivers/regulator/Kconfig
index 4ddfb6c065c7..14ff714a25fb 100644
--- a/drivers/regulator/Kconfig
+++ b/drivers/regulator/Kconfig
@@ -426,12 +426,13 @@ config REGULATOR_RC5T583
  outputs which can be controlled by i2c communication.
 
 config REGULATOR_S2MPS11
-   tristate "Samsung S2MPS11 voltage regulator"
+   tristate "Samsung S2MPS11/S2MPS14 voltage regulator"
depends on MFD_SEC_CORE
help
-This driver supports a Samsung S2MPS11 voltage output regulator
-via I2C bus. S2MPS11 is comprised of high efficient Buck converters
-including Dual-Phase Buck converter, Buck-Boost converter, various 
LDOs.
+This driver supports a Samsung S2MPS11/S2MPS14 voltage output
+regulator via I2C bus. The chip is comprised of high efficient Buck
+converters including Dual-Phase Buck converter, Buck-Boost converter,
+various LDOs.
 
 config REGULATOR_S5M8767
tristate "Samsung S5M8767A voltage regulator"
diff --git a/drivers/regulator/s2mps11.c b/drivers/regulator/s2mps11.c
index b51ccf534a7c..1a732e54cd70 100644
--- a/drivers/regulator/s2mps11.c
+++ b/drivers/regulator/s2mps11.c
@@ -1,13 +1,18 @@
 /*
  * s2mps11.c
  *
- * Copyright (c) 2012 Samsung Electronics Co., Ltd
+ * Copyright (c) 2012-2014 Samsung Electronics Co., Ltd
  *  http://www.samsung.com
  *
- *  This program is free software; you can redistribute  it and/or modify it
- *  under  the terms of  the GNU General  Public License as published by the
- *  Free Software Foundation;  either version 2 of the  License, or (at your
- *  option) any later version.
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
  *
  */
 
@@ -24,6 +29,7 @@
 #include 
 #include 
 #include 
+#include 
 
 struct s2mps11_info {
unsigned int rdev_num;
@@ -233,7 +239,7 @@ static struct regulator_ops s2mps11_buck_ops = {
.set_ramp_delay = s2mps11_set_ramp_delay,
 };
 
-#define regulator_desc_ldo1(num)   {   \
+#define regulator_desc_s2mps11_ldo1(num)   {   \
.name   = "LDO"#num,\
.id = S2MPS11_LDO##num, \
.ops= &s2mps11_ldo_ops, \
@@ -247,7 +253,7 @@ static struct regulator_ops s2mps11_buck_ops = {
.enable_reg = S2MPS11_REG_L1CTRL + num - 1, \
.enable_mask= S2MPS11_ENABLE_MASK   \
 }
-#define regulator_desc_ldo2(num)   {   \
+#define regulator_desc_s2mps11_ldo2(num) { \
.name   = "LDO"#num,\
.id = S2MPS11_LDO##num, \
.ops= &s2mps11_ldo_ops, \
@@ -262,7 +268,7 @@ static struct regulator_ops s2mps11_buck_ops = {
.enable_mask= S2MPS11_ENABLE_MASK   \
 }
 
-#define regulator_desc_buck1_4(num){   \
+#define regulator_desc_s2mps11_buck1_4(num) {  \
.name   = "BUCK"#num,   \
.id = S2MPS11_BUCK##num,\
.ops= &s2mps11_buck_ops,\
@@ -278,7 +284,7 @@ static struct regulator_ops s2mps11_buck_ops = {
.enable_mask= S2MPS11_ENABLE_MASK   \
 }
 
-#define regulator_desc_buck5   {   \
+#define regulator_desc_s2mps11_buck5 { \
.name   = "BUCK5",  \
.id = S2MPS11_BUCK5,\
.ops= &s2mps11_buck_ops,\
@@ -294,7 +300,7 @@ static struct regulator_ops s2mps11_buck_ops = {
.enable_mask= S2MPS11_ENABLE_MASK   \
 }
 
-#define regulator_desc_buck6_8(num){   \
+#define regulator_desc_s2mps11_buck6_8(num) {  \
.name   = "BUCK"#num,   \
.id = S2MPS11_BUCK##num, 

[PATCH 3/3] Documentation: mfd: s2mps11: Document support for S2MPS14

2014-03-05 Thread Krzysztof Kozlowski
Add bindings documentation for S2MPS14 device to the s2mps11 driver.

Signed-off-by: Krzysztof Kozlowski 
Cc: Mark Brown 
Cc: Liam Girdwood 
Cc: Tomasz Figa 
Cc: devicet...@vger.kernel.org
Cc: Rob Herring 
Cc: Pawel Moll 
Cc: Mark Rutland 
Cc: Ian Campbell 
Cc: Kumar Gala 
Acked-by: Tomasz Figa 
---
 Documentation/devicetree/bindings/mfd/s2mps11.txt |   12 
 1 file changed, 8 insertions(+), 4 deletions(-)

diff --git a/Documentation/devicetree/bindings/mfd/s2mps11.txt 
b/Documentation/devicetree/bindings/mfd/s2mps11.txt
index 15ee89c3cc7b..f69bec294f02 100644
--- a/Documentation/devicetree/bindings/mfd/s2mps11.txt
+++ b/Documentation/devicetree/bindings/mfd/s2mps11.txt
@@ -1,5 +1,5 @@
 
-* Samsung S2MPS11 Voltage and Current Regulator
+* Samsung S2MPS11 and S2MPS14 Voltage and Current Regulator
 
 The Samsung S2MPS11 is a multi-function device which includes voltage and
 current regulators, RTC, charger controller and other sub-blocks. It is
@@ -7,7 +7,7 @@ interfaced to the host controller using an I2C interface. Each 
sub-block is
 addressed by the host system using different I2C slave addresses.
 
 Required properties:
-- compatible: Should be "samsung,s2mps11-pmic".
+- compatible: Should be "samsung,s2mps11-pmic" or "samsung,s2mps14-pmic".
 - reg: Specifies the I2C slave address of the pmic block. It should be 0x66.
 
 Optional properties:
@@ -59,10 +59,14 @@ supports. Note: The 'n' in LDOn and BUCKn represents the 
LDO or BUCK number
 as per the datasheet of s2mps11.
 
- LDOn
- - valid values for n are 1 to 38
+ - valid values for n are:
+   - S2MPS11: 1 to 38
+   - S2MPS14: 1 to 25
  - Example: LDO1, LD02, LDO28
- BUCKn
- - valid values for n are 1 to 10.
+ - valid values for n are:
+   - S2MPS11: 1 to 10
+   - S2MPS14: 1 to 5
  - Example: BUCK1, BUCK2, BUCK9
 
 Example:
-- 
1.7.9.5

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[PATCH 2/3] regulator: s2mps11: Add set_suspend_disable for S2MPS14

2014-03-05 Thread Krzysztof Kozlowski
S2MPS14 regulators support suspend mode where their status is controlled
by PWREN coming from SoC. This patch implements the set_suspend_disable
for S2MPS14 regulators.

Signed-off-by: Krzysztof Kozlowski 
---
 drivers/regulator/s2mps11.c |   26 ++
 include/linux/mfd/samsung/s2mps14.h |2 ++
 2 files changed, 28 insertions(+)

diff --git a/drivers/regulator/s2mps11.c b/drivers/regulator/s2mps11.c
index 1a732e54cd70..d3209acefd79 100644
--- a/drivers/regulator/s2mps11.c
+++ b/drivers/regulator/s2mps11.c
@@ -399,6 +399,31 @@ static const struct regulator_desc s2mps11_regulators[] = {
regulator_desc_s2mps11_buck10,
 };
 
+static int s2mps14_set_suspend_disable(struct regulator_dev *rdev)
+{
+   int ret;
+   unsigned int data;
+
+   /* LDO3 should be always on and does not support suspend mode */
+   if (rdev_get_id(rdev) == S2MPS14_LDO3)
+   return 0;
+
+   ret = regmap_read(rdev->regmap, rdev->desc->enable_reg, &data);
+   if (ret < 0)
+   return ret;
+
+   /*
+* Don't enable suspend mode if regulator is already disabled because
+* this would effectively for a short time turn on the regulator after
+* resuming.
+*/
+   if (!(data & rdev->desc->enable_mask))
+   return 0;
+
+   return regmap_update_bits(rdev->regmap, rdev->desc->enable_reg,
+   rdev->desc->enable_mask, S2MPS14_ENABLE_SUSPEND);
+}
+
 static struct regulator_ops s2mps14_reg_ops = {
.list_voltage   = regulator_list_voltage_linear,
.map_voltage= regulator_map_voltage_linear,
@@ -408,6 +433,7 @@ static struct regulator_ops s2mps14_reg_ops = {
.get_voltage_sel= regulator_get_voltage_sel_regmap,
.set_voltage_sel= regulator_set_voltage_sel_regmap,
.set_voltage_time_sel   = regulator_set_voltage_time_sel,
+   .set_suspend_disable= s2mps14_set_suspend_disable,
 };
 
 #define regulator_desc_s2mps14_ldo1(num) { \
diff --git a/include/linux/mfd/samsung/s2mps14.h 
b/include/linux/mfd/samsung/s2mps14.h
index ec1e0857ddde..4b449b8ac548 100644
--- a/include/linux/mfd/samsung/s2mps14.h
+++ b/include/linux/mfd/samsung/s2mps14.h
@@ -146,6 +146,8 @@ enum s2mps14_regulators {
 #define S2MPS14_BUCK_VSEL_MASK 0xFF
 #define S2MPS14_ENABLE_MASK(0x03 << S2MPS14_ENABLE_SHIFT)
 #define S2MPS14_ENABLE_SHIFT   6
+/* On/Off controlled by PWREN */
+#define S2MPS14_ENABLE_SUSPEND (0x01 << S2MPS14_ENABLE_SHIFT)
 #define S2MPS14_LDO_N_VOLTAGES (S2MPS14_LDO_VSEL_MASK + 1)
 #define S2MPS14_BUCK_N_VOLTAGES(S2MPS14_BUCK_VSEL_MASK + 1)
 
-- 
1.7.9.5

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[PATCH 0/3] regulator: s2mps11: Add support for S2MPS14 regulators

2014-03-05 Thread Krzysztof Kozlowski
Hi,

This patchset adds support for the S2MPS14 device to the s2mps11 regulator
driver. It's a subset of previously sent patches for S2MPS14 device:
http://thread.gmane.org/gmane.linux.kernel.samsung-soc/27194/focus=1649217
along with one new patch:
 - PATCH 2/3: regulator: s2mps11: Add set_suspend_disable for S2MPS14
which replaces previous "opmode" idea.


These patches are rebased against linux-next tree (next-20140305) because
they depend on changes in main MFD sec-core and s2mps11 regulator driver.


Best regards,
Krzysztof

Krzysztof Kozlowski (3):
  regulator: s2mps11: Add support for S2MPS14 regulators
  regulator: s2mps11: Add set_suspend_disable for S2MPS14
  Documentation: mfd: s2mps11: Document support for S2MPS14

 Documentation/devicetree/bindings/mfd/s2mps11.txt |   12 +-
 drivers/regulator/Kconfig |9 +-
 drivers/regulator/s2mps11.c   |  278 -
 include/linux/mfd/samsung/s2mps14.h   |2 +
 4 files changed, 232 insertions(+), 69 deletions(-)

-- 
1.7.9.5

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RE: [PATCH v7 3/4] phy: Add new Exynos USB 2.0 PHY driver

2014-03-05 Thread Kamil Debski
Hi Sander,

> From: Kamil Debski [mailto:k.deb...@samsung.com]
> Sent: Tuesday, March 04, 2014 4:24 PM
> 
> Add a new driver for the Exynos USB 2.0 PHY. The new driver uses the
> generic PHY framework. The driver includes support for the Exynos 4210
> and 4x12 SoC families.
> 
> Signed-off-by: Kamil Debski 

Sander, you did test the v6 of this patch, thus I am adding your
"Tested-by".
Could you confirm that this version works as well?

Tested-by: Sander Hollaar 

Best wishes,
-- 
Kamil Debski
Samsung R&D Institute Poland

> ---
>  .../devicetree/bindings/phy/samsung-phy.txt|   53 
>  Documentation/phy/samsung-usb2.txt |  134 
>  drivers/phy/Kconfig|   29 ++
>  drivers/phy/Makefile   |3 +
>  drivers/phy/phy-exynos4210-usb2.c  |  262
> 
>  drivers/phy/phy-exynos4x12-usb2.c  |  330
> 
>  drivers/phy/phy-samsung-usb2.c |  223
> +
>  drivers/phy/phy-samsung-usb2.h |   67 
>  8 files changed, 1101 insertions(+)
>  create mode 100644 Documentation/phy/samsung-usb2.txt
>  create mode 100644 drivers/phy/phy-exynos4210-usb2.c  create mode
> 100644 drivers/phy/phy-exynos4x12-usb2.c  create mode 100644
> drivers/phy/phy-samsung-usb2.c  create mode 100644 drivers/phy/phy-
> samsung-usb2.h
> 
> diff --git a/Documentation/devicetree/bindings/phy/samsung-phy.txt
> b/Documentation/devicetree/bindings/phy/samsung-phy.txt
> index c0fccaa..bf955ab 100644
> --- a/Documentation/devicetree/bindings/phy/samsung-phy.txt
> +++ b/Documentation/devicetree/bindings/phy/samsung-phy.txt
> @@ -20,3 +20,56 @@ Required properties:
>  - compatible : should be "samsung,exynos5250-dp-video-phy";
>  - reg : offset and length of the Display Port PHY register set;
>  - #phy-cells : from the generic PHY bindings, must be 0;
> +
> +Samsung S5P/EXYNOS SoC series USB PHY
> +-
> +
> +Required properties:
> +- compatible : should be one of the listed compatibles:
> + - "samsung,exynos4210-usb2-phy"
> + - "samsung,exynos4x12-usb2-phy"
> +- reg : a list of registers used by phy driver
> + - first and obligatory is the location of phy modules registers
> +- samsung,sysreg-phandle - handle to syscon used to control the system
> +registers
> +- samsung,pmureg-phandle - handle to syscon used to control PMU
> +registers
> +- #phy-cells : from the generic phy bindings, must be 1;
> +- clocks and clock-names:
> + - the "phy" clock is required by the phy module, used as a gate
> + - the "ref" clock is used to get the rate of the clock provided
> to the
> +   PHY module
> +
> +The first phandle argument in the PHY specifier identifies the PHY,
> its
> +meaning is compatible dependent. For the currently supported SoCs
> +(Exynos 4210 and Exynos 4212) it is as follows:
> +  0 - USB device ("device"),
> +  1 - USB host ("host"),
> +  2 - HSIC0 ("hsic0"),
> +  3 - HSIC1 ("hsic1"),
> +
> +Exynos 4210 and Exynos 4212 use mode switching and require that mode
> +switch register is supplied.
> +
> +Example:
> +
> +For Exynos 4412 (compatible with Exynos 4212):
> +
> +usbphy: phy@125b {
> + compatible = "samsung,exynos4x12-usb2-phy";
> + reg = <0x125b 0x100>;
> + clocks = <&clock 305>, <&clock 2>;
> + clock-names = "phy", "ref";
> + status = "okay";
> + #phy-cells = <1>;
> + samsung,sysreg-phandle = <&sys_reg>;
> + samsung,pmureg-phandle = <&pmu_reg>;
> +};
> +
> +Then the PHY can be used in other nodes such as:
> +
> +phy-consumer@1234 {
> + phys = <&usbphy 2>;
> + phy-names = "phy";
> +};
> +
> +Refer to DT bindings documentation of particular PHY consumer devices
> +for more information about required PHYs and the way of specification.
> diff --git a/Documentation/phy/samsung-usb2.txt
> b/Documentation/phy/samsung-usb2.txt
> new file mode 100644
> index 000..0c8e260
> --- /dev/null
> +++ b/Documentation/phy/samsung-usb2.txt
> @@ -0,0 +1,134 @@
> +.-
> -
> ++
> +|Samsung USB 2.0 PHY adaptation layer
> |
> ++-
> +'
> +
> +| 1. Description
> ++
> +
> +The architecture of the USB 2.0 PHY module in Samsung SoCs is similar
> +among many SoCs. In spite of the similarities it proved difficult to
> +create a one driver that would fit all these PHY controllers. Often
> the
> +differences were minor and were found in particular bits of the
> +registers of the PHY. In some rare cases the order of register writes
> +or the PHY powering up process had to be altered. This adaptation
> layer
> +is a compromise between having separate drivers and having a single
> +driver with added support for many special cases.
> +
> +| 2. Files description
> ++

Re: Adding set_blob ioctl to DRM

2014-03-05 Thread Rahul Sharma
Thanks Daniel and Bob,

Agree, DT is good enough for initial settings. But when need to support
on the fly parameter changes, we will end up with 2 solutions. Adding KMS
ioctls or improvising blob prop infrastructure (Ruled out existing KMS 64bit
props as list of parameters is close to 30, as if now).

Later seems better for three reasons; writable blobs are more scalable and
can be used for any type of parameter groups. Secondly these are very similar
to 64 bit props and use same set_property, get_property infrastructure
(else need
to add set_gamma kind of callbacks till down the layer). And at last, it looks
more complete and appropriate to provide writable blobs just like other KMS
property.

I am ready with RFC and posting it today. We can also continue this discussion
in RFC thread.

Regards,
Rahul Sharma.

On 4 March 2014 23:09, Bob Paauwe  wrote:
> On Tue, 4 Mar 2014 09:35:57 +0100
> Daniel Vetter  wrote:
>
>> On Thu, Feb 20, 2014 at 11:24:40AM +1000, Dave Airlie wrote:
>> > > I am working on enabling a Color Enhancement block for primary display
>> > > for Exynos SoC. I need to
>> > > set a bunch of parameters like Color Conversion matrix, Contrast
>> > > Improvement parameters etc ~ 30 parameters from User Space.
>> > >
>> > > I am planning to use KDS blob property to receive these parameters.
>> > > Currently drivers are not allowed to create a blob property inside
>> > > drm. Neither, user space can set the blob. There is no ioctl provided
>> > > for same.
>> >
>> > I don't really like the idea of sticking unstructured data into an
>> > ioctl, for the driver to interpret,
>> >
>> > it opens the door to all kinds of ugly driver hacks, so I think we
>> > should have writable blobs,
>> > but with well defined structures inside them, not per-driver ones.
>> >
>> > Per-driver structures will lead to binary userspace drivers that start
>> > sticking a pll timings blob on the end and require it to set a mode,
>> > because I know driver developers will abuse any interface in the worst
>> > way possible.
>> >
>> > Currently the only blob we really have is EDID and its well defined,
>> > so if we are going to add writable blobs, they need to be well defined
>> > and as little as possible driver specific, just to avoid driver
>> > writings doing what driver writers do.
>>
>> tbh I don't see a use for structured blobs at all and would much more
>> prefer a pile of properties. With the atomic modeset ioctl proposals
>> floating around we could then pass in an entire sets of properties, which
>> is essentially what the blob prop would be doing.
>>
>> The upshot of going all-in with explicitly named properties is that we can
>> shovel kms configuration descriptions into different formats. I'm thinking
>> of shovelling an initial config into DT or something similar as an
>> example.  For i915 we have some experimental patches which load a DT blob
>> as a firmware file and use the property values to set things up.
>
> I have most of this working with i915 now.  Using a DT configuration I
> can set module parameters, select which crtc's to enable, which
> connectors to enable, set connector properties at init time.  I'm
> working on some plane property code now.
>
> It's close to being ready for initial review/feedback but there's one
> problem, you can't currently build an x86_64 (32 bit is fine) kernel
> with DT enabled because of an unresolved symbol in the apic code.
>
>>
>> So imo a blob property needs some _really_ good justification. My default
>> stance is to oppose it ;-)
>>
>> Cheers, Daniel
>
> ___
> dri-devel mailing list
> dri-de...@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/dri-devel
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Re: [PATCH 1/1] ARM: Exynos: Add generic compatible string

2014-03-05 Thread Sachin Kamat
On 25 February 2014 17:12, Arnd Bergmann  wrote:
> On Tuesday 25 February 2014, Olof Johansson wrote:
>> I disagree. I don't know what Samsung has in mind, but the revision of
>> the CPU doesn't have all that much to do with the rest of the SoC.
>> It's quite likely that some vendors (maybe not Samsung, but the same
>> concept applies) will ship 64-bit SoCs that are very similar to their
>> preceding 32-bit ones, same IP, similar busses, etc. I'm pretty sure
>> at least some vendors will do very close to that.
>
> Right.
>
>> So, if EXYNOS4 and EXYNOS5 can share a compatible value when they use
>> different CPUs, then there's no reason that whatever future 64-bit
>> ones can also share it.
>
> How about putting both 'samsung,exynos' and 'samsung,exynos4' in DT then
> and having the platform code match exynos4 and exynos5 but not exynos?
>
> That way, I think we are consistent and future-proof. Any code that needs
> to know if it's running on some exynos version can just check for the
> 'samsung,exynos' compatible value and that will work on both arm32 and
> arm64. Also, if we ever decide we want to run a 32-bit kernel on a 64-bit
> exynos, we can just add 'samsung,exynos6' (or whatever number that will
> be) to the list.
>
> My usual disclaimer for this: You should never ever consider actually
> running a 32-bit kernel on a 64-bit CPU, but at the same time there
> shouldn't be any reason why it won't work either, given that we require
> arm64 based systems to have all SoC specific code in drivers and we
> can use the same drivers on arm32.

Kukjin, Tomasz,

What is your opinion about Arnd's suggestion?

-- 
With warm regards,
Sachin
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Re: [PATCH 1/1] ARM: EXYNOS: Map SYSRAM address through DT

2014-03-05 Thread Sachin Kamat
On 20 February 2014 11:35, Sachin Kamat  wrote:
> Instead of hardcoding the SYSRAM details for each SoC,
> pass this information through device tree (DT) and make
> the code SoC agnostic.
>
> Signed-off-by: Sachin Kamat 
> ---
> Based on top of my earlier patch
> "ARM: EXYNOS: Consolidate CPU init code" at
> http://comments.gmane.org/gmane.linux.kernel.samsung-soc/26560
> ---
>  .../devicetree/bindings/arm/samsung-boards.txt |   11 +++
>  arch/arm/boot/dts/exynos4210-universal_c210.dts|5 +
>  arch/arm/boot/dts/exynos4210.dtsi  |   10 ++
>  arch/arm/boot/dts/exynos4x12.dtsi  |   10 ++
>  arch/arm/boot/dts/exynos5.dtsi |5 +
>  arch/arm/boot/dts/exynos5250.dtsi  |5 +
>  arch/arm/mach-exynos/common.c  |  104 
> 
>  arch/arm/mach-exynos/include/mach/map.h|7 --
>  8 files changed, 86 insertions(+), 71 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/arm/samsung-boards.txt 
> b/Documentation/devicetree/bindings/arm/samsung-boards.txt
> index 2168ed31e1b0..f79710eb7e79 100644
> --- a/Documentation/devicetree/bindings/arm/samsung-boards.txt
> +++ b/Documentation/devicetree/bindings/arm/samsung-boards.txt
> @@ -7,6 +7,17 @@ Required root node properties:
>  (a) "samsung,smdkv310" - for Samsung's SMDKV310 eval board.
>  (b) "samsung,exynos4210"  - for boards based on Exynos4210 SoC.
>
> +- sysram node, specifying the type (secure or non-secure) of SYSRAM
> +   - compatible: following types are supported
> +   "samsung,exynos4210-sysram" : Secure SYSRAM
> +   "samsung,exynos4210-sysram-ns" : Non-secure SYSRAM
> +   - reg: address of SYSRAM bank
> +
> +   sysram@0202 {
> +   compatible = "samsung,exynos4210-sysram";
> +   reg = <0x0202 0x1000>;
> +   };
> +
>  Optional:
>  - firmware node, specifying presence and type of secure firmware:
>  - compatible: only "samsung,secure-firmware" is currently supported
> diff --git a/arch/arm/boot/dts/exynos4210-universal_c210.dts 
> b/arch/arm/boot/dts/exynos4210-universal_c210.dts
> index d2e3f5f5916d..3ca3fb6aa5f4 100644
> --- a/arch/arm/boot/dts/exynos4210-universal_c210.dts
> +++ b/arch/arm/boot/dts/exynos4210-universal_c210.dts
> @@ -28,6 +28,11 @@
> bootargs = "console=ttySAC2,115200N8 root=/dev/mmcblk0p5 rw 
> rootwait earlyprintk panic=5 maxcpus=1";
> };
>
> +   sysram@0202 {
> +   compatible = "samsung,exynos4210-sysram";
> +   reg = <0x02025000 0x1000>;
> +   };
> +
> mct@1005 {
> compatible = "none";
> };
> diff --git a/arch/arm/boot/dts/exynos4210.dtsi 
> b/arch/arm/boot/dts/exynos4210.dtsi
> index 48ecd7a755ab..7f02c029ba68 100644
> --- a/arch/arm/boot/dts/exynos4210.dtsi
> +++ b/arch/arm/boot/dts/exynos4210.dtsi
> @@ -31,6 +31,16 @@
> pinctrl2 = &pinctrl_2;
> };
>
> +   sysram@0202 {
> +   compatible = "samsung,exynos4210-sysram";
> +   reg = <0x0202 0x1000>;
> +   };
> +
> +   sysram-ns@0203F000 {
> +   compatible = "samsung,exynos4210-sysram-ns";
> +   reg = <0x0203F000 0x1000>;
> +   };
> +
> pd_lcd1: lcd1-power-domain@10023CA0 {
> compatible = "samsung,exynos4210-pd";
> reg = <0x10023CA0 0x20>;
> diff --git a/arch/arm/boot/dts/exynos4x12.dtsi 
> b/arch/arm/boot/dts/exynos4x12.dtsi
> index 5c412aa14738..05006cab698b 100644
> --- a/arch/arm/boot/dts/exynos4x12.dtsi
> +++ b/arch/arm/boot/dts/exynos4x12.dtsi
> @@ -31,6 +31,16 @@
> mshc0 = &mshc_0;
> };
>
> +   sysram@0202 {
> +   compatible = "samsung,exynos4210-sysram";
> +   reg = <0x0202 0x1000>;
> +   };
> +
> +   sysram-ns@0204F000 {
> +   compatible = "samsung,exynos4210-sysram-ns";
> +   reg = <0x0204F000 0x1000>;
> +   };
> +
> pd_isp: isp-power-domain@10023CA0 {
> compatible = "samsung,exynos4210-pd";
> reg = <0x10023CA0 0x20>;
> diff --git a/arch/arm/boot/dts/exynos5.dtsi b/arch/arm/boot/dts/exynos5.dtsi
> index 258dca441f36..b70a54ec7157 100644
> --- a/arch/arm/boot/dts/exynos5.dtsi
> +++ b/arch/arm/boot/dts/exynos5.dtsi
> @@ -18,6 +18,11 @@
>  / {
> interrupt-parent = <&gic>;
>
> +   sysram@0202 {
> +   compatible = "samsung,exynos4210-sysram";
> +   reg = <0x0202 0x1000>;
> +   };
> +
> chipid@1000 {
> compatible = "samsung,exynos4210-chipid";
> reg = <0x1000 0x100>;
> diff --git a/arch/arm/boot/dts/exynos5250.dtsi 
> b/arch/arm/boot/dts/exynos5250.dtsi
> index b7dec41e32af..3ecdbd8e2b19 100644
> --- a/arch/arm/boot/dts/exynos5250.dtsi
> +++ b/arch/arm/boot/dts/exynos5250.dtsi
> @@ -70,6 +7

[PATCH 1/2] ARM: dts: Disable MDMA1 node for Arndale-octa board

2014-03-05 Thread Tushar Behera
MDMA1 can support both secure and non-secure AXI transactions. When this
is enabled in the kernel for boards that run in secure mode, we get
imprecise external aborts causing the kernel to oops.

Unhandled fault: imprecise external abort (0x1406) at 0x
Kernel panic - not syncing: Attempted to kill init! exitcode=0x0007

Suggested-by: Javi Merino 
Signed-off-by: Tushar Behera 
---
 arch/arm/boot/dts/exynos5420-arndale-octa.dts |   12 
 1 file changed, 12 insertions(+)

diff --git a/arch/arm/boot/dts/exynos5420-arndale-octa.dts 
b/arch/arm/boot/dts/exynos5420-arndale-octa.dts
index f509e8f..810ec73 100644
--- a/arch/arm/boot/dts/exynos5420-arndale-octa.dts
+++ b/arch/arm/boot/dts/exynos5420-arndale-octa.dts
@@ -361,4 +361,16 @@
gpio-key,wakeup;
};
};
+
+   amba {
+   mdma1: mdma@11C1 {
+   /*
+* MDMA1 can support both secure and non-secure
+* AXI transactions. When this is enabled in the kernel
+* for boards that run in secure mode, we are getting
+* imprecise external aborts causing the kernel to oops.
+*/
+   status = "disabled";
+   };
+   };
 };
-- 
1.7.9.5

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[PATCH 2/2] ARM: dts: Keep some essential LDOs enabled for Arndale-Octa

2014-03-05 Thread Tushar Behera
LDO3 and LDO23 need to be enabled in order for soft-reset to work.

Additionally LDO9 needs to be enabled for USB operations.

Signed-off-by: Tushar Behera 
---
 arch/arm/boot/dts/exynos5420-arndale-octa.dts |3 +++
 1 file changed, 3 insertions(+)

diff --git a/arch/arm/boot/dts/exynos5420-arndale-octa.dts 
b/arch/arm/boot/dts/exynos5420-arndale-octa.dts
index 810ec73..df975b5 100644
--- a/arch/arm/boot/dts/exynos5420-arndale-octa.dts
+++ b/arch/arm/boot/dts/exynos5420-arndale-octa.dts
@@ -113,6 +113,7 @@
regulator-name = "PVDD_APIO_MMCON_1V8";
regulator-min-microvolt = <180>;
regulator-max-microvolt = <180>;
+   regulator-always-on;
};
 
ldo4_reg: LDO4 {
@@ -150,6 +151,7 @@
regulator-name = "PVDD_USB_3V3";
regulator-min-microvolt = <300>;
regulator-max-microvolt = <300>;
+   regulator-always-on;
};
 
ldo10_reg: LDO10 {
@@ -218,6 +220,7 @@
regulator-name = "PVDD_MIFS_1V1";
regulator-min-microvolt = <120>;
regulator-max-microvolt = <120>;
+   regulator-always-on;
};
 
ldo24_reg: LDO24 {
-- 
1.7.9.5

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