Re: [linux-sunxi] DTS snippet to send clk_out_a to the clk_out_a_pins_a on sun7i-a20-olinuxino-micro.dts

[Chen-Yu Tsai]

On Thu, Oct 8, 2015 at 10:41 PM,   wrote:
> Good morning all
>
> I am trying to output allwinner A20 clk_out_a to the relevant PI12 of the
> cpu
> That should be possible in theory and olimex board actually has a pin where
> I can test it.
>
> My current setup is uBoot bootloader that can successfully boot Linux
> version 4.3.0-rc1-96427-g904c778-dirty
> I am using the sun7i-a20-olinuxino-micro.dts where I have removed the uart6
> (that should be conflicting with clk_out_a) and I have added
>
> _out_a {
> pinctrl-names = "default";
> pinctrl-0 = <_out_a_pins_a>;
> status = "okay";
> };
>
> in the dts file, compiled and installed
>
> Now, there is nothing whatsoever in the relevant pin and the question is
>
> What am I missing ?
>
> Thanks for any hints you may give me
>
> P.S. Yes, I have read quite a lot documentation on dts, but evidently not
> enough to find the solution myself.

The clock on that pin is by default off. You still need a driver to acquire
and enable it.

ChenYu

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[linux-sunxi] Re: [PATCH 2/2] pinctrl: sunxi: Add irq pinmuxing to sun6i "r" pincontroller

[Chen-Yu Tsai]

On Thu, Oct 15, 2015 at 10:27 PM, Hans de Goede <hdego...@redhat.com> wrote:
> Add pinmuxing for external interrupt functionality through the
> sun6i "r" pincontroller.
>
> Signed-off-by: Hans de Goede <hdego...@redhat.com>

Acked-by: Chen-Yu Tsai <w...@csie.org>

Thanks!

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[linux-sunxi] Re: [PATCH 1/2] pinctrl: sunxi: Fix irq_of_xlate for the r_pio pinctrl block

[Chen-Yu Tsai]

On Thu, Oct 15, 2015 at 10:27 PM, Hans de Goede <hdego...@redhat.com> wrote:
> The r_pio gpio / pin controller has a pin_base of non 0, we need to
> adjust for this before calling sunxi_pinctrl_desc_find_function_by_pin.
>
> Signed-off-by: Hans de Goede <hdego...@redhat.com>

Acked-by: Chen-Yu Tsai <w...@csie.org>

Thanks!

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Re: [linux-sunxi] Q88 tablet with broken screen

[Chen-Yu Tsai]

On Fri, Oct 16, 2015 at 2:52 PM, Hans de Goede  wrote:
> Hi,
>
> On 15-10-15 16:58, Benjamin Henrion wrote:
>>
>> Hi,
>>
>> I got  Q88 tablet with a broken screen from the flea market for 4EUR.
>>
>> Soldered the pins on the back for the serial port, got the console
>> working by powering the device from the USB port AND from the 5V DC
>> with a Nokia plug:
>
>
> Hi I've bought a couple of q8 tablets the same way :)
>
> So you say pins on the back, so I assume that this is an A13 device ?
>
> A number of things:
>
> 1) Try building the latest upstream u-botot (from git master) with
> the q8_a13_tablet_defconfig, and write that to an sdcard using:
>
> sudo dd if=u-boot-sunxi-with-spl.bin of=/dev/sdc bs=1024 seek=8
>
> Adjust /dev/sdc to point to your sdcard !
>
> 2) You say nokia plug, are you using a nokia charger ? The A13 based
> boards will draw up to 2A when charging, and most nokia chargers
> cannot deal with this, this also likely explains why you also need
> to hookup usb too. Make sure you've a decent 5v 2A power-supply
> hooked up to the power-barrel
>
> 3) The output you're seeing on the serial console is from the
> part of the firmware which manages charging, if the battery is
> too empty / your charger not powerful enough it will never get
> past that. What you can do is:
>
> a) insert microsd with u-boot from step 1.
> b) press the power button for 12 seconds, this forces the board to go really
> off.
> c) press the power button for 4 seconds
>
> Now you should see u-boot from the sd booting, and assuming only
> the digitizer is broken and not the lcd you will also see a tux
> on the lcd :)
>
>
>
> If the lcd works, you can order a new digitizer here:
>
> http://www.aliexpress.com/item/7-inch-Black-Touch-Screen-Digitizer-Glass-Touch-Panel-Allwinner-A13-Q8-tablet-pc-replacements-free/32213685488.html
>
> This will cost you another 4 euro :)
>
> But before doing so, measure the black bezel of the
> digitizer on the top (camera) and bottom sides. On most tablets
> it is 9 (top) / 10 (bottom) mm but on some it is only 7 / 8 mm,
> the replacement digitizers by default are 9/10 and loosing 2 mm
> of the screen on the top / bottom is quite annoying since that is
> where status icons / start menu / etc. typically are.
>
> If you've one of the 7 / 8 mm tablets, look at the part number
> on the wire coming out of the digitizer and search for that
> on ali express, likely you need this one:
>
> http://www.aliexpress.com/item/Free-shipping-to-send-7-inches-100-original-brand-new-tablet-touchscreen-CZY6075E-FPC/32291760888.html
>
> Note that the part-number is not only in the "subject" of the
> advertisement but also in the "Model Number" entry in "item specifics"
> this is important, otherwise you will still get the wrong digitizer.
>
> Also note that this one is twice as expensive as the more standard one.
>
> If the lcd is broken I would not bother with repairing the tablet,
> if you want to replace the lcd you must also replace the battery
> as their glue-ed together and forcibly removing the battery
> will bend it, rendering it unusable (using bend lipo batteries
> is a fire-hazard).

The glue might not be that strong. I successfully replaced the LCD
in my A13 tablet. It's best to use a knife to cut through the glue,
and not just pry it off.

ChenYu

> I hope this helps.
>
> Regards,
>
> Hans

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[linux-sunxi] Re: [PATCH v2 1/2] pinctrl: sunxi: Fix irq_of_xlate for the r_pio pinctrl block

[Chen-Yu Tsai]

On Fri, Oct 16, 2015 at 3:46 PM, Hans de Goede <hdego...@redhat.com> wrote:
> The r_pio gpio / pin controller has a pin_base of non 0, we need to
> adjust for this before calling sunxi_pinctrl_desc_find_function_by_pin.
>
> Signed-off-by: Hans de Goede <hdego...@redhat.com>

Acked-by: Chen-Yu Tsai <w...@csie.org>

Thanks!

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[linux-sunxi] Re: [PATCH v2 2/2] pinctrl: sunxi: Add irq pinmuxing to sun6i "r" pincontroller

[Chen-Yu Tsai]

On Fri, Oct 16, 2015 at 3:46 PM, Hans de Goede <hdego...@redhat.com> wrote:
> Add pinmuxing for external interrupt functionality through the
> sun6i "r" pincontroller.
>
> Signed-off-by: Hans de Goede <hdego...@redhat.com>

Acked-by: Chen-Yu Tsai <w...@csie.org>

Thanks!

> ---
> Changes in v2:
> -Fix compile error introduced by last minute changes before sending out
>  the patch (note to self: always do a recompile in such a case)

Sorry I didn't catch that either.

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Re: [linux-sunxi] Re: [PATCH 3/6] mfd: axp20x: Add support for RSB based AXP223 PMIC

[Chen-Yu Tsai]

On Fri, Oct 16, 2015 at 2:41 PM, Maxime Ripard
<maxime.rip...@free-electrons.com> wrote:
> On Thu, Oct 15, 2015 at 12:32:19AM +0800, Chen-Yu Tsai wrote:
>> The AXP223 is a new PMIC commonly paired with Allwinner A23/A33 SoCs.
>> It is functionally identical to AXP221; only the regulator default
>> voltage/status and the external host interface are different.
>>
>> Signed-off-by: Chen-Yu Tsai <w...@csie.org>
>> ---
>>  drivers/mfd/Kconfig| 12 ++
>>  drivers/mfd/Makefile   |  1 +
>>  drivers/mfd/axp20x-core.c  |  2 +
>>  drivers/mfd/axp20x-rsb.c   | 93 
>> ++
>>  include/linux/mfd/axp20x.h |  1 +
>>  5 files changed, 109 insertions(+)
>>  create mode 100644 drivers/mfd/axp20x-rsb.c
>>
>> diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig
>> index 9ba3feb3f2fc..6e5edb61d42e 100644
>> --- a/drivers/mfd/Kconfig
>> +++ b/drivers/mfd/Kconfig
>> @@ -84,6 +84,7 @@ config MFD_BCM590XX
>>  config MFD_AXP20X
>>   bool "X-Powers AXP series PMICs"
>>   select MFD_AXP20X_I2C
>> + select MFD_AXP20X_RSB
>>
>>  config MFD_AXP20X_CORE
>>   bool
>> @@ -102,6 +103,17 @@ config MFD_AXP20X_I2C
>> components like regulators or the PEK (Power Enable Key) under the
>> corresponding menus.
>>
>> +config MFD_AXP20X_RSB
>> + bool "X-Powers AXP series RSB PMICs"
>> + select MFD_AXP20X_CORE
>> + depends on SUNXI_RSB=y
>
> Do we need that? Even if the bus is compiled as a module, the driver
> will not be probed before that, will it?

There's a compile/link dependency on the __devm_regmap_init_sunxi_rsb().

And both drivers are bool, i.e. can't be compiled as a module. What we
don't want is enabling MFD_AXP20X_RSB without SUNXI_RSB.

AFAIK the same goes for the I2C version.

>> + help
>> +   If you say Y here you get support for the X-Powers AXP series RSB
>> +   based power management ICs (PMICs).
>> +   This driver include only the core APIs. You have to select individual
>> +   components like regulators or the PEK (Power Enable Key) under the
>> +   corresponding menus.
>> +
>>  config MFD_CROS_EC
>>   tristate "ChromeOS Embedded Controller"
>>   select MFD_CORE
>> diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile
>> index ce3ad5fd4e2f..1eb278619dd6 100644
>> --- a/drivers/mfd/Makefile
>> +++ b/drivers/mfd/Makefile
>> @@ -108,6 +108,7 @@ obj-$(CONFIG_MFD_DA9052_SPI)  += da9052-spi.o
>>  obj-$(CONFIG_MFD_DA9052_I2C) += da9052-i2c.o
>>  obj-$(CONFIG_MFD_AXP20X_CORE)+= axp20x-core.o
>>  obj-$(CONFIG_MFD_AXP20X_I2C) += axp20x-i2c.o
>> +obj-$(CONFIG_MFD_AXP20X_RSB) += axp20x-rsb.o
>>
>>  obj-$(CONFIG_MFD_LP3943) += lp3943.o
>>  obj-$(CONFIG_MFD_LP8788) += lp8788.o lp8788-irq.o
>> diff --git a/drivers/mfd/axp20x-core.c b/drivers/mfd/axp20x-core.c
>> index dd33548d93c4..baecccb6d400 100644
>> --- a/drivers/mfd/axp20x-core.c
>> +++ b/drivers/mfd/axp20x-core.c
>> @@ -32,6 +32,7 @@ static const char * const axp20x_model_names[] = {
>>   "AXP202",
>>   "AXP209",
>>   "AXP221",
>> + "AXP223",
>>   "AXP288",
>>  };
>>
>> @@ -575,6 +576,7 @@ int axp20x_match_device(struct axp20x_dev *axp20x, 
>> struct device *dev)
>>   axp20x->regmap_irq_chip = _regmap_irq_chip;
>>   break;
>>   case AXP221_ID:
>> + case AXP223_ID:
>>   axp20x->nr_cells = ARRAY_SIZE(axp22x_cells);
>>   axp20x->cells = axp22x_cells;
>>   axp20x->regmap_cfg = _regmap_config;
>> diff --git a/drivers/mfd/axp20x-rsb.c b/drivers/mfd/axp20x-rsb.c
>> new file mode 100644
>> index ..5d053d177717
>> --- /dev/null
>> +++ b/drivers/mfd/axp20x-rsb.c
>> @@ -0,0 +1,93 @@
>> +/*
>> + * axp20x-rsb.c - RSB driver for the X-Powers' Power Management ICs
>> + *
>> + * AXP20x typically comprises an adaptive USB-Compatible PWM charger, BUCK 
>> DC-DC
>> + * converters, LDOs, multiple 12-bit ADCs of voltage, current and 
>> temperature
>> + * as well as configurable GPIOs.
>> + *
>> + * This driver supports the RSB variants.
>> + *
>> + * Author: Chen-Yu Tsai <w...@csie.org>
>> + *
>> + * This program is free software; you can redistribute it and/or modify
>> + * it under the terms of the GNU General Public License version 2 as
>

[linux-sunxi] Re: [PATCH v2 5/5] ARM: dts: sun6i: Add support for Sinlinx A31s SDK board

[Chen-Yu Tsai]

On Fri, Oct 16, 2015 at 3:20 PM, Maxime Ripard
<maxime.rip...@free-electrons.com> wrote:
> Hi,
>
> On Mon, Oct 12, 2015 at 05:42:10PM +0800, Chen-Yu Tsai wrote:
>> On Mon, Oct 12, 2015 at 5:30 PM, Maxime Ripard
>> <maxime.rip...@free-electrons.com> wrote:
>> > Hi,
>> >
>> > On Sat, Oct 10, 2015 at 10:49:00PM +0800, Chen-Yu Tsai wrote:
>> >> + {
>> >> + /* Available on camera header */
>> >> + pinctrl-names = "default";
>> >> + pinctrl-0 = <_pins_a>;
>> >> + status = "okay";
>> >> +};
>> >> +
>> >> + {
>> >> + /* Available on LCD header */
>> >> + pinctrl-names = "default";
>> >> + pinctrl-0 = <_pins_a>;
>> >> + status = "okay";
>> >> +};
>> >
>> > Are those two actually used anywhere on the board itself, or just
>> > exposed on the pin headers?
>>
>> They are exposed as grouped headers. 1 header has all the camera
>> related stuff, like the CSI pins, and various voltage sources
>> from the PMIC. The other has the LCD pins, resistive touchpanel,
>> I2C for capacitive touchpanel, and of course voltage sources.
>>
>> The LCD header is an FPC connector, while the camera header is
>> the common (common for sunxi devboards) 2.0mm pins. I'm not sure
>> if there is some common pinout amongst vendors, but at least
>> Sinlinx sells their own 7" LCD display w/ CTP, VGA converter,
>> and camera modules. I have both the LCD and VGA converter.
>>
>> Note that these I2C pins have valid external pull-ups. I doubt
>> they can be easily re-purposed.
>
> Still, the policy we've had so far is that if the user can use it for
> something else (like a GPIO, which is the case here), we don't do
> enforce any default, and the user will make the right choice.

To clarify, unless an actual device is connected, forcing a choice,
we won't make that choice for the user, even if the connector is
specifically designed for one type of application.

Did I get that right?

Thanks

ChenYu

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Re: [linux-sunxi] [PATCH] dts: sun6i: yones toptech bs1078 v2: Add AXP221 support to dts

[Chen-Yu Tsai]

Hi,

On Fri, Oct 9, 2015 at 1:06 PM, Lawrence Yu  wrote:
> From: lyu 
>
> Enable the axp221 PMIC chip in the dts file.
> Allows board to power off correctly from the poweroff command
>
> Tested on Contixo Q102 Tablet which uses the yones toptech bs1078 v2 pcb.
> ---
>  .../dts/sun6i-a31s-yones-toptech-bs1078-v2.dts | 86 
> ++
>  1 file changed, 86 insertions(+)
>
> diff --git a/arch/arm/boot/dts/sun6i-a31s-yones-toptech-bs1078-v2.dts 
> b/arch/arm/boot/dts/sun6i-a31s-yones-toptech-bs1078-v2.dts
> index b199020..57bc315 100644
> --- a/arch/arm/boot/dts/sun6i-a31s-yones-toptech-bs1078-v2.dts
> +++ b/arch/arm/boot/dts/sun6i-a31s-yones-toptech-bs1078-v2.dts
> @@ -113,6 +113,92 @@
> allwinner,pull = ;
>  };
>
> + {
> +   status = "okay";
> +
> +   axp221: pmic@68 {
> +   compatible = "x-powers,axp221";
> +   reg = <0x68>;
> +   interrupt-parent = <_intc>;
> +   interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
> +   interrupt-controller;
> +   #interrupt-cells = <1>;
> +   dcdc1-supply = <_3v0>;
> +   dcdc5-supply = <_dram>;
> +
> +   regulators {

We now have axp22x.dtsi in sunxi-next. Can you incorporate that instead?

See sun6i-a31-hummingbird.dts for an example.

Thanks!

ChenYu

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Re: [linux-sunxi] Re: [PATCH 3/6] mfd: axp20x: Add support for RSB based AXP223 PMIC

[Chen-Yu Tsai]

On Tue, Oct 20, 2015 at 2:48 AM, Maxime Ripard
<maxime.rip...@free-electrons.com> wrote:
> On Mon, Oct 19, 2015 at 02:20:29PM +0800, Chen-Yu Tsai wrote:
>> On Mon, Oct 19, 2015 at 2:02 PM, Maxime Ripard
>> <maxime.rip...@free-electrons.com> wrote:
>> > On Fri, Oct 16, 2015 at 02:46:23PM +0800, Chen-Yu Tsai wrote:
>> >> On Fri, Oct 16, 2015 at 2:41 PM, Maxime Ripard
>> >> <maxime.rip...@free-electrons.com> wrote:
>> >> > On Thu, Oct 15, 2015 at 12:32:19AM +0800, Chen-Yu Tsai wrote:
>> >> >> The AXP223 is a new PMIC commonly paired with Allwinner A23/A33 SoCs.
>> >> >> It is functionally identical to AXP221; only the regulator default
>> >> >> voltage/status and the external host interface are different.
>> >> >>
>> >> >> Signed-off-by: Chen-Yu Tsai <w...@csie.org>
>> >> >> ---
>> >> >>  drivers/mfd/Kconfig| 12 ++
>> >> >>  drivers/mfd/Makefile   |  1 +
>> >> >>  drivers/mfd/axp20x-core.c  |  2 +
>> >> >>  drivers/mfd/axp20x-rsb.c   | 93 
>> >> >> ++
>> >> >>  include/linux/mfd/axp20x.h |  1 +
>> >> >>  5 files changed, 109 insertions(+)
>> >> >>  create mode 100644 drivers/mfd/axp20x-rsb.c
>> >> >>
>> >> >> diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig
>> >> >> index 9ba3feb3f2fc..6e5edb61d42e 100644
>> >> >> --- a/drivers/mfd/Kconfig
>> >> >> +++ b/drivers/mfd/Kconfig
>> >> >> @@ -84,6 +84,7 @@ config MFD_BCM590XX
>> >> >>  config MFD_AXP20X
>> >> >>   bool "X-Powers AXP series PMICs"
>> >> >>   select MFD_AXP20X_I2C
>> >> >> + select MFD_AXP20X_RSB
>> >> >>
>> >> >>  config MFD_AXP20X_CORE
>> >> >>   bool
>> >> >> @@ -102,6 +103,17 @@ config MFD_AXP20X_I2C
>> >> >> components like regulators or the PEK (Power Enable Key) under 
>> >> >> the
>> >> >> corresponding menus.
>> >> >>
>> >> >> +config MFD_AXP20X_RSB
>> >> >> + bool "X-Powers AXP series RSB PMICs"
>> >> >> + select MFD_AXP20X_CORE
>> >> >> + depends on SUNXI_RSB=y
>> >> >
>> >> > Do we need that? Even if the bus is compiled as a module, the driver
>> >> > will not be probed before that, will it?
>> >>
>> >> There's a compile/link dependency on the __devm_regmap_init_sunxi_rsb().
>> >
>> > If it's exported, everything should be fine, no?
>> >
>> >> And both drivers are bool, i.e. can't be compiled as a module. What we
>> >> don't want is enabling MFD_AXP20X_RSB without SUNXI_RSB.
>> >
>> > What would really be the issue here? The driver wouldn't be probed,
>> > and that's it. Or am I missing something?
>>
>> The RSB bus / slave device functions have been merged into the RSB driver
>> itself. Enabling MFD_AXP20X_RSB without enabling SUNXI_RSB means that RSB
>> bus/device related functions are not compiled, i.e. link error:
>>
>> drivers/built-in.o: In function `axp20x_rsb_probe':
>> /home/wens/sunxi/linux/drivers/mfd/axp20x-rsb.c:64: undefined
>> reference to `__devm_regmap_init_sunxi_rsb'
>> drivers/built-in.o: In function `axp20x_rsb_driver_init':
>> /home/wens/sunxi/linux/drivers/mfd/axp20x-rsb.c:89: undefined
>> reference to `sunxi_rsb_driver_register'
>> Makefile:927: recipe for target 'vmlinux' failed
>>
>> The dependency is like "depends on I2C=y" for the I2C version.
>>
>> If you're asking about why "=y", I guess it's because MFD_AXP20X_RSB is bool,
>> and if the depended on symbol is a tristate, which it actually is for I2c,
>> we'd want it to be compiled in, and not built as a module, or again we'd get
>> a undefined reference link error.
>
> Yeah, but my point was more why not have both the RSB driver and MFD
> as a module? The part where RSB is a module and the driver is
> statically built doesn't make sense (and I don't think a depends on
> allow that), but having both make sense.

Ok. I have no problem with building them as modules. I was just following
what the original driver did.

It seems half the mfd driver can be built as modules, while the other
half can only be built-in. I don't know what the criteria is here.

>> Would it make sense to have SUNXI_RSB as a tristate symbol, i.e. can be built
>> as a module? I'm nore sure. For multi-platform kernels, probably? Currently 
>> it
>> isn't.
>
> Yes, it's better for multi-platform / distro kernels.

I guess I'll do a follow up patch for sunxi-rsb?

Regards
ChenYu

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[linux-sunxi] [PATCH] bus: sunxi-rsb: Allow building sunxi-rsb as a module

[Chen-Yu Tsai]

Allwinner Reduced Serial Bus support is only needed for sun[89]i
platforms. Having it built-in for multi-platform kernels leads to
a bigger kernel image, without any benefit for non sun[89]i systems.

The driver already exports the needed symbols and supports module
loading/unloading. Change the Kconfig symbol to tristate to allow
the user to build it as a module.

Signed-off-by: Chen-Yu Tsai <w...@csie.org>
---

Hi Arnd,

Maxime requested we make the RSB driver and subsequent PMIC drivers
tristate. Please squash this patch into patch 2 of the RSB series
when you apply them.


Thanks
ChenYu

---
 drivers/bus/Kconfig | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/bus/Kconfig b/drivers/bus/Kconfig
index e921b8c72f8c..78382de19ed9 100644
--- a/drivers/bus/Kconfig
+++ b/drivers/bus/Kconfig
@@ -122,7 +122,7 @@ config SIMPLE_PM_BUS
  "External Bus Interface") as found on several Renesas ARM SoCs.
 
 config SUNXI_RSB
-   bool "Allwinner sunXi Reduced Serial Bus Driver"
+   tristate "Allwinner sunXi Reduced Serial Bus Driver"
  default MACH_SUN8I || MACH_SUN9I
  depends on ARCH_SUNXI
  select REGMAP
-- 
2.6.1

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[linux-sunxi] [PATCH v6 2/2] bus: sunxi-rsb: Add driver for Allwinner Reduced Serial Bus

[Chen-Yu Tsai]

Reduced Serial Bus (RSB) is an Allwinner proprietery interface
used to communicate with PMICs and other peripheral ICs.

RSB is a two-wire push-pull serial bus that supports 1 master
device and up to 15 active slave devices.

Signed-off-by: Chen-Yu Tsai <w...@csie.org>
Reviewed-by: Mark Brown <broo...@kernel.org>
Signed-off-by: Maxime Ripard <maxime.rip...@free-electrons.com>
---
 drivers/bus/Kconfig   |  11 +
 drivers/bus/Makefile  |   1 +
 drivers/bus/sunxi-rsb.c   | 783 ++
 include/linux/sunxi-rsb.h | 105 +++
 4 files changed, 900 insertions(+)
 create mode 100644 drivers/bus/sunxi-rsb.c
 create mode 100644 include/linux/sunxi-rsb.h

diff --git a/drivers/bus/Kconfig b/drivers/bus/Kconfig
index 1a82f3a17681..e921b8c72f8c 100644
--- a/drivers/bus/Kconfig
+++ b/drivers/bus/Kconfig
@@ -121,6 +121,17 @@ config SIMPLE_PM_BUS
  Controller (BSC, sometimes called "LBSC within Bus Bridge", or
  "External Bus Interface") as found on several Renesas ARM SoCs.
 
+config SUNXI_RSB
+   bool "Allwinner sunXi Reduced Serial Bus Driver"
+ default MACH_SUN8I || MACH_SUN9I
+ depends on ARCH_SUNXI
+ select REGMAP
+ help
+ Say y here to enable support for Allwinner's Reduced Serial Bus
+ (RSB) support. This controller is responsible for communicating
+ with various RSB based devices, such as AXP223, AXP8XX PMICs,
+ and AC100/AC200 ICs.
+
 config VEXPRESS_CONFIG
bool "Versatile Express configuration bus"
default y if ARCH_VEXPRESS
diff --git a/drivers/bus/Makefile b/drivers/bus/Makefile
index 790e7b933fb2..fcb9f9794a1f 100644
--- a/drivers/bus/Makefile
+++ b/drivers/bus/Makefile
@@ -15,5 +15,6 @@ obj-$(CONFIG_MVEBU_MBUS)  += mvebu-mbus.o
 obj-$(CONFIG_OMAP_INTERCONNECT)+= omap_l3_smx.o omap_l3_noc.o
 
 obj-$(CONFIG_OMAP_OCP2SCP) += omap-ocp2scp.o
+obj-$(CONFIG_SUNXI_RSB)+= sunxi-rsb.o
 obj-$(CONFIG_SIMPLE_PM_BUS)+= simple-pm-bus.o
 obj-$(CONFIG_VEXPRESS_CONFIG)  += vexpress-config.o
diff --git a/drivers/bus/sunxi-rsb.c b/drivers/bus/sunxi-rsb.c
new file mode 100644
index ..846bc29c157d
--- /dev/null
+++ b/drivers/bus/sunxi-rsb.c
@@ -0,0 +1,783 @@
+/*
+ * RSB (Reduced Serial Bus) driver.
+ *
+ * Author: Chen-Yu Tsai <w...@csie.org>
+ *
+ * This file is licensed under the terms of the GNU General Public License
+ * version 2.  This program is licensed "as is" without any warranty of any
+ * kind, whether express or implied.
+ *
+ * The RSB controller looks like an SMBus controller which only supports
+ * byte and word data transfers. But, it differs from standard SMBus
+ * protocol on several aspects:
+ * - it uses addresses set at runtime to address slaves. Runtime addresses
+ *   are sent to slaves using their 12bit hardware addresses. Up to 15
+ *   runtime addresses are available.
+ * - it adds a parity bit every 8bits of data and address for read and
+ *   write accesses; this replaces the ack bit
+ * - only one read access is required to read a byte (instead of a write
+ *   followed by a read access in standard SMBus protocol)
+ * - there's no Ack bit after each read access
+ *
+ * This means this bus cannot be used to interface with standard SMBus
+ * devices. Devices known to support this interface include the AXP223,
+ * AXP809, and AXP806 PMICs, and the AC100 audio codec, all from X-Powers.
+ *
+ * A description of the operation and wire protocol can be found in the
+ * RSB section of Allwinner's A80 user manual, which can be found at
+ *
+ * https://github.com/allwinner-zh/documents/tree/master/A80
+ *
+ * This document is officially released by Allwinner.
+ *
+ * This driver is based on i2c-sun6i-p2wi.c, the P2WI bus driver.
+ *
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+/* RSB registers */
+#define RSB_CTRL   0x0 /* Global control */
+#define RSB_CCR0x4 /* Clock control */
+#define RSB_INTE   0x8 /* Interrupt controls */
+#define RSB_INTS   0xc /* Interrupt status */
+#define RSB_ADDR   0x10/* Address to send with read/write command */
+#define RSB_DATA   0x1c/* Data to read/write */
+#define RSB_LCR0x24/* Line control */
+#define RSB_DMCR   0x28/* Device mode (init) control */
+#define RSB_CMD0x2c/* RSB Command */
+#define RSB_DAR0x30/* Device address / runtime address */
+
+/* CTRL fields */
+#define RSB_CTRL_START_TRANS   BIT(7)
+#define RSB_CTRL_ABORT_TRANS   BIT(6)
+#define RSB_CTRL_GLOBAL_INT_ENBBIT(1)
+#define RSB_CTRL_SOFT_RST  BIT(0)
+
+/* CLK CTRL fields */
+#define RSB_CCR_SDA_OUT_DELAY(v)   (((v) & 0x7)

[linux-sunxi] [PATCH v6 1/2] bus: sunxi-rsb: Add Allwinner Reduced Serial Bus (RSB) controller bindings

[Chen-Yu Tsai]

Reduced Serial Bus is a proprietary 2-line push-pull serial bus supporting
multiple slave devices. It was developed by Allwinner, Inc. and used by
Allwinner and X-Powers, Inc. for their line of PMICs and other peripheral
ICs.

Recent Allwinner SoCs, starting with the A23, have an RSB controller. This
is used to talk to the PMIC, and later with the A80 and A83 platform, the
audio codec IC.

Signed-off-by: Chen-Yu Tsai <w...@csie.org>
Signed-off-by: Maxime Ripard <maxime.rip...@free-electrons.com>
---
 .../devicetree/bindings/bus/sunxi-rsb.txt  | 47 ++
 1 file changed, 47 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/bus/sunxi-rsb.txt

diff --git a/Documentation/devicetree/bindings/bus/sunxi-rsb.txt 
b/Documentation/devicetree/bindings/bus/sunxi-rsb.txt
new file mode 100644
index ..3dd28343b6ce
--- /dev/null
+++ b/Documentation/devicetree/bindings/bus/sunxi-rsb.txt
@@ -0,0 +1,47 @@
+Allwinner Reduced Serial Bus (RSB) controller
+
+The RSB controller found on later Allwinner SoCs is an SMBus like 2 wire
+serial bus with 1 master and up to 15 slaves. It is represented by a node
+for the controller itself, and child nodes representing the slave devices.
+
+Required properties :
+
+ - reg : Offset and length of the register set for the controller.
+ - compatible  : Shall be "allwinner,sun8i-a23-rsb".
+ - interrupts  : The interrupt line associated to the RSB controller.
+ - clocks  : The gate clk associated to the RSB controller.
+ - resets  : The reset line associated to the RSB controller.
+ - #address-cells  : shall be 1
+ - #size-cells : shall be 0
+
+Optional properties :
+
+ - clock-frequency : Desired RSB bus clock frequency in Hz. Maximum is 20MHz.
+If not set this defaults to 3MHz.
+
+Child nodes:
+
+An RSB controller node can contain zero or more child nodes representing
+slave devices on the bus.  Child 'reg' properties should contain the slave
+device's hardware address. The hardware address is hardwired in the device,
+which can normally be found in the datasheet.
+
+Example:
+
+   rsb@01f03400 {
+   compatible = "allwinner,sun8i-a23-rsb";
+   reg = <0x01f03400 0x400>;
+   interrupts = <0 39 4>;
+   clocks = <_gates 3>;
+   clock-frequency = <300>;
+   resets = <_rst 3>;
+   #address-cells = <1>;
+   #size-cells = <0>;
+
+   pmic@3e3 {
+   compatible = "...";
+   reg = <0x3e3>;
+
+   /* ... */
+   };
+   };
-- 
2.6.1

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Re: [linux-sunxi] [PATCH v2] ARM: dts: sun7i: Correct USB regulators on pcDuino v3 Nano

[Chen-Yu Tsai]

On Sat, Oct 10, 2015 at 8:52 PM, Adam Sampson <a...@offog.org> wrote:
> The LinkSprite pcDuino v3 Nano's two USB host ports are powered by a
> single RT9701GB regulator, which has its enable input tied to the A20's
> PD2 pin, pulled up to 3v3 via a 10k resistor.
>
> However, the script.bin that shipped with the device listed PH11 and PH3
> as Vbus control pins for the two USB ports. Neither of these are
> actually connected to anything.
>
> Siarhei Siamashka spotted this problem while reviewing the other
> LinkSprite boards. This patch fixes it by only defining a single
> regulator, controlled by PD2. Testing shows that the USB ports are now
> (correctly) only powered up once the USB PHY driver is loaded.
>
> Reported-by: Siarhei Siamashka <siarhei.siamas...@gmail.com>
> Signed-off-by: Adam Sampson <a...@offog.org>

Reviewed-by: Chen-Yu Tsai <w...@csie.org>

Thanks!

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[linux-sunxi] [PATCH v2 2/5] ARM: dts: sunxi: Add dtsi for AXP22x PMIC

[Chen-Yu Tsai]

The AXP22x family of PMIC is used with some Allwinner SoCs. This
includes the AXP221, AXP221s and AXP223. They differ in the host
interface, maximum supply current for DCDC1 regulator, and default
voltage and state for various LDO regulators. Also, the AXP221s
does not support fine calibration of the battery fuel gauge.

This patch adds a dtsi file for all the common bindings for these
PMICs. Currently this is just listing all the regulator nodes. The
regulators are initialized based on their device node names.

Signed-off-by: Chen-Yu Tsai <w...@csie.org>
---
 arch/arm/boot/dts/axp22x.dtsi | 143 ++
 1 file changed, 143 insertions(+)
 create mode 100644 arch/arm/boot/dts/axp22x.dtsi

diff --git a/arch/arm/boot/dts/axp22x.dtsi b/arch/arm/boot/dts/axp22x.dtsi
new file mode 100644
index ..76302f58c478
--- /dev/null
+++ b/arch/arm/boot/dts/axp22x.dtsi
@@ -0,0 +1,143 @@
+/*
+ * Copyright 2015 Chen-Yu Tsai
+ *
+ * Chen-Yu Tsai <w...@csie.org>
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ *  a) This file is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This file is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ *  b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/*
+ * AXP221/221s/223 Integrated Power Management Chip
+ * http://www.x-powers.com/product/AXP22X.php
+ * http://dl.linux-sunxi.org/AXP/AXP221%20Datasheet%20V1.2%2020130326%20.pdf
+ */
+
+ {
+   interrupt-controller;
+   #interrupt-cells = <1>;
+
+   regulators {
+   /* Default work frequency for buck regulators */
+   x-powers,dcdc-freq = <3000>;
+
+   reg_dcdc1: dcdc1 {
+   regulator-name = "dcdc1";
+   };
+
+   reg_dcdc2: dcdc2 {
+   regulator-name = "dcdc2";
+   };
+
+   reg_dcdc3: dcdc3 {
+   regulator-name = "dcdc3";
+   };
+
+   reg_dcdc4: dcdc4 {
+   regulator-name = "dcdc4";
+   };
+
+   reg_dcdc5: dcdc5 {
+   regulator-name = "dcdc5";
+   };
+
+   reg_dc1sw: dc1sw {
+   regulator-name = "dc1sw";
+   };
+
+   reg_dc5ldo: dc5ldo {
+   regulator-name = "dc5ldo";
+   };
+
+   reg_aldo1: aldo1 {
+   regulator-name = "aldo1";
+   };
+
+   reg_aldo2: aldo2 {
+   regulator-name = "aldo2";
+   };
+
+   reg_aldo3: aldo3 {
+   regulator-name = "aldo3";
+   };
+
+   reg_dldo1: dldo1 {
+   regulator-name = "dldo1";
+   };
+
+   reg_dldo2: dldo2 {
+   regulator-name = "dldo2";
+   };
+
+   reg_dldo3: dldo3 {
+   regulator-name = "dldo3";
+   };
+
+   reg_dldo4: dldo4 {
+   regulator-n

[linux-sunxi] [PATCH v2 4/5] ARM: dts: sun6i: hummingbird: Enable AXP221 DC5LDO regulator as "vdd-cpus"

[Chen-Yu Tsai]

The DC5LDO regulator supplies VDD-CPUS, which is for the embedded
controller in the A31 SoC.

Signed-off-by: Chen-Yu Tsai <w...@csie.org>
---
 arch/arm/boot/dts/sun6i-a31-hummingbird.dts | 6 ++
 1 file changed, 6 insertions(+)

diff --git a/arch/arm/boot/dts/sun6i-a31-hummingbird.dts 
b/arch/arm/boot/dts/sun6i-a31-hummingbird.dts
index a9b87ae89855..9a74637f677f 100644
--- a/arch/arm/boot/dts/sun6i-a31-hummingbird.dts
+++ b/arch/arm/boot/dts/sun6i-a31-hummingbird.dts
@@ -200,6 +200,12 @@
regulator-name = "avcc";
 };
 
+_dc5ldo {
+   regulator-min-microvolt = <70>;
+   regulator-max-microvolt = <132>;
+   regulator-name = "vdd-cpus";
+};
+
 _dcdc1 {
regulator-always-on;
regulator-min-microvolt = <300>;
-- 
2.5.3

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[linux-sunxi] [PATCH v2 1/5] ARM: dts: sun6i: hummingbird: Fix VDD-CPU and VDD-GPU regulator names

[Chen-Yu Tsai]

The VDD-CPU and VDD-GPU regulators were incorrectly swapped.

Fixes: bab03561224ba ("ARM: dts: sun6i: hummingbird: Add AXP221 regulator
   nodes")

Signed-off-by: Chen-Yu Tsai <w...@csie.org>
---
 arch/arm/boot/dts/sun6i-a31-hummingbird.dts | 8 
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/arch/arm/boot/dts/sun6i-a31-hummingbird.dts 
b/arch/arm/boot/dts/sun6i-a31-hummingbird.dts
index f9d9fc07bc63..e25d4924dbe7 100644
--- a/arch/arm/boot/dts/sun6i-a31-hummingbird.dts
+++ b/arch/arm/boot/dts/sun6i-a31-hummingbird.dts
@@ -191,18 +191,18 @@
regulator-name = "vcc-3v0";
};
 
-   vdd_cpu: dcdc2 {
+   vdd_gpu: dcdc2 {
regulator-always-on;
regulator-min-microvolt = <70>;
regulator-max-microvolt = <132>;
-   regulator-name = "vdd-cpu";
+   regulator-name = "vdd-gpu";
};
 
-   vdd_gpu: dcdc3 {
+   vdd_cpu: dcdc3 {
regulator-always-on;
regulator-min-microvolt = <70>;
regulator-max-microvolt = <132>;
-   regulator-name = "vdd-gpu";
+   regulator-name = "vdd-cpu";
};
 
vdd_sys_dll: dcdc4 {
-- 
2.5.3

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[linux-sunxi] [PATCH v2 5/5] ARM: dts: sun6i: Add support for Sinlinx A31s SDK board

[Chen-Yu Tsai]

The Sinlinx A31s SDK is a A31s based module/baseboard development kit.

The core module has the SoC, PMIC, DRAM, eMMC and supporting components.
There are also pads for UART0, JTAG and I2S.

The baseboard has 100 Mbps Ethernet, 5x USB 2.0 host ports via a USB 2.0
hub chip, MMC, HDMI, SPDIF, CIR, audio jacks, 2 tablet-like volume
buttons, RS232 style UART and USB OTG (though VBUS is not connected).
Various headers are available for other addon modules, such as SDIO
WiFi, LCD display, camera sensor, UARTs, I2C, SPI and GPIOs.

Signed-off-by: Chen-Yu Tsai <w...@csie.org>
---
 arch/arm/boot/dts/Makefile |   1 +
 arch/arm/boot/dts/sun6i-a31s-sina31s-core.dtsi | 140 +
 arch/arm/boot/dts/sun6i-a31s-sina31s.dts   | 167 +
 3 files changed, 308 insertions(+)
 create mode 100644 arch/arm/boot/dts/sun6i-a31s-sina31s-core.dtsi
 create mode 100644 arch/arm/boot/dts/sun6i-a31s-sina31s.dts

diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 342ab3116feb..9fb5ece17b8e 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -609,6 +609,7 @@ dtb-$(CONFIG_MACH_SUN6I) += \
sun6i-a31-m9.dtb \
sun6i-a31-mele-a1000g-quad.dtb \
sun6i-a31s-cs908.dtb \
+   sun6i-a31s-sina31s.dtb \
sun6i-a31s-yones-toptech-bs1078-v2.dtb
 dtb-$(CONFIG_MACH_SUN7I) += \
sun7i-a20-bananapi.dtb \
diff --git a/arch/arm/boot/dts/sun6i-a31s-sina31s-core.dtsi 
b/arch/arm/boot/dts/sun6i-a31s-sina31s-core.dtsi
new file mode 100644
index ..ea69fb8ad4d8
--- /dev/null
+++ b/arch/arm/boot/dts/sun6i-a31s-sina31s-core.dtsi
@@ -0,0 +1,140 @@
+/*
+ * Copyright 2015 Chen-Yu Tsai <w...@csie.org>
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ *  a) This file is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This file is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ *  b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/dts-v1/;
+#include "sun6i-a31s.dtsi"
+#include "sunxi-common-regulators.dtsi"
+
+#include 
+#include 
+
+/ {
+   model = "Sinlinx SinA31s Core Board";
+   compatible = "sinlinx,sina31s", "allwinner,sun6i-a31s";
+
+   aliases {
+   serial0 = 
+   };
+};
+
+ {
+   cpu-supply = <_dcdc3>;
+};
+
+/* eMMC on core board */
+ {
+   pinctrl-names = "default";
+   pinctrl-0 = <_8bit_emmc_pins>;
+   vmmc-supply = <_dcdc1>;
+   bus-width = <8>;
+   non-removable;
+   status = "okay";
+};
+
+/* AXP221s PMIC on core board */
+ {
+   status = "okay";
+
+   axp22x: pmic@68 {
+   compatible = "x-powers,axp221";
+   reg = <0x68>;
+   interrupt-parent = <_intc>;
+   interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
+   };
+};
+
+#include "axp22x.dtsi"
+
+_aldo3 {
+   regulator-always-on;
+   regulator-min-microvolt = <270>;
+   regulator-max-microvolt = <330>;
+   regulator-name = "avcc";
+};
+
+_dc5ldo {
+   regulator-min-microvolt = <70>;
+   regu

[linux-sunxi] [PATCH v2 0/5] ARM: sunxi: Sinlinx SinA31s support / AXP22x dtsi conversion

[Chen-Yu Tsai]

Hi Maxime,

This is v2 of the Primo81/SinA31s series. I dropped the Primo81 stuff
as it needs more work.

Changes since v1:

  - Requires "ARM: dts: sun6i: hummingbird: Drop AXP221 DC1SW and DC5LDO
supplies"

  - Dropped already merged patches

  - Dropped Primo81 patch; needs more work to support various device
bindings

  - Renamed axp221.dtsi to axp22x.dtsi to generalize for AXP223 later on

  - Added "ARM: dts: sun6i: hummingbird: Fix VDD-CPU and VDD-GPU
regulator names"

  - Added 'ARM: dts: sun6i: hummingbird: Enable AXP221 DC5LDO regulator
as "vdd-cpus"'

This series adds support for Sinlinx's SinA31s development kit. This
also adds a common axp22x.dtsi, like we have for axp209 and axp152.
This will be used for AXP221/AXP223. The Hummingbird A31 dts is also
migrated to this.

Patch 1 fixes the regulator names for the Hummingbird A31. The CPU
and GPU regulators were mixed up.

Patch 2 adds a common dtsi for the AXP22x family of PMICs. This
includes listing all the regulators, and the basic common properties,
like "interrupt-controller".

Patch 3 migrates the Hummingbird A31 dts to use the new axp221.dtsi

Patch 4 enables the AXP221 DC5LDO regulator on the Hummingbird A31.
This is used to power the embedded controller/processor core.

Patch 5 adds dtsi/dts files for the Sinlinx SinA31s development kit.


Regards
ChenYu

Chen-Yu Tsai (5):
  ARM: dts: sun6i: hummingbird: Fix VDD-CPU and VDD-GPU regulator names
  ARM: dts: sunxi: Add dtsi for AXP22x PMIC
  ARM: dts: sun6i: hummingbird: Use axp22x.dtsi for AXP221 regulators
  ARM: dts: sun6i: hummingbird: Enable AXP221 DC5LDO regulator as
"vdd-cpus"
  ARM: dts: sun6i: Add support for Sinlinx A31s SDK board

 arch/arm/boot/dts/Makefile |   1 +
 arch/arm/boot/dts/axp22x.dtsi  | 143 +
 arch/arm/boot/dts/sun6i-a31-hummingbird.dts| 119 +-
 arch/arm/boot/dts/sun6i-a31s-sina31s-core.dtsi | 140 +
 arch/arm/boot/dts/sun6i-a31s-sina31s.dts   | 167 +
 5 files changed, 513 insertions(+), 57 deletions(-)
 create mode 100644 arch/arm/boot/dts/axp22x.dtsi
 create mode 100644 arch/arm/boot/dts/sun6i-a31s-sina31s-core.dtsi
 create mode 100644 arch/arm/boot/dts/sun6i-a31s-sina31s.dts

-- 
2.5.3

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[linux-sunxi] [PATCH v2 3/5] ARM: dts: sun6i: hummingbird: Use axp22x.dtsi for AXP221 regulators

[Chen-Yu Tsai]

Now that we have axp22x.dtsi describing common axp22x hardware, use
it and reference the nodes instead of declaring the whole tree.

Also drop the "always-on" from the vdd-gpu regulator, since we don't
support the GPU anyway.

And add a regulator reference for cpu0.

Signed-off-by: Chen-Yu Tsai <w...@csie.org>
---
 arch/arm/boot/dts/sun6i-a31-hummingbird.dts | 113 ++--
 1 file changed, 56 insertions(+), 57 deletions(-)

diff --git a/arch/arm/boot/dts/sun6i-a31-hummingbird.dts 
b/arch/arm/boot/dts/sun6i-a31-hummingbird.dts
index e25d4924dbe7..a9b87ae89855 100644
--- a/arch/arm/boot/dts/sun6i-a31-hummingbird.dts
+++ b/arch/arm/boot/dts/sun6i-a31-hummingbird.dts
@@ -69,6 +69,10 @@
};
 };
 
+ {
+   cpu-supply = <_dcdc3>;
+};
+
  {
status = "okay";
 };
@@ -121,7 +125,7 @@
  {
pinctrl-names = "default";
pinctrl-0 = <_pins_a>, <_cd_pin_hummingbird>;
-   vmmc-supply = <_3v0>;
+   vmmc-supply = <_dcdc1>;
bus-width = <4>;
cd-gpios = < 0 8 GPIO_ACTIVE_HIGH>; /* PA8 */
cd-inverted;
@@ -136,7 +140,7 @@
  {
pinctrl-names = "default";
pinctrl-0 = <_pins_a>, <_reset_pin_hummingbird>;
-   vmmc-supply = <_wifi>;
+   vmmc-supply = <_aldo1>;
mmc-pwrseq = <_pwrseq>;
bus-width = <4>;
non-removable;
@@ -173,68 +177,63 @@
  {
status = "okay";
 
-   axp221: pmic@68 {
+   axp22x: pmic@68 {
compatible = "x-powers,axp221";
reg = <0x68>;
interrupt-parent = <_intc>;
interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
-   interrupt-controller;
-   #interrupt-cells = <1>;
-
-   regulators {
-   x-powers,dcdc-freq = <3000>;
-
-   vcc_3v0: dcdc1 {
-   regulator-always-on;
-   regulator-min-microvolt = <300>;
-   regulator-max-microvolt = <300>;
-   regulator-name = "vcc-3v0";
-   };
-
-   vdd_gpu: dcdc2 {
-   regulator-always-on;
-   regulator-min-microvolt = <70>;
-   regulator-max-microvolt = <132>;
-   regulator-name = "vdd-gpu";
-   };
-
-   vdd_cpu: dcdc3 {
-   regulator-always-on;
-   regulator-min-microvolt = <70>;
-   regulator-max-microvolt = <132>;
-   regulator-name = "vdd-cpu";
-   };
-
-   vdd_sys_dll: dcdc4 {
-   regulator-always-on;
-   regulator-min-microvolt = <110>;
-   regulator-max-microvolt = <110>;
-   regulator-name = "vdd-sys-dll";
-   };
-
-   vcc_dram: dcdc5 {
-   regulator-always-on;
-   regulator-min-microvolt = <150>;
-   regulator-max-microvolt = <150>;
-   regulator-name = "vcc-dram";
-   };
-
-   vcc_wifi: aldo1 {
-   regulator-min-microvolt = <330>;
-   regulator-max-microvolt = <330>;
-   regulator-name = "vcc_wifi";
-   };
-
-   avcc: aldo3 {
-   regulator-always-on;
-   regulator-min-microvolt = <300>;
-   regulator-max-microvolt = <300>;
-   regulator-name = "avcc";
-   };
-   };
};
 };
 
+#include "axp22x.dtsi"
+
+_aldo1 {
+   regulator-min-microvolt = <330>;
+   regulator-max-microvolt = <330>;
+   regulator-name = "vcc-wifi";
+};
+
+_aldo3 {
+   regulator-always-on;
+   regulator-min-microvolt = <270>;
+   regulator-max-microvolt = <330>;
+   regulator-name = "avcc";
+};
+
+_dcdc1 {
+   regulator-always-on;
+   regulator-min-microvolt = <300>;
+   regulator-max-microvolt = <300>;
+   regulator-name = "vcc-3v0";
+};
+
+_dcdc2 {
+   regulator-min-microvolt = <70>;
+   regu

[linux-sunxi] Re: [PATCH v3 5/5] ARM: sun5i: Add C.H.I.P DTS

[Chen-Yu Tsai]

On Mon, Oct 12, 2015 at 1:20 AM, Maxime Ripard
<maxime.rip...@free-electrons.com> wrote:
> On Fri, Oct 09, 2015 at 11:22:23PM +0800, Chen-Yu Tsai wrote:
>> On Fri, Oct 9, 2015 at 4:42 PM, Maxime Ripard
>> <maxime.rip...@free-electrons.com> wrote:
>> > The C.H.I.P. is a small SBC with an Allwinner R8, 8GB of NAND, 512MB of
>> > RAM, USB host and OTG, a wifi / bluetooth combo chip, an audio/video jack
>> > and two connectors to plug additional boards on top of it.
>> >
>> > Signed-off-by: Maxime Ripard <maxime.rip...@free-electrons.com>
>> > Reviewed-by: Hans de Goede <hdego...@redhat.com>
>> > ---
>> >  arch/arm/boot/dts/Makefile  |   3 +-
>> >  arch/arm/boot/dts/sun5i-r8-chip.dts | 213 
>> > 
>> >  2 files changed, 215 insertions(+), 1 deletion(-)
>> >  create mode 100644 arch/arm/boot/dts/sun5i-r8-chip.dts
>> >
>> > diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
>> > index 342ab3116feb..bf165ed4e7fa 100644
>> > --- a/arch/arm/boot/dts/Makefile
>> > +++ b/arch/arm/boot/dts/Makefile
>> > @@ -600,7 +600,8 @@ dtb-$(CONFIG_MACH_SUN5I) += \
>> > sun5i-a13-olinuxino.dtb \
>> > sun5i-a13-olinuxino-micro.dtb \
>> > sun5i-a13-q8-tablet.dtb \
>> > -   sun5i-a13-utoo-p66.dtb
>> > +   sun5i-a13-utoo-p66.dtb \
>> > +   sun5i-r8-chip.dtb
>> >  dtb-$(CONFIG_MACH_SUN6I) += \
>> > sun6i-a31-app4-evb1.dtb \
>> > sun6i-a31-colombus.dtb \
>> > diff --git a/arch/arm/boot/dts/sun5i-r8-chip.dts 
>> > b/arch/arm/boot/dts/sun5i-r8-chip.dts
>> > new file mode 100644
>> > index ..0d450a828372
>> > --- /dev/null
>> > +++ b/arch/arm/boot/dts/sun5i-r8-chip.dts
>>
>> snip
>>
>> > +_dcdc2 {
>> > +   regulator-min-microvolt = <100>;
>> > +   regulator-max-microvolt = <140>;
>> > +   regulator-name = "cpuvdd";
>>
>> Other boards seem to follow the power pin names on the SoC and call
>> this "vdd-cpu".
>>
>> > +   regulator-always-on;
>> > +};
>> > +
>> > +_dcdc3 {
>> > +   regulator-min-microvolt = <100>;
>> > +   regulator-max-microvolt = <130>;
>> > +   regulator-name = "corevdd";
>>
>> And this was named "vdd-int" or "vdd-int-dll" (for SoCs with separate
>> VDD_DLL pins).
>>
>> > +   regulator-always-on;
>> > +};
>> > +
>> > +_ldo1 {
>> > +   regulator-name = "rtcvdd";
>>
>> And this one was "vdd-rtc".
>>
>> I know you followed the names set in the design doc. Just wondering if there
>> should be some convention on these.
>
> I think if we have a document that clearly reference them with some
> other name, we should just stick with the name used there, especially
> if it's only cosmetic, which is the case here.

That's a good rule to follow. :)

>> > +};
>> > +
>> > +_ldo2 {
>> > +   regulator-min-microvolt = <270>;
>> > +   regulator-max-microvolt = <330>;
>> > +   regulator-name = "avcc";
>> > +   regulator-always-on;
>> > +};
>> > +
>> > +_ldo5 {
>> > +   regulator-min-microvolt = <180>;
>> > +   regulator-max-microvolt = <180>;
>> > +   regulator-name = "vcc-1v8";
>> > +};
>> > +
>> > +_usb0_vbus {
>> > +   pinctrl-0 = <_vbus_pin>;
>> > +   vin-supply = <_vcc5v0>;
>> > +   gpio = < 1 10 GPIO_ACTIVE_HIGH>; /* PB10 */
>>
>>   status = "okay"; ?
>
> Ah, yes, indeed.
>
>> The rest looks good.
>
> Is that an Ack from you if I add the status ?

Yes. Thanks!

ChenYu

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[linux-sunxi] Re: [PATCH v2 1/5] ARM: dts: sun6i: hummingbird: Fix VDD-CPU and VDD-GPU regulator names

[Chen-Yu Tsai]

On Mon, Oct 12, 2015 at 4:31 PM, Maxime Ripard
<maxime.rip...@free-electrons.com> wrote:
> Hi,
>
> On Sat, Oct 10, 2015 at 10:48:56PM +0800, Chen-Yu Tsai wrote:
>> The VDD-CPU and VDD-GPU regulators were incorrectly swapped.
>>
>> Fixes: bab03561224ba ("ARM: dts: sun6i: hummingbird: Add AXP221 regulator
>>    nodes")
>>
>> Signed-off-by: Chen-Yu Tsai <w...@csie.org>
>> ---
>>  arch/arm/boot/dts/sun6i-a31-hummingbird.dts | 8 
>>  1 file changed, 4 insertions(+), 4 deletions(-)
>>
>> diff --git a/arch/arm/boot/dts/sun6i-a31-hummingbird.dts 
>> b/arch/arm/boot/dts/sun6i-a31-hummingbird.dts
>> index f9d9fc07bc63..e25d4924dbe7 100644
>> --- a/arch/arm/boot/dts/sun6i-a31-hummingbird.dts
>> +++ b/arch/arm/boot/dts/sun6i-a31-hummingbird.dts
>> @@ -191,18 +191,18 @@
>>   regulator-name = "vcc-3v0";
>>   };
>>
>> - vdd_cpu: dcdc2 {
>> + vdd_gpu: dcdc2 {
>>   regulator-always-on;
>>   regulator-min-microvolt = <70>;
>>   regulator-max-microvolt = <132>;
>> - regulator-name = "vdd-cpu";
>> + regulator-name = "vdd-gpu";
>>   };
>
> Do we need to leave the GPU regulator on ?

No. But that is addressed in patch 3, which converts to using axp22x.dtsi.

I wanted to keep this fix as simple as possible.

ChenYu

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[linux-sunxi] Re: [PATCH v2 5/5] ARM: dts: sun6i: Add support for Sinlinx A31s SDK board

[Chen-Yu Tsai]

On Mon, Oct 12, 2015 at 5:30 PM, Maxime Ripard
<maxime.rip...@free-electrons.com> wrote:
> Hi,
>
> On Sat, Oct 10, 2015 at 10:49:00PM +0800, Chen-Yu Tsai wrote:
>> + {
>> + /* Available on camera header */
>> + pinctrl-names = "default";
>> + pinctrl-0 = <_pins_a>;
>> + status = "okay";
>> +};
>> +
>> + {
>> + /* Available on LCD header */
>> + pinctrl-names = "default";
>> + pinctrl-0 = <_pins_a>;
>> + status = "okay";
>> +};
>
> Are those two actually used anywhere on the board itself, or just
> exposed on the pin headers?

They are exposed as grouped headers. 1 header has all the camera
related stuff, like the CSI pins, and various voltage sources
from the PMIC. The other has the LCD pins, resistive touchpanel,
I2C for capacitive touchpanel, and of course voltage sources.

The LCD header is an FPC connector, while the camera header is
the common (common for sunxi devboards) 2.0mm pins. I'm not sure
if there is some common pinout amongst vendors, but at least
Sinlinx sells their own 7" LCD display w/ CTP, VGA converter,
and camera modules. I have both the LCD and VGA converter.

Note that these I2C pins have valid external pull-ups. I doubt
they can be easily re-purposed.

Regards
ChenYu

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Re: [linux-sunxi] [PATCH] ARM: dts: sun7i: Correct USB regulators on pcDuino v3 Nano

[Chen-Yu Tsai]

Hi,

On Sat, Oct 10, 2015 at 9:47 AM, Adam Sampson  wrote:
> The LinkSprite pcDuino v3 Nano's two USB host ports are powered by a
> single RT9701GB regulator, which has its enable input tied to the A20's
> PD2 pin, pulled up to 3v3 via a 10k resistor.
>
> However, the script.bin that shipped with the device listed PH11 and PH3
> as Vbus control pins for the two USB ports. Neither of these are
> actually connected to anything.
>
> Siarhei Siamashka spotted this problem while reviewing the other
> LinkSprite boards. This patch fixes it by only defining a single
> regulator, controlled by PD2. Testing shows that the USB ports are now
> (correctly) only powered up once the USB PHY driver is loaded.
>
> Signed-off-by: Adam Sampson 

Since Siarhei spotted the issue, maybe add a Reported-by tag where credit
is due?

> ---
>  arch/arm/boot/dts/sun7i-a20-pcduino3-nano.dts | 13 ++---
>  1 file changed, 6 insertions(+), 7 deletions(-)
>
> diff --git a/arch/arm/boot/dts/sun7i-a20-pcduino3-nano.dts 
> b/arch/arm/boot/dts/sun7i-a20-pcduino3-nano.dts
> index 5361fce..f75e3bd 100644
> --- a/arch/arm/boot/dts/sun7i-a20-pcduino3-nano.dts
> +++ b/arch/arm/boot/dts/sun7i-a20-pcduino3-nano.dts
> @@ -158,7 +158,7 @@
> };
>
> usb1_vbus_pin_pcduino3_nano: usb1_vbus_pin@0 {
> -   allwinner,pins = "PH11";
> +   allwinner,pins = "PD2";
> allwinner,function = "gpio_out";
> allwinner,drive = ;
> allwinner,pull = ;
> @@ -166,18 +166,17 @@
>  };
>
>  _ahci_5v {
> +   pinctrl-names = "default";

This is already in sunxi-common-regulators.dtsi.
No need to add it again.

> pinctrl-0 = <_pwr_pin_pcduino3_nano>;
> gpio = < 7 2 GPIO_ACTIVE_HIGH>; /* PH2 */
> status = "okay";
>  };
>
> +/* A single regulator (U24) powers both USB host ports. */
>  _usb1_vbus {
> +   pinctrl-names = "default";

And this.

The rest looks good.

Thanks!
ChenYu

> pinctrl-0 = <_vbus_pin_pcduino3_nano>;
> -   gpio = < 7 11 GPIO_ACTIVE_HIGH>; /* PH11 */
> -   status = "okay";
> -};
> -
> -_usb2_vbus {
> +   gpio = < 3 2 GPIO_ACTIVE_HIGH>; /* PD2 */
> status = "okay";
>  };
>
> @@ -189,6 +188,6 @@
>
>   {
> usb1_vbus-supply = <_usb1_vbus>;
> -   usb2_vbus-supply = <_usb2_vbus>;
> +   usb2_vbus-supply = <_usb1_vbus>;
> status = "okay";
>  };
> --
> 2.1.4
>
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[linux-sunxi] Re: [PATCH v3 3/5] ARM: sun5i: dt: Move uart3 pinctrl node to common DTSI

[Chen-Yu Tsai]

On Fri, Oct 9, 2015 at 4:42 PM, Maxime Ripard
<maxime.rip...@free-electrons.com> wrote:
> The uart3 pins are shared between the A10s and A13, move the pinctrl node
> to the common DTSI to avoid duplication.
>
> Signed-off-by: Maxime Ripard <maxime.rip...@free-electrons.com>
> Reviewed-by: Hans de Goede <hdego...@redhat.com>

Reviewed-by: Chen-Yu Tsai <w...@csie.org>

Thanks

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[linux-sunxi] Re: [PATCH v3 1/5] ARM: sunxi: Add R8 support

[Chen-Yu Tsai]

On Fri, Oct 9, 2015 at 4:42 PM, Maxime Ripard
<maxime.rip...@free-electrons.com> wrote:
> The R8 is a new Allwinner SoC based on the A13. While both are very
> similar, there's still a few differences. Introduce a new compatible to
> deal with them.
>
> In order to have a consistent naming, instead of mentionning the allwinner
   ^   ^
nit:   mentioning  Allwinner

Fix when you apply?

> A series as the machine name, switch to sun4i/sun5i like what is done for
> the other families.
>
> Signed-off-by: Maxime Ripard <maxime.rip...@free-electrons.com>
> Reviewed-by: Hans de Goede <hdego...@redhat.com>
> Acked-by: Stephen Boyd <sb...@codeaurora.org>

Reviewed-by: Chen-Yu Tsai <w...@csie.org>

Thanks

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[linux-sunxi] Re: [PATCH v3 4/5] ARM: sun5i: dt: Add UART3 CTS and RTS pins

[Chen-Yu Tsai]

On Fri, Oct 9, 2015 at 4:42 PM, Maxime Ripard
<maxime.rip...@free-electrons.com> wrote:
> Add a separate pinctrl node for the UART3 CTS and RTS pins shared between
> the A10s and A13.
>
> Signed-off-by: Maxime Ripard <maxime.rip...@free-electrons.com>
> Reviewed-by: Hans de Goede <hdego...@redhat.com>

Reviewed-by: Chen-Yu Tsai <w...@csie.org>

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[linux-sunxi] Re: [PATCH v3 5/5] ARM: sun5i: Add C.H.I.P DTS

[Chen-Yu Tsai]

On Fri, Oct 9, 2015 at 4:42 PM, Maxime Ripard
 wrote:
> The C.H.I.P. is a small SBC with an Allwinner R8, 8GB of NAND, 512MB of
> RAM, USB host and OTG, a wifi / bluetooth combo chip, an audio/video jack
> and two connectors to plug additional boards on top of it.
>
> Signed-off-by: Maxime Ripard 
> Reviewed-by: Hans de Goede 
> ---
>  arch/arm/boot/dts/Makefile  |   3 +-
>  arch/arm/boot/dts/sun5i-r8-chip.dts | 213 
> 
>  2 files changed, 215 insertions(+), 1 deletion(-)
>  create mode 100644 arch/arm/boot/dts/sun5i-r8-chip.dts
>
> diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
> index 342ab3116feb..bf165ed4e7fa 100644
> --- a/arch/arm/boot/dts/Makefile
> +++ b/arch/arm/boot/dts/Makefile
> @@ -600,7 +600,8 @@ dtb-$(CONFIG_MACH_SUN5I) += \
> sun5i-a13-olinuxino.dtb \
> sun5i-a13-olinuxino-micro.dtb \
> sun5i-a13-q8-tablet.dtb \
> -   sun5i-a13-utoo-p66.dtb
> +   sun5i-a13-utoo-p66.dtb \
> +   sun5i-r8-chip.dtb
>  dtb-$(CONFIG_MACH_SUN6I) += \
> sun6i-a31-app4-evb1.dtb \
> sun6i-a31-colombus.dtb \
> diff --git a/arch/arm/boot/dts/sun5i-r8-chip.dts 
> b/arch/arm/boot/dts/sun5i-r8-chip.dts
> new file mode 100644
> index ..0d450a828372
> --- /dev/null
> +++ b/arch/arm/boot/dts/sun5i-r8-chip.dts

snip

> +_dcdc2 {
> +   regulator-min-microvolt = <100>;
> +   regulator-max-microvolt = <140>;
> +   regulator-name = "cpuvdd";

Other boards seem to follow the power pin names on the SoC and call
this "vdd-cpu".

> +   regulator-always-on;
> +};
> +
> +_dcdc3 {
> +   regulator-min-microvolt = <100>;
> +   regulator-max-microvolt = <130>;
> +   regulator-name = "corevdd";

And this was named "vdd-int" or "vdd-int-dll" (for SoCs with separate
VDD_DLL pins).

> +   regulator-always-on;
> +};
> +
> +_ldo1 {
> +   regulator-name = "rtcvdd";

And this one was "vdd-rtc".

I know you followed the names set in the design doc. Just wondering if there
should be some convention on these.

> +};
> +
> +_ldo2 {
> +   regulator-min-microvolt = <270>;
> +   regulator-max-microvolt = <330>;
> +   regulator-name = "avcc";
> +   regulator-always-on;
> +};
> +
> +_ldo5 {
> +   regulator-min-microvolt = <180>;
> +   regulator-max-microvolt = <180>;
> +   regulator-name = "vcc-1v8";
> +};
> +
> +_usb0_vbus {
> +   pinctrl-0 = <_vbus_pin>;
> +   vin-supply = <_vcc5v0>;
> +   gpio = < 1 10 GPIO_ACTIVE_HIGH>; /* PB10 */

  status = "okay"; ?

The rest looks good.

Regards
ChenYu

> +};
> +
> + {
> +   pinctrl-names = "default";
> +   pinctrl-0 = <_pins_b>;
> +   status = "okay";
> +};
> +
> + {
> +   pinctrl-names = "default";
> +   pinctrl-0 = <_pins_a>,
> +   <_pins_cts_rts_a>;
> +   status = "okay";
> +};
> +
> +_otg {
> +   dr_mode = "otg";
> +   status = "okay";
> +};
> +
> +_power_supply {
> +   status = "okay";
> +};
> +
> + {
> +   pinctrl-names = "default";
> +   pinctrl-0 = <_id_det_pin>;
> +   status = "okay";
> +
> +   usb0_id_det-gpio = < 6 2 GPIO_ACTIVE_HIGH>; /* PG2 */
> +   usb0_vbus_power-supply = <_power_supply>;
> +   usb0_vbus-supply = <_usb0_vbus>;
> +   usb1_vbus-supply = <_vcc5v0>;
> +};
> --
> 2.5.3
>

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[linux-sunxi] [PATCH] ARM: dts: sun8i: Add Orange Pi PC support

[Chen-Yu Tsai]

The Orange Pi PC is an SBC based on the Allwinner H3 SoC with a uSD slot,
3 USB ports directly from the SoC, a 10/100M ethernet port using the
SoC's integrated PHY, USB OTG, HDMI, a TRRS headphone jack for stereo out
and composite out, a microphone, an IR receiver, a CSI connector, 2 LEDs,
a 3 pin UART header, and a 40-pin GPIO header.

Signed-off-by: Chen-Yu Tsai <w...@csie.org>
---

This is based on Jens' H3 patches and Hans' H3 USB patches.
USB works nicely on this board.

---
 arch/arm/boot/dts/Makefile |   1 +
 arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts | 106 +
 2 files changed, 107 insertions(+)
 create mode 100644 arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts

diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 4e8026e85b79..0ef528a7d845 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -661,6 +661,7 @@ dtb-$(CONFIG_MACH_SUN8I) += \
sun8i-a33-ippo-q8h-v1.2.dtb \
sun8i-a33-q8-tablet.dtb \
sun8i-a33-sinlinx-sina33.dtb \
+   sun8i-h3-orangepi-pc.dtb \
sun8i-h3-orangepi-plus.dtb
 dtb-$(CONFIG_MACH_SUN9I) += \
sun9i-a80-optimus.dtb \
diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts 
b/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts
new file mode 100644
index ..4b25dcc3fdd2
--- /dev/null
+++ b/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts
@@ -0,0 +1,106 @@
+/*
+ * Copyright (C) 2015 Chen-Yu Tsai <w...@csie.org>
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ *  a) This file is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This file is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ *  b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/dts-v1/;
+#include "sun8i-h3.dtsi"
+#include "sunxi-common-regulators.dtsi"
+
+#include 
+#include 
+
+/ {
+   model = "Xunlong Orange Pi PC";
+   compatible = "xunlong,orangepi-pc", "allwinner,sun8i-h3";
+
+   aliases {
+   serial0 = 
+   };
+
+   chosen {
+   stdout-path = "serial0:115200n8";
+   };
+};
+
+ {
+   status = "okay";
+};
+
+ {
+   status = "okay";
+};
+
+ {
+   status = "okay";
+};
+
+ {
+   pinctrl-names = "default";
+   pinctrl-0 = <_pins_a>, <_cd_pin>;
+   vmmc-supply = <_vcc3v3>;
+   bus-width = <4>;
+   cd-gpios = < 5 6 GPIO_ACTIVE_HIGH>; /* PF6 */
+   cd-inverted;
+   status = "okay";
+};
+
+ {
+   status = "okay";
+};
+
+ {
+   status = "okay";
+};
+
+ {
+   status = "okay";
+};
+
+ {
+   pinctrl-names = "default";
+   pinctrl-0 = <_pins_a>;
+   status = "okay";
+};
+
+ {
+   /* USB VBUS is always on */
+   status = "okay";
+};
-- 
2.6.2

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[linux-sunxi] [PATCH 0/6] ARM: sunxi: Support MSI Primo81 tablet and Sinlinx SinA31s

[Chen-Yu Tsai]

Hi Maxime,

This series adds support for MSI's Primo81 tablet, and Sinlinx's SinA31s
development kit. This also adds a common axp221.dtsi, like we have for
axp209 and axp152. The Hummingbird A31 dts is also migrated to this.

The Primo81 patch is actually a v5. Changes since the last version can
be found in that patch.

Patch 1 adds an lradc node to sun6i-a31.dtsi. This is the same lradc
for tablet buttons found on the other sunxi SoCs.

Patch 2 adds a common dtsi for the AXP221 PMIC. This includes listing
all the regulators, and the basic common properties, like
interrupt-controller.

Patch 3 migrates the Hummingbird A31 dts to use the new axp221.dtsi

Patch 4 adds the pinmux settings for A31/A31s mmc2 with 8-bit bus for
emmc.

Patch 5 adds dtsi/dts files for the Sinlinx SinA31s development kit.

Patch 6 adds a dts file for the A31s based MSI Primo81 tablet.


Regards
ChenYu

Chen-Yu Tsai (5):
  ARM: dts: sun6i: Add lradc node
  ARM: dts: sunxi: Add dtsi for AXP221 PMIC
  ARM: dts: sun6i: hummingbird: Use axp221.dtsi for axp221 regulators
  ARM: dts: sun6i: Add mmc2 pins for 8 bit emmc
  ARM: dts: sun6i: Add support for Sinlinx A31s SDK board

Karsten Merker (1):
  ARM: dts: sun6i: Add dts file for MSI Primo81 tablet

 arch/arm/boot/dts/Makefile |   4 +-
 arch/arm/boot/dts/axp221.dtsi  | 148 ++
 arch/arm/boot/dts/sun6i-a31-hummingbird.dts| 114 ++-
 arch/arm/boot/dts/sun6i-a31.dtsi   |  17 ++
 arch/arm/boot/dts/sun6i-a31s-primo81.dts   | 255 +
 arch/arm/boot/dts/sun6i-a31s-sina31s-core.dtsi | 131 +
 arch/arm/boot/dts/sun6i-a31s-sina31s.dts   | 149 +++
 7 files changed, 759 insertions(+), 59 deletions(-)
 create mode 100644 arch/arm/boot/dts/axp221.dtsi
 create mode 100644 arch/arm/boot/dts/sun6i-a31s-primo81.dts
 create mode 100644 arch/arm/boot/dts/sun6i-a31s-sina31s-core.dtsi
 create mode 100644 arch/arm/boot/dts/sun6i-a31s-sina31s.dts

-- 
2.5.0

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[linux-sunxi] [PATCH 6/6] ARM: dts: sun6i: Add dts file for MSI Primo81 tablet

[Chen-Yu Tsai]

From: Karsten Merker mer...@debian.org

The MSI Primo81 is an A31s based tablet, with 1G RAM, 16G NAND,
768x1024 IPS LCD display, mono speaker, 0.3 MP front camera, 2.0 MP
rear camera, 3500 mAh battery, gt911 touchscreen, mma8452 accelerometer
and rtl8188etv usb wifi. Has power, volume+ and volume- buttons
(both volume buttons are also connected to the UBOOT_SEL pin). The
external connectors are represented by MicroSD slot, MiniHDMI, MicroUSB
OTG and 3.5mm headphone jack. More details are available at

http://linux-sunxi.org/MSI_Primo81

USB OTG is enabled in host only mode. AXP221 USB power supply and
GPIO support are required for full USB OTG support.

Signed-off-by: Siarhei Siamashka siarhei.siamas...@gmail.com
Signed-off-by: Karsten Merker mer...@debian.org
Signed-off-by: Chen-Yu Tsai w...@csie.org
---

Changes since v4:

  - Use axp221.dtsi and add all active regulators.
  - Enable i2c controllers for capacitive touch panel and accelerometer.
  - Mark i2c controller for camera sensors as failed for now.
  - Enable USB OTG in host only mode.
  - Drop uart0 as this is not tested.
  - s/library/file/ in GPL header.

---
 arch/arm/boot/dts/Makefile   |   1 +
 arch/arm/boot/dts/sun6i-a31s-primo81.dts | 255 +++
 2 files changed, 256 insertions(+)
 create mode 100644 arch/arm/boot/dts/sun6i-a31s-primo81.dts

diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index ada5156fdd49..c87513ed4eb4 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -579,6 +579,7 @@ dtb-$(CONFIG_MACH_SUN6I) += \
sun6i-a31-m9.dtb \
sun6i-a31-mele-a1000g-quad.dtb \
sun6i-a31s-cs908.dtb \
+   sun6i-a31s-primo81.dtb \
sun6i-a31s-sina31s.dtb
 dtb-$(CONFIG_MACH_SUN7I) += \
sun7i-a20-bananapi.dtb \
diff --git a/arch/arm/boot/dts/sun6i-a31s-primo81.dts 
b/arch/arm/boot/dts/sun6i-a31s-primo81.dts
new file mode 100644
index ..d22befaf363b
--- /dev/null
+++ b/arch/arm/boot/dts/sun6i-a31s-primo81.dts
@@ -0,0 +1,255 @@
+/*
+ * Copyright 2014 Siarhei Siamashka siarhei.siamas...@gmail.com
+ * Copyright 2015 Karsten Merker mer...@debian.org
+ * Copyright 2015 Chen-Yu Tsai w...@csie.org
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ *  a) This file is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This file is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ *  b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the Software), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED AS IS, WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/dts-v1/;
+#include sun6i-a31s.dtsi
+#include sunxi-common-regulators.dtsi
+
+#include dt-bindings/gpio/gpio.h
+#include dt-bindings/input/input.h
+#include dt-bindings/pinctrl/sun4i-a10.h
+
+/ {
+   model = MSI Primo81 tablet;
+   compatible = msi,primo81, allwinner,sun6i-a31s;
+};
+
+cpu0 {
+   cpu-supply = reg_dcdc2;
+};
+
+ehci0 {
+   /* rtl8188etv wifi is connected here */
+   status = okay;
+};
+
+i2c0 {
+   pinctrl-names = default;
+   pinctrl-0 = i2c0_pins_a;
+   /* pull-ups and device VDDIO require AXP221 DLDO3 */
+   status = failed;
+};
+
+i2c1 {
+   pinctrl-names = default;
+   pinctrl-0 = i2c1_pins_a;
+   status = okay;
+
+   ctp@5d {
+   pinctrl-names = default;
+   pinctrl-0 = gt911_int_primo81

[linux-sunxi] [PATCH 3/6] ARM: dts: sun6i: hummingbird: Use axp221.dtsi for axp221 regulators

[Chen-Yu Tsai]

Now that we have axp221.dtsi describing common axp22x hardware, use
it and reference the nodes instead of declaring the whole tree.

Also add regulator reference for cpu0 supply.

Signed-off-by: Chen-Yu Tsai w...@csie.org
---
 arch/arm/boot/dts/sun6i-a31-hummingbird.dts | 114 ++--
 1 file changed, 56 insertions(+), 58 deletions(-)

diff --git a/arch/arm/boot/dts/sun6i-a31-hummingbird.dts 
b/arch/arm/boot/dts/sun6i-a31-hummingbird.dts
index d0cfadac0691..d019cb70acec 100644
--- a/arch/arm/boot/dts/sun6i-a31-hummingbird.dts
+++ b/arch/arm/boot/dts/sun6i-a31-hummingbird.dts
@@ -67,6 +67,10 @@
};
 };
 
+cpu0 {
+   cpu-supply = reg_dcdc2;
+};
+
 ehci0 {
status = okay;
 };
@@ -119,7 +123,7 @@
 mmc0 {
pinctrl-names = default;
pinctrl-0 = mmc0_pins_a, mmc0_cd_pin_hummingbird;
-   vmmc-supply = vcc_3v0;
+   vmmc-supply = reg_dcdc1;
bus-width = 4;
cd-gpios = pio 0 8 GPIO_ACTIVE_HIGH; /* PA8 */
cd-inverted;
@@ -134,7 +138,7 @@
 mmc1 {
pinctrl-names = default;
pinctrl-0 = mmc1_pins_a, wifi_reset_pin_hummingbird;
-   vmmc-supply = vcc_wifi;
+   vmmc-supply = reg_aldo1;
mmc-pwrseq = wifi_pwrseq;
bus-width = 4;
non-removable;
@@ -169,65 +173,59 @@
reg = 0x68;
interrupt-parent = nmi_intc;
interrupts = 0 IRQ_TYPE_LEVEL_LOW;
-   interrupt-controller;
-   #interrupt-cells = 1;
-   dcdc1-supply = vcc_3v0;
-   dcdc5-supply = vcc_dram;
-
-   regulators {
-   x-powers,dcdc-freq = 3000;
-
-   vcc_3v0: dcdc1 {
-   regulator-always-on;
-   regulator-min-microvolt = 300;
-   regulator-max-microvolt = 300;
-   regulator-name = vcc-3v0;
-   };
-
-   vdd_cpu: dcdc2 {
-   regulator-always-on;
-   regulator-min-microvolt = 70;
-   regulator-max-microvolt = 132;
-   regulator-name = vdd-cpu;
-   };
-
-   vdd_gpu: dcdc3 {
-   regulator-always-on;
-   regulator-min-microvolt = 70;
-   regulator-max-microvolt = 132;
-   regulator-name = vdd-gpu;
-   };
-
-   vdd_sys_dll: dcdc4 {
-   regulator-always-on;
-   regulator-min-microvolt = 110;
-   regulator-max-microvolt = 110;
-   regulator-name = vdd-sys-dll;
-   };
-
-   vcc_dram: dcdc5 {
-   regulator-always-on;
-   regulator-min-microvolt = 150;
-   regulator-max-microvolt = 150;
-   regulator-name = vcc-dram;
-   };
-
-   vcc_wifi: aldo1 {
-   regulator-min-microvolt = 330;
-   regulator-max-microvolt = 330;
-   regulator-name = vcc_wifi;
-   };
-
-   avcc: aldo3 {
-   regulator-always-on;
-   regulator-min-microvolt = 300;
-   regulator-max-microvolt = 300;
-   regulator-name = avcc;
-   };
-   };
};
 };
 
+#include axp221.dtsi
+
+reg_aldo1 {
+   regulator-min-microvolt = 330;
+   regulator-max-microvolt = 330;
+   regulator-name = vcc-wifi;
+};
+
+reg_aldo3 {
+   regulator-always-on;
+   regulator-min-microvolt = 300;
+   regulator-max-microvolt = 300;
+   regulator-name = avcc;
+};
+
+reg_dcdc1 {
+   regulator-always-on;
+   regulator-min-microvolt = 300;
+   regulator-max-microvolt = 300;
+   regulator-name = vcc-3v0;
+};
+
+reg_dcdc2 {
+   regulator-always-on;
+   regulator-min-microvolt = 70;
+   regulator-max-microvolt = 132;
+   regulator-name = vdd-cpu;
+};
+
+reg_dcdc3 {
+   regulator-always-on;
+   regulator-min-microvolt = 70;
+   regulator-max-microvolt = 132;
+   regulator-name = vdd-gpu;
+};
+
+reg_dcdc4 {
+   regulator-always-on;
+   regulator-min-microvolt = 110;
+   regulator-max-microvolt = 110;
+   regulator-name = vdd-sys-dll;
+};
+
+reg_dcdc5 {
+   regulator-always-on;
+   regulator-min-microvolt = 150;
+   regulator-max-microvolt = 150;
+   regulator

[linux-sunxi] [PATCH 1/6] ARM: dts: sun6i: Add lradc node

[Chen-Yu Tsai]

sun6i also has the LRADC for tablet buttons.

Signed-off-by: Chen-Yu Tsai w...@csie.org
---
 arch/arm/boot/dts/sun6i-a31.dtsi | 7 +++
 1 file changed, 7 insertions(+)

diff --git a/arch/arm/boot/dts/sun6i-a31.dtsi b/arch/arm/boot/dts/sun6i-a31.dtsi
index 54bb83b58f42..431c7c884e1c 100644
--- a/arch/arm/boot/dts/sun6i-a31.dtsi
+++ b/arch/arm/boot/dts/sun6i-a31.dtsi
@@ -768,6 +768,13 @@
reg = 0x01c20ca0 0x20;
};
 
+   lradc: lradc@01c22800 {
+   compatible = allwinner,sun4i-a10-lradc-keys;
+   reg = 0x01c22800 0x100;
+   interrupts = GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH;
+   status = disabled;
+   };
+
rtp: rtp@01c25000 {
compatible = allwinner,sun6i-a31-ts;
reg = 0x01c25000 0x100;
-- 
2.5.0

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[linux-sunxi] [PATCH 5/6] ARM: dts: sun6i: Add support for Sinlinx A31s SDK board

[Chen-Yu Tsai]

The Sinlinx A31s SDK is a A31s based module/baseboard development kit.

The core module has the SoC, PMIC, DRAM, eMMC and supporting components.
There are also pads for UART0, JTAG and I2S.

The baseboard has 100 Mbps Ethernet, 5x USB 2.0 host ports via a USB 2.0
hub chip, MMC, HDMI, SPDIF, CIR, audio jacks, 2 tablet-like volume
buttons, RS232 style UART and USB OTG (though VBUS is not connected).
Various headers are available for other addon modules, such as SDIO
WiFi, LCD display, camera sensor, UARTs, I2C, SPI and GPIOs.

Signed-off-by: Chen-Yu Tsai w...@csie.org
---
 arch/arm/boot/dts/Makefile |   3 +-
 arch/arm/boot/dts/sun6i-a31s-sina31s-core.dtsi | 131 ++
 arch/arm/boot/dts/sun6i-a31s-sina31s.dts   | 149 +
 3 files changed, 282 insertions(+), 1 deletion(-)
 create mode 100644 arch/arm/boot/dts/sun6i-a31s-sina31s-core.dtsi
 create mode 100644 arch/arm/boot/dts/sun6i-a31s-sina31s.dts

diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index f830e1f12716..ada5156fdd49 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -578,7 +578,8 @@ dtb-$(CONFIG_MACH_SUN6I) += \
sun6i-a31-i7.dtb \
sun6i-a31-m9.dtb \
sun6i-a31-mele-a1000g-quad.dtb \
-   sun6i-a31s-cs908.dtb
+   sun6i-a31s-cs908.dtb \
+   sun6i-a31s-sina31s.dtb
 dtb-$(CONFIG_MACH_SUN7I) += \
sun7i-a20-bananapi.dtb \
sun7i-a20-bananapro.dtb \
diff --git a/arch/arm/boot/dts/sun6i-a31s-sina31s-core.dtsi 
b/arch/arm/boot/dts/sun6i-a31s-sina31s-core.dtsi
new file mode 100644
index ..409b31ec647c
--- /dev/null
+++ b/arch/arm/boot/dts/sun6i-a31s-sina31s-core.dtsi
@@ -0,0 +1,131 @@
+/*
+ * Copyright 2015 Chen-Yu Tsai w...@csie.org
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ *  a) This file is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This file is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ *  b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the Software), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED AS IS, WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/dts-v1/;
+#include sun6i-a31s.dtsi
+#include sunxi-common-regulators.dtsi
+
+#include dt-bindings/gpio/gpio.h
+#include dt-bindings/pinctrl/sun4i-a10.h
+
+/ {
+   model = Sinlinx SinA31s Core Board;
+   compatible = sinlinx,sina31s, allwinner,sun6i-a31s;
+
+   aliases {
+   serial0 = uart0;
+   };
+};
+
+/* eMMC on core board */
+mmc2 {
+   pinctrl-names = default;
+   pinctrl-0 = mmc2_8bit_emmc_pins;
+   vmmc-supply = reg_vcc3v0;
+   bus-width = 8;
+   non-removable;
+   status = okay;
+};
+
+/* AXP221s PMIC on core board */
+p2wi {
+   status = okay;
+
+   axp221: pmic@68 {
+   reg = 0x68;
+   interrupt-parent = nmi_intc;
+   interrupts = 0 IRQ_TYPE_LEVEL_LOW;
+   };
+};
+
+#include axp221.dtsi
+
+reg_dcdc1 {
+   regulator-always-on;
+   regulator-min-microvolt = 300;
+   regulator-max-microvolt = 300;
+   regulator-name = vcc-3v0;
+};
+
+reg_dcdc2 {
+   regulator-always-on;
+   regulator-min-microvolt = 70;
+   regulator-max-microvolt = 132;
+   regulator-name = vdd-cpu;
+};
+
+reg_dcdc3 {
+   regulator-always-on;
+   regulator-min-microvolt = 70;
+   regulator

[linux-sunxi] [PATCH 4/6] ARM: dts: sun6i: Add mmc2 pins for 8 bit emmc

[Chen-Yu Tsai]

This also includes the reset pin for emmc.

Signed-off-by: Chen-Yu Tsai w...@csie.org
---
 arch/arm/boot/dts/sun6i-a31.dtsi | 10 ++
 1 file changed, 10 insertions(+)

diff --git a/arch/arm/boot/dts/sun6i-a31.dtsi b/arch/arm/boot/dts/sun6i-a31.dtsi
index 431c7c884e1c..98359f37bf11 100644
--- a/arch/arm/boot/dts/sun6i-a31.dtsi
+++ b/arch/arm/boot/dts/sun6i-a31.dtsi
@@ -691,6 +691,16 @@
allwinner,pull = SUN4I_PINCTRL_NO_PULL;
};
 
+   mmc2_8bit_emmc_pins: mmc2@0 {
+   allwinner,pins = PC6, PC7, PC8, PC9,
+PC10, PC11, PC12,
+PC13, PC14, PC15,
+PC24;
+   allwinner,function = mmc2;
+   allwinner,drive = SUN4I_PINCTRL_30_MA;
+   allwinner,pull = SUN4I_PINCTRL_NO_PULL;
+   };
+
gmac_pins_mii_a: gmac_mii@0 {
allwinner,pins = PA0, PA1, PA2, PA3,
PA8, PA9, PA11,
-- 
2.5.0

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[linux-sunxi] [PATCH 2/6] ARM: dts: sunxi: Add dtsi for AXP221 PMIC

[Chen-Yu Tsai]

The AXP221 PMIC is used with some Allwinner SoCs. This patch adds
a dtsi file listing all the regulator nodes. The regulators are
initialized based on their device node names.

This can later be used with the AXP223 PMIC as well, which has
the same functionality as AXP221, except for its host interface.

Signed-off-by: Chen-Yu Tsai w...@csie.org
---
 arch/arm/boot/dts/axp221.dtsi | 148 ++
 1 file changed, 148 insertions(+)
 create mode 100644 arch/arm/boot/dts/axp221.dtsi

diff --git a/arch/arm/boot/dts/axp221.dtsi b/arch/arm/boot/dts/axp221.dtsi
new file mode 100644
index ..74836f329863
--- /dev/null
+++ b/arch/arm/boot/dts/axp221.dtsi
@@ -0,0 +1,148 @@
+/*
+ * Copyright 2015 Chen-Yu Tsai
+ *
+ * Chen-Yu Tsai w...@csie.org
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ *  a) This file is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This file is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ *  b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the Software), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED AS IS, WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/*
+ * AXP221/221s/223 Integrated Power Management Chip
+ * http://www.x-powers.com/product/AXP22X.php
+ * http://dl.linux-sunxi.org/AXP/AXP221%20Datasheet%20V1.2%2020130326%20.pdf
+ */
+
+axp221 {
+   compatible = x-powers,axp221;
+   interrupt-controller;
+   #interrupt-cells = 1;
+
+   regulators {
+   /* Default work frequency for buck regulators */
+   x-powers,dcdc-freq = 3000;
+
+   /* supplies for dc1sw  dc5ldo are connected internally */
+   dcdc1-supply = reg_dcdc1;
+   dcdc5-supply = reg_dcdc5;
+
+   reg_dcdc1: dcdc1 {
+   regulator-name = dcdc1;
+   };
+
+   reg_dcdc2: dcdc2 {
+   regulator-name = dcdc2;
+   };
+
+   reg_dcdc3: dcdc3 {
+   regulator-name = dcdc3;
+   };
+
+   reg_dcdc4: dcdc4 {
+   regulator-name = dcdc4;
+   };
+
+   reg_dcdc5: dcdc5 {
+   regulator-name = dcdc5;
+   };
+
+   reg_dc1sw: dc1sw {
+   regulator-name = dc1sw;
+   };
+
+   reg_dc5ldo: dc5ldo {
+   regulator-name = dc5ldo;
+   };
+
+   reg_aldo1: aldo1 {
+   regulator-name = aldo1;
+   };
+
+   reg_aldo2: aldo2 {
+   regulator-name = aldo2;
+   };
+
+   reg_aldo3: aldo3 {
+   regulator-name = aldo3;
+   };
+
+   reg_dldo1: dldo1 {
+   regulator-name = dldo1;
+   };
+
+   reg_dldo2: dldo2 {
+   regulator-name = dldo2;
+   };
+
+   reg_dldo3: dldo3 {
+   regulator-name = dldo3;
+   };
+
+   reg_dldo4: dldo4 {
+   regulator-name = dldo4;
+   };
+
+   reg_eldo1: eldo1 {
+   regulator-name = eldo1;
+   };
+
+   reg_eldo2: eldo2 {
+   regulator-name = eldo2

[linux-sunxi] Re: [PATCH 2/6] ARM: dts: sunxi: Add dtsi for AXP221 PMIC

[Chen-Yu Tsai]

On Sat, Aug 29, 2015 at 4:43 AM, Maxime Ripard
maxime.rip...@free-electrons.com wrote:
 On Sat, Aug 29, 2015 at 12:09:55AM +0800, Chen-Yu Tsai wrote:
  +/*
  + * AXP221/221s/223 Integrated Power Management Chip
  + * http://www.x-powers.com/product/AXP22X.php
  + * 
  http://dl.linux-sunxi.org/AXP/AXP221%20Datasheet%20V1.2%2020130326%20.pdf
  + */
 
  I'm usually not really fond of URLs in the source code and/or the
  commit logs. They tend to be broken very easily.

 OK. Would you rather I put them in Documentation/arm/sunxi/README?
 It's not immediately clear that sunxi and axp* are connected though.

 It's one of the first things that pop up when googling, and it's not
 really related to sunxi, so I'd say simply leave them out.

Ok.

  +
  +axp221 {
  + compatible = x-powers,axp221;
  + interrupt-controller;
  + #interrupt-cells = 1;
  +
  + regulators {
  + /* Default work frequency for buck regulators */
  + x-powers,dcdc-freq = 3000;
  +
  + /* supplies for dc1sw  dc5ldo are connected internally */
  + dcdc1-supply = reg_dcdc1;
  + dcdc5-supply = reg_dcdc5;
 
  so the parent regulator of DCDC1 is DCDC1 ?

 These probably aren't the best names. These are the supplies for DC1SW and
 DC5LDO, respectively. They are connected internally, so there aren't named
 pins for them. The comment above explains it, though probably not clearly
 enough. Furthermore, the input pins for DCDC1/5 are VIN1/5.

 I'm not quite sure I understand. They're connected internally but they
 have pins ?

Internally, DCDC1's output feeds the input for DC1SW (which is just a switch
BTW), and DCDC5's output feeds DC5LDO (which is an LDO). Both these extra
regulators have separate controls. There are no external pins to name the
supplies after, so I just named them after which regulator supplies them.

ChenYu

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[linux-sunxi] Re: [PATCH 3/6] ARM: dts: sun6i: hummingbird: Use axp221.dtsi for axp221 regulators

[Chen-Yu Tsai]

On Fri, Aug 28, 2015 at 8:32 PM, Maxime Ripard
maxime.rip...@free-electrons.com wrote:
 On Fri, Aug 28, 2015 at 05:54:36PM +0800, Chen-Yu Tsai wrote:
 Now that we have axp221.dtsi describing common axp22x hardware, use
 it and reference the nodes instead of declaring the whole tree.

 Also add regulator reference for cpu0 supply.

 Signed-off-by: Chen-Yu Tsai w...@csie.org
 ---
  arch/arm/boot/dts/sun6i-a31-hummingbird.dts | 114 
 ++--
  1 file changed, 56 insertions(+), 58 deletions(-)

 diff --git a/arch/arm/boot/dts/sun6i-a31-hummingbird.dts 
 b/arch/arm/boot/dts/sun6i-a31-hummingbird.dts
 index d0cfadac0691..d019cb70acec 100644
 --- a/arch/arm/boot/dts/sun6i-a31-hummingbird.dts
 +++ b/arch/arm/boot/dts/sun6i-a31-hummingbird.dts
 @@ -67,6 +67,10 @@
   };
  };

 +cpu0 {
 + cpu-supply = reg_dcdc2;
 +};
 +
  ehci0 {
   status = okay;
  };
 @@ -119,7 +123,7 @@
  mmc0 {
   pinctrl-names = default;
   pinctrl-0 = mmc0_pins_a, mmc0_cd_pin_hummingbird;
 - vmmc-supply = vcc_3v0;
 + vmmc-supply = reg_dcdc1;
   bus-width = 4;
   cd-gpios = pio 0 8 GPIO_ACTIVE_HIGH; /* PA8 */
   cd-inverted;
 @@ -134,7 +138,7 @@
  mmc1 {
   pinctrl-names = default;
   pinctrl-0 = mmc1_pins_a, wifi_reset_pin_hummingbird;
 - vmmc-supply = vcc_wifi;
 + vmmc-supply = reg_aldo1;
   mmc-pwrseq = wifi_pwrseq;
   bus-width = 4;
   non-removable;
 @@ -169,65 +173,59 @@
   reg = 0x68;
   interrupt-parent = nmi_intc;
   interrupts = 0 IRQ_TYPE_LEVEL_LOW;
 - interrupt-controller;
 - #interrupt-cells = 1;
 - dcdc1-supply = vcc_3v0;
 - dcdc5-supply = vcc_dram;
 -
 - regulators {
 - x-powers,dcdc-freq = 3000;
 -
 - vcc_3v0: dcdc1 {
 - regulator-always-on;
 - regulator-min-microvolt = 300;
 - regulator-max-microvolt = 300;
 - regulator-name = vcc-3v0;
 - };
 -
 - vdd_cpu: dcdc2 {
 - regulator-always-on;
 - regulator-min-microvolt = 70;
 - regulator-max-microvolt = 132;
 - regulator-name = vdd-cpu;
 - };
 -
 - vdd_gpu: dcdc3 {
 - regulator-always-on;
 - regulator-min-microvolt = 70;
 - regulator-max-microvolt = 132;
 - regulator-name = vdd-gpu;
 - };
 -
 - vdd_sys_dll: dcdc4 {
 - regulator-always-on;
 - regulator-min-microvolt = 110;
 - regulator-max-microvolt = 110;
 - regulator-name = vdd-sys-dll;
 - };
 -
 - vcc_dram: dcdc5 {
 - regulator-always-on;
 - regulator-min-microvolt = 150;
 - regulator-max-microvolt = 150;
 - regulator-name = vcc-dram;
 - };
 -
 - vcc_wifi: aldo1 {
 - regulator-min-microvolt = 330;
 - regulator-max-microvolt = 330;
 - regulator-name = vcc_wifi;
 - };
 -
 - avcc: aldo3 {
 - regulator-always-on;
 - regulator-min-microvolt = 300;
 - regulator-max-microvolt = 300;
 - regulator-name = avcc;
 - };
 - };
   };
  };

 +#include axp221.dtsi
 +
 +reg_aldo1 {
 + regulator-min-microvolt = 330;
 + regulator-max-microvolt = 330;
 + regulator-name = vcc-wifi;
 +};
 +
 +reg_aldo3 {
 + regulator-always-on;
 + regulator-min-microvolt = 300;
 + regulator-max-microvolt = 300;
 + regulator-name = avcc;
 +};
 +
 +reg_dcdc1 {
 + regulator-always-on;
 + regulator-min-microvolt = 300;
 + regulator-max-microvolt = 300;
 + regulator-name = vcc-3v0;
 +};
 +
 +reg_dcdc2 {
 + regulator-always-on;
 + regulator-min-microvolt = 70;
 + regulator-max-microvolt = 132;
 + regulator-name = vdd-cpu;
 +};
 +
 +reg_dcdc3 {
 + regulator-always-on;
 + regulator-min-microvolt = 70;
 + regulator-max-microvolt = 132;
 + regulator-name = vdd-gpu;
 +};

 I'm know it's just a mechanical change from your part, but is the GPU
 regulator really need to be always on?

I don't think so. It shouldn't affect anything else, though I can't
think of a way to thoroughly

[linux-sunxi] Re: [PATCH 2/6] ARM: dts: sunxi: Add dtsi for AXP221 PMIC

[Chen-Yu Tsai]

On Fri, Aug 28, 2015 at 8:31 PM, Maxime Ripard
maxime.rip...@free-electrons.com wrote:
 On Fri, Aug 28, 2015 at 05:54:35PM +0800, Chen-Yu Tsai wrote:
 The AXP221 PMIC is used with some Allwinner SoCs. This patch adds
 a dtsi file listing all the regulator nodes. The regulators are
 initialized based on their device node names.

 This can later be used with the AXP223 PMIC as well, which has
 the same functionality as AXP221, except for its host interface.

 Signed-off-by: Chen-Yu Tsai w...@csie.org
 ---
  arch/arm/boot/dts/axp221.dtsi | 148 
 ++
  1 file changed, 148 insertions(+)
  create mode 100644 arch/arm/boot/dts/axp221.dtsi

 diff --git a/arch/arm/boot/dts/axp221.dtsi b/arch/arm/boot/dts/axp221.dtsi
 new file mode 100644
 index ..74836f329863
 --- /dev/null
 +++ b/arch/arm/boot/dts/axp221.dtsi
 @@ -0,0 +1,148 @@
 +/*
 + * Copyright 2015 Chen-Yu Tsai
 + *
 + * Chen-Yu Tsai w...@csie.org
 + *
 + * This file is dual-licensed: you can use it either under the terms
 + * of the GPL or the X11 license, at your option. Note that this dual
 + * licensing only applies to this file, and not this project as a
 + * whole.
 + *
 + *  a) This file is free software; you can redistribute it and/or
 + * modify it under the terms of the GNU General Public License as
 + * published by the Free Software Foundation; either version 2 of the
 + * License, or (at your option) any later version.
 + *
 + * This file is distributed in the hope that it will be useful,
 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 + * GNU General Public License for more details.
 + *
 + * Or, alternatively,
 + *
 + *  b) Permission is hereby granted, free of charge, to any person
 + * obtaining a copy of this software and associated documentation
 + * files (the Software), to deal in the Software without
 + * restriction, including without limitation the rights to use,
 + * copy, modify, merge, publish, distribute, sublicense, and/or
 + * sell copies of the Software, and to permit persons to whom the
 + * Software is furnished to do so, subject to the following
 + * conditions:
 + *
 + * The above copyright notice and this permission notice shall be
 + * included in all copies or substantial portions of the Software.
 + *
 + * THE SOFTWARE IS PROVIDED AS IS, WITHOUT WARRANTY OF ANY KIND,
 + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
 + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
 + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
 + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
 + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
 + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 + * OTHER DEALINGS IN THE SOFTWARE.
 + */
 +
 +/*
 + * AXP221/221s/223 Integrated Power Management Chip
 + * http://www.x-powers.com/product/AXP22X.php
 + * http://dl.linux-sunxi.org/AXP/AXP221%20Datasheet%20V1.2%2020130326%20.pdf
 + */

 I'm usually not really fond of URLs in the source code and/or the
 commit logs. They tend to be broken very easily.

OK. Would you rather I put them in Documentation/arm/sunxi/README?
It's not immediately clear that sunxi and axp* are connected though.

 +
 +axp221 {
 + compatible = x-powers,axp221;
 + interrupt-controller;
 + #interrupt-cells = 1;
 +
 + regulators {
 + /* Default work frequency for buck regulators */
 + x-powers,dcdc-freq = 3000;
 +
 + /* supplies for dc1sw  dc5ldo are connected internally */
 + dcdc1-supply = reg_dcdc1;
 + dcdc5-supply = reg_dcdc5;

 so the parent regulator of DCDC1 is DCDC1 ?

These probably aren't the best names. These are the supplies for DC1SW and
DC5LDO, respectively. They are connected internally, so there aren't named
pins for them. The comment above explains it, though probably not clearly
enough. Furthermore, the input pins for DCDC1/5 are VIN1/5.


Regards
ChenYu

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[linux-sunxi] Re: [PATCH 2/6] ARM: dts: sunxi: Add dtsi for AXP221 PMIC

[Chen-Yu Tsai]

On Tue, Sep 1, 2015 at 2:29 PM, Maxime Ripard
<maxime.rip...@free-electrons.com> wrote:
> On Sat, Aug 29, 2015 at 10:07:12AM +0800, Chen-Yu Tsai wrote:
>> >> >> +
>> >> >> + {
>> >> >> + compatible = "x-powers,axp221";
>> >> >> + interrupt-controller;
>> >> >> + #interrupt-cells = <1>;
>> >> >> +
>> >> >> + regulators {
>> >> >> + /* Default work frequency for buck regulators */
>> >> >> + x-powers,dcdc-freq = <3000>;
>> >> >> +
>> >> >> + /* supplies for dc1sw & dc5ldo are connected internally 
>> >> >> */
>> >> >> + dcdc1-supply = <_dcdc1>;
>> >> >> + dcdc5-supply = <_dcdc5>;
>> >> >
>> >> > so the parent regulator of DCDC1 is DCDC1 ?
>> >>
>> >> These probably aren't the best names. These are the supplies for DC1SW and
>> >> DC5LDO, respectively. They are connected internally, so there aren't named
>> >> pins for them. The comment above explains it, though probably not clearly
>> >> enough. Furthermore, the input pins for DCDC1/5 are VIN1/5.
>> >
>> > I'm not quite sure I understand. They're connected internally but they
>> > have pins ?
>>
>> Internally, DCDC1's output feeds the input for DC1SW (which is just a switch
>> BTW) and DCDC5's output feeds DC5LDO (which is an LDO). Both these extra
>> regulators have separate controls. There are no external pins to name the
>> supplies after, so I just named them after which regulator supplies them.
>
> Well, there is. dc5ldo and dc1sw. And it is also how you called these
> regulators in your DT, so it would make much more sense to have it
> listed as such.

I was under the impression that we name them after the input pins. The names
are also documented in Documentation/devicetree/bindings/mfd/axp20x.txt

Do you want to change them?


Regards
ChenYu

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Re: [linux-sunxi] Re: [PATCH] ARM: dts: sun4i: Add dts file for the pov protab2-ips9 tablet

[Chen-Yu Tsai]

On Tue, Sep 8, 2015 at 3:45 PM, Hans de Goede  wrote:
> Hi,
>
> On 07-09-15 22:56, Maxime Ripard wrote:
>>
>> On Mon, Sep 07, 2015 at 09:05:29AM +0200, Hans de Goede wrote:
>
> +_ldo3 {
> +   /*
> +* We need to always power the camera sensor, otherwhise all
> access
> +* to i2c1 is blocked.
> +*/
> +   regulator-always-on;
> +   regulator-min-microvolt = <280>;
> +   regulator-max-microvolt = <280>;
> +   regulator-name = "vdd-csi";
> +};


 What is connected on i2c1 ? Just the camera sensor? or it has some
 other devices there?
>>>
>>>
>>> The bma250 accelerometer sits there, and the kernel already has a driver
>>> for it. That driver needs to have devicetree binding support added, and
>>> then we should be able to use the accelerometer.
>>
>>
>> Ok, so if this regulator is disable, you can't access the other
>> devices as well, right?
>
>
> Right, the controller reports the bus as being stuck.
>
>> Do you know why? Is it the regulator providing
>> the pull-up voltage?
>
>
> I've tried enabling the pull ups on the SoC i2c pins, so I do not think
> that it is that, it seems that somehow when not powered the camera sensor is
> actively keeping the lines low. Either it has multiple power planes, or
> it is using normally-on fet-s between ground and its i2c lines.

FYI the reference designs use one regulator to power the pull-ups, VCC-PX
(X for X pin group), and VDDIO (IO power)on the camera sensors. AVDD, DVDD
(actual power) for the sensors are another (or more) regulators.


ChenYu

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Re: [linux-sunxi] Re: [PATCH] ARM: dts: sun4i: Add dts file for the pov protab2-ips9 tablet

[Chen-Yu Tsai]

On Tue, Sep 8, 2015 at 8:49 PM, Hans de Goede <hdego...@redhat.com> wrote:
> Hi,
>
>
> On 09/08/2015 10:40 AM, Chen-Yu Tsai wrote:
>>
>> On Tue, Sep 8, 2015 at 3:45 PM, Hans de Goede <hdego...@redhat.com> wrote:
>>>
>>> Hi,
>>>
>>> On 07-09-15 22:56, Maxime Ripard wrote:
>>>>
>>>>
>>>> On Mon, Sep 07, 2015 at 09:05:29AM +0200, Hans de Goede wrote:
>>>>>>>
>>>>>>>
>>>>>>> +_ldo3 {
>>>>>>> +   /*
>>>>>>> +* We need to always power the camera sensor, otherwhise all
>>>>>>> access
>>>>>>> +* to i2c1 is blocked.
>>>>>>> +*/
>>>>>>> +   regulator-always-on;
>>>>>>> +   regulator-min-microvolt = <280>;
>>>>>>> +   regulator-max-microvolt = <280>;
>>>>>>> +   regulator-name = "vdd-csi";
>>>>>>> +};
>>>>>>
>>>>>>
>>>>>>
>>>>>> What is connected on i2c1 ? Just the camera sensor? or it has some
>>>>>> other devices there?
>>>>>
>>>>>
>>>>>
>>>>> The bma250 accelerometer sits there, and the kernel already has a
>>>>> driver
>>>>> for it. That driver needs to have devicetree binding support added, and
>>>>> then we should be able to use the accelerometer.
>>>>
>>>>
>>>>
>>>> Ok, so if this regulator is disable, you can't access the other
>>>> devices as well, right?
>>>
>>>
>>>
>>> Right, the controller reports the bus as being stuck.
>>>
>>>> Do you know why? Is it the regulator providing
>>>> the pull-up voltage?
>>>
>>>
>>>
>>> I've tried enabling the pull ups on the SoC i2c pins, so I do not think
>>> that it is that, it seems that somehow when not powered the camera sensor
>>> is
>>> actively keeping the lines low. Either it has multiple power planes, or
>>> it is using normally-on fet-s between ground and its i2c lines.
>>
>>
>> FYI the reference designs use one regulator to power the pull-ups, VCC-PX
>> (X for X pin group), and VDDIO (IO power)on the camera sensors. AVDD, DVDD
>> (actual power) for the sensors are another (or more) regulators.
>
>
> But that is a A23 or some such generation thing, right? This is an A10 based
> tablet!

A13 reference design from

   https://github.com/OLIMEX/OLINUXINO/blob/master/HARDWARE/A13-PDFs/a13-sch.pdf

also has it, but instead of outputs from the AXP223, it's using
discrete regulator
ICs, such as the LP3992 shown in the design. These are likely GPIO enabled.

Looking at some A13 fex files, each camera sensor has a reset GPIO, but the two
share the same power GPIO, which likely enables the regulator.

A10 should be similar, considering they use the same PMIC, and are likely to
need external regulators for all the voltages required.

My point is that the camera sensors require like 2~3 supplies, and VDDIO seems
to be shared between the sensors (if there are 2), the external pull-ups, and
sometimes power to the SoC pin group (if there is a power pin for them).


ChenYu

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[linux-sunxi] [PATCH 0/3] regulators: axp20x: Rename AXP221 DC1SW and DC5LDO supply names

[Chen-Yu Tsai]

Hi everyone,

This series renames regulator supply names for DC1SW and DC5LDO for
the AXP221. These 2 are secondary outputs for DCDC1 and DCDC5 buck
regulators, respectively, so they are connected to them internally.
There's no external input pin to name the supplies after.

When I originally did the support, I used the parent regulator's name
for the supply name. However this results in a misleading dts:

axp221: pmic@68 {
dcdc1-supply = <>;
dcdc5-supply = <>;

dcdc1: dcdc1 {
...
};

...
};

At first glance, one might interpret it as "DCDC1 supplies itself".
Indeed, Maxime raised this issue.

This series renames the supply names to the regulator names themselves,
or "dc1sw-supply" and "dc5ldo-supply" respectively:

axp221: pmic@68 {
dc1sw-supply = <>;
dc5ldo-supply = <>;
...
};

Renaming these shouldn't result in any problems in the real world.
All the board designs we've seen have DCDC1 supplying a common 3/3.3V
rail, and DCDC5 supplying 1.5V for DDR3 SDRAM. These 2 would have
"always-on" set, so even if the rename results in the secondary
regulator outputs being decoupled from the primary in the software
implementation, it would just be a representation issue. Function-wise,
it would function as before. On the Linux side, no one is actually
using the secondary outputs yet.

Patch 1 renames the supply names in the axp20x DT bindings.

Patch 2 updates the axp20x regulator driver.

Patch 3 updates the only dts, the Hummingbird A31, that uses these
bindings.

If everything's ok, could we merge the first 2 patches through the
regulator tree, and the 3rd through the sunxi tree?

Thanks.


Regards,
ChenYu


Chen-Yu Tsai (3):
  mfd: axp20x: Rename supply names for AXP221 DC1SW and DC5LDO
regulators
  regulators: axp20x: Rename supply names for AXP221 DC1SW and DC5LDO
  ARM: dts: sun6i: hummingbird: Rename AXP221 DC1SW and DC5LDO supply
names

 Documentation/devicetree/bindings/mfd/axp20x.txt | 4 ++--
 arch/arm/boot/dts/sun6i-a31-hummingbird.dts  | 4 ++--
 drivers/regulator/axp20x-regulator.c | 4 ++--
 3 files changed, 6 insertions(+), 6 deletions(-)

-- 
2.5.1

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[linux-sunxi] [PATCH 3/3] ARM: dts: sun6i: hummingbird: Rename AXP221 DC1SW and DC5LDO supply names

[Chen-Yu Tsai]

"dcdc1-supply" and "dcdc5-supply" are renamed to "dc1sw-supply" and
"dc5ldo-supply" respectively. Update the dts to reflect the new supply
names for the regulators.

Signed-off-by: Chen-Yu Tsai <w...@csie.org>
---
 arch/arm/boot/dts/sun6i-a31-hummingbird.dts | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm/boot/dts/sun6i-a31-hummingbird.dts 
b/arch/arm/boot/dts/sun6i-a31-hummingbird.dts
index 06d9391ca30e..144f563a3d6d 100644
--- a/arch/arm/boot/dts/sun6i-a31-hummingbird.dts
+++ b/arch/arm/boot/dts/sun6i-a31-hummingbird.dts
@@ -178,8 +178,8 @@
interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
interrupt-controller;
#interrupt-cells = <1>;
-   dcdc1-supply = <_3v0>;
-   dcdc5-supply = <_dram>;
+   dc1sw-supply = <_3v0>;
+   dc5ldo-supply = <_dram>;
 
regulators {
x-powers,dcdc-freq = <3000>;
-- 
2.5.1

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[linux-sunxi] [PATCH 2/3] regulators: axp20x: Rename supply names for AXP221 DC1SW and DC5LDO

[Chen-Yu Tsai]

The DC1SW and DC5LDO regulators in the AXP221 are internally chained
to DCDC1 and DCDC5, hence the names. The original bindings used the
parent regulator names for the supply regulator property. This causes
some confusion when we actually use it in the dts:

axp221 {
/* self supplying? */
dcdc1-supply = <>;
dcdc5-supply = <>;

dcdc1: dcdc1 {
...
};

dcdc5: dcdc5 {
...
};
};

Change them to the downstream regulator names, or "dc1sw" and "dc5ldo"
respectively.

Signed-off-by: Chen-Yu Tsai <w...@csie.org>
---
 drivers/regulator/axp20x-regulator.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/regulator/axp20x-regulator.c 
b/drivers/regulator/axp20x-regulator.c
index 01bf3476a791..27ebee8e224c 100644
--- a/drivers/regulator/axp20x-regulator.c
+++ b/drivers/regulator/axp20x-regulator.c
@@ -196,10 +196,10 @@ static const struct regulator_desc axp22x_regulators[] = {
AXP_DESC(AXP22X, DCDC5, "dcdc5", "vin5", 1000, 2550, 50,
 AXP22X_DCDC5_V_OUT, 0x1f, AXP22X_PWR_OUT_CTRL1, BIT(4)),
/* secondary switchable output of DCDC1 */
-   AXP_DESC_SW(AXP22X, DC1SW, "dc1sw", "dcdc1", 1600, 3400, 100,
+   AXP_DESC_SW(AXP22X, DC1SW, "dc1sw", "dc1sw", 1600, 3400, 100,
AXP22X_DCDC1_V_OUT, 0x1f, AXP22X_PWR_OUT_CTRL2, BIT(7)),
/* LDO regulator internally chained to DCDC5 */
-   AXP_DESC(AXP22X, DC5LDO, "dc5ldo", "dcdc5", 700, 1400, 100,
+   AXP_DESC(AXP22X, DC5LDO, "dc5ldo", "dc5ldo", 700, 1400, 100,
 AXP22X_DC5LDO_V_OUT, 0x7, AXP22X_PWR_OUT_CTRL1, BIT(0)),
AXP_DESC(AXP22X, ALDO1, "aldo1", "aldoin", 700, 3300, 100,
 AXP22X_ALDO1_V_OUT, 0x1f, AXP22X_PWR_OUT_CTRL1, BIT(6)),
-- 
2.5.1

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[linux-sunxi] [PATCH 1/3] mfd: axp20x: Rename supply names for AXP221 DC1SW and DC5LDO regulators

[Chen-Yu Tsai]

The DC1SW and DC5LDO regulators in the AXP221 are internally chained
to DCDC1 and DCDC5, hence the names. The original bindings used the
parent regulator names for the supply regulator property. This causes
some confusion when we actually use it in the dts:

axp221 {
/* self supplying? */
dcdc1-supply = <>;
dcdc5-supply = <>;

dcdc1: dcdc1 {
...
};

dcdc5: dcdc5 {
...
};
};

Change them to the downstream regulator names, or "dc1sw" and "dc5ldo"
respectively.

Signed-off-by: Chen-Yu Tsai <w...@csie.org>
---
 Documentation/devicetree/bindings/mfd/axp20x.txt | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/Documentation/devicetree/bindings/mfd/axp20x.txt 
b/Documentation/devicetree/bindings/mfd/axp20x.txt
index 41811223e5be..8e79252b1e7c 100644
--- a/Documentation/devicetree/bindings/mfd/axp20x.txt
+++ b/Documentation/devicetree/bindings/mfd/axp20x.txt
@@ -60,8 +60,8 @@ DCDC2 : DC-DC buck: vin2-supply
 DCDC3  : DC-DC buck: vin3-supply
 DCDC4  : DC-DC buck: vin4-supply
 DCDC5  : DC-DC buck: vin5-supply
-DC1SW  : On/Off Switch : dcdc1-supply  : DCDC1 secondary output
-DC5LDO : LDO   : dcdc5-supply  : input from DCDC5
+DC1SW  : On/Off Switch : dc1sw-supply  : DCDC1 secondary output
+DC5LDO : LDO   : dc5ldo-supply : input from DCDC5
 ALDO1  : LDO   : aldoin-supply : shared supply
 ALDO2  : LDO   : aldoin-supply : shared supply
 ALDO3  : LDO   : aldoin-supply : shared supply
-- 
2.5.1

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Re: [linux-sunxi] Re: [PATCH 2/4] ARM: dts: sun7i: Add keypad node to Allwinner A20 SoC

[Chen-Yu Tsai]

On Thu, Sep 17, 2015 at 7:29 PM, Maxime Ripard
 wrote:
> Hi Yassin,
>
> On Wed, Sep 16, 2015 at 12:05:55AM +1000, yassinjaf...@gmail.com wrote:
>> From: Yassin Jaffer 
>>
>> Add Keypad controller node definition to the A20 SoC.
>>
>> Signed-off-by: Yassin Jaffer 
>> ---
>>  arch/arm/boot/dts/sun7i-a20.dtsi | 9 +
>>  1 file changed, 9 insertions(+)
>>
>> diff --git a/arch/arm/boot/dts/sun7i-a20.dtsi 
>> b/arch/arm/boot/dts/sun7i-a20.dtsi
>> index 333604a..35cc8d0 100644
>> --- a/arch/arm/boot/dts/sun7i-a20.dtsi
>> +++ b/arch/arm/boot/dts/sun7i-a20.dtsi
>> @@ -1198,6 +1198,15 @@
>>   status = "disabled";
>>   };
>>
>> + kp: kp@01c23000 {
>
> The node name should reflect the class of the device. keypad@01c23000
> would be better for example.

Expanding the label to "keypad" as well would be nice.
"kp" could mean other things.

Thanks.

ChenYu

> It looks good otherwise.
>
> Thanks!
> Maxime
>
> --
> Maxime Ripard, Free Electrons
> Embedded Linux, Kernel and Android engineering
> http://free-electrons.com
>
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Re: [linux-sunxi] Re: [PATCH 2/2] ASoC: sunxi: add support for the on-chip codec on early Allwinner SoCs

[Chen-Yu Tsai]

On Thu, Sep 17, 2015 at 9:31 PM, Maxime Ripard
 wrote:
> Hi Mark,
>
> On Wed, Sep 16, 2015 at 08:16:12PM +0100, Mark Brown wrote:
>> On Sat, Sep 12, 2015 at 03:26:24PM +0200, Maxime Ripard wrote:
>>
>> This looks pretty good, there's a few minor things below but I'll apply
>> anyway - please send followup patches fixing these.
>
> Sure, I will. Thanks!
>
>>
>> > +   if (clk_set_rate(scodec->clk_module, clk_freq))
>> > +   return -EINVAL;
>>
>> Better to pass back the error code here rather than silently discard it
>> (it might have more information).
>
> Yep.
>
>>
>> > +static struct snd_soc_dai_driver sun4i_codec_dai = {
>> > +   .name   = "Codec",
>> > +   .ops= _codec_dai_ops,
>> > +   .playback = {
>> > +   .stream_name= "Codec Playback",
>> > +   .channels_min   = 1,
>> > +   .channels_max   = 2,
>> > +   .rate_min   = 8000,
>> > +   .rate_max   = 192000,
>> > +   .rates  = SNDRV_PCM_RATE_8000_48000 |
>> > + SNDRV_PCM_RATE_96000 |
>> > + SNDRV_PCM_RATE_192000 |
>> > + SNDRV_PCM_RATE_KNOT,
>>
>> No need to specify both explicit rates and _KNOT, _KNOT covers
>> everything.
>
> Ack.
>
>> > +   .formats= SNDRV_PCM_FMTBIT_S16_LE |
>> > + SNDRV_PCM_FMTBIT_S32_LE,
>> > +   .sig_bits   = 24,
>>
>> So presumably also S24_LE (ie, 24 bits packed into a 32 bit word)?
>
> Hmm, probably yes, I'll test that.

IIRC when Emilio first wrote the driver, we tried 24 bit and no sound
came out. Turns out it's an alignment issue. The codec's FIFO register
is 32 bits wide, and takes the higher 24 bits as input when set to 24
bit mode. The internal FIFO is only 24 bits wide. A20 user manual P174
describes how the bits are copied.

So for 24 bit audio, you would actually send it 32 bit audio samples,
and let it truncate or drop the least significant 8 bits. This is why
we have SNDRV_PCM_FMTBIT_S32_LE with .sig_bits = 24.

I don't know if this is just a workaround, but a few other drivers do
this as well, for example twl3040 and omap-mcpdm.


Regards
ChenYu

>> > +   /* Enable the bus clock */
>> > +   if (clk_prepare_enable(scodec->clk_apb)) {
>> > +   dev_err(>dev, "Failed to enable the APB clock\n");
>> > +   return -EINVAL;
>> > +   }
>>
>> Ideally we'd have runtime power management to disable the clocks when
>> idle.
>
> We don't really have any kind of power management support currently,
> but adding runtime pm everywhere is definitely on the todo list. It
> might not happen before a while though.
>
> Thanks!
> Maxime
>
> --
> Maxime Ripard, Free Electrons
> Embedded Linux, Kernel and Android engineering
> http://free-electrons.com
>
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[linux-sunxi] Re: [PATCH v3 1/8] rsb: Add generic Reduced Serial Bus (RSB) controller binding documentation

[Chen-Yu Tsai]

On Mon, Aug 24, 2015 at 6:43 AM, Rob Herring <robherri...@gmail.com> wrote:
> On Tue, Aug 18, 2015 at 11:20 PM, Chen-Yu Tsai <w...@csie.org> wrote:
>> Reduced Serial Bus is a proprietary 2-line push-pull serial bus
>> supporting multiple slave devices.
>>
>> It was developed by Allwinner, Inc. and used by Allwinner and X-Powers,
>> Inc. for their line of PMICs and other peripheral ICs.
>>
>> Signed-off-by: Chen-Yu Tsai <w...@csie.org>
>> ---
>>  Documentation/devicetree/bindings/rsb/rsb.txt | 50 
>> +++
>>  1 file changed, 50 insertions(+)
>>  create mode 100644 Documentation/devicetree/bindings/rsb/rsb.txt
>>
>> diff --git a/Documentation/devicetree/bindings/rsb/rsb.txt 
>> b/Documentation/devicetree/bindings/rsb/rsb.txt
>> new file mode 100644
>> index ..0b027948ca9c
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/rsb/rsb.txt
>> @@ -0,0 +1,50 @@
>> +Reduced Serial Bus (RSB) Controller
>> +
>> +This document defines a generic set of bindings for use by RSB controllers.
>> +A controller is modelled in device tree as a node with zero or more child
>> +nodes, each representing a unique slave device on the bus.
>> +
>> +Required properties:
>> +
>> + - #address-cells : must be 2
>> + - #size-cells : must be 0
>> +
>> +Optional properties:
>> +
>> + - clock-frequency : Desired bus clock frequency in Hz. Maximum is 20 MHz.
>> +
>> +Child nodes:
>> +
>> +An RSB controller node can contain zero or more child nodes representing
>> +slave devices on the bus.  Child 'reg' properties are specified as a
>> +runtime address, hardware address pair. The hardware address is hardwired
>> +in the device, which can normally be found in the datasheet. The runtime
>> +address is set by software. No 2 devices on the same bus shall have the
>> +same runtime address.
>> +
>> +Valid runtime addresses - There are only 15 valid runtime addresses:
>> +
>> +0x17, 0x2d, 0x3a, 0x4e, 0x59, 0x63, 0x74, 0x8b,
>> +0x9c, 0xa6, 0xb1, 0xc5, 0xd2, 0xe8, 0xff
>> +
>> +It is highly recommended that one choose the same runtime addresses as
>> +vendor BSPs use so that a) the addresses remain the same across different
>> +software systems, and b) addresses of supported and listed slave devices
>> +don't conflict with unsupported or not yet listed devices.
>
> I fail to understand why the run-time address belongs in DT or why
> alignment to vendor BSP matters? I can see the desire to align DTs if
> the vendor OS was dependent on having this information. Having to
> access the vendor OS to determine what address to pick does not seem
> like the right way to write a DTS. It seems to me that the RSB bus
> driver should allocate run-time addresses dynamically.

I agree it seems better that the driver should allocate them dynamically.
However my attempts to reset the runtime addresses all fail, with the
device in question rejecting the request.

I'll run some more tests. Another way would be for the driver to test
if the device was already allocated an address, and just use that. If
not, then just allocate one to it. The implementation is a bit more
complicated, as there's no lookup function.

But if we cannot reliably reset the runtime addresses, I don't see
any alternative to putting the address in the DT. Most of the use cases
we want to support are PMICs, which are initialized by the boot loader.


Regards
ChenYu

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[linux-sunxi] Re: [PATCH 5/6] ARM: dts: sun6i: Add support for Sinlinx A31s SDK board

[Chen-Yu Tsai]

On Fri, Aug 28, 2015 at 8:34 PM, Maxime Ripard
<maxime.rip...@free-electrons.com> wrote:
> On Fri, Aug 28, 2015 at 05:54:38PM +0800, Chen-Yu Tsai wrote:
>> The Sinlinx A31s SDK is a A31s based module/baseboard development kit.
>>
>> The core module has the SoC, PMIC, DRAM, eMMC and supporting components.
>> There are also pads for UART0, JTAG and I2S.
>
> Can you use that core module without that baseboard?

You could just solder 5v, gnd, and uart, and it should work.
Not that I actually tried it.

>> The baseboard has 100 Mbps Ethernet, 5x USB 2.0 host ports via a USB 2.0
>> hub chip, MMC, HDMI, SPDIF, CIR, audio jacks, 2 tablet-like volume
>> buttons, RS232 style UART and USB OTG (though VBUS is not connected).
>> Various headers are available for other addon modules, such as SDIO
>> WiFi, LCD display, camera sensor, UARTs, I2C, SPI and GPIOs.
>
> Can the baseboard be used with our core modules?

Doubtful. The baseboard is more like a demonstration platform for the
core board.

What do you suggest?


ChenYu

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Re: [linux-sunxi] [PATCH 0/2] ASoC: Add support for the Allwinner A10 codec

[Chen-Yu Tsai]

On Mon, Sep 28, 2015 at 3:42 PM, Maxime Ripard
 wrote:
> Hi Priit,
>
> On Tue, Sep 22, 2015 at 04:26:57PM +0300, Priit Laes wrote:
>> On Sat, 2015-09-12 at 15:26 +0200, Maxime Ripard wrote:
>> > Hi everyone,
>> >
>> > This patch set adds the support for what Allwinner calls the codec on
>> > their SoCs.
>> >
>> > This codec is actually a combination of a codec and DAI, tied
>> > together
>> > in a single memory-mapped IP. It is completely standalone, and
>> > outputs
>> > directly the analog signal.
>> >
>> > While it supports both playback and capture, the capture is not
>> > implemented in this patch, and will be posted eventually as a
>> > separate
>> > one.
>> >
>> > This set, in order to be functional, has a dependency on the audio
>> > clocks patch set posted separately. However, it doesn't needs this to
>> > compile properly, so I guess it can be merged without really caring
>> > for the merging status of the clock patches.
>>
>> It works on Gemei G9 tablet which has also extra chip that
>> automatically switches output over from internal speakers to headphones
>> when connector is inserted.
>>
>> Now I noticed some weird things:
>>
>> When I have all the switches as ON in alsamixer, and I start disabling
>> them, I get following weird results.
>>
>> Left Mixer Left - LML
>> Right Mixer Left - LMR
>> Right Mixer Right - RMR
>>
>> Very faint output:
>> LML - ON
>> RML - Mute
>> RMR - ON
>>
>> Output works fully:
>> LML - Mute
>> RML - Mute
>> RMR - Mute
>>
>> When I Mute Pre-Amplifier and fiddle any of LML, RML or RMR, the output
>> stays mute even after setting Pre-Amplifier Mute back on:
>>
>> 1. All switches on
>> 2. Mute pre-amplifier
>> 3. Mute RMR
>> 4. Pre-Amilifier Mute Off
>> .. Music stays off
>> 5. Toggle Pre-Amplifier twice - output turns on
>
> Unfortunately, I don't have access to that SoC or that setup.
>
> Do you have another A10 board with a simpler audio setup, like a
> cubieboard?
>
>> And also following in dmesg:
>> sun4i-codec 1c22c00.codec: Codec <-> 1c22c00.codec mapping ok
>> sun4i-codec 1c22c00.codec: ASoC: no sink widget found for Headphone Jack
>> sun4i-codec 1c22c00.codec: ASoC: Failed to add route HP Left -> direct -> 
>> Headphone Jack
>> sun4i-codec 1c22c00.codec: ASoC: no sink widget found for Headphone Jack
>> sun4i-codec 1c22c00.codec: ASoC: Failed to add route HP Right -> direct -> 
>> Headphone Jack
>
> That one is weird, I'll look into this.

This also appears on my Cubietruck, when using the dts patch from
Hans' sunxi-wip
branch, which is the same patch, albeit for a different dts file, as Priit.

The immediate culprit seems to be the routing property, though I'm not sure what
it should be set to, or what extra drivers might be needed.


Regards
ChenYu

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[linux-sunxi] [PATCH v2 3/3] ARM: dts: sun6i: hummingbird: Drop AXP221 DC1SW and DC5LDO supplies

[Chen-Yu Tsai]

"dcdc1-supply" and "dcdc5-supply" have been dropped, as they are
internally connected and should not be represented in the device
tree.

Signed-off-by: Chen-Yu Tsai <w...@csie.org>
---
 arch/arm/boot/dts/sun6i-a31-hummingbird.dts | 2 --
 1 file changed, 2 deletions(-)

diff --git a/arch/arm/boot/dts/sun6i-a31-hummingbird.dts 
b/arch/arm/boot/dts/sun6i-a31-hummingbird.dts
index 06d9391ca30e..f93cf4c42a7a 100644
--- a/arch/arm/boot/dts/sun6i-a31-hummingbird.dts
+++ b/arch/arm/boot/dts/sun6i-a31-hummingbird.dts
@@ -178,8 +178,6 @@
interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
interrupt-controller;
#interrupt-cells = <1>;
-   dcdc1-supply = <_3v0>;
-   dcdc5-supply = <_dram>;
 
regulators {
x-powers,dcdc-freq = <3000>;
-- 
2.5.3

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[linux-sunxi] [PATCH v2 2/3] regulator: axp20x: set supply names for AXP22X DC1SW/DC5LDO internally

[Chen-Yu Tsai]

The DC1SW and DC5LDO regulators in the AXP22X are internally chained
to DCDC1 and DCDC5, hence the names. The original bindings used the
parent regulator names for the supply regulator property.

Since they are internally connected, the relationship should not be
represented in the device tree, but handled internally by the driver.

This patch has the driver remember the regulator names for the parent
DCDC1/DCDC5, and use them as supply names for DC1SW/DC5LDO.

Signed-off-by: Chen-Yu Tsai <w...@csie.org>
---
 drivers/regulator/axp20x-regulator.c | 54 +---
 1 file changed, 50 insertions(+), 4 deletions(-)

diff --git a/drivers/regulator/axp20x-regulator.c 
b/drivers/regulator/axp20x-regulator.c
index a9567af7cec0..35de22fdb7a0 100644
--- a/drivers/regulator/axp20x-regulator.c
+++ b/drivers/regulator/axp20x-regulator.c
@@ -196,10 +196,10 @@ static const struct regulator_desc axp22x_regulators[] = {
AXP_DESC(AXP22X, DCDC5, "dcdc5", "vin5", 1000, 2550, 50,
 AXP22X_DCDC5_V_OUT, 0x1f, AXP22X_PWR_OUT_CTRL1, BIT(5)),
/* secondary switchable output of DCDC1 */
-   AXP_DESC_SW(AXP22X, DC1SW, "dc1sw", "dcdc1", 1600, 3400, 100,
+   AXP_DESC_SW(AXP22X, DC1SW, "dc1sw", NULL, 1600, 3400, 100,
AXP22X_DCDC1_V_OUT, 0x1f, AXP22X_PWR_OUT_CTRL2, BIT(7)),
/* LDO regulator internally chained to DCDC5 */
-   AXP_DESC(AXP22X, DC5LDO, "dc5ldo", "dcdc5", 700, 1400, 100,
+   AXP_DESC(AXP22X, DC5LDO, "dc5ldo", NULL, 700, 1400, 100,
 AXP22X_DC5LDO_V_OUT, 0x7, AXP22X_PWR_OUT_CTRL1, BIT(0)),
AXP_DESC(AXP22X, ALDO1, "aldo1", "aldoin", 700, 3300, 100,
 AXP22X_ALDO1_V_OUT, 0x1f, AXP22X_PWR_OUT_CTRL1, BIT(6)),
@@ -350,6 +350,8 @@ static int axp20x_regulator_probe(struct platform_device 
*pdev)
};
int ret, i, nregulators;
u32 workmode;
+   const char *axp22x_dc1_name = axp22x_regulators[AXP22X_DCDC1].name;
+   const char *axp22x_dc5_name = axp22x_regulators[AXP22X_DCDC5].name;
 
switch (axp20x->variant) {
case AXP202_ID:
@@ -371,8 +373,37 @@ static int axp20x_regulator_probe(struct platform_device 
*pdev)
axp20x_regulator_parse_dt(pdev);
 
for (i = 0; i < nregulators; i++) {
-   rdev = devm_regulator_register(>dev, [i],
-  );
+   const struct regulator_desc *desc = [i];
+   struct regulator_desc *new_desc;
+
+   /*
+* Regulators DC1SW and DC5LDO are connected internally,
+* so we have to handle their supply names separately.
+*
+* We always register the regulators in proper sequence,
+* so the supply names are correctly read. See the last
+* part of this loop to see where we save the DT defined
+* name.
+*/
+   if (regulators == axp22x_regulators) {
+   if (i == AXP22X_DC1SW) {
+   new_desc = devm_kzalloc(>dev,
+   sizeof(*desc),
+   GFP_KERNEL);
+   *new_desc = regulators[i];
+   new_desc->supply_name = axp22x_dc1_name;
+   desc = new_desc;
+   } else if (i == AXP22X_DC5LDO) {
+   new_desc = devm_kzalloc(>dev,
+   sizeof(*desc),
+   GFP_KERNEL);
+   *new_desc = regulators[i];
+   new_desc->supply_name = axp22x_dc5_name;
+   desc = new_desc;
+   }
+   }
+
+   rdev = devm_regulator_register(>dev, desc, );
if (IS_ERR(rdev)) {
dev_err(>dev, "Failed to register %s\n",
regulators[i].name);
@@ -388,6 +419,21 @@ static int axp20x_regulator_probe(struct platform_device 
*pdev)
dev_err(>dev, "Failed to set workmode on 
%s\n",
rdev->desc->name);
}
+
+   /*
+* Save AXP22X DCDC1 / DCDC5 regulator names for later.
+*/
+   if (regulators == axp22x_regulators) {
+   /* Can we use rdev->constraints->name instead? */
+   if (i == AXP22X_DCDC1)
+   of_property_read_string(rdev->dev.of_node,
+   "regulator-name&q

[linux-sunxi] [PATCH v2 1/3] mfd: axp20x: Drop AXP221 DC1SW and DC5LDO regulator supplies from bindings

[Chen-Yu Tsai]

The DC1SW and DC5LDO regulators in the AXP221 are internally chained
to DCDC1 and DCDC5, hence the names. The original bindings used the
parent regulator names for the supply regulator property. This causes
some confusion when we actually use it in the dts:

axp221 {
/* self supplying? */
dcdc1-supply = <>;
dcdc5-supply = <>;

dcdc1: dcdc1 {
...
};

dcdc5: dcdc5 {
...
};
};

Since they are internally connected within the PMIC, their relationships
should not be visible in the device tree.

Signed-off-by: Chen-Yu Tsai <w...@csie.org>
---
 Documentation/devicetree/bindings/mfd/axp20x.txt | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/Documentation/devicetree/bindings/mfd/axp20x.txt 
b/Documentation/devicetree/bindings/mfd/axp20x.txt
index 41811223e5be..a474359dd206 100644
--- a/Documentation/devicetree/bindings/mfd/axp20x.txt
+++ b/Documentation/devicetree/bindings/mfd/axp20x.txt
@@ -60,8 +60,8 @@ DCDC2 : DC-DC buck: vin2-supply
 DCDC3  : DC-DC buck: vin3-supply
 DCDC4  : DC-DC buck: vin4-supply
 DCDC5  : DC-DC buck: vin5-supply
-DC1SW  : On/Off Switch : dcdc1-supply  : DCDC1 secondary output
-DC5LDO : LDO   : dcdc5-supply  : input from DCDC5
+DC1SW  : On/Off Switch :   : DCDC1 secondary output
+DC5LDO : LDO   :   : input from DCDC5
 ALDO1  : LDO   : aldoin-supply : shared supply
 ALDO2  : LDO   : aldoin-supply : shared supply
 ALDO3  : LDO   : aldoin-supply : shared supply
-- 
2.5.3

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[linux-sunxi] [PATCH v2 0/3] regulator: axp20x: Drop AXP221 DC1SW/DC5LDO supplies from bindings

[Chen-Yu Tsai]

Hi everyone,

This is v2 of "regulators: axp20x: Rename AXP221 DC1SW and DC5LDO supply
names". v2 removes the regulator supply properties for AXP221 DC1SW
and DC5LDO, instead of renaming them. These 2 regulators are secondary
outputs for DCDC1 and DCDC5 buck regulators, respectively, so they are
connected to them internally. This relationship should not be represented
in the device tree.


Patch 1 drops the AXP22X DC1SW/DC5LDO supply properties from the axp20x
DT bindings.

Patch 2 updates the axp20x regulator driver.

Patch 3 updates the only dts, the Hummingbird A31, that uses these
bindings.

If everything's ok, could we merge this for 4.4?

Thanks.


Regards,
ChenYu


Chen-Yu Tsai (3):
  mfd: axp20x: Drop AXP221 DC1SW and DC5LDO regulator supplies from
bindings
  regulator: axp20x: set supply names for AXP22X DC1SW/DC5LDO internally
  ARM: dts: sun6i: hummingbird: Drop AXP221 DC1SW and DC5LDO supplies

 Documentation/devicetree/bindings/mfd/axp20x.txt |  4 +-
 arch/arm/boot/dts/sun6i-a31-hummingbird.dts  |  2 -
 drivers/regulator/axp20x-regulator.c | 54 ++--
 3 files changed, 52 insertions(+), 8 deletions(-)

-- 
2.5.3

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[linux-sunxi] [PATCH v5 4/5] ARM: dts: sun8i: q8-common: Enable RSB controller for A23/A33 Q8 tablets

[Chen-Yu Tsai]

The Reduced Serial Bus controller is used to talk to the onboard PMIC.

Signed-off-by: Chen-Yu Tsai <w...@csie.org>
---

Changes since v4:

  - Move enabling RSB controller from ippo-q8h-v5 dts to sun8i-q8-common

---
 arch/arm/boot/dts/sun8i-q8-common.dtsi | 4 
 1 file changed, 4 insertions(+)

diff --git a/arch/arm/boot/dts/sun8i-q8-common.dtsi 
b/arch/arm/boot/dts/sun8i-q8-common.dtsi
index f34273602f64..1a69231d2da5 100644
--- a/arch/arm/boot/dts/sun8i-q8-common.dtsi
+++ b/arch/arm/boot/dts/sun8i-q8-common.dtsi
@@ -90,6 +90,10 @@
};
 };
 
+_rsb {
+   status = "okay";
+};
+
 _uart {
pinctrl-names = "default";
pinctrl-0 = <_uart_pins_a>;
-- 
2.5.3

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[linux-sunxi] [PATCH v5 3/5] ARM: dts: sun8i: Add Reduced Serial Bus controller device node to A23/A33 dtsi

[Chen-Yu Tsai]

This patch adds a device node for the Reduced Serial Bus (RSB)
controller and the defacto pinmux setting to the A23/A33 dtsi.

Since there is only one possible pinmux setting for RSB, just
set it in the dtsi.

Signed-off-by: Chen-Yu Tsai <w...@csie.org>
---

Changes since v4:

  None

Changes since v3:

  - Changed #address-cells to 1

---
 arch/arm/boot/dts/sun8i-a23-a33.dtsi | 21 +
 1 file changed, 21 insertions(+)

diff --git a/arch/arm/boot/dts/sun8i-a23-a33.dtsi 
b/arch/arm/boot/dts/sun8i-a23-a33.dtsi
index 04bccad977ee..828aaf52c342 100644
--- a/arch/arm/boot/dts/sun8i-a23-a33.dtsi
+++ b/arch/arm/boot/dts/sun8i-a23-a33.dtsi
@@ -651,6 +651,13 @@
#size-cells = <0>;
#gpio-cells = <3>;
 
+   r_rsb_pins: r_rsb {
+   allwinner,pins = "PL0", "PL1";
+   allwinner,function = "s_rsb";
+   allwinner,drive = ;
+   allwinner,pull = ;
+   };
+
r_uart_pins_a: r_uart@0 {
allwinner,pins = "PL2", "PL3";
allwinner,function = "s_uart";
@@ -658,5 +665,19 @@
allwinner,pull = ;
};
};
+
+   r_rsb: rsb@01f03400 {
+   compatible = "allwinner,sun8i-a23-rsb";
+   reg = <0x01f03400 0x400>;
+   interrupts = ;
+   clocks = <_gates 3>;
+   clock-frequency = <300>;
+   resets = <_rst 3>;
+   pinctrl-names = "default";
+   pinctrl-0 = <_rsb_pins>;
+   status = "disabled";
+   #address-cells = <1>;
+   #size-cells = <0>;
+   };
};
 };
-- 
2.5.3

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[linux-sunxi] [PATCH v5 2/5] soc: sunxi: Add driver for Allwinner Reduced Serial Bus

[Chen-Yu Tsai]

Reduced Serial Bus (RSB) is an Allwinner proprietery interface
used to communicate with PMICs and other peripheral ICs.

RSB is a two-wire push-pull serial bus that supports 1 master
device and up to 15 active slave devices.

Signed-off-by: Chen-Yu Tsai <w...@csie.org>
---

Changes since v4:

  - Add newlines to printk calls missing them.
  - Removed bus type checks (dev->bus != _rsb_bus)
  - Use different lockdep class for each regmap init call, as in
3cfe7a74d42b ("regmap: Use different lockdep class for each regmap
init call")

Changes since v3:

  - Merged common bus regmap and controller functions into a single driver
  - Moved to drivers/soc/sunxi/
  - Allocate and map runtime address statically.

---
 drivers/soc/sunxi/Kconfig   |  10 +
 drivers/soc/sunxi/Makefile  |   1 +
 drivers/soc/sunxi/sunxi_rsb.c   | 783 
 include/linux/soc/sunxi/sunxi_rsb.h | 105 +
 4 files changed, 899 insertions(+)
 create mode 100644 drivers/soc/sunxi/sunxi_rsb.c
 create mode 100644 include/linux/soc/sunxi/sunxi_rsb.h

diff --git a/drivers/soc/sunxi/Kconfig b/drivers/soc/sunxi/Kconfig
index 353b07e40176..84f437f2ea0a 100644
--- a/drivers/soc/sunxi/Kconfig
+++ b/drivers/soc/sunxi/Kconfig
@@ -1,6 +1,16 @@
 #
 # Allwinner sunXi SoC drivers
 #
+config SUNXI_RSB
+   bool
+   default MACH_SUN8I || MACH_SUN9I
+   select REGMAP
+   help
+ Say y here to enable Reduced Serial Bus (RSB) support. This
+ controller is responsible for communicating with various RSB
+ based devices, such as AXP223, AXP8XX PMICs, and AC100/AC200
+ ICs.
+
 config SUNXI_SRAM
bool
default ARCH_SUNXI
diff --git a/drivers/soc/sunxi/Makefile b/drivers/soc/sunxi/Makefile
index 4cf9dbdf346e..1a4c16016931 100644
--- a/drivers/soc/sunxi/Makefile
+++ b/drivers/soc/sunxi/Makefile
@@ -1 +1,2 @@
+obj-$(CONFIG_SUNXI_RSB) += sunxi_rsb.o
 obj-$(CONFIG_SUNXI_SRAM) +=sunxi_sram.o
diff --git a/drivers/soc/sunxi/sunxi_rsb.c b/drivers/soc/sunxi/sunxi_rsb.c
new file mode 100644
index ..95e83236d077
--- /dev/null
+++ b/drivers/soc/sunxi/sunxi_rsb.c
@@ -0,0 +1,783 @@
+/*
+ * RSB (Reduced Serial Bus) driver.
+ *
+ * Author: Chen-Yu Tsai <w...@csie.org>
+ *
+ * This file is licensed under the terms of the GNU General Public License
+ * version 2.  This program is licensed "as is" without any warranty of any
+ * kind, whether express or implied.
+ *
+ * The RSB controller looks like an SMBus controller which only supports
+ * byte and word data transfers. But, it differs from standard SMBus
+ * protocol on several aspects:
+ * - it uses addresses set at runtime to address slaves. Runtime addresses
+ *   are sent to slaves using their 12bit hardware addresses. Up to 15
+ *   runtime addresses are available.
+ * - it adds a parity bit every 8bits of data and address for read and
+ *   write accesses; this replaces the ack bit
+ * - only one read access is required to read a byte (instead of a write
+ *   followed by a read access in standard SMBus protocol)
+ * - there's no Ack bit after each read access
+ *
+ * This means this bus cannot be used to interface with standard SMBus
+ * devices. Devices known to support this interface include the AXP223,
+ * AXP809, and AXP806 PMICs, and the AC100 audio codec, all from X-Powers.
+ *
+ * A description of the operation and wire protocol can be found in the
+ * RSB section of Allwinner's A80 user manual, which can be found at
+ *
+ * https://github.com/allwinner-zh/documents/tree/master/A80
+ *
+ * This document is officially released by Allwinner.
+ *
+ * This driver is based on i2c-sun6i-p2wi.c, the P2WI bus driver.
+ *
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+/* RSB registers */
+#define RSB_CTRL   0x0 /* Global control */
+#define RSB_CCR0x4 /* Clock control */
+#define RSB_INTE   0x8 /* Interrupt controls */
+#define RSB_INTS   0xc /* Interrupt status */
+#define RSB_ADDR   0x10/* Address to send with read/write command */
+#define RSB_DATA   0x1c/* Data to read/write */
+#define RSB_LCR0x24/* Line control */
+#define RSB_DMCR   0x28/* Device mode (init) control */
+#define RSB_CMD0x2c/* RSB Command */
+#define RSB_DAR0x30/* Device address / runtime address */
+
+/* CTRL fields */
+#define RSB_CTRL_START_TRANS   BIT(7)
+#define RSB_CTRL_ABORT_TRANS   BIT(6)
+#define RSB_CTRL_GLOBAL_INT_ENBBIT(1)
+#define RSB_CTRL_SOFT_RST  BIT(0)
+
+/* CLK CTRL fields */
+#define RSB_CCR_SDA_OUT_DELAY(v)   (((v) & 0x7) << 8)
+#define RSB_CCR_MAX_CLK_DIV0xff
+#define RSB_CCR_CLK_DIV(v) ((v) & RSB

[linux-sunxi] [PATCH v5 1/5] soc: sunxi: Add Allwinner Reduced Serial Bus (RSB) controller bindings

[Chen-Yu Tsai]

Reduced Serial Bus is a proprietary 2-line push-pull serial bus supporting
multiple slave devices. It was developed by Allwinner, Inc. and used by
Allwinner and X-Powers, Inc. for their line of PMICs and other peripheral
ICs.

Recent Allwinner SoCs, starting with the A23, have an RSB controller. This
is used to talk to the PMIC, and later with the A80 and A83 platform, the
audio codec IC.

Signed-off-by: Chen-Yu Tsai <w...@csie.org>
Acked-by: Maxime Ripard <maxime.rip...@free-electrons.com>
---

Changes since v4:

  - Added ack by Maxime

Changes since v3:

  - Merged common RSB bindings and Allwinner RSB controller bindings
  - Moved to soc/sunxi/rsb.txt
  - Removed runtime address from bindings
  - #address-cells changed to 1
  - Default to 3 MHz if bus clock speed is not specified

---
 .../devicetree/bindings/soc/sunxi/rsb.txt  | 47 ++
 1 file changed, 47 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/soc/sunxi/rsb.txt

diff --git a/Documentation/devicetree/bindings/soc/sunxi/rsb.txt 
b/Documentation/devicetree/bindings/soc/sunxi/rsb.txt
new file mode 100644
index ..3dd28343b6ce
--- /dev/null
+++ b/Documentation/devicetree/bindings/soc/sunxi/rsb.txt
@@ -0,0 +1,47 @@
+Allwinner Reduced Serial Bus (RSB) controller
+
+The RSB controller found on later Allwinner SoCs is an SMBus like 2 wire
+serial bus with 1 master and up to 15 slaves. It is represented by a node
+for the controller itself, and child nodes representing the slave devices.
+
+Required properties :
+
+ - reg : Offset and length of the register set for the controller.
+ - compatible  : Shall be "allwinner,sun8i-a23-rsb".
+ - interrupts  : The interrupt line associated to the RSB controller.
+ - clocks  : The gate clk associated to the RSB controller.
+ - resets  : The reset line associated to the RSB controller.
+ - #address-cells  : shall be 1
+ - #size-cells : shall be 0
+
+Optional properties :
+
+ - clock-frequency : Desired RSB bus clock frequency in Hz. Maximum is 20MHz.
+If not set this defaults to 3MHz.
+
+Child nodes:
+
+An RSB controller node can contain zero or more child nodes representing
+slave devices on the bus.  Child 'reg' properties should contain the slave
+device's hardware address. The hardware address is hardwired in the device,
+which can normally be found in the datasheet.
+
+Example:
+
+   rsb@01f03400 {
+   compatible = "allwinner,sun8i-a23-rsb";
+   reg = <0x01f03400 0x400>;
+   interrupts = <0 39 4>;
+   clocks = <_gates 3>;
+   clock-frequency = <300>;
+   resets = <_rst 3>;
+   #address-cells = <1>;
+   #size-cells = <0>;
+
+   pmic@3e3 {
+   compatible = "...";
+   reg = <0x3e3>;
+
+   /* ... */
+   };
+   };
-- 
2.5.3

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[linux-sunxi] [PATCH v5 0/5] ARM: sunxi: Add Reduced Serial Bus support

[Chen-Yu Tsai]

Hi everyone,

This is my fifth attempt at adding support for Allwinner's Reduced
Serial Bus (RSB), which is used to communicate with PMICs and other
peripherals on their newer SoCs, such as the A23/A33/A80.

RSB is a simplified two wire interface using push-pull outputs,
supporting multiple slaves, address and data parity checks, and
clock speeds up to 20 MHz. The bus only supports simple register
read/writes, with possible register sizes of 8/16/32 bits. Access
sizes not matching the slave device register sizes result in NACKs
or errors. 32 bit registers in devices have yet to be seen.

v4 and later adds a platform driver for the RSB controller under
drivers/soc/sunxi, which adds a custom driver type and bus type
for slave drivers to use. Custom regmap support is also merged
into the controller driver. Currently the driver only exports 2
symbols: sunxi_rsb_driver_register() & __devm_regmap_init_sunxi_rsb().


Changes since v4:

  - Add newlines to printk calls missing them.

  - Removed bus type checks (dev->bus != _rsb_bus)

  - Use different lockdep class for each regmap init call, as in
3cfe7a74d42b ("regmap: Use different lockdep class for each regmap
init call")

  - Move enabling RSB controller from ippo-q8h-v5 dts to sun8i-q8-common
dts.


Patch 1 adds the DT bindings for Allwinner RSB controller.

Patch 2 adds the driver itself.

Patch 3 adds the RSB nodes for A23/A33 dtsi.

Patch 4 enables the RSB controller on A23/A33 Q8 format tablets.

Patch 5 enables the RSB controller on Sinlinx SinA33.

Still to come are axp20x driver support for the RSB based AXP223.
The complete series can be found at:

https://github.com/wens/linux/tree/sunxi-rsb-v5

This is now sunxi specific, so if everything works out, it should
all go through Maxime's tree?


Regards,
ChenYu

Chen-Yu Tsai (5):
  soc: sunxi: Add Allwinner Reduced Serial Bus (RSB) controller bindings
  soc: sunxi: Add driver for Allwinner Reduced Serial Bus
  ARM: dts: sun8i: Add Reduced Serial Bus controller device node to
A23/A33 dtsi
  ARM: dts: sun8i: q8-common: Enable RSB controller for A23/A33 Q8
tablets
  ARM: dts: sun8i: sinlinx-sina33: Enable Reduced Serial Bus controller

 .../devicetree/bindings/soc/sunxi/rsb.txt  |  47 ++
 arch/arm/boot/dts/sun8i-a23-a33.dtsi   |  21 +
 arch/arm/boot/dts/sun8i-a33-sinlinx-sina33.dts |   4 +
 arch/arm/boot/dts/sun8i-q8-common.dtsi |   4 +
 drivers/soc/sunxi/Kconfig  |  10 +
 drivers/soc/sunxi/Makefile |   1 +
 drivers/soc/sunxi/sunxi_rsb.c  | 783 +
 include/linux/soc/sunxi/sunxi_rsb.h| 105 +++
 8 files changed, 975 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/soc/sunxi/rsb.txt
 create mode 100644 drivers/soc/sunxi/sunxi_rsb.c
 create mode 100644 include/linux/soc/sunxi/sunxi_rsb.h

-- 
2.5.3

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[linux-sunxi] [PATCH v5 5/5] ARM: dts: sun8i: sinlinx-sina33: Enable Reduced Serial Bus controller

[Chen-Yu Tsai]

The Reduced Serial Bus controller is used to talk to the onboard PMIC.

Signed-off-by: Chen-Yu Tsai <w...@csie.org>
---

Changes since v4:

None

---
 arch/arm/boot/dts/sun8i-a33-sinlinx-sina33.dts | 4 
 1 file changed, 4 insertions(+)

diff --git a/arch/arm/boot/dts/sun8i-a33-sinlinx-sina33.dts 
b/arch/arm/boot/dts/sun8i-a33-sinlinx-sina33.dts
index 1d5390d4e03a..13ce68f06dd6 100644
--- a/arch/arm/boot/dts/sun8i-a33-sinlinx-sina33.dts
+++ b/arch/arm/boot/dts/sun8i-a33-sinlinx-sina33.dts
@@ -130,6 +130,10 @@
};
 };
 
+_rsb {
+   status = "okay";
+};
+
  {
pinctrl-names = "default";
pinctrl-0 = <_pins_b>;
-- 
2.5.3

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Re: [linux-sunxi] [PATCH 1/3] ARM: dts: sun4i: Allow to use the PH6 pin for GPIO on pcDuino1/2

[Chen-Yu Tsai]

On Mon, Oct 5, 2015 at 2:58 AM, Siarhei Siamashka
 wrote:
> The pcDuino1 board does not use any power switches at all for its
> two USB host ports and the VBUS pins are always connected to 5V.
>
> The pcDuino2 board uses the RT9701GB power switch for its single
> USB host port, but the USB_EN pin (PD2) is pulled up with a 10K
> resistor. So that the USB power is still enabled by default even
> if nobody bothers to configure the PD2 pin or runs the pcDuino1
> firmware.

Seems like it would be better if you had a regulator controlled
by PD2. At least can shut down VBUS power when it wants to?

ChenYu

> The current dts file unnecessarily meddles with the PH3 and PH6
> pins. But the PH6 pin is available on the J11 expansion header
> and may have a better use for other purposes. This patch fixes
> the problem and now the PH6 pin can be used with the GPIO sysfs
> interface. Tested on a pcDuino2 board and confirmed the voltage
> on the PH6 pin with a multimeter:
>
> echo 230 > /sys/class/gpio/export
> echo "out" > /sys/class/gpio/gpio230/direction
> echo 0 > /sys/class/gpio/gpio230/value
> echo 1 > /sys/class/gpio/gpio230/value
>
> USB still works as expected too.
>
> Signed-off-by: Siarhei Siamashka 
> ---
>  arch/arm/boot/dts/sun4i-a10-pcduino.dts | 10 --
>  1 file changed, 10 deletions(-)

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[linux-sunxi] Re: [PATCH 1/3] mfd: axp20x: Rename supply names for AXP221 DC1SW and DC5LDO regulators

[Chen-Yu Tsai]

Hi Lee,

On Sun, Sep 20, 2015 at 12:17 PM, Lee Jones <lee.jo...@linaro.org> wrote:
> On Wed, 16 Sep 2015, Chen-Yu Tsai wrote:
>
>> The DC1SW and DC5LDO regulators in the AXP221 are internally chained
>> to DCDC1 and DCDC5, hence the names. The original bindings used the
>> parent regulator names for the supply regulator property. This causes
>> some confusion when we actually use it in the dts:
>>
>>   axp221 {
>>   /* self supplying? */
>>   dcdc1-supply = <>;
>>   dcdc5-supply = <>;
>>
>>   dcdc1: dcdc1 {
>>   ...
>>   };
>>
>>   dcdc5: dcdc5 {
>>   ...
>>   };
>>   };
>>
>> Change them to the downstream regulator names, or "dc1sw" and "dc5ldo"
>> respectively.
>>
>> Signed-off-by: Chen-Yu Tsai <w...@csie.org>
>> ---
>>  Documentation/devicetree/bindings/mfd/axp20x.txt | 4 ++--
>>  1 file changed, 2 insertions(+), 2 deletions(-)
>
> Applied, thanks.

Mark (in his reply) has a point. If these are internally connect, we
should just remove them from the bindings, and associate them in the
driver.

I'm looking into this. In the mean time, could you drop this one?

Thanks
ChenYu

>> diff --git a/Documentation/devicetree/bindings/mfd/axp20x.txt 
>> b/Documentation/devicetree/bindings/mfd/axp20x.txt
>> index 41811223e5be..8e79252b1e7c 100644
>> --- a/Documentation/devicetree/bindings/mfd/axp20x.txt
>> +++ b/Documentation/devicetree/bindings/mfd/axp20x.txt
>> @@ -60,8 +60,8 @@ DCDC2   : DC-DC buck: vin2-supply
>>  DCDC3: DC-DC buck: vin3-supply
>>  DCDC4: DC-DC buck: vin4-supply
>>  DCDC5: DC-DC buck: vin5-supply
>> -DC1SW: On/Off Switch : dcdc1-supply  : DCDC1 
>> secondary output
>> -DC5LDO   : LDO   : dcdc5-supply  : input from 
>> DCDC5
>> +DC1SW: On/Off Switch : dc1sw-supply  : DCDC1 
>> secondary output
>> +DC5LDO   : LDO   : dc5ldo-supply : input from 
>> DCDC5
>>  ALDO1: LDO   : aldoin-supply : shared supply
>>  ALDO2: LDO   : aldoin-supply : shared supply
>>  ALDO3: LDO   : aldoin-supply : shared supply
>
> --
> Lee Jones
> Linaro STMicroelectronics Landing Team Lead
> Linaro.org │ Open source software for ARM SoCs
> Follow Linaro: Facebook | Twitter | Blog

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[linux-sunxi] [PATCH 0/4] ARM: dts: sun8i: Add pwm-backlight device for A23/A33 Q8 format tablets

[Chen-Yu Tsai]

Hi Maxime,

This series adds support for the PWM controlled backlight on the
A23/A33 Q8 tablets. The A23/A33 SoCs have the same PWM controller
as the A20, and the tablets use it to dim the LCD backlight.

The patches are pretty self-explaining.

Hans, could you test this on your TZX 723Q4? It's FEX file uses
a lower PWM frequency.


Regards
ChenYu


Chen-Yu Tsai (4):
  ARM: dts: sun8i: Add PWM controller node for A23/A33
  ARM: dts: sun8i: Add PWM channel 0 pinmux setting for A23/A33
  ARM: dts: sun8i: Enable PWM controller on A23/A33 Q8 format tablets
  ARM: dts: sun8i: Add pwm-backlight device for A23/A33 Q8 format
tablets

 arch/arm/boot/dts/sun8i-a23-a33.dtsi   | 15 +++
 arch/arm/boot/dts/sun8i-q8-common.dtsi | 26 ++
 2 files changed, 41 insertions(+)

-- 
2.5.1

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[linux-sunxi] [PATCH 2/4] ARM: dts: sun8i: Add PWM channel 0 pinmux setting for A23/A33

[Chen-Yu Tsai]

The PWM controller has 2 outputs, with one usable pin for each.

Add a pinmux setting for the first channel. This is often used
for backlight dimming on tablets.

Signed-off-by: Chen-Yu Tsai <w...@csie.org>
---
 arch/arm/boot/dts/sun8i-a23-a33.dtsi | 7 +++
 1 file changed, 7 insertions(+)

diff --git a/arch/arm/boot/dts/sun8i-a23-a33.dtsi 
b/arch/arm/boot/dts/sun8i-a23-a33.dtsi
index e7054304018a..8f4db82084c5 100644
--- a/arch/arm/boot/dts/sun8i-a23-a33.dtsi
+++ b/arch/arm/boot/dts/sun8i-a23-a33.dtsi
@@ -412,6 +412,13 @@
allwinner,pull = ;
};
 
+   pwm0_pins: pwm0 {
+   allwinner,pins = "PH0";
+   allwinner,function = "pwm0";
+   allwinner,drive = ;
+   allwinner,pull = ;
+   };
+
i2c0_pins_a: i2c0@0 {
allwinner,pins = "PH2", "PH3";
allwinner,function = "i2c0";
-- 
2.5.1

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[linux-sunxi] [PATCH 4/4] ARM: dts: sun8i: Add pwm-backlight device for A23/A33 Q8 format tablets

[Chen-Yu Tsai]

The LCD backlight on the A23/A33 Q8 format tablets is enabled
with a GPIO controlled regulator, and brightness controlled with
the SoC's PWM controller.

The backlight is powered from the AXP223 PMIC's DC1SW output,
which is not supported yet. A proper bootloader is required
to enable it.

The brightness levels are arbitrary. The FEX files do not have
such information. As such, actual brightness levels may differ
from device to device.

Signed-off-by: Chen-Yu Tsai <w...@csie.org>
---
 arch/arm/boot/dts/sun8i-q8-common.dtsi | 20 
 1 file changed, 20 insertions(+)

diff --git a/arch/arm/boot/dts/sun8i-q8-common.dtsi 
b/arch/arm/boot/dts/sun8i-q8-common.dtsi
index 4c2d0b459d6f..8a56ff567911 100644
--- a/arch/arm/boot/dts/sun8i-q8-common.dtsi
+++ b/arch/arm/boot/dts/sun8i-q8-common.dtsi
@@ -41,11 +41,24 @@
  */
 #include "sunxi-q8-common.dtsi"
 
+#include 
+
 / {
aliases {
serial0 = _uart;
};
 
+   backlight: backlight {
+   compatible = "pwm-backlight";
+   pinctrl-names = "default";
+   pinctrl-0 = <_en_pin_q8>;
+   pwms = < 0 5 PWM_POLARITY_INVERTED>;
+   brightness-levels = <0 10 20 30 40 50 60 70 80 90 100>;
+   default-brightness-level = <8>;
+   enable-gpios = < 7 6 GPIO_ACTIVE_HIGH>; /* PH6 */
+   /* backlight is powered by AXP223 DC1SW */
+   };
+
chosen {
stdout-path = "serial0:115200n8";
};
@@ -62,6 +75,13 @@
 };
 
  {
+   bl_en_pin_q8: bl_en_pin@0 {
+   allwinner,pins = "PH6";
+   allwinner,function = "gpio_in";
+   allwinner,drive = ;
+   allwinner,pull = ;
+   };
+
mmc0_cd_pin_q8: mmc0_cd_pin@0 {
allwinner,pins = "PB4";
allwinner,function = "gpio_in";
-- 
2.5.1

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[linux-sunxi] [PATCH 1/4] ARM: dts: sun8i: Add PWM controller node for A23/A33

[Chen-Yu Tsai]

A23/A33 have a PWM controller that is compatible to the one on the A20.
Add a device node for it.

Signed-off-by: Chen-Yu Tsai <w...@csie.org>
---
 arch/arm/boot/dts/sun8i-a23-a33.dtsi | 8 
 1 file changed, 8 insertions(+)

diff --git a/arch/arm/boot/dts/sun8i-a23-a33.dtsi 
b/arch/arm/boot/dts/sun8i-a23-a33.dtsi
index 27a925ec17d2..e7054304018a 100644
--- a/arch/arm/boot/dts/sun8i-a23-a33.dtsi
+++ b/arch/arm/boot/dts/sun8i-a23-a33.dtsi
@@ -466,6 +466,14 @@
interrupts = ;
};
 
+   pwm: pwm@01c21400 {
+   compatible = "allwinner,sun7i-a20-pwm";
+   reg = <0x01c21400 0xc>;
+   clocks = <>;
+   #pwm-cells = <3>;
+   status = "disabled";
+   };
+
lradc: lradc@01c22800 {
compatible = "allwinner,sun4i-a10-lradc-keys";
reg = <0x01c22800 0x100>;
-- 
2.5.1

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[linux-sunxi] [PATCH 3/4] ARM: dts: sun8i: Enable PWM controller on A23/A33 Q8 format tablets

[Chen-Yu Tsai]

A23/A33 based Q8 format tablets use channel 0 of the PWM controller for
backlight dimming.

Signed-off-by: Chen-Yu Tsai <w...@csie.org>
---
 arch/arm/boot/dts/sun8i-q8-common.dtsi | 6 ++
 1 file changed, 6 insertions(+)

diff --git a/arch/arm/boot/dts/sun8i-q8-common.dtsi 
b/arch/arm/boot/dts/sun8i-q8-common.dtsi
index 6f8a8bb4e9bb..4c2d0b459d6f 100644
--- a/arch/arm/boot/dts/sun8i-q8-common.dtsi
+++ b/arch/arm/boot/dts/sun8i-q8-common.dtsi
@@ -70,6 +70,12 @@
};
 };
 
+ {
+   pinctrl-names = "default";
+   pinctrl-0 = <_pins>;
+   status = "okay";
+};
+
 _uart {
pinctrl-names = "default";
pinctrl-0 = <_uart_pins_a>;
-- 
2.5.1

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[linux-sunxi] Re: [PATCH 2/5] ARM: sun5i: Add R8 DTSI

[Chen-Yu Tsai]

Hi,

On Fri, Sep 18, 2015 at 4:48 PM, Maxime Ripard
<maxime.rip...@free-electrons.com> wrote:
> The R8 is very close to the A13, but it still has a few differences,
> notably a composite output, which the A13 lacks.
>
> Add a DTSI based on the A13's to hold those differences.
>
> Signed-off-by: Maxime Ripard <maxime.rip...@free-electrons.com>
> ---
>  arch/arm/boot/dts/sun5i-r8.dtsi | 61 
> +
>  1 file changed, 61 insertions(+)
>  create mode 100644 arch/arm/boot/dts/sun5i-r8.dtsi
>
> diff --git a/arch/arm/boot/dts/sun5i-r8.dtsi b/arch/arm/boot/dts/sun5i-r8.dtsi
> new file mode 100644
> index ..c9ed854687ca
> --- /dev/null
> +++ b/arch/arm/boot/dts/sun5i-r8.dtsi
> @@ -0,0 +1,61 @@
> +/*
> + * Copyright 2015 Free Electrons
> + * Copyright 2015 NextThing Co
> + *
> + * Maxime Ripard <maxime.rip...@free-electrons.com>
> + *
> + * This file is dual-licensed: you can use it either under the terms
> + * of the GPL or the X11 license, at your option. Note that this dual
> + * licensing only applies to this file, and not this project as a
> + * whole.
> + *
> + *  a) This file is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License as
> + * published by the Free Software Foundation; either version 2 of the
> + * License, or (at your option) any later version.
> + *
> + * This file is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> + * GNU General Public License for more details.
> + *
> + * Or, alternatively,
> + *
> + *  b) Permission is hereby granted, free of charge, to any person
> + * obtaining a copy of this software and associated documentation
> + * files (the "Software"), to deal in the Software without
> + * restriction, including without limitation the rights to use,
> + * copy, modify, merge, publish, distribute, sublicense, and/or
> + * sell copies of the Software, and to permit persons to whom the
> + * Software is furnished to do so, subject to the following
> + * conditions:
> + *
> + * The above copyright notice and this permission notice shall be
> + * included in all copies or substantial portions of the Software.
> + *
> + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
> + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
> + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
> + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
> + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
> + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
> + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
> + * OTHER DEALINGS IN THE SOFTWARE.
> + */
> +
> +#include "skeleton.dtsi"

This is already included by sun5i.dtsi, which is included by sun5i-a13.dtsi.

> +
> +#include "sun5i-a13.dtsi"
> +
> +/ {
> +   chosen {
> +   framebuffer@1 {
> +   compatible = "allwinner,simple-framebuffer",
> +"simple-framebuffer";
> +   allwinner,pipeline = "de_be0-lcd0-tve0";
> +   clocks = < 1>, <_gates 34>, <_gates 36>,
> +<_gates 44>;
> +   status = "disabled";
> +   };
> +   };
> +};
> --
> 2.5.1
>

The rest looks good.

Reviewed-by: Chen-Yu Tsai <w...@csie.org>

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[linux-sunxi] Re: [PATCH 1/5] ARM: sunxi: Add R8 support

[Chen-Yu Tsai]

On Fri, Sep 18, 2015 at 4:48 PM, Maxime Ripard
 wrote:
> The R8 is a new Allwinner SoC based on the A13. While both are very
> similar, there's still a few differences. Introduce a new compatible to
> deal with them.
>
> Signed-off-by: Maxime Ripard 
> ---
>  arch/arm/mach-sunxi/sunxi.c   | 3 ++-
>  drivers/clk/sunxi/clk-sunxi.c | 1 +
>  2 files changed, 3 insertions(+), 1 deletion(-)
>
> diff --git a/arch/arm/mach-sunxi/sunxi.c b/arch/arm/mach-sunxi/sunxi.c
> index 65bab2876343..8583a9ca86bd 100644
> --- a/arch/arm/mach-sunxi/sunxi.c
> +++ b/arch/arm/mach-sunxi/sunxi.c
> @@ -26,10 +26,11 @@ static const char * const sunxi_board_dt_compat[] = {
> "allwinner,sun4i-a10",
> "allwinner,sun5i-a10s",
> "allwinner,sun5i-a13",
> +   "allwinner,sun5i-r8",
> NULL,
>  };
>
> -DT_MACHINE_START(SUNXI_DT, "Allwinner A1X (Device Tree)")
> +DT_MACHINE_START(SUNXI_DT, "Allwinner sun4i/sun5i Families")

Nit: might want to mention the rename.

> .dt_compat  = sunxi_board_dt_compat,
> .init_late  = sunxi_dt_cpufreq_init,
>  MACHINE_END
> diff --git a/drivers/clk/sunxi/clk-sunxi.c b/drivers/clk/sunxi/clk-sunxi.c
> index 413070d07b3f..9c79af0c03b2 100644
> --- a/drivers/clk/sunxi/clk-sunxi.c
> +++ b/drivers/clk/sunxi/clk-sunxi.c
> @@ -1196,6 +1196,7 @@ static void __init sun5i_init_clocks(struct device_node 
> *node)
>  }
>  CLK_OF_DECLARE(sun5i_a10s_clk_init, "allwinner,sun5i-a10s", 
> sun5i_init_clocks);
>  CLK_OF_DECLARE(sun5i_a13_clk_init, "allwinner,sun5i-a13", sun5i_init_clocks);
> +CLK_OF_DECLARE(sun5i_r8_clk_init, "allwinner,sun5i-r8", sun5i_init_clocks);
>  CLK_OF_DECLARE(sun7i_a20_clk_init, "allwinner,sun7i-a20", sun5i_init_clocks);
>
>  static const char *sun6i_critical_clocks[] __initdata = {
> --
> 2.5.1
>

What about Documentation/devicetree/bindings/arm/sunxi.txt and
Documentation/arm/sunxi/README?


Thanks
ChenYu

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[linux-sunxi] Re: [PATCH 5/6] ARM: dts: sun6i: Add support for Sinlinx A31s SDK board

[Chen-Yu Tsai]

On Wed, Sep 16, 2015 at 2:20 PM, Maxime Ripard
<maxime.rip...@free-electrons.com> wrote:
> On Mon, Sep 14, 2015 at 03:24:47PM +0800, Chen-Yu Tsai wrote:
>> On Fri, Aug 28, 2015 at 8:34 PM, Maxime Ripard
>> <maxime.rip...@free-electrons.com> wrote:
>> > On Fri, Aug 28, 2015 at 05:54:38PM +0800, Chen-Yu Tsai wrote:
>> >> The Sinlinx A31s SDK is a A31s based module/baseboard development kit.
>> >>
>> >> The core module has the SoC, PMIC, DRAM, eMMC and supporting components.
>> >> There are also pads for UART0, JTAG and I2S.
>> >
>> > Can you use that core module without that baseboard?
>>
>> You could just solder 5v, gnd, and uart, and it should work.
>> Not that I actually tried it.
>>
>> >> The baseboard has 100 Mbps Ethernet, 5x USB 2.0 host ports via a USB 2.0
>> >> hub chip, MMC, HDMI, SPDIF, CIR, audio jacks, 2 tablet-like volume
>> >> buttons, RS232 style UART and USB OTG (though VBUS is not connected).
>> >> Various headers are available for other addon modules, such as SDIO
>> >> WiFi, LCD display, camera sensor, UARTs, I2C, SPI and GPIOs.
>> >
>> > Can the baseboard be used with our core modules?
>>
>> Doubtful. The baseboard is more like a demonstration platform for the
>> core board.
>>
>> What do you suggest?
>
> Nothing then, I was just trying to understand the possible
> combinations, but it looks like there's none :)

OK then. I'll fix up the gpu regulator stuff, and resend the series sans
the primo81 patch after the axp221 supply renaming patches are merged.

The primo81 LCD and backlight need some more work. No PWM and SSD2825
MIPI bridge support in the kernel yet.


Regards,
ChenYu

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[linux-sunxi] Re: [PATCH 5/5] ARM: dts: sun5i: Add backlight node to sun5i-q8-common.dtsi

[Chen-Yu Tsai]

On Sun, Sep 20, 2015 at 8:30 PM, Hans de Goede  wrote:
> All A13 based q8 formfactor tablets use the same backlight setup, add
> a backlight devicetree node for controlling the backlight on these devices.
>
> Signed-off-by: Hans de Goede 
> ---
>  arch/arm/boot/dts/sun5i-q8-common.dtsi | 11 +++
>  1 file changed, 11 insertions(+)
>
> diff --git a/arch/arm/boot/dts/sun5i-q8-common.dtsi 
> b/arch/arm/boot/dts/sun5i-q8-common.dtsi
> index 0641d68..76a5204 100644
> --- a/arch/arm/boot/dts/sun5i-q8-common.dtsi
> +++ b/arch/arm/boot/dts/sun5i-q8-common.dtsi
> @@ -41,11 +41,22 @@
>   */
>  #include "sunxi-q8-common.dtsi"
>
> +#include 
> +
>  / {
> aliases {
> serial0 = 
> };
>
> +   backlight: backlight {
> +   compatible = "pwm-backlight";
> +   pwms = < 0 5 PWM_POLARITY_INVERTED>;
> +   brightness-levels = <0 10 20 30 40 50 60 70 80 90 100>;
> +   default-brightness-level = <8>;
> +   /* TODO: backlight uses axp gpio1 as enable pin */
> +   /* TODO: backlight is powered by AXP209 DCDC1SW */

There's no DCDC1SW on AXP209. The reference design shows the backlight
regulator is powered directly from IPSOUT, but the PWM pullup is powered
by LCD-VCC, which itself is enabled by AXP209 GPIO0.

Would that be the case, or maybe closer, given we don't have schematics?


Regards
ChenYu

> +   };
> +
> chosen {
> stdout-path = "serial0:115200n8";
> };
> --
> 2.4.3
>

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[linux-sunxi] [PATCH v4 1/5] soc: sunxi: Add Allwinner Reduced Serial Bus (RSB) controller bindings

[Chen-Yu Tsai]

Reduced Serial Bus is a proprietary 2-line push-pull serial bus supporting
multiple slave devices. It was developed by Allwinner, Inc. and used by
Allwinner and X-Powers, Inc. for their line of PMICs and other peripheral
ICs.

Recent Allwinner SoCs, starting with the A23, have an RSB controller. This
is used to talk to the PMIC, and later with the A80 and A83 platform, the
audio codec IC.

Signed-off-by: Chen-Yu Tsai <w...@csie.org>
---

Changes since v3:

  - Merged common RSB bindings and Allwinner RSB controller bindings
  - Moved to soc/sunxi/rsb.txt
  - Removed runtime address from bindings
  - #address-cells changed to 1
  - Default to 3 MHz if bus clock speed is not specified

---
 .../devicetree/bindings/soc/sunxi/rsb.txt  | 47 ++
 1 file changed, 47 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/soc/sunxi/rsb.txt

diff --git a/Documentation/devicetree/bindings/soc/sunxi/rsb.txt 
b/Documentation/devicetree/bindings/soc/sunxi/rsb.txt
new file mode 100644
index ..3dd28343b6ce
--- /dev/null
+++ b/Documentation/devicetree/bindings/soc/sunxi/rsb.txt
@@ -0,0 +1,47 @@
+Allwinner Reduced Serial Bus (RSB) controller
+
+The RSB controller found on later Allwinner SoCs is an SMBus like 2 wire
+serial bus with 1 master and up to 15 slaves. It is represented by a node
+for the controller itself, and child nodes representing the slave devices.
+
+Required properties :
+
+ - reg : Offset and length of the register set for the controller.
+ - compatible  : Shall be "allwinner,sun8i-a23-rsb".
+ - interrupts  : The interrupt line associated to the RSB controller.
+ - clocks  : The gate clk associated to the RSB controller.
+ - resets  : The reset line associated to the RSB controller.
+ - #address-cells  : shall be 1
+ - #size-cells : shall be 0
+
+Optional properties :
+
+ - clock-frequency : Desired RSB bus clock frequency in Hz. Maximum is 20MHz.
+If not set this defaults to 3MHz.
+
+Child nodes:
+
+An RSB controller node can contain zero or more child nodes representing
+slave devices on the bus.  Child 'reg' properties should contain the slave
+device's hardware address. The hardware address is hardwired in the device,
+which can normally be found in the datasheet.
+
+Example:
+
+   rsb@01f03400 {
+   compatible = "allwinner,sun8i-a23-rsb";
+   reg = <0x01f03400 0x400>;
+   interrupts = <0 39 4>;
+   clocks = <_gates 3>;
+   clock-frequency = <300>;
+   resets = <_rst 3>;
+   #address-cells = <1>;
+   #size-cells = <0>;
+
+   pmic@3e3 {
+   compatible = "...";
+   reg = <0x3e3>;
+
+   /* ... */
+   };
+   };
-- 
2.5.3

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[linux-sunxi] [PATCH v4 3/5] ARM: dts: sun8i: Add Reduced Serial Bus controller device node to A23/A33 dtsi

[Chen-Yu Tsai]

This patch adds a device node for the Reduced Serial Bus (RSB)
controller and the defacto pinmux setting to the A23/A33 dtsi.

Since there is only one possible pinmux setting for RSB, just
set it in the dtsi.

Signed-off-by: Chen-Yu Tsai <w...@csie.org>
---

Changes since v3:

  - Changed #address-cells to 1

---
 arch/arm/boot/dts/sun8i-a23-a33.dtsi | 21 +
 1 file changed, 21 insertions(+)

diff --git a/arch/arm/boot/dts/sun8i-a23-a33.dtsi 
b/arch/arm/boot/dts/sun8i-a23-a33.dtsi
index 04bccad977ee..828aaf52c342 100644
--- a/arch/arm/boot/dts/sun8i-a23-a33.dtsi
+++ b/arch/arm/boot/dts/sun8i-a23-a33.dtsi
@@ -651,6 +651,13 @@
#size-cells = <0>;
#gpio-cells = <3>;
 
+   r_rsb_pins: r_rsb {
+   allwinner,pins = "PL0", "PL1";
+   allwinner,function = "s_rsb";
+   allwinner,drive = ;
+   allwinner,pull = ;
+   };
+
r_uart_pins_a: r_uart@0 {
allwinner,pins = "PL2", "PL3";
allwinner,function = "s_uart";
@@ -658,5 +665,19 @@
allwinner,pull = ;
};
};
+
+   r_rsb: rsb@01f03400 {
+   compatible = "allwinner,sun8i-a23-rsb";
+   reg = <0x01f03400 0x400>;
+   interrupts = ;
+   clocks = <_gates 3>;
+   clock-frequency = <300>;
+   resets = <_rst 3>;
+   pinctrl-names = "default";
+   pinctrl-0 = <_rsb_pins>;
+   status = "disabled";
+   #address-cells = <1>;
+   #size-cells = <0>;
+   };
};
 };
-- 
2.5.3

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[linux-sunxi] [PATCH v4 0/5] ARM: sunxi: Add Reduced Serial Bus support

[Chen-Yu Tsai]

Hi everyone,

This is my fourth attempt at adding support for Allwinner's Reduced
Serial Bus (RSB), which is used to communicate with PMICs and other
peripherals on their newer SoCs, such as the A23/A33/A80.

RSB is a simplified two wire interface using push-pull outputs,
supporting multiple slaves, address and data parity checks, and
clock speeds up to 20 MHz. The bus only supports simple register
read/writes, with possible register sizes of 8/16/32 bits. Access
sizes not matching the slave device register sizes result in NACKs
or errors. 32 bit registers in devices have yet to be seen.

Previous attempts to add support through the I2C subsystem have
been rejected, as the bus line protocol is too different to even
consider. The latest attempt to add a common bus driver was also
rejected as this is sunxi only.

This version adds a platform driver for the RSB controller under
drivers/soc/sunxi, which adds a custom driver type and bus type
for slave drivers to use. Custom regmap support is also merged
into the controller driver. Currently the driver only exports 2
symbols: sunxi_rsb_driver_register() & devm_regmap_init_sunxi_rsb().

Patch 1 adds the DT bindings for Allwinner RSB controller.

Patch 2 adds the driver itself.

Patch 3 adds the RSB nodes for A23/A33 dtsi.

Patch 5 & 5 enable the RSB controller on the boards I have.

Still to come are axp20x driver support for the RSB based AXP223.
The complete series can be found at:

https://github.com/wens/linux/tree/sunxi-rsb-v4

This is now sunxi specific, so if everything works out, it should
all go through Maxime's tree?


Regards,
ChenYu

Chen-Yu Tsai (5):
  soc: sunxi: Add Allwinner Reduced Serial Bus (RSB) controller bindings
  soc: sunxi: Add driver for Allwinner Reduced Serial Bus
  ARM: dts: sun8i: Add Reduced Serial Bus controller device node to
A23/A33 dtsi
  ARM: dts: sun8i: ippo-q8h-v5: Enable Reduced Serial Bus controller
  ARM: dts: sun8i: sinlinx-sina33: Enable Reduced Serial Bus controller

 .../devicetree/bindings/soc/sunxi/rsb.txt  |  47 ++
 arch/arm/boot/dts/sun8i-a23-a33.dtsi   |  21 +
 arch/arm/boot/dts/sun8i-a23-ippo-q8h-v5.dts|   4 +
 arch/arm/boot/dts/sun8i-a33-sinlinx-sina33.dts |   4 +
 drivers/soc/sunxi/Kconfig  |  10 +
 drivers/soc/sunxi/Makefile |   1 +
 drivers/soc/sunxi/sunxi_rsb.c  | 786 +
 include/linux/soc/sunxi/sunxi_rsb.h|  89 +++
 8 files changed, 962 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/soc/sunxi/rsb.txt
 create mode 100644 drivers/soc/sunxi/sunxi_rsb.c
 create mode 100644 include/linux/soc/sunxi/sunxi_rsb.h

-- 
2.5.3

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[linux-sunxi] [PATCH v4 4/5] ARM: dts: sun8i: ippo-q8h-v5: Enable Reduced Serial Bus controller

[Chen-Yu Tsai]

The Reduced Serial Bus controller is used to talk to the onboard PMIC.

Signed-off-by: Chen-Yu Tsai <w...@csie.org>
---

Changes since v3:

None

---
 arch/arm/boot/dts/sun8i-a23-ippo-q8h-v5.dts | 4 
 1 file changed, 4 insertions(+)

diff --git a/arch/arm/boot/dts/sun8i-a23-ippo-q8h-v5.dts 
b/arch/arm/boot/dts/sun8i-a23-ippo-q8h-v5.dts
index 4f47fd654eea..af87e4922e44 100644
--- a/arch/arm/boot/dts/sun8i-a23-ippo-q8h-v5.dts
+++ b/arch/arm/boot/dts/sun8i-a23-ippo-q8h-v5.dts
@@ -58,6 +58,10 @@
status = "failed";
 };
 
+_rsb {
+   status = "okay";
+};
+
 /*
  * FIXME for now we only support host mode and rely on u-boot to have
  * turned on Vbus which is controlled by the axp223 pmic on the board.
-- 
2.5.3

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[linux-sunxi] [PATCH v4 5/5] ARM: dts: sun8i: sinlinx-sina33: Enable Reduced Serial Bus controller

[Chen-Yu Tsai]

The Reduced Serial Bus controller is used to talk to the onboard PMIC.

Signed-off-by: Chen-Yu Tsai <w...@csie.org>
---

Changes since v3:

None

---
 arch/arm/boot/dts/sun8i-a33-sinlinx-sina33.dts | 4 
 1 file changed, 4 insertions(+)

diff --git a/arch/arm/boot/dts/sun8i-a33-sinlinx-sina33.dts 
b/arch/arm/boot/dts/sun8i-a33-sinlinx-sina33.dts
index 1d5390d4e03a..13ce68f06dd6 100644
--- a/arch/arm/boot/dts/sun8i-a33-sinlinx-sina33.dts
+++ b/arch/arm/boot/dts/sun8i-a33-sinlinx-sina33.dts
@@ -130,6 +130,10 @@
};
 };
 
+_rsb {
+   status = "okay";
+};
+
  {
pinctrl-names = "default";
pinctrl-0 = <_pins_b>;
-- 
2.5.3

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[linux-sunxi] [PATCH v4 2/5] soc: sunxi: Add driver for Allwinner Reduced Serial Bus

[Chen-Yu Tsai]

Reduced Serial Bus (RSB) is an Allwinner proprietery interface
used to communicate with PMICs and other peripheral ICs.

RSB is a two-wire push-pull serial bus that supports 1 master
device and up to 15 active slave devices.

Signed-off-by: Chen-Yu Tsai <w...@csie.org>
---

Changes since v3:

  - Merged common bus regmap and controller functions into a single driver
  - Moved to drivers/soc/sunxi/
  - Allocate and map runtime address statically.

---
 drivers/soc/sunxi/Kconfig   |  10 +
 drivers/soc/sunxi/Makefile  |   1 +
 drivers/soc/sunxi/sunxi_rsb.c   | 786 
 include/linux/soc/sunxi/sunxi_rsb.h |  89 
 4 files changed, 886 insertions(+)
 create mode 100644 drivers/soc/sunxi/sunxi_rsb.c
 create mode 100644 include/linux/soc/sunxi/sunxi_rsb.h

diff --git a/drivers/soc/sunxi/Kconfig b/drivers/soc/sunxi/Kconfig
index 353b07e40176..84f437f2ea0a 100644
--- a/drivers/soc/sunxi/Kconfig
+++ b/drivers/soc/sunxi/Kconfig
@@ -1,6 +1,16 @@
 #
 # Allwinner sunXi SoC drivers
 #
+config SUNXI_RSB
+   bool
+   default MACH_SUN8I || MACH_SUN9I
+   select REGMAP
+   help
+ Say y here to enable Reduced Serial Bus (RSB) support. This
+ controller is responsible for communicating with various RSB
+ based devices, such as AXP223, AXP8XX PMICs, and AC100/AC200
+ ICs.
+
 config SUNXI_SRAM
bool
default ARCH_SUNXI
diff --git a/drivers/soc/sunxi/Makefile b/drivers/soc/sunxi/Makefile
index 4cf9dbdf346e..1a4c16016931 100644
--- a/drivers/soc/sunxi/Makefile
+++ b/drivers/soc/sunxi/Makefile
@@ -1 +1,2 @@
+obj-$(CONFIG_SUNXI_RSB) += sunxi_rsb.o
 obj-$(CONFIG_SUNXI_SRAM) +=sunxi_sram.o
diff --git a/drivers/soc/sunxi/sunxi_rsb.c b/drivers/soc/sunxi/sunxi_rsb.c
new file mode 100644
index ..d142a796961a
--- /dev/null
+++ b/drivers/soc/sunxi/sunxi_rsb.c
@@ -0,0 +1,786 @@
+/*
+ * RSB (Reduced Serial Bus) driver.
+ *
+ * Author: Chen-Yu Tsai <w...@csie.org>
+ *
+ * This file is licensed under the terms of the GNU General Public License
+ * version 2.  This program is licensed "as is" without any warranty of any
+ * kind, whether express or implied.
+ *
+ * The RSB controller looks like an SMBus controller which only supports
+ * byte and word data transfers. But, it differs from standard SMBus
+ * protocol on several aspects:
+ * - it uses addresses set at runtime to address slaves. Runtime addresses
+ *   are sent to slaves using their 12bit hardware addresses. Up to 15
+ *   runtime addresses are available.
+ * - it adds a parity bit every 8bits of data and address for read and
+ *   write accesses; this replaces the ack bit
+ * - only one read access is required to read a byte (instead of a write
+ *   followed by a read access in standard SMBus protocol)
+ * - there's no Ack bit after each read access
+ *
+ * This means this bus cannot be used to interface with standard SMBus
+ * devices. Devices known to support this interface include the AXP223,
+ * AXP809, and AXP806 PMICs, and the AC100 audio codec, all from X-Powers.
+ *
+ * A description of the operation and wire protocol can be found in the
+ * RSB section of Allwinner's A80 user manual, which can be found at
+ *
+ * https://github.com/allwinner-zh/documents/tree/master/A80
+ *
+ * This document is officially released by Allwinner.
+ *
+ * This driver is based on i2c-sun6i-p2wi.c, the P2WI bus driver.
+ *
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+/* RSB registers */
+#define RSB_CTRL   0x0 /* Global control */
+#define RSB_CCR0x4 /* Clock control */
+#define RSB_INTE   0x8 /* Interrupt controls */
+#define RSB_INTS   0xc /* Interrupt status */
+#define RSB_ADDR   0x10/* Address to send with read/write command */
+#define RSB_DATA   0x1c/* Data to read/write */
+#define RSB_LCR0x24/* Line control */
+#define RSB_DMCR   0x28/* Device mode (init) control */
+#define RSB_CMD0x2c/* RSB Command */
+#define RSB_DAR0x30/* Device address / runtime address */
+
+/* CTRL fields */
+#define RSB_CTRL_START_TRANS   BIT(7)
+#define RSB_CTRL_ABORT_TRANS   BIT(6)
+#define RSB_CTRL_GLOBAL_INT_ENBBIT(1)
+#define RSB_CTRL_SOFT_RST  BIT(0)
+
+/* CLK CTRL fields */
+#define RSB_CCR_SDA_OUT_DELAY(v)   (((v) & 0x7) << 8)
+#define RSB_CCR_MAX_CLK_DIV0xff
+#define RSB_CCR_CLK_DIV(v) ((v) & RSB_CCR_MAX_CLK_DIV)
+
+/* STATUS fields */
+#define RSB_INTS_TRANS_ERR_ACK BIT(16)
+#define RSB_INTS_TRANS_ERR_DATA_BIT(v) (((v) >> 8) & 0xf)
+#define RSB_INTS_TRANS_ERR_DATAGENMASK(11, 8)
+#define RSB_INTS_LOAD_BSY  BIT(2)
+#define 

Re: [linux-sunxi] Re: [PATCH v4 2/5] soc: sunxi: Add driver for Allwinner Reduced Serial Bus

[Chen-Yu Tsai]

On Thu, Sep 24, 2015 at 12:45 AM, Mark Brown <broo...@kernel.org> wrote:
> On Thu, Sep 24, 2015 at 12:05:18AM +0800, Chen-Yu Tsai wrote:
>
>> +static int sunxi_rsb_device_probe(struct device *dev)
>> +{
>> + const struct sunxi_rsb_driver *drv = to_sunxi_rsb_driver(dev->driver);
>> + struct sunxi_rsb_device *rdev = to_sunxi_rsb_device(dev);
>> + int ret;
>> +
>> + if (dev->bus != _rsb_bus)
>> + return 0;
>
> That's a bit worrying...  why might this get called for something other
> than a rsb device?

You're right. sunxi_rsb_bus is self contained (not exported) in sunxi_rsb.c,
so it's safe to assume that the devices going through sunxi_rsb_device_probe()
and sunxi_rsb_device_remove() are indeed sunxi_rsb slave devices.

I'll remove the checks from both functions.

>> +struct regmap *devm_regmap_init_sunxi_rsb(struct sunxi_rsb_device *rdev,
>> +   const struct regmap_config *config);
>
> This should work most of the time but you might want to take a look at
> the changes introduced in 3cfe7a74d42b (regmap: Use different lockdep
> class for each regmap init call) and follow a similar pattern for RSB to
> avoid spurious lockdep warnings in some configurations - see the commit
> log for that change for a full explanation.

This seems easy enough. I'll follow the patterns found in linux/regmap.h.

> Otherwise the regmap bit of this looks good, I'll try to have another
> look through at the rest of the code later.

Thanks!


Regards
ChenYu

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Re: [linux-sunxi][alsa-devel][PATCH 2/3] dt-binding: Add sunxi SPDIF machine driver

[Chen-Yu Tsai]

On Thu, Sep 24, 2015 at 2:04 AM,   wrote:
> From: Marcus Cooper 
>
> Add device tree bindings for the SPDIF machine driver for Allwinner SoC
> devices.

Is there a particular reason for having 2 separate bindings for one piece of
hardware?

Also, both this binding and the driver bits look almost like imx-audio-spdif.
This seems like unneeded duplication. Can we generalize that and use it? Or
just use simple-card?


Regards
ChenYu

> Signed-off-by: Marcus Cooper 
> ---
>  .../bindings/sound/sunxi-audio-spdif.txt   | 36 
> ++
>  1 file changed, 36 insertions(+)
>  create mode 100644 
> Documentation/devicetree/bindings/sound/sunxi-audio-spdif.txt
>
> diff --git a/Documentation/devicetree/bindings/sound/sunxi-audio-spdif.txt 
> b/Documentation/devicetree/bindings/sound/sunxi-audio-spdif.txt
> new file mode 100644
> index 000..b9e8152
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/sound/sunxi-audio-spdif.txt
> @@ -0,0 +1,36 @@
> +Allwinner audio complex with S/PDIF transceiver
> +
> +Required properties:
> +
> +  - compatible : "Allwinner,sunxi-audio-spdif"
> +
> +  - model  : The user-visible name of this sound complex
> +
> +  - spdif-controller   : The phandle of the Allwinner S/PDIF controller
> +
> +
> +Optional properties:
> +
> +  - spdif-out  : This is a boolean property. If present, the
> + transmitting function of S/PDIF will be enabled,
> + indicating there's a physical S/PDIF out connector
> + or jack on the board or it's connecting to some
> + other IP block, such as an HDMI encoder or
> + display-controller.
> +
> +  - spdif-in   : This is a boolean property. If present, the 
> receiving
> + function of S/PDIF will be enabled, indicating there
> + is a physical S/PDIF in connector/jack on the board.
> +
> +* Note: At least one of these two properties should be set in the DT binding.
> +
> +
> +Example:
> +
> +sound-spdif {
> +   compatible = "allwinner,sunxi-audio-spdif";
> +   model = "sunxi-spdif";
> +   spdif-controller = <>;
> +   spdif-out;
> +   spdif-in;
> +};
> --
> 2.5.3
>
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[linux-sunxi] [PATCH] ARM: dts: sun8i-a33: Add security system crypto engine clock and device nodes

[Chen-Yu Tsai]

A33 has the same "Security System" crypto engine as A10/A20, but with a
separate reset control.

Signed-off-by: Chen-Yu Tsai <w...@csie.org>
---
 arch/arm/boot/dts/sun8i-a33.dtsi | 18 ++
 1 file changed, 18 insertions(+)

diff --git a/arch/arm/boot/dts/sun8i-a33.dtsi b/arch/arm/boot/dts/sun8i-a33.dtsi
index 3457edb3bf50..001d8402ca18 100644
--- a/arch/arm/boot/dts/sun8i-a33.dtsi
+++ b/arch/arm/boot/dts/sun8i-a33.dtsi
@@ -99,6 +99,14 @@
"ahb1_sat";
};
 
+   ss_clk: clk@01c2009c {
+   #clock-cells = <0>;
+   compatible = "allwinner,sun4i-a10-mod0-clk";
+   reg = <0x01c2009c 0x4>;
+   clocks = <>, < 0>;
+   clock-output-names = "ss";
+   };
+
mbus_clk: clk@01c2015c {
#clock-cells = <0>;
compatible = "allwinner,sun8i-a23-mbus-clk";
@@ -109,6 +117,16 @@
};
 
soc@01c0 {
+   crypto: crypto-engine@01c15000 {
+   compatible = "allwinner,sun4i-a10-crypto";
+   reg = <0x01c15000 0x1000>;
+   interrupts = ;
+   clocks = <_gates 5>, <_clk>;
+   clock-names = "ahb", "mod";
+   resets = <_rst 5>;
+   reset-names = "ahb";
+   };
+
usb_otg: usb@01c19000 {
compatible = "allwinner,sun8i-a33-musb";
reg = <0x01c19000 0x0400>;
-- 
2.5.3

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[linux-sunxi] Re: [PATCH 1/4] ARM: sunxi: Introduce Allwinner for A83T support

[Chen-Yu Tsai]

On Tue, Sep 22, 2015 at 11:53 PM, Maxime Ripard
<maxime.rip...@free-electrons.com> wrote:
> On Tue, Sep 22, 2015 at 11:47:40PM +0800, Chen-Yu Tsai wrote:
>> On Tue, Sep 22, 2015 at 11:38 PM, Vishnu Patekar
>> <vishnupatekar0...@gmail.com> wrote:
>> > Allwinner A83T is octa-core cortex-a7 based SoC.
>> > It's clock control unit and prcm, pinmux are different from previous sun8i
>> > series.
>> > Its processor cores are arragned in two clusters 4 cores each,
>> > similar to A80.
>> >
>> > Signed-off-by: Vishnu Patekar <vishnupatekar0...@gmail.com>
>> > ---
>> >  Documentation/devicetree/bindings/arm/sunxi.txt | 1 +
>> >  arch/arm/mach-sunxi/sunxi.c | 1 +
>> >  drivers/clk/sunxi/clk-sunxi.c   | 6 ++
>> >  3 files changed, 8 insertions(+)
>> >
>> > diff --git a/Documentation/devicetree/bindings/arm/sunxi.txt 
>> > b/Documentation/devicetree/bindings/arm/sunxi.txt
>> > index 67da205..cf5ed27 100644
>> > --- a/Documentation/devicetree/bindings/arm/sunxi.txt
>> > +++ b/Documentation/devicetree/bindings/arm/sunxi.txt
>> > @@ -11,4 +11,5 @@ using one of the following compatible strings:
>> >allwinner,sun8i-a23
>> >allwinner,sun8i-a33
>> >allwinner,sun8i-h3
>> > +  allwinner,sun8i-a83t
>>
>> Alphabetic order please.
>>
>> >allwinner,sun9i-a80
>> > diff --git a/arch/arm/mach-sunxi/sunxi.c b/arch/arm/mach-sunxi/sunxi.c
>> > index 65bab28..b04aefa 100644
>> > --- a/arch/arm/mach-sunxi/sunxi.c
>> > +++ b/arch/arm/mach-sunxi/sunxi.c
>> > @@ -69,6 +69,7 @@ static const char * const sun8i_board_dt_compat[] = {
>> > "allwinner,sun8i-a23",
>> > "allwinner,sun8i-a33",
>> > "allwinner,sun8i-h3",
>> > +   "allwinner,sun8i-a83t",
>>
>> Same here.
>>
>> > NULL,
>> >  };
>> >
>> > diff --git a/drivers/clk/sunxi/clk-sunxi.c b/drivers/clk/sunxi/clk-sunxi.c
>> > index 413070d..f216d5d 100644
>> > --- a/drivers/clk/sunxi/clk-sunxi.c
>> > +++ b/drivers/clk/sunxi/clk-sunxi.c
>> > @@ -1212,6 +1212,12 @@ CLK_OF_DECLARE(sun6i_a31s_clk_init, 
>> > "allwinner,sun6i-a31s", sun6i_init_clocks);
>> >  CLK_OF_DECLARE(sun8i_a23_clk_init, "allwinner,sun8i-a23", 
>> > sun6i_init_clocks);
>> >  CLK_OF_DECLARE(sun8i_a33_clk_init, "allwinner,sun8i-a33", 
>> > sun6i_init_clocks);
>> >
>> > +static void __init sun8ia83t_init_clocks(struct device_node *node)
>> > +{
>> > +   sunxi_init_clocks(NULL, 0);
>> > +}
>> > +CLK_OF_DECLARE(sun9i_a83t_clk_init, "allwinner,sun8i-a83t", 
>> > sun8ia83t_init_clocks);
>>
>> sun8i? Missing underscore too.
>>
>> I think you should add this once you actually have clock support.
>> Otherwise this call basically does nothing.
>
> That's not true, it actually initializes most of the clocks in the
> system.

Right. Sorry, I think my thoughts strayed to sun9i.

ChenYu

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[linux-sunxi] Re: [PATCH 2/4] pinctrl: sunxi: add allwinner A83T PIO controller support

[Chen-Yu Tsai]

On Tue, Sep 22, 2015 at 11:38 PM, Vishnu Patekar
<vishnupatekar0...@gmail.com> wrote:
> Allwinner A83T soc port controller has 8 ports.
> It has 3 IRQ banks namely PB, PG, PH.
> Pinmuxing are different for some pins as compared to
> sun8i A23 and A33.
>
> Signed-off-by: Vishnu Patekar <vishnupatekar0...@gmail.com>
> ---
>  .../bindings/pinctrl/allwinner,sunxi-pinctrl.txt   |   1 +
>  drivers/pinctrl/sunxi/Kconfig  |   4 +
>  drivers/pinctrl/sunxi/Makefile |   1 +
>  drivers/pinctrl/sunxi/pinctrl-sun8i-a83t.c | 603 
> +
>  4 files changed, 609 insertions(+)
>  create mode 100644 drivers/pinctrl/sunxi/pinctrl-sun8i-a83t.c
>
> diff --git 
> a/Documentation/devicetree/bindings/pinctrl/allwinner,sunxi-pinctrl.txt 
> b/Documentation/devicetree/bindings/pinctrl/allwinner,sunxi-pinctrl.txt
> index 3c821cd..b321b26 100644
> --- a/Documentation/devicetree/bindings/pinctrl/allwinner,sunxi-pinctrl.txt
> +++ b/Documentation/devicetree/bindings/pinctrl/allwinner,sunxi-pinctrl.txt
> @@ -17,6 +17,7 @@ Required properties:
>"allwinner,sun8i-a23-pinctrl"
>"allwinner,sun8i-a23-r-pinctrl"
>"allwinner,sun8i-a33-pinctrl"
> +  "allwinner,sun8i-a83t-pinctrl"
>
>  - reg: Should contain the register physical address and length for the
>pin controller.
> diff --git a/drivers/pinctrl/sunxi/Kconfig b/drivers/pinctrl/sunxi/Kconfig
> index ae27872..e68fd95 100644
> --- a/drivers/pinctrl/sunxi/Kconfig
> +++ b/drivers/pinctrl/sunxi/Kconfig
> @@ -42,6 +42,10 @@ config PINCTRL_SUN8I_A33
> def_bool MACH_SUN8I
> select PINCTRL_SUNXI_COMMON
>
> +config PINCTRL_SUN8I_A83T
> +   def_bool MACH_SUN8I
> +   select PINCTRL_SUNXI_COMMON
> +
>  config PINCTRL_SUN8I_A23_R
> def_bool MACH_SUN8I
> depends on RESET_CONTROLLER
> diff --git a/drivers/pinctrl/sunxi/Makefile b/drivers/pinctrl/sunxi/Makefile
> index 227a121..e080290 100644
> --- a/drivers/pinctrl/sunxi/Makefile
> +++ b/drivers/pinctrl/sunxi/Makefile
> @@ -12,4 +12,5 @@ obj-$(CONFIG_PINCTRL_SUN7I_A20)   += 
> pinctrl-sun7i-a20.o
>  obj-$(CONFIG_PINCTRL_SUN8I_A23)+= pinctrl-sun8i-a23.o
>  obj-$(CONFIG_PINCTRL_SUN8I_A23_R)  += pinctrl-sun8i-a23-r.o
>  obj-$(CONFIG_PINCTRL_SUN8I_A33)+= pinctrl-sun8i-a33.o
> +obj-$(CONFIG_PINCTRL_SUN8I_A83T)   += pinctrl-sun8i-a83t.o
>  obj-$(CONFIG_PINCTRL_SUN9I_A80)+= pinctrl-sun9i-a80.o
> diff --git a/drivers/pinctrl/sunxi/pinctrl-sun8i-a83t.c 
> b/drivers/pinctrl/sunxi/pinctrl-sun8i-a83t.c
> new file mode 100644
> index 000..90b973e
> --- /dev/null
> +++ b/drivers/pinctrl/sunxi/pinctrl-sun8i-a83t.c
> @@ -0,0 +1,603 @@
> +/*
> + * Allwinner a83t SoCs pinctrl driver.

A83T (uppercase)?

> + *
> + * Copyright (C) 2015 Vishnu Patekar <vishnupatekar0...@gmail.com>
> + *
> + * Based on pinctrl-sun8i-a23.c, which is:
> + * Copyright (C) 2014 Chen-Yu Tsai <w...@csie.org>
> + * Copyright (C) 2014 Maxime Ripard <maxime.rip...@free-electrons.com>
> + *
> + * This file is licensed under the terms of the GNU General Public
> + * License version 2.  This program is licensed "as is" without any
> + * warranty of any kind, whether express or implied.
> + */
> +
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +
> +#include "pinctrl-sunxi.h"
> +
> +static const struct sunxi_desc_pin sun8i_a83t_pins[] = {
> +   /* Hole */
> +   SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 0),
> + SUNXI_FUNCTION(0x0, "gpio_in"),
> + SUNXI_FUNCTION(0x1, "gpio_out"),
> + SUNXI_FUNCTION(0x2, "uart2"), /* TX */
> + SUNXI_FUNCTION(0x3, "jtag"),  /* MS0 */
> + SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 0)),  /* PB_EINT0 */
> +   SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 1),
> + SUNXI_FUNCTION(0x0, "gpio_in"),
> + SUNXI_FUNCTION(0x1, "gpio_out"),
> + SUNXI_FUNCTION(0x2, "uart2"), /* RX */
> + SUNXI_FUNCTION(0x3, "jtag"),  /* CK0 */
> + SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 1)),  /* PB_EINT1 */
> +   SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 2),
> + SUNXI_FUNCTION(0x0, "gpio_in"),
> + SUNXI_FUNCTION(0x1, "gpio_out"),
> + SUNXI_FUNCTION(0x2, "uart2"), /* RTS */
> + SUNXI_FUNCTION(0x3, "jtag"),  /* DO0 */
> +

[linux-sunxi] Re: [PATCH 3/4] ARM: dts: sun8i: Add Allwinner A83T dtsi

[Chen-Yu Tsai]

On Tue, Sep 22, 2015 at 11:54 PM, Maxime Ripard
 wrote:
> On Tue, Sep 22, 2015 at 11:38:56PM +0800, Vishnu Patekar wrote:
>> Allwinner A83T is new octa-core cortex-a7 SOC.
>> This adds the basic dtsi, the clocks differs from
>> earlier sun8i SOCs.
>>
>> Signed-off-by: Vishnu Patekar 
>> ---
>>  arch/arm/boot/dts/sun8i-a83t.dtsi | 243 
>> ++
>>  1 file changed, 243 insertions(+)
>>  create mode 100644 arch/arm/boot/dts/sun8i-a83t.dtsi
>>
>> diff --git a/arch/arm/boot/dts/sun8i-a83t.dtsi 
>> b/arch/arm/boot/dts/sun8i-a83t.dtsi
>> new file mode 100644
>> index 000..f6ddd9c
>> --- /dev/null
>> +++ b/arch/arm/boot/dts/sun8i-a83t.dtsi
>> @@ -0,0 +1,243 @@
>> +/*
>> + * Copyright 2015 Vishnu Patekar
>> + *
>> + * Vishnu Patekar 
>> + *
>> + * This file is dual-licensed: you can use it either under the terms
>> + * of the GPL or the X11 license, at your option. Note that this dual
>> + * licensing only applies to this file, and not this project as a
>> + * whole.
>> + *
>> + *  a) This file is free software; you can redistribute it and/or
>> + * modify it under the terms of the GNU General Public License as
>> + * published by the Free Software Foundation; either version 2 of the
>> + * License, or (at your option) any later version.
>> + *
>> + * This file is distributed in the hope that it will be useful,
>> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
>> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
>> + * GNU General Public License for more details.
>> + *
>> + * Or, alternatively,
>> + *
>> + *  b) Permission is hereby granted, free of charge, to any person
>> + * obtaining a copy of this software and associated documentation
>> + * files (the "Software"), to deal in the Software without
>> + * restriction, including without limitation the rights to use,
>> + * copy, modify, merge, publish, distribute, sublicense, and/or
>> + * sell copies of the Software, and to permit persons to whom the
>> + * Software is furnished to do so, subject to the following
>> + * conditions:
>> + *
>> + * The above copyright notice and this permission notice shall be
>> + * included in all copies or substantial portions of the Software.
>> + *
>> + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
>> + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
>> + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
>> + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
>> + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
>> + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
>> + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
>> + * OTHER DEALINGS IN THE SOFTWARE.
>> +
>> + */
>> +
>> +#include "skeleton.dtsi"
>> +
>> +#include 
>> +
>> +#include 
>> +
>> +/ {
>> + interrupt-parent = <>;
>> +
>> + chosen {
>> + #address-cells = <1>;
>> + #size-cells = <1>;
>> + ranges;
>> + };
>> +
>> + cpus {
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> +
>> + cpu@0 {
>> + compatible = "arm,cortex-a7";
>> + device_type = "cpu";
>> + reg = <0>;
>> + };
>> +
>> + cpu@1 {
>> + compatible = "arm,cortex-a7";
>> + device_type = "cpu";
>> + reg = <1>;
>> + };
>> +
>> + cpu@2 {
>> + compatible = "arm,cortex-a7";
>> + device_type = "cpu";
>> + reg = <2>;
>> + };
>> +
>> + cpu@3 {
>> + compatible = "arm,cortex-a7";
>> + device_type = "cpu";
>> + reg = <3>;
>> + };
>> + cpu@4 {
>> + compatible = "arm,cortex-a7";
>> + device_type = "cpu";
>> + reg = <4>;

These don't look right. See Documentation/devicetree/bindings/arm/cpus.txt
Cluster 1 would be 0x100 ~ 0x103.

>> + };
>> +
>> + cpu@5 {
>> + compatible = "arm,cortex-a7";
>> + device_type = "cpu";
>> + reg = <5>;
>> + };
>> + cpu@6 {
>> + compatible = "arm,cortex-a7";
>> + device_type = "cpu";
>> + reg = <6>;
>> + };
>> +
>> + cpu@7 {
>> + compatible = "arm,cortex-a7";
>> + device_type = "cpu";
>> + reg = <7>;
>> + };
>> + };
>> +
>> + memory {
>> + reg = <0x4000 0x8000>;
>> + };

Re: [linux-sunxi] Re: [PATCH 5/5] ARM: sun5i: Add C.H.I.P DTS

[Chen-Yu Tsai]

On Tue, Sep 22, 2015 at 8:47 PM, Maxime Ripard
<maxime.rip...@free-electrons.com> wrote:
> On Sat, Sep 19, 2015 at 12:41:07AM +0800, Chen-Yu Tsai wrote:
>> On Fri, Sep 18, 2015 at 4:48 PM, Maxime Ripard
>> <maxime.rip...@free-electrons.com> wrote:
>> > The C.H.I.P. is a small SBC with an Allwinner R8, 8GB of NAND, 512MB of
>> > RAM, USB host and OTG, a wifi / bluetooth combo chip, an audio/video jack
>> > and two connectors to plug additional boards on top of it.
>> >
>> > Signed-off-by: Maxime Ripard <maxime.rip...@free-electrons.com>
>> > ---
>> >  arch/arm/boot/dts/Makefile  |   3 +-
>> >  arch/arm/boot/dts/sun5i-r8-chip.dts | 261 
>> > 
>> >  2 files changed, 263 insertions(+), 1 deletion(-)
>> >  create mode 100644 arch/arm/boot/dts/sun5i-r8-chip.dts
>> >
>> > diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
>> > index b276174b670a..7efd37b907f1 100644
>> > --- a/arch/arm/boot/dts/Makefile
>> > +++ b/arch/arm/boot/dts/Makefile
>> > @@ -599,7 +599,8 @@ dtb-$(CONFIG_MACH_SUN5I) += \
>> > sun5i-a13-inet-98v-rev2.dtb \
>> > sun5i-a13-olinuxino.dtb \
>> > sun5i-a13-olinuxino-micro.dtb \
>> > -   sun5i-a13-utoo-p66.dtb
>> > +   sun5i-a13-utoo-p66.dtb \
>> > +   sun5i-r8-chip.dtb
>> >  dtb-$(CONFIG_MACH_SUN6I) += \
>> > sun6i-a31-app4-evb1.dtb \
>> > sun6i-a31-colombus.dtb \
>> > diff --git a/arch/arm/boot/dts/sun5i-r8-chip.dts 
>> > b/arch/arm/boot/dts/sun5i-r8-chip.dts
>> > new file mode 100644
>> > index ..6cb3c4f1cd61
>> > --- /dev/null
>> > +++ b/arch/arm/boot/dts/sun5i-r8-chip.dts
>> > @@ -0,0 +1,261 @@
>> > +/*
>> > + * Copyright 2015 Free Electrons
>> > + * Copyright 2015 NextThing Co
>> > + *
>> > + * Maxime Ripard <maxime.rip...@free-electrons.com>
>> > + *
>> > + * This file is dual-licensed: you can use it either under the terms
>> > + * of the GPL or the X11 license, at your option. Note that this dual
>> > + * licensing only applies to this file, and not this project as a
>> > + * whole.
>> > + *
>> > + *  a) This file is free software; you can redistribute it and/or
>> > + * modify it under the terms of the GNU General Public License as
>> > + * published by the Free Software Foundation; either version 2 of the
>> > + * License, or (at your option) any later version.
>> > + *
>> > + * This file is distributed in the hope that it will be useful,
>> > + * but WITHOUT ANY WARRANTY; without even the implied warranty of
>> > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
>> > + * GNU General Public License for more details.
>> > + *
>> > + * Or, alternatively,
>> > + *
>> > + *  b) Permission is hereby granted, free of charge, to any person
>> > + * obtaining a copy of this software and associated documentation
>> > + * files (the "Software"), to deal in the Software without
>> > + * restriction, including without limitation the rights to use,
>> > + * copy, modify, merge, publish, distribute, sublicense, and/or
>> > + * sell copies of the Software, and to permit persons to whom the
>> > + * Software is furnished to do so, subject to the following
>> > + * conditions:
>> > + *
>> > + * The above copyright notice and this permission notice shall be
>> > + * included in all copies or substantial portions of the Software.
>> > + *
>> > + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
>> > + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
>> > + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
>> > + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
>> > + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
>> > + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
>> > + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
>> > + * OTHER DEALINGS IN THE SOFTWARE.
>> > + */
>> > +
>> > +/dts-v1/;
>> > +#include "sun5i-a13.dtsi"
>> > +
>> > +#include 
>> > +#include 
>> > +
>> > +/ {
>> > +   model = "NextThing C.H.I.P.";
>> &

[linux-sunxi] Re: [PATCH 1/4] ARM: sunxi: Introduce Allwinner for A83T support

[Chen-Yu Tsai]

On Tue, Sep 22, 2015 at 11:38 PM, Vishnu Patekar
 wrote:
> Allwinner A83T is octa-core cortex-a7 based SoC.
> It's clock control unit and prcm, pinmux are different from previous sun8i
> series.
> Its processor cores are arragned in two clusters 4 cores each,
> similar to A80.
>
> Signed-off-by: Vishnu Patekar 
> ---
>  Documentation/devicetree/bindings/arm/sunxi.txt | 1 +
>  arch/arm/mach-sunxi/sunxi.c | 1 +
>  drivers/clk/sunxi/clk-sunxi.c   | 6 ++
>  3 files changed, 8 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/arm/sunxi.txt 
> b/Documentation/devicetree/bindings/arm/sunxi.txt
> index 67da205..cf5ed27 100644
> --- a/Documentation/devicetree/bindings/arm/sunxi.txt
> +++ b/Documentation/devicetree/bindings/arm/sunxi.txt
> @@ -11,4 +11,5 @@ using one of the following compatible strings:
>allwinner,sun8i-a23
>allwinner,sun8i-a33
>allwinner,sun8i-h3
> +  allwinner,sun8i-a83t

Alphabetic order please.

>allwinner,sun9i-a80
> diff --git a/arch/arm/mach-sunxi/sunxi.c b/arch/arm/mach-sunxi/sunxi.c
> index 65bab28..b04aefa 100644
> --- a/arch/arm/mach-sunxi/sunxi.c
> +++ b/arch/arm/mach-sunxi/sunxi.c
> @@ -69,6 +69,7 @@ static const char * const sun8i_board_dt_compat[] = {
> "allwinner,sun8i-a23",
> "allwinner,sun8i-a33",
> "allwinner,sun8i-h3",
> +   "allwinner,sun8i-a83t",

Same here.

> NULL,
>  };
>
> diff --git a/drivers/clk/sunxi/clk-sunxi.c b/drivers/clk/sunxi/clk-sunxi.c
> index 413070d..f216d5d 100644
> --- a/drivers/clk/sunxi/clk-sunxi.c
> +++ b/drivers/clk/sunxi/clk-sunxi.c
> @@ -1212,6 +1212,12 @@ CLK_OF_DECLARE(sun6i_a31s_clk_init, 
> "allwinner,sun6i-a31s", sun6i_init_clocks);
>  CLK_OF_DECLARE(sun8i_a23_clk_init, "allwinner,sun8i-a23", sun6i_init_clocks);
>  CLK_OF_DECLARE(sun8i_a33_clk_init, "allwinner,sun8i-a33", sun6i_init_clocks);
>
> +static void __init sun8ia83t_init_clocks(struct device_node *node)
> +{
> +   sunxi_init_clocks(NULL, 0);
> +}
> +CLK_OF_DECLARE(sun9i_a83t_clk_init, "allwinner,sun8i-a83t", 
> sun8ia83t_init_clocks);

sun8i? Missing underscore too.

I think you should add this once you actually have clock support.
Otherwise this call basically does nothing.

> +
>  static void __init sun9i_init_clocks(struct device_node *node)
>  {
> sunxi_init_clocks(NULL, 0);

On the side, I will send patches to remove sun9i_init_clocks.


Regards
ChenYu

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[linux-sunxi] Re: [PATCH 5/5] ARM: sun5i: Add C.H.I.P DTS

[Chen-Yu Tsai]

On Fri, Sep 18, 2015 at 4:48 PM, Maxime Ripard
 wrote:
> The C.H.I.P. is a small SBC with an Allwinner R8, 8GB of NAND, 512MB of
> RAM, USB host and OTG, a wifi / bluetooth combo chip, an audio/video jack
> and two connectors to plug additional boards on top of it.
>
> Signed-off-by: Maxime Ripard 
> ---
>  arch/arm/boot/dts/Makefile  |   3 +-
>  arch/arm/boot/dts/sun5i-r8-chip.dts | 261 
> 
>  2 files changed, 263 insertions(+), 1 deletion(-)
>  create mode 100644 arch/arm/boot/dts/sun5i-r8-chip.dts
>
> diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
> index b276174b670a..7efd37b907f1 100644
> --- a/arch/arm/boot/dts/Makefile
> +++ b/arch/arm/boot/dts/Makefile
> @@ -599,7 +599,8 @@ dtb-$(CONFIG_MACH_SUN5I) += \
> sun5i-a13-inet-98v-rev2.dtb \
> sun5i-a13-olinuxino.dtb \
> sun5i-a13-olinuxino-micro.dtb \
> -   sun5i-a13-utoo-p66.dtb
> +   sun5i-a13-utoo-p66.dtb \
> +   sun5i-r8-chip.dtb
>  dtb-$(CONFIG_MACH_SUN6I) += \
> sun6i-a31-app4-evb1.dtb \
> sun6i-a31-colombus.dtb \
> diff --git a/arch/arm/boot/dts/sun5i-r8-chip.dts 
> b/arch/arm/boot/dts/sun5i-r8-chip.dts
> new file mode 100644
> index ..6cb3c4f1cd61
> --- /dev/null
> +++ b/arch/arm/boot/dts/sun5i-r8-chip.dts
> @@ -0,0 +1,261 @@
> +/*
> + * Copyright 2015 Free Electrons
> + * Copyright 2015 NextThing Co
> + *
> + * Maxime Ripard 
> + *
> + * This file is dual-licensed: you can use it either under the terms
> + * of the GPL or the X11 license, at your option. Note that this dual
> + * licensing only applies to this file, and not this project as a
> + * whole.
> + *
> + *  a) This file is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License as
> + * published by the Free Software Foundation; either version 2 of the
> + * License, or (at your option) any later version.
> + *
> + * This file is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> + * GNU General Public License for more details.
> + *
> + * Or, alternatively,
> + *
> + *  b) Permission is hereby granted, free of charge, to any person
> + * obtaining a copy of this software and associated documentation
> + * files (the "Software"), to deal in the Software without
> + * restriction, including without limitation the rights to use,
> + * copy, modify, merge, publish, distribute, sublicense, and/or
> + * sell copies of the Software, and to permit persons to whom the
> + * Software is furnished to do so, subject to the following
> + * conditions:
> + *
> + * The above copyright notice and this permission notice shall be
> + * included in all copies or substantial portions of the Software.
> + *
> + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
> + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
> + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
> + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
> + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
> + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
> + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
> + * OTHER DEALINGS IN THE SOFTWARE.
> + */
> +
> +/dts-v1/;
> +#include "sun5i-a13.dtsi"
> +
> +#include 
> +#include 
> +
> +/ {
> +   model = "NextThing C.H.I.P.";
> +   compatible = "nextthing,chip", "allwinner,sun5i-r8";
> +
> +   aliases {
> +   i2c0 = 
> +   i2c1 = 
> +   i2c2 = 
> +   serial0 = 
> +   serial1 = 
> +   };
> +
> +   chosen {
> +   stdout-path = "serial0:115200n8";
> +   };
> +
> +   dram_vcc: dram_vcc {
> +   compatible = "regulator-fixed";
> +   regulator-name = "dram-vcc";
> +   regulator-min-microvolt = <160>;
> +   regulator-max-microvolt = <160>;
> +   vin-supply = <>;
> +   regulator-always-on;
> +   };

Do we need this if it's not controllable?

> +
> +   ipsout: ipsout {
> +   compatible = "regulator-fixed";
> +   regulator-name = "ipsout";
> +   regulator-min-microvolt = <500>;
> +   regulator-max-microvolt = <500>;
> +   regulator-always-on;
> +   };

This isn't needed. What we might want is a proper representation
of the AXP209's power supply.

> +
> +   usb0_vbus: usb0_vbus {
> +   compatible = "regulator-fixed";
> +   pinctrl-names = "default";
> +   pinctrl-0 = <_vbus_pin>;
> +
> +   

Re: [linux-sunxi] [PATCH 2/4] ARM: dts: sun8i: Add PWM channel 0 pinmux setting for A23/A33

[Chen-Yu Tsai]

On Fri, Sep 18, 2015 at 11:30 PM, Hans de Goede <hdego...@redhat.com> wrote:
> Hi,
>
> On 09/18/2015 03:35 AM, Chen-Yu Tsai wrote:
>>
>> The PWM controller has 2 outputs, with one usable pin for each.
>>
>> Add a pinmux setting for the first channel. This is often used
>> for backlight dimming on tablets.
>>
>> Signed-off-by: Chen-Yu Tsai <w...@csie.org>
>> ---
>>   arch/arm/boot/dts/sun8i-a23-a33.dtsi | 7 +++
>>   1 file changed, 7 insertions(+)
>>
>> diff --git a/arch/arm/boot/dts/sun8i-a23-a33.dtsi
>> b/arch/arm/boot/dts/sun8i-a23-a33.dtsi
>> index e7054304018a..8f4db82084c5 100644
>> --- a/arch/arm/boot/dts/sun8i-a23-a33.dtsi
>> +++ b/arch/arm/boot/dts/sun8i-a23-a33.dtsi
>> @@ -412,6 +412,13 @@
>> allwinner,pull = ;
>> };
>>
>> +   pwm0_pins: pwm0 {
>
>
> This should be "pwm0_pins_a: pwm0@0" so as to be consistent with the a10 /
> a20 dtsi
> files.

This is the only possible setting. I do not see why we need "_a" for the
label and "@0" for the name. IMHO they are used to avoid name clashes when
there are multiple possible pinmux settings.


Regards
ChenYu

> Regards,
>
> Hans
>
>
>> +   allwinner,pins = "PH0";
>> +   allwinner,function = "pwm0";
>> +   allwinner,drive = ;
>> +   allwinner,pull = ;
>> +   };
>> +
>> i2c0_pins_a: i2c0@0 {
>> allwinner,pins = "PH2", "PH3";
>> allwinner,function = "i2c0";
>>
>

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Re: [linux-sunxi] [PATCH 3/4] ARM: dts: sun8i: Enable PWM controller on A23/A33 Q8 format tablets

[Chen-Yu Tsai]

On Fri, Sep 18, 2015 at 11:32 PM, Hans de Goede <hdego...@redhat.com> wrote:
> Hi,
>
> On 09/18/2015 03:35 AM, Chen-Yu Tsai wrote:
>>
>> A23/A33 based Q8 format tablets use channel 0 of the PWM controller for
>> backlight dimming.
>>
>> Signed-off-by: Chen-Yu Tsai <w...@csie.org>
>> ---
>>   arch/arm/boot/dts/sun8i-q8-common.dtsi | 6 ++
>>   1 file changed, 6 insertions(+)
>>
>> diff --git a/arch/arm/boot/dts/sun8i-q8-common.dtsi
>> b/arch/arm/boot/dts/sun8i-q8-common.dtsi
>> index 6f8a8bb4e9bb..4c2d0b459d6f 100644
>> --- a/arch/arm/boot/dts/sun8i-q8-common.dtsi
>> +++ b/arch/arm/boot/dts/sun8i-q8-common.dtsi
>> @@ -70,6 +70,12 @@
>> };
>>   };
>>
>> + {
>> +   pinctrl-names = "default";
>> +   pinctrl-0 = <_pins>;
>> +   status = "okay";
>> +};
>> +
>>   _uart {
>> pinctrl-names = "default";
>> pinctrl-0 = <_uart_pins_a>;
>>
>
> I've a feeling this should be in sunxi-q8-common.dtsi not
> sun8i-q8-common.dtsi, which requires adding a pwm
> node to sun5i.dtsi I'll look into this.

It probably should. IIRC sun5i PWM has only one channel as opposed to
2 on A10/A20.


ChenYu

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[linux-sunxi] Re: [PATCH v5 2/5] soc: sunxi: Add driver for Allwinner Reduced Serial Bus

[Chen-Yu Tsai]

On Sun, Oct 4, 2015 at 10:16 PM, Maxime Ripard
<maxime.rip...@free-electrons.com> wrote:
> Hi,
>
> On Thu, Oct 01, 2015 at 07:57:48PM +0800, Chen-Yu Tsai wrote:
>> Reduced Serial Bus (RSB) is an Allwinner proprietery interface
>> used to communicate with PMICs and other peripheral ICs.
>>
>> RSB is a two-wire push-pull serial bus that supports 1 master
>> device and up to 15 active slave devices.
>>
>> Signed-off-by: Chen-Yu Tsai <w...@csie.org>
>
> Acked-by: Maxime Ripard <maxime.rip...@free-electrons.com>

Slightly confused. Are we merging this through your tree or directly
through arm-soc?

Thanks!
ChenYu

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[linux-sunxi] [PATCH v5] clk: sunxi: Add CLK_OF_DECLARE support for sun8i-a23-apb0-clk driver

[Chen-Yu Tsai]

The APBS clock on sun9i is the same as the APB0 clock on sun8i. With
sun9i we are supporting the PRCM clocks by using CLK_OF_DECLARE,
instead of through a PRCM mfd device and subdevices for each clock
and reset control. As such we need a CLK_OF_DECLARE version of
the sun8i-a23-apb0-clk driver.

Also, build it for sun9i/A80, and not just for configurations with
MFD_SUN6I_PRCM enabled.

Signed-off-by: Chen-Yu Tsai <w...@csie.org>
---

Changes since v4:

  - Keep building clk-sun8i-apb0 for SUN6I_MFD_PRCM.

  - Add an error message and comment for when of_io_request_and_map()
fails. of_io_request_and_map() merges a bunch of errors into -EINVAL,
so this might not be the best approach. But I think having an error
message when we know something is wrong (-EBUSY, -ENOMEM) is better.

---
 drivers/clk/sunxi/Makefile |  1 +
 drivers/clk/sunxi/clk-sun8i-apb0.c | 80 --
 2 files changed, 69 insertions(+), 12 deletions(-)

diff --git a/drivers/clk/sunxi/Makefile b/drivers/clk/sunxi/Makefile
index 103efab05ca8..ccf21ba3b6b0 100644
--- a/drivers/clk/sunxi/Makefile
+++ b/drivers/clk/sunxi/Makefile
@@ -15,6 +15,7 @@ obj-y += clk-sun9i-core.o
 obj-y += clk-sun9i-mmc.o
 obj-y += clk-usb.o
 
+obj-$(CONFIG_MACH_SUN9I) += clk-sun8i-apb0.o
 obj-$(CONFIG_MACH_SUN9I) += clk-sun9i-cpus.o
 
 obj-$(CONFIG_MFD_SUN6I_PRCM) += \
diff --git a/drivers/clk/sunxi/clk-sun8i-apb0.c 
b/drivers/clk/sunxi/clk-sun8i-apb0.c
index 7ae5d2c2cde1..7ba61103a6f5 100644
--- a/drivers/clk/sunxi/clk-sun8i-apb0.c
+++ b/drivers/clk/sunxi/clk-sun8i-apb0.c
@@ -17,13 +17,77 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 
+static struct clk *sun8i_a23_apb0_register(struct device_node *node,
+  void __iomem *reg)
+{
+   const char *clk_name = node->name;
+   const char *clk_parent;
+   struct clk *clk;
+   int ret;
+
+   clk_parent = of_clk_get_parent_name(node, 0);
+   if (!clk_parent)
+   return ERR_PTR(-EINVAL);
+
+   of_property_read_string(node, "clock-output-names", _name);
+
+   /* The A23 APB0 clock is a standard 2 bit wide divider clock */
+   clk = clk_register_divider(NULL, clk_name, clk_parent, 0, reg,
+  0, 2, CLK_DIVIDER_POWER_OF_TWO, NULL);
+   if (IS_ERR(clk))
+   return clk;
+
+   ret = of_clk_add_provider(node, of_clk_src_simple_get, clk);
+   if (ret)
+   goto err_unregister;
+
+   return clk;
+
+err_unregister:
+   clk_unregister_divider(clk);
+
+   return ERR_PTR(ret);
+}
+
+static void sun8i_a23_apb0_setup(struct device_node *node)
+{
+   void __iomem *reg;
+   struct resource res;
+   struct clk *clk;
+
+   reg = of_io_request_and_map(node, 0, of_node_full_name(node));
+   if (IS_ERR(reg)) {
+   /*
+* This happens with clk nodes instantiated through mfd,
+* as those do not have their resources assigned in the
+* device tree. Do not print an error in this case.
+*/
+   if (PTR_ERR(reg) != -EINVAL)
+   pr_err("Could not get registers for a23-apb0-clk\n");
+
+   return;
+   }
+
+   clk = sun8i_a23_apb0_register(node, reg);
+   if (IS_ERR(clk))
+   goto err_unmap;
+
+   return;
+
+err_unmap:
+   iounmap(reg);
+   of_address_to_resource(node, 0, );
+   release_mem_region(res.start, resource_size());
+}
+CLK_OF_DECLARE(sun8i_a23_apb0, "allwinner,sun8i-a23-apb0-clk",
+  sun8i_a23_apb0_setup);
+
 static int sun8i_a23_apb0_clk_probe(struct platform_device *pdev)
 {
struct device_node *np = pdev->dev.of_node;
-   const char *clk_name = np->name;
-   const char *clk_parent;
struct resource *r;
void __iomem *reg;
struct clk *clk;
@@ -33,19 +97,11 @@ static int sun8i_a23_apb0_clk_probe(struct platform_device 
*pdev)
if (IS_ERR(reg))
return PTR_ERR(reg);
 
-   clk_parent = of_clk_get_parent_name(np, 0);
-   if (!clk_parent)
-   return -EINVAL;
-
-   of_property_read_string(np, "clock-output-names", _name);
-
-   /* The A23 APB0 clock is a standard 2 bit wide divider clock */
-   clk = clk_register_divider(>dev, clk_name, clk_parent, 0, reg,
-  0, 2, CLK_DIVIDER_POWER_OF_TWO, NULL);
+   clk = sun8i_a23_apb0_register(np, reg);
if (IS_ERR(clk))
return PTR_ERR(clk);
 
-   return of_clk_add_provider(np, of_clk_src_simple_get, clk);
+   return 0;
 }
 
 static const struct of_device_id sun8i_a23_apb0_clk_dt_ids[] = {
-- 
2.6.2

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[linux-sunxi] [PATCH 2/4] irqchip/sunxi-nmi: Add sun9i-a80 variant to binding doc

[Chen-Yu Tsai]

sun9i A80 introduces a new variant of the NMI controller. The registers
are reordered, but the functionality remains the same.

Add a new compatible string for it.

Signed-off-by: Chen-Yu Tsai <w...@csie.org>
---
 .../devicetree/bindings/interrupt-controller/allwinner,sunxi-nmi.txt| 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git 
a/Documentation/devicetree/bindings/interrupt-controller/allwinner,sunxi-nmi.txt
 
b/Documentation/devicetree/bindings/interrupt-controller/allwinner,sunxi-nmi.txt
index d1c5cdabc3e0..81cd3692405e 100644
--- 
a/Documentation/devicetree/bindings/interrupt-controller/allwinner,sunxi-nmi.txt
+++ 
b/Documentation/devicetree/bindings/interrupt-controller/allwinner,sunxi-nmi.txt
@@ -4,7 +4,7 @@ Allwinner Sunxi NMI Controller
 Required properties:
 
 - compatible : should be "allwinner,sun7i-a20-sc-nmi" or
-  "allwinner,sun6i-a31-sc-nmi"
+  "allwinner,sun6i-a31-sc-nmi" or "allwinner,sun9i-a80-nmi"
 - reg : Specifies base physical address and size of the registers.
 - interrupt-controller : Identifies the node as an interrupt controller
 - #interrupt-cells : Specifies the number of cells needed to encode an
-- 
2.6.2

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Re: [linux-sunxi] Banana Pi M3 (A83T based) soon ready to donate

[Chen-Yu Tsai]

On Wed, Dec 2, 2015 at 6:00 AM, Thomas Kaiser
 wrote:
> Luc Verhaegen wrote:
>
>>Keep it
>
> Nope, this device is completely useless (at least for me). I already
> finished my "review" (a severe warning regarding the board's manufacturer
> combined with a few technical details I was able to collect).
>
> http://forum.armbian.com/index.php/topic/474-quick-review-of-banana-pi-m3/
>
> I will keep it the next 2 weeks but then it's free for anyone working on
> A83T. Just drop me a note. Preferably from within Europe due to shipping
> costs.
>
> But if I understand correctly, A83T is already gone and replaced by 'R58'
> instead? http://www.allwinnertech.com/uploads/150529/7-1505291G22Y25.jpg

This is probably a repackaged version of the A83T die, maybe with some
features disabled. The A83T, H8, and R58 all have the same specs and
packaging.

> Anyway, @Vishnu, can you please comment on the question whether the A83T
> contains a SGX544MP1 or MP2? According to the fex files used for the
> BPi-M3 it should be 2 CPU cores.

The user manual says PowerVR SGX544MP1.

Regards
ChenYu

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[linux-sunxi] [PATCH 4/4] ARM: dts: sun9i: Add NMI controller device node

[Chen-Yu Tsai]

The Allwinner A80 SoC has an NMI controller. NMI is an external
interrupt pin exclusely used with PMICs and other system critical
peripherals (such as RTC) in Allwinner's reference designs.

Signed-off-by: Chen-Yu Tsai <w...@csie.org>
---
 arch/arm/boot/dts/sun9i-a80.dtsi | 8 
 1 file changed, 8 insertions(+)

diff --git a/arch/arm/boot/dts/sun9i-a80.dtsi b/arch/arm/boot/dts/sun9i-a80.dtsi
index dc666c69f6ab..e838f206f2a0 100644
--- a/arch/arm/boot/dts/sun9i-a80.dtsi
+++ b/arch/arm/boot/dts/sun9i-a80.dtsi
@@ -858,6 +858,14 @@
#reset-cells = <1>;
};
 
+   nmi_intc: interrupt-controller@080015a0 {
+   compatible = "allwinner,sun9i-a80-nmi";
+   interrupt-controller;
+   #interrupt-cells = <2>;
+   reg = <0x080015a0 0xc>;
+   interrupts = ;
+   };
+
r_ir: ir@08002000 {
compatible = "allwinner,sun5i-a13-ir";
interrupts = ;
-- 
2.6.2

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[linux-sunxi] [PATCH 0/4] ARM: sun9i: Support Allwinner A80 NMI controller

[Chen-Yu Tsai]

Hi everyone,

This series extends irqchip-sunxi-nmi to add support for the NMI
controller found in Allwinner's A80 SoC.

All Allwinner SoCs have an external NMI pin which the PMIC uses to
signal interrupts to the processor. On multi-core chips, there's an
NMI controller handling this pin and chaining interrupts to the GIC.
We already have support for this on previous sun[678]i family chips.

This series extends support to the A80 SoC. This is needed to add
support for the PMICs. A complete series, including PMIC support,
can be found here:

https://github.com/wens/linux/tree/axp809

Patch 1 renames the binding doc, to remove the SoC specific bits from
the filename.

Patch 2 adds a new compatible string for the A80 variant.

Patch 3 adds driver support for the A80 variant.

Patch 4 adds the NMI controller device node to the A80 dtsi file.

Chen-Yu Tsai (4):
  irqchip/sunxi-nmi: Rename binding doc filename to
allwinner,sunxi-nmi.txt
  irqchip/sunxi-nmi: Add sun9i-a80 variant to binding doc
  irqchip/sunxi-nmi: Support sun9i A80 NMI controller
  ARM: dts: sun9i: Add NMI controller device node

 ...{allwinner,sun67i-sc-nmi.txt => allwinner,sunxi-nmi.txt} |  2 +-
 arch/arm/boot/dts/sun9i-a80.dtsi|  8 
 drivers/irqchip/irq-sunxi-nmi.c | 13 +
 3 files changed, 22 insertions(+), 1 deletion(-)
 rename 
Documentation/devicetree/bindings/interrupt-controller/{allwinner,sun67i-sc-nmi.txt
 => allwinner,sunxi-nmi.txt} (94%)

-- 
2.6.2

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[linux-sunxi] [PATCH 3/4] irqchip/sunxi-nmi: Support sun9i A80 NMI controller

[Chen-Yu Tsai]

The A80 moves the NMI controller into the PRCM address space, and also
rearranges the registers.

Signed-off-by: Chen-Yu Tsai <w...@csie.org>
---
 drivers/irqchip/irq-sunxi-nmi.c | 13 +
 1 file changed, 13 insertions(+)

diff --git a/drivers/irqchip/irq-sunxi-nmi.c b/drivers/irqchip/irq-sunxi-nmi.c
index 4ef178078e5b..0820f67cc9a7 100644
--- a/drivers/irqchip/irq-sunxi-nmi.c
+++ b/drivers/irqchip/irq-sunxi-nmi.c
@@ -50,6 +50,12 @@ static struct sunxi_sc_nmi_reg_offs sun6i_reg_offs = {
.enable = 0x34,
 };
 
+static struct sunxi_sc_nmi_reg_offs sun9i_reg_offs = {
+   .ctrl   = 0x00,
+   .pend   = 0x08,
+   .enable = 0x04,
+};
+
 static inline void sunxi_sc_nmi_write(struct irq_chip_generic *gc, u32 off,
  u32 val)
 {
@@ -207,3 +213,10 @@ static int __init sun7i_sc_nmi_irq_init(struct device_node 
*node,
return sunxi_sc_nmi_irq_init(node, _reg_offs);
 }
 IRQCHIP_DECLARE(sun7i_sc_nmi, "allwinner,sun7i-a20-sc-nmi", 
sun7i_sc_nmi_irq_init);
+
+static int __init sun9i_nmi_irq_init(struct device_node *node,
+struct device_node *parent)
+{
+   return sunxi_sc_nmi_irq_init(node, _reg_offs);
+}
+IRQCHIP_DECLARE(sun9i_nmi, "allwinner,sun9i-a80-nmi", sun9i_nmi_irq_init);
-- 
2.6.2

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[linux-sunxi] [PATCH 1/4] irqchip/sunxi-nmi: Rename binding doc filename to allwinner,sunxi-nmi.txt

[Chen-Yu Tsai]

The NMI controller is found in all Allwinner multi-core SoCs. It is not
limited to sun[67]i, nor is it always found in the "system controller"
block. On sun[68]i, it is in the RTC block, while on sun9i, it is in the
PRCM block.

Drop these 2 specific bits from the binding doc filename.

Signed-off-by: Chen-Yu Tsai <w...@csie.org>
---
 .../{allwinner,sun67i-sc-nmi.txt => allwinner,sunxi-nmi.txt}  | 0
 1 file changed, 0 insertions(+), 0 deletions(-)
 rename 
Documentation/devicetree/bindings/interrupt-controller/{allwinner,sun67i-sc-nmi.txt
 => allwinner,sunxi-nmi.txt} (100%)

diff --git 
a/Documentation/devicetree/bindings/interrupt-controller/allwinner,sun67i-sc-nmi.txt
 
b/Documentation/devicetree/bindings/interrupt-controller/allwinner,sunxi-nmi.txt
similarity index 100%
rename from 
Documentation/devicetree/bindings/interrupt-controller/allwinner,sun67i-sc-nmi.txt
rename to 
Documentation/devicetree/bindings/interrupt-controller/allwinner,sunxi-nmi.txt
-- 
2.6.2

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[linux-sunxi] [PATCH resend 4/6] ARM: dts: sun4i: Add VE (Video Engine) module clock node

[Chen-Yu Tsai]

The video engine has its own module clock, which also includes a
reset control for it.

Signed-off-by: Chen-Yu Tsai <w...@csie.org>
---
 arch/arm/boot/dts/sun4i-a10.dtsi | 9 +
 1 file changed, 9 insertions(+)

diff --git a/arch/arm/boot/dts/sun4i-a10.dtsi b/arch/arm/boot/dts/sun4i-a10.dtsi
index 849d0242ece8..2c8f5e6ad905 100644
--- a/arch/arm/boot/dts/sun4i-a10.dtsi
+++ b/arch/arm/boot/dts/sun4i-a10.dtsi
@@ -520,6 +520,15 @@
 "dram_de_mp", "dram_ace";
};
 
+   ve_clk: clk@01c2013c {
+   #clock-cells = <0>;
+   #reset-cells = <0>;
+   compatible = "allwinner,sun4i-a10-ve-clk";
+   reg = <0x01c2013c 0x4>;
+   clocks = <>;
+   clock-output-names = "ve";
+   };
+
codec_clk: clk@01c20140 {
#clock-cells = <0>;
compatible = "allwinner,sun4i-a10-codec-clk";
-- 
2.6.2

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[linux-sunxi] [PATCH resend 6/6] ARM: dts: sun7i: Add VE (Video Engine) module clock node

[Chen-Yu Tsai]

The video engine has its own module clock, which also includes a
reset control for it.

Signed-off-by: Chen-Yu Tsai <w...@csie.org>
---
 arch/arm/boot/dts/sun7i-a20.dtsi | 9 +
 1 file changed, 9 insertions(+)

diff --git a/arch/arm/boot/dts/sun7i-a20.dtsi b/arch/arm/boot/dts/sun7i-a20.dtsi
index 21169c0a6627..0940a788f824 100644
--- a/arch/arm/boot/dts/sun7i-a20.dtsi
+++ b/arch/arm/boot/dts/sun7i-a20.dtsi
@@ -527,6 +527,15 @@
 "dram_de_mp", "dram_ace";
};
 
+   ve_clk: clk@01c2013c {
+   #clock-cells = <0>;
+   #reset-cells = <0>;
+   compatible = "allwinner,sun4i-a10-ve-clk";
+   reg = <0x01c2013c 0x4>;
+   clocks = <>;
+   clock-output-names = "ve";
+   };
+
codec_clk: clk@01c20140 {
#clock-cells = <0>;
compatible = "allwinner,sun4i-a10-codec-clk";
-- 
2.6.2

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[linux-sunxi] [PATCH resend 1/6] clk: sunxi: Add DRAM gates support for sun4i-a10

[Chen-Yu Tsai]

The A10/A20 share the same set of DRAM clock gates, which controls
direct memory access for some peripherals.

On the A10, bit 15 controls the system's DRAM clock output (possibly
to the DRAM chips), which we need to keep on.

On the A20 this has been moved to the DRAM controller, becoming a no-op.
However it is still listed in the user manual, so add it anyway.

Signed-off-by: Chen-Yu Tsai <w...@csie.org>
---
 Documentation/devicetree/bindings/clock/sunxi.txt |  1 +
 drivers/clk/sunxi/clk-simple-gates.c  | 12 
 2 files changed, 13 insertions(+)

diff --git a/Documentation/devicetree/bindings/clock/sunxi.txt 
b/Documentation/devicetree/bindings/clock/sunxi.txt
index 153ac72869e8..ef0b452806b1 100644
--- a/Documentation/devicetree/bindings/clock/sunxi.txt
+++ b/Documentation/devicetree/bindings/clock/sunxi.txt
@@ -57,6 +57,7 @@ Required properties:
"allwinner,sun6i-a31-apb2-gates-clk" - for the APB2 gates on A31
"allwinner,sun8i-a23-apb2-gates-clk" - for the APB2 gates on A23
"allwinner,sun9i-a80-apbs-gates-clk" - for the APBS gates on A80
+   "allwinner,sun4i-a10-dram-gates-clk" - for the DRAM gates on A10
"allwinner,sun5i-a13-mbus-clk" - for the MBUS clock on A13
"allwinner,sun4i-a10-mmc-clk" - for the MMC clock
"allwinner,sun9i-a80-mmc-clk" - for mmc module clocks on A80
diff --git a/drivers/clk/sunxi/clk-simple-gates.c 
b/drivers/clk/sunxi/clk-simple-gates.c
index c8acc0612c15..f4da52b5ca0e 100644
--- a/drivers/clk/sunxi/clk-simple-gates.c
+++ b/drivers/clk/sunxi/clk-simple-gates.c
@@ -160,3 +160,15 @@ CLK_OF_DECLARE(sun5i_a13_ahb, 
"allwinner,sun5i-a13-ahb-gates-clk",
   sun4i_a10_ahb_init);
 CLK_OF_DECLARE(sun7i_a20_ahb, "allwinner,sun7i-a20-ahb-gates-clk",
   sun4i_a10_ahb_init);
+
+static const int sun4i_a10_dram_critical_clocks[] __initconst = {
+   15, /* dram_output */
+};
+
+static void __init sun4i_a10_dram_init(struct device_node *node)
+{
+   sunxi_simple_gates_setup(node, sun4i_a10_dram_critical_clocks,
+ARRAY_SIZE(sun4i_a10_dram_critical_clocks));
+}
+CLK_OF_DECLARE(sun4i_a10_dram, "allwinner,sun4i-a10-dram-gates-clk",
+  sun4i_a10_dram_init);
-- 
2.6.2

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