RE: virtex uImage and serial ports
It's been a while, but here's what I remember. You have to have SERIAL_OF* turned on in the kernel configuration to get the code to work. Then the device tree gets parsed by of_serial.c functions for the 16550 uart. -- John -Original Message- From: Joshua Lamorie [mailto:j...@xiphos.ca] Sent: Tuesday, December 30, 2008 12:14 PM To: John Linn Cc: linuxppc-embedded@ozlabs.org Subject: RE: virtex uImage and serial ports Gidday John, Thanks for the pointer. I think I have already gone through every possible page on the wiki, without finding my answer. There are some great pointers however, such as http://xilinx.wikidot.com/debugging-kernel-boot-problems. As far as I can tell, if I do 'make uImage', there is no code built into vmlinux that will parse the device tree and set up the serial ports (at least as far as I can see with objdump -S). When it boots, there is no console output and __log_buf doesn't show any serial ports detected during the initialization of the serial driver. Which leads to my question, how does the 8250 serial driver get the information about the attached serial ports from the dtb? Which part of the code parses the dtb, finds the ns16550 and updates/builds the platform_device information for the 8250 serial port driver? Joshua On Tuesday, 30 December, 2008 13:16, John Linn john.l...@xilinx.com said: Hi Joshua, Have you looked at our wiki site at http://xilinx.wikidot.com as we quite a bit of information there. The ML405 board is a V2Pro chip so it should be pretty close to what you want using the default kernel config for virtex4. I haven't tested the console at 115,200 as I use it at 9600. Shouldn't be a problem, but may not hurt to stay at 9600 to get it working. There are pages on the wiki about using u-boot with the kernel also as it sounds like that's what you're doing. Thanks, John -Original Message- From: linuxppc-embedded-bounces+john.linn=xilinx@ozlabs.org [mailto:linuxppc-embedded- bounces+john.linn=xilinx@ozlabs.org] On Behalf Of Joshua Lamorie Sent: Wednesday, December 24, 2008 3:48 PM To: linuxppc-embedded@ozlabs.org Subject: virtex uImage and serial ports Gidday there, I am trying to get 2.6.27(ish) running on my custom Virtex-II Pro platform (I call it Q5). I already have many years of running 2.4.26 and booting from u-boot. The problem is getting the console running. I have a device tree blob built and loaded into memory, and by peeking at __log_buf I can see that it is reading this okay (i.e. it is correctly finding my interrupt controller). However, by the time it goes to mount the ramdisk as root, it complains that there is no console. I'm fairly certain /chosen has stdout pointing to the correct UART, and the console arguments are ttyS0,115200. In looking through the code however, I cannot figure out how the uImage code actually initializes the serial-ports for the XILINX_VIRTEX_GENERIC_BOARD. As I understand it, the only place where serial_console_init is called, is within platform_init, and this isn't called for uImage. So, three questions. 1) How is the serial driver supposed to know where the platforms serial ports are? 2) If I wanted to scrap u-boot and just copy kernel/ramdisk/dtb to memory, which kernel make target should I use? dtbImage, simpleImage? 3) What is the best, most modern image to build that should be used by u-boot? Thanks in advance Joshua p.s. I've been trying with kernel.org mainline, xilinx git and denx ELDK xenomai (2.6.24). U-boot is built from latest git source. DTS file built from XPS 9.1i with latest service packs, and turned into DTB with latest dtc source from git. -- Xiphos Technologies (514) 847-9474 x227 (514) 848-9644 fax www.xiphos.com ___ The information transmitted is intended only for the person or entity to which it is addressed and may contain confidential and/or privileged material. If you have received this in error, please contact the sender and delete this communication and any copy immediately. Thank you. ___ Linuxppc-embedded mailing list Linuxppc-embedded@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-embedded This email and any attachments are intended for the sole use of the named recipient(s) and contain(s) confidential information that may be proprietary, privileged or copyrighted under applicable law. If you are not the intended recipient, do not read, copy, or forward this email message or any attachments. Delete this email message and any attachments immediately. ___ Linuxppc-embedded mailing list Linuxppc-embedded@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-embedded -- Xiphos
RE: XUPV2P update to kernel 2.6 fails
You should visit http://xilinx.wikidot.com as there's more information there. In general, this board is not directly supported, but is very similar to ML405, a board with a Virtex 4 and a 405 processor. Thanks, John -Original Message- From: [EMAIL PROTECTED] [mailto:linuxppc-embedded- [EMAIL PROTECTED] On Behalf Of Jan Müller Sent: Saturday, December 06, 2008 1:11 PM To: linuxppc-embedded Subject: XUPV2P update to kernel 2.6 fails Hi all, I was wondering if anyone got the XUPV2P board successfully up and running with a recent 2.6 kernel? I didn't succeed. I tried the newest kernel from xilinx git (2.6.27) and also an older one, 2.6.22 (also from xilinx git). For the newer I used the device-tree as bsp. For the 2.6.22 I just copied over the xparameters_ml300.h file. In both cases no output at all was observable at the uart. Not even a single sign from the uart at any time... Strange is, the same download.bit file is working with a 2.4 kernel. Could it be a kernel .config issue? But can this really be a software/kernel issue? For the 2.4 kernel there was an output from the bootloader (some addresses and the Loading... information) even for wrong configured kernels... On this list I was reading something about setting the uart clockfreq correctly in the .dts (it was not set at all, I have to stick with EDK 9.1). But this didn't help for me. To boot the FPGA I have to use an ace file on a cf-disc. For this I use the download.bit file together with the simpleImage.virtex405-XUPV2P.elf (on 2.6.27) or zImage (on 2.6.22)... Any suggestions on this? Thanks a lot! Regards, Jan ___ Linuxppc-embedded mailing list Linuxppc-embedded@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-embedded This email and any attachments are intended for the sole use of the named recipient(s) and contain(s) confidential information that may be proprietary, privileged or copyrighted under applicable law. If you are not the intended recipient, do not read, copy, or forward this email message or any attachments. Delete this email message and any attachments immediately. ___ Linuxppc-embedded mailing list Linuxppc-embedded@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-embedded
RE: needhelp to install linux 2.6 on ppc405 of a virtex II pro
We don't directly support the V2Pro, but we do support the Virtex 4 which also uses the ppc405 in the Xilinx GIT Tree. git://git.xilinx.com http://git.xilinx.com You should make sure that you use arch/powerpc rather than arch/ppc which many older web sites have tutorials about. Arch/ppc is not longer supported. You can find more information about this at http://xilinx.wikidot.com This information assumes you already know Xilinx products and is not a tutorial on all Xilinx products. It also assumes you know Linux so it is really the Xilinx unique aspects of the kernel/BSP. We've now created a forum for Embedded Linux at Xilinx at the following location. http://forums.xilinx.com Thanks, John -Original Message- From: [EMAIL PROTECTED] [mailto:linuxppc-embedded- [EMAIL PROTECTED] On Behalf Of saadia Sent: Tuesday, October 28, 2008 6:00 PM To: linuxppc-embedded@ozlabs.org Subject: needhelp to install linux 2.6 on ppc405 of a virtex II pro Hi I want to install linux 2.6 on a ppc405 of a virtex II pro, and then patch it with rtai or xenomai. Is there some tutorial explaining the installation procedure (where to find sources, drivers etc). I have found this link: http://users.telenet.be/steven.kauffmann/installation/index.htm but it concerns linux 2.4; Can anyone help me to find useful links or documents to install the 2.6 kernel whith a real time extension? Thanks -- View this message in context: http://www.nabble.com/use-xilinx-gpio-from-linux-on-a-ppc405- tp18507061p20218592.html Sent from the linuxppc-embedded mailing list archive at Nabble.com. ___ Linuxppc-embedded mailing list Linuxppc-embedded@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-embedded This email and any attachments are intended for the sole use of the named recipient(s) and contain(s) confidential information that may be proprietary, privileged or copyrighted under applicable law. If you are not the intended recipient, do not read, copy, or forward this email message or any attachments. Delete this email message and any attachments immediately. ___ Linuxppc-embedded mailing list Linuxppc-embedded@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-embedded
RE: GDB, xilinx ml50x
Hi Stuart, Most of my work is in the kernel rather than user space, but I've used old GDB versions a small amount. I'm copying Brian as he has used it more than myself. Did you get older versions of GDB to work but not the 6.8? Did you build GDB yourself or using prebuilt? With regards to using the eabi gdb with the EDK, my understanding (not an expert) is that the Linux ABI is not the same as EABI such that you might get some things to work but not all. Sorry for the fuzzy answer there. Thanks, John -Original Message- From: [EMAIL PROTECTED] [mailto:linuxppc-embedded- [EMAIL PROTECTED] On Behalf Of Stuart Bershtein Sent: Wednesday, October 29, 2008 12:32 PM To: linuxppc-embedded@ozlabs.org Subject: GDB, xilinx ml50x Hello all. I am having difficulty getting gdb6.8 and gdbserver functioning on a xilinx ml507 evaluation board running linux-2.6-xlnx.git. Has anyone done this successfully? I can get gdb to run a small application but hitting a breakpoint (or stepping) results in a dead PPC core. Perhaps someone has had success with the Xilinx provided powerpc-eabi-gdb.exe? Is the this and the gdbserver built into XMD intended for debugging linux applications? Thanks in advance for your good counsel. -- View this message in context: http://www.nabble.com/GDB%2C-xilinx-ml50x-tp20233115p20233115.html Sent from the linuxppc-embedded mailing list archive at Nabble.com. ___ Linuxppc-embedded mailing list Linuxppc-embedded@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-embedded This email and any attachments are intended for the sole use of the named recipient(s) and contain(s) confidential information that may be proprietary, privileged or copyrighted under applicable law. If you are not the intended recipient, do not read, copy, or forward this email message or any attachments. Delete this email message and any attachments immediately. ___ Linuxppc-embedded mailing list Linuxppc-embedded@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-embedded
RE: virtex 4 linux driver bus error
See the inline comments.
-Original Message-
From: [EMAIL PROTECTED] [mailto:linuxppc-embedded-
[EMAIL PROTECTED] On Behalf Of Mirsad Vejseli
Sent: Wednesday, October 22, 2008 6:10 AM
To: linuxppc-embedded@ozlabs.org
Subject: virtex 4 linux driver bus error
hello at all,
at the moment I use development board ML410 with montavistalinux.
I have a problem, please help me!
I try to write a linux-driver for writing or reading registers.
I have a ace-file, which contents Linux and EDK-project with a component
(IP-wizard) which is added
on a PLB-bus.
I also have a driver-construct which I can register (insmod driver.ko) into
the linux-Kernel only if
i do not use functions to write or read the bus (XIO_out32() or XIO_in32 ()
). If I use this
I don't know MontaVista Linux, but in general these are functions provided by
Xilinx for standalone (no RTOS) operation unless MontaVista has changed them.
I would recommend that you go look at other Linux drivers to see the pattern
for I/O such as the uartlite serial driver or the xilinx_ps2.c driver. I
realize each driver already in the mainline can be different but they are
working.
I would also add some debug to print out the virtual address after the ioremap.
You aren't checking the result of the ioremap to make sure it didn't fail.
Is the ioremap bad or the I/O operation is the question.
function after registering the driver I got an error.
If I try to insert the modul with Insmod driver.ko I get a bus error!
my driver is similar to
http://ozlabs.org/pipermail/linuxppc-embedded/2006-January/021578.html
her the two importent functions of the driver:
#define REG_BASE (u32) XPAR_komponente_0_BASEADDR // defined in
xparameters_ml41x.h
#define REG_HIGH (u32) XPAR_komponente_0_HIGHADDR // defined in
xparameters_ml41x.h
#define reg0_upper(u32) komponente_SLV_REG0_OFFSET // 32-bit register /
defined in komponente.h
#define reg1_upper(u32) komponente_SLV_REG1_OFFSET // 32-bit register /
defined in komponente.h
#define reg2_upper(u32) komponente_SLV_REG2_OFFSET // 32-bit register /
defined in komponente.h
const static long remap_size = REG_HIGH - REG_BASE + 1;
static void read_register_values(void)
{
static u32 upper;
printk(%s:\n,DRIVERNAME);
printk(%s: | upper |\n,DRIVERNAME);
printk(%s:--|---|\n,DRIVERNAME);
upper = XIo_In32(reg_remapped_address + reg1_upper);
printk(%s: Daten im Register 35 |%15X |\n, DRIVERNAME, upper );
}
static int __init meintreiber_init(void)
reg_remapped_address = (u32) ioremap(REG_BASE, remap_size);
rtn = misc_register(miscdev);
if (rtn)
{
printk(%s: %s error driver not reg. \n,DRIVERNAME,
miscdev.name);
return rtn;
}
read2_register_values();
in the messeges log file i got the 3 printk lins and this line
upper = XIo_In32(reg_remapped_address + reg1_upper);
creates a error
Thank you very much for your kind help!
Schon gehört? Bei WEB.DE gibt' s viele kostenlose Spiele:
http://games.entertainment.web.de/de/entertainment/games/free/index.html
___
Linuxppc-embedded mailing list
Linuxppc-embedded@ozlabs.org
https://ozlabs.org/mailman/listinfo/linuxppc-embedded
This email and any attachments are intended for the sole use of the named
recipient(s) and contain(s) confidential information that may be proprietary,
privileged or copyrighted under applicable law. If you are not the intended
recipient, do not read, copy, or forward this email message or any attachments.
Delete this email message and any attachments immediately.
___
Linuxppc-embedded mailing list
Linuxppc-embedded@ozlabs.org
https://ozlabs.org/mailman/listinfo/linuxppc-embedded
RE: Xilininx GPIO
Hi Peter, Sorry for the delay. Are you using arch/powerpc and the xilinx_gpio driver from the Xilinx Git tree has not been converted to use device tree yet? We have a new gpio driver that we have not released out yet that is flattened and designed to work with arch/powerpc. I have recently been testing it with success in general. However it is a new driver that is not a char driver as the old one, but a true gpio driver that is accessed from sysfs in user space. What are you trying to use the GPIO for? Thanks, John From: [EMAIL PROTECTED] [mailto:[EMAIL PROTECTED] On Behalf Of Peter Scott Sent: Monday, October 20, 2008 1:43 PM To: linuxppc-embedded@ozlabs.org Subject: Xilininx GPIO Hello there, I am having difficulties with some xilinx gpios and the xilinx-2.6-xlnx kernel. As far as I can tell the kernel is configured correctly for gpio. I can see that the module_init function xgpio_init is called, and that bus_add_driver and driver_add_groups returns without error. But I cannot see that the probe function is called. /proc/misc doesnt list a driver for the gpios. I am not sure where to go next as there is no error printouts. I have seen other peoples consoles stating that the gpio is mapped to xx but this doesn't happen for me. I am using the default bit file for the ml507 board, and have created device files /dev/xgpio0 /dev/xgpio1 etc with major 10 and minor 185 However if I try to open these devices the open fails. I would rally appreciate it if someone could give me some pointers as to what to look for, or how a to go about debugging this. Many thanks Peter Scott This email and any attachments are intended for the sole use of the named recipient(s) and contain(s) confidential information that may be proprietary, privileged or copyrighted under applicable law. If you are not the intended recipient, do not read, copy, or forward this email message or any attachments. Delete this email message and any attachments immediately. ___ Linuxppc-embedded mailing list Linuxppc-embedded@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-embedded
RE: Compile program using XGpio
Hi Bruno,
I don't think you can do what you're trying to do, unless I'm
misunderstanding or just not smart enough.
The EDK from Xilinx ships with drivers that are not Linux drivers.
Those functions in main below are intended for a standalone (no RTOS)
system such they can't just be called from a user app in Linux. You are
sort of trying to create a user mode driver with what you are doing.
There is a character mode gpio driver in the Xilinx git tree,
git://git.xilinx.com/linux-2.6-xlnx.git that has been used previously.
I don't currently test that driver as we're in the process of getting a
flattened gpio driver that is not char driver ready for mainline.
I plan to take a look at the char mode gpio driver today as there's
another question regarding it on the list.
Thanks,
John
From: [EMAIL PROTECTED]
[mailto:[EMAIL PROTECTED] On
Behalf Of Bruno Monteiro
Sent: Tuesday, October 21, 2008 8:36 AM
To: linuxppc-embedded@ozlabs.org
Subject: Compile program using XGpio
Hi all,
I'm working with a Virtex2p. I have a running system using:
* EDK 9.1
* Crosstool-ng (svn)
* linux-2.6-xlnx
* BusyBox 1.12.1
Now, i'm trying to build a small program that turn off leds. I guess it
should be something like this:
void main (void){
XGpio led;
XGpio_Initialize (led, XPAR_LEDS_4BIT_DEVICE_ID);
XGpio_SetDataDirection(led,1,0);
XGpio_DiscreteWrite(led,1,0xf);
}
I want to know how to compile it (without EDK). Any suggestion?
Thanks,
Bruno Monteiro
This email and any attachments are intended for the sole use of the named
recipient(s) and contain(s) confidential information that may be proprietary,
privileged or copyrighted under applicable law. If you are not the intended
recipient, do not read, copy, or forward this email message or any attachments.
Delete this email message and any attachments immediately.
___
Linuxppc-embedded mailing list
Linuxppc-embedded@ozlabs.org
https://ozlabs.org/mailman/listinfo/linuxppc-embedded
RE: xparameters file in the Xilinx kernel tree version 2.6.27-rc4
Hi Ming, Arch/ppc has gone away. We don’t support it any longer as it went away in the mainline kernel also. You should migrate to arch/powerpc. There is a git tag, last-arch-ppc, that is visible from http://git.xilinx.com/linux-2.6-xlnx.git. You can use that tag in git to reset back to that tag. Or after clicking on that tag towards the bottom on the http page, you can go to the tree view and get any individual files you would like. You should go to our wiki site, http://xilinx.wikidot.com http://xilinx.wikidot.com/ to get more data on how to build the newer kernel. Thanks, John From: [EMAIL PROTECTED] [mailto:[EMAIL PROTECTED] On Behalf Of MingLiu Sent: Thursday, October 16, 2008 1:39 PM To: linuxppc-embedded@ozlabs.org Subject: xparameters file in the Xilinx kernel tree version 2.6.27-rc4 Dear all, I downloaded the newest version 2.6.27 kernel from the Xilinx tree. I found that it is much different with the previous version 2.6.24-rc8 we are using. Maybe my question is stupid, but I cannot find the previous xparameters_ml40x.h file in arch/ppc/platform/4xx/xparameters/ in the new arch/powerpc folder. So how can I import my BSP parameters in the new kernel for the customized design? One more question is, I tried make zImage. But I cannot find the generated zImage.elf, as the previous kernel will do.How to generate the .elf kernel file? Thanks for your help and answering. BR Ming 使用新一代 Windows Live Messenger 轻松交流和共享！ 立即体验！ http://messenger.live.cn/ This email and any attachments are intended for the sole use of the named recipient(s) and contain(s) confidential information that may be proprietary, privileged or copyrighted under applicable law. If you are not the intended recipient, do not read, copy, or forward this email message or any attachments. Delete this email message and any attachments immediately. ___ Linuxppc-embedded mailing list Linuxppc-embedded@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-embedded
RE: Linux driver for Xilinx ICAP
Hi Ming, I’m copying our local expert on this core to see his thoughts as I don’t actively use this core myself. Thanks, John From: [EMAIL PROTECTED] [mailto:[EMAIL PROTECTED] On Behalf Of MingLiu Sent: Wednesday, October 08, 2008 7:48 AM To: linuxppc-embedded@ozlabs.org Subject: Linux driver for Xilinx ICAP Dear all, Has someone manage to use the driver for the Xilinx xps_hwicap core to reconfigure bitstreams? I have enabled the driver in Linux configuration (version 2.6.24 from Xilinx tree). However I failed to use it to reconfigure bitstreams. The operations are listed as follows: # cp partial.bit /dev/icap0 # No error information is shown, however the partial bitstream is not successfully configured. I checked /proc/devices and the device icap has been successfully registered with the major of 259. But in /proc/interrupts, I didn't find any matching entry of the interrupt for icap core. I tried to reconfigure the PR module with JTAG, and my design works well. Any hints for this problem? Is the problem on the interrupt? Thanks so much if someone can help me. BR Ming Windows Live Writer，支持离线撰写博客内容，随时随地想写就写。 立即使用！ http://get.live.cn/product/writer.html This email and any attachments are intended for the sole use of the named recipient(s) and contain(s) confidential information that may be proprietary, privileged or copyrighted under applicable law. If you are not the intended recipient, do not read, copy, or forward this email message or any attachments. Delete this email message and any attachments immediately. ___ Linuxppc-embedded mailing list Linuxppc-embedded@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-embedded
RE: EDK10.1 and emaclite
Hi Georg, There is no way to configure the PHY using the EMAC lite as that's part of what makes it lite. So the PHY on the board has to be configured correctly by strapping it on the board. Maybe you can include other PHY drivers to do this as I'm not sure about that. Thanks, John -Original Message- From: [EMAIL PROTECTED] [mailto:linuxppc-embedded- [EMAIL PROTECTED] On Behalf Of Georg Schardt Sent: Tuesday, September 09, 2008 1:30 AM To: Neeraj Garg Cc: linuxppc-embedded@ozlabs.org Subject: Re: EDK10.1 and emaclite Hi again, mmh, there is no kernel message with PHY detection, but all PHY drivers are compiled in. i looked at my xps project and there is only one ip-core Ethernet_MAC with type xps_ethernetlite. is it possible that the phy connection is missing ? i use the base system builder with the board support files supported from avnet. where can i look for the ethernet speed ? the ethernetlite ip has no speed options thanks for your help georg Neeraj Garg wrote: Hi Georg, Can you post linux bootup message where its says PHY is detected at paticular address, and check with your hardware what is actual address of PHY. Also I would like to know the configuration of your hardware whether its configured of 10MBPS OR 100MBPS. -- -- Neeraj Garg Message: 3 Date: Mon, 08 Sep 2008 18:29:53 +0200 From: Georg Schardt [EMAIL PROTECTED] Subject: EDK10.1 and emaclite To: linuxppc-embedded@ozlabs.org Message-ID: [EMAIL PROTECTED] Content-Type: text/plain; charset=ISO-8859-1; format=flowed Hi all, im trying to use the emaclite core which comes with the EDK10.1 with the 2.6.26 kernel from git.xilinx.com on virtex4fx12 minimodul. the emac is detect by the kernel: xilinx_emaclite xilinx_emaclite.0: MAC address is now 2: 0: 0: 0: 0: 0 xilinx_emaclite xilinx_emaclite.0: using fifo mode. xilinx_emaclite xilinx_emaclite.0: Xilinx EMACLite at 0x8100 mapped to 0xC506, irq=0 i can change the mac-address with ifconfig and i can give an ip-address to the device, but a ping is not possible and arp is not working. i think that the phy is not working right. has someone others the same problem ? what can i changed ? i have tried out all possible phy driver in the linux kernel a setup with the lltemac is working fine, but i want to use the emaclite thanks regards georg ___ Linuxppc-embedded mailing list Linuxppc-embedded@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-embedded This email and any attachments are intended for the sole use of the named recipient(s) and contain(s) confidential information that may be proprietary, privileged or copyrighted under applicable law. If you are not the intended recipient, do not read, copy, or forward this email message or any attachments. Delete this email message and any attachments immediately. ___ Linuxppc-embedded mailing list Linuxppc-embedded@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-embedded
RE: LL_TEMAC+LL_DMA configuration on Xilinx ML507
Hi Stu, I have attached the MHS file for the v2 bitstream. I just pushed out changes yesterday to our git tree that move us to a new bit stream that is based on the V5FXT development kit that Xilinx released on xilinx.com. If interested, you can find more info on http://xilinx.wikidot.com. Thanks, John -Original Message- From: [EMAIL PROTECTED] [mailto:linuxppc-embedded- [EMAIL PROTECTED] On Behalf Of Stuart Bershtein Sent: Tuesday, September 09, 2008 12:03 PM To: linuxppc-embedded@ozlabs.org Subject: LL_TEMAC+LL_DMA configuration on Xilinx ML507 I am hoping someone can give me some general suggestions for generating a proper bitstream that is compatible with linux 2.6 on the ml507 board. We are using Xilinx XPS, 10.1.2. We haven't had much luck so far. If someone has the MHS file that was generated with ml507_rtos_dma_v2.bit that would be very helpful! Thanks in advance for your help. Stu -- View this message in context: http://www.nabble.com/LL_TEMAC%2BLL_DMA-configuration-on-Xilinx-ML507- tp19397898p19397898.html Sent from the linuxppc-embedded mailing list archive at Nabble.com. ___ Linuxppc-embedded mailing list Linuxppc-embedded@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-embedded This email and any attachments are intended for the sole use of the named recipient(s) and contain(s) confidential information that may be proprietary, privileged or copyrighted under applicable law. If you are not the intended recipient, do not read, copy, or forward this email message or any attachments. Delete this email message and any attachments immediately. system.mhs Description: system.mhs ___ Linuxppc-embedded mailing list Linuxppc-embedded@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-embedded
RE: Device Tree
Hi Georg, Our git tree, git://git.xilinx.com, has support for the ML405 board which is a V4 board. The following wiki page, http://xilinx.wikidot.com, shows how to generate a device tree for the kernel and other details you'll need. The kernel from our git tree is configured for the device tree using the default kernel configuration. The mainline kernel is now more up to date also as we got many of the changes into the mainline, but we are still working on some of the device drivers. Thanks, John -Original Message- From: [EMAIL PROTECTED] [mailto:linuxppc-embedded- [EMAIL PROTECTED] On Behalf Of Georg Schardt Sent: Tuesday, September 09, 2008 9:43 AM To: linuxppc-embedded@ozlabs.org Subject: Device Tree Hi, im searching for informations about the flatten device trees. the only thing i know is, that the device tree is a kind of data-structure which the bios or bootloader gives to the operation system. until now, i boot linux with uboot without a device tree, but newer kernel wants a devicetree, i think ?? i use a virtex4 board with an integrated powerpc how can i create the device tree file ? how must the linux kernel be configured ? is there a good internet page with informations ? thanks regards georg ___ Linuxppc-embedded mailing list Linuxppc-embedded@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-embedded This email and any attachments are intended for the sole use of the named recipient(s) and contain(s) confidential information that may be proprietary, privileged or copyrighted under applicable law. If you are not the intended recipient, do not read, copy, or forward this email message or any attachments. Delete this email message and any attachments immediately. ___ Linuxppc-embedded mailing list Linuxppc-embedded@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-embedded
RE: Device Tree
It is not integrated into the EDK, you need to pull it from our git tree and use it from the EDK. -- John Here's part of the wiki page. Generating a Device Tree The Linux kernel from the git tree has device tree files, ml507.dts and ml405.dts, in the arch/powerpc/boot/dts directory which are designed to work with the hardware reference designs available from this site. Users who have a Xilinx board, ML405 or ML507, should build the Linux kernel using the provided dts file to get a solid baseline before generating a new device tree file. After a baseline is established, the new dts files can be compared to the existing to verify any differences. The page, Generating A Device Tree, has details on how to generate a device tree for the arch/powerpc Linux kernel. -Original Message- From: Georg Schardt [mailto:[EMAIL PROTECTED] Sent: Tuesday, September 09, 2008 12:19 PM To: John Linn Cc: linuxppc-embedded@ozlabs.org Subject: Re: Device Tree Hi John, yes, i found the wiki link in another post of you. nice , thank you. can you tell me how to generate the dts file in the EDK 10.2 ? i have read that the gen_mhs_devtree script is now integrated ? i see no menu-item or config option ? regards georg John Linn wrote: Hi Georg, Our git tree, git://git.xilinx.com, has support for the ML405 board which is a V4 board. The following wiki page, http://xilinx.wikidot.com, shows how to generate a device tree for the kernel and other details you'll need. The kernel from our git tree is configured for the device tree using the default kernel configuration. The mainline kernel is now more up to date also as we got many of the changes into the mainline, but we are still working on some of the device drivers. Thanks, John -Original Message- From: [EMAIL PROTECTED] [mailto:linuxppc-embedded- [EMAIL PROTECTED] On Behalf Of Georg Schardt Sent: Tuesday, September 09, 2008 9:43 AM To: linuxppc-embedded@ozlabs.org Subject: Device Tree Hi, im searching for informations about the flatten device trees. the only thing i know is, that the device tree is a kind of data-structure which the bios or bootloader gives to the operation system. until now, i boot linux with uboot without a device tree, but newer kernel wants a devicetree, i think ?? i use a virtex4 board with an integrated powerpc how can i create the device tree file ? how must the linux kernel be configured ? is there a good internet page with informations ? thanks regards georg ___ Linuxppc-embedded mailing list Linuxppc-embedded@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-embedded This email and any attachments are intended for the sole use of the named recipient(s) and contain(s) confidential information that may be proprietary, privileged or copyrighted under applicable law. If you are not the intended recipient, do not read, copy, or forward this email message or any attachments. Delete this email message and any attachments immediately. This email and any attachments are intended for the sole use of the named recipient(s) and contain(s) confidential information that may be proprietary, privileged or copyrighted under applicable law. If you are not the intended recipient, do not read, copy, or forward this email message or any attachments. Delete this email message and any attachments immediately. ___ Linuxppc-embedded mailing list Linuxppc-embedded@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-embedded
RE: EDK10.1 and emaclite
Hi Georg, I don't really know much about the state of the emac lite driver in the Git tree. I inherited the Git tree with some stuff already in it. I test the LL TEMAC driver, but haven't had the bandwidth and priority to do any emac lite testing. Thanks, John -Original Message- From: [EMAIL PROTECTED] [mailto:linuxppc-embedded- [EMAIL PROTECTED] On Behalf Of Georg Schardt Sent: Monday, September 08, 2008 10:30 AM To: linuxppc-embedded@ozlabs.org Subject: EDK10.1 and emaclite Hi all, im trying to use the emaclite core which comes with the EDK10.1 with the 2.6.26 kernel from git.xilinx.com on virtex4fx12 minimodul. the emac is detect by the kernel: xilinx_emaclite xilinx_emaclite.0: MAC address is now 2: 0: 0: 0: 0: 0 xilinx_emaclite xilinx_emaclite.0: using fifo mode. xilinx_emaclite xilinx_emaclite.0: Xilinx EMACLite at 0x8100 mapped to 0xC506, irq=0 i can change the mac-address with ifconfig and i can give an ip-address to the device, but a ping is not possible and arp is not working. i think that the phy is not working right. has someone others the same problem ? what can i changed ? i have tried out all possible phy driver in the linux kernel a setup with the lltemac is working fine, but i want to use the emaclite thanks regards georg ___ Linuxppc-embedded mailing list Linuxppc-embedded@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-embedded This email and any attachments are intended for the sole use of the named recipient(s) and contain(s) confidential information that may be proprietary, privileged or copyrighted under applicable law. If you are not the intended recipient, do not read, copy, or forward this email message or any attachments. Delete this email message and any attachments immediately. ___ Linuxppc-embedded mailing list Linuxppc-embedded@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-embedded
RE: Porting linux on PPC405
Hi Vineeth, I don't directly support that board, but it's similar to the ML405 in that it uses a 405 processor. Since I don't test on that board or any V2Pro board, I'm going to tell you my experience on the ML405, a V4 board. See below. -Original Message- From: [EMAIL PROTECTED] [mailto:linuxppc-embedded- [EMAIL PROTECTED] On Behalf Of [EMAIL PROTECTED] Sent: Thursday, September 04, 2008 12:40 AM To: Linuxppc-embedded@ozlabs.org Subject: Porting linux on PPC405 Hi all, I am trying to port Linux 2.6 on PPC405 processor.I have EDK 10.1, Xilinx University program board (with Virtex II Pro device) linux kernel from Xilinx git. (git.xilinx.com) Cross Compiler (Croostool) fdt.dts file generated by EDK using with help of Xilinx fdt patch. This is typical of a dts file problem. You should compare the dts file to the ml405.dts file that is in the xilinx git tree. I just looked at a dts generator issue and see that the following property on the processor is wrong as it can be 0 in the generated file. This number below is for a system at 300 Mhz. timebase-frequency = 3; I could compile the kernel and could generate the zImage. I've downloaded the hardware bit file and then the zImage to the DDR SDRAM on the board using Parallel 4 cable. when i give the RUN command, this is what i get.. booting virtex memstart=0x0 memsize=0x1000 zImage starting: loaded at 0x0040 (sp: 0x00578f1c) Allocating 0x326564 bytes for kernel ... gunzipping (0x - 0x0040c000:0x005772bb)...done 0x3015c8 bytes Linux/PowerPC load: console=ttyS0 ip=on root=/dev/ram Finalizing device tree... flat tree at 0x40ad68 Please also verify that you have specified the right amount of RAM for the board in the dts file as that can cause a problem. The memsize shows 256 Mbyte, is that really correct? The kernel could also be booting, but the console is at the wrong baud rate as the UART in the device tree can be set to a baud rate that does not agree with the boot args to the kernel. No baud in the boot arg = 9600 baud. I have some debug information on the wiki page at http://xilinx.wikidot.com/debugging-kernel-boot-problems. The booting process seems to be stopped after this. I the bootarguments i've given are, In dts file, bootargs = console=ttyS0 ip=off root=/dev/ram; linux,stdout-path=/[EMAIL PROTECTED]/[EMAIL PROTECTED]; Please let me know if've missed smthing here..! n any clue on the reason why the boor process seems to be hanged here ! Thanks in advance, Vineeth ___ Linuxppc-embedded mailing list Linuxppc-embedded@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-embedded This email and any attachments are intended for the sole use of the named recipient(s) and contain(s) confidential information that may be proprietary, privileged or copyrighted under applicable law. If you are not the intended recipient, do not read, copy, or forward this email message or any attachments. Delete this email message and any attachments immediately. ___ Linuxppc-embedded mailing list Linuxppc-embedded@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-embedded
RE: [PATCH] Linux Device Driver for Xilinx LL TEMAC 10/100/1000 EthernetNIC
I'm not claiming to be a Linux driver expert as I'm still learning.
Some of the comments are nits.
Thanks for the effort you're putting in on this.
Linux Device Driver for Xilinx LL TEMAC 10/100/1000 Ethernet NIC
Original Author Yoshio Kashiwagi
Updated and Maintained by David Lynch
Signed-off-by: David H. Lynch Jr. [EMAIL PROTECTED]
---
drivers/net/Kconfig|5
drivers/net/Makefile |1
drivers/net/xps_lltemac.c | 1562
include/linux/xilinx_devices.h |2
4 files changed, 1569 insertions(+), 1 deletions(-)
diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig
index 033e13f..71b4c17 100644
--- a/drivers/net/Kconfig
+++ b/drivers/net/Kconfig
@@ -2332,6 +2332,11 @@ config MV643XX_ETH
Some boards that use the Discovery chipset are the Momenco
Ocelot C and Jaguar ATX and Pegasos II.
+config XPS_LLTEMAC
+ tristate Xilinx LLTEMAC 10/100/1000 Ethernet MAC driver
+ help
+ This driver supports the Xilinx 10/100/1000 LLTEMAC found in
Virtex 4 FPGAs
It might be helpful to say only in DMA mode as our traditional drivers
support FIFO mode and DMA.
Since the FPGA is pretty flexible people tend to do things different
than I sometimes expect.
+
config QLA3XXX
tristate QLogic QLA3XXX Network Driver Support
depends on PCI
diff --git a/drivers/net/Makefile b/drivers/net/Makefile
index 1f09934..9196bab 100644
--- a/drivers/net/Makefile
+++ b/drivers/net/Makefile
@@ -126,6 +126,7 @@ obj-$(CONFIG_AX88796) += ax88796.o
obj-$(CONFIG_TSI108_ETH) += tsi108_eth.o
obj-$(CONFIG_PICO_TEMAC) += pico_temac.o
obj-$(CONFIG_MV643XX_ETH) += mv643xx_eth.o
+obj-$(CONFIG_XPS_LLTEMAC) += xps_lltemac.o
obj-$(CONFIG_QLA3XXX) += qla3xxx.o
obj-$(CONFIG_PPP) += ppp_generic.o
diff --git a/drivers/net/xps_lltemac.c b/drivers/net/xps_lltemac.c
new file mode 100644
index 000..8af4e7a
--- /dev/null
+++ b/drivers/net/xps_lltemac.c
@@ -0,0 +1,1562 @@
+/*=
=
+
+ Driver for Xilinx temac ethernet NIC's
Saying LL TEMAC would be clearer as we having older TEMACs that are yet
different and not local link (LL).
It's definitely not a NIC in the traditional sense of a PCI card, but is
an SOC core.
+
+ Author: Yoshio Kashiwagi
+ Copyright (c) 2008 Nissin Systems Co.,Ltd.
+
+ Revisons: David H. Lynch Jr. [EMAIL PROTECTED]
+ Copyright (C) 2005-2008 DLA Systems
+
+==*
/
+/* DRV_NAME is for compatibility with existing xilinx ll temac driver
+ * also with of/dtc object names */
+#define DRV_NAMExilinx_lltemac
+#define DRV_AUTHOR Yoshio Kashiwagi
+#define DRV_EMAIL
+
+#include linux/module.h
+#include linux/netdevice.h
+#include linux/etherdevice.h
+#include linux/init.h
+#include linux/skbuff.h
+#include linux/platform_device.h
+#include linux/spinlock.h
+
+#include linux/mii.h
+#include linux/in.h
+#include linux/pci.h
+
+#include linux/ip.h
+#include linux/tcp.h /* just needed for sizeof(tcphdr) */
+#include linux/udp.h /* needed for sizeof(udphdr) */
+#include linux/delay.h
+#include linux/io.h
+
+#define MII_ANI 0x10
+#define PHY_NUM 0
This phy number, (phy address), won't work for a number of Xilinx
boards. It seems like this should be either pulled from the platform
data (and device tree), or the driver should try to find the PHY address
by trying each one.
Otherwise the users will have to edit the driver all the time when their
phy is not address 0.
+#define PHY_TIMEOUT 1
+
snip
+static unsigned int
+mdio_read(struct net_device *ndev, int phy_id, int reg_num)
+{
+ struct temac_local *lp = netdev_priv(ndev);
+ u32 timeout = PHY_TIMEOUT;
+ u32 rv = 0;
+ unsigned long flags;
+
+ if ((reg_num MII_REG_MAX) ||
+ (phy_id == PHY_ADDR_INVALID)) {
The phy_id never gets set to PHY_ADDR_INVALID, is there something I'm
missing or should this be removed? Maybe this is related to the PHY_NUM
hard coded value that could be set invalid.
+ dev_err(ndev-dev,
+ mdio_read(%x, %x) invalid reg_num or invalid
phy_id\n,
+ reg_num, phy_id);
+ return -1;
Returning a negative value for failure makes sense, but not when the
return type is unsigned int, should it be an int instead?
I put in nits about return types and I realize their nits, but should
make the driver better was my
hope.
+ }
+
+ spin_lock_irqsave(lp-lock, flags);
+
+ tiow(ndev, XTE_LSW0_OFFSET,
+ ((phy_id 5) | (reg_num)));
+ tiow(ndev, XTE_CTL0_OFFSET,
+ XTE_MIIMAI_OFFSET | (lp-emac_num 10));
+ while (!(tior(ndev, XTE_RDY0_OFFSET) XTE_RSE_MIIM_RR_MASK)) {
+ udelay(1);
RE: [PATCH] Linux Device Driver for Xilinx LL TEMAC 10/100/1000 EthernetNIC
I screwed up and forgot to copy all on this previously. -Original Message- From: David H. Lynch Jr. [mailto:[EMAIL PROTECTED] Sent: Tuesday, August 19, 2008 3:19 PM To: John Linn Subject: Re: [PATCH] Linux Device Driver for Xilinx LL TEMAC 10/100/1000 EthernetNIC John Linn wrote: Stephen wants OF support -which is fine, but I can not test that. I definitely agree with Stephen that OF support is needed since arch/ppc has gone away. We aren't doing any new work on arch/ppc. Are you not planning to move to arch/powerpc anytime soon? I could help you with that transition which would be better in the long run. I'd rather do that than do testing for you as I think it would be more productive, but I've been wrong before. We will move to powerpc, but not in the time-frame I am hoping for this driver. In the context of Linux and Pico, we means me, and there is no time to do the work anytime soon. snip What about you getting all the review testing done and then we (Xilinx) will add the OF support to the driver? I doubt the powerpc mainline will take the driver without OF support. In fact, we had to remove the platform bus support from the last driver that we put into mainline for arch/powerpc. I would like one and only one tag that can be used end-end. Is there something xilinx will object to ? Prefer ? xilinx_device name, (xilinx_lltemac or xilinx_ps2) is what we use for file names. The device tree does use xlnx to identify xilinx devices, but I don't think that should dictate file names. We have a driver in out GIT tree that is not flat (as most know) for the LL TEMAC and we are working on creating flat drivers for future devices. Ideally this new driver would be a replacement for our driver. Give me a name and I will go with it. the xps_lltemac name came from Yoshio, It is not in stone. If I name the module xilinx_lltemac and go with xilinx_lltemac.c for the file name, is that going to cause problems with xilinx ? I will use whatever you recomend. xilinx_lltemac is the preferred. I don't think using xilinx_lltemac should cause problems. Our Xilinx Git tree has a xilinx_lltemac subdir that contains the non-flat driver but that should be ok with your xilinx_lltemac.c file in the net directory. -- Dave LynchDLA Systems Software Development: Embedded Linux 717.627.3770 [EMAIL PROTECTED] http://www.dlasys.net fax: 1.253.369.9244 Cell: 1.717.587.7774 Over 25 years' experience in platforms, languages, and technologies too numerous to list. Any intelligent fool can make things bigger and more complex... It takes a touch of genius - and a lot of courage to move in the opposite direction. Albert Einstein This email and any attachments are intended for the sole use of the named recipient(s) and contain(s) confidential information that may be proprietary, privileged or copyrighted under applicable law. If you are not the intended recipient, do not read, copy, or forward this email message or any attachments. Delete this email message and any attachments immediately. ___ Linuxppc-embedded mailing list Linuxppc-embedded@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-embedded
RE: Linux issues on Xilinx XUPV2P board
Hi Alan, I'm assuming you must not have Git installed from the question, otherwise you would be using git clone as the site shows. On the http://git.xilinx.com, it says the following, Users without Git installed may create a tar file by using the snapshot feature. Select the tree view of the repository (far right side) on this page, then select snapshot (near the top) and a gziped tar file will be created and downloaded. Is this what you're looking for? -- John -Original Message- From: [EMAIL PROTECTED] [mailto:[EMAIL PROTECTED] org] On Behalf Of Alan Casey Sent: Friday, August 15, 2008 6:34 AM To: wangyanlong; linuxppc-embedded@ozlabs.org Subject: Re: Linux issues on Xilinx XUPV2P board Hi, I used version 2.6.24. Current version is 2.6.26+ but im not sure how to download previous versions from the git tree, there should be some info at http://git.xilinx.com about how to do this. Regards, Alan. -- Original Message -- Date: Fri, 15 Aug 2008 04:35:01 -0700 (PDT) From: wangyanlong [EMAIL PROTECTED] To: linuxppc-embedded@ozlabs.org Subject: Re: Linux issues on Xilinx XUPV2P board Hi Alan I dow load the kernel from http://git.xilinx.com/cgi-bin/gitweb.cgi?p=linux-2.6-xlnx.git ;a=summary Merge ../../linux-2.6 into 2.6.26-merge master commit | commitdiff | tree | snapshot this version ,but it not work well,which version you downloaded? Many thanks yanlong Alan Casey wrote: Hi, Yes i had a problem with using one of the Linux 2.6.26 kernel versions on the XUPV2P board where the VGA display has not driven correctly, not sure why. The Linux 2.6.24 kernel from git.xilinx.com works fine. Regards, Alan. -- Original Message -- Date: Fri, 15 Aug 2008 01:43:37 -0700 (PDT) From: wangyanlong [EMAIL PROTECTED] To: linuxppc-embedded@ozlabs.org Subject: Re: Linux issues on Xilinx XUPV2P board I meet the problem as yours . And my vga's display is not clear , have you meet this? Alan Casey wrote: Hi, I have tried running the Linux 2.6.24 and Linux 2.6.26 kernels from git.xilinx.com on the Xilinx XUPV2P board but have run into a few problems. Cross-compiler i use to compile applications was built using Crosstools and based on gcc 3.3.4. I use Xilinx EDK 7.1 for integrating hardware peripherals onto the board. The problems i've seen are: (i) gettimeofday software function returns time of 0 all the time. (ii) The Linux 2.6.24 kernel's Xilinx Framebuffer driver and/or the Xilinx PLB TFT Controller IP block (plb_tft_cntlr_ref_v1_00_d) does not appear to centre the display on a VGA screen properly(vertically offset). (iii) 64-bit write/read access to peripheral integrated onto the Xilinx Virtex-II Pro FPGA either causes a system crash or only lower part of 32-bit data to be written (i.e. lower part of 64-bit data appears to be mirrored on the upper and lower 32-bits of the system bus). However, 32-bit write/read access to the peripheral passes as well as 64-bit write/read access to the SDRAM memory address space. Peripheral interface has been verified to be IBM PLB compliant via IBM bus functional model simulations. (iv) The Linux 2.6.26 Xilinx Framebuffer driver on the Xilinx XUPV2P board does not appear to be working - nothing displayed to screen/console not switching to framebuffer device on bootup. Just wondering if anybody has seen these issues before and know how to resolve them? Any info. appreciated, Regards, Alan. ___ Linuxppc-embedded mailing list Linuxppc-embedded@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-embedded -- View this message in context: http://www.nabble.com/Linux-issues-on-Xilinx-XUPV2P-board-tp1 8262250p18995644.html Sent from the linuxppc-embedded mailing list archive at Nabble.com. ___ Linuxppc-embedded mailing list Linuxppc-embedded@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-embedded ___ Linuxppc-embedded mailing list Linuxppc-embedded@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-embedded -- View this message in context: http://www.nabble.com/Linux-issues-on-Xilinx-XUPV2P-board-tp18 262250p18997255.html Sent from the linuxppc-embedded mailing list archive at Nabble.com. ___ Linuxppc-embedded mailing list Linuxppc-embedded@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-embedded ___ Linuxppc-embedded mailing list
RE: Linux issues on Xilinx XUPV2P board
Ah I see, sorry about that, misunderstood what was needed. So there may be other ways as I'm not a Git expert, but I clone the repository, then reset to the a Git tag. git reset --hard tag name We're working on a new frame buffer driver for a new core, but the old frame buffer has not been high priority for us. Thanks, John -Original Message- From: Alan Casey [mailto:[EMAIL PROTECTED] Sent: Friday, August 15, 2008 8:36 AM To: John Linn; wangyanlong; linuxppc-embedded@ozlabs.org Subject: RE: Linux issues on Xilinx XUPV2P board Hi John, Im not having any problems using GIT. I can download 2.6.26 using git no problem - i think wangyanlong would like to use 2.6.24 or 2.6.26 and he has problems downloading it using git - hence i replied to him that he may find more info about how to download the current or previous version on git.xilinx.com. I think you misread my email. The Xilinx Framebuffer driver works fine in Linux 2.6.24 but there appears to be a problem with one of the Linux-2.6.26 versions which i posted about a few weeks/months ago. Alan. -- Original Message -- Subject: RE: Linux issues on Xilinx XUPV2P board Date: Fri, 15 Aug 2008 08:30:25 -0600 From: John Linn [EMAIL PROTECTED] To: [EMAIL PROTECTED], wangyanlong [EMAIL PROTECTED], linuxppc-embedded@ozlabs.org Hi Alan, I'm assuming you must not have Git installed from the question, otherwise you would be using git clone as the site shows. On the http://git.xilinx.com, it says the following, Users without Git installed may create a tar file by using the snapshot feature. Select the tree view of the repository (far right side) on this page, then select snapshot (near the top) and a gziped tar file will be created and downloaded. Is this what you're looking for? -- John -Original Message- From: [EMAIL PROTECTED] [mailto:[EMAIL PROTECTED] org] On Behalf Of Alan Casey Sent: Friday, August 15, 2008 6:34 AM To: wangyanlong; linuxppc-embedded@ozlabs.org Subject: Re: Linux issues on Xilinx XUPV2P board Hi, I used version 2.6.24. Current version is 2.6.26+ but im not sure how to download previous versions from the git tree, there should be some info at http://git.xilinx.com about how to do this. Regards, Alan. -- Original Message -- Date: Fri, 15 Aug 2008 04:35:01 -0700 (PDT) From: wangyanlong [EMAIL PROTECTED] To: linuxppc-embedded@ozlabs.org Subject: Re: Linux issues on Xilinx XUPV2P board Hi Alan I dow load the kernel from http://git.xilinx.com/cgi-bin/gitweb.cgi?p=linux-2.6-xlnx.git ;a=summary Merge ../../linux-2.6 into 2.6.26-merge master commit | commitdiff | tree | snapshot this version ,but it not work well,which version you downloaded? Many thanks yanlong Alan Casey wrote: Hi, Yes i had a problem with using one of the Linux 2.6.26 kernel versions on the XUPV2P board where the VGA display has not driven correctly, not sure why. The Linux 2.6.24 kernel from git.xilinx.com works fine. Regards, Alan. -- Original Message -- Date: Fri, 15 Aug 2008 01:43:37 -0700 (PDT) From: wangyanlong [EMAIL PROTECTED] To: linuxppc-embedded@ozlabs.org Subject: Re: Linux issues on Xilinx XUPV2P board I meet the problem as yours . And my vga's display is not clear , have you meet this? Alan Casey wrote: Hi, I have tried running the Linux 2.6.24 and Linux 2.6.26 kernels from git.xilinx.com on the Xilinx XUPV2P board but have run into a few problems. Cross-compiler i use to compile applications was built using Crosstools and based on gcc 3.3.4. I use Xilinx EDK 7.1 for integrating hardware peripherals onto the board. The problems i've seen are: (i) gettimeofday software function returns time of 0 all the time. (ii) The Linux 2.6.24 kernel's Xilinx Framebuffer driver and/or the Xilinx PLB TFT Controller IP block (plb_tft_cntlr_ref_v1_00_d) does not appear to centre the display on a VGA screen properly(vertically offset). (iii) 64-bit write/read access to peripheral integrated onto the Xilinx Virtex-II Pro FPGA either causes a system crash or only lower part of 32-bit data to be written (i.e. lower part of 64-bit data appears to be mirrored on the upper and lower 32-bits of the system bus). However, 32-bit write/read access to the peripheral passes as well as 64-bit write/read access to the SDRAM memory address space. Peripheral interface has been verified to be IBM PLB compliant via IBM bus functional model simulations. (iv) The Linux 2.6.26 Xilinx Framebuffer
RE: ml507 initrd problem
Hi Stu, I realize you are trying to get your own ram disk to work, but if you want to get a baseline you can use one we have on our wiki site, at http://xilinx.wikidot.com/open-source-linux, under Files To Download. This is the same ram disk that is included in the ELDK. This is the ram disk that I use to test the ML507 design in our Git tree. I also use NFS a lot for testing. Looks like you're close with yours, but I'm certainly no expert in that area as I typically have something that works and don't change it. Good luck, John From: [EMAIL PROTECTED] [mailto:[EMAIL PROTECTED] On Behalf Of Stu Bershtein Sent: Tuesday, August 12, 2008 5:28 PM To: linuxppc-embedded@ozlabs.org Subject: ml507 initrd problem I have been trying to boot linux on an ml507 board for a few days now. I am using xilinx's linux-2.6-xlnx.git kernel. The rootfs is home rolled. I have had experience with NFS mounted root filesystems (not an option here), cramfs, and romfs but have never tried running root out of a ramdisk. Because of that I am quite sure I have dorked this up. Any help will be appreciated! I have added printk's in the kernel at do_sys_open to get an idea what is going on. Here is a snip of the boot output: . Kernel command line: console=ttyS0,9600 ip=on init=/linuxrc root=/dev/ram rw ram disk_size=9000 . Serial: 8250/16550 driver $Revision: 1.90 $ 4 ports, IRQ sharing disabled 83e0.serial: ttyS0 at MMIO 0x83e3 (irq = 16) is a 16550A . eth0: XLlTemac: Send Threshold = 0, Receive Threshold = 0 eth0: XLlTemac: Send Wait bound = 0, Receive Wait bound = 0 IP-Config: Incomplete network configuration information. open /dev/ram fd 0 open /initrd.image fd 1 RAMDISK: Compressed image found at block 0 VFS: Mounted root (ext2 filesystem). Freeing unused kernel memory: 144k init open /dev/console fd 0 code 1000 - 1019854c, data 10195000 - 1019854c, stack bf85df00 open /dev/null fd 3 open /etc/inittab fd 3 And it gets very quiet at that point. The kernel is still running in ppc44x_idle. Does this suggest anything to anyone? I'll be more than happy to send or describe any config files to any one who might take pity. Thanks, Stu This email and any attachments are intended for the sole use of the named recipient(s) and contain(s) confidential information that may be proprietary, privileged or copyrighted under applicable law. If you are not the intended recipient, do not read, copy, or forward this email message or any attachments. Delete this email message and any attachments immediately. ___ Linuxppc-embedded mailing list Linuxppc-embedded@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-embedded
RE: ml507 initrd problem
Stu, I'm assuming you're using arch/powerpc. The command line we use in the device tree file, arch/powerpc/boot/dts/ml507.dts, is bootargs = console=ttyS0 ip=on root=/dev/ram; It sounds like you're getting console output til it switches from kernel to user in the ram disk, but your message is a little confusing on that. You should expect the shell output to be on the same serial port at the same baud rate as the boot output of the kernel. Yes the ML507 uses the 9 pin serial connector at 9600 baud. We have removed the linux_support*.gz file when I put the bit streams and ram disk on the wiki site. If you have these files you have everything. You should be able to following the directions on the wiki site to get a baseline working, although I didn't specifically say on the wiki to put the ram disk image in the boot directory before you build or the make command line. The ram disk on our site should work correctly if you are using our kernel with the default configuration, ml507_defconfig. I always advice people to get a good baseline with our stuff then make changes after you see if baselined. -- John From: Stu Bershtein [mailto:[EMAIL PROTECTED] Sent: Wednesday, August 13, 2008 9:34 AM To: John Linn; linuxppc-embedded@ozlabs.org Subject: RE: ml507 initrd problem Morning John, Thanks for the tip. Running said ramdisk things certainly look lively, I'll add a list of opens that I see at boot up at the bottom of this email. Looks like it's opening a shell and everything and yet I see no serial communication from the shell, just quiet. Am I correct to expect the console to be the serial port (9pin DB) on the ml507 board at 9600 baud? Also, if you could spare a desperate person a moment, could you send me the boot command line that you use for testing with the ramdisk? Finally, another member of this form suggested that there is a fully build BSP (rootfs and all) available as 'linux_support.tar.gz' on the Xilinx site. Are you familiar with this? I tried locating it a few days ago to no avail. Thanks very much for your help! Stu Freeing unused kernel memory: 144k init open /dev/console code 1000 - 1009c134, data 1009a128 - 1009c134, stack bfdb9f00 open /lib/libcrypt.so.0 open /lib/libm.so.0 open /lib/libc.so.0 open /dev/console open /dev/console open /etc/TZ open /etc/inittab open /dev/console open /etc/TZ code 1000 - 1009c134, data 1009a128 - 1009c134, stack bfd65eb0 open /lib/libcrypt.so.0 open /lib/libm.so.0 open /lib/libc.so.0 open /etc/rc.sh code 1000 - 1009c134, data 1009a128 - 1009c134, stack bfef2ea0 open /lib/libcrypt.so.0 open /lib/libm.so.0 open /lib/libc.so.0 open /etc/mtab code 1000 - 1009c134, data 1009a128 - 1009c134, stack bf9a8e90 open /lib/libcrypt.so.0 open /lib/libm.so.0 open /lib/libc.so.0 code 1000 - 10039640, data 10039000 - 10039640, stack bfa47e70 open /lib/libm.so.0 open /lib/libcrypt.so.0 open /lib/libc.so.0 open /dev/null open /tmp/xinetd.pid open /etc/xinetd.conf open /etc/xinetd.d open /dev/console open /etc/TZ open /etc/xinetd.d/ftpd open /dev/console code 1000 - 1009c134, data 1009a128 - 1009c134, stack bfda3ea0 open /etc/TZ open /etc/TZ code 1000 - 1009c134, data 1009a128 - 1009c134, stack bf9c5ec0 open /etc/passwd open /etc/xinetd.d/telnet open /lib/libcrypt.so.0 open /etc/TZ open /lib/libm.so.0 open /lib/libcrypt.so.0 open /etc/passwd open /lib/libc.so.0 open /lib/libm.so.0 open /etc/protocols open /bin/application open /lib/libc.so.0 open /etc/services code 1000 - 1009c134, data 1009a128 - 1009c134, stack bffa9ea0 open .profile open /etc/services open /etc/profile open /etc/protocols open /etc/passwd open /etc/services open /lib/libcrypt.so.0 open /etc/services open /lib/libm.so.0 open /etc/TZ open /lib/libc.so.0 open /etc/TZ code 1000 - 1009c134, data 1009a128 - 1009c134, stack bfaa5eb0 open /lib/libcrypt.so.0 open /lib/libm.so.0 open /lib/libc.so.0 From: John Linn [mailto:[EMAIL PROTECTED] Sent: Wednesday, August 13, 2008 7:11 AM To: Stu Bershtein; linuxppc-embedded@ozlabs.org Subject: RE: ml507 initrd problem Hi Stu, I realize you are trying to get your own ram disk to work, but if you want to get a baseline you can use one we have on our wiki site, at http://xilinx.wikidot.com/open-source-linux, under Files To Download. This is the same ram disk that is included in the ELDK. This is the ram disk that I use to test the ML507 design in our Git tree. I also use NFS a lot for testing. Looks like you're close with yours, but I'm certainly no expert in that area as I typically have something that works and don't change it. Good luck, John From: [EMAIL PROTECTED] [mailto:[EMAIL PROTECTED] On Behalf Of Stu Bershtein Sent: Tuesday, August 12, 2008 5:28 PM To: linuxppc-embedded
RE: Board is not booting - Please Help me
Hi Grant, John Bonesio is working with Montavista to get these problems solved. Thanks, John -Original Message- From: [EMAIL PROTECTED] [mailto:linuxppc-embedded- [EMAIL PROTECTED] On Behalf Of Grant Likely Sent: Thursday, July 31, 2008 8:34 PM To: Naresh Bhat Cc: linuxppc-embedded@ozlabs.org Subject: Re: Board is not booting - Please Help me On Wed, Jul 30, 2008 at 01:14:52PM +0530, Naresh Bhat wrote: Hi Guys I have ML507 board. By using ml507_bsb_design_ppc440.zip I have created the Base System Builder project and also I am able to create the following files sucessfully. 1. My own DTS file (attached with the mail) 2. My own download.bit file 3. My own ACE file. (Used the Montavista Pro 5.0 kernel., Kernel is compiled with ARCH=powerpc, CROSS_COMPILE=ppc_440-, used the ml507_defconfig) Unfortunately, I'm not able to help much with the Montavista kernel since I don't know anything about which version it is based on. Have you tried using the current mainline kernel source or Xilinx's published git repo? To use mainline, try copying your .dts file to arch/powerpc/boot/dts/virtex440-myml507.dts and then build the kernel with 'make simpleImage.virtex440-myml507' g. ___ Linuxppc-embedded mailing list Linuxppc-embedded@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-embedded This email and any attachments are intended for the sole use of the named recipient(s) and contain(s) confidential information that may be proprietary, privileged or copyrighted under applicable law. If you are not the intended recipient, do not read, copy, or forward this email message or any attachments. Delete this email message and any attachments immediately. ___ Linuxppc-embedded mailing list Linuxppc-embedded@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-embedded
RE: Xilinx Linux 2.6 for XPS LL_TEMAC and LL_FIFO problem
{resend as I forgot to send to the mailing list)
Hi Mirek,
Since this is a u-boot issue, we can move this conversation off this
list.
The u-boot that is in the git repository has not been tested on the
Virtex4 platform.
I have only tested on the ML507, Virtex 5 platform.
There's not a ML403/ML405 board supported in our git tree, so I'm
curious what you did to try to build it for V4.
There are differences between V4 and V5 with the DMA as it's hard in V5
and hangs off the DCR bus of the processor.
The kernel itself is running on both the ML405 and the ML507, but not
yet with u-boot.
Thanks,
John
-Original Message-
From: [EMAIL PROTECTED]
[mailto:linuxppc-embedded-
[EMAIL PROTECTED] On Behalf Of Mirek23
Sent: Friday, July 25, 2008 5:22 AM
To: linuxppc-embedded@ozlabs.org
Subject: RE: Xilinx Linux 2.6 for XPS LL_TEMAC and LL_FIFO problem
Hi John and Mike,
Thank you for your reply. We have modified out FPGA design and now we
have
LL_TEMAC with LL_DMA component connected instead of the LL_FIFO.
Before
building linux kernel we have tried to build the u-boot (downloaded
from the
xilinx-git tree).
It was relatively easy to build u-boot which has the ll_temac with
ll_dma
support.
next we have tried to run u-boot on our ppc (virtex-4 FX12). All went
fine
till the moment to establish the communication with the network.
I put some debug messages to the xilinx ll_dma and ll_temac drivers
and we
have found that u-boot hangs
during dma initialisation:
more specifically in the function calls :
XLlDma_Initialize(XLlDma * InstancePtr, u32 BaseAddress)
XLlDma_Reset(XLlDma * InstancePtr)
XLlDma_mBdRingSnapShotCurrBd(TxRingPtr);
Do you have any idea what could be wrong with dma initialization?
Best Regards
Mirek
--
View this message in context:
http://www.nabble.com/Compile-time-error%2C-compiling-Xilinx-Linux-2.6-
for-XPS-LLTEMAC-tp16065692p18649823.html
Sent from the linuxppc-embedded mailing list archive at Nabble.com.
___
Linuxppc-embedded mailing list
Linuxppc-embedded@ozlabs.org
https://ozlabs.org/mailman/listinfo/linuxppc-embedded
This email and any attachments are intended for the sole use of the named
recipient(s) and contain(s) confidential information that may be proprietary,
privileged or copyrighted under applicable law. If you are not the intended
recipient, do not read, copy, or forward this email message or any attachments.
Delete this email message and any attachments immediately.
___
Linuxppc-embedded mailing list
Linuxppc-embedded@ozlabs.org
https://ozlabs.org/mailman/listinfo/linuxppc-embedded
RE: Xilinx Linux 2.6 for XPS LL_TEMAC and LL_FIFO problem
Hi Mirek, We are not currently testing the LL TEMAC driver with the LL FIFO. We only test with the DMA configuration. I also realize this may not be documented that well and we may need to work on that. Our reasoning is that in the Virtex5 FXT devices the DMA is hard so that it does not cost any more LUTs to use the DMA and most people want the performance. Is there a specific reason you're wanting to use the LL FIFO rather than DMA as this information might help us in the future? We would welcome any patches to the driver if LL FIFO is a needed feature. Patches can be sent to [EMAIL PROTECTED] Thanks, John -Original Message- From: [EMAIL PROTECTED] [mailto:linuxppc-embedded- [EMAIL PROTECTED] On Behalf Of Koss, Mike (Mission Systems) Sent: Thursday, July 24, 2008 6:56 AM To: Mirek23; linuxppc-embedded@ozlabs.org Subject: RE: Xilinx Linux 2.6 for XPS LL_TEMAC and LL_FIFO problem Mirek, I'm currently using the driver (CONFIG_XILINX_LLTEMAC) with the DMA portion with no problem, which is what you kind of eluded to. From what I've seen, the drver source does support the FIFO portion. It just relies on having the proper definition for the TEMAC in either the DTS or the xparameters. I'm currently using the 2.6.26-rc8 kernel (HEAD?) from git.xilinx.com as well, and mine builds with no problem for arch/ppc. Yes, I still have not moved to arch/powerpc. I will be moving to the new arch in the very near future. (My current test system is actually a mish-mash of 2.6.22 w/ the driver from xilinx-2.6.26 tree). Are you using arch/powerpc or arch/ppc? Are you generating your DTS from your MHS file using the bsp generator for EDK on git.xilinx.com? Is this for one of the reference boards (ML403, ML405, etc)? What is the problem that you're having with the build of the kernel? -- Mike -Original Message- From: Mirek23 [mailto:[EMAIL PROTECTED] Sent: Thursday, July 24, 2008 5:20 AM To: linuxppc-embedded@ozlabs.org Subject: Xilinx Linux 2.6 for XPS LL_TEMAC and LL_FIFO problem Dear All, I have done a design using EDK 8.2 using Hard_Temac IP component. In the EDK 9.2 there is a new idea to use ll_temac in conjunction with ll_fifo or ll_dma. So far I was using happily the linux kernel by Grant Likey. Unfortunately it does not deal with ll_temac. I have download the kernel from git.xilinx.com. I have tried to build the kernel 2.6.26 (by xilinx) but it seems to be that it is not well prepared for ll_fifo. I have noticed that in drivers/xilinx_common there are files related to ll_fifo but in the drivers/Makefile there is no rule to build ll_fifo. The same refers to the file arch/ppc/syslib/virtex_devices.c - there are no entries for LL_FIFO. I have the impression that one can use only LL_DMA but not LL_FIFO. Does anybody has modified the kernel to deal with LL_TEMAC together with LL_FIFO? I will be grateful for any hint. Best Regards Mirek -- View this message in context: http://www.nabble.com/Compile-time-error%2C-compiling-Xilinx-Linux-2.6-f or-XPS-LLTEMAC-tp16065692p18628194.html Sent from the linuxppc-embedded mailing list archive at Nabble.com. ___ Linuxppc-embedded mailing list Linuxppc-embedded@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-embedded This email and any attachments are intended for the sole use of the named recipient(s) and contain(s) confidential information that may be proprietary, privileged or copyrighted under applicable law. If you are not the intended recipient, do not read, copy, or forward this email message or any attachments. Delete this email message and any attachments immediately. ___ Linuxppc-embedded mailing list Linuxppc-embedded@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-embedded
RE: Booting ML405 (Kernel panic - not syncing: No init found)
With regards to arch/ppc: I just built and tested it from the Xilinx Git tree (with ELDK 4.1) and don't see the problem you see. You shouldn't need anything on the command line for the init, but I tried it matching yours without any issue. I noticed that you are using a UART Lite and I test with 16550. We have a reference design available for the 405 also to help you get a baseline before you make changes, you can see where to get it at http://git.xilinx.com http://git.xilinx.com/ also. Getting a good solid baseline before you make changes can make life easier, and maybe you already did this and I don't realize it ;). I can't tell how your kernel is configured, so I would use the Xilinx provided default kernel configuration, then make changes from there (like from 8250 UART and console to UART Lite). make ARCH=ppc ml405_defconfig make ARCH=ppc zImage.initrd Since you pulled from the Xilinx Git tree, you should be able to get the ML405 running easily (assuming I have done my job right). You should be able to use arch/powerpc and it would be best to do that as arch/ppc is not well supported now. If you use the Xilinx default kernel configuration you shouldn't need to do anything (such as finding 405 in the menuconfig) if you use our reference design for the board (bit stream). I just tested from the Xilinx Git tree on the ML405 with arch/powerpc and it looked good (using ELDK 4.1 tools). The following commands should build a kernel that runs on it. You might want to update if you haven't pulled from the Xilinx Git tree in a while (git pull, or clone the tree again in a new directory). make ARCH=powerpc mrproper make ARCH=powerpc ml405_defconfig make ARCH=powerpc zImage.initrd With regards to the fact that you're restricting the memory to 32 Meg, you might get try not doing this to get the kernel running properly, then make that change. Hope that helps, John From: neeraj garg [mailto:[EMAIL PROTECTED] Sent: Thursday, July 10, 2008 1:25 AM To: [EMAIL PROTECTED]; John Linn; [EMAIL PROTECTED] Cc: linuxppc-embedded@ozlabs.org Subject: Re: Booting ML405 (Kernel panic - not syncing: No init found) Hi, Yes I am using ARCH=ppc (actual line is $make ARCH=ppc CROSS_COMPILE=powerpc-405-linux-gnu- zImage.initrd ) for this I have placed ramdisk.image.gz in arch/ppc/boot/images. In case of ARCH=powerpc I cannot find processor type 405 , in make menuconfig. Thats why i am using ARCH=ppc. And when I give kernel command string as init=/bin/sh , it says : Failed to execute /bin/sh. Attempting defaults... [3.744035] Kernel panic - not syncing: No init found. Try passing init= option to kernel. [3.768073] Rebooting in 30 seconds.. --init is present in sbin/init which is a soft link to ../bin/busybox --I used powepc-405-gnu-readelf -h bin/sh to verify that it is compiled for powerpc itself. Any other suggestions ? - Neeraj Garg Grant Likely wrote: On Wed, Jul 09, 2008 at 10:24:13AM +0530, neeraj garg wrote: Hi, I am trying to boot ML405 with Linux source code downloaded from http://www.git.xilinx.com . My cross compiler tool chain version is gcc-3.4.1, glibc-2.3.2 and binutils-2.15. I have also downloaded RAMDISK from same url (http://www.git.xilinx.com). When I download zImage.initrd.elf using XMD everything goes fine, untill RAMDISK is uncompressed, I get following messages : snip [3.736691] Failed to execute /sbin/init. Attempting defaults... [3.748073] Kernel panic - not syncing: No init found. Try passing init= option to kernel. [3.772040] Rebooting in 180 seconds..[ 183.487314] Signal: 8 Try changing the kernel parameters line to specify init=/bin/sh and see what happens. g. This email and any attachments are intended for the sole use of the named recipient(s) and contain(s) confidential information that may be proprietary, privileged or copyrighted under applicable law. If you are not the intended recipient, do not read, copy, or forward this email message or any attachments. Delete this email message and any attachments immediately. ___ Linuxppc-embedded mailing list Linuxppc-embedded@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-embedded
RE: Booting ML405 (Kernel panic - not syncing: No init found)
The only difference I see is the tools, we are using ELDK 4.1 for now. I have tested this on the ML405 in the past, not for a bit as our automated testing uses an NFS root. Since this is arch/ppc (it appears, no boot line), we have stopped work on this architecture and are now encouraging (maybe a stronger word is needed) you to move to arch/powerpc. The arch/ppc was last stable at git tag last-arch-ppc and I know it started getting more unstable after I started pulling in 2.6.26-rcx. We won't be doing any more changes to arch/ppc. -- John -Original Message- From: [EMAIL PROTECTED] [mailto:linuxppc-embedded- [EMAIL PROTECTED] On Behalf Of Grant Likely Sent: Wednesday, July 09, 2008 8:33 AM To: neeraj garg Cc: linuxppc-embedded@ozlabs.org Subject: Re: Booting ML405 (Kernel panic - not syncing: No init found) On Wed, Jul 09, 2008 at 10:24:13AM +0530, neeraj garg wrote: Hi, I am trying to boot ML405 with Linux source code downloaded from http://www.git.xilinx.com . My cross compiler tool chain version is gcc-3.4.1, glibc-2.3.2 and binutils-2.15. I have also downloaded RAMDISK from same url (http://www.git.xilinx.com). When I download zImage.initrd.elf using XMD everything goes fine, untill RAMDISK is uncompressed, I get following messages : snip [3.736691] Failed to execute /sbin/init. Attempting defaults... [3.748073] Kernel panic - not syncing: No init found. Try passing init= option to kernel. [3.772040] Rebooting in 180 seconds..[ 183.487314] Signal: 8 Try changing the kernel parameters line to specify init=/bin/sh and see what happens. g. ___ Linuxppc-embedded mailing list Linuxppc-embedded@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-embedded This email and any attachments are intended for the sole use of the named recipient(s) and contain(s) confidential information that may be proprietary, privileged or copyrighted under applicable law. If you are not the intended recipient, do not read, copy, or forward this email message or any attachments. Delete this email message and any attachments immediately. ___ Linuxppc-embedded mailing list Linuxppc-embedded@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-embedded
RE: booting an ML405
Hi Lorenzo, I'm assuming you're trying to use the reference design bit stream for the ML405 that we have had out on the http://git.xilinx.com site? Since the bootstrap loader is working, the UART appears to be OK. Assuming you have the kernel configuration right with the 8250 driver and the console, it sounds like something else must be wrong and you're headed in the right direction with using the __log_buf. The __log_buf should tell you if the kernel is really hung, or if it booted and you just don't have a console working. The ml405_defconfig sets up the kernel configuration so it should work on the board just building it for the reference design. One thing I notice is the available ram looks wrong to me for the ML405 based on my notes. avail ram: 005B 8000 I had a problem once with the kernel and I found the DDR_SIZE in xparameters.h (arch/ppc/platforms/40x/xparameters) was not right, and this does hang the kernel in my experience. My old kernel output shows avail ram: 00519000 0400 Hope that might help, John -Original Message- From: [EMAIL PROTECTED] [mailto:linuxppc-embedded- [EMAIL PROTECTED] On Behalf Of Lorenzo T. Flores Sent: Thursday, July 03, 2008 7:05 PM To: linuxppc-embedded@ozlabs.org Subject: booting an ML405 Hey all, I did a little preliminary poking through the thread archives, but didn't turn anything up. I anyone could just point me in the right direction as far as troubleshooting, that would be great! I'm trying to compile the Xilinx patched kernel tree (v2.6.25-rc9) and run it on an ML405 So far, I get to the following point in the boot sequence: loaded at: 0040 005AF5A0 board data at: 005AD524 005AD5A0 relocated to: 00405058 004050D4 zimage at: 00405E90 0051D6CC initrd at: 0051E000 005ACC0D avail ram: 005B 8000 Linux/PPC load: console=ttyS0,9600 ip=on root=/dev/ram rw Uncompressing Linux...done. Now booting the kernel The system hangs after it says Now booting the kernel. Once again, any input would be appreciated. thank you, Lorenzo ___ Linuxppc-embedded mailing list Linuxppc-embedded@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-embedded This email and any attachments are intended for the sole use of the named recipient(s) and contain(s) confidential information that may be proprietary, privileged or copyrighted under applicable law. If you are not the intended recipient, do not read, copy, or forward this email message or any attachments. Delete this email message and any attachments immediately. ___ Linuxppc-embedded mailing list Linuxppc-embedded@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-embedded
RE: Linux on Virtex board with ARCH=powerpc
Hi Peter,
With regard to CONFIG_PPC_UDBG... we have a patch ready that I need to
apply to the Git tree and I'll expedite that.
With the console and UART Lite, the only thing I could think of is
making sure you have a dev entry for the UART Lite.
I'm assuming all the boot messages about the console, enabled, look
the same as the 550 as I have seen that give hints to problems
sometimes.
Thanks,
John
-Original Message-
From: Peter Mendham [mailto:[EMAIL PROTECTED]
Sent: Friday, June 27, 2008 6:31 AM
To: John Linn
Cc: linuxppc-embedded@ozlabs.org
Subject: Re: Linux on Virtex board with ARCH=powerpc
Hi John,
Yes, with regard to the non-functional sysace, I was being an idiot: I
had a small hw problem which now that I have fixed it, the kernel now
reports that my drive is mounted.
I now have a new and rather bizarre problem, which maybe you or someone
else has met before. I have a simple FPGA design with memory, a sysace
and a uart16550 on an ML405 (I've put my hardware to one side for the
moment). It works just fine. If I swap the uart16550 for a uartlite
(remaking the kernel with the correct device tree) I see all the boot
messages and the kernel seems to start OK, the root partition is mounted
but then I see nothing from /sbin/init. This is the same root fs that I
was using with the uart16550 example I just mentioned. So it's a known
good root fs, but it doesn't appear to be able to output to /dev/console
when I have a uartlite instead of a uart16550. I have selected console
support for uartlite. Any ideas?
Incidentally, the uart16550 solution did not work until I removed
CONFIG_PPC_UDBG_16550 - the kernel was getting stuck in udbg_550_putc
indefinitely.
Thanks,
-- Peter
John Linn wrote:
Hi Peter,
I think you'll get a baseline quicker this way and then you can go on
other less known paths after that.
In my experience, this message happens when there is no compact flash
in
the slot of the board.
I have the system ace device as /dev/xsa2 in my notes, but I have only
used it much. Sorry it's not one of my primary test cases at this
point
in time.
Thanks,
John
-Original Message-
From: Peter Mendham [mailto:[EMAIL PROTECTED]
Sent: Thursday, June 26, 2008 7:24 AM
To: John Linn
Cc: linuxppc-embedded@ozlabs.org
Subject: Re: Linux on Virtex board with ARCH=powerpc
Hi John,
OK, I've given in and I'm using the xilinx git code now :) It now
shows
some signs of life, thanks, but the sysace driver is not happy. My
root
fs is on cf and I'm not using initrd. The driver loads then gets
stuck,
repeatedly saying:
xsysace 8003.sysace: kicking stalled fsm; state=2 task=0 iter=1
dc=0
I notice from the driver source that state 2 is the driver attempting
to
acquire the mpu lock. I have tried the standard xilinx sysace
selftest
code which just acquires and frees the lock (which is fine) so the
hardware should be OK (I hope). I have the sysace hooked up to an irq
(the only one), I have no idea whether the dts is correct but it seems
to compare favourably with the ml405 one; mine says (the important
bits):
intc: [EMAIL PROTECTED] {
#interrupt-cells = 2;
compatible = xlnx,xps-intc-1.00.a;
interrupt-controller ;
reg = 8001 1 ;
xlnx,num-intr-inputs = 1;
} ;
sysace: [EMAIL PROTECTED] {
compatible = xlnx,xps-sysace-1.00.a;
interrupt-parent = intc;
interrupts = 0 2 ;
reg = 8003 1 ;
xlnx,family = virtex4;
xlnx,mem-width = 10;
} ;
Do you have any ideas?
Thanks,
-- Peter
John Linn wrote:
Hi Peter,
To some extent I think you're trying to re-invent the wheel here, but
I
understand why.
Ideally, you would be able to pull from the mainline kernel to build
this, but Xilinx hasn't got our code into the mainline. We are
working
on it more proactively now.
So, in the meantime, it would be easier for you to pull from the
Xilinx
git tree as we have solved the problems you are solving I believe.
Git://git.xilinx.com/linux-2.6-xlnx or http://git.xilinx.com/...
We supply the device tree files and kernel configurations for the
ML405
and ML507 boards to help get started.
Thanks and sorry for the inconvenience,
John
-Original Message-
From: Peter Mendham [mailto:[EMAIL PROTECTED]
Sent: Wednesday, June 25, 2008 10:18 AM
To: John Linn
Cc: linuxppc-embedded@ozlabs.org
Subject: Re: Linux on Virtex board with ARCH=powerpc
OK, this is all new to me, so please bear with me if I've made a
major
mistake. I ran the kernel until it didn't give me anymore output and
then told xmd to stop, mrd from any location gave me exactly the
same
32-bit word of garbage. I then reset the processor and mrd would
give
me what looked like reasonable
RE: Linux on Virtex board with ARCH=powerpc
Hi Peter,
I think you'll get a baseline quicker this way and then you can go on
other less known paths after that.
In my experience, this message happens when there is no compact flash in
the slot of the board.
I have the system ace device as /dev/xsa2 in my notes, but I have only
used it much. Sorry it's not one of my primary test cases at this point
in time.
Thanks,
John
-Original Message-
From: Peter Mendham [mailto:[EMAIL PROTECTED]
Sent: Thursday, June 26, 2008 7:24 AM
To: John Linn
Cc: linuxppc-embedded@ozlabs.org
Subject: Re: Linux on Virtex board with ARCH=powerpc
Hi John,
OK, I've given in and I'm using the xilinx git code now :) It now shows
some signs of life, thanks, but the sysace driver is not happy. My root
fs is on cf and I'm not using initrd. The driver loads then gets stuck,
repeatedly saying:
xsysace 8003.sysace: kicking stalled fsm; state=2 task=0 iter=1 dc=0
I notice from the driver source that state 2 is the driver attempting to
acquire the mpu lock. I have tried the standard xilinx sysace selftest
code which just acquires and frees the lock (which is fine) so the
hardware should be OK (I hope). I have the sysace hooked up to an irq
(the only one), I have no idea whether the dts is correct but it seems
to compare favourably with the ml405 one; mine says (the important
bits):
intc: [EMAIL PROTECTED] {
#interrupt-cells = 2;
compatible = xlnx,xps-intc-1.00.a;
interrupt-controller ;
reg = 8001 1 ;
xlnx,num-intr-inputs = 1;
} ;
sysace: [EMAIL PROTECTED] {
compatible = xlnx,xps-sysace-1.00.a;
interrupt-parent = intc;
interrupts = 0 2 ;
reg = 8003 1 ;
xlnx,family = virtex4;
xlnx,mem-width = 10;
} ;
Do you have any ideas?
Thanks,
-- Peter
John Linn wrote:
Hi Peter,
To some extent I think you're trying to re-invent the wheel here, but
I
understand why.
Ideally, you would be able to pull from the mainline kernel to build
this, but Xilinx hasn't got our code into the mainline. We are
working
on it more proactively now.
So, in the meantime, it would be easier for you to pull from the
Xilinx
git tree as we have solved the problems you are solving I believe.
Git://git.xilinx.com/linux-2.6-xlnx or http://git.xilinx.com/...
We supply the device tree files and kernel configurations for the
ML405
and ML507 boards to help get started.
Thanks and sorry for the inconvenience,
John
-Original Message-
From: Peter Mendham [mailto:[EMAIL PROTECTED]
Sent: Wednesday, June 25, 2008 10:18 AM
To: John Linn
Cc: linuxppc-embedded@ozlabs.org
Subject: Re: Linux on Virtex board with ARCH=powerpc
OK, this is all new to me, so please bear with me if I've made a major
mistake. I ran the kernel until it didn't give me anymore output and
then told xmd to stop, mrd from any location gave me exactly the
same
32-bit word of garbage. I then reset the processor and mrd would give
me what looked like reasonable values. I found the __log_buf symbol
in
the System.map file (0xc024a108) and tried mrd on what I assume is the
corresponding physical address of 0x0024a108. I get the following:
6Using Xilinx Virtex machine description
5Linux version 2.6.26-rc6 ([EMAIL PROTECTED]) (gcc version 4.2.4) #9
PREEMPT
Wed Jun 25 16:27:33 BST 2008
7Entering add_active_range(0, 0, 131072) 0 entries of 256 used
7Top of RAM: 0x2000, Total RAM: 0x2000
7Memory hole size: 0MB
4Zone PFN ranges:
4 DMA 0 - 131072
4 Normal 131072 - 131072
4Movable zone start PFN for each node
4early_node_map[1] active PFN ranges
40:0 - 131072
7On node 0 totalpages: 131072
7 DMA zone: 1024 pages used for memmap
7 DMA zone: 0 pages reserved
7 DMA zone: 130048 pages, LIFO batch:31
7 Normal zone: 0 pages used for memmap
7 Movable zone: 0 pages used for memmap
4Built 1 zonelists in Zone order, mobility grouping on. Total
pages:
130048
5Kernel command line: console=ttyUL0 root=/dev/xsa2 rw
6Xilinx intc at 0xFDFFF000C025CFFC mapped to 0x025d
4PID hash table entries: 2048 (order: 11, 8192 bytes)
xmd tells me that the processor stopped at 0xc000fe50, and subsequent
con and stop sequences do no move this on (it reports the same
each
time). Below is a choice excerpt of my System.map:
c000fdc4 t src_error
c000fddc t dst_error
c000fdf4 T __div64_32
c000fe94 T cacheable_memzero
c000ff38 T memset
So I guess that means it's in __div64_32?
Any ideas?
Thanks in advance,
-- Peter
John Linn wrote:
Sounds like the bootstrap loader has loaded the kernel and passed off
execution to it, but there's no console working on the kernel.
You can confirm that since you have a probe as you can dump the
__log_buf by getting the address of it using objdump on the elf
image.
It's a pain to convert to readable form, but can
RE: Linux on Virtex board with ARCH=powerpc
Hi Peter,
To some extent I think you're trying to re-invent the wheel here, but I
understand why.
Ideally, you would be able to pull from the mainline kernel to build
this, but Xilinx hasn't got our code into the mainline. We are working
on it more proactively now.
So, in the meantime, it would be easier for you to pull from the Xilinx
git tree as we have solved the problems you are solving I believe.
Git://git.xilinx.com/linux-2.6-xlnx or http://git.xilinx.com/...
We supply the device tree files and kernel configurations for the ML405
and ML507 boards to help get started.
Thanks and sorry for the inconvenience,
John
-Original Message-
From: Peter Mendham [mailto:[EMAIL PROTECTED]
Sent: Wednesday, June 25, 2008 10:18 AM
To: John Linn
Cc: linuxppc-embedded@ozlabs.org
Subject: Re: Linux on Virtex board with ARCH=powerpc
OK, this is all new to me, so please bear with me if I've made a major
mistake. I ran the kernel until it didn't give me anymore output and
then told xmd to stop, mrd from any location gave me exactly the same
32-bit word of garbage. I then reset the processor and mrd would give
me what looked like reasonable values. I found the __log_buf symbol in
the System.map file (0xc024a108) and tried mrd on what I assume is the
corresponding physical address of 0x0024a108. I get the following:
6Using Xilinx Virtex machine description
5Linux version 2.6.26-rc6 ([EMAIL PROTECTED]) (gcc version 4.2.4) #9 PREEMPT
Wed Jun 25 16:27:33 BST 2008
7Entering add_active_range(0, 0, 131072) 0 entries of 256 used
7Top of RAM: 0x2000, Total RAM: 0x2000
7Memory hole size: 0MB
4Zone PFN ranges:
4 DMA 0 - 131072
4 Normal 131072 - 131072
4Movable zone start PFN for each node
4early_node_map[1] active PFN ranges
40:0 - 131072
7On node 0 totalpages: 131072
7 DMA zone: 1024 pages used for memmap
7 DMA zone: 0 pages reserved
7 DMA zone: 130048 pages, LIFO batch:31
7 Normal zone: 0 pages used for memmap
7 Movable zone: 0 pages used for memmap
4Built 1 zonelists in Zone order, mobility grouping on. Total pages:
130048
5Kernel command line: console=ttyUL0 root=/dev/xsa2 rw
6Xilinx intc at 0xFDFFF000C025CFFC mapped to 0x025d
4PID hash table entries: 2048 (order: 11, 8192 bytes)
xmd tells me that the processor stopped at 0xc000fe50, and subsequent
con and stop sequences do no move this on (it reports the same each
time). Below is a choice excerpt of my System.map:
c000fdc4 t src_error
c000fddc t dst_error
c000fdf4 T __div64_32
c000fe94 T cacheable_memzero
c000ff38 T memset
So I guess that means it's in __div64_32?
Any ideas?
Thanks in advance,
-- Peter
John Linn wrote:
Sounds like the bootstrap loader has loaded the kernel and passed off
execution to it, but there's no console working on the kernel.
You can confirm that since you have a probe as you can dump the
__log_buf by getting the address of it using objdump on the elf image.
It's a pain to convert to readable form, but can help to see that
things
are indeed running. Stop the processor, then do the memory read
command,
mrd, in xmd.
For the console to work with UART Lite, CONFIG_OF must be on in the
kernel configuration, I would check that.
The file, arch/powerpc/boot/virtex.c, has the startup code for the
virtex specific processing. It checks to make sure there is
compatible
hardware based on the device tree. If your device tree doesn't match
that hardware you could have a problem. I have not found the powerup
of
the kernel to be very informative if the device tree is wrong.
I pasted in our ML405 device tree below to allow you to compare to it.
Hope that helps,
John
/*
* (C) Copyright 2007 Michal Simek
*
* Michal SIMEK [EMAIL PROTECTED]
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*
* CAUTION: This file is automatically generated by libgen.
* Version: Xilinx EDK 10.1.1 EDK_K_SP1.1
*/
/ {
#address-cells = 1;
#size-cells = 1;
compatible = xlnx,virtex;
model = testing;
DDR_SDRAM: [EMAIL PROTECTED] {
device_type = memory;
reg = 0 800 ;
} ;
chosen {
bootargs = console=ttyS0 ip=on root=/dev/ram;
linux,stdout-path = /[EMAIL PROTECTED]/[EMAIL PROTECTED
RE: Linux on Virtex board with ARCH=powerpc
Hi Peter, I'm not up on what can be done with the simple image you refer to in 1. I'm sure I should be, but there's a lot to learn. With regards to 2, the elf image, zImage (without the elf extension), is located in arch/powerpc/boot. You can make a SystemACE file from that elf image just as you did in arch/ppc. We have a default device tree file, ml405.dts, in the arch/powerpc/boot/dts directory for our ml405 board. The kernel configuration has a config, DEVICE_TREE, that specifies the name of the device tree file. I normally compile the device tree into the kernel which is the default build, make ARCH=powerpc zImage. That image does not require a boot loader. I inserted the text below from a document that I have about building the arch/ppc and arch/powerpc kernels. Hope that helps, John Notation The phrase ppc or powerpc is used throughput the text and means that one or the other, ppc or powerpc is to be typed depending on the architecture you are building. Commands that are used in a bash shell are preceded by . Getting Ready To Build the Kernel This assumes you installed the ELDK tools and assumes you'll be using a bash shell. bash export CROSS_COMPILE=ppc_4xx- Setting Up the Kernel Tree If you have previously built this kernel for another architecture, ppc or powerpc, then the tree needs to be setup correctly for the new architecture. Assuming you have not previously built it, this does not need to be done. make ARCH=ppc or powerpc mrproper Configuring the Kernel The kernel should be configured to run on the ML405 or ML507 board from Xilinx. make ARCH=ppc or powerpc ml405_defconfig or make ARCH=ppc or powerpc ml507_defconfig Building the Kernel The following command will build the Linux kernel assuming you are in the root directory of the kernel. The root directory of the kernel from the Xilinx Git tree is linux-2.6-xlnx. An elf file, zImage.elf, is created in the arch/ppc/boot/images directory for ppc architecture. An elf file, zImage, is created in the the arch/powerpc/boot directory for the powerpc architecture. make ARCH=ppc or powerpc zImage Building the Kernel With Ramdisk A ram disk image, a file named *.gz, must be placed into the arch/ppc/boot/images or arch/powerpc/boot directory, depending on the architecture, prior to building the kernel. make ARCH=ppc or powerpc zImage.initrd An elf file, zImage.initrd.elf, is created in arch/ppc/boot/images directory for the ppc architecture. An elf file file, zImage.initrd, is created in arch/powerpc/boot directory for the powerpc architecture. Generating An Ace File The elf file generated for the kernel and the bit stream can be combined to create an ACE file for compact flash. The following assumes a bash shell where XMD is accessible and a xilinx probe attached to the board for which you are generating an ace file. xmd -tcl genace.tcl -jprog -target ppc_hw -hw bit file name -elf elf file name -board ml405 or ml507 -ace desired ace file name -Original Message- From: [EMAIL PROTECTED] [mailto:[EMAIL PROTECTED] On Behalf Of Peter Mendham Sent: Tuesday, June 24, 2008 3:02 AM To: linuxppc-embedded@ozlabs.org Subject: Linux on Virtex board with ARCH=powerpc Dear all, I'm trying to boot a 2.6.26-rc6 kernel on a custom Virtex 4 board. I have used the Xilinx utility to generate a device tree and now want to generate an image for throwing onto CF for use with a SystemACE (just like on the the ML3/4xx boards). I don't want to use a bootloader (I don't really need one). I saw something on this list about simpleImage, simple sounded good to me so I thought I'd try that (or did I misinterpret what this is for?). I also don't want the image to be too big, I always used to use a zImage under ARCH=ppc. So, two questions, which hopefully are easy ones: 1. I did what Grant said in a post to this list about simpleImage, and dumped my dts into arch/powerpc/boot/dts and I called it system.dts (for now). I then tried to do make simpleImage.system which ran right through to final link then moaned about a missing simpleboot-system. Where is this supposed to come from? What am I doing wrong? I naively tried copying simpleboot.o to simpleboot-system.o and the error went away. Hmm. 2. I need an ELF to give to my SystemACE file generator. This used to pop up in arch/ppc/boot/images and be called zImage.elf, which made sense to me. What's the deal now with powerpc? What should I be using? Finally, can anyone give me a heads-up on any gotchas with what I'm trying to do. As you can tell, I don't entirely know what I'm doing, so any pointers would be gratefully received. Thanks, -- Peter The University of Dundee is a Scottish Registered Charity, No. SC015096. ___ Linuxppc-embedded mailing list Linuxppc-embedded@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-embedded This email and any attachments are intended for the sole use of
RE: Linux on Virtex board with ARCH=powerpc
;
xlnx,family = virtex4;
xlnx,gpio-width = 4;
xlnx,interrupt-present = 1;
xlnx,is-bidir = 1;
xlnx,is-bidir-2 = 1;
xlnx,is-dual = 0;
xlnx,tri-default = ;
xlnx,tri-default-2 = ;
} ;
RS232_Uart: [EMAIL PROTECTED] {
compatible = ns16550;
device_type = serial;
interrupt-parent = xps_intc_0;
interrupts = 6 2 ;
reg = 83e0 1 ;
reg-offset = 3;
reg-shift = 2;
clock-frequency = 05f5e100;
xlnx,family = virtex4;
xlnx,has-external-rclk = 0;
xlnx,has-external-xin = 0;
xlnx,is-a-16550 = 1;
} ;
SysACE_CompactFlash: [EMAIL PROTECTED] {
compatible = xlnx,xps-sysace-1.00.a;
interrupt-parent = xps_intc_0;
interrupts = 3 2 ;
reg = 8360 1 ;
xlnx,family = virtex4;
xlnx,mem-width = 10;
} ;
TriMode_MAC_GMII: [EMAIL PROTECTED] {
#address-cells = 1;
#size-cells = 1;
compatible = xlnx,compound;
[EMAIL PROTECTED] {
compatible = xlnx,xps-ll-temac-1.01.a;
device_type = network;
interrupt-parent = xps_intc_0;
interrupts = 2 2 ;
llink-connected = PIM2;
local-mac-address = [ 02 00 00 00 00 01
];
reg = 81c0 40 ;
xlnx,bus2core-clk-ratio = 1;
xlnx,phy-type = 1;
xlnx,phyaddr = 1;
xlnx,rxcsum = 0;
xlnx,rxfifo = 1000;
xlnx,temac-type = 1;
xlnx,txcsum = 0;
xlnx,txfifo = 1000;
} ;
} ;
[EMAIL PROTECTED] {
#address-cells = 1;
#size-cells = 1;
compatible = xlnx,mpmc-4.00.a;
PIM2: [EMAIL PROTECTED] {
compatible = xlnx,ll-dma-1.00.a;
interrupt-parent = xps_intc_0;
interrupts = 1 2 0 2 ;
reg = 84600100 80 ;
} ;
} ;
xps_bram_if_cntlr_1: [EMAIL PROTECTED] {
compatible = xlnx,xps-bram-if-cntlr-1.00.a;
reg = e000 2000 ;
xlnx,family = virtex4;
} ;
xps_intc_0: [EMAIL PROTECTED] {
#interrupt-cells = 2;
compatible = xlnx,xps-intc-1.00.a;
interrupt-controller ;
reg = 8180 1 ;
xlnx,num-intr-inputs = 7;
} ;
} ;
ppc405_0_dplb1: [EMAIL PROTECTED] {
#address-cells = 1;
#size-cells = 1;
compatible = xlnx,plb-v46-1.02.a;
ranges ;
} ;
} ;
-Original Message-
From: Peter Mendham [mailto:[EMAIL PROTECTED]
Sent: Tuesday, June 24, 2008 1:21 PM
To: John Linn
Cc: linuxppc-embedded@ozlabs.org
Subject: Re: Linux on Virtex board with ARCH=powerpc
Hi John,
Thanks for your reply, that's really helpful. I'm actually using the
mainline kernel, rather than the one from the xilinx git tree, but your
information has really moved me on. My first problem was that the
Xilinx utility (from the git tree) for device tree dts generation didn't
insert a linux,stdout-path node under chosen. I spotted that the
ml403 example had this, so after adding it I got early console
messages. Everything now grinds to a halt after I get the message flat
tree at 0x40ad60 which is just before it calls the kernel, so I assume
it's that call that is killing it. I have console=ttyUL0 for my
uartlite, so I should be getting messages, shouldn't I? Do you know
where the next execution point is? Maybe I could find out where it's
getting stuck.
I haven't managed to generate an ACE file, I'm just loading the kernel
image from xmd ATM, genace won't play ball for me, it complains about
-board user not being valid
RE: PPC to PowerPC Migration
Hi Andrew, We have a git server with the kernel running on the ML405 (V4) and ML507 (V5) Xilinx boards with arch/powerpc at git://git.xilinx.com. The default configuration, using ml507_defconfig or ml405_defconfig, uses a static device tree located in the arch/powerpc/boot/dts directory. make ARCH=powerpc zImage make ARCH=powerpc zImage.initrd (for a ramdisk image, after putting ramdisk image in arch/powerpc/boot directory) zImage file is located in arch/powerpc/boot directory. On the http://git.xilinx.com site, there's some tar files with a bit stream to match the default kernel configuration. Maybe this is not what you're looking for, but thought I'd offer. Others have used this to get their own boards running with Linux. Look at Documentation/powerpc/booting-without-of.txt for some device tree information. Thanks, John Linn Linux Development Strategy Xilinx is looking for more embedded Linux developers. -Original Message- From: [EMAIL PROTECTED] [mailto:[EMAIL PROTECTED] On Behalf Of Andy Schmidt Sent: Tuesday, June 10, 2008 11:49 AM To: linuxppc-embedded@ozlabs.org Subject: PPC to PowerPC Migration I am wondering if anyone has seen any good documentation for migrating from the arch/ppc to arch/powerpc. Specifically, I am working with a Xilinx board so I am more accustom to the xparamters.h vs. device trees. I am very willing to build a (or multiple) tutorials to help others in my situation, I just need some initial help getting started. If anyone can point me in the right direction, I will be sure to keep the group (or those interested) updated on the documentation. Thank you, Andrew ___ Linuxppc-embedded mailing list Linuxppc-embedded@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-embedded This email and any attachments are intended for the sole use of the named recipient(s) and contain(s) confidential information that may be proprietary, privileged or copyrighted under applicable law. If you are not the intended recipient, do not read, copy, or forward this email message or any attachments. Delete this email message and any attachments immediately. ___ Linuxppc-embedded mailing list Linuxppc-embedded@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-embedded
RE: linux 2.6 hangs at __delay function on Viretx 4 board
Hi Peter, Yes you need to enable UARTLITE as the console in the kernel configuration. You have the command line syntax, ttyUL0, correct. They have now changed the UART 16550 to be a free core in the EDK, not sure which version of the EDK that happened. Thanks, John -Original Message- From: [EMAIL PROTECTED] [mailto:[EMAIL PROTECTED] On Behalf Of Peter Korsgaard Sent: Wednesday, June 04, 2008 2:56 AM To: swamydp Cc: linuxppc-embedded@ozlabs.org Subject: Re: linux 2.6 hangs at __delay function on Viretx 4 board swamydp == swamydp [EMAIL PROTECTED] writes: swamydp Hi John swamydp I am using UARTLITE as serial console. I do not have license swamydp for UART 16550. I have enabled the drivers for uartlite in swamydp menuconfig while configuring the kernel. I have tested all swamydp combinations for the kernel command line - tty0, ttyUL0, swamydp ttyl0, ttyS0 but could not get uartlite to output kernel swamydp printk messages. Correct syntax is console=ttyUL0 swamydp Since I am using uartlite , the following settings are swamydp turned off in menuconfig swamydp CONFIG_SERIAL_8250=n swamydp CONFIG_SERIAL_8250_CONSOLE=n Do you have console on uartlite (CONFIG_SERIAL_UARTLITE_CONSOLE) enabled? -- Bye, Peter Korsgaard ___ Linuxppc-embedded mailing list Linuxppc-embedded@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-embedded This email and any attachments are intended for the sole use of the named recipient(s) and contain(s) confidential information that may be proprietary, privileged or copyrighted under applicable law. If you are not the intended recipient, do not read, copy, or forward this email message or any attachments. Delete this email message and any attachments immediately. ___ Linuxppc-embedded mailing list Linuxppc-embedded@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-embedded
RE: ML507 EDK 10.1
Hi Neelu, The easiest way to get a good baseline with the board and the kernel is to use the bitstream for the board that we provide in the file, linux_support.tar.gz, on http://git.xilinx.com. In the PPC440 directory of the support file, there's a bit stream for the board. If you don't use a Xilinx probe to download to the board, you will need to create an ACE file from that bit stream, but it sounds like you know how to do that. I know the state of the Xilinx Git tree, but I don't know the state of Grant's for sure. We have baselined our Git tree such that you should be able to make it work quick and easy (that's our goal). To build arch/powerpc, the following commands should create zImage in the arch/powerpc/boot directory that can be used with the bitstream from the linux_support.tar.gz file. I am currently using the ELDK 4.1 tools to build the kernel. make ARCH=powerpc ml507_defconfig make ARCH=powerpc zImage We also provide a ramdisk image in the support file, you can build it also after copying the ramdisk images into the arch/powerpc/boot directory. The default command line of the kernel, in the ml507.dts file in the arch/powerpc/boot/dts directory, is setup to use the ramdisk. make ARCH=powerpc zImage.initrd Hope that helps, John Linn -Original Message- From: [EMAIL PROTECTED] [mailto:[EMAIL PROTECTED] On Behalf Of somshekar c kadam Sent: Monday, June 02, 2008 4:19 PM To: linuxppc-embedded@ozlabs.org Subject: ML507 EDK 10.1 Hi All, Currently I am working with ML507 Base Reference design. I have installed Eval 10.1 edk I am bale to create ace file using xmd with base download.bit. and able to boot the board. Now I want to boot the board with Xilinx Linux kernel from Xilinx git tree. I am facing compilation problem with zImage.dts for ml507_defconfig. now I need to create ace file for Linux for ML507. I tried creating zImage.dts its failing. Kernel error see below Please help or give some pointers wherein I can compile zImge.dts. this is from latest git tree. Seems for me arch/powerpc wrapper code is broken. Please suggest. currently I have no bdi I need to stick to Ace compact Flash booting. Also bit confused where we have two git tree one is Xilinx git tree one more from Grant Likely which should I use ? Thanks In Advance Neelu --- WRAParch/powerpc/boot/zImage.dts DTC: dts-dtb on file /home/neelu/xilinx/xilinx_gittree/test44/linux-2.6-xlnx/arch/powerpc/bo ot/dts/ml507.dts objcopy: Unable to recognise the format of the input file `vmlinux' make[1]: *** [arch/powerpc/boot/zImage.dts] Error 1 make: *** [zImage.dts] Error 2 WIth Verbose =1 /bin/sh /home/neelu/xilinx/xilinx_gittree/test44/linux-2.6-xlnx/arch/powerpc/boo t/wrapper -c -o arch/powerpc/boot/zImage.dts -p dts -s /home/neelu/xilinx/xilinx_gittree/test44/linux-2.6-xlnx/arch/powerpc/boo t/dts/ml507.dts vmlinux + kernel= + ofile=zImage + platform=of + initrd= + dtb= + dts= + cacheit= + binary= + gzip=.gz + CROSS= + object=arch/powerpc/boot + objbin=arch/powerpc/boot + tmpdir=. + '[' 8 -gt 0 ']' + case $1 in + cacheit=y + shift + '[' 7 -gt 0 ']' + case $1 in + shift + '[' 6 -gt 0 ']' + ofile=arch/powerpc/boot/zImage.dts + shift + '[' 5 -gt 0 ']' + case $1 in + shift + '[' 4 -gt 0 ']' + platform=dts + shift + '[' 3 -gt 0 ']' + case $1 in + shift + '[' 2 -gt 0 ']' + dts=/home/neelu/xilinx/xilinx_gittree/test44/linux-2.6-xlnx/arch/powerpc /boot/dts/ml507.dts + shift + '[' 1 -gt 0 ']' + case $1 in + '[' -z '' ']' + kernel=vmlinux + shift + '[' 0 -gt 0 ']' + '[' -n /home/neelu/xilinx/xilinx_gittree/test44/linux-2.6-xlnx/arch/powerpc/boo t/dts/ml507.dts ']' + '[' '!' -r /home/neelu/xilinx/xilinx_gittree/test44/linux-2.6-xlnx/arch/powerpc/boo t/dts/ml507.dts -a -r arch/powerpc/boot/dts//home/neelu/xilinx/xilinx_gittree/test44/linux-2.6 -xlnx/arch/powerpc/boot/dts/ml507.dts ']' + '[' -z '' ']' + dtb=dts.dtb + arch/powerpc/boot/dtc -O dtb -o dts.dtb -b 0 /home/neelu/xilinx/xilinx_gittree/test44/linux-2.6-xlnx/arch/powerpc/boo t/dts/ml507.dts DTC: dts-dtb on file /home/neelu/xilinx/xilinx_gittree/test44/linux-2.6-xlnx/arch/powerpc/bo ot/dts/ml507.dts + '[' -z vmlinux ']' + platformo=arch/powerpc/boot/dts.o + lds=arch/powerpc/boot/zImage.lds + ext=strip + objflags=-S + tmp=./zImage.24209.o + ksection=.kernel:vmlinux.strip + isection=.kernel:initrd + case $platform in ++ basename vmlinux + vmz=./vmlinux.strip + '[' -z y -o '!' -f ./vmlinux.strip.gz -o ./vmlinux.strip.gz -ot vmlinux ']' + objcopy -S vmlinux ./vmlinux.strip.24209 objcopy: Unable to recognise the format of the input file `vmlinux' make[1]: *** [arch/powerpc/boot/zImage.dts] Error 1 make: *** [zImage.dts] Error 2 -- ___ Linuxppc-embedded mailing list Linuxppc-embedded@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-embedded This email and any
RE: linux 2.6 hangs at __delay function on Viretx 4 board
Hi Swamy, Sorry for the long delay. Sounds like the console is not setup correctly. I notice in your command line it appears that you have 2 console statements. I have not tested this ever and I would change it to only have the console=ttyS0,9600. I have seen other mailings, no Xilinx specific, related to this causing problems. This console setup assumes you're using the Xilinx 16550 UART. It could be an issue with the xparameters*.h file with the address of the UART. Have you compared your arch/ppc/platforms/4xx/xparameters/xparameters*.h file, whichever one it's setup to use, to the ones that we provided in the Git tree? I'm assuming you have the kernel configured correctly to use the UART16550 driver and the console is turned on, both are needed. The 16550 is 8250 compatible (mostly) and works with it's driver from Linux. CONFIG_SERIAL_8250=y CONFIG_SERIAL_8250_CONSOLE=y Thanks, John -Original Message- From: [EMAIL PROTECTED] [mailto:[EMAIL PROTECTED] On Behalf Of swamydp Sent: Monday, May 26, 2008 10:12 PM To: linuxppc-embedded@ozlabs.org Subject: RE: linux 2.6 hangs at __delay function on Viretx 4 board Hi John Please ignore my previous message. The kernel boots until initializing the root files system and then hangs. Thats expected since I do not have root file system set up yet. I dumped the __log_buf and found it. I don't understand why no message is printed by printk after Now booting. Does console init occur after root file system init ? Thanks swamy swamydp wrote: Hi John Sorry for getting back late. I have been debugging further using the UART to send output directly to serial post. Now I see that just after entering start_kernel, a ITLB miss exception occurs and linux hangs at that point. Looks like the kernel is probably not running at all yet, may stuck in early initialization. Yes 1. Has the kernel ever ran on this board or is this development to get it running? No. This is a new board and I am trying to build a simple EDK system with only PPC, UART, PIC as the devices. 2. Not sure on the tools you are using to build it. You mention the EDK, but you must not be using it's compiler as it's not configured in the EDK to build Linux. EDK 9.2 version, XMD for debug. Kernel 2.6 version is built in linux machine and zImage.elf is downloaded to the board. Thanks for the UART suggestion, works well. Any suggestions as to what might be wrong in start_kernel function ? I will continue debugging meanwhile. Thanks swamy -- View this message in context: http://www.nabble.com/linux-2.6-hangs-at-__delay-function-on-Viretx-4-bo ard-tp17222725p17482754.html Sent from the linuxppc-embedded mailing list archive at Nabble.com. ___ Linuxppc-embedded mailing list Linuxppc-embedded@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-embedded This email and any attachments are intended for the sole use of the named recipient(s) and contain(s) confidential information that may be proprietary, privileged or copyrighted under applicable law. If you are not the intended recipient, do not read, copy, or forward this email message or any attachments. Delete this email message and any attachments immediately. ___ Linuxppc-embedded mailing list Linuxppc-embedded@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-embedded
RE: Cross toolchain for ppc405 (virtex-4)
Hi Miroslaw, I'm not sure on what version of gcc and glibc it's using, but I have been using ELDK 4.1 from denx.com. There are newer versions. Thanks, John -Original Message- From: [EMAIL PROTECTED] on behalf of Mirek23 Sent: Wed 5/28/2008 9:54 AM To: linuxppc-embedded@ozlabs.org Subject: Cross toolchain for ppc405 (virtex-4) Hi All, I am using for some time the crosstool tool-chain (crosstool-0.43) for the ppc405 of my virtex-4. It seems to be that the crosstool was not updated for awhile but the glibc and gcc compiler has changed a bit meanwhile. The latest working configuration to build the toolchain for ppc405 is gcc-4.1.0-glibc-2.3.6.dat Does any body has tried to adapt the crosstools to use for example glibc 2.7 ? Another alternative would be to use another tool than crosstool. Could somebody recommend something which can refer to newer version of gcc and glibc . Best Regards Miroslaw Dach -- View this message in context: http://www.nabble.com/Cross-toolchain-for-ppc405-%28virtex-4%29-tp17515929p17515929.html Sent from the linuxppc-embedded mailing list archive at Nabble.com. ___ Linuxppc-embedded mailing list Linuxppc-embedded@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-embedded This email and any attachments are intended for the sole use of the named recipient(s) and contain(s) confidential information that may be proprietary, privileged or copyrighted under applicable law. If you are not the intended recipient, do not read, copy, or forward this email message or any attachments. Delete this email message and any attachments immediately. ___ Linuxppc-embedded mailing list Linuxppc-embedded@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-embedded
RE: arch/powerpc, Xilinx, and mainline kernel support
Hi Mike, Thanks for the input, sounds right to me, we'll put it on the list of things to do. In general we will be testing our work on the current version of the Xilinx tools and not maintaining them for all versions of the Xilinx tools, but we need a way to spell that out cleanly. Thanks, John -Original Message- From: [EMAIL PROTECTED] [mailto:[EMAIL PROTECTED] On Behalf Of Koss, Mike (Mission Systems) Sent: Friday, May 23, 2008 9:09 AM To: Stephen Neuendorffer; Grant Likely Cc: linuxppc-embedded@ozlabs.org Subject: RE: arch/powerpc, Xilinx, and mainline kernel support So yesterday, we got a chance to checkout Linus' main (2.26.26-rc3) and it appears to not have all the necessary updates to build for the Generic Xilinx Virtex either. For now, I've decided to work from the Xilinx git-tree. We also gave the EDK bsp-dts generator a spin, and I have a comment on it: documentation. It would be nice to have some kind of simple README that explains what it is and what it supports. The current README talks about using the old python script. I fired up the bsp against my EDK 9.1 MPMC(2) based system and it bombed out when it reached the MPMC2 definition. So I dug through the tcl and found it that it was only supporting the MPMC3. I'm still working on my EDK 9.2 MPMC3 system, so I can't check to see if that works or not, yet. -- Mike -Original Message- From: Stephen Neuendorffer [mailto:[EMAIL PROTECTED] Sent: Friday, May 16, 2008 6:34 PM To: Grant Likely; Koss, Mike (Mission Systems) Cc: linuxppc-embedded@ozlabs.org Subject: RE: arch/powerpc, Xilinx, and mainline kernel support -Original Message- From: [EMAIL PROTECTED] [mailto:linuxppc-embedded- [EMAIL PROTECTED] On Behalf Of Grant Likely Sent: Friday, May 16, 2008 3:27 PM To: Koss, Mike (Mission Systems) Cc: linuxppc-embedded@ozlabs.org Subject: Re: arch/powerpc, Xilinx, and mainline kernel support On Fri, May 16, 2008 at 4:06 PM, Koss, Mike (Mission Systems) [EMAIL PROTECTED] wrote: Is there any reason why the mainline 2.6.25.3 (and from what I could see .4) is missing the files to build for the Xilinx Virtex platform? Or in other words, I tried to build from 2.6.25.3 for the Xilinx Virtex under arch/powerpc (because arch/ppc actually crashes when once apps start to run) and it failed when trying to actually create the zImage. I hopped over to Xilinx's git server and noticed a bunch of missing entries in the boot/Makefile and source code to actually support the complete image build for a Xilinx Virtex PPC405. When is the Xilinx Virtex support going to be mainline official? I need to be able to grab a stable kernel and work from there rather than using the latest -rc that Xilinx is hosting on their git server. Working on it. Biggest problem is getting the device drivers in shape. However, other than Ethernet support, current arch/powerpc (head of Linus' tree, not 2.6.25) should work for building virtex kernels. Mike, What is your objection to using what is in the git tree, because it is based on 24-rc8 and not 25, or something more fundamental? Steve This email and any attachments are intended for the sole use of the named recipient(s) and contain(s) confidential information that may be proprietary, privileged or copyrighted under applicable law. If you are not the intended recipient, do not read, copy, or forward this email message or any attachments. Delete this email message and any attachments immediately. ___ Linuxppc-embedded mailing list Linuxppc-embedded@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-embedded This email and any attachments are intended for the sole use of the named recipient(s) and contain(s) confidential information that may be proprietary, privileged or copyrighted under applicable law. If you are not the intended recipient, do not read, copy, or forward this email message or any attachments. Delete this email message and any attachments immediately. ___ Linuxppc-embedded mailing list Linuxppc-embedded@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-embedded
RE: linux 2.6 hangs at __delay function on Viretx 4 board
Swamy, Looks like the kernel is probably not running at all yet, may stuck in early initialization. 1. Has the kernel ever ran on this board or is this development to get it running? I have ran into issues with the memory being setup incorrectly (the end address/how much memory) and seen something similar to this. I would review the bootstrap loader output carefully to ensure the memory is setup correctly. 2. Not sure on the tools you are using to build it. You mention the EDK, but you must not be using it's compiler as it's not configured in the EDK to build Linux. I use the ELDK 4.1 right now as we are still figuring out our tool situation. 3. Without a good JTAG emulator, bring up can be painful in my experience. The EDK GDB/XMD is not fully MMU aware, so once the MMU is one it won't allow you to debug. If you have access to an MMU aware debugger that could help. I have used BDI 2000 for these type of problems and it helped. 4. In the absense of an MMU debugger, using the UART to slam bytes out of the serial port can help. The UART lite is easier for that as there's no setup required. The kernel can map an MMU TLB so that the UART is usable early, make sure that is setup in the early startup. Then I just use *(char *)The UART xmt reg address = data byte in the code to see what it's doing. 5. I would probably see where the udelay is called early in the kernel startup and why. I sometimes hack on it, comment stuff out, to get past it and figure out more data. Not always a good path, but can help. Good luck, John -Original Message- From: [EMAIL PROTECTED] [mailto:[EMAIL PROTECTED] On Behalf Of swamydp Sent: Friday, May 16, 2008 8:57 AM To: linuxppc-embedded@ozlabs.org Subject: RE: linux 2.6 hangs at __delay function on Viretx 4 board John Thanks for your suggestions. I looked up the virtual address for __log_buf in System.map and subtracted 0xc000 to get the physical address. I then reset the processor from XMD and dump contents of the physical address of __log_buf using 'mrd' command from XMD. All I see is bunch of zeros in those locations. I am debugging but do not have much clue. Swamy John Linn wrote: Hi Swamy, I have seen this sometime before I think, but don't remember why. I see that udelay depends on loops_per_jiffy, have you looked to see what value it is? Maybe it's garbage and some large value? Have you tried dumping the __log_buf to understand how far it got thru booting the kernel before it got hung? I assume you must be using xmd to load the image, you can also use it to dump the buffer. On another processor I have seen it get hung in the calibrate_delay call from the kernel if the interrupts or timer aren't working, but haven't ever seen that on the Powerpc. Thanks, John -Original Message- From: [EMAIL PROTECTED] [mailto:[EMAIL PROTECTED] On Behalf Of swamydp Sent: Tuesday, May 13, 2008 9:29 PM To: linuxppc-embedded@ozlabs.org Subject: linux 2.6 hangs at __delay function on Viretx 4 board I am trying to boot linux 2.6 on HITECH virtex 4(fx60) board. Linux hangs at address 0xc00045ec which is in the __udelay function. I am using EDK 9.2i and gcc version 4.0.2 for compiling the kernel. The following is the boot message from the bootloader. loaded at: 0040 0054E19C board data at: 0054C120 0054C19C relocated to: 00404064 004040E0 zimage at: 00404E55 0054B5B4 avail ram: 0054F000 0200 Linux/PPC load: console=ttyS0,9600 console=tty0 root=/dev/sda2 Uncompressing Linux...done. Now booting the kernel Any help is greatly appreciated. I have run out of ideas to fix this. Thanks swamy -- View this message in context: http://www.nabble.com/linux-2.6-hangs-at-__delay-function-on-Viretx-4-bo ard-tp17222725p17222725.html Sent from the linuxppc-embedded mailing list archive at Nabble.com. ___ Linuxppc-embedded mailing list Linuxppc-embedded@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-embedded ___ Linuxppc-embedded mailing list Linuxppc-embedded@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-embedded -- View this message in context: http://www.nabble.com/linux-2.6-hangs-at-__delay-function-on-Viretx-4-bo ard-tp17222725p17276753.html Sent from the linuxppc-embedded mailing list archive at Nabble.com. ___ Linuxppc-embedded mailing list Linuxppc-embedded@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-embedded This email and any attachments are intended for the sole use of the named recipient(s) and contain(s) confidential information that may be proprietary, privileged or copyrighted under applicable law. If you are not the intended recipient, do not read, copy, or forward this email message or any attachments. Delete this email message and any attachments immediately
RE: linux 2.6 hangs at __delay function on Viretx 4 board
Hi Swamy, I have seen this sometime before I think, but don't remember why. I see that udelay depends on loops_per_jiffy, have you looked to see what value it is? Maybe it's garbage and some large value? Have you tried dumping the __log_buf to understand how far it got thru booting the kernel before it got hung? I assume you must be using xmd to load the image, you can also use it to dump the buffer. On another processor I have seen it get hung in the calibrate_delay call from the kernel if the interrupts or timer aren't working, but haven't ever seen that on the Powerpc. Thanks, John -Original Message- From: [EMAIL PROTECTED] [mailto:[EMAIL PROTECTED] On Behalf Of swamydp Sent: Tuesday, May 13, 2008 9:29 PM To: linuxppc-embedded@ozlabs.org Subject: linux 2.6 hangs at __delay function on Viretx 4 board I am trying to boot linux 2.6 on HITECH virtex 4(fx60) board. Linux hangs at address 0xc00045ec which is in the __udelay function. I am using EDK 9.2i and gcc version 4.0.2 for compiling the kernel. The following is the boot message from the bootloader. loaded at: 0040 0054E19C board data at: 0054C120 0054C19C relocated to: 00404064 004040E0 zimage at: 00404E55 0054B5B4 avail ram: 0054F000 0200 Linux/PPC load: console=ttyS0,9600 console=tty0 root=/dev/sda2 Uncompressing Linux...done. Now booting the kernel Any help is greatly appreciated. I have run out of ideas to fix this. Thanks swamy -- View this message in context: http://www.nabble.com/linux-2.6-hangs-at-__delay-function-on-Viretx-4-bo ard-tp17222725p17222725.html Sent from the linuxppc-embedded mailing list archive at Nabble.com. ___ Linuxppc-embedded mailing list Linuxppc-embedded@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-embedded ___ Linuxppc-embedded mailing list Linuxppc-embedded@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-embedded
RE: Linux on Ml410
Hi Mojtaba, Did you build the FPGA bit stream yourself or get it from somewhere? Specifying ttyS0 means you should have a 16550 UART in the hardware build, do you? -- John -Original Message- From: [EMAIL PROTECTED] [mailto:[EMAIL PROTECTED] On Behalf Of mojtaba Sent: Tuesday, May 13, 2008 5:37 AM To: linuxppc-embedded@ozlabs.org Subject: Linux on Ml410 Dear all, I am trying to run linux 1.6.25 on ML410 board. When the system boot I receive this error: loaded at: 0040 004CD19C board data at: 004CB120 004CB19C relocated to: 00404050 004040CC zimage at: 00404E3C 004CA0D1 avail ram: 004CE000 1000 Linux/PPC load: console=ttyS0,115200 root=/dev/xsa2 Uncompressing Linux...inflate returned FFFD exit I will appreciate it if somebody can kindly answer me? Regards, Mojtaba ___ Linuxppc-embedded mailing list Linuxppc-embedded@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-embedded ___ Linuxppc-embedded mailing list Linuxppc-embedded@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-embedded
RE: Virtex V5FX PPC 440 Support In Xilinx Git Tree
Hi Peter, We added arch/ppc support because it was the easiest path for us. We realize it's going away soon in the mainline. We are working on getting arch/powerpc more mature for both the 405 and the 440 as we do believe this is the future for powerpc. Thanks, John -Original Message- From: Peter Korsgaard [mailto:[EMAIL PROTECTED] On Behalf Of Peter Korsgaard Sent: Wednesday, April 02, 2008 3:51 AM To: John Linn Cc: linuxppc-embedded@ozlabs.org; git Subject: Re: Virtex V5FX PPC 440 Support In Xilinx Git Tree John == John Linn [EMAIL PROTECTED] writes: John I pushed PowerPC 440 support to the Xilinx Git server with John support for ppc arch and with powerpc arch support coming in John the near future. Neat, but why have you added arch/ppc support? It's supposed to go away pretty much by the time the hardware gets in the hand of developers. -- Bye, Peter Korsgaard ___ Linuxppc-embedded mailing list Linuxppc-embedded@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-embedded
[PATCH 0/3] [POWERPC] [V2][RFC] of_serial and boot patches introduction
I am sending V2 series of patches that fix the OF serial driver and add support to it and the boot for the Xilinx UART 16550. The ePAPR, although not a formal spec yet, proposes allowing reg-shift for ns16550. We believe this is a reasonable approach and have implemented it in this patch series. We've tried to integrate the consensus from the previous comments also. [v1] I am sending a series of patches that fix the OF serial driver and add support to it and the boot for the Xilinx UART 16550. I think we have tried to satisfy previous concerns about UARTs which are non-standard as the Xilinx 16550 is (register spacing and offset). We would like to have these pulled into 2.6.26. Thanks, John ___ Linuxppc-embedded mailing list Linuxppc-embedded@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-embedded
RE: xilinx Ml405 NFS mount problem
Hi Ming, It’s not obvious to me what the problem is as I don’t see any driver failures. Have you tried using a ramdisk and then seeing if the network is working before using NFS root? And I’m assuming you have used the NFS root before so you know that it’s good for sure. I test on the ML405 with NFS root and haven’t seen this problem, but my setup is a little different. I use DHCP rather than a static IP, but other than that it’s similar. I’m assuming that you accidentally got 2 different powerup outputs in the message below as the 1st stops and a 2nd starts in the middle. How long has it been since you pulled from the Xilinx Git tree? Thanks, John From: [EMAIL PROTECTED] [mailto:[EMAIL PROTECTED] On Behalf Of MingLiu Sent: Tuesday, April 01, 2008 8:12 AM To: linuxppc-embedded@ozlabs.org Subject: xilinx Ml405 NFS mount problem Dear friends, I am bringing up my kernel from Xilinx git tree. Unfortunately I met some problem when mounting the root file system. Here is the information listed. I will appreciate a lot if someone can help me out of the trouble. Thanks a lot! loaded at: 0040 0059F19C board data at: 0059D120 0059D19C relocated to: 004050C8 00405144 zimage at: 00405F3F 0059C025 avail ram: 005A 0800 Linux/PPC load: root=/dev/nfs ip=192.168.0.4:192.168.0.3:192.168.0.3:255.255.255.0 rw nfsroot=192.168.0.3:/home/mingliu/ml403_rootfs console=ttyUL0,38400 mem=32M Uncompressing Linux...done. Now booting the kernel Linux version 2.6.24-rc8-xlnx-g1db182b8-dirty ([EMAIL PROTECTED]) (gcc version 3.4.1) #7 Tue Apr 1 14:55:25 CEST 2008 Xilinx Generic PowerPC board support package (Xilinx ML405) (Virtex-4 FX) Zone PFN ranges: DMA 0 - 8192 Normal 8192 - 8192 HighMem 8192 - 8192 Movable zone start PFN for each node early_node_map[1] active PFN ranges 0:0 - 8192 Built 1 zonelists in Zone order, mobility grouping on. Total pages: 8128 Kernel command line: root=/dev/nfs ip=192.168.0.4:192.168.0.3:192.168.0.3:255.255.255.0 rw nfsroot=192.168.0.3:/home/mingliu/ml403_rootfs console=ttyUL0,38400 mem=32M Xilinx INTC #0 at 0x8180 mapped to 0xFDFFF000 PID hash table entries: 128 (order: 7, 512 bytes) Console: colour dummy device 80x25 Dentry cache hash table entries: 4096 (order: 2, 16384 bytes) Inode-cache hash table entries: 2048 (order: 1, 8192 bytes) Memory: 28884k available (2552k kernel code, 944k data, 84k init, 0k highmem) SLUB: Genslabs=11, HWalign=32, Order=0-1, MinObjects=4, CPUs=1, Nodes=1 Mount-cache hash table entries: 512 net_namespace: 64 bytes NET: Registered protocol family 16 Registering device uartlite:0 Fixup MAC address for xilinx_lltemac:0 Registering device xilinx_lltemac:0 NET: Registered protocol family 2 IP route cache hash table entries: 1024 (order: 0, 4096 bytes) TCP established hash table entries: 1024 (order: 1, 8192 bytes) TCP bind hash table entries: 1024 (order: 0, 4096 bytes) TCP: Hash tables configured (established 1024 bind 1024) TCP reno registered sysctl table check failed: /kernel/l2cr .1.31 Missing strategy Call Trace: [c1c0fe50] [c0008b70] show_stack+0x40/0x194 (unreliable) [c1c0fe90] [c003aed4] set_fail+0x68/0x80 [c1c0feb0] [c003b4ec] sysctl_check_table+0x600/0x77c [c1c0fef0] [c003b4d4] sysctl_check_table+0x5e8/0x77c [c1c0ff30] [c002605c] register_sysctl_table+0x64/0xb4 [c1c0ff50] [c034579c] register_ppc_htab_sysctl+0x18/0x2c [c1c0ff60] [c034482c] kernel_init+0x94/0x2bc [c1c0fff0] [c0004d58] kernel_thread+0x44/0x60 Installing knfsd (copyright (C) 1996 [EMAIL PROTECTED] https://webmail.sys.kth.se/src/compose.php?send_to=okir%40monad.swb.de ). fuse init (API version 7.9) io scheduler noop registered io scheduler anticipatory registered io scheduler deadline registered io scheduler cfq registered (default) uartlite.0: ttyUL0 at MMIO 0x8403 (irq = 3) is a uartlite console [ttyUL0] enabled loop: module loaded nbd: registered device at major 43 xilinx_lltemac xilinx_lltemac.0: MAC address is now 0: a:35: 1: 2: 3 xilinx_lltemac xilinx_lltemac.0: XLlTemac: using DMA mode. XLlTemac: Dma base address: phy: 0x84600100, virt: 0xc3008100 XLlTemac: buffer descriptor size: 32768 (0x8000) XLlTemac: Allocating DMA descriptors with kmalloc6XLlTemac: (buffer_descriptor_init) phy: 0x1d18000, virt: 0xc1d18000, size: 0x8000 XTemac: PHY detected at address 7. xilinx_lltemac xilinx_lltemac.0: eth0: Xilinx TEMAC at 0x81C0 mapped to 0xC3004000, irq=2 console [netcon0] enabled Linux version 2.6.24-rc8-xlnx-g1db182b8-dirty ([EMAIL PROTECTED]) (gcc version 3.4.1) #7 Tue Apr 1 14:55:25 CEST 2008 Xilinx Generic PowerPC board support package (Xilinx ML405) (Virtex-4 FX) Zone PFN ranges: DMA 0 - 8192 Normal 8192 - 8192 HighMem 8192 - 8192 Movable zone start PFN for each node early_node_map[1] active PFN ranges 0:0 - 8192 Built 1 zonelists in Zone order, mobility grouping on.
RE: xilinx Ml405 NFS mount problem
Now that you say that, I have been running TCP with my NFS mount as I'm mounting across a corporate network. I am also using the latest LL TEMAC with EDK 10.1. Thanks, John -Original Message- From: Robert Woodworth [mailto:[EMAIL PROTECTED] Sent: Tuesday, April 01, 2008 10:50 AM To: MingLiu Cc: John Linn; linuxppc-embedded@ozlabs.org Subject: RE: xilinx Ml405 NFS mount problem I think you may be suffering from the latest LL_TEMAC packet loss problem. (NFS/UDP really does not like packet loss) Let me guess. You are using a base system from Base System Builder Wizard? EDK 9.2i. Default syntheses/PR options. I have seen a massive packet loss problems on my ML403 and two other boards I have with an FX60. This is probably a hardware problem. Xilinx has acknowledged an LL_TEMAC problem to me but has not provided a fix. I have heard that things are better with EDK/ISE-10.1 but I have not tested it. The vendor of one of my boards (Pico) has fixed the problem on the FX60 by highly constraining the timing of the LL_TEMAC in map/PR. On my ML403 I used similar constraints and it fixed the problem, but only if the device is plugged into a GigE switch. The problem is still there with the same .bit file on a 100-T switch. Are you on a GigE switch? Rob. On Tue, 2008-04-01 at 16:15 +, MingLiu wrote: Dear John, Thank you for your replying. It’s not obvious to me what the problem is as I don’t see any driver failures. Have you tried using a ramdisk and then seeing if the network is working before using NFS root? Not yet. I will try it soon. However from the information on the LL_TEMAC, it seems everything is fine and it should work. And I’m assuming you have used the NFS root before so you know that it’s good for sure. I test on the ML405 with NFS root and haven’t seen this problem, but my setup is a little different. I use DHCP rather than a static IP, but other than that it’s similar. Yes. I used NFS before. I can make sure my NFS server works well. Also in principle, static IP should get a same result as DHCP, I think. How long has it been since you pulled from the Xilinx Git tree? I just pulled the Xilinx tree quite recently. I am using a latest kernel. BR Ming And I’m assuming you have used the NFS root before so you know that it’s good for sure. I test on the ML405 with NFS root and haven’t seen this problem, but my setup is a little different. I use DHCP rather than a static IP, but other than that it’s similar. I’m assuming that you accidentally got 2 different powerup outputs in the message below as the 1st stops and a 2nd starts in the middle. How long has it been since you pulled from the Xilinx Git tree? Thanks, John __ From: linuxppc-embedded-bounces [EMAIL PROTECTED] [mailto:linuxppc-embedded-bounces [EMAIL PROTECTED] On Behalf Of MingLiu Sent: Tuesday, April 01, 2008 8:12 AM To: linuxppc-embedded@ozlabs.org Subject: xilinx Ml405 NFS mount problem Dear friends, I am bringing up my kernel from Xilinx git tree. Unfortunately I met some problem when mounting the root file system. Here is the information listed. I will appreciate a lot if someone can help me out of the trouble. Thanks a lot! loaded at: 0040 0059F19C board data at: 0059D120 0059D19C relocated to: 004050C8 00405144 zimage at: 00405F3F 0059C025 avail ram: 005A 0800 Linux/PPC load: root=/dev/nfs ip=192.168.0.4:192.168.0.3:192.168.0.3:255.255.255.0 rw nfsroot=192.168.0.3:/home/mingliu/ml403_rootfs console=ttyUL0,38400 mem=32M Uncompressing Linux...done. Now booting the kernel Linux version 2.6.24-rc8-xlnx-g1db182b8-dirty ([EMAIL PROTECTED]) (gcc version 3.4.1) #7 Tue Apr 1 14:55:25 CEST 2008 Xilinx Generic PowerPC board support package (Xilinx ML405) (Virtex-4 FX) Zone PFN ranges: DMA 0 - 8192 Normal 8192 - 8192 HighMem 8192 - 8192 Movable zone start PFN for each node early_node_map[1] active PFN ranges 0:0 - 8192 Built 1 zonelists in Zone order, mobility grouping on. Total pages: 8128 Kernel command line: root=/de v/nfs
Virtex V5FX PPC 440 Support In Xilinx Git Tree
I pushed PowerPC 440 support to the Xilinx Git server with support for ppc arch and with powerpc arch support coming in the near future. A default kernel configuration file, ml507_defconfig, is provided in the kernel tree to support the Xilinx ML507 board with the PowerPC 440. Thanks, John ___ Linuxppc-embedded mailing list Linuxppc-embedded@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-embedded
RE: xilinx Ml405 NFS mount problem
Hi Rob, I am using GigE and no checksum offload. I don't have a quick way to test packet loss. EDK 10.1 may help your problem. -- John -Original Message- From: Robert Woodworth [mailto:[EMAIL PROTECTED] Sent: Tuesday, April 01, 2008 5:44 PM To: John Linn Cc: MingLiu; linuxppc-embedded@ozlabs.org Subject: RE: xilinx Ml405 NFS mount problem Can you test your packet loss with your setup?? GigE or 100T?? Do you have hardware checksum turned on in your bitfile? I strongly believe that there is a timing problem in the MPMC3/LL_TEMAC. I think the smaller FX12 does not suffer as much as the larger FX60. My FX12 is fairly good, my FX60 is very bad. Guessing. The FX20 in the ML405 is somewhere between. When I make small changes to my bit file (I'm currently working on an image processing HDL module) the quality of my LL_TEMAC changes dramatically. If I take out one of my custom modules and re-synthesize the LL_TEMAC packet loss goes way up. Add another module, re-synthesize and packet loss is down. I would *really* like a Xilinx EDK expert give me some advise on this issue. Rob. On Tue, 2008-04-01 at 10:53 -0600, John Linn wrote: Now that you say that, I have been running TCP with my NFS mount as I'm mounting across a corporate network. I am also using the latest LL TEMAC with EDK 10.1. Thanks, John -Original Message- From: Robert Woodworth [mailto:[EMAIL PROTECTED] Sent: Tuesday, April 01, 2008 10:50 AM To: MingLiu Cc: John Linn; linuxppc-embedded@ozlabs.org Subject: RE: xilinx Ml405 NFS mount problem I think you may be suffering from the latest LL_TEMAC packet loss problem. (NFS/UDP really does not like packet loss) Let me guess. You are using a base system from Base System Builder Wizard? EDK 9.2i. Default syntheses/PR options. I have seen a massive packet loss problems on my ML403 and two other boards I have with an FX60. This is probably a hardware problem. Xilinx has acknowledged an LL_TEMAC problem to me but has not provided a fix. I have heard that things are better with EDK/ISE-10.1 but I have not tested it. The vendor of one of my boards (Pico) has fixed the problem on the FX60 by highly constraining the timing of the LL_TEMAC in map/PR. On my ML403 I used similar constraints and it fixed the problem, but only if the device is plugged into a GigE switch. The problem is still there with the same .bit file on a 100-T switch. Are you on a GigE switch? Rob. On Tue, 2008-04-01 at 16:15 +, MingLiu wrote: Dear John, Thank you for your replying. It’s not obvious to me what the problem is as I don’t see any driver failures. Have you tried using a ramdisk and then seeing if the network is working before using NFS root? Not yet. I will try it soon. However from the information on the LL_TEMAC, it seems everything is fine and it should work. And I’m assuming you have used the NFS root before so you know that it’s good for sure. I test on the ML405 with NFS root and haven’t seen this problem, but my setup is a little different. I use DHCP rather than a static IP, but other than that it’s similar. Yes. I used NFS before. I can make sure my NFS server works well. Also in principle, static IP should get a same result as DHCP, I think. How long has it been since you pulled from the Xilinx Git tree? I just pulled the Xilinx tree quite recently. I am using a latest kernel. BR Ming And I’m assuming you have used the NFS root before so you know that it’s good for sure. I test on the ML405 with NFS root and haven’t seen this problem, but my setup is a little different. I use DHCP rather than a static IP, but other than that it’s similar. I’m assuming that you accidentally got 2 different powerup outputs in the message below as the 1st stops and a 2nd starts in the middle. How long has it been since you pulled from the Xilinx Git tree? Thanks, John __ From: linuxppc-embedded-bounces [EMAIL PROTECTED] [mailto:linuxppc-embedded-bounces [EMAIL PROTECTED] On Behalf Of MingLiu Sent: Tuesday, April 01, 2008 8:12 AM To: linuxppc-embedded@ozlabs.org Subject: xilinx Ml405 NFS mount problem Dear friends, I am bringing up my kernel from Xilinx git tree. Unfortunately I met some problem when mounting
RE: U-boot + Linux 2.6 + Avnet FX12 MM (based on ML403 config)
Hi Mirek, Our Git server from Xilinx, git.xilinx.com, has a kernel that is 2.6.24 based if this helps. All of my testing for Virtex 4 is on the ML405 board which is an FX20 device rather than an FX12, but the kernel configuration is pretty much compatible. Thanks, John -Original Message- From: [EMAIL PROTECTED] [mailto:[EMAIL PROTECTED] On Behalf Of Mirek23 Sent: Sunday, March 30, 2008 11:21 AM To: linuxppc-embedded@ozlabs.org Subject: Re: U-boot + Linux 2.6 + Avnet FX12 MM (based on ML403 config) Hi Guillaume, I was facing the same problem with my Avent (virtex 4 FX12) evaluation board. Originally I have built successfully u-boot 1.2.0 and linux 2.6.21 but I was not able to boot kernel 2.6.21 from u-boot 1.2.0. Kernel 2.6.22 (uImage) onwards can be booted with u-boot 1.2 and higher. Currently I use u-boot 1.2.0 and kernel 2.6.23 without any problems. My recommendation is to use at least the kernel version 2.6.22 otherwise you will have kernel panic problem. Best Regards Mirek Guillaume Berthelom wrote: Hi, I'm trying to port Linux 2.6 on Avnet FX12 MM board with U-Boot and the help of xilinx ML403 config. I have generate my costum xparameters.h file with EDK 8.2i. I use ELDK 4.1 and Linux 2.6.20.x. I have modified ml403.h u-boot's config file to adapt it for my board and I have no problem to boot u-boot. I use the right board_info structure from asm/ppcboot.h and not the one in xilinx_ml403.h. When I load the zImage directly with xilinx xmd debugger, the kernel start without problem (if I don't have KGDB or SERIAL_TEXT_DEBUG option in my kernel config). But when I try to load the uImage with u-boot, the kernel start but crach befor I can see something on output. The kernel start because I debug it and the platform_init is ok, setup_arch too and it crach after ppc4xx_setup_arch at printk(KERN_INFO Xilinx ML403 Reference System (Virtex-4 FX)\n) line when the kernel access in printk.c. I suppose the serial init have problem but I have no idea what is the cause of the problem. I use the opb_uart16550 IP in my Xilinx design and the associat drivers in u-boot and linux. Thanks, Guillaume Berthelom -- View this message in context: http://www.nabble.com/U-boot-%2B-Linux-2.6-%2B-Avnet-FX12-MM-%28based-on -ML403-config%29-tp10201070p16384525.html Sent from the linuxppc-embedded mailing list archive at Nabble.com. ___ Linuxppc-embedded mailing list Linuxppc-embedded@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-embedded ___ Linuxppc-embedded mailing list Linuxppc-embedded@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-embedded
RE: Xilinx LLTEMAC driver issues
Hi Magnus, Sorry to hear you're having problems with it. I am doing testing on an ML405 which is the same board but with a bigger FPGA, but with ppc arch and I don't see this issue. I have done limited testing with powerpc arch and the LL TEMAC, but I didn't see this issue there either. Powerpc arch is definitely less mature in my experience than the ppc arch. I'll do a quick test with my powerpc arch and make sure again I'm not seeing it. My kernel is from the Xilinx Git tree, but there have been a number of changes we have pushed out so I don't know how long ago you pulled from the Git tree. My EDK project is 10.1 so it's a little newer. I am using LL TEMAC 1.01a so it's a little newer. I reviewed the change log for the LL TEMAC and don't see any big problems that were fixed in the newer versions, more new features. I'll check with some others here to see if I missed something there. I am using DMA also, but no DRE or checksum offload. You didn't say anything about those. I'm going to insert my mhs file that describes my system to let you compare your system configuration. It's not clear to me yet if you have a h/w or s/w problem. I'll also insert some of my device tree with the LL TEMAC so you can compare (ignore 16550 stuff as we are still working on that). Since you can't ping reliably I would probably focus on that since it's simpler than the other issues you're seeing. Thanks, John # ## # Created by Base System Builder Wizard for Xilinx EDK 10.1.1 Build EDK_K_SP1.1 # Thu Feb 14 14:11:12 2008 # Target Board: Xilinx Virtex 4 ML405 Evaluation Platform Rev 1 # Family:virtex4 # Device:xc4vfx20 # Package: ff672 # Speed Grade: -10 # Processor: ppc405_0 # Processor clock frequency: 300.00 MHz # Bus clock frequency: 100.00 MHz # On Chip Memory : 8 KB # Total Off Chip Memory : 128 MB # - DDR_SDRAM = 128 MB # ## PARAMETER VERSION = 2.1.0 PORT fpga_0_RS232_Uart_sin_pin = fpga_0_RS232_Uart_sin, DIR = I PORT fpga_0_RS232_Uart_sout_pin = fpga_0_RS232_Uart_sout, DIR = O PORT fpga_0_LEDs_4Bit_GPIO_IO_pin = fpga_0_LEDs_4Bit_GPIO_IO, DIR = IO, VEC = [0:3] PORT fpga_0_IIC_EEPROM_Scl_pin = fpga_0_IIC_EEPROM_Scl, DIR = IO PORT fpga_0_IIC_EEPROM_Sda_pin = fpga_0_IIC_EEPROM_Sda, DIR = IO PORT fpga_0_SysACE_CompactFlash_SysACE_CLK_pin = fpga_0_SysACE_CompactFlash_SysACE_CLK, DIR = I PORT fpga_0_SysACE_CompactFlash_SysACE_MPA_pin = fpga_0_SysACE_CompactFlash_SysACE_MPA, DIR = O, VEC = [6:1] PORT fpga_0_SysACE_CompactFlash_SysACE_MPD_pin = fpga_0_SysACE_CompactFlash_SysACE_MPD, DIR = IO, VEC = [15:0] PORT fpga_0_SysACE_CompactFlash_SysACE_CEN_pin = fpga_0_SysACE_CompactFlash_SysACE_CEN, DIR = O PORT fpga_0_SysACE_CompactFlash_SysACE_OEN_pin = fpga_0_SysACE_CompactFlash_SysACE_OEN, DIR = O PORT fpga_0_SysACE_CompactFlash_SysACE_WEN_pin = fpga_0_SysACE_CompactFlash_SysACE_WEN, DIR = O PORT fpga_0_SysACE_CompactFlash_SysACE_MPIRQ_pin = fpga_0_SysACE_CompactFlash_SysACE_MPIRQ, DIR = I PORT fpga_0_DDR_SDRAM_DDR_Clk_pin = fpga_0_DDR_SDRAM_DDR_Clk, DIR = O PORT fpga_0_DDR_SDRAM_DDR_Clk_n_pin = fpga_0_DDR_SDRAM_DDR_Clk_n, DIR = O PORT fpga_0_DDR_SDRAM_DDR_Addr_pin = fpga_0_DDR_SDRAM_DDR_Addr, DIR = O, VEC = [12:0] PORT fpga_0_DDR_SDRAM_DDR_BankAddr_pin = fpga_0_DDR_SDRAM_DDR_BankAddr, DIR = O, VEC = [1:0] PORT fpga_0_DDR_SDRAM_DDR_CAS_n_pin = fpga_0_DDR_SDRAM_DDR_CAS_n, DIR = O PORT fpga_0_DDR_SDRAM_DDR_CE_pin = fpga_0_DDR_SDRAM_DDR_CE, DIR = O PORT fpga_0_DDR_SDRAM_DDR_CS_n_pin = fpga_0_DDR_SDRAM_DDR_CS_n, DIR = O PORT fpga_0_DDR_SDRAM_DDR_RAS_n_pin = fpga_0_DDR_SDRAM_DDR_RAS_n, DIR = O PORT fpga_0_DDR_SDRAM_DDR_WE_n_pin = fpga_0_DDR_SDRAM_DDR_WE_n, DIR = O PORT fpga_0_DDR_SDRAM_DDR_DM_pin = fpga_0_DDR_SDRAM_DDR_DM, DIR = O, VEC = [3:0] PORT fpga_0_DDR_SDRAM_DDR_DQS = fpga_0_DDR_SDRAM_DDR_DQS, DIR = IO, VEC = [3:0] PORT fpga_0_DDR_SDRAM_DDR_DQ = fpga_0_DDR_SDRAM_DDR_DQ, DIR = IO, VEC = [31:0] PORT fpga_0_TriMode_MAC_GMII_GMII_TXD_0_pin = fpga_0_TriMode_MAC_GMII_GMII_TXD_0, DIR = O, VEC = [7:0] PORT fpga_0_TriMode_MAC_GMII_GMII_TX_EN_0_pin = fpga_0_TriMode_MAC_GMII_GMII_TX_EN_0, DIR = O PORT fpga_0_TriMode_MAC_GMII_GMII_TX_ER_0_pin = fpga_0_TriMode_MAC_GMII_GMII_TX_ER_0, DIR = O PORT fpga_0_TriMode_MAC_GMII_GMII_TX_CLK_0_pin = fpga_0_TriMode_MAC_GMII_GMII_TX_CLK_0, DIR = O PORT fpga_0_TriMode_MAC_GMII_GMII_RXD_0_pin = fpga_0_TriMode_MAC_GMII_GMII_RXD_0, DIR = I, VEC = [7:0] PORT fpga_0_TriMode_MAC_GMII_GMII_RX_DV_0_pin = fpga_0_TriMode_MAC_GMII_GMII_RX_DV_0, DIR = I PORT fpga_0_TriMode_MAC_GMII_GMII_RX_ER_0_pin = fpga_0_TriMode_MAC_GMII_GMII_RX_ER_0, DIR = I PORT fpga_0_TriMode_MAC_GMII_GMII_RX_CLK_0_pin = fpga_0_TriMode_MAC_GMII_GMII_RX_CLK_0, DIR = I PORT fpga_0_TriMode_MAC_GMII_MII_TX_CLK_0_pin = fpga_0_TriMode_MAC_GMII_MII_TX_CLK_0, DIR = I PORT fpga_0_TriMode_MAC_GMII_MDIO_0_pin
RE: Network Bad Kernel Access
I'm not using DRE and CSUM yet. I have seen some weirdness similar to that but hard to reproduce reliably to chase it. I tend to see it with heavy traffic also, so maybe it's not related to DRE CSUM. I am running DMA. -- John -Original Message- From: [EMAIL PROTECTED] [mailto:[EMAIL PROTECTED] On Behalf Of Grant Likely Sent: Friday, March 28, 2008 5:25 PM To: [EMAIL PROTECTED]; Stephen Neuendorffer; John Linn Cc: linuxppc-embedded@ozlabs.org Subject: Re: Network Bad Kernel Access On Sun, Aug 26, 2007 at 7:00 PM, [EMAIL PROTECTED] wrote: I am having a problem with my network. I am using a V4FX12 running linux 2.6.21 with the TEMAC. I am running the PPC at 300 MHz and the TEMAC is configured for DMA and DRE on the Xmit and the Recv. I have tried varying the FIFO depth and enabling/disabling the checksum offloading. All produce the error below when under heavy network traffic (specifically sending data from the PPC). Has anybody seen this? It seems like I am overflowing some memory, but I am not sure what/where to increase it. I'm seeing the same behavior on my platform except that I get it almost immediately after bringing up the Ethernet interface. I've only just started to debug this. The bug showed up when DMA+DRE+CSUM were enabled on the core. Stephen, John; does any of this look familiar? Cheers, g. Thanks, Glenn [ 484.696738] Oops: kernel access of bad area, sig: 11 [#1] [ 484.761286] NIP: c00e1ef4 LR: c00cfec0 CTR: c00cfe34 [ 484.820650] REGS: c0483b10 TRAP: 0300 Not tainted (2.6.21) [ 484.889378] MSR: 00029030 EE,ME,IR,DR CR: 93005999 XER: e000 [ 484.965410] DAR: bb857caf, DSISR: [ 485.014365] TASK = c0648b60[129] 'rcS' THREAD: c0482000 [ 485.074765] GPR00: c04fdfb8 c0483bc0 c0648b60 bb857c2b c04fd9a0 c0483bcc 0400 ff107ac0 [ 485.174747] GPR08: 000f c04fdfb8 c04d2478 00010001 00648d10 1003c2e0 0001 [ 485.274732] GPR16: 0003 c0483ed8 4fd8 05b4 05b4 0001679c [ 485.374716] GPR24: 7ff8b398 3002afe0 000f c04d2000 c04d23b8 c06bbe60 0003 c04d2320 [ 485.476784] NIP [c00e1ef4] kfree_skb+0x8/0x3c [ 485.528858] LR [c00cfec0] SgSendHandlerBH+0x8c/0x1cc [ 485.588223] Call Trace: [ 485.617389] [c0483bc0] [c00cfec0] SgSendHandlerBH+0x8c/0x1cc (unreliable) [ 485.698628] [c0483bf0] [c0019218] tasklet_action+0x90/0xd4 [ 485.764241] [c0483c00] [c0018ebc] __do_softirq+0x64/0xd0 [ 485.827772] [c0483c20] [c00064a8] do_softirq+0x40/0x58 [ 485.889221] [c0483c30] [c0018f74] irq_exit+0x38/0x48 [ 485.948586] [c0483c40] [c0006450] do_IRQ+0x88/0xa0 [ 486.005868] [c0483c50] [c00032d8] ret_from_except+0x0/0x18 [ 486.071483] [c0483d10] [c0483d00] 0xc0483d00 [ 486.122516] [c0483d20] [c00e17d4] __alloc_skb+0x48/0x11c [ 486.186048] [c0483d40] [c0109218] tcp_sendmsg+0x1ac/0xc40 [ 486.250621] [c0483db0] [c0126b58] inet_sendmsg+0x60/0x74 [ 486.314152] [c0483dd0] [c00dcf34] sock_aio_write+0xe0/0xfc [ 486.379765] [c0483e30] [c0050910] do_sync_write+0xb8/0x10c [ 486.445381] [c0483ef0] [c0050a40] vfs_write+0xdc/0x10c [ 486.506829] [c0483f10] [c0050b48] sys_write+0x4c/0x8c [ 486.567236] [c0483f40] [c0002c90] ret_from_syscall+0x0/0x3c [ 486.633888] Instruction dump: [ 486.669300] 0f00 7fe3fb78 7d6803a6 4e800021 80010014 7fe3fb78 7c0803a6 bbc10008 [ 486.761992] 38210010 4bfffe78 2c03 4d820020 80030084 39230084 2f81 409e0008 [ 486.858162] Kernel panic - not syncing: Aiee, killing interrupt handler! [ 486.938382] Rebooting in 180 seconds.. ___ Linuxppc-embedded mailing list Linuxppc-embedded@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-embedded -- Grant Likely, B.Sc., P.Eng. Secret Lab Technologies Ltd. ___ Linuxppc-embedded mailing list Linuxppc-embedded@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-embedded
RE: Xilinx Temac Timer ?
Hi Kevin,
I didn't write the code but I know the driver somewhat.
I think the intention of stopping the timer is to prevent the reentrancy
as the comment says because there is a function, gmii_poll, that is
setup on the timer to go read the phy registers to see if anything
changed in the phy.
Stopping the timer prevents a phy read from happening in gmii_poll in
the middle of the ioctl phy read which could hose things up.
I don't see why you couldn't change that timer stop to some other form
of synchronization/mutual exclusion so that the phy reads don't collide.
As I look at it, it appears to me the spinlock should provide the
synchronization needed without stopping the timer, but maybe I'm missing
something. I CCed John Bonesio as he's the guy that developed this code
I believe and maybe he'll have more insight here.
Thanks,
John
-Original Message-
From: [EMAIL PROTECTED]
[mailto:[EMAIL PROTECTED] On
Behalf Of khollan
Sent: Wednesday, March 26, 2008 11:03 AM
To: linuxppc-embedded@ozlabs.org
Subject: Xilinx Temac Timer ?
Hi
What is the purpose of stopping the timer in the ioctl call to read a
PHY
register? This is the code:
case SIOCGMIIREG: /* Read GMII PHY register. */
case SIOCDEVPRIVATE + 1:/* for binary compat, remove in 2.5 */
if (data-phy_id 31 || data-reg_num 31)
return -ENXIO;
/* Stop the PHY timer to prevent reentrancy. */
spin_lock_irqsave(XTE_spinlock, flags);
del_timer_sync(lp-phy_timer);
ret = XTemac_PhyRead(lp-Emac, data-phy_id,
data-reg_num, data-val_out);
/* Start the PHY timer up again. */
lp-phy_timer.expires = jiffies + 2 * HZ;
add_timer(lp-phy_timer);
spin_unlock_irqrestore(XTE_spinlock, flags);
if (ret != XST_SUCCESS) {
printk(KERN_ERR
%s: XTemac: could not read from PHY, error=%d.\n,
dev-name, ret);
return -EBUSY;
}
return 0;
I ask because I have an application that needs to read a Phy register
before
the timer has started to see if a link is present. This causes a kernel
bug
when trying to run the del_timer_sync function because there is not a
running timer. I would like to know if it is safe to remove the timer
del
and add but keep the spin lock.
Thanks for your help
Kevin
--
View this message in context:
http://www.nabble.com/Xilinx-Temac-Timer---tp16306218p16306218.html
Sent from the linuxppc-embedded mailing list archive at Nabble.com.
___
Linuxppc-embedded mailing list
Linuxppc-embedded@ozlabs.org
https://ozlabs.org/mailman/listinfo/linuxppc-embedded
___
Linuxppc-embedded mailing list
Linuxppc-embedded@ozlabs.org
https://ozlabs.org/mailman/listinfo/linuxppc-embedded
RE: Cannot open root device xsysace/disco0/part3 or 00:00
Hi Jose, I didn't see that you configured the kernel to put the Xilinx system ace driver in? It's under device drivers, block devices. Thanks, John From: [EMAIL PROTECTED] [mailto:[EMAIL PROTECTED] On Behalf Of José Luis Añamuro Machicao Sent: Wednesday, March 26, 2008 1:39 PM To: Linuxppc-embedded@ozlabs.org Cc: [EMAIL PROTECTED] Subject: Cannot open root device xsysace/disco0/part3 or 00:00 Hi I am installing the linux kernel 2.4.26 in the FPGA Virtex II Pro following the instruction of http://www.cs.washington.edu/research/lis/empart/xup_ppc_linux.shtml I compiled the linux kernel successfully, after that I build the root file system using the BusyBox 1.1.0 infrastructure. I configured the busybox and the kernel with the cross compiler, finally I execute the mkrootfs.sh script and obtain the all files of fyle system, these files I copied to ext3 partition of CompacFlash when I probe operatión by the hyperTerminal (38400 bps) appears a error that say: Serial driver version 5.05c (2001-07-08) with no serial options enabled ttyS00 at 0xfdfff003 (irq = 30) is a 16550A RAMDISK driver initialized: 16 RAM disks of 4096K size 1024 blocksize VFS: Cannot open root device xsysace/disco0/part3 or 00:00 Please append a correct root= boot option Kernel panic: VFS: Unable to mount root fs on 00:00 0Rebooting in 180 seconds. I configured the linux kernel with: Code maturity level options --- [*] Prompt for development and/or incomplete code/drivers File systems --- [*] /dev file system support (EXPERIMENTAL) [*] Automatically mount at boot [*] Virtual memory file system support (former shm fs) [*] /proc file system support General Setup --- [*] Networking support [*] Sysctl support [*] System V IPC and edit the /etc/fstab tmpfs /dev/shm tmpfs nodev,nosuid,noexec 0 0 proc /proc proc defaults 0 0 /dev/root / auto defaults,errors=remount-ro 0 0 - _____ __ José Luis Añamuro - PhD Student \/V /\ |\_\ /\_\ Dept. Ingeniería Informática | | | / \ | | \/ | |Universidad Autónoma de Madrid | | | / /\\ | | | | |Lab B-209 Tel. +34 615887260 | | |/ __ \| | \ /|http://www.ii.uam.es/ `-_-/_/\_\|_|\/|__| ___ Linuxppc-embedded mailing list Linuxppc-embedded@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-embedded
RE: Uart(lite)/ELDK 4.1 section mismatch - ML403
Hi Rob, It sounds like your xparameters*.h with the #defines for the device addresses is right for the uart as the bootstrap loader is working. I don't believe early boot works was my experience with it. What messages did you see in the __log_bug as this is the best tool, is it booting all the way without a console or crashing during boot when it tries to start the console? Make sure the #define XPAR_DDR_0_SIZE 0x400 is in the xparameters_ml403.h. It it's wrong the kernel will crash quickly based on my experience. Xilinx has a git server that I have been working on updating, not sure how many changes there are in our git server as opposed to what you have. I have been testing arch/ppc with the ML405 which is the same as the ML403 except a larger FPGA, but my testing has been with the 550 UART as the default. I realize it's a tangent, but you can pull from our server if you want as I know the state of it (git://git.xilinx.com/linux-2.6-xlnx.git). Thanks John Linn From: [EMAIL PROTECTED] [mailto:[EMAIL PROTECTED] On Behalf Of Rob Schalken Sent: Wednesday, March 19, 2008 8:02 AM To: linuxppc-embedded@ozlabs.org Subject: Uart(lite)/ELDK 4.1 section mismatch - ML403 I want to Port the Linux 2.6.24.3 to the ML403 board. I tried some different configurations: **UartLite After changing some defines and creating some symbolic link, the simple boot loader seems to Work. My kernel also starts because when I read the memory (using XMD), I could read the _log_buf and Some information was put in. I used the kernel command line: console=ttyUL0 ip=off root=/dev/ram rw. But I did not get any kernel message on my serial console! When I enabled the early boot text over Serial port, the compiler gives some errors (gen550_init, RS_TABLE_SIZE, etc.)! **16550 Uart After my disaster with the Uartlite, I started to use the 16550 uart. But I immediately get the following Error: arch/ppc/boot/common/ns16550.c:22: error: 'RS_TABLE_SIZE' undeclared here (not in a function) arch/ppc/boot/common/ns16550.c:24: error: 'SERIAL_PORT_DFNS' undeclared here (not in a function) make[2]: *** [arch/ppc/boot/common/ns16550.o] Error 1 make[1]: *** [arch/ppc/boot/common] Error 2 make: *** [zImage] Error 2 I use ELDK 4.1 toolchain, which result in the following section mismatch (warning) WARNING: vmlinux.o(.text+0x223c): Section mismatch: reference to .init.text:earl y_init (between 'start_here' and 'initial_mmu') WARNING: vmlinux.o(.text+0x2254): Section mismatch: reference to .init.text:mach ine_init (between 'start_here' and 'initial_mmu') WARNING: vmlinux.o(.text+0x2258): Section mismatch: reference to .init.text:MMU_ init (between 'start_here' and 'initial_mmu') WARNING: vmlinux.o(.text+0x22b2): Section mismatch: reference to .init.text:star t_kernel (between 'start_here' and 'initial_mmu') WARNING: vmlinux.o(.text+0x22b6): Section mismatch: reference to .init.text:star t_kernel (between 'start_here' and 'initial_mmu') By the way, the hardware is working, this has been tested!! Could someone help to get a uart work! I only want to receive a message from the kernel __ This email has been scanned by the MessageLabs Email Security System. For more information please visit http://www.messagelabs.com/email __ ___ Linuxppc-embedded mailing list Linuxppc-embedded@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-embedded
RE: Using GDB with Abatron's BDI2000 and the ppc405 in the Xilinx VirtexII Pro
Hi Robert, Here's a link to an app note on it. I'm using it on the 405 right now as we speak. I used the app note to get it working. If you have problems, let me know. http://www.xilinx.com/support/documentation/application_notes/xapp981.pd f Thanks, John Linn Xilinx Open Source Linux Engineer From: [EMAIL PROTECTED] [mailto:[EMAIL PROTECTED] On Behalf Of Wood, Robert (GE EntSol,Intelligent Platforms) Sent: Thursday, March 13, 2008 9:48 AM To: linuxppc-embedded@ozlabs.org Subject: Using GDB with Abatron's BDI2000 and the ppc405 in the Xilinx VirtexII Pro Hi, sorry for what is probably previously covered subject., I am searching the archives. We need a simple description of how to get GDB running with the BDI2000. We have the '2000 communicating and can access the registers and like through the telnet link but don't know how to configure the unit or GDB to work together. Robert Wood Senior Engineer GE Fanuc Intelligent Platforms T +613 749 9241 x270 F +613 749 9461 E [EMAIL PROTECTED] www.ge.com 5430 Canotek Road Ottawa, Ontario Canada K1J 9G2 General Electric Company ___ Linuxppc-embedded mailing list Linuxppc-embedded@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-embedded
RE: XMD to debug Linux kernel 2.6
Hi Ramkumar, XMD can definitely be used to help debug a kernel. I use it to dump registers and to dump memory. I'm not sure on the TLB entries yet but will check into it. I'm sure that XMD does not handle any virtual address to physical conversions. I use it to dump the log buff sometimes when the kernel doesn't come up. You may need to do a RST and then you need to use the physical address rather than the virtual address (Address - 0xC000). You can do a help in XMD. Thanks, John From: [EMAIL PROTECTED] [mailto:[EMAIL PROTECTED] On Behalf Of Ramkumar J Sent: Wednesday, March 12, 2008 9:15 AM To: linuxppc-embedded@ozlabs.org Subject: XMD to debug Linux kernel 2.6 Hi All, I need to dump the TLB entries, i-cache and d-cache entries on a ML-403 board ( I use a PowerPc based design) using the Xilinx Parallel-4 Cable. When I download the zImage.elf using dow command on XMD, I m not able to access the TLB and cache address special memory mappings as displayed by the XMD. I suspect that XMD only allows the dump for sections inside the elf file. If its true, then how to access the sections of kernel. Could XMD be used to debug a linux kernel by dumping the registers, TLBs, cache entries,etc. Am I missing anything. Any pointers would be very helpful. Thanks and Regards, Ramkumar ___ Linuxppc-embedded mailing list Linuxppc-embedded@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-embedded
Problems in fixup_device function
I've added some code to virtex_device_fixup and am seeing some strange side affects. I've added code to read from an iic device and populate the mac address including ioremap. The code works fine, but the side affects are not fine. Anyone have any experience here? I see the loops_per_jiffy getting hosed like there is some bad code, but I can't track it down. It moves around badly, like it can come and go with printk additions or deletions. I don't know enough about the stack and Linux to know if there could be a problem there. Thanks, John ___ Linuxppc-embedded mailing list Linuxppc-embedded@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-embedded
RE: Problems in fixup_device function
I am loading the mac address into the data of the platform device. -- John -Original Message- From: [EMAIL PROTECTED] [mailto:[EMAIL PROTECTED] On Behalf Of Grant Likely Sent: Thursday, March 06, 2008 12:39 PM To: John Linn Cc: linuxppc-embedded@ozlabs.org Subject: Re: Problems in fixup_device function On Thu, Mar 6, 2008 at 12:21 PM, John Linn [EMAIL PROTECTED] wrote: I've added some code to virtex_device_fixup and am seeing some strange side affects. I've added code to read from an iic device and populate the mac address including ioremap. The code works fine, but the side affects are not fine. Specifically, what are you trying to do? Are you modifying the data in the platform device? Cheers, g. -- Grant Likely, B.Sc., P.Eng. Secret Lab Technologies Ltd. ___ Linuxppc-embedded mailing list Linuxppc-embedded@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-embedded
RE: Xilinx Temac link detect
Hi Kevin,
I couldn't find any example laying around, so I took a shot at it based
on other non-network examples we had. I've not personally done it so
bear that in mind.
I have not tried to compile any of this, just stole parts for places and
pasted in.
Hope it helps,
John
#include ioctl.h
/*
* FD of the IIC device opened.
*/
int Fdtemac;
struct mii_ioctl_data ioctl_data;
/*
* Open the device.
*/
Fdtemac = open(/dev/TBD, O_RDWR);
if(Fdtemac 0)
{
printf(Cannot open the temac device\n);
return -1;
}
/* setup the inputs to the ioctl call */
ioctl_data.phy_num = TBD;
ioctl_data.reg_num = TBD;
/*
* Read the phy register
*/
Register = ioctl(Fdtemac, SIOCGMIIREG, ioctl_data);
if(Status 0)
{
/* failure */
return 0;
}
/* results should be in ioctl_data.val_out I think
}
From the temac linux adapter, a snippet showing the the ioctl function.
xenet_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
{
struct mii_ioctl_data *data = (struct mii_ioctl_data *)
rq-ifr_data;
case SIOCGMIIREG: /* Read GMII PHY register. */
ret = XTemac_PhyRead(lp-Emac, data-phy_id,
data-reg_num, data-val_out);
}
from linux/mii.h
/* This structure is used in all SIOCxMIIxxx ioctl calls */
struct mii_ioctl_data {
__u16 phy_id;
__u16 reg_num;
__u16 val_in;
__u16 val_out;
};
from linux/if.h
struct ifreq
{
#define IFHWADDRLEN 6
union
{
charifrn_name[IFNAMSIZ];/* if name, e.g.
en0 */
} ifr_ifrn;
union {
struct sockaddr ifru_addr;
struct sockaddr ifru_dstaddr;
struct sockaddr ifru_broadaddr;
struct sockaddr ifru_netmask;
struct sockaddr ifru_hwaddr;
short ifru_flags;
int ifru_ivalue;
int ifru_mtu;
struct ifmap ifru_map;
charifru_slave[IFNAMSIZ]; /* Just fits the size */
charifru_newname[IFNAMSIZ];
void __user * ifru_data;
struct if_settings ifru_settings;
} ifr_ifru;
};
-Original Message-
From: [EMAIL PROTECTED]
[mailto:[EMAIL PROTECTED] On
Behalf Of khollan
Sent: Thursday, March 06, 2008 1:44 PM
To: linuxppc-embedded@ozlabs.org
Subject: Re: Xilinx Temac link detect
I figure I could write a C program to talk to the ioctl in the TEMAC
driver
and read the PHY register. Does anyone have example code for talking to
network ioctl's?
Thanks
Kevin
--
View this message in context:
http://www.nabble.com/Xilinx-Temac-link-detect-tp15616042p15883376.html
Sent from the linuxppc-embedded mailing list archive at Nabble.com.
___
Linuxppc-embedded mailing list
Linuxppc-embedded@ozlabs.org
https://ozlabs.org/mailman/listinfo/linuxppc-embedded
___
Linuxppc-embedded mailing list
Linuxppc-embedded@ozlabs.org
https://ozlabs.org/mailman/listinfo/linuxppc-embedded
RE: Xilinx git tree, LLTemac driver
Hi Magnus, I just applied the change to the git tree for getting the mac address from the board data and it looks like I should have taken into account the powerpc arch also as I was building and testing ppc arch. It looks like #ifndef needs to be added around the use of the __res for copying the mac address from the board data so that it doesn't do that in the powerpc arch. #ifndef CONFIG_OF memcpy(ndev-dev_addr, ((bd_t *) __res)-bi_enetaddr, 6); memcpy(pdata-mac_addr, ((bd_t *) __res)-bi_enetaddr, 6); #endif The #ifndef may also be needed around the extern for __res. I'll test these changes. Thanks, John -Original Message- From: Magnus Hjorth [mailto:[EMAIL PROTECTED] Sent: Tuesday, March 04, 2008 2:58 AM To: linuxppc-embedded@ozlabs.org Cc: git Subject: Xilinx git tree, LLTemac driver Hi, I'm trying to compile the Linux kernel from the Xilinx git tree (linux-2.6-xlnx) and am having some trouble with the LLTemac driver, having to do with MAC address settings. There seems to be two routines getting the MAC address in different ways. The xtenet_probe function tries to access an extern bd_t __res, the type bd_t doesn't exist in the powerpc tree which causes the compilation to fail. Then there is the xtenet_of_probe function which uses of_get_mac_address. What confuses me is that both the regular and the OF driver is registered in the xtenet_init function, I would have expected it to be either/or. Can I expect under the powerpc arch and supplying a .dts file, that the xtenet_probe function will never be called? Best regards, Magnus -- Magnus Hjorth, M.Sc. Omnisys Instruments AB Gruvgatan 8 SE-421 30 Västra Frölunda, SWEDEN Phone: +46 31 734 34 09 Fax: +46 31 734 34 29 http://www.omnisys.se ___ Linuxppc-embedded mailing list Linuxppc-embedded@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-embedded
BUG: scheduling while atomic
I'm using 2.6.24-rc8 on a PPC 440 and getting this error. I've also seen another form of it when doing Telnet. In this case, I'm doing a copy of a file on an NFS mount. Any help would be appreciated. Thanks, John Linn # cp ftptest2 ftptest2_copied BUG: scheduling while atomic: cp/355/0x0efe Call Trace: [cfc89ec0] [c000725c] show_stack+0x4c/0x174 (unreliable) [cfc89ef0] [c0016880] __schedule_bug+0x54/0x68 [cfc89f10] [c01df464] schedule+0x50/0x300 [cfc89f40] [c0002374] recheck+0x0/0x24 BUG: scheduling while atomic: cp/355/0x0efe Call Trace: [cfc89c50] [c000725c] show_stack+0x4c/0x174 (unreliable) [cfc89c80] [c0016880] __schedule_bug+0x54/0x68 [cfc89ca0] [c01df464] schedule+0x50/0x300 [cfc89cd0] [c01df744] io_schedule+0x30/0x54 [cfc89cf0] [c003d79c] sync_page+0x44/0x58 [cfc89d00] [c01dfaf0] __wait_on_bit_lock+0x68/0xc8 [cfc89d20] [c003da28] __lock_page+0x64/0x78 [cfc89d60] [c00402d0] do_generic_mapping_read+0x218/0x418 [cfc89db0] [c00405fc] generic_file_aio_read+0x12c/0x1a8 [cfc89e00] [c00cba0c] nfs_file_read+0xf0/0x104 [cfc89e30] [c005b3d4] do_sync_read+0xb8/0x10c [cfc89ef0] [c005b840] vfs_read+0xc0/0x154 [cfc89f10] [c005c3bc] sys_read+0x4c/0x8c [cfc89f40] [c0001960] ret_from_syscall+0x0/0x3c BUG: scheduling while atomic: cp/355/0x0efe Call Trace: ___ Linuxppc-embedded mailing list Linuxppc-embedded@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-embedded
