[Mesa-dev] [Bug 88275] [865G] Intel OpenGL rendering isn't starting
https://bugs.freedesktop.org/show_bug.cgi?id=88275 --- Comment #23 from Eugene ken20...@ukr.net --- Just a little update. Latest Mesa git and drm-intel-nightly #201501220251. Issue with mouse is gone and now it's ok. But OGL rendering still not starting: $glxinfo | grep error libGL error: failed to create dri screen libGL error: failed to load driver: i915 Trying to logoff gives black screen. And the following in logs: $grep -i error /var/log/syslog [drm] GPU HANG: ecode -1:0x, reason: Command parser error, iir 0x8000, action: continue [drm] GPU crash dump saved to /sys/class/drm/card0/error i915: render error detected, EIR: 0x0010 [drm:i915_report_and_clear_eir] *ERROR* EIR stuck: 0x0010, masking [drm] GPU HANG: ecode -1:0x, reason: Command parser error, iir 0x8000, action: continue i915: render error detected, EIR: 0x0010 [drm] GPU crash dump saved to /sys/class/drm/card0/error [drm:i915_reset [i915]] *ERROR* Failed to reset chip: -19 Please, fix it. -- You are receiving this mail because: You are the assignee for the bug. ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [PATCH 03/10] i965/nir: Report NIR instruction counts (in SSA form) via KHR_debug.
This allows us to count NIR instructions via shader-db.
Use run as normal. The results file will contain both NIR and
assembly.
Then, to generate a NIR report:
./report.py (grepNIR results/foo) (grepNIR results/bar)
Or, to generate an i965 report:
./report.py (grep -v NIR results/foo) (grep -v NIR results/bar)
Signed-off-by: Kenneth Graunke kenn...@whitecape.org
---
src/mesa/drivers/dri/i965/brw_fs_nir.cpp | 32
1 file changed, 32 insertions(+)
I'm guessing the counting should really go in nir proper.
This is what I used to generate the statistics, in case people were
wondering.
diff --git a/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
b/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
index 2d30321..0eb137f 100644
--- a/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
@@ -49,6 +49,28 @@ nir_optimize(nir_shader *nir)
} while (progress);
}
+static bool
+count_nir_instrs_in_block(nir_block *block, void *state)
+{
+ int *count = (int *) state;
+ nir_foreach_instr(block, instr) {
+ *count = *count + 1;
+ }
+ return true;
+}
+
+static int
+count_nir_instrs(nir_shader *nir)
+{
+ int count = 0;
+ nir_foreach_overload(nir, overload) {
+ if (!overload-impl)
+ continue;
+ nir_foreach_block(overload-impl, count_nir_instrs_in_block, count);
+ }
+ return count;
+}
+
void
fs_visitor::emit_nir_code()
{
@@ -99,6 +121,16 @@ fs_visitor::emit_nir_code()
nir_print_shader(nir, stderr);
}
+ if (dispatch_width == 8) {
+ static GLuint msg_id = 0;
+ _mesa_gl_debug(brw-ctx, msg_id,
+ MESA_DEBUG_SOURCE_SHADER_COMPILER,
+ MESA_DEBUG_TYPE_OTHER,
+ MESA_DEBUG_SEVERITY_NOTIFICATION,
+ FS NIR shader: %d inst\n,
+ count_nir_instrs(nir));
+ }
+
nir_convert_from_ssa(nir);
nir_validate_shader(nir);
nir_lower_vec_to_movs(nir);
--
2.2.2
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [PATCH 07/10] nir: Add algebraic optimizations for pointless shifts.
The GLSL IR optimization pass contained these; we may as well include
them too.
No change in the number of NIR instructions on a shader-db run.
total i965 instructions in shared programs: 6035397 - 6035393 (-0.00%)
i965 instructions in affected programs: 772 - 768 (-0.52%)
helped: 3 (all in glamor)
Signed-off-by: Kenneth Graunke kenn...@whitecape.org
---
src/glsl/nir/nir_opt_algebraic.py | 7 +++
1 file changed, 7 insertions(+)
diff --git a/src/glsl/nir/nir_opt_algebraic.py
b/src/glsl/nir/nir_opt_algebraic.py
index cf16b19..58e71e0 100644
--- a/src/glsl/nir/nir_opt_algebraic.py
+++ b/src/glsl/nir/nir_opt_algebraic.py
@@ -83,6 +83,13 @@ optimizations = [
# DeMorgan's Laws
(('iand', ('inot', a), ('inot', b)), ('inot', ('ior', a, b))),
(('ior', ('inot', a), ('inot', b)), ('inot', ('iand', a, b))),
+ # Shift optimizations
+ (('ishl', 0, a), 0),
+ (('ishl', a, 0), 0),
+ (('ishr', 0, a), 0),
+ (('ishr', a, 0), 0),
+ (('ushr', 0, a), 0),
+ (('ushr', a, 0), 0),
# This one may not be exact
(('feq', ('fadd', a, b), 0.0), ('feq', a, ('fneg', b))),
--
2.2.2
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [PATCH 09/10] nir: Add algebraic optimizations for exponential/logarithmic functions.
Most of these exist in the GLSL IR algebraic pass already. However,
SSA allows us to find more instances of the patterns.
total NIR instructions in shared programs: 2015593 - 2011430 (-0.21%)
NIR instructions in affected programs: 124189 - 120026 (-3.35%)
helped:604
total i965 instructions in shared programs: 6025508 - 6018718 (-0.11%)
i965 instructions in affected programs: 261070 - 254280 (-2.60%)
helped: 1295
HURT: 2 (by 1 instruction each)
GAINED: 6
Signed-off-by: Kenneth Graunke kenn...@whitecape.org
---
src/glsl/nir/nir_opt_algebraic.py | 10 ++
1 file changed, 10 insertions(+)
diff --git a/src/glsl/nir/nir_opt_algebraic.py
b/src/glsl/nir/nir_opt_algebraic.py
index dec250b..a5b5715 100644
--- a/src/glsl/nir/nir_opt_algebraic.py
+++ b/src/glsl/nir/nir_opt_algebraic.py
@@ -99,6 +99,16 @@ optimizations = [
(('ishr', a, 0), 0),
(('ushr', 0, a), 0),
(('ushr', a, 0), 0),
+ # Exponential/logarithmic identities
+ (('fexp2', ('flog2', a)), a), # 2^lg2(a) = a
+ (('fexp', ('flog', a)), a), # e^ln(a) = a
+ (('flog2', ('fexp2', a)), a), # lg2(2^a) = a
+ (('flog', ('fexp', a)), a), # ln(e^a) = a
+ (('fexp2', ('fmul', ('flog2', a), b)), ('fpow', a, b)), # 2^(lg2(a)*b) = a^b
+ (('fexp', ('fmul', ('flog', a), b)), ('fpow', a, b)), # e^(ln(a)*b) = a^b
+ (('fpow', a, 1.0), a),
+ (('fpow', a, 2.0), ('fmul', a, a)),
+ (('fpow', 2.0, a), ('fexp2', a)),
# This one may not be exact
(('feq', ('fadd', a, b), 0.0), ('feq', a, ('fneg', b))),
--
2.2.2
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [PATCH 04/10] nir: Pull nir_instr_can_cse()'s SSA checks out of the switch.
This should not be a change in behavior, as all current cases that
potentially answer yes require SSA.
The next patch will introduce another case that requires SSA.
Signed-off-by: Kenneth Graunke kenn...@whitecape.org
---
src/glsl/nir/nir_opt_cse.c | 8 ++--
1 file changed, 6 insertions(+), 2 deletions(-)
Suggested by Jason.
diff --git a/src/glsl/nir/nir_opt_cse.c b/src/glsl/nir/nir_opt_cse.c
index a33ebdd..fef1678 100644
--- a/src/glsl/nir/nir_opt_cse.c
+++ b/src/glsl/nir/nir_opt_cse.c
@@ -139,12 +139,16 @@ dest_is_ssa(nir_dest *dest, void *data)
static bool
nir_instr_can_cse(nir_instr *instr)
{
+ /* We only handle SSA. */
+ if (!nir_foreach_dest(instr, dest_is_ssa, NULL) ||
+ !nir_foreach_src(instr, src_is_ssa, NULL))
+ return false;
+
switch (instr-type) {
case nir_instr_type_alu:
case nir_instr_type_load_const:
case nir_instr_type_phi:
- return nir_foreach_dest(instr, dest_is_ssa, NULL)
- nir_foreach_src(instr, src_is_ssa, NULL);
+ return true;
case nir_instr_type_tex:
return false; /* TODO */
case nir_instr_type_intrinsic:
--
2.2.2
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [PATCH v2 05/10] nir: Implement CSE on intrinsics that can be eliminated and reordered.
Matt and I noticed that one of the shaders hurt by INTEL_USE_NIR=1 had
load_input and load_uniform intrinsics repeated several times, with the
same parameters, but each one generating a distinct SSA value. This
made ALU operations on those values appear distinct as well.
Generating distinct SSA values is silly - these are read only variables.
CSE'ing them makes everything use a single SSA value, which then allows
other operations to be CSE'd away as well.
Generalizing a bit, it seems like we should be able to safely CSE any
intrinsics that can be eliminated and reordered. I didn't implement
support for variables for the time being.
v2: Assert that info-num_variables == 0 (requested by Jason).
total NIR instructions in shared programs: 2435936 - 2023511 (-16.93%)
NIR instructions in affected programs: 2413496 - 2001071 (-17.09%)
helped:16872
total i965 instructions in shared programs: 6028987 - 6008427 (-0.34%)
i965 instructions in affected programs: 640654 - 620094 (-3.21%)
helped: 2071
HURT: 585
GAINED: 14
LOST: 25
Signed-off-by: Kenneth Graunke kenn...@whitecape.org
---
src/glsl/nir/nir_opt_cse.c | 40 ++--
1 file changed, 38 insertions(+), 2 deletions(-)
Here's v2 of CSE for intrinsics. Sounds like it's good to go.
diff --git a/src/glsl/nir/nir_opt_cse.c b/src/glsl/nir/nir_opt_cse.c
index fef1678..b3e9c0d 100644
--- a/src/glsl/nir/nir_opt_cse.c
+++ b/src/glsl/nir/nir_opt_cse.c
@@ -112,7 +112,34 @@ nir_instrs_equal(nir_instr *instr1, nir_instr *instr2)
return true;
}
- case nir_instr_type_intrinsic:
+ case nir_instr_type_intrinsic: {
+ nir_intrinsic_instr *intrinsic1 = nir_instr_as_intrinsic(instr1);
+ nir_intrinsic_instr *intrinsic2 = nir_instr_as_intrinsic(instr2);
+ const nir_intrinsic_info *info =
+ nir_intrinsic_infos[intrinsic1-intrinsic];
+
+ if (intrinsic1-intrinsic != intrinsic2-intrinsic ||
+ intrinsic1-num_components != intrinsic2-num_components)
+ return false;
+
+ if (info-has_dest intrinsic1-dest.ssa.num_components !=
+intrinsic2-dest.ssa.num_components)
+ return false;
+
+ for (unsigned i = 0; i info-num_srcs; i++) {
+ if (!nir_srcs_equal(intrinsic1-src[i], intrinsic2-src[i]))
+return false;
+ }
+
+ assert(info-num_variables == 0);
+
+ for (unsigned i = 0; i info-num_indices; i++) {
+ if (intrinsic1-const_index[i] != intrinsic2-const_index[i])
+return false;
+ }
+
+ return true;
+ }
case nir_instr_type_call:
case nir_instr_type_jump:
case nir_instr_type_ssa_undef:
@@ -151,7 +178,13 @@ nir_instr_can_cse(nir_instr *instr)
return true;
case nir_instr_type_tex:
return false; /* TODO */
- case nir_instr_type_intrinsic:
+ case nir_instr_type_intrinsic: {
+ const nir_intrinsic_info *info =
+ nir_intrinsic_infos[nir_instr_as_intrinsic(instr)-intrinsic];
+ return (info-flags NIR_INTRINSIC_CAN_ELIMINATE)
+ (info-flags NIR_INTRINSIC_CAN_REORDER)
+ info-num_variables == 0; /* not implemented yet */
+ }
case nir_instr_type_call:
case nir_instr_type_jump:
case nir_instr_type_ssa_undef:
@@ -176,6 +209,9 @@ nir_instr_get_dest_ssa_def(nir_instr *instr)
case nir_instr_type_phi:
assert(nir_instr_as_phi(instr)-dest.is_ssa);
return nir_instr_as_phi(instr)-dest.ssa;
+ case nir_instr_type_intrinsic:
+ assert(nir_instr_as_intrinsic(instr)-dest.is_ssa);
+ return nir_instr_as_intrinsic(instr)-dest.ssa;
default:
unreachable(We never ask for any of these);
}
--
2.2.2
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [PATCH 01/10] i965/nir: Do optimizations again just before lowering source mods.
We want to run CSE and algebraic optimizations again after lowering IO.
Some of the passes in the optimization loop don't handle saturates and
other modifiers, so run it before lowering to source modifiers.
total instructions in shared programs: 6046190 - 6045768 (-0.01%)
instructions in affected programs: 22406 - 21984 (-1.88%)
helped:47
HURT: 0
GAINED:0
LOST: 0
Signed-off-by: Kenneth Graunke kenn...@whitecape.org
---
src/mesa/drivers/dri/i965/brw_fs_nir.cpp | 34
1 file changed, 21 insertions(+), 13 deletions(-)
I'm not sure about this patch. It's obviously beneficial, but...
I wonder if we want some kind of optimization loop in core NIR,
along the lines of do_common_optimization. Right now, NIR seems
like a collection of tools to build your own compile process.
Which works, and the flexibility is nice. But having everything
in one place isn't a crazy plan either...
diff --git a/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
b/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
index 510092e..40a1673 100644
--- a/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
@@ -26,20 +26,9 @@
#include glsl/nir/glsl_to_nir.h
#include brw_fs.h
-void
-fs_visitor::emit_nir_code()
+static void
+nir_optimize(nir_shader *nir)
{
- /* first, lower the GLSL IR shader to NIR */
- lower_output_reads(shader-base.ir);
- nir_shader *nir = glsl_to_nir(shader-base.ir, NULL, true);
- nir_validate_shader(nir);
-
- nir_lower_global_vars_to_local(nir);
- nir_validate_shader(nir);
-
- nir_split_var_copies(nir);
- nir_validate_shader(nir);
-
bool progress;
do {
progress = false;
@@ -58,6 +47,23 @@ fs_visitor::emit_nir_code()
progress |= nir_opt_constant_folding(nir);
nir_validate_shader(nir);
} while (progress);
+}
+
+void
+fs_visitor::emit_nir_code()
+{
+ /* first, lower the GLSL IR shader to NIR */
+ lower_output_reads(shader-base.ir);
+ nir_shader *nir = glsl_to_nir(shader-base.ir, NULL, true);
+ nir_validate_shader(nir);
+
+ nir_lower_global_vars_to_local(nir);
+ nir_validate_shader(nir);
+
+ nir_split_var_copies(nir);
+ nir_validate_shader(nir);
+
+ nir_optimize(nir);
/* Lower a bunch of stuff */
nir_lower_var_copies(nir);
@@ -81,6 +87,8 @@ fs_visitor::emit_nir_code()
nir_lower_atomics(nir);
nir_validate_shader(nir);
+ nir_optimize(nir);
+
nir_lower_to_source_mods(nir);
nir_validate_shader(nir);
nir_copy_prop(nir);
--
2.2.2
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [PATCH 06/10] nir: Add a bunch of algebraic optimizations on logic/bit operations.
Matt and I noticed a bunch of val - ior a a operations in a shader,
so we decided to add an algebraic optimization for that. While there,
I decided to add a bunch more of them.
total NIR instructions in shared programs: 2023511 - 2020814 (-0.13%)
NIR instructions in affected programs: 149634 - 146937 (-1.80%)
helped:1032
i965 already cleans these up, so the final results aren't impressive:
total i965 instructions in shared programs: 6035392 - 6035397 (0.00%)
i965 instructions in affected programs: 764 - 769 (0.65%)
HURT: 3
However, improving the result of the NIR compile is worth doing.
Signed-off-by: Kenneth Graunke kenn...@whitecape.org
---
src/glsl/nir/nir_opt_algebraic.py | 16
1 file changed, 16 insertions(+)
diff --git a/src/glsl/nir/nir_opt_algebraic.py
b/src/glsl/nir/nir_opt_algebraic.py
index 169bb41..cf16b19 100644
--- a/src/glsl/nir/nir_opt_algebraic.py
+++ b/src/glsl/nir/nir_opt_algebraic.py
@@ -68,6 +68,22 @@ optimizations = [
(('fadd', ('fmul', a, b), c), ('ffma', a, b, c)),
(('fge', ('fneg', ('fabs', a)), 0.0), ('feq', a, 0.0)),
(('fmin', ('fmax', a, 1.0), 0.0), ('fsat', a)),
+ # Logical and bit operations
+ (('fand', a, a), a),
+ (('fand', a, 0.0), 0.0),
+ (('iand', a, a), a),
+ (('iand', a, 0), 0),
+ (('for', a, a), a),
+ (('for', a, 0.0), a),
+ (('ior', a, a), a),
+ (('ior', a, 0), a),
+ (('fxor', a, a), 0.0),
+ (('ixor', a, a), 0),
+ (('inot', ('inot', a)), a),
+ # DeMorgan's Laws
+ (('iand', ('inot', a), ('inot', b)), ('inot', ('ior', a, b))),
+ (('ior', ('inot', a), ('inot', b)), ('inot', ('iand', a, b))),
+
# This one may not be exact
(('feq', ('fadd', a, b), 0.0), ('feq', a, ('fneg', b))),
]
--
2.2.2
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [PATCH 08/10] nir: Add algebraic optimizations for simplifying comparisons.
The first batch removes bonus fnot/inot operations, possibly allowing
other optimizations to better recognize patterns.
The next batch replaces a fadd and constant 0.0 with an fneg - negation
is usually free on GPUs, while addition is not.
total NIR instructions in shared programs: 2020814 - 2015593 (-0.26%)
NIR instructions in affected programs: 411143 - 405922 (-1.27%)
helped:2233
HURT: 214
A few shaders are hurt by a few instructions due to moving neg such
that it has a constant operand, which is then folded, resulting in two
distinct load_consts for x and -x. We can always clean that up later.
total i965 instructions in shared programs: 6035393 - 6025508 (-0.16%)
i965 instructions in affected programs: 785208 - 775323 (-1.26%)
helped: 4509
HURT: 2
Signed-off-by: Kenneth Graunke kenn...@whitecape.org
---
src/glsl/nir/nir_opt_algebraic.py | 9 +
1 file changed, 9 insertions(+)
diff --git a/src/glsl/nir/nir_opt_algebraic.py
b/src/glsl/nir/nir_opt_algebraic.py
index 58e71e0..dec250b 100644
--- a/src/glsl/nir/nir_opt_algebraic.py
+++ b/src/glsl/nir/nir_opt_algebraic.py
@@ -66,6 +66,15 @@ optimizations = [
(('flrp', a, a, b), a),
(('flrp', 0.0, a, b), ('fmul', a, b)),
(('fadd', ('fmul', a, b), c), ('ffma', a, b, c)),
+ # Comparison simplifications
+ (('inot', ('flt', a, b)), ('fge', a, b)),
+ (('inot', ('fge', a, b)), ('flt', a, b)),
+ (('inot', ('ilt', a, b)), ('ige', a, b)),
+ (('inot', ('ige', a, b)), ('ilt', a, b)),
+ (('flt', ('fadd', a, b), 0.0), ('flt', a, ('fneg', b))),
+ (('fge', ('fadd', a, b), 0.0), ('fge', a, ('fneg', b))),
+ (('feq', ('fadd', a, b), 0.0), ('feq', a, ('fneg', b))),
+ (('fne', ('fadd', a, b), 0.0), ('fne', a, ('fneg', b))),
(('fge', ('fneg', ('fabs', a)), 0.0), ('feq', a, 0.0)),
(('fmin', ('fmax', a, 1.0), 0.0), ('fsat', a)),
# Logical and bit operations
--
2.2.2
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [PATCH 10/10] nir: Add algebraic optimizations for division and reciprocal.
These also exist in opt_algebraic.cpp.
total NIR instructions in shared programs: 2011430 - 2011211 (-0.01%)
NIR instructions in affected programs: 42221 - 42002 (-0.52%)
helped:198
total i965 instructions in shared programs: 6020554 - 6020118 (-0.01%)
i965 instructions in affected programs: 84497 - 84061 (-0.52%)
helped: 394
HURT: 1 (by 1 instruction)
Signed-off-by: Kenneth Graunke kenn...@whitecape.org
---
src/glsl/nir/nir_opt_algebraic.py | 5 +
1 file changed, 5 insertions(+)
diff --git a/src/glsl/nir/nir_opt_algebraic.py
b/src/glsl/nir/nir_opt_algebraic.py
index a5b5715..a1ed503 100644
--- a/src/glsl/nir/nir_opt_algebraic.py
+++ b/src/glsl/nir/nir_opt_algebraic.py
@@ -109,6 +109,11 @@ optimizations = [
(('fpow', a, 1.0), a),
(('fpow', a, 2.0), ('fmul', a, a)),
(('fpow', 2.0, a), ('fexp2', a)),
+ # Division and reciprocal
+ (('fdiv', 1.0, a), ('frcp', a)),
+ (('frcp', ('frcp', a)), a),
+ (('frcp', ('fsqrt', a)), ('frsq', a)),
+ (('frcp', ('frsq', a)), ('fsqrt', a)),
# This one may not be exact
(('feq', ('fadd', a, b), 0.0), ('feq', a, ('fneg', b))),
--
2.2.2
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [PATCH v1] Remove UINT_AS_FLT, INT_AS_FLT, FLOAT_AS_FLT macros.No functional changes, only bug fixed.
Hi,
The COPY_CLEAN_4V_TYPE_AS_FLOAT still doesn't look right because as the
last step it calls COPY_SZ_4V which will copy its float arguments using
floating-point registers. It seems the piglit test case is still failing
and if I step through with GDB I can see that it is hitting this code
and using the floating-point registers to do the copy. Are you compiling
your Mesa with -O3? It would be worth initially trying to replicate the
test failure and then verifying that the patch fixes at least the piglit
test before posting it.
I agree that this function should be changed to take pointers to
gl_constant_values instead of GLfloats as suggested by Ian in his review
for the previous version.
Regards,
- Neil
marius.pre...@intel.com writes:
From: Marius Predut marius.pre...@intel.com
On 32-bit, for floating point operations is used x86 FPU registers instead
SSE,
reason for when reinterprets an integer as a float result is unexpected
(modify floats when they are written to memory).
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=82668
Signed-off-by: Marius Predut marius.pre...@intel.com
---
src/mesa/main/context.c |3 ++-
src/mesa/main/macros.h| 32
src/mesa/vbo/vbo_attrib_tmp.h | 20
src/mesa/vbo/vbo_exec.h |3 ++-
src/mesa/vbo/vbo_exec_api.c | 25 -
src/mesa/vbo/vbo_exec_eval.c | 22 +-
src/mesa/vbo/vbo_save_api.c | 10 +-
7 files changed, 70 insertions(+), 45 deletions(-)
diff --git a/src/mesa/main/context.c b/src/mesa/main/context.c
index 400c158..11ab8a9 100644
--- a/src/mesa/main/context.c
+++ b/src/mesa/main/context.c
@@ -134,6 +134,7 @@
#include math/m_matrix.h
#include main/dispatch.h /* for _gloffset_COUNT */
#include uniforms.h
+#include macros.h
#ifdef USE_SPARC_ASM
#include sparc/sparc.h
@@ -656,7 +657,7 @@ _mesa_init_constants(struct gl_constants *consts, gl_api
api)
consts-MaxSamples = 0;
/* GLSL default if NativeIntegers == FALSE */
- consts-UniformBooleanTrue = FLT_AS_UINT(1.0f);
+ consts-UniformBooleanTrue = FLOAT_AS_UNION(1.0f).u;
/* GL_ARB_sync */
consts-MaxServerWaitTimeout = 0x1fff7fffULL;
diff --git a/src/mesa/main/macros.h b/src/mesa/main/macros.h
index cd5f2d6..12c9997 100644
--- a/src/mesa/main/macros.h
+++ b/src/mesa/main/macros.h
@@ -32,6 +32,7 @@
#define MACROS_H
#include imports.h
+#include program/prog_parameter.h
/**
@@ -170,27 +171,26 @@ extern GLfloat _mesa_ubyte_to_float_color_tab[256];
ub = ((GLubyte) F_TO_I((f) * 255.0F))
#endif
-static inline GLfloat INT_AS_FLT(GLint i)
+static union gl_constant_value UINT_AS_UNION(GLuint u)
{
- fi_type tmp;
- tmp.i = i;
- return tmp.f;
+ union gl_constant_value tmp;
+ tmp.u = u;
+ return tmp;
}
-static inline GLfloat UINT_AS_FLT(GLuint u)
+static inline union gl_constant_value INT_AS_UNION(GLint i)
{
- fi_type tmp;
- tmp.u = u;
- return tmp.f;
+ union gl_constant_value tmp;
+ tmp.i = i;
+ return tmp;
}
-static inline unsigned FLT_AS_UINT(float f)
+static inline union gl_constant_value FLOAT_AS_UNION(GLfloat f)
{
- fi_type tmp;
+ union gl_constant_value tmp;
tmp.f = f;
- return tmp.u;
+ return tmp;
}
-
/**
* Convert a floating point value to an unsigned fixed point value.
*
@@ -628,12 +628,12 @@ COPY_CLEAN_4V_TYPE_AS_FLOAT(GLfloat dst[4], int sz,
const GLfloat src[4],
ASSIGN_4V(dst, 0, 0, 0, 1);
break;
case GL_INT:
- ASSIGN_4V(dst, INT_AS_FLT(0), INT_AS_FLT(0),
- INT_AS_FLT(0), INT_AS_FLT(1));
+ ASSIGN_4V(dst, INT_AS_UNION(0).f, INT_AS_UNION(0).f,
+INT_AS_UNION(0).f, INT_AS_UNION(1).f);
break;
case GL_UNSIGNED_INT:
- ASSIGN_4V(dst, UINT_AS_FLT(0), UINT_AS_FLT(0),
- UINT_AS_FLT(0), UINT_AS_FLT(1));
+ ASSIGN_4V(dst, UINT_AS_UNION(0).f, UINT_AS_UNION(0).f,
+UINT_AS_UNION(0).f, UINT_AS_UNION(1).f);
break;
default:
ASSIGN_4V(dst, 0.0f, 0.0f, 0.0f, 1.0f); /* silence warnings */
diff --git a/src/mesa/vbo/vbo_attrib_tmp.h b/src/mesa/vbo/vbo_attrib_tmp.h
index ec66934..17a0a10 100644
--- a/src/mesa/vbo/vbo_attrib_tmp.h
+++ b/src/mesa/vbo/vbo_attrib_tmp.h
@@ -28,6 +28,18 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
#include util/u_format_r11g11b10f.h
#include main/varray.h
+
+/* ATTR */
+#define ATTR( A, N, T, V0, V1, V2, V3 )ATTR_##T((A), (N), (T), (V0),
(V1), (V2), (V3))
+
+#define ATTR_GL_UNSIGNED_INT( A, N, T, V0, V1, V2, V3 ) \
+ATTR_UNION(A, N, T, UINT_AS_UNION(V0), UINT_AS_UNION(V1),
UINT_AS_UNION(V2), UINT_AS_UNION(V3))
+#define ATTR_GL_INT( A, N, T, V0, V1, V2, V3 ) \
+ATTR_UNION(A, N, T, INT_AS_UNION(V0), INT_AS_UNION(V1),
INT_AS_UNION(V2), INT_AS_UNION(V3))
+#define ATTR_GL_FLOAT( A, N, T,
Re: [Mesa-dev] [PATCH 2/2] st/clover: Use std::string for target IR string parameter
Michel Dänzer mic...@daenzer.net writes:
From: Michel Dänzer michel.daen...@amd.com
That's what device::ir_target() returns. Fixes reading beyond allocated
memory:
==1936== Invalid read of size 1
==1936==at 0x4C2C1B4: strlen (vg_replace_strmem.c:412)
==1936==by 0x9E00C30: std::basic_stringchar, std::char_traitschar,
std::allocatorchar ::basic_string(char const*, std::allocatorchar
const) (in /usr/lib/x86_64-linux-gnu/libstdc++.so.6.0.20)
==1936==by 0x5B44FAE: clover::compile_program_llvm(clover::compat::string
const, clover::compat::vectorclover::compat::pairclover::compat::string,
clover::compat::string const, pipe_shader_ir, clover::compat::string
const, clover::compat::string const, clover::compat::string)
(invocation.cpp:698)
==1936==by 0x5B39A20:
clover::program::build(clover::ref_vectorclover::device const, char
const*, clover::compat::vectorclover::compat::pairclover::compat::string,
clover::compat::string const) (program.cpp:63)
==1936==by 0x5B20152: clBuildProgram (program.cpp:182)
==1936==by 0x400F41: main (hello_world.c:109)
==1936== Address 0x56fee1f is 0 bytes after a block of size 15 alloc'd
==1936==at 0x4C28C20: malloc (vg_replace_malloc.c:296)
==1936==by 0x5B398F0: alloc (compat.hpp:59)
==1936==by 0x5B398F0: vectorstd::basic_stringchar (compat.hpp:98)
==1936==by 0x5B398F0: stringstd::basic_stringchar (compat.hpp:327)
==1936==by 0x5B398F0:
clover::program::build(clover::ref_vectorclover::device const, char
const*, clover::compat::vectorclover::compat::pairclover::compat::string,
clover::compat::string const) (program.cpp:63)
==1936==by 0x5B20152: clBuildProgram (program.cpp:182)
==1936==by 0x400F41: main (hello_world.c:109)
Signed-off-by: Michel Dänzer michel.daen...@amd.com
Hi Michel, apparently the problem is this line:
| size_t processor_str_len = std::string(target.begin()).find_first_of(-);
That assumes that compat::string::begin() is null-terminated, which is
not necessarily the case.
Unfortunately I don't think we make that argument an std::string if we
still want to support building with LLVM 3.5, since it may lead to ABI
issues. Can you change the line to use the conversion operator instead
for the time being, like:
| size_t processor_str_len = std::string(target).find_first_of(-);
Thanks!
---
src/gallium/state_trackers/clover/core/compiler.hpp | 2 +-
src/gallium/state_trackers/clover/llvm/invocation.cpp | 8
2 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/src/gallium/state_trackers/clover/core/compiler.hpp
b/src/gallium/state_trackers/clover/core/compiler.hpp
index 7210d1e..21ef1e9 100644
--- a/src/gallium/state_trackers/clover/core/compiler.hpp
+++ b/src/gallium/state_trackers/clover/core/compiler.hpp
@@ -35,7 +35,7 @@ namespace clover {
module compile_program_llvm(const compat::string source,
const header_map headers,
pipe_shader_ir ir,
- const compat::string target,
+ const std::string target,
const compat::string opts,
compat::string r_log);
diff --git a/src/gallium/state_trackers/clover/llvm/invocation.cpp
b/src/gallium/state_trackers/clover/llvm/invocation.cpp
index 6cc07b2..5050345 100644
--- a/src/gallium/state_trackers/clover/llvm/invocation.cpp
+++ b/src/gallium/state_trackers/clover/llvm/invocation.cpp
@@ -686,7 +686,7 @@ module
clover::compile_program_llvm(const compat::string source,
const header_map headers,
enum pipe_shader_ir ir,
- const compat::string target,
+ const std::string target,
const compat::string opts,
compat::string r_log) {
@@ -695,9 +695,9 @@ clover::compile_program_llvm(const compat::string source,
debug_options, 0);
std::vectorllvm::Function * kernels;
- size_t processor_str_len = std::string(target.begin()).find_first_of(-);
- std::string processor(target.begin(), 0, processor_str_len);
- std::string triple(target.begin(), processor_str_len + 1,
+ size_t processor_str_len = target.find_first_of(-);
+ std::string processor(target.data(), 0, processor_str_len);
+ std::string triple(target.data(), processor_str_len + 1,
target.size() - processor_str_len - 1);
clang::LangAS::Map address_spaces;
llvm::LLVMContext llvm_ctx;
--
2.1.4
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/mesa-dev
pgpaL6dkL7aWm.pgp
Description: PGP signature
___
mesa-dev
Re: [Mesa-dev] [PATCH v3 01/10] mesa/dd: Add a function for creating a texture from a buffer object
Jason Ekstrand ja...@jlekstrand.net writes:
---
src/mesa/main/dd.h | 15 +++
1 file changed, 15 insertions(+)
diff --git a/src/mesa/main/dd.h b/src/mesa/main/dd.h
index 2f40915..eb30847 100644
--- a/src/mesa/main/dd.h
+++ b/src/mesa/main/dd.h
@@ -415,6 +415,21 @@ struct dd_function_table {
struct gl_texture_object *texObj,
struct gl_texture_object *origTexObj);
+ /** Sets the given buffer object as the texture's storage. The given
+* texture must have target GL_TEXTURE_1D, GL_TEXTURE_2D, or
+* GL_TEXTURE_RECTANGLE; have only a single level; be immutable; and
+* must not have any assigned storage. The format and dimensions of the
+* gl_texture_object will already be initialized.
It might be worth adding GL_TEXTURE_2D_ARRAY to this list because that
is used by the subsequent patches.
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [mesa-dev][PATCH] Remove UINT_AS_FLT, INT_AS_FLT, FLOAT_AS_FLT macros.No functional changes, only bug fixed.
On 20/01/15 15:30, marius.pre...@intel.com wrote: From: Marius Predut marius.pre...@intel.com Hi Marius, Can you rework the lengthy Remove . commit summary. Please try to explain briefly what you've done. Adding the relevant prefix is also recommended - here is a wild guess: mesa: correctly interpret integer to float casts in Also when nominating patches for stable, please include the Cc: mesa-stable... line in the commit message, as per the instructions [1]. Thanks Emil [1] Section Marking a commit as a candidate for a stable branch http://mesa3d.org/devinfo.html ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [PATCH] configure: Link against all LLVM targets when building clover
On Thu, 2015-01-22 at 16:45 +, Emil Velikov wrote: On 15/01/15 21:38, Tom Stellard wrote: On Thu, Jan 15, 2015 at 07:25:56PM +0100, Niels Ole Salscheider wrote: Since 8e7df519bd8556591794b2de08a833a67e34d526, we initialise all targets in clover. This fixes bug 85189. Signed-off-by: Niels Ole Salscheider niels_...@salscheider-online.de Reviewed-by: Tom Stellard thomas.stell...@amd.com Hi Niels, Can you confirm if this is needed for the 10.4 branch ? The commit mentioned got in the 10.4 devel cycle. Also the bug mentioned (https://bugs.freedesktop.org/show_bug.cgi?id=85189) seems to have alternative fix which is already in master. I take that this fix is required when building with static llvm ? the patch looks like it fixes https://bugs.freedesktop.org/show_bug.cgi?id=85380 instead of 85189 jan Thanks Emil ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev -- Jan Vesely jan.ves...@rutgers.edu signature.asc Description: This is a digitally signed message part ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [PATCH 03/10] i965/nir: Report NIR instruction counts (in SSA form) via KHR_debug.
On Jan 22, 2015 3:41 AM, Kenneth Graunke kenn...@whitecape.org wrote:
This allows us to count NIR instructions via shader-db.
Use run as normal. The results file will contain both NIR and
assembly.
Then, to generate a NIR report:
./report.py (grepNIR results/foo) (grepNIR results/bar)
Or, to generate an i965 report:
./report.py (grep -v NIR results/foo) (grep -v NIR results/bar)
Signed-off-by: Kenneth Graunke kenn...@whitecape.org
---
src/mesa/drivers/dri/i965/brw_fs_nir.cpp | 32
1 file changed, 32 insertions(+)
I'm guessing the counting should really go in nir proper.
This is what I used to generate the statistics, in case people were
wondering.
diff --git a/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
b/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
index 2d30321..0eb137f 100644
--- a/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
@@ -49,6 +49,28 @@ nir_optimize(nir_shader *nir)
} while (progress);
}
+static bool
+count_nir_instrs_in_block(nir_block *block, void *state)
+{
+ int *count = (int *) state;
+ nir_foreach_instr(block, instr) {
+ *count = *count + 1;
*count++? Also, we could get rid of the braces on this if. Otherwise, I
like this.
+ }
+ return true;
+}
+
+static int
+count_nir_instrs(nir_shader *nir)
+{
+ int count = 0;
+ nir_foreach_overload(nir, overload) {
+ if (!overload-impl)
+ continue;
+ nir_foreach_block(overload-impl, count_nir_instrs_in_block,
count);
+ }
+ return count;
+}
+
void
fs_visitor::emit_nir_code()
{
@@ -99,6 +121,16 @@ fs_visitor::emit_nir_code()
nir_print_shader(nir, stderr);
}
+ if (dispatch_width == 8) {
+ static GLuint msg_id = 0;
+ _mesa_gl_debug(brw-ctx, msg_id,
+ MESA_DEBUG_SOURCE_SHADER_COMPILER,
+ MESA_DEBUG_TYPE_OTHER,
+ MESA_DEBUG_SEVERITY_NOTIFICATION,
+ FS NIR shader: %d inst\n,
+ count_nir_instrs(nir));
+ }
+
nir_convert_from_ssa(nir);
nir_validate_shader(nir);
nir_lower_vec_to_movs(nir);
--
2.2.2
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/mesa-dev
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [PATCH] i965: Set nr_params to the number of uniform components in the VS/GS path.
Both do_vs_prog and do_gs_prog initialize brw_stage_prog_data::nr_params to
the number of uniform *vectors* required by the shader rather than the number
of uniform components, contradicting the comment. This is inconsistent with
what the state upload code and scalar path expect but it happens to work until
Gen8 because vec4_visitor interprets it as a number of vectors on construction
and later on overwrites its original value with the number of uniform
components referenced by the shader.
Also there's no need to add the number of samplers, they're not actually
passed in as uniforms.
Fixes a memory corruption issue on BDW with SIMD8 VS.
---
src/mesa/drivers/dri/i965/brw_gs.c | 6 +-
src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp | 3 ++-
src/mesa/drivers/dri/i965/brw_vs.c | 10 +-
3 files changed, 4 insertions(+), 15 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_gs.c
b/src/mesa/drivers/dri/i965/brw_gs.c
index c7ebe5f..ce3cba4 100644
--- a/src/mesa/drivers/dri/i965/brw_gs.c
+++ b/src/mesa/drivers/dri/i965/brw_gs.c
@@ -69,11 +69,7 @@ do_gs_prog(struct brw_context *brw,
rzalloc_array(NULL, const gl_constant_value *, param_count);
c.prog_data.base.base.pull_param =
rzalloc_array(NULL, const gl_constant_value *, param_count);
- /* Setting nr_params here NOT to the size of the param and pull_param
-* arrays, but to the number of uniform components vec4_visitor
-* needs. vec4_visitor::setup_uniforms() will set it back to a proper value.
-*/
- c.prog_data.base.base.nr_params = ALIGN(param_count, 4) / 4 +
gs-num_samplers;
+ c.prog_data.base.base.nr_params = param_count;
if (brw-gen = 7) {
if (gp-program.OutputType == GL_POINTS) {
diff --git a/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
b/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
index 8b8b27f..f06ee53 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
@@ -3624,7 +3624,8 @@ vec4_visitor::vec4_visitor(struct brw_context *brw,
*/
this-uniform_array_size = 1;
if (prog_data) {
- this-uniform_array_size = MAX2(stage_prog_data-nr_params, 1);
+ this-uniform_array_size = MAX2(CEILING(stage_prog_data-nr_params, 4),
+ 1);
}
this-uniform_size = rzalloc_array(mem_ctx, int, this-uniform_array_size);
diff --git a/src/mesa/drivers/dri/i965/brw_vs.c
b/src/mesa/drivers/dri/i965/brw_vs.c
index 2d56b74..f360d4e 100644
--- a/src/mesa/drivers/dri/i965/brw_vs.c
+++ b/src/mesa/drivers/dri/i965/brw_vs.c
@@ -241,15 +241,7 @@ do_vs_prog(struct brw_context *brw,
rzalloc_array(NULL, const gl_constant_value *, param_count);
stage_prog_data-pull_param =
rzalloc_array(NULL, const gl_constant_value *, param_count);
-
- /* Setting nr_params here NOT to the size of the param and pull_param
-* arrays, but to the number of uniform components vec4_visitor
-* needs. vec4_visitor::setup_uniforms() will set it back to a proper value.
-*/
- stage_prog_data-nr_params = ALIGN(param_count, 4) / 4;
- if (vs) {
- stage_prog_data-nr_params += vs-num_samplers;
- }
+ stage_prog_data-nr_params = param_count;
GLbitfield64 outputs_written = vp-program.Base.OutputsWritten;
prog_data.inputs_read = vp-program.Base.InputsRead;
--
2.1.3
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [PATCH 01/10] i965/nir: Do optimizations again just before lowering source mods.
I like this, but it's going to conflict with the universe as far as other
i965 not changes are concerned so I'm not sure when we want to land it.
Other than that and the handful of comments, this series is
Reviewed-by: Jason Ekstrand jason.ekstr...@intel.com
On Jan 22, 2015 3:41 AM, Kenneth Graunke kenn...@whitecape.org wrote:
We want to run CSE and algebraic optimizations again after lowering IO.
Some of the passes in the optimization loop don't handle saturates and
other modifiers, so run it before lowering to source modifiers.
total instructions in shared programs: 6046190 - 6045768 (-0.01%)
instructions in affected programs: 22406 - 21984 (-1.88%)
helped:47
HURT: 0
GAINED:0
LOST: 0
Signed-off-by: Kenneth Graunke kenn...@whitecape.org
---
src/mesa/drivers/dri/i965/brw_fs_nir.cpp | 34
1 file changed, 21 insertions(+), 13 deletions(-)
I'm not sure about this patch. It's obviously beneficial, but...
I wonder if we want some kind of optimization loop in core NIR,
along the lines of do_common_optimization. Right now, NIR seems
like a collection of tools to build your own compile process.
Which works, and the flexibility is nice. But having everything
in one place isn't a crazy plan either...
diff --git a/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
b/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
index 510092e..40a1673 100644
--- a/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
@@ -26,20 +26,9 @@
#include glsl/nir/glsl_to_nir.h
#include brw_fs.h
-void
-fs_visitor::emit_nir_code()
+static void
+nir_optimize(nir_shader *nir)
{
- /* first, lower the GLSL IR shader to NIR */
- lower_output_reads(shader-base.ir);
- nir_shader *nir = glsl_to_nir(shader-base.ir, NULL, true);
- nir_validate_shader(nir);
-
- nir_lower_global_vars_to_local(nir);
- nir_validate_shader(nir);
-
- nir_split_var_copies(nir);
- nir_validate_shader(nir);
-
bool progress;
do {
progress = false;
@@ -58,6 +47,23 @@ fs_visitor::emit_nir_code()
progress |= nir_opt_constant_folding(nir);
nir_validate_shader(nir);
} while (progress);
+}
+
+void
+fs_visitor::emit_nir_code()
+{
+ /* first, lower the GLSL IR shader to NIR */
+ lower_output_reads(shader-base.ir);
+ nir_shader *nir = glsl_to_nir(shader-base.ir, NULL, true);
+ nir_validate_shader(nir);
+
+ nir_lower_global_vars_to_local(nir);
+ nir_validate_shader(nir);
+
+ nir_split_var_copies(nir);
+ nir_validate_shader(nir);
+
+ nir_optimize(nir);
/* Lower a bunch of stuff */
nir_lower_var_copies(nir);
@@ -81,6 +87,8 @@ fs_visitor::emit_nir_code()
nir_lower_atomics(nir);
nir_validate_shader(nir);
+ nir_optimize(nir);
+
nir_lower_to_source_mods(nir);
nir_validate_shader(nir);
nir_copy_prop(nir);
--
2.2.2
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/mesa-dev
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [PATCH 5/5] nir: Add nir_lower_alu_scalar.
Jason Ekstrand ja...@jlekstrand.net writes:
Overall this looks correct. I've got a few nits below and I'd like to take
a look at it with fresh eyes before giving an R-B as it's complicated
especially with all of the stuff to handle non-ssa. Not sure if it's
really worth doing non-ssa now that I see how much more complicated it
makes things.
--Jason
On Wed, Jan 21, 2015 at 5:26 PM, Eric Anholt e...@anholt.net wrote:
This is the equivalent of brw_fs_channel_expressions.cpp, which I wanted
for vc4.
+static void
+reduce_op_replace(nir_alu_instr *instr, nir_ssa_def *def, void *mem_ctx)
+{
+ assert(instr-dest.write_mask == 1);
+
+ if (instr-dest.dest.is_ssa) {
+ nir_src new_src;
+ new_src.is_ssa = true;
+ new_src.ssa = def;
+ nir_ssa_def_rewrite_uses(instr-dest.dest.ssa, new_src, mem_ctx);
+ } else {
+ nir_alu_instr *mov = nir_alu_instr_create(mem_ctx, nir_op_imov);
+ mov-src[0].src.is_ssa = true;
+ mov-src[0].src.ssa = def;
+
+ nir_alu_dest_copy(mov-dest, instr-dest, mem_ctx);
+ nir_instr_insert_after(instr-instr, mov-instr);
I usually do insert_before when possible. It will result in the same list
(since we remove the instruction we're putting this before) but, since this
happens as we're iterating over it, insert_before is a bit safer. Maybe
this is still safe; I'm not sure.
Done.
+ }
+
+ nir_instr_remove(instr-instr);
+}
+
+static void
+lower_reduction(nir_alu_instr *instr, nir_op chan_op, nir_op merge_op,
+void *mem_ctx)
+{
+ unsigned num_components = nir_op_infos[instr-op].input_sizes[0];
+
+ nir_ssa_def *last = NULL;
+ for (unsigned i = 0; i num_components; i++) {
+ nir_alu_instr *chan = nir_alu_instr_create(mem_ctx, chan_op);
+ nir_alu_ssa_dest_init(chan, 1);
+ nir_alu_src_copy(chan-src[0], instr-src[0], mem_ctx);
+ chan-src[0].swizzle[0] = chan-src[0].swizzle[i];
+ if (nir_op_infos[chan_op].num_inputs 1) {
assert num_inputs == 2 here?
Done.
+ nir_alu_src_copy(chan-src[1], instr-src[1], mem_ctx);
+ chan-src[1].swizzle[0] = chan-src[1].swizzle[i];
+ }
+
+ nir_instr_insert_before(instr-instr, chan-instr);
+
+ if (i == 0) {
+ last = chan-dest.dest.ssa;
+ } else {
+ nir_alu_instr *merge = nir_alu_instr_create(mem_ctx, merge_op);
+ nir_alu_ssa_dest_init(merge, 1);
+ merge-dest.write_mask = 1;
+ merge-src[0].src.is_ssa = true;
+ merge-src[0].src.ssa = last;
+ merge-src[1].src.is_ssa = true;
+ merge-src[1].src.ssa = chan-dest.dest.ssa;
+ nir_instr_insert_before(instr-instr, merge-instr);
+ last = merge-dest.dest.ssa;
It might be nice if the tree were better balanced but that looks like way
too much work, so meh.
Yeah, ew. We'll probably want the general rebalancer to be ported to
NIR, anyway.
+ if (num_components 2)
+ unsupported(instr-instr);
+ vec_instr = nir_alu_instr_create(mem_ctx, nir_op_map[num_components
- 2]);
+ nir_alu_ssa_dest_init(vec_instr, num_components);
+ }
+
+ /* Walk from the end of the channels, so our incremental inserts after
the
+* original instruction end up in a sensible xyzw order.
+*/
+ for (chan = 0; chan 4; chan++) {
+ if (!(lower_chans (1 chan))) {
+ if (instr-dest.dest.is_ssa
+ chan instr-dest.dest.ssa.num_components) {
+unsupported(instr-instr);
+ }
+ continue;
+ }
+
+ nir_alu_instr *lower = nir_alu_instr_create(mem_ctx, instr-op);
+ for (i = 0; i num_src; i++) {
+ /* bcsel and fcsel reuse the same src channel in src[0]. */
Stale comment. This isn't the case for bcsel or fcsel anymore
Fixed.
+ unsigned src_chan = (nir_op_infos[instr-op].input_sizes[i] == 1
?
+ 0 : chan);
I think you want input_sizes[i] != 0 here. We could have an instruction
that takes a vec2 as one component but is otherwise vectorized.
I don't even know what this path could reasonably do with a 2-component
src with a 2 component dest, though. Leave the original 2-component
swizzle in place? This path removes all other vector inputs from ALU
ops, so it seems like a funny theoretical operation to be trying to
handle here.
signature.asc
Description: PGP signature
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [PATCH] egl/dri2: implement platform_null.
Hi Haixia Shi,
On 22/01/15 17:35, Haixia Shi wrote:
Try the render node first and use it if available. Otherwise fall back to
normal nodes.
What is the use-case for such a platform - I assume it's worth
mentioning in the commit message ?
No other platform picks the device at random as seen below. Why did you
choose such an approach ? It seems like one can easily shoot themselves
by using it.
...
diff --git a/src/egl/drivers/dri2/platform_null.c
b/src/egl/drivers/dri2/platform_null.c
new file mode 100644
index 000..4f0b18f
--- /dev/null
+++ b/src/egl/drivers/dri2/platform_null.c
...
+static const char* node_path_fmt_card = /dev/dri/card%d;
You can reuse the DRM_DIR_NAME + DRM_DEV_NAME macros (from xf86drm.h)
for this.
+static const char* node_path_fmt_render = /dev/dri/renderD%d;
There is no macro for the renderD%d, although you can still use
DRM_DIR_NAME for the path.
+
+EGLBoolean
+dri2_initialize_null(_EGLDriver *drv, _EGLDisplay *disp)
+{
+ struct dri2_egl_display *dri2_dpy;
+ const char* err;
+ int i, render_node;
+ int driver_loaded = 0;
+
+ loader_set_logger(_eglLog);
+
+ dri2_dpy = calloc(1, sizeof *dri2_dpy);
+ if (!dri2_dpy)
+ return _eglError(EGL_BAD_ALLOC, eglInitialize);
+
+ disp-DriverData = (void *) dri2_dpy;
+
+ for (render_node = 1; render_node = 0; --render_node) {
+ const char* node_path_fmt =
+render_node ? node_path_fmt_render : node_path_fmt_card;
+ const int base = render_node ? 128 : 0;
+ for (i = 0; i 16; ++i) {
What was the reason behind choosing 16 here ?
+ char *card_path;
+ if (asprintf(card_path, node_path_fmt, base + i) 0)
+continue;
+
+ dri2_dpy-fd = open(card_path, O_RDWR);
If you open a normal node (card%d) I believe that you'll need an
authenticate hook in dri2_egl_display_vtbl. Does things work without it
on your system/platform ?
Cheers
Emil
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [Bug 88219] include/c11/threads_posix.h:197: undefined reference to `pthread_mutex_lock'
https://bugs.freedesktop.org/show_bug.cgi?id=88219 Emil Velikov emil.l.veli...@gmail.com changed: What|Removed |Added Status|NEW |RESOLVED Resolution|--- |FIXED --- Comment #3 from Emil Velikov emil.l.veli...@gmail.com --- (In reply to Jonathan Gray from comment #2) I've attached a patch that links glsl_test against the pthreads library which should fix this. This is the same change that was done for glsl_compiler back in 0d6f573f6e6785babe1e274697fdd315db95fb98. Nice one Jonathan. Added r-b, bugzilla and cc mesa-stable tags, and pushed to master. Thanks Emil -- You are receiving this mail because: You are the assignee for the bug. ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [PATCH] i965/emit: Do the sampler index adjustment directly in header.0.3
Prior to this commit, the adjust_sampler_state_pointer function took an
extra register that it could use as scratch space. The usual candidate was
the destination of the sampler instruction. However, if that register ever
aliased anything important such as the sampler index, this would scratch
all over important data. Fortunately, the calculation is such that we can
just do it in place and we don't need the scratch space at all.
Cc: Chris Forbes chr...@ijw.co.nz
---
src/mesa/drivers/dri/i965/brw_eu.h | 3 +--
src/mesa/drivers/dri/i965/brw_eu_emit.c | 5 ++---
src/mesa/drivers/dri/i965/brw_fs_generator.cpp | 2 +-
src/mesa/drivers/dri/i965/brw_vec4_generator.cpp | 2 +-
4 files changed, 5 insertions(+), 7 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_eu.h
b/src/mesa/drivers/dri/i965/brw_eu.h
index 22d5a0a..a94ea42 100644
--- a/src/mesa/drivers/dri/i965/brw_eu.h
+++ b/src/mesa/drivers/dri/i965/brw_eu.h
@@ -283,8 +283,7 @@ void brw_SAMPLE(struct brw_compile *p,
void brw_adjust_sampler_state_pointer(struct brw_compile *p,
struct brw_reg header,
- struct brw_reg sampler_index,
- struct brw_reg scratch);
+ struct brw_reg sampler_index);
void gen4_math(struct brw_compile *p,
struct brw_reg dest,
diff --git a/src/mesa/drivers/dri/i965/brw_eu_emit.c
b/src/mesa/drivers/dri/i965/brw_eu_emit.c
index c26bed2..39b2022 100644
--- a/src/mesa/drivers/dri/i965/brw_eu_emit.c
+++ b/src/mesa/drivers/dri/i965/brw_eu_emit.c
@@ -2383,8 +2383,7 @@ void brw_SAMPLE(struct brw_compile *p,
*/
void brw_adjust_sampler_state_pointer(struct brw_compile *p,
struct brw_reg header,
- struct brw_reg sampler_index,
- struct brw_reg scratch)
+ struct brw_reg sampler_index)
{
/* The Sampler Index field can only store values between 0 and 15.
* However, we can add an offset to the Sampler State Pointer
@@ -2414,7 +2413,7 @@ void brw_adjust_sampler_state_pointer(struct brw_compile
*p,
return;
}
- struct brw_reg temp = vec1(retype(scratch, BRW_REGISTER_TYPE_UD));
+ struct brw_reg temp = get_element_ud(header, 3);
brw_AND(p, temp, get_element_ud(sampler_index, 0), brw_imm_ud(0x0f0));
brw_SHL(p, temp, temp, brw_imm_ud(4));
diff --git a/src/mesa/drivers/dri/i965/brw_fs_generator.cpp
b/src/mesa/drivers/dri/i965/brw_fs_generator.cpp
index d473739..4474902 100644
--- a/src/mesa/drivers/dri/i965/brw_fs_generator.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs_generator.cpp
@@ -697,7 +697,7 @@ fs_generator::generate_tex(fs_inst *inst, struct brw_reg
dst, struct brw_reg src
brw_imm_ud(inst-offset));
}
- brw_adjust_sampler_state_pointer(p, header_reg, sampler_index, dst);
+ brw_adjust_sampler_state_pointer(p, header_reg, sampler_index);
brw_pop_insn_state(p);
}
}
diff --git a/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp
b/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp
index fd37a05..cb9ad6f 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp
@@ -354,7 +354,7 @@ vec4_generator::generate_tex(vec4_instruction *inst,
if (dw2)
brw_MOV(p, get_element_ud(header, 2), brw_imm_ud(dw2));
- brw_adjust_sampler_state_pointer(p, header, sampler_index, dst);
+ brw_adjust_sampler_state_pointer(p, header, sampler_index);
brw_pop_insn_state(p);
}
}
--
2.2.1
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [PATCH] egl/dri2: implement platform_null.
Hi Emil
On Thu, Jan 22, 2015 at 1:36 PM, Emil Velikov emil.l.veli...@gmail.com wrote:
Hi Haixia Shi,
On 22/01/15 17:35, Haixia Shi wrote:
Try the render node first and use it if available. Otherwise fall back to
normal nodes.
What is the use-case for such a platform - I assume it's worth
mentioning in the commit message ?
No other platform picks the device at random as seen below. Why did you
choose such an approach ? It seems like one can easily shoot themselves
by using it.
CC Stephane. The goal here is just to pick the first available node
for off-screen rendering only.
...
diff --git a/src/egl/drivers/dri2/platform_null.c
b/src/egl/drivers/dri2/platform_null.c
new file mode 100644
index 000..4f0b18f
--- /dev/null
+++ b/src/egl/drivers/dri2/platform_null.c
...
+static const char* node_path_fmt_card = /dev/dri/card%d;
You can reuse the DRM_DIR_NAME + DRM_DEV_NAME macros (from xf86drm.h)
for this.
+static const char* node_path_fmt_render = /dev/dri/renderD%d;
There is no macro for the renderD%d, although you can still use
DRM_DIR_NAME for the path.
Will update this part shortly.
+
+EGLBoolean
+dri2_initialize_null(_EGLDriver *drv, _EGLDisplay *disp)
+{
+ struct dri2_egl_display *dri2_dpy;
+ const char* err;
+ int i, render_node;
+ int driver_loaded = 0;
+
+ loader_set_logger(_eglLog);
+
+ dri2_dpy = calloc(1, sizeof *dri2_dpy);
+ if (!dri2_dpy)
+ return _eglError(EGL_BAD_ALLOC, eglInitialize);
+
+ disp-DriverData = (void *) dri2_dpy;
+
+ for (render_node = 1; render_node = 0; --render_node) {
+ const char* node_path_fmt =
+render_node ? node_path_fmt_render : node_path_fmt_card;
+ const int base = render_node ? 128 : 0;
+ for (i = 0; i 16; ++i) {
What was the reason behind choosing 16 here ?
It's an arbitrary number. How about choosing 64 here as it is the
limit chosen by drm_stub.c: drm_minor_get_id()?
+ char *card_path;
+ if (asprintf(card_path, node_path_fmt, base + i) 0)
+continue;
+
+ dri2_dpy-fd = open(card_path, O_RDWR);
If you open a normal node (card%d) I believe that you'll need an
authenticate hook in dri2_egl_display_vtbl. Does things work without it
on your system/platform ?
You're correct; normal node would require the legacy auth hook, and it
would only work without auth if the process is run as root, which is
why we're trying render nodes first.
Cheers
Emil
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [PATCH] nir: Make vec-to-movs handle src/dest aliasing.
It now emits vector MOVs instead of a series of individual MOVs, which
should be useful to any vector backends. This pushes the problem of
src/dest aliasing of channels on a scalar chip to the backend, but if
there are any vector operations in your shader then you needed to be
handling this already.
Fixes fs-swap-problem with my scalarizing patches.
---
src/glsl/nir/nir_lower_vec_to_movs.c | 74 +++-
1 file changed, 64 insertions(+), 10 deletions(-)
diff --git a/src/glsl/nir/nir_lower_vec_to_movs.c
b/src/glsl/nir/nir_lower_vec_to_movs.c
index 022889e..489901e 100644
--- a/src/glsl/nir/nir_lower_vec_to_movs.c
+++ b/src/glsl/nir/nir_lower_vec_to_movs.c
@@ -33,6 +33,49 @@
*/
static bool
+src_matches_dest_reg(nir_dest *dest, nir_src *src)
+{
+ if (dest-is_ssa || src-is_ssa)
+ return false;
+
+ return (dest-reg.reg == src-reg.reg
+ dest-reg.base_offset == src-reg.base_offset
+ !dest-reg.indirect
+ !src-reg.indirect);
+}
+
+static unsigned
+insert_movs(nir_alu_instr *vec, unsigned start_channel,
+unsigned start_src_idx, void *mem_ctx)
+{
+ unsigned src_idx = start_src_idx;
+ assert(src_idx nir_op_infos[vec-op].num_inputs);
+
+ nir_alu_instr *mov = nir_alu_instr_create(mem_ctx, nir_op_imov);
+ nir_alu_src_copy(mov-src[0], vec-src[src_idx], mem_ctx);
+ nir_alu_dest_copy(mov-dest, vec-dest, mem_ctx);
+
+ mov-dest.write_mask = (1u start_channel);
+ mov-src[0].swizzle[start_channel] = vec-src[src_idx].swizzle[0];
+ src_idx++;
+
+ for (unsigned i = start_channel + 1; i 4; i++) {
+ if (!(vec-dest.write_mask (1 i)))
+ continue;
+
+ if (nir_srcs_equal(vec-src[src_idx].src, vec-src[start_src_idx].src)) {
+ mov-dest.write_mask |= (1 i);
+ mov-src[0].swizzle[i] = vec-src[src_idx].swizzle[0];
+ }
+ src_idx++;
+ }
+
+ nir_instr_insert_before(vec-instr, mov-instr);
+
+ return mov-dest.write_mask;
+}
+
+static bool
lower_vec_to_movs_block(nir_block *block, void *mem_ctx)
{
nir_foreach_instr_safe(block, instr) {
@@ -50,22 +93,33 @@ lower_vec_to_movs_block(nir_block *block, void *mem_ctx)
continue; /* The loop */
}
+ /* Since we insert multiple MOVs, we have to be non-SSA. */
+ assert(!vec-dest.dest.is_ssa);
+
+ unsigned finished_write_mask = 0;
+
+ /* First, emit a MOV for all the src channels that are in the
+ * destination reg, in case other values we're populating in the dest
+ * might overwrite them.
+ */
for (unsigned i = 0, src_idx = 0; i 4; i++) {
if (!(vec-dest.write_mask (1 i)))
continue;
- assert(src_idx nir_op_infos[vec-op].num_inputs);
-
- nir_alu_instr *mov = nir_alu_instr_create(mem_ctx, nir_op_imov);
- nir_alu_src_copy(mov-src[0], vec-src[src_idx], mem_ctx);
-
- /* We only care about the one swizzle */
- mov-src[0].swizzle[i] = vec-src[src_idx].swizzle[0];
+ if (src_matches_dest_reg(vec-dest.dest, vec-src[src_idx].src)) {
+finished_write_mask |= insert_movs(vec, i, src_idx, mem_ctx);
+break;
+ }
+ src_idx++;
+ }
- nir_alu_dest_copy(mov-dest, vec-dest, mem_ctx);
- mov-dest.write_mask = (1u i);
+ /* Now, emit MOVs for all the other src channels. */
+ for (unsigned i = 0, src_idx = 0; i 4; i++) {
+ if (!(vec-dest.write_mask (1 i)))
+continue;
- nir_instr_insert_before(vec-instr, mov-instr);
+ if (!(finished_write_mask (1 i)))
+finished_write_mask |= insert_movs(vec, i, src_idx, mem_ctx);
src_idx++;
}
--
2.1.3
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [PATCH] i965/emit: Do the sampler index adjustment directly in header.0.3
Jason,
This can't work. We care about the existing value in header.3 (it's a
pointer to the base of the sampler state table) -- you can't just
clobber it.
- Chris
On Fri, Jan 23, 2015 at 10:50 AM, Jason Ekstrand ja...@jlekstrand.net wrote:
Prior to this commit, the adjust_sampler_state_pointer function took an
extra register that it could use as scratch space. The usual candidate was
the destination of the sampler instruction. However, if that register ever
aliased anything important such as the sampler index, this would scratch
all over important data. Fortunately, the calculation is such that we can
just do it in place and we don't need the scratch space at all.
Cc: Chris Forbes chr...@ijw.co.nz
---
src/mesa/drivers/dri/i965/brw_eu.h | 3 +--
src/mesa/drivers/dri/i965/brw_eu_emit.c | 5 ++---
src/mesa/drivers/dri/i965/brw_fs_generator.cpp | 2 +-
src/mesa/drivers/dri/i965/brw_vec4_generator.cpp | 2 +-
4 files changed, 5 insertions(+), 7 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_eu.h
b/src/mesa/drivers/dri/i965/brw_eu.h
index 22d5a0a..a94ea42 100644
--- a/src/mesa/drivers/dri/i965/brw_eu.h
+++ b/src/mesa/drivers/dri/i965/brw_eu.h
@@ -283,8 +283,7 @@ void brw_SAMPLE(struct brw_compile *p,
void brw_adjust_sampler_state_pointer(struct brw_compile *p,
struct brw_reg header,
- struct brw_reg sampler_index,
- struct brw_reg scratch);
+ struct brw_reg sampler_index);
void gen4_math(struct brw_compile *p,
struct brw_reg dest,
diff --git a/src/mesa/drivers/dri/i965/brw_eu_emit.c
b/src/mesa/drivers/dri/i965/brw_eu_emit.c
index c26bed2..39b2022 100644
--- a/src/mesa/drivers/dri/i965/brw_eu_emit.c
+++ b/src/mesa/drivers/dri/i965/brw_eu_emit.c
@@ -2383,8 +2383,7 @@ void brw_SAMPLE(struct brw_compile *p,
*/
void brw_adjust_sampler_state_pointer(struct brw_compile *p,
struct brw_reg header,
- struct brw_reg sampler_index,
- struct brw_reg scratch)
+ struct brw_reg sampler_index)
{
/* The Sampler Index field can only store values between 0 and 15.
* However, we can add an offset to the Sampler State Pointer
@@ -2414,7 +2413,7 @@ void brw_adjust_sampler_state_pointer(struct
brw_compile *p,
return;
}
- struct brw_reg temp = vec1(retype(scratch, BRW_REGISTER_TYPE_UD));
+ struct brw_reg temp = get_element_ud(header, 3);
brw_AND(p, temp, get_element_ud(sampler_index, 0), brw_imm_ud(0x0f0));
brw_SHL(p, temp, temp, brw_imm_ud(4));
diff --git a/src/mesa/drivers/dri/i965/brw_fs_generator.cpp
b/src/mesa/drivers/dri/i965/brw_fs_generator.cpp
index d473739..4474902 100644
--- a/src/mesa/drivers/dri/i965/brw_fs_generator.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs_generator.cpp
@@ -697,7 +697,7 @@ fs_generator::generate_tex(fs_inst *inst, struct brw_reg
dst, struct brw_reg src
brw_imm_ud(inst-offset));
}
- brw_adjust_sampler_state_pointer(p, header_reg, sampler_index, dst);
+ brw_adjust_sampler_state_pointer(p, header_reg, sampler_index);
brw_pop_insn_state(p);
}
}
diff --git a/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp
b/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp
index fd37a05..cb9ad6f 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp
@@ -354,7 +354,7 @@ vec4_generator::generate_tex(vec4_instruction *inst,
if (dw2)
brw_MOV(p, get_element_ud(header, 2), brw_imm_ud(dw2));
- brw_adjust_sampler_state_pointer(p, header, sampler_index, dst);
+ brw_adjust_sampler_state_pointer(p, header, sampler_index);
brw_pop_insn_state(p);
}
}
--
2.2.1
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [PATCH] scons: Add X11 include path if X11 is available.
On 19/01/15 20:54, Vinson Lee wrote: Mac OS X XQuartz places X11 headers at /opt/X11/include. This patch fixes this Mac OS X SCons build error. Compiling src/gallium/state_trackers/glx/xlib/glx_api.c ... In file included from src/gallium/state_trackers/glx/xlib/glx_api.c:34: include/GL/glx.h:30:10: fatal error: 'X11/Xlib.h' file not found ^ Signed-off-by: Vinson Lee v...@freedesktop.org Reviewed-by: Emil Velikov emil.l.veli...@gmail.com ... and pushed to master. Thanks ! Emil ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [PATCH v3 08/10] i965/pixel_read: Use meta_pbo_GetTexSubImage for PBO ReadPixels
Jason Ekstrand ja...@jlekstrand.net writes:
diff --git a/src/mesa/drivers/dri/i965/intel_pixel_read.c
b/src/mesa/drivers/dri/i965/intel_pixel_read.c
index 688a919..a64a5f4 100644
--- a/src/mesa/drivers/dri/i965/intel_pixel_read.c
+++ b/src/mesa/drivers/dri/i965/intel_pixel_read.c
@@ -172,15 +58,11 @@ intelReadPixels(struct gl_context * ctx,
DBG(%s\n, __FUNCTION__);
- if (_mesa_is_bufferobj(pack-BufferObj)) {
- /* Using PBOs, so try the BLT based path. */
- if (do_blit_readpixels(ctx, x, y, width, height, format, type, pack,
- pixels)) {
- return;
- }
-
+ if (_mesa_meta_pbo_GetTexSubImage(ctx, 2, NULL, x, y, 0, width, height, 1,
+ format, type, pixels, pack))
+ return;
+ else
perf_debug(%s: fallback to CPU mapping in PBO case\n, __FUNCTION__);
- }
I think this perf message will now be hit whenever a PBO isn't used. It
probably needs to be something like ‘else if (_mesa_is_bufferobj)…’
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [PATCH v3 00/10] i965: Use the render pipeline for PBO uploads and
This series looks really good to me. I can confirm it gives a 241% transfer rate increase in that little pboUnpack test on BayTrail. Assuming the minor comments I made are fixed and the v2 patch for the pthread_once thingy is used then the series is: Reviewed-by: Neil Roberts n...@linux.intel.com Regards, - Neil Jason Ekstrand ja...@jlekstrand.net writes: This series adds support for doing texture up/downloads using the render pipeline instead of the blitter. There are a number of good reasons for doing so. 1) The blitter is commonly thought to be slower than the render pipeline in terms of its access to memory. 2) The blitter is on a different ringbuffer so using it incurs incurs a ring-switching penalty. 3) The blitter is incapable of doing format conversion while we get it almost for free with the render pipeline. This last point is probably the most important one. In some micro-benchmarks I did, the render pipeline is somewhere between 5 and 40x as fast as the CPU for doing format conversion operations. It's even faster than CPU-tiling memcpy path when the texture is reasonably large (1024 square is big enough) and already in a PBO. Since the meta paths are strictly better than the blitter paths, the old blitter paths are removed. As a side-effect of these patches, the meta PBO path is tried before the tiled_memcpy path when the source is already a PBO. Previously, we weren't doing this and anything that hit the tiled_memcpy path on an in-use texture would cause a pipeline stall. Jason Ekstrand (10): mesa/dd: Add a function for creating a texture from a buffer object i965/mipmap_tree: Add a depth parameter to create_for_bo i965: Apply the miptree offset to surface state for renderbuffers i965: Implement SetTextureStorageForBufferObject formats: Use a hash table for _mesa_format_from_array_format meta: Add a BlitFramebuffers-based implementation of TexSubImage meta: Add an implementation of GetTexSubImage for PBOs i965/pixel_read: Use meta_pbo_GetTexSubImage for PBO ReadPixels i965/tex_image: Use meta for instead of the blitter PBO TexImage and GetTexImage i965/tex_subimage: use meta instead of the blitter for PBO TexSubImage src/mesa/Makefile.sources | 1 + src/mesa/drivers/common/meta.h| 17 ++ src/mesa/drivers/common/meta_tex_subimage.c | 355 ++ src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 3 +- src/mesa/drivers/dri/i965/gen6_surface_state.c| 3 +- src/mesa/drivers/dri/i965/gen7_wm_surface_state.c | 3 +- src/mesa/drivers/dri/i965/gen8_surface_state.c| 3 +- src/mesa/drivers/dri/i965/intel_fbo.c | 1 + src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 9 +- src/mesa/drivers/dri/i965/intel_mipmap_tree.h | 1 + src/mesa/drivers/dri/i965/intel_pixel_draw.c | 2 +- src/mesa/drivers/dri/i965/intel_pixel_read.c | 130 +--- src/mesa/drivers/dri/i965/intel_tex.c | 57 src/mesa/drivers/dri/i965/intel_tex_image.c | 205 ++--- src/mesa/drivers/dri/i965/intel_tex_subimage.c| 115 +-- src/mesa/main/dd.h| 15 + src/mesa/main/formats.c | 67 +++- 17 files changed, 561 insertions(+), 426 deletions(-) create mode 100644 src/mesa/drivers/common/meta_tex_subimage.c -- 2.2.0 ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [PATCH 06/10] nir: Add a bunch of algebraic optimizations on logic/bit operations.
On Jan 22, 2015 3:41 AM, Kenneth Graunke kenn...@whitecape.org wrote:
Matt and I noticed a bunch of val - ior a a operations in a shader,
so we decided to add an algebraic optimization for that. While there,
I decided to add a bunch more of them.
total NIR instructions in shared programs: 2023511 - 2020814 (-0.13%)
NIR instructions in affected programs: 149634 - 146937 (-1.80%)
helped:1032
i965 already cleans these up, so the final results aren't impressive:
total i965 instructions in shared programs: 6035392 - 6035397 (0.00%)
i965 instructions in affected programs: 764 - 769 (0.65%)
HURT: 3
However, improving the result of the NIR compile is worth doing.
Signed-off-by: Kenneth Graunke kenn...@whitecape.org
---
src/glsl/nir/nir_opt_algebraic.py | 16
1 file changed, 16 insertions(+)
diff --git a/src/glsl/nir/nir_opt_algebraic.py
b/src/glsl/nir/nir_opt_algebraic.py
index 169bb41..cf16b19 100644
--- a/src/glsl/nir/nir_opt_algebraic.py
+++ b/src/glsl/nir/nir_opt_algebraic.py
@@ -68,6 +68,22 @@ optimizations = [
(('fadd', ('fmul', a, b), c), ('ffma', a, b, c)),
(('fge', ('fneg', ('fabs', a)), 0.0), ('feq', a, 0.0)),
(('fmin', ('fmax', a, 1.0), 0.0), ('fsat', a)),
+ # Logical and bit operations
+ (('fand', a, a), a),
This isn't correct. The fand operation will normalize to 0.0/1.0.
+ (('fand', a, 0.0), 0.0),
This is ok
+ (('iand', a, a), a),
+ (('iand', a, 0), 0),
+ (('for', a, a), a),
+ (('for', a, 0.0), a),
Can't do these two either
+ (('ior', a, a), a),
+ (('ior', a, 0), a),
+ (('fxor', a, a), 0.0),
This one should be ok
With the junk optimizations removed,
Reviewed-by: Jason Ekstrand jason.ekstr...@intel.com
+ (('ixor', a, a), 0),
+ (('inot', ('inot', a)), a),
+ # DeMorgan's Laws
+ (('iand', ('inot', a), ('inot', b)), ('inot', ('ior', a, b))),
+ (('ior', ('inot', a), ('inot', b)), ('inot', ('iand', a, b))),
+
# This one may not be exact
(('feq', ('fadd', a, b), 0.0), ('feq', a, ('fneg', b))),
]
--
2.2.2
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/mesa-dev
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [PATCH 10/10] nir: Add algebraic optimizations for division and reciprocal.
On Jan 22, 2015 3:41 AM, Kenneth Graunke kenn...@whitecape.org wrote:
These also exist in opt_algebraic.cpp.
total NIR instructions in shared programs: 2011430 - 2011211 (-0.01%)
NIR instructions in affected programs: 42221 - 42002 (-0.52%)
helped:198
total i965 instructions in shared programs: 6020554 - 6020118 (-0.01%)
i965 instructions in affected programs: 84497 - 84061 (-0.52%)
helped: 394
HURT: 1 (by 1 instruction)
It's encouraging that the percentages are the same.
Signed-off-by: Kenneth Graunke kenn...@whitecape.org
---
src/glsl/nir/nir_opt_algebraic.py | 5 +
1 file changed, 5 insertions(+)
diff --git a/src/glsl/nir/nir_opt_algebraic.py
b/src/glsl/nir/nir_opt_algebraic.py
index a5b5715..a1ed503 100644
--- a/src/glsl/nir/nir_opt_algebraic.py
+++ b/src/glsl/nir/nir_opt_algebraic.py
@@ -109,6 +109,11 @@ optimizations = [
(('fpow', a, 1.0), a),
(('fpow', a, 2.0), ('fmul', a, a)),
(('fpow', 2.0, a), ('fexp2', a)),
+ # Division and reciprocal
+ (('fdiv', 1.0, a), ('frcp', a)),
+ (('frcp', ('frcp', a)), a),
+ (('frcp', ('fsqrt', a)), ('frsq', a)),
+ (('frcp', ('frsq', a)), ('fsqrt', a)),
# This one may not be exact
(('feq', ('fadd', a, b), 0.0), ('feq', a, ('fneg', b))),
--
2.2.2
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/mesa-dev
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [PATCH v3 08/10] i965/pixel_read: Use meta_pbo_GetTexSubImage for PBO ReadPixels
Jason Ekstrand ja...@jlekstrand.net writes: Since the meta path can do strictly more than the blitter path, we just remove the blitter path entirely. --- src/mesa/drivers/dri/i965/intel_pixel_read.c | 130 ++- 1 file changed, 6 insertions(+), 124 deletions(-) diff --git a/src/mesa/drivers/dri/i965/intel_pixel_read.c b/src/mesa/drivers/dri/i965/intel_pixel_read.c index 688a919..a64a5f4 100644 --- a/src/mesa/drivers/dri/i965/intel_pixel_read.c +++ b/src/mesa/drivers/dri/i965/intel_pixel_read.c @@ -1,8 +1,7 @@ /** * * Copyright 2003 VMware, Inc. - * All Rights Reserved. - * + * All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the * Software), to deal in the Software without restriction, including This hunk looks a bit odd, is that a typo? ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [PATCH v3 09/10] i965/tex_image: Use meta for instead of the blitter PBO TexImage and GetTexImage
Jason Ekstrand ja...@jlekstrand.net writes: - } + if (_mesa_meta_pbo_GetTexSubImage(ctx, 3, texImage, 0, 0, 0, + texImage-Width, texImage-Height, + texImage-Depth, format, type, + pixels, ctx-Pack)) + return; + else + perf_debug(%s: fallback to CPU mapping in PBO case\n, __FUNCTION__); I think this perf_debug message should be guarded with if (_mesa_is_bufferobj) too. ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [PATCH] nir: Add nir_lower_alu_scalar.
This is the equivalent of brw_fs_channel_expressions.cpp, which I wanted
for vc4.
v2: Use the nir_src_for_ssa() helper, and another instance of
nir_alu_src_copy().
v3: Drop the non-SSA support. All intended callers will have SSA-only ALU
ops.
v4: Use insert_before, drop stale bcsel/fcsel comment, drop now-unused
unsupported() function, drop lower_context struct.
---
This can also be found on my nir-scalarize-2 branch.
src/glsl/Makefile.sources | 1 +
src/glsl/nir/nir.h | 1 +
src/glsl/nir/nir_lower_alu_scalar.c | 182
3 files changed, 184 insertions(+)
create mode 100644 src/glsl/nir/nir_lower_alu_scalar.c
diff --git a/src/glsl/Makefile.sources b/src/glsl/Makefile.sources
index 6237627..9cd1a6a 100644
--- a/src/glsl/Makefile.sources
+++ b/src/glsl/Makefile.sources
@@ -24,6 +24,7 @@ NIR_FILES = \
$(GLSL_SRCDIR)/nir/nir_intrinsics.c \
$(GLSL_SRCDIR)/nir/nir_intrinsics.h \
$(GLSL_SRCDIR)/nir/nir_live_variables.c \
+ $(GLSL_SRCDIR)/nir/nir_lower_alu_scalar.c \
$(GLSL_SRCDIR)/nir/nir_lower_atomics.c \
$(GLSL_SRCDIR)/nir/nir_lower_global_vars_to_local.c \
$(GLSL_SRCDIR)/nir/nir_lower_locals_to_regs.c \
diff --git a/src/glsl/nir/nir.h b/src/glsl/nir/nir.h
index 0dbe000..aa0927a 100644
--- a/src/glsl/nir/nir.h
+++ b/src/glsl/nir/nir.h
@@ -1520,6 +1520,7 @@ void nir_lower_vars_to_ssa(nir_shader *shader);
void nir_remove_dead_variables(nir_shader *shader);
void nir_lower_vec_to_movs(nir_shader *shader);
+void nir_lower_ops_scalar(nir_shader *shader);
void nir_lower_samplers(nir_shader *shader,
struct gl_shader_program *shader_program,
diff --git a/src/glsl/nir/nir_lower_alu_scalar.c
b/src/glsl/nir/nir_lower_alu_scalar.c
new file mode 100644
index 000..64552be
--- /dev/null
+++ b/src/glsl/nir/nir_lower_alu_scalar.c
@@ -0,0 +1,182 @@
+/*
+ * Copyright © 2014-2015 Broadcom
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the Software),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED AS IS, WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+ * IN THE SOFTWARE.
+ */
+
+#include nir.h
+
+/** @file nir_lower_alu_scalar.c
+ *
+ * Replaces nir_alu_instr operations with more than one channel used in the
+ * arguments with individual per-channel operations.
+ */
+
+static void
+nir_alu_ssa_dest_init(nir_alu_instr *instr, unsigned num_components)
+{
+ nir_ssa_dest_init(instr-instr, instr-dest.dest, num_components, NULL);
+ instr-dest.write_mask = (1 num_components) - 1;
+}
+
+static void
+lower_reduction(nir_alu_instr *instr, nir_op chan_op, nir_op merge_op,
+void *mem_ctx)
+{
+ unsigned num_components = nir_op_infos[instr-op].input_sizes[0];
+
+ nir_ssa_def *last = NULL;
+ for (unsigned i = 0; i num_components; i++) {
+ nir_alu_instr *chan = nir_alu_instr_create(mem_ctx, chan_op);
+ nir_alu_ssa_dest_init(chan, 1);
+ nir_alu_src_copy(chan-src[0], instr-src[0], mem_ctx);
+ chan-src[0].swizzle[0] = chan-src[0].swizzle[i];
+ if (nir_op_infos[chan_op].num_inputs 1) {
+ assert(nir_op_infos[chan_op].num_inputs == 2);
+ nir_alu_src_copy(chan-src[1], instr-src[1], mem_ctx);
+ chan-src[1].swizzle[0] = chan-src[1].swizzle[i];
+ }
+
+ nir_instr_insert_before(instr-instr, chan-instr);
+
+ if (i == 0) {
+ last = chan-dest.dest.ssa;
+ } else {
+ nir_alu_instr *merge = nir_alu_instr_create(mem_ctx, merge_op);
+ nir_alu_ssa_dest_init(merge, 1);
+ merge-dest.write_mask = 1;
+ merge-src[0].src = nir_src_for_ssa(last);
+ merge-src[1].src = nir_src_for_ssa(chan-dest.dest.ssa);
+ nir_instr_insert_before(instr-instr, merge-instr);
+ last = merge-dest.dest.ssa;
+ }
+ }
+
+ assert(instr-dest.write_mask == 1);
+ nir_ssa_def_rewrite_uses(instr-dest.dest.ssa, nir_src_for_ssa(last),
+mem_ctx);
+ nir_instr_remove(instr-instr);
+}
+
+static void
Re: [Mesa-dev] [PATCH] egl/dri2: implement platform_null.
Hi Emil,
On Thu, Jan 22, 2015 at 4:38 PM, Emil Velikov emil.l.veli...@gmail.com wrote:
On 22/01/15 22:23, Haixia Shi wrote:
Hi Emil
On Thu, Jan 22, 2015 at 1:36 PM, Emil Velikov emil.l.veli...@gmail.com
wrote:
Hi Haixia Shi,
On 22/01/15 17:35, Haixia Shi wrote:
Try the render node first and use it if available. Otherwise fall back to
normal nodes.
What is the use-case for such a platform - I assume it's worth
mentioning in the commit message ?
No other platform picks the device at random as seen below. Why did you
choose such an approach ? It seems like one can easily shoot themselves
by using it.
CC Stephane. The goal here is just to pick the first available node
for off-screen rendering only.
Hmm I'm guessing that using the drm/gbm platform is out of the question
? Iirc there has been a bit of love on the gbm topic, and afaiu this
solution is to be used with minigbm ?
Yes this solutions is to be used with minigbm.
What I'm thinking here is:
If you're testing a device with provides two or more nodes (be that the
classic card or the render ones), one cannot guarantee that the kernel
module for hw#1 will be loaded first. Thus even if one presumes that
they are working on (testing) hw#1 that may or may not be the case.
Not 100% sure on the module order part, so I could be wrong.
I don't have a good answer for that... any suggestion on how best to
pick the right one?
...
diff --git a/src/egl/drivers/dri2/platform_null.c
b/src/egl/drivers/dri2/platform_null.c
new file mode 100644
index 000..4f0b18f
--- /dev/null
+++ b/src/egl/drivers/dri2/platform_null.c
...
+static const char* node_path_fmt_card = /dev/dri/card%d;
You can reuse the DRM_DIR_NAME + DRM_DEV_NAME macros (from xf86drm.h)
for this.
+static const char* node_path_fmt_render = /dev/dri/renderD%d;
There is no macro for the renderD%d, although you can still use
DRM_DIR_NAME for the path.
Will update this part shortly.
I would personally wait for more feedback, rather than going through xx
revisions. But that's just me being lazy :P
+
+EGLBoolean
+dri2_initialize_null(_EGLDriver *drv, _EGLDisplay *disp)
+{
+ struct dri2_egl_display *dri2_dpy;
+ const char* err;
+ int i, render_node;
+ int driver_loaded = 0;
+
+ loader_set_logger(_eglLog);
+
+ dri2_dpy = calloc(1, sizeof *dri2_dpy);
+ if (!dri2_dpy)
+ return _eglError(EGL_BAD_ALLOC, eglInitialize);
+
+ disp-DriverData = (void *) dri2_dpy;
+
+ for (render_node = 1; render_node = 0; --render_node) {
+ const char* node_path_fmt =
+render_node ? node_path_fmt_render : node_path_fmt_card;
+ const int base = render_node ? 128 : 0;
+ for (i = 0; i 16; ++i) {
What was the reason behind choosing 16 here ?
It's an arbitrary number.
My bad it's DRM_MAX_MINOR, as defined in xf86drm.h. Please use the
symbolic name.
How about choosing 64 here as it is the
limit chosen by drm_stub.c: drm_minor_get_id()?
We nuked the file with kernel 3.17 :P
+ char *card_path;
+ if (asprintf(card_path, node_path_fmt, base + i) 0)
+continue;
+
+ dri2_dpy-fd = open(card_path, O_RDWR);
If you open a normal node (card%d) I believe that you'll need an
authenticate hook in dri2_egl_display_vtbl. Does things work without it
on your system/platform ?
You're correct; normal node would require the legacy auth hook, and it
would only work without auth if the process is run as root, which is
why we're trying render nodes first.
So you're saying that people without render nodes should run egl(mesa)
as root ? That does not sound like a wise suggestion imho.
Basically what I'm trying to say is - if you have a fall-back to normal
nodes, some form of auth ought to be in place.
I see your point. Would it be cleaner if we simply require render node
to be present? The normal node (card%d) and the auth hook is more
trouble than its worth.
Not an expert on the topic
-Emil
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [PATCH v1] Remove UINT_AS_FLT, INT_AS_FLT, FLOAT_AS_FLT macros.No functional changes, only bug fixed.
-Original Message-
From: Neil Roberts [mailto:n...@linux.intel.com]
Sent: Thursday, January 22, 2015 3:32 PM
To: Predut, Marius; mesa-dev@lists.freedesktop.org
Cc: mesa-sta...@lists.freedesktop.org
Subject: Re: [Mesa-dev] [PATCH v1] Remove UINT_AS_FLT, INT_AS_FLT,
FLOAT_AS_FLT macros.No functional changes, only bug fixed.
Hi,
The COPY_CLEAN_4V_TYPE_AS_FLOAT still doesn't look right because as the last
step it calls COPY_SZ_4V which will copy its float arguments using floating-
point registers. It seems the piglit test case is still failing and if I step
through with GDB I can see that it is hitting this code and using the
floating-point registers to do the copy. Are you compiling your Mesa with -O3?
It would be worth initially trying to replicate the test failure and then
verifying that the patch fixes at least the piglit test before posting it.
I agree that this function should be changed to take pointers to
gl_constant_values instead of GLfloats as suggested by Ian in his review for
the previous version.
Regards,
- Neil
Indeed, seems the problem is partially fixed. With O3 flag fail.
marius.pre...@intel.com writes:
From: Marius Predut marius.pre...@intel.com
On 32-bit, for floating point operations is used x86 FPU registers
instead SSE, reason for when reinterprets an integer as a float
result is unexpected (modify floats when they are written to memory).
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=82668
Signed-off-by: Marius Predut marius.pre...@intel.com
---
src/mesa/main/context.c |3 ++-
src/mesa/main/macros.h| 32
src/mesa/vbo/vbo_attrib_tmp.h | 20
src/mesa/vbo/vbo_exec.h |3 ++-
src/mesa/vbo/vbo_exec_api.c | 25 -
src/mesa/vbo/vbo_exec_eval.c | 22 +-
src/mesa/vbo/vbo_save_api.c | 10 +-
7 files changed, 70 insertions(+), 45 deletions(-)
diff --git a/src/mesa/main/context.c b/src/mesa/main/context.c index
400c158..11ab8a9 100644
--- a/src/mesa/main/context.c
+++ b/src/mesa/main/context.c
@@ -134,6 +134,7 @@
#include math/m_matrix.h
#include main/dispatch.h /* for _gloffset_COUNT */ #include
uniforms.h
+#include macros.h
#ifdef USE_SPARC_ASM
#include sparc/sparc.h
@@ -656,7 +657,7 @@ _mesa_init_constants(struct gl_constants *consts, gl_api
api)
consts-MaxSamples = 0;
/* GLSL default if NativeIntegers == FALSE */
- consts-UniformBooleanTrue = FLT_AS_UINT(1.0f);
+ consts-UniformBooleanTrue = FLOAT_AS_UNION(1.0f).u;
/* GL_ARB_sync */
consts-MaxServerWaitTimeout = 0x1fff7fffULL; diff --git
a/src/mesa/main/macros.h b/src/mesa/main/macros.h index
cd5f2d6..12c9997 100644
--- a/src/mesa/main/macros.h
+++ b/src/mesa/main/macros.h
@@ -32,6 +32,7 @@
#define MACROS_H
#include imports.h
+#include program/prog_parameter.h
/**
@@ -170,27 +171,26 @@ extern GLfloat _mesa_ubyte_to_float_color_tab[256];
ub = ((GLubyte) F_TO_I((f) * 255.0F)) #endif
-static inline GLfloat INT_AS_FLT(GLint i)
+static union gl_constant_value UINT_AS_UNION(GLuint u)
{
- fi_type tmp;
- tmp.i = i;
- return tmp.f;
+ union gl_constant_value tmp;
+ tmp.u = u;
+ return tmp;
}
-static inline GLfloat UINT_AS_FLT(GLuint u)
+static inline union gl_constant_value INT_AS_UNION(GLint i)
{
- fi_type tmp;
- tmp.u = u;
- return tmp.f;
+ union gl_constant_value tmp;
+ tmp.i = i;
+ return tmp;
}
-static inline unsigned FLT_AS_UINT(float f)
+static inline union gl_constant_value FLOAT_AS_UNION(GLfloat f)
{
- fi_type tmp;
+ union gl_constant_value tmp;
tmp.f = f;
- return tmp.u;
+ return tmp;
}
-
/**
* Convert a floating point value to an unsigned fixed point value.
*
@@ -628,12 +628,12 @@ COPY_CLEAN_4V_TYPE_AS_FLOAT(GLfloat dst[4], int sz,
const GLfloat src[4],
ASSIGN_4V(dst, 0, 0, 0, 1);
break;
case GL_INT:
- ASSIGN_4V(dst, INT_AS_FLT(0), INT_AS_FLT(0),
- INT_AS_FLT(0), INT_AS_FLT(1));
+ ASSIGN_4V(dst, INT_AS_UNION(0).f, INT_AS_UNION(0).f,
+INT_AS_UNION(0).f, INT_AS_UNION(1).f);
break;
case GL_UNSIGNED_INT:
- ASSIGN_4V(dst, UINT_AS_FLT(0), UINT_AS_FLT(0),
- UINT_AS_FLT(0), UINT_AS_FLT(1));
+ ASSIGN_4V(dst, UINT_AS_UNION(0).f, UINT_AS_UNION(0).f,
+UINT_AS_UNION(0).f, UINT_AS_UNION(1).f);
break;
default:
ASSIGN_4V(dst, 0.0f, 0.0f, 0.0f, 1.0f); /* silence warnings */
diff --git a/src/mesa/vbo/vbo_attrib_tmp.h
b/src/mesa/vbo/vbo_attrib_tmp.h index ec66934..17a0a10 100644
--- a/src/mesa/vbo/vbo_attrib_tmp.h
+++ b/src/mesa/vbo/vbo_attrib_tmp.h
@@ -28,6 +28,18 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
#include
Re: [Mesa-dev] [PATCH v1] Remove UINT_AS_FLT, INT_AS_FLT, FLOAT_AS_FLT macros.No functional changes, only bug fixed.
-Original Message- From: Kenneth Graunke [mailto:kenn...@whitecape.org] Sent: Thursday, January 22, 2015 8:02 AM To: mesa-dev@lists.freedesktop.org Cc: Predut, Marius; mesa-sta...@lists.freedesktop.org Subject: Re: [Mesa-dev] [PATCH v1] Remove UINT_AS_FLT, INT_AS_FLT, FLOAT_AS_FLT macros.No functional changes, only bug fixed. On Thursday, January 22, 2015 12:12:18 AM marius.pre...@intel.com wrote: From: Marius Predut marius.pre...@intel.com On 32-bit, for floating point operations is used x86 FPU registers instead SSE, reason for when reinterprets an integer as a float result is unexpected (modify floats when they are written to memory). Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=82668 Signed-off-by: Marius Predut marius.pre...@intel.com --- src/mesa/main/context.c |3 ++- src/mesa/main/macros.h| 32 src/mesa/vbo/vbo_attrib_tmp.h | 20 src/mesa/vbo/vbo_exec.h |3 ++- src/mesa/vbo/vbo_exec_api.c | 25 - src/mesa/vbo/vbo_exec_eval.c | 22 +- src/mesa/vbo/vbo_save_api.c | 10 +- 7 files changed, 70 insertions(+), 45 deletions(-) Your commit title says No functional changes, only bug fixed. This is contradictory - a bug fix is a change in behavior, or a functional change. No functional changes is a phrase used for patches which alter whitespace, comments, change style, or move code around while not actually changing the result of the code. Removing the macros is also not really the point of the patch - it's fixing an x86 FPU bug. I would make the commit title something to that effect. Sure, can you do that. thanks ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [PATCH] egl: Soften several HAVE_DRM_PLATFORM to HAVE_LIBDRM
Emil Velikov, le Thu 22 Jan 2015 16:52:06 +, a écrit : On 14/01/15 19:36, Axel Davy wrote: To fix build when libdrm is not found, commit a594cec7e3ef275c386054127a357110a19dd823 did put several parts of egl code under #ifdef HAVE_DRM_PLATFORM. HAVE_DRM_PLATFORM means the egl drm platform is being built. What should have been used instead is HAVE_LIBDRM. Ah, possibly, indeed. Samuel, Maarten What's your take on the topic ? It seems to make sense indeed. Samuel ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [mesa-dev][PATCH] Remove UINT_AS_FLT, INT_AS_FLT, FLOAT_AS_FLT macros.No functional changes, only bug fixed.
-Original Message-
From: Ian Romanick [mailto:i...@freedesktop.org]
Sent: Wednesday, January 21, 2015 5:22 AM
To: Predut, Marius; mesa-dev@lists.freedesktop.org
Cc: mesa-sta...@lists.freedesktop.org
Subject: Re: [Mesa-dev] [mesa-dev][PATCH] Remove UINT_AS_FLT, INT_AS_FLT,
FLOAT_AS_FLT macros.No functional changes, only bug fixed.
On 01/20/2015 07:30 AM, marius.pre...@intel.com wrote:
From: Marius Predut marius.pre...@intel.com
On 32-bit, for floating point operations is used x86 FPU registers
instead SSE, reason for when reinterprets an integer as a float
result is unexpected (modify floats when they are written to memory).
This fixes https://bugs.freedesktop.org/show_bug.cgi?id=82668
Reviewed-by: Roberts, Neil Sneil.s.robe...@intel.com
This should be formatted as:
Reviewed-by: Neil Roberts neil.s.robe...@intel.com
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=82668
---
src/mesa/main/context.c |2 +-
src/mesa/main/macros.h| 29 ++-
src/mesa/vbo/vbo_attrib_tmp.h | 43 +-
---
src/mesa/vbo/vbo_exec.h |3 ++-
src/mesa/vbo/vbo_exec_api.c | 25
src/mesa/vbo/vbo_exec_eval.c | 22 -
src/mesa/vbo/vbo_save_api.c | 10 +-
7 files changed, 78 insertions(+), 56 deletions(-)
diff --git a/src/mesa/main/context.c b/src/mesa/main/context.c index
400c158..3007491 100644
--- a/src/mesa/main/context.c
+++ b/src/mesa/main/context.c
@@ -656,7 +656,7 @@ _mesa_init_constants(struct gl_constants *consts, gl_api
api)
consts-MaxSamples = 0;
/* GLSL default if NativeIntegers == FALSE */
- consts-UniformBooleanTrue = FLT_AS_UINT(1.0f);
+ consts-UniformBooleanTrue = 1;
As Jason mentioned, this hunk must be dropped.
Jason comments:
Here can be use 0x3f80 (the binary representation of 1.0f) Or, could leave
a macro.
Agree. Fixed with the next patch.
/* GL_ARB_sync */
consts-MaxServerWaitTimeout = 0x1fff7fffULL; diff --git
a/src/mesa/main/macros.h b/src/mesa/main/macros.h index
cd5f2d6..4d245e1 100644
--- a/src/mesa/main/macros.h
+++ b/src/mesa/main/macros.h
@@ -170,27 +170,6 @@ extern GLfloat _mesa_ubyte_to_float_color_tab[256];
ub = ((GLubyte) F_TO_I((f) * 255.0F)) #endif
-static inline GLfloat INT_AS_FLT(GLint i) -{
- fi_type tmp;
- tmp.i = i;
- return tmp.f;
-}
-
-static inline GLfloat UINT_AS_FLT(GLuint u) -{
- fi_type tmp;
- tmp.u = u;
- return tmp.f;
-}
-
-static inline unsigned FLT_AS_UINT(float f) -{
- fi_type tmp;
- tmp.f = f;
- return tmp.u;
-}
-
/**
* Convert a floating point value to an unsigned fixed point value.
*
@@ -625,15 +604,11 @@ COPY_CLEAN_4V_TYPE_AS_FLOAT(GLfloat dst[4], int
sz, const GLfloat src[4], {
switch (type) {
case GL_FLOAT:
- ASSIGN_4V(dst, 0, 0, 0, 1);
+ ASSIGN_4V(dst, 0.0f, 0.0f, 0.0f, 1.0f);
break;
case GL_INT:
- ASSIGN_4V(dst, INT_AS_FLT(0), INT_AS_FLT(0),
- INT_AS_FLT(0), INT_AS_FLT(1));
- break;
case GL_UNSIGNED_INT:
- ASSIGN_4V(dst, UINT_AS_FLT(0), UINT_AS_FLT(0),
- UINT_AS_FLT(0), UINT_AS_FLT(1));
+ ASSIGN_4V(dst, 0, 0, 0, 1);
break;
I'm having trouble understanding how this is correct. This makes all three
cases the same. They all assign float values {0, 0, 0, 1} to dst.
Code later in the function (not shown in the patch) then copies possibly
integer or unsigned values into some of the components. You then end up with
a mix of integer values and floating point values.
It seems like this function should take two gl_constant_value as parameters
instead of GLfloat[4].
Seems here is a similar trouble like before.(
Marek comments on this : Integer one is equal to floating-point zero.
Floating-point one is equal to 0x3f80
I back to macros see last patch sent(v1).)
default:
ASSIGN_4V(dst, 0.0f, 0.0f, 0.0f, 1.0f); /* silence warnings */
diff --git a/src/mesa/vbo/vbo_attrib_tmp.h
b/src/mesa/vbo/vbo_attrib_tmp.h index ec66934..a853cb1 100644
--- a/src/mesa/vbo/vbo_attrib_tmp.h
+++ b/src/mesa/vbo/vbo_attrib_tmp.h
@@ -28,6 +28,41 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
#include util/u_format_r11g11b10f.h
#include main/varray.h
+#include program/prog_parameter.h
+
+
+static union gl_constant_value UINT_AS_UNION(GLuint u) {
+ union gl_constant_value tmp;
+ tmp.u = u;
+ return tmp;
+}
+
+static inline union gl_constant_value INT_AS_UNION(GLint i) {
+ union gl_constant_value tmp;
+ tmp.i = i;
+ return tmp;
+}
+
+static inline union gl_constant_value FLOAT_AS_UNION(GLfloat f) {
+ union gl_constant_value tmp;
+ tmp.f = f;
+ return tmp;
+}
+
+/* ATTR */
+#define ATTR( A, N, T, V0, V1, V2, V3 )
Re: [Mesa-dev] [PATCH 3/5] nir: Fix setup of constant bool initializers.
On Wed, Jan 21, 2015 at 11:03 PM, Jason Ekstrand ja...@jlekstrand.net wrote: Connor wrote *exactly* the same patch: http://lists.freedesktop.org/archives/mesa-dev/2015-January/074522.html This version can have my R-B too. And, fwiw, I like your commit message better. Indeed... let's push this version, since as you mentioned it has the better commit message. On Wed, Jan 21, 2015 at 5:25 PM, Eric Anholt e...@anholt.net wrote: brw_fs_nir has only seen scalar bools so far, thanks to vector splitting, and the ralloc of in glsl_to_nir.cpp will *usually* get you a 0-filled chunk of memory, so reading too large of a value will usually get you the right bool value. But once we start doing vector bools in a few commits, we end up getting bad values. --- src/glsl/nir/nir_lower_vars_to_ssa.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/glsl/nir/nir_lower_vars_to_ssa.c b/src/glsl/nir/nir_lower_vars_to_ssa.c index 089f0d5..03967e3 100644 --- a/src/glsl/nir/nir_lower_vars_to_ssa.c +++ b/src/glsl/nir/nir_lower_vars_to_ssa.c @@ -600,7 +600,7 @@ get_const_initializer_load(const nir_deref_var *deref, load-value.u[i] = constant-value.u[matrix_offset + i]; break; case GLSL_TYPE_BOOL: - load-value.u[i] = constant-value.u[matrix_offset + i] ? + load-value.u[i] = constant-value.b[matrix_offset + i] ? NIR_TRUE : NIR_FALSE; break; default: -- 2.1.3 ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [PATCH 2/3] mesa: Add initializer macros to fix missing initializer warnings
On Wed, 2015-01-21 at 15:55 -0800, Matt Turner wrote: On Wed, Jan 21, 2015 at 3:49 PM, Jan Vesely jan.ves...@rutgers.edu wrote: On Wed, 2015-01-21 at 12:34 -0800, Ian Romanick wrote: On 01/21/2015 10:33 AM, Jan Vesely wrote: NFC. NFC? I'm assuming this doesn't mean Near Field Communications or no 'fine' clue. No functional change. seen that in other commits somwhere, thoght it was universal NFC literally doesn't ever appear in the Mesa git log. I don't think saying no functional change is necessary for warning fixes. I should have mentioned that somewhere is llvm. Is the rest of the series OK? should I just repost without that commit message? thanks, jan -- Jan Vesely jan.ves...@rutgers.edu signature.asc Description: This is a digitally signed message part ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [PATCH v2 5/5] nir/opt_algebraic: be more careful about constant types
We can do this now that we have opcode info available in Python.
Signed-off-by: Connor Abbott cwabbo...@gmail.com
---
src/glsl/nir/nir_algebraic.py | 38 ++
src/glsl/nir/nir_opt_algebraic.py | 6 ++
2 files changed, 32 insertions(+), 12 deletions(-)
diff --git a/src/glsl/nir/nir_algebraic.py b/src/glsl/nir/nir_algebraic.py
index f9b246d..7f7edaf 100644
--- a/src/glsl/nir/nir_algebraic.py
+++ b/src/glsl/nir/nir_algebraic.py
@@ -28,6 +28,7 @@ import itertools
import struct
import sys
import mako.template
+from nir_opcodes import opcodes
# Represents a set of variables, each with a unique id
class VarSet(object):
@@ -43,7 +44,7 @@ class VarSet(object):
class Value(object):
@staticmethod
- def create(val, name_base, varset):
+ def create(val, name_base, type_, varset):
if isinstance(val, tuple):
return Expression(val, name_base, varset)
elif isinstance(val, Expression):
@@ -51,7 +52,7 @@ class Value(object):
elif isinstance(val, (str, unicode)):
return Variable(val, name_base, varset)
elif isinstance(val, (bool, int, long, float)):
- return Constant(val, name_base)
+ return Constant(val, name_base, type_)
__template = mako.template.Template(
static const ${val.c_type} ${val.name} = {
@@ -89,19 +90,35 @@ static const ${val.c_type} ${val.name} = {
Expression=Expression)
class Constant(Value):
- def __init__(self, val, name):
+ def __init__(self, val, name, type_):
Value.__init__(self, name, constant)
self.value = val
+ if type_ == unknown:
+ if isinstance(self.value, (bool)):
+self.type_ = bool
+ if isinstance(self.value, (int, long)):
+self.type_ = int
+ elif isinstance(self.value, float):
+self.type_ = float
+ else:
+ if self.type_ == bool:
+assert isinstance(self.value, (bool))
+ elif self.type_ == int or self.type_ == unsigned:
+assert isinstance(self.value, (int, long)
+ elif self.type_ == float:
+assert isinstance(self.value, (float))
+ else:
+assert False
def __hex__(self):
# Even if it's an integer, we still need to unpack as an unsigned
# int. This is because, without C99, we can only assign to the first
# element of a union in an initializer.
- if isinstance(self.value, (bool)):
+ if self.type_ == bool:
return 'NIR_TRUE' if self.value else 'NIR_FALSE'
- if isinstance(self.value, (int, long)):
+ if self.type_ == int or type == unsigned:
return hex(struct.unpack('I', struct.pack('i', self.value))[0])
- elif isinstance(self.value, float):
+ elif self.type_ == float:
return hex(struct.unpack('I', struct.pack('f', self.value))[0])
else:
assert False
@@ -119,7 +136,11 @@ class Expression(Value):
assert isinstance(expr, tuple)
self.opcode = expr[0]
- self.sources = [ Value.create(src, {0}_{1}.format(name_base, i),
varset)
+ assert self.opcode in opcodes
+
+ opcode_info = opcodes[self.opcode]
+ self.sources = [ Value.create(src, {0}_{1}.format(name_base, i),
+opcode_info.input_types[i], varset)
for (i, src) in enumerate(expr[1:]) ]
def render(self):
@@ -141,7 +162,8 @@ class SearchAndReplace(object):
if isinstance(replace, Value):
self.replace = replace
else:
- self.replace = Value.create(replace, replace{0}.format(self.id),
varset)
+ self.replace = Value.create(replace, replace{0}.format(self.id),
+ varset, unknown)
_algebraic_pass_template = mako.template.Template(
#include nir.h
diff --git a/src/glsl/nir/nir_opt_algebraic.py
b/src/glsl/nir/nir_opt_algebraic.py
index 169bb41..a03ad01 100644
--- a/src/glsl/nir/nir_opt_algebraic.py
+++ b/src/glsl/nir/nir_opt_algebraic.py
@@ -37,10 +37,8 @@ d = 'd'
# defined as a tuple of the form (op, src0, src1, src2, src3)
# where each source is either an expression or a value. A value can be
# either a numeric constant or a string representing a variable name. For
-# constants, you have to be careful to make sure that it is the right type
-# because python is unaware of the source and destination types of the
-# opcodes.
-
+# constants, you must use the correct type for the opcode or there will be an
+# assertion failure when generating the pass.
optimizations = [
(('fneg', ('fneg', a)), a),
(('ineg', ('ineg', a)), a),
--
2.1.0
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [PATCH v2 4/5] nir/constant_folding: use the new constant folding infrastructure
Signed-off-by: Connor Abbott cwabbo...@gmail.com
---
src/glsl/nir/nir_opt_constant_folding.c | 179
1 file changed, 21 insertions(+), 158 deletions(-)
diff --git a/src/glsl/nir/nir_opt_constant_folding.c
b/src/glsl/nir/nir_opt_constant_folding.c
index 878436b..e8a361f 100644
--- a/src/glsl/nir/nir_opt_constant_folding.c
+++ b/src/glsl/nir/nir_opt_constant_folding.c
@@ -25,7 +25,7 @@
*
*/
-#include nir.h
+#include nir_constant_expressions.h
#include math.h
/*
@@ -38,20 +38,10 @@ struct constant_fold_state {
bool progress;
};
-#define SRC_COMP(T, IDX, CMP) src[IDX]-value.T[instr-src[IDX].swizzle[CMP]]
-#define SRC(T, IDX) SRC_COMP(T, IDX, i)
-#define DEST_COMP(T, CMP) dest-value.T[CMP]
-#define DEST(T) DEST_COMP(T, i)
-
-#define FOLD_PER_COMP(EXPR) \
- for (unsigned i = 0; i instr-dest.dest.ssa.num_components; i++) { \
- EXPR; \
- } \
-
static bool
constant_fold_alu_instr(nir_alu_instr *instr, void *mem_ctx)
{
- nir_load_const_instr *src[4], *dest;
+ nir_const_value src[4];
if (!instr-dest.dest.is_ssa)
return false;
@@ -60,163 +50,36 @@ constant_fold_alu_instr(nir_alu_instr *instr, void
*mem_ctx)
if (!instr-src[i].src.is_ssa)
return false;
- if (instr-src[i].src.ssa-parent_instr-type !=
nir_instr_type_load_const)
+ nir_instr *src_instr = instr-src[i].src.ssa-parent_instr;
+
+ if (src_instr-type != nir_instr_type_load_const)
return false;
+ nir_load_const_instr* load_const = nir_instr_as_load_const(src_instr);
+
+ for (unsigned j = 0; j instr-dest.dest.ssa.num_components; j++) {
+ src[i].u[j] = load_const-value.u[instr-src[i].swizzle[j]];
+ }
/* We shouldn't have any source modifiers in the optimization loop. */
assert(!instr-src[i].abs !instr-src[i].negate);
-
- src[i] = nir_instr_as_load_const(instr-src[i].src.ssa-parent_instr);
}
/* We shouldn't have any saturate modifiers in the optimization loop. */
assert(!instr-dest.saturate);
- dest = nir_load_const_instr_create(mem_ctx,
- instr-dest.dest.ssa.num_components);
-
- switch (instr-op) {
- case nir_op_ineg:
- FOLD_PER_COMP(DEST(i) = -SRC(i, 0));
- break;
- case nir_op_fneg:
- FOLD_PER_COMP(DEST(f) = -SRC(f, 0));
- break;
- case nir_op_inot:
- FOLD_PER_COMP(DEST(i) = ~SRC(i, 0));
- break;
- case nir_op_fnot:
- FOLD_PER_COMP(DEST(f) = (SRC(f, 0) == 0.0f) ? 1.0f : 0.0f);
- break;
- case nir_op_frcp:
- FOLD_PER_COMP(DEST(f) = 1.0f / SRC(f, 0));
- break;
- case nir_op_frsq:
- FOLD_PER_COMP(DEST(f) = 1.0f / sqrt(SRC(f, 0)));
- break;
- case nir_op_fsqrt:
- FOLD_PER_COMP(DEST(f) = sqrtf(SRC(f, 0)));
- break;
- case nir_op_fexp:
- FOLD_PER_COMP(DEST(f) = expf(SRC(f, 0)));
- break;
- case nir_op_flog:
- FOLD_PER_COMP(DEST(f) = logf(SRC(f, 0)));
- break;
- case nir_op_fexp2:
- FOLD_PER_COMP(DEST(f) = exp2f(SRC(f, 0)));
- break;
- case nir_op_flog2:
- FOLD_PER_COMP(DEST(f) = log2f(SRC(f, 0)));
- break;
- case nir_op_f2i:
- FOLD_PER_COMP(DEST(i) = SRC(f, 0));
- break;
- case nir_op_f2u:
- FOLD_PER_COMP(DEST(u) = SRC(f, 0));
- break;
- case nir_op_i2f:
- FOLD_PER_COMP(DEST(f) = SRC(i, 0));
- break;
- case nir_op_f2b:
- FOLD_PER_COMP(DEST(u) = (SRC(i, 0) == 0.0f) ? NIR_FALSE : NIR_TRUE);
- break;
- case nir_op_b2f:
- FOLD_PER_COMP(DEST(f) = SRC(u, 0) ? 1.0f : 0.0f);
- break;
- case nir_op_i2b:
- FOLD_PER_COMP(DEST(u) = SRC(i, 0) ? NIR_TRUE : NIR_FALSE);
- break;
- case nir_op_u2f:
- FOLD_PER_COMP(DEST(f) = SRC(u, 0));
- break;
- case nir_op_bany2:
- DEST_COMP(u, 0) = (SRC_COMP(u, 0, 0) || SRC_COMP(u, 0, 1)) ?
-NIR_TRUE : NIR_FALSE;
- break;
- case nir_op_fadd:
- FOLD_PER_COMP(DEST(f) = SRC(f, 0) + SRC(f, 1));
- break;
- case nir_op_iadd:
- FOLD_PER_COMP(DEST(i) = SRC(i, 0) + SRC(i, 1));
- break;
- case nir_op_fsub:
- FOLD_PER_COMP(DEST(f) = SRC(f, 0) - SRC(f, 1));
- break;
- case nir_op_isub:
- FOLD_PER_COMP(DEST(i) = SRC(i, 0) - SRC(i, 1));
- break;
- case nir_op_fmul:
- FOLD_PER_COMP(DEST(f) = SRC(f, 0) * SRC(f, 1));
- break;
- case nir_op_imul:
- FOLD_PER_COMP(DEST(i) = SRC(i, 0) * SRC(i, 1));
- break;
- case nir_op_fdiv:
- FOLD_PER_COMP(DEST(f) = SRC(f, 0) / SRC(f, 1));
- break;
- case nir_op_idiv:
- FOLD_PER_COMP(DEST(i) = SRC(i, 0) / SRC(i, 1));
- break;
- case nir_op_udiv:
- FOLD_PER_COMP(DEST(u) = SRC(u, 0) / SRC(u, 1));
- break;
- case nir_op_flt:
- FOLD_PER_COMP(DEST(u) = (SRC(f, 0) SRC(f, 1)) ? NIR_TRUE : NIR_FALSE);
- break;
- case nir_op_fge:
- FOLD_PER_COMP(DEST(u) = (SRC(f, 0) = SRC(f, 1)) ? NIR_TRUE : NIR_FALSE);
- break;
- case nir_op_feq:
-
[Mesa-dev] [PATCH v2 1/5] nir: add generated file to .gitignore
Signed-off-by: Connor Abbott cwabbo...@gmail.com --- src/glsl/nir/.gitignore | 1 + 1 file changed, 1 insertion(+) create mode 100644 src/glsl/nir/.gitignore diff --git a/src/glsl/nir/.gitignore b/src/glsl/nir/.gitignore new file mode 100644 index 000..6d954fe --- /dev/null +++ b/src/glsl/nir/.gitignore @@ -0,0 +1 @@ +nir_opt_algebraic.c -- 2.1.0 ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [PATCH v2 3/5] nir: add new constant folding infrastructure
Add a required field to the Opcode class, const_expr, that contains an expression or statement that computes the result of the opcode given known constant inputs. Then take those const_expr's and expand them into a function that takes an opcode and an array of constant inputs and spits out the constant result. This means that when adding opcodes, there's one less place to update, and almost all the opcodes are self-documenting since the information on how to compute the result is right next to the definition. The helper functions in nir_constant_expressions.c were taken from ir_constant_expressions.cpp. v2: use Python formatting and get rid of regex's v2.5: - fixup Makefile changes - remove unused global wr(), rename wr() to wrap() (Jason) - remove optional arguments in wr() and a few functions in unop_reduce() and binop_reduce() that were unnecessary Signed-off-by: Connor Abbott cwabbo...@gmail.com --- src/glsl/Makefile.am | 8 +- src/glsl/Makefile.sources| 3 +- src/glsl/nir/.gitignore | 1 + src/glsl/nir/nir_constant_expressions.h | 32 ++ src/glsl/nir/nir_constant_expressions.py | 324 ++ src/glsl/nir/nir_opcodes.py | 562 +-- 6 files changed, 743 insertions(+), 187 deletions(-) create mode 100644 src/glsl/nir/nir_constant_expressions.h create mode 100644 src/glsl/nir/nir_constant_expressions.py diff --git a/src/glsl/Makefile.am b/src/glsl/Makefile.am index 8474b70..408db6e 100644 --- a/src/glsl/Makefile.am +++ b/src/glsl/Makefile.am @@ -219,7 +219,8 @@ BUILT_SOURCES = \ glcpp/glcpp-lex.c \ nir/nir_opt_algebraic.c \ nir/nir_opcodes.h \ - nir/nir_opcodes.c + nir/nir_opcodes.c \ + nir/nir_constant_expressions.c CLEANFILES = \ glcpp/glcpp-parse.h \ glsl_parser.h \ @@ -245,3 +246,8 @@ nir/nir_opcodes.c: nir/nir_opcodes.py nir/nir_opcodes_c.py $(PYTHON2) $(PYTHON_FLAGS) $(srcdir)/nir/nir_opcodes_c.py $@ nir/nir.h: nir/nir_opcodes.h + +nir/nir_constant_expressions.c: nir/nir_opcodes.py nir/nir_constant_expressions.py nir/nir_constant_expressions.h + $(MKDIR_P) nir; \ + $(PYTHON2) $(PYTHON_FLAGS) $(srcdir)/nir/nir_constant_expressions.py $@ + diff --git a/src/glsl/Makefile.sources b/src/glsl/Makefile.sources index 56299eb..e803882 100644 --- a/src/glsl/Makefile.sources +++ b/src/glsl/Makefile.sources @@ -16,7 +16,8 @@ LIBGLCPP_GENERATED_FILES = \ NIR_GENERATED_FILES = \ $(GLSL_BUILDDIR)/nir/nir_opt_algebraic.c \ $(GLSL_BUILDDIR)/nir/nir_opcodes.h \ - $(GLSL_BUILDDIR)/nir/nir_opcodes.c + $(GLSL_BUILDDIR)/nir/nir_opcodes.c \ + $(GLSL_BUILDDIR)/nir/nir_constant_expressions.c NIR_FILES = \ $(GLSL_SRCDIR)/nir/nir.c \ diff --git a/src/glsl/nir/.gitignore b/src/glsl/nir/.gitignore index 4c28193..261f64f 100644 --- a/src/glsl/nir/.gitignore +++ b/src/glsl/nir/.gitignore @@ -1,3 +1,4 @@ nir_opt_algebraic.c nir_opcodes.c nir_opcodes.h +nir_constant_expressions.c diff --git a/src/glsl/nir/nir_constant_expressions.h b/src/glsl/nir/nir_constant_expressions.h new file mode 100644 index 000..4ca09be --- /dev/null +++ b/src/glsl/nir/nir_constant_expressions.h @@ -0,0 +1,32 @@ +/* + * Copyright © 2014 Connor Abbott + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the Software), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED AS IS, WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + * + * Authors: + *Connor Abbott (cwabbo...@gmail.com) + * + */ + +#include nir.h + +nir_const_value nir_eval_const_opcode(nir_op op, unsigned num_components, + nir_const_value *src); + diff --git
[Mesa-dev] [PATCH v2 2/5] nir: use Python to autogenerate opcode information
Before, we used a system where a file, nir_opcodes.h, defined some macros that were included to generate the enum values and the nir_op_infos structure. This worked pretty well, but for development the error messages were never very useful, Python tools couldn't understand the opcode list, and it was difficult to use nir_opcodes.h to do other things like autogenerate a builder API. Now, we store opcode information in nir_opcodes.py, and we have nir_opcodes_c.py to generate the old nir_opcodes.c and nir_opcodes_h.py to generate nir_opcodes.h, which contains all the enum names and gets included into nir.h like before. In addition to solving the above problems, using Python and Mako to generate everything means that it's much easier to add keep information centralized as we add new things like constant propagation that require per-opcode information. v2: - make Opcode derive from object (Dylan) - don't use assert like it's a function (Dylan) - style fixes for fnoise, use xrange (Dylan) - use iterkeys() in nir_opcodes_h.py (Dylan) - use pydoc-style comments (Jason) - don't make fmin/fmax commutative and associative yet (Jason) Signed-off-by: Connor Abbott cwabbo...@gmail.com --- src/glsl/Makefile.am | 15 +- src/glsl/Makefile.sources | 6 +- src/glsl/nir/.gitignore | 2 + src/glsl/nir/nir.h| 9 - src/glsl/nir/nir_opcodes.c| 46 - src/glsl/nir/nir_opcodes.h| 366 src/glsl/nir/nir_opcodes.py | 383 ++ src/glsl/nir/nir_opcodes_c.py | 56 ++ src/glsl/nir/nir_opcodes_h.py | 39 + 9 files changed, 497 insertions(+), 425 deletions(-) delete mode 100644 src/glsl/nir/nir_opcodes.c delete mode 100644 src/glsl/nir/nir_opcodes.h create mode 100644 src/glsl/nir/nir_opcodes.py create mode 100644 src/glsl/nir/nir_opcodes_c.py create mode 100644 src/glsl/nir/nir_opcodes_h.py diff --git a/src/glsl/Makefile.am b/src/glsl/Makefile.am index 9d9f99a..8474b70 100644 --- a/src/glsl/Makefile.am +++ b/src/glsl/Makefile.am @@ -27,6 +27,7 @@ AM_CPPFLAGS = \ -I$(top_srcdir)/src/glsl/glcpp \ -I$(top_srcdir)/src/glsl/nir \ -I$(top_srcdir)/src/gtest/include \ + -I$(top_builddir)/src/glsl/nir \ $(DEFINES) AM_CFLAGS = $(VISIBILITY_CFLAGS) AM_CXXFLAGS = $(VISIBILITY_CXXFLAGS) @@ -216,7 +217,9 @@ BUILT_SOURCES = \ glsl_lexer.cpp \ glcpp/glcpp-parse.c \ glcpp/glcpp-lex.c \ - nir/nir_opt_algebraic.c + nir/nir_opt_algebraic.c \ + nir/nir_opcodes.h \ + nir/nir_opcodes.c CLEANFILES = \ glcpp/glcpp-parse.h \ glsl_parser.h \ @@ -232,3 +235,13 @@ dist-hook: nir/nir_opt_algebraic.c: nir/nir_opt_algebraic.py nir/nir_algebraic.py $(MKDIR_P) nir; \ $(PYTHON2) $(PYTHON_FLAGS) $(srcdir)/nir/nir_opt_algebraic.py $@ + +nir/nir_opcodes.h: nir/nir_opcodes.py nir/nir_opcodes_h.py + $(MKDIR_P) nir; \ + $(PYTHON2) $(PYTHON_FLAGS) $(srcdir)/nir/nir_opcodes_h.py $@ + +nir/nir_opcodes.c: nir/nir_opcodes.py nir/nir_opcodes_c.py + $(MKDIR_P) nir; \ + $(PYTHON2) $(PYTHON_FLAGS) $(srcdir)/nir/nir_opcodes_c.py $@ + +nir/nir.h: nir/nir_opcodes.h diff --git a/src/glsl/Makefile.sources b/src/glsl/Makefile.sources index 6237627..56299eb 100644 --- a/src/glsl/Makefile.sources +++ b/src/glsl/Makefile.sources @@ -14,7 +14,9 @@ LIBGLCPP_GENERATED_FILES = \ $(GLSL_BUILDDIR)/glcpp/glcpp-parse.c NIR_GENERATED_FILES = \ - $(GLSL_BUILDDIR)/nir/nir_opt_algebraic.c + $(GLSL_BUILDDIR)/nir/nir_opt_algebraic.c \ + $(GLSL_BUILDDIR)/nir/nir_opcodes.h \ + $(GLSL_BUILDDIR)/nir/nir_opcodes.c NIR_FILES = \ $(GLSL_SRCDIR)/nir/nir.c \ @@ -35,8 +37,6 @@ NIR_FILES = \ $(GLSL_SRCDIR)/nir/nir_lower_var_copies.c \ $(GLSL_SRCDIR)/nir/nir_lower_vec_to_movs.c \ $(GLSL_SRCDIR)/nir/nir_metadata.c \ - $(GLSL_SRCDIR)/nir/nir_opcodes.c \ - $(GLSL_SRCDIR)/nir/nir_opcodes.h \ $(GLSL_SRCDIR)/nir/nir_opt_constant_folding.c \ $(GLSL_SRCDIR)/nir/nir_opt_copy_propagate.c \ $(GLSL_SRCDIR)/nir/nir_opt_cse.c \ diff --git a/src/glsl/nir/.gitignore b/src/glsl/nir/.gitignore index 6d954fe..4c28193 100644 --- a/src/glsl/nir/.gitignore +++ b/src/glsl/nir/.gitignore @@ -1 +1,3 @@ nir_opt_algebraic.c +nir_opcodes.c +nir_opcodes.h diff --git a/src/glsl/nir/nir.h b/src/glsl/nir/nir.h index 15f8f46..b3940bc 100644 --- a/src/glsl/nir/nir.h +++ b/src/glsl/nir/nir.h @@ -569,20 +569,11 @@ typedef
[Mesa-dev] [PATCH v2 0/5] NIR opcodes and constant folding
Hi,
This is a series I had floating around a while. The idea is to have all the
opcode stuff, including constant folding, derived from a single Python file.
I've cleaned it up a little by using {}-style Python formatting instead of the
pile of text-replacement and regular expressions we had before for getting the
constant expressions to a state where they could be compiled as C code.
v2:
In addition to a bunch of cleanups, I've deleted patch 5 in favor of Eric's
patch and replaced it with a patch that makes opt_algebraic take advantage of
the opcode information. I think we should hold off on pushing this one, though,
since Jason is modifying the same code and all it does is improve safety in
some cases. Nevertheless, I've left it in as an example of how we can use
nir_opcodes.py.
This series is also available at:
git://people.freedesktop.org/~cwabbott0/mesa nir-opcodes-cleanup-v2
Connor Abbott (5):
nir: add generated file to .gitignore
nir: use Python to autogenerate opcode information
nir: add new constant folding infrastructure
nir/constant_folding: use the new constant folding infrastructure
nir/opt_algebraic: be more careful about constant types
src/glsl/Makefile.am | 21 +-
src/glsl/Makefile.sources| 7 +-
src/glsl/nir/.gitignore | 4 +
src/glsl/nir/nir.h | 9 -
src/glsl/nir/nir_algebraic.py| 38 +-
src/glsl/nir/nir_constant_expressions.h | 32 ++
src/glsl/nir/nir_constant_expressions.py | 324 +
src/glsl/nir/nir_opcodes.c | 46 ---
src/glsl/nir/nir_opcodes.h | 366
src/glsl/nir/nir_opcodes.py | 575 +++
src/glsl/nir/nir_opcodes_c.py| 56 +++
src/glsl/nir/nir_opcodes_h.py| 39 +++
src/glsl/nir/nir_opt_algebraic.py| 6 +-
src/glsl/nir/nir_opt_constant_folding.c | 179 ++
14 files changed, 1107 insertions(+), 595 deletions(-)
create mode 100644 src/glsl/nir/.gitignore
create mode 100644 src/glsl/nir/nir_constant_expressions.h
create mode 100644 src/glsl/nir/nir_constant_expressions.py
delete mode 100644 src/glsl/nir/nir_opcodes.c
delete mode 100644 src/glsl/nir/nir_opcodes.h
create mode 100644 src/glsl/nir/nir_opcodes.py
create mode 100644 src/glsl/nir/nir_opcodes_c.py
create mode 100644 src/glsl/nir/nir_opcodes_h.py
--
2.1.0
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [PATCH] mesa/autoconf: attempt to use gnu99 on older gcc compilers
On 22 January 2015 at 11:35, Matt Turner matts...@gmail.com wrote: On Wed, Jan 21, 2015 at 5:28 PM, Dave Airlie airl...@gmail.com wrote: From: Dave Airlie airl...@redhat.com anonymous structs/union don't work with c99 but do work with gnu99 on gcc 4.4. This on top of Jason's designated initialisers changes, make Mesa build on RHEL6 again. Signed-off-by: Dave Airlie airl...@redhat.com --- configure.ac | 12 +++- 1 files changed, 11 insertions(+), 1 deletions(-) diff --git a/configure.ac b/configure.ac index a4c5c74..9420a90 100644 --- a/configure.ac +++ b/configure.ac @@ -145,6 +145,7 @@ AC_MSG_RESULT([$acv_mesa_CLANG]) dnl If we're using GCC, make sure that it is at least version 4.2.0. Older dnl versions are explictly not supported. GEN_ASM_OFFSETS=no +USE_GNU99=no if test x$GCC = xyes -a x$acv_mesa_CLANG = xno; then AC_MSG_CHECKING([whether gcc version is sufficient]) major=0 @@ -163,6 +164,9 @@ if test x$GCC = xyes -a x$acv_mesa_CLANG = xno; then AC_MSG_RESULT([yes])http://tldp.org/LDP/abs/html/special-chars.html fi +if test $GCC_VERSION_MAJOR -lt 4 -o $GCC_VERSION_MAJOR -eq 4 -a $GCC_VERSION_MINOR -lt 6 ; then Can't we just do this test... I like grouping the tests for version stuff in the same place, and also the side effect Ian mentioned with clang that we might not care about. But I'm not really caring much either way. it at least fixes the RHEL6 tinderbox on top of the other changes Jason pushed. Dave. ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [PATCH] i965/emit: Assert that src1 is not an MRF after doing the MRF-GRF conversion
On Thu, Jan 22, 2015 at 3:51 PM, Jason Ekstrand ja...@jlekstrand.net wrote:
When emitting texturing from indirect texture units, we need to be able to
scratch around in the header message. Since we only do this for = HSW,
this is ok since there are no MRFs.
---
src/mesa/drivers/dri/i965/brw_eu_emit.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/mesa/drivers/dri/i965/brw_eu_emit.c
b/src/mesa/drivers/dri/i965/brw_eu_emit.c
index 39b2022..57161e2 100644
--- a/src/mesa/drivers/dri/i965/brw_eu_emit.c
+++ b/src/mesa/drivers/dri/i965/brw_eu_emit.c
@@ -453,12 +453,12 @@ void
brw_set_src1(struct brw_compile *p, brw_inst *inst, struct brw_reg reg)
{
const struct brw_context *brw = p-brw;
- assert(reg.file != BRW_MESSAGE_REGISTER_FILE);
if (reg.file != BRW_ARCHITECTURE_REGISTER_FILE)
assert(reg.nr 128);
gen7_convert_mrf_to_grf(p, reg);
+ assert(reg.file != BRW_MESSAGE_REGISTER_FILE);
validate_reg(brw, inst, reg);
--
2.2.1
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/mesa-dev
Reviewed-by: Anuj phogat anuj.pho...@gmail.com
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [PATCH] i965/emit: Do the sampler index adjustment directly in header.0.3
Ugh, I'd thinko'd this on first reading and assumed that the
adjustment was header.3 += temp -- but it's not; it's header.3 = r0.3
+ temp so this is fine.
Reviewed-by: Chris Forbes chr...@ijw.co.nz
On Fri, Jan 23, 2015 at 10:50 AM, Jason Ekstrand ja...@jlekstrand.net wrote:
Prior to this commit, the adjust_sampler_state_pointer function took an
extra register that it could use as scratch space. The usual candidate was
the destination of the sampler instruction. However, if that register ever
aliased anything important such as the sampler index, this would scratch
all over important data. Fortunately, the calculation is such that we can
just do it in place and we don't need the scratch space at all.
Cc: Chris Forbes chr...@ijw.co.nz
---
src/mesa/drivers/dri/i965/brw_eu.h | 3 +--
src/mesa/drivers/dri/i965/brw_eu_emit.c | 5 ++---
src/mesa/drivers/dri/i965/brw_fs_generator.cpp | 2 +-
src/mesa/drivers/dri/i965/brw_vec4_generator.cpp | 2 +-
4 files changed, 5 insertions(+), 7 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_eu.h
b/src/mesa/drivers/dri/i965/brw_eu.h
index 22d5a0a..a94ea42 100644
--- a/src/mesa/drivers/dri/i965/brw_eu.h
+++ b/src/mesa/drivers/dri/i965/brw_eu.h
@@ -283,8 +283,7 @@ void brw_SAMPLE(struct brw_compile *p,
void brw_adjust_sampler_state_pointer(struct brw_compile *p,
struct brw_reg header,
- struct brw_reg sampler_index,
- struct brw_reg scratch);
+ struct brw_reg sampler_index);
void gen4_math(struct brw_compile *p,
struct brw_reg dest,
diff --git a/src/mesa/drivers/dri/i965/brw_eu_emit.c
b/src/mesa/drivers/dri/i965/brw_eu_emit.c
index c26bed2..39b2022 100644
--- a/src/mesa/drivers/dri/i965/brw_eu_emit.c
+++ b/src/mesa/drivers/dri/i965/brw_eu_emit.c
@@ -2383,8 +2383,7 @@ void brw_SAMPLE(struct brw_compile *p,
*/
void brw_adjust_sampler_state_pointer(struct brw_compile *p,
struct brw_reg header,
- struct brw_reg sampler_index,
- struct brw_reg scratch)
+ struct brw_reg sampler_index)
{
/* The Sampler Index field can only store values between 0 and 15.
* However, we can add an offset to the Sampler State Pointer
@@ -2414,7 +2413,7 @@ void brw_adjust_sampler_state_pointer(struct
brw_compile *p,
return;
}
- struct brw_reg temp = vec1(retype(scratch, BRW_REGISTER_TYPE_UD));
+ struct brw_reg temp = get_element_ud(header, 3);
brw_AND(p, temp, get_element_ud(sampler_index, 0), brw_imm_ud(0x0f0));
brw_SHL(p, temp, temp, brw_imm_ud(4));
diff --git a/src/mesa/drivers/dri/i965/brw_fs_generator.cpp
b/src/mesa/drivers/dri/i965/brw_fs_generator.cpp
index d473739..4474902 100644
--- a/src/mesa/drivers/dri/i965/brw_fs_generator.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs_generator.cpp
@@ -697,7 +697,7 @@ fs_generator::generate_tex(fs_inst *inst, struct brw_reg
dst, struct brw_reg src
brw_imm_ud(inst-offset));
}
- brw_adjust_sampler_state_pointer(p, header_reg, sampler_index, dst);
+ brw_adjust_sampler_state_pointer(p, header_reg, sampler_index);
brw_pop_insn_state(p);
}
}
diff --git a/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp
b/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp
index fd37a05..cb9ad6f 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp
@@ -354,7 +354,7 @@ vec4_generator::generate_tex(vec4_instruction *inst,
if (dw2)
brw_MOV(p, get_element_ud(header, 2), brw_imm_ud(dw2));
- brw_adjust_sampler_state_pointer(p, header, sampler_index, dst);
+ brw_adjust_sampler_state_pointer(p, header, sampler_index);
brw_pop_insn_state(p);
}
}
--
2.2.1
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [PATCH] i965/emit: Assert that src1 is not an MRF after doing the MRF-GRF conversion
When emitting texturing from indirect texture units, we need to be able to
scratch around in the header message. Since we only do this for = HSW,
this is ok since there are no MRFs.
---
src/mesa/drivers/dri/i965/brw_eu_emit.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/mesa/drivers/dri/i965/brw_eu_emit.c
b/src/mesa/drivers/dri/i965/brw_eu_emit.c
index 39b2022..57161e2 100644
--- a/src/mesa/drivers/dri/i965/brw_eu_emit.c
+++ b/src/mesa/drivers/dri/i965/brw_eu_emit.c
@@ -453,12 +453,12 @@ void
brw_set_src1(struct brw_compile *p, brw_inst *inst, struct brw_reg reg)
{
const struct brw_context *brw = p-brw;
- assert(reg.file != BRW_MESSAGE_REGISTER_FILE);
if (reg.file != BRW_ARCHITECTURE_REGISTER_FILE)
assert(reg.nr 128);
gen7_convert_mrf_to_grf(p, reg);
+ assert(reg.file != BRW_MESSAGE_REGISTER_FILE);
validate_reg(brw, inst, reg);
--
2.2.1
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [PATCH] i965/emit: Assert that src1 is not an MRF after doing the MRF-GRF conversion
On Thursday, January 22, 2015 03:51:28 PM Jason Ekstrand wrote:
When emitting texturing from indirect texture units, we need to be able to
scratch around in the header message. Since we only do this for = HSW,
this is ok since there are no MRFs.
---
src/mesa/drivers/dri/i965/brw_eu_emit.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/mesa/drivers/dri/i965/brw_eu_emit.c
b/src/mesa/drivers/dri/i965/brw_eu_emit.c
index 39b2022..57161e2 100644
--- a/src/mesa/drivers/dri/i965/brw_eu_emit.c
+++ b/src/mesa/drivers/dri/i965/brw_eu_emit.c
@@ -453,12 +453,12 @@ void
brw_set_src1(struct brw_compile *p, brw_inst *inst, struct brw_reg reg)
{
const struct brw_context *brw = p-brw;
- assert(reg.file != BRW_MESSAGE_REGISTER_FILE);
if (reg.file != BRW_ARCHITECTURE_REGISTER_FILE)
assert(reg.nr 128);
gen7_convert_mrf_to_grf(p, reg);
+ assert(reg.file != BRW_MESSAGE_REGISTER_FILE);
validate_reg(brw, inst, reg);
Reviewed-by: Kenneth Graunke kenn...@whitecape.org
signature.asc
Description: This is a digitally signed message part.
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [PATCH] egl/dri2: implement platform_null.
The NULL platform is for off-screen rendering only.
Try the render node first and use it if available. Otherwise fall back to
normal nodes.
Signed-off-by: Haixia Shi h...@chromium.org
---
src/egl/drivers/dri2/Makefile.am | 5 +
src/egl/drivers/dri2/egl_dri2.c | 13 ++-
src/egl/drivers/dri2/egl_dri2.h | 3 +
src/egl/drivers/dri2/platform_null.c | 174 +++
4 files changed, 192 insertions(+), 3 deletions(-)
create mode 100644 src/egl/drivers/dri2/platform_null.c
diff --git a/src/egl/drivers/dri2/Makefile.am b/src/egl/drivers/dri2/Makefile.am
index 79a40e8..14b2d60 100644
--- a/src/egl/drivers/dri2/Makefile.am
+++ b/src/egl/drivers/dri2/Makefile.am
@@ -64,3 +64,8 @@ if HAVE_EGL_PLATFORM_DRM
libegl_dri2_la_SOURCES += platform_drm.c
AM_CFLAGS += -DHAVE_DRM_PLATFORM
endif
+
+if HAVE_EGL_PLATFORM_NULL
+libegl_dri2_la_SOURCES += platform_null.c
+AM_CFLAGS += -DHAVE_NULL_PLATFORM
+endif
diff --git a/src/egl/drivers/dri2/egl_dri2.c b/src/egl/drivers/dri2/egl_dri2.c
index 86e5f24..6ed137e 100644
--- a/src/egl/drivers/dri2/egl_dri2.c
+++ b/src/egl/drivers/dri2/egl_dri2.c
@@ -534,7 +534,7 @@ dri2_setup_screen(_EGLDisplay *disp)
disp-Extensions.KHR_gl_texture_2D_image = EGL_TRUE;
disp-Extensions.KHR_gl_texture_cubemap_image = EGL_TRUE;
}
-#ifdef HAVE_DRM_PLATFORM
+#if defined(HAVE_DRM_PLATFORM) || defined(HAVE_NULL_PLATFORM)
if (dri2_dpy-image-base.version = 8
dri2_dpy-image-createImageFromDmaBufs) {
disp-Extensions.EXT_image_dma_buf_import = EGL_TRUE;
@@ -632,6 +632,13 @@ dri2_initialize(_EGLDriver *drv, _EGLDisplay *disp)
return EGL_FALSE;
switch (disp-Platform) {
+#ifdef HAVE_NULL_PLATFORM
+ case _EGL_PLATFORM_NULL:
+ if (disp-Options.TestOnly)
+ return EGL_TRUE;
+ return dri2_initialize_null(drv, disp);
+#endif
+
#ifdef HAVE_X11_PLATFORM
case _EGL_PLATFORM_X11:
if (disp-Options.TestOnly)
@@ -1571,7 +1578,7 @@ dri2_create_wayland_buffer_from_image(_EGLDriver *drv,
_EGLDisplay *dpy,
return dri2_dpy-vtbl-create_wayland_buffer_from_image(drv, dpy, img);
}
-#ifdef HAVE_DRM_PLATFORM
+#if defined(HAVE_DRM_PLATFORM) || defined(HAVE_NULL_PLATFORM)
static EGLBoolean
dri2_check_dma_buf_attribs(const _EGLImageAttribs *attrs)
{
@@ -1829,7 +1836,7 @@ dri2_create_image_khr(_EGLDriver *drv, _EGLDisplay *disp,
case EGL_WAYLAND_BUFFER_WL:
return dri2_create_image_wayland_wl_buffer(disp, ctx, buffer, attr_list);
#endif
-#ifdef HAVE_DRM_PLATFORM
+#if defined(HAVE_DRM_PLATFORM) || defined(HAVE_NULL_PLATFORM)
case EGL_LINUX_DMA_BUF_EXT:
return dri2_create_image_dma_buf(disp, ctx, buffer, attr_list);
#endif
diff --git a/src/egl/drivers/dri2/egl_dri2.h b/src/egl/drivers/dri2/egl_dri2.h
index 9efe1f7..e206424 100644
--- a/src/egl/drivers/dri2/egl_dri2.h
+++ b/src/egl/drivers/dri2/egl_dri2.h
@@ -332,6 +332,9 @@ dri2_initialize_wayland(_EGLDriver *drv, _EGLDisplay *disp);
EGLBoolean
dri2_initialize_android(_EGLDriver *drv, _EGLDisplay *disp);
+EGLBoolean
+dri2_initialize_null(_EGLDriver *drv, _EGLDisplay *disp);
+
void
dri2_flush_drawable_for_swapbuffers(_EGLDisplay *disp, _EGLSurface *draw);
diff --git a/src/egl/drivers/dri2/platform_null.c
b/src/egl/drivers/dri2/platform_null.c
new file mode 100644
index 000..1f77aab
--- /dev/null
+++ b/src/egl/drivers/dri2/platform_null.c
@@ -0,0 +1,174 @@
+/*
+ * Mesa 3-D graphics library
+ *
+ * Copyright (c) 2014 The Chromium OS Authors.
+ * Copyright © 2011 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the Software),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included
+ * in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED AS IS, WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+ */
+
+#include stdlib.h
+#include stdio.h
+#include string.h
+#include xf86drm.h
+#include dlfcn.h
+#include sys/types.h
+#include sys/stat.h
+#include fcntl.h
+#include unistd.h
+
+#include egl_dri2.h
+#include egl_dri2_fallbacks.h
+#include loader.h
+
+static struct dri2_egl_display_vtbl dri2_null_display_vtbl = {
+ .create_pixmap_surface =
Re: [Mesa-dev] [PATCH] nir: Add nir_lower_alu_scalar.
Also, Could we rename this to nir_lower_alu_to_scalar? That's more
descriptive.
--Jason
On Thu, Jan 22, 2015 at 4:27 PM, Jason Ekstrand ja...@jlekstrand.net
wrote:
On Thu, Jan 22, 2015 at 2:52 PM, Eric Anholt e...@anholt.net wrote:
This is the equivalent of brw_fs_channel_expressions.cpp, which I wanted
for vc4.
v2: Use the nir_src_for_ssa() helper, and another instance of
nir_alu_src_copy().
v3: Drop the non-SSA support. All intended callers will have SSA-only ALU
ops.
v4: Use insert_before, drop stale bcsel/fcsel comment, drop now-unused
unsupported() function, drop lower_context struct.
---
This can also be found on my nir-scalarize-2 branch.
src/glsl/Makefile.sources | 1 +
src/glsl/nir/nir.h | 1 +
src/glsl/nir/nir_lower_alu_scalar.c | 182
3 files changed, 184 insertions(+)
create mode 100644 src/glsl/nir/nir_lower_alu_scalar.c
diff --git a/src/glsl/Makefile.sources b/src/glsl/Makefile.sources
index 6237627..9cd1a6a 100644
--- a/src/glsl/Makefile.sources
+++ b/src/glsl/Makefile.sources
@@ -24,6 +24,7 @@ NIR_FILES = \
$(GLSL_SRCDIR)/nir/nir_intrinsics.c \
$(GLSL_SRCDIR)/nir/nir_intrinsics.h \
$(GLSL_SRCDIR)/nir/nir_live_variables.c \
+ $(GLSL_SRCDIR)/nir/nir_lower_alu_scalar.c \
$(GLSL_SRCDIR)/nir/nir_lower_atomics.c \
$(GLSL_SRCDIR)/nir/nir_lower_global_vars_to_local.c \
$(GLSL_SRCDIR)/nir/nir_lower_locals_to_regs.c \
diff --git a/src/glsl/nir/nir.h b/src/glsl/nir/nir.h
index 0dbe000..aa0927a 100644
--- a/src/glsl/nir/nir.h
+++ b/src/glsl/nir/nir.h
@@ -1520,6 +1520,7 @@ void nir_lower_vars_to_ssa(nir_shader *shader);
void nir_remove_dead_variables(nir_shader *shader);
void nir_lower_vec_to_movs(nir_shader *shader);
+void nir_lower_ops_scalar(nir_shader *shader);
void nir_lower_samplers(nir_shader *shader,
struct gl_shader_program *shader_program,
diff --git a/src/glsl/nir/nir_lower_alu_scalar.c
b/src/glsl/nir/nir_lower_alu_scalar.c
new file mode 100644
index 000..64552be
--- /dev/null
+++ b/src/glsl/nir/nir_lower_alu_scalar.c
@@ -0,0 +1,182 @@
+/*
+ * Copyright © 2014-2015 Broadcom
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
a
+ * copy of this software and associated documentation files (the
Software),
+ * to deal in the Software without restriction, including without
limitation
+ * the rights to use, copy, modify, merge, publish, distribute,
sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the
next
+ * paragraph) shall be included in all copies or substantial portions of
the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED AS IS, WITHOUT WARRANTY OF ANY KIND,
EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT
SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
DEALINGS
+ * IN THE SOFTWARE.
+ */
+
+#include nir.h
+
+/** @file nir_lower_alu_scalar.c
+ *
+ * Replaces nir_alu_instr operations with more than one channel used in
the
+ * arguments with individual per-channel operations.
+ */
+
+static void
+nir_alu_ssa_dest_init(nir_alu_instr *instr, unsigned num_components)
+{
+ nir_ssa_dest_init(instr-instr, instr-dest.dest, num_components,
NULL);
+ instr-dest.write_mask = (1 num_components) - 1;
+}
+
+static void
+lower_reduction(nir_alu_instr *instr, nir_op chan_op, nir_op merge_op,
+void *mem_ctx)
+{
+ unsigned num_components = nir_op_infos[instr-op].input_sizes[0];
+
+ nir_ssa_def *last = NULL;
+ for (unsigned i = 0; i num_components; i++) {
+ nir_alu_instr *chan = nir_alu_instr_create(mem_ctx, chan_op);
+ nir_alu_ssa_dest_init(chan, 1);
+ nir_alu_src_copy(chan-src[0], instr-src[0], mem_ctx);
+ chan-src[0].swizzle[0] = chan-src[0].swizzle[i];
+ if (nir_op_infos[chan_op].num_inputs 1) {
+ assert(nir_op_infos[chan_op].num_inputs == 2);
+ nir_alu_src_copy(chan-src[1], instr-src[1], mem_ctx);
+ chan-src[1].swizzle[0] = chan-src[1].swizzle[i];
+ }
+
+ nir_instr_insert_before(instr-instr, chan-instr);
+
+ if (i == 0) {
+ last = chan-dest.dest.ssa;
+ } else {
+ nir_alu_instr *merge = nir_alu_instr_create(mem_ctx, merge_op);
+ nir_alu_ssa_dest_init(merge, 1);
+ merge-dest.write_mask = 1;
+ merge-src[0].src = nir_src_for_ssa(last);
+ merge-src[1].src =
Re: [Mesa-dev] [PATCH] egl/dri2: implement platform_null.
On 22/01/15 22:23, Haixia Shi wrote:
Hi Emil
On Thu, Jan 22, 2015 at 1:36 PM, Emil Velikov emil.l.veli...@gmail.com
wrote:
Hi Haixia Shi,
On 22/01/15 17:35, Haixia Shi wrote:
Try the render node first and use it if available. Otherwise fall back to
normal nodes.
What is the use-case for such a platform - I assume it's worth
mentioning in the commit message ?
No other platform picks the device at random as seen below. Why did you
choose such an approach ? It seems like one can easily shoot themselves
by using it.
CC Stephane. The goal here is just to pick the first available node
for off-screen rendering only.
Hmm I'm guessing that using the drm/gbm platform is out of the question
? Iirc there has been a bit of love on the gbm topic, and afaiu this
solution is to be used with minigbm ?
What I'm thinking here is:
If you're testing a device with provides two or more nodes (be that the
classic card or the render ones), one cannot guarantee that the kernel
module for hw#1 will be loaded first. Thus even if one presumes that
they are working on (testing) hw#1 that may or may not be the case.
Not 100% sure on the module order part, so I could be wrong.
...
diff --git a/src/egl/drivers/dri2/platform_null.c
b/src/egl/drivers/dri2/platform_null.c
new file mode 100644
index 000..4f0b18f
--- /dev/null
+++ b/src/egl/drivers/dri2/platform_null.c
...
+static const char* node_path_fmt_card = /dev/dri/card%d;
You can reuse the DRM_DIR_NAME + DRM_DEV_NAME macros (from xf86drm.h)
for this.
+static const char* node_path_fmt_render = /dev/dri/renderD%d;
There is no macro for the renderD%d, although you can still use
DRM_DIR_NAME for the path.
Will update this part shortly.
I would personally wait for more feedback, rather than going through xx
revisions. But that's just me being lazy :P
+
+EGLBoolean
+dri2_initialize_null(_EGLDriver *drv, _EGLDisplay *disp)
+{
+ struct dri2_egl_display *dri2_dpy;
+ const char* err;
+ int i, render_node;
+ int driver_loaded = 0;
+
+ loader_set_logger(_eglLog);
+
+ dri2_dpy = calloc(1, sizeof *dri2_dpy);
+ if (!dri2_dpy)
+ return _eglError(EGL_BAD_ALLOC, eglInitialize);
+
+ disp-DriverData = (void *) dri2_dpy;
+
+ for (render_node = 1; render_node = 0; --render_node) {
+ const char* node_path_fmt =
+render_node ? node_path_fmt_render : node_path_fmt_card;
+ const int base = render_node ? 128 : 0;
+ for (i = 0; i 16; ++i) {
What was the reason behind choosing 16 here ?
It's an arbitrary number.
My bad it's DRM_MAX_MINOR, as defined in xf86drm.h. Please use the
symbolic name.
How about choosing 64 here as it is the
limit chosen by drm_stub.c: drm_minor_get_id()?
We nuked the file with kernel 3.17 :P
+ char *card_path;
+ if (asprintf(card_path, node_path_fmt, base + i) 0)
+continue;
+
+ dri2_dpy-fd = open(card_path, O_RDWR);
If you open a normal node (card%d) I believe that you'll need an
authenticate hook in dri2_egl_display_vtbl. Does things work without it
on your system/platform ?
You're correct; normal node would require the legacy auth hook, and it
would only work without auth if the process is run as root, which is
why we're trying render nodes first.
So you're saying that people without render nodes should run egl(mesa)
as root ? That does not sound like a wise suggestion imho.
Basically what I'm trying to say is - if you have a fall-back to normal
nodes, some form of auth ought to be in place.
Not an expert on the topic
-Emil
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [PATCH] egl/dri2: implement platform_null.
On Thu, Jan 22, 2015 at 4:36 PM, Emil Velikov emil.l.veli...@gmail.com wrote: +static const char* node_path_fmt_card = /dev/dri/card%d; You can reuse the DRM_DIR_NAME + DRM_DEV_NAME macros (from xf86drm.h) for this. +static const char* node_path_fmt_render = /dev/dri/renderD%d; There is no macro for the renderD%d, although you can still use DRM_DIR_NAME for the path. I suppose for consistency, it wouldn't be a horrible idea to add the missing macro to libdrm (although to avoid libdrm version bump dependency from mesa side, I'm fine with open-coding it for now in mesa and clean up some time after there has been a libdrm release) BR, -R ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [PATCH] nir: Make vec-to-movs handle src/dest aliasing.
What happens if you have something like foo = vec3(foo.z, bar.x,
foo.x)? I don't think emitting vector mov's for only the contiguous
components is enough.
On Thu, Jan 22, 2015 at 4:51 PM, Eric Anholt e...@anholt.net wrote:
It now emits vector MOVs instead of a series of individual MOVs, which
should be useful to any vector backends. This pushes the problem of
src/dest aliasing of channels on a scalar chip to the backend, but if
there are any vector operations in your shader then you needed to be
handling this already.
Fixes fs-swap-problem with my scalarizing patches.
---
src/glsl/nir/nir_lower_vec_to_movs.c | 74
+++-
1 file changed, 64 insertions(+), 10 deletions(-)
diff --git a/src/glsl/nir/nir_lower_vec_to_movs.c
b/src/glsl/nir/nir_lower_vec_to_movs.c
index 022889e..489901e 100644
--- a/src/glsl/nir/nir_lower_vec_to_movs.c
+++ b/src/glsl/nir/nir_lower_vec_to_movs.c
@@ -33,6 +33,49 @@
*/
static bool
+src_matches_dest_reg(nir_dest *dest, nir_src *src)
+{
+ if (dest-is_ssa || src-is_ssa)
+ return false;
+
+ return (dest-reg.reg == src-reg.reg
+ dest-reg.base_offset == src-reg.base_offset
+ !dest-reg.indirect
+ !src-reg.indirect);
+}
+
+static unsigned
+insert_movs(nir_alu_instr *vec, unsigned start_channel,
+unsigned start_src_idx, void *mem_ctx)
+{
+ unsigned src_idx = start_src_idx;
+ assert(src_idx nir_op_infos[vec-op].num_inputs);
+
+ nir_alu_instr *mov = nir_alu_instr_create(mem_ctx, nir_op_imov);
+ nir_alu_src_copy(mov-src[0], vec-src[src_idx], mem_ctx);
+ nir_alu_dest_copy(mov-dest, vec-dest, mem_ctx);
+
+ mov-dest.write_mask = (1u start_channel);
+ mov-src[0].swizzle[start_channel] = vec-src[src_idx].swizzle[0];
+ src_idx++;
+
+ for (unsigned i = start_channel + 1; i 4; i++) {
+ if (!(vec-dest.write_mask (1 i)))
+ continue;
+
+ if (nir_srcs_equal(vec-src[src_idx].src,
vec-src[start_src_idx].src)) {
+ mov-dest.write_mask |= (1 i);
+ mov-src[0].swizzle[i] = vec-src[src_idx].swizzle[0];
+ }
+ src_idx++;
+ }
+
+ nir_instr_insert_before(vec-instr, mov-instr);
+
+ return mov-dest.write_mask;
+}
+
+static bool
lower_vec_to_movs_block(nir_block *block, void *mem_ctx)
{
nir_foreach_instr_safe(block, instr) {
@@ -50,22 +93,33 @@ lower_vec_to_movs_block(nir_block *block, void *mem_ctx)
continue; /* The loop */
}
+ /* Since we insert multiple MOVs, we have to be non-SSA. */
+ assert(!vec-dest.dest.is_ssa);
+
+ unsigned finished_write_mask = 0;
+
+ /* First, emit a MOV for all the src channels that are in the
+ * destination reg, in case other values we're populating in the dest
+ * might overwrite them.
+ */
for (unsigned i = 0, src_idx = 0; i 4; i++) {
if (!(vec-dest.write_mask (1 i)))
continue;
- assert(src_idx nir_op_infos[vec-op].num_inputs);
-
- nir_alu_instr *mov = nir_alu_instr_create(mem_ctx, nir_op_imov);
- nir_alu_src_copy(mov-src[0], vec-src[src_idx], mem_ctx);
-
- /* We only care about the one swizzle */
- mov-src[0].swizzle[i] = vec-src[src_idx].swizzle[0];
+ if (src_matches_dest_reg(vec-dest.dest, vec-src[src_idx].src)) {
+finished_write_mask |= insert_movs(vec, i, src_idx, mem_ctx);
+break;
+ }
+ src_idx++;
+ }
- nir_alu_dest_copy(mov-dest, vec-dest, mem_ctx);
- mov-dest.write_mask = (1u i);
+ /* Now, emit MOVs for all the other src channels. */
+ for (unsigned i = 0, src_idx = 0; i 4; i++) {
+ if (!(vec-dest.write_mask (1 i)))
+continue;
- nir_instr_insert_before(vec-instr, mov-instr);
+ if (!(finished_write_mask (1 i)))
+finished_write_mask |= insert_movs(vec, i, src_idx, mem_ctx);
src_idx++;
}
--
2.1.3
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/mesa-dev
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [PATCH] nir: Add nir_lower_alu_scalar.
On Thu, Jan 22, 2015 at 2:52 PM, Eric Anholt e...@anholt.net wrote:
This is the equivalent of brw_fs_channel_expressions.cpp, which I wanted
for vc4.
v2: Use the nir_src_for_ssa() helper, and another instance of
nir_alu_src_copy().
v3: Drop the non-SSA support. All intended callers will have SSA-only ALU
ops.
v4: Use insert_before, drop stale bcsel/fcsel comment, drop now-unused
unsupported() function, drop lower_context struct.
---
This can also be found on my nir-scalarize-2 branch.
src/glsl/Makefile.sources | 1 +
src/glsl/nir/nir.h | 1 +
src/glsl/nir/nir_lower_alu_scalar.c | 182
3 files changed, 184 insertions(+)
create mode 100644 src/glsl/nir/nir_lower_alu_scalar.c
diff --git a/src/glsl/Makefile.sources b/src/glsl/Makefile.sources
index 6237627..9cd1a6a 100644
--- a/src/glsl/Makefile.sources
+++ b/src/glsl/Makefile.sources
@@ -24,6 +24,7 @@ NIR_FILES = \
$(GLSL_SRCDIR)/nir/nir_intrinsics.c \
$(GLSL_SRCDIR)/nir/nir_intrinsics.h \
$(GLSL_SRCDIR)/nir/nir_live_variables.c \
+ $(GLSL_SRCDIR)/nir/nir_lower_alu_scalar.c \
$(GLSL_SRCDIR)/nir/nir_lower_atomics.c \
$(GLSL_SRCDIR)/nir/nir_lower_global_vars_to_local.c \
$(GLSL_SRCDIR)/nir/nir_lower_locals_to_regs.c \
diff --git a/src/glsl/nir/nir.h b/src/glsl/nir/nir.h
index 0dbe000..aa0927a 100644
--- a/src/glsl/nir/nir.h
+++ b/src/glsl/nir/nir.h
@@ -1520,6 +1520,7 @@ void nir_lower_vars_to_ssa(nir_shader *shader);
void nir_remove_dead_variables(nir_shader *shader);
void nir_lower_vec_to_movs(nir_shader *shader);
+void nir_lower_ops_scalar(nir_shader *shader);
void nir_lower_samplers(nir_shader *shader,
struct gl_shader_program *shader_program,
diff --git a/src/glsl/nir/nir_lower_alu_scalar.c
b/src/glsl/nir/nir_lower_alu_scalar.c
new file mode 100644
index 000..64552be
--- /dev/null
+++ b/src/glsl/nir/nir_lower_alu_scalar.c
@@ -0,0 +1,182 @@
+/*
+ * Copyright © 2014-2015 Broadcom
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the
Software),
+ * to deal in the Software without restriction, including without
limitation
+ * the rights to use, copy, modify, merge, publish, distribute,
sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the
next
+ * paragraph) shall be included in all copies or substantial portions of
the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED AS IS, WITHOUT WARRANTY OF ANY KIND,
EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT
SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
DEALINGS
+ * IN THE SOFTWARE.
+ */
+
+#include nir.h
+
+/** @file nir_lower_alu_scalar.c
+ *
+ * Replaces nir_alu_instr operations with more than one channel used in
the
+ * arguments with individual per-channel operations.
+ */
+
+static void
+nir_alu_ssa_dest_init(nir_alu_instr *instr, unsigned num_components)
+{
+ nir_ssa_dest_init(instr-instr, instr-dest.dest, num_components,
NULL);
+ instr-dest.write_mask = (1 num_components) - 1;
+}
+
+static void
+lower_reduction(nir_alu_instr *instr, nir_op chan_op, nir_op merge_op,
+void *mem_ctx)
+{
+ unsigned num_components = nir_op_infos[instr-op].input_sizes[0];
+
+ nir_ssa_def *last = NULL;
+ for (unsigned i = 0; i num_components; i++) {
+ nir_alu_instr *chan = nir_alu_instr_create(mem_ctx, chan_op);
+ nir_alu_ssa_dest_init(chan, 1);
+ nir_alu_src_copy(chan-src[0], instr-src[0], mem_ctx);
+ chan-src[0].swizzle[0] = chan-src[0].swizzle[i];
+ if (nir_op_infos[chan_op].num_inputs 1) {
+ assert(nir_op_infos[chan_op].num_inputs == 2);
+ nir_alu_src_copy(chan-src[1], instr-src[1], mem_ctx);
+ chan-src[1].swizzle[0] = chan-src[1].swizzle[i];
+ }
+
+ nir_instr_insert_before(instr-instr, chan-instr);
+
+ if (i == 0) {
+ last = chan-dest.dest.ssa;
+ } else {
+ nir_alu_instr *merge = nir_alu_instr_create(mem_ctx, merge_op);
+ nir_alu_ssa_dest_init(merge, 1);
+ merge-dest.write_mask = 1;
+ merge-src[0].src = nir_src_for_ssa(last);
+ merge-src[1].src = nir_src_for_ssa(chan-dest.dest.ssa);
+ nir_instr_insert_before(instr-instr, merge-instr);
+ last = merge-dest.dest.ssa;
+ }
+ }
+
+
[Mesa-dev] New stable-branch 10.4 candidate pushed
Hello list, A candidate for the stable 10.4.3 release has been pushed. It covers more than 40 fixes for the nine state-tracker, amongst others. A brief log (for non-nine related changes) Jason Ekstrand (1): mesa: Fix clamping to -1.0 in snorm_to_float Jonathan Gray (1): glsl: Link glsl_test with pthreads library. Kenneth Graunke (2): i965: Respect the no_8 flag on Gen6, not just Gen7+. i965: Work around mysterious Gen4 GPU hangs with minimal state changes. For further details (including the old style logs), including piglit results please bare with me until the morning :-) Thanks Emil ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [PATCH] nir: Make vec-to-movs handle src/dest aliasing.
Argh, nevermind, I was reading it wrong...
On Thu, Jan 22, 2015 at 8:18 PM, Connor Abbott cwabbo...@gmail.com wrote:
What happens if you have something like foo = vec3(foo.z, bar.x,
foo.x)? I don't think emitting vector mov's for only the contiguous
components is enough.
On Thu, Jan 22, 2015 at 4:51 PM, Eric Anholt e...@anholt.net wrote:
It now emits vector MOVs instead of a series of individual MOVs, which
should be useful to any vector backends. This pushes the problem of
src/dest aliasing of channels on a scalar chip to the backend, but if
there are any vector operations in your shader then you needed to be
handling this already.
Fixes fs-swap-problem with my scalarizing patches.
---
src/glsl/nir/nir_lower_vec_to_movs.c | 74
+++-
1 file changed, 64 insertions(+), 10 deletions(-)
diff --git a/src/glsl/nir/nir_lower_vec_to_movs.c
b/src/glsl/nir/nir_lower_vec_to_movs.c
index 022889e..489901e 100644
--- a/src/glsl/nir/nir_lower_vec_to_movs.c
+++ b/src/glsl/nir/nir_lower_vec_to_movs.c
@@ -33,6 +33,49 @@
*/
static bool
+src_matches_dest_reg(nir_dest *dest, nir_src *src)
+{
+ if (dest-is_ssa || src-is_ssa)
+ return false;
+
+ return (dest-reg.reg == src-reg.reg
+ dest-reg.base_offset == src-reg.base_offset
+ !dest-reg.indirect
+ !src-reg.indirect);
+}
+
+static unsigned
+insert_movs(nir_alu_instr *vec, unsigned start_channel,
+unsigned start_src_idx, void *mem_ctx)
We need a comment explaining what this function does and what it
returns. Also, it only creates a single move so it should be called
insert_mov().
+{
+ unsigned src_idx = start_src_idx;
+ assert(src_idx nir_op_infos[vec-op].num_inputs);
+
+ nir_alu_instr *mov = nir_alu_instr_create(mem_ctx, nir_op_imov);
+ nir_alu_src_copy(mov-src[0], vec-src[src_idx], mem_ctx);
+ nir_alu_dest_copy(mov-dest, vec-dest, mem_ctx);
+
+ mov-dest.write_mask = (1u start_channel);
+ mov-src[0].swizzle[start_channel] = vec-src[src_idx].swizzle[0];
+ src_idx++;
+
+ for (unsigned i = start_channel + 1; i 4; i++) {
+ if (!(vec-dest.write_mask (1 i)))
+ continue;
+
+ if (nir_srcs_equal(vec-src[src_idx].src,
vec-src[start_src_idx].src)) {
+ mov-dest.write_mask |= (1 i);
+ mov-src[0].swizzle[i] = vec-src[src_idx].swizzle[0];
+ }
+ src_idx++;
+ }
+
+ nir_instr_insert_before(vec-instr, mov-instr);
+
+ return mov-dest.write_mask;
+}
+
+static bool
lower_vec_to_movs_block(nir_block *block, void *mem_ctx)
{
nir_foreach_instr_safe(block, instr) {
@@ -50,22 +93,33 @@ lower_vec_to_movs_block(nir_block *block, void *mem_ctx)
continue; /* The loop */
}
+ /* Since we insert multiple MOVs, we have to be non-SSA. */
+ assert(!vec-dest.dest.is_ssa);
+
+ unsigned finished_write_mask = 0;
+
+ /* First, emit a MOV for all the src channels that are in the
+ * destination reg, in case other values we're populating in the dest
+ * might overwrite them.
+ */
for (unsigned i = 0, src_idx = 0; i 4; i++) {
if (!(vec-dest.write_mask (1 i)))
continue;
- assert(src_idx nir_op_infos[vec-op].num_inputs);
-
- nir_alu_instr *mov = nir_alu_instr_create(mem_ctx, nir_op_imov);
- nir_alu_src_copy(mov-src[0], vec-src[src_idx], mem_ctx);
-
- /* We only care about the one swizzle */
- mov-src[0].swizzle[i] = vec-src[src_idx].swizzle[0];
+ if (src_matches_dest_reg(vec-dest.dest, vec-src[src_idx].src))
{
+finished_write_mask |= insert_movs(vec, i, src_idx, mem_ctx);
+break;
+ }
+ src_idx++;
+ }
- nir_alu_dest_copy(mov-dest, vec-dest, mem_ctx);
- mov-dest.write_mask = (1u i);
+ /* Now, emit MOVs for all the other src channels. */
+ for (unsigned i = 0, src_idx = 0; i 4; i++) {
+ if (!(vec-dest.write_mask (1 i)))
+continue;
- nir_instr_insert_before(vec-instr, mov-instr);
+ if (!(finished_write_mask (1 i)))
+finished_write_mask |= insert_movs(vec, i, src_idx, mem_ctx);
src_idx++;
}
--
2.1.3
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/mesa-dev
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [PATCH 4/5] nir: Make some helpers for copying ALU src/dests.
Jason Ekstrand ja...@jlekstrand.net writes:
On Wed, Jan 21, 2015 at 5:26 PM, Eric Anholt e...@anholt.net wrote:
There aren't many users yet, but I wanted to do this from my scalarizing
pass.
---
src/glsl/nir/nir.c | 18 ++
src/glsl/nir/nir.h | 5 -
src/glsl/nir/nir_lower_vec_to_movs.c | 7 ++-
src/glsl/nir/nir_opt_peephole_select.c | 5 +
4 files changed, 25 insertions(+), 10 deletions(-)
diff --git a/src/glsl/nir/nir.c b/src/glsl/nir/nir.c
index 16ad2da..e414df9 100644
--- a/src/glsl/nir/nir.c
+++ b/src/glsl/nir/nir.c
@@ -175,6 +175,24 @@ nir_dest nir_dest_copy(nir_dest dest, void *mem_ctx)
return ret;
}
+void
+nir_alu_src_copy(nir_alu_src *dest, nir_alu_src *src, void *mem_ctx)
+{
We already have nir_src_copy which returns a nir_src instead of taking a
pointer. TBH, I'm not sure which I prefer, but it would be good to be
consistent. Thoughts?
Yeah, I was thinking that as the struct gets bigger, passing it around
on the stack gets worse. For API consistency, I think that would mean
pointers for both.
diff --git a/src/glsl/nir/nir.h b/src/glsl/nir/nir.h
index 8dc5222..7f0aa36 100644
--- a/src/glsl/nir/nir.h
+++ b/src/glsl/nir/nir.h
@@ -569,7 +569,10 @@ typedef struct {
unsigned write_mask : 4; /* ignored if dest.is_ssa is true */
} nir_alu_dest;
-#define OPCODE(name, num_inputs, output_size, output_type, \
+void nir_alu_src_copy(nir_alu_src *dest, nir_alu_src *src, void *mem_ctx);
+void nir_alu_dest_copy(nir_alu_dest *dest, nir_alu_dest *src, void
*mem_ctx);
+
+#define OPCODE(name, num_inputs, output_size, output_type, \
Accidental whitespace change?
Not sure how that happened, will fix.
signature.asc
Description: PGP signature
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [PATCH] i965: Do Sandybridge workaround flushes before each primitive.
On 10/01/15 07:07, Kenneth Graunke wrote: Sandybridge requires the post-sync non-zero workaround in a ton of places, and if you ever miss one, the GPU usually hangs. Would it be worth including this in the stable branch ? Cc: mesa-sta...@lists.freedesktop.org Thanks Emil ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [PATCH] egl/dri2: implement platform_null.
Haixia Shi h...@chromium.org writes: Try the render node first and use it if available. Otherwise fall back to normal nodes. Signed-off-by: Haixia Shi h...@chromium.org +/* + * Mesa 3-D graphics library + * + * Copyright (c) 2014 The Chromium OS Authors. All rights reserved. + * + * Based on platform_x11, which has + * + * Copyright © 2011 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the Software), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included + * in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED AS IS, WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. Is the intent of The Chromium OS Authors to license it under the same MIT license? If so, the formatting should probably be: +/* + * Copyright (c) 2014 The Chromium OS Authors. + * Copyright © 2011 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a ... Having the All rights reserved then description of where the code was derived from separately seems to indicate that you don't intend to actually license it under the same license. signature.asc Description: PGP signature ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [Bug 88467] nir.c:140: error: ‘nir_src’ has no member named ‘ssa’
https://bugs.freedesktop.org/show_bug.cgi?id=88467 --- Comment #17 from Jason Ekstrand ja...@jlekstrand.net --- (In reply to Connor Abbott from comment #16) (In reply to Jason Ekstrand from comment #15) (In reply to Connor Abbott from comment #14) I definitely don't want to remove the anonymous union from nir_src. We use it all over the place, and it really helps with readability and writeability. Without it, we would have to say src[n].src.src.ssa or src[n].src.src.reg for ALU sources, which just seems silly. The anonymous union isn't the problem. That's fine with --std=gnu99. The problem is that they don't work with designated initializers. Now that those are gone, NIR builds just fine with --std=gnu99. We're just waiting for patch review to finish on the configure.ac patch and we'll be building on GCC 4.4 again. Sure, I was just replying to Emil's suggestion. Sure. I guess I wasn't reading carefully enough. -- You are receiving this mail because: You are the QA Contact for the bug. ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [Bug 88275] [865G] Intel OpenGL rendering isn't starting
https://bugs.freedesktop.org/show_bug.cgi?id=88275 --- Comment #24 from Timothy Arceri t_arc...@yahoo.com.au --- What does it say when you run: LIBGL_DEBUG=verbose glxinfo | grep direct -- You are receiving this mail because: You are the assignee for the bug. ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [Bug 88467] nir.c:140: error: ‘nir_src’ has no member named ‘ssa’
https://bugs.freedesktop.org/show_bug.cgi?id=88467 --- Comment #12 from Emil Velikov emil.l.veli...@gmail.com --- Jason, MSVC 2013 supports designated initialisers yet the VMWare guys cannot migrate to it yet iirc. On the anonymous unions - perhaps we can nuke them by naming them ? There have been similar problems in the past, and this was the most comfortable/flexible fix. Just my 2c (in case anyone is interested) :) -- You are receiving this mail because: You are the QA Contact for the bug. ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [Bug 88467] nir.c:140: error: ‘nir_src’ has no member named ‘ssa’
https://bugs.freedesktop.org/show_bug.cgi?id=88467 --- Comment #13 from Jason Ekstrand ja...@jlekstrand.net --- (In reply to Emil Velikov from comment #12) Jason, MSVC 2013 supports designated initialisers yet the VMWare guys cannot migrate to it yet iirc. On the anonymous unions - perhaps we can nuke them by naming them ? There have been similar problems in the past, and this was the most comfortable/flexible fix. Just my 2c (in case anyone is interested) :) It does... sort-of. Unfortunately, the fact that they don't work with unions is a well-documented bug in MSVC 2013. -- You are receiving this mail because: You are the QA Contact for the bug. ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [PATCH] st/mesa: mark constant array of swizzles as static const
This saves about 0.5k in the text section for a gallium driver
on amd64.
---
src/mesa/state_tracker/st_glsl_to_tgsi.cpp | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
b/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
index 2ed7a3b..f1131d5 100644
--- a/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
+++ b/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
@@ -486,7 +486,7 @@ fail_link(struct gl_shader_program *prog, const char *fmt,
...)
static int
swizzle_for_size(int size)
{
- int size_swizzles[4] = {
+ static const int size_swizzles[4] = {
MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_X, SWIZZLE_X, SWIZZLE_X),
MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_Y, SWIZZLE_Y, SWIZZLE_Y),
MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_Y, SWIZZLE_Z, SWIZZLE_Z),
--
2.1.4
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [Bug 88467] nir.c:140: error: ‘nir_src’ has no member named ‘ssa’
https://bugs.freedesktop.org/show_bug.cgi?id=88467 --- Comment #15 from Jason Ekstrand ja...@jlekstrand.net --- (In reply to Connor Abbott from comment #14) I definitely don't want to remove the anonymous union from nir_src. We use it all over the place, and it really helps with readability and writeability. Without it, we would have to say src[n].src.src.ssa or src[n].src.src.reg for ALU sources, which just seems silly. The anonymous union isn't the problem. That's fine with --std=gnu99. The problem is that they don't work with designated initializers. Now that those are gone, NIR builds just fine with --std=gnu99. We're just waiting for patch review to finish on the configure.ac patch and we'll be building on GCC 4.4 again. -- You are receiving this mail because: You are the QA Contact for the bug. ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [Bug 88467] nir.c:140: error: ‘nir_src’ has no member named ‘ssa’
https://bugs.freedesktop.org/show_bug.cgi?id=88467 --- Comment #14 from Connor Abbott cwabbo...@gmail.com --- I definitely don't want to remove the anonymous union from nir_src. We use it all over the place, and it really helps with readability and writeability. Without it, we would have to say src[n].src.src.ssa or src[n].src.src.reg for ALU sources, which just seems silly. -- You are receiving this mail because: You are the QA Contact for the bug. ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [Bug 88467] nir.c:140: error: ‘nir_src’ has no member named ‘ssa’
https://bugs.freedesktop.org/show_bug.cgi?id=88467 --- Comment #16 from Connor Abbott cwabbo...@gmail.com --- (In reply to Jason Ekstrand from comment #15) (In reply to Connor Abbott from comment #14) I definitely don't want to remove the anonymous union from nir_src. We use it all over the place, and it really helps with readability and writeability. Without it, we would have to say src[n].src.src.ssa or src[n].src.src.reg for ALU sources, which just seems silly. The anonymous union isn't the problem. That's fine with --std=gnu99. The problem is that they don't work with designated initializers. Now that those are gone, NIR builds just fine with --std=gnu99. We're just waiting for patch review to finish on the configure.ac patch and we'll be building on GCC 4.4 again. Sure, I was just replying to Emil's suggestion. -- You are receiving this mail because: You are the QA Contact for the bug. ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [PATCH 10/10] nir: Add algebraic optimizations for division and reciprocal.
8-10 are Reviewed-by: Matt Turner matts...@gmail.com ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [PATCH] glxinfo: Add support for GLX_MESA_query_renderer
On 12/01/15 19:27, Adam Jackson wrote:
This just queries our context, it doesn't attempt to enumerate all the
available renderers.
Hi Adam,
Does this mean that we have anyone outside of mesa exposing the
extension :-) But seriously thanks for doing this.
Signed-off-by: Adam Jackson a...@redhat.com
---
src/xdemos/glxinfo.c | 49 +
1 file changed, 49 insertions(+)
diff --git a/src/xdemos/glxinfo.c b/src/xdemos/glxinfo.c
index 779aaa7..b75886a 100644
--- a/src/xdemos/glxinfo.c
+++ b/src/xdemos/glxinfo.c
@@ -342,6 +342,53 @@ choose_xvisinfo(Display *dpy, int scrnum)
}
+static void
+query_renderer(void)
+{
+#ifdef GLX_MESA_query_renderer
+PFNGLXQUERYCURRENTRENDERERINTEGERMESAPROC queryInteger;
+PFNGLXQUERYCURRENTRENDERERSTRINGMESAPROC queryString;
+unsigned int v[3];
+
+queryInteger = (PFNGLXQUERYCURRENTRENDERERINTEGERMESAPROC)
+ glXGetProcAddressARB((const GLubyte *)
+ glXQueryCurrentRendererIntegerMESA);
+queryString = (PFNGLXQUERYCURRENTRENDERERSTRINGMESAPROC)
+ glXGetProcAddressARB((const GLubyte *)
+ glXQueryCurrentRendererStringMESA);
+
+printf(Extended renderer info (GLX_MESA_query_renderer):\n);
+queryInteger(GLX_RENDERER_VENDOR_ID_MESA, v);
+printf(Vendor: %s (0x%x)\n,
+queryString(GLX_RENDERER_VENDOR_ID_MESA), *v);
+queryInteger(GLX_RENDERER_DEVICE_ID_MESA, v);
+printf(Device: %s (0x%x)\n,
+queryString(GLX_RENDERER_DEVICE_ID_MESA), *v);
+queryInteger(GLX_RENDERER_VERSION_MESA, v);
+printf(Version: %d.%d.%d\n, v[0], v[1], v[2]);
+queryInteger(GLX_RENDERER_ACCELERATED_MESA, v);
+printf(Accelerated: %s\n, *v ? yes : no);
+queryInteger(GLX_RENDERER_VIDEO_MEMORY_MESA, v);
+printf(Video memory: %dMB\n, *v);
+queryInteger(GLX_RENDERER_UNIFIED_MEMORY_ARCHITECTURE_MESA, v);
+printf(Unified memory: %s\n, *v ? yes : no);
+queryInteger(GLX_RENDERER_PREFERRED_PROFILE_MESA, v);
+printf(Preferred profile: %s (0x%x)\n,
+*v == GLX_CONTEXT_CORE_PROFILE_BIT_ARB ? core :
+*v == GLX_CONTEXT_COMPATIBILITY_PROFILE_BIT_ARB ? compat :
+unknown, *v);
+queryInteger(GLX_RENDERER_OPENGL_CORE_PROFILE_VERSION_MESA, v);
+printf(Max core profile version: %d.%d\n, v[0], v[1]);
+queryInteger(GLX_RENDERER_OPENGL_COMPATIBILITY_PROFILE_VERSION_MESA, v);
+printf(Max compat profile version: %d.%d\n, v[0], v[1]);
+queryInteger(GLX_RENDERER_OPENGL_ES_PROFILE_VERSION_MESA, v);
+printf(Max GLES1 profile version: %d.%d\n, v[0], v[1]);
+queryInteger(GLX_RENDERER_OPENGL_ES2_PROFILE_VERSION_MESA, v);
+printf(Max GLES[23] profile version: %d.%d\n, v[0], v[1]);
+#endif
+}
+
+
static Bool
print_screen_info(Display *dpy, int scrnum, Bool allowDirect,
Bool coreProfile, Bool es2Profile, Bool limits,
@@ -493,6 +540,8 @@ print_screen_info(Display *dpy, int scrnum, Bool
allowDirect,
printf(GLX version: %u.%u\n, glxVersionMajor, glxVersionMinor);
printf(GLX extensions:\n);
print_extension_list(glxExtensions, singleLine);
+ if (strstr(glxExtensions, GLX_MESA_query_renderer))
+ query_renderer();
Indentation looks a bit funny here - spaces vs tab+spaces.
With that squashed the patch is
Reviewed-by: Emil Velikov emil.l.veli...@gmail.com
-Emil
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [PATCH 06/10] nir: Add a bunch of algebraic optimizations on logic/bit operations.
On Thu, Jan 22, 2015 at 7:27 AM, Jason Ekstrand ja...@jlekstrand.net wrote:
On Jan 22, 2015 3:41 AM, Kenneth Graunke kenn...@whitecape.org wrote:
diff --git a/src/glsl/nir/nir_opt_algebraic.py
b/src/glsl/nir/nir_opt_algebraic.py
index 169bb41..cf16b19 100644
--- a/src/glsl/nir/nir_opt_algebraic.py
+++ b/src/glsl/nir/nir_opt_algebraic.py
@@ -68,6 +68,22 @@ optimizations = [
(('fadd', ('fmul', a, b), c), ('ffma', a, b, c)),
(('fge', ('fneg', ('fabs', a)), 0.0), ('feq', a, 0.0)),
(('fmin', ('fmax', a, 1.0), 0.0), ('fsat', a)),
+ # Logical and bit operations
+ (('fand', a, a), a),
This isn't correct. The fand operation will normalize to 0.0/1.0.
I didn't understand why we had integer and float versions of bitwise
operators before, but now I really don't understand what fand/for/fxor
are for. What is their purpose? (Examples please)
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [PATCH 1/3] mesa: Add missing error checks in _mesa_ProgramBinary
On 21/12/14 20:08, Ian Romanick wrote:
From: Ian Romanick ian.d.roman...@intel.com
Hi Ian,
Imho the series looks like a worthy candidate for 10.4 branch.
Do you have any objections if I scoop it up ?
-Emil
Signed-off-by: Ian Romanick ian.d.roman...@intel.com
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=87516
---
src/mesa/main/shaderapi.c | 27 +--
1 file changed, 25 insertions(+), 2 deletions(-)
diff --git a/src/mesa/main/shaderapi.c b/src/mesa/main/shaderapi.c
index 6d831f7..108e3f5 100644
--- a/src/mesa/main/shaderapi.c
+++ b/src/mesa/main/shaderapi.c
@@ -1723,8 +1723,31 @@ _mesa_ProgramBinary(GLuint program, GLenum
binaryFormat,
(void) binaryFormat;
(void) binary;
- (void) length;
- _mesa_error(ctx, GL_INVALID_OPERATION, __FUNCTION__);
+
+ /* Section 2.3.1 (Errors) of the OpenGL 4.5 spec says:
+*
+* If a negative number is provided where an argument of type sizei
or
+* sizeiptr is specified, an INVALID_VALUE error is generated.
+*/
+ if (length 0) {
+ _mesa_error(ctx, GL_INVALID_VALUE, glProgramBinary(length 0));
+ return;
+ }
+
+ /* The ARB_get_program_binary spec says:
+*
+* binaryFormat and binary must be those returned by a previous
+* call to GetProgramBinary, and length must be the length of the
+* program binary as returned by GetProgramBinary or GetProgramiv with
+* pname PROGRAM_BINARY_LENGTH. Loading the program binary will
fail,
+* setting the LINK_STATUS of program to FALSE, if these conditions
+* are not met.
+*
+* Since any value of binaryFormat passed is not one of those specified
as
+* allowable for [this] command, an INVALID_ENUM error is generated.
+*/
+ shProg-LinkStatus = GL_FALSE;
+ _mesa_error(ctx, GL_INVALID_ENUM, __FUNCTION__);
}
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [PATCH 07/10] nir: Add algebraic optimizations for pointless shifts.
On Thu, Jan 22, 2015 at 3:41 AM, Kenneth Graunke kenn...@whitecape.org wrote:
The GLSL IR optimization pass contained these; we may as well include
them too.
No change in the number of NIR instructions on a shader-db run.
total i965 instructions in shared programs: 6035397 - 6035393 (-0.00%)
i965 instructions in affected programs: 772 - 768 (-0.52%)
helped: 3 (all in glamor)
Signed-off-by: Kenneth Graunke kenn...@whitecape.org
---
src/glsl/nir/nir_opt_algebraic.py | 7 +++
1 file changed, 7 insertions(+)
diff --git a/src/glsl/nir/nir_opt_algebraic.py
b/src/glsl/nir/nir_opt_algebraic.py
index cf16b19..58e71e0 100644
--- a/src/glsl/nir/nir_opt_algebraic.py
+++ b/src/glsl/nir/nir_opt_algebraic.py
@@ -83,6 +83,13 @@ optimizations = [
# DeMorgan's Laws
(('iand', ('inot', a), ('inot', b)), ('inot', ('ior', a, b))),
(('ior', ('inot', a), ('inot', b)), ('inot', ('iand', a, b))),
+ # Shift optimizations
+ (('ishl', 0, a), 0),
Shift zero by an unknown - zero. Yes.
+ (('ishl', a, 0), 0),
Shift an unknown by zero - zero?!
With those fixed and shader-db results confirmed,
Reviewed-by: Matt Turner matts...@gmail.com
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [PATCH] egl: Soften several HAVE_DRM_PLATFORM to HAVE_LIBDRM
On 14/01/15 19:36, Axel Davy wrote:
To fix build when libdrm is not found,
commit a594cec7e3ef275c386054127a357110a19dd823 did put several
parts of egl code under #ifdef HAVE_DRM_PLATFORM.
HAVE_DRM_PLATFORM means the egl drm platform is being built.
What should have been used instead is HAVE_LIBDRM.
At a few locations, the HAVE_DRM_PLATFORM introduced
have already been replaced by HAVE_LIBDRM, this patch
replaces the remaining occurences.
This patch makes for example EGL_EXT_image_dma_buf_import
be advertised by egl under x11 when the drm egl platform
is not built, whereas previously it required the drm egl
platform to be built.
It makes sense imho. CC-ing the author and committer of the offending
commit.
Samuel, Maarten
What's your take on the topic ?
Thanks
Emil
Signed-off-by: Axel Davy axel.d...@ens.fr
---
src/egl/drivers/dri2/egl_dri2.c | 14 +++---
1 file changed, 7 insertions(+), 7 deletions(-)
diff --git a/src/egl/drivers/dri2/egl_dri2.c b/src/egl/drivers/dri2/egl_dri2.c
index 86e5f24..6306483 100644
--- a/src/egl/drivers/dri2/egl_dri2.c
+++ b/src/egl/drivers/dri2/egl_dri2.c
@@ -534,7 +534,7 @@ dri2_setup_screen(_EGLDisplay *disp)
disp-Extensions.KHR_gl_texture_2D_image = EGL_TRUE;
disp-Extensions.KHR_gl_texture_cubemap_image = EGL_TRUE;
}
-#ifdef HAVE_DRM_PLATFORM
+#ifdef HAVE_LIBDRM
if (dri2_dpy-image-base.version = 8
dri2_dpy-image-createImageFromDmaBufs) {
disp-Extensions.EXT_image_dma_buf_import = EGL_TRUE;
@@ -1335,7 +1335,7 @@ dri2_create_image_khr_renderbuffer(_EGLDisplay *disp,
_EGLContext *ctx,
return dri2_create_image_from_dri(disp, dri_image);
}
-#ifdef HAVE_DRM_PLATFORM
+#ifdef HAVE_LIBDRM
static _EGLImage *
dri2_create_image_mesa_drm_buffer(_EGLDisplay *disp, _EGLContext *ctx,
EGLClientBuffer buffer, const EGLint
*attr_list)
@@ -1571,7 +1571,7 @@ dri2_create_wayland_buffer_from_image(_EGLDriver *drv,
_EGLDisplay *dpy,
return dri2_dpy-vtbl-create_wayland_buffer_from_image(drv, dpy, img);
}
-#ifdef HAVE_DRM_PLATFORM
+#ifdef HAVE_LIBDRM
static EGLBoolean
dri2_check_dma_buf_attribs(const _EGLImageAttribs *attrs)
{
@@ -1821,7 +1821,7 @@ dri2_create_image_khr(_EGLDriver *drv, _EGLDisplay
*disp,
return dri2_create_image_khr_texture(disp, ctx, target, buffer,
attr_list);
case EGL_GL_RENDERBUFFER_KHR:
return dri2_create_image_khr_renderbuffer(disp, ctx, buffer,
attr_list);
-#ifdef HAVE_DRM_PLATFORM
+#ifdef HAVE_LIBDRM
case EGL_DRM_BUFFER_MESA:
return dri2_create_image_mesa_drm_buffer(disp, ctx, buffer, attr_list);
#endif
@@ -1829,7 +1829,7 @@ dri2_create_image_khr(_EGLDriver *drv, _EGLDisplay
*disp,
case EGL_WAYLAND_BUFFER_WL:
return dri2_create_image_wayland_wl_buffer(disp, ctx, buffer,
attr_list);
#endif
-#ifdef HAVE_DRM_PLATFORM
+#ifdef HAVE_LIBDRM
case EGL_LINUX_DMA_BUF_EXT:
return dri2_create_image_dma_buf(disp, ctx, buffer, attr_list);
#endif
@@ -1853,7 +1853,7 @@ dri2_destroy_image_khr(_EGLDriver *drv, _EGLDisplay
*disp, _EGLImage *image)
return EGL_TRUE;
}
-#ifdef HAVE_DRM_PLATFORM
+#ifdef HAVE_LIBDRM
static _EGLImage *
dri2_create_drm_image_mesa(_EGLDriver *drv, _EGLDisplay *disp,
const EGLint *attr_list)
@@ -2215,7 +2215,7 @@ _eglBuiltInDriverDRI2(const char *args)
dri2_drv-base.API.CreateImageKHR = dri2_create_image;
dri2_drv-base.API.DestroyImageKHR = dri2_destroy_image_khr;
dri2_drv-base.API.CreateWaylandBufferFromImageWL =
dri2_create_wayland_buffer_from_image;
-#ifdef HAVE_DRM_PLATFORM
+#ifdef HAVE_LIBDRM
dri2_drv-base.API.CreateDRMImageMESA = dri2_create_drm_image_mesa;
dri2_drv-base.API.ExportDRMImageMESA = dri2_export_drm_image_mesa;
#endif
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [PATCH] configure: Link against all LLVM targets when building clover
On 15/01/15 21:38, Tom Stellard wrote: On Thu, Jan 15, 2015 at 07:25:56PM +0100, Niels Ole Salscheider wrote: Since 8e7df519bd8556591794b2de08a833a67e34d526, we initialise all targets in clover. This fixes bug 85189. Signed-off-by: Niels Ole Salscheider niels_...@salscheider-online.de Reviewed-by: Tom Stellard thomas.stell...@amd.com Hi Niels, Can you confirm if this is needed for the 10.4 branch ? The commit mentioned got in the 10.4 devel cycle. Also the bug mentioned (https://bugs.freedesktop.org/show_bug.cgi?id=85189) seems to have alternative fix which is already in master. I take that this fix is required when building with static llvm ? Thanks Emil ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [PATCH 00/16] More fixes for dEQP failing tests
On 15/12/14 12:08, Eduardo Lima Mitev wrote: On 12/15/2014 12:21 PM, Emil Velikov wrote: Above you've mentioned test failures were gathered ... against 10.3.3, which brings the question: Should we include those in either one of the 10.3 and 10.4 stable branches ? Or are they so insignificant/trivial that we don't expect (m)any programs to hit them ? Hi Emil, We are probably not the right people to answer this, so I will let the reviewers take the call. That said, there are a few patches from these series that fix concrete functionality that has an impact on rendering results, so I suppose these will be interesting to port to stable branches. From a quick skim at the commit summaries I cannot pick the rendering fixes. Can you kindly list them out and I'll gladly chase the relevant people. There are many others that just improve spec compliance and has little or no practical impact on functionality, and probably are not worth porting. I guess the spec compliance depends on how many users there are flexing those code-paths. That aside I do share your view. -Emil ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [PATCH 1/1] r600: upload implicit arguments even if there are no explicit args
On Tue, 2014-12-02 at 14:52 -0500, Jan Vesely wrote:
On Tue, 2014-12-02 at 11:33 -0500, Tom Stellard wrote:
On Mon, Nov 03, 2014 at 08:29:37PM -0500, Jan Vesely wrote:
Signed-off-by: Jan Vesely jan.ves...@rutgers.edu
---
moreover, the condition is never true now that clover appends dim info
src/gallium/drivers/r600/evergreen_compute.c | 4
1 file changed, 4 deletions(-)
diff --git a/src/gallium/drivers/r600/evergreen_compute.c
b/src/gallium/drivers/r600/evergreen_compute.c
index 90fdd79..41dc93e 100644
--- a/src/gallium/drivers/r600/evergreen_compute.c
+++ b/src/gallium/drivers/r600/evergreen_compute.c
@@ -295,10 +295,6 @@ void evergreen_compute_upload_input(
struct pipe_box box;
struct pipe_transfer *transfer = NULL;
- if (shader-input_size == 0) {
- return;
- }
-
We shouldn't rely on clover specific behavior, because in theory there
could be other state trackers.
right, I should probably drop that comment from commit message.
Other than that, is there a reason to skip uploading driver arguments if
there are no state tracker ones?
ping.
without that comment (it won't show in the commit message anyway), is
there a reason to ever skip uploading implicit args?
to be honest I have hard time imagining possible use of kernels with no
arguments, as there's no way they can produce any output, or am I
missing something?
jan
jan
-Tom
if (!shader-kernel_param) {
/* Add space for the grid dimensions */
shader-kernel_param = (struct r600_resource *)
--
1.9.3
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/mesa-dev
--
Jan Vesely jan.ves...@rutgers.edu
signature.asc
Description: This is a digitally signed message part
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [PATCH 06/10] nir: Add a bunch of algebraic optimizations on logic/bit operations.
On Thu, Jan 22, 2015 at 9:06 AM, Matt Turner matts...@gmail.com wrote:
On Thu, Jan 22, 2015 at 7:27 AM, Jason Ekstrand ja...@jlekstrand.net
wrote:
On Jan 22, 2015 3:41 AM, Kenneth Graunke kenn...@whitecape.org
wrote:
diff --git a/src/glsl/nir/nir_opt_algebraic.py
b/src/glsl/nir/nir_opt_algebraic.py
index 169bb41..cf16b19 100644
--- a/src/glsl/nir/nir_opt_algebraic.py
+++ b/src/glsl/nir/nir_opt_algebraic.py
@@ -68,6 +68,22 @@ optimizations = [
(('fadd', ('fmul', a, b), c), ('ffma', a, b, c)),
(('fge', ('fneg', ('fabs', a)), 0.0), ('feq', a, 0.0)),
(('fmin', ('fmax', a, 1.0), 0.0), ('fsat', a)),
+ # Logical and bit operations
+ (('fand', a, a), a),
This isn't correct. The fand operation will normalize to 0.0/1.0.
I didn't understand why we had integer and float versions of bitwise
operators before, but now I really don't understand what fand/for/fxor
are for. What is their purpose? (Examples please)
They're for hardware that doesn't do integers. That's not our hardware, so
we can really just ignore them for now. I don't think our codegen can even
handle them.
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [PATCH] opengles2: fix building without X11
From: Michael Olbrich m.olbr...@pengutronix.de es2_info, es2gears_x11 and es2tri require X11, so don't build them if X11 is disabled. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=88618 Reviewed-by: Emil Velikov emil.l.veli...@gmail.com --- Noticed this patch in bugzilla. Not sure how many people keep an eye on it so I've decided to send it to the ML. -Emil src/egl/opengles2/Makefile.am | 5 - 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/src/egl/opengles2/Makefile.am b/src/egl/opengles2/Makefile.am index 41c1b80..36d6059 100644 --- a/src/egl/opengles2/Makefile.am +++ b/src/egl/opengles2/Makefile.am @@ -36,10 +36,13 @@ AM_LDFLAGS = \ if HAVE_EGL if HAVE_GLESV2 bin_PROGRAMS = \ + es2gears_screen +if HAVE_X11 +bin_PROGRAMS += \ es2_info \ - es2gears_screen \ es2gears_x11 \ es2tri +endif if HAVE_WAYLAND bin_PROGRAMS += es2gears_wayland endif -- 2.1.3 ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [Bug 88720] Account request
https://bugs.freedesktop.org/show_bug.cgi?id=88720 Bug ID: 88720 Summary: Account request Product: Mesa Version: git Hardware: Other OS: All Status: NEW Severity: normal Priority: medium Component: Other Assignee: mesa-dev@lists.freedesktop.org Reporter: axel.d...@ens.fr QA Contact: mesa-dev@lists.freedesktop.org Created attachment 112684 -- https://bugs.freedesktop.org/attachment.cgi?id=112684action=edit RSA public key Hello, I contribute to the Gallium Nine state tracker (Mesa). Previously I had written the DRI3 DRI_PRIME support for GLX, and had fixed some bugs in EGL wayland backend. I would like to get push access to be able to merge Gallium Nine patches once reviewed. I'm co-maintaining Gallium Nine with David Heidelberg. Real name : Axel Davy email: axel.d...@ens.fr username: axeldavy project I want to access to: mesa git://anongit.freedesktop.org/mesa/mesa -- You are receiving this mail because: You are the QA Contact for the bug. You are the assignee for the bug. ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [PATCH] configure: Link against all LLVM targets when building clover
On Thursday 22 January 2015, 13:46:14, Jan Vesely wrote: On Thu, 2015-01-22 at 16:45 +, Emil Velikov wrote: On 15/01/15 21:38, Tom Stellard wrote: On Thu, Jan 15, 2015 at 07:25:56PM +0100, Niels Ole Salscheider wrote: Since 8e7df519bd8556591794b2de08a833a67e34d526, we initialise all targets in clover. This fixes bug 85189. Signed-off-by: Niels Ole Salscheider niels_...@salscheider-online.de Reviewed-by: Tom Stellard thomas.stell...@amd.com Hi Niels, Can you confirm if this is needed for the 10.4 branch ? The commit mentioned got in the 10.4 devel cycle. Also the bug mentioned (https://bugs.freedesktop.org/show_bug.cgi?id=85189) seems to have alternative fix which is already in master. I take that this fix is required when building with static llvm ? the patch looks like it fixes https://bugs.freedesktop.org/show_bug.cgi?id=85380 instead of 85189 Yes, Jan is right. This patch fixes bug 85380 instead of 85189 - this was probably a copypaste error. This patch is relevant for the 10.4 branch, too, since commit 8e7df519bd8556591794b2de08a833a67e34d526 is in it. Ole jan Thanks Emil ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [Bug 88720] Account request
https://bugs.freedesktop.org/show_bug.cgi?id=88720 --- Comment #1 from Axel Davy axel.d...@ens.fr --- Created attachment 112685 -- https://bugs.freedesktop.org/attachment.cgi?id=112685action=edit GPG public key -- You are receiving this mail because: You are the QA Contact for the bug. You are the assignee for the bug. ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [PATCH] egl/dri2: implement platform_null.
Try the render node first and use it if available. Otherwise fall back to
normal nodes.
Signed-off-by: Haixia Shi h...@chromium.org
---
src/egl/drivers/dri2/Makefile.am | 5 +
src/egl/drivers/dri2/egl_dri2.c | 13 ++-
src/egl/drivers/dri2/egl_dri2.h | 3 +
src/egl/drivers/dri2/platform_null.c | 175 +++
4 files changed, 193 insertions(+), 3 deletions(-)
create mode 100644 src/egl/drivers/dri2/platform_null.c
diff --git a/src/egl/drivers/dri2/Makefile.am b/src/egl/drivers/dri2/Makefile.am
index 79a40e8..14b2d60 100644
--- a/src/egl/drivers/dri2/Makefile.am
+++ b/src/egl/drivers/dri2/Makefile.am
@@ -64,3 +64,8 @@ if HAVE_EGL_PLATFORM_DRM
libegl_dri2_la_SOURCES += platform_drm.c
AM_CFLAGS += -DHAVE_DRM_PLATFORM
endif
+
+if HAVE_EGL_PLATFORM_NULL
+libegl_dri2_la_SOURCES += platform_null.c
+AM_CFLAGS += -DHAVE_NULL_PLATFORM
+endif
diff --git a/src/egl/drivers/dri2/egl_dri2.c b/src/egl/drivers/dri2/egl_dri2.c
index 86e5f24..6ed137e 100644
--- a/src/egl/drivers/dri2/egl_dri2.c
+++ b/src/egl/drivers/dri2/egl_dri2.c
@@ -534,7 +534,7 @@ dri2_setup_screen(_EGLDisplay *disp)
disp-Extensions.KHR_gl_texture_2D_image = EGL_TRUE;
disp-Extensions.KHR_gl_texture_cubemap_image = EGL_TRUE;
}
-#ifdef HAVE_DRM_PLATFORM
+#if defined(HAVE_DRM_PLATFORM) || defined(HAVE_NULL_PLATFORM)
if (dri2_dpy-image-base.version = 8
dri2_dpy-image-createImageFromDmaBufs) {
disp-Extensions.EXT_image_dma_buf_import = EGL_TRUE;
@@ -632,6 +632,13 @@ dri2_initialize(_EGLDriver *drv, _EGLDisplay *disp)
return EGL_FALSE;
switch (disp-Platform) {
+#ifdef HAVE_NULL_PLATFORM
+ case _EGL_PLATFORM_NULL:
+ if (disp-Options.TestOnly)
+ return EGL_TRUE;
+ return dri2_initialize_null(drv, disp);
+#endif
+
#ifdef HAVE_X11_PLATFORM
case _EGL_PLATFORM_X11:
if (disp-Options.TestOnly)
@@ -1571,7 +1578,7 @@ dri2_create_wayland_buffer_from_image(_EGLDriver *drv,
_EGLDisplay *dpy,
return dri2_dpy-vtbl-create_wayland_buffer_from_image(drv, dpy, img);
}
-#ifdef HAVE_DRM_PLATFORM
+#if defined(HAVE_DRM_PLATFORM) || defined(HAVE_NULL_PLATFORM)
static EGLBoolean
dri2_check_dma_buf_attribs(const _EGLImageAttribs *attrs)
{
@@ -1829,7 +1836,7 @@ dri2_create_image_khr(_EGLDriver *drv, _EGLDisplay *disp,
case EGL_WAYLAND_BUFFER_WL:
return dri2_create_image_wayland_wl_buffer(disp, ctx, buffer, attr_list);
#endif
-#ifdef HAVE_DRM_PLATFORM
+#if defined(HAVE_DRM_PLATFORM) || defined(HAVE_NULL_PLATFORM)
case EGL_LINUX_DMA_BUF_EXT:
return dri2_create_image_dma_buf(disp, ctx, buffer, attr_list);
#endif
diff --git a/src/egl/drivers/dri2/egl_dri2.h b/src/egl/drivers/dri2/egl_dri2.h
index 9efe1f7..e206424 100644
--- a/src/egl/drivers/dri2/egl_dri2.h
+++ b/src/egl/drivers/dri2/egl_dri2.h
@@ -332,6 +332,9 @@ dri2_initialize_wayland(_EGLDriver *drv, _EGLDisplay *disp);
EGLBoolean
dri2_initialize_android(_EGLDriver *drv, _EGLDisplay *disp);
+EGLBoolean
+dri2_initialize_null(_EGLDriver *drv, _EGLDisplay *disp);
+
void
dri2_flush_drawable_for_swapbuffers(_EGLDisplay *disp, _EGLSurface *draw);
diff --git a/src/egl/drivers/dri2/platform_null.c
b/src/egl/drivers/dri2/platform_null.c
new file mode 100644
index 000..261d684
--- /dev/null
+++ b/src/egl/drivers/dri2/platform_null.c
@@ -0,0 +1,175 @@
+/*
+ * Mesa 3-D graphics library
+ *
+ * Copyright (c) 2014 The Chromium OS Authors.
+ * Copyright © 2011 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the Software),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included
+ * in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED AS IS, WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+ */
+
+#include stdlib.h
+#include stdio.h
+#include string.h
+#include xf86drm.h
+#include dlfcn.h
+#include sys/types.h
+#include sys/stat.h
+#include fcntl.h
+#include unistd.h
+
+#include egl_dri2.h
+#include egl_dri2_fallbacks.h
+#include loader.h
+
+static struct dri2_egl_display_vtbl dri2_null_display_vtbl = {
+ .create_pixmap_surface = dri2_fallback_create_pixmap_surface,
+ .create_image =
Re: [Mesa-dev] [PATCH] configure: Link against all LLVM targets when building clover
On Thu, 2015-01-22 at 21:11 +0100, Niels Ole Salscheider wrote: On Thursday 22 January 2015, 13:46:14, Jan Vesely wrote: On Thu, 2015-01-22 at 16:45 +, Emil Velikov wrote: On 15/01/15 21:38, Tom Stellard wrote: On Thu, Jan 15, 2015 at 07:25:56PM +0100, Niels Ole Salscheider wrote: Since 8e7df519bd8556591794b2de08a833a67e34d526, we initialise all targets in clover. This fixes bug 85189. Signed-off-by: Niels Ole Salscheider niels_...@salscheider-online.de Reviewed-by: Tom Stellard thomas.stell...@amd.com Hi Niels, Can you confirm if this is needed for the 10.4 branch ? The commit mentioned got in the 10.4 devel cycle. Also the bug mentioned (https://bugs.freedesktop.org/show_bug.cgi?id=85189) seems to have alternative fix which is already in master. I take that this fix is required when building with static llvm ? It depends on how the LLVM build process produces libraries. AFAIK, LLVM autotools build produces one dynamic (libLLVM-X.Y.so) with all targets, and per target static libraries (e.g libLLVMR600Codegen.a). However, it's possible to setup cmake (maybe autotools as well) to produce separate dynamic libraries per target (e.g libLLVMR600CodeGen.so), so it's possible to hit the issue with dynamic libraries as well (I do see it on my setup). I'd say it's correct to use this patch in every setup, since the autotools dynamic build only works 'by accident'. jan the patch looks like it fixes https://bugs.freedesktop.org/show_bug.cgi?id=85380 instead of 85189 Yes, Jan is right. This patch fixes bug 85380 instead of 85189 - this was probably a copypaste error. This patch is relevant for the 10.4 branch, too, since commit 8e7df519bd8556591794b2de08a833a67e34d526 is in it. Ole jan Thanks Emil ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev -- Jan Vesely jan.ves...@rutgers.edu signature.asc Description: This is a digitally signed message part ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [PATCH 1/3] Mesa: Add support for GL_OES_texture_*float* extensions.
Hi Kalyan, On 08/01/15 04:30, Kalyan Kondapally wrote: [...] diff --git a/src/mesa/main/mtypes.h b/src/mesa/main/mtypes.h index b95dfb9..8553a6c 100644 --- a/src/mesa/main/mtypes.h +++ b/src/mesa/main/mtypes.h @@ -1220,6 +1220,8 @@ struct gl_texture_object GLboolean Purgeable;/** Is the buffer purgeable under memory pressure? */ GLboolean Immutable;/** GL_ARB_texture_storage */ + GLboolean _IsFloat; /** GL_OES_float_texture */ + GLboolean _IsHalfFloat; /** GL_OES_half_float_texture */ GLuint MinLevel;/** GL_ARB_texture_view */ GLuint MinLayer;/** GL_ARB_texture_view */ @@ -3858,6 +3860,10 @@ struct gl_extensions GLboolean OES_draw_texture; GLboolean OES_depth_texture_cube_map; GLboolean OES_EGL_image_external; + GLboolean OES_texture_float; + GLboolean OES_texture_half_float; + GLboolean OES_texture_float_linear; + GLboolean OES_texture_half_float_linear; Humble nitpick - can we keep these alphabetically sorted ? Thanks Emil ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [PATCH 01/41] glapi: Added ARB_direct_state_access.xml file.
On 05/01/15 17:45, Laura Ekstrand wrote:
This comment is vague. Do you have a specific recommendation for the
code here?
Seems like I'm way too subtle - yes I have a few.
1. Add ARB_direct_state_access to struct gl_extension
--- a/src/mesa/main/mtypes.h
+++ b/src/mesa/main/mtypes.h
@@ -3731,6 +3731,7 @@ struct gl_extensions
GLboolean ARB_depth_clamp;
GLboolean ARB_depth_texture;
GLboolean ARB_derivative_control;
+ GLboolean ARB_direct_state_access
GLboolean ARB_draw_buffers_blend;
GLboolean ARB_draw_elements_base_vertex;
2. Use it in the extensions table.
--- a/src/mesa/main/extensions.c
+++ b/src/mesa/main/extensions.c
@@ -103,6 +103,7 @@ static const struct extension extension_table[] = {
{ GL_ARB_depth_clamp, o(ARB_depth_clamp),
GL, 2003 },
{ GL_ARB_depth_texture,
o(ARB_depth_texture), GLL,2001 },
{ GL_ARB_derivative_control,
o(ARB_derivative_control), GL, 2014 },
+ { GL_ARB_direct_state_access,
o(ARB_direct_state_access), GL, 2014 },
3. Make use of if when the spec amends existing behaviour - most of the
spec text as of section New Tokens onwards. Clearly with this series
you're adding the new entry points(functions) so it does not apply here :)
if (foo-Extensions.ARB_direct_state_access) {
}
Pretty much every extension that was added to mesa follows this approach
so keeping up with traditions is always nice.
Cheers,
Emil
P.S. Pardon if my nitpicking came out a bit wierd.
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [PATCH] egl/dri2: implement platform_null.
Try the render node first and use it if available. Otherwise fall back to
normal nodes.
Signed-off-by: Haixia Shi h...@chromium.org
---
src/egl/drivers/dri2/Makefile.am | 5 +
src/egl/drivers/dri2/egl_dri2.c | 13 ++-
src/egl/drivers/dri2/egl_dri2.h | 3 +
src/egl/drivers/dri2/platform_null.c | 178 +++
4 files changed, 196 insertions(+), 3 deletions(-)
create mode 100644 src/egl/drivers/dri2/platform_null.c
diff --git a/src/egl/drivers/dri2/Makefile.am b/src/egl/drivers/dri2/Makefile.am
index 79a40e8..14b2d60 100644
--- a/src/egl/drivers/dri2/Makefile.am
+++ b/src/egl/drivers/dri2/Makefile.am
@@ -64,3 +64,8 @@ if HAVE_EGL_PLATFORM_DRM
libegl_dri2_la_SOURCES += platform_drm.c
AM_CFLAGS += -DHAVE_DRM_PLATFORM
endif
+
+if HAVE_EGL_PLATFORM_NULL
+libegl_dri2_la_SOURCES += platform_null.c
+AM_CFLAGS += -DHAVE_NULL_PLATFORM
+endif
diff --git a/src/egl/drivers/dri2/egl_dri2.c b/src/egl/drivers/dri2/egl_dri2.c
index 86e5f24..6ed137e 100644
--- a/src/egl/drivers/dri2/egl_dri2.c
+++ b/src/egl/drivers/dri2/egl_dri2.c
@@ -534,7 +534,7 @@ dri2_setup_screen(_EGLDisplay *disp)
disp-Extensions.KHR_gl_texture_2D_image = EGL_TRUE;
disp-Extensions.KHR_gl_texture_cubemap_image = EGL_TRUE;
}
-#ifdef HAVE_DRM_PLATFORM
+#if defined(HAVE_DRM_PLATFORM) || defined(HAVE_NULL_PLATFORM)
if (dri2_dpy-image-base.version = 8
dri2_dpy-image-createImageFromDmaBufs) {
disp-Extensions.EXT_image_dma_buf_import = EGL_TRUE;
@@ -632,6 +632,13 @@ dri2_initialize(_EGLDriver *drv, _EGLDisplay *disp)
return EGL_FALSE;
switch (disp-Platform) {
+#ifdef HAVE_NULL_PLATFORM
+ case _EGL_PLATFORM_NULL:
+ if (disp-Options.TestOnly)
+ return EGL_TRUE;
+ return dri2_initialize_null(drv, disp);
+#endif
+
#ifdef HAVE_X11_PLATFORM
case _EGL_PLATFORM_X11:
if (disp-Options.TestOnly)
@@ -1571,7 +1578,7 @@ dri2_create_wayland_buffer_from_image(_EGLDriver *drv,
_EGLDisplay *dpy,
return dri2_dpy-vtbl-create_wayland_buffer_from_image(drv, dpy, img);
}
-#ifdef HAVE_DRM_PLATFORM
+#if defined(HAVE_DRM_PLATFORM) || defined(HAVE_NULL_PLATFORM)
static EGLBoolean
dri2_check_dma_buf_attribs(const _EGLImageAttribs *attrs)
{
@@ -1829,7 +1836,7 @@ dri2_create_image_khr(_EGLDriver *drv, _EGLDisplay *disp,
case EGL_WAYLAND_BUFFER_WL:
return dri2_create_image_wayland_wl_buffer(disp, ctx, buffer, attr_list);
#endif
-#ifdef HAVE_DRM_PLATFORM
+#if defined(HAVE_DRM_PLATFORM) || defined(HAVE_NULL_PLATFORM)
case EGL_LINUX_DMA_BUF_EXT:
return dri2_create_image_dma_buf(disp, ctx, buffer, attr_list);
#endif
diff --git a/src/egl/drivers/dri2/egl_dri2.h b/src/egl/drivers/dri2/egl_dri2.h
index 9efe1f7..e206424 100644
--- a/src/egl/drivers/dri2/egl_dri2.h
+++ b/src/egl/drivers/dri2/egl_dri2.h
@@ -332,6 +332,9 @@ dri2_initialize_wayland(_EGLDriver *drv, _EGLDisplay *disp);
EGLBoolean
dri2_initialize_android(_EGLDriver *drv, _EGLDisplay *disp);
+EGLBoolean
+dri2_initialize_null(_EGLDriver *drv, _EGLDisplay *disp);
+
void
dri2_flush_drawable_for_swapbuffers(_EGLDisplay *disp, _EGLSurface *draw);
diff --git a/src/egl/drivers/dri2/platform_null.c
b/src/egl/drivers/dri2/platform_null.c
new file mode 100644
index 000..4f0b18f
--- /dev/null
+++ b/src/egl/drivers/dri2/platform_null.c
@@ -0,0 +1,178 @@
+/*
+ * Mesa 3-D graphics library
+ *
+ * Copyright (c) 2014 The Chromium OS Authors. All rights reserved.
+ *
+ * Based on platform_x11, which has
+ *
+ * Copyright © 2011 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the Software),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included
+ * in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED AS IS, WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+ */
+
+#include stdlib.h
+#include stdio.h
+#include string.h
+#include xf86drm.h
+#include dlfcn.h
+#include sys/types.h
+#include sys/stat.h
+#include fcntl.h
+#include unistd.h
+
+#include egl_dri2.h
+#include egl_dri2_fallbacks.h
+#include loader.h
+
+static struct dri2_egl_display_vtbl dri2_null_display_vtbl = {
+ .create_pixmap_surface =
[Mesa-dev] [PATCH] glx: do not leak the dri2 extension information
The XExtensionInfo is allocated dynamically (if the pointer is NULL) in the XEXT_GENERATE_FIND_DISPLAY macro. On the other hand the macro XEXT_GENERATE_CLOSE_DISPLAY does not check/free the memory. Follow the example set by dri1 and appledri, and use a static variable. Spotted while hunting still reachable leaks in Waffle. Signed-off-by: Emil Velikov emil.l.veli...@gmail.com --- src/glx/dri2.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/src/glx/dri2.c b/src/glx/dri2.c index cc6c164..9ebd00a 100644 --- a/src/glx/dri2.c +++ b/src/glx/dri2.c @@ -53,7 +53,8 @@ static char dri2ExtensionName[] = DRI2_NAME; -static XExtensionInfo *dri2Info; +static XExtensionInfo _dri2Info_data; +static XExtensionInfo *dri2Info = _dri2Info_data; static XEXT_GENERATE_CLOSE_DISPLAY (DRI2CloseDisplay, dri2Info) static Bool -- 2.1.3 ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [PATCH 3/3] glx/dri3: Request non-vsynced Present for swapinterval zero.
On 11/01/15 08:31, Mathias Fröhlich wrote: Hi, On Sunday, January 04, 2015 20:53:59 Emil Velikov wrote: Adding Mathias and Frank Binns to the Cc list. So taking into account the discussion so far, including Mathias's input that the official nvidia driver does the same/similar form of cheating: - Should we revert on master until a decision(alternative solution) is available ? - Curious if we can have some form of consensus on what the next steps would be. I have not followed this to the final detail, but I had the impression that Mario had put together a way to solve the IMO valid need of his (and probably others) applications as well as the need for the cheat/optimization which can even be an other type of applications need. What is holding back his suggestion? Unless I've misunderstood Keith, he was leaning towards that this is area in the spec that is unspecified/incomplete and doing this is a hack. While I see Mario's points of - (a) users expecting such behaviour and (b) matching what our dri2 code does, I was secretly hoping that we'll get the agreement from everyone. If you're have some extra time, patch 5/5 could use love from someone with knowledge in the area :-) Thanks Emil ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [Bug 88467] nir.c:140: error: ‘nir_src’ has no member named ‘ssa’
https://bugs.freedesktop.org/show_bug.cgi?id=88467 --- Comment #18 from Emil Velikov emil.l.veli...@gmail.com --- (In reply to Jason Ekstrand from comment #13) (In reply to Emil Velikov from comment #12) Jason, MSVC 2013 supports designated initialisers yet the VMWare guys cannot migrate to it yet iirc. It does... sort-of. Unfortunately, the fact that they don't work with unions is a well-documented bug in MSVC 2013. /me was thinking that he tried such a scenario, but most likely he was confused. (In reply to Connor Abbott from comment #14) I definitely don't want to remove the anonymous union from nir_src. We use it all over the place, Indeed. There is also nir_dest and nir_const_value. So that suggestion goes down in flames. and it really helps with readability and writeability. Without it, we would have to say src[n].src.src.ssa or src[n].src.src.reg for ALU sources, which just seems silly. There are a handful of other silly things around :) Thanks for the help/input guys. -- You are receiving this mail because: You are the QA Contact for the bug. ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
