Re: [meta-xilinx] ZCU104 U-boot SPL bootflow / PL programming
Hi Luca, I removed the boot medium and performed the PL programming from the PCs USB, and the LEDs I added light up successfully, so the design seems correct. -Samuel From: Luca Ceresoli Sent: Wednesday, March 6, 2019 1:04 AM To: Samuel Berezhinskiy; meta-xilinx@yoctoproject.org Subject: Re: [meta-xilinx] ZCU104 U-boot SPL bootflow / PL programming Hi Samuel, On 06/03/19 05:45, Samuel Berezhinskiy wrote: > I have checked to make sure the pm_cfg_obj.c is the one generated from > my project, as well as the psu_init_gp.c. I have booted into Linux but > fail any read/writes into the fabric. When performing the fpga loading > from U-boot I am passing in the .bit file using “fpga loadb 0 > ” and I get a readout that confirms the loading of the bitstream. I don't know whether that command does any check to say it has been written correctly, but if it does this means your PL is powered up. > I also added some LED output to my fabric design to see if it comes up > after programming, Good idea. > and the LEDs fail to light up… Which leads me to > question what is responsible for powering up the PL island? I don't remember having ever written a single line of code to power it up. I guess it's done by the psu_init code... Try to validate your FPGA design by sending it directly from Vivado to the board via USB. No U-Boot, no Linux, no software at all. Does the LED light up that way? -- Luca -- ___ meta-xilinx mailing list meta-xilinx@yoctoproject.org https://lists.yoctoproject.org/listinfo/meta-xilinx
Re: [meta-xilinx] ZCU104 U-boot SPL bootflow / PL programming
Hi Samuel, On 06/03/19 05:45, Samuel Berezhinskiy wrote: > I have checked to make sure the pm_cfg_obj.c is the one generated from > my project, as well as the psu_init_gp.c. I have booted into Linux but > fail any read/writes into the fabric. When performing the fpga loading > from U-boot I am passing in the .bit file using “fpga loadb 0 > ” and I get a readout that confirms the loading of the bitstream. I don't know whether that command does any check to say it has been written correctly, but if it does this means your PL is powered up. > I also added some LED output to my fabric design to see if it comes up > after programming, Good idea. > and the LEDs fail to light up… Which leads me to > question what is responsible for powering up the PL island? I don't remember having ever written a single line of code to power it up. I guess it's done by the psu_init code... Try to validate your FPGA design by sending it directly from Vivado to the board via USB. No U-Boot, no Linux, no software at all. Does the LED light up that way? -- Luca -- ___ meta-xilinx mailing list meta-xilinx@yoctoproject.org https://lists.yoctoproject.org/listinfo/meta-xilinx
Re: [meta-xilinx] ZCU104 U-boot SPL bootflow / PL programming
I have checked to make sure the pm_cfg_obj.c is the one generated from my project, as well as the psu_init_gp.c. I have booted into Linux but fail any read/writes into the fabric. When performing the fpga loading from U-boot I am passing in the .bit file using “fpga loadb 0 ” and I get a readout that confirms the loading of the bitstream. I also added some LED output to my fabric design to see if it comes up after programming, and the LEDs fail to light up… Which leads me to question what is responsible for powering up the PL island? -Samuel From: Luca Ceresoli Sent: Tuesday, March 5, 2019 12:54 AM To: Samuel Berezhinskiy; meta-xilinx@yoctoproject.org Subject: Re: [meta-xilinx] ZCU104 U-boot SPL bootflow / PL programming Hi Samuel, On 04/03/19 21:37, Samuel Berezhinskiy wrote: > Hi, > > > > I’ve brought up the board in the sense that I can boot the SPL and make > it into U-Boot as well as being able to come up in Linux. But I seem to > have hit a major wall. After programming the FPGA from U-boot using the > typical command of “fpga loadb 0 ” I’m unable to access > any of the AXI devices within the PL from U-boot or Linux, I seem to > just lock up the device, as if the PL is still either powered down or > Isolation is still enabled. Here are a few more checks that might be helpful. Did you rebuild your pmufw and U-Boot SPL with the pm_cfg_obj.c and psu_init_gpl.c specific for your FPGA design? Try disabling every PL peripheral in your device tree so Linux boots without hanging, then use devmem2 to access a register in your PL devices. Can you read/write registers? Also, are you pairing the right bitstream format with the right U-Boot command? 'fpga load' wants a .bin converted by [0] while (I think) 'fpga loadb' wants the bitstream file produced by Vivado. [0] https://github.com/topic-embedded-products/meta-topic/blob/master/recipes-bsp/fpga/fpga-bit-to-bin/fpga-bit-to-bin.py -- Luca -- ___ meta-xilinx mailing list meta-xilinx@yoctoproject.org https://lists.yoctoproject.org/listinfo/meta-xilinx
Re: [meta-xilinx] ZCU104 U-boot SPL bootflow / PL programming
Hi Samuel, On 04/03/19 21:37, Samuel Berezhinskiy wrote: > Hi, > > > > I’ve brought up the board in the sense that I can boot the SPL and make > it into U-Boot as well as being able to come up in Linux. But I seem to > have hit a major wall. After programming the FPGA from U-boot using the > typical command of “fpga loadb 0 ” I’m unable to access > any of the AXI devices within the PL from U-boot or Linux, I seem to > just lock up the device, as if the PL is still either powered down or > Isolation is still enabled. Here are a few more checks that might be helpful. Did you rebuild your pmufw and U-Boot SPL with the pm_cfg_obj.c and psu_init_gpl.c specific for your FPGA design? Try disabling every PL peripheral in your device tree so Linux boots without hanging, then use devmem2 to access a register in your PL devices. Can you read/write registers? Also, are you pairing the right bitstream format with the right U-Boot command? 'fpga load' wants a .bin converted by [0] while (I think) 'fpga loadb' wants the bitstream file produced by Vivado. [0] https://github.com/topic-embedded-products/meta-topic/blob/master/recipes-bsp/fpga/fpga-bit-to-bin/fpga-bit-to-bin.py -- Luca -- ___ meta-xilinx mailing list meta-xilinx@yoctoproject.org https://lists.yoctoproject.org/listinfo/meta-xilinx
Re: [meta-xilinx] ZCU104 U-boot SPL bootflow / PL programming
Hi Sam, On Mon, Mar 4, 2019 at 12:38 PM Samuel Berezhinskiy wrote: > > Hi, > > > > I’ve brought up the board in the sense that I can boot the SPL and make it > into U-Boot as well as being able to come up in Linux. But I seem to have hit > a major wall. After programming the FPGA from U-boot using the typical > command of “fpga loadb 0 ” I’m unable to access any of the > AXI devices within the PL from U-boot or Linux, I seem to just lock up the > device, as if the PL is still either powered down or Isolation is still > enabled. > > > > Has anyone successfully brought up the PL from U-boot and powered up the PL > and disabled the Isolation? Are your clocks on? Cheers, Moritz -- ___ meta-xilinx mailing list meta-xilinx@yoctoproject.org https://lists.yoctoproject.org/listinfo/meta-xilinx
