Re: [Openocd-development] Adding new target
Hi Rodrigo, On 2/3/11, Rodrigo Rosa rodrigorosa...@gmail.com wrote: Great, I got that working. I haven't been able to figure out what the following parameters of a tap are: irlen, ircapture and irmask. What does ir stand for? I suggest you take a look (a reading I mean) in original OpenOCD author's thesis: http://openocd.berlios.de/web/?page_id=6 It is important to you know about JTAG tech, it helps a lot. Best Regards, Alan ___ Openocd-development mailing list Openocd-development@lists.berlios.de https://lists.berlios.de/mailman/listinfo/openocd-development
Re: [Openocd-development] Role of OpenOCD in debugging
On 10/13/10, Laurent Gauch laurent.ga...@amontec.com wrote: cut In stand-alone OpenOCD can be used for Flash programming too, by simple script or a sequence of commands passing as -c command arguments when launching OpenOCD. or executing commands to flash programming over telnet terminal. We have many alternatives to GDB ;-) Best Regards, Alan ___ Openocd-development mailing list Openocd-development@lists.berlios.de https://lists.berlios.de/mailman/listinfo/openocd-development
Re: [Openocd-development] Status of Cortex-A8 Support?
Hi Zach, On 9/17/10, Zach Welch zwe...@codesourcery.com wrote: Hi all, I have recently started working for CodeSourcery, and I am being assigned to Linaro in order to work on OpenOCD. In this later capacity, I soon hope to develop some substantial improvements. We intend for my changes to find their way upstream without undue delay, so the community can enjoy the fruits of this labor. Presently, I would like to hear about the perceived status of Cortex-A8, as one of my initial goals will be to validate that support. If you are using OpenOCD on a Cortex-A8 platform, what problems do you face? What features still need work? And contributors of this support: are there any horrible blemishes remaining in this code? If you want to remain an anonymous lurker, feel free to send your observations to me directly. Any and all input will be considered in my forthcoming plan of action, though I cannot promise that anything in particular can get addressed. Thanks in advance for your time and consideration on these matters. I tested OpenOCD on i.MX51 few months ago, but I didn't get success on this. Unfortunately I couldn't invest much time to get it working because our time to market. At that time David give me a very good support, then I think he could update you about Cortex-A8 status. Best Regards, Alan ___ Openocd-development mailing list Openocd-development@lists.berlios.de https://lists.berlios.de/mailman/listinfo/openocd-development
Re: [Openocd-development] Find a bug when using software breakpoints on a big-endian ARM926ej-s processor(with a fix)
Hi Ryan, On 5/9/10, Ryan J M sync@gmail.com wrote: On Sun, May 9, 2010 at 11:41 PM, Ryan J M sync@gmail.com wrote: I found that after running 'continue' in gdb with software breakpoints, when it hit a breakpoint, it didn't write back the original instruction. . and, my openocd was compiled from the git HEAD version... Please, use the diff command to create a patch and submit it here. Best Regards, Alan ___ Openocd-development mailing list Openocd-development@lists.berlios.de https://lists.berlios.de/mailman/listinfo/openocd-development
Re: [Openocd-development] OpenOCD on MX51
Hi Dave, On 1/23/10, David Brownell davi...@pacbell.net wrote: On Monday 18 January 2010, Alan Carvalho de Assis wrote: When I type halt the prompt get blocked and about 1 minute after I receive this error: halt AHBAP Cached values: dp_select 0x10, ap_csw 0xa202, ap_tar 0x54011080 JTAG-DP OVERRUN - check clock or reduce jtag speed Read MEM_AP_CSW 0x8042, MEM_AP_TAR 0x54011080 I already reduced the jtag speed to 500khz and this error remain. What could I investigate now to fix this error? Unfortunately I think you're starting to hit some of the ways that the DAP code is ... a bit flakey. Especially with respect to how it handles errors reported by the DP or AP; it triggers faults a bit more often (and randomly) than I would expect, and the cleanup -- and mode selection -- looks a bit iffy to me. I attach a couple patches which I've been using, which might change things (or might not). If they help, good. - adi-shrink.patch ... code shrinkage and fault path fixes - adi-write.patch ... goes over that, basically just cleanup If not, then there's something else you could build on top of these. Basically, after adi-shrink.patch there is ONE REVISIT comment about putting the memaccess_tck cycles in the proper place. Fix that issue -- just put those cycles at the end of adi_jtag_dp_scan() not the beginning, after the jtag_add_dr_scan(). (Before that patch, that was done wrong in *two* places.) It doesn't work. Even I putting the memaccess_tck cycles after adi_jtag_dp_scan() I still getting the same error: $ telnet 127.0.0.1 Trying 127.0.0.1... Connected to 127.0.0.1. Escape character is '^]'. Open On-Chip Debugger reset JTAG tap: imx51.DAP tap/device found: 0x1ba00477 (mfg: 0x23b, part: 0xba00, ver: 0x1) TAP imx51.SDMA does not have IDCODE JTAG tap: imx51.SJC tap/device found: 0x1190c01d (mfg: 0x00e, part: 0x190c, ver: 0x1) imx51.cpu: how to reset? Command handler execution failed in procedure 'reset' called at file command.c, line 647 called at file command.c, line 361 halt AHBAP Cached values: dp_select 0x10, ap_csw 0xa202, ap_tar 0x54011080 JTAG-DP OVERRUN - check clock or reduce jtag speed Read MEM_AP_CSW 0x8042, MEM_AP_TAR 0x54011080 The OVERRUN error comes from throwing data at the MEM-AP faster than it can handle it. MEM-AP speed is a system specific issue. Exactly the sort of thing MX51 could very reasonably do differently from the other Cortex parts which now mostly work. (I'm not quite clear on how much of that is driven by the JTAG clock vs by whatever core clock your chip may be using.) There are two issues I'd wonder about: * First, whether the code is correct ... ergo the attached patches and that REVISIT comment. * Second, whether you need a different memaccess_tck value. The ADIv5 spec will be useful to sort out such issues. I tested memaccess_tck with small values as 8, 80, 100 and big values as 10. In all tests it returns same error message above. I just noticied it delay a little more time to show this error msg when I use 10. Best Regards, Alan ___ Openocd-development mailing list Openocd-development@lists.berlios.de https://lists.berlios.de/mailman/listinfo/openocd-development
Re: [Openocd-development] Freescale iMX35 Target not examined yet
Hi Alexei On 1/20/10, Øyvind Harboe oyvind.har...@zylin.com wrote: When I try to invoke target_read_u32(), I get a message in the log: Error: 131 6 target.c: 1477 target_read_u32(): Target not examined yet Can anyone suggest how to try to get rid of the error? Normally a reset init would fix that... Also you need to configure the dip switch to internal ROM (aka ATK mode), this is the mode normally I got success with OpenOCD and i.MX processors. Best Regards, Alan ___ Openocd-development mailing list Openocd-development@lists.berlios.de https://lists.berlios.de/mailman/listinfo/openocd-development
Re: [Openocd-development] OpenOCD on MX51
Hi David, On 1/18/10, David Brownell davi...@pacbell.net wrote: On Sunday 17 January 2010, Alan Carvalho de Assis wrote: Now I need to find a way to place the processor on halt mode. I tried many commands, including imx51.cpu arp_halt with no success. Use plain old halt. arp_halt looks to be unused. Certainly it's not documented as anything more than internal magic. When I type halt the prompt get blocked and about 1 minute after I receive this error: halt AHBAP Cached values: dp_select 0x10, ap_csw 0xa202, ap_tar 0x54011080 JTAG-DP OVERRUN - check clock or reduce jtag speed Read MEM_AP_CSW 0x8042, MEM_AP_TAR 0x54011080 I already reduced the jtag speed to 500khz and this error remain. What could I investigate now to fix this error? Best Regards, Alan ___ Openocd-development mailing list Openocd-development@lists.berlios.de https://lists.berlios.de/mailman/listinfo/openocd-development
Re: [Openocd-development] OpenOCD on MX51
Hi Fabio,
On 1/15/10, Fabio Estevam fabioeste...@yahoo.com wrote:
Hi,
Has anyone used OpenOCD on a Freescale MX51 processor so far?
I'm trying to get it working.
OpenOCD detects all TAPs, but I receive a Timeout:
Warn : imx51.SDMA: nonstandard IR value
RCLK - adaptive
Info : device: 4 2232C
Info : deviceID: 67353760
Info : SerialNumber: 0100480 A
Info : Description: Signalyzer A
Info : RCLK (adaptive clock speed) not supported - fallback to 1000 kHz
Info : JTAG tap: imx51.DAP tap/device found: 0x1ba00477 (mfg: 0x23b,
part: 0xba00, ver: 0x1)
Info : TAP imx51.SDMA does not have IDCODE
Info : JTAG tap: imx51.SJC tap/device found: 0x0190c01d (mfg: 0x00e,
part: 0x190c, ver: 0x0)
Warn : failed to disable tap
Warn : Timeout (1000ms) waiting for ACK=OK/FAULT (got ACK=0x1) in
JTAG-DP transaction
Warn : Timeout (1000ms) waiting for ACK=OK/FAULT (got ACK=0x1) in
JTAG-DP transaction
Warn : Timeout (1000ms) waiting for ACK=OK/FAULT (got ACK=0x1) in
JTAG-DP transaction
Warn : Timeout (1000ms) waiting for ACK=OK/FAULT (got ACK=0x1) in
JTAG-DP transaction
This is imx51.cfg for your reference:
#--
# Freescale i.MX51
if { [info exists CHIPNAME] } {
set _CHIPNAME $CHIPNAME
} else {
set _CHIPNAME imx51
}
# CoreSight Debug Access Port
if { [info exists DAP_TAPID ] } {
set _DAP_TAPID $DAP_TAPID
} else {
set _DAP_TAPID 0x1ba00477
}
jtag newtap $_CHIPNAME DAP -irlen 4 -ircapture 0x1 -irmask 0xf \
-expected-id $_DAP_TAPID
# SDMA / no IDCODE
jtag newtap $_CHIPNAME SDMA -irlen 4 -ircapture 0x0 -irmask 0xf
# SJC
if { [info exists SJC_TAPID ] } {
set _SJC_TAPID SJC_TAPID
} else {
set _SJC_TAPID 0x0190c01d
}
jtag newtap $_CHIPNAME SJC -irlen 5 -ircapture 0x1 -irmask 0x1f \
-expected-id $_SJC_TAPID
# GDB target: Cortex-A8, using DAP
set _TARGETNAME $_CHIPNAME.cpu
target create $_TARGETNAME cortex_a8 -chain-position $_CHIPNAME.DAP
# some TCK tycles are required to activate the DEBUG power domain
jtag configure $_CHIPNAME.SJC -event post-reset runtest 100
# have the DAP always be active
jtag configure $_CHIPNAME.SJC -event setup jtag tapenable $_CHIPNAME.DAP
proc imx51_dbginit {target} {
# General Cortex A8 debug initialisation
cortex_a8 dbginit
}
# Slow speed to be sure it will work
jtag_rclk 1000
$_TARGETNAME configure -event reset-start { jtag_rclk 1000 }
$_TARGETNAME configure -event reset-assert-post imx51_dbginit $_TARGETNAME
#--
If you want I can send a more complete debug log.
Thanks Rogerio for help me with IDCODEs.
Best Regards,
Alan
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Re: [Openocd-development] New object-orientated C++ architecture for OpenOCD?
Hi Pieter, On 12/9/09, Pieter Conradie pieter.conra...@psitek.com wrote: Hi everyone, Flamewar protection on I just glance at the mailing list chatter, so please excuse if my suggestion/comment is completely off the wall/misinformed/completely wrong and please ignore it if that's the case. I get the impression that you (the developers) are butting your head against the limitations of C. Why don't you finish development to get a stable C version of OpenOCD working and then design an object-orientated C++ architecture with all of the experience and insights that you have gained so far? I'm thinking that the abstraction and encapsulation will do a lot to clean up the code and make the architecture flexible/expandable. Also, it would be nice if you switched to a human readable scripting language, i.e. Lua :) /Flamewar protection on hum, here your flamewar protection is off (just joking) ;-) Please search on mailing list archive, people already lost too much time discussion about it. If we need an OO language, then I want to suggest .Net C# (joking again) Best Regards, Alan ___ Openocd-development mailing list Openocd-development@lists.berlios.de https://lists.berlios.de/mailman/listinfo/openocd-development
Re: [Openocd-development] Anyone using JTAGkey as I2C/SPI monitor in Linux?
Hi Brian, On 9/28/09, Brian Hutchinson b.hutch...@gmail.com wrote: Hi, Amontec's site says the JTAGkey can do this but to contact them for details. Anyone using this device for I2C/SPI monitoring and have the details on how to do this in Linux? I don't know how to do that. But maybe it could be useful for you: http://www.paintyourdragon.com/uc/i2c/ You can use your video monitor to interface directly with I2C devices. Best Regards, Alan ___ Openocd-development mailing list Openocd-development@lists.berlios.de https://lists.berlios.de/mailman/listinfo/openocd-development
Re: [Openocd-development] Debugging from NAND Flash
Hi Oyvind, On 9/1/09, Øyvind Harboe oyvind.har...@zylin.com wrote: Fixed in head of GDB? http://www.nabble.com/Patch-for-the-gdb-problem-%C2%ABValue-being-assigned--to-is-no-longer-active%C2%BB-td23615004.html Thank you very much! Is there any other way to setup the PC to right position? I've always used a monitor reg pc xxx command, even with other hardware debuggers. Never trusted GDB to do this :-) Still not working: (gdb) target remote : Remote debugging using : 0xd800 in ?? () (gdb) monitor reg pc 0xd850 pc (/32): 0xD850 (gdb) si 0xd800 in ?? () Infinite loop detected (gdb) (gdb) monitor reg pc 0xd850 pc (/32): 0xD850 (gdb) info reg r0 0x7453646a 1951622250 r1 0x4b4c4c3e 1263291454 r2 0x56905a50 1452300880 r3 0x3662b5f2 912438770 r4 0x68002683 1744840323 r5 0x61120b0101785776 r6 0x951222d1 2500993745 r7 0x36ad8be1 917343201 r8 0x20af44b6 548357302 r9 0x200312d2 537072338 r100x8802280142615168 r110x20 2097152 r120x10236036 270753846 sp 0x6436a1eb 0x6436a1eb lr 0x82a3e65e 2191779422 pc 0xd800 0xd800 fps0x0 0 cpsr 0xd3 211 (gdb) Is this a BUG on OpenOCD? Best Regards, Alan ___ Openocd-development mailing list Openocd-development@lists.berlios.de https://lists.berlios.de/mailman/listinfo/openocd-development
Re: [Openocd-development] Debugging from NAND Flash
Hi, I found half of issue, I was configuring the board to boot from 16 bit NAND flash, but it is a 8 bit one. Now I can see the internal buffer memory and it is exactly equal to my binary. This is the disassembled u-boot-nand.bin: u-boot-nand.bin: file format binary Disassembly of section .data: .data: 0: eafeb 0x0 4: e59ff014ldr pc, [pc, #20] ; 0x20 8: e59ff010ldr pc, [pc, #16] ; 0x20 c: e59ff00cldr pc, [pc, #12] ; 0x20 10: e59ff008ldr pc, [pc, #8]; 0x20 14: e59ff004ldr pc, [pc, #4]; 0x20 18: e59ff000ldr pc, [pc, #0]; 0x20 1c: e51ff004ldr pc, [pc, #-4] ; 0x20 20: a7ec0100strgeb r0, [ip, r0, lsl #2]! 24: 12345678eornes r5, r4, #125829120 ; 0x780 28: 12345678eornes r5, r4, #125829120 ; 0x780 2c: 12345678eornes r5, r4, #125829120 ; 0x780 30: 12345678eornes r5, r4, #125829120 ; 0x780 34: 12345678eornes r5, r4, #125829120 ; 0x780 38: 12345678eornes r5, r4, #125829120 ; 0x780 3c: 12345678eornes r5, r4, #125829120 ; 0x780 40: a7ecstrgeb r0, [ip, r0]! 44: a7ecstrgeb r0, [ip, r0]! 48: a7ec0800strgeb r0, [ip, r0, lsl #16]! 4c: a7ec0804strgeb r0, [ip, r4, lsl #16]! 50: e10fmrs r0, CPSR 54: e3c0001fbic r0, r0, #31 ; 0x1f 58: e38000d3orr r0, r0, #211; 0xd3 5c: e129f000msr CPSR_fc, r0 60: eb15bl 0xbc This is the gdb output: $ arm-elf-gdb GNU gdb 6.6 Copyright (C) 2006 Free Software Foundation, Inc. GDB is free software, covered by the GNU General Public License, and you are welcome to change it and/or distribute copies of it under certain conditions. Type show copying to see the conditions. There is absolutely no warranty for GDB. Type show warranty for details. This GDB was configured as --host=i686-pc-linux-gnu --target=arm-linux. (gdb) target remote : Remote debugging using : 0xd800 in ?? () (gdb) x 0xd800 0xd800: 0xeafe (gdb) 0xd804: 0xe59ff014 (gdb) 0xd808: 0xe59ff010 (gdb) 0xd80c: 0xe59ff00c (gdb) 0xd810: 0xe59ff008 (gdb) 0xd814: 0xe59ff004 (gdb) 0xd818: 0xe59ff000 (gdb) 0xd81c: 0xe51ff004 (gdb) 0xd820: 0xa7ec0100 (gdb) 0xd824: 0x12345678 (gdb) 0xd828: 0x12345678 (gdb) 0xd82c: 0x12345678 (gdb) 0xd830: 0x12345678 (gdb) 0xd834: 0x12345678 (gdb) 0xd838: 0x12345678 (gdb) 0xd83c: 0x12345678 (gdb) 0xd840: 0xa7ec (gdb) 0xd844: 0xa7ec (gdb) 0xd848: 0xa7ec0800 (gdb) 0xd84c: 0xa7ec0804 (gdb) 0xd850: 0xe10f (gdb) 0xd854: 0xe3c0001f (gdb) 0xd858: 0xe38000d3 (gdb) 0xd85c: 0xe129f000 (gdb) 0xd860: 0xeb15 Unfortunately I can't change the PC: (gdb) set $pc=0xd850 Value being assigned to is no longer active. (gdb) c Continuing. ^C Program received signal SIGINT, Interrupt. 0xd800 in ?? () (gdb) si 0xd800 in ?? () Infinite loop detected Is there any other way to setup the PC to right position? Best Regards, Alan ___ Openocd-development mailing list Openocd-development@lists.berlios.de https://lists.berlios.de/mailman/listinfo/openocd-development
Re: [Openocd-development] openocd-0.2.0 @linux freescale imx31
Hi Alexei, On 8/11/09, Alexei Babich a.bab...@rez.ru wrote: Hello all. I'm trying to use openocd-0.2.0 for debugging the microcontroller imx31 via parport. I use the unmodified imx31.cfg and parport.cfg of openocd. I have a few questions: 1. In imx31.cfg mentions imx31.whatchacallit. The documentation for imx31 I read that in the chain may be three TAP: cpu-tap, sdma-tap and sjc-tap. What does it mean to imx31.whatchacallit in this case? Please search on mainling list about it. There is an old discussion about these topics. The whatchacallit means we don't know it name ;-) 2. In imx31.cfg mentioned SJC TAPID == 0x2b900f0f. Please tell where in the documentation for imx31, which contains this TAPID? I think you will not found this kind of info in the docs. 3. When I run openocd, I get an error in the log: --- nfo : JTAG tap: imx31.sjc tap/device found: 0x2b900f0f (mfg: 0x787, part: 0xb900, ver: 0x2) Info : JTAG Tap/device matched Info : JTAG tap: imx31.cpu tap/device found: 0x07b3601d (mfg: 0x00e, part: 0x7b36, ver: 0x0) Info : JTAG Tap/device matched Warn : Tap/Device does not have IDCODE Info : JTAG Tap/device matched Info : JTAG tap: imx31.smda tap/device found: 0x2190101d (mfg: 0x00e, part: 0x1901, ver: 0x2) Info : JTAG Tap/device matched Error: Could not validate JTAG scan chain, IR mismatch, scan returned 0x0C2011. tap=imx31.whatchacallit pos=9 expected 0x1 got 0 Warn : Could not validate JTAG chain, continuing anyway... Info : found ARM1136 --- What does it mean Could not validate JTAG scan chain, IR mismatch, scan returned 0x0C2011. tap=imx31.whatchacallit pos=9 expected 0x1 got 0 ? This means your chip returned an invalid value and couldn't be validated. Try to use some FTDI based JTAG. Regards, Alan ___ Openocd-development mailing list Openocd-development@lists.berlios.de https://lists.berlios.de/mailman/listinfo/openocd-development
Re: [Openocd-development] Version 3 test patch for jlink.c
Hi Xiaofan, On 7/13/09, Xiaofan Chen xiaof...@gmail.com wrote: On Tue, Jul 14, 2009 at 6:39 AM, Alan Carvalho de Assisacas...@gmail.com wrote: Then I think this issue just happen when using OpenOCD + JLink + i.MX27ADS board. I am not so sure if your problem have something to do with this thread and maybe you want to try that fix as well. https://lists.berlios.de/pipermail/openocd-development/2009-July/009473.html From the mailing list, i.MX27 target in OpenOCD still has quite some issues. https://lists.berlios.de/pipermail/openocd-development/2009-July/thread.html Commenting out those lines in jlink_reset didn't solve the issue. Any other suggestion will be appreciated. Regards, Alan ___ Openocd-development mailing list Openocd-development@lists.berlios.de https://lists.berlios.de/mailman/listinfo/openocd-development
Re: [Openocd-development] Version 3 test patch for jlink.c
Hi Gary, On 7/13/09, Gary Carlson gcarl...@carlson-minot.com wrote: I think your board is being held in reset by something other then the J-link dongle. If the board is in reset and the jlink device can't free it, your will get the problem you described. You can prove that by taking your working board and holding the reset button down while you start the openocd. It will break 100% of the time too. Have you looked at your board reset signals on a scope? I think there is not issue with reset signal because the board can to start its bootloader correctly when there is not JTAG attached. Anyway I will investigate the reset signals. Thank you very much, Regards, Alan ___ Openocd-development mailing list Openocd-development@lists.berlios.de https://lists.berlios.de/mailman/listinfo/openocd-development
Re: [Openocd-development] Version 3 test patch for jlink.c
Hello Gary, On 7/13/09, Gary Carlson gcarl...@carlson-minot.com wrote: On 7/13/09 3:06 PM, Alan Carvalho de Assis acas...@gmail.com wrote: Hi Gary, On 7/10/09, Gary Carlson gcarl...@carlson-minot.com wrote: Try the V4 patch. Same behavior: # openocd -f interface/jlink.cfg -f board/imx27ads.cfg Open On-Chip Debugger 0.2.0-in-development (2009-07-13-18:53) svn:2513 $URL: http://svn.berlios.de/svnroot/repos/openocd/trunk/src/openocd.c $ For bug reports, read http://svn.berlios.de/svnroot/repos/openocd/trunk/BUGS dcc downloads are enabled Info : J-Link initialization started / target CPU reset initiated Info : J-Link ARM V6 compiled Jan 13 2009 15:40:53 Info : JLink caps 0x19ff7bbf Info : JLink hw version 6 Info : JLink max mem block 8968 Info : Vref = 2.653 TCK = 1 TDI = 0 TDO = 1 TMS = 0 SRST = 0 TRST = 0 Info : J-Link JTAG Interface ready Error: jlink_usb_message failed with result=1) Error: jlink_tap_execute, wrong result -107 (expected 1) Error: jlink_usb_message failed with result=1) Error: jlink_tap_execute, wrong result -107 (expected 1) Error: jlink_usb_message failed with result=1) Error: jlink_tap_execute, wrong result -107 (expected 1) Error: jlink_usb_message failed with result=1) Error: jlink_tap_execute, wrong result -107 (expected 1) Error: jlink_usb_message failed with result=1) Error: jlink_tap_execute, wrong result -107 (expected 1) I am testing using i.MX27ADS Rev 3.0. I think this board never worked with JLink, but works fine with FTDI based JTAG interfaces. Regards, Alan OK that helps. Here are some additional questions: What is the host-operating system you are using (Windows, Mac OS X, Linux, etc)? I am running Linux Ubuntu 9.04, gcc 4.3.3, etc :-) Does this error show up 100% of the time at startup or is it intermittent? It happen 100% of my attempts :-( If you have another type of target, does it work with the same J-Link dongle or does it do the same thing? Using this same JLink interface on Olimex LPC-2378-STK: # openocd -f interface/jlink.cfg -f target/lpc2378.cfg Open On-Chip Debugger 0.2.0-in-development (2009-07-13-18:53) svn:2513 $URL: http://svn.berlios.de/svnroot/repos/openocd/trunk/src/openocd.c $ For bug reports, read http://svn.berlios.de/svnroot/repos/openocd/trunk/BUGS jtag_nsrst_delay: 200 jtag_ntrst_delay: 200 500 kHz Info : J-Link initialization started / target CPU reset initiated Info : J-Link ARM V6 compiled Jan 13 2009 15:40:53 Info : JLink caps 0x19ff7bbf Info : JLink hw version 6 Info : JLink max mem block 8968 Info : Vref = 3.261 TCK = 1 TDI = 0 TDO = 1 TMS = 0 SRST = 0 TRST = 0 Info : J-Link JTAG Interface ready Info : JTAG tap: lpc2378.cpu tap/device found: 0x4f1f0f0f (mfg: 0x787, part: 0xf1f0, ver: 0x4) Info : JTAG Tap/device matched Warn : EmbeddedICE version 7 detected, EmbeddedICE handling might be broken Then I think this issue just happen when using OpenOCD + JLink + i.MX27ADS board. Is there someone else with jlink interface and i.MX27ADS board to test openocd? Best Regards, Alan ___ Openocd-development mailing list Openocd-development@lists.berlios.de https://lists.berlios.de/mailman/listinfo/openocd-development
Re: [Openocd-development] Version 3 test patch for jlink.c
Hi, On 7/9/09, Xiaofan Chen xiaof...@gmail.com wrote: It would be nice to have a unified patch. But it seems a bit difficult here. Maybe we can accept this as a temporary fix while investigating a better fix. Jlink still failing to me (i.MX27ADS and Ubuntu 9.04): $ sudo openocd -f interface/jlink.cfg -f board/imx27ads.cfg Open On-Chip Debugger 0.2.0-in-development (2009-07-09-12:40) svn:2503 $URL: http://svn.berlios.de/svnroot/repos/openocd/trunk/src/openocd.c $ For bug reports, read http://svn.berlios.de/svnroot/repos/openocd/trunk/BUGS dcc downloads are enabled Info : J-Link initialization started / target CPU reset initiated Info : J-Link ARM V6 compiled Jan 13 2009 15:40:53 Info : JLink caps 0x19ff7bbf Info : JLink hw version 6 Info : JLink max mem block 8968 Info : Vref = 2.653 TCK = 1 TDI = 0 TDO = 1 TMS = 0 SRST = 0 TRST = 0 Info : J-Link JTAG Interface ready Error: jlink_usb_message failed with result=1) Error: jlink_tap_execute, wrong result -107 (expected 1) Error: jlink_usb_message failed with result=1) Error: jlink_tap_execute, wrong result -107 (expected 1) Error: jlink_usb_message failed with result=1) Error: jlink_tap_execute, wrong result -107 (expected 1) Error: jlink_usb_message failed with result=1) Error: jlink_tap_execute, wrong result -107 (expected 1) Error: jlink_usb_message failed with result=1) Error: jlink_tap_execute, wrong result -107 (expected 1) Any idea? Regards, Alan ___ Openocd-development mailing list Openocd-development@lists.berlios.de https://lists.berlios.de/mailman/listinfo/openocd-development
Re: [Openocd-development] arm926ejs i.MX27 testers out there
Hi Øyvind, On 7/6/09, Øyvind Harboe oyvind.har...@zylin.com wrote: Are there any arm926ejs and/or i.MX27 testers out there? I can do some tests as well! Cheers, Alan ___ Openocd-development mailing list Openocd-development@lists.berlios.de https://lists.berlios.de/mailman/listinfo/openocd-development
Re: [Openocd-development] support avr32
Hi Duane, On 5/28/09, Duane Ellis open...@duaneellis.com wrote: sic Imagine (1) being able to plug OpenOCD/JTAG into the board. (2) using some gerber view program - view the PCB (3) Double click on a pin, or a trace with a mouse (4) The trace starts blinking (5) And openocd makes the trace toggle 0/1 That alone would be a powerful debug tool, no debug software to write, no flash to program, no nothing. OpenOCD needs this feature! I think OpenOCD will need a script to convert the BSDL to some XML or to a simple standard file (even C source code), then openocd can map it to JTAG chain. Finally libopenocd will let other software to control each pin individually. It makes simple to CAD software (i.e. KiCAD) to do what you suggested. Also it will make easy to someone create a simple graphical python interface with all pins from a BGA chip, then you just click on a ball (a pin) to change its status. Regards, Alan ___ Openocd-development mailing list Openocd-development@lists.berlios.de https://lists.berlios.de/mailman/listinfo/openocd-development
[Openocd-development] Listing BSDL files
Hi all, Follow below links to some BSDL files: NXP LPC: http://www.standardics.nxp.com/support/models/lpc2000/ Freescale PowerPC: http://www.freescale.com/webapp/sps/site/overview.jsp?code=DRPPCBSDLFLS Freescale i.MX1 (too old): http://www.freescale.com/webapp/sps/site/prod_summary.jsp?code=i.MX1nodeId=0162468rH311432973ZrDRfpsp=1tab=Design_Tools_Tab Did I forget other BSDL links? Show me the link ;-) Regards, Alan ___ Openocd-development mailing list Openocd-development@lists.berlios.de https://lists.berlios.de/mailman/listinfo/openocd-development
Re: [Openocd-development] Listing BSDL files
On 5/29/09, Alan Carvalho de Assis acas...@gmail.com wrote: Hi all, Follow below links to some BSDL files: NXP LPC: http://www.standardics.nxp.com/support/models/lpc2000/ Freescale PowerPC: http://www.freescale.com/webapp/sps/site/overview.jsp?code=DRPPCBSDLFLS Freescale i.MX1 (too old): http://www.freescale.com/webapp/sps/site/prod_summary.jsp?code=i.MX1nodeId=0162468rH311432973ZrDRfpsp=1tab=Design_Tools_Tab Did I forget other BSDL links? Show me the link ;-) Replying myself: In the Corelis web site Duane sent we can find this listing: http://www.corelis.com/support/BSDL.htm Alan ___ Openocd-development mailing list Openocd-development@lists.berlios.de https://lists.berlios.de/mailman/listinfo/openocd-development
Re: [Openocd-development] Listing BSDL files
Hi David, On 5/29/09, David Brownell davi...@pacbell.net wrote: On Friday 29 May 2009, Alan Carvalho de Assis wrote: Did I forget other BSDL links? Show me the link ;-) TI links theirs right off the generic page for each chip. They're like most vendors in that, so far as I can tell; so I'm not sure why you'd want a collection of links... So for example: DaVinci DM355 - http://www.ti.com/litv/zip/sprm262b DaVinci DM6446 (2.1 silicon) - http://www.ti.com/litv/zip/sprm325a (older silicon) - http://www.ti.com/litv/zip/sprm203 OMAP 3530 CBB package - http://www.ti.com/litv/zip/sprm315b (515 ball s-PGBA, POP, 0.4mm pitch) CUS package - http://www.ti.com/litv/zip/sprm314a (515 ball s-PGBA, POP, 0.5mm pitch) CBC package - http://www.ti.com/litv/zip/sprm346 (423 ball s-PGBA, 0.65mm pitch) Thank you! I think those probably all come as ZIPped files. Nothing special, just to make life ease when OpenOCD get support to boundary scan :-) Anyone can search on google and find all BSDLs, but a filtered information has more value than a raw info. I wish openocd to have a wiki page where we could create this listing. Regards, Alan ___ Openocd-development mailing list Openocd-development@lists.berlios.de https://lists.berlios.de/mailman/listinfo/openocd-development
Re: [Openocd-development] support avr32
Hi Duane, On 5/27/09, Duane Ellis open...@duaneellis.com wrote: FYI - most of UrJTAG's support is *BOUNDARY*SCAN* - based external chip flash programing via boundary scan Arggg, then it will not help too much! There is a variant/fork of UrJTAG - (link below) that ADI supports - a private fork ADI maintains - for GDB Remote debug. Thank you for links, Alan ___ Openocd-development mailing list Openocd-development@lists.berlios.de https://lists.berlios.de/mailman/listinfo/openocd-development
Re: [Openocd-development] support avr32
Hi Xiaofan, On 5/27/09, Xiaofan Chen xiaof...@gmail.com wrote: On Thu, May 21, 2009 at 10:22 AM, Tiago Maluta tiago.mal...@gmail.com wrote: I'd like to know if OpenOCD support AVR32 (AP7000) processors? I was looking a tool [1] to write the flash memory of Atmel reference design ATNGW100. It seems to me that UrJtag has some kind of AVR32 support. Maybe it can be ported to OpenOCD. http://sourceforge.net/project/shownotes.php?release_id=676628 I think other processors supported by UrJtag can be ported as well: MPC5200B, Blackfin, BCM6358, etc Regards, Alan ___ Openocd-development mailing list Openocd-development@lists.berlios.de https://lists.berlios.de/mailman/listinfo/openocd-development
Re: [Openocd-development] On Resets
Hi Michael, On 5/25/09, Michael Bruck mbr...@digenius.de wrote: Is there any particular reason why the JTAG layer uses hardware resets (TRST)? I would assume that the most portable way to go to TLR, the one that works even if all reset lines are missing or are not yet or incorrectly configured would be to shift out five HIGH bits which leads to TLR regardless in which state the TAP is. Currently the JTAG layer doesn't even offer this simple function. So I am wondering if the people who conceived the reset machinery were unaware of this TLR mechanism. Unless there are good reasons (for example that we have cases where going to TLR vs. asserting TRST produce differing results) I think the reset lines should not be used from the JTAG layer at all, they should be available to scripts (and possibly targets, but I think even that is bad design for generic CPU drivers). My suggestion would be to expose the resets as a generic GPIO layer that is available to scripts. An initial system reset (if that is available in a system) could be generated via a configuration command. Asserting TRST is from what I understand redundant, I don't see the use in doing all the extra work that is done currently by the JTAG layer to try to use that. Also I strongly suspect that the many recent reports on the list of varying behavior when starting openocd several times in a row may be a result of failed attempts to reset the TAP state via hardware lines. At least we should consider adding the five 1's mechanism to the JTAG initialization to reduce potential for such errors. I agree with you. I found a board (i.MX25PDK rev 1.0) which needs to reset using this approach (letting TMS High during 5 clock pulses). It will be important to use this approach as default or implement it as a fall-back approach. Best Regards, Michael Alan ___ Openocd-development mailing list Openocd-development@lists.berlios.de https://lists.berlios.de/mailman/listinfo/openocd-development
[Openocd-development] OSBDM
Hi, Other alternative to add BDM support on OpenOCD is based it on OSBDM: http://forums.freescale.com/freescale/board/message?board.id=OSBDM08thread.id=422 This version uses a S08, but I think there is newer source code using MCF51JM. Best Regards, Alan ___ Openocd-development mailing list Openocd-development@lists.berlios.de https://lists.berlios.de/mailman/listinfo/openocd-development
Re: [Openocd-development] Amontec JTAGkey issues
On 5/8/09, Alan Carvalho de Assis acas...@gmail.com wrote: Hi list, I am trying to get an Amontec JTAGkey working with OpenOCD on Ubuntu 8.10, but I have no success. I tried too old revision as 516 with no success, I followed this tutorial: http://docs.tinyos.net/index.php/OpenOCD_for_IMote2 I used libftd2xx0.4.16.tar.gz, but tested also 0.4.15 and 0.4.13, the the error is the same: Error: jtag.c:1291 jtag_examine_chain(): JTAG communication failure, check connection, JTAG interface, target power etc. I was thinking JTAGkey had better support than J-Link, but J-Link at least can to detect my board. The Linux host appear to detect the interface correctly (see below), but OpenOCD can't to communicate with it. Any comments or suggestion will be appreciated. I figured out the issue was in the JTAG interface, it is not working. In order to test I used CrossWorks on Windows. Best Regards, Alan Regards, Alan ___ Openocd-development mailing list Openocd-development@lists.berlios.de https://lists.berlios.de/mailman/listinfo/openocd-development
[Openocd-development] Amontec JTAGkey issues
Hi list, I am trying to get an Amontec JTAGkey working with OpenOCD on Ubuntu 8.10, but I have no success. I tried too old revision as 516 with no success, I followed this tutorial: http://docs.tinyos.net/index.php/OpenOCD_for_IMote2 I used libftd2xx0.4.16.tar.gz, but tested also 0.4.15 and 0.4.13, the the error is the same: Error: jtag.c:1291 jtag_examine_chain(): JTAG communication failure, check connection, JTAG interface, target power etc. I was thinking JTAGkey had better support than J-Link, but J-Link at least can to detect my board. The Linux host appear to detect the interface correctly (see below), but OpenOCD can't to communicate with it. Any comments or suggestion will be appreciated. Best Regards, Alan # lsusb -d 0403:cff8 -v Bus 005 Device 002: ID 0403:cff8 Future Technology Devices International, Ltd Device Descriptor: bLength18 bDescriptorType 1 bcdUSB 2.00 bDeviceClass0 (Defined at Interface level) bDeviceSubClass 0 bDeviceProtocol 0 bMaxPacketSize0 8 idVendor 0x0403 Future Technology Devices International, Ltd idProduct 0xcff8 bcdDevice5.00 iManufacturer 1 Amontec iProduct2 Amontec JTAGkey iSerial 3 40S35QIJ bNumConfigurations 1 Configuration Descriptor: bLength 9 bDescriptorType 2 wTotalLength 55 bNumInterfaces 2 bConfigurationValue 1 iConfiguration 0 bmAttributes 0x80 (Bus Powered) MaxPower 100mA Interface Descriptor: bLength 9 bDescriptorType 4 bInterfaceNumber0 bAlternateSetting 0 bNumEndpoints 2 bInterfaceClass 255 Vendor Specific Class bInterfaceSubClass255 Vendor Specific Subclass bInterfaceProtocol255 Vendor Specific Protocol iInterface 2 Amontec JTAGkey Endpoint Descriptor: bLength 7 bDescriptorType 5 bEndpointAddress 0x81 EP 1 IN bmAttributes2 Transfer TypeBulk Synch Type None Usage Type Data wMaxPacketSize 0x0040 1x 64 bytes bInterval 0 Endpoint Descriptor: bLength 7 bDescriptorType 5 bEndpointAddress 0x02 EP 2 OUT bmAttributes2 Transfer TypeBulk Synch Type None Usage Type Data wMaxPacketSize 0x0040 1x 64 bytes bInterval 0 Interface Descriptor: bLength 9 bDescriptorType 4 bInterfaceNumber1 bAlternateSetting 0 bNumEndpoints 2 bInterfaceClass 255 Vendor Specific Class bInterfaceSubClass255 Vendor Specific Subclass bInterfaceProtocol255 Vendor Specific Protocol iInterface 2 Amontec JTAGkey Endpoint Descriptor: bLength 7 bDescriptorType 5 bEndpointAddress 0x83 EP 3 IN bmAttributes2 Transfer TypeBulk Synch Type None Usage Type Data wMaxPacketSize 0x0040 1x 64 bytes bInterval 0 Endpoint Descriptor: bLength 7 bDescriptorType 5 bEndpointAddress 0x04 EP 4 OUT bmAttributes2 Transfer TypeBulk Synch Type None Usage Type Data wMaxPacketSize 0x0040 1x 64 bytes bInterval 0 Device Status: 0x (Bus Powered) ___ Openocd-development mailing list Openocd-development@lists.berlios.de https://lists.berlios.de/mailman/listinfo/openocd-development
[Openocd-development] More test with J-Link
Hi list, Today I had the chance to test OpenOCD + J-Link (v. 5.4) on Olimex LPC-2378-STK. It worked like a charm. Then I think main J-Link problem is related to ARM9/ARM11. Or maybe just specific to i.MX27ADS board. Best Regards, Alan ___ Openocd-development mailing list Openocd-development@lists.berlios.de https://lists.berlios.de/mailman/listinfo/openocd-development
Re: [Openocd-development] More test with J-Link
On 5/8/09, Magnus Lundin lun...@mlu.mine.nu wrote: Alan Carvalho de Assis wrote: Hi list, Today I had the chance to test OpenOCD + J-Link (v. 5.4) on Olimex LPC-2378-STK. It worked like a charm. Then I think main J-Link problem is related to ARM9/ARM11. Or maybe just specific to i.MX27ADS board. Best Regards, Alan ___ Openocd-development mailing list Openocd-development@lists.berlios.de https://lists.berlios.de/mailman/listinfo/openocd-development Which openocd revision ? I used svn:1676 What tests did you do ? Basic initialization and w/r on internal registers, unhappily there not a testing same to this platform. Regards Magnus ___ Openocd-development mailing list Openocd-development@lists.berlios.de https://lists.berlios.de/mailman/listinfo/openocd-development Regards, Alan ___ Openocd-development mailing list Openocd-development@lists.berlios.de https://lists.berlios.de/mailman/listinfo/openocd-development
Re: [Openocd-development] The List (of OpenOCD Tasks) for r1587
Hi Zach, On 5/1/09, Zach Welch z...@superlucidity.net wrote: - Coldfire (suggested by NC) - can we draw from the BDM project? http://bdm.sourceforge.net/ I think BDM support will be great! There is two types of BDM interfaces. The old interface is used on some microcontrollers like Coldfire V2 (MCF5272, MCF5282, etc) and other (with less wires) used on Coldfire V1 (MCF51JM, etc) and HC(S) uC. - other targets? (suggestions always welcome) Hmm, Blackfin support will be nice as well. Regards, Alan ___ Openocd-development mailing list Openocd-development@lists.berlios.de https://lists.berlios.de/mailman/listinfo/openocd-development
Re: [Openocd-development] JLink testing results.
Hi Magnus On 4/28/09, Magnus Lundin lun...@mlu.mine.nu wrote: I have now tested JLink against my standard targets, the good is I have found no problems, the bad is that I not found any causes of reported problems. I have checked Michael Fishers STR 711 program, I can connect to target, write and read momory, use gdb LPC_H2124 board, good connections, good debug connection, domp, load and verify images to RAM STM32 board, connect ok, erase, program flash no problems, gdb OK. The STM32 is quite sensitive to the JLink speed, I seems we get more frequent OVERRUN errors than with a FT2232 adapter. This might be because the JLInk is faster and can saturate the DAP - Memory bus link more easy. We really need some way for the low level arm_adi driver to handle overrun errors, retry transactions and/or adapt the JTag speed, perhaps insert extra jtag clocks between scans. This is only necessary for transactions going thruogh the target memory bus, and especially for reads, not when talking to the DAP controller. I am getting a compilation error: gcc -DHAVE_CONFIG_H -I. -I../.. -I../../src -I../../src/helper -I../../src/target -g -O2 -Wall -Wstrict-prototypes -Wformat-security -Wextra -Wno-unused-parameter -Wbad-function-cast -Wcast-align -Werror -MT jlink.o -MD -MP -MF .deps/jlink.Tpo -c -o jlink.o jlink.c cc1: warnings being treated as errors jlink.c: In function ‘usb_bulk_write_ex’: jlink.c:893: warning: passing argument 1 of ‘usb_bulk_with_retries’ from incompatible pointer type make[2]: *** [jlink.o] Error 1 make[2]: Leaving directory `/home/alan/openocd/openocd/src/jtag' make[1]: *** [install-recursive] Error 1 make[1]: Leaving directory `/home/alan/openocd/openocd/src' make: *** [install-recursive] Error 1 Best regards, Magnus Best Regards, Alan ___ Openocd-development mailing list Openocd-development@lists.berlios.de https://lists.berlios.de/mailman/listinfo/openocd-development
Re: [Openocd-development] JLink testing results.
On 4/28/09, Magnus Lundin lun...@mlu.mine.nu wrote: What system and what version of gcc ? I build whithout any problems on my Fedora 10 system. Ubuntu 8.10 and gcc-4.1, but same error on gcc-4.3 # gcc -v Using built-in specs. Target: i486-linux-gnu Configured with: ../src/configure -v --enable-languages=c,c++ --prefix=/usr --enable-shared --with-system-zlib --libexecdir=/usr/lib --without-included-gettext --enable-threads=posix --enable-nls --with-gxx-include-dir=/usr/include/c++/4.1.3 --program-suffix=-4.1 --enable-__cxa_atexit --enable-clocale=gnu --enable-libstdcxx-debug --enable-checking=release i486-linux-gnu Thread model: posix gcc version 4.1.3 20080623 (prerelease) (Ubuntu 4.1.2-23ubuntu3) Regards, Magnus Alan ___ Openocd-development mailing list Openocd-development@lists.berlios.de https://lists.berlios.de/mailman/listinfo/openocd-development
Re: [Openocd-development] ARM11 status
Hi Øyvind, Last time I tested it (few weeks ago) single stepping was working fine. I tested using the Ledtest example. Best Regards Alan On 4/27/09, Øyvind Harboe oyvind.har...@zylin.com wrote: Is anyone using ARM11 out there? I've got an i.mx31 ARM11 target in my office, but I've tested it much as I could not get single stepping to work. -- Øyvind Harboe Embedded software and hardware consulting services http://consulting.zylin.com ___ Openocd-development mailing list Openocd-development@lists.berlios.de https://lists.berlios.de/mailman/listinfo/openocd-development ___ Openocd-development mailing list Openocd-development@lists.berlios.de https://lists.berlios.de/mailman/listinfo/openocd-development
Re: [Openocd-development] ARM11 status
Hi Øyvind, On 4/27/09, Øyvind Harboe oyvind.har...@zylin.com wrote: Could you contribute the ledtest example to the OpenOCD testing suite? Ledtest for imx31pdk is already on OpenOCD svn. Source and binaries + instructions on how to run this smoketest. It is too easy: ./openocd -f yourinterface.cfg -f board/imx31pdk.cfg Go to openocd/testing/examples/ledtest-imx31pdk and execute: arm-elf-gdb --command=gdbinit-imx31pdk That would be *great*! Please let me know if it works for you. -- Øyvind Harboe Embedded software and hardware consulting services http://consulting.zylin.com Best Regards, Alan ___ Openocd-development mailing list Openocd-development@lists.berlios.de https://lists.berlios.de/mailman/listinfo/openocd-development
[Openocd-development] J-Link interface status
Hi all, I am sending this email just to give a feedback about jlink interface status. I noticed that using J-Link yellow version 6.0 OpenOCD can detects my ARM9 i.MX27 processor with no problem. But using J-Link yellow version 5.4 nothing works: # openocd -f interface/jlink.cfg -f target/imx27.cfg Open On-Chip Debugger 1.0 (2009-04-27-12:27) svn:1545 BUGS? Read http://svn.berlios.de/svnroot/repos/openocd/trunk/BUGS $URL: http://svn.berlios.de/svnroot/repos/openocd/trunk/src/openocd.c $ dcc downloads are enabled Info : J-Link compiled Dec 03 2007 17:15:31 ARM Rev.5 Info : Vref = 3.112 TCK = 1 TDI = 1 TDO = 1 TMS = 0 SRST = 1 TRST = 1 Info : J-Link JTAG Interface ready Error: jlink_usb_message failed with result=1) Error: jlink_tap_execute, wrong result -107 (expected 1) Error: jlink_usb_message failed with result=1) Error: jlink_tap_execute, wrong result -107 (expected 1) Error: jlink_usb_message failed with result=1) Error: jlink_tap_execute, wrong result -107 (expected 2) Error: jlink_usb_message failed with result=1) Error: jlink_tap_execute, wrong result -107 (expected 2) Error: jlink_usb_message failed with result=1) Error: jlink_tap_execute, wrong result -107 (expected 3) Error: jlink_usb_message failed with result=1) Error: jlink_tap_execute, wrong result -107 (expected 5) Warn : no telnet port specified, using default port Warn : no gdb port specified, using default port Warn : no tcl port specified, using default port Can you please to comment about your J-Link status? What other versions (beside 6.0) work? Best Regards, Alan ___ Openocd-development mailing list Openocd-development@lists.berlios.de https://lists.berlios.de/mailman/listinfo/openocd-development
Re: [Openocd-development] J-Link interface status
Hi Michael, On 4/27/09, Michael Fischer fische...@t-online.de wrote: Hello Alan, I noticed that using J-Link yellow version 6.0 OpenOCD can detects my ARM9 i.MX27 processor with no problem. Can you change some memory values too? I can't because I don't have one J-Link version 6.0 any more :-( Try to use mww to write some values and mdw to read it back. Do you have J-Link completely functional? Best regards, Michael Best Regards, Alan ___ Openocd-development mailing list Openocd-development@lists.berlios.de https://lists.berlios.de/mailman/listinfo/openocd-development
Re: [Openocd-development] J-Link, different FW-Version, different behaviour
On 4/27/09, Michael Fischer fische...@t-online.de wrote: Hello List, I found out that I have a V6.0 which is working with the STR710 and one version not. The version which is NOT working is: J-Link ARM V6 compiled Apr 1 2008 11:56:10 The version which is working had the following version: J-Link ARM V6 compiled Jul 22 2008 11:42:42 Here the RAM write/read test is working, but had had some problem at first to detect the CPU. I will try to make some more test. Wow, even in version 6.0 there is firmware incompatibilities! Some idea how to fix these issues? Best regards, Regards, Michael Alan ___ Openocd-development mailing list Openocd-development@lists.berlios.de https://lists.berlios.de/mailman/listinfo/openocd-development
Re: [Openocd-development] arm116jzf-s
Hi On 4/2/09, plarroy plar...@promax.es wrote: Hi Is arm116jzf-s known to be supported by openocd? I think you are asking about arm1136jf-s. Yes, it is supported! Thank a look on i.MX31 and i.MX35. Regards. Best Regards, Alan ___ Openocd-development mailing list Openocd-development@lists.berlios.de https://lists.berlios.de/mailman/listinfo/openocd-development
Re: [Openocd-development] arm116jzf-s
s/Thank/Take/ :-D On 4/2/09, Alan Carvalho de Assis acas...@gmail.com wrote: Hi On 4/2/09, plarroy plar...@promax.es wrote: Hi Is arm116jzf-s known to be supported by openocd? I think you are asking about arm1136jf-s. Yes, it is supported! Thank a look on i.MX31 and i.MX35. Regards. Best Regards, Alan ___ Openocd-development mailing list Openocd-development@lists.berlios.de https://lists.berlios.de/mailman/listinfo/openocd-development
Re: [Openocd-development] Support to interfaces except JTAG
Hi SimonQian, On 4/2/09, SimonQian simonq...@simonqian.com wrote: Hi, I noticed there is a thread about supporting other programming interfaces except JTAG. How is it going? I don't know much about it. I'll release a program with these support. I tested it on AVR_ISP/JTAG, C51_ISP, C8051F_C2/JTAG, PSOC_ISSP, MSP430_JTAG(non-standard JTAG), and even STM32_ISP(Comm port). I think it will be nice if OpenOCD get support to really non-JTAG ICE like BDM. Then OpenOCD will be *the* Silver Bullet OCD tool. If such support is actually planed, I'll try to implement these support in OpenOCD. Great! Best Regards, Simon Qian SimonQian(simonq...@simonqian.com) www.SimonQian.com Alan ___ Openocd-development mailing list Openocd-development@lists.berlios.de https://lists.berlios.de/mailman/listinfo/openocd-development
Re: [Openocd-development] write c15 reg on ARM1176 (S3C6410)
Hi Ivan, On 3/30/09, Ivan Kuten ivan.ku...@promwad.com wrote: Alan Carvalho de Assis wrote: Great! Ivan, could you please test Jeff's patch in our ARM11 board? I noticed issues on ARM11 detection when using Jeff's patch. I don't have an ARM11 at home, so I could test it only next Monday. Hello Alan, What's Jeff's patch are you talking about? I recently joined mailing list and did not follow up discussions. Please look the thread [Openocd-development] JLink Patches. Just apply these patches, build/install OpenOCD again and test your device using this new version. Regards, Ivan Regards, Alan ___ Openocd-development mailing list Openocd-development@lists.berlios.de https://lists.berlios.de/mailman/listinfo/openocd-development
Re: [Openocd-development] write c15 reg on ARM1176 (S3C6410)
Hi Ivan On 3/27/09, Ivan Kuten ivan.ku...@promwad.com wrote: Hello Alan! Thanks for hint! it's working. Open On-Chip Debugger 1.0 (2009-03-18-18:52) svn:1417 BUGS? Read http://svn.berlios.de/svnroot/repos/openocd/trunk/BUGS $URL: svn://svn.berlios.de/openocd/trunk/src/openocd.c $ jtag_speed: 0 Info : Disabled memory write burst mode. Info : JTAG tap: s3c6410.unknown tap/device found: 0x2b900f0f (Manufacturer: 0x787, Part: 0xb900, Version: 0x2) Info : JTAG Tap/device matched Info : JTAG tap: s3c6410.cpu tap/device found: 0x07b76f0f (Manufacturer: 0x787, Part: 0x7b76, Version: 0x0) Info : JTAG Tap/device matched Info : found ARM1176 Info : accepting 'telnet' connection from 0 Info : JTAG tap: s3c6410.unknown tap/device found: 0x2b900f0f (Manufacturer: 0x787, Part: 0xb900, Version: 0x2) Info : JTAG Tap/device matched Info : JTAG tap: s3c6410.cpu tap/device found: 0x07b76f0f (Manufacturer: 0x787, Part: 0x7b76, Version: 0x0) Info : JTAG Tap/device matched Info : found ARM1176 Info : r0 (INVALID) Info : r1 c7e28784 (INVALID) Info : r2 7f005000 (INVALID) Info : r3 0006 (INVALID) Info : r4 (INVALID) Info : r5 c730 (INVALID) Info : r6 c768 (INVALID) Info : r7 0001 (INVALID) Info : r8 c7e7bfdc (INVALID) Info : r9 0002 (INVALID) Info : r10 (INVALID) Info : r11 (INVALID) Info : r12 c7e2a79c (INVALID) Info : sp c7fffeb4 (INVALID) Info : lr c7e126ac (INVALID) Info : pc c7e02734 (INVALID) Info : cpsr 41d3 (INVALID) Info : dscr 4003 (INVALID) Info : Debug entry: JTAG HALT target state: halted target state: halted cpsr (/32): 0x61D3 Info : MRC p15, 0, R0 (#0x7013), c15, c2, 4 Great! Ivan, could you please test Jeff's patch in our ARM11 board? I noticed issues on ARM11 detection when using Jeff's patch. I don't have an ARM11 at home, so I could test it only next Monday. Best regards, Regards, Ivan Alan ___ Openocd-development mailing list Openocd-development@lists.berlios.de https://lists.berlios.de/mailman/listinfo/openocd-development
Re: [Openocd-development] mc1322x patch
Hi, On 3/27/09, Duane Ellis open...@duaneellis.com wrote: Jeff Williams: Last we heard Duane was waiting for the dust to settle. I think it has, so, what can we do about your patch. I'd like to take it in pieces. Lets avoid changing the state numbers for a moment. and lets focus on the arm7-thumb parts. Do you have, or can you create a stripped down patch - something that is 100% thumb only stuff/fixes? (No experimentalish stuff?) I've got a few arm7's i can use/try here. I hope more people start testing Jeff's patch. When I applied it my FTDI interface stopped to work for ARM11. I will test new patches and share my results. -Duane. Best Regards, Alan ___ Openocd-development mailing list Openocd-development@lists.berlios.de https://lists.berlios.de/mailman/listinfo/openocd-development
Re: [Openocd-development] write c15 reg on ARM1176 (S3C6410)
Hi Ivan, On Wed, Mar 25, 2009 at 10:04 AM, Ivan Kuten ivan.ku...@promwad.com wrote: Hello! Is it possible to write c15 reg on ARM1176 (S3C6410)? When I type: reg c15 0x7013 register c15 not found in current target This is not the way used on arm11. Please see these tips: http://www.imxdev.org/wiki/index.php?title=All_Boards_How_To_Convert_RVICE_CP15_To_OpenOCD Please let me know if it worked to you, ok? Regards, Alan ___ Openocd-development mailing list Openocd-development@lists.berlios.de https://lists.berlios.de/mailman/listinfo/openocd-development
[Openocd-development] Add Freescale i.MX35 processor
This patch adds support to i.MX35 processor.
Best Regards,
Alan
Index: src/target/target/imx35.cfg
===
--- src/target/target/imx35.cfg (revision 0)
+++ src/target/target/imx35.cfg (revision 0)
@@ -0,0 +1,50 @@
+# imx35 config
+#
+
+if { [info exists CHIPNAME] } {
+ set _CHIPNAME $CHIPNAME
+} else {
+ set _CHIPNAME imx35
+}
+
+if { [info exists ENDIAN] } {
+ set _ENDIAN $ENDIAN
+} else {
+ set _ENDIAN little
+}
+
+if { [info exists CPUTAPID ] } {
+ set _CPUTAPID $CPUTAPID
+} else {
+ set _CPUTAPID 0x07b3601d
+}
+
+if { [info exists SDMATAPID ] } {
+ set _SDMATAPID $SDMATAPID
+} else {
+ set _SDMATAPID 0x0882601d
+}
+
+#
+# The system jtag controller
+# IMX31 reference manual, page 6-28 - figure 6-14
+if { [info exists SJCTAPID ] } {
+ set _SJCTAPID $SJCTAPID
+} else {
+ set _SJCTAPID 0x2b900f0f
+}
+
+jtag newtap $_CHIPNAME sjc -irlen 4 -ircapture 0x0 -irmask 0x0 -expected-id $_SJCTAPID
+
+jtag newtap $_CHIPNAME cpu -irlen 5 -ircapture 0x1 -irmask 0x1f -expected-id $_CPUTAPID
+
+# No IDCODE for this TAP
+jtag newtap $_CHIPNAME whatchacallit -irlen 4 -ircapture 0 -irmask 0x0 -expected-id 0x0
+
+jtag newtap $_CHIPNAME smda -irlen 5 -ircapture 0x1 -irmask 0x1f -expected-id $_SDMATAPID
+
+set _TARGETNAME [format %s.cpu $_CHIPNAME]
+target create $_TARGETNAME arm11 -endian $_ENDIAN -chain-position $_TARGETNAME
+
+proc power_restore {} { puts Sensed power restore. No action. }
+proc srst_deasserted {} { puts Sensed nSRST deasserted. No action. }
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Re: [Openocd-development] JLink + MC1322x
Hi On Wed, Mar 18, 2009 at 1:16 PM, Alan Carvalho de Assis acas...@gmail.com wrote: Hi Jeff, I tested your patch on i.MX31 (ARM11), then I think your friend was right :-) # openocd -f interface/axm0432.cfg -f board/imx31pdk.cfg Open On-Chip Debugger 1.0 (2009-03-18-12:50) svn:1415M BUGS? Read http://svn.berlios.de/svnroot/repos/openocd/trunk/BUGS $URL: http://svn.berlios.de/svnroot/repos/openocd/trunk/src/openocd.c $ jtag_speed: 10 Info : JTAG tap: imx35.sjc tap/device found: 0xa57201e1 (Manufacturer: 0x0f0, Part: 0x5720, Version: 0xa) Error: JTAG tap: imx35.sjc got: 0xa57201e1 (mfg: 0x0f0, part: 0x5720, ver: 0xa) Error: JTAG tap: imx35.sjc expected 1 of 1: 0x2b900f0f (mfg: 0x787, part: 0xb900, ver: 0x2) Error: trying to validate configured JTAG chain anyway... Error: Could not validate JTAG scan chain, IR mismatch, scan returned 0x0C0804. tap=imx35.sjc pos=0 expected 0x1 got 0 Warn : Could not validate JTAG chain, continuing anyway... Warn : TAP imx35.cpu: Warn : value captured during scan didn't pass the requested check: Warn : captured: 0x00 check_value: 0x01 check_mask: 0x1F Warn : in_handler: w/o in_value, mismatch in SIR Warn : TAP imx35.cpu: Warn : value captured during scan didn't pass the requested check: Warn : captured: 0x00 check_value: 0x01 check_mask: 0x1F Warn : in_handler: w/o in_value, mismatch in SIR Error: 'arm11 target' JTAG communication error SCREG SCAN OUT 0x04 (expected 0x10) Warn : in_handler: w/o in_value, mismatch in SDR Warn : TAP imx35.cpu: Warn : value captured during scan didn't pass the requested check: Warn : captured: 0x00 check_value: 0x01 check_mask: 0x1F Warn : in_handler: w/o in_value, mismatch in SIR Warn : no telnet port specified, using default port Warn : no gdb port specified, using default port Warn : no tcl port specified, using default port Note 1: Using default openocd (without patch) everything works fine. Note 2: Although it appear imx35 it is the default imx31 config. Best Regards, Alan ___ Openocd-development mailing list Openocd-development@lists.berlios.de https://lists.berlios.de/mailman/listinfo/openocd-development
Re: [Openocd-development] PXA270
Hi Sergey, On Tue, Feb 17, 2009 at 8:29 AM, Sergey Lapin slapi...@gmail.com wrote: Hi, all! Do anybody have proper pxa270 config to play with? I try to use colibri board. btw, target/pxa270.cfg soesn't work. I'm not sure, but I think some people from OpenEZX project used openocd to un-brick Motorola A1200 cell phone, it is powered by PXA270. All the best, S. Best Regards, Alan ___ Openocd-development mailing list Openocd-development@lists.berlios.de https://lists.berlios.de/mailman/listinfo/openocd-development
Re: [Openocd-development] support for freescale mc13224
Hi Sergey, On Wed, Jan 21, 2009 at 4:30 PM, Sergey Lapin slapi...@gmail.com wrote: Hi, all! I write support for mc13224 - arm7tdmi-based ieee8021.15.4 -compliant communication chip. Chip is quite new, documentation is in weird state and is not full, but core and basic peripherals like SPI are documented normally. I already managed to make core work, but I can't manage it to reset properly. Can you please send your patches to OpenOCD? Even if it is not working correctly your patch base help other people who wants to test it. 1. It does not have TRST, only SRST, and it works (resets), but then OpenOCD is unable to talk to it anymore, full restart of openocd and board reset button press works to some extent. 2. halt works only first time, then the same problem is as with reset. Startup process and limitations is not described in manual. Now I have managed to make GPIO and SPI work via mww, can write stuff to internal RAM and run it, so basically it works. Could anybody advice how to debug/gather information to fix this issue? I could provide -d3 log of openocd, but it just tells that chip is in invalid mode. (will submit in another email as soon as I get home). I am also testing Freescale ARM9/11 processors with OpenOCD. Sometimes I got this invalid mode error message from OpenOCD and sometimes I got also this warning message: Warn : captured: 0x00 check_value: 0x01 check_mask: 0x0f Warn : in_handler: w/o in_value, mismatch in SIR Freescale chose strategy of making very hard to work with this chip, demanding closed binaries every now and then, and depending on IAR Workbench for closed libraries, etc, but I'd like to make it work fully (at least as just controller) hoping to reverse engineer the rest for proper gcc support, because it is only integrated chip on market at the moment, and I'd like to experiment with this kind of stuff. By any chance if anybody had any experience with this particular chip, have any information, I'd like to know about it. Please go ahead! It is nice to see open-source alternatives to closed solution. Be sure your work will help more people. Thanks a lot. S. Best Regards, Alan ___ Openocd-development mailing list Openocd-development@lists.berlios.de https://lists.berlios.de/mailman/listinfo/openocd-development
[Openocd-development] [PATCH] add imx21
This patch add support to imx21 processor TAP. addimx21.patch Description: application/mbox ___ Openocd-development mailing list Openocd-development@lists.berlios.de https://lists.berlios.de/mailman/listinfo/openocd-development
Re: [Openocd-development] [PATCH] add imx31pdk board
Oyvind, The test.elf on ledtest-imx31pdk is with symbol table of the old C file, I recompiled it and attached here. Please update. Regards, Alan On Thu, Jan 15, 2009 at 1:09 PM, Øyvind Harboe oyvind.har...@zylin.com wrote: Committed. Thanks! -- Øyvind Harboe http://www.zylin.com/zy1000.html ARM7 ARM9 XScale Cortex JTAG debugger and flash programmer test.elf Description: Binary data ___ Openocd-development mailing list Openocd-development@lists.berlios.de https://lists.berlios.de/mailman/listinfo/openocd-development
[Openocd-development] IDCODE mismatch
Hi all,
I am facing a strange problem: the JTAG tap is reading the right value
from my device but the value I defined on config file appear changed
during detection.
This is the config file:
# The bs tap
if { [info exists BSTAPID ] } {
set _BSTAPID $BSTAPID
} else {
set _BSTAPID 0x1b900f0f
}
jtag newtap $_CHIPNAME bs -irlen 4 -ircapture 0x1 -irmask 0xf
-expected-id $_BSTAPID
# The CPU tap
if { [info exists CPUTAPID ] } {
set _CPUTAPID $CPUTAPID
} else {
set _CPUTAPID 0x07926041
}
jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf
-expected-id $_CPUTAPID
# The SDMA tap
if { [info exists SDMATAPID ] } {
set _SDMATAPID $SDMATAPID
} else {
set _SDMATAPID 0
}
jtag newtap $_CHIPNAME sdma -irlen 4 -ircapture 0x0 -irmask 0xf
-expected-id $_SDMATAPID
# The SJC tap
if { [info exists SJCTAPID ] } {
set _SJCTAPID $SJCTAPID
} else {
set _SJCTAPID 0x088231d
}
jtag newtap $_CHIPNAME sjc -irlen 5 -ircapture 0x1 -irmask 0x1f
-expected-id $_SJCTAPID
Notice I defined SJC IDCODE = 0x088231d, but during detection the
openocd is looking for 0x0088231d
See:
Open On-Chip Debugger 1.0 (2009-01-16-08:27) svn:1324
BUGS? Read http://svn.berlios.de/svnroot/repos/openocd/trunk/BUGS
$URL: http://svn.berlios.de/svnroot/repos/openocd/trunk/src/openocd.c $
jtag_speed: 10
dcc downloads are enabled
Info : JTAG tap: imx.bs tap/device found: 0x1b900f0f (Manufacturer:
0x787, Part: 0xb900, Version: 0x1)
Info : JTAG Tap/device matched
Info : JTAG tap: imx.cpu tap/device found: 0x07926041 (Manufacturer:
0x020, Part: 0x7926, Version: 0x0)
Info : JTAG Tap/device matched
Warn : Tap/Device does not have IDCODE
Info : JTAG Tap/device matched
Info : JTAG tap: imx.sjc tap/device found: 0x0882301d (Manufacturer:
0x00e, Part: 0x8823, Version: 0x0)
Error: JTAG tap: imx.sjc got: 0x0882301d (mfg: 0x00e,
part: 0x8823, ver: 0x0)
Error: JTAG tap: imx.sjc expected 1 of 1: 0x0088231d (mfg: 0x18e,
part: 0x0882, ver: 0x0)
Error: trying to validate configured JTAG chain anyway...
Error: Could not validate JTAG scan chain, IR mismatch, scan returned
0x061011. tap=imx.sdma pos=8 expected 0x1 got 0
Warn : Could not validate JTAG chain, continuing anyway...
Warn : TAP imx.cpu:
Warn : value captured during scan didn't pass the requested check:
Warn : captured: 0x0f check_value: 0x01 check_mask: 0x0f
Warn : in_handler: w/o in_value, mismatch in SIR
Warn : no tcl port specified, using default port
I think this is not just a shift problem because the 0 between 3 and 1 go away.
Someone here know about this problem?
Best Regards,
Alan
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[Openocd-development] [PATCH] add imx31pdk board
Please find patch attached. Regards, Alan addimx31pdk.diff Description: application/mbox ___ Openocd-development mailing list Openocd-development@lists.berlios.de https://lists.berlios.de/mailman/listinfo/openocd-development
Re: [Openocd-development] arm11 testers
Hi Oyvind, On Wed, Jan 14, 2009 at 3:26 PM, Øyvind Harboe oyvind.har...@zylin.com wrote: ...sic What I need next are some *simple* .elf binaries that can be committed to svn as test cases for simple GDB debugging. See openocd/testing/examples folder. I can help out w/openocd specific stuff, but I can't dive into imx31 datasheets/compilers, etc. at this point. I tried single stepping but without a working application I can upload, I wouldn't expect it to work(PC doesn't change). Resume seems to work better(i.e. PC changes). I developed a simple LED test application to test OpenOCD (attached). It will blink all LEDs (D1-D8) of iMX31PDK Debug Board! It worked fine here. Please let me know if it worked to you ok? -- Øyvind Harboe http://www.zylin.com/zy1000.html ARM7 ARM9 XScale Cortex JTAG debugger and flash programmer Best Regards, Alan ledtest-imx31pdk.tar.gz Description: GNU Zip compressed data ___ Openocd-development mailing list Openocd-development@lists.berlios.de https://lists.berlios.de/mailman/listinfo/openocd-development
[Openocd-development] [PATCH] add imx27ads board
Hi, I am sending attached the cfg file to initialize the iMX27ADS board. I hope this time I don't need to edit any makefile in order to copy my cfg to right place :-) Best Regards, Alan addimx27ads.patch Description: application/mbox ___ Openocd-development mailing list Openocd-development@lists.berlios.de https://lists.berlios.de/mailman/listinfo/openocd-development
Re: [Openocd-development] arm11 testers
Please find it attached.
On Wed, Jan 14, 2009 at 6:21 PM, Alan Carvalho de Assis
acas...@gmail.com wrote:
Ok, I will resend it with GPL header.
Thank you.
On Wed, Jan 14, 2009 at 5:18 PM, Øyvind Harboe oyvind.har...@zylin.com
wrote:
Can you make this GPL so I can commit it?
Thanks!
--
Øyvind Harboe
http://www.zylin.com/zy1000.html
ARM7 ARM9 XScale Cortex
JTAG debugger and flash programmer
/***
* Copyright (C) 2009 by Alan Carvalho de Assis *
* acas...@gmail.com *
* *
* This program is free software; you can redistribute it and/or modify *
* it under the terms of the GNU General Public License as published by *
* the Free Software Foundation; either version 2 of the License, or *
* (at your option) any later version. *
* *
* This program is distributed in the hope that it will be useful, *
* but WITHOUT ANY WARRANTY; without even the implied warranty of*
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
* GNU General Public License for more details. *
* *
* You should have received a copy of the GNU General Public License *
* along with this program; if not, write to the *
* Free Software Foundation, Inc., *
* 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
***/
void delay()
{
int i;
for (i = 0; i 50; i++);
}
/* MAIN ARM FUNTION */
int main (void)
{
volatile unsigned char *led = ((volatile unsigned char *)0xB602);
while(1)
{
*led = 0xFF;
delay();
*led = 0x00;
delay();
} /* FOR */
} /* MAIN */
__gccmain()
{
} /* GCCMAIN */
void exit(int exit_code)
{
while(1);
} /* EXIT */
atexit()
{
while(1);
} /* ATEXIT */
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Re: [Openocd-development] arm11 testers
Hi Oyvind, On Mon, Jan 12, 2009 at 8:18 PM, Øyvind Harboe oyvind.har...@zylin.com wrote: I am not familiar to BSDL file, then I need to study more about it to verify if our imx31.cfg file is correct. Any material about how to decode this kind of file is welcome. The primary information I need at this point is a crisp explanation of what the JTAG chain contains. Of course I could read this up in the datasheets, but I'd rather concentrate the time I have available on OpenOCD specific problems rather than becoming an imx31 expert. I am searching it, but it is not easy to find. I can validate one device from BSDL: 0010 -- Version 000110-- Design Center Number 010001-- Sequence Number 0001110 -- Manufacturer Identity 1; -- IEEE 1149.1 Requirement It is exactly the SDMATAPID 0x2190101d. But I think there is some error in your imx31.cfg because the IR Length for this device is 5 not 4 as defined in config file. Thanks! Best Regards, -- Øyvind Harboe http://www.zylin.com/zy1000.html ARM7 ARM9 XScale Cortex JTAG debugger and flash programmer Alan ___ Openocd-development mailing list Openocd-development@lists.berlios.de https://lists.berlios.de/mailman/listinfo/openocd-development
Re: [Openocd-development] arm11 testers
Hi Oyvind, On Sun, Jan 11, 2009 at 12:09 PM, Øyvind Harboe oyvind.har...@zylin.com wrote: What next? I'm not sure imx31.cfg has the JTAG chain defined correctly. Could you check datasheets and verify that the imx31.cfg is correct? I can't find about it on Reference Manual Rev. 2.3. I verified on BSDL file and openocd returned imx31.cpu Version: 0x0 appear strange, because in the BSDL file it is 0x2. I am not familiar to BSDL file, then I need to study more about it to verify if our imx31.cfg file is correct. Any material about how to decode this kind of file is welcome. Thanks! Thank you, -- Øyvind Harboe http://www.zylin.com/zy1000.html ARM7 ARM9 XScale Cortex JTAG debugger and flash programmer Alan ___ Openocd-development mailing list Openocd-development@lists.berlios.de https://lists.berlios.de/mailman/listinfo/openocd-development
[Openocd-development] [iMX27] BUG: unknown debug reason: 0xe
Hi All, I am testing iMX27 using current SVN version following my previous tutorial (http://www.imxdev.org/wiki/index.php?title=All_Boards_Installing_iMX27). The processor is detected correctly: $ sudo openocd -f imx27axm.cfg -f target/imx27.cfg [sudo] password for alan: Open On-Chip Debugger 1.0 (2009-01-10-15:42) svn:1312 BUGS? Read http://svn.berlios.de/svnroot/repos/openocd/trunk/BUGS $URL: http://svn.berlios.de/svnroot/repos/openocd/trunk/src/openocd.c $ jtag_speed: 10 dcc downloads are enabled Info : JTAG tap: imx27.bs tap/device found: 0x1b900f0f (Manufacturer: 0x787, Part: 0xb900, Version: 0x1) Info : JTAG Tap/device matched Info : JTAG tap: imx27.cpu tap/device found: 0x07926121 (Manufacturer: 0x090, Part: 0x7926, Version: 0x0) Info : JTAG Tap/device matched Warn : no tcl port specified, using default port This is the content of imx27axm.cfg: #daemon configuration telnet_port gdb_port #interface interface ft2232 ft2232_device_desc Symphony SoundBite A ft2232_layout axm0432_jtag ft2232_vid_pid 0x0403 0x6010 jtag_speed 10 #use combined on interfaces or targets that can't set TRST/SRST separately reset_config trst_and_srst srst_pulls_trst When I connect through telnet and issue reset run it is returning BUG: unknown debug reason: 0xe, see: $ telnet 127.0.0.1 Trying 127.0.0.1... Connected to 127.0.0.1. Escape character is '^]'. Open On-Chip Debugger reset run JTAG tap: imx27.bs tap/device found: 0x1b900f0f (Manufacturer: 0x787, Part: 0xb900, Version: 0x1) JTAG Tap/device matched JTAG tap: imx27.cpu tap/device found: 0x07926121 (Manufacturer: 0x090, Part: 0x7926, Version: 0x0) JTAG Tap/device matched BUG: unknown debug reason: 0xe Someone here already got similar problem? Best Regards, Alan ___ Openocd-development mailing list Openocd-development@lists.berlios.de https://lists.berlios.de/mailman/listinfo/openocd-development
Re: [Openocd-development] arm11 testers
Hi Oyvind, On Fri, Jan 9, 2009 at 1:07 PM, Øyvind Harboe oyvind.har...@zylin.com wrote: On Fri, Jan 9, 2009 at 1:12 PM, Alan Carvalho de Assis acas...@gmail.com wrote: Hi Øyvind, On Fri, Jan 9, 2009 at 7:52 AM, Øyvind Harboe oyvind.har...@zylin.com wrote: Do we have any arm11 testers/users on this list? I'm poking around the arm11 code and wondering if I should pull down i.MX31 from the shelf to take it for a spin... I can help you testing it! Please let send me instructions in order to test it. I need a working configuration file. Hopefully Kees will provide it :-) For now I've committed a new imx31.cfg file. It has a couple of syntax errors weeded out, but it needs work still. If you are comfortable reading the datasheets I'm sure you can figure out what's missing :-) 1. rebuild latest openocd 2. Run: openocd -f interface/myinterface.cfg -f target/imx31.cfg reset init JTAG tap: imx31.sjc tap/device found: 0x2b900f0f (Manufacturer: 0x787, Part: 0xb900, Version: 0x2) JTAG Tap/device matched JTAG tap: imx31.cpu tap/device found: 0x07b3601d (Manufacturer: 0x00e, Part: 0x7b36, Version: 0x0) JTAG Tap/device matched Tap/Device does not have IDCODE JTAG Tap/device matched JTAG tap: imx31.smda tap/device found: 0x2190101d (Manufacturer: 0x00e, Part: 0x1901, Version: 0x2) JTAG Tap/device matched Error validating JTAG scan chain, IR mismatch, scan returned 0x042011 Could not validate JTAG chain, continuing anyway... There is my results: $ sudo openocd -f imx31axm.cfg -f target/imx31.cfg [sudo] password for alan: Open On-Chip Debugger 1.0 (2009-01-10-15:42) svn:1312 BUGS? Read http://svn.berlios.de/svnroot/repos/openocd/trunk/BUGS $URL: http://svn.berlios.de/svnroot/repos/openocd/trunk/src/openocd.c $ jtag_speed: 10 Info : JTAG tap: imx31.sjc tap/device found: 0x2b900f0f (Manufacturer: 0x787, Part: 0xb900, Version: 0x2) Info : JTAG Tap/device matched Info : JTAG tap: imx31.cpu tap/device found: 0x07b3601d (Manufacturer: 0x00e, Part: 0x7b36, Version: 0x0) Info : JTAG Tap/device matched Warn : Tap/Device does not have IDCODE Info : JTAG Tap/device matched Info : JTAG tap: imx31.smda tap/device found: 0x2190101d (Manufacturer: 0x00e, Part: 0x1901, Version: 0x2) Info : JTAG Tap/device matched Error: Error validating JTAG scan chain, IR mismatch, scan returned 0x042011 Error: Could not validate JTAG chain, continuing anyway... Warn : TAP imx31.cpu: Warn : value captured during scan didn't pass the requested check: Warn : captured: 0x01 check_value: 0x1e check_mask: 0x1f Warn : in_handler: w/o in_value, mismatch in SIR Warn : TAP imx31.cpu: Warn : value captured during scan didn't pass the requested check: Warn : captured: 0x01 check_value: 0x1e check_mask: 0x1f Warn : in_handler: w/o in_value, mismatch in SIR Error: 'arm11 target' JTAG communication error SCREG SCAN OUT 0x07 (expected 0x10) Warn : in_handler: w/o in_value, mismatch in SDR Warn : TAP imx31.cpu: Warn : value captured during scan didn't pass the requested check: Warn : captured: 0x01 check_value: 0x1e check_mask: 0x1f Warn : in_handler: w/o in_value, mismatch in SIR Warn : no tcl port specified, using default port Info : accepting 'telnet' connection from 0 Info : JTAG tap: imx31.sjc tap/device found: 0x2b900f0f (Manufacturer: 0x787, Part: 0xb900, Version: 0x2) Info : JTAG Tap/device matched Info : JTAG tap: imx31.cpu tap/device found: 0x07b3601d (Manufacturer: 0x00e, Part: 0x7b36, Version: 0x0) Info : JTAG Tap/device matched Warn : Tap/Device does not have IDCODE Info : JTAG Tap/device matched Info : JTAG tap: imx31.smda tap/device found: 0x2190101d (Manufacturer: 0x00e, Part: 0x1901, Version: 0x2) Info : JTAG Tap/device matched Error: Error validating JTAG scan chain, IR mismatch, scan returned 0x042011 Error: Could not validate JTAG chain, continuing anyway... Warn : TAP imx31.cpu: Warn : value captured during scan didn't pass the requested check: Warn : captured: 0x01 check_value: 0x1e check_mask: 0x1f Warn : in_handler: w/o in_value, mismatch in SIR Warn : TAP imx31.cpu: Warn : value captured during scan didn't pass the requested check: Warn : captured: 0x01 check_value: 0x1e check_mask: 0x1f Warn : in_handler: w/o in_value, mismatch in SIR Error: 'arm11 target' JTAG communication error SCREG SCAN OUT 0x07 (expected 0x10) Warn : in_handler: w/o in_value, mismatch in SDR Warn : TAP imx31.cpu: Warn : value captured during scan didn't pass the requested check: Warn : captured: 0x01 check_value: 0x1e check_mask: 0x1f Warn : in_handler: w/o in_value, mismatch in SIR When I connect through telnet and issue reset run, I receive: $ telnet 127.0.0.1 Trying 127.0.0.1... Connected to 127.0.0.1. Escape character is '^]'. Open On-Chip Debugger reset run JTAG tap: imx31.sjc tap/device found: 0x2b900f0f (Manufacturer: 0x787, Part: 0xb900, Version: 0x2) JTAG Tap/device matched JTAG tap: imx31.cpu tap/device found: 0x07b3601d (Manufacturer: 0x00e, Part: 0x7b36, Version: 0x0) JTAG Tap/device
Re: [Openocd-development] arm11 testers
Hi Øyvind, On Fri, Jan 9, 2009 at 7:52 AM, Øyvind Harboe oyvind.har...@zylin.com wrote: Do we have any arm11 testers/users on this list? I'm poking around the arm11 code and wondering if I should pull down i.MX31 from the shelf to take it for a spin... I can help you testing it! Please let send me instructions in order to test it. -- Øyvind Harboe http://www.zylin.com/zy1000.html ARM7 ARM9 XScale Cortex JTAG debugger and flash programmer Regards, Alan ___ Openocd-development mailing list Openocd-development@lists.berlios.de https://lists.berlios.de/mailman/listinfo/openocd-development
Re: [Openocd-development] freescale soudbite
Hi Spencer, This soundbite board uses same JTAG interface layout as Axiom AXM-0432, see: http://www.imxdev.org/wiki/index.php?title=IMX27_ADS_Board_Installing_OpenOCD_and_GDB Yes, we can prove this source code to you. Best Regards, Alan On Wed, Dec 10, 2008 at 5:21 PM, Spencer Oliver [EMAIL PROTECTED] wrote: Sounds like we should make a written request. I have requested the src, this was my reply from freescale support: perhaps i should have been a bit clearer!! In reply to your Service Request SR 1-516314907: Sorry, I do not know what is src,could you tell me it? Cheers Spen ___ Openocd-development mailing list Openocd-development@lists.berlios.de https://lists.berlios.de/mailman/listinfo/openocd-development ___ Openocd-development mailing list Openocd-development@lists.berlios.de https://lists.berlios.de/mailman/listinfo/openocd-development
Re: [Openocd-development] i.MX21+OpenOCD+gdb
Hi Duane, On Sun, Dec 7, 2008 at 1:43 PM, Duane Ellis [EMAIL PROTECTED] wrote: Alan/Fabio, The two of you seem to have *vast* knowledge about the IMX series. And access to all kinds of IMX boards. Perhaps one of you two could spend some time and help Rahul noodle this problem out? Or perhaps figure this out on some other IMX board. Yes, we can make some tests here. Please note we didn't get success using OpenOCD with J-Link (IAR firmware) on iMX27. Everything appear works fine, OpenOCD detects board correctly but when gdb sends any command we get many errors. Using a FTDI based interface everything works fine. -Duane. Regards, Alan ___ Openocd-development mailing list Openocd-development@lists.berlios.de https://lists.berlios.de/mailman/listinfo/openocd-development
Re: [Openocd-development] xsvf player does not work
Hi Steve On Mon, Nov 17, 2008 at 9:26 PM, Steve Franks [EMAIL PROTECTED] wrote: http://www.urjtag.org/book/_licensing.html It's GPL with some BSD. Project is hosted on sourceforge. Great! I think UrJTAG has a nice BSDL file parser, maybe it can be useful to OpenOCD. These two projects needs to work more close (merging?) to sum forces. Steve Alan ___ Openocd-development mailing list Openocd-development@lists.berlios.de https://lists.berlios.de/mailman/listinfo/openocd-development
Re: [Openocd-development] [patch] iMX27: Add config file
Hi Øyvind, On Sun, Nov 2, 2008 at 5:01 PM, Øyvind Harboe [EMAIL PROTECTED] wrote: You should include which svn version you used and explain what happens if one tries SVN HEAD instead. Do you means something like this: svn checkout http://svn.berlios.de/svnroot/repos/openocd/trunk -r 1125 openocd ? -- Øyvind Harboe http://www.zylin.com/zy1000.html ARM7 ARM9 XScale Cortex JTAG debugger and flash programmer Best Regards, Alan ___ Openocd-development mailing list Openocd-development@lists.berlios.de https://lists.berlios.de/mailman/listinfo/openocd-development
Re: [Openocd-development] [patch] iMX27: Add config file
Hi Rick, On Sat, Nov 1, 2008 at 9:41 PM, Rick Altherr [EMAIL PROTECTED] wrote: Could you update this to the new target syntax? It should be something like: target create target0 arm926ejs -endianess little -chain-position 1 -variant arm926ejs Sure, please find it below: diff -Naur a/src/target/target/imx27.cfg b/src/target/target/imx27.cfg --- a/src/target/target/imx27.cfg 1969-12-31 21:00:00.0 -0300 +++ b/src/target/target/imx27.cfg 2008-11-01 21:58:37.0 -0200 @@ -0,0 +1,12 @@ +#use combined on interfaces or targets that can't set TRST/SRST separately +reset_config trst_and_srst + +# There are 2 taps on the chip: +# The ETM +jtag_device 4 0x1 0xf 0xe +# The ARM926EJS +jtag_device 4 0x1 0xf 0xe + +# Note above there are 2 taps (#0 and #1) the ARM926 is the 2nd tap (ie #1) +target create target0 arm926ejs -endianess little -chain-position 1 -variant arm926ejs + Thank you, Alan ___ Openocd-development mailing list Openocd-development@lists.berlios.de https://lists.berlios.de/mailman/listinfo/openocd-development
Re: [Openocd-development] JLINK doesn't work on iMX27ADS
Hi Peter, On Tue, Oct 21, 2008 at 10:59 AM, Peter 'p2' De Schrijver [EMAIL PROTECTED] wrote: Hi, I had a similar issue with the jlink embedded in the IAR LPC-P2378-SK board. Not all jlink's use the same USB endpoints. The openocd jlink code hardcodes the USB endpoint though, so it fails with some. https://lists.berlios.de/pipermail/openocd-development/2008-October/003390.html has a patch which worked for me. Hopefully this works for you as well. Unhappily it didn't work here. When I execute reset run the command run fine, but when I execute reset halt I receive many error messages until get a Segmentation Fault, please see it below. Other strange thing is because on i.MX31 I get OpenOCD and JLink working better. Some other idea to solve this problem? Cheers, Peter. Best Regards, Alan Open On-Chip Debugger 1.0 (2008-10-21-11:30) svn:1083M BUGS? Read http://svn.berlios.de/svnroot/repos/openocd/trunk/BUGS $URL: http://svn.berlios.de/svnroot/repos/openocd/trunk/src/openocd.c $ jtag_khz: 0 Info: J-Link ARM V6 compiled Jul 30 2008 11:24:59 Info: Vref = 2.692 TCK = 1 TDI = 0 TDO = 1 TMS = 0 SRST = 1 TRST = 1 Info: J-Link JTAG Interface ready Info: JTAG device found: 0x1b900f0f (Manufacturer: 0x787, Part: 0xb900, Version: 0x1) Info: JTAG device found: 0x07926121 (Manufacturer: 0x090, Part: 0x7926, Version: 0x0) Warning:no tcl port specified, using default port Info: accepting 'telnet' connection from 0 Info: JTAG device found: 0x1b900f0f (Manufacturer: 0x787, Part: 0xb900, Version: 0x1) Info: JTAG device found: 0x07926121 (Manufacturer: 0x090, Part: 0x7926, Version: 0x0) Error: Target not halted r0 (/32): 0x Error: usb_bulk_read failed (requested=323, result=-110) Error: jlink_tap_execute, wrong result -1, expected 323 Runtime error, file command.c, line 436: Error: usb_bulk_write failed (requested=694, result=-110) Error: jlink_tap_execute, wrong result -1, expected 345 Error: usb_bulk_write failed (requested=722, result=-110) Error: jlink_tap_execute, wrong result -1, expected 359 Error: usb_bulk_write failed (requested=750, result=-110) Error: jlink_tap_execute, wrong result -1, expected 373 Error: usb_bulk_write failed (requested=778, result=-110) Error: jlink_tap_execute, wrong result -1, expected 387 Error: usb_bulk_write failed (requested=806, result=-110) Error: jlink_tap_execute, wrong result -1, expected 401 Error: usb_bulk_write failed (requested=834, result=-110) Error: jlink_tap_execute, wrong result -1, expected 415 Error: usb_bulk_write failed (requested=862, result=-110) Error: jlink_tap_execute, wrong result -1, expected 429 Error: usb_bulk_write failed (requested=890, result=-110) Error: jlink_tap_execute, wrong result -1, expected 443 Error: usb_bulk_write failed (requested=918, result=-110) Error: jlink_tap_execute, wrong result -1, expected 457 Error: usb_bulk_write failed (requested=946, result=-110) Error: jlink_tap_execute, wrong result -1, expected 471 Error: usb_bulk_write failed (requested=974, result=-110) Error: jlink_tap_execute, wrong result -1, expected 485 Error: usb_bulk_write failed (requested=1002, result=-110) Error: jlink_tap_execute, wrong result -1, expected 499 Error: usb_bulk_write failed (requested=1030, result=-110) Error: jlink_tap_execute, wrong result -1, expected 513 Error: usb_bulk_write failed (requested=1058, result=-110) Error: jlink_tap_execute, wrong result -1, expected 527 Error: usb_bulk_write failed (requested=1086, result=-110) Error: jlink_tap_execute, wrong result -1, expected 541 Error: usb_bulk_write failed (requested=1114, result=-110) Error: jlink_tap_execute, wrong result -1, expected 555 Error: usb_bulk_write failed (requested=1142, result=-110) Error: jlink_tap_execute, wrong result -1, expected 569 Error: usb_bulk_write failed (requested=1170, result=-110) Error: jlink_tap_execute, wrong result -1, expected 583 Error: usb_bulk_write failed (requested=1198, result=-110) Error: jlink_tap_execute, wrong result -1, expected 597 Error: usb_bulk_write failed (requested=1226, result=-110) Error: jlink_tap_execute, wrong result -1, expected 611 Error: usb_bulk_write failed (requested=1254, result=-110) Error: jlink_tap_execute, wrong result -1, expected 625 Error: usb_bulk_write failed (requested=1282, result=-110) Error: jlink_tap_execute, wrong result -1, expected 639 Error: usb_bulk_write failed (requested=1310, result=-110) Error: jlink_tap_execute, wrong result -1, expected 653 Error: usb_bulk_write failed (requested=1338, result=-110) Error: jlink_tap_execute, wrong result -1, expected 667 Error: usb_bulk_write failed (requested=1366, result=-110) Error: jlink_tap_execute, wrong result -1, expected 681 Error: usb_bulk_write failed (requested=1394, result=-110) Error: jlink_tap_execute, wrong result -1, expected 695 Error: usb_bulk_write failed (requested=1422, result=-110) Error: jlink_tap_execute, wrong result -1, expected 709 Error:
Re: [Openocd-development] ARM11 status
Hi Oyvind, I am testing it with J-Link and still getting some problems. Vincent, what JTAG hardware are you using? Best Regards, Alan 2008/8/25 Øyvind Harboe [EMAIL PROTECTED]: I've committed a couple of ARM11 fixes. Is anyone testing ARM11 out there? Single stepping seems to be broken. Resume halt appears to work. reset halt JTAG device found: 0x2b900f0f (Manufacturer: 0x787, Part: 0xb900, Version: 0x2) JTAG device found: 0x07b3601d (Manufacturer: 0x00e, Part: 0x7b36, Version: 0x0) Device does not have IDCODE JTAG device found: 0x2190101d (Manufacturer: 0x00e, Part: 0x1901, Version: 0x2) Error validating JTAG scan chain, IR mismatch, scan returned 0x0c2011 Could not validate JTAG chain, continuing anyway... found ARM1136 r0 (INVALID) r1 43f88000 (INVALID) r2 43f9 (INVALID) r3 0001 (INVALID) r4 69a6 (INVALID) r5 (INVALID) r6 (INVALID) r7 1fffc834 (INVALID) r8 (INVALID) r9 0001 (INVALID) r10 0002 (INVALID) r11 00f0 (INVALID) r12 0001 (INVALID) sp 1f70 (INVALID) lr (INVALID) pc 0040569c (INVALID) cpsr 21d3 (INVALID) dscr 4003 (INVALID) Debug entry: JTAG HALT target state: halted setp Runtime error, file ?, line 1: Unknown command: setp step STEP PC 0040569c dscr 4007 (4003) target state: halted step STEP PC 0040569c target state: halted step STEP PC 0040569c target state: halted -- Øyvind Harboe http://www.zylin.com/zy1000.html ARM7 ARM9 XScale Cortex JTAG debugger and flash programmer ___ Openocd-development mailing list Openocd-development@lists.berlios.de https://lists.berlios.de/mailman/listinfo/openocd-development ___ Openocd-development mailing list Openocd-development@lists.berlios.de https://lists.berlios.de/mailman/listinfo/openocd-development
Re: [Openocd-development] ARM11 status
s/Vincent/Valentin ;-) 2008/8/25 Alan Carvalho de Assis [EMAIL PROTECTED]: Hi Oyvind, I am testing it with J-Link and still getting some problems. Vincent, what JTAG hardware are you using? Best Regards, Alan 2008/8/25 Øyvind Harboe [EMAIL PROTECTED]: I've committed a couple of ARM11 fixes. Is anyone testing ARM11 out there? Single stepping seems to be broken. Resume halt appears to work. reset halt JTAG device found: 0x2b900f0f (Manufacturer: 0x787, Part: 0xb900, Version: 0x2) JTAG device found: 0x07b3601d (Manufacturer: 0x00e, Part: 0x7b36, Version: 0x0) Device does not have IDCODE JTAG device found: 0x2190101d (Manufacturer: 0x00e, Part: 0x1901, Version: 0x2) Error validating JTAG scan chain, IR mismatch, scan returned 0x0c2011 Could not validate JTAG chain, continuing anyway... found ARM1136 r0 (INVALID) r1 43f88000 (INVALID) r2 43f9 (INVALID) r3 0001 (INVALID) r4 69a6 (INVALID) r5 (INVALID) r6 (INVALID) r7 1fffc834 (INVALID) r8 (INVALID) r9 0001 (INVALID) r10 0002 (INVALID) r11 00f0 (INVALID) r12 0001 (INVALID) sp 1f70 (INVALID) lr (INVALID) pc 0040569c (INVALID) cpsr 21d3 (INVALID) dscr 4003 (INVALID) Debug entry: JTAG HALT target state: halted setp Runtime error, file ?, line 1: Unknown command: setp step STEP PC 0040569c dscr 4007 (4003) target state: halted step STEP PC 0040569c target state: halted step STEP PC 0040569c target state: halted -- Øyvind Harboe http://www.zylin.com/zy1000.html ARM7 ARM9 XScale Cortex JTAG debugger and flash programmer ___ Openocd-development mailing list Openocd-development@lists.berlios.de https://lists.berlios.de/mailman/listinfo/openocd-development ___ Openocd-development mailing list Openocd-development@lists.berlios.de https://lists.berlios.de/mailman/listinfo/openocd-development
Re: [Openocd-development] GDB/Telnet doesn't open when ignoring the IR mismatch code of iMX31 processor
Hi Valentin, 2008/8/20 Valentin Longchamp [EMAIL PROTECTED]: Hi all, sic Here is the beginning of the log I get with using the gdbinit script Alan sent me for i.MX31 Open On-Chip Debugger 1.0 (2008-08-19-20:07) svn:946M $URL: svn://svn.berlios.de/openocd/trunk/src/openocd.c $ jtag_speed: 10 Info: JTAG device found: 0x2b900f0f (Manufacturer: 0x787, Part: 0xb900, Version: 0x2) Info: JTAG device found: 0x07b3601d (Manufacturer: 0x00e, Part: 0x7b36, Version: 0x0) Warning:Device does not have IDCODE Info: JTAG device found: 0x1190101d (Manufacturer: 0x00e, Part: 0x1901, Version: 0x1) Info: found ARM1136 Warning:no telnet port specified, using default port Warning:no gdb port specified, using default port Warning:no tcl port specified, using default port Info: accepting 'gdb' connection from 0 Error: Target not examined yet Warning:acknowledgment received, but no packet pending Error: Target not examined yet Error: unexpected error -4 Runtime error, file ?, line 1: Unknown command: endian_little In procedure 'endian' called at file ?, line 1 In procedure 'unknown' called at file ?, line 1 Error: JTAG communication failure, check connection, JTAG interface, target power etc. Error: trying to validate configured JTAG chain anyway... Warning:value captured during scan didn't pass the requested check: captured: 0x00 check_value: 0x01 check_mask: 0x1f Warning:in_handler reported a failed check Warning:value captured during scan didn't pass the requested check: captured: 0x00 check_value: 0x01 check_mask: 0x1f Warning:in_handler reported a failed check Error: 'arm11 target' JTAG communication error SCREG SCAN OUT 0x00 (expected 0x10) Warning:in_handler reported a failed check Warning:value captured during scan didn't pass the requested check: captured: 0x00 check_value: 0x01 check_mask: 0x1f Warning:in_handler reported a failed check Error: 'target arm11' expects IDCODE 0x*7B*7 Runtime error, file ?, line 1: register idcode not found in current target register control not found in current target register pport_memory_remap not found in current target Runtime error, file ?, line 1: Unknown command: long_0x53FC_=_0x040 In procedure 'long' called at file ?, line 1 In procedure 'unknown' called at file ?, line 1 In procedure 'long_0x53FC' called at file ?, line 1 In procedure 'unknown' called at file ?, line 1 In procedure 'long_0x53FC_=' called at file ?, line 1 In procedure 'unknown' called at file ?, line 1 Runtime error, file ?, line 1: Unknown command: long_0x53F8_=_0x074B0B7D In procedure 'long' called at file ?, line 1 In procedure 'unknown' called at file ?, line 1 In procedure 'long_0x53F8' called at file ?, line 1 In procedure 'unknown' called at file ?, line 1 In procedure 'long_0x53F8_=' called at file ?, line 1 In procedure 'unknown' called at file ?, line 1 Runtime error, file ?, line 1: Alan: has this script worked for you with openocd ? You had asked me a while ago, but I only have had time to test it yesterday evening. I am using this gdbinit with Segger J-Link GDB and with Macraigor USB2Demon, then we will need some modifications to it work: Remove the registers: register idcode, control, pport_memory_remap; they are not really necessary to board initialization. I will re-test it soon using the Oyvind suggestions. Regards Valentin Best Regards, Alan ___ Openocd-development mailing list Openocd-development@lists.berlios.de https://lists.berlios.de/mailman/listinfo/openocd-development
[Openocd-development] GDB/Telnet doesn't open when ignoring the IR mismatch code of iMX31 processor
Hi guys,
I implemented the Dominic suggestion to ignore the iMX31 IR error:
http://forum.sparkfun.com/viewtopic.php?t=7841postdays=0postorder=ascstart=45sid=45354d14976fd68c1fa088693f66ed7f
I commented the lines 1475, 1476, 1487 and 1488 of src/jtag/jtag.c:
free(cbuf);
//free(ir_test);
//return ERROR_JTAG_INIT_FAILED;
}
chain_pos += device-ir_length;
device = device-next;
}
if (buf_get_u32(ir_test, chain_pos, 2) != 0x3)
{
char *cbuf = buf_to_str(ir_test, total_ir_length, 16);
LOG_ERROR(Error validating JTAG scan chain, IR
mismatch, scan returned 0x%s, cbuf);
free(cbuf);
//free(ir_test);
//return ERROR_JTAG_INIT_FAILED;
}
OpenOCD detected iMX31 processor, but it doesn't opened the telnet
neither gdb port.
This is the openocd output:
# openocd -f test.cfg
Open On-Chip Debugger 1.0 (2008-08-16-18:28) svn:922
$URL: http://svn.berlios.de/svnroot/repos/openocd/trunk/src/openocd.c $
jtag_speed: 10
Info: J-Link ARM V6 compiled Jul 10 2008 18:11:14
Info: Vref = 1.883 TCK = 1 TDI = 0 TDO = 1 TMS = 0 SRST = 1 TRST = 1
Info: J-Link JTAG Interface ready
Info: JTAG device found: 0x2b900f0f (Manufacturer: 0x787, Part:
0xb900, Version: 0x2)
Info: JTAG device found: 0x07b3601d (Manufacturer: 0x00e, Part:
0x7b36, Version: 0x0)
Warning:Device was in bypass after TRST/TMS reset
Info: JTAG device found: 0x2190101d (Manufacturer: 0x00e, Part:
0x1901, Version: 0x2)
Error: Error validating JTAG scan chain, IR mismatch, scan returned 0x0c2011
Info: found ARM1136
Can someone please give me some suggestion about how to solve this problem?
Best Regards,
Alan
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Re: [Openocd-development] Connection problem on i.MX31 with JTAGkey
Hi, I still getting same error messages like Longfield: http://forum.sparkfun.com/viewtopic.php?p=46092sid=52e20118cd881f047a7d534a4be37adb Following this forum messages I tried to comment out the device-idcode = idcode; line in the src/jtag/jtag.c file, but it don't solved the problem. I am using the mx31.cfg existent in the target directory. Please, find my error message below. There is some other trick to get it working? Best regards, Alan # openocd -c interface dummy -f mx31.cfg Open On-Chip Debugger 1.0 (2008-07-22-08:38) svn:754M $URL: http://svn.berlios.de/svnroot/repos/openocd/trunk/src/openocd.c $ Error: jtag.c:1684 handle_interface_command(): No valid jtag interface found (dummy) Error: jtag.c:1685 handle_interface_command(): compiled-in jtag interfaces: Error: jtag.c:1688 handle_interface_command(): 0: jlink Info:options.c:50 configuration_output_handler(): jtag_speed: 5, 5 Info:jlink.c:525 jlink_get_version_info(): J-Link ARM V6 compiled Jul 10 2008 18:11:14 Info:jlink.c:493 jlink_get_status(): Vref = 2.789 TCK = 1 TDI = 0 TDO = 1 TMS = 0 SRST = 1 TRST = 1 Info:jlink.c:314 jlink_init(): J-Link JTAG Interface ready Info:jtag.c:1389 jtag_examine_chain(): JTAG device found: 0x2b900f0f (Manufacturer: 0x787, Part: 0xb900, Version: 0x2) Info:jtag.c:1389 jtag_examine_chain(): JTAG device found: 0x07b3601d (Manufacturer: 0x00e, Part: 0x7b36, Version: 0x0) Info:jtag.c:1389 jtag_examine_chain(): JTAG device found: 0x2190101d (Manufacturer: 0x00e, Part: 0x1901, Version: 0x2) Error: jtag.c:1444 jtag_validate_chain(): Error validating JTAG scan chain, IR mismatch, scan returned 0x0c2011 Error: jtag.c:1444 jtag_validate_chain(): Error validating JTAG scan chain, IR mismatch, scan returned 0x0c2011 Error: jtag.c:1444 jtag_validate_chain(): Error validating JTAG scan chain, IR mismatch, scan returned 0x0c2011 Error: jtag.c:1444 jtag_validate_chain(): Error validating JTAG scan chain, IR mismatch, scan returned 0x0c2011 Error: jtag.c:1444 jtag_validate_chain(): Error validating JTAG scan chain, IR mismatch, scan returned 0x0c2011 Error: jtag.c:1444 jtag_validate_chain(): Error validating JTAG scan chain, IR mismatch, scan returned 0x0c2011 Error: jtag.c:1565 jtag_init_inner(): Could not validate JTAG chain, exit Info:jtag.c:1389 jtag_examine_chain(): JTAG device found: 0x2b900f0f (Manufacturer: 0x787, Part: 0xb900, Version: 0x2) Info:jtag.c:1389 jtag_examine_chain(): JTAG device found: 0x07b3601d (Manufacturer: 0x00e, Part: 0x7b36, Version: 0x0) Info:jtag.c:1389 jtag_examine_chain(): JTAG device found: 0x2190101d (Manufacturer: 0x00e, Part: 0x1901, Version: 0x2) Error: jtag.c:1444 jtag_validate_chain(): Error validating JTAG scan chain, IR mismatch, scan returned 0x0c2011 Error: jtag.c:1444 jtag_validate_chain(): Error validating JTAG scan chain, IR mismatch, scan returned 0x0c2011 Error: jtag.c:1444 jtag_validate_chain(): Error validating JTAG scan chain, IR mismatch, scan returned 0x0c2011 Error: jtag.c:1444 jtag_validate_chain(): Error validating JTAG scan chain, IR mismatch, scan returned 0x0c2011 Error: jtag.c:1444 jtag_validate_chain(): Error validating JTAG scan chain, IR mismatch, scan returned 0x0c2011 Error: jtag.c:1444 jtag_validate_chain(): Error validating JTAG scan chain, IR mismatch, scan returned 0x0c2011 Error: jtag.c:1565 jtag_init_inner(): Could not validate JTAG chain, exit Warning: telnet_server.c:624 telnet_init(): no telnet port specified, using default port Warning: gdb_server.c:2021 gdb_init(): no gdb port specified, using default port Info:server.c:78 add_connection(): accepting 'gdb' connection from 0 Error: target.c:279 target_halt(): Target not examined yet Warning: gdb_server.c:416 gdb_get_packet_inner(): acknowledgment received, but no packet pending User:gdb_server.c:90 gdb_last_signal(): undefined debug reason 6 - target needs reset 2008/7/4 Valentin Longchamp [EMAIL PROTECTED]: On Fri, Jul 4, 2008 at 10:52 AM, Øyvind Harboe [EMAIL PROTECTED] wrote: On Fri, Jul 4, 2008 at 10:51 AM, Valentin Longchamp [EMAIL PROTECTED] wrote: Øyvind Harboe wrote: Thank you Øyvind. I will try this tonight at home and do my best to provide ARM11 testing in the future because I would like to have this openocd support for ARM11. I have tested your fix (I am at revision 748) and I can go further than the no interface messages I had earlier. This issue is now fixed and I can start working on real i.MX31 and ARM1136 support. However, I had a small problem to compile openocd on Kubuntu (so it should also apply to ubuntu and maybe debian) with this revision. I had to add -ldl to the link command. You should maybe add it in src/Makefile.am, in the openocd_LDADD assignment. If someone wants to send us an ARM11 card, we can do some testing here as well. I'd like to see stable ARM11 support in OpenOCD, but I still consider this very much work in progress. Well, we only have a few
