[Qemu-devel] [Bug 1826827] Re: dtc crash; pnv_dt_serial cannot find lpc's phandle

[Amol Surati]

** Description changed:

  Qemu version:
  QEMU emulator version 4.0.50 (v4.0.0-142-ge0fb2c3d89)
  Copyright (c) 2003-2019 Fabrice Bellard and the QEMU Project developers
  
  dtc version:
  Version: DTC 1.5.0-g5c3513f6
- 
  
  -
  pnv_dt_serial has a line which is supposed to set the interrupt-parent of the 
"isa-serial@i3f8" node to the phandle of "lpc@0".
  
  To that end, it calls fdt_get_phandle as shown below:
  _FDT((fdt_setprop_cell(fdt, node, "interrupt-parent", fdt_get_phandle(fdt, 
lpc_off;
  
  The function fdt_get_phandle fails to find the property "phandle" (or
  "linux,phandle") for the lpc node. Consequently, pnv_dt_serial sets the
  interrupt-parent to 0.
  
  Now boot the qemu-system-ppc64 powernv machine, and extract the fdt by
  using the qemu monitor's pmemsave command, taking help of the OPAL
  firmware's messages to locate the fdt in the physical ram.
  
  qemu-system-ppc64 -m 1g -machine powernv,num-chips=1 \
  -cpu power9 -smp 2,cores=2,threads=1 -accel tcg,thread=multi \
  -kernel ./vmlinux \
  -append 'disable_radix' \
  -serial mon:stdio -nographic -nodefaults
  
  The kernel vmlinux contains nothing but a single instruction which loops
  infintely, so that we can gather OPAL's messages, especially the one
  below:
  
  [0.168845963,5] INIT: Starting kernel at 0x2000, fdt at
  0x304b0b70 14404 bytes
  
  Once the fdt is dumped to a file, run the following:
  
  'dtc -O dtb -I dts -o out.dts dtb'
  
  After a few warnings, the dtc application crashes because an assertion
  was fired.
  
- 1.dts: Warning (unit_address_vs_reg): /lpcm-opb@60300/lpc@0: node has 
a unit name, but no reg property
- 1.dts: Warning (simple_bus_reg): /lpcm-opb@60300/lpc@0: missing or 
empty reg/ranges property
- 1.dts: Warning (avoid_unnecessary_addr_size): /ibm,opal: unnecessary 
#address-cells/#size-cells without "ranges" or child "reg" property
- 1.dts: Warning (unique_unit_address): /interrupt-controller@0: duplicate 
unit-address (also used in node /memory@0)
- 1.dts: Warning (chosen_node_stdout_path): /chosen:linux,stdout-path: Use 
'stdout-path' instead
+ out.dts: Warning (unit_address_vs_reg): /lpcm-opb@60300/lpc@0: node 
has a unit name, but no reg property
+ out.dts: Warning (simple_bus_reg): /lpcm-opb@60300/lpc@0: missing or 
empty reg/ranges property
+ out.dts: Warning (avoid_unnecessary_addr_size): /ibm,opal: unnecessary 
#address-cells/#size-cells without "ranges" or child "reg" property
+ out.dts: Warning (unique_unit_address): /interrupt-controller@0: duplicate 
unit-address (also used in node /memory@0)
+ out.dts: Warning (chosen_node_stdout_path): /chosen:linux,stdout-path: Use 
'stdout-path' instead
  dtc: livetree.c:575: get_node_by_phandle: Assertion `generate_fixups' failed.
  Aborted (core dumped)
  
  The assertion is fired because get_node_by_phandle receives a phandle
  value of 0, which is unexpected, unless fixups are needed (They are not,
  when running the dtc command).
  
  Back inside pnv_dt_serial, if the line that sets "interrupt-parent" for
  the serial device node is commented out, the dtc crash is prevented.
  Looking at hw/ppc/e500.c, it takes care of allocating necessary phandle
  values in the nodes, so a similar method can be adopted for powernv.
  
  The dtb is attached.
+ 
+ Edit: Add version, Correct filenames.

-- 
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https://bugs.launchpad.net/bugs/1826827

Title:
  dtc crash; pnv_dt_serial cannot find lpc's phandle

Status in QEMU:
  New

Bug description:
  Qemu version:
  QEMU emulator version 4.0.50 (v4.0.0-142-ge0fb2c3d89)
  Copyright (c) 2003-2019 Fabrice Bellard and the QEMU Project developers

  dtc version:
  Version: DTC 1.5.0-g5c3513f6

  -
  pnv_dt_serial has a line which is supposed to set the interrupt-parent of the 
"isa-serial@i3f8" node to the phandle of "lpc@0".

  To that end, it calls fdt_get_phandle as shown below:
  _FDT((fdt_setprop_cell(fdt, node, "interrupt-parent", fdt_get_phandle(fdt, 
lpc_off;

  The function fdt_get_phandle fails to find the property "phandle" (or
  "linux,phandle") for the lpc node. Consequently, pnv_dt_serial sets
  the interrupt-parent to 0.

  Now boot the qemu-system-ppc64 powernv machine, and extract the fdt by
  using the qemu monitor's pmemsave command, taking help of the OPAL
  firmware's messages to locate the fdt in the physical ram.

  qemu-system-ppc64 -m 1g -machine powernv,num-chips=1 \
  -cpu power9 -smp 2,cores=2,threads=1 -accel tcg,thread=multi \
  -kernel ./vmlinux \
  -append 'disable_radix' \
  -serial mon:stdio -nographic -nodefaults

  The kernel vmlinux contains nothing but a single instruction which
  loops infintely, so that we can gather OPAL's messages, especially the
  one below:

  [0.16884

[Qemu-devel] [Bug 1826827] [NEW] dtc crash; pnv_dt_serial cannot find lpc's phandle

[Amol Surati]

Public bug reported:

Qemu version:
QEMU emulator version 4.0.50 (v4.0.0-142-ge0fb2c3d89)
Copyright (c) 2003-2019 Fabrice Bellard and the QEMU Project developers

dtc version:
Version: DTC 1.5.0-g5c3513f6

-
pnv_dt_serial has a line which is supposed to set the interrupt-parent of the 
"isa-serial@i3f8" node to the phandle of "lpc@0".

To that end, it calls fdt_get_phandle as shown below:
_FDT((fdt_setprop_cell(fdt, node, "interrupt-parent", fdt_get_phandle(fdt, 
lpc_off;

The function fdt_get_phandle fails to find the property "phandle" (or
"linux,phandle") for the lpc node. Consequently, pnv_dt_serial sets the
interrupt-parent to 0.

Now boot the qemu-system-ppc64 powernv machine, and extract the fdt by
using the qemu monitor's pmemsave command, taking help of the OPAL
firmware's messages to locate the fdt in the physical ram.

qemu-system-ppc64 -m 1g -machine powernv,num-chips=1 \
-cpu power9 -smp 2,cores=2,threads=1 -accel tcg,thread=multi \
-kernel ./vmlinux \
-append 'disable_radix' \
-serial mon:stdio -nographic -nodefaults

The kernel vmlinux contains nothing but a single instruction which loops
infintely, so that we can gather OPAL's messages, especially the one
below:

[0.168845963,5] INIT: Starting kernel at 0x2000, fdt at
0x304b0b70 14404 bytes

Once the fdt is dumped to a file, run the following:

'dtc -O dtb -I dts -o out.dts dtb'

After a few warnings, the dtc application crashes because an assertion
was fired.

out.dts: Warning (unit_address_vs_reg): /lpcm-opb@60300/lpc@0: node has 
a unit name, but no reg property
out.dts: Warning (simple_bus_reg): /lpcm-opb@60300/lpc@0: missing or 
empty reg/ranges property
out.dts: Warning (avoid_unnecessary_addr_size): /ibm,opal: unnecessary 
#address-cells/#size-cells without "ranges" or child "reg" property
out.dts: Warning (unique_unit_address): /interrupt-controller@0: duplicate 
unit-address (also used in node /memory@0)
out.dts: Warning (chosen_node_stdout_path): /chosen:linux,stdout-path: Use 
'stdout-path' instead
dtc: livetree.c:575: get_node_by_phandle: Assertion `generate_fixups' failed.
Aborted (core dumped)

The assertion is fired because get_node_by_phandle receives a phandle
value of 0, which is unexpected, unless fixups are needed (They are not,
when running the dtc command).

Back inside pnv_dt_serial, if the line that sets "interrupt-parent" for
the serial device node is commented out, the dtc crash is prevented.
Looking at hw/ppc/e500.c, it takes care of allocating necessary phandle
values in the nodes, so a similar method can be adopted for powernv.

The dtb is attached.

Edit: Add version, Correct filenames.

** Affects: qemu
 Importance: Undecided
 Status: New

-- 
You received this bug notification because you are a member of qemu-
devel-ml, which is subscribed to QEMU.
https://bugs.launchpad.net/bugs/1826827

Title:
  dtc crash; pnv_dt_serial cannot find lpc's phandle

Status in QEMU:
  New

Bug description:
  Qemu version:
  QEMU emulator version 4.0.50 (v4.0.0-142-ge0fb2c3d89)
  Copyright (c) 2003-2019 Fabrice Bellard and the QEMU Project developers

  dtc version:
  Version: DTC 1.5.0-g5c3513f6

  -
  pnv_dt_serial has a line which is supposed to set the interrupt-parent of the 
"isa-serial@i3f8" node to the phandle of "lpc@0".

  To that end, it calls fdt_get_phandle as shown below:
  _FDT((fdt_setprop_cell(fdt, node, "interrupt-parent", fdt_get_phandle(fdt, 
lpc_off;

  The function fdt_get_phandle fails to find the property "phandle" (or
  "linux,phandle") for the lpc node. Consequently, pnv_dt_serial sets
  the interrupt-parent to 0.

  Now boot the qemu-system-ppc64 powernv machine, and extract the fdt by
  using the qemu monitor's pmemsave command, taking help of the OPAL
  firmware's messages to locate the fdt in the physical ram.

  qemu-system-ppc64 -m 1g -machine powernv,num-chips=1 \
  -cpu power9 -smp 2,cores=2,threads=1 -accel tcg,thread=multi \
  -kernel ./vmlinux \
  -append 'disable_radix' \
  -serial mon:stdio -nographic -nodefaults

  The kernel vmlinux contains nothing but a single instruction which
  loops infintely, so that we can gather OPAL's messages, especially the
  one below:

  [0.168845963,5] INIT: Starting kernel at 0x2000, fdt at
  0x304b0b70 14404 bytes

  Once the fdt is dumped to a file, run the following:

  'dtc -O dtb -I dts -o out.dts dtb'

  After a few warnings, the dtc application crashes because an assertion
  was fired.

  out.dts: Warning (unit_address_vs_reg): /lpcm-opb@60300/lpc@0: node 
has a unit name, but no reg property
  out.dts: Warning (simple_bus_reg): /lpcm-opb@60300/lpc@0: missing or 
empty reg/ranges property
  out.dts: Warning (avoid_unnecessary_addr_size): /ibm,opal: unnecessary 
#address-cells/#size-cells without "ranges" or child "reg" property
  out.dts: War

[Qemu-devel] [Bug 1826827] Re: dtc crash; pnv_dt_serial cannot find lpc's phandle

[Amol Surati]

** Attachment added: "the powernv dtb"
   https://bugs.launchpad.net/qemu/+bug/1826827/+attachment/5259834/+files/dtb

** Description changed:

- pnv_dt_serial has a line which is supposed to set the interrupt-parent
- of the "isa-serial@i3f8" node to the phandle of "lpc@0".
+ Qemu version:
+ QEMU emulator version 4.0.50 (v4.0.0-142-ge0fb2c3d89)
+ Copyright (c) 2003-2019 Fabrice Bellard and the QEMU Project developers
+ 
+ dtc version:
+ Version: DTC 1.5.0-g5c3513f6
+ 
+ 
+ -
+ pnv_dt_serial has a line which is supposed to set the interrupt-parent of the 
"isa-serial@i3f8" node to the phandle of "lpc@0".
  
  To that end, it calls fdt_get_phandle as shown below:
  _FDT((fdt_setprop_cell(fdt, node, "interrupt-parent", fdt_get_phandle(fdt, 
lpc_off;
  
  The function fdt_get_phandle fails to find the property "phandle" (or
  "linux,phandle") for the lpc node. Consequently, pnv_dt_serial sets the
  interrupt-parent to 0.
  
- 
- 
  Now boot the qemu-system-ppc64 powernv machine, and extract the fdt by
  using the qemu monitor's pmemsave command, taking help of the OPAL
  firmware's messages to locate the fdt in the physical ram.
  
- qemu-system-ppc64 -m 1g -machine powernv,num-chips=1 \  
- -cpu power9 -smp 2,cores=2,threads=1 -accel tcg,thread=multi \
  
- -kernel ./vmlinux \   
  
- -append 'disable_radix' \ 
  
- -serial mon:stdio -nographic -nodefaults 
+ qemu-system-ppc64 -m 1g -machine powernv,num-chips=1 \
+ -cpu power9 -smp 2,cores=2,threads=1 -accel tcg,thread=multi \
+ -kernel ./vmlinux \
+ -append 'disable_radix' \
+ -serial mon:stdio -nographic -nodefaults
  
  The kernel vmlinux contains nothing but a single instruction which loops
  infintely, so that we can gather OPAL's messages, especially the one
  below:
  
  [0.168845963,5] INIT: Starting kernel at 0x2000, fdt at
  0x304b0b70 14404 bytes
  
- 
- 
  Once the fdt is dumped to a file, run the following:
  
  'dtc -O dtb -I dts -o out.dts dtb'
  
- 
- After a few warnings, the dtc application crashes because an assertion was 
fired.
+ After a few warnings, the dtc application crashes because an assertion
+ was fired.
  
  1.dts: Warning (unit_address_vs_reg): /lpcm-opb@60300/lpc@0: node has 
a unit name, but no reg property
  1.dts: Warning (simple_bus_reg): /lpcm-opb@60300/lpc@0: missing or 
empty reg/ranges property
  1.dts: Warning (avoid_unnecessary_addr_size): /ibm,opal: unnecessary 
#address-cells/#size-cells without "ranges" or child "reg" property
  1.dts: Warning (unique_unit_address): /interrupt-controller@0: duplicate 
unit-address (also used in node /memory@0)
  1.dts: Warning (chosen_node_stdout_path): /chosen:linux,stdout-path: Use 
'stdout-path' instead
  dtc: livetree.c:575: get_node_by_phandle: Assertion `generate_fixups' failed.
  Aborted (core dumped)
  
- 
  The assertion is fired because get_node_by_phandle receives a phandle
  value of 0, which is unexpected, unless fixups are needed (They are not,
  when running the dtc command).
  
- 
- 
- Back inside pnv_dt_serial, if the line that sets "interrupt-parent" for the 
serial device node is commented out, the dtc crash is prevented. Looking at 
hw/ppc/e500.c, it takes care of allocating necessary phandle values in the 
nodes, so a similar method can be adopted for powernv.
- 
+ Back inside pnv_dt_serial, if the line that sets "interrupt-parent" for
+ the serial device node is commented out, the dtc crash is prevented.
+ Looking at hw/ppc/e500.c, it takes care of allocating necessary phandle
+ values in the nodes, so a similar method can be adopted for powernv.
  
  The dtb is attached.

-- 
You received this bug notification because you are a member of qemu-
devel-ml, which is subscribed to QEMU.
https://bugs.launchpad.net/bugs/1826827

Title:
  dtc crash; pnv_dt_serial cannot find lpc's phandle

Status in QEMU:
  New

Bug description:
  Qemu version:
  QEMU emulator version 4.0.50 (v4.0.0-142-ge0fb2c3d89)
  Copyright (c) 2003-2019 Fabrice Bellard and the QEMU Project developers

  dtc version:
  Version: DTC 1.5.0-g5c3513f6

  -
  pnv_dt_serial has a line which is supposed to set the interrupt-parent of the 
"isa-serial@i3f8" node to the phandle of "lpc@0".

  To that end, it calls fdt_get_phandle as shown below:
  _FDT((fdt_setprop_cell(fdt, node, "interrupt-parent", fdt_get_phandle(fdt, 
lpc_off;

  The function fdt_get_phandle fails to find the property "phandle" (or
  "linux,phandle") for the lpc node. Consequently, pnv_dt_serial sets
  the interrupt-parent to 0.

  Now boot the qemu-system-ppc64 powernv machine, and extract the fdt by
  using the qemu monitor's pmemsave command, taking help of the OPAL
  firmware's messages to locate the fdt in the physical ram.

  qemu-sy

[Qemu-devel] [PATCH v1 4/5] hw/arm: Add the STM32F4xx SoC

[Alistair Francis]

Signed-off-by: Alistair Francis 
---
 MAINTAINERS |   8 +
 default-configs/arm-softmmu.mak |   1 +
 hw/arm/Kconfig  |   3 +
 hw/arm/Makefile.objs|   1 +
 hw/arm/stm32f405_soc.c  | 292 
 include/hw/arm/stm32f405_soc.h  |  70 
 6 files changed, 375 insertions(+)
 create mode 100644 hw/arm/stm32f405_soc.c
 create mode 100644 include/hw/arm/stm32f405_soc.h

diff --git a/MAINTAINERS b/MAINTAINERS
index dabbfccf9c..c9772735cf 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -803,6 +803,14 @@ F: hw/adc/*
 F: hw/ssi/stm32f2xx_spi.c
 F: include/hw/*/stm32*.h
 
+STM32F405
+M: Alistair Francis 
+M: Peter Maydell 
+S: Maintained
+F: hw/arm/stm32f405_soc.c
+F: hw/misc/stm32f4xx_syscfg.c
+F: hw/misc/stm32f4xx_exti.c
+
 Netduino 2
 M: Alistair Francis 
 M: Peter Maydell 
diff --git a/default-configs/arm-softmmu.mak b/default-configs/arm-softmmu.mak
index 8eb57de211..e079f10624 100644
--- a/default-configs/arm-softmmu.mak
+++ b/default-configs/arm-softmmu.mak
@@ -98,6 +98,7 @@ CONFIG_STM32F2XX_SPI=y
 CONFIG_STM32F205_SOC=y
 CONFIG_STM32F4XX_SYSCFG=y
 CONFIG_STM32F4XX_EXTI=y
+CONFIG_STM32F405_SOC=y
 CONFIG_NRF51_SOC=y
 
 CONFIG_CMSDK_APB_TIMER=y
diff --git a/hw/arm/Kconfig b/hw/arm/Kconfig
index d298fbdc89..3a98bce15a 100644
--- a/hw/arm/Kconfig
+++ b/hw/arm/Kconfig
@@ -62,6 +62,9 @@ config RASPI
 config STM32F205_SOC
 bool
 
+config STM32F405_SOC
+bool
+
 config XLNX_ZYNQMP_ARM
 bool
 
diff --git a/hw/arm/Makefile.objs b/hw/arm/Makefile.objs
index fa57c7c770..36c3ff54c3 100644
--- a/hw/arm/Makefile.objs
+++ b/hw/arm/Makefile.objs
@@ -26,6 +26,7 @@ obj-$(CONFIG_STRONGARM) += strongarm.o
 obj-$(CONFIG_ALLWINNER_A10) += allwinner-a10.o cubieboard.o
 obj-$(CONFIG_RASPI) += bcm2835_peripherals.o bcm2836.o raspi.o
 obj-$(CONFIG_STM32F205_SOC) += stm32f205_soc.o
+obj-$(CONFIG_STM32F405_SOC) += stm32f405_soc.o
 obj-$(CONFIG_XLNX_ZYNQMP_ARM) += xlnx-zynqmp.o xlnx-zcu102.o
 obj-$(CONFIG_XLNX_VERSAL) += xlnx-versal.o xlnx-versal-virt.o
 obj-$(CONFIG_FSL_IMX25) += fsl-imx25.o imx25_pdk.o
diff --git a/hw/arm/stm32f405_soc.c b/hw/arm/stm32f405_soc.c
new file mode 100644
index 00..83adec51a2
--- /dev/null
+++ b/hw/arm/stm32f405_soc.c
@@ -0,0 +1,292 @@
+/*
+ * STM32F405 SoC
+ *
+ * Copyright (c) 2014 Alistair Francis 
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to 
deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 
FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#include "qemu/osdep.h"
+#include "qapi/error.h"
+#include "qemu-common.h"
+#include "hw/arm/arm.h"
+#include "exec/address-spaces.h"
+#include "hw/arm/stm32f405_soc.h"
+#include "hw/misc/unimp.h"
+
+#define SYSCFG_ADD 0x40013800
+static const uint32_t usart_addr[] = { 0x40011000, 0x40004400, 0x40004800,
+   0x40004C00, 0x40005000, 0x40011400,
+   0x40007800, 0x40007C00 };
+/* At the moment only Timer 2 to 5 are modelled */
+static const uint32_t timer_addr[] = { 0x4000, 0x4400,
+   0x4800, 0x4C00 };
+#define ADC_ADDR   0x40012000
+static const uint32_t spi_addr[] =   { 0x40013000, 0x40003800, 0x40003C00,
+   0x40013400, 0x40015000, 0x40015400 };
+#define EXTI_ADDR  0x40013C00
+
+#define SYSCFG_IRQ   71
+static const int usart_irq[] = { 37, 38, 39, 52, 53, 71, 82, 83 };
+static const int timer_irq[] = { 28, 29, 30, 50 };
+#define ADC_IRQ 18
+static const int spi_irq[] =   { 35, 36, 51, 0, 0, 0 };
+static const int exti_irq[] =  { 6, 7, 8, 9, 10, 23, 23, 23, 23, 23, 40,
+ 40, 40, 40, 40, 40} ;
+
+
+static void stm32f405_soc_initfn(Object *obj)
+{
+STM32F405State *s = STM32F405_SOC(obj);
+int i;
+
+sysbus_init_child_obj(obj, "armv7m", &s->armv7m, sizeof(s->armv7m),
+  TYPE_ARMV7M);
+
+sysbus_init_child_obj(obj, "syscfg", &s->syscfg, si

[Qemu-devel] [PATCH v1 3/5] hw/misc: Add the STM32F4xx EXTI device

[Alistair Francis]

Signed-off-by: Alistair Francis 
---
 default-configs/arm-softmmu.mak  |   1 +
 hw/misc/Kconfig  |   3 +
 hw/misc/Makefile.objs|   1 +
 hw/misc/stm32f4xx_exti.c | 175 +++
 include/hw/misc/stm32f4xx_exti.h |  57 ++
 5 files changed, 237 insertions(+)
 create mode 100644 hw/misc/stm32f4xx_exti.c
 create mode 100644 include/hw/misc/stm32f4xx_exti.h

diff --git a/default-configs/arm-softmmu.mak b/default-configs/arm-softmmu.mak
index c5cfdb857d..8eb57de211 100644
--- a/default-configs/arm-softmmu.mak
+++ b/default-configs/arm-softmmu.mak
@@ -97,6 +97,7 @@ CONFIG_STM32F2XX_ADC=y
 CONFIG_STM32F2XX_SPI=y
 CONFIG_STM32F205_SOC=y
 CONFIG_STM32F4XX_SYSCFG=y
+CONFIG_STM32F4XX_EXTI=y
 CONFIG_NRF51_SOC=y
 
 CONFIG_CMSDK_APB_TIMER=y
diff --git a/hw/misc/Kconfig b/hw/misc/Kconfig
index c6ff39aeeb..3748b5f11a 100644
--- a/hw/misc/Kconfig
+++ b/hw/misc/Kconfig
@@ -83,6 +83,9 @@ config STM32F2XX_SYSCFG
 config STM32F4XX_SYSCFG
 bool
 
+config STM32F4XX_EXTI
+bool
+
 config MIPS_ITU
 bool
 
diff --git a/hw/misc/Makefile.objs b/hw/misc/Makefile.objs
index 1413b1f232..74c7ca6c05 100644
--- a/hw/misc/Makefile.objs
+++ b/hw/misc/Makefile.objs
@@ -58,6 +58,7 @@ obj-$(CONFIG_ZYNQ) += zynq_slcr.o
 obj-$(CONFIG_ZYNQ) += zynq-xadc.o
 obj-$(CONFIG_STM32F2XX_SYSCFG) += stm32f2xx_syscfg.o
 obj-$(CONFIG_STM32F4XX_SYSCFG) += stm32f4xx_syscfg.o
+obj-$(CONFIG_STM32F4XX_EXTI) += stm32f4xx_exti.o
 obj-$(CONFIG_MIPS_CPS) += mips_cmgcr.o
 obj-$(CONFIG_MIPS_CPS) += mips_cpc.o
 obj-$(CONFIG_MIPS_ITU) += mips_itu.o
diff --git a/hw/misc/stm32f4xx_exti.c b/hw/misc/stm32f4xx_exti.c
new file mode 100644
index 00..b31f06cdca
--- /dev/null
+++ b/hw/misc/stm32f4xx_exti.c
@@ -0,0 +1,175 @@
+/*
+ * STM32F4XX EXTI
+ *
+ * Copyright (c) 2014 Alistair Francis 
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to 
deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 
FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#include "qemu/osdep.h"
+#include "hw/sysbus.h"
+#include "qemu/log.h"
+#include "hw/misc/stm32f4xx_exti.h"
+
+#ifndef STM_EXTI_ERR_DEBUG
+#define STM_EXTI_ERR_DEBUG 0
+#endif
+
+#define DB_PRINT_L(lvl, fmt, args...) do { \
+if (STM_EXTI_ERR_DEBUG >= lvl) { \
+qemu_log("%s: " fmt, __func__, ## args); \
+} \
+} while (0)
+
+#define DB_PRINT(fmt, args...) DB_PRINT_L(1, fmt, ## args)
+
+#define NUM_GPIO_EVENT_IN_LINES 16
+#define NUM_INTERRUPT_OUT_LINES 16
+
+static void stm32f4xx_exti_reset(DeviceState *dev)
+{
+STM32F4xxExtiState *s = STM32F4XX_EXTI(dev);
+
+s->exti_imr = 0x;
+s->exti_emr = 0x;
+s->exti_rtsr = 0x;
+s->exti_ftsr = 0x;
+s->exti_swier = 0x;
+s->exti_pr = 0x;
+}
+
+static void stm32f4xx_exti_set_irq(void *opaque, int irq, int level)
+{
+STM32F4xxExtiState *s = opaque;
+
+DB_PRINT("Set EXTI: %d to %d\n", irq, level);
+
+if (level) {
+qemu_irq_pulse(s->irq[irq]);
+s->exti_pr |= 1 << irq;
+}
+}
+
+static uint64_t stm32f4xx_exti_read(void *opaque, hwaddr addr,
+ unsigned int size)
+{
+STM32F4xxExtiState *s = opaque;
+
+DB_PRINT("0x%x\n", (uint) addr);
+
+switch (addr) {
+case EXTI_IMR:
+return s->exti_imr;
+case EXTI_EMR:
+return s->exti_emr;
+case EXTI_RTSR:
+return s->exti_rtsr;
+case EXTI_FTSR:
+return s->exti_ftsr;
+case EXTI_SWIER:
+return s->exti_swier;
+case EXTI_PR:
+return s->exti_pr;
+default:
+qemu_log_mask(LOG_GUEST_ERROR,
+  "STM32F4XX_exti_read: Bad offset %x\n", (int)addr);
+return 0;
+}
+return 0;
+}
+
+static void stm32f4xx_exti_write(void *opaque, hwaddr addr,
+   uint64_t val64, unsigned int size)
+{
+STM32F4xxExtiState *s = opaque;
+uint32_t value = (uint32_t) val64;
+
+DB_PRINT("0x%x, 0x%x\n", value, (uint) addr);
+
+switch (addr) {
+case EXTI_IMR:
+s->exti_imr = value;

[Qemu-devel] [PATCH v1 5/5] hw/arm: Add the Netduino Plus 2

[Alistair Francis]

Signed-off-by: Alistair Francis 
---
 MAINTAINERS |  6 +++
 default-configs/arm-softmmu.mak |  1 +
 hw/arm/Kconfig  |  3 ++
 hw/arm/Makefile.objs|  1 +
 hw/arm/netduinoplus2.c  | 77 +
 5 files changed, 88 insertions(+)
 create mode 100644 hw/arm/netduinoplus2.c

diff --git a/MAINTAINERS b/MAINTAINERS
index c9772735cf..9b0af5a0b0 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -817,6 +817,12 @@ M: Peter Maydell 
 S: Maintained
 F: hw/arm/netduino2.c
 
+Netduino Plus 2
+M: Alistair Francis 
+M: Peter Maydell 
+S: Maintained
+F: hw/arm/netduinoplus2.c
+
 SmartFusion2
 M: Subbaraya Sundeep 
 M: Peter Maydell 
diff --git a/default-configs/arm-softmmu.mak b/default-configs/arm-softmmu.mak
index e079f10624..1e2c82f201 100644
--- a/default-configs/arm-softmmu.mak
+++ b/default-configs/arm-softmmu.mak
@@ -46,6 +46,7 @@ CONFIG_A15MPCORE=y
 
 CONFIG_ARM_V7M=y
 CONFIG_NETDUINO2=y
+CONFIG_NETDUINOPLUS2=y
 
 CONFIG_ARM_GIC=y
 CONFIG_ARM_TIMER=y
diff --git a/hw/arm/Kconfig b/hw/arm/Kconfig
index 3a98bce15a..13fc779308 100644
--- a/hw/arm/Kconfig
+++ b/hw/arm/Kconfig
@@ -26,6 +26,9 @@ config MUSICPAL
 config NETDUINO2
 bool
 
+config NETDUINOPLUS2
+bool
+
 config NSERIES
 bool
 
diff --git a/hw/arm/Makefile.objs b/hw/arm/Makefile.objs
index 36c3ff54c3..1f216f4d93 100644
--- a/hw/arm/Makefile.objs
+++ b/hw/arm/Makefile.objs
@@ -8,6 +8,7 @@ obj-$(CONFIG_INTEGRATOR) += integratorcp.o
 obj-$(CONFIG_MAINSTONE) += mainstone.o
 obj-$(CONFIG_MUSICPAL) += musicpal.o
 obj-$(CONFIG_NETDUINO2) += netduino2.o
+obj-$(CONFIG_NETDUINOPLUS2) += netduinoplus2.o
 obj-$(CONFIG_NSERIES) += nseries.o
 obj-$(CONFIG_OMAP) += omap_sx1.o palm.o
 obj-$(CONFIG_PXA2XX) += gumstix.o spitz.o tosa.o z2.o
diff --git a/hw/arm/netduinoplus2.c b/hw/arm/netduinoplus2.c
new file mode 100644
index 00..1f585cf09f
--- /dev/null
+++ b/hw/arm/netduinoplus2.c
@@ -0,0 +1,77 @@
+/*
+ * Netduino Plus 2 Machine Model
+ *
+ * Copyright (c) 2014 Alistair Francis 
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to 
deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 
FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#include "qemu/osdep.h"
+#include "qapi/error.h"
+#include "hw/boards.h"
+#include "qemu/error-report.h"
+#include "hw/arm/stm32f405_soc.h"
+#include "hw/arm/arm.h"
+
+typedef struct ARMV7MResetArgs {
+ARMCPU *cpu;
+uint32_t reset_sp;
+uint32_t reset_pc;
+} ARMV7MResetArgs;
+
+static void armv7m_reset(void *opaque)
+{
+ARMV7MResetArgs *args = opaque;
+
+cpu_reset(CPU(args->cpu));
+
+args->cpu->env.regs[13] = args->reset_sp & 0xFFFC;
+args->cpu->env.thumb = args->reset_pc & 1;
+args->cpu->env.regs[15] = args->reset_pc & ~1;
+}
+
+static void netduinoplus2_init(MachineState *machine)
+{
+DeviceState *dev;
+ARMV7MResetArgs reset_args;
+uint64_t entry;
+
+dev = qdev_create(NULL, TYPE_STM32F405_SOC);
+qdev_prop_set_string(dev, "cpu-type", ARM_CPU_TYPE_NAME("cortex-m4"));
+object_property_set_bool(OBJECT(dev), true, "realized", &error_fatal);
+
+armv7m_load_kernel(ARM_CPU(first_cpu), machine->kernel_filename,
+   FLASH_SIZE, &entry);
+
+reset_args = (ARMV7MResetArgs) {
+.cpu = ARM_CPU(first_cpu),
+.reset_pc = entry,
+.reset_sp = (SRAM_BASE_ADDRESS + (SRAM_SIZE * 2) / 3),
+};
+qemu_register_reset(armv7m_reset,
+g_memdup(&reset_args, sizeof(reset_args)));
+}
+
+static void netduinoplus2_machine_init(MachineClass *mc)
+{
+mc->desc = "Netduino Plus 2 Machine";
+mc->init = netduinoplus2_init;
+}
+
+DEFINE_MACHINE("netduinoplus2", netduinoplus2_machine_init)
-- 
2.21.0

[Qemu-devel] [PATCH v1 0/5] Add the STM32F405 and Netduino Plus 2 machine

[Alistair Francis]

Now that the Arm-M4 CPU has been added to QEMU we can add the Netduino
Plus 2 machine. This is very similar to the STM32F205 and Netduino 2 SoC
and machine.


Alistair Francis (5):
  armv7m: Allow entry information to be returned
  hw/misc: Add the STM32F4xx Sysconfig device
  hw/misc: Add the STM32F4xx EXTI device
  hw/arm: Add the STM32F4xx SoC
  hw/arm: Add the Netduino Plus 2

 MAINTAINERS|  14 ++
 default-configs/arm-softmmu.mak|   4 +
 hw/arm/Kconfig |   6 +
 hw/arm/Makefile.objs   |   2 +
 hw/arm/armv7m.c|   6 +-
 hw/arm/microbit.c  |   2 +-
 hw/arm/mps2-tz.c   |   3 +-
 hw/arm/mps2.c  |   2 +-
 hw/arm/msf2-som.c  |   2 +-
 hw/arm/musca.c |   3 +-
 hw/arm/netduino2.c |   2 +-
 hw/arm/netduinoplus2.c |  77 
 hw/arm/stellaris.c |   3 +-
 hw/arm/stm32f405_soc.c | 292 +
 hw/misc/Kconfig|   6 +
 hw/misc/Makefile.objs  |   2 +
 hw/misc/stm32f4xx_exti.c   | 175 +
 hw/misc/stm32f4xx_syscfg.c | 275 +++
 include/hw/arm/arm.h   |   4 +-
 include/hw/arm/stm32f405_soc.h |  70 +++
 include/hw/misc/stm32f4xx_exti.h   |  57 ++
 include/hw/misc/stm32f4xx_syscfg.h |  62 ++
 22 files changed, 1058 insertions(+), 11 deletions(-)
 create mode 100644 hw/arm/netduinoplus2.c
 create mode 100644 hw/arm/stm32f405_soc.c
 create mode 100644 hw/misc/stm32f4xx_exti.c
 create mode 100644 hw/misc/stm32f4xx_syscfg.c
 create mode 100644 include/hw/arm/stm32f405_soc.h
 create mode 100644 include/hw/misc/stm32f4xx_exti.h
 create mode 100644 include/hw/misc/stm32f4xx_syscfg.h

-- 
2.21.0

[Qemu-devel] [PATCH v1 2/5] hw/misc: Add the STM32F4xx Sysconfig device

[Alistair Francis]

Signed-off-by: Alistair Francis 
---
 default-configs/arm-softmmu.mak|   1 +
 hw/misc/Kconfig|   3 +
 hw/misc/Makefile.objs  |   1 +
 hw/misc/stm32f4xx_syscfg.c | 275 +
 include/hw/misc/stm32f4xx_syscfg.h |  62 +++
 5 files changed, 342 insertions(+)
 create mode 100644 hw/misc/stm32f4xx_syscfg.c
 create mode 100644 include/hw/misc/stm32f4xx_syscfg.h

diff --git a/default-configs/arm-softmmu.mak b/default-configs/arm-softmmu.mak
index 613d19a06d..c5cfdb857d 100644
--- a/default-configs/arm-softmmu.mak
+++ b/default-configs/arm-softmmu.mak
@@ -96,6 +96,7 @@ CONFIG_STM32F2XX_SYSCFG=y
 CONFIG_STM32F2XX_ADC=y
 CONFIG_STM32F2XX_SPI=y
 CONFIG_STM32F205_SOC=y
+CONFIG_STM32F4XX_SYSCFG=y
 CONFIG_NRF51_SOC=y
 
 CONFIG_CMSDK_APB_TIMER=y
diff --git a/hw/misc/Kconfig b/hw/misc/Kconfig
index 5f67d0d6d9..c6ff39aeeb 100644
--- a/hw/misc/Kconfig
+++ b/hw/misc/Kconfig
@@ -80,6 +80,9 @@ config IMX
 config STM32F2XX_SYSCFG
 bool
 
+config STM32F4XX_SYSCFG
+bool
+
 config MIPS_ITU
 bool
 
diff --git a/hw/misc/Makefile.objs b/hw/misc/Makefile.objs
index c71e07ae35..1413b1f232 100644
--- a/hw/misc/Makefile.objs
+++ b/hw/misc/Makefile.objs
@@ -57,6 +57,7 @@ obj-$(CONFIG_SLAVIO) += slavio_misc.o
 obj-$(CONFIG_ZYNQ) += zynq_slcr.o
 obj-$(CONFIG_ZYNQ) += zynq-xadc.o
 obj-$(CONFIG_STM32F2XX_SYSCFG) += stm32f2xx_syscfg.o
+obj-$(CONFIG_STM32F4XX_SYSCFG) += stm32f4xx_syscfg.o
 obj-$(CONFIG_MIPS_CPS) += mips_cmgcr.o
 obj-$(CONFIG_MIPS_CPS) += mips_cpc.o
 obj-$(CONFIG_MIPS_ITU) += mips_itu.o
diff --git a/hw/misc/stm32f4xx_syscfg.c b/hw/misc/stm32f4xx_syscfg.c
new file mode 100644
index 00..c0aaeeaf6c
--- /dev/null
+++ b/hw/misc/stm32f4xx_syscfg.c
@@ -0,0 +1,275 @@
+/*
+ * STM32F4xx SYSCFG
+ *
+ * Copyright (c) 2014 Alistair Francis 
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to 
deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 
FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#include "qemu/osdep.h"
+#include "qemu/log.h"
+#include "hw/misc/stm32f4xx_syscfg.h"
+
+#ifndef STM_SYSCFG_ERR_DEBUG
+#define STM_SYSCFG_ERR_DEBUG 0
+#endif
+
+#define DB_PRINT_L(lvl, fmt, args...) do { \
+if (STM_SYSCFG_ERR_DEBUG >= lvl) { \
+qemu_log("%s: " fmt, __func__, ## args); \
+} \
+} while (0)
+
+#define DB_PRINT(fmt, args...) DB_PRINT_L(1, fmt, ## args)
+
+static void stm32f4xx_syscfg_reset(DeviceState *dev)
+{
+STM32F4xxSyscfgState *s = STM32F4XX_SYSCFG(dev);
+
+s->syscfg_memrmp = 0x;
+s->syscfg_pmc = 0x;
+s->syscfg_exticr1 = 0x;
+s->syscfg_exticr2 = 0x;
+s->syscfg_exticr3 = 0x;
+s->syscfg_exticr4 = 0x;
+s->syscfg_cmpcr = 0x;
+}
+
+static void stm32f4xx_syscfg_set_irq(void *opaque, int irq, int level)
+{
+STM32F4xxSyscfgState *s = opaque;
+uint8_t config;
+
+DB_PRINT("Interupt: GPIO: %d, Line: %d; Level: %d\n", irq / 16,
+ irq % 16, level);
+
+config = irq / 16;
+
+switch (irq % 16) {
+case 0:
+if ((s->syscfg_exticr1 & 0xF) == config) {
+qemu_set_irq(s->gpio_out[0], level);
+DB_PRINT("Pulse EXTI: 0\n");
+}
+break;
+case 1:
+if (((s->syscfg_exticr1 & 0xF0) >> 4) == config) {
+qemu_set_irq(s->gpio_out[1], level);
+DB_PRINT("Pulse EXTI: 1\n");
+}
+break;
+case 2:
+if (((s->syscfg_exticr1 & 0xF00) >> 8) == config) {
+qemu_set_irq(s->gpio_out[2], level);
+DB_PRINT("Pulse EXTI: 2\n");
+}
+break;
+case 3:
+if (((s->syscfg_exticr1 & 0xF000) >> 12) == config) {
+qemu_set_irq(s->gpio_out[3], level);
+DB_PRINT("Pulse EXTI: 3\n");
+}
+break;
+case 4:
+if ((s->syscfg_exticr2 & 0xF) == config) {
+qemu_set_irq(s->gpio_out[4], level);
+DB_PRINT("Pulse EXTI: 4\n");
+}
+break;
+case 5:
+if (((s->syscfg_exticr2 & 0xF0) >> 4) == config) {
+ 

[Qemu-devel] [PATCH v1 1/5] armv7m: Allow entry information to be returned

[Alistair Francis]

Allow the kernel's entry point information to be returned when loading a
kernel.

Signed-off-by: Alistair Francis 
---
 hw/arm/armv7m.c  | 6 +++---
 hw/arm/microbit.c| 2 +-
 hw/arm/mps2-tz.c | 3 ++-
 hw/arm/mps2.c| 2 +-
 hw/arm/msf2-som.c| 2 +-
 hw/arm/musca.c   | 3 ++-
 hw/arm/netduino2.c   | 2 +-
 hw/arm/stellaris.c   | 3 ++-
 include/hw/arm/arm.h | 4 +++-
 9 files changed, 16 insertions(+), 11 deletions(-)

diff --git a/hw/arm/armv7m.c b/hw/arm/armv7m.c
index c4b2a9a1f5..a52328f188 100644
--- a/hw/arm/armv7m.c
+++ b/hw/arm/armv7m.c
@@ -286,10 +286,10 @@ static void armv7m_reset(void *opaque)
 cpu_reset(CPU(cpu));
 }
 
-void armv7m_load_kernel(ARMCPU *cpu, const char *kernel_filename, int mem_size)
+void armv7m_load_kernel(ARMCPU *cpu, const char *kernel_filename, int mem_size,
+uint64_t *entry)
 {
 int image_size;
-uint64_t entry;
 uint64_t lowaddr;
 int big_endian;
 AddressSpace *as;
@@ -311,7 +311,7 @@ void armv7m_load_kernel(ARMCPU *cpu, const char 
*kernel_filename, int mem_size)
 
 if (kernel_filename) {
 image_size = load_elf_as(kernel_filename, NULL, NULL, NULL,
- &entry, &lowaddr,
+ entry, &lowaddr,
  NULL, big_endian, EM_ARM, 1, 0, as);
 if (image_size < 0) {
 image_size = load_image_targphys_as(kernel_filename, 0,
diff --git a/hw/arm/microbit.c b/hw/arm/microbit.c
index da67bf6d9d..03147750f1 100644
--- a/hw/arm/microbit.c
+++ b/hw/arm/microbit.c
@@ -58,7 +58,7 @@ static void microbit_init(MachineState *machine)
 mr, -1);
 
 armv7m_load_kernel(ARM_CPU(first_cpu), machine->kernel_filename,
-   NRF51_SOC(soc)->flash_size);
+   NRF51_SOC(soc)->flash_size, NULL);
 }
 
 static void microbit_machine_class_init(ObjectClass *oc, void *data)
diff --git a/hw/arm/mps2-tz.c b/hw/arm/mps2-tz.c
index f79f090a4a..f6dc7dce2a 100644
--- a/hw/arm/mps2-tz.c
+++ b/hw/arm/mps2-tz.c
@@ -613,7 +613,8 @@ static void mps2tz_common_init(MachineState *machine)
 
 create_unimplemented_device("FPGA NS PC", 0x48007000, 0x1000);
 
-armv7m_load_kernel(ARM_CPU(first_cpu), machine->kernel_filename, 0x40);
+armv7m_load_kernel(ARM_CPU(first_cpu), machine->kernel_filename, 0x40,
+   NULL);
 }
 
 static void mps2_tz_idau_check(IDAUInterface *ii, uint32_t address,
diff --git a/hw/arm/mps2.c b/hw/arm/mps2.c
index e3d698ba6c..55d2273a54 100644
--- a/hw/arm/mps2.c
+++ b/hw/arm/mps2.c
@@ -328,7 +328,7 @@ static void mps2_common_init(MachineState *machine)
 system_clock_scale = NANOSECONDS_PER_SECOND / SYSCLK_FRQ;
 
 armv7m_load_kernel(ARM_CPU(first_cpu), machine->kernel_filename,
-   0x40);
+   0x40, NULL);
 }
 
 static void mps2_class_init(ObjectClass *oc, void *data)
diff --git a/hw/arm/msf2-som.c b/hw/arm/msf2-som.c
index 2432b5e935..f81be74716 100644
--- a/hw/arm/msf2-som.c
+++ b/hw/arm/msf2-som.c
@@ -92,7 +92,7 @@ static void emcraft_sf2_s2s010_init(MachineState *machine)
 sysbus_connect_irq(SYS_BUS_DEVICE(&soc->spi[0]), 1, cs_line);
 
 armv7m_load_kernel(ARM_CPU(first_cpu), machine->kernel_filename,
-   soc->envm_size);
+   soc->envm_size, NULL);
 }
 
 static void emcraft_sf2_machine_init(MachineClass *mc)
diff --git a/hw/arm/musca.c b/hw/arm/musca.c
index 23aff43f4b..59460ba090 100644
--- a/hw/arm/musca.c
+++ b/hw/arm/musca.c
@@ -589,7 +589,8 @@ static void musca_init(MachineState *machine)
  "cfg_sec_resp", 0));
 }
 
-armv7m_load_kernel(ARM_CPU(first_cpu), machine->kernel_filename, 
0x200);
+armv7m_load_kernel(ARM_CPU(first_cpu), machine->kernel_filename, 0x200,
+   NULL);
 }
 
 static void musca_class_init(ObjectClass *oc, void *data)
diff --git a/hw/arm/netduino2.c b/hw/arm/netduino2.c
index f936017d4a..38a6d8fdd1 100644
--- a/hw/arm/netduino2.c
+++ b/hw/arm/netduino2.c
@@ -38,7 +38,7 @@ static void netduino2_init(MachineState *machine)
 object_property_set_bool(OBJECT(dev), true, "realized", &error_fatal);
 
 armv7m_load_kernel(ARM_CPU(first_cpu), machine->kernel_filename,
-   FLASH_SIZE);
+   FLASH_SIZE, NULL);
 }
 
 static void netduino2_machine_init(MachineClass *mc)
diff --git a/hw/arm/stellaris.c b/hw/arm/stellaris.c
index 05f86749f4..276b1acc46 100644
--- a/hw/arm/stellaris.c
+++ b/hw/arm/stellaris.c
@@ -1459,7 +1459,8 @@ static void stellaris_init(MachineState *ms, 
stellaris_board_info *board)
 create_unimplemented_device("hibernation", 0x400fc000, 0x1000);
 create_unimplemented_device("flash-control", 0x400fd000, 0x1000);
 
-armv7m_load_kernel(ARM_CPU(first_cpu), ms->kernel_filename, flash_size);
+armv7m_load_kernel(ARM_CPU(first_cpu), ms-

Re: [Qemu-devel] [PATCH v2 0/8] tests/qemu-iotests: Run basic iotests during "make check"

[Thomas Huth]

On 29/04/2019 05.47, no-re...@patchew.org wrote:
> Patchew URL: https://patchew.org/QEMU/20190428155451.15653-1-th...@redhat.com/
> 
> This series failed the asan build test. Please find the testing commands and
> their output below. If you have Docker installed, you can probably reproduce 
> it
> locally.
> 
> === TEST SCRIPT BEGIN ===
> #!/bin/bash
> time make docker-test-debug@fedora TARGET_LIST=x86_64-softmmu J=14 NETWORK=1
> === TEST SCRIPT END ===
> 
> The full log is available at
> http://patchew.org/logs/20190428155451.15653-1-th...@redhat.com/testing.asan/?type=message.

The asan test failed since it could not check out the repository ...
a networking problem?

Anyway, looks like there was a real bug here:

 
https://patchew.org/logs/20190428155451.15653-1-th...@redhat.com/testing.docker-clang@ubuntu/?type=message

Test 162 failed with:

162 - output mismatch (see 162.out.bad)
--- /tmp/qemu-test/src/tests/qemu-iotests/162.out   2019-04-28 
16:09:31.0 +
+++ /tmp/qemu-test/build/tests/qemu-iotests/162.out.bad 2019-04-28 
16:24:21.669646149 +
@@ -6,7 +6,9 @@
 image: nbd+unix://?socket=42
 
 === SSH ===
+qemu-img: warning: GLib: getpwuid_r(): failed due to unknown user id (1003)
 qemu-img: Could not open 'json:{"driver": "ssh", "host": "localhost", "port": 
"0", "path": "/foo"}': Failed to connect socket: Connection refused
+qemu-img: warning: GLib: getpwuid_r(): failed due to unknown user id (1003)
 qemu-img: Could not open 'driver=ssh,host=localhost,port=0,path=/foo': Failed 
to connect socket: Connection refused
 qemu-img: Could not open 'json:{"driver": "ssh", "host": "localhost", "port": 
0.42, "path": "/foo"}': Parameter 'port' expects a number
 qemu-img: Could not open 'driver=ssh,host=localhost,port=0.42,path=/foo': 
Parameter 'port' expects a number

... I think I'll remove 162 from the "auto" group to avoid this.

 Thomas

Re: [Qemu-devel] [PATCH v2 0/5] fw_cfg_test refactor and add two test cases

[Li Qiang]

Li Qiang  于2019年4月25日周四 下午10:29写道：

>
>
> Thomas Huth  于2019年4月25日周四 下午5:57写道：
>
>> On 24/04/2019 16.06, Li Qiang wrote:
>> > In the disscuss of adding reboot timeout test case:
>> > https://lists.gnu.org/archive/html/qemu-devel/2019-04/msg03304.html
>> >
>> > Philippe suggested we should uses the only related option for one
>> > specific test. However currently we uses one QTestState for all the
>> > test cases. In order to achieve Philippe's idea, I split the test case
>> > for its own QTestState. As this patchset has changed a lot, I don't bump
>> > the version.
>> >
>> > Change since v1:
>> > Add a patch to store the reboot_timeout as little endian
>> > Fix the endian issue per Thomas's review
>>
>> The test still aborts on a big endian host:
>>
>> $ QTEST_QEMU_BINARY=x86_64-softmmu/qemu-system-x86_64 tests/fw_cfg-test
>> /x86_64/fw_cfg/signature: OK
>> /x86_64/fw_cfg/id: OK
>> /x86_64/fw_cfg/uuid: OK
>> /x86_64/fw_cfg/ram_size: OK
>> /x86_64/fw_cfg/nographic: OK
>> /x86_64/fw_cfg/nb_cpus: OK
>> /x86_64/fw_cfg/max_cpus: OK
>> /x86_64/fw_cfg/numa: OK
>> /x86_64/fw_cfg/boot_menu: OK
>> /x86_64/fw_cfg/reboot_timeout: **
>>
>> ERROR:/home/thuth/devel/qemu/tests/fw_cfg-test.c:190:test_fw_cfg_reboot_timeout:
>> assertion failed (reboot_timeout == 15): (251658240 == 15)
>> Aborted
>>
>> 251658240 is 0x0F00, i.e. a byte-swapped 0xf = 15 ... i.e. you still
>> got an endianess issue somewhere in the code.
>>
>
>
> H,
>
> I have thought a long time, still can't point where is wrong.
>
> Let's from the result:
> 0x0f00 in the big endian laid as this:
> low ---> high
> 0x0f 00 00 00
>
> As I have swapped before the compare so it is read as this:
> low ---> high
> 00 00 00 0x0f
>
> However from the store side:
> the 15 in big endian is:
> low ---> high
> 00 00 00 0x0f
>
> But Before I store it, I convert it to little endian, so following should
> be stored:
> low ---> high
> 0x0f 00 00 00
>
> Do you apply the patch 3 and recompile the qemu binary?
>


Hello Thomas,
I have tested again this and just store it as big endian(so that the
store/load has different endianness),
I don't see any error.

Also, can we add these test sceneries(big-endian host) in our CI? so that
the bot can report for every commit.


Thanks,
Li Qiang



If it is, I may need your help as I have no big endian host device.
>
> You can debug and  inspect the memory layout and point out where is wrong.
>
> Thanks,
> Li Qiang
>
>
>
>
>
>
>
>>
>>  Thomas
>>
>

Re: [Qemu-devel] [PATCH v2 0/8] tests/qemu-iotests: Run basic iotests during "make check"

[Thomas Huth]

On 28/04/2019 18.10, no-re...@patchew.org wrote:
> Patchew URL: https://patchew.org/QEMU/20190428155451.15653-1-th...@redhat.com/
> 
> 
> 
> Hi,
> 
> This series seems to have some coding style problems. See output below for
> more information:
> 
> Type: series
> Message-id: 20190428155451.15653-1-th...@redhat.com
> Subject: [Qemu-devel] [PATCH v2 0/8] tests/qemu-iotests: Run basic iotests 
> during "make check"
> 
> === TEST SCRIPT BEGIN ===
> #!/bin/bash
> git rev-parse base > /dev/null || exit 0
> git config --local diff.renamelimit 0
> git config --local diff.renames True
> git config --local diff.algorithm histogram
> ./scripts/checkpatch.pl --mailback base..
> === TEST SCRIPT END ===
> 
> Updating 3c8cf5a9c21ff8782164d1def7f44bd888713384
> From https://github.com/patchew-project/qemu
>  * [new tag]   patchew/20190428155451.15653-1-th...@redhat.com -> 
> patchew/20190428155451.15653-1-th...@redhat.com
> Switched to a new branch 'test'
> 7bb09e08a3 tests: Run the iotests during "make check" again
> 3d905a091e tests/qemu-iotests/group: Re-use the "auto" group for tests that 
> can always run
> 565003ac8a tests/qemu-iotests: Remove the "_supported_os Linux" line from 
> many tests
> fb27dba3d9 cirrus / travis: Add gnu-sed and bash for macOS and FreeBSD
> 02ac8a4bf6 tests/qemu-iotests: Do not hard-code the path to bash
> 34c6a891ea tests/qemu-iotests/check: Pick a default machine if necessary
> d091edf7c1 tests/qemu-iotests/005: Add a sanity check for large sparse file 
> support
> 3cf4caa193 tests/qemu-iotests: Fix output of qemu-io related tests
> 
> === OUTPUT BEGIN ===
> 1/8 Checking commit 3cf4caa193cc (tests/qemu-iotests: Fix output of qemu-io 
> related tests)
> 2/8 Checking commit d091edf7c1ef (tests/qemu-iotests/005: Add a sanity check 
> for large sparse file support)
> 3/8 Checking commit 34c6a891ea6e (tests/qemu-iotests/check: Pick a default 
> machine if necessary)
> 4/8 Checking commit 02ac8a4bf608 (tests/qemu-iotests: Do not hard-code the 
> path to bash)
> 5/8 Checking commit fb27dba3d9f0 (cirrus / travis: Add gnu-sed and bash for 
> macOS and FreeBSD)
> 6/8 Checking commit 565003ac8a70 (tests/qemu-iotests: Remove the 
> "_supported_os Linux" line from many tests)
> 7/8 Checking commit 3d905a091e64 (tests/qemu-iotests/group: Re-use the "auto" 
> group for tests that can always run)
> ERROR: trailing whitespace
> #125: FILE: tests/qemu-iotests/group:115:
> +093 $

Not an error: The trailing whitespace is currently required for the
parsing code in the "check" script.

 Thomas

Re: [Qemu-devel] [PATCH v6 5/5] block/backup: refactor: split out backup_calculate_cluster_size

[Vladimir Sementsov-Ogievskiy]

26.04.2019 21:30, Max Reitz wrote:
> On 15.04.19 16:49, Vladimir Sementsov-Ogievskiy wrote:
>> Split out cluster_size calculation. Move copy-bitmap creation above
>> block-job creation, as we are going to share it with upcoming
>> backup-top filter, which also should be created before actual block job
>> creation.
>>
>> Also, while being here, drop unnecessary "goto error" from
>> bdrv_getlength error path.
> 
> It isn’t unnecessary, though.  Before this, we invoke
> bdrv_dirty_bitmap_create_successor(), so the error path has to clean
> that up with bdrv_reclaim_dirty_bitmap().
> 
> Max
> 

Oops, will resend. I was looking at previous plain "return NULL", but missed
that in "if" branch we do thing to be rolled-back on fail.

Thank you for review!

-- 
Best regards,
Vladimir

Re: [Qemu-devel] [PATCH] trace: fix runstate tracing

[Vladimir Sementsov-Ogievskiy]

Oops, my fault, sorry:( Thank you for fixing!

May be added, that it is broken since ff12e3ae3d0.

Reviewed-by: Vladimir Sementsov-Ogievskiy 

26.04.2019 13:21, Yury Kotov wrote:
> Signed-off-by: Yury Kotov 
> ---
>   vl.c | 2 +-
>   1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/vl.c b/vl.c
> index ff5dfb6fbc..ad9b181e57 100644
> --- a/vl.c
> +++ b/vl.c
> @@ -725,7 +725,7 @@ void runstate_set(RunState new_state)
>   assert(new_state < RUN_STATE__MAX);
>   
>   trace_runstate_set(current_run_state, RunState_str(current_run_state),
> -   new_state, RunState_str(current_run_state));
> +   new_state, RunState_str(new_state));
>   
>   if (current_run_state == new_state) {
>   return;
> 


-- 
Best regards,
Vladimir

Re: [Qemu-devel] [PATCH v2 0/8] tests/qemu-iotests: Run basic iotests during "make check"

[no-reply]

Patchew URL: https://patchew.org/QEMU/20190428155451.15653-1-th...@redhat.com/



Hi,

This series failed the asan build test. Please find the testing commands and
their output below. If you have Docker installed, you can probably reproduce it
locally.

=== TEST SCRIPT BEGIN ===
#!/bin/bash
time make docker-test-debug@fedora TARGET_LIST=x86_64-softmmu J=14 NETWORK=1
=== TEST SCRIPT END ===




The full log is available at
http://patchew.org/logs/20190428155451.15653-1-th...@redhat.com/testing.asan/?type=message.
---
Email generated automatically by Patchew [https://patchew.org/].
Please send your feedback to patchew-de...@redhat.com

[Qemu-devel] Apple Hypervisor - unimplemented handler

[Programmingkid]

When running Windows 7 using "-M accel=hvf --cpu host", Windows 7 would crash. 
What was printed to the console was this:

Unimplemented handler (f8000c0c2050) for 0 (f c3) 

This message is from target/i386/hvf/x86_emu.c. The c3 seems to indicate this 
is a problem with the MOVNTI or RETN instruction.

This is the webpage I used for figuring out this: 
http://ref.x86asm.net/coder32.html. A search of the page shows another 
instruction with the c3 opcode called RETN. So I'm not 100% sure which 
instruction is the problem instruction.

In the file target/i386/hvf/x86_decode.c, this line of code makes me think it 
is RETN:

{0xc3, X86_DECODE_RET_NEAR, 0, false, NULL,
 NULL, NULL, NULL, NULL, RFLAGS_MASK_NONE}

Any help with this issue would be appreciated.

Thank you.

[Qemu-devel] [PATCH 3/4] util/cacheinfo.c: Use uintptr_t instead of unsigned long in AArch64 arch_cache_info()

[driver1998]

Windows ARM64 uses LLP64 model, which breaks current assumptions.

Signed-off-by: driver1998 
---
 util/cacheinfo.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/util/cacheinfo.c b/util/cacheinfo.c
index 3cd080b83d..a815cb0722 100644
--- a/util/cacheinfo.c
+++ b/util/cacheinfo.c
@@ -107,7 +107,7 @@ static void sys_cache_info(int *isize, int *dsize)
 static void arch_cache_info(int *isize, int *dsize)
 {
 if (*isize == 0 || *dsize == 0) {
-unsigned long ctr;
+uintptr_t ctr;
 
 /* The real cache geometry is in CCSIDR_EL1/CLIDR_EL1/CSSELR_EL1,
but (at least under Linux) these are marked protected by the
@@ -120,6 +120,8 @@ static void arch_cache_info(int *isize, int *dsize)
 if (*dsize == 0) {
 *dsize = 4 << ((ctr >> 16) & 0xf);
 }
+
+printf("%d %d\n", *isize, *dsize);
 }
 }
 
-- 
2.17.1

[Qemu-devel] [PATCH 1/4] Initial Windows on ARM (AArch64 64-Bit) host support

[driver1998]

This series of patches is for initial support of Windows 10 on ARM as a QEMU 
host.
Currently only TCG intepreter is working correctly, it crashes when TCG JIT is 
enabled.
For now we assume it is built using the clang aarch64-w64-mingw32 toolchain, 
you can get a prebuilt toolchain at https://github.com/mstorsjo/llvm-mingw.

QEMU_PACKED: Remove gcc_struct attribute in Windows non x86 targets
This attribute is for x86 only, and it generates an warning on ARM64 
Clang/MinGW targets.

Signed-off-by: driver1998 
---
 contrib/libvhost-user/libvhost-user.h | 2 +-
 include/qemu/compiler.h   | 2 +-
 scripts/cocci-macro-file.h| 7 ++-
 slirp/src/util.h  | 2 +-
 4 files changed, 9 insertions(+), 4 deletions(-)

diff --git a/contrib/libvhost-user/libvhost-user.h 
b/contrib/libvhost-user/libvhost-user.h
index 414ceb0a2f..78b33306e8 100644
--- a/contrib/libvhost-user/libvhost-user.h
+++ b/contrib/libvhost-user/libvhost-user.h
@@ -148,7 +148,7 @@ typedef struct VhostUserInflight {
 uint16_t queue_size;
 } VhostUserInflight;
 
-#if defined(_WIN32)
+#if defined(_WIN32) && (defined(__x86_64__) || defined(__i386__))
 # define VU_PACKED __attribute__((gcc_struct, packed))
 #else
 # define VU_PACKED __attribute__((packed))
diff --git a/include/qemu/compiler.h b/include/qemu/compiler.h
index 296b2fd572..09fc44cca4 100644
--- a/include/qemu/compiler.h
+++ b/include/qemu/compiler.h
@@ -28,7 +28,7 @@
 
 #define QEMU_SENTINEL __attribute__((sentinel))
 
-#if defined(_WIN32)
+#if defined(_WIN32) && (defined(__x86_64__) || defined(__i386__))
 # define QEMU_PACKED __attribute__((gcc_struct, packed))
 #else
 # define QEMU_PACKED __attribute__((packed))
diff --git a/scripts/cocci-macro-file.h b/scripts/cocci-macro-file.h
index e485cdccae..c6bbc05ba3 100644
--- a/scripts/cocci-macro-file.h
+++ b/scripts/cocci-macro-file.h
@@ -23,7 +23,12 @@
 #define QEMU_NORETURN __attribute__ ((__noreturn__))
 #define QEMU_WARN_UNUSED_RESULT __attribute__((warn_unused_result))
 #define QEMU_SENTINEL __attribute__((sentinel))
-#define QEMU_PACKED __attribute__((gcc_struct, packed))
+
+#if defined(_WIN32) && (defined(__x86_64__) || defined(__i386__))
+# define QEMU_PACKED __attribute__((gcc_struct, packed))
+#else
+# define QEMU_PACKED __attribute__((packed))
+#endif
 
 #define cat(x,y) x ## y
 #define cat2(x,y) cat(x,y)
diff --git a/slirp/src/util.h b/slirp/src/util.h
index 01f1e0e068..278828fe3f 100644
--- a/slirp/src/util.h
+++ b/slirp/src/util.h
@@ -43,7 +43,7 @@
 #include 
 #endif
 
-#if defined(_WIN32)
+#if defined(_WIN32) && (defined(__x86_64__) || defined(__i386__))
 # define SLIRP_PACKED __attribute__((gcc_struct, packed))
 #else
 # define SLIRP_PACKED __attribute__((packed))
-- 
2.17.1

[Qemu-devel] [PATCH 2/4] qga: Fix an enum conversion warning in commands-win32.c, hit by clang.

[driver1998]

Signed-off-by: driver1998 
---
 qga/commands-win32.c | 35 ++-
 1 file changed, 18 insertions(+), 17 deletions(-)

diff --git a/qga/commands-win32.c b/qga/commands-win32.c
index d40d61f605..4cdd2950bf 100644
--- a/qga/commands-win32.c
+++ b/qga/commands-win32.c
@@ -458,23 +458,24 @@ void qmp_guest_file_flush(int64_t handle, Error **errp)
 #ifdef CONFIG_QGA_NTDDSCSI
 
 static STORAGE_BUS_TYPE win2qemu[] = {
-[BusTypeUnknown] = GUEST_DISK_BUS_TYPE_UNKNOWN,
-[BusTypeScsi] = GUEST_DISK_BUS_TYPE_SCSI,
-[BusTypeAtapi] = GUEST_DISK_BUS_TYPE_IDE,
-[BusTypeAta] = GUEST_DISK_BUS_TYPE_IDE,
-[BusType1394] = GUEST_DISK_BUS_TYPE_IEEE1394,
-[BusTypeSsa] = GUEST_DISK_BUS_TYPE_SSA,
-[BusTypeFibre] = GUEST_DISK_BUS_TYPE_SSA,
-[BusTypeUsb] = GUEST_DISK_BUS_TYPE_USB,
-[BusTypeRAID] = GUEST_DISK_BUS_TYPE_RAID,
-[BusTypeiScsi] = GUEST_DISK_BUS_TYPE_ISCSI,
-[BusTypeSas] = GUEST_DISK_BUS_TYPE_SAS,
-[BusTypeSata] = GUEST_DISK_BUS_TYPE_SATA,
-[BusTypeSd] =  GUEST_DISK_BUS_TYPE_SD,
-[BusTypeMmc] = GUEST_DISK_BUS_TYPE_MMC,
+[BusTypeUnknown] = (STORAGE_BUS_TYPE)GUEST_DISK_BUS_TYPE_UNKNOWN,
+[BusTypeScsi] = (STORAGE_BUS_TYPE)GUEST_DISK_BUS_TYPE_SCSI,
+[BusTypeAtapi] = (STORAGE_BUS_TYPE)GUEST_DISK_BUS_TYPE_IDE,
+[BusTypeAta] = (STORAGE_BUS_TYPE)GUEST_DISK_BUS_TYPE_IDE,
+[BusType1394] = (STORAGE_BUS_TYPE)GUEST_DISK_BUS_TYPE_IEEE1394,
+[BusTypeSsa] = (STORAGE_BUS_TYPE)GUEST_DISK_BUS_TYPE_SSA,
+[BusTypeFibre] = (STORAGE_BUS_TYPE)GUEST_DISK_BUS_TYPE_SSA,
+[BusTypeUsb] = (STORAGE_BUS_TYPE)GUEST_DISK_BUS_TYPE_USB,
+[BusTypeRAID] = (STORAGE_BUS_TYPE)GUEST_DISK_BUS_TYPE_RAID,
+[BusTypeiScsi] = (STORAGE_BUS_TYPE)GUEST_DISK_BUS_TYPE_ISCSI,
+[BusTypeSas] = (STORAGE_BUS_TYPE)GUEST_DISK_BUS_TYPE_SAS,
+[BusTypeSata] = (STORAGE_BUS_TYPE)GUEST_DISK_BUS_TYPE_SATA,
+[BusTypeSd] =  (STORAGE_BUS_TYPE)GUEST_DISK_BUS_TYPE_SD,
+[BusTypeMmc] = (STORAGE_BUS_TYPE)GUEST_DISK_BUS_TYPE_MMC,
 #if (_WIN32_WINNT >= 0x0601)
-[BusTypeVirtual] = GUEST_DISK_BUS_TYPE_VIRTUAL,
-[BusTypeFileBackedVirtual] = GUEST_DISK_BUS_TYPE_FILE_BACKED_VIRTUAL,
+[BusTypeVirtual] = (STORAGE_BUS_TYPE)GUEST_DISK_BUS_TYPE_VIRTUAL,
+[BusTypeFileBackedVirtual] =
+(STORAGE_BUS_TYPE)GUEST_DISK_BUS_TYPE_FILE_BACKED_VIRTUAL,
 #endif
 };
 
@@ -483,7 +484,7 @@ static GuestDiskBusType find_bus_type(STORAGE_BUS_TYPE bus)
 if (bus >= ARRAY_SIZE(win2qemu) || (int)bus < 0) {
 return GUEST_DISK_BUS_TYPE_UNKNOWN;
 }
-return win2qemu[(int)bus];
+return (GuestDiskBusType)win2qemu[(int)bus];
 }
 
 DEFINE_GUID(GUID_DEVINTERFACE_DISK,
-- 
2.17.1

[Qemu-devel] [PATCH 4/4] include/qemu/osdep.h: Move the __USE_MINGW_ANSI_STDIO define up to avoid confliction.

[driver1998]

Signed-off-by: driver1998 
---
 include/qemu/osdep.h | 10 +-
 1 file changed, 5 insertions(+), 5 deletions(-)

diff --git a/include/qemu/osdep.h b/include/qemu/osdep.h
index 303d315c5d..af2b91f0b8 100644
--- a/include/qemu/osdep.h
+++ b/include/qemu/osdep.h
@@ -85,17 +85,17 @@ extern int daemon(int, int);
 #endif
 #endif
 
+/* enable C99/POSIX format strings (needs mingw32-runtime 3.15 or later) */
+#ifdef __MINGW32__
+#define __USE_MINGW_ANSI_STDIO 1
+#endif
+
 #include 
 #include 
 #include 
 #include 
 #include 
 #include 
-
-/* enable C99/POSIX format strings (needs mingw32-runtime 3.15 or later) */
-#ifdef __MINGW32__
-#define __USE_MINGW_ANSI_STDIO 1
-#endif
 #include 
 
 #include 
-- 
2.17.1

Re: [Qemu-devel] [PATCH v5 00/10] qcow2: encryption threads

[Max Reitz]

On 02.04.19 17:37, Vladimir Sementsov-Ogievskiy wrote:
> v5: rebase on master, some conflicts resolved due to data-file feature
> 
> 01: new patch, just move test from cover letter to a file. I really hope that 
> it
> will not hang the whole series, so, if we don't want it as is or with 
> really
> tiny improvements, I'd prefer to skip it and queue 02-10 first.

Yup, noted.

> 09: "true" parameter added to moved qcow2_pre_write_overlap_check() call due 
> to
> rebase on master (both before and after patch). Seems OK, so keep 
> Alberto's r-b.
> 
> performance:
> 
> after 01:
>  # ./tests/perf/block/qcow2/convert-to-encrypted /ssd/src.raw 
> /ssd/dst.enc.qcow2
> 14.18
>  # ./tests/perf/block/qcow2/convert-to-encrypted /ssd/src.raw 
> /ssd/dst.enc.qcow2 -W
> 13.77
> 
> after 10:
>  # ./tests/perf/block/qcow2/convert-to-encrypted /ssd/src.raw 
> /ssd/dst.enc.qcow2
> 14.35
>  # ./tests/perf/block/qcow2/convert-to-encrypted /ssd/src.raw 
> /ssd/dst.enc.qcow2 -W
> 5.62

Hm, I see those results as well:

Before:
w/o -W: 7.15
w/  -W: 6.77

After:
w/o -W: 7.19
w/  -W: 3.65


But with -t none, this is what I get:

Before:
w/o -W: 15.98
w/  -W: 10.91

After:
w/o -W: 19.95
w/  -W: 11.77


For good measure, on tmpfs:

Before:
w/o -W: 6.98
w/  -W: 6.75

After:
w/o -W: 7.04
w/  -W: 3.63


So it looks like the results with cache enabled are really only in the
cache.  When it goes down to disk, this series seems to decrease
performance.

To confirm whether that’s actually the case, I took another machine with
an SSD where I have more empty space and increased the size to 8 GB (not
the $size, because qemu-io doesn't like that, but well, yeah), and then
ran it again without cache:

Before:
w/o -W: ~50 - ~60 (varies...)
w/  -W: ~50 - ~70

After:
w/o -W: ~60
w/  -W: ~55 - ~85


So it does seem slower, although the values vary so much that it’s
difficult to tell.

Hmm...  And on that machine, there is no difference between before and
after when using -t none.  So I suppose it also depends on the device?



OK, I tried using qemu-img bench.  After patching it to accept --object,
these are the results I got with -t none -w on a preallocated (full) 8
GB image:

Before:
HDD: 17.7 s, 17.8 s, 18.0 s
SSD 1: 12.9 s, 15.8 s, 15.1 s
SSD 2: 1.8 s, 1.7 s, 1.7 s

After:
HDD: 16.1 s, 15.8 s, 15.8 s
SSD 1: 16.3 s, 18.0 s, 17.9 s
SSD 2: 2.0 s, 1.5 s, 1.5 s

Result #1: My SSD 1 is trash.

Result #2: I need more requests for SSD 2 to get a useful results.
Let's try again with 2^20:
Before: 23.8, 23.5, 23.3
After:  21.0, 20.6, 20.5

OK, and I can clearly see that this series increases the CPU usage
(which is good).


So...  Hm.  I suppose I conclude that this series decreases performance
on trashy SSDs?  But it gets better on my HDD and on my good SSD, so...
 Good thing I tested it, or something.

The only really interesting thing that came out of this is that I didn't
see an improvement with qemu-img convert (only on tmpfs), but that I do
see it with qemu-img bench.  So I'm wondering why you aren't using
qemu-img bench in the test in your first patch...?

Max

> Vladimir Sementsov-Ogievskiy (10):
>   tests/perf: Test qemu-img convert from raw to encrypted qcow2
>   qcow2.h: add missing include
>   qcow2: add separate file for threaded data processing functions
>   qcow2-threads: use thread_pool_submit_co
>   qcow2-threads: qcow2_co_do_compress: protect queuing by mutex
>   qcow2-threads: split out generic path
>   qcow2: qcow2_co_preadv: improve locking
>   qcow2: qcow2_co_preadv: skip using hd_qiov when possible
>   qcow2: bdrv_co_pwritev: move encryption code out of the lock
>   qcow2: do encryption in threads
> 
>  block/qcow2.h   |  20 +-
>  block/qcow2-bitmap.c|   1 -
>  block/qcow2-cache.c |   1 -
>  block/qcow2-cluster.c   |   8 +-
>  block/qcow2-refcount.c  |   1 -
>  block/qcow2-snapshot.c  |   1 -
>  block/qcow2-threads.c   | 268 +++
>  block/qcow2.c   | 275 
>  block/Makefile.objs |   2 +-
>  tests/perf/block/qcow2/convert-to-encrypted |  48 
>  10 files changed, 389 insertions(+), 236 deletions(-)
>  create mode 100644 block/qcow2-threads.c
>  create mode 100755 tests/perf/block/qcow2/convert-to-encrypted
> 




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Description: OpenPGP digital signature

Re: [Qemu-devel] [PATCH v5 00/10] qcow2: encryption threads

[Max Reitz]

On 29.04.19 02:37, Max Reitz wrote:
> On 02.04.19 17:37, Vladimir Sementsov-Ogievskiy wrote:
>> v5: rebase on master, some conflicts resolved due to data-file feature

(Forgot to note that I'll look at the more interesting patches in this
series later today.  I just got so hung up on the benchmark...)



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Re: [Qemu-devel] [PATCH] hw/tpm: Only build tpm_ppi.o if any of TPM_TIS/TPM_CRB is built

[Stefan Berger]

On 4/27/19 11:49 AM, Marc-André Lureau wrote:

Hi

On Sat, Apr 27, 2019 at 3:19 PM Philippe Mathieu-Daudé
 wrote:

The TPM Physical Presence Interface routines are only used
by the CRB/TIS interfaces. Do not compile this file if any
of them is built.

Signed-off-by: Philippe Mathieu-Daudé 

Reviewed-by: Marc-André Lureau 


---
Marc-André:
   You might want to add yourself as reviewer/maintainer of TPM ;)

yes, I suppose Stefan wouldn't mind having me as R: :)


I don't mind.

Re: [Qemu-devel] [PATCH v5 01/10] tests/perf: Test qemu-img convert from raw to encrypted qcow2

[Max Reitz]

On 02.04.19 17:37, Vladimir Sementsov-Ogievskiy wrote:
> Signed-off-by: Vladimir Sementsov-Ogievskiy 
> ---
>  tests/perf/block/qcow2/convert-to-encrypted | 48 +
>  1 file changed, 48 insertions(+)
>  create mode 100755 tests/perf/block/qcow2/convert-to-encrypted

Thanks for the test case, but I don’t know whether this is the right way
to include it.

A concrete problem is that it doesn’t work with out-of-tree builds (I
only do out-of-tree builds).  I wonder whether it would be possible and
make sense (I have no idea) to add a subdirectory "perf" to the iotests
and reuse its infrastructure?  Those tests wouldn’t run by default.

Max

> diff --git a/tests/perf/block/qcow2/convert-to-encrypted 
> b/tests/perf/block/qcow2/convert-to-encrypted
> new file mode 100755
> index 00..7a6b7b1cab
> --- /dev/null
> +++ b/tests/perf/block/qcow2/convert-to-encrypted
> @@ -0,0 +1,48 @@
> +#!/bin/bash
> +#
> +# Test qemu-img convert from raw to encrypted qcow2
> +#
> +# Copyright (c) 2019 Virtuozzo International GmbH. All rights reserved.
> +#
> +# This program is free software; you can redistribute it and/or modify
> +# it under the terms of the GNU General Public License as published by
> +# the Free Software Foundation; either version 2 of the License, or
> +# (at your option) any later version.
> +#
> +# This program is distributed in the hope that it will be useful,
> +# but WITHOUT ANY WARRANTY; without even the implied warranty of
> +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> +# GNU General Public License for more details.
> +#
> +# You should have received a copy of the GNU General Public License
> +# along with this program.  If not, see .
> +#
> +
> +if [ "$#" -lt 2 ]; then
> +echo "Usage: $0 SOURCE_FILE DESTINATION_FILE [additional qemu-img 
> convert parameters]"
> +exit 1
> +fi
> +
> +ROOT_DIR="$( cd "$( dirname "${BASH_SOURCE[0]}" )/../../../.." >/dev/null 
> 2>&1 && pwd )"
> +QEMU_IMG="$ROOT_DIR/qemu-img"
> +QEMU_IO="$ROOT_DIR/qemu-io"
> +
> +size=1G
> +
> +src="$1"
> +shift
> +
> +dst="$1"
> +shift
> +
> +(
> +# create source
> +$QEMU_IMG create -f raw "$src" $size
> +$QEMU_IO -f raw -c "write -P 0xa 0 $size" "$src"
> +
> +# create target
> +$QEMU_IMG create -f qcow2 --object secret,id=sec0,data=test -o 
> encrypt.format=luks,encrypt.key-secret=sec0 "$dst" $size
> +) > /dev/null
> +
> +# test with additional parameters left in $@
> +/usr/bin/time -f %e $QEMU_IMG convert "$@" -f raw --object 
> secret,id=sec0,data=test --target-image-opts -n "$src" 
> "driver=qcow2,file.filename=$dst,encrypt.key-secret=sec0"
> 




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Description: OpenPGP digital signature

Re: [Qemu-devel] [PATCH] [RFC] qcow2: add compression type feature

[Max Reitz]

On 05.02.19 10:08, Denis Plotnikov wrote:
> The patch adds some preparation parts for incompatible compression type
> feature into QCOW2 header that indicates that *all* compressed clusters
> must be (de)compressed using a certain compression type.
> 
> It is implied that the compression type is set on the image creation and
> can be changed only later by image convertion, thus the only compression
> algorithm is used for the image.
> 
> The plan is to add support for ZSTD and then may be something more effective
> in the future.
> 
> ZSDT compression algorithm consumes 3-5 times less CPU power with a
> comparable comression ratio with zlib. It would be wise to use it for
> data compression f.e. for backups.
> 
> The default compression is ZLIB.
> 
> Signed-off-by: Denis Plotnikov 
> ---
>  block/qcow2.c | 25 +
>  block/qcow2.h | 26 ++
>  2 files changed, 47 insertions(+), 4 deletions(-)

Are there plans to pursue this further?

[...]

> diff --git a/block/qcow2.h b/block/qcow2.h
> index 32cce9eee2..fdde5bbefd 100644
> --- a/block/qcow2.h
> +++ b/block/qcow2.h
> @@ -112,6 +112,10 @@
>  #define QCOW2_OPT_REFCOUNT_CACHE_SIZE "refcount-cache-size"
>  #define QCOW2_OPT_CACHE_CLEAN_INTERVAL "cache-clean-interval"
>  
> +/* Compression types */
> +#define QCOW2_COMPRESSION_TYPE_ZLIB0
> +#define QCOW2_COMPRESSION_TYPE_ZSTD1

We probably want QAPI types anyway (qemu-img info should report the
compression type), so I think we could use them instead.

>  typedef struct QCowHeader {
>  uint32_t magic;
>  uint32_t version;
> @@ -197,10 +201,13 @@ enum {
>  
>  /* Incompatible feature bits */
>  enum {
> -QCOW2_INCOMPAT_DIRTY_BITNR   = 0,
> -QCOW2_INCOMPAT_CORRUPT_BITNR = 1,
> -QCOW2_INCOMPAT_DIRTY = 1 << QCOW2_INCOMPAT_DIRTY_BITNR,
> -QCOW2_INCOMPAT_CORRUPT   = 1 << QCOW2_INCOMPAT_CORRUPT_BITNR,
> +QCOW2_INCOMPAT_DIRTY_BITNR= 0,
> +QCOW2_INCOMPAT_CORRUPT_BITNR  = 1,
> +QCOW2_INCOMPAT_COMPRESSION_TYPE_BITNR = 2,
> +QCOW2_INCOMPAT_DIRTY  = 1 << QCOW2_INCOMPAT_DIRTY_BITNR,
> +QCOW2_INCOMPAT_CORRUPT= 1 << 
> QCOW2_INCOMPAT_CORRUPT_BITNR,
> +QCOW2_INCOMPAT_COMPRESSION_TYPE   =
> +1 << 
> QCOW2_INCOMPAT_COMPRESSION_TYPE_BITNR,
>  
>  QCOW2_INCOMPAT_MASK  = QCOW2_INCOMPAT_DIRTY
>   | QCOW2_INCOMPAT_CORRUPT,

This mask needs to be expanded by QCOW2_INCOMPAT_COMPRESSION_TYPE.

> @@ -256,6 +263,10 @@ typedef struct Qcow2BitmapHeaderExt {
>  uint64_t bitmap_directory_offset;
>  } QEMU_PACKED Qcow2BitmapHeaderExt;
>  
> +typedef struct Qcow2CompressionTypeExt {
> +uint32_t compression_type;
> +} QEMU_PACKED Qcow2CompressionTypeExt;
> +
>  typedef struct BDRVQcow2State {
>  int cluster_bits;
>  int cluster_size;
> @@ -340,6 +351,13 @@ typedef struct BDRVQcow2State {
>  
>  CoQueue compress_wait_queue;
>  int nb_compress_threads;
> +/**
> + * Compression type used for the image. Default: 0 - ZLIB
> + * The image compression type is set on image creation.
> + * The only way to change the compression type is to convert the image
> + * with the desired compresion type set

*compression

And, well, ideally qemu-img amend could perform this operation, too.

Max

> + */
> +uint32_t compression_type;
>  } BDRVQcow2State;
>  
>  typedef struct Qcow2COWRegion {
> 




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Re: [Qemu-devel] [PATCH v2 0/8] tests/qemu-iotests: Run basic iotests during "make check"

[no-reply]

Patchew URL: https://patchew.org/QEMU/20190428155451.15653-1-th...@redhat.com/



Hi,

This series seems to have some coding style problems. See output below for
more information:

Type: series
Message-id: 20190428155451.15653-1-th...@redhat.com
Subject: [Qemu-devel] [PATCH v2 0/8] tests/qemu-iotests: Run basic iotests 
during "make check"

=== TEST SCRIPT BEGIN ===
#!/bin/bash
git rev-parse base > /dev/null || exit 0
git config --local diff.renamelimit 0
git config --local diff.renames True
git config --local diff.algorithm histogram
./scripts/checkpatch.pl --mailback base..
=== TEST SCRIPT END ===

Updating 3c8cf5a9c21ff8782164d1def7f44bd888713384
From https://github.com/patchew-project/qemu
 * [new tag]   patchew/20190428155451.15653-1-th...@redhat.com -> 
patchew/20190428155451.15653-1-th...@redhat.com
Switched to a new branch 'test'
7bb09e08a3 tests: Run the iotests during "make check" again
3d905a091e tests/qemu-iotests/group: Re-use the "auto" group for tests that can 
always run
565003ac8a tests/qemu-iotests: Remove the "_supported_os Linux" line from many 
tests
fb27dba3d9 cirrus / travis: Add gnu-sed and bash for macOS and FreeBSD
02ac8a4bf6 tests/qemu-iotests: Do not hard-code the path to bash
34c6a891ea tests/qemu-iotests/check: Pick a default machine if necessary
d091edf7c1 tests/qemu-iotests/005: Add a sanity check for large sparse file 
support
3cf4caa193 tests/qemu-iotests: Fix output of qemu-io related tests

=== OUTPUT BEGIN ===
1/8 Checking commit 3cf4caa193cc (tests/qemu-iotests: Fix output of qemu-io 
related tests)
2/8 Checking commit d091edf7c1ef (tests/qemu-iotests/005: Add a sanity check 
for large sparse file support)
3/8 Checking commit 34c6a891ea6e (tests/qemu-iotests/check: Pick a default 
machine if necessary)
4/8 Checking commit 02ac8a4bf608 (tests/qemu-iotests: Do not hard-code the path 
to bash)
5/8 Checking commit fb27dba3d9f0 (cirrus / travis: Add gnu-sed and bash for 
macOS and FreeBSD)
6/8 Checking commit 565003ac8a70 (tests/qemu-iotests: Remove the "_supported_os 
Linux" line from many tests)
7/8 Checking commit 3d905a091e64 (tests/qemu-iotests/group: Re-use the "auto" 
group for tests that can always run)
ERROR: trailing whitespace
#125: FILE: tests/qemu-iotests/group:115:
+093 $

total: 1 errors, 0 warnings, 294 lines checked

Patch 7/8 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

8/8 Checking commit 7bb09e08a3b1 (tests: Run the iotests during "make check" 
again)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#126: 
deleted file mode 100755

total: 0 errors, 1 warnings, 85 lines checked

Patch 8/8 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
=== OUTPUT END ===

Test command exited with code: 1


The full log is available at
http://patchew.org/logs/20190428155451.15653-1-th...@redhat.com/testing.checkpatch/?type=message.
---
Email generated automatically by Patchew [https://patchew.org/].
Please send your feedback to patchew-de...@redhat.com

[Qemu-devel] [PATCH v2 6/8] tests/qemu-iotests: Remove the "_supported_os Linux" line from many tests

[Thomas Huth]

A lot of tests run fine on FreeBSD and macOS, too - the limitation
to Linux here was likely just copied-and-pasted from other tests.
Thus remove the "_supported_os Linux" line from tests that run
successful in our CI pipelines on FreeBSD and macOS.

Signed-off-by: Thomas Huth 
---
 tests/qemu-iotests/001 | 1 -
 tests/qemu-iotests/002 | 1 -
 tests/qemu-iotests/003 | 1 -
 tests/qemu-iotests/004 | 1 -
 tests/qemu-iotests/007 | 1 -
 tests/qemu-iotests/008 | 1 -
 tests/qemu-iotests/009 | 1 -
 tests/qemu-iotests/010 | 1 -
 tests/qemu-iotests/011 | 1 -
 tests/qemu-iotests/012 | 1 -
 tests/qemu-iotests/015 | 1 -
 tests/qemu-iotests/017 | 1 -
 tests/qemu-iotests/020 | 1 -
 tests/qemu-iotests/021 | 1 -
 tests/qemu-iotests/022 | 1 -
 tests/qemu-iotests/025 | 1 -
 tests/qemu-iotests/026 | 1 -
 tests/qemu-iotests/027 | 1 -
 tests/qemu-iotests/029 | 1 -
 tests/qemu-iotests/031 | 1 -
 tests/qemu-iotests/032 | 1 -
 tests/qemu-iotests/033 | 1 -
 tests/qemu-iotests/035 | 1 -
 tests/qemu-iotests/036 | 1 -
 tests/qemu-iotests/037 | 1 -
 tests/qemu-iotests/042 | 1 -
 tests/qemu-iotests/043 | 1 -
 tests/qemu-iotests/046 | 1 -
 tests/qemu-iotests/047 | 1 -
 tests/qemu-iotests/049 | 1 -
 tests/qemu-iotests/050 | 1 -
 tests/qemu-iotests/051 | 1 -
 tests/qemu-iotests/052 | 1 -
 tests/qemu-iotests/053 | 1 -
 tests/qemu-iotests/054 | 1 -
 tests/qemu-iotests/062 | 1 -
 tests/qemu-iotests/063 | 1 -
 tests/qemu-iotests/066 | 1 -
 tests/qemu-iotests/067 | 1 -
 tests/qemu-iotests/068 | 1 -
 tests/qemu-iotests/069 | 1 -
 tests/qemu-iotests/071 | 1 -
 tests/qemu-iotests/072 | 1 -
 tests/qemu-iotests/073 | 1 -
 tests/qemu-iotests/079 | 1 -
 tests/qemu-iotests/082 | 1 -
 tests/qemu-iotests/085 | 1 -
 tests/qemu-iotests/089 | 1 -
 tests/qemu-iotests/090 | 1 -
 tests/qemu-iotests/094 | 1 -
 tests/qemu-iotests/095 | 1 -
 tests/qemu-iotests/098 | 1 -
 tests/qemu-iotests/102 | 1 -
 tests/qemu-iotests/103 | 1 -
 tests/qemu-iotests/104 | 1 -
 tests/qemu-iotests/105 | 1 -
 tests/qemu-iotests/107 | 1 -
 tests/qemu-iotests/110 | 1 -
 tests/qemu-iotests/111 | 1 -
 tests/qemu-iotests/112 | 1 -
 tests/qemu-iotests/114 | 1 -
 tests/qemu-iotests/115 | 1 -
 tests/qemu-iotests/117 | 1 -
 tests/qemu-iotests/120 | 1 -
 tests/qemu-iotests/125 | 1 -
 tests/qemu-iotests/126 | 1 -
 tests/qemu-iotests/127 | 1 -
 tests/qemu-iotests/133 | 1 -
 tests/qemu-iotests/134 | 1 -
 tests/qemu-iotests/142 | 1 -
 tests/qemu-iotests/143 | 1 -
 tests/qemu-iotests/144 | 1 -
 tests/qemu-iotests/145 | 1 -
 tests/qemu-iotests/153 | 1 -
 tests/qemu-iotests/156 | 1 -
 tests/qemu-iotests/157 | 1 -
 tests/qemu-iotests/158 | 1 -
 tests/qemu-iotests/159 | 1 -
 tests/qemu-iotests/162 | 1 -
 tests/qemu-iotests/170 | 1 -
 tests/qemu-iotests/173 | 1 -
 tests/qemu-iotests/182 | 1 -
 tests/qemu-iotests/183 | 1 -
 tests/qemu-iotests/186 | 1 -
 tests/qemu-iotests/187 | 1 -
 tests/qemu-iotests/190 | 1 -
 tests/qemu-iotests/191 | 1 -
 tests/qemu-iotests/192 | 1 -
 tests/qemu-iotests/195 | 1 -
 tests/qemu-iotests/197 | 1 -
 tests/qemu-iotests/200 | 1 -
 tests/qemu-iotests/214 | 1 -
 tests/qemu-iotests/215 | 1 -
 tests/qemu-iotests/217 | 1 -
 tests/qemu-iotests/227 | 1 -
 tests/qemu-iotests/231 | 1 -
 tests/qemu-iotests/233 | 1 -
 tests/qemu-iotests/240 | 1 -
 tests/qemu-iotests/247 | 1 -
 99 files changed, 99 deletions(-)

diff --git a/tests/qemu-iotests/001 b/tests/qemu-iotests/001
index 5d266e170a..d87a535c33 100755
--- a/tests/qemu-iotests/001
+++ b/tests/qemu-iotests/001
@@ -38,7 +38,6 @@ trap "_cleanup; exit \$status" 0 1 2 3 15
 
 _supported_fmt generic
 _supported_proto generic
-_supported_os Linux
 
 
 size=128M
diff --git a/tests/qemu-iotests/002 b/tests/qemu-iotests/002
index 7fb85084a1..fd413bce48 100755
--- a/tests/qemu-iotests/002
+++ b/tests/qemu-iotests/002
@@ -38,7 +38,6 @@ trap "_cleanup; exit \$status" 0 1 2 3 15
 
 _supported_fmt generic
 _supported_proto generic
-_supported_os Linux
 
 
 size=128M
diff --git a/tests/qemu-iotests/003 b/tests/qemu-iotests/003
index f008c57cdc..ccd3a39dfb 100755
--- a/tests/qemu-iotests/003
+++ b/tests/qemu-iotests/003
@@ -38,7 +38,6 @@ trap "_cleanup; exit \$status" 0 1 2 3 15
 
 _supported_fmt generic
 _supported_proto generic
-_supported_os Linux
 
 size=128M
 offset=67M
diff --git a/tests/qemu-iotests/004 b/tests/qemu-iotests/004
index 64fab3e714..d308dc4b49 100755
--- a/tests/qemu-iotests/004
+++ b/tests/qemu-iotests/004
@@ -38,7 +38,6 @@ trap "_cleanup; exit \$status" 0 1 2 3 15
 
 _supported_fmt raw qcow qcow2 qed vdi vmdk vhdx luks
 _supported_proto generic
-_supported_os Linux
 
 
 size=128M
diff --git a/tests/qemu-iotests/007 b/tests/qemu-iotests/007
index 3ab5490db3..6abd402423 100755
--- a/tests/qemu-iotests/007
+++ b/tests/qemu-iotests/007
@@ -40,7 +40,6 @@ trap "_cleanup; exit \$status" 0 1 2 3 15
 # currently only qcow2 allows for consistency checks using qemu-img
 _supported_fmt qcow2
 _supported_proto generic
-_supported_os Linux
 # refcount_bits must be at least 4 so we can create ten internal snapshots
 # (1 bit supports none, 2 bit

[Qemu-devel] [PATCH v2 8/8] tests: Run the iotests during "make check" again

[Thomas Huth]

People often forget to run the iotests before submitting patches or
pull requests - this is likely due to the fact that we do not run the
tests during our mandatory "make check" tests yet. Now that we've got
a proper "auto" group of iotests that should be fine to run in every
environment, we can enable the iotests during "make check" again by
running the "auto" tests by default from the check-block.sh script.

Some cases still need to be checked first, though: iotests need bash
and GNU sed (otherwise they fail), and if gprof is enabled, it spoils
the output of some test cases causing them to fail. So if we detect
that one of the required programs is missing or that gprof is enabled,
we still have to skip the iotests to avoid failures.

And finally, since we are using check-block.sh now again, this patch also
removes the qemu-iotests-quick.sh script since we do not need that anymore
(and having two shell wrapper scripts around the block tests seem
rather confusing than helpful).

Signed-off-by: Thomas Huth 
---
 tests/Makefile.include  |  8 +++
 tests/check-block.sh| 44 -
 tests/qemu-iotests-quick.sh |  8 ---
 3 files changed, 38 insertions(+), 22 deletions(-)
 delete mode 100755 tests/qemu-iotests-quick.sh

diff --git a/tests/Makefile.include b/tests/Makefile.include
index e2432d5e77..3bb7793d4a 100644
--- a/tests/Makefile.include
+++ b/tests/Makefile.include
@@ -140,7 +140,7 @@ check-unit-y += tests/test-uuid$(EXESUF)
 check-unit-y += tests/ptimer-test$(EXESUF)
 check-unit-y += tests/test-qapi-util$(EXESUF)
 
-check-block-$(CONFIG_POSIX) += tests/qemu-iotests-quick.sh
+check-block-$(CONFIG_POSIX) += tests/check-block.sh
 
 # All QTests for now are POSIX-only, but the dependencies are
 # really in libqtest, not in the testcases themselves.
@@ -1096,8 +1096,8 @@ clean-tcg: $(CLEAN_TCG_TARGET_RULES)
 
 QEMU_IOTESTS_HELPERS-$(call land,$(CONFIG_SOFTMMU),$(CONFIG_LINUX)) = 
tests/qemu-iotests/socket_scm_helper$(EXESUF)
 
-.PHONY: check-tests/qemu-iotests-quick.sh
-check-tests/qemu-iotests-quick.sh: tests/qemu-iotests-quick.sh 
qemu-img$(EXESUF) qemu-io$(EXESUF) qemu-nbd$(EXESUF) $(QEMU_IOTESTS_HELPERS-y)
+.PHONY: check-tests/check-block.sh
+check-tests/check-block.sh: tests/check-block.sh qemu-img$(EXESUF) 
qemu-io$(EXESUF) qemu-nbd$(EXESUF) $(QEMU_IOTESTS_HELPERS-y)
$<
 
 .PHONY: $(patsubst %, check-%, $(check-qapi-schema-y))
@@ -1168,7 +1168,7 @@ check-acceptance: check-venv $(TESTS_RESULTS_DIR)
 check-qapi-schema: $(patsubst %,check-%, $(check-qapi-schema-y)) 
check-tests/qapi-schema/doc-good.texi
 check-qtest: $(patsubst %,check-qtest-%, $(QTEST_TARGETS))
 check-block: $(patsubst %,check-%, $(check-block-y))
-check: check-qapi-schema check-unit check-softfloat check-qtest 
check-decodetree
+check: check-qapi-schema check-unit check-softfloat check-qtest 
check-decodetree check-block
 check-clean:
rm -rf $(check-unit-y) tests/*.o $(QEMU_IOTESTS_HELPERS-y)
rm -rf $(sort $(foreach target,$(SYSEMU_TARGET_LIST), 
$(check-qtest-$(target)-y)) $(check-qtest-generic-y))
diff --git a/tests/check-block.sh b/tests/check-block.sh
index f3d12fd602..3b971d6cf4 100755
--- a/tests/check-block.sh
+++ b/tests/check-block.sh
@@ -1,24 +1,48 @@
 #!/bin/sh
 
-FORMAT_LIST="raw qcow2 qed vmdk vpc"
+# Honor the SPEED environment variable, just like we do it for the qtests.
+if [ "$SPEED" = "slow" ]; then
+format_list="raw qcow2"
+group=
+elif [ "$SPEED" = "thorough" ]; then
+format_list="raw qcow2 qed vmdk vpc"
+group=
+else
+format_list=qcow2
+group="-g auto"
+fi
+
 if [ "$#" -ne 0 ]; then
-FORMAT_LIST="$@"
+format_list="$@"
+fi
+
+if grep -q "TARGET_GPROF=y" *-softmmu/config-target.mak 2>/dev/null ; then
+echo "GPROF is enabled ==> Not running the qemu-iotests."
+exit 0
 fi
 
-export QEMU_PROG="$PWD/x86_64-softmmu/qemu-system-x86_64"
-export QEMU_IMG_PROG="$PWD/qemu-img"
-export QEMU_IO_PROG="$PWD/qemu-io"
+if [ -z "$(find . -name 'qemu-system-*' -print)" ]; then
+echo "No qemu-system binary available ==> Not running the qemu-iotests."
+exit 0
+fi
+
+if ! command -v bash >/dev/null 2>&1 ; then
+echo "bash not available ==> Not running the qemu-iotests."
+exit 0
+fi
 
-if [ ! -x $QEMU_PROG ]; then
-echo "'make check-block' requires qemu-system-x86_64"
-exit 1
+if ! (sed --version | grep 'GNU sed') > /dev/null 2>&1 ; then
+if ! command -v gsed >/dev/null 2>&1; then
+echo "GNU sed not available ==> Not running the qemu-iotests."
+exit 0
+fi
 fi
 
 cd tests/qemu-iotests
 
 ret=0
-for FMT in $FORMAT_LIST ; do
-./check -T -nocache -$FMT || ret=1
+for fmt in $format_list ; do
+./check -$fmt $group || ret=1
 done
 
 exit $ret
diff --git a/tests/qemu-iotests-quick.sh b/tests/qemu-iotests-quick.sh
deleted file mode 100755
index 0e554bb972..00
--- a/tests/qemu-iotests-quick.sh
+++ /dev/null
@@ -1,8 +0,0 @@
-#!/bin/sh
-
-cd tests/qemu-iotests
-
-ret=0
-TEST_DIR

[Qemu-devel] [PATCH v2 3/8] tests/qemu-iotests/check: Pick a default machine if necessary

[Thomas Huth]

qemu-system-arm, qemu-system-aarch64 and qemu-system-tricore do not have
a default machine, so when running the qemu-iotests with such a binary,
lots of tests are failing. Fix it by picking a default machine in the
"check" script instead.

Signed-off-by: Thomas Huth 
---
 tests/qemu-iotests/check | 13 -
 1 file changed, 12 insertions(+), 1 deletion(-)

diff --git a/tests/qemu-iotests/check b/tests/qemu-iotests/check
index f9c24b6753..922c5d1d3d 100755
--- a/tests/qemu-iotests/check
+++ b/tests/qemu-iotests/check
@@ -130,7 +130,6 @@ export CACHEMODE="writeback"
 export QEMU_IO_OPTIONS=""
 export QEMU_IO_OPTIONS_NO_FMT=""
 export CACHEMODE_IS_DEFAULT=true
-export QEMU_OPTIONS="-nodefaults -machine accel=qtest"
 export VALGRIND_QEMU=
 export IMGKEYSECRET=
 export IMGOPTSSYNTAX=false
@@ -564,6 +563,18 @@ then
 fi
 export QEMU_PROG="$(type -p "$QEMU_PROG")"
 
+case "$QEMU_PROG" in
+*qemu-system-arm|*qemu-system-aarch64)
+export QEMU_OPTIONS="-nodefaults -machine virt,accel=qtest"
+;;
+*qemu-system-tricore)
+export QEMU_OPTIONS="-nodefaults -machine 
tricore_testboard,accel=qtest"
+;;
+*)
+export QEMU_OPTIONS="-nodefaults -machine accel=qtest"
+;;
+esac
+
 if [ -z "$QEMU_IMG_PROG" ]; then
 if [ -x "$build_iotests/qemu-img" ]; then
 export QEMU_IMG_PROG="$build_iotests/qemu-img"
-- 
2.21.0

[Qemu-devel] [PATCH v2 4/8] tests/qemu-iotests: Do not hard-code the path to bash

[Thomas Huth]

bash is installed in a different directory on non-Linux systems like
FreeBSD. Do not hard-code /bin/bash here so that the tests can run
there, too.

Reviewed-by: Eric Blake 
Reviewed-by: Philippe Mathieu-Daudé 
Signed-off-by: Thomas Huth 
---
 tests/qemu-iotests/239 | 2 +-
 tests/qemu-iotests/240 | 2 +-
 tests/qemu-iotests/241 | 2 +-
 tests/qemu-iotests/243 | 2 +-
 tests/qemu-iotests/244 | 2 +-
 5 files changed, 5 insertions(+), 5 deletions(-)

diff --git a/tests/qemu-iotests/239 b/tests/qemu-iotests/239
index 6f085d573d..b0991ffe59 100755
--- a/tests/qemu-iotests/239
+++ b/tests/qemu-iotests/239
@@ -1,4 +1,4 @@
-#!/bin/bash
+#!/usr/bin/env bash
 #
 # Test case for dmg
 #
diff --git a/tests/qemu-iotests/240 b/tests/qemu-iotests/240
index 65cc3b39b1..d3e663ed65 100755
--- a/tests/qemu-iotests/240
+++ b/tests/qemu-iotests/240
@@ -1,4 +1,4 @@
-#!/bin/bash
+#!/usr/bin/env bash
 #
 # Test hot plugging and unplugging with iothreads
 #
diff --git a/tests/qemu-iotests/241 b/tests/qemu-iotests/241
index 017a736aab..58b64ebf41 100755
--- a/tests/qemu-iotests/241
+++ b/tests/qemu-iotests/241
@@ -1,4 +1,4 @@
-#!/bin/bash
+#!/usr/bin/env bash
 #
 # Test qemu-nbd vs. unaligned images
 #
diff --git a/tests/qemu-iotests/243 b/tests/qemu-iotests/243
index 5838c6e89c..e563761307 100755
--- a/tests/qemu-iotests/243
+++ b/tests/qemu-iotests/243
@@ -1,4 +1,4 @@
-#!/bin/bash
+#!/usr/bin/env bash
 #
 # Test qcow2 preallocation
 #
diff --git a/tests/qemu-iotests/244 b/tests/qemu-iotests/244
index d8e7122305..13978f93d2 100755
--- a/tests/qemu-iotests/244
+++ b/tests/qemu-iotests/244
@@ -1,4 +1,4 @@
-#!/bin/bash
+#!/usr/bin/env bash
 #
 # Test qcow2 with external data files
 #
-- 
2.21.0

[Qemu-devel] [PATCH v2 5/8] cirrus / travis: Add gnu-sed and bash for macOS and FreeBSD

[Thomas Huth]

We are going to enable the qemu-iotests during "make check" again,
and for running the iotests, we need bash and gnu-sed.

Signed-off-by: Thomas Huth 
---
 .cirrus.yml | 4 ++--
 .travis.yml | 1 +
 2 files changed, 3 insertions(+), 2 deletions(-)

diff --git a/.cirrus.yml b/.cirrus.yml
index 47ef5bc604..8326a3a4b1 100644
--- a/.cirrus.yml
+++ b/.cirrus.yml
@@ -7,7 +7,7 @@ freebsd_12_task:
 cpu: 8
 memory: 8G
   install_script: pkg install -y
-bison curl cyrus-sasl git glib gmake gnutls
+bash bison curl cyrus-sasl git glib gmake gnutls gsed
 nettle perl5 pixman pkgconf png usbredir
   script:
 - mkdir build
@@ -20,7 +20,7 @@ macos_task:
   osx_instance:
 image: mojave-base
   install_script:
-- brew install pkg-config python glib pixman make sdl2
+- brew install pkg-config python gnu-sed glib pixman make sdl2
   script:
 - ./configure --python=/usr/local/bin/python3 || { cat config.log; exit 1; 
}
 - gmake -j$(sysctl -n hw.ncpu)
diff --git a/.travis.yml b/.travis.yml
index 2e06aee9d0..ba94644192 100644
--- a/.travis.yml
+++ b/.travis.yml
@@ -42,6 +42,7 @@ addons:
 packages:
   - glib
   - pixman
+  - gnu-sed
 
 
 # The channel name "irc.oftc.net#qemu" is encrypted against qemu/qemu
-- 
2.21.0

[Qemu-devel] [PATCH v2 7/8] tests/qemu-iotests/group: Re-use the "auto" group for tests that can always run

[Thomas Huth]

Currently, all tests are in the "auto" group. This is a little bit pointless.
OTOH, we need a group for the tests that we can automatically run during
"make check" each time, too. Tests in this new group are supposed to run
with every possible QEMU configuration, for example they must run with every
QEMU binary (also non-x86), without failing when an optional features is
missing (but reporting "skip" is ok), and be able to run on all kind of host
filesystems and users (i.e. also as "nobody" or "root").
So let's use the "auto" group for this class of tests now. The initial
list has been determined by running the iotests with non-x86 QEMU targets
and with our CI pipelines on Gitlab, Cirrus-CI and Travis (i.e. including
macOS and FreeBSD).

Signed-off-by: Thomas Huth 
---
 tests/qemu-iotests/group | 169 +--
 1 file changed, 91 insertions(+), 78 deletions(-)

diff --git a/tests/qemu-iotests/group b/tests/qemu-iotests/group
index bae7718380..4d0b6ae256 100644
--- a/tests/qemu-iotests/group
+++ b/tests/qemu-iotests/group
@@ -1,8 +1,21 @@
 #
 # QA groups control file
 # Defines test groups
+#
+# Some notes about the groups:
+#
 # - do not start group names with a digit
 #
+# - quick : Tests in this group should finish within some few seconds.
+#
+# - img : Tests in this group can be used to excercise the qemu-img tool.
+#
+# - auto : Tests in this group are used during "make check" and should be
+#   runnable in any case. That means they should run with every QEMU binary
+#   (also non-x86), with every QEMU configuration (i.e. must not fail if
+#   an optional feature is not compiled in - but reporting a "skip" is ok),
+#   and work all kind of host filesystems and users (e.g. "nobody" or "root").
+#
 
 #
 # test-group association ... one line per test
@@ -32,11 +45,11 @@
 023 rw auto
 024 rw backing auto quick
 025 rw auto quick
-026 rw blkdbg auto
+026 rw blkdbg
 027 rw auto quick
 028 rw backing auto quick
 029 rw auto quick
-030 rw auto backing
+030 rw backing
 031 rw auto quick
 032 rw auto quick
 033 rw auto quick
@@ -46,35 +59,35 @@
 037 rw auto backing quick
 038 rw auto backing quick
 039 rw auto quick
-040 rw auto
-041 rw auto backing
+040 rw
+041 rw backing
 042 rw auto quick
 043 rw auto backing
-044 rw auto
-045 rw auto quick
+044 rw
+045 rw quick
 046 rw auto aio quick
 047 rw auto quick
 048 img auto quick
 049 rw auto
 050 rw auto backing quick
-051 rw auto
+051 rw
 052 rw auto backing quick
 053 rw auto quick
 054 rw auto quick
-055 rw auto
-056 rw auto backing
-057 rw auto
-058 rw auto quick
+055 rw
+056 rw backing
+057 rw
+058 rw quick
 059 rw auto quick
 060 rw auto quick
 061 rw auto
 062 rw auto quick
 063 rw auto quick
 064 rw auto quick
-065 rw auto quick
+065 rw quick
 066 rw auto quick
-067 rw auto quick
-068 rw auto quick
+067 rw quick
+068 rw quick
 069 rw auto quick
 070 rw auto quick
 071 rw auto quick
@@ -91,18 +104,18 @@
 082 rw auto quick
 083 rw auto
 084 img auto quick
-085 rw auto
+085 rw
 086 rw auto quick
-087 rw auto quick
+087 rw quick
 088 rw auto quick
 089 rw auto quick
 090 rw auto quick
 091 rw auto migration
 092 rw auto quick
-093 auto
+093 
 094 rw auto quick
-095 rw auto quick
-096 rw auto quick
+095 rw quick
+096 rw quick
 097 rw auto backing
 098 rw auto backing quick
 099 rw auto quick
@@ -118,60 +131,60 @@
 109 rw auto
 110 rw auto backing quick
 111 rw auto quick
-112 rw auto
+112 rw
 113 rw auto quick
 114 rw auto quick
-115 rw auto
+115 rw
 116 rw auto quick
 117 rw auto
-118 rw auto
+118 rw
 119 rw auto quick
 120 rw auto quick
-121 rw auto
+121 rw
 122 rw auto
 123 rw auto quick
-124 rw auto backing
-125 rw auto
+124 rw backing
+125 rw
 126 rw auto backing
-127 rw auto backing quick
+127 rw backing quick
 128 rw auto quick
-129 rw auto quick
+129 rw quick
 130 rw auto quick
 131 rw auto quick
-132 rw auto quick
+132 rw quick
 133 auto quick
 134 rw auto quick
 135 rw auto
-136 rw auto
+136 rw
 137 rw auto
 138 rw auto quick
-139 rw auto quick
+139 rw quick
 140 rw auto quick
 141 rw auto quick
 142 auto
 143 auto quick
-144 rw auto quick
-145 auto quick
+144 rw quick
+145 quick
 146 auto quick
-147 auto
-148 rw auto quick
+147 img
+148 rw quick
 149 rw auto sudo
 150 rw auto quick
-151 rw auto
-152 rw auto quick
-153 rw auto quick
+151 rw
+152 rw quick
+153 rw quick
 154 rw auto backing quick
-155 rw auto
+155 rw
 156 rw auto quick
-157 auto
+157 quick
 158 rw auto quick
 159 rw auto quick
 160 rw auto quick
 161 rw auto quick
 162 auto quick
-163 rw auto
-165 rw auto quick
-169 rw auto quick migration
+163 rw
+165 rw quick
+169 rw quick migration
 170 rw auto quick
 171 rw auto quick
 172 auto
@@ -180,71 +193,71 @@
 175 auto quick
 176 rw auto backing
 177 rw auto quick
-178 auto
+178 img
 179 rw auto quick
 181 rw auto migration
-182 rw auto quick
-183 rw auto migration
+182 rw quick
+183 rw migration
 184 rw auto quick
-185 rw auto
+185 rw
 186 rw auto
 187 rw auto
-188 rw auto quick
-189 rw auto
+188 rw quick
+189 rw

[Qemu-devel] [PATCH v2 1/8] tests/qemu-iotests: Fix output of qemu-io related tests

[Thomas Huth]

One of the recent commits changed the way qemu-io prints out its
errors and warnings - they are now prefixed with the program name.
We've got to adapt the iotests accordingly to prevent that they
are failing.

Fixes: 99e98d7c9fc1a1639fad ("qemu-io: Use error_[gs]et_progname()")
Signed-off-by: Thomas Huth 
---
 tests/qemu-iotests/026.out | 168 ++---
 tests/qemu-iotests/060.out |   6 +-
 tests/qemu-iotests/069.out |   2 +-
 tests/qemu-iotests/070.out |   2 +-
 tests/qemu-iotests/075.out |  14 ++--
 tests/qemu-iotests/076.out |   6 +-
 tests/qemu-iotests/078.out |  12 +--
 tests/qemu-iotests/080.out |  40 -
 tests/qemu-iotests/081.out |   2 +-
 tests/qemu-iotests/088.out |  12 +--
 tests/qemu-iotests/103.out |  14 ++--
 tests/qemu-iotests/114.out |   2 +-
 tests/qemu-iotests/116.out |  14 ++--
 tests/qemu-iotests/131.out |   2 +-
 tests/qemu-iotests/133.out |  30 +++
 tests/qemu-iotests/137.out |  28 +++
 tests/qemu-iotests/140.out |   2 +-
 tests/qemu-iotests/143.out |   2 +-
 tests/qemu-iotests/153.out |  30 +++
 tests/qemu-iotests/187.out |   6 +-
 tests/qemu-iotests/188.out |   2 +-
 tests/qemu-iotests/197.out |   2 +-
 tests/qemu-iotests/205 |   2 +-
 tests/qemu-iotests/215.out |   2 +-
 tests/qemu-iotests/226.out |  16 ++--
 tests/qemu-iotests/244.out |  10 +--
 26 files changed, 214 insertions(+), 214 deletions(-)

diff --git a/tests/qemu-iotests/026.out b/tests/qemu-iotests/026.out
index dd10a82b51..fb89b8480c 100644
--- a/tests/qemu-iotests/026.out
+++ b/tests/qemu-iotests/026.out
@@ -14,8 +14,8 @@ No errors were found on the image.
 Formatting 'TEST_DIR/t.IMGFMT', fmt=IMGFMT size=1073741824
 
 Event: l1_update; errno: 5; imm: off; once: off; write
-Failed to flush the L2 table cache: Input/output error
-Failed to flush the refcount block cache: Input/output error
+qemu-io: Failed to flush the L2 table cache: Input/output error
+qemu-io: Failed to flush the refcount block cache: Input/output error
 write failed: Input/output error
 
 1 leaked clusters were found on the image.
@@ -23,8 +23,8 @@ This means waste of disk space, but no harm to data.
 Formatting 'TEST_DIR/t.IMGFMT', fmt=IMGFMT size=1073741824
 
 Event: l1_update; errno: 5; imm: off; once: off; write -b
-Failed to flush the L2 table cache: Input/output error
-Failed to flush the refcount block cache: Input/output error
+qemu-io: Failed to flush the L2 table cache: Input/output error
+qemu-io: Failed to flush the refcount block cache: Input/output error
 write failed: Input/output error
 
 1 leaked clusters were found on the image.
@@ -42,8 +42,8 @@ No errors were found on the image.
 Formatting 'TEST_DIR/t.IMGFMT', fmt=IMGFMT size=1073741824
 
 Event: l1_update; errno: 28; imm: off; once: off; write
-Failed to flush the L2 table cache: No space left on device
-Failed to flush the refcount block cache: No space left on device
+qemu-io: Failed to flush the L2 table cache: No space left on device
+qemu-io: Failed to flush the refcount block cache: No space left on device
 write failed: No space left on device
 
 1 leaked clusters were found on the image.
@@ -51,8 +51,8 @@ This means waste of disk space, but no harm to data.
 Formatting 'TEST_DIR/t.IMGFMT', fmt=IMGFMT size=1073741824
 
 Event: l1_update; errno: 28; imm: off; once: off; write -b
-Failed to flush the L2 table cache: No space left on device
-Failed to flush the refcount block cache: No space left on device
+qemu-io: Failed to flush the L2 table cache: No space left on device
+qemu-io: Failed to flush the refcount block cache: No space left on device
 write failed: No space left on device
 
 1 leaked clusters were found on the image.
@@ -134,8 +134,8 @@ No errors were found on the image.
 Formatting 'TEST_DIR/t.IMGFMT', fmt=IMGFMT size=1073741824
 
 Event: l2_update; errno: 5; imm: off; once: off; write
-Failed to flush the L2 table cache: Input/output error
-Failed to flush the refcount block cache: Input/output error
+qemu-io: Failed to flush the L2 table cache: Input/output error
+qemu-io: Failed to flush the refcount block cache: Input/output error
 write failed: Input/output error
 
 127 leaked clusters were found on the image.
@@ -143,8 +143,8 @@ This means waste of disk space, but no harm to data.
 Formatting 'TEST_DIR/t.IMGFMT', fmt=IMGFMT size=1073741824
 
 Event: l2_update; errno: 5; imm: off; once: off; write -b
-Failed to flush the L2 table cache: Input/output error
-Failed to flush the refcount block cache: Input/output error
+qemu-io: Failed to flush the L2 table cache: Input/output error
+qemu-io: Failed to flush the refcount block cache: Input/output error
 write failed: Input/output error
 
 127 leaked clusters were found on the image.
@@ -162,8 +162,8 @@ No errors were found on the image.
 Formatting 'TEST_DIR/t.IMGFMT', fmt=IMGFMT size=1073741824
 
 Event: l2_update; errno: 28; imm: off; once: off; write
-Failed to flush the L2 table cache: No space left on device
-Failed to flush the refcount block cache: 

[Qemu-devel] [PATCH v2 0/8] tests/qemu-iotests: Run basic iotests during "make check"

[Thomas Huth]

People often forget to run the iotests before submitting patches or
pull requests - this is likely due to the fact that we do not run the
tests during our mandatory "make check" tests yet.
This patch series now changes the "auto" group to only include tests
that should be safe to run in all CI environments (including FreeBSD
and macOS!). Thus these iotests can now always be run during "make
check" automatically, too.

v2:
 - Use "auto" group instead of adding a new "ci" group
 - Adjusted the tests that are run automatically (after doing lots
   of CI runs on cirrus-ci.com, gitlab and travis)
 - Added patch to fix the current regression with the "qemu-io:"
   prefix in the master branch
 - Added a fix for iotest 005 on ext4 filesystems (skip it there)

Thomas Huth (8):
  tests/qemu-iotests: Fix output of qemu-io related tests
  tests/qemu-iotests/005: Add a sanity check for large sparse file
support
  tests/qemu-iotests/check: Pick a default machine if necessary
  tests/qemu-iotests: Do not hard-code the path to bash
  cirrus / travis: Add gnu-sed and bash for macOS and FreeBSD
  tests/qemu-iotests: Remove the "_supported_os Linux" line from many
tests
  tests/qemu-iotests/group: Re-use the "auto" group for tests that can
always run
  tests: Run the iotests during "make check" again

 .cirrus.yml |   4 +-
 .travis.yml |   1 +
 tests/Makefile.include  |   8 +-
 tests/check-block.sh|  44 +++---
 tests/qemu-iotests-quick.sh |   8 --
 tests/qemu-iotests/001  |   1 -
 tests/qemu-iotests/002  |   1 -
 tests/qemu-iotests/003  |   1 -
 tests/qemu-iotests/004  |   1 -
 tests/qemu-iotests/005  |   9 ++
 tests/qemu-iotests/007  |   1 -
 tests/qemu-iotests/008  |   1 -
 tests/qemu-iotests/009  |   1 -
 tests/qemu-iotests/010  |   1 -
 tests/qemu-iotests/011  |   1 -
 tests/qemu-iotests/012  |   1 -
 tests/qemu-iotests/015  |   1 -
 tests/qemu-iotests/017  |   1 -
 tests/qemu-iotests/020  |   1 -
 tests/qemu-iotests/021  |   1 -
 tests/qemu-iotests/022  |   1 -
 tests/qemu-iotests/025  |   1 -
 tests/qemu-iotests/026  |   1 -
 tests/qemu-iotests/026.out  | 168 +--
 tests/qemu-iotests/027  |   1 -
 tests/qemu-iotests/029  |   1 -
 tests/qemu-iotests/031  |   1 -
 tests/qemu-iotests/032  |   1 -
 tests/qemu-iotests/033  |   1 -
 tests/qemu-iotests/035  |   1 -
 tests/qemu-iotests/036  |   1 -
 tests/qemu-iotests/037  |   1 -
 tests/qemu-iotests/042  |   1 -
 tests/qemu-iotests/043  |   1 -
 tests/qemu-iotests/046  |   1 -
 tests/qemu-iotests/047  |   1 -
 tests/qemu-iotests/049  |   1 -
 tests/qemu-iotests/050  |   1 -
 tests/qemu-iotests/051  |   1 -
 tests/qemu-iotests/052  |   1 -
 tests/qemu-iotests/053  |   1 -
 tests/qemu-iotests/054  |   1 -
 tests/qemu-iotests/060.out  |   6 +-
 tests/qemu-iotests/062  |   1 -
 tests/qemu-iotests/063  |   1 -
 tests/qemu-iotests/066  |   1 -
 tests/qemu-iotests/067  |   1 -
 tests/qemu-iotests/068  |   1 -
 tests/qemu-iotests/069  |   1 -
 tests/qemu-iotests/069.out  |   2 +-
 tests/qemu-iotests/070.out  |   2 +-
 tests/qemu-iotests/071  |   1 -
 tests/qemu-iotests/072  |   1 -
 tests/qemu-iotests/073  |   1 -
 tests/qemu-iotests/075.out  |  14 +--
 tests/qemu-iotests/076.out  |   6 +-
 tests/qemu-iotests/078.out  |  12 +--
 tests/qemu-iotests/079  |   1 -
 tests/qemu-iotests/080.out  |  40 -
 tests/qemu-iotests/081.out  |   2 +-
 tests/qemu-iotests/082  |   1 -
 tests/qemu-iotests/085  |   1 -
 tests/qemu-iotests/088.out  |  12 +--
 tests/qemu-iotests/089  |   1 -
 tests/qemu-iotests/090  |   1 -
 tests/qemu-iotests/094  |   1 -
 tests/qemu-iotests/095  |   1 -
 tests/qemu-iotests/098  |   1 -
 tests/qemu-iotests/102  |   1 -
 tests/qemu-iotests/103  |   1 -
 tests/qemu-iotests/103.out  |  14 +--
 tests/qemu-iotests/104  |   1 -
 tests/qemu-iotests/105  |   1 -
 tests/qemu-iotests/107  |   1 -
 tests/qemu-iotests/110  |   1 -
 tests/qemu-iotests/111  |   1 -
 tests/qemu-iotests/112  |   1 -
 tests/qemu-iotests/114  |   1 -
 tests/qemu-iotests/114.out  |   2 +-
 tests/qemu-iotests/115  |   1 -
 tests/qemu-iotests/116.out  |  14 +--
 tests/qemu-iotests/117  |   1 -
 tests/qemu-iotests/120  |   1 -
 tests/qemu-iotests/125  |   1 -
 tests/qemu-iotests/126  |   1 -
 tests/qemu-iotests/127  |   1 -
 tests/qemu-iotests/131.out  |   2 +-
 tests/qemu-iotests/133  |   1 -
 tests/qemu-iotests/133.out  |  30 +++
 tests/qemu-iotests/134  |   1 -
 tests/qemu-iotests/137.out  |  28 +++---
 tests/qemu-iotests/140.out  |   2 +-
 tests/qemu-iotests/142  |   1 -
 tests/qemu-iotests/143  |   1 -
 tests/qemu-iotests/143.out  |   2 +-
 tests/qemu-iotests/144  |   1 -
 tests/qemu-iotests/145  |   1 -
 tests/qe

[Qemu-devel] [PATCH v2 2/8] tests/qemu-iotests/005: Add a sanity check for large sparse file support

[Thomas Huth]

"check -raw 005" fails when running on ext4 filesystems - these do not
support such large sparse files. Use the same check as in test 220 to
skip the test in this case.

Suggested-by: Eric Blake 
Signed-off-by: Thomas Huth 
---
 tests/qemu-iotests/005 | 9 +
 1 file changed, 9 insertions(+)

diff --git a/tests/qemu-iotests/005 b/tests/qemu-iotests/005
index 2fef63af88..6136ced5c8 100755
--- a/tests/qemu-iotests/005
+++ b/tests/qemu-iotests/005
@@ -55,6 +55,15 @@ if [ "$IMGPROTO" = "sheepdog" ]; then
 _notrun "image protocol $IMGPROTO does not support large image sizes"
 fi
 
+# Sanity check: For raw, we require a file system that permits the creation
+# of a HUGE (but very sparse) file.  tmpfs works, ext4 does not.
+if [ "$IMGFMT" = "raw" ]; then
+if ! truncate --size=5T "$TEST_IMG"; then
+_notrun "file system on $TEST_DIR does not support large enough files"
+fi
+rm "$TEST_IMG"
+fi
+
 echo
 echo "creating large image"
 _make_test_img 5000G
-- 
2.21.0

[Qemu-devel] Failing qemu-iotest 211 with -vdi

[Thomas Huth]

QEMU iotest 211 is failing for me, too, when I run it with -vdi:

tests/qemu-iotests$ ./check -vdi 211
QEMU  -- 
"/home/thuth/tmp/qemu-build/tests/qemu-iotests/../../x86_64-softmmu/qemu-system-x86_64"
 -nodefaults -machine accel=qtest
QEMU_IMG  -- "/home/thuth/tmp/qemu-build/tests/qemu-iotests/../../qemu-img" 
QEMU_IO   -- "/home/thuth/tmp/qemu-build/tests/qemu-iotests/../../qemu-io"  
--cache writeback -f vdi
QEMU_NBD  -- "/home/thuth/tmp/qemu-build/tests/qemu-iotests/../../qemu-nbd" 
IMGFMT-- vdi
IMGPROTO  -- file
PLATFORM  -- Linux/x86_64 thuth 3.10.0-957.10.1.el7.x86_64
TEST_DIR  -- /home/thuth/tmp/qemu-build/tests/qemu-iotests/scratch
SOCKET_SCM_HELPER -- 
/home/thuth/tmp/qemu-build/tests/qemu-iotests/socket_scm_helper

211 - output mismatch (see 211.out.bad)
--- /home/thuth/devel/qemu/tests/qemu-iotests/211.out   2019-04-23 
16:43:12.0 +0200
+++ /home/thuth/tmp/qemu-build/tests/qemu-iotests/211.out.bad   2019-04-28 
17:41:19.0 +0200
@@ -55,8 +55,7 @@
 virtual size: 32M (33554432 bytes)
 cluster_size: 1048576
 
-[{ "start": 0, "length": 3072, "depth": 0, "zero": false, "data": true, 
"offset": 1024},
-{ "start": 3072, "length": 33551360, "depth": 0, "zero": true, "data": true, 
"offset": 4096}]
+[{ "start": 0, "length": 33554432, "depth": 0, "zero": true, "data": true, 
"offset": 1024}]
 
 === Invalid BlockdevRef ===
 
Failures: 211
Failed 1 of 1 tests

Any ideas how to fix this?

 Thomas

[Qemu-devel] Failing QEMU iotest 221

[Thomas Huth]

QEMU iotest 221 is failing for me, too, when I run it with -raw:

tests/qemu-iotests$ ./check -raw 221
QEMU  -- 
"/home/thuth/tmp/qemu-build/tests/qemu-iotests/../../x86_64-softmmu/qemu-system-x86_64"
 -nodefaults -machine accel=qtest
QEMU_IMG  -- "/home/thuth/tmp/qemu-build/tests/qemu-iotests/../../qemu-img" 
QEMU_IO   -- "/home/thuth/tmp/qemu-build/tests/qemu-iotests/../../qemu-io"  
--cache writeback -f raw
QEMU_NBD  -- "/home/thuth/tmp/qemu-build/tests/qemu-iotests/../../qemu-nbd" 
IMGFMT-- raw
IMGPROTO  -- file
PLATFORM  -- Linux/x86_64 thuth 3.10.0-957.10.1.el7.x86_64
TEST_DIR  -- /home/thuth/tmp/qemu-build/tests/qemu-iotests/scratch
SOCKET_SCM_HELPER -- 
/home/thuth/tmp/qemu-build/tests/qemu-iotests/socket_scm_helper

221 - output mismatch (see 221.out.bad)
--- /home/thuth/devel/qemu/tests/qemu-iotests/221.out   2019-04-23 
16:43:12.0 +0200
+++ /home/thuth/tmp/qemu-build/tests/qemu-iotests/221.out.bad   2019-04-28 
17:18:52.0 +0200
@@ -7,10 +7,10 @@
 [{ "start": 0, "length": 43520, "depth": 0, "zero": true, "data": false, 
"offset": OFFSET}]
 wrote 1/1 bytes at offset 43008
 1 bytes, X ops; XX:XX:XX.X (XXX YYY/sec and XXX ops/sec)
-[{ "start": 0, "length": 40960, "depth": 0, "zero": true, "data": false, 
"offset": OFFSET},
-{ "start": 40960, "length": 2049, "depth": 0, "zero": false, "data": true, 
"offset": OFFSET},
+[{ "start": 0, "length": 43008, "depth": 0, "zero": true, "data": false, 
"offset": OFFSET},
+{ "start": 43008, "length": 1, "depth": 0, "zero": false, "data": true, 
"offset": OFFSET},
 { "start": 43009, "length": 511, "depth": 0, "zero": true, "data": false, 
"offset": OFFSET}]
-[{ "start": 0, "length": 40960, "depth": 0, "zero": true, "data": false, 
"offset": OFFSET},
-{ "start": 40960, "length": 2049, "depth": 0, "zero": false, "data": true, 
"offset": OFFSET},
+[{ "start": 0, "length": 43008, "depth": 0, "zero": true, "data": false, 
"offset": OFFSET},
+{ "start": 43008, "length": 1, "depth": 0, "zero": false, "data": true, 
"offset": OFFSET},
 { "start": 43009, "length": 511, "depth": 0, "zero": true, "data": false, 
"offset": OFFSET}]
 *** done
Failures: 221
Failed 1 of 1 tests

Any ideas how to fix this?

 Thomas

[Qemu-devel] Failing QEMU iotest 175

[Thomas Huth]

QEMU iotest 175 is failing for me when I run it with -raw:

$ ./check -raw 175
QEMU  --
"/home/thuth/tmp/qemu-build/tests/qemu-iotests/../../x86_64-softmmu/qemu-system-x86_64"
-nodefaults -machine accel=qtest
QEMU_IMG  --
"/home/thuth/tmp/qemu-build/tests/qemu-iotests/../../qemu-img"
QEMU_IO   --
"/home/thuth/tmp/qemu-build/tests/qemu-iotests/../../qemu-io"  --cache
writeback -f raw
QEMU_NBD  --
"/home/thuth/tmp/qemu-build/tests/qemu-iotests/../../qemu-nbd"
IMGFMT-- raw
IMGPROTO  -- file
PLATFORM  -- Linux/x86_64 thuth 3.10.0-957.10.1.el7.x86_64
TEST_DIR  -- /home/thuth/tmp/qemu-build/tests/qemu-iotests/scratch
SOCKET_SCM_HELPER --
/home/thuth/tmp/qemu-build/tests/qemu-iotests/socket_scm_helper

175 - output mismatch (see 175.out.bad)
--- /home/thuth/devel/qemu/tests/qemu-iotests/175.out   2019-04-23
16:43:12.0 +0200
+++ /home/thuth/tmp/qemu-build/tests/qemu-iotests/175.out.bad   2019-04-28
17:17:32.0 +0200
@@ -2,17 +2,17 @@

 == creating image with default preallocation ==
 Formatting 'TEST_DIR/t.IMGFMT', fmt=IMGFMT size=1048576
-size=1048576, blocks=0
+size=1048576, blocks=2

 == creating image with preallocation off ==
 Formatting 'TEST_DIR/t.IMGFMT', fmt=IMGFMT size=1048576 preallocation=off
-size=1048576, blocks=0
+size=1048576, blocks=2

 == creating image with preallocation full ==
 Formatting 'TEST_DIR/t.IMGFMT', fmt=IMGFMT size=1048576 preallocation=full
-size=1048576, blocks=2048
+size=1048576, blocks=2050

 == creating image with preallocation falloc ==
 Formatting 'TEST_DIR/t.IMGFMT', fmt=IMGFMT size=1048576
preallocation=falloc
-size=1048576, blocks=2048
+size=1048576, blocks=2050
  *** done
Failures: 175
Failed 1 of 1 tests

Any ideas how to fix this?

 Thomas

[Qemu-devel] [PATCH 11/14] target/ppc: decode target register in VSX_VECTOR_LOAD_STORE_LENGTH at translation time

[Mark Cave-Ayland]

Signed-off-by: Mark Cave-Ayland 
---
 target/ppc/helper.h | 8 
 target/ppc/mem_helper.c | 6 ++
 target/ppc/translate/vsx-impl.inc.c | 7 ---
 3 files changed, 10 insertions(+), 11 deletions(-)

diff --git a/target/ppc/helper.h b/target/ppc/helper.h
index 167d6e45fd..5f844cc968 100644
--- a/target/ppc/helper.h
+++ b/target/ppc/helper.h
@@ -291,10 +291,10 @@ DEF_HELPER_3(stvebx, void, env, avr, tl)
 DEF_HELPER_3(stvehx, void, env, avr, tl)
 DEF_HELPER_3(stvewx, void, env, avr, tl)
 #if defined(TARGET_PPC64)
-DEF_HELPER_4(lxvl, void, env, tl, tl, tl)
-DEF_HELPER_4(lxvll, void, env, tl, tl, tl)
-DEF_HELPER_4(stxvl, void, env, tl, tl, tl)
-DEF_HELPER_4(stxvll, void, env, tl, tl, tl)
+DEF_HELPER_4(lxvl, void, env, tl, vsr, tl)
+DEF_HELPER_4(lxvll, void, env, tl, vsr, tl)
+DEF_HELPER_4(stxvl, void, env, tl, vsr, tl)
+DEF_HELPER_4(stxvll, void, env, tl, vsr, tl)
 #endif
 DEF_HELPER_4(vsumsws, void, env, avr, avr, avr)
 DEF_HELPER_4(vsum2sws, void, env, avr, avr, avr)
diff --git a/target/ppc/mem_helper.c b/target/ppc/mem_helper.c
index 4dfa7ee23f..f3426315d2 100644
--- a/target/ppc/mem_helper.c
+++ b/target/ppc/mem_helper.c
@@ -415,9 +415,8 @@ STVE(stvewx, cpu_stl_data_ra, bswap32, u32)
 
 #define VSX_LXVL(name, lj)  \
 void helper_##name(CPUPPCState *env, target_ulong addr, \
-   target_ulong xt, target_ulong rb)\
+   ppc_vsr_t *r, target_ulong rb)   \
 {   \
-ppc_vsr_t *r = &env->vsr[xt];   \
 int nb = GET_NB(env->gpr[rb]);  \
 int i;  \
 \
@@ -444,9 +443,8 @@ VSX_LXVL(lxvll, 1)
 
 #define VSX_STXVL(name, lj)   \
 void helper_##name(CPUPPCState *env, target_ulong addr,   \
-   target_ulong xt, target_ulong rb)  \
+   ppc_vsr_t *r, target_ulong rb) \
 { \
-ppc_vsr_t *r = &env->vsr[xt]; \
 int nb = GET_NB(env->gpr[rb]);\
 int i;\
   \
diff --git a/target/ppc/translate/vsx-impl.inc.c 
b/target/ppc/translate/vsx-impl.inc.c
index 51d4e0cdd6..7c79ec22dd 100644
--- a/target/ppc/translate/vsx-impl.inc.c
+++ b/target/ppc/translate/vsx-impl.inc.c
@@ -297,7 +297,8 @@ VSX_VECTOR_LOAD_STORE(stxvx, st_i64, 1)
 #define VSX_VECTOR_LOAD_STORE_LENGTH(name)  \
 static void gen_##name(DisasContext *ctx)   \
 {   \
-TCGv EA, xt, rb;\
+TCGv EA, rb;\
+TCGv_ptr xt;\
 \
 if (xT(ctx->opcode) < 32) { \
 if (unlikely(!ctx->vsx_enabled)) {  \
@@ -313,12 +314,12 @@ static void gen_##name(DisasContext *ctx) 
  \
 EA = tcg_temp_new();\
 gen_set_access_type(ctx, ACCESS_INT);   \
 gen_addr_register(ctx, EA); \
-xt = tcg_const_tl(xT(ctx->opcode)); \
+xt = gen_vsr_ptr(xT(ctx->opcode));  \
 rb = tcg_const_tl(rB(ctx->opcode)); \
 gen_helper_##name(cpu_env, EA, xt, rb); \
 tcg_temp_free(EA);  \
-tcg_temp_free(xt);  \
 tcg_temp_free(rb);  \
+tcg_temp_free_ptr(xt);  \
 }
 
 VSX_VECTOR_LOAD_STORE_LENGTH(lxvl)
-- 
2.11.0

[Qemu-devel] [PATCH 13/14] target/ppc: improve VSX_TEST_DC with new generator macros

[Mark Cave-Ayland]

The source and destination registers can now be decoded in the generator
function using the new GEN_VSX_HELPER_X2 and GEN_VSX_HELPER_R2 macros.

Signed-off-by: Mark Cave-Ayland 
---
 target/ppc/fpu_helper.c | 16 +++-
 target/ppc/helper.h |  8 
 target/ppc/translate/vsx-impl.inc.c |  8 
 3 files changed, 15 insertions(+), 17 deletions(-)

diff --git a/target/ppc/fpu_helper.c b/target/ppc/fpu_helper.c
index 370b1d2c46..357be25867 100644
--- a/target/ppc/fpu_helper.c
+++ b/target/ppc/fpu_helper.c
@@ -3158,18 +3158,16 @@ void helper_xvxsigsp(CPUPPCState *env, uint32_t opcode,
  * VSX_TEST_DC - VSX floating point test data class
  *   op- instruction mnemonic
  *   nels  - number of elements (1, 2 or 4)
- *   xbn   - VSR register number
  *   tp- type (float32 or float64)
  *   fld   - vsr_t field (VsrD(*) or VsrW(*))
  *   tfld   - target vsr_t field (VsrD(*) or VsrW(*))
  *   fld_max - target field max
  *   scrf - set result in CR and FPCC
  */
-#define VSX_TEST_DC(op, nels, xbn, tp, fld, tfld, fld_max, scrf)  \
-void helper_##op(CPUPPCState *env, uint32_t opcode) \
+#define VSX_TEST_DC(op, nels, tp, fld, tfld, fld_max, scrf)  \
+void helper_##op(CPUPPCState *env, uint32_t opcode, \
+ ppc_vsr_t *xt, ppc_vsr_t *xb)  \
 {   \
-ppc_vsr_t *xt = &env->vsr[xT(opcode)];  \
-ppc_vsr_t *xb = &env->vsr[xbn]; \
 ppc_vsr_t r;\
 uint32_t i, sign, dcmx; \
 uint32_t cc, match = 0; \
@@ -3208,10 +3206,10 @@ void helper_##op(CPUPPCState *env, uint32_t opcode) 
\
 }   \
 }
 
-VSX_TEST_DC(xvtstdcdp, 2, xB(opcode), float64, VsrD(i), VsrD(i), UINT64_MAX, 0)
-VSX_TEST_DC(xvtstdcsp, 4, xB(opcode), float32, VsrW(i), VsrW(i), UINT32_MAX, 0)
-VSX_TEST_DC(xststdcdp, 1, xB(opcode), float64, VsrD(0), VsrD(0), 0, 1)
-VSX_TEST_DC(xststdcqp, 1, (rB(opcode) + 32), float128, f128, VsrD(0), 0, 1)
+VSX_TEST_DC(xvtstdcdp, 2, float64, VsrD(i), VsrD(i), UINT64_MAX, 0)
+VSX_TEST_DC(xvtstdcsp, 4, float32, VsrW(i), VsrW(i), UINT32_MAX, 0)
+VSX_TEST_DC(xststdcdp, 1, float64, VsrD(0), VsrD(0), 0, 1)
+VSX_TEST_DC(xststdcqp, 1, float128, f128, VsrD(0), 0, 1)
 
 void helper_xststdcsp(CPUPPCState *env, uint32_t opcode, ppc_vsr_t *xb)
 {
diff --git a/target/ppc/helper.h b/target/ppc/helper.h
index 81630a5f23..cd97fae438 100644
--- a/target/ppc/helper.h
+++ b/target/ppc/helper.h
@@ -436,8 +436,8 @@ DEF_HELPER_4(xscvsxdsp, void, env, i32, vsr, vsr)
 DEF_HELPER_4(xscvudqp, void, env, i32, vsr, vsr)
 DEF_HELPER_4(xscvuxddp, void, env, i32, vsr, vsr)
 DEF_HELPER_3(xststdcsp, void, env, i32, vsr)
-DEF_HELPER_2(xststdcdp, void, env, i32)
-DEF_HELPER_2(xststdcqp, void, env, i32)
+DEF_HELPER_4(xststdcdp, void, env, i32, vsr, vsr)
+DEF_HELPER_4(xststdcqp, void, env, i32, vsr, vsr)
 DEF_HELPER_4(xsrdpi, void, env, i32, vsr, vsr)
 DEF_HELPER_4(xsrdpic, void, env, i32, vsr, vsr)
 DEF_HELPER_4(xsrdpim, void, env, i32, vsr, vsr)
@@ -537,8 +537,8 @@ DEF_HELPER_4(xvcvsxdsp, void, env, i32, vsr, vsr)
 DEF_HELPER_4(xvcvuxdsp, void, env, i32, vsr, vsr)
 DEF_HELPER_4(xvcvsxwsp, void, env, i32, vsr, vsr)
 DEF_HELPER_4(xvcvuxwsp, void, env, i32, vsr, vsr)
-DEF_HELPER_2(xvtstdcsp, void, env, i32)
-DEF_HELPER_2(xvtstdcdp, void, env, i32)
+DEF_HELPER_4(xvtstdcsp, void, env, i32, vsr, vsr)
+DEF_HELPER_4(xvtstdcdp, void, env, i32, vsr, vsr)
 DEF_HELPER_4(xvrspi, void, env, i32, vsr, vsr)
 DEF_HELPER_4(xvrspic, void, env, i32, vsr, vsr)
 DEF_HELPER_4(xvrspim, void, env, i32, vsr, vsr)
diff --git a/target/ppc/translate/vsx-impl.inc.c 
b/target/ppc/translate/vsx-impl.inc.c
index b8f24b7462..03b342a2fb 100644
--- a/target/ppc/translate/vsx-impl.inc.c
+++ b/target/ppc/translate/vsx-impl.inc.c
@@ -1164,8 +1164,8 @@ GEN_VSX_HELPER_X3(xsnmsubmsp, 0x04, 0x13, 0, PPC2_VSX207)
 GEN_VSX_HELPER_X2(xscvsxdsp, 0x10, 0x13, 0, PPC2_VSX207)
 GEN_VSX_HELPER_X2(xscvuxdsp, 0x10, 0x12, 0, PPC2_VSX207)
 GEN_VSX_HELPER_X1(xststdcsp, 0x14, 0x12, 0, PPC2_ISA300)
-GEN_VSX_HELPER_2(xststdcdp, 0x14, 0x16, 0, PPC2_ISA300)
-GEN_VSX_HELPER_2(xststdcqp, 0x04, 0x16, 0, PPC2_ISA300)
+GEN_VSX_HELPER_X2(xststdcdp, 0x14, 0x16, 0, PPC2_ISA300)
+GEN_VSX_HELPER_R2(xststdcqp, 0x04, 0x16, 0, PPC2_ISA300)
 
 GEN_VSX_HELPER_X3(xvadddp, 0x00, 0x0C, 0, PPC2_VSX)
 GEN_VSX_HELPER_X3(xvsubdp, 0x00, 0x0D, 0, PPC2_VSX)
@@ -1244,8 +1244,8 @@ GEN_VSX_HELPER_X2(xvrspic, 0x16, 0x0A, 0, PPC2_VSX)
 GEN_VSX_HELPER_X2(xvrspim, 0x12, 0x0B, 0, PPC2_VSX)
 GEN_VSX_HELPER_X2(xvrspip, 0x12, 0x0A, 0, PPC2_VSX)
 GEN_VSX_HELPER_X2(xvrspiz, 0x12, 0x09, 0, PPC2_VSX)
-GEN_VSX_HELPER_2(xvtstdcsp, 0x14, 0x1A, 0, PPC2_VSX)
-GEN_VSX_HELPER_2(xvtstdcdp, 0x14, 0x1E, 0, PPC2_VSX)
+GEN_VSX_HELPER_X2(xvtstdcsp, 0x14, 0x1A, 0, PPC2_VSX)
+GEN_VSX_HELPER_X2(xvtstdcdp, 0x14, 0x1

[Qemu-devel] [PATCH 12/14] target/ppc: decode target register in VSX_EXTRACT_INSERT at translation time

[Mark Cave-Ayland]

Signed-off-by: Mark Cave-Ayland 
---
 target/ppc/helper.h |  4 ++--
 target/ppc/int_helper.c | 12 
 target/ppc/translate/vsx-impl.inc.c | 10 +-
 3 files changed, 11 insertions(+), 15 deletions(-)

diff --git a/target/ppc/helper.h b/target/ppc/helper.h
index 5f844cc968..81630a5f23 100644
--- a/target/ppc/helper.h
+++ b/target/ppc/helper.h
@@ -546,8 +546,8 @@ DEF_HELPER_4(xvrspip, void, env, i32, vsr, vsr)
 DEF_HELPER_4(xvrspiz, void, env, i32, vsr, vsr)
 DEF_HELPER_5(xxperm, void, env, i32, vsr, vsr, vsr)
 DEF_HELPER_5(xxpermr, void, env, i32, vsr, vsr, vsr)
-DEF_HELPER_4(xxextractuw, void, env, tl, tl, i32)
-DEF_HELPER_4(xxinsertw, void, env, tl, tl, i32)
+DEF_HELPER_4(xxextractuw, void, env, vsr, vsr, i32)
+DEF_HELPER_4(xxinsertw, void, env, vsr, vsr, i32)
 DEF_HELPER_4(xvxsigsp, void, env, i32, vsr, vsr)
 
 DEF_HELPER_2(efscfsi, i32, env, i32)
diff --git a/target/ppc/int_helper.c b/target/ppc/int_helper.c
index f616fb249d..10e7ee5943 100644
--- a/target/ppc/int_helper.c
+++ b/target/ppc/int_helper.c
@@ -1901,11 +1901,9 @@ VEXTRACT(uw, u32)
 VEXTRACT(d, u64)
 #undef VEXTRACT
 
-void helper_xxextractuw(CPUPPCState *env, target_ulong xtn,
-target_ulong xbn, uint32_t index)
+void helper_xxextractuw(CPUPPCState *env, ppc_vsr_t *xt,
+ppc_vsr_t *xb, uint32_t index)
 {
-ppc_vsr_t *xt = &env->vsr[xtn];
-ppc_vsr_t *xb = &env->vsr[xbn];
 size_t es = sizeof(uint32_t);
 uint32_t ext_index;
 int i;
@@ -1918,11 +1916,9 @@ void helper_xxextractuw(CPUPPCState *env, target_ulong 
xtn,
 }
 }
 
-void helper_xxinsertw(CPUPPCState *env, target_ulong xtn,
-  target_ulong xbn, uint32_t index)
+void helper_xxinsertw(CPUPPCState *env, ppc_vsr_t *xt,
+  ppc_vsr_t *xb, uint32_t index)
 {
-ppc_vsr_t *xt = &env->vsr[xtn];
-ppc_vsr_t *xb = &env->vsr[xbn];
 size_t es = sizeof(uint32_t);
 int ins_index, i = 0;
 
diff --git a/target/ppc/translate/vsx-impl.inc.c 
b/target/ppc/translate/vsx-impl.inc.c
index 7c79ec22dd..b8f24b7462 100644
--- a/target/ppc/translate/vsx-impl.inc.c
+++ b/target/ppc/translate/vsx-impl.inc.c
@@ -1569,7 +1569,7 @@ static void gen_xxsldwi(DisasContext *ctx)
 #define VSX_EXTRACT_INSERT(name)\
 static void gen_##name(DisasContext *ctx)   \
 {   \
-TCGv xt, xb;\
+TCGv_ptr xt, xb;\
 TCGv_i32 t0;\
 TCGv_i64 t1;\
 uint8_t uimm = UIMM4(ctx->opcode);  \
@@ -1578,8 +1578,8 @@ static void gen_##name(DisasContext *ctx) 
  \
 gen_exception(ctx, POWERPC_EXCP_VSXU);  \
 return; \
 }   \
-xt = tcg_const_tl(xT(ctx->opcode)); \
-xb = tcg_const_tl(xB(ctx->opcode)); \
+xt = gen_vsr_ptr(xT(ctx->opcode));  \
+xb = gen_vsr_ptr(xB(ctx->opcode));  \
 t0 = tcg_temp_new_i32();\
 t1 = tcg_temp_new_i64();\
 /*  \
@@ -1594,8 +1594,8 @@ static void gen_##name(DisasContext *ctx) 
  \
 }   \
 tcg_gen_movi_i32(t0, uimm); \
 gen_helper_##name(cpu_env, xt, xb, t0); \
-tcg_temp_free(xb);  \
-tcg_temp_free(xt);  \
+tcg_temp_free_ptr(xb);  \
+tcg_temp_free_ptr(xt);  \
 tcg_temp_free_i32(t0);  \
 tcg_temp_free_i64(t1);  \
 }
-- 
2.11.0

[Qemu-devel] [PATCH 14/14] target/ppc: improve VSX_FMADD with new GEN_VSX_HELPER_VSX_MADD macro

[Mark Cave-Ayland]

Introduce a new GEN_VSX_HELPER_VSX_MADD macro for the generator function which
enables the source and destination registers to be decoded at translation time.

Signed-off-by: Mark Cave-Ayland 
---
 target/ppc/fpu_helper.c |  12 +
 target/ppc/helper.h |  64 +++
 target/ppc/translate/vsx-impl.inc.c | 101 
 3 files changed, 101 insertions(+), 76 deletions(-)

diff --git a/target/ppc/fpu_helper.c b/target/ppc/fpu_helper.c
index 357be25867..6b5293495f 100644
--- a/target/ppc/fpu_helper.c
+++ b/target/ppc/fpu_helper.c
@@ -2270,19 +2270,11 @@ VSX_TSQRT(xvtsqrtsp, 4, float32, VsrW(i), -126, 23)
  */
 #define VSX_MADD(op, nels, tp, fld, maddflgs, afrm, sfprf, r2sp)  \
 void helper_##op(CPUPPCState *env, uint32_t opcode,   \
- ppc_vsr_t *xt, ppc_vsr_t *xa, ppc_vsr_t *xb) \
+ ppc_vsr_t *xt, ppc_vsr_t *xa,\
+ ppc_vsr_t *b, ppc_vsr_t *c)  \
 { \
-ppc_vsr_t *b, *c; \
 int i;\
   \
-if (afrm) { /* AxB + T */ \
-b = xb;   \
-c = xt;   \
-} else { /* AxT + B */\
-b = xt;   \
-c = xb;   \
-} \
-  \
 helper_reset_fpstatus(env);   \
   \
 for (i = 0; i < nels; i++) {  \
diff --git a/target/ppc/helper.h b/target/ppc/helper.h
index cd97fae438..5db6dc0797 100644
--- a/target/ppc/helper.h
+++ b/target/ppc/helper.h
@@ -389,14 +389,14 @@ DEF_HELPER_4(xssqrtdp, void, env, i32, vsr, vsr)
 DEF_HELPER_4(xsrsqrtedp, void, env, i32, vsr, vsr)
 DEF_HELPER_4(xstdivdp, void, env, i32, vsr, vsr)
 DEF_HELPER_3(xstsqrtdp, void, env, i32, vsr)
-DEF_HELPER_5(xsmaddadp, void, env, i32, vsr, vsr, vsr)
-DEF_HELPER_5(xsmaddmdp, void, env, i32, vsr, vsr, vsr)
-DEF_HELPER_5(xsmsubadp, void, env, i32, vsr, vsr, vsr)
-DEF_HELPER_5(xsmsubmdp, void, env, i32, vsr, vsr, vsr)
-DEF_HELPER_5(xsnmaddadp, void, env, i32, vsr, vsr, vsr)
-DEF_HELPER_5(xsnmaddmdp, void, env, i32, vsr, vsr, vsr)
-DEF_HELPER_5(xsnmsubadp, void, env, i32, vsr, vsr, vsr)
-DEF_HELPER_5(xsnmsubmdp, void, env, i32, vsr, vsr, vsr)
+DEF_HELPER_6(xsmaddadp, void, env, i32, vsr, vsr, vsr, vsr)
+DEF_HELPER_6(xsmaddmdp, void, env, i32, vsr, vsr, vsr, vsr)
+DEF_HELPER_6(xsmsubadp, void, env, i32, vsr, vsr, vsr, vsr)
+DEF_HELPER_6(xsmsubmdp, void, env, i32, vsr, vsr, vsr, vsr)
+DEF_HELPER_6(xsnmaddadp, void, env, i32, vsr, vsr, vsr, vsr)
+DEF_HELPER_6(xsnmaddmdp, void, env, i32, vsr, vsr, vsr, vsr)
+DEF_HELPER_6(xsnmsubadp, void, env, i32, vsr, vsr, vsr, vsr)
+DEF_HELPER_6(xsnmsubmdp, void, env, i32, vsr, vsr, vsr, vsr)
 DEF_HELPER_5(xscmpeqdp, void, env, i32, vsr, vsr, vsr)
 DEF_HELPER_5(xscmpgtdp, void, env, i32, vsr, vsr, vsr)
 DEF_HELPER_5(xscmpgedp, void, env, i32, vsr, vsr, vsr)
@@ -456,14 +456,14 @@ DEF_HELPER_4(xsresp, void, env, i32, vsr, vsr)
 DEF_HELPER_2(xsrsp, i64, env, i64)
 DEF_HELPER_4(xssqrtsp, void, env, i32, vsr, vsr)
 DEF_HELPER_4(xsrsqrtesp, void, env, i32, vsr, vsr)
-DEF_HELPER_5(xsmaddasp, void, env, i32, vsr, vsr, vsr)
-DEF_HELPER_5(xsmaddmsp, void, env, i32, vsr, vsr, vsr)
-DEF_HELPER_5(xsmsubasp, void, env, i32, vsr, vsr, vsr)
-DEF_HELPER_5(xsmsubmsp, void, env, i32, vsr, vsr, vsr)
-DEF_HELPER_5(xsnmaddasp, void, env, i32, vsr, vsr, vsr)
-DEF_HELPER_5(xsnmaddmsp, void, env, i32, vsr, vsr, vsr)
-DEF_HELPER_5(xsnmsubasp, void, env, i32, vsr, vsr, vsr)
-DEF_HELPER_5(xsnmsubmsp, void, env, i32, vsr, vsr, vsr)
+DEF_HELPER_6(xsmaddasp, void, env, i32, vsr, vsr, vsr, vsr)
+DEF_HELPER_6(xsmaddmsp, void, env, i32, vsr, vsr, vsr, vsr)
+DEF_HELPER_6(xsmsubasp, void, env, i32, vsr, vsr, vsr, vsr)
+DEF_HELPER_6(xsmsubmsp, void, env, i32, vsr, vsr, vsr, vsr)
+DEF_HELPER_6(xsnmaddasp, void, env, i32, vsr, vsr, vsr, vsr)
+DEF_HELPER_6(xsnmaddmsp, void, env, i32, vsr, vsr, vsr, vsr)
+DEF_HELPER_6(xsnmsubasp, void, env, i32, vsr, vsr, vsr, vsr)
+DEF_HELPER_6(xsnmsubmsp, void, env, i32, vsr, vsr, vsr, vsr)
 
 DEF_HELPER_5(xvadddp, void, env, i32, vsr, vsr, vsr)
 DEF_HELPER

[Qemu-devel] [PATCH 10/14] target/ppc: introduce GEN_VSX_HELPER_R2_AB macro to fpu_helper.c

[Mark Cave-Ayland]

Rather than perform the VSR register decoding within the helper itself,
introduce a new GEN_VSX_HELPER_R2_AB macro which performs the decode based
upon rA and rB at translation time.

Signed-off-by: Mark Cave-Ayland 
---
 target/ppc/fpu_helper.c | 10 --
 target/ppc/helper.h |  6 +++---
 target/ppc/translate/vsx-impl.inc.c | 24 +---
 3 files changed, 28 insertions(+), 12 deletions(-)

diff --git a/target/ppc/fpu_helper.c b/target/ppc/fpu_helper.c
index b26a1f1494..370b1d2c46 100644
--- a/target/ppc/fpu_helper.c
+++ b/target/ppc/fpu_helper.c
@@ -2434,10 +2434,9 @@ void helper_xscmpexpdp(CPUPPCState *env, uint32_t opcode,
 do_float_check_status(env, GETPC());
 }
 
-void helper_xscmpexpqp(CPUPPCState *env, uint32_t opcode)
+void helper_xscmpexpqp(CPUPPCState *env, uint32_t opcode,
+   ppc_vsr_t *xa, ppc_vsr_t *xb)
 {
-ppc_vsr_t *xa = &env->vsr[rA(opcode) + 32];
-ppc_vsr_t *xb = &env->vsr[rB(opcode) + 32];
 int64_t exp_a, exp_b;
 uint32_t cc;
 
@@ -2513,10 +2512,9 @@ VSX_SCALAR_CMP(xscmpodp, 1)
 VSX_SCALAR_CMP(xscmpudp, 0)
 
 #define VSX_SCALAR_CMPQ(op, ordered)\
-void helper_##op(CPUPPCState *env, uint32_t opcode) \
+void helper_##op(CPUPPCState *env, uint32_t opcode, \
+ ppc_vsr_t *xa, ppc_vsr_t *xb)  \
 {   \
-ppc_vsr_t *xa = &env->vsr[rA(opcode) + 32]; \
-ppc_vsr_t *xb = &env->vsr[rB(opcode) + 32]; \
 uint32_t cc = 0;\
 bool vxsnan_flag = false, vxvc_flag = false;\
 \
diff --git a/target/ppc/helper.h b/target/ppc/helper.h
index cea56ece30..167d6e45fd 100644
--- a/target/ppc/helper.h
+++ b/target/ppc/helper.h
@@ -402,11 +402,11 @@ DEF_HELPER_5(xscmpgtdp, void, env, i32, vsr, vsr, vsr)
 DEF_HELPER_5(xscmpgedp, void, env, i32, vsr, vsr, vsr)
 DEF_HELPER_5(xscmpnedp, void, env, i32, vsr, vsr, vsr)
 DEF_HELPER_4(xscmpexpdp, void, env, i32, vsr, vsr)
-DEF_HELPER_2(xscmpexpqp, void, env, i32)
+DEF_HELPER_4(xscmpexpqp, void, env, i32, vsr, vsr)
 DEF_HELPER_4(xscmpodp, void, env, i32, vsr, vsr)
 DEF_HELPER_4(xscmpudp, void, env, i32, vsr, vsr)
-DEF_HELPER_2(xscmpoqp, void, env, i32)
-DEF_HELPER_2(xscmpuqp, void, env, i32)
+DEF_HELPER_4(xscmpoqp, void, env, i32, vsr, vsr)
+DEF_HELPER_4(xscmpuqp, void, env, i32, vsr, vsr)
 DEF_HELPER_5(xsmaxdp, void, env, i32, vsr, vsr, vsr)
 DEF_HELPER_5(xsmindp, void, env, i32, vsr, vsr, vsr)
 DEF_HELPER_5(xsmaxcdp, void, env, i32, vsr, vsr, vsr)
diff --git a/target/ppc/translate/vsx-impl.inc.c 
b/target/ppc/translate/vsx-impl.inc.c
index f304c11538..51d4e0cdd6 100644
--- a/target/ppc/translate/vsx-impl.inc.c
+++ b/target/ppc/translate/vsx-impl.inc.c
@@ -1041,6 +1041,24 @@ static void gen_##name(DisasContext *ctx)
 \
 tcg_temp_free_ptr(xb);\
 }
 
+#define GEN_VSX_HELPER_R2_AB(name, op1, op2, inval, type) \
+static void gen_##name(DisasContext *ctx) \
+{ \
+TCGv_i32 opc; \
+TCGv_ptr xa, xb;  \
+if (unlikely(!ctx->vsx_enabled)) {\
+gen_exception(ctx, POWERPC_EXCP_VSXU);\
+return;   \
+} \
+opc = tcg_const_i32(ctx->opcode); \
+xa = gen_vsr_ptr(rA(ctx->opcode) + 32);   \
+xb = gen_vsr_ptr(rB(ctx->opcode) + 32);   \
+gen_helper_##name(cpu_env, opc, xa, xb);  \
+tcg_temp_free_i32(opc);   \
+tcg_temp_free_ptr(xa);\
+tcg_temp_free_ptr(xb);\
+}
+
 #define GEN_VSX_HELPER_XT_XB_ENV(name, op1, op2, inval, type) \
 static void gen_##name(DisasContext *ctx) \
 { \
@@ -1084,11 +1102,11 @@ GEN_VSX_HELPER_X3(xscmpgtdp, 0x0C, 0x01, 0, PPC2_ISA300)
 GEN_VSX_HELPER_X3(xscmpgedp, 0x0C, 0x02, 0, PPC2_ISA300)
 GEN_VSX_HELPER_X3(xscmpnedp, 0x0C, 0x03, 0, PPC2_ISA300)
 GEN_VSX_HELPER_X2_AB(xscmpexpdp, 0x0C, 0x07, 0, PPC2_ISA300)
-GEN_VSX_HELPER_2(xscmpexpqp, 0x04, 0x05, 0

Re: [Qemu-devel] [PULL 0/2] target/hppa patch queue

[Peter Maydell]

On Fri, 26 Apr 2019 at 19:22, Richard Henderson
 wrote:
>
> The following changes since commit 3284aa128153750f14a61e8a96fd085e6f2999b6:
>
>   Merge remote-tracking branch 'remotes/lersek/tags/edk2-pull-2019-04-22' 
> into staging (2019-04-24 13:19:41 +0100)
>
> are available in the Git repository at:
>
>   https://github.com/rth7680/qemu.git tags/pull-hppa-20190426
>
> for you to fetch changes up to 647ad90a1eb6c016071d21e4f1e22b9cd4986417:
>
>   target/hppa: Always return EXCP_DMAR for protection id trap (2019-04-26 
> 11:09:22 -0700)
>
> 
> Implement fast tlb insert insns.
> Fix data tlb exception for pa 1.1.
>
> 

Hi; this doesn't seem to build:

/home/pm215/qemu/target/hppa/translate.c: In function ‘trans_ixtlbxf’:
/home/pm215/qemu/target/hppa/translate.c:2544:5: error: too many
arguments to function ‘tcg_temp_new_i64’
 atl = tcg_temp_new_tl(ctx);
 ^
In file included from /home/pm215/qemu/tcg/tcg-op.h:28:0,
 from /home/pm215/qemu/target/hppa/translate.c:25:
/home/pm215/qemu/tcg/tcg.h:975:24: note: declared here
 static inline TCGv_i64 tcg_temp_new_i64(void)
^
/home/pm215/qemu/target/hppa/translate.c:2545:5: error: too many
arguments to function ‘tcg_temp_new_i64’
 stl = tcg_temp_new_tl(ctx);
 ^
In file included from /home/pm215/qemu/tcg/tcg-op.h:28:0,
 from /home/pm215/qemu/target/hppa/translate.c:25:
/home/pm215/qemu/tcg/tcg.h:975:24: note: declared here
 static inline TCGv_i64 tcg_temp_new_i64(void)
^
/home/pm215/qemu/target/hppa/translate.c:2546:5: error: too many
arguments to function ‘tcg_temp_new_i64’
 addr = tcg_temp_new_tl(ctx);
 ^
In file included from /home/pm215/qemu/tcg/tcg-op.h:28:0,
 from /home/pm215/qemu/target/hppa/translate.c:25:
/home/pm215/qemu/tcg/tcg.h:975:24: note: declared here
 static inline TCGv_i64 tcg_temp_new_i64(void)
^

(maybe a conflict with your other pullreq I just applied?)

thanks
-- PMM

Re: [Qemu-devel] [PULL 00/15] tcg patch queue

[Peter Maydell]

On Fri, 26 Apr 2019 at 18:24, Richard Henderson
 wrote:
>
> The following changes since commit 3284aa128153750f14a61e8a96fd085e6f2999b6:
>
>   Merge remote-tracking branch 'remotes/lersek/tags/edk2-pull-2019-04-22' 
> into staging (2019-04-24 13:19:41 +0100)
>
> are available in the Git repository at:
>
>   https://github.com/rth7680/qemu.git tags/pull-tcg-20190426
>
> for you to fetch changes up to ef5dae6805cce7b59d129d801bdc5db71bcbd60d:
>
>   cputlb: Fix io_readx() to respect the access_type (2019-04-25 10:40:06 
> -0700)
>
> 
> Add tcg_gen_extract2_*.
> Deal with overflow of TranslationBlocks.
> Respect access_type in io_readx.
>
> 



Applied, thanks.

Please update the changelog at https://wiki.qemu.org/ChangeLog/4.1
for any user-visible changes.

-- PMM

[Qemu-devel] [PATCH 05/14] target/ppc: introduce GEN_VSX_HELPER_X2 macro to fpu_helper.c

[Mark Cave-Ayland]

Rather than perform the VSR register decoding within the helper itself,
introduce a new GEN_VSX_HELPER_X2 macro which performs the decode based
upon xT and xB at translation time.

Signed-off-by: Mark Cave-Ayland 
---
 target/ppc/fpu_helper.c |  50 ++---
 target/ppc/helper.h | 122 +++
 target/ppc/translate/vsx-impl.inc.c | 140 
 3 files changed, 160 insertions(+), 152 deletions(-)

diff --git a/target/ppc/fpu_helper.c b/target/ppc/fpu_helper.c
index 39c4f4cfb0..05099e1291 100644
--- a/target/ppc/fpu_helper.c
+++ b/target/ppc/fpu_helper.c
@@ -2028,10 +2028,9 @@ void helper_xsdivqp(CPUPPCState *env, uint32_t opcode)
  *   sfprf - set FPRF
  */
 #define VSX_RE(op, nels, tp, fld, sfprf, r2sp)\
-void helper_##op(CPUPPCState *env, uint32_t opcode)   \
+void helper_##op(CPUPPCState *env, uint32_t opcode,   \
+ ppc_vsr_t *xt, ppc_vsr_t *xb)\
 { \
-ppc_vsr_t *xt = &env->vsr[xT(opcode)];\
-ppc_vsr_t *xb = &env->vsr[xB(opcode)];\
 int i;\
   \
 helper_reset_fpstatus(env);   \
@@ -2068,10 +2067,9 @@ VSX_RE(xvresp, 4, float32, VsrW(i), 0, 0)
  *   sfprf - set FPRF
  */
 #define VSX_SQRT(op, nels, tp, fld, sfprf, r2sp) \
-void helper_##op(CPUPPCState *env, uint32_t opcode)  \
+void helper_##op(CPUPPCState *env, uint32_t opcode,  \
+ ppc_vsr_t *xt, ppc_vsr_t *xb)   \
 {\
-ppc_vsr_t *xt = &env->vsr[xT(opcode)];   \
-ppc_vsr_t *xb = &env->vsr[xB(opcode)];   \
 int i;   \
  \
 helper_reset_fpstatus(env);  \
@@ -2116,10 +2114,9 @@ VSX_SQRT(xvsqrtsp, 4, float32, VsrW(i), 0, 0)
  *   sfprf - set FPRF
  */
 #define VSX_RSQRTE(op, nels, tp, fld, sfprf, r2sp)   \
-void helper_##op(CPUPPCState *env, uint32_t opcode)  \
+void helper_##op(CPUPPCState *env, uint32_t opcode,  \
+ ppc_vsr_t *xt, ppc_vsr_t *xb)   \
 {\
-ppc_vsr_t *xt = &env->vsr[xT(opcode)];   \
-ppc_vsr_t *xb = &env->vsr[xB(opcode)];   \
 int i;   \
  \
 helper_reset_fpstatus(env);  \
@@ -2767,10 +2764,9 @@ VSX_CMP(xvcmpnesp, 4, float32, VsrW(i), eq, 0, 0)
  *   sfprf - set FPRF
  */
 #define VSX_CVT_FP_TO_FP(op, nels, stp, ttp, sfld, tfld, sfprf)\
-void helper_##op(CPUPPCState *env, uint32_t opcode)\
+void helper_##op(CPUPPCState *env, uint32_t opcode,\
+ ppc_vsr_t *xt, ppc_vsr_t *xb) \
 {  \
-ppc_vsr_t *xt = &env->vsr[xT(opcode)]; \
-ppc_vsr_t *xb = &env->vsr[xB(opcode)]; \
 int i; \
\
 for (i = 0; i < nels; i++) {   \
@@ -2839,10 +2835,9 @@ VSX_CVT_FP_TO_FP_VECTOR(xscvdpqp, 1, float64, float128, 
VsrD(0), f128, 1)
  *   sfprf - set FPRF
  */
 #define VSX_CVT_FP_TO_FP_HP(op, nels, stp, ttp, sfld, tfld, sfprf) \
-void helper_##op(CPUPPCState *env, uint32_t opcode)\
+void helper_##op(CPUPPCState *env, uint32_t opcode,\
+ ppc_vsr_t *xt, ppc_vsr_t *xb) \
 {  \
-ppc_vsr_t *xt = &env->vsr[xT(opcode)]; \
-ppc_vsr_t *xb = &env->vsr[xB(opcode)]; \
 int i; \
\
 memset(xt, 0, sizeof(ppc_vsr_t));  \
@@ -2871,10 +2866,9 @@

[Qemu-devel] [PATCH 08/14] target/ppc: introduce GEN_VSX_HELPER_R3 macro to fpu_helper.c

[Mark Cave-Ayland]

Rather than perform the VSR register decoding within the helper itself,
introduce a new GEN_VSX_HELPER_X3 macro which performs the decode based
upon rD, rA and rB at translation time.

Signed-off-by: Mark Cave-Ayland 
---
 target/ppc/fpu_helper.c | 36 
 target/ppc/helper.h | 16 
 target/ppc/translate/vsx-impl.inc.c | 36 
 3 files changed, 48 insertions(+), 40 deletions(-)

diff --git a/target/ppc/fpu_helper.c b/target/ppc/fpu_helper.c
index 4b4bc229b5..4e97093186 100644
--- a/target/ppc/fpu_helper.c
+++ b/target/ppc/fpu_helper.c
@@ -1840,11 +1840,9 @@ VSX_ADD_SUB(xssubsp, sub, 1, float64, VsrD(0), 1, 1)
 VSX_ADD_SUB(xvsubdp, sub, 2, float64, VsrD(i), 0, 0)
 VSX_ADD_SUB(xvsubsp, sub, 4, float32, VsrW(i), 0, 0)
 
-void helper_xsaddqp(CPUPPCState *env, uint32_t opcode)
+void helper_xsaddqp(CPUPPCState *env, uint32_t opcode,
+ppc_vsr_t *xt, ppc_vsr_t *xa, ppc_vsr_t *xb)
 {
-ppc_vsr_t *xt = &env->vsr[rD(opcode) + 32];
-ppc_vsr_t *xa = &env->vsr[rA(opcode) + 32];
-ppc_vsr_t *xb = &env->vsr[rB(opcode) + 32];
 float_status tstat;
 
 helper_reset_fpstatus(env);
@@ -1914,11 +1912,9 @@ VSX_MUL(xsmulsp, 1, float64, VsrD(0), 1, 1)
 VSX_MUL(xvmuldp, 2, float64, VsrD(i), 0, 0)
 VSX_MUL(xvmulsp, 4, float32, VsrW(i), 0, 0)
 
-void helper_xsmulqp(CPUPPCState *env, uint32_t opcode)
+void helper_xsmulqp(CPUPPCState *env, uint32_t opcode,
+ppc_vsr_t *xt, ppc_vsr_t *xa, ppc_vsr_t *xb)
 {
-ppc_vsr_t *xt = &env->vsr[rD(opcode) + 32];
-ppc_vsr_t *xa = &env->vsr[rA(opcode) + 32];
-ppc_vsr_t *xb = &env->vsr[rB(opcode) + 32];
 float_status tstat;
 
 helper_reset_fpstatus(env);
@@ -1989,11 +1985,9 @@ VSX_DIV(xsdivsp, 1, float64, VsrD(0), 1, 1)
 VSX_DIV(xvdivdp, 2, float64, VsrD(i), 0, 0)
 VSX_DIV(xvdivsp, 4, float32, VsrW(i), 0, 0)
 
-void helper_xsdivqp(CPUPPCState *env, uint32_t opcode)
+void helper_xsdivqp(CPUPPCState *env, uint32_t opcode,
+ppc_vsr_t *xt, ppc_vsr_t *xa, ppc_vsr_t *xb)
 {
-ppc_vsr_t *xt = &env->vsr[rD(opcode) + 32];
-ppc_vsr_t *xa = &env->vsr[rA(opcode) + 32];
-ppc_vsr_t *xb = &env->vsr[rB(opcode) + 32];
 float_status tstat;
 
 helper_reset_fpstatus(env);
@@ -2600,11 +2594,9 @@ VSX_MAX_MIN(xvmindp, minnum, 2, float64, VsrD(i))
 VSX_MAX_MIN(xvminsp, minnum, 4, float32, VsrW(i))
 
 #define VSX_MAX_MINC(name, max)   \
-void helper_##name(CPUPPCState *env, uint32_t opcode) \
+void helper_##name(CPUPPCState *env, uint32_t opcode, \
+   ppc_vsr_t *xt, ppc_vsr_t *xa, ppc_vsr_t *xb)   \
 { \
-ppc_vsr_t *xt = &env->vsr[rD(opcode) + 32];   \
-ppc_vsr_t *xa = &env->vsr[rA(opcode) + 32];   \
-ppc_vsr_t *xb = &env->vsr[rB(opcode) + 32];   \
 ppc_vsr_t r;  \
 bool vxsnan_flag = false, vex_flag = false;   \
   \
@@ -2637,11 +2629,9 @@ VSX_MAX_MINC(xsmaxcdp, 1);
 VSX_MAX_MINC(xsmincdp, 0);
 
 #define VSX_MAX_MINJ(name, max)   \
-void helper_##name(CPUPPCState *env, uint32_t opcode) \
+void helper_##name(CPUPPCState *env, uint32_t opcode, \
+   ppc_vsr_t *xt, ppc_vsr_t *xa, ppc_vsr_t *xb)   \
 { \
-ppc_vsr_t *xt = &env->vsr[rD(opcode) + 32];   \
-ppc_vsr_t *xa = &env->vsr[rA(opcode) + 32];   \
-ppc_vsr_t *xb = &env->vsr[rB(opcode) + 32];   \
 ppc_vsr_t r;  \
 bool vxsnan_flag = false, vex_flag = false;   \
   \
@@ -3405,11 +3395,9 @@ void helper_xssqrtqp(CPUPPCState *env, uint32_t opcode)
 do_float_check_status(env, GETPC());
 }
 
-void helper_xssubqp(CPUPPCState *env, uint32_t opcode)
+void helper_xssubqp(CPUPPCState *env, uint32_t opcode,
+ppc_vsr_t *xt, ppc_vsr_t *xa, ppc_vsr_t *xb)
 {
-ppc_vsr_t *xt = &env->vsr[rD(opcode) + 32];
-ppc_vsr_t *xa = &env->vsr[rA(opcode) + 32];
-ppc_vsr_t *xb = &env->vsr[rB(opcode) + 32];
 float_status tstat;
 
 helper_reset_fpstatus(env);
diff --git a/target/ppc/helper.h b/target/ppc/helper.h
index cb6b7a55c1..8ed35f91da 100644
--- a/target/ppc/helper.h
+++ b/target/ppc/helper.h
@@ -378,12 +378,12 @@ DEF_HELPER_4(

[Qemu-devel] [PATCH 04/14] target/ppc: introduce GEN_VSX_HELPER_X3 macro to fpu_helper.c

[Mark Cave-Ayland]

Rather than perform the VSR register decoding within the helper itself,
introduce a new GEN_VSX_HELPER_X3 macro which performs the decode based
upon xT, xA and xB at translation time.

Signed-off-by: Mark Cave-Ayland 
---
 target/ppc/fpu_helper.c |  48 ---
 target/ppc/helper.h | 140 ---
 target/ppc/translate/vsx-impl.inc.c | 163 +---
 3 files changed, 183 insertions(+), 168 deletions(-)

diff --git a/target/ppc/fpu_helper.c b/target/ppc/fpu_helper.c
index 148ee5ac4c..39c4f4cfb0 100644
--- a/target/ppc/fpu_helper.c
+++ b/target/ppc/fpu_helper.c
@@ -1801,11 +1801,9 @@ uint32_t helper_efdcmpeq(CPUPPCState *env, uint64_t op1, 
uint64_t op2)
  *   sfprf - set FPRF
  */
 #define VSX_ADD_SUB(name, op, nels, tp, fld, sfprf, r2sp)\
-void helper_##name(CPUPPCState *env, uint32_t opcode)\
+void helper_##name(CPUPPCState *env, uint32_t opcode,\
+   ppc_vsr_t *xt, ppc_vsr_t *xa, ppc_vsr_t *xb)  \
 {\
-ppc_vsr_t *xt = &env->vsr[xT(opcode)];   \
-ppc_vsr_t *xa = &env->vsr[xA(opcode)];   \
-ppc_vsr_t *xb = &env->vsr[xB(opcode)];   \
 int i;   \
  \
 helper_reset_fpstatus(env);  \
@@ -1880,11 +1878,9 @@ void helper_xsaddqp(CPUPPCState *env, uint32_t opcode)
  *   sfprf - set FPRF
  */
 #define VSX_MUL(op, nels, tp, fld, sfprf, r2sp)  \
-void helper_##op(CPUPPCState *env, uint32_t opcode)  \
+void helper_##op(CPUPPCState *env, uint32_t opcode,  \
+ ppc_vsr_t *xt, ppc_vsr_t *xa, ppc_vsr_t *xb)\
 {\
-ppc_vsr_t *xt = &env->vsr[xT(opcode)];   \
-ppc_vsr_t *xa = &env->vsr[xA(opcode)];   \
-ppc_vsr_t *xb = &env->vsr[xB(opcode)];   \
 int i;   \
  \
 helper_reset_fpstatus(env);  \
@@ -1954,11 +1950,9 @@ void helper_xsmulqp(CPUPPCState *env, uint32_t opcode)
  *   sfprf - set FPRF
  */
 #define VSX_DIV(op, nels, tp, fld, sfprf, r2sp)   \
-void helper_##op(CPUPPCState *env, uint32_t opcode)   \
+void helper_##op(CPUPPCState *env, uint32_t opcode,   \
+ ppc_vsr_t *xt, ppc_vsr_t *xa, ppc_vsr_t *xb) \
 { \
-ppc_vsr_t *xt = &env->vsr[xT(opcode)];\
-ppc_vsr_t *xa = &env->vsr[xA(opcode)];\
-ppc_vsr_t *xb = &env->vsr[xB(opcode)];\
 int i;\
   \
 helper_reset_fpstatus(env);   \
@@ -2286,11 +2280,9 @@ VSX_TSQRT(xvtsqrtsp, 4, float32, VsrW(i), -126, 23)
  *   sfprf - set FPRF
  */
 #define VSX_MADD(op, nels, tp, fld, maddflgs, afrm, sfprf, r2sp)  \
-void helper_##op(CPUPPCState *env, uint32_t opcode)   \
+void helper_##op(CPUPPCState *env, uint32_t opcode,   \
+ ppc_vsr_t *xt, ppc_vsr_t *xa, ppc_vsr_t *xb) \
 { \
-ppc_vsr_t *xt = &env->vsr[xT(opcode)];\
-ppc_vsr_t *xa = &env->vsr[xA(opcode)];\
-ppc_vsr_t *xb = &env->vsr[xB(opcode)];\
 ppc_vsr_t *b, *c; \
 int i;\
   \
@@ -2383,11 +2375,9 @@ VSX_MADD(xvnmsubmsp, 4, float32, VsrW(i), NMSUB_FLGS, 0, 
0, 0)
  *   svxvc - set VXVC bit
  */
 #define VSX_SCALAR_CMP_DP(op, cmp, exp, svxvc)\
-void helper_##op(CPUPPCState *env, uint32_t opcode)   \
+void helper_##op(CPUPPCState *env, uint32_t opcode,   \
+  

[Qemu-devel] [PATCH 01/14] target/ppc: remove getVSR()/putVSR() from fpu_helper.c

[Mark Cave-Ayland]

Since commit 8a14d31b00 "target/ppc: switch fpr/vsrl registers so all VSX
registers are in host endian order" functions getVSR() and putVSR() which used
to convert the VSR registers into host endian order are no longer required.

Signed-off-by: Mark Cave-Ayland 
---
 target/ppc/fpu_helper.c | 707 ++--
 1 file changed, 317 insertions(+), 390 deletions(-)

diff --git a/target/ppc/fpu_helper.c b/target/ppc/fpu_helper.c
index 0b7308f539..148ee5ac4c 100644
--- a/target/ppc/fpu_helper.c
+++ b/target/ppc/fpu_helper.c
@@ -1803,35 +1803,33 @@ uint32_t helper_efdcmpeq(CPUPPCState *env, uint64_t 
op1, uint64_t op2)
 #define VSX_ADD_SUB(name, op, nels, tp, fld, sfprf, r2sp)\
 void helper_##name(CPUPPCState *env, uint32_t opcode)\
 {\
-ppc_vsr_t xt, xa, xb;\
+ppc_vsr_t *xt = &env->vsr[xT(opcode)];   \
+ppc_vsr_t *xa = &env->vsr[xA(opcode)];   \
+ppc_vsr_t *xb = &env->vsr[xB(opcode)];   \
 int i;   \
  \
-getVSR(xA(opcode), &xa, env);\
-getVSR(xB(opcode), &xb, env);\
-getVSR(xT(opcode), &xt, env);\
 helper_reset_fpstatus(env);  \
  \
 for (i = 0; i < nels; i++) { \
 float_status tstat = env->fp_status; \
 set_float_exception_flags(0, &tstat);\
-xt.fld = tp##_##op(xa.fld, xb.fld, &tstat);  \
+xt->fld = tp##_##op(xa->fld, xb->fld, &tstat);   \
 env->fp_status.float_exception_flags |= tstat.float_exception_flags; \
  \
 if (unlikely(tstat.float_exception_flags & float_flag_invalid)) {\
 float_invalid_op_addsub(env, sfprf, GETPC(), \
-tp##_classify(xa.fld) |  \
-tp##_classify(xb.fld));  \
+tp##_classify(xa->fld) | \
+tp##_classify(xb->fld)); \
 }\
  \
 if (r2sp) {  \
-xt.fld = helper_frsp(env, xt.fld);   \
+xt->fld = helper_frsp(env, xt->fld); \
 }\
  \
 if (sfprf) { \
-helper_compute_fprf_float64(env, xt.fld);\
+helper_compute_fprf_float64(env, xt->fld);   \
 }\
 }\
-putVSR(xT(opcode), &xt, env);\
 do_float_check_status(env, GETPC()); \
 }
 
@@ -1846,12 +1844,11 @@ VSX_ADD_SUB(xvsubsp, sub, 4, float32, VsrW(i), 0, 0)
 
 void helper_xsaddqp(CPUPPCState *env, uint32_t opcode)
 {
-ppc_vsr_t xt, xa, xb;
+ppc_vsr_t *xt = &env->vsr[rD(opcode) + 32];
+ppc_vsr_t *xa = &env->vsr[rA(opcode) + 32];
+ppc_vsr_t *xb = &env->vsr[rB(opcode) + 32];
 float_status tstat;
 
-getVSR(rA(opcode) + 32, &xa, env);
-getVSR(rB(opcode) + 32, &xb, env);
-getVSR(rD(opcode) + 32, &xt, env);
 helper_reset_fpstatus(env);
 
 tstat = env->fp_status;
@@ -1860,18 +1857,17 @@ void helper_xsaddqp(CPUPPCState *env, uint32_t opcode)
 }
 
 set_float_exception_flags(0, &tstat);
-xt.f128 = float128_add(xa.f128, xb.f128, &tstat);
+xt->f128 = float128_add(xa->f128, xb->f128, &tstat);
 env->fp_status.float_exception_flags |= tstat.float_exception_flags;
 
 if (unlikely(tstat.float_exception_flags & float_flag_invalid)) {
 float_invalid_op_addsub(env, 1, GETPC(),
-float128_classify(xa.f128) |
-   

[Qemu-devel] [PATCH 06/14] target/ppc: introduce GEN_VSX_HELPER_X2_AB macro to fpu_helper.c

[Mark Cave-Ayland]

Rather than perform the VSR register decoding within the helper itself,
introduce a new GEN_VSX_HELPER_X2_AB macro which performs the decode based
upon xA and xB at translation time.

Signed-off-by: Mark Cave-Ayland 
---
 target/ppc/fpu_helper.c | 15 ++-
 target/ppc/helper.h | 12 ++--
 target/ppc/translate/vsx-impl.inc.c | 30 --
 3 files changed, 36 insertions(+), 21 deletions(-)

diff --git a/target/ppc/fpu_helper.c b/target/ppc/fpu_helper.c
index 05099e1291..a2ff71e379 100644
--- a/target/ppc/fpu_helper.c
+++ b/target/ppc/fpu_helper.c
@@ -2164,10 +2164,9 @@ VSX_RSQRTE(xvrsqrtesp, 4, float32, VsrW(i), 0, 0)
  *   nbits - number of fraction bits
  */
 #define VSX_TDIV(op, nels, tp, fld, emin, emax, nbits)  \
-void helper_##op(CPUPPCState *env, uint32_t opcode) \
+void helper_##op(CPUPPCState *env, uint32_t opcode, \
+ ppc_vsr_t *xa, ppc_vsr_t *xb)  \
 {   \
-ppc_vsr_t *xa = &env->vsr[xA(opcode)];  \
-ppc_vsr_t *xb = &env->vsr[xB(opcode)];  \
 int i;  \
 int fe_flag = 0;\
 int fg_flag = 0;\
@@ -2413,10 +2412,9 @@ VSX_SCALAR_CMP_DP(xscmpgedp, le, 1, 1)
 VSX_SCALAR_CMP_DP(xscmpgtdp, lt, 1, 1)
 VSX_SCALAR_CMP_DP(xscmpnedp, eq, 0, 0)
 
-void helper_xscmpexpdp(CPUPPCState *env, uint32_t opcode)
+void helper_xscmpexpdp(CPUPPCState *env, uint32_t opcode,
+   ppc_vsr_t *xa, ppc_vsr_t *xb)
 {
-ppc_vsr_t *xa = &env->vsr[xA(opcode)];
-ppc_vsr_t *xb = &env->vsr[xB(opcode)];
 int64_t exp_a, exp_b;
 uint32_t cc;
 
@@ -2474,10 +2472,9 @@ void helper_xscmpexpqp(CPUPPCState *env, uint32_t opcode)
 }
 
 #define VSX_SCALAR_CMP(op, ordered)  \
-void helper_##op(CPUPPCState *env, uint32_t opcode)  \
+void helper_##op(CPUPPCState *env, uint32_t opcode,  \
+ ppc_vsr_t *xa, ppc_vsr_t *xb)   \
 {\
-ppc_vsr_t *xa = &env->vsr[xA(opcode)];   \
-ppc_vsr_t *xb = &env->vsr[xB(opcode)];   \
 uint32_t cc = 0; \
 bool vxsnan_flag = false, vxvc_flag = false; \
  \
diff --git a/target/ppc/helper.h b/target/ppc/helper.h
index c957c53755..9c236f016e 100644
--- a/target/ppc/helper.h
+++ b/target/ppc/helper.h
@@ -387,7 +387,7 @@ DEF_HELPER_2(xsdivqp, void, env, i32)
 DEF_HELPER_4(xsredp, void, env, i32, vsr, vsr)
 DEF_HELPER_4(xssqrtdp, void, env, i32, vsr, vsr)
 DEF_HELPER_4(xsrsqrtedp, void, env, i32, vsr, vsr)
-DEF_HELPER_2(xstdivdp, void, env, i32)
+DEF_HELPER_4(xstdivdp, void, env, i32, vsr, vsr)
 DEF_HELPER_2(xstsqrtdp, void, env, i32)
 DEF_HELPER_5(xsmaddadp, void, env, i32, vsr, vsr, vsr)
 DEF_HELPER_5(xsmaddmdp, void, env, i32, vsr, vsr, vsr)
@@ -401,10 +401,10 @@ DEF_HELPER_5(xscmpeqdp, void, env, i32, vsr, vsr, vsr)
 DEF_HELPER_5(xscmpgtdp, void, env, i32, vsr, vsr, vsr)
 DEF_HELPER_5(xscmpgedp, void, env, i32, vsr, vsr, vsr)
 DEF_HELPER_5(xscmpnedp, void, env, i32, vsr, vsr, vsr)
-DEF_HELPER_2(xscmpexpdp, void, env, i32)
+DEF_HELPER_4(xscmpexpdp, void, env, i32, vsr, vsr)
 DEF_HELPER_2(xscmpexpqp, void, env, i32)
-DEF_HELPER_2(xscmpodp, void, env, i32)
-DEF_HELPER_2(xscmpudp, void, env, i32)
+DEF_HELPER_4(xscmpodp, void, env, i32, vsr, vsr)
+DEF_HELPER_4(xscmpudp, void, env, i32, vsr, vsr)
 DEF_HELPER_2(xscmpoqp, void, env, i32)
 DEF_HELPER_2(xscmpuqp, void, env, i32)
 DEF_HELPER_5(xsmaxdp, void, env, i32, vsr, vsr, vsr)
@@ -472,7 +472,7 @@ DEF_HELPER_5(xvdivdp, void, env, i32, vsr, vsr, vsr)
 DEF_HELPER_4(xvredp, void, env, i32, vsr, vsr)
 DEF_HELPER_4(xvsqrtdp, void, env, i32, vsr, vsr)
 DEF_HELPER_4(xvrsqrtedp, void, env, i32, vsr, vsr)
-DEF_HELPER_2(xvtdivdp, void, env, i32)
+DEF_HELPER_4(xvtdivdp, void, env, i32, vsr, vsr)
 DEF_HELPER_2(xvtsqrtdp, void, env, i32)
 DEF_HELPER_5(xvmaddadp, void, env, i32, vsr, vsr, vsr)
 DEF_HELPER_5(xvmaddmdp, void, env, i32, vsr, vsr, vsr)
@@ -510,7 +510,7 @@ DEF_HELPER_5(xvdivsp, void, env, i32, vsr, vsr, vsr)
 DEF_HELPER_4(xvresp, void, env, i32, vsr, vsr)
 DEF_HELPER_4(xvsqrtsp, void, env, i32, vsr, vsr)
 DEF_HELPER_4(xvrsqrtesp, void, env, i32, vsr, vsr)
-DEF_HELPER_2(xvtdivsp, void, env, i32)
+DEF_HELPER_4(xvtdivsp, void, env, i32, vsr, vsr)
 DEF_HELPER_2(xvtsqrtsp, void, env, i32)
 DEF_HELPER_5(xvmaddasp, void, env, i32, vsr, vsr, vsr)
 DEF_HELPER_5(xvmaddmsp, void, env, i32, vsr, vsr

[Qemu-devel] [PATCH 09/14] target/ppc: introduce GEN_VSX_HELPER_R2 macro to fpu_helper.c

[Mark Cave-Ayland]

Rather than perform the VSR register decoding within the helper itself,
introduce a new GEN_VSX_HELPER_X3 macro which performs the decode based
upon rD and rB at translation time.

Signed-off-by: Mark Cave-Ayland 
---
 target/ppc/fpu_helper.c | 31 --
 target/ppc/helper.h | 20 +--
 target/ppc/translate/vsx-impl.inc.c | 38 +++--
 3 files changed, 50 insertions(+), 39 deletions(-)

diff --git a/target/ppc/fpu_helper.c b/target/ppc/fpu_helper.c
index 4e97093186..b26a1f1494 100644
--- a/target/ppc/fpu_helper.c
+++ b/target/ppc/fpu_helper.c
@@ -2786,10 +2786,9 @@ VSX_CVT_FP_TO_FP(xvcvspdp, 2, float32, float64, VsrW(2 * 
i), VsrD(i), 0)
  *   sfprf - set FPRF
  */
 #define VSX_CVT_FP_TO_FP_VECTOR(op, nels, stp, ttp, sfld, tfld, sfprf)\
-void helper_##op(CPUPPCState *env, uint32_t opcode)   \
+void helper_##op(CPUPPCState *env, uint32_t opcode,   \
+ ppc_vsr_t *xt, ppc_vsr_t *xb)\
 {   \
-ppc_vsr_t *xt = &env->vsr[rD(opcode) + 32]; \
-ppc_vsr_t *xb = &env->vsr[rB(opcode) + 32]; \
 int i;  \
 \
 for (i = 0; i < nels; i++) {\
@@ -2952,10 +2951,9 @@ VSX_CVT_FP_TO_INT(xvcvspuxws, 4, float32, uint32, 
VsrW(i), VsrW(i), 0U)
  *   rnan  - resulting NaN
  */
 #define VSX_CVT_FP_TO_INT_VECTOR(op, stp, ttp, sfld, tfld, rnan) \
-void helper_##op(CPUPPCState *env, uint32_t opcode)  \
+void helper_##op(CPUPPCState *env, uint32_t opcode,  \
+ ppc_vsr_t *xt, ppc_vsr_t *xb)   \
 {\
-ppc_vsr_t *xt = &env->vsr[rD(opcode) + 32];  \
-ppc_vsr_t *xb = &env->vsr[rB(opcode) + 32];  \
  \
 memset(xt, 0, sizeof(ppc_vsr_t));\
  \
@@ -3028,11 +3026,9 @@ VSX_CVT_INT_TO_FP(xvcvuxwsp, 4, uint32, float32, 
VsrW(i), VsrW(i), 0, 0)
  *   tfld  - target vsr_t field
  */
 #define VSX_CVT_INT_TO_FP_VECTOR(op, stp, ttp, sfld, tfld)  \
-void helper_##op(CPUPPCState *env, uint32_t opcode) \
+void helper_##op(CPUPPCState *env, uint32_t opcode, \
+ ppc_vsr_t *xt, ppc_vsr_t *xb)  \
 {   \
-ppc_vsr_t *xt = &env->vsr[rD(opcode) + 32]; \
-ppc_vsr_t *xb = &env->vsr[rB(opcode) + 32]; \
-\
 xt->tfld = stp##_to_##ttp(xb->sfld, &env->fp_status);   \
 helper_compute_fprf_##ttp(env, xt->tfld);   \
 \
@@ -3250,10 +3246,9 @@ void helper_xststdcsp(CPUPPCState *env, uint32_t opcode, 
ppc_vsr_t *xb)
 env->crf[BF(opcode)] = cc;
 }
 
-void helper_xsrqpi(CPUPPCState *env, uint32_t opcode)
+void helper_xsrqpi(CPUPPCState *env, uint32_t opcode,
+   ppc_vsr_t *xt, ppc_vsr_t *xb)
 {
-ppc_vsr_t *xt = &env->vsr[rD(opcode) + 32];
-ppc_vsr_t *xb = &env->vsr[rB(opcode) + 32];
 uint8_t r = Rrm(opcode);
 uint8_t ex = Rc(opcode);
 uint8_t rmc = RMC(opcode);
@@ -3307,10 +3302,9 @@ void helper_xsrqpi(CPUPPCState *env, uint32_t opcode)
 do_float_check_status(env, GETPC());
 }
 
-void helper_xsrqpxp(CPUPPCState *env, uint32_t opcode)
+void helper_xsrqpxp(CPUPPCState *env, uint32_t opcode,
+ppc_vsr_t *xt, ppc_vsr_t *xb)
 {
-ppc_vsr_t *xt = &env->vsr[rD(opcode) + 32];
-ppc_vsr_t *xb = &env->vsr[rB(opcode) + 32];
 uint8_t r = Rrm(opcode);
 uint8_t rmc = RMC(opcode);
 uint8_t rmode = 0;
@@ -3361,10 +3355,9 @@ void helper_xsrqpxp(CPUPPCState *env, uint32_t opcode)
 do_float_check_status(env, GETPC());
 }
 
-void helper_xssqrtqp(CPUPPCState *env, uint32_t opcode)
+void helper_xssqrtqp(CPUPPCState *env, uint32_t opcode,
+ ppc_vsr_t *xt, ppc_vsr_t *xb)
 {
-ppc_vsr_t *xt = &env->vsr[rD(opcode) + 32];
-ppc_vsr_t *xb = &env->vsr[rB(opcode) + 32];
 float_status tstat;
 
 memset(xt, 0, sizeof(ppc_vsr_t));
diff --git a/target/ppc/helper.h b/target/ppc/helper.h
index 8ed35f91da..cea56ece30 100644
--- a/target/ppc/helper.h
+++ b/target/ppc/helper.h
@@ -414,16 +414,16 @@

[Qemu-devel] [PATCH 00/14] target/ppc: remove getVSR()/putVSR() and further tidy-up

[Mark Cave-Ayland]

With the conversion of PPC VSX registers to host endian during the 4.0 
development
cycle, the VSX helpers getVSR() and putVSR() which were used to convert between 
big
endian and host endian (and are currently just a no-op) can now be removed. This
eliminates an extra copy for each VSX source and destination register at 
runtime.

Patches 1-3 do the elimination work on a per-file basis and switch VSX register
accesses to be via pointers rather than on copies managed using 
getVSR()/putVSR().

After this patches 4-12 change the VSX registers to be passed to helpers via 
pointers
rather than register number so that the decode of the vector register pointers 
occurs
at translation time instead of at runtime. This matches how VMX instructions are
currently decoded.

Finally patches 13 and 14 perform some additional tidy-up around decoding 
registers
at translation time instead of runtime for VSX_REST_DC and VSX_FMADD.

Greg: I've added you as CC since you managed to find a bug in my last series. 
This
one is much more mechanical, but if you are able to confirm this doesn't 
introduce
any regressions in your test images then that would be great.

Signed-off-by: Mark Cave-Ayland 


Mark Cave-Ayland (14):
  target/ppc: remove getVSR()/putVSR() from fpu_helper.c
  target/ppc: remove getVSR()/putVSR() from mem_helper.c
  target/ppc: remove getVSR()/putVSR() from int_helper.c
  target/ppc: introduce GEN_VSX_HELPER_X3 macro to fpu_helper.c
  target/ppc: introduce GEN_VSX_HELPER_X2 macro to fpu_helper.c
  target/ppc: introduce GEN_VSX_HELPER_X2_AB macro to fpu_helper.c
  target/ppc: introduce GEN_VSX_HELPER_X1 macro to fpu_helper.c
  target/ppc: introduce GEN_VSX_HELPER_R3 macro to fpu_helper.c
  target/ppc: introduce GEN_VSX_HELPER_R2 macro to fpu_helper.c
  target/ppc: introduce GEN_VSX_HELPER_R2_AB macro to fpu_helper.c
  target/ppc: decode target register in VSX_VECTOR_LOAD_STORE_LENGTH at
translation time
  target/ppc: decode target register in VSX_EXTRACT_INSERT at
translation time
  target/ppc: improve VSX_TEST_DC with new generator macros
  target/ppc: improve VSX_FMADD with new GEN_VSX_HELPER_VSX_MADD macro

 target/ppc/fpu_helper.c | 745 +++-
 target/ppc/helper.h | 344 +
 target/ppc/int_helper.c |  24 +-
 target/ppc/internal.h   |  12 -
 target/ppc/mem_helper.c |  22 +-
 target/ppc/translate/vsx-impl.inc.c | 523 -
 6 files changed, 842 insertions(+), 828 deletions(-)

-- 
2.11.0

[Qemu-devel] [PATCH 07/14] target/ppc: introduce GEN_VSX_HELPER_X1 macro to fpu_helper.c

[Mark Cave-Ayland]

Rather than perform the VSR register decoding within the helper itself,
introduce a new GEN_VSX_HELPER_X1 macro which performs the decode based
upon xB at translation time.

Signed-off-by: Mark Cave-Ayland 
---
 target/ppc/fpu_helper.c |  6 ++
 target/ppc/helper.h |  8 
 target/ppc/translate/vsx-impl.inc.c | 24 
 3 files changed, 26 insertions(+), 12 deletions(-)

diff --git a/target/ppc/fpu_helper.c b/target/ppc/fpu_helper.c
index a2ff71e379..4b4bc229b5 100644
--- a/target/ppc/fpu_helper.c
+++ b/target/ppc/fpu_helper.c
@@ -2221,9 +2221,8 @@ VSX_TDIV(xvtdivsp, 4, float32, VsrW(i), -126, 127, 23)
  *   nbits - number of fraction bits
  */
 #define VSX_TSQRT(op, nels, tp, fld, emin, nbits)   \
-void helper_##op(CPUPPCState *env, uint32_t opcode) \
+void helper_##op(CPUPPCState *env, uint32_t opcode, ppc_vsr_t *xb)  \
 {   \
-ppc_vsr_t *xb = &env->vsr[xB(opcode)];  \
 int i;  \
 int fe_flag = 0;\
 int fg_flag = 0;\
@@ -3230,9 +3229,8 @@ VSX_TEST_DC(xvtstdcsp, 4, xB(opcode), float32, VsrW(i), 
VsrW(i), UINT32_MAX, 0)
 VSX_TEST_DC(xststdcdp, 1, xB(opcode), float64, VsrD(0), VsrD(0), 0, 1)
 VSX_TEST_DC(xststdcqp, 1, (rB(opcode) + 32), float128, f128, VsrD(0), 0, 1)
 
-void helper_xststdcsp(CPUPPCState *env, uint32_t opcode)
+void helper_xststdcsp(CPUPPCState *env, uint32_t opcode, ppc_vsr_t *xb)
 {
-ppc_vsr_t *xb = &env->vsr[xB(opcode)];
 uint32_t dcmx, sign, exp;
 uint32_t cc, match = 0, not_sp = 0;
 
diff --git a/target/ppc/helper.h b/target/ppc/helper.h
index 9c236f016e..cb6b7a55c1 100644
--- a/target/ppc/helper.h
+++ b/target/ppc/helper.h
@@ -388,7 +388,7 @@ DEF_HELPER_4(xsredp, void, env, i32, vsr, vsr)
 DEF_HELPER_4(xssqrtdp, void, env, i32, vsr, vsr)
 DEF_HELPER_4(xsrsqrtedp, void, env, i32, vsr, vsr)
 DEF_HELPER_4(xstdivdp, void, env, i32, vsr, vsr)
-DEF_HELPER_2(xstsqrtdp, void, env, i32)
+DEF_HELPER_3(xstsqrtdp, void, env, i32, vsr)
 DEF_HELPER_5(xsmaddadp, void, env, i32, vsr, vsr, vsr)
 DEF_HELPER_5(xsmaddmdp, void, env, i32, vsr, vsr, vsr)
 DEF_HELPER_5(xsmsubadp, void, env, i32, vsr, vsr, vsr)
@@ -435,7 +435,7 @@ DEF_HELPER_4(xscvuxdsp, void, env, i32, vsr, vsr)
 DEF_HELPER_4(xscvsxdsp, void, env, i32, vsr, vsr)
 DEF_HELPER_2(xscvudqp, void, env, i32)
 DEF_HELPER_4(xscvuxddp, void, env, i32, vsr, vsr)
-DEF_HELPER_2(xststdcsp, void, env, i32)
+DEF_HELPER_3(xststdcsp, void, env, i32, vsr)
 DEF_HELPER_2(xststdcdp, void, env, i32)
 DEF_HELPER_2(xststdcqp, void, env, i32)
 DEF_HELPER_4(xsrdpi, void, env, i32, vsr, vsr)
@@ -473,7 +473,7 @@ DEF_HELPER_4(xvredp, void, env, i32, vsr, vsr)
 DEF_HELPER_4(xvsqrtdp, void, env, i32, vsr, vsr)
 DEF_HELPER_4(xvrsqrtedp, void, env, i32, vsr, vsr)
 DEF_HELPER_4(xvtdivdp, void, env, i32, vsr, vsr)
-DEF_HELPER_2(xvtsqrtdp, void, env, i32)
+DEF_HELPER_3(xvtsqrtdp, void, env, i32, vsr)
 DEF_HELPER_5(xvmaddadp, void, env, i32, vsr, vsr, vsr)
 DEF_HELPER_5(xvmaddmdp, void, env, i32, vsr, vsr, vsr)
 DEF_HELPER_5(xvmsubadp, void, env, i32, vsr, vsr, vsr)
@@ -511,7 +511,7 @@ DEF_HELPER_4(xvresp, void, env, i32, vsr, vsr)
 DEF_HELPER_4(xvsqrtsp, void, env, i32, vsr, vsr)
 DEF_HELPER_4(xvrsqrtesp, void, env, i32, vsr, vsr)
 DEF_HELPER_4(xvtdivsp, void, env, i32, vsr, vsr)
-DEF_HELPER_2(xvtsqrtsp, void, env, i32)
+DEF_HELPER_3(xvtsqrtsp, void, env, i32, vsr)
 DEF_HELPER_5(xvmaddasp, void, env, i32, vsr, vsr, vsr)
 DEF_HELPER_5(xvmaddmsp, void, env, i32, vsr, vsr, vsr)
 DEF_HELPER_5(xvmsubasp, void, env, i32, vsr, vsr, vsr)
diff --git a/target/ppc/translate/vsx-impl.inc.c 
b/target/ppc/translate/vsx-impl.inc.c
index fed56fce69..a30e22a852 100644
--- a/target/ppc/translate/vsx-impl.inc.c
+++ b/target/ppc/translate/vsx-impl.inc.c
@@ -987,6 +987,22 @@ static void gen_##name(DisasContext *ctx)  
   \
 tcg_temp_free_ptr(xb);\
 }
 
+#define GEN_VSX_HELPER_X1(name, op1, op2, inval, type)\
+static void gen_##name(DisasContext *ctx) \
+{ \
+TCGv_i32 opc; \
+TCGv_ptr xb;  \
+if (unlikely(!ctx->vsx_enabled)) {\
+gen_exception(ctx, POWERPC_EXCP_VSXU);\
+return;   \
+} \
+opc = tcg_const_i32(ctx->opcode);  

[Qemu-devel] [PATCH 02/14] target/ppc: remove getVSR()/putVSR() from mem_helper.c

[Mark Cave-Ayland]

Since commit 8a14d31b00 "target/ppc: switch fpr/vsrl registers so all VSX
registers are in host endian order" functions getVSR() and putVSR() which used
to convert the VSR registers into host endian order are no longer required.

Signed-off-by: Mark Cave-Ayland 
---
 target/ppc/mem_helper.c | 24 +++-
 target/ppc/translate/vsx-impl.inc.c |  8 +---
 2 files changed, 16 insertions(+), 16 deletions(-)

diff --git a/target/ppc/mem_helper.c b/target/ppc/mem_helper.c
index 5b0f9ee50d..4dfa7ee23f 100644
--- a/target/ppc/mem_helper.c
+++ b/target/ppc/mem_helper.c
@@ -415,28 +415,27 @@ STVE(stvewx, cpu_stl_data_ra, bswap32, u32)
 
 #define VSX_LXVL(name, lj)  \
 void helper_##name(CPUPPCState *env, target_ulong addr, \
-   target_ulong xt_num, target_ulong rb)\
+   target_ulong xt, target_ulong rb)\
 {   \
+ppc_vsr_t *r = &env->vsr[xt];   \
+int nb = GET_NB(env->gpr[rb]);  \
 int i;  \
-ppc_vsr_t xt;   \
-uint64_t nb = GET_NB(rb);   \
 \
-xt.s128 = int128_zero();\
+r->s128 = int128_zero();\
 if (nb) {   \
 nb = (nb >= 16) ? 16 : nb;  \
 if (msr_le && !lj) {\
 for (i = 16; i > 16 - nb; i--) {\
-xt.VsrB(i - 1) = cpu_ldub_data_ra(env, addr, GETPC());  \
+r->VsrB(i - 1) = cpu_ldub_data_ra(env, addr, GETPC());  \
 addr = addr_add(env, addr, 1);  \
 }   \
 } else {\
 for (i = 0; i < nb; i++) {  \
-xt.VsrB(i) = cpu_ldub_data_ra(env, addr, GETPC());  \
+r->VsrB(i) = cpu_ldub_data_ra(env, addr, GETPC());  \
 addr = addr_add(env, addr, 1);  \
 }   \
 }   \
 }   \
-putVSR(xt_num, &xt, env);   \
 }
 
 VSX_LXVL(lxvl, 0)
@@ -445,25 +444,24 @@ VSX_LXVL(lxvll, 1)
 
 #define VSX_STXVL(name, lj)   \
 void helper_##name(CPUPPCState *env, target_ulong addr,   \
-   target_ulong xt_num, target_ulong rb)  \
+   target_ulong xt, target_ulong rb)  \
 { \
+ppc_vsr_t *r = &env->vsr[xt]; \
+int nb = GET_NB(env->gpr[rb]);\
 int i;\
-ppc_vsr_t xt; \
-target_ulong nb = GET_NB(rb); \
   \
 if (!nb) {\
 return;   \
 } \
-getVSR(xt_num, &xt, env); \
 nb = (nb >= 16) ? 16 : nb;\
 if (msr_le && !lj) {  \
 for (i = 16; i > 16 - nb; i--) {  \
-cpu_stb_data_ra(env, addr, xt.VsrB(i - 1), GETPC());  \
+cpu_stb_data_ra(env, addr, r->VsrB(i - 1), GETPC());  \
 addr = addr_add(env, addr, 1);\
 } \
 } else {  \
 for (i = 0; i < nb; i++) {\
-cpu_stb_data_ra(env, addr, xt.VsrB(i), GETPC());  \
+cpu_stb_data_ra(env, addr, r->VsrB(i), GETPC());  \
 addr = addr_add(env, addr, 1);\
 } \
 } \
diff --git a/tar

[Qemu-devel] [PATCH 03/14] target/ppc: remove getVSR()/putVSR() from int_helper.c

[Mark Cave-Ayland]

Since commit 8a14d31b00 "target/ppc: switch fpr/vsrl registers so all VSX
registers are in host endian order" functions getVSR() and putVSR() which used
to convert the VSR registers into host endian order are no longer required.

Now that there are now no more users of getVSR()/putVSR() these functions can
be completely removed.

Signed-off-by: Mark Cave-Ayland 
---
 target/ppc/int_helper.c | 20 +++-
 target/ppc/internal.h   | 12 
 2 files changed, 7 insertions(+), 25 deletions(-)

diff --git a/target/ppc/int_helper.c b/target/ppc/int_helper.c
index f6a088ac08..f616fb249d 100644
--- a/target/ppc/int_helper.c
+++ b/target/ppc/int_helper.c
@@ -1904,38 +1904,32 @@ VEXTRACT(d, u64)
 void helper_xxextractuw(CPUPPCState *env, target_ulong xtn,
 target_ulong xbn, uint32_t index)
 {
-ppc_vsr_t xt, xb;
+ppc_vsr_t *xt = &env->vsr[xtn];
+ppc_vsr_t *xb = &env->vsr[xbn];
 size_t es = sizeof(uint32_t);
 uint32_t ext_index;
 int i;
 
-getVSR(xbn, &xb, env);
-memset(&xt, 0, sizeof(xt));
+memset(xt, 0, sizeof(ppc_vsr_t));
 
 ext_index = index;
 for (i = 0; i < es; i++, ext_index++) {
-xt.VsrB(8 - es + i) = xb.VsrB(ext_index % 16);
+xt->VsrB(8 - es + i) = xb->VsrB(ext_index % 16);
 }
-
-putVSR(xtn, &xt, env);
 }
 
 void helper_xxinsertw(CPUPPCState *env, target_ulong xtn,
   target_ulong xbn, uint32_t index)
 {
-ppc_vsr_t xt, xb;
+ppc_vsr_t *xt = &env->vsr[xtn];
+ppc_vsr_t *xb = &env->vsr[xbn];
 size_t es = sizeof(uint32_t);
 int ins_index, i = 0;
 
-getVSR(xbn, &xb, env);
-getVSR(xtn, &xt, env);
-
 ins_index = index;
 for (i = 0; i < es && ins_index < 16; i++, ins_index++) {
-xt.VsrB(ins_index) = xb.VsrB(8 - es + i);
+xt->VsrB(ins_index) = xb->VsrB(8 - es + i);
 }
-
-putVSR(xtn, &xt, env);
 }
 
 #define VEXT_SIGNED(name, element, cast)\
diff --git a/target/ppc/internal.h b/target/ppc/internal.h
index fb6f64ed1e..d3d327e548 100644
--- a/target/ppc/internal.h
+++ b/target/ppc/internal.h
@@ -204,18 +204,6 @@ EXTRACT_HELPER(IMM8, 11, 8);
 EXTRACT_HELPER(DCMX, 16, 7);
 EXTRACT_HELPER_SPLIT_3(DCMX_XV, 5, 16, 0, 1, 2, 5, 1, 6, 6);
 
-static inline void getVSR(int n, ppc_vsr_t *vsr, CPUPPCState *env)
-{
-vsr->VsrD(0) = env->vsr[n].VsrD(0);
-vsr->VsrD(1) = env->vsr[n].VsrD(1);
-}
-
-static inline void putVSR(int n, ppc_vsr_t *vsr, CPUPPCState *env)
-{
-env->vsr[n].VsrD(0) = vsr->VsrD(0);
-env->vsr[n].VsrD(1) = vsr->VsrD(1);
-}
-
 void helper_compute_fprf_float16(CPUPPCState *env, float16 arg);
 void helper_compute_fprf_float32(CPUPPCState *env, float32 arg);
 void helper_compute_fprf_float128(CPUPPCState *env, float128 arg);
-- 
2.11.0

Re: [Qemu-devel] [PATCH] hw/tpm: Only build tpm_ppi.o if any of TPM_TIS/TPM_CRB is built

[Stefan Berger]

On 4/27/19 9:18 AM, Philippe Mathieu-Daudé wrote:

The TPM Physical Presence Interface routines are only used
by the CRB/TIS interfaces. Do not compile this file if any
of them is built.

Signed-off-by: Philippe Mathieu-Daudé 



Reviewed-by: Stefan Berger 



---
Marc-André:
   You might want to add yourself as reviewer/maintainer of TPM ;)
---
  hw/tpm/Makefile.objs | 4 ++--
  1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/hw/tpm/Makefile.objs b/hw/tpm/Makefile.objs
index 700c8786228..de0b85d02ae 100644
--- a/hw/tpm/Makefile.objs
+++ b/hw/tpm/Makefile.objs
@@ -1,5 +1,5 @@
-common-obj-y += tpm_util.o
-obj-y += tpm_ppi.o
+common-obj-$(CONFIG_TPM) += tpm_util.o
+obj-$(call lor,$(CONFIG_TPM_TIS),$(CONFIG_TPM_CRB)) += tpm_ppi.o
  common-obj-$(CONFIG_TPM_TIS) += tpm_tis.o
  common-obj-$(CONFIG_TPM_CRB) += tpm_crb.o
  common-obj-$(CONFIG_TPM_PASSTHROUGH) += tpm_passthrough.o

Re: [Qemu-devel] [PATCH] tests/tpm-tests: Use g_test_skip() to mark skipped tests

[Stefan Berger]

On 4/24/19 5:45 AM, Thomas Huth wrote:

Since we do not use gtester anymore (which had a bug here),
we can now use g_test_skip() to mark skipped tests.

Signed-off-by: Thomas Huth 

Reviewed-by: Stefan Berger 

---
  tests/tpm-tests.c | 2 +-
  1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/tests/tpm-tests.c b/tests/tpm-tests.c
index 582ec0cfd4..e640777aa9 100644
--- a/tests/tpm-tests.c
+++ b/tests/tpm-tests.c
@@ -22,7 +22,7 @@ static bool
  tpm_test_swtpm_skip(void)
  {
  if (!tpm_util_swtpm_has_tpm2()) {
-g_test_message("swtpm not in PATH or missing --tpm2 support");
+g_test_skip("swtpm not in PATH or missing --tpm2 support");
  return true;
  }
  

Re: [Qemu-devel] Failing qemu-iotest 005 with raw

[Thomas Huth]

On 28/04/2019 04.36, Eric Blake wrote:
> On 4/26/19 5:53 AM, Kevin Wolf wrote:
> 
>>>  creating large image
>>> +qemu-img: TEST_DIR/t.IMGFMT: The image size is too large for file
>>> format 'IMGFMT'
>>>  Formatting 'TEST_DIR/t.IMGFMT', fmt=IMGFMT size=536870912
>>> [...]
>>>
>>> Could this be fixed somehow, or should the test rather be skipped for
>>> IMGFMT=raw?
>>
>> The test passes for me on XFS. Looks like the raw driver can handle
>> large image files, but your host filesystem can't.
>>
>> We would have to check whether the host filesystem can support large
>> files and skip the test if it can't. I'm not sure how to do that. But
>> actually, this isn't testing anything interesting for raw, so just
>> unconditionally disabling the test for raw could be reasonable enough.
> 
> iotest 220 in commit 3b94c343 can serve as such an example (it skips the
> test on at least ext4, while passing on tmpfs which allows larger sparse
> files).

That should do the trick, thanks. I'll send a patch.

 Thomas



signature.asc
Description: OpenPGP digital signature

[Qemu-devel] [PATCH V1] Introducing virtio-example.

[Yoni Bettan]

The main goal is to create an example to be used as template or
guideline for contributors when they wish to create a new virtio
device and to document "the right way" to do so.

It consists of several parts:

1. The device specification
* it can be found in the device header
* it will hopefully be added to the official virtio specification

2. The device implementation for Qemu-KVM hypervisor
* this patch content

3. The device driver for linux
* it will hopefully be added to linux
* for now it can be found at https://github.com/ybettan/\
QemuDeviceDrivers/blob/master/virtio/virtio_example_driver.c

4. A blog on virtio
* introducing the virtio concept
* gives some motivation for virtio-devices to be used
* bring extra documentation on "how to write":
- device specification
- device implementation
- device driver for linux
* it can be found at https://howtovms.wordpress.com

Signed-off-by: Yoni Bettan 
---

RFC -> V1:

* Updated the commit message to be more informative about the full
  working flow.

* Added the device specification to the device header.

* Removed the PCI-ID given for the device.
  This was done by forcing the device to be in modern-only mode therefore
  the PCI-ID is now generated automatically.

* Made all requests consist of both input and output buffer instead
  of separating them into 2 different requests.

* Made the device IO deal with integers instead of strings.
  The user have read/write access to the device using sysfs,
  therefore the driver's input are strings, in the RFC version
  those strings where passed directly to the device and the integer
  conversion was done inside the device, now the driver is handling those
  conversions and the device is unaware of them.

* Added more documentation for the get_features() function.

* Simplified the error propagation in virtio_example_pci_realize()
  function.

* Removed all code of previous previous patch from standard-headers.


 hw/virtio/Makefile.objs|   1 +
 hw/virtio/virtio-example.c | 110 +
 hw/virtio/virtio-pci.c |  47 
 hw/virtio/virtio-pci.h |  14 
 include/hw/virtio/virtio-example.h |  92 
 5 files changed, 264 insertions(+)
 create mode 100644 hw/virtio/virtio-example.c
 create mode 100644 include/hw/virtio/virtio-example.h

diff --git a/hw/virtio/Makefile.objs b/hw/virtio/Makefile.objs
index 1b2799cfd8..7a6fb2505c 100644
--- a/hw/virtio/Makefile.objs
+++ b/hw/virtio/Makefile.objs
@@ -7,6 +7,7 @@ common-obj-$(CONFIG_VIRTIO_PCI) += virtio-pci.o
 common-obj-$(CONFIG_VIRTIO_MMIO) += virtio-mmio.o
 obj-$(CONFIG_VIRTIO_BALLOON) += virtio-balloon.o
 obj-$(CONFIG_VIRTIO_CRYPTO) += virtio-crypto.o
+obj-$(CONFIG_VIRTIO_CRYPTO) += virtio-example.o
 obj-$(call land,$(CONFIG_VIRTIO_CRYPTO),$(CONFIG_VIRTIO_PCI)) += 
virtio-crypto-pci.o
 
 obj-$(CONFIG_LINUX) += vhost.o vhost-backend.o vhost-user.o
diff --git a/hw/virtio/virtio-example.c b/hw/virtio/virtio-example.c
new file mode 100644
index 00..fd72f7c3a5
--- /dev/null
+++ b/hw/virtio/virtio-example.c
@@ -0,0 +1,110 @@
+/*
+ * A virtio device example.
+ *
+ * Copyright 2019 Red Hat, Inc.
+ * Copyright 2019 Yoni Bettan 
+ *
+ * This work is licensed under the terms of the GNU GPL, version 2 or
+ * (at your option) any later version.  See the COPYING file in the
+ * top-level directory.
+ */
+
+#include "qemu/osdep.h"
+#include "qemu/iov.h"
+#include "hw/virtio/virtio.h"
+#include "hw/virtio/virtio-example.h"
+
+
+/*
+ * this function is called when the driver 'kick' the virtqueue.
+ * since we can have more than 1 virtqueue we need the vq argument in order to
+ * know which one was kicked by the driver.
+ */
+static void handle_input(VirtIODevice *vdev, VirtQueue *vq)
+{
+VirtQueueElement *elem;
+int data;
+
+/*
+ * get the virtqueue element sent from the driver.
+ * in_sg are the driver inputs (device outputs)
+ * out_sg are the driver output (device input)
+ */
+elem = virtqueue_pop(vq, sizeof(VirtQueueElement));
+
+/* read the driver output sg (device input sg) into a buffer */
+iov_to_buf(elem->out_sg, elem->out_num, 0, &data, sizeof(int));
+
+/* process the data */
+data++;
+
+/* write the result to the driver input sg (device output sg) */
+iov_from_buf(elem->in_sg, elem->in_num, 0, &data, sizeof(int));
+
+/* push back the result into the virtqueue */
+virtqueue_push(vq, elem, 1);
+
+/* interrupt the driver */
+virtio_notify(vdev, vq);
+
+return;
+}
+
+/*
+ * This function gets the host features as a parameter and add to it all the
+ * features supported by the device.
+ * This example-device has no currently defined feature bits but we still need
+ * this function b

[Qemu-devel] [PATCH] virtio-mmio: Always compile debug prints

[Boxuan Li]

Wrap printf calls inside debug macros (DPRINTF) in `if` statement, and
change output to stderr as well. This will ensure that printf function
will always compile and prevent bitrot of the format strings.

Signed-off-by: Boxuan Li 
---
 hw/virtio/virtio-mmio.c | 17 -
 1 file changed, 8 insertions(+), 9 deletions(-)

diff --git a/hw/virtio/virtio-mmio.c b/hw/virtio/virtio-mmio.c
index 5807aa87fe..693b3c9eb4 100644
--- a/hw/virtio/virtio-mmio.c
+++ b/hw/virtio/virtio-mmio.c
@@ -28,15 +28,14 @@
 #include "hw/virtio/virtio-bus.h"
 #include "qemu/error-report.h"
 
-/* #define DEBUG_VIRTIO_MMIO */
-
-#ifdef DEBUG_VIRTIO_MMIO
-
-#define DPRINTF(fmt, ...) \
-do { printf("virtio_mmio: " fmt , ## __VA_ARGS__); } while (0)
-#else
-#define DPRINTF(fmt, ...) do {} while (0)
-#endif
+#define DEBUG_VIRTIO_MMIO 0
+
+#define DPRINTF(fmt, ...)\
+do { \
+if (DEBUG_VIRTIO_MMIO) { \
+fprintf(stderr, "virtio_mmio: " fmt , ## __VA_ARGS__);   \
+}\
+} while (0)
 
 /* QOM macros */
 /* virtio-mmio-bus */
-- 
2.13.2

Re: [Qemu-devel] [PULL 00/36] ppc-for-4.1 queue 20190426

[Peter Maydell]

On Fri, 26 Apr 2019 at 07:06, David Gibson  wrote:
>
> The following changes since commit 3284aa128153750f14a61e8a96fd085e6f2999b6:
>
>   Merge remote-tracking branch 'remotes/lersek/tags/edk2-pull-2019-04-22' 
> into staging (2019-04-24 13:19:41 +0100)
>
> are available in the Git repository at:
>
>   git://github.com/dgibson/qemu.git tags/ppc-for-4.1-20190426
>
> for you to fetch changes up to aaef873b130f4f9c78f8e97b69c235c81b8b8b88:
>
>   target/ppc: improve performance of large BAT invalidations (2019-04-26 
> 11:37:57 +1000)
>
> 
> ppc patch queue 2019-04-26
>
> Here's the first ppc target pull request for qemu-4.1.  This has a
> number of things that have accumulated while qemu-4.0 was frozen.
>
>  * A number of emulated MMU improvements from Ben Herrenschmidt
>
>  * Assorted cleanups fro Greg Kurz
>
>  * A large set of mostly mechanical cleanups from me to make target/ppc
>much closer to compliant with the modern coding style
>
>  * Support for passthrough of NVIDIA GPUs using NVLink2
>
> As well as some other assorted fixes.
>


Applied, thanks.

Please update the changelog at https://wiki.qemu.org/ChangeLog/4.1
for any user-visible changes.

-- PMM

[Qemu-devel] [PATCH 1/2] backup: buffer COW request and delay the write operation

[Liang Li]

If the backup target is a slow device like ceph rbd, the backup
process will affect guest BLK write IO performance seriously,
it's cause by the drawback of COW mechanism, if guest overwrite the
backup BLK area, the IO can only be processed after the data has
been written to backup target.
The impact can be relieved by buffering data read from backup
source and writing to backup target later, so the guest BLK write
IO can be processed in time.
Data area with no overwrite will be process like before without
buffering, in most case, we don't need a very large buffer.

An fio test was done when the backup was going on, the test resut
show a obvious performance improvement by buffering.

Test result(1GB buffer):

fio setting:
[random-writers]
ioengine=libaio
iodepth=8
rw=randwrite
bs=32k
direct=1
size=1G
numjobs=1

result:
  IOPSAVG latency
   no backup: 19389 410 us
  backup:  14025702 us
backup w/ buffer:  8684 918 us
==

Cc: John Snow 
Cc: Kevin Wolf 
Cc: Max Reitz 
Cc: Wen Congyang 
Cc: Xie Changlong 
Cc: Markus Armbruster 
Cc: Eric Blake 
Cc: Fam Zheng 
Signed-off-by: Liang Li 
---
 block/backup.c | 117 ++---
 1 file changed, 104 insertions(+), 13 deletions(-)

diff --git a/block/backup.c b/block/backup.c
index 9988753249..d436f9e4ee 100644
--- a/block/backup.c
+++ b/block/backup.c
@@ -35,6 +35,12 @@ typedef struct CowRequest {
 CoQueue wait_queue; /* coroutines blocked on this request */
 } CowRequest;
 
+typedef struct CowBufReq {
+int64_t offset;
+struct iovec iov;
+QTAILQ_ENTRY(CowBufReq) next;
+} CowBufReq;
+
 typedef struct BackupBlockJob {
 BlockJob common;
 BlockBackend *target;
@@ -56,9 +62,14 @@ typedef struct BackupBlockJob {
 int64_t copy_range_size;
 
 bool serialize_target_writes;
+QTAILQ_HEAD(, CowBufReq) buf_reqs;
+int64_t cow_buf_used;
+int64_t cow_buf_size;
+int64_t buf_cow_total;
 } BackupBlockJob;
 
 static const BlockJobDriver backup_job_driver;
+static bool coroutine_fn yield_and_check(BackupBlockJob *job);
 
 /* See if in-flight requests overlap and wait for them to complete */
 static void coroutine_fn wait_for_overlapping_requests(BackupBlockJob *job,
@@ -97,6 +108,46 @@ static void cow_request_end(CowRequest *req)
 qemu_co_queue_restart_all(&req->wait_queue);
 }
 
+static int write_buffer_reqs(BackupBlockJob *job, bool *error_is_read)
+{
+int ret = 0;
+CowBufReq *req, *next_req;
+QEMUIOVector qiov;
+
+QTAILQ_FOREACH_SAFE(req, &job->buf_reqs, next, next_req) {
+if (req->iov.iov_base == NULL) {
+ret = blk_co_pwrite_zeroes(job->target, req->offset,
+   req->iov.iov_len, BDRV_REQ_MAY_UNMAP);
+} else {
+qemu_iovec_init_external(&qiov, &req->iov, 1);
+ret = blk_co_pwritev(job->target, req->offset,
+ req->iov.iov_len, &qiov,
+ job->compress ? BDRV_REQ_WRITE_COMPRESSED : 
0);
+}
+if (ret < 0) {
+trace_backup_do_cow_write_fail(job, req->offset, ret);
+if (error_is_read) {
+*error_is_read = false;
+}
+ret = -1;
+break;
+}
+job_progress_update(&job->common.job, req->iov.iov_len);
+QTAILQ_REMOVE(&job->buf_reqs, req, next);
+if (req->iov.iov_base) {
+job->cow_buf_used -= job->cluster_size;
+assert(job->cow_buf_used >= 0);
+g_free(req->iov.iov_base);
+}
+g_free(req);
+if (yield_and_check(job)) {
+break;
+}
+}
+
+return ret;
+}
+
 /* Copy range to target with a bounce buffer and return the bytes copied. If
  * error occurred, return a negative error number */
 static int coroutine_fn backup_cow_with_bounce_buffer(BackupBlockJob *job,
@@ -129,20 +180,35 @@ static int coroutine_fn 
backup_cow_with_bounce_buffer(BackupBlockJob *job,
 goto fail;
 }
 
-if (qemu_iovec_is_zero(&qiov)) {
-ret = blk_co_pwrite_zeroes(job->target, start,
-   qiov.size, write_flags | 
BDRV_REQ_MAY_UNMAP);
+if (is_write_notifier &&
+job->cow_buf_used <= job->cow_buf_size - job->cluster_size) {
+CowBufReq *cow_req = g_malloc0(sizeof(CowBufReq));
+cow_req->offset = start;
+cow_req->iov = *qiov.iov;
+if (qemu_iovec_is_zero(&qiov)) {
+cow_req->iov.iov_base = NULL;
+} else {
+job->cow_buf_used += job->cluster_size;
+*bounce_buffer = NULL;
+}
+QTAILQ_INSERT_TAIL(&job->buf_reqs, cow_req, next);
+job->buf_cow_total++;
 } else {
-ret = blk_co_pwritev(job->target, start,
- qiov.size, &qiov, write_flags |
- 

[Qemu-devel] [PATCH 2/2] qapi: add interface for setting backup cow buffer size

[Liang Li]

Cc: John Snow 
Cc: Kevin Wolf 
Cc: Max Reitz 
Cc: Wen Congyang 
Cc: Xie Changlong 
Cc: Markus Armbruster 
Cc: Eric Blake 
Cc: Fam Zheng 
Signed-off-by: Liang Li 
---
 block/backup.c| 3 ++-
 block/replication.c   | 2 +-
 blockdev.c| 5 +
 include/block/block_int.h | 2 ++
 qapi/block-core.json  | 5 +
 5 files changed, 15 insertions(+), 2 deletions(-)

diff --git a/block/backup.c b/block/backup.c
index d436f9e4ee..9a04003968 100644
--- a/block/backup.c
+++ b/block/backup.c
@@ -652,6 +652,7 @@ BlockJob *backup_job_create(const char *job_id, 
BlockDriverState *bs,
   BlockDriverState *target, int64_t speed,
   MirrorSyncMode sync_mode, BdrvDirtyBitmap *sync_bitmap,
   bool compress,
+  int buf_size,
   BlockdevOnError on_source_error,
   BlockdevOnError on_target_error,
   int creation_flags,
@@ -748,7 +749,7 @@ BlockJob *backup_job_create(const char *job_id, 
BlockDriverState *bs,
 job->sync_bitmap = sync_mode == MIRROR_SYNC_MODE_INCREMENTAL ?
sync_bitmap : NULL;
 job->compress = compress;
-job->cow_buf_size = 0;
+job->cow_buf_size = buf_size;
 
 /* Detect image-fleecing (and similar) schemes */
 job->serialize_target_writes = bdrv_chain_contains(target, bs);
diff --git a/block/replication.c b/block/replication.c
index 3d4dedddfc..5ec6911355 100644
--- a/block/replication.c
+++ b/block/replication.c
@@ -540,7 +540,7 @@ static void replication_start(ReplicationState *rs, 
ReplicationMode mode,
 bdrv_op_unblock(top_bs, BLOCK_OP_TYPE_DATAPLANE, s->blocker);
 
 job = backup_job_create(NULL, s->secondary_disk->bs, 
s->hidden_disk->bs,
-0, MIRROR_SYNC_MODE_NONE, NULL, false,
+0, MIRROR_SYNC_MODE_NONE, NULL, false, 0,
 BLOCKDEV_ON_ERROR_REPORT,
 BLOCKDEV_ON_ERROR_REPORT, JOB_INTERNAL,
 backup_job_completed, bs, NULL, &local_err);
diff --git a/blockdev.c b/blockdev.c
index 79fbac8450..15d96fe25c 100644
--- a/blockdev.c
+++ b/blockdev.c
@@ -3449,6 +3449,9 @@ static BlockJob *do_drive_backup(DriveBackup *backup, 
JobTxn *txn,
 if (!backup->has_compress) {
 backup->compress = false;
 }
+if (!backup->has_buffer) {
+backup->buffer = 0;
+}
 
 bs = qmp_get_root_bs(backup->device, errp);
 if (!bs) {
@@ -3550,6 +3553,7 @@ static BlockJob *do_drive_backup(DriveBackup *backup, 
JobTxn *txn,
 
 job = backup_job_create(backup->job_id, bs, target_bs, backup->speed,
 backup->sync, bmap, backup->compress,
+backup->buffer,
 backup->on_source_error, backup->on_target_error,
 job_flags, NULL, NULL, txn, &local_err);
 bdrv_unref(target_bs);
@@ -3660,6 +3664,7 @@ BlockJob *do_blockdev_backup(BlockdevBackup *backup, 
JobTxn *txn,
 }
 job = backup_job_create(backup->job_id, bs, target_bs, backup->speed,
 backup->sync, bmap, backup->compress,
+backup->buffer,
 backup->on_source_error, backup->on_target_error,
 job_flags, NULL, NULL, txn, &local_err);
 if (local_err != NULL) {
diff --git a/include/block/block_int.h b/include/block/block_int.h
index 01e855a066..17c7f26b84 100644
--- a/include/block/block_int.h
+++ b/include/block/block_int.h
@@ -1137,6 +1137,7 @@ void mirror_start(const char *job_id, BlockDriverState 
*bs,
  * @speed: The maximum speed, in bytes per second, or 0 for unlimited.
  * @sync_mode: What parts of the disk image should be copied to the 
destination.
  * @sync_bitmap: The dirty bitmap if sync_mode is MIRROR_SYNC_MODE_INCREMENTAL.
+ * @buffer: Size of buffer used to save data for delayed writing.
  * @on_source_error: The action to take upon error reading from the source.
  * @on_target_error: The action to take upon error writing to the target.
  * @creation_flags: Flags that control the behavior of the Job lifetime.
@@ -1153,6 +1154,7 @@ BlockJob *backup_job_create(const char *job_id, 
BlockDriverState *bs,
 MirrorSyncMode sync_mode,
 BdrvDirtyBitmap *sync_bitmap,
 bool compress,
+int buffer,
 BlockdevOnError on_source_error,
 BlockdevOnError on_target_error,
 int creation_flags,
diff --git a/qapi/block-core.json b/qapi/block-core.json
index 7ccbfff9d0..726c04c02a 100644
--- a/qapi/block-core.json
+++ b/qapi/block-core.json
@@ -1377,6 +1377,7 @@
 '*format': 'str', 'sync': 'MirrorSyncMode',
 '*mode': 'NewImageMode', '*speed': 'int',
 '*bitma

[Qemu-devel] [PATCH 0/2] buffer and delay backup COW write operation

[Liang Li]

If the backup target is a slow device like ceph rbd, the backup
process will affect guest BLK write IO performance seriously,
it's cause by the drawback of COW mechanism, if guest overwrite the
backup BLK area, the IO can only be processed after the data has
been written to backup target.
The impact can be relieved by buffering data read from backup
source and writing to backup target later, so the guest BLK write
IO can be processed in time.
Data area with no overwrite will be process like before without
buffering, in most case, we don't need a very large buffer.

An fio test was done when the backup was going on, the test resut
show a obvious performance improvement by buffering.

Test result(1GB buffer):

fio setting:
[random-writers]
ioengine=libaio
iodepth=8
rw=randwrite
bs=32k
direct=1
size=1G
numjobs=1

result:
  IOPSAVG latency
   no backup: 19389 410 us
  backup:  14025702 us
backup w/ buffer:  8684 918 us
==

Cc: John Snow 
Cc: Kevin Wolf 
Cc: Max Reitz 
Cc: Wen Congyang 
Cc: Xie Changlong 
Cc: Markus Armbruster 
Cc: Eric Blake 
Cc: Fam Zheng 

Liang Li (2):
  backup: buffer COW request and delay the write operation
  qapi: add interface for setting backup cow buffer size

 block/backup.c| 118 +-
 block/replication.c   |   2 +-
 blockdev.c|   5 ++
 include/block/block_int.h |   2 +
 qapi/block-core.json  |   5 ++
 5 files changed, 118 insertions(+), 14 deletions(-)

-- 
2.14.1