CVS commit: src/sys/dev/pci

2023-06-27 Thread Tohru Nishimura
Module Name:src
Committed By:   nisimura
Date:   Tue Jun 27 21:43:58 UTC 2023

Modified Files:
src/sys/dev/pci: if_bce.c if_bcereg.h

Log Message:
correct register function annotation as it's for receive coalesce.


To generate a diff of this commit:
cvs rdiff -u -r1.62 -r1.63 src/sys/dev/pci/if_bce.c
cvs rdiff -u -r1.5 -r1.6 src/sys/dev/pci/if_bcereg.h

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.



CVS commit: src/sys/dev/pci

2023-06-27 Thread Tohru Nishimura
Module Name:src
Committed By:   nisimura
Date:   Tue Jun 27 21:43:58 UTC 2023

Modified Files:
src/sys/dev/pci: if_bce.c if_bcereg.h

Log Message:
correct register function annotation as it's for receive coalesce.


To generate a diff of this commit:
cvs rdiff -u -r1.62 -r1.63 src/sys/dev/pci/if_bce.c
cvs rdiff -u -r1.5 -r1.6 src/sys/dev/pci/if_bcereg.h

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/dev/pci/if_bce.c
diff -u src/sys/dev/pci/if_bce.c:1.62 src/sys/dev/pci/if_bce.c:1.63
--- src/sys/dev/pci/if_bce.c:1.62	Sun Sep 25 12:41:46 2022
+++ src/sys/dev/pci/if_bce.c	Tue Jun 27 21:43:58 2023
@@ -1,4 +1,4 @@
-/* $NetBSD: if_bce.c,v 1.62 2022/09/25 12:41:46 andvar Exp $	 */
+/* $NetBSD: if_bce.c,v 1.63 2023/06/27 21:43:58 nisimura Exp $	 */
 
 /*
  * Copyright (c) 2003 Clifford Wright. All rights reserved.
@@ -35,7 +35,7 @@
  */
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: if_bce.c,v 1.62 2022/09/25 12:41:46 andvar Exp $");
+__KERNEL_RCSID(0, "$NetBSD: if_bce.c,v 1.63 2023/06/27 21:43:58 nisimura Exp $");
 
 #include 
 #include 
@@ -928,7 +928,7 @@ bce_init(struct ifnet *ifp)
 	bus_space_read_4(sc->bce_btag, sc->bce_bhandle, BCE_MACCTL) &
 	~BCE_EMC_PDOWN);
 
-	/* setup DMA interrupt control */
+	/* recv coalesce; 31:24 frame upper bound, 23:0 guard period */
 	bus_space_write_4(sc->bce_btag, sc->bce_bhandle, BCE_DMAI_CTL, 1 << 24);	/* MAGIC */
 
 	/* setup packet filter */

Index: src/sys/dev/pci/if_bcereg.h
diff -u src/sys/dev/pci/if_bcereg.h:1.5 src/sys/dev/pci/if_bcereg.h:1.6
--- src/sys/dev/pci/if_bcereg.h:1.5	Fri Oct 18 23:08:29 2019
+++ src/sys/dev/pci/if_bcereg.h	Tue Jun 27 21:43:58 2023
@@ -1,4 +1,4 @@
-/* $NetBSD: if_bcereg.h,v 1.5 2019/10/18 23:08:29 msaitoh Exp $	 */
+/* $NetBSD: if_bcereg.h,v 1.6 2023/06/27 21:43:58 nisimura Exp $	 */
 
 /*
  * Copyright (c) 2003 Clifford Wright. All rights reserved.
@@ -76,7 +76,7 @@
 #define BCE_EMC_EDET			0x0008	/* PHY energy detect */
 #define BCE_EMC_LED			0x00e0	/* PHY LED control */
 
-/* DMA Interrupt control */
+/* recv coalesce; 31:24 frame upper bound, 23:0 guard period */
 #define BCE_DMAI_CTL			0x0100
 
 /* DMA registers */



CVS commit: src/sys/arch/evbarm/lubbock

2023-06-18 Thread Tohru Nishimura
Module Name:src
Committed By:   nisimura
Date:   Mon Jun 19 03:59:24 UTC 2023

Modified Files:
src/sys/arch/evbarm/lubbock: lubbock_machdep.c

Log Message:
unbreak the previous change.


To generate a diff of this commit:
cvs rdiff -u -r1.43 -r1.44 src/sys/arch/evbarm/lubbock/lubbock_machdep.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/evbarm/lubbock/lubbock_machdep.c
diff -u src/sys/arch/evbarm/lubbock/lubbock_machdep.c:1.43 src/sys/arch/evbarm/lubbock/lubbock_machdep.c:1.44
--- src/sys/arch/evbarm/lubbock/lubbock_machdep.c:1.43	Thu Apr 20 08:28:05 2023
+++ src/sys/arch/evbarm/lubbock/lubbock_machdep.c	Mon Jun 19 03:59:24 2023
@@ -1,4 +1,4 @@
-/*	$NetBSD: lubbock_machdep.c,v 1.43 2023/04/20 08:28:05 skrll Exp $ */
+/*	$NetBSD: lubbock_machdep.c,v 1.44 2023/06/19 03:59:24 nisimura Exp $ */
 
 /*
  * Copyright (c) 2002, 2003, 2005  Genetec Corporation.  All rights reserved.
@@ -112,7 +112,7 @@
  */
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: lubbock_machdep.c,v 1.43 2023/04/20 08:28:05 skrll Exp $");
+__KERNEL_RCSID(0, "$NetBSD: lubbock_machdep.c,v 1.44 2023/06/19 03:59:24 nisimura Exp $");
 
 #include "opt_arm_debug.h"
 #include "opt_console.h"
@@ -348,36 +348,36 @@ read_ttb(void)
  */
 
 static const struct pmap_devmap lubbock_devmap[] = {
-DEVMAP_ENTRY{
+DEVMAP_ENTRY(
 	LUBBOCK_OBIO_VBASE,
 	LUBBOCK_OBIO_PBASE,
 	LUBBOCK_OBIO_SIZE
-},
-DEVMAP_ENTRY{
+),
+DEVMAP_ENTRY(
 	LUBBOCK_GPIO_VBASE,
 	PXA2X0_GPIO_BASE,
 	PXA250_GPIO_SIZE
-},
-DEVMAP_ENTRY{
+),
+DEVMAP_ENTRY(
 	LUBBOCK_CLKMAN_VBASE,
 	PXA2X0_CLKMAN_BASE,
 	PXA2X0_CLKMAN_SIZE
-},
-DEVMAP_ENTRY{
+),
+DEVMAP_ENTRY(
 	LUBBOCK_INTCTL_VBASE,
 	PXA2X0_INTCTL_BASE,
 	PXA2X0_INTCTL_SIZE
-},
-DEVMAP_ENTRY{
+),
+DEVMAP_ENTRY(
 	LUBBOCK_FFUART_VBASE,
 	PXA2X0_FFUART_BASE,
 	4 * COM_NPORTS
-},
-DEVMAP_ENTRY{
+),
+DEVMAP_ENTRY(
 	LUBBOCK_BTUART_VBASE,
 	PXA2X0_BTUART_BASE,
 	4 * COM_NPORTS
-},
+),
 
 DEVMAP_ENTRY_END
 };



CVS commit: src/sys/arch/evbarm/lubbock

2023-06-18 Thread Tohru Nishimura
Module Name:src
Committed By:   nisimura
Date:   Mon Jun 19 03:59:24 UTC 2023

Modified Files:
src/sys/arch/evbarm/lubbock: lubbock_machdep.c

Log Message:
unbreak the previous change.


To generate a diff of this commit:
cvs rdiff -u -r1.43 -r1.44 src/sys/arch/evbarm/lubbock/lubbock_machdep.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.



CVS commit: src/sys/arch/evbarm/mini2440

2023-06-18 Thread Tohru Nishimura
Module Name:src
Committed By:   nisimura
Date:   Mon Jun 19 03:52:50 UTC 2023

Modified Files:
src/sys/arch/evbarm/mini2440: mini2440_machdep.c

Log Message:
unbreak the previous change.


To generate a diff of this commit:
cvs rdiff -u -r1.20 -r1.21 src/sys/arch/evbarm/mini2440/mini2440_machdep.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.



CVS commit: src/sys/arch/evbarm/mini2440

2023-06-18 Thread Tohru Nishimura
Module Name:src
Committed By:   nisimura
Date:   Mon Jun 19 03:52:50 UTC 2023

Modified Files:
src/sys/arch/evbarm/mini2440: mini2440_machdep.c

Log Message:
unbreak the previous change.


To generate a diff of this commit:
cvs rdiff -u -r1.20 -r1.21 src/sys/arch/evbarm/mini2440/mini2440_machdep.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/evbarm/mini2440/mini2440_machdep.c
diff -u src/sys/arch/evbarm/mini2440/mini2440_machdep.c:1.20 src/sys/arch/evbarm/mini2440/mini2440_machdep.c:1.21
--- src/sys/arch/evbarm/mini2440/mini2440_machdep.c:1.20	Thu Apr 20 08:28:05 2023
+++ src/sys/arch/evbarm/mini2440/mini2440_machdep.c	Mon Jun 19 03:52:50 2023
@@ -131,7 +131,7 @@
  */
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: mini2440_machdep.c,v 1.20 2023/04/20 08:28:05 skrll Exp $");
+__KERNEL_RCSID(0, "$NetBSD: mini2440_machdep.c,v 1.21 2023/06/19 03:52:50 nisimura Exp $");
 
 #include "opt_arm_debug.h"
 #include "opt_console.h"
@@ -371,25 +371,25 @@ cpu_reboot(int howto, char *bootstr)
 
 static const struct pmap_devmap mini2440_devmap[] = {
 	/* GPIO registers */
-	DEVMAP_ENTRY{
+	DEVMAP_ENTRY(
 		GPIO_VBASE,
 		S3C2440_GPIO_BASE,
 		S3C2440_GPIO_SIZE
 	),
-	DEVMAP_ENTRY({
+	DEVMAP_ENTRY(
 		INTCTL_VBASE,
 		S3C2440_INTCTL_BASE,
 		S3C2440_INTCTL_SIZE
 	),
-	DEVMAP_ENTRY({
+	DEVMAP_ENTRY(
 		CLKMAN_VBASE,
-		S3C2440_CLKMAN_BASE),
+		S3C2440_CLKMAN_BASE,
 		S3C24X0_CLKMAN_SIZE
 	),
 	/* UART registers for UART0, 1, 2. */
-	DEVMAP_ENTRY({
+	DEVMAP_ENTRY(
 		UART_VBASE,
-		S3C2440_UART0_BASE),
+		S3C2440_UART0_BASE,
 		S3C2440_UART_BASE(3) - S3C2440_UART0_BASE
 	),
 	DEVMAP_ENTRY_END



CVS commit: src/sys/arch/arm/sociox

2023-06-15 Thread Tohru Nishimura
Module Name:src
Committed By:   nisimura
Date:   Thu Jun 15 07:21:45 UTC 2023

Modified Files:
src/sys/arch/arm/sociox: if_scx.c

Log Message:
if_scx.c


To generate a diff of this commit:
cvs rdiff -u -r1.42 -r1.43 src/sys/arch/arm/sociox/if_scx.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/arm/sociox/if_scx.c
diff -u src/sys/arch/arm/sociox/if_scx.c:1.42 src/sys/arch/arm/sociox/if_scx.c:1.43
--- src/sys/arch/arm/sociox/if_scx.c:1.42	Wed Jun 14 00:07:22 2023
+++ src/sys/arch/arm/sociox/if_scx.c	Thu Jun 15 07:21:45 2023
@@ -1,4 +1,4 @@
-/*	$NetBSD: if_scx.c,v 1.42 2023/06/14 00:07:22 nisimura Exp $	*/
+/*	$NetBSD: if_scx.c,v 1.43 2023/06/15 07:21:45 nisimura Exp $	*/
 
 /*-
  * Copyright (c) 2020 The NetBSD Foundation, Inc.
@@ -49,7 +49,7 @@
  */
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: if_scx.c,v 1.42 2023/06/14 00:07:22 nisimura Exp $");
+__KERNEL_RCSID(0, "$NetBSD: if_scx.c,v 1.43 2023/06/15 07:21:45 nisimura Exp $");
 
 #include 
 #include 
@@ -120,13 +120,6 @@ struct rdes {
 #define COMINIT		0x120
 #define  INIT_DB	(1U<<2)		/* ???; self clear when done */
 #define  INIT_CLS	(1U<<1)		/* ???; self clear when done */
-#define PKTCTRL		0x140		/* pkt engine control */
-#define  MODENRM	(1U<<28)	/* set operational mode to 'normal' */
-#define  ENJUMBO	(1U<<27)	/* allow jumbo frame */
-#define  RPTCSUMERR	(1U<<3)		/* log Rx checksum error */
-#define  RPTHDCOMP	(1U<<2)		/* log header incomplete condition */
-#define  RPTHDERR	(1U<<1)		/* log header error */
-#define  DROPNOMATCH	(1U<<0)		/* drop no match frames */
 #define xINTSR		0x200		/* aggregated interrupt status */
 #define  IRQ_UCODE	(1U<<20)	/* ucode load completed; W1C */
 #define  IRQ_MAC	(1U<<19)	/* ??? */
@@ -146,14 +139,14 @@ struct rdes {
 #define TXIE_SET	0x428		/* bit to set */
 #define TXIE_CLR	0x42c		/* bit to clr */
 #define  TXI_NTOWNR	(1U<<17)	/* ??? desc array got empty */
-#define  TXI_TR_ERR	(1U<<16)	/* xmit error */
+#define  TXI_TR_ERR	(1U<<16)	/* xmit error detected */
 #define  TXI_TXDONE	(1U<<15)	/* xmit completed */
 #define  TXI_TMREXP	(1U<<14)	/* coalesce guard timer expired */
 #define RXISR		0x440		/* receive status; W1C */
 #define RXIEN		0x444		/* rx interrupt enable */
 #define RXIE_SET	0x468		/* bit to set */
 #define RXIE_CLR	0x46c		/* bit to clr */
-#define  RXI_RC_ERR	(1U<<16)	/* recv error */
+#define  RXI_RC_ERR	(1U<<16)	/* recv error detected */
 #define  RXI_PKTCNT	(1U<<15)	/* recv counter has new value */
 #define  RXI_TMREXP	(1U<<14)	/* coalesce guard timer expired */
 #define TDBA_LO		0x408		/* tdes array base addr 31:0 */
@@ -164,16 +157,24 @@ struct rdes {
 #define RXCONF		0x470		/* rdes config */
 #define  DESCNF_UP	(1U<<31)	/* 'up-and-running' */
 #define  DESCNF_CHRST	(1U<<30)	/* channel reset */
-#define  DESCNF_TMR	(1U<<4)		/* coalesce timer mode select */
+#define  DESCNF_TMR	(1U<<4)		/* coalesce timer unit select */
 #define  DESCNF_LE	(1)		/* little endian desc format */
 #define TXSUBMIT	0x410		/* submit frame(s) to transmit */
 #define TXCOALESC	0x418		/* tx intr coalesce upper bound */
 #define RXCOALESC	0x458		/* rx intr coalesce upper bound */
-#define TCLSCTIME	0x420		/* tintr guard time usec, MSB to on */
-#define RCLSCTIME	0x460		/* rintr guard time usec, MSB to on */
+#define TCLSCTIME	0x420		/* tintr guard time usec */
+#define RCLSCTIME	0x460		/* rintr guard time usec */
 #define TXDONECNT	0x414		/* tx completed count, auto-zero */
 #define RXAVAILCNT	0x454		/* rx available count, auto-zero */
-#define DMACTL_TMR	0x20c		/* engine DMA timer value */
+#define DMACTL_TMR	0x20c		/* DMA cycle tick value */
+#define PKTCTRL		0x140		/* pkt engine control */
+#define  MODENRM	(1U<<28)	/* set operational mode to 'normal' */
+#define  ENJUMBO	(1U<<27)	/* allow jumbo frame */
+#define  RPTCSUMERR	(1U<<3)		/* log Rx checksum error */
+#define  RPTHDCOMP	(1U<<2)		/* log header incomplete condition */
+#define  RPTHDERR	(1U<<1)		/* log header error */
+#define  DROPNOMATCH	(1U<<0)		/* drop no match frames */
+#define UCODE_PKT	0x0d0		/* packet engine ucode port */
 #define UCODE_H2M	0x210		/* host2media engine ucode port */
 #define UCODE_M2H	0x21c		/* media2host engine ucode port */
 #define CORESTAT	0x218		/* engine run state */
@@ -184,11 +185,15 @@ struct rdes {
 #define DMACTL_M2H	0x220		/* media2host engine control */
 #define  DMACTL_STOP	(1U<<0)		/* instruct stop; self-clear */
 #define  M2H_MODE_TRANS	(1U<<20)	/* initiate M2H mode change */
-#define UCODE_PKT	0x0d0		/* packet engine ucode port */
+#define MODE_TRANS	0x500		/* mode change completion status */
+#define  N2T_DONE	(1U<<20)	/* normal->taiki change completed */
+#define  T2N_DONE	(1U<<19)	/* taiki->normal change completed */
 #define CLKEN		0x100		/* clock distribution enable */
 #define  CLK_G		(1U<<5)		/* feed clk domain G */
 #define  CLK_C		(1U<<1)		/* feed clk domain C */
 #define  CLK_D		(1U<<0)		/* 

CVS commit: src/sys/arch/arm/sociox

2023-06-15 Thread Tohru Nishimura
Module Name:src
Committed By:   nisimura
Date:   Thu Jun 15 07:21:45 UTC 2023

Modified Files:
src/sys/arch/arm/sociox: if_scx.c

Log Message:
if_scx.c


To generate a diff of this commit:
cvs rdiff -u -r1.42 -r1.43 src/sys/arch/arm/sociox/if_scx.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.



CVS commit: src/sys/arch/arm/sociox

2023-06-13 Thread Tohru Nishimura
Module Name:src
Committed By:   nisimura
Date:   Wed Jun 14 00:07:22 UTC 2023

Modified Files:
src/sys/arch/arm/sociox: if_scx.c

Log Message:
force PHY loopback while uengine reloading process as tianocore/EDK2 UEFI
mentions.  A piece of comment updates.


To generate a diff of this commit:
cvs rdiff -u -r1.41 -r1.42 src/sys/arch/arm/sociox/if_scx.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/arm/sociox/if_scx.c
diff -u src/sys/arch/arm/sociox/if_scx.c:1.41 src/sys/arch/arm/sociox/if_scx.c:1.42
--- src/sys/arch/arm/sociox/if_scx.c:1.41	Tue Jun 13 00:15:52 2023
+++ src/sys/arch/arm/sociox/if_scx.c	Wed Jun 14 00:07:22 2023
@@ -1,4 +1,4 @@
-/*	$NetBSD: if_scx.c,v 1.41 2023/06/13 00:15:52 nisimura Exp $	*/
+/*	$NetBSD: if_scx.c,v 1.42 2023/06/14 00:07:22 nisimura Exp $	*/
 
 /*-
  * Copyright (c) 2020 The NetBSD Foundation, Inc.
@@ -49,7 +49,7 @@
  */
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: if_scx.c,v 1.41 2023/06/13 00:15:52 nisimura Exp $");
+__KERNEL_RCSID(0, "$NetBSD: if_scx.c,v 1.42 2023/06/14 00:07:22 nisimura Exp $");
 
 #include 
 #include 
@@ -156,14 +156,12 @@ struct rdes {
 #define  RXI_RC_ERR	(1U<<16)	/* recv error */
 #define  RXI_PKTCNT	(1U<<15)	/* recv counter has new value */
 #define  RXI_TMREXP	(1U<<14)	/* coalesce guard timer expired */
-/* 13 sets of special purpose desc interrupt handling register exist */
 #define TDBA_LO		0x408		/* tdes array base addr 31:0 */
 #define TDBA_HI		0x434		/* tdes array base addr 63:32 */
 #define RDBA_LO		0x448		/* rdes array base addr 31:0 */
 #define RDBA_HI		0x474		/* rdes array base addr 63:32 */
-/* 13 pairs of special purpose desc array base address register exist */
-#define TXCONF		0x430
-#define RXCONF		0x470
+#define TXCONF		0x430		/* tdes config */
+#define RXCONF		0x470		/* rdes config */
 #define  DESCNF_UP	(1U<<31)	/* 'up-and-running' */
 #define  DESCNF_CHRST	(1U<<30)	/* channel reset */
 #define  DESCNF_TMR	(1U<<4)		/* coalesce timer mode select */
@@ -197,8 +195,8 @@ struct rdes {
 #define MACCMD		0x11c4		/* gmac register operation */
 #define  CMD_IOWR	(1U<<28)	/* write op */
 #define  CMD_BUSY	(1U<<31)	/* busy bit */
-#define MACSTAT		0x1024		/* gmac status; ??? */
-#define MACINTE		0x1028		/* interrupt enable; ??? */
+#define MACSTAT		0x1024		/* mac interrupt status (unused) */
+#define MACINTE		0x1028		/* mac interrupt enable (unused) */
 
 #define FLOWTHR		0x11cc		/* flow control threshold */
 /* 31:16 pause threshold, 15:0 resume threshold */
@@ -212,8 +210,6 @@ struct rdes {
 #define MODE_TRANS	0x500		/* mode change completion status */
 #define  N2T_DONE	(1U<<20)	/* normal->taiki change completed */
 #define  T2N_DONE	(1U<<19)	/* taiki->normal change completed */
-#define MACADRH		0x10c		/* ??? */
-#define MACADRL		0x110		/* ??? */
 #define MCVER		0x22c		/* micro controller version */
 #define HWVER		0x230		/* hardware version */
 
@@ -247,7 +243,7 @@ struct rdes {
 #define  AFR_HPF	(1U<<10)	/* hash+perfect filter, or hash only */
 #define  AFR_SAF	(1U<<9)		/* source address filter */
 #define  AFR_SAIF	(1U<<8)		/* SA inverse filtering */
-#define  AFR_PCF	(2U<<6)		/* ??? */
+#define  AFR_PCF	(2U<<6)		/* 7:6 accept pause frame 0~3 */
 #define  AFR_DBF	(1U<<5)		/* reject broadcast frame */
 #define  AFR_PM		(1U<<4)		/* accept all multicast frame */
 #define  AFR_DAIF	(1U<<3)		/* DA inverse filtering */
@@ -585,6 +581,8 @@ static void dump_hwfeature(struct scx_so
 static void resetuengine(struct scx_softc *);
 static void loaducode(struct scx_softc *);
 static void injectucode(struct scx_softc *, int, bus_addr_t, bus_size_t);
+static void forcephyloopback(struct scx_softc *);
+static void resetphytonormal(struct scx_softc *);
 
 static int get_mdioclk(uint32_t);
 
@@ -997,7 +995,7 @@ aprint_normal_dev(sc->sc_dev, "descripto
 
 	/* 802.1Q VLAN-sized frames, and 9000 jumbo frame are supported */
 	sc->sc_ethercom.ec_capabilities |= ETHERCAP_VLAN_MTU;
-	sc->sc_ethercom.ec_capabilities |= ETHERCAP_JUMBO_MTU;
+	/* sc->sc_ethercom.ec_capabilities |= ETHERCAP_JUMBO_MTU; not yet */
 
 	sc->sc_flowflags = 0; /* track PAUSE flow caps */
 
@@ -1025,12 +1023,24 @@ aprint_normal_dev(sc->sc_dev, "descripto
 	CSR_WRITE(sc, RXCONF, DESCNF_LE);	/* little endian */
 	CSR_WRITE(sc, DMACTL_TMR, sc->sc_freq / 100 - 1);
 
+	forcephyloopback(sc);/* make PHY loopback mode for uengine init */
+
+	CSR_WRITE(sc, xINTSR, IRQ_UCODE); /* pre-cautional W1C */
+	CSR_WRITE(sc, CORESTAT, 0);	  /* start uengine to reprogram */
+	error = WAIT_FOR_SET(sc, xINTSR, IRQ_UCODE);
+	if (error) {
+		aprint_error_dev(sc->sc_dev, "uengine start failed\n");
+	}
+	CSR_WRITE(sc, xINTSR, IRQ_UCODE); /* W1C load complete report */
+
+	resetphytonormal(sc); /* take back PHY to normal mode */
+
 	CSR_WRITE(sc, DMACTL_M2H, M2H_MODE_TRANS);
-	CSR_WRITE(sc, PKTCTRL, MODENRM);	/* change to use normal mode */
-	WAIT_FOR_SET(sc, MODE_TRANS, T2N_DONE);
-	/* do {

CVS commit: src/sys/arch/arm/sociox

2023-06-13 Thread Tohru Nishimura
Module Name:src
Committed By:   nisimura
Date:   Wed Jun 14 00:07:22 UTC 2023

Modified Files:
src/sys/arch/arm/sociox: if_scx.c

Log Message:
force PHY loopback while uengine reloading process as tianocore/EDK2 UEFI
mentions.  A piece of comment updates.


To generate a diff of this commit:
cvs rdiff -u -r1.41 -r1.42 src/sys/arch/arm/sociox/if_scx.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.



CVS commit: src/sys/arch/arm/sociox

2023-06-12 Thread Tohru Nishimura
Module Name:src
Committed By:   nisimura
Date:   Tue Jun 13 00:15:52 UTC 2023

Modified Files:
src/sys/arch/arm/sociox: if_scx.c

Log Message:
major code quality improvements, descriptive comments, code density.


To generate a diff of this commit:
cvs rdiff -u -r1.40 -r1.41 src/sys/arch/arm/sociox/if_scx.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/arm/sociox/if_scx.c
diff -u src/sys/arch/arm/sociox/if_scx.c:1.40 src/sys/arch/arm/sociox/if_scx.c:1.41
--- src/sys/arch/arm/sociox/if_scx.c:1.40	Sun May 21 00:35:38 2023
+++ src/sys/arch/arm/sociox/if_scx.c	Tue Jun 13 00:15:52 2023
@@ -1,4 +1,4 @@
-/*	$NetBSD: if_scx.c,v 1.40 2023/05/21 00:35:38 nisimura Exp $	*/
+/*	$NetBSD: if_scx.c,v 1.41 2023/06/13 00:15:52 nisimura Exp $	*/
 
 /*-
  * Copyright (c) 2020 The NetBSD Foundation, Inc.
@@ -49,7 +49,7 @@
  */
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: if_scx.c,v 1.40 2023/05/21 00:35:38 nisimura Exp $");
+__KERNEL_RCSID(0, "$NetBSD: if_scx.c,v 1.41 2023/06/13 00:15:52 nisimura Exp $");
 
 #include 
 #include 
@@ -75,7 +75,7 @@ __KERNEL_RCSID(0, "$NetBSD: if_scx.c,v 1
 #include 
 #include 
 
-/* SC2A11 GbE 64-bit paddr descriptor */
+/* SC2A11 GbE has 64-bit paddr descriptor */
 struct tdes {
 	uint32_t t0, t1, t2, t3;
 };
@@ -105,8 +105,9 @@ struct rdes {
 #define R0_TDRID	(12)		/* 15:12 target desc ring id */
 #define R0_FS		(1U<<9)		/* first segment of frame */
 #define R0_LS		(1U<<8)		/* last segment of frame */
-#define R0_CSUM		(3U<<6)		/* 7:6 checksum status */
-#define R0_CERR		(2U<<6)		/* 0: undone, 1: found ok, 2: bad */
+#define R0_CSUM		(3U<<6)		/* 7:6 checksum status, 0: undone */
+#define R0_CERR		(2U<<6)		/* 2: found bad */
+#define R0_COK		(1U<<6)		/* 1: found ok */
 /* R1 frame address 63:32 */
 /* R2 frame address 31:0 */
 /* R3 31:16 received frame length, 15:0 buffer length to receive */
@@ -120,11 +121,11 @@ struct rdes {
 #define  INIT_DB	(1U<<2)		/* ???; self clear when done */
 #define  INIT_CLS	(1U<<1)		/* ???; self clear when done */
 #define PKTCTRL		0x140		/* pkt engine control */
-#define  MODENRM	(1U<<28)	/* change mode to normal */
+#define  MODENRM	(1U<<28)	/* set operational mode to 'normal' */
 #define  ENJUMBO	(1U<<27)	/* allow jumbo frame */
 #define  RPTCSUMERR	(1U<<3)		/* log Rx checksum error */
-#define  RPTHDCOMP	(1U<<2)		/* log HD incomplete condition */
-#define  RPTHDERR	(1U<<1)		/* log HD error */
+#define  RPTHDCOMP	(1U<<2)		/* log header incomplete condition */
+#define  RPTHDERR	(1U<<1)		/* log header error */
 #define  DROPNOMATCH	(1U<<0)		/* drop no match frames */
 #define xINTSR		0x200		/* aggregated interrupt status */
 #define  IRQ_UCODE	(1U<<20)	/* ucode load completed; W1C */
@@ -145,16 +146,16 @@ struct rdes {
 #define TXIE_SET	0x428		/* bit to set */
 #define TXIE_CLR	0x42c		/* bit to clr */
 #define  TXI_NTOWNR	(1U<<17)	/* ??? desc array got empty */
-#define  TXI_TR_ERR	(1U<<16)	/* tx error */
-#define  TXI_TXDONE	(1U<<15)	/* tx completed */
-#define  TXI_TMREXP	(1U<<14)	/* coalesce timer expired */
+#define  TXI_TR_ERR	(1U<<16)	/* xmit error */
+#define  TXI_TXDONE	(1U<<15)	/* xmit completed */
+#define  TXI_TMREXP	(1U<<14)	/* coalesce guard timer expired */
 #define RXISR		0x440		/* receive status; W1C */
 #define RXIEN		0x444		/* rx interrupt enable */
 #define RXIE_SET	0x468		/* bit to set */
 #define RXIE_CLR	0x46c		/* bit to clr */
-#define  RXI_RC_ERR	(1U<<16)	/* rx error */
-#define  RXI_PKTCNT	(1U<<15)	/* rx counter has new value */
-#define  RXI_TMREXP	(1U<<14)	/* coalesce timer expired */
+#define  RXI_RC_ERR	(1U<<16)	/* recv error */
+#define  RXI_PKTCNT	(1U<<15)	/* recv counter has new value */
+#define  RXI_TMREXP	(1U<<14)	/* coalesce guard timer expired */
 /* 13 sets of special purpose desc interrupt handling register exist */
 #define TDBA_LO		0x408		/* tdes array base addr 31:0 */
 #define TDBA_HI		0x434		/* tdes array base addr 63:32 */
@@ -163,33 +164,33 @@ struct rdes {
 /* 13 pairs of special purpose desc array base address register exist */
 #define TXCONF		0x430
 #define RXCONF		0x470
-#define  DESCNF_UP	(1U<<31)	/* up-and-running */
+#define  DESCNF_UP	(1U<<31)	/* 'up-and-running' */
 #define  DESCNF_CHRST	(1U<<30)	/* channel reset */
 #define  DESCNF_TMR	(1U<<4)		/* coalesce timer mode select */
 #define  DESCNF_LE	(1)		/* little endian desc format */
 #define TXSUBMIT	0x410		/* submit frame(s) to transmit */
-#define TXCLSCMAX	0x418		/* tx intr coalesce upper bound */
-#define RXCLSCMAX	0x458		/* rx intr coalesce upper bound */
-#define TXITIMER	0x420		/* coalesce timer usec, MSB to use */
-#define RXITIMER	0x460		/* coalesce timer usec, MSB to use */
+#define TXCOALESC	0x418		/* tx intr coalesce upper bound */
+#define RXCOALESC	0x458		/* rx intr coalesce upper bound */
+#define TCLSCTIME	0x420		/* tintr guard time usec, MSB to on */
+#define RCLSCTIME	0x460		/* rintr guard time usec, MSB to on */
 

CVS commit: src/sys/arch/arm/sociox

2023-06-12 Thread Tohru Nishimura
Module Name:src
Committed By:   nisimura
Date:   Tue Jun 13 00:15:52 UTC 2023

Modified Files:
src/sys/arch/arm/sociox: if_scx.c

Log Message:
major code quality improvements, descriptive comments, code density.


To generate a diff of this commit:
cvs rdiff -u -r1.40 -r1.41 src/sys/arch/arm/sociox/if_scx.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.



CVS commit: src/sys/arch/arm/sociox

2023-05-20 Thread Tohru Nishimura
Module Name:src
Committed By:   nisimura
Date:   Sun May 21 00:35:38 UTC 2023

Modified Files:
src/sys/arch/arm/sociox: if_scx.c

Log Message:
small fixes, code shuffle for ease of understanding.


To generate a diff of this commit:
cvs rdiff -u -r1.39 -r1.40 src/sys/arch/arm/sociox/if_scx.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/arm/sociox/if_scx.c
diff -u src/sys/arch/arm/sociox/if_scx.c:1.39 src/sys/arch/arm/sociox/if_scx.c:1.40
--- src/sys/arch/arm/sociox/if_scx.c:1.39	Tue Sep 27 06:36:43 2022
+++ src/sys/arch/arm/sociox/if_scx.c	Sun May 21 00:35:38 2023
@@ -1,4 +1,4 @@
-/*	$NetBSD: if_scx.c,v 1.39 2022/09/27 06:36:43 skrll Exp $	*/
+/*	$NetBSD: if_scx.c,v 1.40 2023/05/21 00:35:38 nisimura Exp $	*/
 
 /*-
  * Copyright (c) 2020 The NetBSD Foundation, Inc.
@@ -29,6 +29,7 @@
  * POSSIBILITY OF SUCH DAMAGE.
  */
 
+#define NOT_MP_SAFE	0
 
 /*
  * Socionext SC2A11 SynQuacer NetSec GbE driver
@@ -41,17 +42,14 @@
  * NetSec uses Synopsys DesignWare Core EMAC.  DWC implementation
  * register (0x20) is known to have 0x10.36 and feature register (0x1058)
  * reports 0x11056f37.
- *  <24> exdesc
+ *  <24> alternative/enhanced desc format
  *  <18> receive IP type 2 checksum offload
- *  <17> (no) receive IP type 1 checksum offload
  *  <16> transmit checksum offload
  *  <11> event counter (mac management counter, MMC) 
  */
 
-#define NOT_MP_SAFE	0
-
 #include 
-__KERNEL_RCSID(0, "$NetBSD: if_scx.c,v 1.39 2022/09/27 06:36:43 skrll Exp $");
+__KERNEL_RCSID(0, "$NetBSD: if_scx.c,v 1.40 2023/05/21 00:35:38 nisimura Exp $");
 
 #include 
 #include 
@@ -81,27 +79,25 @@ __KERNEL_RCSID(0, "$NetBSD: if_scx.c,v 1
 struct tdes {
 	uint32_t t0, t1, t2, t3;
 };
-
 struct rdes {
 	uint32_t r0, r1, r2, r3;
 };
-
 #define T0_OWN		(1U<<31)	/* desc is ready to Tx */
-#define T0_EOD		(1U<<30)	/* end of descriptor array */
+#define T0_LD		(1U<<30)	/* last descriptor in array */
 #define T0_DRID		(24)		/* 29:24 desc ring id */
 #define T0_PT		(1U<<21)	/* 23:21 "pass-through" */
 #define T0_TDRID	(16)		/* 20:16 target desc ring id: GMAC=15 */
+#define T0_CC		(1U<<15)	/* ??? */
 #define T0_FS		(1U<<9)		/* first segment of frame */
 #define T0_LS		(1U<<8)		/* last segment of frame */
 #define T0_CSUM		(1U<<7)		/* enable check sum offload */
 #define T0_TSO		(1U<<6)		/* enable TCP segment offload */
-#define T0_TRS		(1U<<4)		/* 5:4 "TRS" */
+#define T0_TRS		(1U<<4)		/* 5:4 "TRS" ??? */
 /* T1 frame segment address 63:32 */
 /* T2 frame segment address 31:0 */
 /* T3 31:16 TCP segment length, 15:0 frame segment length to transmit */
-
 #define R0_OWN		(1U<<31)	/* desc is empty */
-#define R0_EOD		(1U<<30)	/* end of descriptor array */
+#define R0_LD		(1U<<30)	/* last descriptor in array */
 #define R0_SDRID	(24)		/* 29:24 source desc ring id */
 #define R0_FR		(1U<<23)	/* found fragmented */
 #define R0_ER		(1U<<21)	/* Rx error indication */
@@ -131,9 +127,13 @@ struct rdes {
 #define  RPTHDERR	(1U<<1)		/* log HD error */
 #define  DROPNOMATCH	(1U<<0)		/* drop no match frames */
 #define xINTSR		0x200		/* aggregated interrupt status */
-#define  IRQ_RX		(1U<<1)		/* top level Rx interrupt */
-#define  IRQ_TX		(1U<<0)		/* top level Rx interrupt */
 #define  IRQ_UCODE	(1U<<20)	/* ucode load completed; W1C */
+#define  IRQ_MAC	(1U<<19)	/* ??? */
+#define  IRQ_PKT	(1U<<18)	/* ??? */
+#define  IRQ_BOOTCODE	(1U<<5)		/* ??? */
+#define  IRQ_XDONE	(1U<<4)		/* ??? mode change completed */
+#define  IRQ_RX		(1U<<1)		/* top level Rx interrupt */
+#define  IRQ_TX		(1U<<0)		/* top level Tx interrupt */
 #define xINTAEN		0x204		/* INT_A enable */
 #define xINTAE_SET	0x234		/* bit to set */
 #define xINTAE_CLR	0x238		/* bit to clr */
@@ -174,6 +174,7 @@ struct rdes {
 #define RXITIMER	0x460		/* coalesce timer usec, MSB to use */
 #define TXDONECNT	0x414		/* tx completed count, auto-zero */
 #define RXDONECNT	0x454		/* rx available count, auto-zero */
+#define DMACTL_TMR	0x20c		/* engine DMA timer value */
 #define UCODE_H2M	0x210		/* host2media engine ucode port */
 #define UCODE_M2H	0x21c		/* media2host engine ucode port */
 #define CORESTAT	0x218		/* engine run state */
@@ -223,9 +224,9 @@ struct rdes {
 #define  MCR_WD		(1U<<23)	/* allow long >2048 tx frame */
 #define  MCR_JE		(1U<<20)	/* allow ~9018 tx jumbo frame */
 #define  MCR_IFG	(7U<<17)	/* 19:17 IFG value 0~7 */
-#define  MCR_DRCS	(1U<<16)	/* ignore (G)MII HDX Tx error */
-#define  MCR_USEMII	(1U<<15)	/* 1: RMII/MII, 0: RGMII (_PS) */
-#define  MCR_SPD100	(1U<<14)	/* force speed 100 (_FES) */
+#define  MCR_DCRS	(1U<<16)	/* ignore (G)MII HDX Tx error */
+#define  MCR_PS		(1U<<15)	/* 1: MII 10/100, 0: GMII 1000 */
+#define  MCR_FES	(1U<<14)	/* force speed 100 */
 #define  MCR_DO		(1U<<13)	/* don't receive my own HDX Tx frames */
 #define  MCR_LOOP	(1U<<12)	/* run loop back */
 #define  MCR_USEFDX	(1U<<11)	/* force full duplex */
@@ -233,11 +234,10 @@ struct 

CVS commit: src/sys/arch/arm/sociox

2023-05-20 Thread Tohru Nishimura
Module Name:src
Committed By:   nisimura
Date:   Sun May 21 00:35:38 UTC 2023

Modified Files:
src/sys/arch/arm/sociox: if_scx.c

Log Message:
small fixes, code shuffle for ease of understanding.


To generate a diff of this commit:
cvs rdiff -u -r1.39 -r1.40 src/sys/arch/arm/sociox/if_scx.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.



CVS commit: src/sys/arch/arm/sociox

2022-02-01 Thread Tohru Nishimura
Module Name:src
Committed By:   nisimura
Date:   Tue Feb  1 09:08:33 UTC 2022

Modified Files:
src/sys/arch/arm/sociox: files.sociox

Log Message:
retire SocioNext AVE 32/64 GbE driver


To generate a diff of this commit:
cvs rdiff -u -r1.10 -r1.11 src/sys/arch/arm/sociox/files.sociox

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/arm/sociox/files.sociox
diff -u src/sys/arch/arm/sociox/files.sociox:1.10 src/sys/arch/arm/sociox/files.sociox:1.11
--- src/sys/arch/arm/sociox/files.sociox:1.10	Fri Dec  3 05:21:52 2021
+++ src/sys/arch/arm/sociox/files.sociox	Tue Feb  1 09:08:33 2022
@@ -1,4 +1,4 @@
-#	$NetBSD: files.sociox,v 1.10 2021/12/03 05:21:52 nisimura Exp $
+#	$NetBSD: files.sociox,v 1.11 2022/02/01 09:08:33 nisimura Exp $
 #
 # Configuration info for Socionext SC2A11
 #
@@ -10,11 +10,6 @@ attach	scx at acpinodebus with scx_acpi
 attach	scx at fdt with scx_fdt
 file	arch/arm/sociox/if_scx.c		scx
 
-# Unifier AVE GbE
-device	ave: ether, ifnet, arp, mii, bus_dma_generic
-attach	ave at fdt with ave_fdt
-file	arch/arm/sociox/if_ave.c		ave
-
 # Socionext eMMC
 device	sniemmc: sdmmcbus
 attach	sniemmc at acpinodebus with sniemmc_acpi



CVS commit: src/sys/arch/arm/sociox

2022-02-01 Thread Tohru Nishimura
Module Name:src
Committed By:   nisimura
Date:   Tue Feb  1 09:08:33 UTC 2022

Modified Files:
src/sys/arch/arm/sociox: files.sociox

Log Message:
retire SocioNext AVE 32/64 GbE driver


To generate a diff of this commit:
cvs rdiff -u -r1.10 -r1.11 src/sys/arch/arm/sociox/files.sociox

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.



CVS commit: src/sys/arch/arm/sociox

2022-02-01 Thread Tohru Nishimura
Module Name:src
Committed By:   nisimura
Date:   Tue Feb  1 08:58:25 UTC 2022

Removed Files:
src/sys/arch/arm/sociox: if_ave.c

Log Message:
retire SocioNext AVE 32/64 GbE driver


To generate a diff of this commit:
cvs rdiff -u -r1.22 -r0 src/sys/arch/arm/sociox/if_ave.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.



CVS commit: src/sys/arch/arm/sociox

2022-02-01 Thread Tohru Nishimura
Module Name:src
Committed By:   nisimura
Date:   Tue Feb  1 08:58:25 UTC 2022

Removed Files:
src/sys/arch/arm/sociox: if_ave.c

Log Message:
retire SocioNext AVE 32/64 GbE driver


To generate a diff of this commit:
cvs rdiff -u -r1.22 -r0 src/sys/arch/arm/sociox/if_ave.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.



CVS commit: src/sys/arch/arm/sociox

2022-01-26 Thread Tohru Nishimura
Module Name:src
Committed By:   nisimura
Date:   Thu Jan 27 02:34:23 UTC 2022

Modified Files:
src/sys/arch/arm/sociox: if_scx.c

Log Message:
always use mac_write/read to handle DWC registers


To generate a diff of this commit:
cvs rdiff -u -r1.35 -r1.36 src/sys/arch/arm/sociox/if_scx.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/arm/sociox/if_scx.c
diff -u src/sys/arch/arm/sociox/if_scx.c:1.35 src/sys/arch/arm/sociox/if_scx.c:1.36
--- src/sys/arch/arm/sociox/if_scx.c:1.35	Tue Jan 25 10:51:36 2022
+++ src/sys/arch/arm/sociox/if_scx.c	Thu Jan 27 02:34:23 2022
@@ -1,4 +1,4 @@
-/*	$NetBSD: if_scx.c,v 1.35 2022/01/25 10:51:36 nisimura Exp $	*/
+/*	$NetBSD: if_scx.c,v 1.36 2022/01/27 02:34:23 nisimura Exp $	*/
 
 /*-
  * Copyright (c) 2020 The NetBSD Foundation, Inc.
@@ -40,13 +40,18 @@
  * have to be loaded by device driver.
  * NetSec uses Synopsys DesignWare Core EMAC.  DWC implementation
  * register (0x20) is known to have 0x10.36 and feature register (0x1058)
- * to report XX.XX.
+ * reports 0x11056f37.
+ *  <24> exdesc
+ *  <18> receive IP type 2 checksum offload
+ *  <17> (no) receive IP type 1 checksum offload
+ *  <16> transmit checksum offload
+ *  <11> event counter (mac management counter, MMC) 
  */
 
 #define NOT_MP_SAFE	0
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: if_scx.c,v 1.35 2022/01/25 10:51:36 nisimura Exp $");
+__KERNEL_RCSID(0, "$NetBSD: if_scx.c,v 1.36 2022/01/27 02:34:23 nisimura Exp $");
 
 #include 
 #include 
@@ -380,12 +385,12 @@ struct rdes {
 #define  FEA_2COE	(1U<<18)	/* Rx type 2 IP checksum offload */
 #define  FEA_1COE	(1U<<17)	/* Rx type 1 IP checksum offload */
 #define  FEA_TXOE	(1U<<16)	/* Tx checksum offload */
-#define  FEA_MMC	(1U<<11)	/* RMON management block */
+#define  FEA_MMC	(1U<<11)	/* RMON event counter */
 
 #define GMACEVCTL	0x0100		/* event counter control */
 #define  EVC_FHP	(1U<<5)		/* full-half preset */
-#define  EVC_CP		(1U<<4)		/* counters preset */
-#define  EVC_MCF	(1U<<3)		/* MMC counter freeze */
+#define  EVC_CP		(1U<<4)		/* counter preset */
+#define  EVC_MCF	(1U<<3)		/* counter freeze */
 #define  EVC_ROR	(1U<<2)		/* auto-zero on counter read */
 #define  EVC_CSR	(1U<<1)		/* counter stop rollover */
 #define  EVC_CR		(1U<<0)		/* reset counters */
@@ -1025,7 +1030,8 @@ scx_reset(struct scx_softc *sc)
 	CSR_WRITE(sc, TXISR, ~0);
 	CSR_WRITE(sc, xINTAE_CLR, ~0);
 
-	mac_write(sc, GMACEVCTL, 1);
+	/* clear event counters, auto-zero after every read */
+	mac_write(sc, GMACEVCTL, EVC_CR | EVC_ROR);
 }
 
 static int
@@ -1045,7 +1051,7 @@ scx_init(struct ifnet *ifp)
 
 	/* build sane Tx */
 	memset(sc->sc_txdescs, 0, sizeof(struct tdes) * MD_NTXDESC);
-	sc->sc_txdescs[MD_NTXDESC - 1].t0 |= T0_EOD; /* tie off the ring */
+	sc->sc_txdescs[MD_NTXDESC - 1].t0 = T0_EOD; /* tie off the ring */
 	SCX_CDTXSYNC(sc, 0, MD_NTXDESC,
 		BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
 	sc->sc_txfree = MD_NTXDESC;
@@ -1071,8 +1077,7 @@ scx_init(struct ifnet *ifp)
 		else
 			SCX_INIT_RXDESC(sc, i);
 	}
-	sc->sc_rxdescs[MD_NRXDESC - 1].r0 = R0_EOD;
-	sc->sc_rxptr = 0;
+	sc->sc_rxdescs[MD_NRXDESC - 1].r0 = R0_EOD; /* tie off the ring */
 	sc->sc_rxptr = 0;
 
 	paddr = SCX_CDTXADDR(sc, 0);		/* tdes array (ring#0) */
@@ -1104,8 +1109,8 @@ scx_init(struct ifnet *ifp)
 	CSR_WRITE(sc, DESC_INIT, 01);
 	WAIT_FOR_CLR(sc, DESC_INIT, 01, 0);
 
-	CSR_WRITE(sc, GMACRDLA, _RDLA);		/* GMAC rdes store */
-	CSR_WRITE(sc, GMACTDLA, _TDLA);		/* GMAC tdes store */
+	mac_write(sc, GMACRDLA, _RDLA);		/* GMAC rdes store */
+	mac_write(sc, GMACTDLA, _TDLA);		/* GMAC tdes store */
 
 	CSR_WRITE(sc, FLOWTHR, (48<<16) | 36);	/* pause|resume threshold */
 	mac_write(sc, GMACFCR, 256 << 16);	/* 31:16 pause value */



CVS commit: src/sys/arch/arm/sociox

2022-01-26 Thread Tohru Nishimura
Module Name:src
Committed By:   nisimura
Date:   Thu Jan 27 02:34:23 UTC 2022

Modified Files:
src/sys/arch/arm/sociox: if_scx.c

Log Message:
always use mac_write/read to handle DWC registers


To generate a diff of this commit:
cvs rdiff -u -r1.35 -r1.36 src/sys/arch/arm/sociox/if_scx.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.



CVS commit: src/sys/arch/arm/sociox

2022-01-25 Thread Tohru Nishimura
Module Name:src
Committed By:   nisimura
Date:   Tue Jan 25 10:51:36 UTC 2022

Modified Files:
src/sys/arch/arm/sociox: if_scx.c

Log Message:
- don't put const for CFATTACH_DECL_NEW()
- MDIO now senses PHY correctly.


To generate a diff of this commit:
cvs rdiff -u -r1.34 -r1.35 src/sys/arch/arm/sociox/if_scx.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/arm/sociox/if_scx.c
diff -u src/sys/arch/arm/sociox/if_scx.c:1.34 src/sys/arch/arm/sociox/if_scx.c:1.35
--- src/sys/arch/arm/sociox/if_scx.c:1.34	Fri Dec 31 14:25:22 2021
+++ src/sys/arch/arm/sociox/if_scx.c	Tue Jan 25 10:51:36 2022
@@ -1,4 +1,4 @@
-/*	$NetBSD: if_scx.c,v 1.34 2021/12/31 14:25:22 riastradh Exp $	*/
+/*	$NetBSD: if_scx.c,v 1.35 2022/01/25 10:51:36 nisimura Exp $	*/
 
 /*-
  * Copyright (c) 2020 The NetBSD Foundation, Inc.
@@ -46,7 +46,7 @@
 #define NOT_MP_SAFE	0
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: if_scx.c,v 1.34 2021/12/31 14:25:22 riastradh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: if_scx.c,v 1.35 2022/01/25 10:51:36 nisimura Exp $");
 
 #include 
 #include 
@@ -546,10 +546,10 @@ static void scx_fdt_attach(device_t, dev
 static int scx_acpi_match(device_t, cfdata_t, void *);
 static void scx_acpi_attach(device_t, device_t, void *);
 
-const CFATTACH_DECL_NEW(scx_fdt, sizeof(struct scx_softc),
+CFATTACH_DECL_NEW(scx_fdt, sizeof(struct scx_softc),
 scx_fdt_match, scx_fdt_attach, NULL, NULL);
 
-const CFATTACH_DECL_NEW(scx_acpi, sizeof(struct scx_softc),
+CFATTACH_DECL_NEW(scx_acpi, sizeof(struct scx_softc),
 scx_acpi_match, scx_acpi_attach, NULL, NULL);
 
 static void scx_attach_i(struct scx_softc *);
@@ -683,9 +683,6 @@ scx_fdt_attach(device_t parent, device_t
 	const char *phy_type;
 	long ref_clk;
 
-	aprint_naive("\n");
-	aprint_normal(": Socionext Gigabit Ethernet controller\n");
-
 	if (fdtbus_get_reg(phandle, 0, addr+0, size+0) != 0
 	|| bus_space_map(faa->faa_bst, addr[0], size[0], 0, ) != 0) {
 		aprint_error_dev(self, "unable to map device csr\n");
@@ -731,6 +728,7 @@ scx_fdt_attach(device_t parent, device_t
 	sc->sc_phy_id = phy_id;
 	sc->sc_freq = ref_clk;
 
+	aprint_normal("%s", device_xname(self));
 	scx_attach_i(sc);
 	return;
  fail:
@@ -762,15 +760,11 @@ scx_acpi_attach(device_t parent, device_
 	ACPI_INTEGER phy_type, phy_id, ref_freq;
 	ACPI_STATUS rv;
 
-	aprint_naive("\n");
-	aprint_normal(": Socionext Gigabit Ethernet controller\n");
-
 	rv = acpi_resource_parse(self, handle, "_CRS",
 	, _resource_parse_ops_default);
-	if (ACPI_FAILURE(rv)) {
-		aprint_error_dev(self, "missing crs resources\n");
+	if (ACPI_FAILURE(rv))
 		return;
-	}
+
 	mem = acpi_res_mem(, 0);
 	irq = acpi_res_irq(, 0);
 	if (mem == NULL || irq == NULL || mem->ar_length == 0) {
@@ -783,8 +777,8 @@ scx_acpi_attach(device_t parent, device_
 		return;
 	}
 	sc->sc_sz = mem->ar_length;
-	sc->sc_ih = acpi_intr_establish(self, (uint64_t)handle, IPL_NET,
-	NOT_MP_SAFE, scx_intr, sc, device_xname(self));
+	sc->sc_ih = acpi_intr_establish(self, (uint64_t)(uintptr_t)handle,
+	IPL_NET, NOT_MP_SAFE, scx_intr, sc, device_xname(self));
 	if (sc->sc_ih == NULL) {
 		aprint_error_dev(self, "couldn't establish interrupt\n");
 		goto fail;
@@ -808,7 +802,7 @@ scx_acpi_attach(device_t parent, device_
 	}
 	rv = acpi_dsd_integer(handle, "phy-channel", _id);
 	if (ACPI_FAILURE(rv))
-		phy_id = 7;
+		phy_id = MII_PHY_ANY;
 	rv = acpi_dsd_integer(handle, "socionext,phy-clock-frequency",
 			_freq);
 	if (ACPI_FAILURE(rv))
@@ -819,15 +813,14 @@ scx_acpi_attach(device_t parent, device_
 	sc->sc_sh = bsh;
 	sc->sc_eesh = eebsh;
 	sc->sc_dmat = aa->aa_dmat64;
-
-aprint_normal_dev(self,
-"phy type %d, phy id %d, freq %ld\n", (int)phy_type, (int)phy_id, ref_freq);
 	sc->sc_100mii = (phy_type != 1000);
 	sc->sc_phy_id = (int)phy_id;
 	sc->sc_freq = ref_freq;
+
 aprint_normal_dev(self,
-"GMACGAR %08x\n", mac_read(sc, GMACGAR));
+"phy type %d, phy id %d, freq %ld\n", (int)phy_type, (int)phy_id, ref_freq);
 
+	aprint_normal("%s", device_xname(self));
 	scx_attach_i(sc);
 
 	acpi_resource_cleanup();
@@ -847,22 +840,23 @@ scx_attach_i(struct scx_softc *sc)
 	struct ifnet * const ifp = >sc_ethercom.ec_if;
 	struct mii_data * const mii = >sc_mii;
 	struct ifmedia * const ifm = >mii_media;
-	uint32_t which, dwimp, dwfea;
+	uint32_t which, dwfea, dwimp;
 	uint8_t enaddr[ETHER_ADDR_LEN];
 	bus_dma_segment_t seg;
 	uint32_t csr;
 	int i, nseg, error = 0;
 
+	aprint_naive("\n");
+	aprint_normal(": Socionext Gigabit Ethernet controller\n");
+
 	which = CSR_READ(sc, HWVER);	/* Socionext version 5.00xx */
-	dwimp = mac_read(sc, GMACIMPL);	/* DWC EMAC XX.YY */
-	dwfea = mac_read(sc, HWFEA);	/* DWC feature */
+	dwfea = mac_read(sc, HWFEA);	/* DWC feature bits */
+	dwimp = mac_read(sc, GMACIMPL);	/* DWC implementation XX.YY */
 	aprint_normal_dev(sc->sc_dev,
-	"Socionext NetSec GbE %x.%x"
-	" (impl 0x%x, feature 0x%x)\n",
-	which >> 

CVS commit: src/sys/arch/arm/sociox

2022-01-25 Thread Tohru Nishimura
Module Name:src
Committed By:   nisimura
Date:   Tue Jan 25 10:51:36 UTC 2022

Modified Files:
src/sys/arch/arm/sociox: if_scx.c

Log Message:
- don't put const for CFATTACH_DECL_NEW()
- MDIO now senses PHY correctly.


To generate a diff of this commit:
cvs rdiff -u -r1.34 -r1.35 src/sys/arch/arm/sociox/if_scx.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.



CVS commit: src/sys/arch/arm/sociox

2022-01-25 Thread Tohru Nishimura
Module Name:src
Committed By:   nisimura
Date:   Tue Jan 25 10:38:56 UTC 2022

Modified Files:
src/sys/arch/arm/sociox: sni_gpio.c

Log Message:
- rectify attach messages.
- abandon irq to use for now.


To generate a diff of this commit:
cvs rdiff -u -r1.12 -r1.13 src/sys/arch/arm/sociox/sni_gpio.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/arm/sociox/sni_gpio.c
diff -u src/sys/arch/arm/sociox/sni_gpio.c:1.12 src/sys/arch/arm/sociox/sni_gpio.c:1.13
--- src/sys/arch/arm/sociox/sni_gpio.c:1.12	Tue Dec 21 06:00:45 2021
+++ src/sys/arch/arm/sociox/sni_gpio.c	Tue Jan 25 10:38:56 2022
@@ -1,4 +1,4 @@
-/*	$NetBSD: sni_gpio.c,v 1.12 2021/12/21 06:00:45 nisimura Exp $	*/
+/*	$NetBSD: sni_gpio.c,v 1.13 2022/01/25 10:38:56 nisimura Exp $	*/
 
 /*-
  * Copyright (c) 2020 The NetBSD Foundation, Inc.
@@ -34,7 +34,7 @@
  */
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: sni_gpio.c,v 1.12 2021/12/21 06:00:45 nisimura Exp $");
+__KERNEL_RCSID(0, "$NetBSD: sni_gpio.c,v 1.13 2022/01/25 10:38:56 nisimura Exp $");
 
 #include 
 #include 
@@ -94,14 +94,13 @@ CFATTACH_DECL_NEW(snigpio_acpi, sizeof(s
  *PowerButton (PWROFF#) can be detectable.
  *
  *  DevelopmentBox has 96board mezzanine 2x 20 receptacle
- *gpio  "/gpio@5100" pinA-L (10-25) down edge sensitive
+ *gpio  "/gpio@5100" pinA-L (23-34) down edge sensitive
  *i2c   "/i2c1@51221000"
  *spi   "/spi1@5481"
- *uart0 "/uart@2a40" pin1-4 for real S2C11 console
- *uart1 SCP secure co-prorcessor uart console in pin5-6
+ *uart0 "/uart@2a40" pin3,5,7,9 for real S2CA11 console
+ *uart1 SCP secure co-prorcessor uart console in pin11,13
  */
 static void snigpio_attach_i(struct snigpio_softc *);
-static int snigpio_intr(void *);
 
 static const struct device_compatible_entry compat_data[] = {
 	{ .compat = "socionext,synquacer-gpio" },
@@ -130,32 +129,12 @@ snigpio_fdt_attach(device_t parent, devi
 	bus_space_handle_t ioh;
 	bus_addr_t addr;
 	bus_size_t size;
-	char intrstr[128];
-	const char *list;
-
-	aprint_naive("\n");
-	aprint_normal(": Socionext GPIO controller\n");
 
 	if (fdtbus_get_reg(phandle, 0, , ) != 0
 	|| bus_space_map(faa->faa_bst, addr, size, 0, ) != 0) {
 		aprint_error_dev(self, "unable to map device\n");
 		return;
 	}
-	if (!fdtbus_intr_str(phandle, 0, intrstr, sizeof(intrstr))) {
-		aprint_error_dev(self, "failed to decode interrupt\n");
-		goto fail;
-	}
-	sc->sc_ih = fdtbus_intr_establish(phandle,
-			0, IPL_VM, 0, snigpio_intr, sc);
-	if (sc->sc_ih == NULL) {
-		aprint_error_dev(self, "couldn't establish interrupt\n");
-		goto fail;
-	}
-	aprint_normal_dev(self, "interrupting on %s\n", intrstr);
-
-	list = fdtbus_get_string(phandle, "gpio-line-names");
-	if (list)
-		aprint_normal_dev(self, "%s\n", list);
 
 	sc->sc_dev = self;
 	sc->sc_iot = faa->faa_bst;
@@ -163,13 +142,11 @@ snigpio_fdt_attach(device_t parent, devi
 	sc->sc_iob = addr;
 	sc->sc_ios = size;
 	sc->sc_phandle = phandle;
+	/* could use FDI "gpio-line-names" array via device_set_handle() */
 
 	snigpio_attach_i(sc);
 
 	return;
- fail:
-	bus_space_unmap(sc->sc_iot, sc->sc_ioh, sc->sc_ios);
-	return;	
 }
 
 static int
@@ -189,22 +166,16 @@ snigpio_acpi_attach(device_t parent, dev
 	bus_space_handle_t ioh;
 	struct acpi_resources res;
 	struct acpi_mem *mem;
-	struct acpi_irq *irq;
 	ACPI_STATUS rv;
 	char *list;
 
-	aprint_naive("\n");
-	aprint_normal(": Socionext GPIO controller\n");
-
 	rv = acpi_resource_parse(self, aa->aa_node->ad_handle, "_CRS",
 	, _resource_parse_ops_default);
-	if (ACPI_FAILURE(rv)) {
-		aprint_error_dev(self, "missing crs resources\n");
+	if (ACPI_FAILURE(rv))
 		return;
-	}
+
 	mem = acpi_res_mem(, 0);
-	irq = acpi_res_irq(, 0);
-	if (mem == NULL || irq == NULL || mem->ar_length == 0) {
+	if (mem == NULL || mem->ar_length == 0) {
 		aprint_error_dev(self, "incomplete resources\n");
 		return;
 	}
@@ -213,30 +184,19 @@ snigpio_acpi_attach(device_t parent, dev
 		aprint_error_dev(self, "couldn't map registers\n");
 		return;
 	}
-	sc->sc_ih = acpi_intr_establish(self, (uint64_t)handle,
-	IPL_VM, false, snigpio_intr, sc, device_xname(self));
-	if (sc->sc_ih == NULL) {
-		aprint_error_dev(self, "couldn't establish interrupt\n");
-		goto fail;
-	}
-	rv = acpi_dsd_string(handle, "gpio-line-names", );
-	if (ACPI_SUCCESS(rv))
-		aprint_normal_dev(self, "%s\n", list);
 
 	sc->sc_dev = self;
 	sc->sc_iot = aa->aa_memt;
 	sc->sc_ioh = ioh;
 	sc->sc_ios = mem->ar_length;
 	sc->sc_phandle = 0;
+	/* UEFI provides "gpio-line-names" for us */
 
+	aprint_normal("%s", device_xname(self));
 	snigpio_attach_i(sc);
 
 	acpi_resource_cleanup();
 	return;
- fail:
-	acpi_resource_cleanup();
-	bus_space_unmap(sc->sc_iot, sc->sc_ioh, sc->sc_ios);
-	return;	
 }
 
 static void
@@ -245,6 +205,9 @@ snigpio_attach_i(struct snigpio_softc *s
 	struct gpio_chipset_tag	*gc;
 	struct gpiobus_attach_args gba;
 
+	

CVS commit: src/sys/arch/arm/sociox

2022-01-25 Thread Tohru Nishimura
Module Name:src
Committed By:   nisimura
Date:   Tue Jan 25 10:38:56 UTC 2022

Modified Files:
src/sys/arch/arm/sociox: sni_gpio.c

Log Message:
- rectify attach messages.
- abandon irq to use for now.


To generate a diff of this commit:
cvs rdiff -u -r1.12 -r1.13 src/sys/arch/arm/sociox/sni_gpio.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.



CVS commit: src/sys/arch/arm/sociox

2021-12-21 Thread Tohru Nishimura
Module Name:src
Committed By:   nisimura
Date:   Wed Dec 22 02:32:53 UTC 2021

Modified Files:
src/sys/arch/arm/sociox: sni_i2c.c

Log Message:
add register definitions. the design is BCM2835 I2C look-a-like.


To generate a diff of this commit:
cvs rdiff -u -r1.13 -r1.14 src/sys/arch/arm/sociox/sni_i2c.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/arm/sociox/sni_i2c.c
diff -u src/sys/arch/arm/sociox/sni_i2c.c:1.13 src/sys/arch/arm/sociox/sni_i2c.c:1.14
--- src/sys/arch/arm/sociox/sni_i2c.c:1.13	Tue Dec 21 06:00:45 2021
+++ src/sys/arch/arm/sociox/sni_i2c.c	Wed Dec 22 02:32:53 2021
@@ -1,4 +1,4 @@
-/*	$NetBSD: sni_i2c.c,v 1.13 2021/12/21 06:00:45 nisimura Exp $	*/
+/*	$NetBSD: sni_i2c.c,v 1.14 2021/12/22 02:32:53 nisimura Exp $	*/
 
 /*-
  * Copyright (c) 2020 The NetBSD Foundation, Inc.
@@ -34,7 +34,7 @@
  */
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: sni_i2c.c,v 1.13 2021/12/21 06:00:45 nisimura Exp $");
+__KERNEL_RCSID(0, "$NetBSD: sni_i2c.c,v 1.14 2021/12/22 02:32:53 nisimura Exp $");
 
 #include 
 #include 
@@ -53,23 +53,67 @@ __KERNEL_RCSID(0, "$NetBSD: sni_i2c.c,v 
 #include 
 #include 
 
+#define BSR		0x00		/* status */
+#define  BSR_BB		(1U<<7)		/* busy */
+#define  BSR_RSC	(1U<<6)		/* repeated cycle condition */
+#define  BSR_AL		(1U<<5)		/* arbitration lost */
+#define  BSR_LRB	(1U<<4)		/* last bit received */
+#define  BSR_XFR	(1U<<3)		/* start transfer */
+#define  BSR_AAS	(1U<<2)		/* ??? address as slave */
+#define  BSR_GCA	(1U<<1)		/* ??? general call address */
+#define  BSR_FBT	(1U<<0)		/* first byte transfer detected */
+#define BCR		0x04		/* control */
+#define  BCR_BERR	(1U<<7)		/* bus error report; W0C */
+#define  BCR_BEIEN	(1U<<6)		/* enable bus error interrupt */
+#define  BCR_SCC	(1U<<5)		/* make start condition */
+#define  BCR_MSS	(1U<<4)		/* 1: xmit, 0: recv */ 
+#define  BCR_ACK	(1U<<3)		/* make acknowledge at last byte */
+#define  BCR_GCAA	(1U<<2)		/* ??? general call access ack */
+#define  BCR_IEN	(1U<<1)		/* enable interupt */
+#define  BCR_INT	(1U<<0)		/* interrupt report; W0C */
+#define CCR		0x08
+#define  CCR_FM		(1U<<6)		/* speed; 1: fast, 0: standard */
+#define  CCR_EN		(1U<<5)		/* enable clock feed */
+/* 4:0 clock rate select */
+#define ADR		0x0c		/* 6:0 my own address */
+#define DAR		0x10		/* 7:0 data port */
+#define CSR		0x14		/* 5:0 clock divisor */
+#define FSR		0x18		/* bus clock frequency */
+#define BC2R		0x1c		/* control 2 */
+#define  BC2R_SDA	(1U<<5)		/* detected SDA signal */
+#define  BC2R_SCL	(1U<<5)		/* detected SCL signal */
+#define  BC2R_SDA_L	(1U<<1)		/* make SDA signal low */
+#define  BC2R_SCL_L	(1U<<1)		/* make SCL signal low */
+
 static int sniiic_fdt_match(device_t, struct cfdata *, void *);
 static void sniiic_fdt_attach(device_t, device_t, void *);
 static int sniiic_acpi_match(device_t, struct cfdata *, void *);
 static void sniiic_acpi_attach(device_t, device_t, void *);
 
+typedef enum {
+	EXEC_IDLE	= 0,	/* sane and idle */
+	EXEC_ADDR	= 1,	/* send address bits */
+	EXEC_CMD	= 2,	/* send command bits */
+	EXEC_SEND	= 3,	/* data xmit */
+	EXEC_RECV	= 4,	/* data recv */
+	EXEC_DONE	= 5,	/* xter done */
+	EXEC_ERR	= 6,	/* recover error */
+} state_t;
+
 struct sniiic_softc {
 	device_t		sc_dev;
 	struct i2c_controller	sc_ic;
 	bus_space_tag_t		sc_iot;
 	bus_space_handle_t	sc_ioh;
-	bus_addr_t		sc_iob;
 	bus_size_t		sc_ios;
 	void			*sc_ih;
 	kmutex_t		sc_lock;
 	kmutex_t		sc_mtx;
 	kcondvar_t		sc_cv;
 	volatile bool		sc_busy;
+	state_t			sc_state;
+	u_int			sc_frequency;
+	u_int			sc_clkrate;
 	int			sc_phandle;
 };
 
@@ -90,9 +134,9 @@ static int sni_i2c_intr(void *);
 static void sni_i2c_reset(struct sniiic_softc *);
 static void sni_i2c_flush(struct sniiic_softc *);
 
-#define I2C_READ(sc, reg) \
+#define CSR_READ(sc, reg) \
 bus_space_read_4((sc)->sc_ioh,(sc)->sc_ioh,(reg))
-#define I2C_WRITE(sc, reg, val) \
+#define CSR_WRITE(sc, reg, val) \
 bus_space_write_4((sc)->sc_ioh,(sc)->sc_ioh,(reg),(val))
 
 static const struct device_compatible_entry compat_data[] = {
@@ -146,7 +190,6 @@ sniiic_fdt_attach(device_t parent, devic
 	sc->sc_dev = self;
 	sc->sc_iot = faa->faa_bst;
 	sc->sc_ioh = ioh;
-	sc->sc_iob = addr;
 	sc->sc_ios = size;
 	sc->sc_phandle = phandle;
 
@@ -213,7 +256,6 @@ sniiic_acpi_attach(device_t parent, devi
 	sc->sc_dev = self;
 	sc->sc_iot = aa->aa_memt;
 	sc->sc_ioh = ioh;
-	sc->sc_iob = mem->ar_base;
 	sc->sc_ios = mem->ar_length;
 	sc->sc_phandle = 0;
 



CVS commit: src/sys/arch/arm/sociox

2021-12-21 Thread Tohru Nishimura
Module Name:src
Committed By:   nisimura
Date:   Wed Dec 22 02:32:53 UTC 2021

Modified Files:
src/sys/arch/arm/sociox: sni_i2c.c

Log Message:
add register definitions. the design is BCM2835 I2C look-a-like.


To generate a diff of this commit:
cvs rdiff -u -r1.13 -r1.14 src/sys/arch/arm/sociox/sni_i2c.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.



CVS commit: src/sys/arch/sandpoint/conf

2021-12-21 Thread Tohru Nishimura
Module Name:src
Committed By:   nisimura
Date:   Tue Dec 21 23:40:03 UTC 2021

Removed Files:
src/sys/arch/sandpoint/conf: ENCPP1

Log Message:
retire Ampro EnCorePP1 board configuration


To generate a diff of this commit:
cvs rdiff -u -r1.25 -r0 src/sys/arch/sandpoint/conf/ENCPP1

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.



CVS commit: src/sys/arch/sandpoint/conf

2021-12-21 Thread Tohru Nishimura
Module Name:src
Committed By:   nisimura
Date:   Tue Dec 21 23:40:03 UTC 2021

Removed Files:
src/sys/arch/sandpoint/conf: ENCPP1

Log Message:
retire Ampro EnCorePP1 board configuration


To generate a diff of this commit:
cvs rdiff -u -r1.25 -r0 src/sys/arch/sandpoint/conf/ENCPP1

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.



CVS commit: src/sys/arch/arm/sociox

2021-12-21 Thread Tohru Nishimura
Module Name:src
Committed By:   nisimura
Date:   Tue Dec 21 21:30:49 UTC 2021

Modified Files:
src/sys/arch/arm/sociox: if_scx.c

Log Message:
pursue better register description


To generate a diff of this commit:
cvs rdiff -u -r1.32 -r1.33 src/sys/arch/arm/sociox/if_scx.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.



CVS commit: src/sys/arch/arm/sociox

2021-12-21 Thread Tohru Nishimura
Module Name:src
Committed By:   nisimura
Date:   Tue Dec 21 21:30:49 UTC 2021

Modified Files:
src/sys/arch/arm/sociox: if_scx.c

Log Message:
pursue better register description


To generate a diff of this commit:
cvs rdiff -u -r1.32 -r1.33 src/sys/arch/arm/sociox/if_scx.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/arm/sociox/if_scx.c
diff -u src/sys/arch/arm/sociox/if_scx.c:1.32 src/sys/arch/arm/sociox/if_scx.c:1.33
--- src/sys/arch/arm/sociox/if_scx.c:1.32	Tue Dec 21 12:12:52 2021
+++ src/sys/arch/arm/sociox/if_scx.c	Tue Dec 21 21:30:49 2021
@@ -1,4 +1,4 @@
-/*	$NetBSD: if_scx.c,v 1.32 2021/12/21 12:12:52 nisimura Exp $	*/
+/*	$NetBSD: if_scx.c,v 1.33 2021/12/21 21:30:49 nisimura Exp $	*/
 
 /*-
  * Copyright (c) 2020 The NetBSD Foundation, Inc.
@@ -46,7 +46,7 @@
 #define NOT_MP_SAFE	0
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: if_scx.c,v 1.32 2021/12/21 12:12:52 nisimura Exp $");
+__KERNEL_RCSID(0, "$NetBSD: if_scx.c,v 1.33 2021/12/21 21:30:49 nisimura Exp $");
 
 #include 
 #include 
@@ -163,7 +163,7 @@ struct rdes {
 #define  DESCNF_CHRST	(1U<<30)	/* channel reset */
 #define  DESCNF_TMR	(1U<<4)		/* coalesce timer mode select */
 #define  DESCNF_LE	(1)		/* little endian desc format */
-#define TXSUBMIT	0x410		/* submit loaded tx frame */
+#define TXSUBMIT	0x410		/* submit frame(s) to transmit */
 #define TXCLSCMAX	0x418		/* tx intr coalesce upper bound */
 #define RXCLSCMAX	0x458		/* rx intr coalesce upper bound */
 #define TXITIMER	0x420		/* coalesce timer usec, MSB to use */



CVS commit: src/sys/arch/arm/sociox

2021-12-21 Thread Tohru Nishimura
Module Name:src
Committed By:   nisimura
Date:   Tue Dec 21 12:12:52 UTC 2021

Modified Files:
src/sys/arch/arm/sociox: if_scx.c

Log Message:
correct register definition error and improve naming


To generate a diff of this commit:
cvs rdiff -u -r1.31 -r1.32 src/sys/arch/arm/sociox/if_scx.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/arm/sociox/if_scx.c
diff -u src/sys/arch/arm/sociox/if_scx.c:1.31 src/sys/arch/arm/sociox/if_scx.c:1.32
--- src/sys/arch/arm/sociox/if_scx.c:1.31	Tue Dec 21 11:07:51 2021
+++ src/sys/arch/arm/sociox/if_scx.c	Tue Dec 21 12:12:52 2021
@@ -1,4 +1,4 @@
-/*	$NetBSD: if_scx.c,v 1.31 2021/12/21 11:07:51 nisimura Exp $	*/
+/*	$NetBSD: if_scx.c,v 1.32 2021/12/21 12:12:52 nisimura Exp $	*/
 
 /*-
  * Copyright (c) 2020 The NetBSD Foundation, Inc.
@@ -46,7 +46,7 @@
 #define NOT_MP_SAFE	0
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: if_scx.c,v 1.31 2021/12/21 11:07:51 nisimura Exp $");
+__KERNEL_RCSID(0, "$NetBSD: if_scx.c,v 1.32 2021/12/21 12:12:52 nisimura Exp $");
 
 #include 
 #include 
@@ -163,12 +163,13 @@ struct rdes {
 #define  DESCNF_CHRST	(1U<<30)	/* channel reset */
 #define  DESCNF_TMR	(1U<<4)		/* coalesce timer mode select */
 #define  DESCNF_LE	(1)		/* little endian desc format */
-#define TXCOLMAX	0x410		/* tx intr coalesce upper bound */
-#define RXCOLMAX	0x454		/* rx intr coalesce upper bound */
+#define TXSUBMIT	0x410		/* submit loaded tx frame */
+#define TXCLSCMAX	0x418		/* tx intr coalesce upper bound */
+#define RXCLSCMAX	0x458		/* rx intr coalesce upper bound */
 #define TXITIMER	0x420		/* coalesce timer usec, MSB to use */
 #define RXITIMER	0x460		/* coalesce timer usec, MSB to use */
-#define TXDONECNT	0x424		/* tx completed count, auto-zero */
-#define RXDONECNT	0x458		/* rx available count, auto-zero */
+#define TXDONECNT	0x414		/* tx completed count, auto-zero */
+#define RXDONECNT	0x454		/* rx available count, auto-zero */
 #define UCODE_H2M	0x210		/* host2media engine ucode port */
 #define UCODE_M2H	0x21c		/* media2host engine ucode port */
 #define CORESTAT	0x218		/* engine run state */
@@ -1117,8 +1118,8 @@ scx_init(struct ifnet *ifp)
 	CSR_WRITE(sc, RXIE_CLR, ~0);	/* clear Rx interrupt enable */
 	CSR_WRITE(sc, TXIE_CLR, ~0);	/* clear Tx interrupt enable */
 
-	CSR_WRITE(sc, RXCOLMAX, 8);	/* Rx coalesce upper bound */
-	CSR_WRITE(sc, TXCOLMAX, 8);	/* Tx coalesce upper bound */
+	CSR_WRITE(sc, RXCLSCMAX, 8);	/* Rx coalesce upper bound */
+	CSR_WRITE(sc, TXCLSCMAX, 8);	/* Tx coalesce upper bound */
 	CSR_WRITE(sc, RXITIMER, 500);	/* Rx co. timer usec */
 	CSR_WRITE(sc, TXITIMER, 500);	/* Tx co. timer usec */
 
@@ -1408,8 +1409,8 @@ scx_start(struct ifnet *ifp)
 		SCX_CDTXSYNC(sc, sc->sc_txnext, dmamap->dm_nsegs,
 		BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
 
-		/* Tell DMA start transmit */
-		mac_write(sc, GMACTPD, 1);
+		/* submit one frame to xmit */
+		CSR_WRITE(sc, TXSUBMIT, 1);
 
 		txs->txs_mbuf = m0;
 		txs->txs_firstdesc = sc->sc_txnext;



CVS commit: src/sys/arch/arm/sociox

2021-12-21 Thread Tohru Nishimura
Module Name:src
Committed By:   nisimura
Date:   Tue Dec 21 12:12:52 UTC 2021

Modified Files:
src/sys/arch/arm/sociox: if_scx.c

Log Message:
correct register definition error and improve naming


To generate a diff of this commit:
cvs rdiff -u -r1.31 -r1.32 src/sys/arch/arm/sociox/if_scx.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.



CVS commit: src/sys/arch/arm/sociox

2021-12-21 Thread Tohru Nishimura
Module Name:src
Committed By:   nisimura
Date:   Tue Dec 21 11:07:51 UTC 2021

Modified Files:
src/sys/arch/arm/sociox: if_scx.c

Log Message:
add interrupt logic stuff


To generate a diff of this commit:
cvs rdiff -u -r1.30 -r1.31 src/sys/arch/arm/sociox/if_scx.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/arm/sociox/if_scx.c
diff -u src/sys/arch/arm/sociox/if_scx.c:1.30 src/sys/arch/arm/sociox/if_scx.c:1.31
--- src/sys/arch/arm/sociox/if_scx.c:1.30	Mon Dec 20 06:47:24 2021
+++ src/sys/arch/arm/sociox/if_scx.c	Tue Dec 21 11:07:51 2021
@@ -1,4 +1,4 @@
-/*	$NetBSD: if_scx.c,v 1.30 2021/12/20 06:47:24 nisimura Exp $	*/
+/*	$NetBSD: if_scx.c,v 1.31 2021/12/21 11:07:51 nisimura Exp $	*/
 
 /*-
  * Copyright (c) 2020 The NetBSD Foundation, Inc.
@@ -46,7 +46,7 @@
 #define NOT_MP_SAFE	0
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: if_scx.c,v 1.30 2021/12/20 06:47:24 nisimura Exp $");
+__KERNEL_RCSID(0, "$NetBSD: if_scx.c,v 1.31 2021/12/21 11:07:51 nisimura Exp $");
 
 #include 
 #include 
@@ -129,28 +129,29 @@ struct rdes {
 #define xINTSR		0x200		/* aggregated interrupt status */
 #define  IRQ_RX		(1U<<1)		/* top level Rx interrupt */
 #define  IRQ_TX		(1U<<0)		/* top level Rx interrupt */
-#define  IRQ_UCODE	(1U<<20)	/* ucode load completed */
+#define  IRQ_UCODE	(1U<<20)	/* ucode load completed; W1C */
 #define xINTAEN		0x204		/* INT_A enable */
 #define xINTAE_SET	0x234		/* bit to set */
 #define xINTAE_CLR	0x238		/* bit to clr */
 #define xINTBEN		0x23c		/* INT_B enable */
 #define xINTBE_SET	0x240		/* bit to set */
 #define xINTBE_CLR	0x244		/* bit to clr */
-#define TXISR		0x400		/* transmit status */
+#define TXISR		0x400		/* transmit status; W1C */
 #define TXIEN		0x404		/* tx interrupt enable */
 #define TXIE_SET	0x428		/* bit to set */
 #define TXIE_CLR	0x42c		/* bit to clr */
-#define  TXI_NTOWNR	(1U<<17)	/* ready desc got empty */
+#define  TXI_NTOWNR	(1U<<17)	/* ??? desc array got empty */
 #define  TXI_TR_ERR	(1U<<16)	/* tx error */
 #define  TXI_TXDONE	(1U<<15)	/* tx completed */
 #define  TXI_TMREXP	(1U<<14)	/* coalesce timer expired */
-#define RXISR		0x440		/* receive status */
+#define RXISR		0x440		/* receive status; W1C */
 #define RXIEN		0x444		/* rx interrupt enable */
 #define RXIE_SET	0x468		/* bit to set */
 #define RXIE_CLR	0x46c		/* bit to clr */
 #define  RXI_RC_ERR	(1U<<16)	/* rx error */
 #define  RXI_PKTCNT	(1U<<15)	/* rx counter has new value */
 #define  RXI_TMREXP	(1U<<14)	/* coalesce timer expired */
+/* 13 sets of special purpose desc interrupt handling register exist */
 #define TDBA_LO		0x408		/* tdes array base addr 31:0 */
 #define TDBA_HI		0x434		/* tdes array base addr 63:32 */
 #define RDBA_LO		0x448		/* rdes array base addr 31:0 */
@@ -459,7 +460,6 @@ struct scx_softc {
 	int sc_flowflags;		/* 802.3x PAUSE flow control */
 	uint32_t sc_mdclk;		/* GAR 5:2 clock selection */
 	uint32_t sc_t0cotso;		/* T0_CSUM | T0_TSO to run */
-	int sc_ucodeloaded;		/* ucode for H2M/M2H/PKT */
 	int sc_100mii;			/* 1 for RMII/MII, 0 for RGMII */
 	int sc_phandle;			/* fdt phandle */
 	uint64_t sc_freq;
@@ -603,7 +603,7 @@ static int
 mac_read(struct scx_softc *sc, int reg)
 {
 
-	CSR_WRITE(sc, MACCMD, reg);
+	CSR_WRITE(sc, MACCMD, reg | CMD_BUSY);
 	(void)WAIT_FOR_CLR(sc, MACCMD, CMD_BUSY, 0);
 	return CSR_READ(sc, MACDATA);
 }
@@ -613,10 +613,11 @@ mac_write(struct scx_softc *sc, int reg,
 {
 
 	CSR_WRITE(sc, MACDATA, val);
-	CSR_WRITE(sc, MACCMD, reg | CMD_IOWR);
+	CSR_WRITE(sc, MACCMD, reg | CMD_IOWR | CMD_BUSY);
 	(void)WAIT_FOR_CLR(sc, MACCMD, CMD_BUSY, 0);
 }
 
+/* dig and decode "clock-frequency" value for a given clkname */
 static int
 get_clk_freq(int phandle, const char *clkname)
 {
@@ -671,7 +672,6 @@ scx_fdt_attach(device_t parent, device_t
 	struct scx_softc * const sc = device_private(self);
 	struct fdt_attach_args * const faa = aux;
 	const int phandle = faa->faa_phandle;
-	bus_space_tag_t bst = faa->faa_bst;
 	bus_space_handle_t bsh;
 	bus_space_handle_t eebsh;
 	bus_addr_t addr[2];
@@ -683,7 +683,7 @@ scx_fdt_attach(device_t parent, device_t
 	long ref_clk;
 
 	aprint_naive("\n");
-	aprint_normal(": Gigabit Ethernet Controller\n");
+	aprint_normal(": Socionext Gigabit Ethernet controller\n");
 
 	if (fdtbus_get_reg(phandle, 0, addr+0, size+0) != 0
 	|| bus_space_map(faa->faa_bst, addr[0], size[0], 0, ) != 0) {
@@ -707,7 +707,7 @@ scx_fdt_attach(device_t parent, device_t
 	}
 
 	sc->sc_dev = self;
-	sc->sc_st = bst;
+	sc->sc_st = faa->faa_bst;
 	sc->sc_sh = bsh;
 	sc->sc_sz = size[0];
 	sc->sc_eesh = eebsh;
@@ -754,7 +754,6 @@ scx_acpi_attach(device_t parent, device_
 	struct scx_softc * const sc = device_private(self);
 	struct acpi_attach_args * const aa = aux;
 	ACPI_HANDLE handle = aa->aa_node->ad_handle;
-	bus_space_tag_t bst = aa->aa_memt;
 	bus_space_handle_t bsh, eebsh;
 	struct acpi_resources res;
 	struct acpi_mem *mem;
@@ -763,7 

CVS commit: src/sys/arch/arm/sociox

2021-12-21 Thread Tohru Nishimura
Module Name:src
Committed By:   nisimura
Date:   Tue Dec 21 11:07:51 UTC 2021

Modified Files:
src/sys/arch/arm/sociox: if_scx.c

Log Message:
add interrupt logic stuff


To generate a diff of this commit:
cvs rdiff -u -r1.30 -r1.31 src/sys/arch/arm/sociox/if_scx.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.



CVS commit: src/sys/arch/arm/sociox

2021-12-20 Thread Tohru Nishimura
Module Name:src
Committed By:   nisimura
Date:   Tue Dec 21 06:00:45 UTC 2021

Modified Files:
src/sys/arch/arm/sociox: sni_emmc.c sni_gpio.c sni_i2c.c

Log Message:
improve consistency when attach error cases.


To generate a diff of this commit:
cvs rdiff -u -r1.9 -r1.10 src/sys/arch/arm/sociox/sni_emmc.c
cvs rdiff -u -r1.11 -r1.12 src/sys/arch/arm/sociox/sni_gpio.c
cvs rdiff -u -r1.12 -r1.13 src/sys/arch/arm/sociox/sni_i2c.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/arm/sociox/sni_emmc.c
diff -u src/sys/arch/arm/sociox/sni_emmc.c:1.9 src/sys/arch/arm/sociox/sni_emmc.c:1.10
--- src/sys/arch/arm/sociox/sni_emmc.c:1.9	Wed Nov 10 17:23:46 2021
+++ src/sys/arch/arm/sociox/sni_emmc.c	Tue Dec 21 06:00:45 2021
@@ -1,4 +1,4 @@
-/*	$NetBSD: sni_emmc.c,v 1.9 2021/11/10 17:23:46 msaitoh Exp $	*/
+/*	$NetBSD: sni_emmc.c,v 1.10 2021/12/21 06:00:45 nisimura Exp $	*/
 
 /*-
  * Copyright (c) 2020 The NetBSD Foundation, Inc.
@@ -34,7 +34,7 @@
  */
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: sni_emmc.c,v 1.9 2021/11/10 17:23:46 msaitoh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: sni_emmc.c,v 1.10 2021/12/21 06:00:45 nisimura Exp $");
 
 #include 
 #include 
@@ -87,6 +87,10 @@ static const struct device_compatible_en
 	{ .compat = "fujitsu,mb86s70-sdhci-3.0" },
 	DEVICE_COMPAT_EOL
 };
+static const struct device_compatible_entry compatible[] = {
+	{ .compat = "SCX0002" },
+	DEVICE_COMPAT_EOL
+};
 
 static int
 sniemmc_fdt_match(device_t parent, struct cfdata *match, void *aux)
@@ -107,13 +111,16 @@ sniemmc_fdt_attach(device_t parent, devi
 	bus_size_t size;
 	char intrstr[128];
 
+	aprint_naive("\n");
+	aprint_normal_dev(self, "Socionext eMMC controller\n");
+
 	if (fdtbus_get_reg(phandle, 0, , ) != 0
 	|| bus_space_map(faa->faa_bst, addr, size, 0, ) != 0) {
-		aprint_error(": unable to map device\n");
+		aprint_error_dev(self, "unable to map device\n");
 		return;
 	}
 	if (!fdtbus_intr_str(phandle, 0, intrstr, sizeof(intrstr))) {
-		aprint_error(": failed to decode interrupt\n");
+		aprint_error_dev(self, "failed to decode interrupt\n");
 		goto fail;
 	}
 	sc->sc_ih = fdtbus_intr_establish(phandle, 0, IPL_SDMMC, 0,
@@ -123,19 +130,16 @@ sniemmc_fdt_attach(device_t parent, devi
 		intrstr);
 		goto fail;
 	}
-
-	aprint_naive("\n");
-	aprint_normal_dev(self, "Socionext eMMC controller\n");
 	aprint_normal_dev(self, "interrupting on %s\n", intrstr);
 
 	sc->sc.sc_dev = self;
 	sc->sc.sc_dmat = faa->faa_dmat;
 	sc->sc.sc_host = sc->sc_hosts;
-	sc->sc_phandle = phandle;
 	sc->sc_iot = faa->faa_bst;
 	sc->sc_ioh = ioh;
 	sc->sc_iob = addr;
 	sc->sc_ios = size;
+	sc->sc_phandle = phandle;
 
 	config_defer(self, sniemmc_attach_i);
 	return;
@@ -147,15 +151,9 @@ sniemmc_fdt_attach(device_t parent, devi
 static int
 sniemmc_acpi_match(device_t parent, struct cfdata *match, void *aux)
 {
-	static const char * compatible[] = {
-		"SCX0002",
-		NULL
-	};
 	struct acpi_attach_args *aa = aux;
 
-	if (aa->aa_node->ad_type != ACPI_TYPE_DEVICE)
-		return 0;
-	return acpi_match_hid(aa->aa_node->ad_devinfo, compatible);
+	return acpi_compatible_match(aa, compatible);
 }
 
 static void
@@ -163,12 +161,16 @@ sniemmc_acpi_attach(device_t parent, dev
 {
 	struct sniemmc_softc * const sc = device_private(self);
 	struct acpi_attach_args *aa = aux;
+	ACPI_HANDLE handle = aa->aa_node->ad_handle;
 	bus_space_handle_t ioh;
 	struct acpi_resources res;
 	struct acpi_mem *mem;
 	struct acpi_irq *irq;
 	ACPI_STATUS rv;
 
+	aprint_naive("\n");
+	aprint_normal(": Socionext eMMC controller\n");
+
 	rv = acpi_resource_parse(self, aa->aa_node->ad_handle, "_CRS",
 	, _resource_parse_ops_default);
 	if (ACPI_FAILURE(rv))
@@ -176,31 +178,28 @@ sniemmc_acpi_attach(device_t parent, dev
 	mem = acpi_res_mem(, 0);
 	irq = acpi_res_irq(, 0);
 	if (mem == NULL || irq == NULL || mem->ar_length == 0) {
-		aprint_error(": incomplete resources\n");
+		aprint_error_dev(self, "incomplete resources\n");
 		return;
 	}
 	if (bus_space_map(aa->aa_memt, mem->ar_base, mem->ar_length, 0,
 	)) {
-		aprint_error(": couldn't map registers\n");
+		aprint_error_dev(self, "couldn't map registers\n");
 		return;
 	}
-	sc->sc_ih = acpi_intr_establish(self,
-	(uint64_t)(uintptr_t)aa->aa_node->ad_handle,
+	sc->sc_ih = acpi_intr_establish(self, (uint64_t)handle,
 	IPL_BIO, false, sdhc_intr, >sc, device_xname(self));
 	if (sc->sc_ih == NULL) {
 		aprint_error_dev(self, "couldn't establish interrupt\n");
 		goto fail;
 	}
 
-	aprint_naive("\n");
-	aprint_normal_dev(self, "Socionext eMMC controller\n");
-
 	sc->sc.sc_dev = self;
 	sc->sc.sc_dmat = aa->aa_dmat;
 	sc->sc.sc_host = sc->sc_hosts;
 	sc->sc_iot = aa->aa_memt;
 	sc->sc_ioh = ioh;
 	sc->sc_ios = mem->ar_length;
+	sc->sc_phandle = 0;
 
 	config_defer(self, sniemmc_attach_i);
 
@@ -228,7 +227,8 @@ sniemmc_attach_i(device_t self)
 #endif
 	error = 0;
 	if (error) {
-		aprint_error_dev(self, 

CVS commit: src/sys/arch/arm/sociox

2021-12-20 Thread Tohru Nishimura
Module Name:src
Committed By:   nisimura
Date:   Tue Dec 21 06:00:45 UTC 2021

Modified Files:
src/sys/arch/arm/sociox: sni_emmc.c sni_gpio.c sni_i2c.c

Log Message:
improve consistency when attach error cases.


To generate a diff of this commit:
cvs rdiff -u -r1.9 -r1.10 src/sys/arch/arm/sociox/sni_emmc.c
cvs rdiff -u -r1.11 -r1.12 src/sys/arch/arm/sociox/sni_gpio.c
cvs rdiff -u -r1.12 -r1.13 src/sys/arch/arm/sociox/sni_i2c.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.



CVS commit: src/sys/arch/arm/sociox

2021-12-19 Thread Tohru Nishimura
Module Name:src
Committed By:   nisimura
Date:   Mon Dec 20 06:47:25 UTC 2021

Modified Files:
src/sys/arch/arm/sociox: if_scx.c

Log Message:
- iron out attach error case messages
- use 64-bit paddr bus_dma_tag
- dig and decode FDT "clock-frequency" value


To generate a diff of this commit:
cvs rdiff -u -r1.29 -r1.30 src/sys/arch/arm/sociox/if_scx.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/arm/sociox/if_scx.c
diff -u src/sys/arch/arm/sociox/if_scx.c:1.29 src/sys/arch/arm/sociox/if_scx.c:1.30
--- src/sys/arch/arm/sociox/if_scx.c:1.29	Mon Dec 20 02:24:33 2021
+++ src/sys/arch/arm/sociox/if_scx.c	Mon Dec 20 06:47:24 2021
@@ -1,4 +1,4 @@
-/*	$NetBSD: if_scx.c,v 1.29 2021/12/20 02:24:33 nisimura Exp $	*/
+/*	$NetBSD: if_scx.c,v 1.30 2021/12/20 06:47:24 nisimura Exp $	*/
 
 /*-
  * Copyright (c) 2020 The NetBSD Foundation, Inc.
@@ -46,7 +46,7 @@
 #define NOT_MP_SAFE	0
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: if_scx.c,v 1.29 2021/12/20 02:24:33 nisimura Exp $");
+__KERNEL_RCSID(0, "$NetBSD: if_scx.c,v 1.30 2021/12/20 06:47:24 nisimura Exp $");
 
 #include 
 #include 
@@ -449,7 +449,6 @@ struct scx_softc {
 	bus_space_handle_t sc_eesh;	/* eeprom section handle */
 	bus_size_t sc_eesz;		/* eeprom map size */
 	bus_dma_tag_t sc_dmat;		/* bus DMA tag */
-	bus_dma_tag_t sc_dmat32;
 	struct ethercom sc_ethercom;	/* Ethernet common data */
 	struct mii_data sc_mii;		/* MII */
 	callout_t sc_callout;		/* PHY monitor callout */
@@ -618,6 +617,37 @@ mac_write(struct scx_softc *sc, int reg,
 	(void)WAIT_FOR_CLR(sc, MACCMD, CMD_BUSY, 0);
 }
 
+static int
+get_clk_freq(int phandle, const char *clkname)
+{
+	u_int index, n, cells;
+	const u_int *p;
+	int err, len, resid;
+	unsigned int freq = 0;
+
+	err = fdtbus_get_index(phandle, "clock-names", clkname, );
+	if (err == -1)
+		return -1;
+	p = fdtbus_get_prop(phandle, "clocks", );
+	if (p == NULL)
+		return -1;
+	for (n = 0, resid = len; resid > 0; n++) {
+		const int cc_phandle =
+		fdtbus_get_phandle_from_native(be32toh(p[0]));
+		if (of_getprop_uint32(cc_phandle, "#clock-cells", ))
+			return -1;
+		if (n == index) {
+			if (of_getprop_uint32(cc_phandle,
+			"clock-frequency", ))
+return -1;
+			return freq;
+		}
+		resid -= (cells + 1) * 4;
+		p += (cells + 1) * 4;
+	}
+	return -1;
+}
+
 static const struct device_compatible_entry compat_data[] = {
 	{ .compat = "socionext,synquacer-netsec" },
 	DEVICE_COMPAT_EOL
@@ -647,15 +677,21 @@ scx_fdt_attach(device_t parent, device_t
 	bus_addr_t addr[2];
 	bus_size_t size[2];
 	char intrstr[128];
-	const char *phy_mode;
+	int phy_phandle;
+	bus_addr_t phy_id;
+	const char *phy_type;
+	long ref_clk;
+
+	aprint_naive("\n");
+	aprint_normal(": Gigabit Ethernet Controller\n");
 
 	if (fdtbus_get_reg(phandle, 0, addr+0, size+0) != 0
 	|| bus_space_map(faa->faa_bst, addr[0], size[0], 0, ) != 0) {
-		aprint_error(": unable to map device csr\n");
+		aprint_error_dev(self, "unable to map device csr\n");
 		return;
 	}
 	if (!fdtbus_intr_str(phandle, 0, intrstr, sizeof(intrstr))) {
-		aprint_error(": failed to decode interrupt\n");
+		aprint_error_dev(self, "failed to decode interrupt\n");
 		goto fail;
 	}
 	sc->sc_ih = fdtbus_intr_establish(phandle, 0, IPL_NET,
@@ -666,14 +702,10 @@ scx_fdt_attach(device_t parent, device_t
 	}
 	if (fdtbus_get_reg(phandle, 1, addr+1, size+1) != 0
 	|| bus_space_map(faa->faa_bst, addr[1], size[1], 0, ) != 0) {
-		aprint_error(": unable to map device eeprom\n");
+		aprint_error_dev(self, "unable to map device eeprom\n");
 		goto fail;
 	}
 
-	aprint_naive("\n");
-	/* aprint_normal(": Gigabit Ethernet Controller\n"); */
-	aprint_normal_dev(self, "interrupt on %s\n", intrstr);
-
 	sc->sc_dev = self;
 	sc->sc_st = bst;
 	sc->sc_sh = bsh;
@@ -681,13 +713,22 @@ scx_fdt_attach(device_t parent, device_t
 	sc->sc_eesh = eebsh;
 	sc->sc_eesz = size[1];
 	sc->sc_dmat = faa->faa_dmat;
-	sc->sc_dmat32 = faa->faa_dmat; /* XXX */
 	sc->sc_phandle = phandle;
 
-	phy_mode = fdtbus_get_string(phandle, "phy-mode");
-	if (phy_mode == NULL)
-		aprint_error(": missing 'phy-mode' property\n");
-	sc->sc_100mii = (phy_mode  && strcmp(phy_mode, "rgmii") != 0);
+	phy_type = fdtbus_get_string(phandle, "phy-mode");
+	if (phy_type == NULL)
+		aprint_error_dev(self, "missing 'phy-mode' property\n");
+	phy_phandle = fdtbus_get_phandle(phandle, "phy-handle");	
+	if (phy_phandle == -1
+	|| fdtbus_get_reg(phy_phandle, 0, _id, NULL) != 0)
+		phy_id = MII_PHY_ANY;
+	ref_clk = get_clk_freq(phandle, "phy_ref_clk");
+	if (ref_clk == -1)
+		ref_clk = 250 * 1000 * 1000;
+
+	sc->sc_100mii = (phy_type && strncmp(phy_type, "rgmii", 5) != 0);
+	sc->sc_phy_id = phy_id;
+	sc->sc_freq = ref_clk;
 
 	scx_attach_i(sc);
 	return;
@@ -718,23 +759,26 @@ scx_acpi_attach(device_t parent, device_
 	struct acpi_resources res;
 	struct acpi_mem *mem;
 	struct acpi_irq *irq;
-	char *phy_mode;
-	ACPI_INTEGER 

CVS commit: src/sys/arch/arm/sociox

2021-12-19 Thread Tohru Nishimura
Module Name:src
Committed By:   nisimura
Date:   Mon Dec 20 06:47:25 UTC 2021

Modified Files:
src/sys/arch/arm/sociox: if_scx.c

Log Message:
- iron out attach error case messages
- use 64-bit paddr bus_dma_tag
- dig and decode FDT "clock-frequency" value


To generate a diff of this commit:
cvs rdiff -u -r1.29 -r1.30 src/sys/arch/arm/sociox/if_scx.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.



CVS commit: src/sys/arch/arm/sociox

2021-12-19 Thread Tohru Nishimura
Module Name:src
Committed By:   nisimura
Date:   Mon Dec 20 02:24:33 UTC 2021

Modified Files:
src/sys/arch/arm/sociox: if_scx.c

Log Message:
development snapshot; endianness and others.


To generate a diff of this commit:
cvs rdiff -u -r1.28 -r1.29 src/sys/arch/arm/sociox/if_scx.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/arm/sociox/if_scx.c
diff -u src/sys/arch/arm/sociox/if_scx.c:1.28 src/sys/arch/arm/sociox/if_scx.c:1.29
--- src/sys/arch/arm/sociox/if_scx.c:1.28	Mon Dec 20 02:23:04 2021
+++ src/sys/arch/arm/sociox/if_scx.c	Mon Dec 20 02:24:33 2021
@@ -1,4 +1,4 @@
-/*	$NetBSD: if_scx.c,v 1.28 2021/12/20 02:23:04 nisimura Exp $	*/
+/*	$NetBSD: if_scx.c,v 1.29 2021/12/20 02:24:33 nisimura Exp $	*/
 
 /*-
  * Copyright (c) 2020 The NetBSD Foundation, Inc.
@@ -46,7 +46,7 @@
 #define NOT_MP_SAFE	0
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: if_scx.c,v 1.28 2021/12/20 02:23:04 nisimura Exp $");
+__KERNEL_RCSID(0, "$NetBSD: if_scx.c,v 1.29 2021/12/20 02:24:33 nisimura Exp $");
 
 #include 
 #include 
@@ -482,8 +482,8 @@ struct scx_softc {
 	int sc_rxptr;			/* next ready Rx descriptor/descsoft */
 
 	krndsource_t rnd_source;	/* random source */
-#ifdef GMAC_EVENT_COUNTER
-	/* 80 event counter exist */
+#ifdef GMAC_EVENT_COUNTERS
+	/* 80 event counters exist */
 #endif
 };
 
@@ -524,11 +524,11 @@ do {	\
 	struct mbuf *__m = __rxs->rxs_mbuf;\
 	bus_addr_t __paddr =__rxs->rxs_dmamap->dm_segs[0].ds_addr;	\
 	__m->m_data = __m->m_ext.ext_buf;\
-	__rxd->r3 = __rxs->rxs_dmamap->dm_segs[0].ds_len;		\
+	__rxd->r3 = htole32(__rxs->rxs_dmamap->dm_segs[0].ds_len);	\
 	__rxd->r2 = htole32(BUS_ADDR_LO32(__paddr));			\
 	__rxd->r1 = htole32(BUS_ADDR_HI32(__paddr));			\
-	__rxd->r0 = R0_OWN | R0_FS | R0_LS;\
-	if ((x) == MD_NRXDESC - 1) __rxd->r0 |= R0_EOD;			\
+	__rxd->r0 = htole32(R0_OWN | R0_FS | R0_LS);			\
+	if ((x) == MD_NRXDESC - 1) __rxd->r0 |= htole32(R0_EOD);	\
 } while (/*CONSTCOND*/0)
 
 /* memory mapped CSR register access */
@@ -1334,20 +1334,20 @@ scx_start(struct ifnet *ifp)
 			 * yet.	 That could cause a race condition.
 			 * We'll do it below.
 			 */
-			tdes->t3 = dmamap->dm_segs[seg].ds_len;
+			tdes->t3 = htole32(dmamap->dm_segs[seg].ds_len);
 			tdes->t2 = htole32(BUS_ADDR_LO32(paddr));
 			tdes->t1 = htole32(BUS_ADDR_HI32(paddr));
-			tdes->t0 = tdes0 | (tdes->t0 & T0_EOD) |
+			tdes->t0 = htole32(tdes0 | (tdes->t0 & T0_EOD) |
 	(15 << T0_TDRID) | T0_PT |
-	sc->sc_t0cotso | T0_TRS;
+	sc->sc_t0cotso | T0_TRS);
 			tdes0 = T0_OWN; /* 2nd and other segments */
 			/* NB; t0 DRID field contains zero */
 			lasttx = nexttx;
 		}
 
 		/* Write deferred 1st segment T0_OWN at the final stage */
-		sc->sc_txdescs[lasttx].t0 |= T0_LS;
-		sc->sc_txdescs[sc->sc_txnext].t0 |= (T0_FS | T0_OWN);
+		sc->sc_txdescs[lasttx].t0 |= htole32(T0_LS);
+		sc->sc_txdescs[sc->sc_txnext].t0 |= htole32(T0_FS | T0_OWN);
 		SCX_CDTXSYNC(sc, sc->sc_txnext, dmamap->dm_nsegs,
 		BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
 
@@ -1468,7 +1468,7 @@ rxintr(struct scx_softc *sc)
 		SCX_CDRXSYNC(sc, i,
 		BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE);
 
-		rxstat = sc->sc_rxdescs[i].r0;
+		rxstat = le32toh(sc->sc_rxdescs[i].r0);
 		if (rxstat & R0_OWN) /* desc is left empty */
 			break;
 
@@ -1569,16 +1569,19 @@ mii_statchg(struct ifnet *ifp)
 
 	/* decode MIISR register value */
 	miisr = mac_read(sc, GMACMIISR);
-	spd = Mbps[(miisr >> 1) & 03];
+	spd = Mbps[(miisr & MIISR_SPD) >> 1];
 #if 1
-	printf("MII link status (0x%x) %s",
-	miisr, (miisr & 8) ? "up" : "down");
-	if (miisr & 8) {
-		printf(" spd%d", spd);
-		if (miisr & 01)
-			printf(",full-duplex");
+	static uint32_t oldmiisr = 0;
+	if (miisr != oldmiisr) {
+		printf("MII link status (0x%x) %s",
+		miisr, (miisr & MIISR_LUP) ? "up" : "down");
+		if (miisr & MIISR_LUP) {
+			printf(" spd%d", spd);
+			if (miisr & MIISR_FDX)
+printf(",full-duplex");
+		}
+		printf("\n");
 	}
-	printf("\n");
 #endif
 	/* Get flow control negotiation result. */
 	if (IFM_SUBTYPE(mii->mii_media.ifm_cur->ifm_media) == IFM_AUTO &&
@@ -1601,7 +1604,7 @@ mii_statchg(struct ifnet *ifp)
 	/* Adjust duplexity and PAUSE flow control. */
 	mcr &= ~MCR_USEFDX;
 	fcr = mac_read(sc, GMACFCR) & ~(FCR_TFE | FCR_RFE);
-	if (miisr & 01) {
+	if (miisr & MIISR_FDX) {
 		if (sc->sc_flowflags & IFM_ETH_TXPAUSE)
 			fcr |= FCR_TFE;
 		if (sc->sc_flowflags & IFM_ETH_RXPAUSE)
@@ -1611,8 +1614,14 @@ mii_statchg(struct ifnet *ifp)
 	mac_write(sc, GMACMCR, mcr);
 	mac_write(sc, GMACFCR, fcr);
 
-printf("%ctxfe, %crxfe\n",
- (fcr & FCR_TFE) ? '+' : '-', (fcr & FCR_RFE) ? '+' : '-');
+#if 1
+	if (miisr != oldmiisr) {
+		printf("%ctxfe, %crxfe\n",
+		(fcr & FCR_TFE) ? '+' : '-',
+		(fcr & FCR_RFE) ? '+' : '-');
+	}
+	oldmiisr = miisr;
+#endif
 }
 
 static void
@@ -1680,6 +1689,7 @@ phy_tick(void *arg)
 	mii_tick(mii);
 	splx(s);
 #ifdef 

CVS commit: src/sys/arch/arm/sociox

2021-12-19 Thread Tohru Nishimura
Module Name:src
Committed By:   nisimura
Date:   Mon Dec 20 02:24:33 UTC 2021

Modified Files:
src/sys/arch/arm/sociox: if_scx.c

Log Message:
development snapshot; endianness and others.


To generate a diff of this commit:
cvs rdiff -u -r1.28 -r1.29 src/sys/arch/arm/sociox/if_scx.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.



CVS commit: src/sys/arch/arm/sociox

2021-12-19 Thread Tohru Nishimura
Module Name:src
Committed By:   nisimura
Date:   Mon Dec 20 02:23:04 UTC 2021

Modified Files:
src/sys/arch/arm/sociox: if_scx.c

Log Message:
fix and improve register definitions


To generate a diff of this commit:
cvs rdiff -u -r1.27 -r1.28 src/sys/arch/arm/sociox/if_scx.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/arm/sociox/if_scx.c
diff -u src/sys/arch/arm/sociox/if_scx.c:1.27 src/sys/arch/arm/sociox/if_scx.c:1.28
--- src/sys/arch/arm/sociox/if_scx.c:1.27	Thu Dec 16 11:36:25 2021
+++ src/sys/arch/arm/sociox/if_scx.c	Mon Dec 20 02:23:04 2021
@@ -1,4 +1,4 @@
-/*	$NetBSD: if_scx.c,v 1.27 2021/12/16 11:36:25 nisimura Exp $	*/
+/*	$NetBSD: if_scx.c,v 1.28 2021/12/20 02:23:04 nisimura Exp $	*/
 
 /*-
  * Copyright (c) 2020 The NetBSD Foundation, Inc.
@@ -46,7 +46,7 @@
 #define NOT_MP_SAFE	0
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: if_scx.c,v 1.27 2021/12/16 11:36:25 nisimura Exp $");
+__KERNEL_RCSID(0, "$NetBSD: if_scx.c,v 1.28 2021/12/20 02:23:04 nisimura Exp $");
 
 #include 
 #include 
@@ -126,7 +126,7 @@ struct rdes {
 #define  RPTHDCOMP	(1U<<2)		/* log HD imcomplete condition */
 #define  RPTHDERR	(1U<<1)		/* log HD error */
 #define  DROPNOMATCH	(1U<<0)		/* drop no match frames */
-#define xINTSR		0x200		/* aggregated interrupt status report */
+#define xINTSR		0x200		/* aggregated interrupt status */
 #define  IRQ_RX		(1U<<1)		/* top level Rx interrupt */
 #define  IRQ_TX		(1U<<0)		/* top level Rx interrupt */
 #define  IRQ_UCODE	(1U<<20)	/* ucode load completed */
@@ -144,18 +144,18 @@ struct rdes {
 #define  TXI_TR_ERR	(1U<<16)	/* tx error */
 #define  TXI_TXDONE	(1U<<15)	/* tx completed */
 #define  TXI_TMREXP	(1U<<14)	/* coalesce timer expired */
-#define RXISR		0x440		/* receipt status */
+#define RXISR		0x440		/* receive status */
 #define RXIEN		0x444		/* rx interrupt enable */
 #define RXIE_SET	0x468		/* bit to set */
 #define RXIE_CLR	0x46c		/* bit to clr */
 #define  RXI_RC_ERR	(1U<<16)	/* rx error */
-#define  RXI_PKTCNT	(1U<<15)	/* rx counter has new value report */
+#define  RXI_PKTCNT	(1U<<15)	/* rx counter has new value */
 #define  RXI_TMREXP	(1U<<14)	/* coalesce timer expired */
 #define TDBA_LO		0x408		/* tdes array base addr 31:0 */
 #define TDBA_HI		0x434		/* tdes array base addr 63:32 */
 #define RDBA_LO		0x448		/* rdes array base addr 31:0 */
 #define RDBA_HI		0x474		/* rdes array base addr 63:32 */
-/* 13 pairs of special purpose desc array address registers exit */
+/* 13 pairs of special purpose desc array base address register exist */
 #define TXCONF		0x430
 #define RXCONF		0x470
 #define  DESCNF_UP	(1U<<31)	/* up-and-running */
@@ -166,8 +166,8 @@ struct rdes {
 #define RXCOLMAX	0x454		/* rx intr coalesce upper bound */
 #define TXITIMER	0x420		/* coalesce timer usec, MSB to use */
 #define RXITIMER	0x460		/* coalesce timer usec, MSB to use */
-#define TXDONECNT	0x424		/* tx completion report, auto-clear */
-#define RXDONECNT	0x458		/* rx completion report, auto-clear */
+#define TXDONECNT	0x424		/* tx completed count, auto-zero */
+#define RXDONECNT	0x458		/* rx available count, auto-zero */
 #define UCODE_H2M	0x210		/* host2media engine ucode port */
 #define UCODE_M2H	0x21c		/* media2host engine ucode port */
 #define CORESTAT	0x218		/* engine run state */
@@ -214,15 +214,18 @@ struct rdes {
 #define  MCR_IBN	(1U<<30)	/* ??? */
 #define  MCR_CST	(1U<<25)	/* strip CRC */
 #define  MCR_TC		(1U<<24)	/* keep RGMII PHY notified */
-#define  MCR_JE		(1U<<20)	/* ignore oversized >9018 condition */
+#define  MCR_WD		(1U<<23)	/* allow long >2048 tx frame */
+#define  MCR_JE		(1U<<20)	/* allow ~9018 tx jumbo frame */
 #define  MCR_IFG	(7U<<17)	/* 19:17 IFG value 0~7 */
 #define  MCR_DRCS	(1U<<16)	/* ignore (G)MII HDX Tx error */
 #define  MCR_USEMII	(1U<<15)	/* 1: RMII/MII, 0: RGMII (_PS) */
 #define  MCR_SPD100	(1U<<14)	/* force speed 100 (_FES) */
-#define  MCR_DO		(1U<<13)	/* ??? don't receive my own Tx frames */
+#define  MCR_DO		(1U<<13)	/* don't receive my own HDX Tx frames */
 #define  MCR_LOOP	(1U<<12)	/* run loop back */
 #define  MCR_USEFDX	(1U<<11)	/* force full duplex */
 #define  MCR_IPCEN	(1U<<10)	/* handle checksum */
+#define  MCR_DR		(1U<<9)		/* attempt no tx retry, send once */
+#define  MCR_LUD	(1U<<8)		/* link condition report when RGMII */
 #define  MCR_ACS	(1U<<7)		/* auto pad strip CRC */
 #define  MCR_TE		(1U<<3)		/* run Tx MAC engine, 0 to stop */
 #define  MCR_RE		(1U<<2)		/* run Rx MAC engine, 0 to stop */
@@ -258,12 +261,9 @@ struct rdes {
 /* 31:16 pause timer value, 5:4 pause timer threshold */
 #define  FCR_RFE	(1U<<2)		/* accept PAUSE to throttle Tx */
 #define  FCR_TFE	(1U<<1)		/* generate PAUSE to moderate Rx lvl */
-#define GMACVTAG	0x001c		/* VLAN tag control */
-#define GMACIMPL	0x0020		/* implementation number XX.YY */
-#define GMACLPIS	0x0030		/* ??? AXI LPI control */
-#define GMACLPIC	0x0034		/* ??? AXI LPI 

CVS commit: src/sys/arch/arm/sociox

2021-12-19 Thread Tohru Nishimura
Module Name:src
Committed By:   nisimura
Date:   Mon Dec 20 02:23:04 UTC 2021

Modified Files:
src/sys/arch/arm/sociox: if_scx.c

Log Message:
fix and improve register definitions


To generate a diff of this commit:
cvs rdiff -u -r1.27 -r1.28 src/sys/arch/arm/sociox/if_scx.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.



CVS commit: src/sys/arch/arm/sociox

2021-12-16 Thread Tohru Nishimura
Module Name:src
Committed By:   nisimura
Date:   Thu Dec 16 11:36:26 UTC 2021

Modified Files:
src/sys/arch/arm/sociox: if_scx.c

Log Message:
interlim commit to snapshot SC2A11 GbE progress.


To generate a diff of this commit:
cvs rdiff -u -r1.26 -r1.27 src/sys/arch/arm/sociox/if_scx.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/arm/sociox/if_scx.c
diff -u src/sys/arch/arm/sociox/if_scx.c:1.26 src/sys/arch/arm/sociox/if_scx.c:1.27
--- src/sys/arch/arm/sociox/if_scx.c:1.26	Thu Dec 16 11:32:22 2021
+++ src/sys/arch/arm/sociox/if_scx.c	Thu Dec 16 11:36:25 2021
@@ -1,4 +1,4 @@
-/*	$NetBSD: if_scx.c,v 1.26 2021/12/16 11:32:22 nisimura Exp $	*/
+/*	$NetBSD: if_scx.c,v 1.27 2021/12/16 11:36:25 nisimura Exp $	*/
 
 /*-
  * Copyright (c) 2020 The NetBSD Foundation, Inc.
@@ -46,7 +46,7 @@
 #define NOT_MP_SAFE	0
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: if_scx.c,v 1.26 2021/12/16 11:32:22 nisimura Exp $");
+__KERNEL_RCSID(0, "$NetBSD: if_scx.c,v 1.27 2021/12/16 11:36:25 nisimura Exp $");
 
 #include 
 #include 
@@ -408,7 +408,7 @@ struct scx_softc {
 	int sc_phy_id;			/* PHY address */
 	int sc_flowflags;		/* 802.3x PAUSE flow control */
 	uint32_t sc_mdclk;		/* GAR 5:2 clock selection */
-	uint32_t sc_t0coso;		/* T0_CSUM | T0_SGOL to run */
+	uint32_t sc_t0cotso;		/* T0_CSUM | T0_TSO to run */
 	int sc_ucodeloaded;		/* ucode for H2M/M2H/PKT */
 	int sc_100mii;			/* 1 for RMII/MII, 0 for RGMII */
 	int sc_phandle;			/* fdt phandle */
@@ -431,6 +431,9 @@ struct scx_softc {
 	int sc_rxptr;			/* next ready Rx descriptor/descsoft */
 
 	krndsource_t rnd_source;	/* random source */
+#ifdef GMAC_EVENT_COUNTER
+	/* 80 event counter exist */
+#endif
 };
 
 #define SCX_CDTXADDR(sc, x)	((sc)->sc_cddma + SCX_CDTXOFF((x)))
@@ -477,6 +480,16 @@ do {	\
 	if ((x) == MD_NRXDESC - 1) __rxd->r0 |= R0_EOD;			\
 } while (/*CONSTCOND*/0)
 
+/* memory mapped CSR register access */
+#define CSR_READ(sc,off) \
+	bus_space_read_4((sc)->sc_st, (sc)->sc_sh, (off))
+#define CSR_WRITE(sc,off,val) \
+	bus_space_write_4((sc)->sc_st, (sc)->sc_sh, (off), (val))
+
+/* flash memory access */
+#define EE_READ(sc,off) \
+	bus_space_read_4((sc)->sc_st, (sc)->sc_eesh, (off))
+
 static int scx_fdt_match(device_t, cfdata_t, void *);
 static void scx_fdt_attach(device_t, device_t, void *);
 static int scx_acpi_match(device_t, cfdata_t, void *);
@@ -558,6 +571,10 @@ static const struct device_compatible_en
 	{ .compat = "socionext,synquacer-netsec" },
 	DEVICE_COMPAT_EOL
 };
+static const struct device_compatible_entry compatible[] = {
+	{ .compat = "SCX0001" },
+	DEVICE_COMPAT_EOL
+};
 
 static int
 scx_fdt_match(device_t parent, cfdata_t cf, void *aux)
@@ -634,15 +651,9 @@ scx_fdt_attach(device_t parent, device_t
 static int
 scx_acpi_match(device_t parent, cfdata_t cf, void *aux)
 {
-	static const char * compatible[] = {
-		"SCX0001",
-		NULL
-	};
 	struct acpi_attach_args *aa = aux;
 
-	if (aa->aa_node->ad_type != ACPI_TYPE_DEVICE)
-		return 0;
-	return acpi_match_hid(aa->aa_node->ad_devinfo, compatible);
+	return acpi_compatible_match(aa, compatible);
 }
 
 static void
@@ -660,6 +671,7 @@ scx_acpi_attach(device_t parent, device_
 	ACPI_INTEGER acpi_phy, acpi_freq;
 	ACPI_STATUS rv;
 
+aprint_normal(": Gigabit Ethernet Controller\n");
 	rv = acpi_resource_parse(self, handle, "_CRS",
 	, _resource_parse_ops_default);
 	if (ACPI_FAILURE(rv))
@@ -713,7 +725,7 @@ scx_acpi_attach(device_t parent, device_
 	sc->sc_sh = bsh;
 	sc->sc_eesh = eebsh;
 	sc->sc_dmat = aa->aa_dmat64;
-	sc->sc_dmat32 = aa->aa_dmat;	/* descriptor needs dma32 */
+	sc->sc_dmat32 = aa->aa_dmat;
 
 aprint_normal_dev(self,
 "phy mode %s, phy id %d, freq %ld\n", phy_mode, (int)acpi_phy, acpi_freq);
@@ -742,18 +754,19 @@ scx_attach_i(struct scx_softc *sc)
 	struct ifnet * const ifp = >sc_ethercom.ec_if;
 	struct mii_data * const mii = >sc_mii;
 	struct ifmedia * const ifm = >mii_media;
-	uint32_t hwver, dwimp, dwfea;
+	uint32_t which, dwimp, dwfea;
 	uint8_t enaddr[ETHER_ADDR_LEN];
 	bus_dma_segment_t seg;
 	uint32_t csr;
 	int i, nseg, error = 0;
 
-	hwver = CSR_READ(sc, HWVER);	/* Socionext version */
-	dwimp = mac_read(sc, GMACIMPL);	/* DW EMAC XX.YY */
-	dwfea = mac_read(sc, HWFEA);	/* DW feature */
+	which = CSR_READ(sc, HWVER);	/* Socionext version 5.00xx */
+	dwimp = mac_read(sc, GMACIMPL);	/* DWC EMAC XX.YY */
+	dwfea = mac_read(sc, HWFEA);	/* DWC feature */
 	aprint_normal_dev(sc->sc_dev,
-	"Socionext NetSec GbE %d.%d (impl 0x%x, feature 0x%x)\n",
-	hwver >> 16, hwver & 0x,
+	"Socionext NetSec GbE %x.%x"
+	" (impl 0x%x, feature 0x%x)\n",
+	which >> 16, which & 0x,
 	dwimp, dwfea);
 
 	/* fetch MAC address in flash. stored in big endian order */
@@ -762,14 +775,13 @@ scx_attach_i(struct scx_softc *sc)
 	enaddr[1] = csr >> 16;
 	enaddr[2] = csr >> 8;
 	enaddr[3] = csr;
-	csr = bus_space_read_4(sc->sc_st, 

CVS commit: src/sys/arch/arm/sociox

2021-12-16 Thread Tohru Nishimura
Module Name:src
Committed By:   nisimura
Date:   Thu Dec 16 11:36:26 UTC 2021

Modified Files:
src/sys/arch/arm/sociox: if_scx.c

Log Message:
interlim commit to snapshot SC2A11 GbE progress.


To generate a diff of this commit:
cvs rdiff -u -r1.26 -r1.27 src/sys/arch/arm/sociox/if_scx.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.



CVS commit: src/sys/arch/arm/sociox

2021-12-16 Thread Tohru Nishimura
Module Name:src
Committed By:   nisimura
Date:   Thu Dec 16 11:32:23 UTC 2021

Modified Files:
src/sys/arch/arm/sociox: if_scx.c

Log Message:
improve SC2A11 hardware register description.


To generate a diff of this commit:
cvs rdiff -u -r1.25 -r1.26 src/sys/arch/arm/sociox/if_scx.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/arm/sociox/if_scx.c
diff -u src/sys/arch/arm/sociox/if_scx.c:1.25 src/sys/arch/arm/sociox/if_scx.c:1.26
--- src/sys/arch/arm/sociox/if_scx.c:1.25	Mon Aug  2 12:56:22 2021
+++ src/sys/arch/arm/sociox/if_scx.c	Thu Dec 16 11:32:22 2021
@@ -1,4 +1,4 @@
-/*	$NetBSD: if_scx.c,v 1.25 2021/08/02 12:56:22 andvar Exp $	*/
+/*	$NetBSD: if_scx.c,v 1.26 2021/12/16 11:32:22 nisimura Exp $	*/
 
 /*-
  * Copyright (c) 2020 The NetBSD Foundation, Inc.
@@ -46,7 +46,7 @@
 #define NOT_MP_SAFE	0
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: if_scx.c,v 1.25 2021/08/02 12:56:22 andvar Exp $");
+__KERNEL_RCSID(0, "$NetBSD: if_scx.c,v 1.26 2021/12/16 11:32:22 nisimura Exp $");
 
 #include 
 #include 
@@ -73,7 +73,7 @@ __KERNEL_RCSID(0, "$NetBSD: if_scx.c,v 1
 #include 
 #include 
 
-/* Socionext SC2A11 descriptor format */
+/* SC2A11 GbE 64-bit paddr descriptor */
 struct tdes {
 	uint32_t t0, t1, t2, t3;
 };
@@ -84,103 +84,131 @@ struct rdes {
 
 #define T0_OWN		(1U<<31)	/* desc is ready to Tx */
 #define T0_EOD		(1U<<30)	/* end of descriptor array */
-#define T0_DRID		(24)		/* 29:24 D-RID */
-#define T0_PT		(1U<<21)	/* 23:21 PT */
-#define T0_TRID		(16)		/* 20:16 T-RID */
+#define T0_DRID		(24)		/* 29:24 desc ring id */
+#define T0_PT		(1U<<21)	/* 23:21 "pass-through" */
+#define T0_TDRID	(16)		/* 20:16 target desc ring id: GMAC=15 */
 #define T0_FS		(1U<<9)		/* first segment of frame */
 #define T0_LS		(1U<<8)		/* last segment of frame */
 #define T0_CSUM		(1U<<7)		/* enable check sum offload */
-#define T0_SGOL		(1U<<6)		/* enable TCP segment offload */
-#define T0_TRS		(1U<<4)		/* 5:4 TRS */
-#define T0_IOC		(0)		/* XXX TBD interrupt when completed */
-/* T1 segment address 63:32 */
-/* T2 segment address 31:0 */
-/* T3 31:16 TCP segment length, 15:0 segment length to transmit */
+#define T0_TSO		(1U<<6)		/* enable TCP segment offload */
+#define T0_TRS		(1U<<4)		/* 5:4 "TRS" */
+/* T1 frame segment address 63:32 */
+/* T2 frame segment address 31:0 */
+/* T3 31:16 TCP segment length, 15:0 frame segment length to transmit */
 
 #define R0_OWN		(1U<<31)	/* desc is empty */
 #define R0_EOD		(1U<<30)	/* end of descriptor array */
-#define R0_SRID		(24)		/* 29:24 S-RID */
-#define R0_FR		(1U<<23)	/* FR */
+#define R0_SDRID	(24)		/* 29:24 source desc ring id */
+#define R0_FR		(1U<<23)	/* found fragmented */
 #define R0_ER		(1U<<21)	/* Rx error indication */
 #define R0_ERR		(3U<<16)	/* 18:16 receive error code */
-#define R0_TDRID	(14)		/* 15:14 TD-RID */
+#define R0_TDRID	(12)		/* 15:12 target desc ring id */
 #define R0_FS		(1U<<9)		/* first segment of frame */
 #define R0_LS		(1U<<8)		/* last segment of frame */
 #define R0_CSUM		(3U<<6)		/* 7:6 checksum status */
-#define R0_CERR		(2U<<6)		/* 0 (undone), 1 (found ok), 2 (bad) */
+#define R0_CERR		(2U<<6)		/* 0: undone, 1: found ok, 2: bad */
 /* R1 frame address 63:32 */
 /* R2 frame address 31:0 */
 /* R3 31:16 received frame length, 15:0 buffer length to receive */
 
 /*
- * SC2A11 NetSec registers. 0x100 - 1204
+ * SC2A11 registers. 0x100 - 1204
  */
 #define SWRESET		0x104
+#define  SRST_RUN	(1U<<31)	/* instruct start, 0 to stop */
 #define COMINIT		0x120
+#define  INIT_DB	(1U<<2)		/* ???; self clear when done */
+#define  INIT_CLS	(1U<<1)		/* ???; self clear when done */
+#define PKTCTRL		0x140		/* pkt engine control */
+#define  MODENRM	(1U<<28)	/* change mode to normal */
+#define  ENJUMBO	(1U<<27)	/* allow jumbo frame */
+#define  RPTCSUMERR	(1U<<3)		/* log Rx checksum error */
+#define  RPTHDCOMP	(1U<<2)		/* log HD imcomplete condition */
+#define  RPTHDERR	(1U<<1)		/* log HD error */
+#define  DROPNOMATCH	(1U<<0)		/* drop no match frames */
 #define xINTSR		0x200		/* aggregated interrupt status report */
 #define  IRQ_RX		(1U<<1)		/* top level Rx interrupt */
 #define  IRQ_TX		(1U<<0)		/* top level Rx interrupt */
+#define  IRQ_UCODE	(1U<<20)	/* ucode load completed */
 #define xINTAEN		0x204		/* INT_A enable */
-#define xINTA_SET	0x234		/* bit to set */
-#define xINTA_CLR	0x238		/* bit to clr */
+#define xINTAE_SET	0x234		/* bit to set */
+#define xINTAE_CLR	0x238		/* bit to clr */
 #define xINTBEN		0x23c		/* INT_B enable */
-#define xINTB_SET	0x240		/* bit to set */
-#define xINTB_CLR	0x244		/* bit to clr */
-/* 0x00c - 048 */			/* pkt,tls,s0,s1 SR/IE/SET/CLR */
-#define TXISR		0x400
-#define TXIEN		0x404
-#define TXI_SET		0x428
-#define TXI_CLR		0x42c
-#define  TXI_NTOWNR	(1U<<17)
-#define  TXI_TR_ERR	(1U<<16)
-#define  TXI_TXDONE	(1U<<15)
-#define  TXI_TMREXP	(1U<<14)
-#define RXISR		0x440
-#define RXIEN		0x444

CVS commit: src/sys/arch/arm/sociox

2021-12-16 Thread Tohru Nishimura
Module Name:src
Committed By:   nisimura
Date:   Thu Dec 16 11:32:23 UTC 2021

Modified Files:
src/sys/arch/arm/sociox: if_scx.c

Log Message:
improve SC2A11 hardware register description.


To generate a diff of this commit:
cvs rdiff -u -r1.25 -r1.26 src/sys/arch/arm/sociox/if_scx.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.



CVS commit: src/sys/arch/arm/sociox

2021-12-02 Thread Tohru Nishimura
Module Name:src
Committed By:   nisimura
Date:   Fri Dec  3 05:28:33 UTC 2021

Removed Files:
src/sys/arch/arm/sociox: sni_exiu.c

Log Message:
retire sni_exiu.c in favour of ACPI0013 generic event divice to
respond power button press.


To generate a diff of this commit:
cvs rdiff -u -r1.5 -r0 src/sys/arch/arm/sociox/sni_exiu.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.



CVS commit: src/sys/arch/arm/sociox

2021-12-02 Thread Tohru Nishimura
Module Name:src
Committed By:   nisimura
Date:   Fri Dec  3 05:28:33 UTC 2021

Removed Files:
src/sys/arch/arm/sociox: sni_exiu.c

Log Message:
retire sni_exiu.c in favour of ACPI0013 generic event divice to
respond power button press.


To generate a diff of this commit:
cvs rdiff -u -r1.5 -r0 src/sys/arch/arm/sociox/sni_exiu.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.



CVS commit: src/sys/arch/arm/sociox

2021-12-02 Thread Tohru Nishimura
Module Name:src
Committed By:   nisimura
Date:   Fri Dec  3 05:21:52 UTC 2021

Modified Files:
src/sys/arch/arm/sociox: files.sociox

Log Message:
retire sni_exiu.c in favour of ACPI0013 generic event device implemented
by dev/acpi/acpi_ged.c


To generate a diff of this commit:
cvs rdiff -u -r1.9 -r1.10 src/sys/arch/arm/sociox/files.sociox

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/arm/sociox/files.sociox
diff -u src/sys/arch/arm/sociox/files.sociox:1.9 src/sys/arch/arm/sociox/files.sociox:1.10
--- src/sys/arch/arm/sociox/files.sociox:1.9	Thu Mar 19 22:17:45 2020
+++ src/sys/arch/arm/sociox/files.sociox	Fri Dec  3 05:21:52 2021
@@ -1,6 +1,6 @@
-#	$NetBSD: files.sociox,v 1.9 2020/03/19 22:17:45 nisimura Exp $
+#	$NetBSD: files.sociox,v 1.10 2021/12/03 05:21:52 nisimura Exp $
 #
-# Configuration info for Socionext Unifier/SC2A11
+# Configuration info for Socionext SC2A11
 #
 #
 
@@ -32,9 +32,3 @@ device	snigpio: gpiobus
 attach	snigpio at acpinodebus with snigpio_acpi
 attach	snigpio at fdt with snigpio_fdt
 file	arch/arm/sociox/sni_gpio.c		snigpio
-
-# Socionext EXIU external interrupt controller unit
-device	sniexiu
-attach	sniexiu at acpinodebus with sniexitu_acpi
-attach	sniexiu at fdt with sniexiu_fdt
-file	arch/arm/sociox/sni_exiu.c		sniexiu



CVS commit: src/sys/arch/arm/sociox

2021-12-02 Thread Tohru Nishimura
Module Name:src
Committed By:   nisimura
Date:   Fri Dec  3 05:21:52 UTC 2021

Modified Files:
src/sys/arch/arm/sociox: files.sociox

Log Message:
retire sni_exiu.c in favour of ACPI0013 generic event device implemented
by dev/acpi/acpi_ged.c


To generate a diff of this commit:
cvs rdiff -u -r1.9 -r1.10 src/sys/arch/arm/sociox/files.sociox

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.



CVS commit: src/sys/dev/usb

2021-07-15 Thread Tohru Nishimura
Module Name:src
Committed By:   nisimura
Date:   Thu Jul 15 15:23:46 UTC 2021

Modified Files:
src/sys/dev/usb: if_mue.c

Log Message:
back out the previous accidental commit


To generate a diff of this commit:
cvs rdiff -u -r1.61 -r1.62 src/sys/dev/usb/if_mue.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/dev/usb/if_mue.c
diff -u src/sys/dev/usb/if_mue.c:1.61 src/sys/dev/usb/if_mue.c:1.62
--- src/sys/dev/usb/if_mue.c:1.61	Thu Jul 15 03:25:50 2021
+++ src/sys/dev/usb/if_mue.c	Thu Jul 15 15:23:46 2021
@@ -1,4 +1,4 @@
-/*	$NetBSD: if_mue.c,v 1.61 2021/07/15 03:25:50 nisimura Exp $	*/
+/*	$NetBSD: if_mue.c,v 1.62 2021/07/15 15:23:46 nisimura Exp $	*/
 /*	$OpenBSD: if_mue.c,v 1.3 2018/08/04 16:42:46 jsg Exp $	*/
 
 /*
@@ -20,7 +20,7 @@
 /* Driver for Microchip LAN7500/LAN7800 chipsets. */
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: if_mue.c,v 1.61 2021/07/15 03:25:50 nisimura Exp $");
+__KERNEL_RCSID(0, "$NetBSD: if_mue.c,v 1.62 2021/07/15 15:23:46 nisimura Exp $");
 
 #ifdef _KERNEL_OPT
 #include "opt_usb.h"
@@ -98,7 +98,7 @@ static void	mue_setmtu_locked(struct usb
 static void	mue_reset(struct usbnet *);
 
 static void	mue_uno_stop(struct ifnet *, int);
-static int	mue_uno_override_ioctl(struct ifnet *, u_long, void *);
+static int	mue_uno_ioctl(struct ifnet *, u_long, void *);
 static int	mue_uno_mii_read_reg(struct usbnet *, int, int, uint16_t *);
 static int	mue_uno_mii_write_reg(struct usbnet *, int, int, uint16_t);
 static void	mue_uno_mii_statchg(struct ifnet *);
@@ -110,7 +110,7 @@ static int	mue_uno_init(struct ifnet *);
 
 static const struct usbnet_ops mue_ops = {
 	.uno_stop = mue_uno_stop,
-	.uno_override_ioctl = mue_uno_override_ioctl,
+	.uno_ioctl = mue_uno_ioctl,
 	.uno_read_reg = mue_uno_mii_read_reg,
 	.uno_write_reg = mue_uno_mii_write_reg,
 	.uno_statchg = mue_uno_mii_statchg,
@@ -137,14 +137,7 @@ static const struct usbnet_ops mue_ops =
 #define ETHER_IS_ZERO(addr) \
 	(!(addr[0] | addr[1] | addr[2] | addr[3] | addr[4] | addr[5]))
 
-struct mue_softc {
-	struct usbnet	   sc_un;
-	struct usbnet_intr sc_intr;
-	uint8_t sc_ibuf[8];
-	unsigned sc_flowflags;		/* 802.3x PAUSE flow control */
-};
-
-CFATTACH_DECL_NEW(mue, sizeof(struct mue_softc), mue_match, mue_attach,
+CFATTACH_DECL_NEW(mue, sizeof(struct usbnet), mue_match, mue_attach,
 usbnet_detach, usbnet_activate);
 
 static uint32_t
@@ -767,15 +760,14 @@ static void
 mue_attach(device_t parent, device_t self, void *aux)
 {
 	USBNET_MII_DECL_DEFAULT(unm);
+	struct usbnet * const un = device_private(self);
 	prop_dictionary_t dict = device_properties(self);
-	struct mue_softc * const sc = device_private(self);
 	struct usb_attach_arg *uaa = aux;
 	struct usbd_device *dev = uaa->uaa_device;
-	struct usbnet *un = >sc_un;
 	usb_interface_descriptor_t *id;
 	usb_endpoint_descriptor_t *ed;
-	usbd_status err;
 	char *devinfop;
+	usbd_status err;
 	const char *descr;
 	uint32_t id_rev;
 	uint8_t i;
@@ -790,7 +782,7 @@ mue_attach(device_t parent, device_t sel
 
 	un->un_dev = self;
 	un->un_udev = dev;
-	un->un_sc = sc; /* @@! */
+	un->un_sc = un;
 	un->un_ops = _ops;
 	un->un_rx_xfer_flags = USBD_SHORT_XFER_OK;
 	un->un_tx_xfer_flags = USBD_FORCE_SHORT_XFER;
@@ -892,8 +884,6 @@ mue_attach(device_t parent, device_t sel
 	ec->ec_capabilities = ETHERCAP_VLAN_MTU | ETHERCAP_JUMBO_MTU;
 #endif
 
-	unm.un_mii_phyloc = un->un_phyno;	/* use internal PHY 1 */
-	unm.un_mii_flags |= MIIF_DOPAUSE;	/* use PAUSE cap. */
 	usbnet_attach_ifp(un, IFF_SIMPLEX | IFF_BROADCAST | IFF_MULTICAST,
 	0, );
 }
@@ -1007,93 +997,90 @@ mue_setiff_locked(struct usbnet *un)
 {
 	struct ethercom *ec = usbnet_ec(un);
 	struct ifnet * const ifp = usbnet_ifp(un);
-	struct ether_multistep step;
+	const uint8_t *enaddr = CLLADDR(ifp->if_sadl);
 	struct ether_multi *enm;
-	uint32_t mchash[MUE_DP_SEL_VHF_HASH_LEN];
-	uint32_t rfe, rxfilt, crc, hireg, loreg;
+	struct ether_multistep step;
+	uint32_t pfiltbl[MUE_NUM_ADDR_FILTX][2];
+	uint32_t hashtbl[MUE_DP_SEL_VHF_HASH_LEN];
+	uint32_t reg, rxfilt, h, hireg, loreg;
 	size_t i;
 
 	if (usbnet_isdying(un))
 		return;
 
-	for (i = 1; i < MUE_NUM_ADDR_FILTX; i++) {
-		hireg = (un->un_flags & LAN7500)
-		? MUE_7500_ADDR_FILTX(i) : MUE_7800_ADDR_FILTX(i);
-		mue_csr_write(un, hireg, 0);
-	}
-	memset(mchash, 0, sizeof(mchash));
+	/* Clear perfect filter and hash tables. */
+	memset(pfiltbl, 0, sizeof(pfiltbl));
+	memset(hashtbl, 0, sizeof(hashtbl));
 
-	rfe = (un->un_flags & LAN7500) ? MUE_7500_RFE_CTL : MUE_7800_RFE_CTL;
-	rxfilt = mue_csr_read(un, rfe);
-	rxfilt &= ~(MUE_RFE_CTL_MULTICAST_HASH |
+	reg = (un->un_flags & LAN7500) ? MUE_7500_RFE_CTL : MUE_7800_RFE_CTL;
+	rxfilt = mue_csr_read(un, reg);
+	rxfilt &= ~(MUE_RFE_CTL_PERFECT | MUE_RFE_CTL_MULTICAST_HASH |
 	MUE_RFE_CTL_UNICAST | MUE_RFE_CTL_MULTICAST);
 
-	ETHER_LOCK(ec);
+	/* Always accept broadcast frames. */
+	rxfilt |= MUE_RFE_CTL_BROADCAST;
+
 

CVS commit: src/sys/dev/usb

2021-07-15 Thread Tohru Nishimura
Module Name:src
Committed By:   nisimura
Date:   Thu Jul 15 15:23:46 UTC 2021

Modified Files:
src/sys/dev/usb: if_mue.c

Log Message:
back out the previous accidental commit


To generate a diff of this commit:
cvs rdiff -u -r1.61 -r1.62 src/sys/dev/usb/if_mue.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.



CVS commit: src/sys/dev/usb

2021-07-14 Thread Tohru Nishimura
Module Name:src
Committed By:   nisimura
Date:   Thu Jul 15 03:25:50 UTC 2021

Modified Files:
src/sys/dev/usb: if_mue.c uchcom.c

Log Message:
explanation typo


To generate a diff of this commit:
cvs rdiff -u -r1.60 -r1.61 src/sys/dev/usb/if_mue.c
cvs rdiff -u -r1.38 -r1.39 src/sys/dev/usb/uchcom.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/dev/usb/if_mue.c
diff -u src/sys/dev/usb/if_mue.c:1.60 src/sys/dev/usb/if_mue.c:1.61
--- src/sys/dev/usb/if_mue.c:1.60	Sat Jun 27 13:33:26 2020
+++ src/sys/dev/usb/if_mue.c	Thu Jul 15 03:25:50 2021
@@ -1,4 +1,4 @@
-/*	$NetBSD: if_mue.c,v 1.60 2020/06/27 13:33:26 jmcneill Exp $	*/
+/*	$NetBSD: if_mue.c,v 1.61 2021/07/15 03:25:50 nisimura Exp $	*/
 /*	$OpenBSD: if_mue.c,v 1.3 2018/08/04 16:42:46 jsg Exp $	*/
 
 /*
@@ -20,7 +20,7 @@
 /* Driver for Microchip LAN7500/LAN7800 chipsets. */
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: if_mue.c,v 1.60 2020/06/27 13:33:26 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: if_mue.c,v 1.61 2021/07/15 03:25:50 nisimura Exp $");
 
 #ifdef _KERNEL_OPT
 #include "opt_usb.h"
@@ -98,7 +98,7 @@ static void	mue_setmtu_locked(struct usb
 static void	mue_reset(struct usbnet *);
 
 static void	mue_uno_stop(struct ifnet *, int);
-static int	mue_uno_ioctl(struct ifnet *, u_long, void *);
+static int	mue_uno_override_ioctl(struct ifnet *, u_long, void *);
 static int	mue_uno_mii_read_reg(struct usbnet *, int, int, uint16_t *);
 static int	mue_uno_mii_write_reg(struct usbnet *, int, int, uint16_t);
 static void	mue_uno_mii_statchg(struct ifnet *);
@@ -110,7 +110,7 @@ static int	mue_uno_init(struct ifnet *);
 
 static const struct usbnet_ops mue_ops = {
 	.uno_stop = mue_uno_stop,
-	.uno_ioctl = mue_uno_ioctl,
+	.uno_override_ioctl = mue_uno_override_ioctl,
 	.uno_read_reg = mue_uno_mii_read_reg,
 	.uno_write_reg = mue_uno_mii_write_reg,
 	.uno_statchg = mue_uno_mii_statchg,
@@ -137,7 +137,14 @@ static const struct usbnet_ops mue_ops =
 #define ETHER_IS_ZERO(addr) \
 	(!(addr[0] | addr[1] | addr[2] | addr[3] | addr[4] | addr[5]))
 
-CFATTACH_DECL_NEW(mue, sizeof(struct usbnet), mue_match, mue_attach,
+struct mue_softc {
+	struct usbnet	   sc_un;
+	struct usbnet_intr sc_intr;
+	uint8_t sc_ibuf[8];
+	unsigned sc_flowflags;		/* 802.3x PAUSE flow control */
+};
+
+CFATTACH_DECL_NEW(mue, sizeof(struct mue_softc), mue_match, mue_attach,
 usbnet_detach, usbnet_activate);
 
 static uint32_t
@@ -760,14 +767,15 @@ static void
 mue_attach(device_t parent, device_t self, void *aux)
 {
 	USBNET_MII_DECL_DEFAULT(unm);
-	struct usbnet * const un = device_private(self);
 	prop_dictionary_t dict = device_properties(self);
+	struct mue_softc * const sc = device_private(self);
 	struct usb_attach_arg *uaa = aux;
 	struct usbd_device *dev = uaa->uaa_device;
+	struct usbnet *un = >sc_un;
 	usb_interface_descriptor_t *id;
 	usb_endpoint_descriptor_t *ed;
-	char *devinfop;
 	usbd_status err;
+	char *devinfop;
 	const char *descr;
 	uint32_t id_rev;
 	uint8_t i;
@@ -782,7 +790,7 @@ mue_attach(device_t parent, device_t sel
 
 	un->un_dev = self;
 	un->un_udev = dev;
-	un->un_sc = un;
+	un->un_sc = sc; /* @@! */
 	un->un_ops = _ops;
 	un->un_rx_xfer_flags = USBD_SHORT_XFER_OK;
 	un->un_tx_xfer_flags = USBD_FORCE_SHORT_XFER;
@@ -884,6 +892,8 @@ mue_attach(device_t parent, device_t sel
 	ec->ec_capabilities = ETHERCAP_VLAN_MTU | ETHERCAP_JUMBO_MTU;
 #endif
 
+	unm.un_mii_phyloc = un->un_phyno;	/* use internal PHY 1 */
+	unm.un_mii_flags |= MIIF_DOPAUSE;	/* use PAUSE cap. */
 	usbnet_attach_ifp(un, IFF_SIMPLEX | IFF_BROADCAST | IFF_MULTICAST,
 	0, );
 }
@@ -997,90 +1007,93 @@ mue_setiff_locked(struct usbnet *un)
 {
 	struct ethercom *ec = usbnet_ec(un);
 	struct ifnet * const ifp = usbnet_ifp(un);
-	const uint8_t *enaddr = CLLADDR(ifp->if_sadl);
-	struct ether_multi *enm;
 	struct ether_multistep step;
-	uint32_t pfiltbl[MUE_NUM_ADDR_FILTX][2];
-	uint32_t hashtbl[MUE_DP_SEL_VHF_HASH_LEN];
-	uint32_t reg, rxfilt, h, hireg, loreg;
+	struct ether_multi *enm;
+	uint32_t mchash[MUE_DP_SEL_VHF_HASH_LEN];
+	uint32_t rfe, rxfilt, crc, hireg, loreg;
 	size_t i;
 
 	if (usbnet_isdying(un))
 		return;
 
-	/* Clear perfect filter and hash tables. */
-	memset(pfiltbl, 0, sizeof(pfiltbl));
-	memset(hashtbl, 0, sizeof(hashtbl));
+	for (i = 1; i < MUE_NUM_ADDR_FILTX; i++) {
+		hireg = (un->un_flags & LAN7500)
+		? MUE_7500_ADDR_FILTX(i) : MUE_7800_ADDR_FILTX(i);
+		mue_csr_write(un, hireg, 0);
+	}
+	memset(mchash, 0, sizeof(mchash));
 
-	reg = (un->un_flags & LAN7500) ? MUE_7500_RFE_CTL : MUE_7800_RFE_CTL;
-	rxfilt = mue_csr_read(un, reg);
-	rxfilt &= ~(MUE_RFE_CTL_PERFECT | MUE_RFE_CTL_MULTICAST_HASH |
+	rfe = (un->un_flags & LAN7500) ? MUE_7500_RFE_CTL : MUE_7800_RFE_CTL;
+	rxfilt = mue_csr_read(un, rfe);
+	rxfilt &= ~(MUE_RFE_CTL_MULTICAST_HASH |
 	MUE_RFE_CTL_UNICAST | MUE_RFE_CTL_MULTICAST);
 
-	/* Always accept broadcast frames. */
-	rxfilt |= 

CVS commit: src/sys/dev/usb

2021-07-14 Thread Tohru Nishimura
Module Name:src
Committed By:   nisimura
Date:   Thu Jul 15 03:25:50 UTC 2021

Modified Files:
src/sys/dev/usb: if_mue.c uchcom.c

Log Message:
explanation typo


To generate a diff of this commit:
cvs rdiff -u -r1.60 -r1.61 src/sys/dev/usb/if_mue.c
cvs rdiff -u -r1.38 -r1.39 src/sys/dev/usb/uchcom.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.



CVS commit: src/sys/dev/usb

2021-07-14 Thread Tohru Nishimura
Module Name:src
Committed By:   nisimura
Date:   Wed Jul 14 07:34:16 UTC 2021

Modified Files:
src/sys/dev/usb: uchcom.c

Log Message:
The second REQ_RESET USB request by reset_chip() makes LCR, PRE and DIV
registers to have default values 8N1 and 19200 just as the first req does.
Nuke reset_chip() and rundandant set_dte_rate() to amend.
While here added some narrative about prescale/divisor calculation.


To generate a diff of this commit:
cvs rdiff -u -r1.37 -r1.38 src/sys/dev/usb/uchcom.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/dev/usb/uchcom.c
diff -u src/sys/dev/usb/uchcom.c:1.37 src/sys/dev/usb/uchcom.c:1.38
--- src/sys/dev/usb/uchcom.c:1.37	Sat Apr 24 23:36:59 2021
+++ src/sys/dev/usb/uchcom.c	Wed Jul 14 07:34:16 2021
@@ -1,4 +1,4 @@
-/*	$NetBSD: uchcom.c,v 1.37 2021/04/24 23:36:59 thorpej Exp $	*/
+/*	$NetBSD: uchcom.c,v 1.38 2021/07/14 07:34:16 nisimura Exp $	*/
 
 /*
  * Copyright (c) 2007 The NetBSD Foundation, Inc.
@@ -30,7 +30,7 @@
  */
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: uchcom.c,v 1.37 2021/04/24 23:36:59 thorpej Exp $");
+__KERNEL_RCSID(0, "$NetBSD: uchcom.c,v 1.38 2021/07/14 07:34:16 nisimura Exp $");
 
 #ifdef _KERNEL_OPT
 #include "opt_usb.h"
@@ -118,9 +118,6 @@ int	uchcomdebug = 0;
 #define UCHCOMIBUFSIZE 256
 #define UCHCOMOBUFSIZE 256
 
-#define UCHCOM_RESET_VALUE	0x501F
-#define UCHCOM_RESET_INDEX	0xD90A
-
 struct uchcom_softc
 {
 	device_t		sc_dev;
@@ -155,6 +152,7 @@ struct uchcom_divider
 	uint8_t		dv_div;
 };
 
+/* 0,1,2,3,7 are prescale factors for given 4x 1200 clock formula */
 static const uint32_t rates4x[8] = {
 	[0] = 4 * 1200 / 1024,
 	[1] = 4 * 1200 / 128,
@@ -618,6 +616,24 @@ set_break(struct uchcom_softc *sc, int o
 static int
 calc_divider_settings(struct uchcom_divider *dp, uint32_t rate)
 {
+/*
+ * combined with rates4x[] defined above, this routine generates,
+ *   1200: prescale = 1/0x1, divisor = 178/0xb2
+ *   2400: prescale = 1/0x1, divisor = 217/0xd9
+ *   4800: prescale = 2/0x2, divisor = 100/0x64
+ *   9600: prescale = 2/0x2, divisor = 178/0xb2
+ *  19200: prescale = 2/0x2, divisor = 217/0xd9
+ *  38400: prescale = 3/0x3, divisor = 100/0x64
+ *  57600: prescale = 2/0x2, divisor = 243/0xf3
+ * 115200: prescale = 3/0x3, divisor = 204/0xcc
+ * 921600: prescale = 7/0x7, divisor = 243/0xf3
+ * 50: prescale = 3/0x3, divisor = 244/0xf4
+ * 100: prescale = 3/0x3, divisor = 250/0xfa
+ * 150: prescale = 3/0x3, divisor = 252/0xfc
+ * 200: prescale = 3/0x3, divisor = 253/0xfd
+ * 250: unsupported
+ * 300: prescale = 3/0x3, divisor = 254/0xfe
+ */
 	size_t i;
 	uint32_t best, div, pre;
 	const uint32_t rate4x = rate * 4U;
@@ -652,7 +668,7 @@ calc_divider_settings(struct uchcom_divi
 		return -1;
 
 	dp->dv_prescaler = pre;
-	dp->dv_div = (uint8_t)-div;
+	dp->dv_div = 256 - div;
 
 	return 0;
 }
@@ -740,26 +756,12 @@ clear_chip(struct uchcom_softc *sc)
 		usbd_errstr(err));
 		return EIO;
 	}
-
-	return 0;
-}
-
-static int
-reset_chip(struct uchcom_softc *sc)
-{
-	usbd_status err;
-
-	err = generic_control_out(sc, UCHCOM_REQ_RESET,
-	UCHCOM_RESET_VALUE, UCHCOM_RESET_INDEX);
-	if (err)
-		goto failed;
-
+	/*
+	 * this REQ_RESET call ends up with
+	 * LCR=0xc0 (8N1)
+	 * PRE=0x02, DIV=0xb2 (19200)
+	 */
 	return 0;
-
-failed:
-	printf("%s: cannot reset: %s\n",
-	   device_xname(sc->sc_dev), usbd_errstr(err));
-	return EIO;
 }
 
 static int
@@ -787,14 +789,6 @@ setup_comm(struct uchcom_softc *sc)
 	if (ret)
 		return ret;
 
-	ret = reset_chip(sc);
-	if (ret)
-		return ret;
-
-	ret = set_dte_rate(sc, TTYDEF_SPEED); /* XXX */
-	if (ret)
-		return ret;
-
 	sc->sc_dtr = sc->sc_rts = 1;
 	ret = set_dtrrts(sc, sc->sc_dtr, sc->sc_rts);
 	if (ret)



CVS commit: src/sys/dev/usb

2021-07-14 Thread Tohru Nishimura
Module Name:src
Committed By:   nisimura
Date:   Wed Jul 14 07:34:16 UTC 2021

Modified Files:
src/sys/dev/usb: uchcom.c

Log Message:
The second REQ_RESET USB request by reset_chip() makes LCR, PRE and DIV
registers to have default values 8N1 and 19200 just as the first req does.
Nuke reset_chip() and rundandant set_dte_rate() to amend.
While here added some narrative about prescale/divisor calculation.


To generate a diff of this commit:
cvs rdiff -u -r1.37 -r1.38 src/sys/dev/usb/uchcom.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.



CVS commit: src/sys/arch/arm/sociox

2020-10-09 Thread Tohru Nishimura
Module Name:src
Committed By:   nisimura
Date:   Sat Oct 10 03:29:48 UTC 2020

Modified Files:
src/sys/arch/arm/sociox: if_scx.c

Log Message:
reorder functions for better relevance


To generate a diff of this commit:
cvs rdiff -u -r1.22 -r1.23 src/sys/arch/arm/sociox/if_scx.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/arm/sociox/if_scx.c
diff -u src/sys/arch/arm/sociox/if_scx.c:1.22 src/sys/arch/arm/sociox/if_scx.c:1.23
--- src/sys/arch/arm/sociox/if_scx.c:1.22	Sat Mar 28 13:15:24 2020
+++ src/sys/arch/arm/sociox/if_scx.c	Sat Oct 10 03:29:48 2020
@@ -1,4 +1,4 @@
-/*	$NetBSD: if_scx.c,v 1.22 2020/03/28 13:15:24 nisimura Exp $	*/
+/*	$NetBSD: if_scx.c,v 1.23 2020/10/10 03:29:48 nisimura Exp $	*/
 
 /*-
  * Copyright (c) 2020 The NetBSD Foundation, Inc.
@@ -29,35 +29,24 @@
  * POSSIBILITY OF SUCH DAMAGE.
  */
 
-#define NOT_MP_SAFE	0
 
 /*
  * Socionext SC2A11 SynQuacer NetSec GbE driver
  *
- *   (possibly incorrect notes to be removed eventually)
- * - 32 byte descriptor for 64 bit paddr design.
- * - multiple rings seems available. There are special descriptor fields
- *   to designify ring number from which to arrive or to which go.
- * - memory mapped EEPROM to hold MAC address. The rest of the area is
- *   occupied by a set of ucode for two DMA engines and one packet engine.
- * - The size of frame address filter is 16 plus 16.
- * - The first slot is my own station address. Always enabled to perform
- *   to identify oneself.
- * - 1~15 are for supplimental MAC addresses. Independently enabled for
- *   use. Good to catch multicast. Byte-wise selective match available.
- *   Use the mask to catch { 0x01, 0x00, 0x00 } and/or { 0x33, 0x33 }.
- * - 16~32 might be exact match without byte-mask.
- * - The size of multicast hash filter store is 64 bit.
- * - Socionext/Linaro "NetSec" code contains some constants left unexplained.
- *   Fortunately, Intel/Altera CycloneV PDFs describe every detail of
- *   "such the instance of" DW EMAC IP and most of them are likely applicable
- *   to SC2A11 GbE.
- * - not known "NetSec" instanciates DW timestamp or builds its own.
- * - DW EMAC implmentation (0x20) is known 0x10.36
+ * Multiple Tx and Rx queues exist inside and dedicated descriptor
+ * fields specifies which queue is to use. Three internal micro-processors
+ * to handle incoming frames, outgoing frames and packet data crypto
+ * processing. uP programs are stored in an external flash memory and
+ * have to be loaded by device driver.
+ * NetSec uses Synopsys DesignWare Core EMAC.  DWC implmentation
+ * regiter (0x20) is known to have 0x10.36 and feature register (0x1058)
+ * to report XX.XX.
  */
 
+#define NOT_MP_SAFE	0
+
 #include 
-__KERNEL_RCSID(0, "$NetBSD: if_scx.c,v 1.22 2020/03/28 13:15:24 nisimura Exp $");
+__KERNEL_RCSID(0, "$NetBSD: if_scx.c,v 1.23 2020/10/10 03:29:48 nisimura Exp $");
 
 #include 
 #include 
@@ -84,8 +73,47 @@ __KERNEL_RCSID(0, "$NetBSD: if_scx.c,v 1
 #include 
 #include 
 
+/* Socionext SC2A11 descriptor format */
+struct tdes {
+	uint32_t t0, t1, t2, t3;
+};
+
+struct rdes {
+	uint32_t r0, r1, r2, r3;
+};
+
+#define T0_OWN		(1U<<31)	/* desc is ready to Tx */
+#define T0_EOD		(1U<<30)	/* end of descriptor array */
+#define T0_DRID		(24)		/* 29:24 D-RID */
+#define T0_PT		(1U<<21)	/* 23:21 PT */
+#define T0_TRID		(16)		/* 20:16 T-RID */
+#define T0_FS		(1U<<9)		/* first segment of frame */
+#define T0_LS		(1U<<8)		/* last segment of frame */
+#define T0_CSUM		(1U<<7)		/* enable check sum offload */
+#define T0_SGOL		(1U<<6)		/* enable TCP segment offload */
+#define T0_TRS		(1U<<4)		/* 5:4 TRS */
+#define T0_IOC		(0)		/* XXX TBD interrupt when completed */
+/* T1 segment address 63:32 */
+/* T2 segment address 31:0 */
+/* T3 31:16 TCP segment length, 15:0 segment length to transmit */
+
+#define R0_OWN		(1U<<31)	/* desc is empty */
+#define R0_EOD		(1U<<30)	/* end of descriptor array */
+#define R0_SRID		(24)		/* 29:24 S-RID */
+#define R0_FR		(1U<<23)	/* FR */
+#define R0_ER		(1U<<21)	/* Rx error indication */
+#define R0_ERR		(3U<<16)	/* 18:16 receive error code */
+#define R0_TDRID	(14)		/* 15:14 TD-RID */
+#define R0_FS		(1U<<9)		/* first segment of frame */
+#define R0_LS		(1U<<8)		/* last segment of frame */
+#define R0_CSUM		(3U<<6)		/* 7:6 checksum status */
+#define R0_CERR		(2U<<6)		/* 0 (undone), 1 (found ok), 2 (bad) */
+/* R1 frame address 63:32 */
+/* R2 frame address 31:0 */
+/* R3 31:16 received frame length, 15:0 buffer length to receive */
+
 /*
- * SC2A11 register block 0x100-0x1204?
+ * SC2A11 NetSec registers. 0x100 - 1204
  */
 #define SWRESET		0x104
 #define COMINIT		0x120
@@ -98,7 +126,7 @@ __KERNEL_RCSID(0, "$NetBSD: if_scx.c,v 1
 #define xINTBEN		0x23c		/* INT_B enable */
 #define xINTB_SET	0x240		/* bit to set */
 #define xINTB_CLR	0x244		/* bit to clr */
-/* 0x00c-048 */		/* pkt,tls,s0,s1 SR/IE/SET/CLR */
+/* 0x00c - 048 

CVS commit: src/sys/arch/arm/sociox

2020-10-09 Thread Tohru Nishimura
Module Name:src
Committed By:   nisimura
Date:   Sat Oct 10 03:29:48 UTC 2020

Modified Files:
src/sys/arch/arm/sociox: if_scx.c

Log Message:
reorder functions for better relevance


To generate a diff of this commit:
cvs rdiff -u -r1.22 -r1.23 src/sys/arch/arm/sociox/if_scx.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.



CVS commit: src/sys/dev/ic

2020-10-08 Thread Tohru Nishimura
Module Name:src
Committed By:   nisimura
Date:   Thu Oct  8 21:00:25 UTC 2020

Modified Files:
src/sys/dev/ic: dm9000reg.h

Log Message:
add DM9000A register definitions


To generate a diff of this commit:
cvs rdiff -u -r1.5 -r1.6 src/sys/dev/ic/dm9000reg.h

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/dev/ic/dm9000reg.h
diff -u src/sys/dev/ic/dm9000reg.h:1.5 src/sys/dev/ic/dm9000reg.h:1.6
--- src/sys/dev/ic/dm9000reg.h:1.5	Thu Oct  8 11:29:04 2020
+++ src/sys/dev/ic/dm9000reg.h	Thu Oct  8 21:00:25 2020
@@ -1,4 +1,4 @@
-/*	$NetBSD: dm9000reg.h,v 1.5 2020/10/08 11:29:04 nisimura Exp $	*/
+/*	$NetBSD: dm9000reg.h,v 1.6 2020/10/08 21:00:25 nisimura Exp $	*/
 
 /*
  * Copyright (c) 2009 Paul Fleischer
@@ -167,17 +167,29 @@
 #define DM9000_PID1	0x2B	/* product ID 15:8 */
 #define DM9000_CHIPR	0x2C	/* chip revision */
 
-#define DM9000_SMCR	0x2F	/* "serial mode" control */
+#define DM9000_TCR2	0x2D	/* Tx control 2 */
+#define DM9000_OTCR	0x2E	/* operation test control */
+#define DM9000_SMCR	0x2F	/* special mode control */
 #define  DM9000_FB0	(1<<0)	/* force shortest back-off time */
 #define  DM9000_FB1	(1<<1)	/* force longeset back-off time */
 #define  DM9000_FLC	(1<<2)	/* force late collsion */
 #define  DM9000_SM_EN	(1<<7)	/* serial mode enable */
-#define DM9000_MRCMDX	0xF0	/* "no increment"   read byte */
-#define DM9000_MRCMD	0xF2	/* "auto increment" read byte */
+#define DM9000_ETXCSR	0x30	/* early xmit control and status */
+#define DM9000_TCSCR	0x31	/* xmit checksum control */
+#define DM9000_RCSCSR	0x32	/* recv checksum control and status */
+#define DM9000_MPAR	0x33	/* MII PHY address */
+#define DM9000_LEDCR	0x34	/* LED pin control */
+#define DM9000_BUSCR	0x38	/* processor bus control */
+#define DM9000_INTCR	0x39	/* INT pin control */
+#define DM9000_SCCR	0x50	/* system clock turn on control */
+#define DM9000_RSCCR	0x51	/* resume system clock control */
+#define DM9000_MRCMDX	0xF0	/* "no increment" pre-fetch read */
+#define DM9000_MRCMDX1	0xF1	/* "no increment" read */
+#define DM9000_MRCMD	0xF2	/* "auto increment" read */
 #define DM9000_MRRL	0xF4	/* memory read address 7:0 */
 #define DM9000_MRRH	0xF5	/* memory read address 15:8 */
-#define DM9000_MWCMDX	0xF6	/* "no increment"   write byte */
-#define DM9000_MWCMD	0xF8	/* "auto increment" write byte */
+#define DM9000_MWCMDX	0xF6	/* "no increment" write */
+#define DM9000_MWCMD	0xF8	/* "auto increment" write */
 #define DM9000_MWRL	0xFA	/* memory write address 7:0 */
 #define DM9000_MWRH	0xFB	/* memory write address 15:8 */
 #define DM9000_TXPLL	0xFC	/* frame len 7:0 to transmit */



CVS commit: src/sys/dev/ic

2020-10-08 Thread Tohru Nishimura
Module Name:src
Committed By:   nisimura
Date:   Thu Oct  8 21:00:25 UTC 2020

Modified Files:
src/sys/dev/ic: dm9000reg.h

Log Message:
add DM9000A register definitions


To generate a diff of this commit:
cvs rdiff -u -r1.5 -r1.6 src/sys/dev/ic/dm9000reg.h

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.



CVS commit: src/sys/dev/ic

2020-10-08 Thread Tohru Nishimura
Module Name:src
Committed By:   nisimura
Date:   Thu Oct  8 11:29:05 UTC 2020

Modified Files:
src/sys/dev/ic: dm9000reg.h

Log Message:
improve register descriptions


To generate a diff of this commit:
cvs rdiff -u -r1.4 -r1.5 src/sys/dev/ic/dm9000reg.h

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/dev/ic/dm9000reg.h
diff -u src/sys/dev/ic/dm9000reg.h:1.4 src/sys/dev/ic/dm9000reg.h:1.5
--- src/sys/dev/ic/dm9000reg.h:1.4	Tue Mar 31 02:32:25 2020
+++ src/sys/dev/ic/dm9000reg.h	Thu Oct  8 11:29:04 2020
@@ -1,4 +1,4 @@
-/*	$NetBSD: dm9000reg.h,v 1.4 2020/03/31 02:32:25 nisimura Exp $	*/
+/*	$NetBSD: dm9000reg.h,v 1.5 2020/10/08 11:29:04 nisimura Exp $	*/
 
 /*
  * Copyright (c) 2009 Paul Fleischer
@@ -47,77 +47,92 @@
 
 #define DM9000_IOSIZE 4
 
-#define DM9000_NCR		0x00
+#define DM9000_NCR		0x00	/* "network" control */
 #define  DM9000_NCR_RST		(1<<0)	/* reset chip, self clear */
-#define  DM9000_NCR_LBK_MASK	(0x06)
+#define  DM9000_NCR_LBK_MASK	(0x06)	/* loopback test selection */
 #define  DM9000_NCR_LBK_SHIFT	(1)
-#define  DM9000_NCR_LBK_MAC_INTERNAL (1<1522) */
-#define  DM9000_RCR_WTDIS	(1<<6)	/* disable Rx watchdog timer */
-#define DM9000_RSR		0x06
+#define  DM9000_RCR_DIS_LONG	(1<<5)	/* drop too long frame >1522 */
+#define  DM9000_RCR_WTDIS	(1<<6)	/* disable >2048 Rx detect timer */
+#define DM9000_RSR		0x06	/* Rx status */
 #define  DM9000_RSR_FOE		(1<<0)	/* Rx FIFO overflow detected */
-#define  DM9000_RSR_CE		(1<<1)
-#define  DM9000_RSR_AE		(1<<2)
-#define  DM9000_RSR_PLE		(1<<3)
-#define  DM9000_RSR_RWTO	(1<<4)
-#define  DM9000_RSR_LCS		(1<<5)
+#define  DM9000_RSR_CE		(1<<1)	/* CRC error found */
+#define  DM9000_RSR_AE		(1<<2)	/* tail not ended in byte boundary */
+#define  DM9000_RSR_PLE		(1<<3)	/* physical layer error */
+#define  DM9000_RSR_RWTO	(1<<4)	/* >2048 condition detected */
+#define  DM9000_RSR_LCS		(1<<5)	/* late colli. detected */
 #define  DM9000_RSR_MF		(1<<6)	/* mcast/bcast frame received */
-#define  DM9000_RSR_RF		(1<<7)	/* runt frame received (<64 bytes) */
-#define DM9000_ROCR		0x07
-#define DM9000_BPTR		0x08
-#define DM9000_FCTR		0x09
-#define DM9000_FCR		0x0A
+#define  DM9000_RSR_RF		(1<<7)	/* damaged runt frame received <64 */
+#define DM9000_ROCR		0x07	/* receive overflow counter */
+/* 7: OVF detected, 6:0 statistic couner */
+#define DM9000_BPTR		0x08	/* back pressure threshold */
+/* 7:4 back pressure high watermark (3 def), 3:0 jam pattern time (7 def) */
+#define DM9000_FCTR		0x09	/* flow control threshold */
+/* 7:4 Rx FIFO high w.m. (3 def), low w.m. (8 def) */
+#define DM9000_FCR		0x0A	/* Rx flow control */
 #define  DM9000_FCR_FLCE	(1<<0)	/* flow control enable */
 #define  DM9000_FCR_RXPCS	(1<<1)	/* Rx PAUSE current status */
-#define  DM9000_FCR_RXPS	(1<<2)	/* Rx PAUSE status, read to clear */
-#define  DM9000_FCR_BKPM	(1<<3)
-#define  DM9000_FCR_BKPA	(1<<4)
-#define  DM9000_FCR_TXPEN	(1<<5)	/* force PAUSE/unPAUSE */
-#define  DM9000_FCR_TXPF	(1<<6)	/* Tx PAUSE packet (when full */
+#define  DM9000_FCR_RXPS	(1<<2)	/* Rx PAUSE status, latched R2C */
+#define  DM9000_FCR_BKPM	(1<<3)	/* HDX back pressure for my frames */
+#define  DM9000_FCR_BKPA	(1<<4)	/* HDX back pressure for any frames */
+#define  DM9000_FCR_TXPEN	(1<<5)	/* activate auto PAUSE operation */
+#define  DM9000_FCR_TXPF	(1<<6)	/* Tx PAUSE packet (when full) */
 #define  DM9000_FCR_TXP0	(1<<7)	/* Tx PAUSE packet (when empty) */
-#define DM9000_EPCR		0x0B
+#define DM9000_EPCR		0x0B	/* EEPROM / PHY control */
 #define  DM9000_EPCR_ERRE	(1<<0)	/* operation in progress, busy bit */
-#define  DM9000_EPCR_ERPRW	(1<<1)	/* instruct to write */
-#define  DM9000_EPCR_ERPRR	(1<<2)	/* instruct to read */
-#define  DM9000_EPCR_EPOS_EEPROM (0<<3)	/* 1: PHY op, 0: EEPROM op */
-#define  DM9000_EPCR_EPOS_PHY(1<<3)
-#define  DM9000_EPCR_WEP	(1<<4)
-#define  DM9000_EPCR_REEP	(1<<5)
-#define DM9000_EPAR		0x0C	/* 7:6 (!!) PHY id, 5:0 reg num */
-#define  DM9000_EPAR_EROA_MASK	0x3F	/* bits 0-5 */
+#define  DM9000_EPCR_ERPRW	(1<<1)	/* instruct to write, not SC */
+#define  DM9000_EPCR_ERPRR	(1<<2)	/* instruct to read, not SC */
+#define  DM9000_EPCR_EPOS_EEPROM (0<<3)	/* EEPROM operation */
+#define  DM9000_EPCR_EPOS_PHY(1<<3)	/* PHY operation */
+#define  DM9000_EPCR_WEP	(1<<4)	/* EEPROM write enable */
+#define  DM9000_EPCR_REEP	(1<<5)	/* reload EEPROM contents, not SC */
+#define DM9000_EPAR		0x0C	/* EEPROM / PHY address */
+#define  DM9000_EPAR_EROA_MASK	0x3F	/* 7:6 (!!) PHY id, 5:0 addr/reg */
 #define  DM9000_EPAR_INT_PHY	0x40	/* EPAR[7:6] = 01 for internal PHY */
-#define DM9000_EPDRL		0x0D	/* data 7:0 */
-#define DM9000_EPDRH		0x0E	/* data 15:8 */
-#define DM9000_WCR		0x0F
+#define DM9000_EPDRL		0x0D	/* EEPROM / PHY data 7:0 */
+#define DM9000_EPDRH		0x0E	/* EEPROM / PHY data 15:8 */
+#define DM9000_WCR		0x0F	/* wakeup control and status */
+#define  DM9000_MAGIC		(1<<0)	/* magic 

CVS commit: src/sys/dev/ic

2020-10-08 Thread Tohru Nishimura
Module Name:src
Committed By:   nisimura
Date:   Thu Oct  8 11:29:05 UTC 2020

Modified Files:
src/sys/dev/ic: dm9000reg.h

Log Message:
improve register descriptions


To generate a diff of this commit:
cvs rdiff -u -r1.4 -r1.5 src/sys/dev/ic/dm9000reg.h

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.



CVS commit: src/sys/arch/arm/sociox

2020-09-23 Thread Tohru Nishimura
Module Name:src
Committed By:   nisimura
Date:   Wed Sep 23 23:38:24 UTC 2020

Modified Files:
src/sys/arch/arm/sociox: if_ave.c

Log Message:
note more about AVE EMAC design


To generate a diff of this commit:
cvs rdiff -u -r1.16 -r1.17 src/sys/arch/arm/sociox/if_ave.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/arm/sociox/if_ave.c
diff -u src/sys/arch/arm/sociox/if_ave.c:1.16 src/sys/arch/arm/sociox/if_ave.c:1.17
--- src/sys/arch/arm/sociox/if_ave.c:1.16	Fri Mar 27 13:00:22 2020
+++ src/sys/arch/arm/sociox/if_ave.c	Wed Sep 23 23:38:24 2020
@@ -1,4 +1,4 @@
-/*	$NetBSD: if_ave.c,v 1.16 2020/03/27 13:00:22 nisimura Exp $	*/
+/*	$NetBSD: if_ave.c,v 1.17 2020/09/23 23:38:24 nisimura Exp $	*/
 
 /*-
  * Copyright (c) 2020 The NetBSD Foundation, Inc.
@@ -36,7 +36,7 @@
  */
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: if_ave.c,v 1.16 2020/03/27 13:00:22 nisimura Exp $");
+__KERNEL_RCSID(0, "$NetBSD: if_ave.c,v 1.17 2020/09/23 23:38:24 nisimura Exp $");
 
 #include 
 #include 
@@ -63,6 +63,41 @@ __KERNEL_RCSID(0, "$NetBSD: if_ave.c,v 1
 
 #define NOT_MP_SAFE	(0)
 
+/*
+ * AVE has two different, rather obscure, descriptor formats. 32-bit
+ * paddr descriptor layout occupies 8 bytes while 64-bit paddr descriptor
+ * does 12 bytes. AVE is a derivative of Synopsys DesignWare Core
+ * EMAC.
+ */
+struct tdes {
+	uint32_t t0, t1, t2;
+};
+
+struct rdes {
+	uint32_t r0, r1, r2;
+};
+
+struct tdes32 { uint32_t t0, t1; };
+struct rdes32 { uint32_t r0, r1; };
+
+#define T0_OWN		(1U<<31)	/* desc is ready to Tx */
+#define T0_IOC		(1U<<29)	/* post interrupt on Tx completes */
+#define T0_NOCSUM	(1U<<28)	/* inhibit checksum operation */
+#define T0_DONEOK	(1U<<27)	/* status - Tx completed ok */
+#define T0_FS		(1U<<26)	/* first segment of frame */
+#define T0_LS		(1U<<25)	/* last segment of frame */
+#define T0_OWC		(1U<<21)	/* status - out of win. late coll. */
+#define T0_ECOL		(1U<<20)	/* status - excess collision */
+#define T0_TBS_MASK	0x		/* T0 segment length 15:0 */
+/* T1 segment address 31:0 */
+/* T2 segment address 63:32 */
+#define R0_OWN		(1U<<31)	/* desc is empty */
+#define R0_CSUM		(1U<<21)	/* receive checksum done */
+#define R0_CERR		(1U<<20)	/* csum found negative */
+#define R0_FL_MASK	0x07ff		/* R0 frame length 10:0 */
+/* R1 frame address 31:0 */
+/* R2 frame address 63:32 */
+
 #define AVEID		0x000		/* hardware ID */
 #define AVEHWVER	0x004		/* hardware version */
 #define AVEGR		0x008		/* chip global control */
@@ -107,17 +142,14 @@ __KERNEL_RCSID(0, "$NetBSD: if_ave.c,v 1
 #define  DESCC_RD0	(1U<<3)		/* activate Rx0 descriptor to run */
 #define DESCC_RSTP	(1U<<2)		/* pause Rx descriptor */
 #define  DESCC_TD	(1U<<0)		/* activate Tx descriptor to run */
-	/* 31:16 status report to read */
+/* 31:16 status report to read */
 #define AVETXDES	0x304		/* Tx descriptor control */
-	/* 27:16 Tx descriptor byte count
-	 * 11:0 start address offset */
+/* 27:16 Tx descriptor byte count, 11:0 start address offset */
 #define AVERXDES0	0x308		/* Rx0 descriptor control */
-	/* 30:16 Rx descriptor byte count
-	 * 14:0 start address offset */
+/* 30:16 Rx descriptor byte count, 14:0 start address offset */
 #define AVEITIRQC	0x34c		/* interval IRQ control */
 #define  ITIRQC_R0E	(1U<<27)	/* enable Rx0 interval timer */
-#define  INTMVAL	(20<<16)	/* INTM value */
-	/* 15:0 interval timer count */
+#define  INTMVAL	(20<<16)	/* 15:0 interval timer count */
 
 #define AVEAFB		0x0800		/* address filter base */
 #define AVEAFMSKB	0x0d00		/* byte mask base */
@@ -128,47 +160,21 @@ __KERNEL_RCSID(0, "$NetBSD: if_ave.c,v 1
 #define AVEAFRING	0x0f00		/* entry ring number selector */
 #define AVEAFEN		0x0ffc		/* entry enable bit vector */
 
-#define AVETDB		0x1000	/* 64bit Tx descriptor store, upto 256 */
-#define AVERDB		0x1c00	/* 64bit Rx descriptor store, upto 2048 */
-#define AVE32TDB	0x1000	/* 32bit Tx store base, upto 256 */
-#define AVE32RDB	0x1800	/* 32bit Rx store base, upto 2048 */
+/* AVE has internal cache coherent memory tol hold descriptor arrays. */
+#define AVETDB		0x1000		/* 64-bit Tx desc store, upto 256 */
+#define AVERDB		0x1c00		/* 64-bit Rx desc store, upto 2048 */
+#define AVE32TDB	0x1000		/* 32-bit Tx store base, upto 256 */
+#define AVE32RDB	0x1800		/* 32-bit Rx store base, upto 2048 */
 
 #define AVERMIIC	0x8028		/* RMII control */
 #define  RMIIC_RST	(1U<<16)	/* reset operation */
 #define AVELINKSEL	0x8034		/* RMII speed selection */
 #define  LINKSEL_SPD100	(1U<<0)		/* use 100Mbps */
 
-/*
- * descriptor size is 12 bytes when 64bit paddr design, 8 bytes otherwise.
- */
-struct tdes {
-	uint32_t t0, t1, t2;
-};
-
-struct rdes {
-	uint32_t r0, r1, r2;
-};
-
-struct tdes32 { uint32_t t0, t1; };
-struct rdes32 { uint32_t r0, r1; };
-
-#define T0_OWN		(1U<<31)	/* desc is ready to Tx */
-#define T0_IOC		(1U<<29)	/* post interrupt on Tx completes */

CVS commit: src/sys/arch/arm/sociox

2020-09-23 Thread Tohru Nishimura
Module Name:src
Committed By:   nisimura
Date:   Wed Sep 23 23:38:24 UTC 2020

Modified Files:
src/sys/arch/arm/sociox: if_ave.c

Log Message:
note more about AVE EMAC design


To generate a diff of this commit:
cvs rdiff -u -r1.16 -r1.17 src/sys/arch/arm/sociox/if_ave.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.



CVS commit: src/sys/dev/pci

2020-09-20 Thread Tohru Nishimura
Module Name:src
Committed By:   nisimura
Date:   Sun Sep 20 23:48:09 UTC 2020

Modified Files:
src/sys/dev/pci: if_kse.c

Log Message:
- rectify nonsense and bugs around statistics counter managment.
- scoop up counter values in one second interval comsolidating with phy_tick.
- reformat register definitions for ease to see.


To generate a diff of this commit:
cvs rdiff -u -r1.55 -r1.56 src/sys/dev/pci/if_kse.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/dev/pci/if_kse.c
diff -u src/sys/dev/pci/if_kse.c:1.55 src/sys/dev/pci/if_kse.c:1.56
--- src/sys/dev/pci/if_kse.c:1.55	Sun Sep 20 20:15:11 2020
+++ src/sys/dev/pci/if_kse.c	Sun Sep 20 23:48:09 2020
@@ -1,4 +1,4 @@
-/*	$NetBSD: if_kse.c,v 1.55 2020/09/20 20:15:11 nisimura Exp $	*/
+/*	$NetBSD: if_kse.c,v 1.56 2020/09/20 23:48:09 nisimura Exp $	*/
 
 /*-
  * Copyright (c) 2006 The NetBSD Foundation, Inc.
@@ -34,7 +34,7 @@
  */
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: if_kse.c,v 1.55 2020/09/20 20:15:11 nisimura Exp $");
+__KERNEL_RCSID(0, "$NetBSD: if_kse.c,v 1.56 2020/09/20 23:48:09 nisimura Exp $");
 
 #include 
 #include 
@@ -42,8 +42,9 @@ __KERNEL_RCSID(0, "$NetBSD: if_kse.c,v 1
 #include 
 #include 
 #include 
-#include 
 #include 
+#include 
+#include 
 #include 
 #include 
 #include 
@@ -71,36 +72,38 @@ __KERNEL_RCSID(0, "$NetBSD: if_kse.c,v 1
 #define CSR_WRITE_2(sc, off, val) \
 	bus_space_write_2((sc)->sc_st, (sc)->sc_sh, (off), (val))
 
-#define MDTXC	0x000	/* DMA transmit control */
-#define MDRXC	0x004	/* DMA receive control */
-#define MDTSC	0x008	/* DMA transmit start */
-#define MDRSC	0x00c	/* DMA receive start */
-#define TDLB	0x010	/* transmit descriptor list base */
-#define RDLB	0x014	/* receive descriptor list base */
-#define MTR0	0x020	/* multicast table 31:0 */
-#define MTR1	0x024	/* multicast table 63:32 */
-#define INTEN	0x028	/* interrupt enable */
-#define INTST	0x02c	/* interrupt status */
-#define MAAL0	0x080	/* additional MAC address 0 low */
-#define MAAH0	0x084	/* additional MAC address 0 high */
-#define MARL	0x200	/* MAC address low */
-#define MARM	0x202	/* MAC address middle */
-#define MARH	0x204	/* MAC address high */
-#define GRR	0x216	/* global reset */
-#define SIDER	0x400	/* switch ID and function enable */
-#define SGCR3	0x406	/* switch function control 3 */
-#define  CR3_USEHDX	(1U<<6)	/* use half-duplex 8842 host port */
-#define  CR3_USEFC	(1U<<5) /* use flowcontrol 8842 host port */
-#define IACR	0x4a0	/* indirect access control */
-#define IADR1	0x4a2	/* indirect access data 66:63 */
-#define IADR2	0x4a4	/* indirect access data 47:32 */
-#define IADR3	0x4a6	/* indirect access data 63:48 */
-#define IADR4	0x4a8	/* indirect access data 15:0 */
-#define IADR5	0x4aa	/* indirect access data 31:16 */
-#define P1CR4	0x512	/* port 1 control 4 */
-#define P1SR	0x514	/* port 1 status */
-#define P2CR4	0x532	/* port 2 control 4 */
-#define P2SR	0x534	/* port 2 status */
+#define MDTXC		0x000		/* DMA transmit control */
+#define MDRXC		0x004		/* DMA receive control */
+#define MDTSC		0x008		/* trigger DMA transmit (SC) */
+#define MDRSC		0x00c		/* trigger DMA receive (SC) */
+#define TDLB		0x010		/* transmit descriptor list base */
+#define RDLB		0x014		/* receive descriptor list base */
+#define MTR0		0x020		/* multicast table 31:0 */
+#define MTR1		0x024		/* multicast table 63:32 */
+#define INTEN		0x028		/* interrupt enable */
+#define INTST		0x02c		/* interrupt status */
+#define MAAL0		0x080		/* additional MAC address 0 low */
+#define MAAH0		0x084		/* additional MAC address 0 high */
+#define MARL		0x200		/* MAC address low */
+#define MARM		0x202		/* MAC address middle */
+#define MARH		0x204		/* MAC address high */
+#define GRR		0x216		/* global reset */
+#define SIDER		0x400		/* switch ID and function enable */
+#define SGCR3		0x406		/* switch function control 3 */
+#define  CR3_USEHDX	(1U<<6)		/* use half-duplex 8842 host port */
+#define  CR3_USEFC	(1U<<5) 	/* use flowcontrol 8842 host port */
+#define IACR		0x4a0		/* indirect access control */
+#define IADR1		0x4a2		/* indirect access data 66:63 */
+#define IADR2		0x4a4		/* indirect access data 47:32 */
+#define IADR3		0x4a6		/* indirect access data 63:48 */
+#define IADR4		0x4a8		/* indirect access data 15:0 */
+#define IADR5		0x4aa		/* indirect access data 31:16 */
+#define  IADR_LATCH	(1U<<30)	/* latch completed indication */
+#define  IADR_OVF	(1U<<31)	/* overflow detected */
+#define P1CR4		0x512		/* port 1 control 4 */
+#define P1SR		0x514		/* port 1 status */
+#define P2CR4		0x532		/* port 2 control 4 */
+#define P2SR		0x534		/* port 2 status */
 #define  PxCR_STARTNEG	(1U<<9)		/* restart auto negotiation */
 #define  PxCR_AUTOEN	(1U<<7)		/* auto negotiation enable */
 #define  PxCR_SPD100	(1U<<6)		/* force speed 100 */
@@ -112,9 +115,10 @@ __KERNEL_RCSID(0, "$NetBSD: if_kse.c,v 1
 #define  PxSR_LINKUP	(1U<<5)		/* link is good 

CVS commit: src/sys/dev/pci

2020-09-20 Thread Tohru Nishimura
Module Name:src
Committed By:   nisimura
Date:   Sun Sep 20 23:48:09 UTC 2020

Modified Files:
src/sys/dev/pci: if_kse.c

Log Message:
- rectify nonsense and bugs around statistics counter managment.
- scoop up counter values in one second interval comsolidating with phy_tick.
- reformat register definitions for ease to see.


To generate a diff of this commit:
cvs rdiff -u -r1.55 -r1.56 src/sys/dev/pci/if_kse.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.



CVS commit: src/sys/dev/pci

2020-09-20 Thread Tohru Nishimura
Module Name:src
Committed By:   nisimura
Date:   Sun Sep 20 20:15:11 UTC 2020

Modified Files:
src/sys/dev/pci: if_kse.c

Log Message:
guard statistics gathering callout with #ifdef


To generate a diff of this commit:
cvs rdiff -u -r1.54 -r1.55 src/sys/dev/pci/if_kse.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/dev/pci/if_kse.c
diff -u src/sys/dev/pci/if_kse.c:1.54 src/sys/dev/pci/if_kse.c:1.55
--- src/sys/dev/pci/if_kse.c:1.54	Sun Sep 20 17:59:42 2020
+++ src/sys/dev/pci/if_kse.c	Sun Sep 20 20:15:11 2020
@@ -1,4 +1,4 @@
-/*	$NetBSD: if_kse.c,v 1.54 2020/09/20 17:59:42 nisimura Exp $	*/
+/*	$NetBSD: if_kse.c,v 1.55 2020/09/20 20:15:11 nisimura Exp $	*/
 
 /*-
  * Copyright (c) 2006 The NetBSD Foundation, Inc.
@@ -34,7 +34,7 @@
  */
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: if_kse.c,v 1.54 2020/09/20 17:59:42 nisimura Exp $");
+__KERNEL_RCSID(0, "$NetBSD: if_kse.c,v 1.55 2020/09/20 20:15:11 nisimura Exp $");
 
 #include 
 #include 
@@ -236,7 +236,6 @@ struct kse_softc {
 	int sc_flowflags;		/* 802.3x PAUSE flow control */
 
 	callout_t  sc_tick_ch;		/* MII tick callout */
-	callout_t  sc_stat_ch;		/* statistics counter callout */
 
 	bus_dmamap_t sc_cddmamap;	/* control data DMA map */
 #define sc_cddma	sc_cddmamap->dm_segs[0].ds_addr
@@ -261,6 +260,7 @@ struct kse_softc {
 	uint32_t sc_chip;
 
 #ifdef KSE_EVENT_COUNTERS
+	callout_t  sc_stat_ch;		/* statistics counter callout */
 	struct ksext {
 		char evcntname[3][8];
 		struct evcnt pev[3][34];
@@ -869,8 +869,9 @@ kse_stop(struct ifnet *ifp, int disable)
 
 	if (sc->sc_chip == 0x8841)
 		callout_stop(>sc_tick_ch);
+#ifdef KSE_EVENT_COUNTERS
 	callout_stop(>sc_stat_ch);
-
+#endif
 	sc->sc_txc &= ~TXC_TEN;
 	sc->sc_rxc &= ~RXC_REN;
 	CSR_WRITE_4(sc, MDTXC, sc->sc_txc);



CVS commit: src/sys/dev/pci

2020-09-20 Thread Tohru Nishimura
Module Name:src
Committed By:   nisimura
Date:   Sun Sep 20 20:15:11 UTC 2020

Modified Files:
src/sys/dev/pci: if_kse.c

Log Message:
guard statistics gathering callout with #ifdef


To generate a diff of this commit:
cvs rdiff -u -r1.54 -r1.55 src/sys/dev/pci/if_kse.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.



CVS commit: src/sys/dev/pci

2020-09-20 Thread Tohru Nishimura
Module Name:src
Committed By:   nisimura
Date:   Sun Sep 20 17:59:42 UTC 2020

Modified Files:
src/sys/dev/pci: if_kse.c

Log Message:
be more cautious about error exit path. nuke unused variables


To generate a diff of this commit:
cvs rdiff -u -r1.53 -r1.54 src/sys/dev/pci/if_kse.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/dev/pci/if_kse.c
diff -u src/sys/dev/pci/if_kse.c:1.53 src/sys/dev/pci/if_kse.c:1.54
--- src/sys/dev/pci/if_kse.c:1.53	Wed Apr  1 04:00:14 2020
+++ src/sys/dev/pci/if_kse.c	Sun Sep 20 17:59:42 2020
@@ -1,4 +1,4 @@
-/*	$NetBSD: if_kse.c,v 1.53 2020/04/01 04:00:14 nisimura Exp $	*/
+/*	$NetBSD: if_kse.c,v 1.54 2020/09/20 17:59:42 nisimura Exp $	*/
 
 /*-
  * Copyright (c) 2006 The NetBSD Foundation, Inc.
@@ -34,7 +34,7 @@
  */
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: if_kse.c,v 1.53 2020/04/01 04:00:14 nisimura Exp $");
+__KERNEL_RCSID(0, "$NetBSD: if_kse.c,v 1.54 2020/09/20 17:59:42 nisimura Exp $");
 
 #include 
 #include 
@@ -258,10 +258,7 @@ struct kse_softc {
 	uint32_t sc_t1csum;
 	int sc_mcsum;
 	uint32_t sc_inten;
-
 	uint32_t sc_chip;
-	uint8_t sc_altmac[16][ETHER_ADDR_LEN];
-	uint16_t sc_vlan[16];
 
 #ifdef KSE_EVENT_COUNTERS
 	struct ksext {
@@ -406,7 +403,7 @@ kse_attach(device_t parent, device_t sel
 	/* Map and establish our interrupt. */
 	if (pci_intr_map(pa, )) {
 		aprint_error_dev(self, "unable to map interrupt\n");
-		return;
+		goto fail;
 	}
 	intrstr = pci_intr_string(pc, ih, intrbuf, sizeof(intrbuf));
 	sc->sc_ih = pci_intr_establish_xname(pc, ih, IPL_NET, kse_intr, sc,
@@ -416,7 +413,7 @@ kse_attach(device_t parent, device_t sel
 		if (intrstr != NULL)
 			aprint_error(" at %s", intrstr);
 		aprint_error("\n");
-		return;
+		goto fail;
 	}
 	aprint_normal_dev(self, "interrupting at %s\n", intrstr);
 
@@ -502,13 +499,6 @@ kse_attach(device_t parent, device_t sel
 		sc->sc_rxsoft[i].rxs_mbuf = NULL;
 	}
 
-	callout_init(>sc_tick_ch, 0);
-	callout_init(>sc_stat_ch, 0);
-	callout_setfunc(>sc_tick_ch, phy_tick, sc);
-#ifdef KSE_EVENT_COUNTERS
-	callout_setfunc(>sc_stat_ch, stat_tick, sc);
-#endif
-
 	mii->mii_ifp = ifp;
 	mii->mii_readreg = kse_mii_readreg;
 	mii->mii_writereg = kse_mii_writereg;
@@ -548,7 +538,6 @@ kse_attach(device_t parent, device_t sel
 	}
 	ifm->ifm_media = ifm->ifm_cur->ifm_media; /* as if user has requested */
 
-
 	strlcpy(ifp->if_xname, device_xname(sc->sc_dev), IFNAMSIZ);
 	ifp->if_softc = sc;
 	ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
@@ -573,6 +562,9 @@ kse_attach(device_t parent, device_t sel
 	if_deferred_start_init(ifp, NULL);
 	ether_ifattach(ifp, enaddr);
 
+	callout_init(>sc_tick_ch, 0);
+	callout_setfunc(>sc_tick_ch, phy_tick, sc);
+
 #ifdef KSE_EVENT_COUNTERS
 	int p = (sc->sc_chip == 0x8842) ? 3 : 1;
 	for (i = 0; i < p; i++) {
@@ -648,6 +640,8 @@ kse_attach(device_t parent, device_t sel
 		evcnt_attach_dynamic(>pev[i][33], EVCNT_TYPE_MISC,
 		NULL, ee->evcntname[i], "RxDropPkts");
 	}
+	callout_init(>sc_stat_ch, 0);
+	callout_setfunc(>sc_stat_ch, stat_tick, sc);
 #endif
 	return;
 
@@ -672,14 +666,9 @@ kse_attach(device_t parent, device_t sel
  fail_1:
 	bus_dmamem_free(sc->sc_dmat, , nseg);
  fail_0:
-	if (sc->sc_ih != NULL) {
-		pci_intr_disestablish(pc, sc->sc_ih);
-		sc->sc_ih = NULL;
-	}
-	if (sc->sc_memsize) {
-		bus_space_unmap(sc->sc_st, sc->sc_sh, sc->sc_memsize);
-		sc->sc_memsize = 0;
-	}
+	pci_intr_disestablish(pc, sc->sc_ih);
+ fail:
+	bus_space_unmap(sc->sc_st, sc->sc_sh, sc->sc_memsize);
 	return;
 }
 
@@ -712,11 +701,10 @@ kse_ioctl(struct ifnet *ifp, u_long cmd,
 		error = ifmedia_ioctl(ifp, ifr, ifm, cmd);
 		break;
 	default:
-		if ((error = ether_ioctl(ifp, cmd, data)) != ENETRESET)
+		error = ether_ioctl(ifp, cmd, data);
+		if (error != ENETRESET)
 			break;
-
 		error = 0;
-
 		if (cmd == SIOCSIFCAP)
 			error = (*ifp->if_init)(ifp);
 		if (cmd != SIOCADDMULTI && cmd != SIOCDELMULTI)
@@ -732,6 +720,7 @@ kse_ioctl(struct ifnet *ifp, u_long cmd,
 	}
 
 	splx(s);
+
 	return error;
 }
 



CVS commit: src/sys/dev/pci

2020-09-20 Thread Tohru Nishimura
Module Name:src
Committed By:   nisimura
Date:   Sun Sep 20 17:59:42 UTC 2020

Modified Files:
src/sys/dev/pci: if_kse.c

Log Message:
be more cautious about error exit path. nuke unused variables


To generate a diff of this commit:
cvs rdiff -u -r1.53 -r1.54 src/sys/dev/pci/if_kse.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.



CVS commit: src/sys/arch/sandpoint/sandpoint

2020-07-08 Thread Tohru Nishimura
Module Name:src
Committed By:   nisimura
Date:   Thu Jul  9 05:12:09 UTC 2020

Modified Files:
src/sys/arch/sandpoint/sandpoint: autoconf.c

Log Message:
Adapt to proplib api changes


To generate a diff of this commit:
cvs rdiff -u -r1.28 -r1.29 src/sys/arch/sandpoint/sandpoint/autoconf.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/sandpoint/sandpoint/autoconf.c
diff -u src/sys/arch/sandpoint/sandpoint/autoconf.c:1.28 src/sys/arch/sandpoint/sandpoint/autoconf.c:1.29
--- src/sys/arch/sandpoint/sandpoint/autoconf.c:1.28	Wed Sep 30 14:18:54 2015
+++ src/sys/arch/sandpoint/sandpoint/autoconf.c	Thu Jul  9 05:12:09 2020
@@ -1,4 +1,4 @@
-/*	$NetBSD: autoconf.c,v 1.28 2015/09/30 14:18:54 phx Exp $	*/
+/*	$NetBSD: autoconf.c,v 1.29 2020/07/09 05:12:09 nisimura Exp $	*/
 
 /*-
  * Copyright (c) 1990 The Regents of the University of California.
@@ -35,7 +35,7 @@
  */
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: autoconf.c,v 1.28 2015/09/30 14:18:54 phx Exp $");
+__KERNEL_RCSID(0, "$NetBSD: autoconf.c,v 1.29 2020/07/09 05:12:09 nisimura Exp $");
 
 #include 
 #include 
@@ -152,7 +152,7 @@ device_register(device_t dev, void *aux)
 		&& bi_net->cookie == tag) {
 			prop_data_t pd;
 
-			pd = prop_data_create_data_nocopy(bi_net->mac_address,
+			pd = prop_data_create_nocopy(bi_net->mac_address,
 			ETHER_ADDR_LEN);
 			KASSERT(pd != NULL);
 			if (prop_dictionary_set(device_properties(dev),
@@ -201,7 +201,7 @@ add_i2c_child_devices(device_t self, con
 		!(bi_model->flags & model_i2c_devs[i].model_mask))
 			continue;
 		pd = prop_dictionary_create();
-		prop_dictionary_set_cstring_nocopy(pd, "name",
+		prop_dictionary_set_string_nocopy(pd, "name",
 		model_i2c_devs[i].name);
 		prop_dictionary_set_uint32(pd, "addr",
 		model_i2c_devs[i].addr);



CVS commit: src/sys/arch/sandpoint/sandpoint

2020-07-08 Thread Tohru Nishimura
Module Name:src
Committed By:   nisimura
Date:   Thu Jul  9 05:12:09 UTC 2020

Modified Files:
src/sys/arch/sandpoint/sandpoint: autoconf.c

Log Message:
Adapt to proplib api changes


To generate a diff of this commit:
cvs rdiff -u -r1.28 -r1.29 src/sys/arch/sandpoint/sandpoint/autoconf.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.



CVS commit: src/sys/dev/ic

2020-04-02 Thread Tohru Nishimura
Module Name:src
Committed By:   nisimura
Date:   Thu Apr  2 13:38:50 UTC 2020

Modified Files:
src/sys/dev/ic: dm9000.c

Log Message:
add aprint_debug_dev() call for CI20


To generate a diff of this commit:
cvs rdiff -u -r1.27 -r1.28 src/sys/dev/ic/dm9000.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/dev/ic/dm9000.c
diff -u src/sys/dev/ic/dm9000.c:1.27 src/sys/dev/ic/dm9000.c:1.28
--- src/sys/dev/ic/dm9000.c:1.27	Thu Apr  2 07:26:45 2020
+++ src/sys/dev/ic/dm9000.c	Thu Apr  2 13:38:50 2020
@@ -1,4 +1,4 @@
-/*	$NetBSD: dm9000.c,v 1.27 2020/04/02 07:26:45 skrll Exp $	*/
+/*	$NetBSD: dm9000.c,v 1.28 2020/04/02 13:38:50 nisimura Exp $	*/
 
 /*
  * Copyright (c) 2009 Paul Fleischer
@@ -225,6 +225,7 @@ dme_attach(struct dme_softc *sc, const u
 		KASSERT(prop_object_type(ea) == PROP_TYPE_DATA);
 		KASSERT(prop_data_size(ea) == ETHER_ADDR_LEN);
 		memcpy(enaddr, prop_data_data_nocopy(ea), ETHER_ADDR_LEN);
+		aprint_debug_dev(sc->sc_dev, "got MAC address!\n");
 	} else {
 		/*
 		 * If we did not get an externaly configure address,



CVS commit: src/sys/dev/ic

2020-04-02 Thread Tohru Nishimura
Module Name:src
Committed By:   nisimura
Date:   Thu Apr  2 13:38:50 UTC 2020

Modified Files:
src/sys/dev/ic: dm9000.c

Log Message:
add aprint_debug_dev() call for CI20


To generate a diff of this commit:
cvs rdiff -u -r1.27 -r1.28 src/sys/dev/ic/dm9000.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.



CVS commit: src/sys/arch/evbmips/conf

2020-04-02 Thread Tohru Nishimura
Module Name:src
Committed By:   nisimura
Date:   Thu Apr  2 13:03:54 UTC 2020

Modified Files:
src/sys/arch/evbmips/conf: CI20

Log Message:
add ukphy as the last resort. enable dmphy for dme


To generate a diff of this commit:
cvs rdiff -u -r1.29 -r1.30 src/sys/arch/evbmips/conf/CI20

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/evbmips/conf/CI20
diff -u src/sys/arch/evbmips/conf/CI20:1.29 src/sys/arch/evbmips/conf/CI20:1.30
--- src/sys/arch/evbmips/conf/CI20:1.29	Sun Jan 19 01:25:05 2020
+++ src/sys/arch/evbmips/conf/CI20	Thu Apr  2 13:03:53 2020
@@ -1,4 +1,4 @@
-#	$NetBSD: CI20,v 1.29 2020/01/19 01:25:05 thorpej Exp $
+#	$NetBSD: CI20,v 1.30 2020/04/02 13:03:53 nisimura Exp $
 #
 # MIPS Creator CI20
 #
@@ -7,7 +7,7 @@ include 	"arch/evbmips/conf/std.ingenic"
 
 #options 	INCLUDE_CONFIG_FILE	# embed config file in kernel binary
 
-#ident 		"CI20-$Revision: 1.29 $"
+#ident 		"CI20-$Revision: 1.30 $"
 
 maxusers	32
 
@@ -219,7 +219,7 @@ jzrng0	at apbus0
 # MII/PHY support
 #acphy*		at mii? phy ?		# DAltima AC101 and AMD Am79c874 PHYs
 #amhphy* 	at mii? phy ?		# AMD 79c901 Ethernet PHYs
-#dmphy*		at mii? phy ?		# Davicom DM9101 PHYs
+dmphy*		at mii? phy ?		# Davicom DM9101 PHYs
 #glxtphy*	at mii? phy ?		# Level One LXT-1000 PHYs
 #gphyter*	at mii? phy ?		# NS83861 Gig-E PHY
 #icsphy* 	at mii? phy ?		# Integrated Circuit Systems ICS1890
@@ -233,7 +233,7 @@ jzrng0	at apbus0
 #tlphy*		at mii? phy ?		# ThunderLAN PHYs
 #tqphy*		at mii? phy ?		# TDK Semiconductor PHYs
 #rlphy*		at mii? phy ?		# RealTek PHYs
-#ukphy*		at mii? phy ?		# generic unknown PHYs
+ukphy*		at mii? phy ?		# generic unknown PHYs
 
 
 # Pseudo-devices



CVS commit: src/sys/arch/evbmips/conf

2020-04-02 Thread Tohru Nishimura
Module Name:src
Committed By:   nisimura
Date:   Thu Apr  2 13:03:54 UTC 2020

Modified Files:
src/sys/arch/evbmips/conf: CI20

Log Message:
add ukphy as the last resort. enable dmphy for dme


To generate a diff of this commit:
cvs rdiff -u -r1.29 -r1.30 src/sys/arch/evbmips/conf/CI20

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.



CVS commit: src/sys/arch/mips/ingenic

2020-04-02 Thread Tohru Nishimura
Module Name:src
Committed By:   nisimura
Date:   Thu Apr  2 13:03:03 UTC 2020

Modified Files:
src/sys/arch/mips/ingenic: ingenic_dme.c

Log Message:
add miivar.h and put a stop gap to compile.


To generate a diff of this commit:
cvs rdiff -u -r1.3 -r1.4 src/sys/arch/mips/ingenic/ingenic_dme.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/mips/ingenic/ingenic_dme.c
diff -u src/sys/arch/mips/ingenic/ingenic_dme.c:1.3 src/sys/arch/mips/ingenic/ingenic_dme.c:1.4
--- src/sys/arch/mips/ingenic/ingenic_dme.c:1.3	Fri May 19 07:43:31 2017
+++ src/sys/arch/mips/ingenic/ingenic_dme.c	Thu Apr  2 13:03:03 2020
@@ -1,4 +1,4 @@
-/*	$NetBSD: ingenic_dme.c,v 1.3 2017/05/19 07:43:31 skrll Exp $ */
+/*	$NetBSD: ingenic_dme.c,v 1.4 2020/04/02 13:03:03 nisimura Exp $ */
 
 /*-
  * Copyright (c) 2015 Michael Lorenz
@@ -27,14 +27,13 @@
  */
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: ingenic_dme.c,v 1.3 2017/05/19 07:43:31 skrll Exp $");
+__KERNEL_RCSID(0, "$NetBSD: ingenic_dme.c,v 1.4 2020/04/02 13:03:03 nisimura Exp $");
 
 #include 
-#include 
-#include 
-#include 
+#include 
 #include 
-#include 
+#include 
+#include 
 
 #include 
 #include 
@@ -42,6 +41,7 @@ __KERNEL_RCSID(0, "$NetBSD: ingenic_dme.
 #include 
 #include 
 #include 
+#include 
 
 #include 
 #include 
@@ -132,7 +132,7 @@ ingenic_dme_attach(device_t parent, devi
 		 13);
 		goto fail;
 	}
-
+#if 0
 	eaddrprop = prop_dictionary_get(device_properties(self), "mac-address");
 
 	if (eaddrprop != NULL && prop_data_size(eaddrprop) == ETHER_ADDR_LEN) {
@@ -148,6 +148,13 @@ ingenic_dme_attach(device_t parent, devi
 		aprint_error_dev(self, "reading MAC address from chip\n");
 		dme_read_c(sc, DM9000_PAB0, enaddr, 6);
 	}
+#else
+	(void)eaddrprop;
+	/*
+	 * dme_attach checks dictionary, then previous setting, then roll
+	 * a dice to make random MAC address
+	 */
+#endif
 	dme_attach(sc, enaddr);
 	return;
 fail:



CVS commit: src/sys/arch/mips/ingenic

2020-04-02 Thread Tohru Nishimura
Module Name:src
Committed By:   nisimura
Date:   Thu Apr  2 13:03:03 UTC 2020

Modified Files:
src/sys/arch/mips/ingenic: ingenic_dme.c

Log Message:
add miivar.h and put a stop gap to compile.


To generate a diff of this commit:
cvs rdiff -u -r1.3 -r1.4 src/sys/arch/mips/ingenic/ingenic_dme.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.



CVS commit: src/sys/dev/usb

2020-04-01 Thread Tohru Nishimura
Module Name:src
Committed By:   nisimura
Date:   Thu Apr  2 04:09:36 UTC 2020

Modified Files:
src/sys/dev/usb: if_mos.c if_url.c

Log Message:
iron out multicast filter logic and pick better name for its work


To generate a diff of this commit:
cvs rdiff -u -r1.6 -r1.7 src/sys/dev/usb/if_mos.c
cvs rdiff -u -r1.76 -r1.77 src/sys/dev/usb/if_url.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.



CVS commit: src/sys/dev/usb

2020-04-01 Thread Tohru Nishimura
Module Name:src
Committed By:   nisimura
Date:   Thu Apr  2 04:09:36 UTC 2020

Modified Files:
src/sys/dev/usb: if_mos.c if_url.c

Log Message:
iron out multicast filter logic and pick better name for its work


To generate a diff of this commit:
cvs rdiff -u -r1.6 -r1.7 src/sys/dev/usb/if_mos.c
cvs rdiff -u -r1.76 -r1.77 src/sys/dev/usb/if_url.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/dev/usb/if_mos.c
diff -u src/sys/dev/usb/if_mos.c:1.6 src/sys/dev/usb/if_mos.c:1.7
--- src/sys/dev/usb/if_mos.c:1.6	Tue Mar 31 23:26:32 2020
+++ src/sys/dev/usb/if_mos.c	Thu Apr  2 04:09:36 2020
@@ -1,4 +1,4 @@
-/*	$NetBSD: if_mos.c,v 1.6 2020/03/31 23:26:32 nisimura Exp $	*/
+/*	$NetBSD: if_mos.c,v 1.7 2020/04/02 04:09:36 nisimura Exp $	*/
 /*	$OpenBSD: if_mos.c,v 1.40 2019/07/07 06:40:10 kevlo Exp $	*/
 
 /*
@@ -72,7 +72,7 @@
  */
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: if_mos.c,v 1.6 2020/03/31 23:26:32 nisimura Exp $");
+__KERNEL_RCSID(0, "$NetBSD: if_mos.c,v 1.7 2020/04/02 04:09:36 nisimura Exp $");
 
 #include 
 
@@ -485,7 +485,7 @@ mos_rcvfilt_locked(struct usbnet *un)
 			ec->ec_flags |= ETHER_F_ALLMULTI;
 			ETHER_UNLOCK(ec);
 			memset(mchash, 0, sizeof(mchash)); /* correct ??? */
-			/* accept all mulicast frame */
+			/* accept all multicast frame */
 			rxmode |= MOS_CTL_ALLMULTI;
 			goto update;
 		}
@@ -743,7 +743,7 @@ mos_init_locked(struct ifnet *ifp)
 	mos_reg_write_1(un, MOS_IPG0, ipgs[0]);
 	mos_reg_write_1(un, MOS_IPG1, ipgs[1]);
 
-	/* Program promiscuous mode and multicast filters. */
+	/* Accept multicast frame or run promisc. mode */
 	mos_rcvfilt_locked(un);
 
 	/* Enable receiver and transmitter, bridge controls speed/duplex mode */

Index: src/sys/dev/usb/if_url.c
diff -u src/sys/dev/usb/if_url.c:1.76 src/sys/dev/usb/if_url.c:1.77
--- src/sys/dev/usb/if_url.c:1.76	Sun Mar 15 23:04:51 2020
+++ src/sys/dev/usb/if_url.c	Thu Apr  2 04:09:36 2020
@@ -1,4 +1,4 @@
-/*	$NetBSD: if_url.c,v 1.76 2020/03/15 23:04:51 thorpej Exp $	*/
+/*	$NetBSD: if_url.c,v 1.77 2020/04/02 04:09:36 nisimura Exp $	*/
 
 /*
  * Copyright (c) 2001, 2002
@@ -44,7 +44,7 @@
  */
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: if_url.c,v 1.76 2020/03/15 23:04:51 thorpej Exp $");
+__KERNEL_RCSID(0, "$NetBSD: if_url.c,v 1.77 2020/04/02 04:09:36 nisimura Exp $");
 
 #ifdef _KERNEL_OPT
 #include "opt_inet.h"
@@ -81,7 +81,7 @@ static int url_uno_ioctl(struct ifnet *,
 static void url_uno_stop(struct ifnet *, int);
 static void url_uno_mii_statchg(struct ifnet *);
 static int url_uno_init(struct ifnet *);
-static void url_setiff_locked(struct usbnet *);
+static void url_rcvfilt_locked(struct usbnet *);
 static void url_reset(struct usbnet *);
 
 static int url_csr_read_1(struct usbnet *, int);
@@ -398,20 +398,10 @@ url_init_locked(struct ifnet *ifp)
 		   URL_TCR_NOCRC);
 
 	/* Init receive control register */
-	URL_SETBIT2(un, URL_RCR, URL_RCR_TAIL | URL_RCR_AD);
-	if (ifp->if_flags & IFF_BROADCAST)
-		URL_SETBIT2(un, URL_RCR, URL_RCR_AB);
-	else
-		URL_CLRBIT2(un, URL_RCR, URL_RCR_AB);
-
-	/* If we want promiscuous mode, accept all physical frames. */
-	if (ifp->if_flags & IFF_PROMISC)
-		URL_SETBIT2(un, URL_RCR, URL_RCR_AAM | URL_RCR_AAP);
-	else
-		URL_CLRBIT2(un, URL_RCR, URL_RCR_AAM | URL_RCR_AAP);
+	URL_SETBIT2(un, URL_RCR, URL_RCR_TAIL | URL_RCR_AD | URL_RCR_AB);
 
-	/* Load the multicast filter */
-	url_setiff_locked(un);
+	/* Accept multicast frame or run promisc. mode */
+	url_rcvfilt_locked(un);
 
 	/* Enable RX and TX */
 	URL_SETBIT(un, URL_CR, URL_CR_TE | URL_CR_RE);
@@ -454,18 +444,15 @@ url_reset(struct usbnet *un)
 	delay(1);		/* XXX */
 }
 
-#define url_calchash(addr) (ether_crc32_be((addr), ETHER_ADDR_LEN) >> 26)
-
 static void
-url_setiff_locked(struct usbnet *un)
+url_rcvfilt_locked(struct usbnet *un)
 {
 	struct ifnet * const ifp = usbnet_ifp(un);
 	struct ethercom *ec = usbnet_ec(un);
 	struct ether_multi *enm;
 	struct ether_multistep step;
-	uint32_t hashes[2] = { 0, 0 };
-	int h = 0;
-	int mcnt = 0;
+	uint32_t mchash[2] = { 0, 0 };
+	int h = 0, rcr;
 
 	DPRINTF(("%s: %s: enter\n", device_xname(un->un_dev), __func__));
 
@@ -474,52 +461,40 @@ url_setiff_locked(struct usbnet *un)
 	if (usbnet_isdying(un))
 		return;
 
-	if (ifp->if_flags & IFF_PROMISC) {
-		URL_SETBIT2(un, URL_RCR, URL_RCR_AAM | URL_RCR_AAP);
-		return;
-	} else if (ifp->if_flags & IFF_ALLMULTI) {
-allmulti:
-		ifp->if_flags |= IFF_ALLMULTI;
-		URL_SETBIT2(un, URL_RCR, URL_RCR_AAM);
-		URL_CLRBIT2(un, URL_RCR, URL_RCR_AAP);
-		return;
-	}
-
-	/* first, zot all the existing hash bits */
-	url_csr_write_4(un, URL_MAR0, 0);
-	url_csr_write_4(un, URL_MAR4, 0);
+	rcr = url_csr_read_2(un, URL_RCR);
+	rcr &= ~(URL_RCR_AAP | URL_RCR_AAM | URL_RCR_AM);
 
-	/* now program new ones */
 	ETHER_LOCK(ec);
+	if (ifp->if_flags & IFF_PROMISC) {
+		ec->ec_flags |= ETHER_F_ALLMULTI;
+		ETHER_UNLOCK(ec);
+		/* run promisc. mode */
+		rcr |= 

CVS commit: src/sys/dev/pci

2020-03-31 Thread Tohru Nishimura
Module Name:src
Committed By:   nisimura
Date:   Wed Apr  1 04:00:14 UTC 2020

Modified Files:
src/sys/dev/pci: if_kse.c

Log Message:
insert missing ETHER_UNLOCK()


To generate a diff of this commit:
cvs rdiff -u -r1.52 -r1.53 src/sys/dev/pci/if_kse.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/dev/pci/if_kse.c
diff -u src/sys/dev/pci/if_kse.c:1.52 src/sys/dev/pci/if_kse.c:1.53
--- src/sys/dev/pci/if_kse.c:1.52	Wed Apr  1 00:07:04 2020
+++ src/sys/dev/pci/if_kse.c	Wed Apr  1 04:00:14 2020
@@ -1,4 +1,4 @@
-/*	$NetBSD: if_kse.c,v 1.52 2020/04/01 00:07:04 nisimura Exp $	*/
+/*	$NetBSD: if_kse.c,v 1.53 2020/04/01 04:00:14 nisimura Exp $	*/
 
 /*-
  * Copyright (c) 2006 The NetBSD Foundation, Inc.
@@ -34,7 +34,7 @@
  */
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: if_kse.c,v 1.52 2020/04/01 00:07:04 nisimura Exp $");
+__KERNEL_RCSID(0, "$NetBSD: if_kse.c,v 1.53 2020/04/01 04:00:14 nisimura Exp $");
 
 #include 
 #include 
@@ -332,7 +332,7 @@ static void kse_watchdog(struct ifnet *)
 static int kse_init(struct ifnet *);
 static void kse_stop(struct ifnet *, int);
 static void kse_reset(struct kse_softc *);
-static void kse_set_filter(struct kse_softc *);
+static void kse_set_rcvfilt(struct kse_softc *);
 static int add_rxbuf(struct kse_softc *, int);
 static void rxdrain(struct kse_softc *);
 static int kse_intr(void *);
@@ -726,7 +726,7 @@ kse_ioctl(struct ifnet *ifp, u_long cmd,
 			 * Multicast list has changed; set the hardware filter
 			 * accordingly.
 			 */
-			kse_set_filter(sc);
+			kse_set_rcvfilt(sc);
 		}
 		break;
 	}
@@ -831,7 +831,7 @@ kse_init(struct ifnet *ifp)
 	}
 
 	/* accept multicast frame or run promisc mode */
-	kse_set_filter(sc);
+	kse_set_rcvfilt(sc);
 
 	/* set current media */
 	if (sc->sc_chip == 0x8841)
@@ -1085,7 +1085,7 @@ kse_start(struct ifnet *ifp)
 }
 
 static void
-kse_set_filter(struct kse_softc *sc)
+kse_set_rcvfilt(struct kse_softc *sc)
 {
 	struct ether_multistep step;
 	struct ether_multi *enm;
@@ -1104,6 +1104,7 @@ kse_set_filter(struct kse_softc *sc)
 	ETHER_LOCK(ec);
 	if (ifp->if_flags & IFF_PROMISC) {
 		ec->ec_flags |= ETHER_F_ALLMULTI;
+		ETHER_UNLOCK(ec);
 		/* run promisc. mode */
 		sc->sc_rxc |= RXC_RA;
 		goto update;



CVS commit: src/sys/dev/pci

2020-03-31 Thread Tohru Nishimura
Module Name:src
Committed By:   nisimura
Date:   Wed Apr  1 04:00:14 UTC 2020

Modified Files:
src/sys/dev/pci: if_kse.c

Log Message:
insert missing ETHER_UNLOCK()


To generate a diff of this commit:
cvs rdiff -u -r1.52 -r1.53 src/sys/dev/pci/if_kse.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.



CVS commit: src/sys/dev/pci

2020-03-31 Thread Tohru Nishimura
Module Name:src
Committed By:   nisimura
Date:   Wed Apr  1 00:07:04 UTC 2020

Modified Files:
src/sys/dev/pci: if_kse.c

Log Message:
switch to use ETHER_F_ALLMULTI flag


To generate a diff of this commit:
cvs rdiff -u -r1.51 -r1.52 src/sys/dev/pci/if_kse.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/dev/pci/if_kse.c
diff -u src/sys/dev/pci/if_kse.c:1.51 src/sys/dev/pci/if_kse.c:1.52
--- src/sys/dev/pci/if_kse.c:1.51	Tue Mar 24 04:00:26 2020
+++ src/sys/dev/pci/if_kse.c	Wed Apr  1 00:07:04 2020
@@ -1,4 +1,4 @@
-/*	$NetBSD: if_kse.c,v 1.51 2020/03/24 04:00:26 nisimura Exp $	*/
+/*	$NetBSD: if_kse.c,v 1.52 2020/04/01 00:07:04 nisimura Exp $	*/
 
 /*-
  * Copyright (c) 2006 The NetBSD Foundation, Inc.
@@ -34,7 +34,7 @@
  */
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: if_kse.c,v 1.51 2020/03/24 04:00:26 nisimura Exp $");
+__KERNEL_RCSID(0, "$NetBSD: if_kse.c,v 1.52 2020/04/01 00:07:04 nisimura Exp $");
 
 #include 
 #include 
@@ -1096,18 +1096,19 @@ kse_set_filter(struct kse_softc *sc)
 
 	sc->sc_rxc &= ~(RXC_MHTE | RXC_RM | RXC_RA);
 
-	if (ifp->if_flags & IFF_PROMISC) {
-		ifp->if_flags |= IFF_ALLMULTI;
-		goto update;
-	}
-	ifp->if_flags &= ~IFF_ALLMULTI;
-
 	/* clear perfect match filter and prepare mcast hash table */
 	for (i = 0; i < 16; i++)
 		 CSR_WRITE_4(sc, MAAH0 + i*8, 0);
 	crc = mchash[0] = mchash[1] = 0;
 
 	ETHER_LOCK(ec);
+	if (ifp->if_flags & IFF_PROMISC) {
+		ec->ec_flags |= ETHER_F_ALLMULTI;
+		/* run promisc. mode */
+		sc->sc_rxc |= RXC_RA;
+		goto update;
+	}
+	ec->ec_flags &= ~ETHER_F_ALLMULTI;
 	ETHER_FIRST_MULTI(step, ec, enm);
 	i = 0;
 	while (enm != NULL) {
@@ -1120,8 +1121,10 @@ kse_set_filter(struct kse_softc *sc)
 			 * ranges is for IP multicast routing, for which the
 			 * range is big enough to require all bits set.)
 			 */
+			ec->ec_flags |= ETHER_F_ALLMULTI;
 			ETHER_UNLOCK(ec);
-			ifp->if_flags |= IFF_ALLMULTI;
+			/* accept all multicast */
+			sc->sc_rxc |= RXC_RM;
 			goto update;
 		}
 #if KSE_MCASTDEBUG == 1
@@ -1150,14 +1153,8 @@ kse_set_filter(struct kse_softc *sc)
 		sc->sc_rxc |= RXC_MHTE;
 	CSR_WRITE_4(sc, MTR0, mchash[0]);
 	CSR_WRITE_4(sc, MTR1, mchash[1]);
-	return;
-
  update:
 	/* With RA or RM, MHTE/MTR0/MTR1 are never consulted. */
-	if (ifp->if_flags & IFF_PROMISC)
-		sc->sc_rxc |= RXC_RA;
-	else
-		sc->sc_rxc |= RXC_RM;
 	return;
 }
 



CVS commit: src/sys/dev/pci

2020-03-31 Thread Tohru Nishimura
Module Name:src
Committed By:   nisimura
Date:   Wed Apr  1 00:07:04 UTC 2020

Modified Files:
src/sys/dev/pci: if_kse.c

Log Message:
switch to use ETHER_F_ALLMULTI flag


To generate a diff of this commit:
cvs rdiff -u -r1.51 -r1.52 src/sys/dev/pci/if_kse.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.



CVS commit: src/sys/dev/usb

2020-03-31 Thread Tohru Nishimura
Module Name:src
Committed By:   nisimura
Date:   Tue Mar 31 23:26:32 UTC 2020

Modified Files:
src/sys/dev/usb: if_mos.c

Log Message:
iron out multicast filter logic and pick better name for its work


To generate a diff of this commit:
cvs rdiff -u -r1.5 -r1.6 src/sys/dev/usb/if_mos.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.



CVS commit: src/sys/dev/usb

2020-03-31 Thread Tohru Nishimura
Module Name:src
Committed By:   nisimura
Date:   Tue Mar 31 23:26:32 UTC 2020

Modified Files:
src/sys/dev/usb: if_mos.c

Log Message:
iron out multicast filter logic and pick better name for its work


To generate a diff of this commit:
cvs rdiff -u -r1.5 -r1.6 src/sys/dev/usb/if_mos.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/dev/usb/if_mos.c
diff -u src/sys/dev/usb/if_mos.c:1.5 src/sys/dev/usb/if_mos.c:1.6
--- src/sys/dev/usb/if_mos.c:1.5	Sun Mar 15 23:04:50 2020
+++ src/sys/dev/usb/if_mos.c	Tue Mar 31 23:26:32 2020
@@ -1,4 +1,4 @@
-/*	$NetBSD: if_mos.c,v 1.5 2020/03/15 23:04:50 thorpej Exp $	*/
+/*	$NetBSD: if_mos.c,v 1.6 2020/03/31 23:26:32 nisimura Exp $	*/
 /*	$OpenBSD: if_mos.c,v 1.40 2019/07/07 06:40:10 kevlo Exp $	*/
 
 /*
@@ -72,7 +72,7 @@
  */
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: if_mos.c,v 1.5 2020/03/15 23:04:50 thorpej Exp $");
+__KERNEL_RCSID(0, "$NetBSD: if_mos.c,v 1.6 2020/03/31 23:26:32 nisimura Exp $");
 
 #include 
 
@@ -454,14 +454,14 @@ mos_uno_mii_statchg(struct ifnet *ifp)
 }
 
 static void
-mos_setiff_locked(struct usbnet *un)
+mos_rcvfilt_locked(struct usbnet *un)
 {
 	struct ifnet		*ifp = usbnet_ifp(un);
 	struct ethercom		*ec = usbnet_ec(un);
 	struct ether_multi	*enm;
 	struct ether_multistep	step;
-	u_int32_t		h = 0;
-	u_int8_t		rxmode, hashtbl[8] = { 0, 0, 0, 0, 0, 0, 0, 0 };
+	u_int32_t h = 0;
+	u_int8_t rxmode, mchash[8] = { 0, 0, 0, 0, 0, 0, 0, 0 };
 
 	if (usbnet_isdying(un))
 		return;
@@ -471,40 +471,39 @@ mos_setiff_locked(struct usbnet *un)
 
 	ETHER_LOCK(ec);
 	if (ifp->if_flags & IFF_PROMISC) {
-allmulti:
 		ec->ec_flags |= ETHER_F_ALLMULTI;
-		rxmode |= MOS_CTL_ALLMULTI;
-		if (ifp->if_flags & IFF_PROMISC)
-			rxmode |= MOS_CTL_RX_PROMISC;
-	} else {
-		/* now program new ones */
-		ec->ec_flags &= ~ETHER_F_ALLMULTI;
-
-		ETHER_FIRST_MULTI(step, ec, enm);
-		while (enm != NULL) {
-			if (memcmp(enm->enm_addrlo, enm->enm_addrhi,
-			ETHER_ADDR_LEN)) {
-memset(hashtbl, 0, sizeof(hashtbl));
-goto allmulti;
-			}
-			h = ether_crc32_be(enm->enm_addrlo,
-			ETHER_ADDR_LEN) >> 26;
-			hashtbl[h / 8] |= 1 << (h % 8);
-
-			ETHER_NEXT_MULTI(step, enm);
+		ETHER_UNLOCK(ec);
+		/* run promisc. mode */
+		rxmode |= MOS_CTL_ALLMULTI; /* ??? */
+		rxmode |= MOS_CTL_RX_PROMISC;
+		goto update;
+	}
+	ec->ec_flags &= ~ETHER_F_ALLMULTI;
+	ETHER_FIRST_MULTI(step, ec, enm);
+	while (enm != NULL) {
+		if (memcmp(enm->enm_addrlo, enm->enm_addrhi, ETHER_ADDR_LEN)) {
+			ec->ec_flags |= ETHER_F_ALLMULTI;
+			ETHER_UNLOCK(ec);
+			memset(mchash, 0, sizeof(mchash)); /* correct ??? */
+			/* accept all mulicast frame */
+			rxmode |= MOS_CTL_ALLMULTI;
+			goto update;
 		}
+		h = ether_crc32_be(enm->enm_addrlo, ETHER_ADDR_LEN);
+		/* 3(31:29) and 3(28:26) sampling to have uint8_t[8] */
+		mchash[h >> 29] |= 1 << ((h >> 26) % 8);
+		ETHER_NEXT_MULTI(step, enm);
 	}
 	ETHER_UNLOCK(ec);
-
+	/* MOS receive filter is always on */
+ update:
 	/* 
 	 * The datasheet claims broadcast frames were always accepted
 	 * regardless of filter settings. But the hardware seems to
 	 * filter broadcast frames, so pass them explicitly.
 	 */
-	h = ether_crc32_be(etherbroadcastaddr, ETHER_ADDR_LEN) >> 26;
-	hashtbl[h / 8] |= 1 << (h % 8);
-
-	mos_write_mcast(un, hashtbl);
+	mchash[7] |= 0x80;
+	mos_write_mcast(un, mchash);
 	mos_reg_write_1(un, MOS_CTL, rxmode);
 }
 
@@ -745,7 +744,7 @@ mos_init_locked(struct ifnet *ifp)
 	mos_reg_write_1(un, MOS_IPG1, ipgs[1]);
 
 	/* Program promiscuous mode and multicast filters. */
-	mos_setiff_locked(un);
+	mos_rcvfilt_locked(un);
 
 	/* Enable receiver and transmitter, bridge controls speed/duplex mode */
 	rxmode = mos_reg_read_1(un, MOS_CTL);
@@ -781,7 +780,7 @@ mos_uno_ioctl(struct ifnet *ifp, u_long 
 	switch (cmd) {
 	case SIOCADDMULTI:
 	case SIOCDELMULTI:
-		mos_setiff_locked(un);
+		mos_rcvfilt_locked(un);
 		break;
 	default:
 		break;



CVS commit: src/sys/dev/ic

2020-03-31 Thread Tohru Nishimura
Module Name:src
Committed By:   nisimura
Date:   Tue Mar 31 07:50:43 UTC 2020

Modified Files:
src/sys/dev/ic: dm9000.c

Log Message:
fix negated loop condition. make break when reset.


To generate a diff of this commit:
cvs rdiff -u -r1.25 -r1.26 src/sys/dev/ic/dm9000.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/dev/ic/dm9000.c
diff -u src/sys/dev/ic/dm9000.c:1.25 src/sys/dev/ic/dm9000.c:1.26
--- src/sys/dev/ic/dm9000.c:1.25	Tue Mar 31 02:47:34 2020
+++ src/sys/dev/ic/dm9000.c	Tue Mar 31 07:50:42 2020
@@ -1,4 +1,4 @@
-/*	$NetBSD: dm9000.c,v 1.25 2020/03/31 02:47:34 nisimura Exp $	*/
+/*	$NetBSD: dm9000.c,v 1.26 2020/03/31 07:50:42 nisimura Exp $	*/
 
 /*
  * Copyright (c) 2009 Paul Fleischer
@@ -484,7 +484,7 @@ mii_statchg(struct ifnet *ifp)
 	nsr = dme_read(sc, DM9000_NSR);
 	spd = Mbps[!!(nsr & DM9000_NSR_SPEED)];
 	/* speed/duplexity available also in reg 0x11 of internal PHY */
-#if 1
+#if 0
 	if (nsr & DM9000_NSR_LINKST)
 		printf("link up,spd%d", spd);
 	else
@@ -727,15 +727,16 @@ dme_receive(struct ifnet *ifp)
 if_statinc(ifp, if_collisions);
 continue;
 			}
-			/* pick and forward the this frame to ifq */
+			/* pick and forward this frame to ifq */
 			if_percpuq_enqueue(ifp->if_percpuq, m);
 		} else if (avail != 00) {
 			/* Should this be logged somehow? */
 			printf("%s: Resetting chip\n",
 			   device_xname(sc->sc_dev));
 			dme_reset(sc);
+			break;
 		}
-	} while (avail != 01);
+	} while (avail == 01);
 	/* frame receieved successfully */
 }
 



CVS commit: src/sys/dev/ic

2020-03-31 Thread Tohru Nishimura
Module Name:src
Committed By:   nisimura
Date:   Tue Mar 31 07:50:43 UTC 2020

Modified Files:
src/sys/dev/ic: dm9000.c

Log Message:
fix negated loop condition. make break when reset.


To generate a diff of this commit:
cvs rdiff -u -r1.25 -r1.26 src/sys/dev/ic/dm9000.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.



CVS commit: src/sys/conf

2020-03-30 Thread Tohru Nishimura
Module Name:src
Committed By:   nisimura
Date:   Tue Mar 31 03:42:10 UTC 2020

Modified Files:
src/sys/conf: files

Log Message:
dme needs mii


To generate a diff of this commit:
cvs rdiff -u -r1.1261 -r1.1262 src/sys/conf/files

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.



CVS commit: src/sys/conf

2020-03-30 Thread Tohru Nishimura
Module Name:src
Committed By:   nisimura
Date:   Tue Mar 31 03:42:10 UTC 2020

Modified Files:
src/sys/conf: files

Log Message:
dme needs mii


To generate a diff of this commit:
cvs rdiff -u -r1.1261 -r1.1262 src/sys/conf/files

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/conf/files
diff -u src/sys/conf/files:1.1261 src/sys/conf/files:1.1262
--- src/sys/conf/files:1.1261	Sun Mar  8 00:18:41 2020
+++ src/sys/conf/files	Tue Mar 31 03:42:10 2020
@@ -1,4 +1,4 @@
-#	$NetBSD: files,v 1.1261 2020/03/08 00:18:41 christos Exp $
+#	$NetBSD: files,v 1.1262 2020/03/31 03:42:10 nisimura Exp $
 #	@(#)files.newconf	7.5 (Berkeley) 5/10/93
 
 version 	20171118
@@ -1366,7 +1366,7 @@ file	dev/ic/bwi.c			bwi
 
 # DM9000 Ethernet controllers
 #
-device	dme: arp, ether, ifnet
+device	dme: arp, ether, ifnet, mii
 file	dev/ic/dm9000.c			dme
 
 # NVM Express Controller



CVS commit: src/sys/dev/ic

2020-03-30 Thread Tohru Nishimura
Module Name:src
Committed By:   nisimura
Date:   Tue Mar 31 02:47:35 UTC 2020

Modified Files:
src/sys/dev/ic: dm9000.c

Log Message:
add comment to clearify hw nature


To generate a diff of this commit:
cvs rdiff -u -r1.24 -r1.25 src/sys/dev/ic/dm9000.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/dev/ic/dm9000.c
diff -u src/sys/dev/ic/dm9000.c:1.24 src/sys/dev/ic/dm9000.c:1.25
--- src/sys/dev/ic/dm9000.c:1.24	Tue Mar 31 02:32:25 2020
+++ src/sys/dev/ic/dm9000.c	Tue Mar 31 02:47:34 2020
@@ -1,4 +1,4 @@
-/*	$NetBSD: dm9000.c,v 1.24 2020/03/31 02:32:25 nisimura Exp $	*/
+/*	$NetBSD: dm9000.c,v 1.25 2020/03/31 02:47:34 nisimura Exp $	*/
 
 /*
  * Copyright (c) 2009 Paul Fleischer
@@ -253,10 +253,11 @@ dme_attach(struct dme_softc *sc, const u
 	mii->mii_writereg = mii_writereg;
 	mii->mii_statchg = mii_statchg;
 
+	/* assume davicom PHY at 1. ext PHY could be hooked but only at 0-3 */
 	sc->sc_ethercom.ec_mii = mii;
 	ifmedia_init(ifm, 0, ether_mediachange, ether_mediastatus);
-	mii_attach(sc->sc_dev, mii, 0x,
-		1 /* PHY 1 */, MII_OFFSET_ANY, 0);
+	mii_attach(sc->sc_dev, mii, 0x, 1 /* PHY 1 */,
+		MII_OFFSET_ANY, 0);
 	if (LIST_FIRST(>mii_phys) == NULL) {
 		ifmedia_add(ifm, IFM_ETHER | IFM_NONE, 0, NULL);
 		ifmedia_set(ifm, IFM_ETHER | IFM_NONE);
@@ -289,6 +290,7 @@ dme_attach(struct dme_softc *sc, const u
 	io_mode = (dme_read(sc, DM9000_ISR) &
 	DM9000_IOMODE_MASK) >> DM9000_IOMODE_SHIFT;
 
+	/* frame body read/write ops in 2 byte quantity or byte-wise. */
 	DPRINTF(("DM9000 Operation Mode: "));
 	switch (io_mode) {
 	case DM9000_MODE_8BIT:



CVS commit: src/sys/dev/ic

2020-03-30 Thread Tohru Nishimura
Module Name:src
Committed By:   nisimura
Date:   Tue Mar 31 02:47:35 UTC 2020

Modified Files:
src/sys/dev/ic: dm9000.c

Log Message:
add comment to clearify hw nature


To generate a diff of this commit:
cvs rdiff -u -r1.24 -r1.25 src/sys/dev/ic/dm9000.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.



CVS commit: src/sys/dev/ic

2020-03-30 Thread Tohru Nishimura
Module Name:src
Committed By:   nisimura
Date:   Tue Mar 31 02:32:25 UTC 2020

Modified Files:
src/sys/dev/ic: dm9000.c dm9000reg.h dm9000var.h

Log Message:
- reorgazine the entire structure to utilise ifmedia(4)/mii(4) and
  redefine starting point of debug.
- nuke duplicated standard MII register definition.  Davicom PHY extension
  is defined in dev/mii/dmphyreg.h


To generate a diff of this commit:
cvs rdiff -u -r1.23 -r1.24 src/sys/dev/ic/dm9000.c
cvs rdiff -u -r1.3 -r1.4 src/sys/dev/ic/dm9000reg.h
cvs rdiff -u -r1.5 -r1.6 src/sys/dev/ic/dm9000var.h

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/dev/ic/dm9000.c
diff -u src/sys/dev/ic/dm9000.c:1.23 src/sys/dev/ic/dm9000.c:1.24
--- src/sys/dev/ic/dm9000.c:1.23	Sun Mar 29 23:16:52 2020
+++ src/sys/dev/ic/dm9000.c	Tue Mar 31 02:32:25 2020
@@ -1,4 +1,4 @@
-/*	$NetBSD: dm9000.c,v 1.23 2020/03/29 23:16:52 nisimura Exp $	*/
+/*	$NetBSD: dm9000.c,v 1.24 2020/03/31 02:32:25 nisimura Exp $	*/
 
 /*
  * Copyright (c) 2009 Paul Fleischer
@@ -89,29 +89,26 @@
 #include 
 
 #include 
-#include 
-#include 
-#include 
-#include 
-#include 
+#include 
+#include 
 #include 
+#include 
+#include 
 #include 
-#include 
 #include 
+#include 
+#include 
+#include 
+#include 
 
 #include 
+#include 
 #include 
 #include 
+#include 
+#include 
 #include 
 
-#ifdef INET
-#include 
-#include 
-#endif
-
-#include 
-#include 
-
 #include 
 #include 
 
@@ -159,561 +156,424 @@
 #define TX_DATA_DPRINTF(s) do {} while (/*CONSTCOND*/0)
 #endif
 
-/*** Internal PHY functions ***/
-uint16_t dme_phy_read(struct dme_softc *, int );
-void	dme_phy_write(struct dme_softc *, int, uint16_t);
-void	dme_phy_init(struct dme_softc *);
-void	dme_phy_reset(struct dme_softc *);
-void	dme_phy_update_media(struct dme_softc *);
-void	dme_phy_check_link(void *);
-
-/*** Methods registered in struct ifnet ***/
-void	dme_start_output(struct ifnet *);
-int	dme_init(struct ifnet *);
-int	dme_ioctl(struct ifnet *, u_long, void *);
-void	dme_stop(struct ifnet *, int);
-
-int	dme_mediachange(struct ifnet *);
-void	dme_mediastatus(struct ifnet *, struct ifmediareq *);
-
-/*** Internal methods ***/
-
-/* Prepare data to be transmitted (i.e. dequeue and load it into the DM9000) */
-void	dme_prepare(struct dme_softc *, struct ifnet *);
-
-/* Transmit prepared data */
-void	dme_transmit(struct dme_softc *);
-
-/* Receive data */
-void	dme_receive(struct dme_softc *, struct ifnet *);
-
-/* Software Initialize/Reset of the DM9000 */
-void	dme_reset(struct dme_softc *);
-
-/* Configure multicast filter */
-void	dme_set_addr_filter(struct dme_softc *);
-
-/* Set media */
-int	dme_set_media(struct dme_softc *, int );
-
-/* Read/write packet data from/to DM9000 IC in various transfer sizes */
-int	dme_pkt_read_2(struct dme_softc *, struct ifnet *, struct mbuf **);
-int	dme_pkt_write_2(struct dme_softc *, struct mbuf *);
-int	dme_pkt_read_1(struct dme_softc *, struct ifnet *, struct mbuf **);
-int	dme_pkt_write_1(struct dme_softc *, struct mbuf *);
-/* TODO: Implement 32 bit read/write functions */
-
-uint16_t
-dme_phy_read(struct dme_softc *sc, int reg)
-{
-	uint16_t val;
-	/* Select Register to read*/
-	dme_write(sc, DM9000_EPAR, DM9000_EPAR_INT_PHY +
-	(reg & DM9000_EPAR_EROA_MASK));
-	/* Select read operation (DM9000_EPCR_ERPRR) from the PHY */
-	dme_write(sc, DM9000_EPCR, DM9000_EPCR_ERPRR + DM9000_EPCR_EPOS_PHY);
-
-	/* Wait until access to PHY has completed */
-	while (dme_read(sc, DM9000_EPCR) & DM9000_EPCR_ERRE)
-		;
-
-	/* Reset ERPRR-bit */
-	dme_write(sc, DM9000_EPCR, DM9000_EPCR_EPOS_PHY);
-
-	val = dme_read(sc, DM9000_EPDRL);
-	val += dme_read(sc, DM9000_EPDRH) << 8;
-
-	return val;
-}
-
-void
-dme_phy_write(struct dme_softc *sc, int reg, uint16_t value)
-{
-	/* Select Register to write*/
-	dme_write(sc, DM9000_EPAR, DM9000_EPAR_INT_PHY +
-	(reg & DM9000_EPAR_EROA_MASK));
-
-	/* Write data to the two data registers */
-	dme_write(sc, DM9000_EPDRL, value & 0xFF);
-	dme_write(sc, DM9000_EPDRH, (value >> 8) & 0xFF);
-
-	/* Select write operation (DM9000_EPCR_ERPRW) from the PHY */
-	dme_write(sc, DM9000_EPCR, DM9000_EPCR_ERPRW + DM9000_EPCR_EPOS_PHY);
-
-	/* Wait until access to PHY has completed */
-	while (dme_read(sc, DM9000_EPCR) & DM9000_EPCR_ERRE)
-		;
-
-	/* Reset ERPRR-bit */
-	dme_write(sc, DM9000_EPCR, DM9000_EPCR_EPOS_PHY);
-}
-
-void
-dme_phy_init(struct dme_softc *sc)
-{
-	u_int ifm_media = sc->sc_media.ifm_media;
-	uint32_t bmcr, anar;
-
-	bmcr = dme_phy_read(sc, DM9000_PHY_BMCR);
-	anar = dme_phy_read(sc, DM9000_PHY_ANAR);
-
-	anar = anar & ~DM9000_PHY_ANAR_10_HDX
-		& ~DM9000_PHY_ANAR_10_FDX
-		& ~DM9000_PHY_ANAR_TX_HDX
-		& ~DM9000_PHY_ANAR_TX_FDX;
-
-	switch (IFM_SUBTYPE(ifm_media)) {
-	case IFM_AUTO:
-		bmcr |= DM9000_PHY_BMCR_AUTO_NEG_EN;
-		anar |= DM9000_PHY_ANAR_10_HDX |
-			DM9000_PHY_ANAR_10_FDX |
-			DM9000_PHY_ANAR_TX_HDX |
-			DM9000_PHY_ANAR_TX_FDX;
-		

CVS commit: src/sys/dev/ic

2020-03-30 Thread Tohru Nishimura
Module Name:src
Committed By:   nisimura
Date:   Tue Mar 31 02:32:25 UTC 2020

Modified Files:
src/sys/dev/ic: dm9000.c dm9000reg.h dm9000var.h

Log Message:
- reorgazine the entire structure to utilise ifmedia(4)/mii(4) and
  redefine starting point of debug.
- nuke duplicated standard MII register definition.  Davicom PHY extension
  is defined in dev/mii/dmphyreg.h


To generate a diff of this commit:
cvs rdiff -u -r1.23 -r1.24 src/sys/dev/ic/dm9000.c
cvs rdiff -u -r1.3 -r1.4 src/sys/dev/ic/dm9000reg.h
cvs rdiff -u -r1.5 -r1.6 src/sys/dev/ic/dm9000var.h

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.



CVS commit: src/sys/dev/ic

2020-03-29 Thread Tohru Nishimura
Module Name:src
Committed By:   nisimura
Date:   Mon Mar 30 00:01:57 UTC 2020

Modified Files:
src/sys/dev/ic: dm9000reg.h

Log Message:
DM9000 add register description


To generate a diff of this commit:
cvs rdiff -u -r1.2 -r1.3 src/sys/dev/ic/dm9000reg.h

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.



CVS commit: src/sys/dev/ic

2020-03-29 Thread Tohru Nishimura
Module Name:src
Committed By:   nisimura
Date:   Mon Mar 30 00:01:57 UTC 2020

Modified Files:
src/sys/dev/ic: dm9000reg.h

Log Message:
DM9000 add register description


To generate a diff of this commit:
cvs rdiff -u -r1.2 -r1.3 src/sys/dev/ic/dm9000reg.h

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/dev/ic/dm9000reg.h
diff -u src/sys/dev/ic/dm9000reg.h:1.2 src/sys/dev/ic/dm9000reg.h:1.3
--- src/sys/dev/ic/dm9000reg.h:1.2	Sat Jan 28 08:29:55 2012
+++ src/sys/dev/ic/dm9000reg.h	Mon Mar 30 00:01:57 2020
@@ -1,4 +1,4 @@
-/*	$NetBSD: dm9000reg.h,v 1.2 2012/01/28 08:29:55 nisimura Exp $	*/
+/*	$NetBSD: dm9000reg.h,v 1.3 2020/03/30 00:01:57 nisimura Exp $	*/
 
 /*
  * Copyright (c) 2009 Paul Fleischer
@@ -39,135 +39,134 @@
 #define DM9000_IOSIZE	4	/* XXX: Depends on the wiring of the address lines. */
 
 #define DM9000_NCR		0x00
-#define  DM9000_NCR_RST		(1 << 0)
+#define  DM9000_NCR_RST		(1<<0)	/* reset chip, self clear */
 #define  DM9000_NCR_LBK_MASK	(0x06)
 #define  DM9000_NCR_LBK_SHIFT	(1)
-#define  DM9000_NCR_LBK_MAC_INTERNAL ( 1 << DM9000_NCR_LBK_SHIFT )
-#define  DM9000_NCR_LBK_NORMAL	( 0 << DM9000_NCR_LBK_SHIFT)
-#define  DM9000_NCR_LBK_INT_PHY ( 2 << DM9000_NCR_LBK_SHIFT)
-#define  DM9000_NCR_FDX		(1 << 3)
-#define  DM9000_NCR_FCOL	(1 << 4)
-#define  DM9000_NCR_WAKEEN	(1 << 6)
-#define  DM9000_NCR_EXY_PHY	(1 << 7)
+#define  DM9000_NCR_LBK_MAC_INTERNAL (1<1522) */
+#define  DM9000_RCR_WTDIS	(1<<6)	/* disable Rx watchdog timer */
 #define DM9000_RSR		0x06
-#define  DM9000_RSR_FOE		(1<<0)
+#define  DM9000_RSR_FOE		(1<<0)	/* Rx FIFO overflow detected */
 #define  DM9000_RSR_CE		(1<<1)
 #define  DM9000_RSR_AE		(1<<2)
 #define  DM9000_RSR_PLE		(1<<3)
 #define  DM9000_RSR_RWTO	(1<<4)
 #define  DM9000_RSR_LCS		(1<<5)
-#define  DM9000_RSR_MF		(1<<6)
-#define  DM9000_RSR_RF		(1<<7)
+#define  DM9000_RSR_MF		(1<<6)	/* mcast/bcast frame received */
+#define  DM9000_RSR_RF		(1<<7)	/* runt frame received (<64 bytes) */
 #define DM9000_ROCR		0x07
 #define DM9000_BPTR		0x08
 #define DM9000_FCTR		0x09
 #define DM9000_FCR		0x0A
-#define  DM9000_FCR_FLCE	(1 << 0)
-#define  DM9000_FCR_RXPCS	(1 << 1)
-#define  DM9000_FCR_RXPS	(1 << 2)
-#define  DM9000_FCR_BKPM	(1 << 3)
-#define  DM9000_FCR_BKPA	(1 << 4)
-#define  DM9000_FCR_TXPEN	(1 << 5)
-#define  DM9000_FCR_TXPF	(1 << 6)
-#define  DM9000_FCR_TXP0	(1 << 7)
+#define  DM9000_FCR_FLCE	(1<<0)	/* flow control enable */
+#define  DM9000_FCR_RXPCS	(1<<1)	/* Rx PAUSE current status */
+#define  DM9000_FCR_RXPS	(1<<2)	/* Rx PAUSE status, read to clear */
+#define  DM9000_FCR_BKPM	(1<<3)
+#define  DM9000_FCR_BKPA	(1<<4)
+#define  DM9000_FCR_TXPEN	(1<<5)	/* force PAUSE/unPAUSE */
+#define  DM9000_FCR_TXPF	(1<<6)	/* Tx PAUSE packet (when full */
+#define  DM9000_FCR_TXP0	(1<<7)	/* Tx PAUSE packet (when empty) */
 #define DM9000_EPCR		0x0B
-#define  DM9000_EPCR_ERRE	(1 << 0)
-#define  DM9000_EPCR_ERPRW	(1 << 1)
-#define  DM9000_EPCR_ERPRR	(1 << 2)
-#define  DM9000_EPCR_EPOS_EEPROM (0 << 3)
-#define  DM9000_EPCR_EPOS_PHY(1 << 3)
-#define  DM9000_EPCR_WEP	(1 << 4)
-#define  DM9000_EPCR_REEP	(1 << 5)
-#define DM9000_EPAR		0x0C
-#define  DM9000_EPAR_EROA_MASK	0x3F /* bits 0-5 */
-#define  DM9000_EPAR_INT_PHY	0x40 /* EPAR[7:6] = 01 for internal PHY */
-#define DM9000_EPDRL		0x0D
-#define DM9000_EPDRH		0x0E
+#define  DM9000_EPCR_ERRE	(1<<0)	/* operation in progress, busy bit */
+#define  DM9000_EPCR_ERPRW	(1<<1)	/* instruct to write */
+#define  DM9000_EPCR_ERPRR	(1<<2)	/* instruct to read */
+#define  DM9000_EPCR_EPOS_EEPROM (0<<3)	/* 1: PHY op, 0: EEPROM op */
+#define  DM9000_EPCR_EPOS_PHY(1<<3)
+#define  DM9000_EPCR_WEP	(1<<4)
+#define  DM9000_EPCR_REEP	(1<<5)
+#define DM9000_EPAR		0x0C	/* 7:6 (!!) PHY id, 5:0 reg num */
+#define  DM9000_EPAR_EROA_MASK	0x3F	/* bits 0-5 */
+#define  DM9000_EPAR_INT_PHY	0x40	/* EPAR[7:6] = 01 for internal PHY */
+#define DM9000_EPDRL		0x0D	/* data 7:0 */
+#define DM9000_EPDRH		0x0E	/* data 15:8 */
 #define DM9000_WCR		0x0F
 
-#define DM9000_PAB0		0x10
+#define DM9000_PAB0		0x10	/* my station address 7:0 */
 #define DM9000_PAB1		0x11
 #define DM9000_PAB2		0x12
 #define DM9000_PAB3		0x13
 #define DM9000_PAB4		0x14
-#define DM9000_PAB5		0x15
+#define DM9000_PAB5		0x15	/* my station address 47:40 */
 
-#define DM9000_MAB0		0x16
+#define DM9000_MAB0		0x16	/* 64bit mcast hash filter 7:0 */
 #define DM9000_MAB1		0x17
 #define DM9000_MAB2		0x18
 #define DM9000_MAB3		0x19
 #define DM9000_MAB4		0x1A
 #define DM9000_MAB5		0x1B
 #define DM9000_MAB6		0x1C
-#define DM9000_MAB7		0x1D
+#define DM9000_MAB7		0x1D	/* 63:56, needs 0x80 to catch bcast */
 
 #define DM9000_GPCR		0x1E
-#define  DM9000_GPCR_GPIO0_OUT	(1 << 0)
+#define  DM9000_GPCR_GPIO0_OUT	(1<<0)
 #define DM9000_GPR		0x1F
-#define  DM9000_GPR_PHY_PWROFF	(1 << 0)
+#define  DM9000_GPR_PHY_PWROFF	(1<<0)	/* power down internal PHY */
 #define DM9000_TRPAL		0x22
 #define DM9000_TRPAH		0x23

CVS commit: src/sys/dev/ic

2020-03-29 Thread Tohru Nishimura
Module Name:src
Committed By:   nisimura
Date:   Sun Mar 29 23:16:52 UTC 2020

Modified Files:
src/sys/dev/ic: dm9000.c

Log Message:
reorganise rcv frame address filter code


To generate a diff of this commit:
cvs rdiff -u -r1.22 -r1.23 src/sys/dev/ic/dm9000.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.



CVS commit: src/sys/dev/ic

2020-03-29 Thread Tohru Nishimura
Module Name:src
Committed By:   nisimura
Date:   Sun Mar 29 23:16:52 UTC 2020

Modified Files:
src/sys/dev/ic: dm9000.c

Log Message:
reorganise rcv frame address filter code


To generate a diff of this commit:
cvs rdiff -u -r1.22 -r1.23 src/sys/dev/ic/dm9000.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/dev/ic/dm9000.c
diff -u src/sys/dev/ic/dm9000.c:1.22 src/sys/dev/ic/dm9000.c:1.23
--- src/sys/dev/ic/dm9000.c:1.22	Wed Jan 29 14:14:55 2020
+++ src/sys/dev/ic/dm9000.c	Sun Mar 29 23:16:52 2020
@@ -1,4 +1,4 @@
-/*	$NetBSD: dm9000.c,v 1.22 2020/01/29 14:14:55 thorpej Exp $	*/
+/*	$NetBSD: dm9000.c,v 1.23 2020/03/29 23:16:52 nisimura Exp $	*/
 
 /*
  * Copyright (c) 2009 Paul Fleischer
@@ -879,7 +879,7 @@ dme_reset(struct dme_softc *sc)
 	dme_write(sc, DM9000_IMR,
 	DM9000_IMR_PAR | DM9000_IMR_PRM | DM9000_IMR_PTM);
 
-	/* Setup multicast address filter, and enable RX. */
+	/* Setup multicast address filter, or run promisc. mode. */
 	dme_set_addr_filter(sc);
 
 	/* Obtain media information from PHY */
@@ -893,33 +893,30 @@ dme_reset(struct dme_softc *sc)
 void
 dme_set_addr_filter(struct dme_softc *sc)
 {
-	struct ether_multi	*enm;
-	struct ether_multistep	step;
-	struct ethercom		*ec;
-	struct ifnet		*ifp;
-	uint16_t		af[4];
-	int			i;
-
-	ec = >sc_ethercom;
-	ifp = >ec_if;
+	struct ethercom *ec = >sc_ethercom;
+	struct ifnet *ifp = >ec_if;
+	struct ether_multi *enm;
+	struct ether_multistep step;
+	uint8_t mchash[8] = { 0, 0, 0, 0, 0, 0, 0, 0 }; /* 64bit mchash */
+	uint32_t h = 0;
+	uint8_t rcr;
+
+	rcr = dme_read(sc, DM9000_RCR);
+	rcr &= ~(DM9000_RCR_PRMSC | DM9000_RCR_ALL);
+	dme_write(sc, DM9000_RCR, rcr &~ DM9000_RCR_RXEN);
 
+	ETHER_LOCK(ec);
 	if (ifp->if_flags & IFF_PROMISC) {
-		dme_write(sc, DM9000_RCR, DM9000_RCR_RXEN  |
-	  DM9000_RCR_WTDIS |
-	  DM9000_RCR_PRMSC);
-		ifp->if_flags |= IFF_ALLMULTI;
-		return;
+		ec->ec_flags |= ETHER_F_ALLMULTI;
+		ETHER_UNLOCK(ec);
+		/* run promisc. mode */
+		rcr |= DM9000_RCR_PRMSC;
+		goto update;
 	}
-
-	af[0] = af[1] = af[2] = af[3] = 0x;
-	ifp->if_flags &= ~IFF_ALLMULTI;
-
-	ETHER_LOCK(ec);
+	ec->ec_flags &= ~ETHER_F_ALLMULTI;
 	ETHER_FIRST_MULTI(step, ec, enm);
 	while (enm != NULL) {
-		uint16_t hash;
-		if (memcpy(enm->enm_addrlo, enm->enm_addrhi,
-		sizeof(enm->enm_addrlo))) {
+		if (memcpy(enm->enm_addrlo, enm->enm_addrhi, ETHER_ADDR_LEN)) {
 			/*
 			 * We must listen to a range of multicast addresses.
 			 * For now, just accept all multicasts, rather than
@@ -928,25 +925,25 @@ dme_set_addr_filter(struct dme_softc *sc
 			 * ranges is for IP multicast routing, for which the
 			 * range is big enough to require all bits set.)
 			 */
-			ifp->if_flags |= IFF_ALLMULTI;
-			af[0] = af[1] = af[2] = af[3] = 0x;
+			ec->ec_flags |= ETHER_F_ALLMULTI;
+			ETHER_UNLOCK(ec);
+			memset(mchash, 0xff, sizeof(mchash)); /* necessary? */
+			/* accept all mulicast frame */
+			rcr |= DM9000_RCR_ALL;
 			break;
-		} else {
-			hash = ether_crc32_le(enm->enm_addrlo, ETHER_ADDR_LEN) & 0x3F;
-			af[(uint16_t)(hash>>4)] |= (uint16_t)(1 << (hash % 16));
-			ETHER_NEXT_MULTI(step, enm);
 		}
+		h = ether_crc32_le(enm->enm_addrlo, ETHER_ADDR_LEN) & 0x3f;
+		/* 3(5:3) and 3(2:0) sampling to make uint8_t[8] */
+		mchash[h / 8] |= 1 << (h % 8);
+		ETHER_NEXT_MULTI(step, enm);
 	}
 	ETHER_UNLOCK(ec);
-
-	/* Write the multicast address filter */
-	for (i = 0; i < 4; i++) {
-		dme_write(sc, DM9000_MAB0+i*2, af[i] & 0xFF);
-		dme_write(sc, DM9000_MAB0+i*2+1, (af[i] >> 8) & 0xFF);
-	}
-
-	/* Setup RX controls */
-	dme_write(sc, DM9000_RCR, DM9000_RCR_RXEN | DM9000_RCR_WTDIS);
+	/* DM9000 receive filter is always on */
+	mchash[7] |= 0x80; /* to catch bcast frame */
+ update:
+	dme_write_c(sc, DM9000_MAB0, mchash, sizeof(mchash));
+	dme_write(sc, DM9000_RCR, rcr | DM9000_RCR_RXEN | DM9000_RCR_WTDIS);
+	return;
 }
 
 int



CVS commit: src/sys/arch/arm/sociox

2020-03-28 Thread Tohru Nishimura
Module Name:src
Committed By:   nisimura
Date:   Sat Mar 28 13:15:24 UTC 2020

Modified Files:
src/sys/arch/arm/sociox: if_scx.c

Log Message:
- comb down rcvfilt() filter adjustment  logic.
- some mii_statchg() can be written in simpler form.


To generate a diff of this commit:
cvs rdiff -u -r1.21 -r1.22 src/sys/arch/arm/sociox/if_scx.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/arm/sociox/if_scx.c
diff -u src/sys/arch/arm/sociox/if_scx.c:1.21 src/sys/arch/arm/sociox/if_scx.c:1.22
--- src/sys/arch/arm/sociox/if_scx.c:1.21	Fri Mar 27 13:00:13 2020
+++ src/sys/arch/arm/sociox/if_scx.c	Sat Mar 28 13:15:24 2020
@@ -1,4 +1,4 @@
-/*	$NetBSD: if_scx.c,v 1.21 2020/03/27 13:00:13 nisimura Exp $	*/
+/*	$NetBSD: if_scx.c,v 1.22 2020/03/28 13:15:24 nisimura Exp $	*/
 
 /*-
  * Copyright (c) 2020 The NetBSD Foundation, Inc.
@@ -57,7 +57,7 @@
  */
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: if_scx.c,v 1.21 2020/03/27 13:00:13 nisimura Exp $");
+__KERNEL_RCSID(0, "$NetBSD: if_scx.c,v 1.22 2020/03/28 13:15:24 nisimura Exp $");
 
 #include 
 #include 
@@ -673,7 +673,12 @@ scx_attach_i(struct scx_softc *sc)
 	int i, nseg, error = 0;
 
 	hwver = CSR_READ(sc, HWVER);	/* Socionext HW */
-	/* stored in big endian order */
+	dwimp = mac_read(sc, GMACIMPL);	/* DW EMAC XX.YY */
+	aprint_normal_dev(sc->sc_dev,
+	"Socionext NetSec GbE hw %d.%d impl 0x%x\n",
+	hwver >> 16, hwver & 0x, dwimp);
+
+	/* fetch MAC address in flash. stored in big endian order */
 	csr = bus_space_read_4(sc->sc_st, sc->sc_eesh, 0);
 	enaddr[0] = csr >> 24;
 	enaddr[1] = csr >> 16;
@@ -682,11 +687,6 @@ scx_attach_i(struct scx_softc *sc)
 	csr = bus_space_read_4(sc->sc_st, sc->sc_eesh, 4);
 	enaddr[4] = csr >> 24;
 	enaddr[5] = csr >> 16;
-	dwimp = mac_read(sc, GMACIMPL);	/* DW EMAC XX.YY */
-
-	aprint_normal_dev(sc->sc_dev,
-	"Socionext NetSec GbE hw %d.%d impl 0x%x\n",
-	hwver >> 16, hwver & 0x, dwimp);
 	aprint_normal_dev(sc->sc_dev,
 	"Ethernet address %s\n", ether_sprintf(enaddr));
 
@@ -1024,20 +1024,21 @@ scx_set_rcvfilt(struct scx_softc *sc)
 	csr &= ~(AFR_PR | AFR_PM | AFR_MHTE | AFR_HPF);
 	mac_write(sc, GMACAFR, csr);
 
+	/* clear 15 entry supplimental perfect match filter */
+	for (i = 1; i < 16; i++)
+		 mac_write(sc, GMACMAH(i), 0);
+	/* build 64 bit multicast hash filter */
+	crc = mchash[1] = mchash[0] = 0;
+
 	ETHER_LOCK(ec);
 	if (ifp->if_flags & IFF_PROMISC) {
 		ec->ec_flags |= ETHER_F_ALLMULTI;
 		ETHER_UNLOCK(ec);
+		/* run promisc. mode */
+		csr |= AFR_PR;
 		goto update;
 	}
 	ec->ec_flags &= ~ETHER_F_ALLMULTI;
-
-	/* clear 15 entry supplimental perfect match filter */
-	for (i = 1; i < 16; i++)
-		 mac_write(sc, GMACMAH(i), 0);
-	/* build 64 bit multicast hash filter */
-	crc = mchash[1] = mchash[0] = 0;
-
 	ETHER_FIRST_MULTI(step, ec, enm);
 	i = 1; /* slot 0 is occupied */
 	while (enm != NULL) {
@@ -1052,6 +1053,8 @@ scx_set_rcvfilt(struct scx_softc *sc)
 			 */
 			ec->ec_flags |= ETHER_F_ALLMULTI;
 			ETHER_UNLOCK(ec);
+			/* accept all multi */
+			csr |= AFR_PM;
 			goto update;
 		}
 printf("[%d] %s\n", i, ether_sprintf(enm->enm_addrlo));
@@ -1080,15 +1083,8 @@ printf("[%d] %s\n", i, ether_sprintf(enm
 	csr |= AFR_HPF; /* use hash+perfect */
 	mac_write(sc, GMACMHTH, mchash[1]);
 	mac_write(sc, GMACMHTL, mchash[0]);
-	mac_write(sc, GMACAFR, csr);
-	return;
-
  update:
 	/* With PR or PM, MHTE/MHTL/MHTH are never consulted. really? */
-	if (ifp->if_flags & IFF_PROMISC)
-		csr |= AFR_PR;	/* run promisc. mode */
-	else
-		csr |= AFR_PM;	/* accept all multicast */
 	mac_write(sc, GMACAFR, csr);
 	return;
 }
@@ -1110,18 +1106,19 @@ mii_statchg(struct ifnet *ifp)
 {
 	struct scx_softc *sc = ifp->if_softc;
 	struct mii_data *mii = >sc_mii;
-	struct ifmedia * ifm = >mii_media;
-	uint32_t mcr, fcr;
+	const int Mbps[4] = { 10, 100, 1000, 0 };
+	uint32_t miisr, mcr, fcr;
+	int spd;
 
-#if 1
 	/* decode MIISR register value */
-	uint32_t miisr = mac_read(sc, GMACMIISR);
-	int spd = (miisr >> 1) & 03;
+	miisr = mac_read(sc, GMACMIISR);
+	spd = Mbps[(miisr >> 1) & 03];
+#if 1
 	printf("MII link status (0x%x) %s",
 	miisr, (miisr & 8) ? "up" : "down");
 	if (miisr & 8) {
-		printf(" spd%d", (spd == 2) ? 1000 : (spd == 1) ? 100 : 10);
-		if (miisr & 1)
+		printf(" spd%d", spd);
+		if (miisr & 01)
 			printf(",full-duplex");
 	}
 	printf("\n");
@@ -1133,11 +1130,10 @@ mii_statchg(struct ifnet *ifp)
 
 	/* Adjust speed 1000/100/10. */
 	mcr = mac_read(sc, GMACMCR);
-	if (IFM_SUBTYPE(ifm->ifm_cur->ifm_media) == IFM_1000_T)
+	if (spd == 1000)
 		mcr &= ~MCR_USEMII; /* RGMII+SPD1000 */
 	else {
-		if (IFM_SUBTYPE(ifm->ifm_cur->ifm_media) == IFM_100_TX
-		&& sc->sc_100mii)
+		if (spd == 100 && sc->sc_100mii)
 			mcr |= MCR_SPD100;
 		mcr |= MCR_USEMII;
 	}
@@ -1148,12 +1144,12 @@ mii_statchg(struct ifnet *ifp)
 	/* Adjust duplexity and PAUSE flow control. */
 	mcr &= ~MCR_USEFDX;
 	fcr 

CVS commit: src/sys/arch/arm/sociox

2020-03-28 Thread Tohru Nishimura
Module Name:src
Committed By:   nisimura
Date:   Sat Mar 28 13:15:24 UTC 2020

Modified Files:
src/sys/arch/arm/sociox: if_scx.c

Log Message:
- comb down rcvfilt() filter adjustment  logic.
- some mii_statchg() can be written in simpler form.


To generate a diff of this commit:
cvs rdiff -u -r1.21 -r1.22 src/sys/arch/arm/sociox/if_scx.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.



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