Re: CVS commit: [matt-nb5-mips64] src/sys/arch/mips/mips
Hi Cliff, A couple of things with these changes: Module Name:src Committed By: cliff Date: Thu Jun 10 00:32:11 UTC 2010 Modified Files: src/sys/arch/mips/include [matt-nb5-mips64]: locore.h Log Message: - add lsw_bus_error to struct locoresw, provides hook to call for chip-specific bus error handling/decode from e.g. trap() and Module Name: src Committed By: cliff Date: Thu Jun 10 00:33:51 UTC 2010 Modified Files: src/sys/arch/mips/mips [matt-nb5-mips64]: trap.c Log Message: - in trap(), if traptype is bus error, call chip-specific bus error handler in locoresw: (*mips_locoresw.lsw_bus_error)(cause) 1: It's not obvious to me if you're trying to provide for a replacement bus error handler (as the commit seems to imply) or an assistant to the current bus error handler (which is what the code does). 2: With: if ((TRAPTYPE(cause) == 6) || (TRAPTYPE(cause) == 7)) (void)(*mips_locoresw.lsw_bus_error)(cause); please please avoid magic numbers - the intent of this isn't obvious at all. 3: It appears that only sbmips actually sets the lsw_bus_error handler, so a bus error on any other arch would NULL-deference and panic? 4: With: #ifdef MIPS3_PLUS #define TRAPTYPE(x) (((x) MIPS3_CR_EXC_CODE) MIPS_CR_EXC_CODE_SHIFT) #else #define TRAPTYPE(x) (((x) MIPS1_CR_EXC_CODE) MIPS_CR_EXC_CODE_SHIFT) #endif This looks like it assumes MIPS1 or MIPS3+ at compile time, but we can have one kernel that can run on both. This needs to be a runtime thing. Maybe create a macro/inline function to extract the EXC part of a cause reg in mips/include/cpureg.h too? 5: Is this worth generalising? Someone might want to add other CPU specific trap error handlers so it might be better doing something like: if (mips_locoresw.lsw_trap_error) (void)(*mips_locoresw.lsw_trap_error)(status, cause, vaddr, opc); and letting the handler determine which exception codes to deal with. This isn't in time critical code (it either panics or drops to ddb/kgdb) to the if () check doesn't hurt. This would also fix 3 above. Cheers, Simon.
Re: CVS commit: [matt-nb5-mips64] src/sys/arch/mips/mips
On May 4, 2010, at 5:30 PM, Simon Burge wrote: Matt Thomas wrote: Modified Files: src/sys/arch/mips/mips [matt-nb5-mips64]: pmap_segtab.c Log Message: Cleanup segtab allocation. Add some counters to monitor memory usage. +uint32_t nget_segtab; +uint32_t nput_segtab; +uint32_t npage_segtab; How quickly could these wrap? Not very and they are really intended for short use. 4B lwp creations :) I'm not worried about wrapping.
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/mips
Module Name:src
Committed By: matt
Date: Mon Mar 1 19:26:57 UTC 2010
Modified Files:
src/sys/arch/mips/mips [matt-nb5-mips64]: mips_fpu.c
Log Message:
Put fp_lock and fp_cv in a common structure.
To generate a diff of this commit:
cvs rdiff -u -r1.1.2.1 -r1.1.2.2 src/sys/arch/mips/mips/mips_fpu.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/mips/mips/mips_fpu.c
diff -u src/sys/arch/mips/mips/mips_fpu.c:1.1.2.1 src/sys/arch/mips/mips/mips_fpu.c:1.1.2.2
--- src/sys/arch/mips/mips/mips_fpu.c:1.1.2.1 Sun Feb 28 23:45:06 2010
+++ src/sys/arch/mips/mips/mips_fpu.c Mon Mar 1 19:26:57 2010
@@ -29,7 +29,7 @@
#include sys/cdefs.h
-__KERNEL_RCSID(0, $NetBSD: mips_fpu.c,v 1.1.2.1 2010/02/28 23:45:06 matt Exp $);
+__KERNEL_RCSID(0, $NetBSD: mips_fpu.c,v 1.1.2.2 2010/03/01 19:26:57 matt Exp $);
#include sys/param.h
#include sys/mutex.h
@@ -42,10 +42,14 @@
#include mips/regnum.h
#ifndef NOFPU
-kmutex_t fp_mutex __aligned(32);
+static struct {
+ kmutex_t fpx_mutex;
#ifdef MULTIPROCESSOR
-kcondvar_t fp_cv __aligned(32);
+ kcondvar_t fpx_cv;
#endif
+} fp_lockinfo __aligned(COHERENCY_UNIT);
+#define fp_mutex fp_lockinfo.fpx_mutex
+#define fp_cv fp_lockinfo.fpx_cv
#endif /* !NOFPU */
void
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/mips
Module Name:src Committed By: matt Date: Mon Mar 1 23:53:26 UTC 2010 Modified Files: src/sys/arch/mips/mips [matt-nb5-mips64]: pmap_tlb.c Log Message: Fix KASSERT botch. To generate a diff of this commit: cvs rdiff -u -r1.1.2.8 -r1.1.2.9 src/sys/arch/mips/mips/pmap_tlb.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/mips
Module Name:src Committed By: matt Date: Mon Mar 1 23:53:26 UTC 2010 Modified Files: src/sys/arch/mips/mips [matt-nb5-mips64]: pmap_tlb.c Log Message: Fix KASSERT botch. To generate a diff of this commit: cvs rdiff -u -r1.1.2.8 -r1.1.2.9 src/sys/arch/mips/mips/pmap_tlb.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/mips/mips/pmap_tlb.c diff -u src/sys/arch/mips/mips/pmap_tlb.c:1.1.2.8 src/sys/arch/mips/mips/pmap_tlb.c:1.1.2.9 --- src/sys/arch/mips/mips/pmap_tlb.c:1.1.2.8 Sun Feb 28 23:20:21 2010 +++ src/sys/arch/mips/mips/pmap_tlb.c Mon Mar 1 23:53:26 2010 @@ -1,4 +1,4 @@ -/* $NetBSD: pmap_tlb.c,v 1.1.2.8 2010/02/28 23:20:21 matt Exp $ */ +/* $NetBSD: pmap_tlb.c,v 1.1.2.9 2010/03/01 23:53:26 matt Exp $ */ /*- * Copyright (c) 2010 The NetBSD Foundation, Inc. @@ -31,7 +31,7 @@ #include sys/cdefs.h -__KERNEL_RCSID(0, $NetBSD: pmap_tlb.c,v 1.1.2.8 2010/02/28 23:20:21 matt Exp $); +__KERNEL_RCSID(0, $NetBSD: pmap_tlb.c,v 1.1.2.9 2010/03/01 23:53:26 matt Exp $); /* * Manages address spaces in a TLB. @@ -409,7 +409,7 @@ * next called for this pmap, it will allocate a new * ASID. */ - KASSERT((pm-pm_onproc ti-ti_cpu_mask) == 0); + KASSERT((curlwp-l_proc-p_vmspace-vm_map.pmap-pm_onproc ti-ti_cpu_mask) == 0); pmap_pai_reset(ti, pai, PAI_PMAP(pai, ti)); } break;
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/mips
Module Name:src Committed By: snj Date: Sun Feb 28 15:32:32 UTC 2010 Modified Files: src/sys/arch/mips/mips [matt-nb5-mips64]: mips_fixup.c Log Message: Fix some minor errors in comments. To generate a diff of this commit: cvs rdiff -u -r1.1.2.3 -r1.1.2.4 src/sys/arch/mips/mips/mips_fixup.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/mips
Module Name:src
Committed By: snj
Date: Sun Feb 28 15:32:32 UTC 2010
Modified Files:
src/sys/arch/mips/mips [matt-nb5-mips64]: mips_fixup.c
Log Message:
Fix some minor errors in comments.
To generate a diff of this commit:
cvs rdiff -u -r1.1.2.3 -r1.1.2.4 src/sys/arch/mips/mips/mips_fixup.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/mips/mips/mips_fixup.c
diff -u src/sys/arch/mips/mips/mips_fixup.c:1.1.2.3 src/sys/arch/mips/mips/mips_fixup.c:1.1.2.4
--- src/sys/arch/mips/mips/mips_fixup.c:1.1.2.3 Sun Feb 28 03:21:07 2010
+++ src/sys/arch/mips/mips/mips_fixup.c Sun Feb 28 15:32:32 2010
@@ -29,7 +29,7 @@
#include sys/cdefs.h
-__KERNEL_RCSID(0, $NetBSD: mips_fixup.c,v 1.1.2.3 2010/02/28 03:21:07 matt Exp $);
+__KERNEL_RCSID(0, $NetBSD: mips_fixup.c,v 1.1.2.4 2010/02/28 15:32:32 snj Exp $);
#include sys/param.h
@@ -204,7 +204,7 @@
/*
* Find the lowest and highest jumps we will be replacing. We don't
- * need to do but it does make weeding out the non-matching jumps
+ * need to do it but it does make weeding out the non-matching jumps
* faster.
*/
for (size_t i = 0; i noffsets; i++) {
@@ -220,7 +220,7 @@
uint32_t opcode = insn 26;
/*
- * First we check to see if this is a jump and whether its
+ * First we check to see if this is a jump and whether it is
* within the range we are interested in.
*/
if ((opcode != OPCODE_J opcode != OPCODE_JAL)
@@ -237,7 +237,7 @@
/*
* Yes, we need to fix it up. Replace the old
* displacement with the real displacement. If we've
- * moved to a new cache line, sync the last cacheline
+ * moved to a new cache line, sync the last cache line
* we fixed.
*/
*insnp ^= offset ^ real_offsets[i];
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/mips
Module Name:src Committed By: snj Date: Sat Feb 27 18:25:25 UTC 2010 Modified Files: src/sys/arch/mips/mips [matt-nb5-mips64]: mips_fixup.c Log Message: Fix a couple typos in comments. To generate a diff of this commit: cvs rdiff -u -r1.1.2.1 -r1.1.2.2 src/sys/arch/mips/mips/mips_fixup.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/mips
Module Name:src Committed By: snj Date: Sat Feb 27 18:25:25 UTC 2010 Modified Files: src/sys/arch/mips/mips [matt-nb5-mips64]: mips_fixup.c Log Message: Fix a couple typos in comments. To generate a diff of this commit: cvs rdiff -u -r1.1.2.1 -r1.1.2.2 src/sys/arch/mips/mips/mips_fixup.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/mips/mips/mips_fixup.c diff -u src/sys/arch/mips/mips/mips_fixup.c:1.1.2.1 src/sys/arch/mips/mips/mips_fixup.c:1.1.2.2 --- src/sys/arch/mips/mips/mips_fixup.c:1.1.2.1 Sat Feb 27 07:58:52 2010 +++ src/sys/arch/mips/mips/mips_fixup.c Sat Feb 27 18:25:25 2010 @@ -29,7 +29,7 @@ #include sys/cdefs.h -__KERNEL_RCSID(0, $NetBSD: mips_fixup.c,v 1.1.2.1 2010/02/27 07:58:52 matt Exp $); +__KERNEL_RCSID(0, $NetBSD: mips_fixup.c,v 1.1.2.2 2010/02/27 18:25:25 snj Exp $); #include sys/param.h @@ -136,7 +136,7 @@ KASSERT(load_addr (intptr_t)(ci + 1)); /* - * Use the load instrution as a prototype and it make use $0 + * Use the load instruction as a prototype and it make use $0 * as base and the new negative offset. The second instruction * is a NOP. */ @@ -152,7 +152,7 @@ (new_insns[0] 21) 31); #endif /* - * Contruct the TLB_LO entry needed to map cpu_info_store. + * Construct the TLB_LO entry needed to map cpu_info_store. */ const uint32_t tlb_lo = MIPS3_PG_G|MIPS3_PG_V|MIPS3_PG_D | mips3_paddr_to_tlbpfn(MIPS_KSEG0_TO_PHYS(trunc_page(load_addr)));
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/mips
Module Name:src Committed By: snj Date: Sat Feb 27 19:22:03 UTC 2010 Modified Files: src/sys/arch/mips/mips [matt-nb5-mips64]: lock_stubs.S Log Message: Fix comment gimplish. To generate a diff of this commit: cvs rdiff -u -r1.9.18.7 -r1.9.18.8 src/sys/arch/mips/mips/lock_stubs.S Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/mips
Module Name:src Committed By: snj Date: Sat Feb 27 19:22:47 UTC 2010 Modified Files: src/sys/arch/mips/mips [matt-nb5-mips64]: lock_stubs.S Log Message: Fix whitespace in previous. To generate a diff of this commit: cvs rdiff -u -r1.9.18.8 -r1.9.18.9 src/sys/arch/mips/mips/lock_stubs.S Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/mips
Module Name:src Committed By: snj Date: Sat Feb 27 19:22:47 UTC 2010 Modified Files: src/sys/arch/mips/mips [matt-nb5-mips64]: lock_stubs.S Log Message: Fix whitespace in previous. To generate a diff of this commit: cvs rdiff -u -r1.9.18.8 -r1.9.18.9 src/sys/arch/mips/mips/lock_stubs.S Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/mips/mips/lock_stubs.S diff -u src/sys/arch/mips/mips/lock_stubs.S:1.9.18.8 src/sys/arch/mips/mips/lock_stubs.S:1.9.18.9 --- src/sys/arch/mips/mips/lock_stubs.S:1.9.18.8 Sat Feb 27 19:22:03 2010 +++ src/sys/arch/mips/mips/lock_stubs.S Sat Feb 27 19:22:47 2010 @@ -1,4 +1,4 @@ -/* $NetBSD: lock_stubs.S,v 1.9.18.8 2010/02/27 19:22:03 snj Exp $ */ +/* $NetBSD: lock_stubs.S,v 1.9.18.9 2010/02/27 19:22:47 snj Exp $ */ /*- * Copyright (c) 2007 The NetBSD Foundation, Inc. @@ -241,7 +241,7 @@ /* * If the current IPL is less than the mutex's IPL, we need to raise - * our IPL to the mutex'es + * our IPL to the mutex'es */ sltu v1, ta1, ta0 # v1 = ta1 ta0 beqz v1, 1f @@ -457,7 +457,7 @@ /* * If the current IPL is less than the mutex's IPL, we need to raise - * our IPL to the mutex'es + * our IPL to the mutex'es */ sltu a3, ta1, a0 # a3 = ta1 a0 beqz a3, 1f
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/mips
Module Name:src Committed By: snj Date: Sat Feb 27 19:49:26 UTC 2010 Modified Files: src/sys/arch/mips/mips [matt-nb5-mips64]: pmap.c Log Message: It's PARANOIADIAG, not PARANIOADIAG. Fix a couple small errors in comments. To generate a diff of this commit: cvs rdiff -u -r1.179.16.19 -r1.179.16.20 src/sys/arch/mips/mips/pmap.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/mips
Module Name:src Committed By: snj Date: Sat Feb 27 20:10:26 UTC 2010 Modified Files: src/sys/arch/mips/mips [matt-nb5-mips64]: pmap_tlb.c Log Message: Fix some gimplish in comments. To generate a diff of this commit: cvs rdiff -u -r1.1.2.5 -r1.1.2.6 src/sys/arch/mips/mips/pmap_tlb.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/mips
Module Name:src Committed By: snj Date: Sat Feb 27 20:10:26 UTC 2010 Modified Files: src/sys/arch/mips/mips [matt-nb5-mips64]: pmap_tlb.c Log Message: Fix some gimplish in comments. To generate a diff of this commit: cvs rdiff -u -r1.1.2.5 -r1.1.2.6 src/sys/arch/mips/mips/pmap_tlb.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/mips/mips/pmap_tlb.c diff -u src/sys/arch/mips/mips/pmap_tlb.c:1.1.2.5 src/sys/arch/mips/mips/pmap_tlb.c:1.1.2.6 --- src/sys/arch/mips/mips/pmap_tlb.c:1.1.2.5 Sat Feb 27 07:58:52 2010 +++ src/sys/arch/mips/mips/pmap_tlb.c Sat Feb 27 20:10:26 2010 @@ -1,4 +1,4 @@ -/* $NetBSD: pmap_tlb.c,v 1.1.2.5 2010/02/27 07:58:52 matt Exp $ */ +/* $NetBSD: pmap_tlb.c,v 1.1.2.6 2010/02/27 20:10:26 snj Exp $ */ /*- * Copyright (c) 2010 The NetBSD Foundation, Inc. @@ -31,7 +31,7 @@ #include sys/cdefs.h -__KERNEL_RCSID(0, $NetBSD: pmap_tlb.c,v 1.1.2.5 2010/02/27 07:58:52 matt Exp $); +__KERNEL_RCSID(0, $NetBSD: pmap_tlb.c,v 1.1.2.6 2010/02/27 20:10:26 snj Exp $); /* * Manages address spaces in a TLB. @@ -79,16 +79,16 @@ * * When a change to the local TLB may require a change in the TLB's of other * CPUs, we try to avoid sending an IPI if at all possible. For instance, if - * are updating a PTE and that PTE previously was invalid and therefore - * couldn't support an active mapping, there's no need for an IPI since can be - * no TLB entry to invalidate. The other case is when we change a PTE to be - * modified we just update the local TLB. If another TLB has a stale entry, - * a TLB MOD exception will be raised and that will cause the local TLB to be - * updated. + * we are updating a PTE and that PTE previously was invalid and therefore + * couldn't support an active mapping, there's no need for an IPI since there + * can be no TLB entry to invalidate. The other case is when we change a PTE + * to be modified we just update the local TLB. If another TLB has a stale + * entry, a TLB MOD exception will be raised and that will cause the local TLB + * to be updated. * * We never need to update a non-local TLB if the pmap doesn't have a valid * ASID for that TLB. If it does have a valid ASID but isn't current onproc - * we simply reset its ASID for that TLB and then time it goes onproc it + * we simply reset its ASID for that TLB and then when it goes onproc it * will allocate a new ASID and any existing TLB entries will be orphaned. * Only in the case that pmap has an onproc ASID do we actually have to send * an IPI. @@ -110,12 +110,12 @@ * 0) nothing, * 1) if that ASID is still onproc, we invalidate the TLB entries for * that single ASID. If not, just reset the pmap's ASID to invalidate - * and let it allocated the next time it goes onproc, + * and let it be allocated the next time it goes onproc, * 2) we reinitialize the ASID space (preserving any onproc ASIDs) and * invalidate all non-wired non-global TLB entries, * 3) we invalidate all of the non-wired global TLB entries, * 4) we reinitialize the ASID space (again preserving any onproc ASIDs) - * invalidate all non-wried TLB entries. + * invalidate all non-wired TLB entries. * * As you can see, shootdowns are not concerned with addresses, just address * spaces. Since the number of TLB entries is usually quite small, this avoids @@ -654,7 +654,7 @@ #ifdef MULTIPROCESSOR /* - * Mark that we now an active ASID for all CPUs sharing this TLB. + * Mark that we now have an active ASID for all CPUs sharing this TLB. * The bits in pm_active belonging to this TLB can only be changed * while this TLBs lock is held. */
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/mips
Module Name:src Committed By: snj Date: Sat Feb 27 20:32:04 UTC 2010 Modified Files: src/sys/arch/mips/mips [matt-nb5-mips64]: mipsX_subr.S Log Message: Fix some typos in comments. To generate a diff of this commit: cvs rdiff -u -r1.26.36.1.2.27 -r1.26.36.1.2.28 \ src/sys/arch/mips/mips/mipsX_subr.S Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/mips
Module Name:src Committed By: snj Date: Sat Feb 27 20:32:04 UTC 2010 Modified Files: src/sys/arch/mips/mips [matt-nb5-mips64]: mipsX_subr.S Log Message: Fix some typos in comments. To generate a diff of this commit: cvs rdiff -u -r1.26.36.1.2.27 -r1.26.36.1.2.28 \ src/sys/arch/mips/mips/mipsX_subr.S Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/mips/mips/mipsX_subr.S diff -u src/sys/arch/mips/mips/mipsX_subr.S:1.26.36.1.2.27 src/sys/arch/mips/mips/mipsX_subr.S:1.26.36.1.2.28 --- src/sys/arch/mips/mips/mipsX_subr.S:1.26.36.1.2.27 Sat Feb 27 07:58:52 2010 +++ src/sys/arch/mips/mips/mipsX_subr.S Sat Feb 27 20:32:04 2010 @@ -1,4 +1,4 @@ -/* $NetBSD: mipsX_subr.S,v 1.26.36.1.2.27 2010/02/27 07:58:52 matt Exp $ */ +/* $NetBSD: mipsX_subr.S,v 1.26.36.1.2.28 2010/02/27 20:32:04 snj Exp $ */ /* * Copyright 2002 Wasabi Systems, Inc. @@ -671,7 +671,7 @@ /* * We need to find out if this was due to a T_BREAK and if so - * turn off interrupts in addition to clearing the execption level. + * turn off interrupts in addition to clearing the exception level. */ li v1, 1 T_BREAK # make a mask of T_BREAK sll t0, a1, MIPS_CR_EXC_CODE_SHIFT # shift exc code to low 5 bits @@ -1205,7 +1205,7 @@ * Clear interrupt enable */ mfc0 v0, MIPS_COP_0_STATUS # read it - xor v0, MIPS_SR_INT_IE # disable interrutps + xor v0, MIPS_SR_INT_IE # disable interrupts mtc0 v0, MIPS_COP_0_STATUS # write it COP0_SYNC nop @@ -1957,7 +1957,7 @@ * mipsN_VCED -- * * Handle virtual coherency exceptions. - * Called directly from the mips3 execption-table code. + * Called directly from the mips3 exception-table code. * only k0, k1 are available on entry * * Results: @@ -1965,7 +1965,7 @@ * * Side effects: * Remaps the conflicting address as uncached and returns - * from the execption. + * from the exception. * * NB: cannot be profiled, all registers are user registers on entry. * @@ -2631,7 +2631,7 @@ tlbwi # now write the invalid TLB COP0_SYNC - mtc0 a3, MIPS_COP_0_TLB_HI # retore the addr for new TLB + mtc0 a3, MIPS_COP_0_TLB_HI # restore the addr for new TLB COP0_SYNC nop nop
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/mips
Module Name:src Committed By: matt Date: Sat Feb 27 21:29:01 UTC 2010 Modified Files: src/sys/arch/mips/mips [matt-nb5-mips64]: pmap_tlb.c Log Message: Fix for non DIAGNOSTIC kernels To generate a diff of this commit: cvs rdiff -u -r1.1.2.6 -r1.1.2.7 src/sys/arch/mips/mips/pmap_tlb.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/mips
Module Name:src
Committed By: matt
Date: Sat Feb 27 21:29:01 UTC 2010
Modified Files:
src/sys/arch/mips/mips [matt-nb5-mips64]: pmap_tlb.c
Log Message:
Fix for non DIAGNOSTIC kernels
To generate a diff of this commit:
cvs rdiff -u -r1.1.2.6 -r1.1.2.7 src/sys/arch/mips/mips/pmap_tlb.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/mips/mips/pmap_tlb.c
diff -u src/sys/arch/mips/mips/pmap_tlb.c:1.1.2.6 src/sys/arch/mips/mips/pmap_tlb.c:1.1.2.7
--- src/sys/arch/mips/mips/pmap_tlb.c:1.1.2.6 Sat Feb 27 20:10:26 2010
+++ src/sys/arch/mips/mips/pmap_tlb.c Sat Feb 27 21:29:01 2010
@@ -1,4 +1,4 @@
-/* $NetBSD: pmap_tlb.c,v 1.1.2.6 2010/02/27 20:10:26 snj Exp $ */
+/* $NetBSD: pmap_tlb.c,v 1.1.2.7 2010/02/27 21:29:01 matt Exp $ */
/*-
* Copyright (c) 2010 The NetBSD Foundation, Inc.
@@ -31,7 +31,7 @@
#include sys/cdefs.h
-__KERNEL_RCSID(0, $NetBSD: pmap_tlb.c,v 1.1.2.6 2010/02/27 20:10:26 snj Exp $);
+__KERNEL_RCSID(0, $NetBSD: pmap_tlb.c,v 1.1.2.7 2010/02/27 21:29:01 matt Exp $);
/*
* Manages address spaces in a TLB.
@@ -612,7 +612,9 @@
* a new one.
*/
if (__predict_false(TLBINFO_ASID_INUSE_P(ti, ti-ti_asid_hint))) {
+#ifdef DIAGNOSTIC
const size_t words = __arraycount(ti-ti_asid_bitmap);
+#endif
const size_t nbpw = 8 * sizeof(ti-ti_asid_bitmap[0]);
for (size_t i = 0; i ti-ti_asid_hint / nbpw; i++) {
KASSERT(~ti-ti_asid_bitmap[i] == 0);
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/mips
Module Name:src
Committed By: matt
Date: Sun Feb 28 03:23:06 UTC 2010
Added Files:
src/sys/arch/mips/mips [matt-nb5-mips64]: spl_stubs.c
Log Message:
We no longer inline the spl indirect calls through mips_splsw. Instead we
have stubs that do the indirection and then fixup the calls to the stubs to
be calls to the actual routines.
To generate a diff of this commit:
cvs rdiff -u -r0 -r1.1.2.1 src/sys/arch/mips/mips/spl_stubs.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Added files:
Index: src/sys/arch/mips/mips/spl_stubs.c
diff -u /dev/null src/sys/arch/mips/mips/spl_stubs.c:1.1.2.1
--- /dev/null Sun Feb 28 03:23:06 2010
+++ src/sys/arch/mips/mips/spl_stubs.c Sun Feb 28 03:23:06 2010
@@ -0,0 +1,238 @@
+/* $NetBSD: spl_stubs.c,v 1.1.2.1 2010/02/28 03:23:06 matt Exp $ */
+/*-
+ * Copyright (c) 2010 The NetBSD Foundation, Inc.
+ * All rights reserved.
+ *
+ * This code is derived from software contributed to The NetBSD Foundation
+ * by Matt Thomas m...@3am-software.com.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *notice, this list of conditions and the following disclaimer in the
+ *documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include sys/cdefs.h
+
+__KERNEL_RCSID(0, $NetBSD: spl_stubs.c,v 1.1.2.1 2010/02/28 03:23:06 matt Exp $);
+
+#define __INTR_PRIVATE
+
+#include sys/param.h
+
+#include mips/cache.h
+#include mips/intr.h
+#include mips/locore.h
+
+int splhigh(void) __section(.stub);
+int splhigh_noprof(void) __section(.stub);
+int splsched(void) __section(.stub);
+int splvm(void) __section(.stub);
+int splsoftserial(void) __section(.stub);
+int splsoftnet(void) __section(.stub);
+int splsoftbio(void) __section(.stub);
+int splsoftclock(void) __section(.stub);
+int splraise(int) __section(.stub);
+void splx(int) __section(.stub);
+void splx_noprof(int) __section(.stub);
+void spl0(void) __section(.stub);
+int splintr(uint32_t *) __section(.stub);
+void _setsoftintr(uint32_t) __section(.stub);
+void _clrsoftintr(uint32_t) __section(.stub);
+
+#define J_SPLHIGH 0
+int
+splhigh(void)
+{
+ return (*mips_splsw.splsw_splhigh)();
+}
+
+#define J_SPLHIGH_NOPROF (J_SPLHIGH+1)
+int
+splhigh_noprof(void)
+{
+ return (*mips_splsw.splsw_splhigh_noprof)();
+}
+
+#define J_SPLSCHED (J_SPLHIGH_NOPROF+1)
+int
+splsched(void)
+{
+ return (*mips_splsw.splsw_splsched)();
+}
+
+#define J_SPLVM (J_SPLSCHED+1)
+int
+splvm(void)
+{
+ return (*mips_splsw.splsw_splvm)();
+}
+
+#define J_SPLSOFTSERIAL (J_SPLVM+1)
+int
+splsoftserial(void)
+{
+ return (*mips_splsw.splsw_splsoftserial)();
+}
+
+#define J_SPLSOFTNET (J_SPLSOFTSERIAL+1)
+int
+splsoftnet(void)
+{
+ return (*mips_splsw.splsw_splsoftnet)();
+}
+
+#define J_SPLSOFTBIO (J_SPLSOFTNET+1)
+int
+splsoftbio(void)
+{
+ return (*mips_splsw.splsw_splsoftbio)();
+}
+
+#define J_SPLSOFTCLOCK (J_SPLSOFTBIO+1)
+int
+splsoftclock(void)
+{
+ return (*mips_splsw.splsw_splsoftclock)();
+}
+
+#define J_SPL0 (J_SPLSOFTCLOCK+1)
+void
+spl0(void)
+{
+ (*mips_splsw.splsw_spl0)();
+}
+
+#define J_SPLX (J_SPL0+1)
+void
+splx(int s)
+{
+ (*mips_splsw.splsw_splx)(s);
+}
+
+#define J_SPLX_NOPROF (J_SPLX+1)
+void
+splx_noprof(int s)
+{
+ (*mips_splsw.splsw_splx_noprof)(s);
+}
+
+#define J_SPLRAISE (J_SPLX_NOPROF+1)
+int
+splraise(int s)
+{
+return (*mips_splsw.splsw_splraise)(s);
+}
+
+#define J_SPLINTR (J_SPLRAISE+1)
+int
+splintr(uint32_t *p)
+{
+ return (*mips_splsw.splsw_splintr)(p);
+}
+
+#define J_SETSOFTINTR (J_SPLINTR+1)
+void
+_setsoftintr(uint32_t m)
+{
+ (*mips_splsw.splsw__setsoftintr)(m);
+}
+
+#define J_CLRSOFTINTR (J_SETSOFTINTR+1)
+void
+_clrsoftintr(uint32_t m)
+{
+ (*mips_splsw.splsw__clrsoftintr)(m);
+}
+
+#define J_SPLMAX (J_CLRSOFTINTR+1)
+
+#if 0
+#define offsetofsplsw(x) (offsetof(struct splsw,
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/mips
Module Name:src Committed By: matt Date: Sun Feb 28 03:23:06 UTC 2010 Added Files: src/sys/arch/mips/mips [matt-nb5-mips64]: spl_stubs.c Log Message: We no longer inline the spl indirect calls through mips_splsw. Instead we have stubs that do the indirection and then fixup the calls to the stubs to be calls to the actual routines. To generate a diff of this commit: cvs rdiff -u -r0 -r1.1.2.1 src/sys/arch/mips/mips/spl_stubs.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/mips
Module Name:src Committed By: matt Date: Sun Feb 28 03:28:54 UTC 2010 Modified Files: src/sys/arch/mips/mips [matt-nb5-mips64]: lock_stubs.S locore.S mipsX_subr.S Log Message: Change from indirect calls to direct calls to spl* routines. To generate a diff of this commit: cvs rdiff -u -r1.9.18.9 -r1.9.18.10 src/sys/arch/mips/mips/lock_stubs.S cvs rdiff -u -r1.167.38.16 -r1.167.38.17 src/sys/arch/mips/mips/locore.S cvs rdiff -u -r1.26.36.1.2.28 -r1.26.36.1.2.29 \ src/sys/arch/mips/mips/mipsX_subr.S Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/mips
Module Name:src Committed By: matt Date: Sun Feb 28 03:28:54 UTC 2010 Modified Files: src/sys/arch/mips/mips [matt-nb5-mips64]: lock_stubs.S locore.S mipsX_subr.S Log Message: Change from indirect calls to direct calls to spl* routines. To generate a diff of this commit: cvs rdiff -u -r1.9.18.9 -r1.9.18.10 src/sys/arch/mips/mips/lock_stubs.S cvs rdiff -u -r1.167.38.16 -r1.167.38.17 src/sys/arch/mips/mips/locore.S cvs rdiff -u -r1.26.36.1.2.28 -r1.26.36.1.2.29 \ src/sys/arch/mips/mips/mipsX_subr.S Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/mips/mips/lock_stubs.S diff -u src/sys/arch/mips/mips/lock_stubs.S:1.9.18.9 src/sys/arch/mips/mips/lock_stubs.S:1.9.18.10 --- src/sys/arch/mips/mips/lock_stubs.S:1.9.18.9 Sat Feb 27 19:22:47 2010 +++ src/sys/arch/mips/mips/lock_stubs.S Sun Feb 28 03:28:54 2010 @@ -1,4 +1,4 @@ -/* $NetBSD: lock_stubs.S,v 1.9.18.9 2010/02/27 19:22:47 snj Exp $ */ +/* $NetBSD: lock_stubs.S,v 1.9.18.10 2010/02/28 03:28:54 matt Exp $ */ /*- * Copyright (c) 2007 The NetBSD Foundation, Inc. @@ -254,8 +254,7 @@ * (only uses a0-a3 and v0-v1) */ move t3, ra # need to save ra - PTR_L t9, _C_LABEL(mips_splsw) + SPLSW_SPLRAISE - jalr t9 + jal _C_LABEL(splraise) move a0, ta0 move ra, t3 # move ra back #ifdef PARANOIA @@ -468,8 +467,7 @@ * call splraise (only uses a0-a3, v0-v1, and ra) */ move t3, ra - PTR_L t9, _C_LABEL(mips_splsw) + SPLSW_SPLRAISE - jalr t9 + jal _C_LABEL(splraise) nop move ra, t3 @@ -630,17 +628,18 @@ #endif /* PARANOIA */ beq a0, a1, 1f # if oldspl == cpl - move t9, ra # no reason to drop ipl + nop# no reason to drop ipl bltz t0, 1f # there are still holders - move t9, ra # so don't drop IPL + nop# so don't drop IPL /* * Mutex count is zero so we need to restore the old IPL */ - PTR_L t9, _C_LABEL(mips_splsw) + SPLSW_SPLX + j _C_LABEL(splx) + nop 1: - j t9 + j ra nop #if defined(DIAGNOSTIC) 2: Index: src/sys/arch/mips/mips/locore.S diff -u src/sys/arch/mips/mips/locore.S:1.167.38.16 src/sys/arch/mips/mips/locore.S:1.167.38.17 --- src/sys/arch/mips/mips/locore.S:1.167.38.16 Thu Feb 25 05:45:12 2010 +++ src/sys/arch/mips/mips/locore.S Sun Feb 28 03:28:54 2010 @@ -1,4 +1,4 @@ -/* $NetBSD: locore.S,v 1.167.38.16 2010/02/25 05:45:12 matt Exp $ */ +/* $NetBSD: locore.S,v 1.167.38.17 2010/02/28 03:28:54 matt Exp $ */ /* * Copyright (c) 1992, 1993 @@ -148,8 +148,7 @@ /* * Raise to IPLHIGH */ - PTR_L t9, _C_LABEL(mips_splsw) + SPLSW_SPLHIGH - jalr t9# splhigh() + jal _C_LABEL(splhigh_noprof) # go to splhigh nop /* * Now enable interrupts (but they are all masked). @@ -236,8 +235,9 @@ /* * Switch to new context. */ - PTR_L t9, _C_LABEL(mips_locoresw) + MIPSX_CPU_SWITCH_RESUME - jalr t9 + .globl _C_LABEL(__cpu_switchto_fixup) +_C_LABEL(__cpu_switchto_fixup): + jal _C_LABEL(mips_cpu_switch_resume) move a0, MIPS_CURLWP PTR_L t2, L_CPU(MIPS_CURLWP) @@ -247,7 +247,6 @@ /* Check for restartable atomic sequences (RAS) */ PTR_L a0, L_PROC(MIPS_CURLWP) # argument to ras_lookup PTR_L s5, L_ADDR(MIPS_CURLWP) - nop # patchable load deay slot PTR_L v1, P_RASLIST(a0) # get raslist beqz v1, 1f# skip call if empty nop @@ -374,7 +373,6 @@ PTR_L s1, L_CPU(MIPS_CURLWP) # get curcpu() nop # patchable load delay slot PTR_S MIPS_CURLWP, CPU_INFO_CURLWP(s1) #... - nop # patchable slot move s2, sp # remember sp move s3, t0 # remember curpcb @@ -387,19 +385,18 @@ move MIPS_CURLWP, s0# restore curlwp PTR_S MIPS_CURLWP, CPU_INFO_CURLWP(s1) # + REG_L ra, CALLFRAME_RA(sp) # load early since we use it + REG_PROLOGUE REG_L s0, U_PCB_CONTEXT+SF_REG_S0(s3) # restore the saved - nop # patchable delay slot REG_L s1, U_PCB_CONTEXT+SF_REG_S1(s3) #registers that we - nop # patchable delay slot REG_L s2, U_PCB_CONTEXT+SF_REG_S2(s3) #used REG_L s3, U_PCB_CONTEXT+SF_REG_S3(s3) REG_EPILOGUE /* - * Almost everything (all except sp) is restored so we ca retrn. + * Almost everything (all except sp) is restored so we can return. */ - REG_L ra, CALLFRAME_RA(sp) j ra PTR_ADDU sp, CALLFRAME_SIZ END(softint_fast_dispatch) Index: src/sys/arch/mips/mips/mipsX_subr.S diff -u src/sys/arch/mips/mips/mipsX_subr.S:1.26.36.1.2.28 src/sys/arch/mips/mips/mipsX_subr.S:1.26.36.1.2.29 --- src/sys/arch/mips/mips/mipsX_subr.S:1.26.36.1.2.28 Sat Feb 27 20:32:04 2010 +++ src/sys/arch/mips/mips/mipsX_subr.S Sun Feb 28 03:28:54 2010 @@ -1,4 +1,4 @@ -/* $NetBSD: mipsX_subr.S,v 1.26.36.1.2.28 2010/02/27 20:32:04 snj Exp $ */ +/* $NetBSD: mipsX_subr.S,v 1.26.36.1.2.29 2010/02/28 03:28:54 matt Exp $ */ /* * Copyright 2002 Wasabi Systems, Inc. @@ -1117,8 +1117,7 @@ /* * We first need to get to IPL_HIGH so that interrupts are masked. */ - PTR_L t9,
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/mips
Module Name:src Committed By: matt Date: Sun Feb 28 03:30:35 UTC 2010 Modified Files: src/sys/arch/mips/mips [matt-nb5-mips64]: mips_machdep.c Log Message: #define __INTR_PRIVATE Add calls to fixup the splcalls and fixup the call to mips_cpu_switch_resume in cpu_switchto (which remove an indirect calls from a critical routine). To generate a diff of this commit: cvs rdiff -u -r1.205.4.1.2.1.2.37 -r1.205.4.1.2.1.2.38 \ src/sys/arch/mips/mips/mips_machdep.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/mips/mips/mips_machdep.c diff -u src/sys/arch/mips/mips/mips_machdep.c:1.205.4.1.2.1.2.37 src/sys/arch/mips/mips/mips_machdep.c:1.205.4.1.2.1.2.38 --- src/sys/arch/mips/mips/mips_machdep.c:1.205.4.1.2.1.2.37 Sat Feb 27 07:58:52 2010 +++ src/sys/arch/mips/mips/mips_machdep.c Sun Feb 28 03:30:34 2010 @@ -1,4 +1,4 @@ -/* $NetBSD: mips_machdep.c,v 1.205.4.1.2.1.2.37 2010/02/27 07:58:52 matt Exp $ */ +/* $NetBSD: mips_machdep.c,v 1.205.4.1.2.1.2.38 2010/02/28 03:30:34 matt Exp $ */ /* * Copyright 2002 Wasabi Systems, Inc. @@ -112,7 +112,9 @@ #include sys/cdefs.h /* RCS ID Copyright macro defns */ -__KERNEL_RCSID(0, $NetBSD: mips_machdep.c,v 1.205.4.1.2.1.2.37 2010/02/27 07:58:52 matt Exp $); +__KERNEL_RCSID(0, $NetBSD: mips_machdep.c,v 1.205.4.1.2.1.2.38 2010/02/28 03:30:34 matt Exp $); + +#define __INTR_PRIVATE #include opt_cputype.h #include opt_compat_netbsd32.h @@ -968,6 +970,13 @@ cpu_reboot(RB_HALT, NULL); } + /* + * Now that the splsw and locoresw have been filled in, fixup the + * jumps to their stubs to instead jump to the real routines. + */ + fixup_mips_cpu_switch_resume(); + fixup_splcalls(); + /* XXX simonb: ugg, another ugly #ifdef check... */ #if (defined(MIPS3) !defined(MIPS3_5900)) || defined(MIPS32) || defined(MIPS64) /*
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/mips
Module Name:src Committed By: matt Date: Sun Feb 28 03:30:35 UTC 2010 Modified Files: src/sys/arch/mips/mips [matt-nb5-mips64]: mips_machdep.c Log Message: #define __INTR_PRIVATE Add calls to fixup the splcalls and fixup the call to mips_cpu_switch_resume in cpu_switchto (which remove an indirect calls from a critical routine). To generate a diff of this commit: cvs rdiff -u -r1.205.4.1.2.1.2.37 -r1.205.4.1.2.1.2.38 \ src/sys/arch/mips/mips/mips_machdep.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/mips
Module Name:src Committed By: matt Date: Thu Feb 25 05:24:24 UTC 2010 Modified Files: src/sys/arch/mips/mips [matt-nb5-mips64]: pmap_segtab.c Log Message: Make sure we aren't looking up a direct-mapped address. To generate a diff of this commit: cvs rdiff -u -r1.1.2.5 -r1.1.2.6 src/sys/arch/mips/mips/pmap_segtab.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/mips
Module Name:src Committed By: matt Date: Tue Feb 23 20:32:33 UTC 2010 Modified Files: src/sys/arch/mips/mips [matt-nb5-mips64]: spl.S Log Message: Instead of a read-only ipl_sr_bits, define a ipl_sr_map struct and fill that in the interrupt init routine. There's a default ipl_sr_map will operate correctly, but isn't performant. To generate a diff of this commit: cvs rdiff -u -r1.1.2.2 -r1.1.2.3 src/sys/arch/mips/mips/spl.S Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/mips
Module Name:src Committed By: matt Date: Wed Feb 24 00:09:04 UTC 2010 Modified Files: src/sys/arch/mips/mips [matt-nb5-mips64]: pmap.c Log Message: Fix bug because of typo: if (foo); something is not the same as if (foo) something. Add some more KASSERTs (used to find the bug). To generate a diff of this commit: cvs rdiff -u -r1.179.16.16 -r1.179.16.17 src/sys/arch/mips/mips/pmap.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/mips
Module Name:src Committed By: matt Date: Wed Feb 24 00:30:21 UTC 2010 Modified Files: src/sys/arch/mips/mips [matt-nb5-mips64]: pmap_tlb.c Log Message: When adding a CPU to a TLB, mark the kernel pmap as active and onproc for that CPU. To generate a diff of this commit: cvs rdiff -u -r1.1.2.2 -r1.1.2.3 src/sys/arch/mips/mips/pmap_tlb.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/mips
Module Name:src Committed By: matt Date: Mon Feb 22 20:13:22 UTC 2010 Modified Files: src/sys/arch/mips/mips [matt-nb5-mips64]: locore_mips3.S Log Message: Add a weak alias of cpu_counter32 to mips3_cp0_count_read. This allows mips/cpu_counter.h to avoid including mips/locore.h. To generate a diff of this commit: cvs rdiff -u -r1.93.38.5 -r1.93.38.6 src/sys/arch/mips/mips/locore_mips3.S Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/mips
Module Name:src Committed By: matt Date: Mon Feb 22 20:17:09 UTC 2010 Modified Files: src/sys/arch/mips/mips [matt-nb5-mips64]: compat_16_machdep.c mips_softint.c process_machdep.c sig_machdep.c syscall.c Log Message: Explicitly include mips/locore.h since mips/cpu.h no longer includes it. Use curcpu()-ci_data.cpu_nsyscall instead of uvmexp.syscalls. To generate a diff of this commit: cvs rdiff -u -r1.12.14.4 -r1.12.14.5 \ src/sys/arch/mips/mips/compat_16_machdep.c cvs rdiff -u -r1.1.2.5 -r1.1.2.6 src/sys/arch/mips/mips/mips_softint.c cvs rdiff -u -r1.29.62.3 -r1.29.62.4 src/sys/arch/mips/mips/process_machdep.c cvs rdiff -u -r1.16.14.3 -r1.16.14.4 src/sys/arch/mips/mips/sig_machdep.c cvs rdiff -u -r1.37.12.11 -r1.37.12.12 src/sys/arch/mips/mips/syscall.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/mips/mips/compat_16_machdep.c diff -u src/sys/arch/mips/mips/compat_16_machdep.c:1.12.14.4 src/sys/arch/mips/mips/compat_16_machdep.c:1.12.14.5 --- src/sys/arch/mips/mips/compat_16_machdep.c:1.12.14.4 Mon Feb 1 04:16:19 2010 +++ src/sys/arch/mips/mips/compat_16_machdep.c Mon Feb 22 20:17:09 2010 @@ -1,4 +1,4 @@ -/* $NetBSD: compat_16_machdep.c,v 1.12.14.4 2010/02/01 04:16:19 matt Exp $ */ +/* $NetBSD: compat_16_machdep.c,v 1.12.14.5 2010/02/22 20:17:09 matt Exp $ */ /*- * Copyright (c) 1998, 2001 The NetBSD Foundation, Inc. @@ -45,7 +45,7 @@ #include sys/cdefs.h /* RCS ID Copyright macro defns */ -__KERNEL_RCSID(0, $NetBSD: compat_16_machdep.c,v 1.12.14.4 2010/02/01 04:16:19 matt Exp $); +__KERNEL_RCSID(0, $NetBSD: compat_16_machdep.c,v 1.12.14.5 2010/02/22 20:17:09 matt Exp $); #include opt_cputype.h #include opt_compat_netbsd.h @@ -68,6 +68,7 @@ #include mips/regnum.h #include mips/frame.h +#include mips/locore.h #if !defined(__mips_o32) #define fpreg fpreg_oabi Index: src/sys/arch/mips/mips/mips_softint.c diff -u src/sys/arch/mips/mips/mips_softint.c:1.1.2.5 src/sys/arch/mips/mips/mips_softint.c:1.1.2.6 --- src/sys/arch/mips/mips/mips_softint.c:1.1.2.5 Tue Feb 16 08:13:57 2010 +++ src/sys/arch/mips/mips/mips_softint.c Mon Feb 22 20:17:09 2010 @@ -29,7 +29,7 @@ #include sys/cdefs.h /* RCS ID Copyright macro defns */ -__KERNEL_RCSID(0, $NetBSD: mips_softint.c,v 1.1.2.5 2010/02/16 08:13:57 matt Exp $); +__KERNEL_RCSID(0, $NetBSD: mips_softint.c,v 1.1.2.6 2010/02/22 20:17:09 matt Exp $); #include sys/param.h #include sys/proc.h @@ -41,6 +41,7 @@ #include uvm/uvm_extern.h #include machine/intr.h +#include mips/locore.h #ifdef __HAVE_FAST_SOFTINTS Index: src/sys/arch/mips/mips/process_machdep.c diff -u src/sys/arch/mips/mips/process_machdep.c:1.29.62.3 src/sys/arch/mips/mips/process_machdep.c:1.29.62.4 --- src/sys/arch/mips/mips/process_machdep.c:1.29.62.3 Mon Feb 1 04:16:19 2010 +++ src/sys/arch/mips/mips/process_machdep.c Mon Feb 22 20:17:09 2010 @@ -1,4 +1,4 @@ -/* $NetBSD: process_machdep.c,v 1.29.62.3 2010/02/01 04:16:19 matt Exp $ */ +/* $NetBSD: process_machdep.c,v 1.29.62.4 2010/02/22 20:17:09 matt Exp $ */ /* * Copyright (c) 1993 The Regents of the University of California. @@ -76,7 +76,7 @@ */ #include sys/cdefs.h /* RCS ID Copyright macro defns */ -__KERNEL_RCSID(0, $NetBSD: process_machdep.c,v 1.29.62.3 2010/02/01 04:16:19 matt Exp $); +__KERNEL_RCSID(0, $NetBSD: process_machdep.c,v 1.29.62.4 2010/02/22 20:17:09 matt Exp $); /* * This file may seem a bit stylized, but that so that it's easier to port. @@ -105,8 +105,10 @@ #include sys/proc.h #include sys/user.h #include sys/ptrace.h + #include mips/reg.h #include mips/regnum.h /* symbolic register indices */ +#include mips/locore.h int process_read_regs(struct lwp *l, struct reg *regs) Index: src/sys/arch/mips/mips/sig_machdep.c diff -u src/sys/arch/mips/mips/sig_machdep.c:1.16.14.3 src/sys/arch/mips/mips/sig_machdep.c:1.16.14.4 --- src/sys/arch/mips/mips/sig_machdep.c:1.16.14.3 Mon Feb 1 04:16:20 2010 +++ src/sys/arch/mips/mips/sig_machdep.c Mon Feb 22 20:17:09 2010 @@ -1,4 +1,4 @@ -/* $NetBSD: sig_machdep.c,v 1.16.14.3 2010/02/01 04:16:20 matt Exp $ */ +/* $NetBSD: sig_machdep.c,v 1.16.14.4 2010/02/22 20:17:09 matt Exp $ */ /*- * Copyright (c) 2003 The NetBSD Foundation, Inc. @@ -31,7 +31,7 @@ #include sys/cdefs.h /* RCS ID Copyright macro defns */ -__KERNEL_RCSID(0, $NetBSD: sig_machdep.c,v 1.16.14.3 2010/02/01 04:16:20 matt Exp $); +__KERNEL_RCSID(0, $NetBSD: sig_machdep.c,v 1.16.14.4 2010/02/22 20:17:09 matt Exp $); #include opt_cputype.h #include opt_compat_netbsd.h @@ -50,6 +50,7 @@ #include mips/frame.h #include mips/regnum.h +#include mips/locore.h void * getframe(struct lwp *l, int sig, int *onstack) Index: src/sys/arch/mips/mips/syscall.c diff -u src/sys/arch/mips/mips/syscall.c:1.37.12.11 src/sys/arch/mips/mips/syscall.c:1.37.12.12 --- src/sys/arch/mips/mips/syscall.c:1.37.12.11
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/mips
Module Name:src Committed By: matt Date: Tue Feb 16 08:03:15 UTC 2010 Modified Files: src/sys/arch/mips/mips [matt-nb5-mips64]: locore.S Log Message: Fix typo. To generate a diff of this commit: cvs rdiff -u -r1.167.38.13 -r1.167.38.14 src/sys/arch/mips/mips/locore.S Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/mips
Module Name:src Committed By: matt Date: Sat Feb 6 14:41:40 UTC 2010 Modified Files: src/sys/arch/mips/mips [matt-nb5-mips64]: mips_softint.c Log Message: Add some more KASSERTs To generate a diff of this commit: cvs rdiff -u -r1.1.2.2 -r1.1.2.3 src/sys/arch/mips/mips/mips_softint.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/mips
Module Name:src Committed By: matt Date: Sat Feb 6 14:43:15 UTC 2010 Modified Files: src/sys/arch/mips/mips [matt-nb5-mips64]: locore.S Added Files: src/sys/arch/mips/mips [matt-nb5-mips64]: spl.S Log Message: Split spl functions into their own sources. Make sure fast softints clear l_ctxswtch in the softint thread, not their own. To generate a diff of this commit: cvs rdiff -u -r1.167.38.11 -r1.167.38.12 src/sys/arch/mips/mips/locore.S cvs rdiff -u -r0 -r1.1.2.1 src/sys/arch/mips/mips/spl.S Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/mips
Module Name:src Committed By: matt Date: Fri Feb 5 17:16:05 UTC 2010 Modified Files: src/sys/arch/mips/mips [matt-nb5-mips64]: vm_machdep.c Log Message: remove a debugging printf. cleanup the reinit of the lwp. To generate a diff of this commit: cvs rdiff -u -r1.121.6.1.2.10 -r1.121.6.1.2.11 \ src/sys/arch/mips/mips/vm_machdep.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/mips
Module Name:src Committed By: matt Date: Sat Feb 6 00:39:47 UTC 2010 Modified Files: src/sys/arch/mips/mips [matt-nb5-mips64]: genassym.cf locore.S mips_softint.c Log Message: Allow __HAVE_FAST_SOFTINTS to be optional To generate a diff of this commit: cvs rdiff -u -r1.44.12.14 -r1.44.12.15 src/sys/arch/mips/mips/genassym.cf cvs rdiff -u -r1.167.38.9 -r1.167.38.10 src/sys/arch/mips/mips/locore.S cvs rdiff -u -r1.1.2.1 -r1.1.2.2 src/sys/arch/mips/mips/mips_softint.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/mips
Module Name:src Committed By: matt Date: Sat Feb 6 02:56:23 UTC 2010 Modified Files: src/sys/arch/mips/mips [matt-nb5-mips64]: locore.S Log Message: Save curlwp in context (even though it should already be there). To generate a diff of this commit: cvs rdiff -u -r1.167.38.10 -r1.167.38.11 src/sys/arch/mips/mips/locore.S Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/mips
Module Name:src Committed By: matt Date: Sat Feb 6 04:55:01 UTC 2010 Modified Files: src/sys/arch/mips/mips [matt-nb5-mips64]: mips_machdep.c Log Message: When choosing a msgbuf for a LP32 kernel, make sure it's mappable via KSEG0 To generate a diff of this commit: cvs rdiff -u -r1.205.4.1.2.1.2.31 -r1.205.4.1.2.1.2.32 \ src/sys/arch/mips/mips/mips_machdep.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/mips
Module Name:src Committed By: matt Date: Sat Feb 6 06:02:29 UTC 2010 Modified Files: src/sys/arch/mips/mips [matt-nb5-mips64]: pmap.c Log Message: Add some prelim poolpage debugging code. Don't use ptoa to expand pfns to paddrs since it's cast with a vaddr_t. To generate a diff of this commit: cvs rdiff -u -r1.179.16.14 -r1.179.16.15 src/sys/arch/mips/mips/pmap.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/mips
Module Name:src Committed By: matt Date: Mon Feb 1 06:53:00 UTC 2010 Modified Files: src/sys/arch/mips/mips [matt-nb5-mips64]: mips_machdep.c trap.c Log Message: Allow port-specific code to init lwp0.l_addr early. (pmax needs it so it call badaddr). To generate a diff of this commit: cvs rdiff -u -r1.205.4.1.2.1.2.30 -r1.205.4.1.2.1.2.31 \ src/sys/arch/mips/mips/mips_machdep.c cvs rdiff -u -r1.217.12.17 -r1.217.12.18 src/sys/arch/mips/mips/trap.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/mips
Module Name:src Committed By: nisimura Date: Thu Jan 28 01:57:46 UTC 2010 Modified Files: src/sys/arch/mips/mips [matt-nb5-mips64]: vm_machdep.c Log Message: fix a comment to tell register S7 ($23) is used for curlwp pointer. To generate a diff of this commit: cvs rdiff -u -r1.121.6.1.2.6 -r1.121.6.1.2.7 \ src/sys/arch/mips/mips/vm_machdep.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/mips
Module Name:src
Committed By: matt
Date: Tue Jan 26 21:05:26 UTC 2010
Modified Files:
src/sys/arch/mips/mips [matt-nb5-mips64]: lock_stubs.S
Log Message:
Add ucas_{32,64}
To generate a diff of this commit:
cvs rdiff -u -r1.9.18.5 -r1.9.18.6 src/sys/arch/mips/mips/lock_stubs.S
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/mips
Module Name:src Committed By: matt Date: Tue Jan 26 21:07:14 UTC 2010 Modified Files: src/sys/arch/mips/mips [matt-nb5-mips64]: vm_machdep.c Log Message: Make sure the kernel pages allocated for vmmapbuf have the same page color. To generate a diff of this commit: cvs rdiff -u -r1.121.6.1.2.5 -r1.121.6.1.2.6 \ src/sys/arch/mips/mips/vm_machdep.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/mips
Module Name:src Committed By: cliff Date: Tue Jan 26 04:37:38 UTC 2010 Modified Files: src/sys/arch/mips/mips [matt-nb5-mips64]: db_interface.c Log Message: fix macros used for printing cp0 regs To generate a diff of this commit: cvs rdiff -u -r1.64.16.14 -r1.64.16.15 src/sys/arch/mips/mips/db_interface.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/mips
Module Name:src Committed By: matt Date: Fri Jan 22 08:35:59 UTC 2010 Modified Files: src/sys/arch/mips/mips [matt-nb5-mips64]: mips_emul.c Log Message: Use ufetch/ustore for all user access To generate a diff of this commit: cvs rdiff -u -r1.14.78.6 -r1.14.78.7 src/sys/arch/mips/mips/mips_emul.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/mips
Module Name:src Committed By: matt Date: Fri Jan 22 08:37:08 UTC 2010 Modified Files: src/sys/arch/mips/mips [matt-nb5-mips64]: fp.S Log Message: In N32/N64, deal with the FP load/store as a 64bit quantity To generate a diff of this commit: cvs rdiff -u -r1.33.38.6 -r1.33.38.7 src/sys/arch/mips/mips/fp.S Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/mips
Module Name:src Committed By: matt Date: Fri Jan 22 07:05:29 UTC 2010 Modified Files: src/sys/arch/mips/mips [matt-nb5-mips64]: mips_emul.c Log Message: in MachEmulateBranch, print useful information on panics To generate a diff of this commit: cvs rdiff -u -r1.14.78.5 -r1.14.78.6 src/sys/arch/mips/mips/mips_emul.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/mips
Module Name:src Committed By: cliff Date: Sun Jan 17 00:20:14 UTC 2010 Modified Files: src/sys/arch/mips/mips [matt-nb5-mips64]: mipsX_subr.S Log Message: fix print format for EPC in cache error format string To generate a diff of this commit: cvs rdiff -u -r1.26.36.1.2.18 -r1.26.36.1.2.19 \ src/sys/arch/mips/mips/mipsX_subr.S Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/mips
Module Name:src Committed By: cliff Date: Wed Jan 13 09:42:38 UTC 2010 Modified Files: src/sys/arch/mips/mips [matt-nb5-mips64]: mips_machdep.c Log Message: - spec CIDFL's for RMI L2, cores, threads attributes - add cputab[] entry for RMI XLS404LITE - cpu_identify() now gets device_t arg; use it instead of static 'label' To generate a diff of this commit: cvs rdiff -u -r1.205.4.1.2.1.2.21 -r1.205.4.1.2.1.2.22 \ src/sys/arch/mips/mips/mips_machdep.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/mips
Module Name:src Committed By: cliff Date: Thu Jan 14 05:02:38 UTC 2010 Modified Files: src/sys/arch/mips/mips [matt-nb5-mips64]: bus_space_alignstride_chipdep.c Log Message: in BS(unmap), instead of assuming KSEG2 bsh address came from uvm_km_alloc, check that the address is NOT (KSEG0 or KSEG1) address. To generate a diff of this commit: cvs rdiff -u -r1.10.18.11 -r1.10.18.12 \ src/sys/arch/mips/mips/bus_space_alignstride_chipdep.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/mips
Module Name:src Committed By: matt Date: Mon Jan 11 19:52:30 UTC 2010 Modified Files: src/sys/arch/mips/mips [matt-nb5-mips64]: bus_dma.c Log Message: Mark dmamaps as coherent if the D cache is coherent. To generate a diff of this commit: cvs rdiff -u -r1.22.16.8 -r1.22.16.9 src/sys/arch/mips/mips/bus_dma.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/mips
Module Name:src Committed By: matt Date: Fri Jan 8 22:15:13 UTC 2010 Modified Files: src/sys/arch/mips/mips [matt-nb5-mips64]: trap.c Log Message: In stacktrace_subr, use proper formats. To generate a diff of this commit: cvs rdiff -u -r1.217.12.12 -r1.217.12.13 src/sys/arch/mips/mips/trap.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/mips
Module Name:src Committed By: matt Date: Sat Jan 9 06:01:18 UTC 2010 Modified Files: src/sys/arch/mips/mips [matt-nb5-mips64]: mips_machdep.c pmap.c Log Message: On _LP64, allocate kernel memory from the first 4GB. Otherwise first 512MB. Until we get full bounce buffer support, this should with device that only support 4GB addresses. To generate a diff of this commit: cvs rdiff -u -r1.205.4.1.2.1.2.20 -r1.205.4.1.2.1.2.21 \ src/sys/arch/mips/mips/mips_machdep.c cvs rdiff -u -r1.179.16.7 -r1.179.16.8 src/sys/arch/mips/mips/pmap.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/mips
Module Name:src Committed By: matt Date: Wed Jan 6 04:25:46 UTC 2010 Modified Files: src/sys/arch/mips/mips [matt-nb5-mips64]: mips_machdep.c Log Message: Fix a thinko (last - start + size) To generate a diff of this commit: cvs rdiff -u -r1.205.4.1.2.1.2.19 -r1.205.4.1.2.1.2.20 \ src/sys/arch/mips/mips/mips_machdep.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
Re: CVS commit: [matt-nb5-mips64] src/sys/arch/mips/mips
[wrong list, redirecting to source-changes-d, sorry...] On Wed, Nov 18, 2009 at 10:34:54AM +0100, Martin Husemann wrote: On Tue, Nov 17, 2009 at 07:56:27AM +, Matt Thomas wrote: (slightly bogus but then we really should kill extent and switch to vmem) I keep hearing this mantra. Yet I don't see how vmem(9) is up to the task of, say, managing pcmcia io port allocations (without bogusly wasting memory). Why is the vmem interface preferable? I see how we could improve the extend(9) implementation (e.g. kill the use fo malloc()). Martin
Re: CVS commit: [matt-nb5-mips64] src/sys/arch/mips/mips
@@ -876,10 +876,17 @@ moves2, t2 # stash most of temporary regs REG_S t3, FRAME_T3(k1)# syscall saved gp for fork mfc0a1, MIPS_COP_0_STATUS # 2nd arg is STATUS +#if defined(__mips_n32) || defined(__mips_n64) + REG_S a4, FRAME_A4(k1) + REG_S a5, FRAME_A5(k1) + REG_S a6, FRAME_A6(k1) + REG_S a7, FRAME_A7(k1) +#else moves4, ta0 moves5, ta1 moves6, ta2 moves7, ta3 +#endif #REG_S t8, FRAME_T8(k1) #REG_S t9, FRAME_T9(k1) REG_S gp, FRAME_GP(k1) This should be #if !defined(__mips_o32) ... #else ... #endif. Otherwise O64 kernel + N32/N64 userland won't work. Masao
Re: CVS commit: [matt-nb5-mips64] src/sys/arch/mips/mips
On Sep 2, 2009, at 4:41 PM, Masao Uebayashi wrote: @@ -876,10 +876,17 @@ moves2, t2 # stash most of temporary regs REG_S t3, FRAME_T3(k1)# syscall saved gp for fork mfc0a1, MIPS_COP_0_STATUS # 2nd arg is STATUS +#if defined(__mips_n32) || defined(__mips_n64) + REG_S a4, FRAME_A4(k1) + REG_S a5, FRAME_A5(k1) + REG_S a6, FRAME_A6(k1) + REG_S a7, FRAME_A7(k1) +#else moves4, ta0 moves5, ta1 moves6, ta2 moves7, ta3 +#endif #REG_S t8, FRAME_T8(k1) #REG_S t9, FRAME_T9(k1) REG_S gp, FRAME_GP(k1) This should be #if !defined(__mips_o32) ... #else ... #endif. Otherwise O64 kernel + N32/N64 userland won't work. O64 kernel? why should we worry about O64?
