CVS commit: src/sys/arch/powerpc/fpu
Module Name:src Committed By: rin Date: Tue Sep 20 12:25:01 UTC 2022 Modified Files: src/sys/arch/powerpc/fpu: fpu_emu.c Log Message: Typo in comment. No binary changes. To generate a diff of this commit: cvs rdiff -u -r1.59 -r1.60 src/sys/arch/powerpc/fpu/fpu_emu.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/powerpc/fpu/fpu_emu.c diff -u src/sys/arch/powerpc/fpu/fpu_emu.c:1.59 src/sys/arch/powerpc/fpu/fpu_emu.c:1.60 --- src/sys/arch/powerpc/fpu/fpu_emu.c:1.59 Tue Sep 20 12:12:42 2022 +++ src/sys/arch/powerpc/fpu/fpu_emu.c Tue Sep 20 12:25:01 2022 @@ -1,4 +1,4 @@ -/* $NetBSD: fpu_emu.c,v 1.59 2022/09/20 12:12:42 rin Exp $ */ +/* $NetBSD: fpu_emu.c,v 1.60 2022/09/20 12:25:01 rin Exp $ */ /* * Copyright 2001 Wasabi Systems, Inc. @@ -76,7 +76,7 @@ */ #include -__KERNEL_RCSID(0, "$NetBSD: fpu_emu.c,v 1.59 2022/09/20 12:12:42 rin Exp $"); +__KERNEL_RCSID(0, "$NetBSD: fpu_emu.c,v 1.60 2022/09/20 12:25:01 rin Exp $"); #ifdef _KERNEL_OPT #include "opt_ddb.h" @@ -298,7 +298,7 @@ success: *format, it is stored as normalized double value in FRs; *denormalization is required in this case. * - When magnitude is smaller than the minimum denormalized number in - *float format, the result is undefined. For G5 (790MP Rev 1.1), + *float format, the result is undefined. For G5 (970MP Rev 1.1), *(sign | 0) seems to be stored. For G4 and prior, some ``random'' *garbage is stored in exponent. We mimic G5 for now. */
CVS commit: src/sys/arch/powerpc/fpu
Module Name:src Committed By: rin Date: Tue Sep 20 12:25:01 UTC 2022 Modified Files: src/sys/arch/powerpc/fpu: fpu_emu.c Log Message: Typo in comment. No binary changes. To generate a diff of this commit: cvs rdiff -u -r1.59 -r1.60 src/sys/arch/powerpc/fpu/fpu_emu.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/powerpc/fpu
Module Name:src
Committed By: rin
Date: Tue Sep 20 12:12:42 UTC 2022
Modified Files:
src/sys/arch/powerpc/fpu: fpu_emu.c
Log Message:
stfs{,x}{,u}: Switch to conversion algorithm specified by Power ISA.
The ISA specifies algorithm for most bit patterns in double format, that
are not representable in float. I believe that sane people do not rely on
such a specification detail, but *REAL* programmers may utilize it ;)
Instead of complicating fpu_explode(), single-purpose helper function,
fpu_to_single(), is introduced. See comment therein for more details.
To generate a diff of this commit:
cvs rdiff -u -r1.58 -r1.59 src/sys/arch/powerpc/fpu/fpu_emu.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
CVS commit: src/sys/arch/powerpc/fpu
Module Name:src
Committed By: rin
Date: Tue Sep 20 12:12:42 UTC 2022
Modified Files:
src/sys/arch/powerpc/fpu: fpu_emu.c
Log Message:
stfs{,x}{,u}: Switch to conversion algorithm specified by Power ISA.
The ISA specifies algorithm for most bit patterns in double format, that
are not representable in float. I believe that sane people do not rely on
such a specification detail, but *REAL* programmers may utilize it ;)
Instead of complicating fpu_explode(), single-purpose helper function,
fpu_to_single(), is introduced. See comment therein for more details.
To generate a diff of this commit:
cvs rdiff -u -r1.58 -r1.59 src/sys/arch/powerpc/fpu/fpu_emu.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/powerpc/fpu/fpu_emu.c
diff -u src/sys/arch/powerpc/fpu/fpu_emu.c:1.58 src/sys/arch/powerpc/fpu/fpu_emu.c:1.59
--- src/sys/arch/powerpc/fpu/fpu_emu.c:1.58 Thu Sep 15 14:25:28 2022
+++ src/sys/arch/powerpc/fpu/fpu_emu.c Tue Sep 20 12:12:42 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: fpu_emu.c,v 1.58 2022/09/15 14:25:28 rin Exp $ */
+/* $NetBSD: fpu_emu.c,v 1.59 2022/09/20 12:12:42 rin Exp $ */
/*
* Copyright 2001 Wasabi Systems, Inc.
@@ -76,7 +76,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: fpu_emu.c,v 1.58 2022/09/15 14:25:28 rin Exp $");
+__KERNEL_RCSID(0, "$NetBSD: fpu_emu.c,v 1.59 2022/09/20 12:12:42 rin Exp $");
#ifdef _KERNEL_OPT
#include "opt_ddb.h"
@@ -283,6 +283,56 @@ success:
}
/*
+ * fpu_to_single(): Helper function for stfs{,u}{,x}.
+ *
+ * Single-precision (float) data is internally represented in
+ * double-precision (double) format in floating-point registers (FRs).
+ * Even though double value cannot be translated into float format in
+ * general, Power ISA (2.0.3--3.1) specify conversion algorithm when
+ * stored to memory (see Sec. 4.6.3):
+ *
+ * - Extra fraction bits are truncated regardless of rounding mode.
+ * - When magnitude is larger than the maximum number in float format,
+ *bits 63--62 and 58--29 are mechanically copied into bits 31--0.
+ * - When magnitude is representable as denormalized number in float
+ *format, it is stored as normalized double value in FRs;
+ *denormalization is required in this case.
+ * - When magnitude is smaller than the minimum denormalized number in
+ *float format, the result is undefined. For G5 (790MP Rev 1.1),
+ *(sign | 0) seems to be stored. For G4 and prior, some ``random''
+ *garbage is stored in exponent. We mimic G5 for now.
+ */
+static uint32_t
+fpu_to_single(uint64_t reg)
+{
+ uint32_t sign, frac, word;
+ int exp, shift;
+
+ sign = (reg & __BIT(63)) >> 32;
+ exp = __SHIFTOUT(reg, __BITS(62, 52)) - 1023;
+ if (exp > -127 || (reg & ~__BIT(63)) == 0) {
+ /*
+ * No denormalization required: normalized, zero, inf, NaN,
+ * or numbers larger than MAXFLOAT (see comment above).
+ *
+ * Note that MSB and 7-LSBs in exponent are same for double
+ * and float formats in this case.
+ */
+ word = ((reg & __BIT(62)) >> 32) |
+ __SHIFTOUT(reg, __BITS(58, 52) | __BITS(51, 29));
+ } else if (exp <= -127 && exp >= -149) {
+ /* Denormalized. */
+ shift = - 126 - exp; /* 1 ... 23 */
+ frac = __SHIFTOUT(__BIT(52) | reg, __BITS(52, 29 + shift));
+ word = /* __SHIFTIN(0, __BITS(30, 23)) | */ frac;
+ } else {
+ /* Undefined. Mimic G5 for now. */
+ word = 0;
+ }
+ return sign | word;
+}
+
+/*
* Execute an FPU instruction (one that runs entirely in the FPU; not
* FBfcc or STF, for instance). On return, fe->fe_fs->fs_fsr will be
* modified to reflect the setting the hardware would have left.
@@ -411,28 +461,32 @@ fpu_execute(struct trapframe *tf, struct
if (store) {
/* Store */
+ uint32_t word;
+ const void *kaddr;
+
FPU_EMU_EVCNT_INCR(fpstore);
if (type != FTYPE_DBL) {
-uint64_t buf;
-
+/*
+ * As Power ISA specifies conversion algorithm
+ * for store floating-point single insns, we
+ * cannot use fpu_explode() and _implode() here.
+ * See fpu_to_single() and comment therein for
+ * more details.
+ */
DPRINTF(FPE_INSN,
("fpu_execute: Store SNG at %p\n",
(void *)addr));
-fpu_explode(fe, fp = &fe->fe_f1, FTYPE_DBL,
-FR(rt));
-fpu_implode(fe, fp, type, &buf);
-if (copyout(&buf, (void *)addr, size)) {
- fe->fe_addr = addr;
- return (FAULT);
-}
+word = fpu_to_single(FR(rt));
+kaddr = &word;
} else {
DPRINTF(FPE_INSN,
("fpu_execute: Store DBL at %p\n",
(void *)addr));
-if (copyout(&FR(rt), (void *)addr, size)) {
- fe->fe_addr = addr;
- return (FAULT);
-}
+kaddr = &FR(rt);
+ }
+ if (copyout(kaddr, (void *)addr, size)) {
+fe->fe_addr = addr;
+return (FAULT);
}
} else {
/* Load */
CVS commit: src/sys/arch/powerpc/fpu
Module Name:src
Committed By: rin
Date: Thu Sep 15 14:25:28 UTC 2022
Modified Files:
src/sys/arch/powerpc/fpu: fpu_emu.c
Log Message:
fnm{add,sub}{,s}: Do not negate NaN.
To generate a diff of this commit:
cvs rdiff -u -r1.57 -r1.58 src/sys/arch/powerpc/fpu/fpu_emu.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/powerpc/fpu/fpu_emu.c
diff -u src/sys/arch/powerpc/fpu/fpu_emu.c:1.57 src/sys/arch/powerpc/fpu/fpu_emu.c:1.58
--- src/sys/arch/powerpc/fpu/fpu_emu.c:1.57 Thu Sep 15 14:24:00 2022
+++ src/sys/arch/powerpc/fpu/fpu_emu.c Thu Sep 15 14:25:28 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: fpu_emu.c,v 1.57 2022/09/15 14:24:00 rin Exp $ */
+/* $NetBSD: fpu_emu.c,v 1.58 2022/09/15 14:25:28 rin Exp $ */
/*
* Copyright 2001 Wasabi Systems, Inc.
@@ -76,7 +76,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: fpu_emu.c,v 1.57 2022/09/15 14:24:00 rin Exp $");
+__KERNEL_RCSID(0, "$NetBSD: fpu_emu.c,v 1.58 2022/09/15 14:25:28 rin Exp $");
#ifdef _KERNEL_OPT
#include "opt_ddb.h"
@@ -738,7 +738,8 @@ fpu_execute(struct trapframe *tf, struct
fpu_explode(fe, &fe->fe_f2, type, FR(rb));
fp = fpu_sub(fe);
/* Negate */
-fp->fp_sign ^= 1;
+if (!ISNAN(fp))
+ fp->fp_sign ^= 1;
break;
case OPC59_FNMADDS:
FPU_EMU_EVCNT_INCR(fnmadd);
@@ -750,7 +751,8 @@ fpu_execute(struct trapframe *tf, struct
fpu_explode(fe, &fe->fe_f2, type, FR(rb));
fp = fpu_add(fe);
/* Negate */
-fp->fp_sign ^= 1;
+if (!ISNAN(fp))
+ fp->fp_sign ^= 1;
break;
default:
return (NOTFPU);
CVS commit: src/sys/arch/powerpc/fpu
Module Name:src
Committed By: rin
Date: Thu Sep 15 14:25:28 UTC 2022
Modified Files:
src/sys/arch/powerpc/fpu: fpu_emu.c
Log Message:
fnm{add,sub}{,s}: Do not negate NaN.
To generate a diff of this commit:
cvs rdiff -u -r1.57 -r1.58 src/sys/arch/powerpc/fpu/fpu_emu.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
CVS commit: src/sys/arch/powerpc/fpu
Module Name:src
Committed By: rin
Date: Thu Sep 15 14:24:00 UTC 2022
Modified Files:
src/sys/arch/powerpc/fpu: fpu_emu.c
Log Message:
fpu_execute(): Use FR() macro. No binary changes.
To generate a diff of this commit:
cvs rdiff -u -r1.56 -r1.57 src/sys/arch/powerpc/fpu/fpu_emu.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/powerpc/fpu/fpu_emu.c
diff -u src/sys/arch/powerpc/fpu/fpu_emu.c:1.56 src/sys/arch/powerpc/fpu/fpu_emu.c:1.57
--- src/sys/arch/powerpc/fpu/fpu_emu.c:1.56 Fri Sep 9 14:35:27 2022
+++ src/sys/arch/powerpc/fpu/fpu_emu.c Thu Sep 15 14:24:00 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: fpu_emu.c,v 1.56 2022/09/09 14:35:27 rin Exp $ */
+/* $NetBSD: fpu_emu.c,v 1.57 2022/09/15 14:24:00 rin Exp $ */
/*
* Copyright 2001 Wasabi Systems, Inc.
@@ -76,7 +76,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: fpu_emu.c,v 1.56 2022/09/09 14:35:27 rin Exp $");
+__KERNEL_RCSID(0, "$NetBSD: fpu_emu.c,v 1.57 2022/09/15 14:24:00 rin Exp $");
#ifdef _KERNEL_OPT
#include "opt_ddb.h"
@@ -429,7 +429,7 @@ fpu_execute(struct trapframe *tf, struct
DPRINTF(FPE_INSN,
("fpu_execute: Store DBL at %p\n",
(void *)addr));
-if (copyout(&fs->fpreg[rt], (void *)addr, size)) {
+if (copyout(&FR(rt), (void *)addr, size)) {
fe->fe_addr = addr;
return (FAULT);
}
@@ -439,7 +439,7 @@ fpu_execute(struct trapframe *tf, struct
FPU_EMU_EVCNT_INCR(fpload);
DPRINTF(FPE_INSN, ("fpu_execute: Load from %p\n",
(void *)addr));
- if (copyin((const void *)addr, &fs->fpreg[rt], size)) {
+ if (copyin((const void *)addr, &FR(rt), size)) {
fe->fe_addr = addr;
return (FAULT);
}
CVS commit: src/sys/arch/powerpc/fpu
Module Name:src Committed By: rin Date: Thu Sep 15 14:24:00 UTC 2022 Modified Files: src/sys/arch/powerpc/fpu: fpu_emu.c Log Message: fpu_execute(): Use FR() macro. No binary changes. To generate a diff of this commit: cvs rdiff -u -r1.56 -r1.57 src/sys/arch/powerpc/fpu/fpu_emu.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/powerpc/fpu
Module Name:src
Committed By: rin
Date: Wed Sep 14 05:55:08 UTC 2022
Modified Files:
src/sys/arch/powerpc/fpu: fpu_implode.c
Log Message:
Fix logic for FPSCR[OX]; set FPSCR[FI] (and therefore FPSCR[XX]).
To generate a diff of this commit:
cvs rdiff -u -r1.23 -r1.24 src/sys/arch/powerpc/fpu/fpu_implode.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/powerpc/fpu/fpu_implode.c
diff -u src/sys/arch/powerpc/fpu/fpu_implode.c:1.23 src/sys/arch/powerpc/fpu/fpu_implode.c:1.24
--- src/sys/arch/powerpc/fpu/fpu_implode.c:1.23 Wed Sep 14 05:54:07 2022
+++ src/sys/arch/powerpc/fpu/fpu_implode.c Wed Sep 14 05:55:08 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: fpu_implode.c,v 1.23 2022/09/14 05:54:07 rin Exp $ */
+/* $NetBSD: fpu_implode.c,v 1.24 2022/09/14 05:55:08 rin Exp $ */
/*
* Copyright (c) 1992, 1993
@@ -46,7 +46,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: fpu_implode.c,v 1.23 2022/09/14 05:54:07 rin Exp $");
+__KERNEL_RCSID(0, "$NetBSD: fpu_implode.c,v 1.24 2022/09/14 05:55:08 rin Exp $");
#include
#include
@@ -416,7 +416,7 @@ fpu_ftos(struct fpemu *fe, struct fpn *f
if (round(fe, fp, cx) && fp->fp_mant[3] == SNG_EXP(2))
exp++;
if (exp >= SNG_EXP_INFNAN) {
- *cx |= FPSCR_OX;
+ *cx |= FPSCR_OX | FPSCR_FI;
/* overflow to inf or to max single */
if (toinf(fe, sign)) {
*cx |= FPRF_SIGN(sign) | FPSCR_FU;
@@ -486,7 +486,7 @@ fpu_ftod(struct fpemu *fe, struct fpn *f
if (round(fe, fp, cx) && fp->fp_mant[2] == DBL_EXP(2))
exp++;
if (exp >= DBL_EXP_INFNAN) {
- *cx |= FPSCR_OX;
+ *cx |= FPSCR_OX | FPSCR_FI;
/* overflow to inf or to max double */
if (toinf(fe, sign)) {
*cx |= FPRF_SIGN(sign) | FPSCR_FU;
CVS commit: src/sys/arch/powerpc/fpu
Module Name:src Committed By: rin Date: Wed Sep 14 05:55:08 UTC 2022 Modified Files: src/sys/arch/powerpc/fpu: fpu_implode.c Log Message: Fix logic for FPSCR[OX]; set FPSCR[FI] (and therefore FPSCR[XX]). To generate a diff of this commit: cvs rdiff -u -r1.23 -r1.24 src/sys/arch/powerpc/fpu/fpu_implode.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/powerpc/fpu
Module Name:src Committed By: rin Date: Wed Sep 14 05:54:07 UTC 2022 Modified Files: src/sys/arch/powerpc/fpu: fpu_implode.c Log Message: Fix logic for FPSCR[UX]: - Correct FPSCR[FPRF] field when round to 0.0 or 0.0f. - Simplify. To generate a diff of this commit: cvs rdiff -u -r1.22 -r1.23 src/sys/arch/powerpc/fpu/fpu_implode.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/powerpc/fpu
Module Name:src
Committed By: rin
Date: Wed Sep 14 05:54:07 UTC 2022
Modified Files:
src/sys/arch/powerpc/fpu: fpu_implode.c
Log Message:
Fix logic for FPSCR[UX]:
- Correct FPSCR[FPRF] field when round to 0.0 or 0.0f.
- Simplify.
To generate a diff of this commit:
cvs rdiff -u -r1.22 -r1.23 src/sys/arch/powerpc/fpu/fpu_implode.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/powerpc/fpu/fpu_implode.c
diff -u src/sys/arch/powerpc/fpu/fpu_implode.c:1.22 src/sys/arch/powerpc/fpu/fpu_implode.c:1.23
--- src/sys/arch/powerpc/fpu/fpu_implode.c:1.22 Sun Sep 4 13:17:33 2022
+++ src/sys/arch/powerpc/fpu/fpu_implode.c Wed Sep 14 05:54:07 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: fpu_implode.c,v 1.22 2022/09/04 13:17:33 rin Exp $ */
+/* $NetBSD: fpu_implode.c,v 1.23 2022/09/14 05:54:07 rin Exp $ */
/*
* Copyright (c) 1992, 1993
@@ -46,7 +46,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: fpu_implode.c,v 1.22 2022/09/04 13:17:33 rin Exp $");
+__KERNEL_RCSID(0, "$NetBSD: fpu_implode.c,v 1.23 2022/09/14 05:54:07 rin Exp $");
#include
#include
@@ -397,10 +397,14 @@ fpu_ftos(struct fpemu *fe, struct fpn *f
*cx |= FPRF_SIGN(sign);
return (sign | SNG_EXP(1) | 0);
}
- *cx |= FPSCR_C | FPRF_SIGN(sign);
- if (((fe->fe_cx | *cx) & FPSCR_FI) ||
- (fe->fe_fpscr & FPSCR_UX))
+ if (*cx & FPSCR_FI) {
*cx |= FPSCR_UX;
+ if (fp->fp_mant[3] == 0) {
+*cx |= FPSCR_FE;
+return sign;
+ }
+ }
+ *cx |= FPSCR_C | FPRF_SIGN(sign);
return (sign | SNG_EXP(0) | fp->fp_mant[3]);
}
/* -FP_NG for g,r; -1 for implied 1; -SNG_FRACBITS for fraction */
@@ -466,10 +470,15 @@ fpu_ftod(struct fpemu *fe, struct fpn *f
*cx |= FPRF_SIGN(sign);
return HI_WORD(sign | DBL_EXP(1) | 0);
}
- *cx |= FPSCR_C | FPRF_SIGN(sign);
- if (((fe->fe_cx | *cx) & FPSCR_FI) ||
- (fe->fe_fpscr & FPSCR_UX))
+ if (*cx & FPSCR_FI) {
*cx |= FPSCR_UX;
+ if ((fp->fp_mant[2] & DBL_MASK) == 0 &&
+ fp->fp_mant[3] == 0) {
+*cx |= FPSCR_FE;
+return HI_WORD(sign);
+ }
+ }
+ *cx |= FPSCR_C | FPRF_SIGN(sign);
exp = 0;
goto done;
}
CVS commit: src/sys/arch/powerpc/fpu
Module Name:src
Committed By: rin
Date: Fri Sep 9 14:35:27 UTC 2022
Modified Files:
src/sys/arch/powerpc/fpu: fpu_emu.c
Log Message:
G/C ``notyet''; OPC_load_st_62 == std{,u} are integer insns.
No binary changes.
To generate a diff of this commit:
cvs rdiff -u -r1.55 -r1.56 src/sys/arch/powerpc/fpu/fpu_emu.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/powerpc/fpu/fpu_emu.c
diff -u src/sys/arch/powerpc/fpu/fpu_emu.c:1.55 src/sys/arch/powerpc/fpu/fpu_emu.c:1.56
--- src/sys/arch/powerpc/fpu/fpu_emu.c:1.55 Wed Sep 7 06:53:03 2022
+++ src/sys/arch/powerpc/fpu/fpu_emu.c Fri Sep 9 14:35:27 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: fpu_emu.c,v 1.55 2022/09/07 06:53:03 rin Exp $ */
+/* $NetBSD: fpu_emu.c,v 1.56 2022/09/09 14:35:27 rin Exp $ */
/*
* Copyright 2001 Wasabi Systems, Inc.
@@ -76,7 +76,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: fpu_emu.c,v 1.55 2022/09/07 06:53:03 rin Exp $");
+__KERNEL_RCSID(0, "$NetBSD: fpu_emu.c,v 1.56 2022/09/09 14:35:27 rin Exp $");
#ifdef _KERNEL_OPT
#include "opt_ddb.h"
@@ -452,11 +452,6 @@ fpu_execute(struct trapframe *tf, struct
tf->tf_fixreg[ra] = addr;
/* Complete. */
return (0);
-#ifdef notyet
- } else if (instr.i_any.i_opcd == OPC_load_st_62) {
- /* These are 64-bit extenstions */
- return (NOTFPU);
-#endif
} else if (instr.i_any.i_opcd == OPC_sp_fp_59 ||
instr.i_any.i_opcd == OPC_dp_fp_63) {
CVS commit: src/sys/arch/powerpc/fpu
Module Name:src
Committed By: rin
Date: Fri Sep 9 14:35:27 UTC 2022
Modified Files:
src/sys/arch/powerpc/fpu: fpu_emu.c
Log Message:
G/C ``notyet''; OPC_load_st_62 == std{,u} are integer insns.
No binary changes.
To generate a diff of this commit:
cvs rdiff -u -r1.55 -r1.56 src/sys/arch/powerpc/fpu/fpu_emu.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
CVS commit: src/sys/arch/powerpc/fpu
Module Name:src
Committed By: rin
Date: Thu Sep 8 15:22:43 UTC 2022
Modified Files:
src/sys/arch/powerpc/fpu: fpu_compare.c
Log Message:
fpu_compare(): Assign r by using return value from fpu_sub(),
instead of directly using &fe->fe_f3. NFC; only for clarity.
To generate a diff of this commit:
cvs rdiff -u -r1.7 -r1.8 src/sys/arch/powerpc/fpu/fpu_compare.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/powerpc/fpu/fpu_compare.c
diff -u src/sys/arch/powerpc/fpu/fpu_compare.c:1.7 src/sys/arch/powerpc/fpu/fpu_compare.c:1.8
--- src/sys/arch/powerpc/fpu/fpu_compare.c:1.7 Thu Sep 8 15:21:50 2022
+++ src/sys/arch/powerpc/fpu/fpu_compare.c Thu Sep 8 15:22:43 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: fpu_compare.c,v 1.7 2022/09/08 15:21:50 rin Exp $ */
+/* $NetBSD: fpu_compare.c,v 1.8 2022/09/08 15:22:43 rin Exp $ */
/*
* Copyright (c) 1992, 1993
@@ -48,7 +48,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: fpu_compare.c,v 1.7 2022/09/08 15:21:50 rin Exp $");
+__KERNEL_RCSID(0, "$NetBSD: fpu_compare.c,v 1.8 2022/09/08 15:22:43 rin Exp $");
#include
@@ -83,7 +83,6 @@ fpu_compare(struct fpemu *fe, int ordere
a = &fe->fe_f1;
b = &fe->fe_f2;
- r = &fe->fe_f3;
if (ISNAN(a) || ISNAN(b)) {
/*
@@ -154,7 +153,7 @@ fpu_compare(struct fpemu *fe, int ordere
cc = FPSCR_FE;
goto done;
}
- fpu_sub(fe);
+ r = fpu_sub(fe);
if (ISZERO(r))
cc = FPSCR_FE;
else if (r->fp_sign)
CVS commit: src/sys/arch/powerpc/fpu
Module Name:src Committed By: rin Date: Thu Sep 8 15:22:43 UTC 2022 Modified Files: src/sys/arch/powerpc/fpu: fpu_compare.c Log Message: fpu_compare(): Assign r by using return value from fpu_sub(), instead of directly using &fe->fe_f3. NFC; only for clarity. To generate a diff of this commit: cvs rdiff -u -r1.7 -r1.8 src/sys/arch/powerpc/fpu/fpu_compare.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/powerpc/fpu
Module Name:src
Committed By: rin
Date: Thu Sep 8 15:21:50 UTC 2022
Modified Files:
src/sys/arch/powerpc/fpu: fpu_compare.c
Log Message:
fpu_compare(): Fix inverted logic and comment it out for now.
VXVC is raised for SNaN if VE == 0.
As we still do not support enabled exception bits, comment out
this if statement for consistency at the moment.
To generate a diff of this commit:
cvs rdiff -u -r1.6 -r1.7 src/sys/arch/powerpc/fpu/fpu_compare.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/powerpc/fpu/fpu_compare.c
diff -u src/sys/arch/powerpc/fpu/fpu_compare.c:1.6 src/sys/arch/powerpc/fpu/fpu_compare.c:1.7
--- src/sys/arch/powerpc/fpu/fpu_compare.c:1.6 Sun Sep 4 13:14:57 2022
+++ src/sys/arch/powerpc/fpu/fpu_compare.c Thu Sep 8 15:21:50 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: fpu_compare.c,v 1.6 2022/09/04 13:14:57 rin Exp $ */
+/* $NetBSD: fpu_compare.c,v 1.7 2022/09/08 15:21:50 rin Exp $ */
/*
* Copyright (c) 1992, 1993
@@ -48,7 +48,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: fpu_compare.c,v 1.6 2022/09/04 13:14:57 rin Exp $");
+__KERNEL_RCSID(0, "$NetBSD: fpu_compare.c,v 1.7 2022/09/08 15:21:50 rin Exp $");
#include
@@ -95,7 +95,10 @@ fpu_compare(struct fpemu *fe, int ordere
if (ISSNAN(a) || ISSNAN(b))
cc |= FPSCR_VXSNAN;
if (ordered) {
- if (fe->fe_fpscr & FPSCR_VE || ISQNAN(a) || ISQNAN(b))
+#ifdef notyet /* XXXRO */
+ if ((fe->fe_fpscr & FPSCR_VE) == 0 ||
+ ISQNAN(a) || ISQNAN(b))
+#endif
cc |= FPSCR_VXVC;
}
goto done;
CVS commit: src/sys/arch/powerpc/fpu
Module Name:src Committed By: rin Date: Thu Sep 8 15:21:50 UTC 2022 Modified Files: src/sys/arch/powerpc/fpu: fpu_compare.c Log Message: fpu_compare(): Fix inverted logic and comment it out for now. VXVC is raised for SNaN if VE == 0. As we still do not support enabled exception bits, comment out this if statement for consistency at the moment. To generate a diff of this commit: cvs rdiff -u -r1.6 -r1.7 src/sys/arch/powerpc/fpu/fpu_compare.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/powerpc/fpu
Module Name:src
Committed By: rin
Date: Wed Sep 7 06:53:03 UTC 2022
Modified Files:
src/sys/arch/powerpc/fpu: fpu_emu.c
Log Message:
Fix mnemonics for fm{add,sub}. NFC except for evcnt(9) names.
To generate a diff of this commit:
cvs rdiff -u -r1.54 -r1.55 src/sys/arch/powerpc/fpu/fpu_emu.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/powerpc/fpu/fpu_emu.c
diff -u src/sys/arch/powerpc/fpu/fpu_emu.c:1.54 src/sys/arch/powerpc/fpu/fpu_emu.c:1.55
--- src/sys/arch/powerpc/fpu/fpu_emu.c:1.54 Mon Sep 5 00:25:18 2022
+++ src/sys/arch/powerpc/fpu/fpu_emu.c Wed Sep 7 06:53:03 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: fpu_emu.c,v 1.54 2022/09/05 00:25:18 rin Exp $ */
+/* $NetBSD: fpu_emu.c,v 1.55 2022/09/07 06:53:03 rin Exp $ */
/*
* Copyright 2001 Wasabi Systems, Inc.
@@ -76,7 +76,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: fpu_emu.c,v 1.54 2022/09/05 00:25:18 rin Exp $");
+__KERNEL_RCSID(0, "$NetBSD: fpu_emu.c,v 1.55 2022/09/07 06:53:03 rin Exp $");
#ifdef _KERNEL_OPT
#include "opt_ddb.h"
@@ -136,8 +136,8 @@ FPU_EMU_EVCNT_DECL(fsel);
FPU_EMU_EVCNT_DECL(fpres);
FPU_EMU_EVCNT_DECL(fmul);
FPU_EMU_EVCNT_DECL(frsqrte);
-FPU_EMU_EVCNT_DECL(fmulsub);
-FPU_EMU_EVCNT_DECL(fmuladd);
+FPU_EMU_EVCNT_DECL(fmsub);
+FPU_EMU_EVCNT_DECL(fmadd);
FPU_EMU_EVCNT_DECL(fnmsub);
FPU_EMU_EVCNT_DECL(fnmadd);
@@ -714,8 +714,8 @@ fpu_execute(struct trapframe *tf, struct
fp = fpu_div(fe);
break;
case OPC59_FMSUBS:
-FPU_EMU_EVCNT_INCR(fmulsub);
-DPRINTF(FPE_INSN, ("fpu_execute: FMULSUB\n"));
+FPU_EMU_EVCNT_INCR(fmsub);
+DPRINTF(FPE_INSN, ("fpu_execute: FMSUB\n"));
fpu_explode(fe, &fe->fe_f1, type, FR(ra));
fpu_explode(fe, &fe->fe_f2, type, FR(rc));
fp = fpu_mul(fe);
@@ -724,8 +724,8 @@ fpu_execute(struct trapframe *tf, struct
fp = fpu_sub(fe);
break;
case OPC59_FMADDS:
-FPU_EMU_EVCNT_INCR(fmuladd);
-DPRINTF(FPE_INSN, ("fpu_execute: FMULADD\n"));
+FPU_EMU_EVCNT_INCR(fmadd);
+DPRINTF(FPE_INSN, ("fpu_execute: FMADD\n"));
fpu_explode(fe, &fe->fe_f1, type, FR(ra));
fpu_explode(fe, &fe->fe_f2, type, FR(rc));
fp = fpu_mul(fe);
CVS commit: src/sys/arch/powerpc/fpu
Module Name:src
Committed By: rin
Date: Wed Sep 7 06:53:03 UTC 2022
Modified Files:
src/sys/arch/powerpc/fpu: fpu_emu.c
Log Message:
Fix mnemonics for fm{add,sub}. NFC except for evcnt(9) names.
To generate a diff of this commit:
cvs rdiff -u -r1.54 -r1.55 src/sys/arch/powerpc/fpu/fpu_emu.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
CVS commit: src/sys/arch/powerpc/fpu
Module Name:src Committed By: rin Date: Wed Sep 7 06:51:58 UTC 2022 Modified Files: src/sys/arch/powerpc/fpu: fpu_explode.c Log Message: fpu_explode(): Fix sign for FTYPE_INT. NFC for now; conversion for this type is used only for immediate 1. To generate a diff of this commit: cvs rdiff -u -r1.13 -r1.14 src/sys/arch/powerpc/fpu/fpu_explode.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/powerpc/fpu/fpu_explode.c diff -u src/sys/arch/powerpc/fpu/fpu_explode.c:1.13 src/sys/arch/powerpc/fpu/fpu_explode.c:1.14 --- src/sys/arch/powerpc/fpu/fpu_explode.c:1.13 Mon Sep 5 00:24:24 2022 +++ src/sys/arch/powerpc/fpu/fpu_explode.c Wed Sep 7 06:51:58 2022 @@ -1,4 +1,4 @@ -/* $NetBSD: fpu_explode.c,v 1.13 2022/09/05 00:24:24 rin Exp $ */ +/* $NetBSD: fpu_explode.c,v 1.14 2022/09/07 06:51:58 rin Exp $ */ /* * Copyright (c) 1992, 1993 @@ -46,7 +46,7 @@ */ #include -__KERNEL_RCSID(0, "$NetBSD: fpu_explode.c,v 1.13 2022/09/05 00:24:24 rin Exp $"); +__KERNEL_RCSID(0, "$NetBSD: fpu_explode.c,v 1.14 2022/09/07 06:51:58 rin Exp $"); #include #include @@ -227,6 +227,7 @@ fpu_explode(struct fpemu *fe, struct fpn break; case FTYPE_INT: + fp->fp_sign = lo >> 31; class = fpu_itof(fp, lo); break;
CVS commit: src/sys/arch/powerpc/fpu
Module Name:src Committed By: rin Date: Wed Sep 7 06:51:58 UTC 2022 Modified Files: src/sys/arch/powerpc/fpu: fpu_explode.c Log Message: fpu_explode(): Fix sign for FTYPE_INT. NFC for now; conversion for this type is used only for immediate 1. To generate a diff of this commit: cvs rdiff -u -r1.13 -r1.14 src/sys/arch/powerpc/fpu/fpu_explode.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/powerpc/fpu
Module Name:src
Committed By: rin
Date: Wed Sep 7 02:41:39 UTC 2022
Modified Files:
src/sys/arch/powerpc/fpu: fpu_emu.h
Log Message:
Turn fpu_sub() macro into static inline function for clarity.
No binary changes.
To generate a diff of this commit:
cvs rdiff -u -r1.11 -r1.12 src/sys/arch/powerpc/fpu/fpu_emu.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/powerpc/fpu/fpu_emu.h
diff -u src/sys/arch/powerpc/fpu/fpu_emu.h:1.11 src/sys/arch/powerpc/fpu/fpu_emu.h:1.12
--- src/sys/arch/powerpc/fpu/fpu_emu.h:1.11 Tue Sep 6 23:07:53 2022
+++ src/sys/arch/powerpc/fpu/fpu_emu.h Wed Sep 7 02:41:39 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: fpu_emu.h,v 1.11 2022/09/06 23:07:53 rin Exp $ */
+/* $NetBSD: fpu_emu.h,v 1.12 2022/09/07 02:41:39 rin Exp $ */
/*
* Copyright (c) 1992, 1993
@@ -163,12 +163,20 @@ struct fpemu {
* Each returns a pointer to the result and/or sets exceptions.
*/
struct fpn *fpu_add(struct fpemu *);
-#define fpu_sub(fe) \
-((ISNAN(&(fe)->fe_f2) ? 0 : ((fe)->fe_f2.fp_sign ^= 1)), fpu_add(fe))
struct fpn *fpu_mul(struct fpemu *);
struct fpn *fpu_div(struct fpemu *);
struct fpn *fpu_sqrt(struct fpemu *);
+static inline struct fpn *
+fpu_sub(struct fpemu *fe)
+{
+ struct fpn *fp = &fe->fe_f2;
+
+ if (!ISNAN(fp))
+ fp->fp_sign ^= 1;
+ return fpu_add(fe);
+}
+
/*
* Other functions.
*/
CVS commit: src/sys/arch/powerpc/fpu
Module Name:src Committed By: rin Date: Wed Sep 7 02:41:39 UTC 2022 Modified Files: src/sys/arch/powerpc/fpu: fpu_emu.h Log Message: Turn fpu_sub() macro into static inline function for clarity. No binary changes. To generate a diff of this commit: cvs rdiff -u -r1.11 -r1.12 src/sys/arch/powerpc/fpu/fpu_emu.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/powerpc/fpu
Module Name:src
Committed By: rin
Date: Tue Sep 6 23:14:28 UTC 2022
Modified Files:
src/sys/arch/powerpc/fpu: fpu_sqrt.c
Log Message:
Style sync with other parts of this file, as well as FreeBSD:
https://cgit.freebsd.org/src/commit/sys/powerpc/fpu/fpu_sqrt.c?id=81dd9c5e69a2709ae3317dd383093e1c8a970d9e
NFC since q is initialized to zero just above.
To generate a diff of this commit:
cvs rdiff -u -r1.13 -r1.14 src/sys/arch/powerpc/fpu/fpu_sqrt.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/powerpc/fpu/fpu_sqrt.c
diff -u src/sys/arch/powerpc/fpu/fpu_sqrt.c:1.13 src/sys/arch/powerpc/fpu/fpu_sqrt.c:1.14
--- src/sys/arch/powerpc/fpu/fpu_sqrt.c:1.13 Tue Sep 6 23:12:42 2022
+++ src/sys/arch/powerpc/fpu/fpu_sqrt.c Tue Sep 6 23:14:28 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: fpu_sqrt.c,v 1.13 2022/09/06 23:12:42 rin Exp $ */
+/* $NetBSD: fpu_sqrt.c,v 1.14 2022/09/06 23:14:28 rin Exp $ */
/*
* Copyright (c) 1992, 1993
@@ -45,7 +45,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: fpu_sqrt.c,v 1.13 2022/09/06 23:12:42 rin Exp $");
+__KERNEL_RCSID(0, "$NetBSD: fpu_sqrt.c,v 1.14 2022/09/06 23:14:28 rin Exp $");
#include
#if defined(DIAGNOSTIC)||defined(DEBUG)
@@ -352,7 +352,7 @@ fpu_sqrt(struct fpemu *fe)
FPU_SUBC(d0, x0, t0);
if ((int)d0 >= 0) {
x0 = d0, x1 = d1, x2 = d2;
- q |= bit;
+ q = bit;
y1 |= 1; /* now t1, y1 are set in concrete */
}
ODD_DOUBLE;
@@ -386,7 +386,7 @@ fpu_sqrt(struct fpemu *fe)
FPU_SUBC(d0, x0, t0);
if ((int)d0 >= 0) {
x0 = d0, x1 = d1, x2 = d2; x3 = d3;
- q |= bit;
+ q = bit;
y2 |= 1;
}
ODD_DOUBLE;
CVS commit: src/sys/arch/powerpc/fpu
Module Name:src Committed By: rin Date: Tue Sep 6 23:14:28 UTC 2022 Modified Files: src/sys/arch/powerpc/fpu: fpu_sqrt.c Log Message: Style sync with other parts of this file, as well as FreeBSD: https://cgit.freebsd.org/src/commit/sys/powerpc/fpu/fpu_sqrt.c?id=81dd9c5e69a2709ae3317dd383093e1c8a970d9e NFC since q is initialized to zero just above. To generate a diff of this commit: cvs rdiff -u -r1.13 -r1.14 src/sys/arch/powerpc/fpu/fpu_sqrt.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/powerpc/fpu
Module Name:src
Committed By: rin
Date: Tue Sep 6 23:12:42 UTC 2022
Modified Files:
src/sys/arch/powerpc/fpu: fpu_sqrt.c
Log Message:
Fix errors in calculation of intermediate mantissa bits > 95.
NFC since this does not affect the final results; we do not
support any extended-precision formats at the moment (never?).
Taken from FreeBSD:
https://cgit.freebsd.org/src/commit/sys/powerpc/fpu/fpu_sqrt.c?id=81dd9c5e69a2709ae3317dd383093e1c8a970d9e
except for stylistic changes that will be committed soon.
To generate a diff of this commit:
cvs rdiff -u -r1.12 -r1.13 src/sys/arch/powerpc/fpu/fpu_sqrt.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/powerpc/fpu/fpu_sqrt.c
diff -u src/sys/arch/powerpc/fpu/fpu_sqrt.c:1.12 src/sys/arch/powerpc/fpu/fpu_sqrt.c:1.13
--- src/sys/arch/powerpc/fpu/fpu_sqrt.c:1.12 Tue Sep 6 23:00:43 2022
+++ src/sys/arch/powerpc/fpu/fpu_sqrt.c Tue Sep 6 23:12:42 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: fpu_sqrt.c,v 1.12 2022/09/06 23:00:43 rin Exp $ */
+/* $NetBSD: fpu_sqrt.c,v 1.13 2022/09/06 23:12:42 rin Exp $ */
/*
* Copyright (c) 1992, 1993
@@ -45,7 +45,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: fpu_sqrt.c,v 1.12 2022/09/06 23:00:43 rin Exp $");
+__KERNEL_RCSID(0, "$NetBSD: fpu_sqrt.c,v 1.13 2022/09/06 23:12:42 rin Exp $");
#include
#if defined(DIAGNOSTIC)||defined(DEBUG)
@@ -380,16 +380,16 @@ fpu_sqrt(struct fpemu *fe)
bit = 1 << 31;
EVEN_DOUBLE;
t3 = bit;
- FPU_SUBS(d3, x3, t3); __USE(d3);
+ FPU_SUBS(d3, x3, t3);
FPU_SUBCS(d2, x2, t2);
FPU_SUBCS(d1, x1, t1);
FPU_SUBC(d0, x0, t0);
- ODD_DOUBLE;
if ((int)d0 >= 0) {
- x0 = d0, x1 = d1, x2 = d2;
+ x0 = d0, x1 = d1, x2 = d2; x3 = d3;
q |= bit;
y2 |= 1;
}
+ ODD_DOUBLE;
while ((bit >>= 1) != 0) {
EVEN_DOUBLE;
t3 = y3 | bit;
@@ -398,7 +398,7 @@ fpu_sqrt(struct fpemu *fe)
FPU_SUBCS(d1, x1, t1);
FPU_SUBC(d0, x0, t0);
if ((int)d0 >= 0) {
- x0 = d0, x1 = d1, x2 = d2;
+ x0 = d0, x1 = d1, x2 = d2; x3 = d3;
q |= bit;
y3 |= bit << 1;
}
CVS commit: src/sys/arch/powerpc/fpu
Module Name:src Committed By: rin Date: Tue Sep 6 23:12:42 UTC 2022 Modified Files: src/sys/arch/powerpc/fpu: fpu_sqrt.c Log Message: Fix errors in calculation of intermediate mantissa bits > 95. NFC since this does not affect the final results; we do not support any extended-precision formats at the moment (never?). Taken from FreeBSD: https://cgit.freebsd.org/src/commit/sys/powerpc/fpu/fpu_sqrt.c?id=81dd9c5e69a2709ae3317dd383093e1c8a970d9e except for stylistic changes that will be committed soon. To generate a diff of this commit: cvs rdiff -u -r1.12 -r1.13 src/sys/arch/powerpc/fpu/fpu_sqrt.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/powerpc/fpu
Module Name:src
Committed By: rin
Date: Tue Sep 6 23:07:53 UTC 2022
Modified Files:
src/sys/arch/powerpc/fpu: fpu_emu.h
Log Message:
fpu_sub(): Do not invert sign bit of NaN.
Taken from FreeBSD:
https://cgit.freebsd.org/src/commit/lib/libc/sparc64/fpu?h=releng/12.3&id=8ff9d52cd08cbf31efde4052d3593a5680eaa2a5
To generate a diff of this commit:
cvs rdiff -u -r1.10 -r1.11 src/sys/arch/powerpc/fpu/fpu_emu.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/powerpc/fpu/fpu_emu.h
diff -u src/sys/arch/powerpc/fpu/fpu_emu.h:1.10 src/sys/arch/powerpc/fpu/fpu_emu.h:1.11
--- src/sys/arch/powerpc/fpu/fpu_emu.h:1.10 Mon Sep 5 00:27:16 2022
+++ src/sys/arch/powerpc/fpu/fpu_emu.h Tue Sep 6 23:07:53 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: fpu_emu.h,v 1.10 2022/09/05 00:27:16 rin Exp $ */
+/* $NetBSD: fpu_emu.h,v 1.11 2022/09/06 23:07:53 rin Exp $ */
/*
* Copyright (c) 1992, 1993
@@ -163,7 +163,8 @@ struct fpemu {
* Each returns a pointer to the result and/or sets exceptions.
*/
struct fpn *fpu_add(struct fpemu *);
-#define fpu_sub(fe) ((fe)->fe_f2.fp_sign ^= 1, fpu_add(fe))
+#define fpu_sub(fe) \
+((ISNAN(&(fe)->fe_f2) ? 0 : ((fe)->fe_f2.fp_sign ^= 1)), fpu_add(fe))
struct fpn *fpu_mul(struct fpemu *);
struct fpn *fpu_div(struct fpemu *);
struct fpn *fpu_sqrt(struct fpemu *);
CVS commit: src/sys/arch/powerpc/fpu
Module Name:src Committed By: rin Date: Tue Sep 6 23:07:53 UTC 2022 Modified Files: src/sys/arch/powerpc/fpu: fpu_emu.h Log Message: fpu_sub(): Do not invert sign bit of NaN. Taken from FreeBSD: https://cgit.freebsd.org/src/commit/lib/libc/sparc64/fpu?h=releng/12.3&id=8ff9d52cd08cbf31efde4052d3593a5680eaa2a5 To generate a diff of this commit: cvs rdiff -u -r1.10 -r1.11 src/sys/arch/powerpc/fpu/fpu_emu.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/powerpc/fpu
Module Name:src Committed By: rin Date: Tue Sep 6 23:05:52 UTC 2022 Modified Files: src/sys/arch/powerpc/fpu: fpu_mul.c Log Message: fpu_mul(): Do not multiply sign bits for NaN. To generate a diff of this commit: cvs rdiff -u -r1.7 -r1.8 src/sys/arch/powerpc/fpu/fpu_mul.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/powerpc/fpu
Module Name:src Committed By: rin Date: Tue Sep 6 23:05:52 UTC 2022 Modified Files: src/sys/arch/powerpc/fpu: fpu_mul.c Log Message: fpu_mul(): Do not multiply sign bits for NaN. To generate a diff of this commit: cvs rdiff -u -r1.7 -r1.8 src/sys/arch/powerpc/fpu/fpu_mul.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/powerpc/fpu/fpu_mul.c diff -u src/sys/arch/powerpc/fpu/fpu_mul.c:1.7 src/sys/arch/powerpc/fpu/fpu_mul.c:1.8 --- src/sys/arch/powerpc/fpu/fpu_mul.c:1.7 Tue Sep 6 23:04:08 2022 +++ src/sys/arch/powerpc/fpu/fpu_mul.c Tue Sep 6 23:05:52 2022 @@ -1,4 +1,4 @@ -/* $NetBSD: fpu_mul.c,v 1.7 2022/09/06 23:04:08 rin Exp $ */ +/* $NetBSD: fpu_mul.c,v 1.8 2022/09/06 23:05:52 rin Exp $ */ /* * Copyright (c) 1992, 1993 @@ -45,7 +45,7 @@ */ #include -__KERNEL_RCSID(0, "$NetBSD: fpu_mul.c,v 1.7 2022/09/06 23:04:08 rin Exp $"); +__KERNEL_RCSID(0, "$NetBSD: fpu_mul.c,v 1.8 2022/09/06 23:05:52 rin Exp $"); #include #if defined(DIAGNOSTIC)||defined(DEBUG) @@ -135,8 +135,7 @@ fpu_mul(struct fpemu *fe) if (ISSNAN(x) || ISSNAN(y)) fe->fe_cx |= FPSCR_VXSNAN; if (ISNAN(x)) - SWAP(x, y); - y->fp_sign ^= x->fp_sign; + y = x; DUMPFPN(FPE_REG, y); return (y); }
CVS commit: src/sys/arch/powerpc/fpu
Module Name:src
Committed By: rin
Date: Tue Sep 6 23:04:08 UTC 2022
Modified Files:
src/sys/arch/powerpc/fpu: fpu_add.c fpu_div.c fpu_mul.c
Log Message:
Fix priority for NaN propagation: frA > frB > frC.
To generate a diff of this commit:
cvs rdiff -u -r1.6 -r1.7 src/sys/arch/powerpc/fpu/fpu_add.c \
src/sys/arch/powerpc/fpu/fpu_mul.c
cvs rdiff -u -r1.8 -r1.9 src/sys/arch/powerpc/fpu/fpu_div.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/powerpc/fpu/fpu_add.c
diff -u src/sys/arch/powerpc/fpu/fpu_add.c:1.6 src/sys/arch/powerpc/fpu/fpu_add.c:1.7
--- src/sys/arch/powerpc/fpu/fpu_add.c:1.6 Thu Sep 1 06:10:58 2022
+++ src/sys/arch/powerpc/fpu/fpu_add.c Tue Sep 6 23:04:08 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: fpu_add.c,v 1.6 2022/09/01 06:10:58 rin Exp $ */
+/* $NetBSD: fpu_add.c,v 1.7 2022/09/06 23:04:08 rin Exp $ */
/*
* Copyright (c) 1992, 1993
@@ -47,7 +47,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: fpu_add.c,v 1.6 2022/09/01 06:10:58 rin Exp $");
+__KERNEL_RCSID(0, "$NetBSD: fpu_add.c,v 1.7 2022/09/06 23:04:08 rin Exp $");
#include
#if defined(DIAGNOSTIC)||defined(DEBUG)
@@ -93,13 +93,15 @@ fpu_add(struct fpemu *fe)
DUMPFPN(FPE_REG, x);
DUMPFPN(FPE_REG, y);
DPRINTF(FPE_REG, ("=>\n"));
- ORDER(x, y);
- if (ISNAN(y)) {
- if (ISSNAN(y))
+ if (ISNAN(x) || ISNAN(y)) {
+ if (ISSNAN(x) || ISSNAN(y))
fe->fe_cx |= FPSCR_VXSNAN;
+ if (ISNAN(x))
+ y = x;
DUMPFPN(FPE_REG, y);
return (y);
}
+ ORDER(x, y);
if (ISINF(y)) {
if (ISINF(x) && x->fp_sign != y->fp_sign) {
fe->fe_cx |= FPSCR_VXISI;
Index: src/sys/arch/powerpc/fpu/fpu_mul.c
diff -u src/sys/arch/powerpc/fpu/fpu_mul.c:1.6 src/sys/arch/powerpc/fpu/fpu_mul.c:1.7
--- src/sys/arch/powerpc/fpu/fpu_mul.c:1.6 Thu Sep 1 06:10:58 2022
+++ src/sys/arch/powerpc/fpu/fpu_mul.c Tue Sep 6 23:04:08 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: fpu_mul.c,v 1.6 2022/09/01 06:10:58 rin Exp $ */
+/* $NetBSD: fpu_mul.c,v 1.7 2022/09/06 23:04:08 rin Exp $ */
/*
* Copyright (c) 1992, 1993
@@ -45,7 +45,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: fpu_mul.c,v 1.6 2022/09/01 06:10:58 rin Exp $");
+__KERNEL_RCSID(0, "$NetBSD: fpu_mul.c,v 1.7 2022/09/06 23:04:08 rin Exp $");
#include
#if defined(DIAGNOSTIC)||defined(DEBUG)
@@ -131,14 +131,16 @@ fpu_mul(struct fpemu *fe)
DUMPFPN(FPE_REG, y);
DPRINTF(FPE_REG, ("=>\n"));
- ORDER(x, y);
- if (ISNAN(y)) {
- y->fp_sign ^= x->fp_sign;
- if (ISSNAN(y))
+ if (ISNAN(x) || ISNAN(y)) {
+ if (ISSNAN(x) || ISSNAN(y))
fe->fe_cx |= FPSCR_VXSNAN;
+ if (ISNAN(x))
+ SWAP(x, y);
+ y->fp_sign ^= x->fp_sign;
DUMPFPN(FPE_REG, y);
return (y);
}
+ ORDER(x, y);
if (ISINF(y)) {
if (ISZERO(x)) {
fe->fe_cx |= FPSCR_VXIMZ;
Index: src/sys/arch/powerpc/fpu/fpu_div.c
diff -u src/sys/arch/powerpc/fpu/fpu_div.c:1.8 src/sys/arch/powerpc/fpu/fpu_div.c:1.9
--- src/sys/arch/powerpc/fpu/fpu_div.c:1.8 Sun Sep 4 13:32:14 2022
+++ src/sys/arch/powerpc/fpu/fpu_div.c Tue Sep 6 23:04:08 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: fpu_div.c,v 1.8 2022/09/04 13:32:14 rin Exp $ */
+/* $NetBSD: fpu_div.c,v 1.9 2022/09/06 23:04:08 rin Exp $ */
/*
* Copyright (c) 1992, 1993
@@ -45,7 +45,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: fpu_div.c,v 1.8 2022/09/04 13:32:14 rin Exp $");
+__KERNEL_RCSID(0, "$NetBSD: fpu_div.c,v 1.9 2022/09/06 23:04:08 rin Exp $");
#include
#if defined(DIAGNOSTIC)||defined(DEBUG)
@@ -182,9 +182,10 @@ fpu_div(struct fpemu *fe)
DUMPFPN(FPE_REG, y);
DPRINTF(FPE_REG, ("=>\n"));
if (ISNAN(x) || ISNAN(y)) {
- ORDER(x, y);
if (ISSNAN(x) || ISSNAN(y))
fe->fe_cx |= FPSCR_VXSNAN;
+ if (ISNAN(x))
+ y = x;
DUMPFPN(FPE_REG, y);
return (y);
}
CVS commit: src/sys/arch/powerpc/fpu
Module Name:src Committed By: rin Date: Tue Sep 6 23:04:08 UTC 2022 Modified Files: src/sys/arch/powerpc/fpu: fpu_add.c fpu_div.c fpu_mul.c Log Message: Fix priority for NaN propagation: frA > frB > frC. To generate a diff of this commit: cvs rdiff -u -r1.6 -r1.7 src/sys/arch/powerpc/fpu/fpu_add.c \ src/sys/arch/powerpc/fpu/fpu_mul.c cvs rdiff -u -r1.8 -r1.9 src/sys/arch/powerpc/fpu/fpu_div.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/powerpc/fpu
Module Name:src Committed By: rin Date: Tue Sep 6 23:02:36 UTC 2022 Modified Files: src/sys/arch/powerpc/fpu: fpu_subr.c Log Message: FPU generates QNaN with all payload bits being cleared. To generate a diff of this commit: cvs rdiff -u -r1.8 -r1.9 src/sys/arch/powerpc/fpu/fpu_subr.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/powerpc/fpu/fpu_subr.c diff -u src/sys/arch/powerpc/fpu/fpu_subr.c:1.8 src/sys/arch/powerpc/fpu/fpu_subr.c:1.9 --- src/sys/arch/powerpc/fpu/fpu_subr.c:1.8 Sun Sep 4 22:34:58 2022 +++ src/sys/arch/powerpc/fpu/fpu_subr.c Tue Sep 6 23:02:36 2022 @@ -1,4 +1,4 @@ -/* $NetBSD: fpu_subr.c,v 1.8 2022/09/04 22:34:58 rin Exp $ */ +/* $NetBSD: fpu_subr.c,v 1.9 2022/09/06 23:02:36 rin Exp $ */ /* * Copyright (c) 1992, 1993 @@ -45,7 +45,7 @@ */ #include -__KERNEL_RCSID(0, "$NetBSD: fpu_subr.c,v 1.8 2022/09/04 22:34:58 rin Exp $"); +__KERNEL_RCSID(0, "$NetBSD: fpu_subr.c,v 1.9 2022/09/06 23:02:36 rin Exp $"); #include #include @@ -209,8 +209,8 @@ fpu_newnan(struct fpemu *fe) fp = &fe->fe_f3; fp->fp_class = FPC_QNAN; fp->fp_sign = 0; - fp->fp_mant[0] = FP_1 - 1; - fp->fp_mant[1] = fp->fp_mant[2] = fp->fp_mant[3] = ~0; + fp->fp_mant[0] = FP_QUIETBIT; + fp->fp_mant[1] = fp->fp_mant[2] = fp->fp_mant[3] = 0; DUMPFPN(FPE_REG, fp); return (fp); }
CVS commit: src/sys/arch/powerpc/fpu
Module Name:src Committed By: rin Date: Tue Sep 6 23:02:36 UTC 2022 Modified Files: src/sys/arch/powerpc/fpu: fpu_subr.c Log Message: FPU generates QNaN with all payload bits being cleared. To generate a diff of this commit: cvs rdiff -u -r1.8 -r1.9 src/sys/arch/powerpc/fpu/fpu_subr.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/powerpc/fpu
Module Name:src Committed By: rin Date: Tue Sep 6 23:00:43 UTC 2022 Modified Files: src/sys/arch/powerpc/fpu: fpu_sqrt.c Log Message: IEEE 754 and Power ISA require sqrt(+0) = +0 and sqrt(-0) = -0, not Inf. To generate a diff of this commit: cvs rdiff -u -r1.11 -r1.12 src/sys/arch/powerpc/fpu/fpu_sqrt.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/powerpc/fpu
Module Name:src
Committed By: rin
Date: Tue Sep 6 23:00:43 UTC 2022
Modified Files:
src/sys/arch/powerpc/fpu: fpu_sqrt.c
Log Message:
IEEE 754 and Power ISA require sqrt(+0) = +0 and sqrt(-0) = -0, not Inf.
To generate a diff of this commit:
cvs rdiff -u -r1.11 -r1.12 src/sys/arch/powerpc/fpu/fpu_sqrt.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/powerpc/fpu/fpu_sqrt.c
diff -u src/sys/arch/powerpc/fpu/fpu_sqrt.c:1.11 src/sys/arch/powerpc/fpu/fpu_sqrt.c:1.12
--- src/sys/arch/powerpc/fpu/fpu_sqrt.c:1.11 Thu Sep 1 06:10:58 2022
+++ src/sys/arch/powerpc/fpu/fpu_sqrt.c Tue Sep 6 23:00:43 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: fpu_sqrt.c,v 1.11 2022/09/01 06:10:58 rin Exp $ */
+/* $NetBSD: fpu_sqrt.c,v 1.12 2022/09/06 23:00:43 rin Exp $ */
/*
* Copyright (c) 1992, 1993
@@ -45,7 +45,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: fpu_sqrt.c,v 1.11 2022/09/01 06:10:58 rin Exp $");
+__KERNEL_RCSID(0, "$NetBSD: fpu_sqrt.c,v 1.12 2022/09/06 23:00:43 rin Exp $");
#include
#if defined(DIAGNOSTIC)||defined(DEBUG)
@@ -221,8 +221,6 @@ fpu_sqrt(struct fpemu *fe)
return (x);
}
if (ISZERO(x)) {
- fe->fe_cx |= FPSCR_ZX;
- x->fp_class = FPC_INF;
DUMPFPN(FPE_REG, x);
return (x);
}
CVS commit: src/sys/arch/powerpc/fpu
Module Name:src Committed By: rin Date: Mon Sep 5 00:27:16 UTC 2022 Modified Files: src/sys/arch/powerpc/fpu: fpu_emu.h fpu_extern.h Log Message: Clean up fpu_extern.h; only a function public to external is fpu_emulate(). Other functions are private to fpu_*.c and therefore live in fpu_emu.h. Also, drop needless forward struct declarations. NFC. To generate a diff of this commit: cvs rdiff -u -r1.9 -r1.10 src/sys/arch/powerpc/fpu/fpu_emu.h cvs rdiff -u -r1.11 -r1.12 src/sys/arch/powerpc/fpu/fpu_extern.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/powerpc/fpu/fpu_emu.h diff -u src/sys/arch/powerpc/fpu/fpu_emu.h:1.9 src/sys/arch/powerpc/fpu/fpu_emu.h:1.10 --- src/sys/arch/powerpc/fpu/fpu_emu.h:1.9 Sun Sep 4 13:14:57 2022 +++ src/sys/arch/powerpc/fpu/fpu_emu.h Mon Sep 5 00:27:16 2022 @@ -1,4 +1,4 @@ -/* $NetBSD: fpu_emu.h,v 1.9 2022/09/04 13:14:57 rin Exp $ */ +/* $NetBSD: fpu_emu.h,v 1.10 2022/09/05 00:27:16 rin Exp $ */ /* * Copyright (c) 1992, 1993 @@ -185,6 +185,8 @@ struct fpn *fpu_newnan(struct fpemu *); */ int fpu_shr(struct fpn *, int); +void fpu_norm(struct fpn *); + void fpu_explode(struct fpemu *, struct fpn *, int, uint64_t); void fpu_implode(struct fpemu *, struct fpn *, int, uint64_t *); Index: src/sys/arch/powerpc/fpu/fpu_extern.h diff -u src/sys/arch/powerpc/fpu/fpu_extern.h:1.11 src/sys/arch/powerpc/fpu/fpu_extern.h:1.12 --- src/sys/arch/powerpc/fpu/fpu_extern.h:1.11 Mon Sep 5 00:25:18 2022 +++ src/sys/arch/powerpc/fpu/fpu_extern.h Mon Sep 5 00:27:16 2022 @@ -1,4 +1,4 @@ -/* $NetBSD: fpu_extern.h,v 1.11 2022/09/05 00:25:18 rin Exp $ */ +/* $NetBSD: fpu_extern.h,v 1.12 2022/09/05 00:27:16 rin Exp $ */ /*- * Copyright (c) 1995 The NetBSD Foundation, Inc. @@ -35,40 +35,10 @@ #include #include -struct proc; -struct fpreg; struct trapframe; -union instr; -struct fpemu; -struct fpn; +struct fpreg; /* fpu.c */ bool fpu_emulate(struct trapframe *, struct fpreg *, ksiginfo_t *); -/* fpu_add.c */ -struct fpn *fpu_add(struct fpemu *); - -/* fpu_compare.c */ -void fpu_compare(struct fpemu *, int); - -/* fpu_div.c */ -struct fpn *fpu_div(struct fpemu *); - -/* fpu_explode.c */ -void fpu_explode(struct fpemu *, struct fpn *, int, uint64_t); - -/* fpu_implode.c */ -void fpu_implode(struct fpemu *, struct fpn *, int, uint64_t *); - -/* fpu_mul.c */ -struct fpn *fpu_mul(struct fpemu *); - -/* fpu_sqrt.c */ -struct fpn *fpu_sqrt(struct fpemu *); - -/* fpu_subr.c */ -int fpu_shr(struct fpn *, int); -void fpu_norm(struct fpn *); -struct fpn *fpu_newnan(struct fpemu *); - #endif /* _POWERPC_FPU_FPU_EXTERN_H_ */
CVS commit: src/sys/arch/powerpc/fpu
Module Name:src Committed By: rin Date: Mon Sep 5 00:27:16 UTC 2022 Modified Files: src/sys/arch/powerpc/fpu: fpu_emu.h fpu_extern.h Log Message: Clean up fpu_extern.h; only a function public to external is fpu_emulate(). Other functions are private to fpu_*.c and therefore live in fpu_emu.h. Also, drop needless forward struct declarations. NFC. To generate a diff of this commit: cvs rdiff -u -r1.9 -r1.10 src/sys/arch/powerpc/fpu/fpu_emu.h cvs rdiff -u -r1.11 -r1.12 src/sys/arch/powerpc/fpu/fpu_extern.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/powerpc/fpu
Module Name:src
Committed By: rin
Date: Mon Sep 5 00:25:18 UTC 2022
Modified Files:
src/sys/arch/powerpc/fpu: fpu_emu.c fpu_extern.h
Log Message:
static-fy fpu_execute().
To generate a diff of this commit:
cvs rdiff -u -r1.53 -r1.54 src/sys/arch/powerpc/fpu/fpu_emu.c
cvs rdiff -u -r1.10 -r1.11 src/sys/arch/powerpc/fpu/fpu_extern.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/powerpc/fpu/fpu_emu.c
diff -u src/sys/arch/powerpc/fpu/fpu_emu.c:1.53 src/sys/arch/powerpc/fpu/fpu_emu.c:1.54
--- src/sys/arch/powerpc/fpu/fpu_emu.c:1.53 Sun Sep 4 13:32:14 2022
+++ src/sys/arch/powerpc/fpu/fpu_emu.c Mon Sep 5 00:25:18 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: fpu_emu.c,v 1.53 2022/09/04 13:32:14 rin Exp $ */
+/* $NetBSD: fpu_emu.c,v 1.54 2022/09/05 00:25:18 rin Exp $ */
/*
* Copyright 2001 Wasabi Systems, Inc.
@@ -76,7 +76,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: fpu_emu.c,v 1.53 2022/09/04 13:32:14 rin Exp $");
+__KERNEL_RCSID(0, "$NetBSD: fpu_emu.c,v 1.54 2022/09/05 00:25:18 rin Exp $");
#ifdef _KERNEL_OPT
#include "opt_ddb.h"
@@ -167,6 +167,8 @@ int fpe_debug = 0;
extern vaddr_t opc_disasm(vaddr_t loc, int opcode);
#endif
+static int fpu_execute(struct trapframe *, struct fpemu *, union instr *);
+
#ifdef DEBUG
/*
* Dump a `fpn' structure.
@@ -288,7 +290,7 @@ success:
* Note that we do not catch all illegal opcodes, so you can, for instance,
* multiply two integers this way.
*/
-int
+static int
fpu_execute(struct trapframe *tf, struct fpemu *fe, union instr *insn)
{
struct fpn *fp;
Index: src/sys/arch/powerpc/fpu/fpu_extern.h
diff -u src/sys/arch/powerpc/fpu/fpu_extern.h:1.10 src/sys/arch/powerpc/fpu/fpu_extern.h:1.11
--- src/sys/arch/powerpc/fpu/fpu_extern.h:1.10 Mon Sep 5 00:24:24 2022
+++ src/sys/arch/powerpc/fpu/fpu_extern.h Mon Sep 5 00:25:18 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: fpu_extern.h,v 1.10 2022/09/05 00:24:24 rin Exp $ */
+/* $NetBSD: fpu_extern.h,v 1.11 2022/09/05 00:25:18 rin Exp $ */
/*-
* Copyright (c) 1995 The NetBSD Foundation, Inc.
@@ -44,7 +44,6 @@ struct fpn;
/* fpu.c */
bool fpu_emulate(struct trapframe *, struct fpreg *, ksiginfo_t *);
-int fpu_execute(struct trapframe *, struct fpemu *, union instr *);
/* fpu_add.c */
struct fpn *fpu_add(struct fpemu *);
CVS commit: src/sys/arch/powerpc/fpu
Module Name:src Committed By: rin Date: Mon Sep 5 00:25:18 UTC 2022 Modified Files: src/sys/arch/powerpc/fpu: fpu_emu.c fpu_extern.h Log Message: static-fy fpu_execute(). To generate a diff of this commit: cvs rdiff -u -r1.53 -r1.54 src/sys/arch/powerpc/fpu/fpu_emu.c cvs rdiff -u -r1.10 -r1.11 src/sys/arch/powerpc/fpu/fpu_extern.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/powerpc/fpu
Module Name:src
Committed By: rin
Date: Mon Sep 5 00:24:24 UTC 2022
Modified Files:
src/sys/arch/powerpc/fpu: fpu_explode.c fpu_extern.h
Log Message:
static-fy fpu_[ixsd]tof(). NFC.
To generate a diff of this commit:
cvs rdiff -u -r1.12 -r1.13 src/sys/arch/powerpc/fpu/fpu_explode.c
cvs rdiff -u -r1.9 -r1.10 src/sys/arch/powerpc/fpu/fpu_extern.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/powerpc/fpu/fpu_explode.c
diff -u src/sys/arch/powerpc/fpu/fpu_explode.c:1.12 src/sys/arch/powerpc/fpu/fpu_explode.c:1.13
--- src/sys/arch/powerpc/fpu/fpu_explode.c:1.12 Fri Sep 2 12:40:49 2022
+++ src/sys/arch/powerpc/fpu/fpu_explode.c Mon Sep 5 00:24:24 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: fpu_explode.c,v 1.12 2022/09/02 12:40:49 rin Exp $ */
+/* $NetBSD: fpu_explode.c,v 1.13 2022/09/05 00:24:24 rin Exp $ */
/*
* Copyright (c) 1992, 1993
@@ -46,7 +46,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: fpu_explode.c,v 1.12 2022/09/02 12:40:49 rin Exp $");
+__KERNEL_RCSID(0, "$NetBSD: fpu_explode.c,v 1.13 2022/09/05 00:24:24 rin Exp $");
#include
#include
@@ -60,6 +60,11 @@ __KERNEL_RCSID(0, "$NetBSD: fpu_explode.
#include
#include
+static int fpu_itof(struct fpn *, u_int);
+static int fpu_xtof(struct fpn *, uint64_t);
+static int fpu_stof(struct fpn *, u_int);
+static int fpu_dtof(struct fpn *, u_int, u_int);
+
/*
* N.B.: in all of the following, we assume the FP format is
*
@@ -82,7 +87,7 @@ __KERNEL_RCSID(0, "$NetBSD: fpu_explode.
/*
* int -> fpn.
*/
-int
+static int
fpu_itof(struct fpn *fp, u_int lo)
{
@@ -106,7 +111,7 @@ fpu_itof(struct fpn *fp, u_int lo)
/*
* 64-bit int -> fpn.
*/
-int
+static int
fpu_xtof(struct fpn *fp, uint64_t i)
{
@@ -165,7 +170,7 @@ fpu_xtof(struct fpn *fp, uint64_t i)
* We assume a single occupies at most (64-FP_LG) bits in the internal
* format: i.e., needs at most fp_mant[0] and fp_mant[1].
*/
-int
+static int
fpu_stof(struct fpn *fp, u_int hi)
{
int exp;
@@ -183,7 +188,7 @@ fpu_stof(struct fpn *fp, u_int hi)
* 64-bit double -> fpn.
* We assume this uses at most (96-FP_LG) bits.
*/
-int
+static int
fpu_dtof(struct fpn *fp, u_int hi, u_int lo)
{
int exp;
Index: src/sys/arch/powerpc/fpu/fpu_extern.h
diff -u src/sys/arch/powerpc/fpu/fpu_extern.h:1.9 src/sys/arch/powerpc/fpu/fpu_extern.h:1.10
--- src/sys/arch/powerpc/fpu/fpu_extern.h:1.9 Fri Sep 2 12:40:49 2022
+++ src/sys/arch/powerpc/fpu/fpu_extern.h Mon Sep 5 00:24:24 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: fpu_extern.h,v 1.9 2022/09/02 12:40:49 rin Exp $ */
+/* $NetBSD: fpu_extern.h,v 1.10 2022/09/05 00:24:24 rin Exp $ */
/*-
* Copyright (c) 1995 The NetBSD Foundation, Inc.
@@ -56,10 +56,6 @@ void fpu_compare(struct fpemu *, int);
struct fpn *fpu_div(struct fpemu *);
/* fpu_explode.c */
-int fpu_itof(struct fpn *, u_int);
-int fpu_xtof(struct fpn *, uint64_t);
-int fpu_stof(struct fpn *, u_int);
-int fpu_dtof(struct fpn *, u_int, u_int);
void fpu_explode(struct fpemu *, struct fpn *, int, uint64_t);
/* fpu_implode.c */
CVS commit: src/sys/arch/powerpc/fpu
Module Name:src Committed By: rin Date: Mon Sep 5 00:24:24 UTC 2022 Modified Files: src/sys/arch/powerpc/fpu: fpu_explode.c fpu_extern.h Log Message: static-fy fpu_[ixsd]tof(). NFC. To generate a diff of this commit: cvs rdiff -u -r1.12 -r1.13 src/sys/arch/powerpc/fpu/fpu_explode.c cvs rdiff -u -r1.9 -r1.10 src/sys/arch/powerpc/fpu/fpu_extern.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/powerpc/fpu
Module Name:src
Committed By: rin
Date: Sun Sep 4 22:34:58 UTC 2022
Modified Files:
src/sys/arch/powerpc/fpu: fpu_subr.c
Log Message:
Unconditionally include for KASSERT{,MSG}().
Fix (!DIAGNOSTIC && !DEBUG) build.
To generate a diff of this commit:
cvs rdiff -u -r1.7 -r1.8 src/sys/arch/powerpc/fpu/fpu_subr.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/powerpc/fpu/fpu_subr.c
diff -u src/sys/arch/powerpc/fpu/fpu_subr.c:1.7 src/sys/arch/powerpc/fpu/fpu_subr.c:1.8
--- src/sys/arch/powerpc/fpu/fpu_subr.c:1.7 Fri Sep 2 12:29:58 2022
+++ src/sys/arch/powerpc/fpu/fpu_subr.c Sun Sep 4 22:34:58 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: fpu_subr.c,v 1.7 2022/09/02 12:29:58 rin Exp $ */
+/* $NetBSD: fpu_subr.c,v 1.8 2022/09/04 22:34:58 rin Exp $ */
/*
* Copyright (c) 1992, 1993
@@ -45,12 +45,10 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: fpu_subr.c,v 1.7 2022/09/02 12:29:58 rin Exp $");
+__KERNEL_RCSID(0, "$NetBSD: fpu_subr.c,v 1.8 2022/09/04 22:34:58 rin Exp $");
#include
-#if defined(DIAGNOSTIC)||defined(DEBUG)
#include
-#endif
#include
#include
CVS commit: src/sys/arch/powerpc/fpu
Module Name:src
Committed By: rin
Date: Sun Sep 4 22:34:58 UTC 2022
Modified Files:
src/sys/arch/powerpc/fpu: fpu_subr.c
Log Message:
Unconditionally include for KASSERT{,MSG}().
Fix (!DIAGNOSTIC && !DEBUG) build.
To generate a diff of this commit:
cvs rdiff -u -r1.7 -r1.8 src/sys/arch/powerpc/fpu/fpu_subr.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
CVS commit: src/sys/arch/powerpc/fpu
Module Name:src
Committed By: rin
Date: Sun Sep 4 13:32:14 UTC 2022
Modified Files:
src/sys/arch/powerpc/fpu: fpu_div.c fpu_emu.c
Log Message:
Trailing white-space/TAB.
To generate a diff of this commit:
cvs rdiff -u -r1.7 -r1.8 src/sys/arch/powerpc/fpu/fpu_div.c
cvs rdiff -u -r1.52 -r1.53 src/sys/arch/powerpc/fpu/fpu_emu.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/powerpc/fpu/fpu_div.c
diff -u src/sys/arch/powerpc/fpu/fpu_div.c:1.7 src/sys/arch/powerpc/fpu/fpu_div.c:1.8
--- src/sys/arch/powerpc/fpu/fpu_div.c:1.7 Thu Sep 1 06:10:58 2022
+++ src/sys/arch/powerpc/fpu/fpu_div.c Sun Sep 4 13:32:14 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: fpu_div.c,v 1.7 2022/09/01 06:10:58 rin Exp $ */
+/* $NetBSD: fpu_div.c,v 1.8 2022/09/04 13:32:14 rin Exp $ */
/*
* Copyright (c) 1992, 1993
@@ -45,7 +45,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: fpu_div.c,v 1.7 2022/09/01 06:10:58 rin Exp $");
+__KERNEL_RCSID(0, "$NetBSD: fpu_div.c,v 1.8 2022/09/04 13:32:14 rin Exp $");
#include
#if defined(DIAGNOSTIC)||defined(DEBUG)
@@ -190,7 +190,7 @@ fpu_div(struct fpemu *fe)
}
/*
* Need to split the following out cause they generate different
- * exceptions.
+ * exceptions.
*/
if (ISINF(x)) {
if (x->fp_class == y->fp_class) {
Index: src/sys/arch/powerpc/fpu/fpu_emu.c
diff -u src/sys/arch/powerpc/fpu/fpu_emu.c:1.52 src/sys/arch/powerpc/fpu/fpu_emu.c:1.53
--- src/sys/arch/powerpc/fpu/fpu_emu.c:1.52 Sun Sep 4 13:18:33 2022
+++ src/sys/arch/powerpc/fpu/fpu_emu.c Sun Sep 4 13:32:14 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: fpu_emu.c,v 1.52 2022/09/04 13:18:33 rin Exp $ */
+/* $NetBSD: fpu_emu.c,v 1.53 2022/09/04 13:32:14 rin Exp $ */
/*
* Copyright 2001 Wasabi Systems, Inc.
@@ -76,7 +76,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: fpu_emu.c,v 1.52 2022/09/04 13:18:33 rin Exp $");
+__KERNEL_RCSID(0, "$NetBSD: fpu_emu.c,v 1.53 2022/09/04 13:32:14 rin Exp $");
#ifdef _KERNEL_OPT
#include "opt_ddb.h"
@@ -183,7 +183,7 @@ fpu_dumpfpn(struct fpn *fp)
printf("%s %c.%x %x %x %xE%d\n", class[fp->fp_class + 2],
fp->fp_sign ? '-' : ' ',
fp->fp_mant[0], fp->fp_mant[1],
- fp->fp_mant[2], fp->fp_mant[3],
+ fp->fp_mant[2], fp->fp_mant[3],
fp->fp_exp);
}
#endif
@@ -376,7 +376,7 @@ fpu_execute(struct trapframe *tf, struct
size = sizeof(float);
}
update = (instr.i_x.i_xo & 0x20);
-
+
/* calculate EA of load/store */
ra = instr.i_x.i_ra;
rb = instr.i_x.i_rb;
@@ -424,7 +424,7 @@ fpu_execute(struct trapframe *tf, struct
return (FAULT);
}
} else {
-DPRINTF(FPE_INSN,
+DPRINTF(FPE_INSN,
("fpu_execute: Store DBL at %p\n",
(void *)addr));
if (copyout(&fs->fpreg[rt], (void *)addr, size)) {
@@ -446,7 +446,7 @@ fpu_execute(struct trapframe *tf, struct
fpu_implode(fe, fp, FTYPE_DBL, &FR(rt));
}
}
- if (update)
+ if (update)
tf->tf_fixreg[ra] = addr;
/* Complete. */
return (0);
@@ -485,11 +485,11 @@ fpu_execute(struct trapframe *tf, struct
case OPC63_FRSP:
/*
- * Convert to single:
+ * Convert to single:
*
* PowerPC uses this to round a double
* precision value to single precision,
- * but values in registers are always
+ * but values in registers are always
* stored in double precision format.
*/
FPU_EMU_EVCNT_INCR(frsp);
CVS commit: src/sys/arch/powerpc/fpu
Module Name:src Committed By: rin Date: Sun Sep 4 13:32:14 UTC 2022 Modified Files: src/sys/arch/powerpc/fpu: fpu_div.c fpu_emu.c Log Message: Trailing white-space/TAB. To generate a diff of this commit: cvs rdiff -u -r1.7 -r1.8 src/sys/arch/powerpc/fpu/fpu_div.c cvs rdiff -u -r1.52 -r1.53 src/sys/arch/powerpc/fpu/fpu_emu.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/powerpc/fpu
Module Name:src
Committed By: rin
Date: Sun Sep 4 13:18:33 UTC 2022
Modified Files:
src/sys/arch/powerpc/fpu: fpu_emu.c
Log Message:
Simplify; no need to override ``type'' here. NFC.
To generate a diff of this commit:
cvs rdiff -u -r1.51 -r1.52 src/sys/arch/powerpc/fpu/fpu_emu.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/powerpc/fpu/fpu_emu.c
diff -u src/sys/arch/powerpc/fpu/fpu_emu.c:1.51 src/sys/arch/powerpc/fpu/fpu_emu.c:1.52
--- src/sys/arch/powerpc/fpu/fpu_emu.c:1.51 Sun Sep 4 13:16:47 2022
+++ src/sys/arch/powerpc/fpu/fpu_emu.c Sun Sep 4 13:18:33 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: fpu_emu.c,v 1.51 2022/09/04 13:16:47 rin Exp $ */
+/* $NetBSD: fpu_emu.c,v 1.52 2022/09/04 13:18:33 rin Exp $ */
/*
* Copyright 2001 Wasabi Systems, Inc.
@@ -76,7 +76,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: fpu_emu.c,v 1.51 2022/09/04 13:16:47 rin Exp $");
+__KERNEL_RCSID(0, "$NetBSD: fpu_emu.c,v 1.52 2022/09/04 13:18:33 rin Exp $");
#ifdef _KERNEL_OPT
#include "opt_ddb.h"
@@ -624,8 +624,8 @@ fpu_execute(struct trapframe *tf, struct
case OPC63_FCFID:
FPU_EMU_EVCNT_INCR(fcfid);
DPRINTF(FPE_INSN, ("fpu_execute: FCFID\n"));
-type = FTYPE_LNG;
-fpu_explode(fe, fp = &fe->fe_f1, type, FR(rb));
+fpu_explode(fe, fp = &fe->fe_f1, FTYPE_LNG,
+FR(rb));
type = FTYPE_DBL | FTYPE_FPSCR;
break;
default:
CVS commit: src/sys/arch/powerpc/fpu
Module Name:src Committed By: rin Date: Sun Sep 4 13:18:33 UTC 2022 Modified Files: src/sys/arch/powerpc/fpu: fpu_emu.c Log Message: Simplify; no need to override ``type'' here. NFC. To generate a diff of this commit: cvs rdiff -u -r1.51 -r1.52 src/sys/arch/powerpc/fpu/fpu_emu.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/powerpc/fpu
Module Name:src
Committed By: rin
Date: Sun Sep 4 13:17:33 UTC 2022
Modified Files:
src/sys/arch/powerpc/fpu: fpu_implode.c
Log Message:
Simplify logic to remove needless goto. NFC.
To generate a diff of this commit:
cvs rdiff -u -r1.21 -r1.22 src/sys/arch/powerpc/fpu/fpu_implode.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/powerpc/fpu/fpu_implode.c
diff -u src/sys/arch/powerpc/fpu/fpu_implode.c:1.21 src/sys/arch/powerpc/fpu/fpu_implode.c:1.22
--- src/sys/arch/powerpc/fpu/fpu_implode.c:1.21 Sun Sep 4 13:14:57 2022
+++ src/sys/arch/powerpc/fpu/fpu_implode.c Sun Sep 4 13:17:33 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: fpu_implode.c,v 1.21 2022/09/04 13:14:57 rin Exp $ */
+/* $NetBSD: fpu_implode.c,v 1.22 2022/09/04 13:17:33 rin Exp $ */
/*
* Copyright (c) 1992, 1993
@@ -46,7 +46,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: fpu_implode.c,v 1.21 2022/09/04 13:14:57 rin Exp $");
+__KERNEL_RCSID(0, "$NetBSD: fpu_implode.c,v 1.22 2022/09/04 13:17:33 rin Exp $");
#include
#include
@@ -451,14 +451,13 @@ fpu_ftod(struct fpemu *fe, struct fpn *f
}
if (ISINF(fp)) {
*cx |= FPRF_SIGN(sign) | FPSCR_FU;
- sign |= DBL_EXP(DBL_EXP_INFNAN);
- goto zero;
+ return HI_WORD(sign | DBL_EXP(DBL_EXP_INFNAN));
}
if (ISZERO(fp)) {
*cx |= FPSCR_FE;
if (sign)
*cx |= FPSCR_C;
-zero: return HI_WORD(sign);
+ return HI_WORD(sign);
}
if ((exp = fp->fp_exp + DBL_EXP_BIAS) <= 0) {
CVS commit: src/sys/arch/powerpc/fpu
Module Name:src Committed By: rin Date: Sun Sep 4 13:17:33 UTC 2022 Modified Files: src/sys/arch/powerpc/fpu: fpu_implode.c Log Message: Simplify logic to remove needless goto. NFC. To generate a diff of this commit: cvs rdiff -u -r1.21 -r1.22 src/sys/arch/powerpc/fpu/fpu_implode.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/powerpc/fpu
Module Name:src
Committed By: rin
Date: Sun Sep 4 13:16:47 UTC 2022
Modified Files:
src/sys/arch/powerpc/fpu: fpu_emu.c
Log Message:
Update FR and FI (and undefined FPRF) for ``round to integer'' insns.
To generate a diff of this commit:
cvs rdiff -u -r1.50 -r1.51 src/sys/arch/powerpc/fpu/fpu_emu.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/powerpc/fpu/fpu_emu.c
diff -u src/sys/arch/powerpc/fpu/fpu_emu.c:1.50 src/sys/arch/powerpc/fpu/fpu_emu.c:1.51
--- src/sys/arch/powerpc/fpu/fpu_emu.c:1.50 Sun Sep 4 13:14:57 2022
+++ src/sys/arch/powerpc/fpu/fpu_emu.c Sun Sep 4 13:16:47 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: fpu_emu.c,v 1.50 2022/09/04 13:14:57 rin Exp $ */
+/* $NetBSD: fpu_emu.c,v 1.51 2022/09/04 13:16:47 rin Exp $ */
/*
* Copyright 2001 Wasabi Systems, Inc.
@@ -76,7 +76,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: fpu_emu.c,v 1.50 2022/09/04 13:14:57 rin Exp $");
+__KERNEL_RCSID(0, "$NetBSD: fpu_emu.c,v 1.51 2022/09/04 13:16:47 rin Exp $");
#ifdef _KERNEL_OPT
#include "opt_ddb.h"
@@ -506,7 +506,7 @@ fpu_execute(struct trapframe *tf, struct
FPU_EMU_EVCNT_INCR(fctiw);
DPRINTF(FPE_INSN, ("fpu_execute: FCTIW\n"));
fpu_explode(fe, fp = &fe->fe_f1, type, FR(rb));
-type = FTYPE_INT;
+type = FTYPE_INT | FTYPE_FPSCR;
if (instr.i_x.i_xo == OPC63_FCTIWZ)
type |= FTYPE_RD_RZ;
break;
@@ -617,7 +617,7 @@ fpu_execute(struct trapframe *tf, struct
FPU_EMU_EVCNT_INCR(fctid);
DPRINTF(FPE_INSN, ("fpu_execute: FCTID\n"));
fpu_explode(fe, fp = &fe->fe_f1, type, FR(rb));
-type = FTYPE_LNG;
+type = FTYPE_LNG | FTYPE_FPSCR;
if (instr.i_x.i_xo == OPC63_FCTIDZ)
type |= FTYPE_RD_RZ;
break;
CVS commit: src/sys/arch/powerpc/fpu
Module Name:src Committed By: rin Date: Sun Sep 4 13:16:47 UTC 2022 Modified Files: src/sys/arch/powerpc/fpu: fpu_emu.c Log Message: Update FR and FI (and undefined FPRF) for ``round to integer'' insns. To generate a diff of this commit: cvs rdiff -u -r1.50 -r1.51 src/sys/arch/powerpc/fpu/fpu_emu.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/powerpc/fpu
Module Name:src
Committed By: rin
Date: Sun Sep 4 13:14:57 UTC 2022
Modified Files:
src/sys/arch/powerpc/fpu: fpu_compare.c fpu_emu.c fpu_emu.h
fpu_implode.c
Log Message:
Fix logic for FI, FR, and FPRF fields of FPSCR.
They are not sticky bits and updated by arithmetic and round
insns at the same time.
Comparison insns update only FPCC sub-field of FPRF.
For other insns, these field are left untouched.
Also, for single-precision insns, exception bits should be set by
the first fpu_implode(), which rounds the value to float.
To generate a diff of this commit:
cvs rdiff -u -r1.5 -r1.6 src/sys/arch/powerpc/fpu/fpu_compare.c
cvs rdiff -u -r1.49 -r1.50 src/sys/arch/powerpc/fpu/fpu_emu.c
cvs rdiff -u -r1.8 -r1.9 src/sys/arch/powerpc/fpu/fpu_emu.h
cvs rdiff -u -r1.20 -r1.21 src/sys/arch/powerpc/fpu/fpu_implode.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/powerpc/fpu/fpu_compare.c
diff -u src/sys/arch/powerpc/fpu/fpu_compare.c:1.5 src/sys/arch/powerpc/fpu/fpu_compare.c:1.6
--- src/sys/arch/powerpc/fpu/fpu_compare.c:1.5 Sat Jun 27 03:07:57 2020
+++ src/sys/arch/powerpc/fpu/fpu_compare.c Sun Sep 4 13:14:57 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: fpu_compare.c,v 1.5 2020/06/27 03:07:57 rin Exp $ */
+/* $NetBSD: fpu_compare.c,v 1.6 2022/09/04 13:14:57 rin Exp $ */
/*
* Copyright (c) 1992, 1993
@@ -48,7 +48,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: fpu_compare.c,v 1.5 2020/06/27 03:07:57 rin Exp $");
+__KERNEL_RCSID(0, "$NetBSD: fpu_compare.c,v 1.6 2022/09/04 13:14:57 rin Exp $");
#include
@@ -79,6 +79,8 @@ fpu_compare(struct fpemu *fe, int ordere
struct fpn *a, *b, *r;
int cc;
+ fe->fe_fpscr &= ~FPSCR_FPCC;
+
a = &fe->fe_f1;
b = &fe->fe_f2;
r = &fe->fe_f3;
Index: src/sys/arch/powerpc/fpu/fpu_emu.c
diff -u src/sys/arch/powerpc/fpu/fpu_emu.c:1.49 src/sys/arch/powerpc/fpu/fpu_emu.c:1.50
--- src/sys/arch/powerpc/fpu/fpu_emu.c:1.49 Sat Sep 3 04:54:47 2022
+++ src/sys/arch/powerpc/fpu/fpu_emu.c Sun Sep 4 13:14:57 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: fpu_emu.c,v 1.49 2022/09/03 04:54:47 rin Exp $ */
+/* $NetBSD: fpu_emu.c,v 1.50 2022/09/04 13:14:57 rin Exp $ */
/*
* Copyright 2001 Wasabi Systems, Inc.
@@ -76,7 +76,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: fpu_emu.c,v 1.49 2022/09/03 04:54:47 rin Exp $");
+__KERNEL_RCSID(0, "$NetBSD: fpu_emu.c,v 1.50 2022/09/04 13:14:57 rin Exp $");
#ifdef _KERNEL_OPT
#include "opt_ddb.h"
@@ -297,7 +297,7 @@ fpu_execute(struct trapframe *tf, struct
int ra, rb, rc, rt, type, mask, fsr, cx, bf, setcr, cond;
u_int bits;
struct fpreg *fs;
- int i, mtfsb1 = 0;
+ int i;
/* Setup work. */
fp = NULL;
@@ -499,7 +499,7 @@ fpu_execute(struct trapframe *tf, struct
fpu_implode(fe, fp, FTYPE_SNG, &FR(rt));
fpu_explode(fe, fp = &fe->fe_f1, FTYPE_SNG,
FR(rt));
-type = FTYPE_DBL | FTYPE_FPRF;
+type = FTYPE_DBL | FTYPE_FPSCR;
break;
case OPC63_FCTIW:
case OPC63_FCTIWZ:
@@ -526,7 +526,6 @@ fpu_execute(struct trapframe *tf, struct
case OPC63_MTFSB1:
FPU_EMU_EVCNT_INCR(mtfsb1);
DPRINTF(FPE_INSN, ("fpu_execute: MTFSB1\n"));
-mtfsb1 = 1;
fe->fe_cx = (1 << (31 - rt)) &
~(FPSCR_FEX | FPSCR_VX);
break;
@@ -627,7 +626,7 @@ fpu_execute(struct trapframe *tf, struct
DPRINTF(FPE_INSN, ("fpu_execute: FCFID\n"));
type = FTYPE_LNG;
fpu_explode(fe, fp = &fe->fe_f1, type, FR(rb));
-type = FTYPE_DBL | FTYPE_FPRF;
+type = FTYPE_DBL | FTYPE_FPSCR;
break;
default:
return (NOTFPU);
@@ -763,12 +762,12 @@ fpu_execute(struct trapframe *tf, struct
/* If the instruction was single precision, round */
if (!(instr.i_any.i_opcd & 0x4)) {
-fpu_implode(fe, fp, FTYPE_SNG | FTYPE_FPRF,
+fpu_implode(fe, fp, FTYPE_SNG | FTYPE_FPSCR,
&FR(rt));
fpu_explode(fe, fp = &fe->fe_f1, FTYPE_SNG,
FR(rt));
} else
-type |= FTYPE_FPRF;
+type |= FTYPE_FPSCR;
}
} else {
return (NOTFPU);
@@ -785,10 +784,6 @@ fpu_execute(struct trapframe *tf, struct
cx = fe->fe_cx;
fsr = fe->fe_fpscr & ~(FPSCR_FEX|FPSCR_VX);
if (cx != 0) {
- if (mtfsb1 == 0 && (cx & FPSCR_FPRF) != 0) {
- /* Need to replace CC */
- fsr &= ~FPSCR_FPRF;
- }
fsr |= cx;
DPRINTF(FPE_INSN, ("fpu_execute: cx %x, fsr %x\n", cx, fsr));
}
Index: src/sys/arch/powerpc/fpu/fpu_emu.h
diff -u src/sys/arch/powerpc/fpu/fpu_emu.h:1.8 src/sys/arch/powerpc/fpu/fpu_emu.h:1.9
--- src/sys/arch/powerpc/fpu/fpu_emu.h:1.8 Fri Sep 2 12:40:49 2022
+++ src/sys/arch/powerpc/fpu/fpu_emu.h Sun Sep 4 13:14:57 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: fpu_emu.h,v 1.8 2022/09/02 12:40:49 rin Exp $ */
+/* $NetBSD: fpu_emu.h,v 1.9 2022/09/04 13:14:57 rin Exp $ */
/*
* Copyright (c) 1992, 1993
@@ -141,8 +141,8 @@ struct fpn {
#define FTYPE_SNG 0x02 /* data = 32-bit float */
#define FTYPE_DBL 0x04 /* data = 64-bit double */
#define FTY
CVS commit: src/sys/arch/powerpc/fpu
Module Name:src Committed By: rin Date: Sun Sep 4 13:14:57 UTC 2022 Modified Files: src/sys/arch/powerpc/fpu: fpu_compare.c fpu_emu.c fpu_emu.h fpu_implode.c Log Message: Fix logic for FI, FR, and FPRF fields of FPSCR. They are not sticky bits and updated by arithmetic and round insns at the same time. Comparison insns update only FPCC sub-field of FPRF. For other insns, these field are left untouched. Also, for single-precision insns, exception bits should be set by the first fpu_implode(), which rounds the value to float. To generate a diff of this commit: cvs rdiff -u -r1.5 -r1.6 src/sys/arch/powerpc/fpu/fpu_compare.c cvs rdiff -u -r1.49 -r1.50 src/sys/arch/powerpc/fpu/fpu_emu.c cvs rdiff -u -r1.8 -r1.9 src/sys/arch/powerpc/fpu/fpu_emu.h cvs rdiff -u -r1.20 -r1.21 src/sys/arch/powerpc/fpu/fpu_implode.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/powerpc/fpu
Module Name:src
Committed By: rin
Date: Sun Sep 4 09:23:07 UTC 2022
Modified Files:
src/sys/arch/powerpc/fpu: fpu_implode.c
Log Message:
Fix debug printf. Unbreak DEBUG build.
To generate a diff of this commit:
cvs rdiff -u -r1.19 -r1.20 src/sys/arch/powerpc/fpu/fpu_implode.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/powerpc/fpu/fpu_implode.c
diff -u src/sys/arch/powerpc/fpu/fpu_implode.c:1.19 src/sys/arch/powerpc/fpu/fpu_implode.c:1.20
--- src/sys/arch/powerpc/fpu/fpu_implode.c:1.19 Sun Sep 4 09:20:55 2022
+++ src/sys/arch/powerpc/fpu/fpu_implode.c Sun Sep 4 09:23:07 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: fpu_implode.c,v 1.19 2022/09/04 09:20:55 rin Exp $ */
+/* $NetBSD: fpu_implode.c,v 1.20 2022/09/04 09:23:07 rin Exp $ */
/*
* Copyright (c) 1992, 1993
@@ -46,7 +46,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: fpu_implode.c,v 1.19 2022/09/04 09:20:55 rin Exp $");
+__KERNEL_RCSID(0, "$NetBSD: fpu_implode.c,v 1.20 2022/09/04 09:23:07 rin Exp $");
#include
#include
@@ -537,29 +537,25 @@ fpu_implode(struct fpemu *fe, struct fpn
case FTYPE_LNG:
/* FPRF is undefined. */
*p = fpu_ftox(fe, fp, rn);
- DPRINTF(FPE_REG, ("fpu_implode: long %x %x\n",
- space[0], space[1]));
+ DPRINTF(FPE_REG, ("fpu_implode: long %x %x\n", *hi, *lo));
break;
case FTYPE_INT:
/* FPRF is undefined. */
*hi = 0;
*lo = fpu_ftoi(fe, fp, rn);
- DPRINTF(FPE_REG, ("fpu_implode: int %x\n",
- space[1]));
+ DPRINTF(FPE_REG, ("fpu_implode: int %x\n", *lo));
break;
case FTYPE_SNG:
*hi = fpu_ftos(fe, fp, fprf);
*lo = 0;
- DPRINTF(FPE_REG, ("fpu_implode: single %x\n",
- space[0]));
+ DPRINTF(FPE_REG, ("fpu_implode: single %x\n", *hi));
break;
case FTYPE_DBL:
*p = fpu_ftod(fe, fp, fprf);
- DPRINTF(FPE_REG, ("fpu_implode: double %x %x\n",
- space[0], space[1]));
+ DPRINTF(FPE_REG, ("fpu_implode: double %x %x\n", *hi, *lo));
break;
default:
CVS commit: src/sys/arch/powerpc/fpu
Module Name:src Committed By: rin Date: Sun Sep 4 09:23:07 UTC 2022 Modified Files: src/sys/arch/powerpc/fpu: fpu_implode.c Log Message: Fix debug printf. Unbreak DEBUG build. To generate a diff of this commit: cvs rdiff -u -r1.19 -r1.20 src/sys/arch/powerpc/fpu/fpu_implode.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/powerpc/fpu
Module Name:src Committed By: rin Date: Sun Sep 4 09:20:55 UTC 2022 Modified Files: src/sys/arch/powerpc/fpu: fpu_implode.c Log Message: Remove extra break. To generate a diff of this commit: cvs rdiff -u -r1.18 -r1.19 src/sys/arch/powerpc/fpu/fpu_implode.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/powerpc/fpu
Module Name:src
Committed By: rin
Date: Sun Sep 4 09:20:55 UTC 2022
Modified Files:
src/sys/arch/powerpc/fpu: fpu_implode.c
Log Message:
Remove extra break.
To generate a diff of this commit:
cvs rdiff -u -r1.18 -r1.19 src/sys/arch/powerpc/fpu/fpu_implode.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/powerpc/fpu/fpu_implode.c
diff -u src/sys/arch/powerpc/fpu/fpu_implode.c:1.18 src/sys/arch/powerpc/fpu/fpu_implode.c:1.19
--- src/sys/arch/powerpc/fpu/fpu_implode.c:1.18 Fri Sep 2 12:48:04 2022
+++ src/sys/arch/powerpc/fpu/fpu_implode.c Sun Sep 4 09:20:55 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: fpu_implode.c,v 1.18 2022/09/02 12:48:04 rin Exp $ */
+/* $NetBSD: fpu_implode.c,v 1.19 2022/09/04 09:20:55 rin Exp $ */
/*
* Copyright (c) 1992, 1993
@@ -46,7 +46,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: fpu_implode.c,v 1.18 2022/09/02 12:48:04 rin Exp $");
+__KERNEL_RCSID(0, "$NetBSD: fpu_implode.c,v 1.19 2022/09/04 09:20:55 rin Exp $");
#include
#include
@@ -560,7 +560,7 @@ fpu_implode(struct fpemu *fe, struct fpn
*p = fpu_ftod(fe, fp, fprf);
DPRINTF(FPE_REG, ("fpu_implode: double %x %x\n",
space[0], space[1]));
- break; break;
+ break;
default:
panic("fpu_implode: invalid type %d", type);
CVS commit: src/sys/arch/powerpc/fpu
Module Name:src Committed By: rin Date: Sat Sep 3 04:54:47 UTC 2022 Modified Files: src/sys/arch/powerpc/fpu: fpu_emu.c Log Message: Localize addr and buf. NFC. To generate a diff of this commit: cvs rdiff -u -r1.48 -r1.49 src/sys/arch/powerpc/fpu/fpu_emu.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/powerpc/fpu
Module Name:src
Committed By: rin
Date: Sat Sep 3 04:54:47 UTC 2022
Modified Files:
src/sys/arch/powerpc/fpu: fpu_emu.c
Log Message:
Localize addr and buf. NFC.
To generate a diff of this commit:
cvs rdiff -u -r1.48 -r1.49 src/sys/arch/powerpc/fpu/fpu_emu.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/powerpc/fpu/fpu_emu.c
diff -u src/sys/arch/powerpc/fpu/fpu_emu.c:1.48 src/sys/arch/powerpc/fpu/fpu_emu.c:1.49
--- src/sys/arch/powerpc/fpu/fpu_emu.c:1.48 Sat Sep 3 04:54:08 2022
+++ src/sys/arch/powerpc/fpu/fpu_emu.c Sat Sep 3 04:54:47 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: fpu_emu.c,v 1.48 2022/09/03 04:54:08 rin Exp $ */
+/* $NetBSD: fpu_emu.c,v 1.49 2022/09/03 04:54:47 rin Exp $ */
/*
* Copyright 2001 Wasabi Systems, Inc.
@@ -76,7 +76,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: fpu_emu.c,v 1.48 2022/09/03 04:54:08 rin Exp $");
+__KERNEL_RCSID(0, "$NetBSD: fpu_emu.c,v 1.49 2022/09/03 04:54:47 rin Exp $");
#ifdef _KERNEL_OPT
#include "opt_ddb.h"
@@ -294,7 +294,6 @@ fpu_execute(struct trapframe *tf, struct
struct fpn *fp;
union instr instr = *insn;
int *a;
- vaddr_t addr;
int ra, rb, rc, rt, type, mask, fsr, cx, bf, setcr, cond;
u_int bits;
struct fpreg *fs;
@@ -335,7 +334,7 @@ fpu_execute(struct trapframe *tf, struct
* Convert to/from single if needed, calculate addr,
* and update index reg if needed.
*/
- uint64_t buf;
+ vaddr_t addr;
size_t size = sizeof(double);
int store, update;
@@ -412,6 +411,8 @@ fpu_execute(struct trapframe *tf, struct
/* Store */
FPU_EMU_EVCNT_INCR(fpstore);
if (type != FTYPE_DBL) {
+uint64_t buf;
+
DPRINTF(FPE_INSN,
("fpu_execute: Store SNG at %p\n",
(void *)addr));
CVS commit: src/sys/arch/powerpc/fpu
Module Name:src
Committed By: rin
Date: Sat Sep 3 04:54:08 UTC 2022
Modified Files:
src/sys/arch/powerpc/fpu: fpu_emu.c
Log Message:
Fix weird logic. NFC.
Set both type and size to double by default, and change both to
single if required.
To generate a diff of this commit:
cvs rdiff -u -r1.47 -r1.48 src/sys/arch/powerpc/fpu/fpu_emu.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/powerpc/fpu/fpu_emu.c
diff -u src/sys/arch/powerpc/fpu/fpu_emu.c:1.47 src/sys/arch/powerpc/fpu/fpu_emu.c:1.48
--- src/sys/arch/powerpc/fpu/fpu_emu.c:1.47 Sat Sep 3 04:52:50 2022
+++ src/sys/arch/powerpc/fpu/fpu_emu.c Sat Sep 3 04:54:08 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: fpu_emu.c,v 1.47 2022/09/03 04:52:50 rin Exp $ */
+/* $NetBSD: fpu_emu.c,v 1.48 2022/09/03 04:54:08 rin Exp $ */
/*
* Copyright 2001 Wasabi Systems, Inc.
@@ -76,7 +76,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: fpu_emu.c,v 1.47 2022/09/03 04:52:50 rin Exp $");
+__KERNEL_RCSID(0, "$NetBSD: fpu_emu.c,v 1.48 2022/09/03 04:54:08 rin Exp $");
#ifdef _KERNEL_OPT
#include "opt_ddb.h"
@@ -336,7 +336,7 @@ fpu_execute(struct trapframe *tf, struct
* and update index reg if needed.
*/
uint64_t buf;
- size_t size = sizeof(float);
+ size_t size = sizeof(double);
int store, update;
cond = 0; /* ld/st never set condition codes */
@@ -372,10 +372,10 @@ fpu_execute(struct trapframe *tf, struct
return (NOTFPU);
store = (instr.i_x.i_xo & 0x80);
- if (instr.i_x.i_xo & 0x40)
-size = sizeof(double);
- else
+ if ((instr.i_x.i_xo & 0x40) == 0) {
type = FTYPE_SNG;
+size = sizeof(float);
+ }
update = (instr.i_x.i_xo & 0x20);
/* calculate EA of load/store */
@@ -389,10 +389,10 @@ fpu_execute(struct trapframe *tf, struct
rt = instr.i_x.i_rt;
} else {
store = instr.i_d.i_opcd & 0x4;
- if (instr.i_d.i_opcd & 0x2)
-size = sizeof(double);
- else
+ if ((instr.i_d.i_opcd & 0x2) == 0) {
type = FTYPE_SNG;
+size = sizeof(float);
+ }
update = instr.i_d.i_opcd & 0x1;
/* calculate EA of load/store */
CVS commit: src/sys/arch/powerpc/fpu
Module Name:src Committed By: rin Date: Sat Sep 3 04:54:08 UTC 2022 Modified Files: src/sys/arch/powerpc/fpu: fpu_emu.c Log Message: Fix weird logic. NFC. Set both type and size to double by default, and change both to single if required. To generate a diff of this commit: cvs rdiff -u -r1.47 -r1.48 src/sys/arch/powerpc/fpu/fpu_emu.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/powerpc/fpu
Module Name:src
Committed By: rin
Date: Sat Sep 3 04:52:50 UTC 2022
Modified Files:
src/sys/arch/powerpc/fpu: fpu_emu.c
Log Message:
Do not use ``cond'' for two purposes: flag and bit field.
For the latter, use ``bits'' instead. Switch ``cond'' to int.
NFC.
To generate a diff of this commit:
cvs rdiff -u -r1.46 -r1.47 src/sys/arch/powerpc/fpu/fpu_emu.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/powerpc/fpu/fpu_emu.c
diff -u src/sys/arch/powerpc/fpu/fpu_emu.c:1.46 src/sys/arch/powerpc/fpu/fpu_emu.c:1.47
--- src/sys/arch/powerpc/fpu/fpu_emu.c:1.46 Fri Sep 2 12:47:10 2022
+++ src/sys/arch/powerpc/fpu/fpu_emu.c Sat Sep 3 04:52:50 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: fpu_emu.c,v 1.46 2022/09/02 12:47:10 rin Exp $ */
+/* $NetBSD: fpu_emu.c,v 1.47 2022/09/03 04:52:50 rin Exp $ */
/*
* Copyright 2001 Wasabi Systems, Inc.
@@ -76,7 +76,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: fpu_emu.c,v 1.46 2022/09/02 12:47:10 rin Exp $");
+__KERNEL_RCSID(0, "$NetBSD: fpu_emu.c,v 1.47 2022/09/03 04:52:50 rin Exp $");
#ifdef _KERNEL_OPT
#include "opt_ddb.h"
@@ -295,8 +295,8 @@ fpu_execute(struct trapframe *tf, struct
union instr instr = *insn;
int *a;
vaddr_t addr;
- int ra, rb, rc, rt, type, mask, fsr, cx, bf, setcr;
- unsigned int bits, cond;
+ int ra, rb, rc, rt, type, mask, fsr, cx, bf, setcr, cond;
+ u_int bits;
struct fpreg *fs;
int i, mtfsb1 = 0;
@@ -800,23 +800,23 @@ fpu_execute(struct trapframe *tf, struct
fsr |= FPSCR_FX;
if (cond) {
- cond = fsr & 0xf000;
+ bits = fsr & 0xf000;
/* Isolate condition codes */
- cond >>= 28;
+ bits >>= 28;
/* Move fpu condition codes to cr[1] */
tf->tf_cr &= ~(0x0f00);
- tf->tf_cr |= (cond<<24);
- DPRINTF(FPE_INSN, ("fpu_execute: cr[1] <= %x\n", cond));
+ tf->tf_cr |= (bits << 24);
+ DPRINTF(FPE_INSN, ("fpu_execute: cr[1] <= %x\n", bits));
}
if (setcr) {
- cond = fsr & FPSCR_FPCC;
+ bits = fsr & FPSCR_FPCC;
/* Isolate condition codes */
- cond <<= 16;
+ bits <<= 16;
/* Move fpu condition codes to cr[bf/4] */
tf->tf_cr &= ~(0xf000>>bf);
- tf->tf_cr |= (cond>>bf);
- DPRINTF(FPE_INSN, ("fpu_execute: cr[%d] (cr=%x) <= %x\n", bf/4, tf->tf_cr, cond));
+ tf->tf_cr |= (bits >> bf);
+ DPRINTF(FPE_INSN, ("fpu_execute: cr[%d] (cr=%x) <= %x\n", bf/4, tf->tf_cr, bits));
}
((int *)&fs->fpscr)[1] = fsr;
CVS commit: src/sys/arch/powerpc/fpu
Module Name:src Committed By: rin Date: Sat Sep 3 04:52:50 UTC 2022 Modified Files: src/sys/arch/powerpc/fpu: fpu_emu.c Log Message: Do not use ``cond'' for two purposes: flag and bit field. For the latter, use ``bits'' instead. Switch ``cond'' to int. NFC. To generate a diff of this commit: cvs rdiff -u -r1.46 -r1.47 src/sys/arch/powerpc/fpu/fpu_emu.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/powerpc/fpu
Module Name:src
Committed By: rin
Date: Fri Sep 2 12:48:05 UTC 2022
Modified Files:
src/sys/arch/powerpc/fpu: fpu_implode.c
Log Message:
fpu_implode(): Clear lower word for float just for sure.
To generate a diff of this commit:
cvs rdiff -u -r1.17 -r1.18 src/sys/arch/powerpc/fpu/fpu_implode.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/powerpc/fpu/fpu_implode.c
diff -u src/sys/arch/powerpc/fpu/fpu_implode.c:1.17 src/sys/arch/powerpc/fpu/fpu_implode.c:1.18
--- src/sys/arch/powerpc/fpu/fpu_implode.c:1.17 Fri Sep 2 12:40:49 2022
+++ src/sys/arch/powerpc/fpu/fpu_implode.c Fri Sep 2 12:48:04 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: fpu_implode.c,v 1.17 2022/09/02 12:40:49 rin Exp $ */
+/* $NetBSD: fpu_implode.c,v 1.18 2022/09/02 12:48:04 rin Exp $ */
/*
* Copyright (c) 1992, 1993
@@ -46,7 +46,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: fpu_implode.c,v 1.17 2022/09/02 12:40:49 rin Exp $");
+__KERNEL_RCSID(0, "$NetBSD: fpu_implode.c,v 1.18 2022/09/02 12:48:04 rin Exp $");
#include
#include
@@ -551,6 +551,7 @@ fpu_implode(struct fpemu *fe, struct fpn
case FTYPE_SNG:
*hi = fpu_ftos(fe, fp, fprf);
+ *lo = 0;
DPRINTF(FPE_REG, ("fpu_implode: single %x\n",
space[0]));
break;
CVS commit: src/sys/arch/powerpc/fpu
Module Name:src Committed By: rin Date: Fri Sep 2 12:48:05 UTC 2022 Modified Files: src/sys/arch/powerpc/fpu: fpu_implode.c Log Message: fpu_implode(): Clear lower word for float just for sure. To generate a diff of this commit: cvs rdiff -u -r1.17 -r1.18 src/sys/arch/powerpc/fpu/fpu_implode.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/powerpc/fpu
Module Name:src Committed By: rin Date: Fri Sep 2 12:47:10 UTC 2022 Modified Files: src/sys/arch/powerpc/fpu: fpu_emu.c Log Message: Fix fres and frsqrte. - Pass correct fp to succeeding fpu_implode(). - fres calculates 1 / frB; not 1 / sqrt(frB). To generate a diff of this commit: cvs rdiff -u -r1.45 -r1.46 src/sys/arch/powerpc/fpu/fpu_emu.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/powerpc/fpu
Module Name:src
Committed By: rin
Date: Fri Sep 2 12:47:10 UTC 2022
Modified Files:
src/sys/arch/powerpc/fpu: fpu_emu.c
Log Message:
Fix fres and frsqrte.
- Pass correct fp to succeeding fpu_implode().
- fres calculates 1 / frB; not 1 / sqrt(frB).
To generate a diff of this commit:
cvs rdiff -u -r1.45 -r1.46 src/sys/arch/powerpc/fpu/fpu_emu.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/powerpc/fpu/fpu_emu.c
diff -u src/sys/arch/powerpc/fpu/fpu_emu.c:1.45 src/sys/arch/powerpc/fpu/fpu_emu.c:1.46
--- src/sys/arch/powerpc/fpu/fpu_emu.c:1.45 Fri Sep 2 12:40:49 2022
+++ src/sys/arch/powerpc/fpu/fpu_emu.c Fri Sep 2 12:47:10 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: fpu_emu.c,v 1.45 2022/09/02 12:40:49 rin Exp $ */
+/* $NetBSD: fpu_emu.c,v 1.46 2022/09/02 12:47:10 rin Exp $ */
/*
* Copyright 2001 Wasabi Systems, Inc.
@@ -76,7 +76,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: fpu_emu.c,v 1.45 2022/09/02 12:40:49 rin Exp $");
+__KERNEL_RCSID(0, "$NetBSD: fpu_emu.c,v 1.46 2022/09/02 12:47:10 rin Exp $");
#ifdef _KERNEL_OPT
#include "opt_ddb.h"
@@ -690,10 +690,9 @@ fpu_execute(struct trapframe *tf, struct
case OPC59_FRES:
FPU_EMU_EVCNT_INCR(fpres);
DPRINTF(FPE_INSN, ("fpu_execute: FPRES\n"));
-fpu_explode(fe, &fe->fe_f2, type, FR(rb));
-fp = fpu_sqrt(fe);
fpu_explode(fe, &fe->fe_f1, FTYPE_INT, 1);
-fpu_div(fe);
+fpu_explode(fe, &fe->fe_f2, type, FR(rb));
+fp = fpu_div(fe);
break;
case OPC59_FMULS:
FPU_EMU_EVCNT_INCR(fmul);
@@ -710,7 +709,7 @@ fpu_execute(struct trapframe *tf, struct
fp = fpu_sqrt(fe);
fe->fe_f2 = *fp;
fpu_explode(fe, &fe->fe_f1, FTYPE_INT, 1);
-fpu_div(fe);
+fp = fpu_div(fe);
break;
case OPC59_FMSUBS:
FPU_EMU_EVCNT_INCR(fmulsub);
CVS commit: src/sys/arch/powerpc/fpu
Module Name:src Committed By: rin Date: Fri Sep 2 12:40:49 UTC 2022 Modified Files: src/sys/arch/powerpc/fpu: fpu_emu.c fpu_emu.h fpu_explode.c fpu_extern.h fpu_implode.c Log Message: Make fpu_explode() and fpu_implode() take uint64_t and uint64_t *, instead of register number, respectively. NFC. To generate a diff of this commit: cvs rdiff -u -r1.44 -r1.45 src/sys/arch/powerpc/fpu/fpu_emu.c cvs rdiff -u -r1.7 -r1.8 src/sys/arch/powerpc/fpu/fpu_emu.h cvs rdiff -u -r1.11 -r1.12 src/sys/arch/powerpc/fpu/fpu_explode.c cvs rdiff -u -r1.8 -r1.9 src/sys/arch/powerpc/fpu/fpu_extern.h cvs rdiff -u -r1.16 -r1.17 src/sys/arch/powerpc/fpu/fpu_implode.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/powerpc/fpu
Module Name:src
Committed By: rin
Date: Fri Sep 2 12:40:49 UTC 2022
Modified Files:
src/sys/arch/powerpc/fpu: fpu_emu.c fpu_emu.h fpu_explode.c
fpu_extern.h fpu_implode.c
Log Message:
Make fpu_explode() and fpu_implode() take uint64_t and uint64_t *,
instead of register number, respectively. NFC.
To generate a diff of this commit:
cvs rdiff -u -r1.44 -r1.45 src/sys/arch/powerpc/fpu/fpu_emu.c
cvs rdiff -u -r1.7 -r1.8 src/sys/arch/powerpc/fpu/fpu_emu.h
cvs rdiff -u -r1.11 -r1.12 src/sys/arch/powerpc/fpu/fpu_explode.c
cvs rdiff -u -r1.8 -r1.9 src/sys/arch/powerpc/fpu/fpu_extern.h
cvs rdiff -u -r1.16 -r1.17 src/sys/arch/powerpc/fpu/fpu_implode.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/powerpc/fpu/fpu_emu.c
diff -u src/sys/arch/powerpc/fpu/fpu_emu.c:1.44 src/sys/arch/powerpc/fpu/fpu_emu.c:1.45
--- src/sys/arch/powerpc/fpu/fpu_emu.c:1.44 Thu Sep 1 06:08:16 2022
+++ src/sys/arch/powerpc/fpu/fpu_emu.c Fri Sep 2 12:40:49 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: fpu_emu.c,v 1.44 2022/09/01 06:08:16 rin Exp $ */
+/* $NetBSD: fpu_emu.c,v 1.45 2022/09/02 12:40:49 rin Exp $ */
/*
* Copyright 2001 Wasabi Systems, Inc.
@@ -76,7 +76,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: fpu_emu.c,v 1.44 2022/09/01 06:08:16 rin Exp $");
+__KERNEL_RCSID(0, "$NetBSD: fpu_emu.c,v 1.45 2022/09/02 12:40:49 rin Exp $");
#ifdef _KERNEL_OPT
#include "opt_ddb.h"
@@ -159,6 +159,7 @@ FPU_EMU_EVCNT_DECL(fnmadd);
FPSCR_VXSOFT | FPSCR_VXSQRT | FPSCR_VXCVI \
)
+#define FR(reg) (fs->fpreg[reg])
int fpe_debug = 0;
@@ -414,8 +415,9 @@ fpu_execute(struct trapframe *tf, struct
DPRINTF(FPE_INSN,
("fpu_execute: Store SNG at %p\n",
(void *)addr));
-fpu_explode(fe, fp = &fe->fe_f1, FTYPE_DBL, rt);
-fpu_implode(fe, fp, type, (void *)&buf);
+fpu_explode(fe, fp = &fe->fe_f1, FTYPE_DBL,
+FR(rt));
+fpu_implode(fe, fp, type, &buf);
if (copyout(&buf, (void *)addr, size)) {
fe->fe_addr = addr;
return (FAULT);
@@ -439,9 +441,8 @@ fpu_execute(struct trapframe *tf, struct
return (FAULT);
}
if (type != FTYPE_DBL) {
-fpu_explode(fe, fp = &fe->fe_f1, type, rt);
-fpu_implode(fe, fp, FTYPE_DBL,
- (u_int *)&fs->fpreg[rt]);
+fpu_explode(fe, fp = &fe->fe_f1, type, FR(rt));
+fpu_implode(fe, fp, FTYPE_DBL, &FR(rt));
}
}
if (update)
@@ -471,8 +472,8 @@ fpu_execute(struct trapframe *tf, struct
FPU_EMU_EVCNT_INCR(fcmpu);
DPRINTF(FPE_INSN, ("fpu_execute: FCMPU\n"));
rt >>= 2;
-fpu_explode(fe, &fe->fe_f1, type, ra);
-fpu_explode(fe, &fe->fe_f2, type, rb);
+fpu_explode(fe, &fe->fe_f1, type, FR(ra));
+fpu_explode(fe, &fe->fe_f2, type, FR(rb));
fpu_compare(fe, 0);
/* Make sure we do the condition regs. */
cond = 0;
@@ -492,17 +493,18 @@ fpu_execute(struct trapframe *tf, struct
*/
FPU_EMU_EVCNT_INCR(frsp);
DPRINTF(FPE_INSN, ("fpu_execute: FRSP\n"));
-fpu_explode(fe, fp = &fe->fe_f1, FTYPE_DBL, rb);
-fpu_implode(fe, fp, FTYPE_SNG,
- (u_int *)&fs->fpreg[rt]);
-fpu_explode(fe, fp = &fe->fe_f1, FTYPE_SNG, rt);
+fpu_explode(fe, fp = &fe->fe_f1, FTYPE_DBL,
+FR(rb));
+fpu_implode(fe, fp, FTYPE_SNG, &FR(rt));
+fpu_explode(fe, fp = &fe->fe_f1, FTYPE_SNG,
+FR(rt));
type = FTYPE_DBL | FTYPE_FPRF;
break;
case OPC63_FCTIW:
case OPC63_FCTIWZ:
FPU_EMU_EVCNT_INCR(fctiw);
DPRINTF(FPE_INSN, ("fpu_execute: FCTIW\n"));
-fpu_explode(fe, fp = &fe->fe_f1, type, rb);
+fpu_explode(fe, fp = &fe->fe_f1, type, FR(rb));
type = FTYPE_INT;
if (instr.i_x.i_xo == OPC63_FCTIWZ)
type |= FTYPE_RD_RZ;
@@ -511,8 +513,8 @@ fpu_execute(struct trapframe *tf, struct
FPU_EMU_EVCNT_INCR(fcmpo);
DPRINTF(FPE_INSN, ("fpu_execute: FCMPO\n"));
rt >>= 2;
-fpu_explode(fe, &fe->fe_f1, type, ra);
-fpu_explode(fe, &fe->fe_f2, type, rb);
+fpu_explode(fe, &fe->fe_f1, type, FR(ra));
+fpu_explode(fe, &fe->fe_f2, type, FR(rb));
fpu_compare(fe, 1);
/* Make sure we do the condition regs. */
cond = 0;
@@ -614,7 +616,7 @@ fpu_execute(struct trapframe *tf, struct
case OPC63_FCTIDZ:
FPU_EMU_EVCNT_INCR(fctid);
DPRINTF(FPE_INSN, ("fpu_execute: FCTID\n"));
-fpu_explode(fe, fp = &fe->fe_f1, type, rb);
+fpu_explode(fe, fp = &fe->fe_f1, type, FR(rb));
type = FTYPE_LNG;
if (instr.i_x.i_xo == OPC63_FCTIDZ)
type |= FTYPE_RD_RZ;
@@ -623,7 +625,7 @@ fpu_execute(struct trapframe *tf, struct
FPU_EMU_EVCNT_INCR(fcfid);
DPRINTF(FPE_INSN, ("fpu_execute: FCFID\n"));
type = FTYPE_LNG;
-fpu_explode(fe, fp = &fe->fe_f1, type, rb);
+fpu_explode(fe, fp = &fe->fe_f1, type, FR(rb));
type = FTYPE_DBL | FTYPE_FPRF;
break;
default:
@@ -646,28 +648,28 @@ fpu_execute(struct trapframe *tf, struct
case OPC59_FDIVS:
FPU_E
CVS commit: src/sys/arch/powerpc/fpu
Module Name:src
Committed By: rin
Date: Fri Sep 2 12:30:48 UTC 2022
Modified Files:
src/sys/arch/powerpc/fpu: fpu_explode.c
Log Message:
Use hi and lo for higher and lower words, instead of i and j.
No binary changes.
To generate a diff of this commit:
cvs rdiff -u -r1.10 -r1.11 src/sys/arch/powerpc/fpu/fpu_explode.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/powerpc/fpu/fpu_explode.c
diff -u src/sys/arch/powerpc/fpu/fpu_explode.c:1.10 src/sys/arch/powerpc/fpu/fpu_explode.c:1.11
--- src/sys/arch/powerpc/fpu/fpu_explode.c:1.10 Sun Aug 28 22:22:41 2022
+++ src/sys/arch/powerpc/fpu/fpu_explode.c Fri Sep 2 12:30:48 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: fpu_explode.c,v 1.10 2022/08/28 22:22:41 rin Exp $ */
+/* $NetBSD: fpu_explode.c,v 1.11 2022/09/02 12:30:48 rin Exp $ */
/*
* Copyright (c) 1992, 1993
@@ -46,7 +46,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: fpu_explode.c,v 1.10 2022/08/28 22:22:41 rin Exp $");
+__KERNEL_RCSID(0, "$NetBSD: fpu_explode.c,v 1.11 2022/09/02 12:30:48 rin Exp $");
#include
#include
@@ -83,10 +83,10 @@ __KERNEL_RCSID(0, "$NetBSD: fpu_explode.
* int -> fpn.
*/
int
-fpu_itof(struct fpn *fp, u_int i)
+fpu_itof(struct fpn *fp, u_int lo)
{
- if (i == 0)
+ if (lo == 0)
return (FPC_ZERO);
/*
* The value FP_1 represents 2^FP_LG, so set the exponent
@@ -95,7 +95,7 @@ fpu_itof(struct fpn *fp, u_int i)
* fpu_norm()'s handling of `supernormals'; see fpu_subr.c.
*/
fp->fp_exp = FP_LG;
- fp->fp_mant[0] = (int)i < 0 ? -i : i;
+ fp->fp_mant[0] = (int)lo < 0 ? -lo : lo;
fp->fp_mant[1] = 0;
fp->fp_mant[2] = 0;
fp->fp_mant[3] = 0;
@@ -166,14 +166,14 @@ fpu_xtof(struct fpn *fp, uint64_t i)
* format: i.e., needs at most fp_mant[0] and fp_mant[1].
*/
int
-fpu_stof(struct fpn *fp, u_int i)
+fpu_stof(struct fpn *fp, u_int hi)
{
int exp;
u_int frac, f0, f1;
#define SNG_SHIFT (SNG_FRACBITS - FP_LG)
- exp = (i >> (32 - 1 - SNG_EXPBITS)) & mask(SNG_EXPBITS);
- frac = i & mask(SNG_FRACBITS);
+ exp = (hi >> (32 - 1 - SNG_EXPBITS)) & mask(SNG_EXPBITS);
+ frac = hi & mask(SNG_FRACBITS);
f0 = frac >> SNG_SHIFT;
f1 = frac << (32 - SNG_SHIFT);
FP_TOF(exp, SNG_EXP_BIAS, frac, f0, f1, 0, 0);
@@ -184,18 +184,18 @@ fpu_stof(struct fpn *fp, u_int i)
* We assume this uses at most (96-FP_LG) bits.
*/
int
-fpu_dtof(struct fpn *fp, u_int i, u_int j)
+fpu_dtof(struct fpn *fp, u_int hi, u_int lo)
{
int exp;
u_int frac, f0, f1, f2;
#define DBL_SHIFT (DBL_FRACBITS - 32 - FP_LG)
- exp = (i >> (32 - 1 - DBL_EXPBITS)) & mask(DBL_EXPBITS);
- frac = i & mask(DBL_FRACBITS - 32);
+ exp = (hi >> (32 - 1 - DBL_EXPBITS)) & mask(DBL_EXPBITS);
+ frac = hi & mask(DBL_FRACBITS - 32);
f0 = frac >> DBL_SHIFT;
- f1 = (frac << (32 - DBL_SHIFT)) | (j >> DBL_SHIFT);
- f2 = j << (32 - DBL_SHIFT);
- frac |= j;
+ f1 = (frac << (32 - DBL_SHIFT)) | (lo >> DBL_SHIFT);
+ f2 = lo << (32 - DBL_SHIFT);
+ frac |= lo;
FP_TOF(exp, DBL_EXP_BIAS, frac, f0, f1, f2, 0);
}
CVS commit: src/sys/arch/powerpc/fpu
Module Name:src Committed By: rin Date: Fri Sep 2 12:30:48 UTC 2022 Modified Files: src/sys/arch/powerpc/fpu: fpu_explode.c Log Message: Use hi and lo for higher and lower words, instead of i and j. No binary changes. To generate a diff of this commit: cvs rdiff -u -r1.10 -r1.11 src/sys/arch/powerpc/fpu/fpu_explode.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/powerpc/fpu
Module Name:src
Committed By: rin
Date: Fri Sep 2 12:29:58 UTC 2022
Modified Files:
src/sys/arch/powerpc/fpu: fpu_subr.c
Log Message:
fpu_subr.c: Convert #ifdef DIAGNOSTIC panic() --> KASSERT{,MSG}().
To generate a diff of this commit:
cvs rdiff -u -r1.6 -r1.7 src/sys/arch/powerpc/fpu/fpu_subr.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/powerpc/fpu/fpu_subr.c
diff -u src/sys/arch/powerpc/fpu/fpu_subr.c:1.6 src/sys/arch/powerpc/fpu/fpu_subr.c:1.7
--- src/sys/arch/powerpc/fpu/fpu_subr.c:1.6 Thu Sep 1 06:10:58 2022
+++ src/sys/arch/powerpc/fpu/fpu_subr.c Fri Sep 2 12:29:58 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: fpu_subr.c,v 1.6 2022/09/01 06:10:58 rin Exp $ */
+/* $NetBSD: fpu_subr.c,v 1.7 2022/09/02 12:29:58 rin Exp $ */
/*
* Copyright (c) 1992, 1993
@@ -45,7 +45,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: fpu_subr.c,v 1.6 2022/09/01 06:10:58 rin Exp $");
+__KERNEL_RCSID(0, "$NetBSD: fpu_subr.c,v 1.7 2022/09/02 12:29:58 rin Exp $");
#include
#if defined(DIAGNOSTIC)||defined(DEBUG)
@@ -72,10 +72,8 @@ fpu_shr(struct fpn *fp, int rsh)
u_int m0, m1, m2, m3, s;
int lsh;
-#ifdef DIAGNOSTIC
- if (rsh <= 0 || (fp->fp_class != FPC_NUM && !ISNAN(fp)))
- panic("fpu_rightshift 1");
-#endif
+ KASSERTMSG(rsh > 0 && (fp->fp_class == FPC_NUM || ISNAN(fp)),
+ "rsh %d, class %d\n", rsh, fp->fp_class);
m0 = fp->fp_mant[0];
m1 = fp->fp_mant[1];
@@ -84,10 +82,7 @@ fpu_shr(struct fpn *fp, int rsh)
/* If shifting all the bits out, take a shortcut. */
if (rsh >= FP_NMANT) {
-#ifdef DIAGNOSTIC
- if ((m0 | m1 | m2 | m3) == 0)
- panic("fpu_rightshift 2");
-#endif
+ KASSERT((m0 | m1 | m2 | m3) != 0);
fp->fp_mant[0] = 0;
fp->fp_mant[1] = 0;
fp->fp_mant[2] = 0;
CVS commit: src/sys/arch/powerpc/fpu
Module Name:src
Committed By: rin
Date: Fri Sep 2 12:29:58 UTC 2022
Modified Files:
src/sys/arch/powerpc/fpu: fpu_subr.c
Log Message:
fpu_subr.c: Convert #ifdef DIAGNOSTIC panic() --> KASSERT{,MSG}().
To generate a diff of this commit:
cvs rdiff -u -r1.6 -r1.7 src/sys/arch/powerpc/fpu/fpu_subr.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
CVS commit: src/sys/arch/powerpc/fpu
Module Name:src Committed By: rin Date: Fri Sep 2 12:24:54 UTC 2022 Modified Files: src/sys/arch/powerpc/fpu: fpu_implode.c Log Message: Fix off-by-one error in exponent when round a double to the largest normalized value; QNaN was wrongly generated here. To generate a diff of this commit: cvs rdiff -u -r1.15 -r1.16 src/sys/arch/powerpc/fpu/fpu_implode.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/powerpc/fpu/fpu_implode.c diff -u src/sys/arch/powerpc/fpu/fpu_implode.c:1.15 src/sys/arch/powerpc/fpu/fpu_implode.c:1.16 --- src/sys/arch/powerpc/fpu/fpu_implode.c:1.15 Fri Sep 2 12:22:49 2022 +++ src/sys/arch/powerpc/fpu/fpu_implode.c Fri Sep 2 12:24:54 2022 @@ -1,4 +1,4 @@ -/* $NetBSD: fpu_implode.c,v 1.15 2022/09/02 12:22:49 rin Exp $ */ +/* $NetBSD: fpu_implode.c,v 1.16 2022/09/02 12:24:54 rin Exp $ */ /* * Copyright (c) 1992, 1993 @@ -46,7 +46,7 @@ */ #include -__KERNEL_RCSID(0, "$NetBSD: fpu_implode.c,v 1.15 2022/09/02 12:22:49 rin Exp $"); +__KERNEL_RCSID(0, "$NetBSD: fpu_implode.c,v 1.16 2022/09/02 12:24:54 rin Exp $"); #include #include @@ -502,7 +502,7 @@ zero: return HI_WORD(sign); } if (fprf) fe->fe_cx |= FPRF_SIGN(sign); - return HI_WORD(sign | DBL_EXP(DBL_EXP_INFNAN) | DBL_MASK) | + return HI_WORD(sign | DBL_EXP(DBL_EXP_INFNAN - 1) | DBL_MASK) | LO_WORD(~0); } if (fprf)
CVS commit: src/sys/arch/powerpc/fpu
Module Name:src Committed By: rin Date: Fri Sep 2 12:24:54 UTC 2022 Modified Files: src/sys/arch/powerpc/fpu: fpu_implode.c Log Message: Fix off-by-one error in exponent when round a double to the largest normalized value; QNaN was wrongly generated here. To generate a diff of this commit: cvs rdiff -u -r1.15 -r1.16 src/sys/arch/powerpc/fpu/fpu_implode.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/powerpc/fpu
Module Name:src
Committed By: rin
Date: Fri Sep 2 12:22:50 UTC 2022
Modified Files:
src/sys/arch/powerpc/fpu: fpu_implode.c
Log Message:
Make fpu_ftod() return uint64_t value. NFC.
To generate a diff of this commit:
cvs rdiff -u -r1.14 -r1.15 src/sys/arch/powerpc/fpu/fpu_implode.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/powerpc/fpu/fpu_implode.c
diff -u src/sys/arch/powerpc/fpu/fpu_implode.c:1.14 src/sys/arch/powerpc/fpu/fpu_implode.c:1.15
--- src/sys/arch/powerpc/fpu/fpu_implode.c:1.14 Thu Sep 1 06:08:16 2022
+++ src/sys/arch/powerpc/fpu/fpu_implode.c Fri Sep 2 12:22:49 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: fpu_implode.c,v 1.14 2022/09/01 06:08:16 rin Exp $ */
+/* $NetBSD: fpu_implode.c,v 1.15 2022/09/02 12:22:49 rin Exp $ */
/*
* Copyright (c) 1992, 1993
@@ -46,7 +46,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: fpu_implode.c,v 1.14 2022/09/01 06:08:16 rin Exp $");
+__KERNEL_RCSID(0, "$NetBSD: fpu_implode.c,v 1.15 2022/09/02 12:22:49 rin Exp $");
#include
#include
@@ -67,7 +67,7 @@ static int round_int(struct fpn *, int *
static u_int fpu_ftoi(struct fpemu *, struct fpn *, int);
static uint64_t fpu_ftox(struct fpemu *, struct fpn *, int);
static u_int fpu_ftos(struct fpemu *, struct fpn *, bool);
-static u_int fpu_ftod(struct fpemu *, struct fpn *, u_int *, bool);
+static uint64_t fpu_ftod(struct fpemu *, struct fpn *, bool);
/*
* Round a number (algorithm from Motorola MC68882 manual, modified for
@@ -438,19 +438,20 @@ done:
}
/*
- * fpn -> double (32 bit high-order result returned; 32-bit low order result
- * left in res[1]). Assumes <= 61 bits in double precision fraction.
+ * fpn -> double. Assumes <= 61 bits in double precision fraction.
*
* This code mimics fpu_ftos; see it for comments.
*/
-static u_int
-fpu_ftod(struct fpemu *fe, struct fpn *fp, u_int *res, bool fprf)
+static uint64_t
+fpu_ftod(struct fpemu *fe, struct fpn *fp, bool fprf)
{
u_int sign = fp->fp_sign << 31;
int exp;
#define DBL_EXP(e) ((e) << (DBL_FRACBITS & 31))
#define DBL_MASK (DBL_EXP(1) - 1)
+#define HI_WORD(i) ((uint64_t)(i) << 32)
+#define LO_WORD(i) ((uint32_t)(i))
if (ISNAN(fp)) {
if (fprf)
@@ -471,8 +472,7 @@ fpu_ftod(struct fpemu *fe, struct fpn *f
if (sign)
fe->fe_cx |= FPSCR_C;
}
-zero: res[1] = 0;
- return (sign);
+zero: return HI_WORD(sign);
}
if ((exp = fp->fp_exp + DBL_EXP_BIAS) <= 0) {
@@ -480,8 +480,7 @@ zero: res[1] = 0;
if (round(fe, fp) && fp->fp_mant[2] == DBL_EXP(1)) {
if (fprf)
fe->fe_cx |= FPRF_SIGN(sign);
- res[1] = 0;
- return (sign | DBL_EXP(1) | 0);
+ return HI_WORD(sign | DBL_EXP(1) | 0);
}
if (fprf)
fe->fe_cx |= FPSCR_C | FPRF_SIGN(sign);
@@ -499,19 +498,18 @@ zero: res[1] = 0;
if (toinf(fe, sign)) {
if (fprf)
fe->fe_cx |= FPRF_SIGN(sign) | FPSCR_FU;
- res[1] = 0;
- return (sign | DBL_EXP(DBL_EXP_INFNAN) | 0);
+ return HI_WORD(sign | DBL_EXP(DBL_EXP_INFNAN) | 0);
}
if (fprf)
fe->fe_cx |= FPRF_SIGN(sign);
- res[1] = ~0;
- return (sign | DBL_EXP(DBL_EXP_INFNAN) | DBL_MASK);
+ return HI_WORD(sign | DBL_EXP(DBL_EXP_INFNAN) | DBL_MASK) |
+ LO_WORD(~0);
}
if (fprf)
fe->fe_cx |= FPRF_SIGN(sign);
done:
- res[1] = fp->fp_mant[3];
- return (sign | DBL_EXP(exp) | (fp->fp_mant[2] & DBL_MASK));
+ return HI_WORD(sign | DBL_EXP(exp) | (fp->fp_mant[2] & DBL_MASK)) |
+ LO_WORD(fp->fp_mant[3]);
}
/*
@@ -554,7 +552,7 @@ fpu_implode(struct fpemu *fe, struct fpn
break;
case FTYPE_DBL:
- space[0] = fpu_ftod(fe, fp, space, fprf);
+ *(uint64_t *)space = fpu_ftod(fe, fp, fprf);
DPRINTF(FPE_REG, ("fpu_implode: double %x %x\n",
space[0], space[1]));
break; break;
CVS commit: src/sys/arch/powerpc/fpu
Module Name:src Committed By: rin Date: Fri Sep 2 12:22:50 UTC 2022 Modified Files: src/sys/arch/powerpc/fpu: fpu_implode.c Log Message: Make fpu_ftod() return uint64_t value. NFC. To generate a diff of this commit: cvs rdiff -u -r1.14 -r1.15 src/sys/arch/powerpc/fpu/fpu_implode.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/powerpc/fpu
Module Name:src
Committed By: rin
Date: Thu Sep 1 06:10:58 UTC 2022
Modified Files:
src/sys/arch/powerpc/fpu: fpu_add.c fpu_div.c fpu_mul.c fpu_sqrt.c
fpu_subr.c
Log Message:
Do not raise SNaN exception for QNaN.
To generate a diff of this commit:
cvs rdiff -u -r1.5 -r1.6 src/sys/arch/powerpc/fpu/fpu_add.c \
src/sys/arch/powerpc/fpu/fpu_mul.c src/sys/arch/powerpc/fpu/fpu_subr.c
cvs rdiff -u -r1.6 -r1.7 src/sys/arch/powerpc/fpu/fpu_div.c
cvs rdiff -u -r1.10 -r1.11 src/sys/arch/powerpc/fpu/fpu_sqrt.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/powerpc/fpu/fpu_add.c
diff -u src/sys/arch/powerpc/fpu/fpu_add.c:1.5 src/sys/arch/powerpc/fpu/fpu_add.c:1.6
--- src/sys/arch/powerpc/fpu/fpu_add.c:1.5 Sat Jun 27 03:07:57 2020
+++ src/sys/arch/powerpc/fpu/fpu_add.c Thu Sep 1 06:10:58 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: fpu_add.c,v 1.5 2020/06/27 03:07:57 rin Exp $ */
+/* $NetBSD: fpu_add.c,v 1.6 2022/09/01 06:10:58 rin Exp $ */
/*
* Copyright (c) 1992, 1993
@@ -47,7 +47,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: fpu_add.c,v 1.5 2020/06/27 03:07:57 rin Exp $");
+__KERNEL_RCSID(0, "$NetBSD: fpu_add.c,v 1.6 2022/09/01 06:10:58 rin Exp $");
#include
#if defined(DIAGNOSTIC)||defined(DEBUG)
@@ -95,7 +95,8 @@ fpu_add(struct fpemu *fe)
DPRINTF(FPE_REG, ("=>\n"));
ORDER(x, y);
if (ISNAN(y)) {
- fe->fe_cx |= FPSCR_VXSNAN;
+ if (ISSNAN(y))
+ fe->fe_cx |= FPSCR_VXSNAN;
DUMPFPN(FPE_REG, y);
return (y);
}
Index: src/sys/arch/powerpc/fpu/fpu_mul.c
diff -u src/sys/arch/powerpc/fpu/fpu_mul.c:1.5 src/sys/arch/powerpc/fpu/fpu_mul.c:1.6
--- src/sys/arch/powerpc/fpu/fpu_mul.c:1.5 Sat Jun 27 03:07:57 2020
+++ src/sys/arch/powerpc/fpu/fpu_mul.c Thu Sep 1 06:10:58 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: fpu_mul.c,v 1.5 2020/06/27 03:07:57 rin Exp $ */
+/* $NetBSD: fpu_mul.c,v 1.6 2022/09/01 06:10:58 rin Exp $ */
/*
* Copyright (c) 1992, 1993
@@ -45,7 +45,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: fpu_mul.c,v 1.5 2020/06/27 03:07:57 rin Exp $");
+__KERNEL_RCSID(0, "$NetBSD: fpu_mul.c,v 1.6 2022/09/01 06:10:58 rin Exp $");
#include
#if defined(DIAGNOSTIC)||defined(DEBUG)
@@ -134,7 +134,8 @@ fpu_mul(struct fpemu *fe)
ORDER(x, y);
if (ISNAN(y)) {
y->fp_sign ^= x->fp_sign;
- fe->fe_cx |= FPSCR_VXSNAN;
+ if (ISSNAN(y))
+ fe->fe_cx |= FPSCR_VXSNAN;
DUMPFPN(FPE_REG, y);
return (y);
}
Index: src/sys/arch/powerpc/fpu/fpu_subr.c
diff -u src/sys/arch/powerpc/fpu/fpu_subr.c:1.5 src/sys/arch/powerpc/fpu/fpu_subr.c:1.6
--- src/sys/arch/powerpc/fpu/fpu_subr.c:1.5 Sat Jun 27 03:07:57 2020
+++ src/sys/arch/powerpc/fpu/fpu_subr.c Thu Sep 1 06:10:58 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: fpu_subr.c,v 1.5 2020/06/27 03:07:57 rin Exp $ */
+/* $NetBSD: fpu_subr.c,v 1.6 2022/09/01 06:10:58 rin Exp $ */
/*
* Copyright (c) 1992, 1993
@@ -45,7 +45,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: fpu_subr.c,v 1.5 2020/06/27 03:07:57 rin Exp $");
+__KERNEL_RCSID(0, "$NetBSD: fpu_subr.c,v 1.6 2022/09/01 06:10:58 rin Exp $");
#include
#if defined(DIAGNOSTIC)||defined(DEBUG)
@@ -213,7 +213,6 @@ fpu_newnan(struct fpemu *fe)
{
struct fpn *fp;
- fe->fe_cx |= FPSCR_VXSNAN;
fp = &fe->fe_f3;
fp->fp_class = FPC_QNAN;
fp->fp_sign = 0;
Index: src/sys/arch/powerpc/fpu/fpu_div.c
diff -u src/sys/arch/powerpc/fpu/fpu_div.c:1.6 src/sys/arch/powerpc/fpu/fpu_div.c:1.7
--- src/sys/arch/powerpc/fpu/fpu_div.c:1.6 Wed Jul 15 07:47:27 2020
+++ src/sys/arch/powerpc/fpu/fpu_div.c Thu Sep 1 06:10:58 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: fpu_div.c,v 1.6 2020/07/15 07:47:27 rin Exp $ */
+/* $NetBSD: fpu_div.c,v 1.7 2022/09/01 06:10:58 rin Exp $ */
/*
* Copyright (c) 1992, 1993
@@ -45,7 +45,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: fpu_div.c,v 1.6 2020/07/15 07:47:27 rin Exp $");
+__KERNEL_RCSID(0, "$NetBSD: fpu_div.c,v 1.7 2022/09/01 06:10:58 rin Exp $");
#include
#if defined(DIAGNOSTIC)||defined(DEBUG)
@@ -183,7 +183,8 @@ fpu_div(struct fpemu *fe)
DPRINTF(FPE_REG, ("=>\n"));
if (ISNAN(x) || ISNAN(y)) {
ORDER(x, y);
- fe->fe_cx |= FPSCR_VXSNAN;
+ if (ISSNAN(x) || ISSNAN(y))
+ fe->fe_cx |= FPSCR_VXSNAN;
DUMPFPN(FPE_REG, y);
return (y);
}
Index: src/sys/arch/powerpc/fpu/fpu_sqrt.c
diff -u src/sys/arch/powerpc/fpu/fpu_sqrt.c:1.10 src/sys/arch/powerpc/fpu/fpu_sqrt.c:1.11
--- src/sys/arch/powerpc/fpu/fpu_sqrt.c:1.10 Tue May 24 20:00:49 2022
+++ src/sys/arch/powerpc/fpu/fpu_sqrt.c Thu Sep 1 06:10:58 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: fpu_sqrt.c,v 1.10 2022/05/24 20:00:49 andvar Exp $ */
+/* $NetBSD: fpu_sqrt.c,v 1.11 2022/09/01 06:10:58 rin Exp $ */
/*
* Copyright (c) 1992, 1993
@@ -45,7 +45,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: fpu_sqrt.c,v 1.10 2022/05/24 20:00:49 andvar Exp $");
+__KERNEL_RCSID(0, "$NetBSD: fpu_sqrt.c,v 1.11 2022/09/01 06:10:58 rin Exp $");
#include
#if defined(DIAGNOSTIC)||defined(DEBUG)
CVS commit: src/sys/arch/powerpc/fpu
Module Name:src Committed By: rin Date: Thu Sep 1 06:10:58 UTC 2022 Modified Files: src/sys/arch/powerpc/fpu: fpu_add.c fpu_div.c fpu_mul.c fpu_sqrt.c fpu_subr.c Log Message: Do not raise SNaN exception for QNaN. To generate a diff of this commit: cvs rdiff -u -r1.5 -r1.6 src/sys/arch/powerpc/fpu/fpu_add.c \ src/sys/arch/powerpc/fpu/fpu_mul.c src/sys/arch/powerpc/fpu/fpu_subr.c cvs rdiff -u -r1.6 -r1.7 src/sys/arch/powerpc/fpu/fpu_div.c cvs rdiff -u -r1.10 -r1.11 src/sys/arch/powerpc/fpu/fpu_sqrt.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/powerpc/fpu
Module Name:src
Committed By: rin
Date: Thu Sep 1 06:08:16 UTC 2022
Modified Files:
src/sys/arch/powerpc/fpu: fpu_emu.c fpu_emu.h fpu_implode.c
Log Message:
Set FPSCR[FPRF] for calculated result, for all instructions
that are documented to update this field.
Exceptions are fcti{w,d}{,z}; FPSCR[FPRF] becomes undefined,
according to Power ISA. We do not overwrite this field for
these insns at the moment.
To generate a diff of this commit:
cvs rdiff -u -r1.43 -r1.44 src/sys/arch/powerpc/fpu/fpu_emu.c
cvs rdiff -u -r1.6 -r1.7 src/sys/arch/powerpc/fpu/fpu_emu.h
cvs rdiff -u -r1.13 -r1.14 src/sys/arch/powerpc/fpu/fpu_implode.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
CVS commit: src/sys/arch/powerpc/fpu
Module Name:src
Committed By: rin
Date: Thu Sep 1 06:08:16 UTC 2022
Modified Files:
src/sys/arch/powerpc/fpu: fpu_emu.c fpu_emu.h fpu_implode.c
Log Message:
Set FPSCR[FPRF] for calculated result, for all instructions
that are documented to update this field.
Exceptions are fcti{w,d}{,z}; FPSCR[FPRF] becomes undefined,
according to Power ISA. We do not overwrite this field for
these insns at the moment.
To generate a diff of this commit:
cvs rdiff -u -r1.43 -r1.44 src/sys/arch/powerpc/fpu/fpu_emu.c
cvs rdiff -u -r1.6 -r1.7 src/sys/arch/powerpc/fpu/fpu_emu.h
cvs rdiff -u -r1.13 -r1.14 src/sys/arch/powerpc/fpu/fpu_implode.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/powerpc/fpu/fpu_emu.c
diff -u src/sys/arch/powerpc/fpu/fpu_emu.c:1.43 src/sys/arch/powerpc/fpu/fpu_emu.c:1.44
--- src/sys/arch/powerpc/fpu/fpu_emu.c:1.43 Tue Aug 30 11:09:34 2022
+++ src/sys/arch/powerpc/fpu/fpu_emu.c Thu Sep 1 06:08:16 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: fpu_emu.c,v 1.43 2022/08/30 11:09:34 rin Exp $ */
+/* $NetBSD: fpu_emu.c,v 1.44 2022/09/01 06:08:16 rin Exp $ */
/*
* Copyright 2001 Wasabi Systems, Inc.
@@ -76,7 +76,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: fpu_emu.c,v 1.43 2022/08/30 11:09:34 rin Exp $");
+__KERNEL_RCSID(0, "$NetBSD: fpu_emu.c,v 1.44 2022/09/01 06:08:16 rin Exp $");
#ifdef _KERNEL_OPT
#include "opt_ddb.h"
@@ -496,7 +496,7 @@ fpu_execute(struct trapframe *tf, struct
fpu_implode(fe, fp, FTYPE_SNG,
(u_int *)&fs->fpreg[rt]);
fpu_explode(fe, fp = &fe->fe_f1, FTYPE_SNG, rt);
-type = FTYPE_DBL;
+type = FTYPE_DBL | FTYPE_FPRF;
break;
case OPC63_FCTIW:
case OPC63_FCTIWZ:
@@ -624,7 +624,7 @@ fpu_execute(struct trapframe *tf, struct
DPRINTF(FPE_INSN, ("fpu_execute: FCFID\n"));
type = FTYPE_LNG;
fpu_explode(fe, fp = &fe->fe_f1, type, rb);
-type = FTYPE_DBL;
+type = FTYPE_DBL | FTYPE_FPRF;
break;
default:
return (NOTFPU);
@@ -765,10 +765,11 @@ fpu_execute(struct trapframe *tf, struct
/* If the instruction was single precision, round */
if (!(instr.i_any.i_opcd & 0x4)) {
-fpu_implode(fe, fp, FTYPE_SNG,
+fpu_implode(fe, fp, FTYPE_SNG | FTYPE_FPRF,
(u_int *)&fs->fpreg[rt]);
fpu_explode(fe, fp = &fe->fe_f1, FTYPE_SNG, rt);
- }
+ } else
+type |= FTYPE_FPRF;
}
} else {
return (NOTFPU);
Index: src/sys/arch/powerpc/fpu/fpu_emu.h
diff -u src/sys/arch/powerpc/fpu/fpu_emu.h:1.6 src/sys/arch/powerpc/fpu/fpu_emu.h:1.7
--- src/sys/arch/powerpc/fpu/fpu_emu.h:1.6 Tue Aug 30 11:09:34 2022
+++ src/sys/arch/powerpc/fpu/fpu_emu.h Thu Sep 1 06:08:16 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: fpu_emu.h,v 1.6 2022/08/30 11:09:34 rin Exp $ */
+/* $NetBSD: fpu_emu.h,v 1.7 2022/09/01 06:08:16 rin Exp $ */
/*
* Copyright (c) 1992, 1993
@@ -136,12 +136,13 @@ struct fpn {
/*
* FPU data types.
*/
-#define FTYPE_INT 0x0 /* data = 32-bit signed integer */
-#define FTYPE_LNG 0x1 /* data = 64-bit signed long integer */
-#define FTYPE_SNG 0x2 /* data = 32-bit float */
-#define FTYPE_DBL 0x4 /* data = 64-bit double */
-#define FTYPE_RD_RZ 0x8
-#define FTYPE_RD_MASK (FTYPE_RD_RZ)
+#define FTYPE_INT 0x00 /* data = 32-bit signed integer */
+#define FTYPE_LNG 0x01 /* data = 64-bit signed long integer */
+#define FTYPE_SNG 0x02 /* data = 32-bit float */
+#define FTYPE_DBL 0x04 /* data = 64-bit double */
+#define FTYPE_RD_RZ 0x08
+#define FTYPE_FPRF 0x10
+#define FTYPE_FLAG_MASK (FTYPE_RD_RZ | FTYPE_FPRF)
/*
* Emulator state.
Index: src/sys/arch/powerpc/fpu/fpu_implode.c
diff -u src/sys/arch/powerpc/fpu/fpu_implode.c:1.13 src/sys/arch/powerpc/fpu/fpu_implode.c:1.14
--- src/sys/arch/powerpc/fpu/fpu_implode.c:1.13 Thu Sep 1 05:58:19 2022
+++ src/sys/arch/powerpc/fpu/fpu_implode.c Thu Sep 1 06:08:16 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: fpu_implode.c,v 1.13 2022/09/01 05:58:19 rin Exp $ */
+/* $NetBSD: fpu_implode.c,v 1.14 2022/09/01 06:08:16 rin Exp $ */
/*
* Copyright (c) 1992, 1993
@@ -46,7 +46,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: fpu_implode.c,v 1.13 2022/09/01 05:58:19 rin Exp $");
+__KERNEL_RCSID(0, "$NetBSD: fpu_implode.c,v 1.14 2022/09/01 06:08:16 rin Exp $");
#include
#include
@@ -66,8 +66,8 @@ static int round_int(struct fpn *, int *
static u_int fpu_ftoi(struct fpemu *, struct fpn *, int);
static uint64_t fpu_ftox(struct fpemu *, struct fpn *, int);
-static u_int fpu_ftos(struct fpemu *, struct fpn *);
-static u_int fpu_ftod(struct fpemu *, struct fpn *, u_int *);
+static u_int fpu_ftos(struct fpemu *, struct fpn *, bool);
+static u_int fpu_ftod(struct fpemu *, struct fpn *, u_int *, bool);
/*
* Round a number (algorithm from Motorola MC68882 manual, modified for
@@ -333,12 +333,14 @@ fpu_ftox(struct fpemu *fe, struct fpn *f
return (0x7fffLL + sign);
}
+#define FPRF_SIGN(sign) ((sign) ? FPSCR_FL : FPSCR_FG)
+
/*
* fpn -> sin
CVS commit: src/sys/arch/powerpc/fpu
Module Name:src
Committed By: rin
Date: Thu Sep 1 05:58:19 UTC 2022
Modified Files:
src/sys/arch/powerpc/fpu: fpu_extern.h fpu_implode.c
Log Message:
static-fy fpu_fto[ixsd](). NFC.
To generate a diff of this commit:
cvs rdiff -u -r1.7 -r1.8 src/sys/arch/powerpc/fpu/fpu_extern.h
cvs rdiff -u -r1.12 -r1.13 src/sys/arch/powerpc/fpu/fpu_implode.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/powerpc/fpu/fpu_extern.h
diff -u src/sys/arch/powerpc/fpu/fpu_extern.h:1.7 src/sys/arch/powerpc/fpu/fpu_extern.h:1.8
--- src/sys/arch/powerpc/fpu/fpu_extern.h:1.7 Tue Aug 30 11:09:34 2022
+++ src/sys/arch/powerpc/fpu/fpu_extern.h Thu Sep 1 05:58:19 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: fpu_extern.h,v 1.7 2022/08/30 11:09:34 rin Exp $ */
+/* $NetBSD: fpu_extern.h,v 1.8 2022/09/01 05:58:19 rin Exp $ */
/*-
* Copyright (c) 1995 The NetBSD Foundation, Inc.
@@ -63,10 +63,6 @@ int fpu_dtof(struct fpn *, u_int, u_int)
void fpu_explode(struct fpemu *, struct fpn *, int, int);
/* fpu_implode.c */
-u_int fpu_ftoi(struct fpemu *, struct fpn *, int);
-uint64_t fpu_ftox(struct fpemu *, struct fpn *, int);
-u_int fpu_ftos(struct fpemu *, struct fpn *);
-u_int fpu_ftod(struct fpemu *, struct fpn *, u_int *);
void fpu_implode(struct fpemu *, struct fpn *, int, u_int *);
/* fpu_mul.c */
Index: src/sys/arch/powerpc/fpu/fpu_implode.c
diff -u src/sys/arch/powerpc/fpu/fpu_implode.c:1.12 src/sys/arch/powerpc/fpu/fpu_implode.c:1.13
--- src/sys/arch/powerpc/fpu/fpu_implode.c:1.12 Thu Sep 1 05:56:52 2022
+++ src/sys/arch/powerpc/fpu/fpu_implode.c Thu Sep 1 05:58:19 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: fpu_implode.c,v 1.12 2022/09/01 05:56:52 rin Exp $ */
+/* $NetBSD: fpu_implode.c,v 1.13 2022/09/01 05:58:19 rin Exp $ */
/*
* Copyright (c) 1992, 1993
@@ -46,7 +46,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: fpu_implode.c,v 1.12 2022/09/01 05:56:52 rin Exp $");
+__KERNEL_RCSID(0, "$NetBSD: fpu_implode.c,v 1.13 2022/09/01 05:58:19 rin Exp $");
#include
#include
@@ -64,6 +64,11 @@ static int round(struct fpemu *, struct
static int toinf(struct fpemu *, int);
static int round_int(struct fpn *, int *, int, int, int);
+static u_int fpu_ftoi(struct fpemu *, struct fpn *, int);
+static uint64_t fpu_ftox(struct fpemu *, struct fpn *, int);
+static u_int fpu_ftos(struct fpemu *, struct fpn *);
+static u_int fpu_ftod(struct fpemu *, struct fpn *, u_int *);
+
/*
* Round a number (algorithm from Motorola MC68882 manual, modified for
* our internal format). Set inexact exception if rounding is required.
@@ -227,7 +232,7 @@ round_int(struct fpn *fp, int *cx, int r
/*
* fpn -> int (int value returned as return value).
*/
-u_int
+static u_int
fpu_ftoi(struct fpemu *fe, struct fpn *fp, int rn)
{
u_int i;
@@ -279,7 +284,7 @@ fpu_ftoi(struct fpemu *fe, struct fpn *f
/*
* fpn -> extended int (high bits of int value returned as return value).
*/
-uint64_t
+static uint64_t
fpu_ftox(struct fpemu *fe, struct fpn *fp, int rn)
{
uint64_t i;
@@ -332,7 +337,7 @@ fpu_ftox(struct fpemu *fe, struct fpn *f
* fpn -> single (32 bit single returned as return value).
* We assume <= 29 bits in a single-precision fraction (1.f part).
*/
-u_int
+static u_int
fpu_ftos(struct fpemu *fe, struct fpn *fp)
{
u_int sign = fp->fp_sign << 31;
@@ -413,7 +418,7 @@ done:
*
* This code mimics fpu_ftos; see it for comments.
*/
-u_int
+static u_int
fpu_ftod(struct fpemu *fe, struct fpn *fp, u_int *res)
{
u_int sign = fp->fp_sign << 31;
CVS commit: src/sys/arch/powerpc/fpu
Module Name:src Committed By: rin Date: Thu Sep 1 05:58:19 UTC 2022 Modified Files: src/sys/arch/powerpc/fpu: fpu_extern.h fpu_implode.c Log Message: static-fy fpu_fto[ixsd](). NFC. To generate a diff of this commit: cvs rdiff -u -r1.7 -r1.8 src/sys/arch/powerpc/fpu/fpu_extern.h cvs rdiff -u -r1.12 -r1.13 src/sys/arch/powerpc/fpu/fpu_implode.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/powerpc/fpu
Module Name:src
Committed By: rin
Date: Thu Sep 1 05:56:52 UTC 2022
Modified Files:
src/sys/arch/powerpc/fpu: fpu_implode.c
Log Message:
Further fix for fcti{w,d}{,z}.
- Treat {Q,S}NaN correctly.
- Set exception bits appropriately.
- Introduce round_int().
To generate a diff of this commit:
cvs rdiff -u -r1.11 -r1.12 src/sys/arch/powerpc/fpu/fpu_implode.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/powerpc/fpu/fpu_implode.c
diff -u src/sys/arch/powerpc/fpu/fpu_implode.c:1.11 src/sys/arch/powerpc/fpu/fpu_implode.c:1.12
--- src/sys/arch/powerpc/fpu/fpu_implode.c:1.11 Thu Sep 1 05:51:51 2022
+++ src/sys/arch/powerpc/fpu/fpu_implode.c Thu Sep 1 05:56:52 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: fpu_implode.c,v 1.11 2022/09/01 05:51:51 rin Exp $ */
+/* $NetBSD: fpu_implode.c,v 1.12 2022/09/01 05:56:52 rin Exp $ */
/*
* Copyright (c) 1992, 1993
@@ -46,7 +46,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: fpu_implode.c,v 1.11 2022/09/01 05:51:51 rin Exp $");
+__KERNEL_RCSID(0, "$NetBSD: fpu_implode.c,v 1.12 2022/09/01 05:56:52 rin Exp $");
#include
#include
@@ -62,6 +62,7 @@ __KERNEL_RCSID(0, "$NetBSD: fpu_implode.
static int round(struct fpemu *, struct fpn *);
static int toinf(struct fpemu *, int);
+static int round_int(struct fpn *, int *, int, int, int);
/*
* Round a number (algorithm from Motorola MC68882 manual, modified for
@@ -189,6 +190,40 @@ toinf(struct fpemu *fe, int sign)
return (inf);
}
+static int
+round_int(struct fpn *fp, int *cx, int rn, int sign, int odd)
+{
+ int g, rs;
+
+ g = fp->fp_mant[3] & 0x8000;
+ rs = (fp->fp_mant[3] & 0x7fff) | fp->fp_sticky;
+
+ if ((g | rs) == 0)
+ return 0; /* exact */
+
+ *cx |= FPSCR_XX | FPSCR_FI;
+
+ switch (rn) {
+ case FSR_RD_RN:
+ if (g && (rs | odd))
+ break;
+ return 0;
+ case FSR_RD_RZ:
+ return 0;
+ case FSR_RD_RP:
+ if (!sign)
+ break;
+ return 0;
+ case FSR_RD_RM:
+ if (sign)
+ break;
+ return 0;
+ }
+
+ *cx |= FPSCR_FR;
+ return 1;
+}
+
/*
* fpn -> int (int value returned as return value).
*/
@@ -196,10 +231,17 @@ u_int
fpu_ftoi(struct fpemu *fe, struct fpn *fp, int rn)
{
u_int i;
- int sign, exp, g, rs;
+ int sign, exp, cx;
sign = fp->fp_sign;
+ cx = 0;
switch (fp->fp_class) {
+ case FPC_SNAN:
+ fe->fe_cx |= FPSCR_VXSNAN;
+ /* FALLTHROUGH */
+ case FPC_QNAN:
+ sign = 1;
+ break;
case FPC_ZERO:
return (0);
@@ -218,34 +260,15 @@ fpu_ftoi(struct fpemu *fe, struct fpn *f
if ((exp = fp->fp_exp) >= 32)
break;
/* NB: the following includes exp < 0 cases */
- if (fpu_shr(fp, FP_NMANT - 32 - 1 - exp) != 0)
- fe->fe_cx |= FPSCR_UX;
+ (void)fpu_shr(fp, FP_NMANT - 32 - 1 - exp);
i = fp->fp_mant[2];
-
- g = fp->fp_mant[3] & 0x8000;
- rs = (fp->fp_mant[3] & 0x7fff) | fp->fp_sticky;
- switch (rn) {
- case FSR_RD_RN:
- if (g && (rs | (i & 1)))
-i++;
- break;
- case FSR_RD_RZ:
- break;
- case FSR_RD_RP:
- if (!sign && (g | rs))
-i++;
- break;
- case FSR_RD_RM:
- if (sign && (g | rs))
-i++;
- break;
- }
-
+ i += round_int(fp, &cx, rn, sign, i & 1);
if (i >= ((u_int)0x8000 + sign))
break;
+ fe->fe_cx |= cx;
return (sign ? -i : i);
- default: /* Inf, qNaN, sNaN */
+ case FPC_INF:
break;
}
/* overflow: replace any inexact exception with invalid */
@@ -260,10 +283,17 @@ uint64_t
fpu_ftox(struct fpemu *fe, struct fpn *fp, int rn)
{
uint64_t i;
- int sign, exp, g, rs;
+ int sign, exp, cx;
sign = fp->fp_sign;
+ cx = 0;
switch (fp->fp_class) {
+ case FPC_SNAN:
+ fe->fe_cx |= FPSCR_VXSNAN;
+ /* FALLTHROUGH */
+ case FPC_QNAN:
+ sign = 1;
+ break;
case FPC_ZERO:
return (0);
@@ -282,34 +312,15 @@ fpu_ftox(struct fpemu *fe, struct fpn *f
if ((exp = fp->fp_exp) >= 64)
break;
/* NB: the following includes exp < 0 cases */
- if (fpu_shr(fp, FP_NMANT - 32 - 1 - exp) != 0)
- fe->fe_cx |= FPSCR_UX;
+ (void)fpu_shr(fp, FP_NMANT - 32 - 1 - exp);
i = ((uint64_t)fp->fp_mant[1] << 32) | fp->fp_mant[2];
-
- g = fp->fp_mant[3] & 0x8000;
- rs = (fp->fp_mant[3] & 0x7fff) | fp->fp_sticky;
- switch (rn) {
- case FSR_RD_RN:
- if (g && (rs | (i & 1)))
-i++;
- break;
- case FSR_RD_RZ:
- break;
- case FSR_RD_RP:
- if (!sign && (g | rs))
-i++;
- break;
- case FSR_RD_RM:
- if (sign && (g | rs))
-i++;
- break;
- }
-
+ i += round_int(fp, &cx, rn, sign, i & 1);
if (i >= ((uint64_t)0x8000LL + sign))
break;
+ fe->fe_cx |= cx;
return (sign ? -i : i);
- default: /* Inf, qNaN, sNaN */
+ case FPC_INF:
break;
}
/* overflow: replace any inexact exception with invalid */
CVS commit: src/sys/arch/powerpc/fpu
Module Name:src
Committed By: rin
Date: Thu Sep 1 05:56:52 UTC 2022
Modified Files:
src/sys/arch/powerpc/fpu: fpu_implode.c
Log Message:
Further fix for fcti{w,d}{,z}.
- Treat {Q,S}NaN correctly.
- Set exception bits appropriately.
- Introduce round_int().
To generate a diff of this commit:
cvs rdiff -u -r1.11 -r1.12 src/sys/arch/powerpc/fpu/fpu_implode.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
CVS commit: src/sys/arch/powerpc/fpu
Module Name:src Committed By: rin Date: Thu Sep 1 05:51:51 UTC 2022 Modified Files: src/sys/arch/powerpc/fpu: fpu_implode.c Log Message: Remove stale comment. To generate a diff of this commit: cvs rdiff -u -r1.10 -r1.11 src/sys/arch/powerpc/fpu/fpu_implode.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/powerpc/fpu/fpu_implode.c diff -u src/sys/arch/powerpc/fpu/fpu_implode.c:1.10 src/sys/arch/powerpc/fpu/fpu_implode.c:1.11 --- src/sys/arch/powerpc/fpu/fpu_implode.c:1.10 Tue Aug 30 11:09:34 2022 +++ src/sys/arch/powerpc/fpu/fpu_implode.c Thu Sep 1 05:51:51 2022 @@ -1,4 +1,4 @@ -/* $NetBSD: fpu_implode.c,v 1.10 2022/08/30 11:09:34 rin Exp $ */ +/* $NetBSD: fpu_implode.c,v 1.11 2022/09/01 05:51:51 rin Exp $ */ /* * Copyright (c) 1992, 1993 @@ -46,7 +46,7 @@ */ #include -__KERNEL_RCSID(0, "$NetBSD: fpu_implode.c,v 1.10 2022/08/30 11:09:34 rin Exp $"); +__KERNEL_RCSID(0, "$NetBSD: fpu_implode.c,v 1.11 2022/09/01 05:51:51 rin Exp $"); #include #include @@ -255,9 +255,6 @@ fpu_ftoi(struct fpemu *fe, struct fpn *f /* * fpn -> extended int (high bits of int value returned as return value). - * - * N.B.: this conversion always rounds towards zero (this is a peculiarity - * of the SPARC instruction set). */ uint64_t fpu_ftox(struct fpemu *fe, struct fpn *fp, int rn)
CVS commit: src/sys/arch/powerpc/fpu
Module Name:src Committed By: rin Date: Thu Sep 1 05:51:51 UTC 2022 Modified Files: src/sys/arch/powerpc/fpu: fpu_implode.c Log Message: Remove stale comment. To generate a diff of this commit: cvs rdiff -u -r1.10 -r1.11 src/sys/arch/powerpc/fpu/fpu_implode.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/powerpc/fpu
Module Name:src
Committed By: rin
Date: Tue Aug 30 11:09:34 UTC 2022
Modified Files:
src/sys/arch/powerpc/fpu: fpu_emu.c fpu_emu.h fpu_extern.h
fpu_implode.c
Log Message:
Fix fcti{w,d}{,z}.
- Treat 64-bit integer correctly for fctid{,z}.
- Respect round mode specified by FPSCR[RN].
XXX
- Set FPSCR[FR] and [FI] appropriately.
- Also set FPSCR[FPRF]?
- fctid{,z} traps on powerpc32 (confirmed on 603e and G4).
To generate a diff of this commit:
cvs rdiff -u -r1.42 -r1.43 src/sys/arch/powerpc/fpu/fpu_emu.c
cvs rdiff -u -r1.5 -r1.6 src/sys/arch/powerpc/fpu/fpu_emu.h
cvs rdiff -u -r1.6 -r1.7 src/sys/arch/powerpc/fpu/fpu_extern.h
cvs rdiff -u -r1.9 -r1.10 src/sys/arch/powerpc/fpu/fpu_implode.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/powerpc/fpu/fpu_emu.c
diff -u src/sys/arch/powerpc/fpu/fpu_emu.c:1.42 src/sys/arch/powerpc/fpu/fpu_emu.c:1.43
--- src/sys/arch/powerpc/fpu/fpu_emu.c:1.42 Tue Aug 30 10:59:43 2022
+++ src/sys/arch/powerpc/fpu/fpu_emu.c Tue Aug 30 11:09:34 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: fpu_emu.c,v 1.42 2022/08/30 10:59:43 rin Exp $ */
+/* $NetBSD: fpu_emu.c,v 1.43 2022/08/30 11:09:34 rin Exp $ */
/*
* Copyright 2001 Wasabi Systems, Inc.
@@ -76,7 +76,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: fpu_emu.c,v 1.42 2022/08/30 10:59:43 rin Exp $");
+__KERNEL_RCSID(0, "$NetBSD: fpu_emu.c,v 1.43 2022/08/30 11:09:34 rin Exp $");
#ifdef _KERNEL_OPT
#include "opt_ddb.h"
@@ -504,6 +504,8 @@ fpu_execute(struct trapframe *tf, struct
DPRINTF(FPE_INSN, ("fpu_execute: FCTIW\n"));
fpu_explode(fe, fp = &fe->fe_f1, type, rb);
type = FTYPE_INT;
+if (instr.i_x.i_xo == OPC63_FCTIWZ)
+ type |= FTYPE_RD_RZ;
break;
case OPC63_FCMPO:
FPU_EMU_EVCNT_INCR(fcmpo);
@@ -614,6 +616,8 @@ fpu_execute(struct trapframe *tf, struct
DPRINTF(FPE_INSN, ("fpu_execute: FCTID\n"));
fpu_explode(fe, fp = &fe->fe_f1, type, rb);
type = FTYPE_LNG;
+if (instr.i_x.i_xo == OPC63_FCTIDZ)
+ type |= FTYPE_RD_RZ;
break;
case OPC63_FCFID:
FPU_EMU_EVCNT_INCR(fcfid);
Index: src/sys/arch/powerpc/fpu/fpu_emu.h
diff -u src/sys/arch/powerpc/fpu/fpu_emu.h:1.5 src/sys/arch/powerpc/fpu/fpu_emu.h:1.6
--- src/sys/arch/powerpc/fpu/fpu_emu.h:1.5 Tue Aug 30 11:05:59 2022
+++ src/sys/arch/powerpc/fpu/fpu_emu.h Tue Aug 30 11:09:34 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: fpu_emu.h,v 1.5 2022/08/30 11:05:59 rin Exp $ */
+/* $NetBSD: fpu_emu.h,v 1.6 2022/08/30 11:09:34 rin Exp $ */
/*
* Copyright (c) 1992, 1993
@@ -136,10 +136,12 @@ struct fpn {
/*
* FPU data types.
*/
-#define FTYPE_LNG -1 /* data = 64-bit signed long integer */
-#define FTYPE_INT 0 /* data = 32-bit signed integer */
-#define FTYPE_SNG 1 /* data = 32-bit float */
-#define FTYPE_DBL 2 /* data = 64-bit double */
+#define FTYPE_INT 0x0 /* data = 32-bit signed integer */
+#define FTYPE_LNG 0x1 /* data = 64-bit signed long integer */
+#define FTYPE_SNG 0x2 /* data = 32-bit float */
+#define FTYPE_DBL 0x4 /* data = 64-bit double */
+#define FTYPE_RD_RZ 0x8
+#define FTYPE_RD_MASK (FTYPE_RD_RZ)
/*
* Emulator state.
Index: src/sys/arch/powerpc/fpu/fpu_extern.h
diff -u src/sys/arch/powerpc/fpu/fpu_extern.h:1.6 src/sys/arch/powerpc/fpu/fpu_extern.h:1.7
--- src/sys/arch/powerpc/fpu/fpu_extern.h:1.6 Sun Aug 28 22:22:41 2022
+++ src/sys/arch/powerpc/fpu/fpu_extern.h Tue Aug 30 11:09:34 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: fpu_extern.h,v 1.6 2022/08/28 22:22:41 rin Exp $ */
+/* $NetBSD: fpu_extern.h,v 1.7 2022/08/30 11:09:34 rin Exp $ */
/*-
* Copyright (c) 1995 The NetBSD Foundation, Inc.
@@ -63,8 +63,8 @@ int fpu_dtof(struct fpn *, u_int, u_int)
void fpu_explode(struct fpemu *, struct fpn *, int, int);
/* fpu_implode.c */
-u_int fpu_ftoi(struct fpemu *, struct fpn *);
-u_int fpu_ftox(struct fpemu *, struct fpn *, u_int *);
+u_int fpu_ftoi(struct fpemu *, struct fpn *, int);
+uint64_t fpu_ftox(struct fpemu *, struct fpn *, int);
u_int fpu_ftos(struct fpemu *, struct fpn *);
u_int fpu_ftod(struct fpemu *, struct fpn *, u_int *);
void fpu_implode(struct fpemu *, struct fpn *, int, u_int *);
Index: src/sys/arch/powerpc/fpu/fpu_implode.c
diff -u src/sys/arch/powerpc/fpu/fpu_implode.c:1.9 src/sys/arch/powerpc/fpu/fpu_implode.c:1.10
--- src/sys/arch/powerpc/fpu/fpu_implode.c:1.9 Tue Aug 30 11:00:49 2022
+++ src/sys/arch/powerpc/fpu/fpu_implode.c Tue Aug 30 11:09:34 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: fpu_implode.c,v 1.9 2022/08/30 11:00:49 rin Exp $ */
+/* $NetBSD: fpu_implode.c,v 1.10 2022/08/30 11:09:34 rin Exp $ */
/*
* Copyright (c) 1992, 1993
@@ -46,7 +46,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: fpu_implode.c,v 1.9 2022/08/30 11:00:49 rin Exp $");
+__KERNEL_RCSID(0, "$NetBSD: fpu_implode.c,v 1.10 2022/08/30 11:09:34 rin Exp $");
#include
#include
@@ -191,15 +191,12 @@ toinf(struct fpemu *fe, int sign)
/*
* fpn -> int (int value returned as
CVS commit: src/sys/arch/powerpc/fpu
Module Name:src
Committed By: rin
Date: Tue Aug 30 11:09:34 UTC 2022
Modified Files:
src/sys/arch/powerpc/fpu: fpu_emu.c fpu_emu.h fpu_extern.h
fpu_implode.c
Log Message:
Fix fcti{w,d}{,z}.
- Treat 64-bit integer correctly for fctid{,z}.
- Respect round mode specified by FPSCR[RN].
XXX
- Set FPSCR[FR] and [FI] appropriately.
- Also set FPSCR[FPRF]?
- fctid{,z} traps on powerpc32 (confirmed on 603e and G4).
To generate a diff of this commit:
cvs rdiff -u -r1.42 -r1.43 src/sys/arch/powerpc/fpu/fpu_emu.c
cvs rdiff -u -r1.5 -r1.6 src/sys/arch/powerpc/fpu/fpu_emu.h
cvs rdiff -u -r1.6 -r1.7 src/sys/arch/powerpc/fpu/fpu_extern.h
cvs rdiff -u -r1.9 -r1.10 src/sys/arch/powerpc/fpu/fpu_implode.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
CVS commit: src/sys/arch/powerpc/fpu
Module Name:src Committed By: rin Date: Tue Aug 30 11:00:49 UTC 2022 Modified Files: src/sys/arch/powerpc/fpu: fpu_implode.c Log Message: Do not assert FPSCR[UX] when overflow. To generate a diff of this commit: cvs rdiff -u -r1.8 -r1.9 src/sys/arch/powerpc/fpu/fpu_implode.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/powerpc/fpu
Module Name:src
Committed By: rin
Date: Tue Aug 30 11:00:49 UTC 2022
Modified Files:
src/sys/arch/powerpc/fpu: fpu_implode.c
Log Message:
Do not assert FPSCR[UX] when overflow.
To generate a diff of this commit:
cvs rdiff -u -r1.8 -r1.9 src/sys/arch/powerpc/fpu/fpu_implode.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/powerpc/fpu/fpu_implode.c
diff -u src/sys/arch/powerpc/fpu/fpu_implode.c:1.8 src/sys/arch/powerpc/fpu/fpu_implode.c:1.9
--- src/sys/arch/powerpc/fpu/fpu_implode.c:1.8 Sun Aug 28 22:22:41 2022
+++ src/sys/arch/powerpc/fpu/fpu_implode.c Tue Aug 30 11:00:49 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: fpu_implode.c,v 1.8 2022/08/28 22:22:41 rin Exp $ */
+/* $NetBSD: fpu_implode.c,v 1.9 2022/08/30 11:00:49 rin Exp $ */
/*
* Copyright (c) 1992, 1993
@@ -46,7 +46,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: fpu_implode.c,v 1.8 2022/08/28 22:22:41 rin Exp $");
+__KERNEL_RCSID(0, "$NetBSD: fpu_implode.c,v 1.9 2022/08/30 11:00:49 rin Exp $");
#include
#include
@@ -408,7 +408,7 @@ zero: res[1] = 0;
if (round(fe, fp) && fp->fp_mant[2] == DBL_EXP(2))
exp++;
if (exp >= DBL_EXP_INFNAN) {
- fe->fe_cx |= FPSCR_OX | FPSCR_UX;
+ fe->fe_cx |= FPSCR_OX;
if (toinf(fe, sign)) {
res[1] = 0;
return (sign | DBL_EXP(DBL_EXP_INFNAN) | 0);
CVS commit: src/sys/arch/powerpc/fpu
Module Name:src Committed By: rin Date: Tue Aug 30 10:59:43 UTC 2022 Modified Files: src/sys/arch/powerpc/fpu: fpu_emu.c Log Message: Fix fsel; frB is chosen when frA is negative or NaN. For fpu_emu.c rev 1.41 or prior, wrong register was chosen for NaN with sign bit being cleared. To generate a diff of this commit: cvs rdiff -u -r1.41 -r1.42 src/sys/arch/powerpc/fpu/fpu_emu.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/powerpc/fpu
Module Name:src
Committed By: rin
Date: Tue Aug 30 10:59:43 UTC 2022
Modified Files:
src/sys/arch/powerpc/fpu: fpu_emu.c
Log Message:
Fix fsel; frB is chosen when frA is negative or NaN.
For fpu_emu.c rev 1.41 or prior, wrong register was chosen for
NaN with sign bit being cleared.
To generate a diff of this commit:
cvs rdiff -u -r1.41 -r1.42 src/sys/arch/powerpc/fpu/fpu_emu.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/powerpc/fpu/fpu_emu.c
diff -u src/sys/arch/powerpc/fpu/fpu_emu.c:1.41 src/sys/arch/powerpc/fpu/fpu_emu.c:1.42
--- src/sys/arch/powerpc/fpu/fpu_emu.c:1.41 Tue Aug 30 10:55:06 2022
+++ src/sys/arch/powerpc/fpu/fpu_emu.c Tue Aug 30 10:59:43 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: fpu_emu.c,v 1.41 2022/08/30 10:55:06 rin Exp $ */
+/* $NetBSD: fpu_emu.c,v 1.42 2022/08/30 10:59:43 rin Exp $ */
/*
* Copyright 2001 Wasabi Systems, Inc.
@@ -76,7 +76,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: fpu_emu.c,v 1.41 2022/08/30 10:55:06 rin Exp $");
+__KERNEL_RCSID(0, "$NetBSD: fpu_emu.c,v 1.42 2022/08/30 10:59:43 rin Exp $");
#ifdef _KERNEL_OPT
#include "opt_ddb.h"
@@ -670,9 +670,13 @@ fpu_execute(struct trapframe *tf, struct
FPU_EMU_EVCNT_INCR(fsel);
DPRINTF(FPE_INSN, ("fpu_execute: FSEL\n"));
a = (int *)&fe->fe_fpstate->fpreg[ra];
-if ((*a & 0x8000) && (*a & 0x7fff))
- /* fra < 0 */
+if ((( a[0] & 0x8000) &&
+ ((a[0] & 0x7fff) | a[1])) ||
+(( a[0] & 0x7ff0) &&
+ ((a[0] & 0x000f) | a[1]))) {
+ /* negative/NaN or NaN */
rc = rb;
+}
DPRINTF(FPE_INSN, ("f%d => f%d\n", rc, rt));
memcpy(&fs->fpreg[rt], &fs->fpreg[rc],
sizeof(double));
CVS commit: src/sys/arch/powerpc/fpu
Module Name:src Committed By: rin Date: Tue Aug 30 10:55:06 UTC 2022 Modified Files: src/sys/arch/powerpc/fpu: fpu_emu.c Log Message: Fix mcrfs; Clear copied exception bits, and do not raise any exception. To generate a diff of this commit: cvs rdiff -u -r1.40 -r1.41 src/sys/arch/powerpc/fpu/fpu_emu.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/powerpc/fpu/fpu_emu.c diff -u src/sys/arch/powerpc/fpu/fpu_emu.c:1.40 src/sys/arch/powerpc/fpu/fpu_emu.c:1.41 --- src/sys/arch/powerpc/fpu/fpu_emu.c:1.40 Tue Aug 30 10:53:12 2022 +++ src/sys/arch/powerpc/fpu/fpu_emu.c Tue Aug 30 10:55:06 2022 @@ -1,4 +1,4 @@ -/* $NetBSD: fpu_emu.c,v 1.40 2022/08/30 10:53:12 rin Exp $ */ +/* $NetBSD: fpu_emu.c,v 1.41 2022/08/30 10:55:06 rin Exp $ */ /* * Copyright 2001 Wasabi Systems, Inc. @@ -76,7 +76,7 @@ */ #include -__KERNEL_RCSID(0, "$NetBSD: fpu_emu.c,v 1.40 2022/08/30 10:53:12 rin Exp $"); +__KERNEL_RCSID(0, "$NetBSD: fpu_emu.c,v 1.41 2022/08/30 10:55:06 rin Exp $"); #ifdef _KERNEL_OPT #include "opt_ddb.h" @@ -150,6 +150,14 @@ FPU_EMU_EVCNT_DECL(fnmadd); #define FPSR_INV (FPSCR_VXSNAN|FPSCR_VXISI|FPSCR_VXIDI| \ FPSCR_VXZDZ|FPSCR_VXIMZ|FPSCR_VXVC|FPSCR_VXSOFT|\ FPSCR_VXSQRT|FPSCR_VXCVI) +#define MCRFS_MASK \ +( \ + FPSCR_FX | FPSCR_OX | \ + FPSCR_UX | FPSCR_ZX | FPSCR_XX| FPSCR_VXSNAN | \ + FPSCR_VXISI | FPSCR_VXIDI | FPSCR_VXZDZ | FPSCR_VXIMZ | \ + FPSCR_VXVC | \ + FPSCR_VXSOFT | FPSCR_VXSQRT | FPSCR_VXCVI \ +) int fpe_debug = 0; @@ -532,14 +540,13 @@ fpu_execute(struct trapframe *tf, struct rt &= 0x1c; ra &= 0x1c; /* Extract the bits we want */ -mask = (fe->fe_fpscr >> (28 - ra)) & 0xf; +bits = (fe->fe_fpscr >> (28 - ra)) & 0xf; /* Clear the bits we copied. */ -fe->fe_cx = - (FPSR_EX_MSK | (0xf << (28 - ra))); -fe->fe_fpscr &= fe->fe_cx; +mask = (0xf << (28 - ra)) & MCRFS_MASK; +fe->fe_fpscr &= ~mask; /* Now shove them in the right part of cr */ tf->tf_cr &= ~(0xf << (28 - rt)); -tf->tf_cr |= (mask << (28 - rt)); +tf->tf_cr |= bits << (28 - rt); break; case OPC63_MTFSB0: FPU_EMU_EVCNT_INCR(mtfsb0);
CVS commit: src/sys/arch/powerpc/fpu
Module Name:src Committed By: rin Date: Tue Aug 30 10:55:06 UTC 2022 Modified Files: src/sys/arch/powerpc/fpu: fpu_emu.c Log Message: Fix mcrfs; Clear copied exception bits, and do not raise any exception. To generate a diff of this commit: cvs rdiff -u -r1.40 -r1.41 src/sys/arch/powerpc/fpu/fpu_emu.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/powerpc/fpu
Module Name:src
Committed By: rin
Date: Tue Aug 30 10:53:12 UTC 2022
Modified Files:
src/sys/arch/powerpc/fpu: fpu_emu.c
Log Message:
Misc clean up for mtfsf{,i}. NFC.
To generate a diff of this commit:
cvs rdiff -u -r1.39 -r1.40 src/sys/arch/powerpc/fpu/fpu_emu.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
CVS commit: src/sys/arch/powerpc/fpu
Module Name:src
Committed By: rin
Date: Tue Aug 30 10:53:12 UTC 2022
Modified Files:
src/sys/arch/powerpc/fpu: fpu_emu.c
Log Message:
Misc clean up for mtfsf{,i}. NFC.
To generate a diff of this commit:
cvs rdiff -u -r1.39 -r1.40 src/sys/arch/powerpc/fpu/fpu_emu.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/powerpc/fpu/fpu_emu.c
diff -u src/sys/arch/powerpc/fpu/fpu_emu.c:1.39 src/sys/arch/powerpc/fpu/fpu_emu.c:1.40
--- src/sys/arch/powerpc/fpu/fpu_emu.c:1.39 Tue Aug 30 10:50:56 2022
+++ src/sys/arch/powerpc/fpu/fpu_emu.c Tue Aug 30 10:53:12 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: fpu_emu.c,v 1.39 2022/08/30 10:50:56 rin Exp $ */
+/* $NetBSD: fpu_emu.c,v 1.40 2022/08/30 10:53:12 rin Exp $ */
/*
* Copyright 2001 Wasabi Systems, Inc.
@@ -76,7 +76,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: fpu_emu.c,v 1.39 2022/08/30 10:50:56 rin Exp $");
+__KERNEL_RCSID(0, "$NetBSD: fpu_emu.c,v 1.40 2022/08/30 10:53:12 rin Exp $");
#ifdef _KERNEL_OPT
#include "opt_ddb.h"
@@ -287,9 +287,9 @@ fpu_execute(struct trapframe *tf, struct
int *a;
vaddr_t addr;
int ra, rb, rc, rt, type, mask, fsr, cx, bf, setcr;
- unsigned int cond;
+ unsigned int bits, cond;
struct fpreg *fs;
- int mtfsf = 0, mtfsb1 = 0;
+ int i, mtfsb1 = 0;
/* Setup work. */
fp = NULL;
@@ -554,16 +554,13 @@ fpu_execute(struct trapframe *tf, struct
sizeof(double));
break;
case OPC63_MTFSFI:
-mtfsf = 1;
FPU_EMU_EVCNT_INCR(mtfsfi);
DPRINTF(FPE_INSN, ("fpu_execute: MTFSFI\n"));
rb >>= 1;
rt &= 0x1c; /* Already left-shifted 4 */
-fe->fe_cx = rb << (28 - rt);
-mask = 0xf<<(28 - rt);
-fe->fe_fpscr = (fe->fe_fpscr & ~mask) |
- fe->fe_cx;
-/* XXX weird stuff about OX, FX, FEX, and VX should be handled */
+bits = rb << (28 - rt);
+mask = 0xf << (28 - rt);
+fe->fe_fpscr = (fe->fe_fpscr & ~mask) | bits;
break;
case OPC63_FNABS:
FPU_EMU_EVCNT_INCR(fnabs);
@@ -588,32 +585,21 @@ fpu_execute(struct trapframe *tf, struct
sizeof(fs->fpscr));
break;
case OPC63_MTFSF:
-mtfsf = 1;
FPU_EMU_EVCNT_INCR(mtfsf);
DPRINTF(FPE_INSN, ("fpu_execute: MTFSF\n"));
-if ((rt = instr.i_xfl.i_flm) == -1)
+if ((rt = instr.i_xfl.i_flm) == -1) {
mask = -1;
-else {
+} else {
mask = 0;
/* Convert 1 bit -> 4 bits */
- for (ra = 0; ra < 8; ra ++)
- if (rt & (1fe_cx = mask & a[1];
-fe->fe_fpscr = (fe->fe_fpscr&~mask) |
- (fe->fe_cx);
-/*
- * XXX
- * Forbidden to set FEX and VX, also for
- * mcrfs, mtfsfi, and mtfsb[01].
- *
- * XXX
- * Handle invalid operation differently,
- * depending on VE.
- */
-/* XXX weird stuff about OX, FX, FEX, and VX should be handled */
+bits = a[1] & mask;
+fe->fe_fpscr = (fe->fe_fpscr & ~mask) | bits;
break;
case OPC63_FCTID:
case OPC63_FCTIDZ:
@@ -796,7 +782,7 @@ fpu_execute(struct trapframe *tf, struct
mask = (fsr & FPSR_EX) << (25 - 3);
if (fsr & mask)
fsr |= FPSCR_FEX;
- if (mtfsf == 0 && ((fsr ^ fe->fe_fpscr) & FPSR_EX_MSK))
+ if ((fsr ^ fe->fe_fpscr) & FPSR_EX_MSK)
fsr |= FPSCR_FX;
if (cond) {
