CVS commit: src/sys/arch/x86/x86
Module Name:src
Committed By: gutteridge
Date: Mon Jul 15 01:57:23 UTC 2024
Modified Files:
src/sys/arch/x86/x86: coretemp.c
Log Message:
coretemp.c: drop redundant condition (NFCI)
Checking for a processor model upper limit has no point inside a block
that is already limited further. Noted from code inspection by Sotiris
Lamprinidis in PR kern/58372.
While here, also update to a cached version of an URL for processor
references, as both original URLs have now been removed by Intel.
To generate a diff of this commit:
cvs rdiff -u -r1.41 -r1.42 src/sys/arch/x86/x86/coretemp.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/x86/x86/coretemp.c
diff -u src/sys/arch/x86/x86/coretemp.c:1.41 src/sys/arch/x86/x86/coretemp.c:1.42
--- src/sys/arch/x86/x86/coretemp.c:1.41 Tue Mar 12 02:26:16 2024
+++ src/sys/arch/x86/x86/coretemp.c Mon Jul 15 01:57:23 2024
@@ -1,4 +1,4 @@
-/* $NetBSD: coretemp.c,v 1.41 2024/03/12 02:26:16 gutteridge Exp $ */
+/* $NetBSD: coretemp.c,v 1.42 2024/07/15 01:57:23 gutteridge Exp $ */
/*-
* Copyright (c) 2011 The NetBSD Foundation, Inc.
@@ -61,7 +61,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: coretemp.c,v 1.41 2024/03/12 02:26:16 gutteridge Exp $");
+__KERNEL_RCSID(0, "$NetBSD: coretemp.c,v 1.42 2024/07/15 01:57:23 gutteridge Exp $");
#include
#include
@@ -279,14 +279,14 @@ coretemp_tjmax(device_t self)
* Check MSR_IA32_PLATFORM_ID(0x17) bit 28. It's not documented
* in the datasheet, but the following page describes the
* detail:
- * http://software.intel.com/en-us/articles/
- * mobile-intel-core2-processor-detection-table/
+ * https://web.archive.org/web/20110608131711/http://software.intel.com/
+ * en-us/articles/mobile-intel-core2-processor-detection-table/
* Was: http://softwarecommunity.intel.com/Wiki/Mobility/
* 720.htm
*/
if (rdmsr_safe(MSR_IA32_PLATFORM_ID, ) != 0)
goto notee;
- if ((model < 0x17) && ((msr & __BIT(28)) == 0))
+ if ((msr & __BIT(28)) == 0)
goto notee;
if (rdmsr_safe(MSR_IA32_EXT_CONFIG, ) == EFAULT) {
CVS commit: src/sys/arch/x86/x86
Module Name:src Committed By: gutteridge Date: Mon Jul 15 01:57:23 UTC 2024 Modified Files: src/sys/arch/x86/x86: coretemp.c Log Message: coretemp.c: drop redundant condition (NFCI) Checking for a processor model upper limit has no point inside a block that is already limited further. Noted from code inspection by Sotiris Lamprinidis in PR kern/58372. While here, also update to a cached version of an URL for processor references, as both original URLs have now been removed by Intel. To generate a diff of this commit: cvs rdiff -u -r1.41 -r1.42 src/sys/arch/x86/x86/coretemp.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/x86
Module Name:src Committed By: andvar Date: Mon Jul 1 19:40:03 UTC 2024 Modified Files: src/sys/arch/x86/include: specialreg.h src/sys/arch/x86/x86: identcpu.c Log Message: Disable the VIA Alternate Instructions according the VIA documentation: * C7 and above do not support ALTINST, do not check or attempt to disable them. * For VIA C3 Nehemiah check extended feature flags for support and status, do no attempt to disable when AIS is not supported or enabled. * For pre-Nehemiah models explicitly disable, if they are in the range of documented models, flags aren't present to check the status on these models. Note: for pre-Nehemiah may be other functional side effects depdending on the version and stepping. Explicit disabling of ALTINST was introduced with rev. 1.84 following the discovery of some VIA CPUs having these instructions enabled by default leading to the potential backdoor (aka rosenbrindge). Unfortunately, implementation used a wrong check (ACE supported flag), which can be true for the later models, still supporting padlock features. Setting ALTINST bit on those may have unexpected side effects like VIA C7 CPUID instruction for temperature sensor not reporting correct value or `cpuctl identify' not reporting certain CPU features. Similar side effects can be observed even for Nehemiah models not supporting AIS instructions. This change should limit possibility of such issues to only the pre-Nehemiah models, not covered at all in the previous implementation. Feature Control Register (FCR) macros were unified under one group and consistent naming while implementing the change. Few comments updated as well. patch reviewed by Riastradh@ (thank you) need pullups to netbsd-9, 10. PR kern/58370 To generate a diff of this commit: cvs rdiff -u -r1.211 -r1.212 src/sys/arch/x86/include/specialreg.h cvs rdiff -u -r1.129 -r1.130 src/sys/arch/x86/x86/identcpu.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/x86/include/specialreg.h diff -u src/sys/arch/x86/include/specialreg.h:1.211 src/sys/arch/x86/include/specialreg.h:1.212 --- src/sys/arch/x86/include/specialreg.h:1.211 Sun May 12 23:41:10 2024 +++ src/sys/arch/x86/include/specialreg.h Mon Jul 1 19:40:03 2024 @@ -1,4 +1,4 @@ -/* $NetBSD: specialreg.h,v 1.211 2024/05/12 23:41:10 msaitoh Exp $ */ +/* $NetBSD: specialreg.h,v 1.212 2024/07/01 19:40:03 andvar Exp $ */ /* * Copyright (c) 2014-2020 The NetBSD Foundation, Inc. @@ -1099,8 +1099,12 @@ /* * Centaur Extended Feature flags. - * CPUID FnC000_0001 + * CPUID FnC000_0001 (VIA "Nehemiah" or later) */ +#define CPUID_VIA_HAS_AIS __BIT(0) /* Alternate Instruction Set supported */ + /* (VIA "Nehemiah" only) */ +#define CPUID_VIA_DO_AIS __BIT(1) /* Alternate Instruction Set enabled */ + /* (VIA "Nehemiah" only) */ #define CPUID_VIA_HAS_RNG __BIT(2) /* Random number generator */ #define CPUID_VIA_DO_RNG __BIT(3) #define CPUID_VIA_HAS_ACE __BIT(6) /* AES Encryption */ @@ -1288,7 +1292,7 @@ #define MSR_X2APIC_SELF_IPI 0x03f /* SELF IPI (W) */ /* - * VIA "Nehemiah" MSRs + * VIA "Nehemiah" or later MSRs */ #define MSR_VIA_RNG 0x110b #define MSR_VIA_RNG_ENABLE 0x0040 @@ -1296,15 +1300,10 @@ #define MSR_VIA_RNG_NOISE_A 0x #define MSR_VIA_RNG_NOISE_B 0x0100 #define MSR_VIA_RNG_2NOISE 0x0300 -#define MSR_VIA_ACE 0x1107 -#define VIA_ACE_ALTINST 0x0001 -#define VIA_ACE_ECX8 0x0002 -#define VIA_ACE_ENABLE 0x1000 - -/* - * VIA "Eden" MSRs - */ -#define MSR_VIA_FCR MSR_VIA_ACE +#define MSR_VIA_FCR 0x1107 /* Feature Control Register */ +#define VIA_FCR_ACE_ENABLE 0x1000 /* Enable PadLock (ex. RNG) */ +#define VIA_FCR_CX8_REPORT 0x0002 /* Enable CX8 CPUID reporting */ +#define VIA_FCR_ALTINST_ENABLE 0x0001 /* Enable ALTINST (C3 only) */ /* * AMD K6/K7 MSRs. Index: src/sys/arch/x86/x86/identcpu.c diff -u src/sys/arch/x86/x86/identcpu.c:1.129 src/sys/arch/x86/x86/identcpu.c:1.130 --- src/sys/arch/x86/x86/identcpu.c:1.129 Sun Jun 30 15:49:56 2024 +++ src/sys/arch/x86/x86/identcpu.c Mon Jul 1 19:40:03 2024 @@ -1,4 +1,4 @@ -/* $NetBSD: identcpu.c,v 1.129 2024/06/30 15:49:56 andvar Exp $ */ +/* $NetBSD: identcpu.c,v 1.130 2024/07/01 19:40:03 andvar Exp $ */ /*- * Copyright (c) 1999, 2000, 2001, 2006, 2007, 2008 The NetBSD Foundation, Inc. @@ -30,7 +30,7 @@ */ #include -__KERNEL_RCSID(0, "$NetBSD: identcpu.c,v 1.129 2024/06/30 15:49:56 andvar Exp $"); +__KERNEL_RCSID(0, "$NetBSD: identcpu.c,v 1.130 2024/07/01 19:40:03 andvar Exp $"); #include "opt_xen.h" @@ -495,11 +495,45 @@ cpu_probe_c3(struct cpu_info *ci) *bit in the FCR MSR. */ ci->ci_feat_val[0] |= CPUID_CX8; - wrmsr(MSR_VIA_FCR, rdmsr(MSR_VIA_FCR) | VIA_ACE_ECX8); + wrmsr(MSR_VIA_FCR, rdmsr(MSR_VIA_FCR) | VIA_FCR_CX8_REPORT); + + /* + * For reference on VIA Alternate Instructions, see the
CVS commit: src/sys/arch/x86
Module Name:src Committed By: andvar Date: Mon Jul 1 19:40:03 UTC 2024 Modified Files: src/sys/arch/x86/include: specialreg.h src/sys/arch/x86/x86: identcpu.c Log Message: Disable the VIA Alternate Instructions according the VIA documentation: * C7 and above do not support ALTINST, do not check or attempt to disable them. * For VIA C3 Nehemiah check extended feature flags for support and status, do no attempt to disable when AIS is not supported or enabled. * For pre-Nehemiah models explicitly disable, if they are in the range of documented models, flags aren't present to check the status on these models. Note: for pre-Nehemiah may be other functional side effects depdending on the version and stepping. Explicit disabling of ALTINST was introduced with rev. 1.84 following the discovery of some VIA CPUs having these instructions enabled by default leading to the potential backdoor (aka rosenbrindge). Unfortunately, implementation used a wrong check (ACE supported flag), which can be true for the later models, still supporting padlock features. Setting ALTINST bit on those may have unexpected side effects like VIA C7 CPUID instruction for temperature sensor not reporting correct value or `cpuctl identify' not reporting certain CPU features. Similar side effects can be observed even for Nehemiah models not supporting AIS instructions. This change should limit possibility of such issues to only the pre-Nehemiah models, not covered at all in the previous implementation. Feature Control Register (FCR) macros were unified under one group and consistent naming while implementing the change. Few comments updated as well. patch reviewed by Riastradh@ (thank you) need pullups to netbsd-9, 10. PR kern/58370 To generate a diff of this commit: cvs rdiff -u -r1.211 -r1.212 src/sys/arch/x86/include/specialreg.h cvs rdiff -u -r1.129 -r1.130 src/sys/arch/x86/x86/identcpu.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/x86/x86
Module Name:src
Committed By: andvar
Date: Sun Jun 30 15:49:56 UTC 2024
Modified Files:
src/sys/arch/x86/x86: identcpu.c
Log Message:
Move determination of the largest VIA CPU extended function value
to the intended place where the checks are performed.
Currently the value can be overridden while checking for the padlock features,
and failing the check for max function value as a result.
To generate a diff of this commit:
cvs rdiff -u -r1.128 -r1.129 src/sys/arch/x86/x86/identcpu.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/x86/x86/identcpu.c
diff -u src/sys/arch/x86/x86/identcpu.c:1.128 src/sys/arch/x86/x86/identcpu.c:1.129
--- src/sys/arch/x86/x86/identcpu.c:1.128 Tue Oct 17 14:17:42 2023
+++ src/sys/arch/x86/x86/identcpu.c Sun Jun 30 15:49:56 2024
@@ -1,4 +1,4 @@
-/* $NetBSD: identcpu.c,v 1.128 2023/10/17 14:17:42 riastradh Exp $ */
+/* $NetBSD: identcpu.c,v 1.129 2024/06/30 15:49:56 andvar Exp $ */
/*-
* Copyright (c) 1999, 2000, 2001, 2006, 2007, 2008 The NetBSD Foundation, Inc.
@@ -30,7 +30,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: identcpu.c,v 1.128 2023/10/17 14:17:42 riastradh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: identcpu.c,v 1.129 2024/06/30 15:49:56 andvar Exp $");
#include "opt_xen.h"
@@ -481,10 +481,6 @@ cpu_probe_c3(struct cpu_info *ci)
model = CPUID_TO_MODEL(ci->ci_signature);
stepping = CPUID_TO_STEPPING(ci->ci_signature);
- /* Determine the largest extended function value. */
- x86_cpuid(0x8000, descs);
- lfunc = descs[0];
-
if (family == 6) {
/*
* VIA Eden ESP.
@@ -583,6 +579,10 @@ cpu_probe_c3(struct cpu_info *ci)
wrmsr(MSR_VIA_ACE, msr & ~VIA_ACE_ALTINST);
}
+ /* Determine the largest extended function value. */
+ x86_cpuid(0x8000, descs);
+ lfunc = descs[0];
+
/*
* Determine L1 cache/TLB info.
*/
CVS commit: src/sys/arch/x86/x86
Module Name:src Committed By: andvar Date: Sun Jun 30 15:49:56 UTC 2024 Modified Files: src/sys/arch/x86/x86: identcpu.c Log Message: Move determination of the largest VIA CPU extended function value to the intended place where the checks are performed. Currently the value can be overridden while checking for the padlock features, and failing the check for max function value as a result. To generate a diff of this commit: cvs rdiff -u -r1.128 -r1.129 src/sys/arch/x86/x86/identcpu.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/x86/x86
Module Name:src
Committed By: riastradh
Date: Fri Jun 21 17:24:08 UTC 2024
Modified Files:
src/sys/arch/x86/x86: fpu.c
Log Message:
x86/fpu.c: Nix trailing whitespace.
No functional change intended.
To generate a diff of this commit:
cvs rdiff -u -r1.88 -r1.89 src/sys/arch/x86/x86/fpu.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/x86/x86/fpu.c
diff -u src/sys/arch/x86/x86/fpu.c:1.88 src/sys/arch/x86/x86/fpu.c:1.89
--- src/sys/arch/x86/x86/fpu.c:1.88 Fri May 17 00:37:14 2024
+++ src/sys/arch/x86/x86/fpu.c Fri Jun 21 17:24:08 2024
@@ -1,4 +1,4 @@
-/* $NetBSD: fpu.c,v 1.88 2024/05/17 00:37:14 manu Exp $ */
+/* $NetBSD: fpu.c,v 1.89 2024/06/21 17:24:08 riastradh Exp $ */
/*
* Copyright (c) 2008, 2019 The NetBSD Foundation, Inc. All
@@ -96,7 +96,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: fpu.c,v 1.88 2024/05/17 00:37:14 manu Exp $");
+__KERNEL_RCSID(0, "$NetBSD: fpu.c,v 1.89 2024/06/21 17:24:08 riastradh Exp $");
#include "opt_ddb.h"
#include "opt_multiprocessor.h"
@@ -624,7 +624,7 @@ fpudna(struct trapframe *frame)
if (USERMODE(frame->tf_cs)) {
clts();
return;
- }
+ }
#endif
panic("fpudna from %s, ip %p, trapframe %p",
USERMODE(frame->tf_cs) ? "userland" : "kernel",
CVS commit: src/sys/arch/x86/x86
Module Name:src Committed By: riastradh Date: Fri Jun 21 17:24:08 UTC 2024 Modified Files: src/sys/arch/x86/x86: fpu.c Log Message: x86/fpu.c: Nix trailing whitespace. No functional change intended. To generate a diff of this commit: cvs rdiff -u -r1.88 -r1.89 src/sys/arch/x86/x86/fpu.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/x86/x86
Module Name:src Committed By: riastradh Date: Sun Jun 9 20:07:33 UTC 2024 Modified Files: src/sys/arch/x86/x86: cpu_rng.c Log Message: x86/cpu_rng: Fix false alarm rate of CPU RNG health test. Lower it from 1/2^32 (about one in four billion) to 1/2^256 (approximately not gonna happen squared). PR port-amd64/58122 To generate a diff of this commit: cvs rdiff -u -r1.20 -r1.21 src/sys/arch/x86/x86/cpu_rng.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/x86/x86
Module Name:src
Committed By: riastradh
Date: Sun Jun 9 20:07:33 UTC 2024
Modified Files:
src/sys/arch/x86/x86: cpu_rng.c
Log Message:
x86/cpu_rng: Fix false alarm rate of CPU RNG health test.
Lower it from 1/2^32 (about one in four billion) to 1/2^256
(approximately not gonna happen squared).
PR port-amd64/58122
To generate a diff of this commit:
cvs rdiff -u -r1.20 -r1.21 src/sys/arch/x86/x86/cpu_rng.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/x86/x86/cpu_rng.c
diff -u src/sys/arch/x86/x86/cpu_rng.c:1.20 src/sys/arch/x86/x86/cpu_rng.c:1.21
--- src/sys/arch/x86/x86/cpu_rng.c:1.20 Thu Oct 7 12:52:27 2021
+++ src/sys/arch/x86/x86/cpu_rng.c Sun Jun 9 20:07:33 2024
@@ -1,4 +1,4 @@
-/* $NetBSD: cpu_rng.c,v 1.20 2021/10/07 12:52:27 msaitoh Exp $ */
+/* $NetBSD: cpu_rng.c,v 1.21 2024/06/09 20:07:33 riastradh Exp $ */
/*-
* Copyright (c) 2015 The NetBSD Foundation, Inc.
@@ -260,8 +260,12 @@ cpu_rng(enum cpu_rng_mode mode, uint64_t
static void
cpu_rng_get(size_t nbytes, void *cookie)
{
-#define N howmany(256, 64)
- uint64_t buf[2*N];
+ enum {
+ NBITS = 256,
+ NBYTES = howmany(NBITS, 8),
+ NWORDS = howmany(NBITS, 64),
+ };
+ uint64_t buf[2*NWORDS];
unsigned i, nbits = 0;
while (nbytes) {
@@ -273,7 +277,7 @@ cpu_rng_get(size_t nbytes, void *cookie)
*/
for (i = 0; i < __arraycount(buf); i++)
nbits += cpu_rng(cpu_rng_mode, [i]);
- if (consttime_memequal(buf, buf + N, N)) {
+ if (consttime_memequal(buf, buf + NWORDS, NBYTES)) {
printf("cpu_rng %s: failed repetition test\n",
cpu_rng_name[cpu_rng_mode]);
nbits = 0;
@@ -281,7 +285,6 @@ cpu_rng_get(size_t nbytes, void *cookie)
rnd_add_data_sync(_rng_source, buf, sizeof buf, nbits);
nbytes -= MIN(MIN(nbytes, sizeof buf), MAX(1, 8*nbits));
}
-#undef N
}
void
CVS commit: src/sys/arch/x86/x86
Module Name:src Committed By: riastradh Date: Tue Jun 4 21:42:58 UTC 2024 Modified Files: src/sys/arch/x86/x86: bus_dma.c Log Message: x86: Teach bus_dmamem_map about BUS_DMA_PREFETCHABLE. PR port-amd64/58308 To generate a diff of this commit: cvs rdiff -u -r1.90 -r1.91 src/sys/arch/x86/x86/bus_dma.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/x86/x86/bus_dma.c diff -u src/sys/arch/x86/x86/bus_dma.c:1.90 src/sys/arch/x86/x86/bus_dma.c:1.91 --- src/sys/arch/x86/x86/bus_dma.c:1.90 Tue Mar 28 19:55:42 2023 +++ src/sys/arch/x86/x86/bus_dma.c Tue Jun 4 21:42:58 2024 @@ -1,4 +1,4 @@ -/* $NetBSD: bus_dma.c,v 1.90 2023/03/28 19:55:42 riastradh Exp $ */ +/* $NetBSD: bus_dma.c,v 1.91 2024/06/04 21:42:58 riastradh Exp $ */ /*- * Copyright (c) 1996, 1997, 1998, 2007, 2020 The NetBSD Foundation, Inc. @@ -31,7 +31,7 @@ */ #include -__KERNEL_RCSID(0, "$NetBSD: bus_dma.c,v 1.90 2023/03/28 19:55:42 riastradh Exp $"); +__KERNEL_RCSID(0, "$NetBSD: bus_dma.c,v 1.91 2024/06/04 21:42:58 riastradh Exp $"); /* * The following is included because _bus_dma_uiomove is derived from @@ -1164,7 +1164,7 @@ _bus_dmamem_free(bus_dma_tag_t t, bus_dm /* * Common function for mapping DMA-safe memory. May be called by * bus-specific DMA memory map functions. - * This supports BUS_DMA_NOCACHE. + * This supports BUS_DMA_NOCACHE and BUS_DMA_PREFETCHABLE. */ static int _bus_dmamem_map(bus_dma_tag_t t, bus_dma_segment_t *segs, int nsegs, @@ -1178,8 +1178,13 @@ _bus_dmamem_map(bus_dma_tag_t t, bus_dma u_int pmapflags = PMAP_WIRED | VM_PROT_READ | VM_PROT_WRITE; size = round_page(size); + KASSERTMSG(((flags & (BUS_DMA_NOCACHE|BUS_DMA_PREFETCHABLE)) != + (BUS_DMA_NOCACHE|BUS_DMA_PREFETCHABLE)), + "BUS_DMA_NOCACHE and BUS_DMA_PREFETCHABLE are mutually exclusive"); if (flags & BUS_DMA_NOCACHE) pmapflags |= PMAP_NOCACHE; + if (flags & BUS_DMA_PREFETCHABLE) + pmapflags |= PMAP_WRITE_COMBINE; va = uvm_km_alloc(kernel_map, size, 0, UVM_KMF_VAONLY | kmflags);
CVS commit: src/sys/arch/x86/x86
Module Name:src Committed By: riastradh Date: Tue Jun 4 21:42:58 UTC 2024 Modified Files: src/sys/arch/x86/x86: bus_dma.c Log Message: x86: Teach bus_dmamem_map about BUS_DMA_PREFETCHABLE. PR port-amd64/58308 To generate a diff of this commit: cvs rdiff -u -r1.90 -r1.91 src/sys/arch/x86/x86/bus_dma.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/x86/x86
Module Name:src
Committed By: manu
Date: Fri May 17 00:37:14 UTC 2024
Modified Files:
src/sys/arch/x86/x86: fpu.c
Log Message:
iWorkaround panic: fpudna from userland
i386 Xen PV domU get spurious fpudna traps from userland. Older eager FPU
contact switching code took care of ignoring them. When transitioning
from eager switching to awlays switching, this special handling was
removed, causing "fpudna from userland" panics.
This change restores the previosu behavior where fpudna traps from
userland are ignored on Xen PV domU.
To generate a diff of this commit:
cvs rdiff -u -r1.87 -r1.88 src/sys/arch/x86/x86/fpu.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/x86/x86/fpu.c
diff -u src/sys/arch/x86/x86/fpu.c:1.87 src/sys/arch/x86/x86/fpu.c:1.88
--- src/sys/arch/x86/x86/fpu.c:1.87 Tue Jul 18 12:34:25 2023
+++ src/sys/arch/x86/x86/fpu.c Fri May 17 00:37:14 2024
@@ -1,4 +1,4 @@
-/* $NetBSD: fpu.c,v 1.87 2023/07/18 12:34:25 riastradh Exp $ */
+/* $NetBSD: fpu.c,v 1.88 2024/05/17 00:37:14 manu Exp $ */
/*
* Copyright (c) 2008, 2019 The NetBSD Foundation, Inc. All
@@ -96,7 +96,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: fpu.c,v 1.87 2023/07/18 12:34:25 riastradh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: fpu.c,v 1.88 2024/05/17 00:37:14 manu Exp $");
#include "opt_ddb.h"
#include "opt_multiprocessor.h"
@@ -617,6 +617,15 @@ fputrap(struct trapframe *frame)
void
fpudna(struct trapframe *frame)
{
+#ifdef XENPV
+ /*
+ * Xen produes spurious fpudna traps, just do nothing.
+ */
+ if (USERMODE(frame->tf_cs)) {
+ clts();
+ return;
+ }
+#endif
panic("fpudna from %s, ip %p, trapframe %p",
USERMODE(frame->tf_cs) ? "userland" : "kernel",
(void *)X86_TF_RIP(frame), frame);
CVS commit: src/sys/arch/x86/x86
Module Name:src Committed By: manu Date: Fri May 17 00:37:14 UTC 2024 Modified Files: src/sys/arch/x86/x86: fpu.c Log Message: iWorkaround panic: fpudna from userland i386 Xen PV domU get spurious fpudna traps from userland. Older eager FPU contact switching code took care of ignoring them. When transitioning from eager switching to awlays switching, this special handling was removed, causing "fpudna from userland" panics. This change restores the previosu behavior where fpudna traps from userland are ignored on Xen PV domU. To generate a diff of this commit: cvs rdiff -u -r1.87 -r1.88 src/sys/arch/x86/x86/fpu.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/x86/include
Module Name:src Committed By: msaitoh Date: Sun May 12 23:41:10 UTC 2024 Modified Files: src/sys/arch/x86/include: specialreg.h Log Message: s/RPMQUERY/RMPQUERY/ To generate a diff of this commit: cvs rdiff -u -r1.210 -r1.211 src/sys/arch/x86/include/specialreg.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/x86/include/specialreg.h diff -u src/sys/arch/x86/include/specialreg.h:1.210 src/sys/arch/x86/include/specialreg.h:1.211 --- src/sys/arch/x86/include/specialreg.h:1.210 Fri Mar 8 20:29:17 2024 +++ src/sys/arch/x86/include/specialreg.h Sun May 12 23:41:10 2024 @@ -1,4 +1,4 @@ -/* $NetBSD: specialreg.h,v 1.210 2024/03/08 20:29:17 rillig Exp $ */ +/* $NetBSD: specialreg.h,v 1.211 2024/05/12 23:41:10 msaitoh Exp $ */ /* * Copyright (c) 2014-2020 The NetBSD Foundation, Inc. @@ -1021,7 +1021,7 @@ #define CPUID_AMD_ENCMEM_SEVES __BIT(3) /* SEV Encrypted State */ #define CPUID_AMD_ENCMEM_SEV_SNP __BIT(4) /* Secure Nested Paging */ #define CPUID_AMD_ENCMEM_VMPL __BIT(5) /* Virtual Machine Privilege Lvl */ -#define CPUID_AMD_ENCMEM_RPMQUERY __BIT(6) /* RMPQUERY instruction */ +#define CPUID_AMD_ENCMEM_RMPQUERY __BIT(6) /* RMPQUERY instruction */ #define CPUID_AMD_ENCMEM_VMPLSSS __BIT(7) /* VMPL Secure Shadow Stack */ #define CPUID_AMD_ENCMEM_SECTSC __BIT(8) /* Secure TSC */ #define CPUID_AMD_ENCMEM_TSCAUX_V __BIT(9) /* TSC AUX Virtualization */
CVS commit: src/sys/arch/x86/include
Module Name:src Committed By: msaitoh Date: Sun May 12 23:41:10 UTC 2024 Modified Files: src/sys/arch/x86/include: specialreg.h Log Message: s/RPMQUERY/RMPQUERY/ To generate a diff of this commit: cvs rdiff -u -r1.210 -r1.211 src/sys/arch/x86/include/specialreg.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/x86/pci
Module Name:src
Committed By: andvar
Date: Mon Apr 29 21:29:48 UTC 2024
Modified Files:
src/sys/arch/x86/pci: dwiic_pci.c
Log Message:
Make dwiic_pci compile without ACPI option.
To generate a diff of this commit:
cvs rdiff -u -r1.9 -r1.10 src/sys/arch/x86/pci/dwiic_pci.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/x86/pci/dwiic_pci.c
diff -u src/sys/arch/x86/pci/dwiic_pci.c:1.9 src/sys/arch/x86/pci/dwiic_pci.c:1.10
--- src/sys/arch/x86/pci/dwiic_pci.c:1.9 Wed Oct 19 22:28:35 2022
+++ src/sys/arch/x86/pci/dwiic_pci.c Mon Apr 29 21:29:48 2024
@@ -1,4 +1,4 @@
-/* $NetBSD: dwiic_pci.c,v 1.9 2022/10/19 22:28:35 riastradh Exp $ */
+/* $NetBSD: dwiic_pci.c,v 1.10 2024/04/29 21:29:48 andvar Exp $ */
/*-
* Copyright (c) 2017 The NetBSD Foundation, Inc.
@@ -33,7 +33,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: dwiic_pci.c,v 1.9 2022/10/19 22:28:35 riastradh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: dwiic_pci.c,v 1.10 2024/04/29 21:29:48 andvar Exp $");
#include
#include
@@ -58,6 +58,10 @@ __KERNEL_RCSID(0, "$NetBSD: dwiic_pci.c,
#define DPRINTF(x)
#endif
+#if NACPICA > 0
+#define I2C_USE_ACPI
+#endif /* NACPICA > 0 */
+
struct pci_dwiic_softc {
struct dwiic_softc sc_dwiic;
pci_chipset_tag_t sc_pc;
@@ -267,12 +271,18 @@ pci_dwiic_attach(device_t parent, device
lpss_write(sc, LPSS_REMAP_HI,
pci_conf_read(sc->sc_pc, sc->sc_ptag, PCI_BAR0 + 0x4));
+#ifdef I2C_USE_ACPI
sc->sc_acpinode = acpi_pcidev_find(0 /*XXX segment*/,
pa->pa_bus, pa->pa_device, pa->pa_function);
+#else
+ sc->sc_acpinode = NULL;
+#endif
if (sc->sc_acpinode) {
+#ifdef I2C_USE_ACPI
sc->sc_dwiic.sc_iba.iba_child_devices =
acpi_enter_i2c_devs(NULL, sc->sc_acpinode);
+#endif
} else {
aprint_verbose_dev(self, "no matching ACPI node\n");
}
CVS commit: src/sys/arch/x86/pci
Module Name:src Committed By: andvar Date: Mon Apr 29 21:29:48 UTC 2024 Modified Files: src/sys/arch/x86/pci: dwiic_pci.c Log Message: Make dwiic_pci compile without ACPI option. To generate a diff of this commit: cvs rdiff -u -r1.9 -r1.10 src/sys/arch/x86/pci/dwiic_pci.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/x86/x86
Module Name:src Committed By: andvar Date: Mon Apr 22 23:07:47 UTC 2024 Modified Files: src/sys/arch/x86/x86: cpu.c Log Message: Surround full mp_cpu_start() method with NLAPIC > 0 guard. Initialization is based on x86_ipi* functions, which are implemented only when lapic flag is enabled. To generate a diff of this commit: cvs rdiff -u -r1.209 -r1.210 src/sys/arch/x86/x86/cpu.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/x86/x86
Module Name:src
Committed By: andvar
Date: Mon Apr 22 23:07:47 UTC 2024
Modified Files:
src/sys/arch/x86/x86: cpu.c
Log Message:
Surround full mp_cpu_start() method with NLAPIC > 0 guard.
Initialization is based on x86_ipi* functions, which are implemented only
when lapic flag is enabled.
To generate a diff of this commit:
cvs rdiff -u -r1.209 -r1.210 src/sys/arch/x86/x86/cpu.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/x86/x86/cpu.c
diff -u src/sys/arch/x86/x86/cpu.c:1.209 src/sys/arch/x86/x86/cpu.c:1.210
--- src/sys/arch/x86/x86/cpu.c:1.209 Sun Jul 16 19:55:43 2023
+++ src/sys/arch/x86/x86/cpu.c Mon Apr 22 23:07:47 2024
@@ -1,4 +1,4 @@
-/* $NetBSD: cpu.c,v 1.209 2023/07/16 19:55:43 riastradh Exp $ */
+/* $NetBSD: cpu.c,v 1.210 2024/04/22 23:07:47 andvar Exp $ */
/*
* Copyright (c) 2000-2020 NetBSD Foundation, Inc.
@@ -62,7 +62,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: cpu.c,v 1.209 2023/07/16 19:55:43 riastradh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: cpu.c,v 1.210 2024/04/22 23:07:47 andvar Exp $");
#include "opt_ddb.h"
#include "opt_mpbios.h" /* for MPDEBUG */
@@ -1134,6 +1134,7 @@ cpu_copy_trampoline(paddr_t pdir_pa)
int
mp_cpu_start(struct cpu_info *ci, paddr_t target)
{
+#if NLAPIC > 0
int error;
/*
@@ -1149,7 +1150,6 @@ mp_cpu_start(struct cpu_info *ci, paddr_
outb(IO_RTC, NVRAM_RESET);
outb(IO_RTC+1, NVRAM_RESET_JUMP);
-#if NLAPIC > 0
/*
* "and the warm reset vector (DWORD based at 40:67) to point
* to the AP startup code ..."
@@ -1159,7 +1159,6 @@ mp_cpu_start(struct cpu_info *ci, paddr_
dwordptr[1] = target >> 4;
memcpy((uint8_t *)cmos_data_mapping + 0x467, dwordptr, 4);
-#endif
if ((cpu_feature[0] & CPUID_APIC) == 0) {
aprint_error("mp_cpu_start: CPU does not have APIC\n");
@@ -1200,6 +1199,9 @@ mp_cpu_start(struct cpu_info *ci, paddr_
}
return 0;
+#else
+ return ENODEV;
+#endif /* NLAPIC > 0 */
}
void
CVS commit: src/sys/arch/x86/x86
Module Name:src
Committed By: andvar
Date: Mon Apr 22 22:29:29 UTC 2024
Modified Files:
src/sys/arch/x86/x86: intr.c
Log Message:
Add opt_pci.h include to fix NO_PCI_MSI_MSIX build.
(Path from Paolo Pisati in current_users@)
While here:
Simplify mp_cpu_start() ifdefs. MULTIPROCESSOR and HYPERV code falls under
NLAPIC > 0, thus just combine all blocks under this guard.
Rearrange opt_acpi.h include alphabetically.
To generate a diff of this commit:
cvs rdiff -u -r1.167 -r1.168 src/sys/arch/x86/x86/intr.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/x86/x86/intr.c
diff -u src/sys/arch/x86/x86/intr.c:1.167 src/sys/arch/x86/x86/intr.c:1.168
--- src/sys/arch/x86/x86/intr.c:1.167 Tue Mar 5 20:58:05 2024
+++ src/sys/arch/x86/x86/intr.c Mon Apr 22 22:29:28 2024
@@ -1,4 +1,4 @@
-/* $NetBSD: intr.c,v 1.167 2024/03/05 20:58:05 andvar Exp $ */
+/* $NetBSD: intr.c,v 1.168 2024/04/22 22:29:28 andvar Exp $ */
/*
* Copyright (c) 2007, 2008, 2009, 2019 The NetBSD Foundation, Inc.
@@ -133,11 +133,12 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: intr.c,v 1.167 2024/03/05 20:58:05 andvar Exp $");
+__KERNEL_RCSID(0, "$NetBSD: intr.c,v 1.168 2024/04/22 22:29:28 andvar Exp $");
+#include "opt_acpi.h"
#include "opt_intrdebug.h"
#include "opt_multiprocessor.h"
-#include "opt_acpi.h"
+#include "opt_pci.h"
#include
#include
@@ -1366,18 +1367,13 @@ redzone_const_or_zero(int x)
void
cpu_intr_init(struct cpu_info *ci)
{
-#if (NLAPIC > 0) || defined(MULTIPROCESSOR) || \
-(NHYPERV > 0)
- struct intrsource *isp;
-#endif
#if NLAPIC > 0
+ struct intrsource *isp;
static int first = 1;
#if defined(MULTIPROCESSOR)
int i;
#endif
-#endif
-#if NLAPIC > 0
isp = kmem_zalloc(sizeof(*isp), KM_SLEEP);
isp->is_recurse = Xrecurse_lapic_ltimer;
isp->is_resume = Xresume_lapic_ltimer;
@@ -1404,7 +1400,7 @@ cpu_intr_init(struct cpu_info *ci)
for (i = 0; i < X86_NIPI; i++)
evcnt_attach_dynamic(>ci_ipi_events[i], EVCNT_TYPE_MISC,
NULL, device_xname(ci->ci_dev), x86_ipi_names[i]);
-#endif
+#endif /* MULTIPROCESSOR */
#if NHYPERV > 0
if (hyperv_hypercall_enabled()) {
@@ -1418,8 +1414,8 @@ cpu_intr_init(struct cpu_info *ci)
evcnt_attach_dynamic(>is_evcnt, EVCNT_TYPE_INTR, NULL,
device_xname(ci->ci_dev), "Hyper-V hypercall");
}
-#endif
-#endif
+#endif /* NHYPERV > 0 */
+#endif /* NLAPIC > 0 */
#if defined(__HAVE_PREEMPTION)
x86_init_preempt(ci);
CVS commit: src/sys/arch/x86/x86
Module Name:src Committed By: andvar Date: Mon Apr 22 22:29:29 UTC 2024 Modified Files: src/sys/arch/x86/x86: intr.c Log Message: Add opt_pci.h include to fix NO_PCI_MSI_MSIX build. (Path from Paolo Pisati in current_users@) While here: Simplify mp_cpu_start() ifdefs. MULTIPROCESSOR and HYPERV code falls under NLAPIC > 0, thus just combine all blocks under this guard. Rearrange opt_acpi.h include alphabetically. To generate a diff of this commit: cvs rdiff -u -r1.167 -r1.168 src/sys/arch/x86/x86/intr.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/x86/x86
Module Name:src
Committed By: andvar
Date: Sat Apr 13 09:12:09 UTC 2024
Modified Files:
src/sys/arch/x86/x86: viac7temp.c
Log Message:
viac7temp(4): define module metadata using MODULE() macro and implement
viac7temp_modcmd() to handle module load/unload events.
Fixes PR kern/58148. Look OK by mrg@.
XXX pullup-10, -9, -8
To generate a diff of this commit:
cvs rdiff -u -r1.9 -r1.10 src/sys/arch/x86/x86/viac7temp.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/x86/x86/viac7temp.c
diff -u src/sys/arch/x86/x86/viac7temp.c:1.9 src/sys/arch/x86/x86/viac7temp.c:1.10
--- src/sys/arch/x86/x86/viac7temp.c:1.9 Thu Oct 7 12:52:27 2021
+++ src/sys/arch/x86/x86/viac7temp.c Sat Apr 13 09:12:09 2024
@@ -1,4 +1,4 @@
-/* $NetBSD: viac7temp.c,v 1.9 2021/10/07 12:52:27 msaitoh Exp $ */
+/* $NetBSD: viac7temp.c,v 1.10 2024/04/13 09:12:09 andvar Exp $ */
/*-
* Copyright (c) 2009 Jared D. McNeill
@@ -27,11 +27,12 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: viac7temp.c,v 1.9 2021/10/07 12:52:27 msaitoh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: viac7temp.c,v 1.10 2024/04/13 09:12:09 andvar Exp $");
#include
#include
#include
+#include
#include
#include
@@ -162,3 +163,32 @@ viac7temp_refresh_xcall(void *arg0, void
edata->value_cur += 27315;
edata->state = ENVSYS_SVALID;
}
+
+MODULE(MODULE_CLASS_DRIVER, viac7temp, NULL);
+
+#ifdef _MODULE
+#include "ioconf.c"
+#endif
+
+static int
+viac7temp_modcmd(modcmd_t cmd, void *arg __unused)
+{
+ int error = 0;
+
+ switch (cmd) {
+ case MODULE_CMD_INIT:
+#ifdef _MODULE
+ error = config_init_component(cfdriver_ioconf_viac7temp,
+ cfattach_ioconf_viac7temp, cfdata_ioconf_viac7temp);
+#endif
+ return error;
+ case MODULE_CMD_FINI:
+#ifdef _MODULE
+ error = config_fini_component(cfdriver_ioconf_viac7temp,
+ cfattach_ioconf_viac7temp, cfdata_ioconf_viac7temp);
+#endif
+ return error;
+ default:
+ return ENOTTY;
+ }
+}
CVS commit: src/sys/arch/x86/x86
Module Name:src Committed By: andvar Date: Sat Apr 13 09:12:09 UTC 2024 Modified Files: src/sys/arch/x86/x86: viac7temp.c Log Message: viac7temp(4): define module metadata using MODULE() macro and implement viac7temp_modcmd() to handle module load/unload events. Fixes PR kern/58148. Look OK by mrg@. XXX pullup-10, -9, -8 To generate a diff of this commit: cvs rdiff -u -r1.9 -r1.10 src/sys/arch/x86/x86/viac7temp.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/x86/x86
Module Name:src
Committed By: gutteridge
Date: Tue Mar 12 02:26:16 UTC 2024
Modified Files:
src/sys/arch/x86/x86: coretemp.c
Log Message:
coretemp.c: don't accept impossibly low TjMax values
r. 1.39 introduced a regression where instead of applying a reasonable
default maximum (as was done prior to that change), incorrect values
were accepted and applied, as failures to retrieve an expected MSR
value weren't accounted for.
Apply different logic for unexpectedly low vs. high maximums, with
distinct warnings for each. Also add another warning about a retrieval
failure right at the outset (which also just uses the default, then).
This change fundamentally doesn't address the fact that
__SHIFTOUT(msr, MSR_TEMP_TARGET_READOUT)
doesn't necessarily return a valid value. It just restores prior
behaviour, which is more reasonable than applying a zero value, which
started happening on some older hardware. (I infer this is most likely
an issue with dated generations of Intel hardware with this feature.)
The challenge is that this evidently isn't all documented properly
anywhere. Various "magic values" in this driver need further
investigation.
While here, also fix output so warnings are cleanly formatted, rather
than the slightly scrambled way they were appearing.
Tested on older Intel hardware I had on hand:
E7500 (now falls back to default 100 rather than 0)
E5540 (successfully retrieves 97, as before)
i5-3340M (successfully retrieves 105, as before)
To generate a diff of this commit:
cvs rdiff -u -r1.40 -r1.41 src/sys/arch/x86/x86/coretemp.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/x86/x86/coretemp.c
diff -u src/sys/arch/x86/x86/coretemp.c:1.40 src/sys/arch/x86/x86/coretemp.c:1.41
--- src/sys/arch/x86/x86/coretemp.c:1.40 Thu Feb 29 01:59:11 2024
+++ src/sys/arch/x86/x86/coretemp.c Tue Mar 12 02:26:16 2024
@@ -1,4 +1,4 @@
-/* $NetBSD: coretemp.c,v 1.40 2024/02/29 01:59:11 gutteridge Exp $ */
+/* $NetBSD: coretemp.c,v 1.41 2024/03/12 02:26:16 gutteridge Exp $ */
/*-
* Copyright (c) 2011 The NetBSD Foundation, Inc.
@@ -61,7 +61,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: coretemp.c,v 1.40 2024/02/29 01:59:11 gutteridge Exp $");
+__KERNEL_RCSID(0, "$NetBSD: coretemp.c,v 1.41 2024/03/12 02:26:16 gutteridge Exp $");
#include
#include
@@ -110,7 +110,7 @@ static int coretemp_match(device_t, cfda
static void coretemp_attach(device_t, device_t, void *);
static int coretemp_detach(device_t, int);
static int coretemp_quirks(struct cpu_info *);
-static void coretemp_tjmax(device_t);
+static int coretemp_tjmax(device_t);
static void coretemp_refresh(struct sysmon_envsys *, envsys_data_t *);
static void coretemp_refresh_xcall(void *, void *);
@@ -194,9 +194,10 @@ coretemp_attach(device_t parent, device_
if (sysmon_envsys_register(sc->sc_sme) != 0)
goto fail;
- coretemp_tjmax(self);
- aprint_verbose(", Tjmax=%d", sc->sc_tjmax);
- aprint_normal("\n");
+ if (coretemp_tjmax(self) == 0) {
+ aprint_verbose(", Tjmax=%d", sc->sc_tjmax);
+ aprint_normal("\n");
+ }
return;
fail:
@@ -258,7 +259,7 @@ coretemp_quirks(struct cpu_info *ci)
return 1;
}
-void
+static int
coretemp_tjmax(device_t self)
{
struct coretemp_softc *sc = device_private(self);
@@ -288,17 +289,19 @@ coretemp_tjmax(device_t self)
if ((model < 0x17) && ((msr & __BIT(28)) == 0))
goto notee;
- if (rdmsr_safe(MSR_IA32_EXT_CONFIG, ) == EFAULT)
- return;
+ if (rdmsr_safe(MSR_IA32_EXT_CONFIG, ) == EFAULT) {
+ aprint_normal("\n");
+ aprint_error_dev(sc->sc_dev,
+ "Failed to read MSR_IA32_EXT_CONFIG MSR. "
+ "Using default (%d)\n", sc->sc_tjmax);
+ return 1;
+ }
- if ((msr & __BIT(30)) != 0) {
+ if ((msr & __BIT(30)) != 0)
sc->sc_tjmax = 85;
- return;
- }
} else if (model == 0x17 && stepping == 0x06) {
/* The mobile Penryn family. */
sc->sc_tjmax = 105;
- return;
} else if (model == 0x1c) {
if (stepping == 0x0a) {
/* 45nm Atom D400, N400 and D500 series */
@@ -307,21 +310,39 @@ coretemp_tjmax(device_t self)
sc->sc_tjmax = 90;
} else {
notee:
- /* Attempt to get Tj(max) from IA32_TEMPERATURE_TARGET. */
+ /*
+ * Attempt to get Tj(max) from IA32_TEMPERATURE_TARGET.
+ * It is not fully known which CPU models have the MSR.
+ */
if (rdmsr_safe(MSR_TEMPERATURE_TARGET, ) == EFAULT) {
+ aprint_normal("\n");
aprint_error_dev(sc->sc_dev,
"Failed to read TEMPERATURE_TARGET MSR. "
- "Use the default (%d)\n", sc->sc_tjmax);
- return;
+ "Using default (%d)\n", sc->sc_tjmax);
+ return 1;
}
tjmax = __SHIFTOUT(msr, MSR_TEMP_TARGET_READOUT);
- if ((tjmax < TJMAX_LIMIT_LOW) || (tjmax > TJMAX_LIMIT_HIGH))
+ if (tjmax < TJMAX_LIMIT_LOW) {
+ aprint_normal("\n");
+ aprint_error_dev(sc->sc_dev,
+ "WARNING: Tjmax(%d) retrieved was below expected range, "
+"using default (%d).\n", tjmax,
CVS commit: src/sys/arch/x86/x86
Module Name:src Committed By: gutteridge Date: Tue Mar 12 02:26:16 UTC 2024 Modified Files: src/sys/arch/x86/x86: coretemp.c Log Message: coretemp.c: don't accept impossibly low TjMax values r. 1.39 introduced a regression where instead of applying a reasonable default maximum (as was done prior to that change), incorrect values were accepted and applied, as failures to retrieve an expected MSR value weren't accounted for. Apply different logic for unexpectedly low vs. high maximums, with distinct warnings for each. Also add another warning about a retrieval failure right at the outset (which also just uses the default, then). This change fundamentally doesn't address the fact that __SHIFTOUT(msr, MSR_TEMP_TARGET_READOUT) doesn't necessarily return a valid value. It just restores prior behaviour, which is more reasonable than applying a zero value, which started happening on some older hardware. (I infer this is most likely an issue with dated generations of Intel hardware with this feature.) The challenge is that this evidently isn't all documented properly anywhere. Various "magic values" in this driver need further investigation. While here, also fix output so warnings are cleanly formatted, rather than the slightly scrambled way they were appearing. Tested on older Intel hardware I had on hand: E7500 (now falls back to default 100 rather than 0) E5540 (successfully retrieves 97, as before) i5-3340M (successfully retrieves 105, as before) To generate a diff of this commit: cvs rdiff -u -r1.40 -r1.41 src/sys/arch/x86/x86/coretemp.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/x86/x86
Module Name:src Committed By: gutteridge Date: Thu Feb 29 01:59:12 UTC 2024 Modified Files: src/sys/arch/x86/x86: coretemp.c Log Message: coretemp.c: fix grammar in a warning message (I get several of these warnings on boot on a particular machine. Now, it also seems that the code isn't retrieving the correct value, either; TBD.) To generate a diff of this commit: cvs rdiff -u -r1.39 -r1.40 src/sys/arch/x86/x86/coretemp.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/x86/x86
Module Name:src Committed By: gutteridge Date: Thu Feb 29 01:59:12 UTC 2024 Modified Files: src/sys/arch/x86/x86: coretemp.c Log Message: coretemp.c: fix grammar in a warning message (I get several of these warnings on boot on a particular machine. Now, it also seems that the code isn't retrieving the correct value, either; TBD.) To generate a diff of this commit: cvs rdiff -u -r1.39 -r1.40 src/sys/arch/x86/x86/coretemp.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/x86/x86/coretemp.c diff -u src/sys/arch/x86/x86/coretemp.c:1.39 src/sys/arch/x86/x86/coretemp.c:1.40 --- src/sys/arch/x86/x86/coretemp.c:1.39 Thu Jul 13 09:12:23 2023 +++ src/sys/arch/x86/x86/coretemp.c Thu Feb 29 01:59:11 2024 @@ -1,4 +1,4 @@ -/* $NetBSD: coretemp.c,v 1.39 2023/07/13 09:12:23 msaitoh Exp $ */ +/* $NetBSD: coretemp.c,v 1.40 2024/02/29 01:59:11 gutteridge Exp $ */ /*- * Copyright (c) 2011 The NetBSD Foundation, Inc. @@ -61,7 +61,7 @@ */ #include -__KERNEL_RCSID(0, "$NetBSD: coretemp.c,v 1.39 2023/07/13 09:12:23 msaitoh Exp $"); +__KERNEL_RCSID(0, "$NetBSD: coretemp.c,v 1.40 2024/02/29 01:59:11 gutteridge Exp $"); #include #include @@ -318,7 +318,7 @@ notee: tjmax = __SHIFTOUT(msr, MSR_TEMP_TARGET_READOUT); if ((tjmax < TJMAX_LIMIT_LOW) || (tjmax > TJMAX_LIMIT_HIGH)) aprint_error_dev(sc->sc_dev, - "WARNING: Tjmax(%d) might exceeded the limit.\n", + "WARNING: Tjmax(%d) might exceed the limit.\n", tjmax); sc->sc_tjmax = tjmax; }
CVS commit: src/sys/arch/x86/x86
Module Name:src Committed By: andvar Date: Sun Feb 25 18:27:54 UTC 2024 Modified Files: src/sys/arch/x86/x86: lapic.c Log Message: s/asynchronious/asynchronous/ in comment. To generate a diff of this commit: cvs rdiff -u -r1.89 -r1.90 src/sys/arch/x86/x86/lapic.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/x86/x86/lapic.c diff -u src/sys/arch/x86/x86/lapic.c:1.89 src/sys/arch/x86/x86/lapic.c:1.90 --- src/sys/arch/x86/x86/lapic.c:1.89 Wed Sep 7 00:40:19 2022 +++ src/sys/arch/x86/x86/lapic.c Sun Feb 25 18:27:54 2024 @@ -1,4 +1,4 @@ -/* $NetBSD: lapic.c,v 1.89 2022/09/07 00:40:19 knakahara Exp $ */ +/* $NetBSD: lapic.c,v 1.90 2024/02/25 18:27:54 andvar Exp $ */ /*- * Copyright (c) 2000, 2008, 2020 The NetBSD Foundation, Inc. @@ -32,7 +32,7 @@ */ #include -__KERNEL_RCSID(0, "$NetBSD: lapic.c,v 1.89 2022/09/07 00:40:19 knakahara Exp $"); +__KERNEL_RCSID(0, "$NetBSD: lapic.c,v 1.90 2024/02/25 18:27:54 andvar Exp $"); #include "acpica.h" #include "ioapic.h" @@ -534,7 +534,7 @@ lapic_get_timecount(struct timecounter * * * If the current tick is almost the Initial Counter, explicitly * check for the pending interrupt bit as the interrupt delivery - * could be asynchronious and compensate as well. + * could be asynchronous and compensate as well. * * This can't be done without splhigh() as the calling code might * have masked the clockinterrupt already.
CVS commit: src/sys/arch/x86/x86
Module Name:src Committed By: andvar Date: Sun Feb 25 18:27:54 UTC 2024 Modified Files: src/sys/arch/x86/x86: lapic.c Log Message: s/asynchronious/asynchronous/ in comment. To generate a diff of this commit: cvs rdiff -u -r1.89 -r1.90 src/sys/arch/x86/x86/lapic.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/x86/x86
Module Name:src
Committed By: mrg
Date: Mon Feb 19 20:10:09 UTC 2024
Modified Files:
src/sys/arch/x86/x86: tsc.c
Log Message:
remove unintended printf() in previous. (thx dh)
To generate a diff of this commit:
cvs rdiff -u -r1.59 -r1.60 src/sys/arch/x86/x86/tsc.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/x86/x86/tsc.c
diff -u src/sys/arch/x86/x86/tsc.c:1.59 src/sys/arch/x86/x86/tsc.c:1.60
--- src/sys/arch/x86/x86/tsc.c:1.59 Mon Feb 19 09:22:31 2024
+++ src/sys/arch/x86/x86/tsc.c Mon Feb 19 20:10:09 2024
@@ -1,4 +1,4 @@
-/* $NetBSD: tsc.c,v 1.59 2024/02/19 09:22:31 mrg Exp $ */
+/* $NetBSD: tsc.c,v 1.60 2024/02/19 20:10:09 mrg Exp $ */
/*-
* Copyright (c) 2008, 2020 The NetBSD Foundation, Inc.
@@ -27,7 +27,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: tsc.c,v 1.59 2024/02/19 09:22:31 mrg Exp $");
+__KERNEL_RCSID(0, "$NetBSD: tsc.c,v 1.60 2024/02/19 20:10:09 mrg Exp $");
#include
#include
@@ -142,7 +142,6 @@ tsc_is_invariant(void)
switch (CPUID_TO_FAMILY(ci->ci_signature)) {
case 0x15:
case 0x16:
- printf("%s: invariant %d (base fam %x)\n", __func__, invariant, CPUID_TO_FAMILY(ci->ci_signature));
return false;
}
}
CVS commit: src/sys/arch/x86/x86
Module Name:src Committed By: mrg Date: Mon Feb 19 20:10:09 UTC 2024 Modified Files: src/sys/arch/x86/x86: tsc.c Log Message: remove unintended printf() in previous. (thx dh) To generate a diff of this commit: cvs rdiff -u -r1.59 -r1.60 src/sys/arch/x86/x86/tsc.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/x86/x86
Module Name:src
Committed By: mrg
Date: Mon Feb 19 09:22:31 UTC 2024
Modified Files:
src/sys/arch/x86/x86: tsc.c
Log Message:
make TSC get a quality of -100 on AMD Family 15h and 16h
this should "fix" PR#56322 and is known as AMD errata
"778: Processor Core Time Stamp Counters May Experience Drift"
To generate a diff of this commit:
cvs rdiff -u -r1.58 -r1.59 src/sys/arch/x86/x86/tsc.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/x86/x86/tsc.c
diff -u src/sys/arch/x86/x86/tsc.c:1.58 src/sys/arch/x86/x86/tsc.c:1.59
--- src/sys/arch/x86/x86/tsc.c:1.58 Sat Sep 9 18:37:03 2023
+++ src/sys/arch/x86/x86/tsc.c Mon Feb 19 09:22:31 2024
@@ -1,4 +1,4 @@
-/* $NetBSD: tsc.c,v 1.58 2023/09/09 18:37:03 ad Exp $ */
+/* $NetBSD: tsc.c,v 1.59 2024/02/19 09:22:31 mrg Exp $ */
/*-
* Copyright (c) 2008, 2020 The NetBSD Foundation, Inc.
@@ -27,7 +27,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: tsc.c,v 1.58 2023/09/09 18:37:03 ad Exp $");
+__KERNEL_RCSID(0, "$NetBSD: tsc.c,v 1.59 2024/02/19 09:22:31 mrg Exp $");
#include
#include
@@ -132,6 +132,19 @@ tsc_is_invariant(void)
* Manual Volume 3: General-Purpose and System Instructions.
* The check is done below.
*/
+
+ /*
+ * AMD Errata 778: Processor Core Time Stamp Counters May
+ * Experience Drift
+ *
+ * This affects all family 15h and family 16h processors.
+ */
+ switch (CPUID_TO_FAMILY(ci->ci_signature)) {
+ case 0x15:
+ case 0x16:
+ printf("%s: invariant %d (base fam %x)\n", __func__, invariant, CPUID_TO_FAMILY(ci->ci_signature));
+ return false;
+ }
}
/*
CVS commit: src/sys/arch/x86/x86
Module Name:src Committed By: mrg Date: Mon Feb 19 09:22:31 UTC 2024 Modified Files: src/sys/arch/x86/x86: tsc.c Log Message: make TSC get a quality of -100 on AMD Family 15h and 16h this should "fix" PR#56322 and is known as AMD errata "778: Processor Core Time Stamp Counters May Experience Drift" To generate a diff of this commit: cvs rdiff -u -r1.58 -r1.59 src/sys/arch/x86/x86/tsc.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/x86/include
Module Name:src
Committed By: christos
Date: Tue Jan 2 19:28:25 UTC 2024
Modified Files:
src/sys/arch/x86/include: ieee.h
Log Message:
use sized types
To generate a diff of this commit:
cvs rdiff -u -r1.12 -r1.13 src/sys/arch/x86/include/ieee.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/x86/include/ieee.h
diff -u src/sys/arch/x86/include/ieee.h:1.12 src/sys/arch/x86/include/ieee.h:1.13
--- src/sys/arch/x86/include/ieee.h:1.12 Sat Sep 16 09:37:10 2023
+++ src/sys/arch/x86/include/ieee.h Tue Jan 2 14:28:25 2024
@@ -1,4 +1,4 @@
-/* $NetBSD: ieee.h,v 1.12 2023/09/16 13:37:10 christos Exp $ */
+/* $NetBSD: ieee.h,v 1.13 2024/01/02 19:28:25 christos Exp $ */
/*
* Copyright (c) 1992, 1993
@@ -69,13 +69,13 @@
* i386: 16 bits.
*/
struct ieee_ext {
- u_int ext_fracl:EXT_FRACLBITS;
- u_int ext_frach:EXT_FRACHBITS;
+ uint32_t ext_fracl:EXT_FRACLBITS;
+ uint32_t ext_frach:EXT_FRACHBITS;
#if 0
- u_int ext_int:1;
+ uint32_t ext_int:1;
#endif
- u_int ext_exp:EXT_EXPBITS;
- u_int ext_sign:1;
+ uint32_t ext_exp:EXT_EXPBITS;
+ uint32_t ext_sign:1;
};
/*
CVS commit: src/sys/arch/x86/include
Module Name:src Committed By: christos Date: Tue Jan 2 19:28:25 UTC 2024 Modified Files: src/sys/arch/x86/include: ieee.h Log Message: use sized types To generate a diff of this commit: cvs rdiff -u -r1.12 -r1.13 src/sys/arch/x86/include/ieee.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/x86/x86
Module Name:src Committed By: mlelstv Date: Wed Nov 29 11:40:37 UTC 2023 Modified Files: src/sys/arch/x86/x86: intr.c Log Message: Fix use-after-free (source->is_type) when detecting unsharable interrupts. Doesn't solve the interrupt conflict itself, but avoids a panic. To generate a diff of this commit: cvs rdiff -u -r1.165 -r1.166 src/sys/arch/x86/x86/intr.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/x86/pci
Module Name:src
Committed By: gutteridge
Date: Tue Nov 21 23:22:23 UTC 2023
Modified Files:
src/sys/arch/x86/pci: pci_machdep.c pci_msi_machdep.c
Log Message:
pci_machdep.c & pci_msi_machdep.c: comment fixes
Correct spelling and grammar in some comments.
To generate a diff of this commit:
cvs rdiff -u -r1.97 -r1.98 src/sys/arch/x86/pci/pci_machdep.c
cvs rdiff -u -r1.18 -r1.19 src/sys/arch/x86/pci/pci_msi_machdep.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/x86/pci/pci_machdep.c
diff -u src/sys/arch/x86/pci/pci_machdep.c:1.97 src/sys/arch/x86/pci/pci_machdep.c:1.98
--- src/sys/arch/x86/pci/pci_machdep.c:1.97 Tue Oct 17 12:07:42 2023
+++ src/sys/arch/x86/pci/pci_machdep.c Tue Nov 21 23:22:23 2023
@@ -1,4 +1,4 @@
-/* $NetBSD: pci_machdep.c,v 1.97 2023/10/17 12:07:42 bouyer Exp $ */
+/* $NetBSD: pci_machdep.c,v 1.98 2023/11/21 23:22:23 gutteridge Exp $ */
/*-
* Copyright (c) 1997, 1998 The NetBSD Foundation, Inc.
@@ -73,7 +73,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: pci_machdep.c,v 1.97 2023/10/17 12:07:42 bouyer Exp $");
+__KERNEL_RCSID(0, "$NetBSD: pci_machdep.c,v 1.98 2023/11/21 23:22:23 gutteridge Exp $");
#include
#include
@@ -228,7 +228,7 @@ const struct {
/* arch/xen does not support MSI/MSI-X yet. */
#ifdef __HAVE_PCI_MSI_MSIX
-#define PCI_QUIRK_DISABLE_MSI 1 /* Neigher MSI nor MSI-X work */
+#define PCI_QUIRK_DISABLE_MSI 1 /* Neither MSI nor MSI-X work */
#define PCI_QUIRK_DISABLE_MSIX 2 /* MSI-X does not work */
#define PCI_QUIRK_ENABLE_MSI_VM 3 /* Older chipset in VM where MSI and MSI-X works */
@@ -507,7 +507,7 @@ pci_attach_hook(device_t parent, device_
* support it than the other way around, so be conservative
* here. So we don't enable MSI if we don't find a host
* bridge there. We also deliberately don't enable MSI on
- * chipsets from low-end manifacturers like VIA and SiS.
+ * chipsets from low-end manufacturers like VIA and SiS.
*/
for (i = 0; i <= 7; i++) {
tag = pci_make_tag(pc, 0, 0, i);
Index: src/sys/arch/x86/pci/pci_msi_machdep.c
diff -u src/sys/arch/x86/pci/pci_msi_machdep.c:1.18 src/sys/arch/x86/pci/pci_msi_machdep.c:1.19
--- src/sys/arch/x86/pci/pci_msi_machdep.c:1.18 Sat May 13 11:27:10 2023
+++ src/sys/arch/x86/pci/pci_msi_machdep.c Tue Nov 21 23:22:23 2023
@@ -1,4 +1,4 @@
-/* $NetBSD: pci_msi_machdep.c,v 1.18 2023/05/13 11:27:10 andvar Exp $ */
+/* $NetBSD: pci_msi_machdep.c,v 1.19 2023/11/21 23:22:23 gutteridge Exp $ */
/*
* Copyright (c) 2015 Internet Initiative Japan Inc.
@@ -34,7 +34,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: pci_msi_machdep.c,v 1.18 2023/05/13 11:27:10 andvar Exp $");
+__KERNEL_RCSID(0, "$NetBSD: pci_msi_machdep.c,v 1.19 2023/11/21 23:22:23 gutteridge Exp $");
#include "opt_intrdebug.h"
#include "ioapic.h"
@@ -397,7 +397,7 @@ x86_pci_msix_release_internal(pci_intr_h
*/
/*
- * Return intrid for a MSI/MSI-X device.
+ * Return intrid for an MSI/MSI-X device.
* "buf" must be allocated by caller.
*/
const char *
@@ -432,9 +432,9 @@ x86_pci_msi_release(pci_chipset_tag_t pc
}
/*
- * Establish a MSI handle.
- * If multiple MSI handle is required to establish, device driver must call
- * this function for each handle.
+ * Establish an MSI handle.
+ * If multiple MSI handles are required to be established, a device driver
+ * must call this function for each handle.
*/
void *
x86_pci_msi_establish(pci_chipset_tag_t pc, pci_intr_handle_t ih,
@@ -452,9 +452,9 @@ x86_pci_msi_establish(pci_chipset_tag_t
}
/*
- * Disestablish a MSI handle.
- * If multiple MSI handle is required to disestablish, device driver must call
- * this function for each handle.
+ * Disestablish an MSI handle.
+ * If multiple MSI handles are required to be disestablished, a device driver
+ * must call this function for each handle.
*/
void
x86_pci_msi_disestablish(pci_chipset_tag_t pc, void *cookie)
@@ -477,9 +477,9 @@ x86_pci_msix_release(pci_chipset_tag_t p
}
/*
- * Establish a MSI-X handle.
- * If multiple MSI-X handle is required to establish, device driver must call
- * this function for each handle.
+ * Establish an MSI-X handle.
+ * If multiple MSI-X handles are required to be established, a device driver
+ * must call this function for each handle.
*/
void *
x86_pci_msix_establish(pci_chipset_tag_t pc, pci_intr_handle_t ih,
@@ -497,9 +497,9 @@ x86_pci_msix_establish(pci_chipset_tag_t
}
/*
- * Disestablish a MSI-X handle.
- * If multiple MSI-X handle is required to disestablish, device driver must call
- * this function for each handle.
+ * Disestablish an MSI-X handle.
+ * If multiple MSI-X handles are required to be disestablished, a device driver
+ * must call this function for each handle.
*/
void
x86_pci_msix_disestablish(pci_chipset_tag_t pc, void *cookie)
@@ -577,7 +577,7 @@ pci_msi_alloc_exact(const struct pci_att
/*
* This function is
CVS commit: src/sys/arch/x86/pci
Module Name:src Committed By: gutteridge Date: Tue Nov 21 23:22:23 UTC 2023 Modified Files: src/sys/arch/x86/pci: pci_machdep.c pci_msi_machdep.c Log Message: pci_machdep.c & pci_msi_machdep.c: comment fixes Correct spelling and grammar in some comments. To generate a diff of this commit: cvs rdiff -u -r1.97 -r1.98 src/sys/arch/x86/pci/pci_machdep.c cvs rdiff -u -r1.18 -r1.19 src/sys/arch/x86/pci/pci_msi_machdep.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/x86/include
Module Name:src Committed By: mrg Date: Fri Oct 27 06:31:49 UTC 2023 Modified Files: src/sys/arch/x86/include: specialreg.h Log Message: add MSR stuff for AMD errata 1474. To generate a diff of this commit: cvs rdiff -u -r1.208 -r1.209 src/sys/arch/x86/include/specialreg.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/x86/include/specialreg.h diff -u src/sys/arch/x86/include/specialreg.h:1.208 src/sys/arch/x86/include/specialreg.h:1.209 --- src/sys/arch/x86/include/specialreg.h:1.208 Thu Jul 27 00:34:07 2023 +++ src/sys/arch/x86/include/specialreg.h Fri Oct 27 06:31:48 2023 @@ -1,4 +1,4 @@ -/* $NetBSD: specialreg.h,v 1.208 2023/07/27 00:34:07 msaitoh Exp $ */ +/* $NetBSD: specialreg.h,v 1.209 2023/10/27 06:31:48 mrg Exp $ */ /* * Copyright (c) 2014-2020 The NetBSD Foundation, Inc. @@ -1363,6 +1363,10 @@ #define NB_CFG_DISDATMSK 0x0010ULL #define NB_CFG_INITAPICCPUIDLO (1ULL << 54) +/* AMD Errata 1474. */ +#define MSR_CC6_CFG 0xc0010296 +#define CC6_CFG_DISABLE_BITS (__BIT(22) | __BIT(14) | __BIT(6)) + #define MSR_LS_CFG 0xc0011020 #define LS_CFG_ERRATA_1033 __BIT(4) #define LS_CFG_ERRATA_793 __BIT(15)
CVS commit: src/sys/arch/x86/include
Module Name:src Committed By: mrg Date: Fri Oct 27 06:31:49 UTC 2023 Modified Files: src/sys/arch/x86/include: specialreg.h Log Message: add MSR stuff for AMD errata 1474. To generate a diff of this commit: cvs rdiff -u -r1.208 -r1.209 src/sys/arch/x86/include/specialreg.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/x86/x86
Module Name:src
Committed By: mrg
Date: Fri Oct 27 05:45:00 UTC 2023
Modified Files:
src/sys/arch/x86/x86: errata.c
Log Message:
x86: handle AMD errata 1474: A CPU core may hang after about 1044 days
from the new comment:
* This requires disabling CC6 power level, which can be a performance
* issue since it stops full turbo in some implementations (eg, half the
* cores must be in CC6 to achieve the highest boost level.) Set a timer
* to fire in 1000 days -- except NetBSD timers end up having a signed
* 32-bit hz-based value, which rolls over in under 25 days with HZ=1000,
* and doing xcall(9) or kthread(9) from a callout is not allowed anyway,
* so just have a kthread wait 1 day for 1000 times.
documented in:
https://www.amd.com/content/dam/amd/en/documents/processor-tech-docs/revision-guides/56323-PUB_1_01.pdf
To generate a diff of this commit:
cvs rdiff -u -r1.34 -r1.35 src/sys/arch/x86/x86/errata.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/x86/x86/errata.c
diff -u src/sys/arch/x86/x86/errata.c:1.34 src/sys/arch/x86/x86/errata.c:1.35
--- src/sys/arch/x86/x86/errata.c:1.34 Fri Oct 27 03:06:04 2023
+++ src/sys/arch/x86/x86/errata.c Fri Oct 27 05:45:00 2023
@@ -1,4 +1,4 @@
-/* $NetBSD: errata.c,v 1.34 2023/10/27 03:06:04 mrg Exp $ */
+/* $NetBSD: errata.c,v 1.35 2023/10/27 05:45:00 mrg Exp $ */
/*-
* Copyright (c) 2007 The NetBSD Foundation, Inc.
@@ -47,10 +47,13 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: errata.c,v 1.34 2023/10/27 03:06:04 mrg Exp $");
+__KERNEL_RCSID(0, "$NetBSD: errata.c,v 1.35 2023/10/27 05:45:00 mrg Exp $");
-#include
+#include
#include
+#include
+#include
+#include
#include
#include
@@ -255,6 +258,7 @@ static const uint8_t x86_errata_zen2[] =
static bool x86_errata_setmsr(struct cpu_info *, errata_t *);
static bool x86_errata_testmsr(struct cpu_info *, errata_t *);
+static bool x86_errata_amd_1474(struct cpu_info *, errata_t *);
static errata_t errata[] = {
/*
@@ -453,6 +457,13 @@ static errata_t errata[] = {
x86_errata_setmsr, LS_CFG_ERRATA_1095, NULL
},
/*
+ * 1474: A CPU core may hang after about 1044 days
+ */
+ {
+ 1474, FALSE, MSR_CC6_CFG, x86_errata_zen2,
+ x86_errata_amd_1474, CC6_CFG_DISABLE_BITS, NULL
+ },
+ /*
* Zenbleed:
* https://www.amd.com/en/resources/product-security/bulletin/amd-sb-7008.html
* https://github.com/google/security-research/security/advisories/GHSA-v6wh-rxpg-cmm8
@@ -465,6 +476,96 @@ static errata_t errata[] = {
},
};
+/*
+ * 1474: A CPU core may hang after about 1044 days
+ *
+ * This requires disabling CC6 power level, which can be a performance
+ * issue since it stops full turbo in some implementations (eg, half the
+ * cores must be in CC6 to achieve the highest boost level.) Set a timer
+ * to fire in 1000 days -- except NetBSD timers end up having a signed
+ * 32-bit hz-based value, which rolls over in under 25 days with HZ=1000,
+ * and doing xcall(9) or kthread(9) from a callout is not allowed anyway,
+ * so just have a kthread wait 1 day for 1000 times.
+ */
+
+#define AMD_ERRATA_1474_WARN_DAYS 950
+#define AMD_ERRATA_1474_BAD_DAYS 1000
+
+static void
+amd_errata_1474_disable_cc6(void *a1, void *a2)
+{
+ errata_t *e = a1;
+ uint64_t val;
+
+ val = rdmsr_locked(e->e_data1);
+ if ((val & e->e_data2) == 0)
+ return;
+ wrmsr_locked(e->e_data1, val & ~e->e_data2);
+ aprint_debug_dev(curcpu()->ci_dev, "erratum %u patched\n",
+ e->e_num);
+}
+
+static void
+amd_errata_1474_thread(void *arg)
+{
+ int loops = 0;
+ int ticks;
+
+ ticks = hz * SECS_PER_DAY;
+#ifdef X86_ERRATA_TEST_AMD_1474
+ /*
+ * Make this trigger warning after 50 seconds, and workaround
+ * at 100 seconds, for easy testing.
+ */
+ ticks = hz;
+ loops = 900;
+#endif
+
+ while (loops++ < AMD_ERRATA_1474_BAD_DAYS) {
+ if (loops == AMD_ERRATA_1474_WARN_DAYS) {
+ printf("warning: AMD Errata 1474 workaround scheduled "
+ "for %u days.\n", AMD_ERRATA_1474_BAD_DAYS -
+ AMD_ERRATA_1474_WARN_DAYS);
+ printf("warning: reboot required to avoid.\n");
+ }
+ kpause("amd1474", false, ticks, NULL);
+ }
+
+ /* Been 1000 days, disable CC6 and warn about it. */
+ uint64_t xc = xc_broadcast(0, amd_errata_1474_disable_cc6, arg, NULL);
+ xc_wait(xc);
+
+ printf("warning: AMD CC6 disabled due to errata 1474.\n");
+ printf("warning: reboot required to restore full turbo speeds.\n");
+
+ kthread_exit(0);
+}
+
+static bool
+x86_errata_amd_1474(struct cpu_info *ci, errata_t *e)
+{
+ int error;
+
+ /* Don't do anything on non-primary CPUs. */
+ if (!CPU_IS_PRIMARY(ci))
+ return FALSE;
+
+ error = kthread_create(PRI_NONE, KTHREAD_MPSAFE, NULL,
+ amd_errata_1474_thread, e, NULL, "amd1474");
+ if (error) {
+ printf("WARNING: Unable to disable AMD errata 1474!\n");
+ printf("WARNING: reboot system after %u days to avoid CPU "
+ "hangs.\n", AMD_ERRATA_1474_BAD_DAYS);
CVS commit: src/sys/arch/x86/x86
Module Name:src Committed By: mrg Date: Fri Oct 27 05:45:00 UTC 2023 Modified Files: src/sys/arch/x86/x86: errata.c Log Message: x86: handle AMD errata 1474: A CPU core may hang after about 1044 days from the new comment: * This requires disabling CC6 power level, which can be a performance * issue since it stops full turbo in some implementations (eg, half the * cores must be in CC6 to achieve the highest boost level.) Set a timer * to fire in 1000 days -- except NetBSD timers end up having a signed * 32-bit hz-based value, which rolls over in under 25 days with HZ=1000, * and doing xcall(9) or kthread(9) from a callout is not allowed anyway, * so just have a kthread wait 1 day for 1000 times. documented in: https://www.amd.com/content/dam/amd/en/documents/processor-tech-docs/revision-guides/56323-PUB_1_01.pdf To generate a diff of this commit: cvs rdiff -u -r1.34 -r1.35 src/sys/arch/x86/x86/errata.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/x86/x86
Module Name:src
Committed By: mrg
Date: Fri Oct 27 03:06:04 UTC 2023
Modified Files:
src/sys/arch/x86/x86: errata.c
Log Message:
x86: add names for errata that don't have actual numbers
zenbleed is reported as "erratum 65535" currently, this adds a name
for it, and enables the name for any others as well.
pull logging into a function with a tag message.
To generate a diff of this commit:
cvs rdiff -u -r1.33 -r1.34 src/sys/arch/x86/x86/errata.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/x86/x86/errata.c
diff -u src/sys/arch/x86/x86/errata.c:1.33 src/sys/arch/x86/x86/errata.c:1.34
--- src/sys/arch/x86/x86/errata.c:1.33 Fri Jul 28 05:02:13 2023
+++ src/sys/arch/x86/x86/errata.c Fri Oct 27 03:06:04 2023
@@ -1,4 +1,4 @@
-/* $NetBSD: errata.c,v 1.33 2023/07/28 05:02:13 mrg Exp $ */
+/* $NetBSD: errata.c,v 1.34 2023/10/27 03:06:04 mrg Exp $ */
/*-
* Copyright (c) 2007 The NetBSD Foundation, Inc.
@@ -47,7 +47,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: errata.c,v 1.33 2023/07/28 05:02:13 mrg Exp $");
+__KERNEL_RCSID(0, "$NetBSD: errata.c,v 1.34 2023/10/27 03:06:04 mrg Exp $");
#include
#include
@@ -66,6 +66,7 @@ typedef struct errata {
const uint8_t *e_set;
bool (*e_act)(struct cpu_info *, struct errata *);
uint64_t e_data2;
+ const char *e_name; /* use if e_num == 0 */
} errata_t;
/* These names match names from various AMD Errata/Revision Guides. */
@@ -248,7 +249,7 @@ static const uint8_t x86_errata_set15[]
KB_A1, ML_A1, OINK
};
-static const uint8_t x86_errata_set16[] = {
+static const uint8_t x86_errata_zen2[] = {
Rome_B0, Z2_XB, Z2_Ren, Z2_Luc, Z2_Mat, Z2_VG, Z2_Men, OINK
};
@@ -262,21 +263,21 @@ static errata_t errata[] = {
*/
{
81, FALSE, MSR_DC_CFG, x86_errata_set5,
- x86_errata_testmsr, DC_CFG_DIS_SMC_CHK_BUF
+ x86_errata_testmsr, DC_CFG_DIS_SMC_CHK_BUF, NULL
},
/*
* 86: DRAM Data Masking Feature Can Cause ECC Failures
*/
{
86, FALSE, MSR_NB_CFG, x86_errata_set1,
- x86_errata_testmsr, NB_CFG_DISDATMSK
+ x86_errata_testmsr, NB_CFG_DISDATMSK, NULL
},
/*
* 89: Potential Deadlock With Locked Transactions
*/
{
89, FALSE, MSR_NB_CFG, x86_errata_set8,
- x86_errata_testmsr, NB_CFG_DISIOREQLOCK
+ x86_errata_testmsr, NB_CFG_DISIOREQLOCK, NULL
},
/*
* 94: Sequential Prefetch Feature May Cause Incorrect
@@ -284,7 +285,7 @@ static errata_t errata[] = {
*/
{
94, FALSE, MSR_IC_CFG, x86_errata_set1,
- x86_errata_testmsr, IC_CFG_DIS_SEQ_PREFETCH
+ x86_errata_testmsr, IC_CFG_DIS_SEQ_PREFETCH, NULL
},
/*
* 97: 128-Bit Streaming Stores May Cause Coherency
@@ -296,7 +297,7 @@ static errata_t errata[] = {
*/
{
97, FALSE, MSR_DC_CFG, x86_errata_set6,
- x86_errata_testmsr, DC_CFG_DIS_CNV_WC_SSO
+ x86_errata_testmsr, DC_CFG_DIS_CNV_WC_SSO, NULL
},
/*
* 104: DRAM Data Masking Feature Causes ChipKill ECC
@@ -304,14 +305,14 @@ static errata_t errata[] = {
*/
{
104, FALSE, MSR_NB_CFG, x86_errata_set7,
- x86_errata_testmsr, NB_CFG_DISDATMSK
+ x86_errata_testmsr, NB_CFG_DISDATMSK, NULL
},
/*
* 113: Enhanced Write-Combining Feature Causes System Hang
*/
{
113, FALSE, MSR_BU_CFG, x86_errata_set3,
- x86_errata_setmsr, BU_CFG_WBENHWSBDIS
+ x86_errata_setmsr, BU_CFG_WBENHWSBDIS, NULL
},
/*
* 69: Multiprocessor Coherency Problem with Hardware
@@ -319,7 +320,7 @@ static errata_t errata[] = {
*/
{
69, FALSE, MSR_BU_CFG, x86_errata_set5,
- x86_errata_setmsr, BU_CFG_WBPFSMCCHKDIS
+ x86_errata_setmsr, BU_CFG_WBPFSMCCHKDIS, NULL
},
/*
* 101: DRAM Scrubber May Cause Data Corruption When Using
@@ -327,7 +328,7 @@ static errata_t errata[] = {
*/
{
101, FALSE, 0, x86_errata_set2,
- NULL, 0
+ NULL, 0, NULL
},
/*
* 106: Potential Deadlock with Tightly Coupled Semaphores
@@ -335,7 +336,7 @@ static errata_t errata[] = {
*/
{
106, FALSE, MSR_LS_CFG, x86_errata_set2,
- x86_errata_testmsr, LS_CFG_DIS_LS2_SQUISH
+ x86_errata_testmsr, LS_CFG_DIS_LS2_SQUISH, NULL
},
/*
* 107: Possible Multiprocessor Coherency Problem with
@@ -343,7 +344,7 @@ static errata_t errata[] = {
*/
{
107, FALSE, MSR_BU_CFG, x86_errata_set2,
- x86_errata_testmsr, BU_CFG_THRL2IDXCMPDIS
+ x86_errata_testmsr, BU_CFG_THRL2IDXCMPDIS, NULL
},
/*
* 122: TLB Flush Filter May Cause Coherency Problem in
@@ -351,14 +352,14 @@ static errata_t errata[] = {
*/
{
122, FALSE, MSR_HWCR, x86_errata_set4,
- x86_errata_setmsr, HWCR_FFDIS
+ x86_errata_setmsr, HWCR_FFDIS, NULL
},
/*
* 254: Internal Resource Livelock Involving Cached TLB Reload
*/
{
254, FALSE, MSR_BU_CFG, x86_errata_set9,
- x86_errata_testmsr, BU_CFG_ERRATA_254
+ x86_errata_testmsr, BU_CFG_ERRATA_254, NULL
},
/*
* 261: Processor May Stall Entering Stop-Grant Due to Pending Data
@@ -366,7 +367,7 @@ static errata_t errata[] = {
*/
{
261,
CVS commit: src/sys/arch/x86/x86
Module Name:src Committed By: mrg Date: Fri Oct 27 03:06:04 UTC 2023 Modified Files: src/sys/arch/x86/x86: errata.c Log Message: x86: add names for errata that don't have actual numbers zenbleed is reported as "erratum 65535" currently, this adds a name for it, and enables the name for any others as well. pull logging into a function with a tag message. To generate a diff of this commit: cvs rdiff -u -r1.33 -r1.34 src/sys/arch/x86/x86/errata.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/x86
Module Name:src
Committed By: bouyer
Date: Thu Oct 19 14:59:46 UTC 2023
Modified Files:
src/sys/arch/x86/acpi: acpi_wakeup.c
src/sys/arch/x86/x86: genfb_machdep.c
Log Message:
Move definition of acpi_md_vesa_modenum to acpi_wakeup.c; allows building
kernels without framebuffer devices.
Problem reported by John D. Baker on current-users@
To generate a diff of this commit:
cvs rdiff -u -r1.56 -r1.57 src/sys/arch/x86/acpi/acpi_wakeup.c
cvs rdiff -u -r1.22 -r1.23 src/sys/arch/x86/x86/genfb_machdep.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/x86/acpi/acpi_wakeup.c
diff -u src/sys/arch/x86/acpi/acpi_wakeup.c:1.56 src/sys/arch/x86/acpi/acpi_wakeup.c:1.57
--- src/sys/arch/x86/acpi/acpi_wakeup.c:1.56 Mon Oct 16 17:27:02 2023
+++ src/sys/arch/x86/acpi/acpi_wakeup.c Thu Oct 19 14:59:46 2023
@@ -1,4 +1,4 @@
-/* $NetBSD: acpi_wakeup.c,v 1.56 2023/10/16 17:27:02 bouyer Exp $ */
+/* $NetBSD: acpi_wakeup.c,v 1.57 2023/10/19 14:59:46 bouyer Exp $ */
/*-
* Copyright (c) 2002, 2011 The NetBSD Foundation, Inc.
@@ -59,7 +59,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: acpi_wakeup.c,v 1.56 2023/10/16 17:27:02 bouyer Exp $");
+__KERNEL_RCSID(0, "$NetBSD: acpi_wakeup.c,v 1.57 2023/10/19 14:59:46 bouyer Exp $");
#include
#include
@@ -106,6 +106,8 @@ __KERNEL_RCSID(0, "$NetBSD: acpi_wakeup.
#ifdef XENPV
#error acpi_wakeup.c (acpi_md_vesa_modenum) users must be adapted for Xen
+#else
+int acpi_md_vesa_modenum = 0;
#endif
/* Address is also hard-coded in acpi_wakecode.S */
Index: src/sys/arch/x86/x86/genfb_machdep.c
diff -u src/sys/arch/x86/x86/genfb_machdep.c:1.22 src/sys/arch/x86/x86/genfb_machdep.c:1.23
--- src/sys/arch/x86/x86/genfb_machdep.c:1.22 Tue Oct 17 12:07:42 2023
+++ src/sys/arch/x86/x86/genfb_machdep.c Thu Oct 19 14:59:46 2023
@@ -1,4 +1,4 @@
-/* $NetBSD: genfb_machdep.c,v 1.22 2023/10/17 12:07:42 bouyer Exp $ */
+/* $NetBSD: genfb_machdep.c,v 1.23 2023/10/19 14:59:46 bouyer Exp $ */
/*-
* Copyright (c) 2009 Jared D. McNeill
@@ -31,7 +31,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: genfb_machdep.c,v 1.22 2023/10/17 12:07:42 bouyer Exp $");
+__KERNEL_RCSID(0, "$NetBSD: genfb_machdep.c,v 1.23 2023/10/19 14:59:46 bouyer Exp $");
#include
#include
@@ -64,10 +64,6 @@ __KERNEL_RCSID(0, "$NetBSD: genfb_machde
struct vcons_screen x86_genfb_console_screen;
bool x86_genfb_use_shadowfb = true;
-#if NACPICA > 0 && !defined(XENPV)
-int acpi_md_vesa_modenum = 0;
-#endif
-
static device_t x86_genfb_console_dev = NULL;
static struct wsscreen_descr x86_genfb_stdscreen = {
CVS commit: src/sys/arch/x86
Module Name:src Committed By: bouyer Date: Thu Oct 19 14:59:46 UTC 2023 Modified Files: src/sys/arch/x86/acpi: acpi_wakeup.c src/sys/arch/x86/x86: genfb_machdep.c Log Message: Move definition of acpi_md_vesa_modenum to acpi_wakeup.c; allows building kernels without framebuffer devices. Problem reported by John D. Baker on current-users@ To generate a diff of this commit: cvs rdiff -u -r1.56 -r1.57 src/sys/arch/x86/acpi/acpi_wakeup.c cvs rdiff -u -r1.22 -r1.23 src/sys/arch/x86/x86/genfb_machdep.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/x86/x86
Module Name:src
Committed By: riastradh
Date: Tue Oct 17 14:17:42 UTC 2023
Modified Files:
src/sys/arch/x86/x86: identcpu.c
Log Message:
Revert "x86: Panic early if fpu save size is too large, take 2."
Apparently this is too early to print anything useful, so it just
causes a reboot loop.
PR kern/57661
To generate a diff of this commit:
cvs rdiff -u -r1.127 -r1.128 src/sys/arch/x86/x86/identcpu.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/x86/x86/identcpu.c
diff -u src/sys/arch/x86/x86/identcpu.c:1.127 src/sys/arch/x86/x86/identcpu.c:1.128
--- src/sys/arch/x86/x86/identcpu.c:1.127 Tue Oct 17 11:12:33 2023
+++ src/sys/arch/x86/x86/identcpu.c Tue Oct 17 14:17:42 2023
@@ -1,4 +1,4 @@
-/* $NetBSD: identcpu.c,v 1.127 2023/10/17 11:12:33 riastradh Exp $ */
+/* $NetBSD: identcpu.c,v 1.128 2023/10/17 14:17:42 riastradh Exp $ */
/*-
* Copyright (c) 1999, 2000, 2001, 2006, 2007, 2008 The NetBSD Foundation, Inc.
@@ -30,7 +30,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: identcpu.c,v 1.127 2023/10/17 11:12:33 riastradh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: identcpu.c,v 1.128 2023/10/17 14:17:42 riastradh Exp $");
#include "opt_xen.h"
@@ -52,7 +52,6 @@ __KERNEL_RCSID(0, "$NetBSD: identcpu.c,v
#include
#include
#include
-#include
#include
#include
@@ -770,16 +769,8 @@ cpu_probe_fpu(struct cpu_info *ci)
/* Get features and maximum size of the save area */
x86_cpuid(0xd, descs);
- if (descs[2] > sizeof(struct fxsave)) {
- CTASSERT(offsetof(struct pcb, pcb_savefpu) < PAGE_SIZE);
- const unsigned max_fpu_save_size =
- PAGE_SIZE - offsetof(struct pcb, pcb_savefpu);
- if (descs[2] > max_fpu_save_size) {
- panic("CPU's FPU save size too large: %u > %u",
- descs[2], max_fpu_save_size);
- }
+ if (descs[2] > sizeof(struct fxsave))
x86_fpu_save_size = descs[2];
- }
x86_xsave_features = (uint64_t)descs[3] << 32 | descs[0];
CVS commit: src/sys/arch/x86/x86
Module Name:src Committed By: riastradh Date: Tue Oct 17 14:17:42 UTC 2023 Modified Files: src/sys/arch/x86/x86: identcpu.c Log Message: Revert "x86: Panic early if fpu save size is too large, take 2." Apparently this is too early to print anything useful, so it just causes a reboot loop. PR kern/57661 To generate a diff of this commit: cvs rdiff -u -r1.127 -r1.128 src/sys/arch/x86/x86/identcpu.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/x86/x86
Module Name:src Committed By: riastradh Date: Tue Oct 17 11:12:33 UTC 2023 Modified Files: src/sys/arch/x86/x86: identcpu.c Log Message: x86: Panic early if fpu save size is too large, take 2. This shouldn't break any existing systems (for real this time), but it should make the failure mode more obvious on systems that are already broken. PR kern/57661 XXX pullup-10 XXX pullup-9 XXX pullup-8 To generate a diff of this commit: cvs rdiff -u -r1.126 -r1.127 src/sys/arch/x86/x86/identcpu.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/x86/x86
Module Name:src
Committed By: riastradh
Date: Tue Oct 17 11:12:33 UTC 2023
Modified Files:
src/sys/arch/x86/x86: identcpu.c
Log Message:
x86: Panic early if fpu save size is too large, take 2.
This shouldn't break any existing systems (for real this time), but
it should make the failure mode more obvious on systems that are
already broken.
PR kern/57661
XXX pullup-10
XXX pullup-9
XXX pullup-8
To generate a diff of this commit:
cvs rdiff -u -r1.126 -r1.127 src/sys/arch/x86/x86/identcpu.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/x86/x86/identcpu.c
diff -u src/sys/arch/x86/x86/identcpu.c:1.126 src/sys/arch/x86/x86/identcpu.c:1.127
--- src/sys/arch/x86/x86/identcpu.c:1.126 Tue Oct 17 11:11:49 2023
+++ src/sys/arch/x86/x86/identcpu.c Tue Oct 17 11:12:33 2023
@@ -1,4 +1,4 @@
-/* $NetBSD: identcpu.c,v 1.126 2023/10/17 11:11:49 riastradh Exp $ */
+/* $NetBSD: identcpu.c,v 1.127 2023/10/17 11:12:33 riastradh Exp $ */
/*-
* Copyright (c) 1999, 2000, 2001, 2006, 2007, 2008 The NetBSD Foundation, Inc.
@@ -30,7 +30,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: identcpu.c,v 1.126 2023/10/17 11:11:49 riastradh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: identcpu.c,v 1.127 2023/10/17 11:12:33 riastradh Exp $");
#include "opt_xen.h"
@@ -52,6 +52,7 @@ __KERNEL_RCSID(0, "$NetBSD: identcpu.c,v
#include
#include
#include
+#include
#include
#include
@@ -769,8 +770,16 @@ cpu_probe_fpu(struct cpu_info *ci)
/* Get features and maximum size of the save area */
x86_cpuid(0xd, descs);
- if (descs[2] > sizeof(struct fxsave))
+ if (descs[2] > sizeof(struct fxsave)) {
+ CTASSERT(offsetof(struct pcb, pcb_savefpu) < PAGE_SIZE);
+ const unsigned max_fpu_save_size =
+ PAGE_SIZE - offsetof(struct pcb, pcb_savefpu);
+ if (descs[2] > max_fpu_save_size) {
+ panic("CPU's FPU save size too large: %u > %u",
+ descs[2], max_fpu_save_size);
+ }
x86_fpu_save_size = descs[2];
+ }
x86_xsave_features = (uint64_t)descs[3] << 32 | descs[0];
CVS commit: src/sys/arch/x86/x86
Module Name:src
Committed By: riastradh
Date: Tue Oct 17 11:11:49 UTC 2023
Modified Files:
src/sys/arch/x86/x86: identcpu.c
Log Message:
x86: Remove incomplete fpu save size check.
Will fix it later, but this makes pullups easier.
To generate a diff of this commit:
cvs rdiff -u -r1.125 -r1.126 src/sys/arch/x86/x86/identcpu.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/x86/x86/identcpu.c
diff -u src/sys/arch/x86/x86/identcpu.c:1.125 src/sys/arch/x86/x86/identcpu.c:1.126
--- src/sys/arch/x86/x86/identcpu.c:1.125 Sun Oct 15 16:11:22 2023
+++ src/sys/arch/x86/x86/identcpu.c Tue Oct 17 11:11:49 2023
@@ -1,4 +1,4 @@
-/* $NetBSD: identcpu.c,v 1.125 2023/10/15 16:11:22 riastradh Exp $ */
+/* $NetBSD: identcpu.c,v 1.126 2023/10/17 11:11:49 riastradh Exp $ */
/*-
* Copyright (c) 1999, 2000, 2001, 2006, 2007, 2008 The NetBSD Foundation, Inc.
@@ -30,7 +30,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: identcpu.c,v 1.125 2023/10/15 16:11:22 riastradh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: identcpu.c,v 1.126 2023/10/17 11:11:49 riastradh Exp $");
#include "opt_xen.h"
@@ -769,15 +769,8 @@ cpu_probe_fpu(struct cpu_info *ci)
/* Get features and maximum size of the save area */
x86_cpuid(0xd, descs);
- if (descs[2] > sizeof(struct fxsave)) {
-#if 0/* XXX breaks boot because of pcb abuse */
- if (descs[2] > sizeof(union savefpu)) {
- panic("CPU's FPU save size too large: %u > %zu",
- descs[2], sizeof(union savefpu));
- }
-#endif
+ if (descs[2] > sizeof(struct fxsave))
x86_fpu_save_size = descs[2];
- }
x86_xsave_features = (uint64_t)descs[3] << 32 | descs[0];
CVS commit: src/sys/arch/x86/x86
Module Name:src Committed By: riastradh Date: Tue Oct 17 11:11:49 UTC 2023 Modified Files: src/sys/arch/x86/x86: identcpu.c Log Message: x86: Remove incomplete fpu save size check. Will fix it later, but this makes pullups easier. To generate a diff of this commit: cvs rdiff -u -r1.125 -r1.126 src/sys/arch/x86/x86/identcpu.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/x86
Module Name:src
Committed By: bouyer
Date: Mon Oct 16 17:27:03 UTC 2023
Modified Files:
src/sys/arch/x86/acpi: acpi_machdep.c acpi_wakeup.c
src/sys/arch/x86/include: genfb_machdep.h
src/sys/arch/x86/pci: pci_machdep.c
src/sys/arch/x86/x86: genfb_machdep.c hyperv.c
Log Message:
Declare
int acpi_md_vesa_modenum;
int acpi_md_vbios_reset;
struct vcons_screen x86_genfb_console_screen;
in genfb_machdep.h instead of locally as extern in various .c files.
To generate a diff of this commit:
cvs rdiff -u -r1.35 -r1.36 src/sys/arch/x86/acpi/acpi_machdep.c
cvs rdiff -u -r1.55 -r1.56 src/sys/arch/x86/acpi/acpi_wakeup.c
cvs rdiff -u -r1.5 -r1.6 src/sys/arch/x86/include/genfb_machdep.h
cvs rdiff -u -r1.95 -r1.96 src/sys/arch/x86/pci/pci_machdep.c
cvs rdiff -u -r1.20 -r1.21 src/sys/arch/x86/x86/genfb_machdep.c
cvs rdiff -u -r1.15 -r1.16 src/sys/arch/x86/x86/hyperv.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/x86/acpi/acpi_machdep.c
diff -u src/sys/arch/x86/acpi/acpi_machdep.c:1.35 src/sys/arch/x86/acpi/acpi_machdep.c:1.36
--- src/sys/arch/x86/acpi/acpi_machdep.c:1.35 Tue Jan 24 09:35:20 2023
+++ src/sys/arch/x86/acpi/acpi_machdep.c Mon Oct 16 17:27:02 2023
@@ -1,4 +1,4 @@
-/* $NetBSD: acpi_machdep.c,v 1.35 2023/01/24 09:35:20 riastradh Exp $ */
+/* $NetBSD: acpi_machdep.c,v 1.36 2023/10/16 17:27:02 bouyer Exp $ */
/*
* Copyright 2001 Wasabi Systems, Inc.
@@ -40,7 +40,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: acpi_machdep.c,v 1.35 2023/01/24 09:35:20 riastradh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: acpi_machdep.c,v 1.36 2023/10/16 17:27:02 bouyer Exp $");
#include
#include
@@ -72,6 +72,7 @@ __KERNEL_RCSID(0, "$NetBSD: acpi_machdep
#include
#include
+#include
#include "ioapic.h"
@@ -594,6 +595,8 @@ acpi_md_callback(struct acpi_softc *sc)
}
#ifndef XENPV
+int acpi_md_vbios_reset = 0;
+
void
device_acpi_register(device_t dev, void *aux)
{
@@ -609,8 +612,6 @@ device_acpi_register(device_t dev, void
device_is_isa = device_is_a(parent, "isa");
if (device_is_vga && (device_is_pci || device_is_isa)) {
- extern int acpi_md_vbios_reset;
-
acpi_md_vbios_reset = VBIOS_RESET_DEFAULT;
}
}
Index: src/sys/arch/x86/acpi/acpi_wakeup.c
diff -u src/sys/arch/x86/acpi/acpi_wakeup.c:1.55 src/sys/arch/x86/acpi/acpi_wakeup.c:1.56
--- src/sys/arch/x86/acpi/acpi_wakeup.c:1.55 Fri Aug 25 08:05:18 2023
+++ src/sys/arch/x86/acpi/acpi_wakeup.c Mon Oct 16 17:27:02 2023
@@ -1,4 +1,4 @@
-/* $NetBSD: acpi_wakeup.c,v 1.55 2023/08/25 08:05:18 riastradh Exp $ */
+/* $NetBSD: acpi_wakeup.c,v 1.56 2023/10/16 17:27:02 bouyer Exp $ */
/*-
* Copyright (c) 2002, 2011 The NetBSD Foundation, Inc.
@@ -59,7 +59,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: acpi_wakeup.c,v 1.55 2023/08/25 08:05:18 riastradh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: acpi_wakeup.c,v 1.56 2023/10/16 17:27:02 bouyer Exp $");
#include
#include
@@ -98,6 +98,7 @@ __KERNEL_RCSID(0, "$NetBSD: acpi_wakeup.
#include
#include
#include
+#include
#include "opt_vga.h"
@@ -111,8 +112,6 @@ __KERNEL_RCSID(0, "$NetBSD: acpi_wakeup.
static paddr_t acpi_wakeup_paddr = 3 * PAGE_SIZE;
static vaddr_t acpi_wakeup_vaddr;
-int acpi_md_vbios_reset = 0; /* Referenced by dev/pci/vga_pci.c */
-int acpi_md_vesa_modenum = 0; /* Referenced by arch/x86/x86/genfb_machdep.c */
static int acpi_md_beep_on_reset = 0;
static int acpi_md_s4bios(void);
Index: src/sys/arch/x86/include/genfb_machdep.h
diff -u src/sys/arch/x86/include/genfb_machdep.h:1.5 src/sys/arch/x86/include/genfb_machdep.h:1.6
--- src/sys/arch/x86/include/genfb_machdep.h:1.5 Thu Jan 28 01:57:31 2021
+++ src/sys/arch/x86/include/genfb_machdep.h Mon Oct 16 17:27:02 2023
@@ -1,4 +1,4 @@
-/* $NetBSD: genfb_machdep.h,v 1.5 2021/01/28 01:57:31 jmcneill Exp $ */
+/* $NetBSD: genfb_machdep.h,v 1.6 2023/10/16 17:27:02 bouyer Exp $ */
/*-
* Copyright (c) 2009 Jared D. McNeill
@@ -34,4 +34,8 @@ int x86_genfb_cnattach(void);
void x86_genfb_set_console_dev(device_t);
void x86_genfb_ddb_trap_callback(int);
+extern int acpi_md_vesa_modenum;
+extern int acpi_md_vbios_reset;
+extern struct vcons_screen x86_genfb_console_screen;
+
#endif /* !_X86_GENFB_MACHDEP_H */
Index: src/sys/arch/x86/pci/pci_machdep.c
diff -u src/sys/arch/x86/pci/pci_machdep.c:1.95 src/sys/arch/x86/pci/pci_machdep.c:1.96
--- src/sys/arch/x86/pci/pci_machdep.c:1.95 Fri Aug 25 08:05:18 2023
+++ src/sys/arch/x86/pci/pci_machdep.c Mon Oct 16 17:27:02 2023
@@ -1,4 +1,4 @@
-/* $NetBSD: pci_machdep.c,v 1.95 2023/08/25 08:05:18 riastradh Exp $ */
+/* $NetBSD: pci_machdep.c,v 1.96 2023/10/16 17:27:02 bouyer Exp $ */
/*-
* Copyright (c) 1997, 1998 The NetBSD Foundation, Inc.
@@ -73,7 +73,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: pci_machdep.c,v 1.95 2023/08/25 08:05:18 riastradh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: pci_machdep.c,v 1.96
CVS commit: src/sys/arch/x86
Module Name:src Committed By: bouyer Date: Mon Oct 16 17:27:03 UTC 2023 Modified Files: src/sys/arch/x86/acpi: acpi_machdep.c acpi_wakeup.c src/sys/arch/x86/include: genfb_machdep.h src/sys/arch/x86/pci: pci_machdep.c src/sys/arch/x86/x86: genfb_machdep.c hyperv.c Log Message: Declare int acpi_md_vesa_modenum; int acpi_md_vbios_reset; struct vcons_screen x86_genfb_console_screen; in genfb_machdep.h instead of locally as extern in various .c files. To generate a diff of this commit: cvs rdiff -u -r1.35 -r1.36 src/sys/arch/x86/acpi/acpi_machdep.c cvs rdiff -u -r1.55 -r1.56 src/sys/arch/x86/acpi/acpi_wakeup.c cvs rdiff -u -r1.5 -r1.6 src/sys/arch/x86/include/genfb_machdep.h cvs rdiff -u -r1.95 -r1.96 src/sys/arch/x86/pci/pci_machdep.c cvs rdiff -u -r1.20 -r1.21 src/sys/arch/x86/x86/genfb_machdep.c cvs rdiff -u -r1.15 -r1.16 src/sys/arch/x86/x86/hyperv.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/x86/x86
Module Name:src
Committed By: riastradh
Date: Sun Oct 15 16:11:22 UTC 2023
Modified Files:
src/sys/arch/x86/x86: identcpu.c
Log Message:
x86: Disable savefpu size check for now.
This is apparently so broken that the error check for what should
have been a safe size fails, which is breaking boot on x86 all the
way back to Sandy Bridge at this point. Grrr.
We need to expand savefpu so that it supports the maximum size
instead.
To generate a diff of this commit:
cvs rdiff -u -r1.124 -r1.125 src/sys/arch/x86/x86/identcpu.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/x86/x86/identcpu.c
diff -u src/sys/arch/x86/x86/identcpu.c:1.124 src/sys/arch/x86/x86/identcpu.c:1.125
--- src/sys/arch/x86/x86/identcpu.c:1.124 Sun Oct 15 13:13:22 2023
+++ src/sys/arch/x86/x86/identcpu.c Sun Oct 15 16:11:22 2023
@@ -1,4 +1,4 @@
-/* $NetBSD: identcpu.c,v 1.124 2023/10/15 13:13:22 riastradh Exp $ */
+/* $NetBSD: identcpu.c,v 1.125 2023/10/15 16:11:22 riastradh Exp $ */
/*-
* Copyright (c) 1999, 2000, 2001, 2006, 2007, 2008 The NetBSD Foundation, Inc.
@@ -30,7 +30,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: identcpu.c,v 1.124 2023/10/15 13:13:22 riastradh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: identcpu.c,v 1.125 2023/10/15 16:11:22 riastradh Exp $");
#include "opt_xen.h"
@@ -770,10 +770,12 @@ cpu_probe_fpu(struct cpu_info *ci)
/* Get features and maximum size of the save area */
x86_cpuid(0xd, descs);
if (descs[2] > sizeof(struct fxsave)) {
+#if 0/* XXX breaks boot because of pcb abuse */
if (descs[2] > sizeof(union savefpu)) {
panic("CPU's FPU save size too large: %u > %zu",
descs[2], sizeof(union savefpu));
}
+#endif
x86_fpu_save_size = descs[2];
}
CVS commit: src/sys/arch/x86/x86
Module Name:src Committed By: riastradh Date: Sun Oct 15 16:11:22 UTC 2023 Modified Files: src/sys/arch/x86/x86: identcpu.c Log Message: x86: Disable savefpu size check for now. This is apparently so broken that the error check for what should have been a safe size fails, which is breaking boot on x86 all the way back to Sandy Bridge at this point. Grrr. We need to expand savefpu so that it supports the maximum size instead. To generate a diff of this commit: cvs rdiff -u -r1.124 -r1.125 src/sys/arch/x86/x86/identcpu.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/x86/x86
Module Name:src
Committed By: riastradh
Date: Sun Oct 15 13:13:22 UTC 2023
Modified Files:
src/sys/arch/x86/x86: identcpu.c
Log Message:
x86: Panic if cpuid's fpu save size is larger than we support.
Ideally this wouldn't panic, but the alternative right now is to
crash in a memset later -- or silently corrupt kernel memory -- so
this doesn't make the situation worse than it was before.
PR kern/57661
XXX pullup-10
XXX pullup-9
XXX pullup-8
To generate a diff of this commit:
cvs rdiff -u -r1.123 -r1.124 src/sys/arch/x86/x86/identcpu.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/x86/x86/identcpu.c
diff -u src/sys/arch/x86/x86/identcpu.c:1.123 src/sys/arch/x86/x86/identcpu.c:1.124
--- src/sys/arch/x86/x86/identcpu.c:1.123 Thu Oct 7 13:04:18 2021
+++ src/sys/arch/x86/x86/identcpu.c Sun Oct 15 13:13:22 2023
@@ -1,4 +1,4 @@
-/* $NetBSD: identcpu.c,v 1.123 2021/10/07 13:04:18 msaitoh Exp $ */
+/* $NetBSD: identcpu.c,v 1.124 2023/10/15 13:13:22 riastradh Exp $ */
/*-
* Copyright (c) 1999, 2000, 2001, 2006, 2007, 2008 The NetBSD Foundation, Inc.
@@ -30,7 +30,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: identcpu.c,v 1.123 2021/10/07 13:04:18 msaitoh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: identcpu.c,v 1.124 2023/10/15 13:13:22 riastradh Exp $");
#include "opt_xen.h"
@@ -769,8 +769,13 @@ cpu_probe_fpu(struct cpu_info *ci)
/* Get features and maximum size of the save area */
x86_cpuid(0xd, descs);
- if (descs[2] > sizeof(struct fxsave))
+ if (descs[2] > sizeof(struct fxsave)) {
+ if (descs[2] > sizeof(union savefpu)) {
+ panic("CPU's FPU save size too large: %u > %zu",
+ descs[2], sizeof(union savefpu));
+ }
x86_fpu_save_size = descs[2];
+ }
x86_xsave_features = (uint64_t)descs[3] << 32 | descs[0];
CVS commit: src/sys/arch/x86/x86
Module Name:src Committed By: riastradh Date: Sun Oct 15 13:13:22 UTC 2023 Modified Files: src/sys/arch/x86/x86: identcpu.c Log Message: x86: Panic if cpuid's fpu save size is larger than we support. Ideally this wouldn't panic, but the alternative right now is to crash in a memset later -- or silently corrupt kernel memory -- so this doesn't make the situation worse than it was before. PR kern/57661 XXX pullup-10 XXX pullup-9 XXX pullup-8 To generate a diff of this commit: cvs rdiff -u -r1.123 -r1.124 src/sys/arch/x86/x86/identcpu.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/x86/include
Module Name:src Committed By: christos Date: Sat Sep 16 13:37:10 UTC 2023 Modified Files: src/sys/arch/x86/include: ieee.h Log Message: protect against multiple inclusion To generate a diff of this commit: cvs rdiff -u -r1.11 -r1.12 src/sys/arch/x86/include/ieee.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/x86/include
Module Name:src
Committed By: christos
Date: Sat Sep 16 13:37:10 UTC 2023
Modified Files:
src/sys/arch/x86/include: ieee.h
Log Message:
protect against multiple inclusion
To generate a diff of this commit:
cvs rdiff -u -r1.11 -r1.12 src/sys/arch/x86/include/ieee.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/x86/include/ieee.h
diff -u src/sys/arch/x86/include/ieee.h:1.11 src/sys/arch/x86/include/ieee.h:1.12
--- src/sys/arch/x86/include/ieee.h:1.11 Wed Sep 15 12:11:28 2010
+++ src/sys/arch/x86/include/ieee.h Sat Sep 16 09:37:10 2023
@@ -1,4 +1,4 @@
-/* $NetBSD: ieee.h,v 1.11 2010/09/15 16:11:28 christos Exp $ */
+/* $NetBSD: ieee.h,v 1.12 2023/09/16 13:37:10 christos Exp $ */
/*
* Copyright (c) 1992, 1993
@@ -39,6 +39,8 @@
*
* @(#)ieee.h 8.1 (Berkeley) 6/11/93
*/
+#ifndef _X86_IEEE_H_
+#define _X86_IEEE_H_
/*
* ieee.h defines the machine-dependent layout of the machine's IEEE
@@ -115,3 +117,5 @@ union ieee_ext_u {
#define LDBL_NBIT 0x8000
#define mask_nbit_l(u) ((u).extu_frach &= ~LDBL_NBIT)
+
+#endif /* _X86_IEEE_H_ */
CVS commit: src/sys/arch/x86/x86
Module Name:src Committed By: ad Date: Sat Sep 9 18:37:03 UTC 2023 Modified Files: src/sys/arch/x86/x86: tsc.c Log Message: tsc_get_timecount(): cover the backwards check by DIAGNOSTIC since it has proven the point by now. To generate a diff of this commit: cvs rdiff -u -r1.57 -r1.58 src/sys/arch/x86/x86/tsc.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/x86/x86
Module Name:src
Committed By: ad
Date: Sat Sep 9 18:37:03 UTC 2023
Modified Files:
src/sys/arch/x86/x86: tsc.c
Log Message:
tsc_get_timecount(): cover the backwards check by DIAGNOSTIC since it has
proven the point by now.
To generate a diff of this commit:
cvs rdiff -u -r1.57 -r1.58 src/sys/arch/x86/x86/tsc.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/x86/x86/tsc.c
diff -u src/sys/arch/x86/x86/tsc.c:1.57 src/sys/arch/x86/x86/tsc.c:1.58
--- src/sys/arch/x86/x86/tsc.c:1.57 Fri Oct 15 18:12:48 2021
+++ src/sys/arch/x86/x86/tsc.c Sat Sep 9 18:37:03 2023
@@ -1,4 +1,4 @@
-/* $NetBSD: tsc.c,v 1.57 2021/10/15 18:12:48 jmcneill Exp $ */
+/* $NetBSD: tsc.c,v 1.58 2023/09/09 18:37:03 ad Exp $ */
/*-
* Copyright (c) 2008, 2020 The NetBSD Foundation, Inc.
@@ -27,7 +27,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: tsc.c,v 1.57 2021/10/15 18:12:48 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: tsc.c,v 1.58 2023/09/09 18:37:03 ad Exp $");
#include
#include
@@ -406,7 +406,7 @@ tsc_delay(unsigned int us)
static u_int
tsc_get_timecount(struct timecounter *tc)
{
-#ifdef _LP64 /* requires atomic 64-bit store */
+#if defined(_LP64) && defined(DIAGNOSTIC) /* requires atomic 64-bit store */
static __cpu_simple_lock_t lock = __SIMPLELOCK_UNLOCKED;
static int lastwarn;
uint64_t cur, prev;
@@ -421,19 +421,17 @@ tsc_get_timecount(struct timecounter *tc
*/
prev = l->l_md.md_tsc;
cur = cpu_counter();
- if (__predict_false(cur < prev)) {
- if ((cur >> 63) == (prev >> 63) &&
- __cpu_simple_lock_try()) {
- ticks = getticks();
- if (ticks - lastwarn >= hz) {
-printf(
-"WARNING: TSC time went backwards by %u - "
-"change sysctl(7) kern.timecounter?\n",
-(unsigned)(prev - cur));
-lastwarn = ticks;
- }
- __cpu_simple_unlock();
+ if (__predict_false(cur < prev) && (cur >> 63) == (prev >> 63) &&
+ __cpu_simple_lock_try()) {
+ ticks = getticks();
+ if (ticks - lastwarn >= hz) {
+ printf(
+ "WARNING: %s TSC went backwards by %u - "
+ "change sysctl(7) kern.timecounter?\n",
+ cpu_name(curcpu()), (unsigned)(prev - cur));
+ lastwarn = ticks;
}
+ __cpu_simple_unlock();
}
l->l_md.md_tsc = cur;
return (uint32_t)cur;
CVS commit: src/sys/arch/x86/x86
Module Name:src Committed By: msaitoh Date: Mon Aug 7 09:27:14 UTC 2023 Modified Files: src/sys/arch/x86/x86: procfs_machdep.c Log Message: Update /proc/cpuinfo. - Move "ssbd" to an unused Linux mapping. - Update unused Linux mappings. To generate a diff of this commit: cvs rdiff -u -r1.47 -r1.48 src/sys/arch/x86/x86/procfs_machdep.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/x86/x86
Module Name:src
Committed By: msaitoh
Date: Mon Aug 7 09:27:14 UTC 2023
Modified Files:
src/sys/arch/x86/x86: procfs_machdep.c
Log Message:
Update /proc/cpuinfo.
- Move "ssbd" to an unused Linux mapping.
- Update unused Linux mappings.
To generate a diff of this commit:
cvs rdiff -u -r1.47 -r1.48 src/sys/arch/x86/x86/procfs_machdep.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/x86/x86/procfs_machdep.c
diff -u src/sys/arch/x86/x86/procfs_machdep.c:1.47 src/sys/arch/x86/x86/procfs_machdep.c:1.48
--- src/sys/arch/x86/x86/procfs_machdep.c:1.47 Tue Apr 11 02:42:15 2023
+++ src/sys/arch/x86/x86/procfs_machdep.c Mon Aug 7 09:27:14 2023
@@ -1,4 +1,4 @@
-/* $NetBSD: procfs_machdep.c,v 1.47 2023/04/11 02:42:15 msaitoh Exp $ */
+/* $NetBSD: procfs_machdep.c,v 1.48 2023/08/07 09:27:14 msaitoh Exp $ */
/*
* Copyright (c) 2001 Wasabi Systems, Inc.
@@ -42,7 +42,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: procfs_machdep.c,v 1.47 2023/04/11 02:42:15 msaitoh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: procfs_machdep.c,v 1.48 2023/08/07 09:27:14 msaitoh Exp $");
#include
#include
@@ -113,14 +113,15 @@ static const char * const x86_features[]
"perfctr_llc", "mwaitx", NULL, NULL},
{ /* (7) Linux mapping */
- NULL, NULL, "cpb", "ebp", NULL, "pln", "pts", "dtherm",
- "hw_pstate", "proc_feedback", NULL, NULL,
- NULL, NULL, NULL, NULL,
- NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
- NULL, "ibrs", "ibpb", "stibp", NULL, NULL, NULL, NULL},
+ "ring3mwait", "cpuid_fault", "cpb", "epb",
+ "cat_l3", "cat_l2", "cdp_l3", "invpcid_single",
+ "hw_pstate", "proc_feedback", NULL, "pti",
+ NULL, NULL, "intel_ppin", "cdp_l2",
+ NULL, "ssbd", "mba", NULL, "perfmon_v2", NULL, NULL, NULL,
+ NULL, "ibrs", "ibpb", "stibp", NULL, NULL, "ibrs_enhanced", NULL},
{ /* (8) Linux mapping */
- "tpr_shadow", "vnmi", "flexpriority", "ept", "vpid", NULL, NULL, NULL,
+ "tpr_shadow", "flexpriority", "ept", "vpid", NULL, NULL, NULL, NULL,
NULL, NULL, NULL, NULL, NULL, NULL, NULL, "vmmcall",
NULL, "ept_ad", NULL, NULL, NULL, NULL, "tdx_guest", NULL,
NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL},
@@ -195,7 +196,7 @@ static const char * const x86_features[]
"tsxldtrk", NULL, "pconfig", "arch_lbr",
"ibt", NULL, "amx_bf16", "avx512_fp16",
"amx_tile", "amx_int8", NULL, NULL,
- "flush_l1d", "arch_capabilities", NULL, "ssbd"},
+ "flush_l1d", "arch_capabilities", NULL, NULL},
{ /* (19) AMD 0x801f eax */
"sme", "sev", NULL, "sev_es", NULL, NULL, NULL, NULL,
CVS commit: src/sys/arch/x86/pci
Module Name:src Committed By: msaitoh Date: Mon Aug 7 06:23:40 UTC 2023 Modified Files: src/sys/arch/x86/pci: pci_machdep.c Log Message: Fix detection of availability of MSI/MSI-X on some systems. Try to find all functions on bus 0, device 0 to find a PCI host bridge. Some CPU's host bridge is at 0:0.4. Tested by Intel Snow Ridge. To generate a diff of this commit: cvs rdiff -u -r1.93 -r1.94 src/sys/arch/x86/pci/pci_machdep.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/x86/pci
Module Name:src
Committed By: msaitoh
Date: Mon Aug 7 06:23:40 UTC 2023
Modified Files:
src/sys/arch/x86/pci: pci_machdep.c
Log Message:
Fix detection of availability of MSI/MSI-X on some systems.
Try to find all functions on bus 0, device 0 to find a PCI host bridge.
Some CPU's host bridge is at 0:0.4. Tested by Intel Snow Ridge.
To generate a diff of this commit:
cvs rdiff -u -r1.93 -r1.94 src/sys/arch/x86/pci/pci_machdep.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/x86/pci/pci_machdep.c
diff -u src/sys/arch/x86/pci/pci_machdep.c:1.93 src/sys/arch/x86/pci/pci_machdep.c:1.94
--- src/sys/arch/x86/pci/pci_machdep.c:1.93 Tue Sep 6 01:44:24 2022
+++ src/sys/arch/x86/pci/pci_machdep.c Mon Aug 7 06:23:39 2023
@@ -1,4 +1,4 @@
-/* $NetBSD: pci_machdep.c,v 1.93 2022/09/06 01:44:24 msaitoh Exp $ */
+/* $NetBSD: pci_machdep.c,v 1.94 2023/08/07 06:23:39 msaitoh Exp $ */
/*-
* Copyright (c) 1997, 1998 The NetBSD Foundation, Inc.
@@ -73,7 +73,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: pci_machdep.c,v 1.93 2022/09/06 01:44:24 msaitoh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: pci_machdep.c,v 1.94 2023/08/07 06:23:39 msaitoh Exp $");
#include
#include
@@ -485,6 +485,8 @@ pci_attach_hook(device_t parent, device_
pci_chipset_tag_t pc = pba->pba_pc;
pcitag_t tag;
pcireg_t id, class;
+ int i;
+ bool havehb = false;
#endif
if (pba->pba_bus == 0)
@@ -502,19 +504,25 @@ pci_attach_hook(device_t parent, device_
#ifdef __HAVE_PCI_MSI_MSIX
/*
* In order to decide whether the system supports MSI we look
- * at the host bridge, which should be device 0 function 0 on
- * bus 0. It is better to not enable MSI on systems that
+ * at the host bridge, which should be device 0 on bus 0.
+ * It is better to not enable MSI on systems that
* support it than the other way around, so be conservative
* here. So we don't enable MSI if we don't find a host
* bridge there. We also deliberately don't enable MSI on
* chipsets from low-end manifacturers like VIA and SiS.
*/
- tag = pci_make_tag(pc, 0, 0, 0);
- id = pci_conf_read(pc, tag, PCI_ID_REG);
- class = pci_conf_read(pc, tag, PCI_CLASS_REG);
-
- if (PCI_CLASS(class) != PCI_CLASS_BRIDGE ||
- PCI_SUBCLASS(class) != PCI_SUBCLASS_BRIDGE_HOST)
+ for (i = 0; i <= 7; i++) {
+ tag = pci_make_tag(pc, 0, 0, i);
+ id = pci_conf_read(pc, tag, PCI_ID_REG);
+ class = pci_conf_read(pc, tag, PCI_CLASS_REG);
+
+ if (PCI_CLASS(class) == PCI_CLASS_BRIDGE &&
+ PCI_SUBCLASS(class) == PCI_SUBCLASS_BRIDGE_HOST) {
+ havehb = true;
+ break;
+ }
+ }
+ if (havehb == false)
return;
/* VMware and KVM use old chipset, but they can use MSI/MSI-X */
CVS commit: src/sys/arch/x86/x86
Module Name:src
Committed By: mrg
Date: Fri Jul 28 05:02:13 UTC 2023
Modified Files:
src/sys/arch/x86/x86: errata.c
Log Message:
x86: make the CPUID list for errata be far less confusing
the 0x8001 CPUID result needs some parsing to match against
actual family/model/stepping values. 4-bit 'family' values of
15 or 6 change how to parse the 4-bit extended model and 8-bit
extended family value - for family 6 or 15, the extended model
bits (4) are concatenated with the base 4-bits to create an
8-bit value, and for family 15, the family value is addition
of the family value and the 8-bit extended-family value, giving
a range of 0 to 15 + 0xff aka 270.
use a CPUREV(family, model, stepping) macro that builds the
relevant bit-representation of a CPUID, making it far easier
to understand what each entry means, and to add new ones too.
i have confirmed that the emitted cpurevs[] array has the same
values before/after this change, ie, NFCI or observed.
To generate a diff of this commit:
cvs rdiff -u -r1.32 -r1.33 src/sys/arch/x86/x86/errata.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/x86/x86/errata.c
diff -u src/sys/arch/x86/x86/errata.c:1.32 src/sys/arch/x86/x86/errata.c:1.33
--- src/sys/arch/x86/x86/errata.c:1.32 Wed Jul 26 00:19:04 2023
+++ src/sys/arch/x86/x86/errata.c Fri Jul 28 05:02:13 2023
@@ -1,4 +1,4 @@
-/* $NetBSD: errata.c,v 1.32 2023/07/26 00:19:04 mrg Exp $ */
+/* $NetBSD: errata.c,v 1.33 2023/07/28 05:02:13 mrg Exp $ */
/*-
* Copyright (c) 2007 The NetBSD Foundation, Inc.
@@ -47,7 +47,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: errata.c,v 1.32 2023/07/26 00:19:04 mrg Exp $");
+__KERNEL_RCSID(0, "$NetBSD: errata.c,v 1.33 2023/07/28 05:02:13 mrg Exp $");
#include
#include
@@ -68,40 +68,118 @@ typedef struct errata {
uint64_t e_data2;
} errata_t;
+/* These names match names from various AMD Errata/Revision Guides. */
typedef enum cpurev {
+ /* K8 / Family 0Fh */
BH_E4, CH_CG, CH_D0, DH_CG, DH_D0, DH_E3, DH_E6, JH_E1,
JH_E6, SH_B0, SH_B3, SH_C0, SH_CG, SH_D0, SH_E4, SH_E5,
+
+ /* K10 / Family 10h */
DR_BA, DR_B2, DR_B3, RB_C2, RB_C3, BL_C2, BL_C3, DA_C2,
- DA_C3, HY_D0, HY_D1, HY_D1_G34R1, PH_E0, LN_B0, KB_A1,
- ML_A1, ZP_B1, ZP_B2, PiR_B2, Rome_B0, Z2_XB, Z2_Ren,
- Z2_Luc, Z2_Mat, Z2_VG, Z2_Men, Milan_B1, Milan_B2, Genoa_B1,
+ DA_C3, HY_D0, HY_D1, HY_D1_G34R1, PH_E0,
+
+ /* Llano / Family 12h */
+ LN_B0,
+
+ /* Jaguar / Family 16h */
+ KB_A1, ML_A1,
+
+ /* Zen/Zen+/Zen2 / Family 17h */
+ ZP_B1, ZP_B2, PiR_B2, Rome_B0,
+
+ /* XXX client Zen2 names aren't known yet. */
+ Z2_XB, Z2_Ren, Z2_Luc, Z2_Mat, Z2_VG, Z2_Men,
+
+ /* Zen3/Zen4 / Family 19h */
+ Milan_B1, Milan_B2, Genoa_B1,
OINK
} cpurev_t;
-/* These names match names from various AMD Errata/Revision Guides. */
+/*
+ * The bit-layout in the 0x8001 CPUID result is, with bit-size
+ * as the final number here:
+ *
+ *resv1_4 extfam_8 extmodel_4 resv2_4 fam_4 model_4 stepping_4
+ *
+ * The CPUREV(family,model,stepping) macro handles the mapping for
+ * family 6 and family 15 in the "fam_4" nybble, if 6 or 15, the
+ * extended model is present and is bit-concatenated, and if 15,
+ * the extended family is additional (ie, family 0x10 is 0xF in
+ * fam_4 and 0x01 in extfam_8.)
+ */
+#define CPUREV(fam,mod,step)\
+ (((fam) > 0xf ? \
+ (0xf << 8) | ((fam) - 0xf) << 20 : \
+ (fam) << 8) | \
+ (((mod) & 0xf) << 4) |\
+ (((fam) == 6 || ((fam) >= 0xf)) ? \
+ ((mod) & 0xf0) << 12 : 0) | \
+ ((step) & 0xf))
static const u_int cpurevs[] = {
- BH_E4, 0x0020fb1, CH_CG, 0xf82, CH_CG, 0xfb2,
- CH_D0, 0x0010f80, CH_D0, 0x0010fb0, DH_CG, 0xfc0,
- DH_CG, 0xfe0, DH_CG, 0xff0, DH_D0, 0x0010fc0,
- DH_D0, 0x0010ff0, DH_E3, 0x0020fc0, DH_E3, 0x0020ff0,
- DH_E6, 0x0020fc2, DH_E6, 0x0020ff2, JH_E1, 0x0020f10,
- JH_E6, 0x0020f12, JH_E6, 0x0020f32, SH_B0, 0xf40,
- SH_B3, 0xf51, SH_C0, 0xf48, SH_C0, 0xf58,
- SH_CG, 0xf4a, SH_CG, 0xf5a, SH_CG, 0xf7a,
- SH_D0, 0x0010f40, SH_D0, 0x0010f50, SH_D0, 0x0010f70,
- SH_E4, 0x0020f51, SH_E4, 0x0020f71, SH_E5, 0x0020f42,
- DR_BA, 0x0100f2a, DR_B2, 0x0100f22, DR_B3, 0x0100f23,
- RB_C2, 0x0100f42, RB_C3, 0x0100f43, BL_C2, 0x0100f52,
- BL_C3, 0x0100f53, DA_C2, 0x0100f62, DA_C3, 0x0100f63,
- HY_D0, 0x0100f80, HY_D1, 0x0100f81, HY_D1_G34R1, 0x0100f91,
- PH_E0, 0x0100fa0, LN_B0, 0x0300f10, KB_A1, 0x0700F01,
- ML_A1, 0x0730F01, ZP_B1, 0x0800F11, ZP_B2, 0x0800F12,
- PiR_B2, 0x0800F82, Rome_B0, 0x0830F10,
- /* XXX client Zen2 names aren't known yet. */
- Z2_XB, 0x0840F70, Z2_Ren, 0x0860F01, Z2_Luc, 0x0860F81,
- Z2_Mat, 0x0870F10, Z2_VG, 0x0890F02, Z2_Men, 0x08A0F00,
- Milan_B1, 0x0A00F11, Milan_B2, 0x0A00F12,
- Genoa_B1, 0x0A10F11,
+ BH_E4, CPUREV(0x0F, 0x2B, 0x1),
+ CH_CG, CPUREV(0x0F, 0x08, 0x2),
+ CH_CG, CPUREV(0x0F, 0x0B, 0x2),
+ CH_D0, CPUREV(0x0F, 0x18, 0x0),
+ CH_D0,
CVS commit: src/sys/arch/x86/x86
Module Name:src Committed By: mrg Date: Fri Jul 28 05:02:13 UTC 2023 Modified Files: src/sys/arch/x86/x86: errata.c Log Message: x86: make the CPUID list for errata be far less confusing the 0x8001 CPUID result needs some parsing to match against actual family/model/stepping values. 4-bit 'family' values of 15 or 6 change how to parse the 4-bit extended model and 8-bit extended family value - for family 6 or 15, the extended model bits (4) are concatenated with the base 4-bits to create an 8-bit value, and for family 15, the family value is addition of the family value and the 8-bit extended-family value, giving a range of 0 to 15 + 0xff aka 270. use a CPUREV(family, model, stepping) macro that builds the relevant bit-representation of a CPUID, making it far easier to understand what each entry means, and to add new ones too. i have confirmed that the emitted cpurevs[] array has the same values before/after this change, ie, NFCI or observed. To generate a diff of this commit: cvs rdiff -u -r1.32 -r1.33 src/sys/arch/x86/x86/errata.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/x86/pci
Module Name:src
Committed By: msaitoh
Date: Fri Jul 28 02:28:33 UTC 2023
Modified Files:
src/sys/arch/x86/pci: amdsmn.c
Log Message:
Add Zen4 Phoenix support.
To generate a diff of this commit:
cvs rdiff -u -r1.16 -r1.17 src/sys/arch/x86/pci/amdsmn.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/x86/pci/amdsmn.c
diff -u src/sys/arch/x86/pci/amdsmn.c:1.16 src/sys/arch/x86/pci/amdsmn.c:1.17
--- src/sys/arch/x86/pci/amdsmn.c:1.16 Sat Jan 28 12:36:52 2023
+++ src/sys/arch/x86/pci/amdsmn.c Fri Jul 28 02:28:33 2023
@@ -1,4 +1,4 @@
-/* $NetBSD: amdsmn.c,v 1.16 2023/01/28 12:36:52 msaitoh Exp $ */
+/* $NetBSD: amdsmn.c,v 1.17 2023/07/28 02:28:33 msaitoh Exp $ */
/*-
* Copyright (c) 2017, 2019 Conrad Meyer
@@ -29,7 +29,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: amdsmn.c,v 1.16 2023/01/28 12:36:52 msaitoh Exp $ ");
+__KERNEL_RCSID(0, "$NetBSD: amdsmn.c,v 1.17 2023/07/28 02:28:33 msaitoh Exp $ ");
/*
* Driver for the AMD Family 15h (model 60+) and 17h CPU
@@ -112,6 +112,11 @@ static const struct pciid {
.amdsmn_addr_reg = F17H_SMN_ADDR_REG,
.amdsmn_data_reg = F17H_SMN_DATA_REG,
},
+ {
+ .amdsmn_deviceid = PCI_PRODUCT_AMD_F19_7X_RC,
+ .amdsmn_addr_reg = F17H_SMN_ADDR_REG,
+ .amdsmn_data_reg = F17H_SMN_DATA_REG,
+ },
};
static int amdsmn_match(device_t, cfdata_t, void *);
CVS commit: src/sys/arch/x86/pci
Module Name:src Committed By: msaitoh Date: Fri Jul 28 02:28:33 UTC 2023 Modified Files: src/sys/arch/x86/pci: amdsmn.c Log Message: Add Zen4 Phoenix support. To generate a diff of this commit: cvs rdiff -u -r1.16 -r1.17 src/sys/arch/x86/pci/amdsmn.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/x86/pci
Module Name:src
Committed By: msaitoh
Date: Fri Jul 28 02:05:26 UTC 2023
Modified Files:
src/sys/arch/x86/pci: amdzentemp.c
Log Message:
Add Zen2 Mendocino APU support.
To generate a diff of this commit:
cvs rdiff -u -r1.19 -r1.20 src/sys/arch/x86/pci/amdzentemp.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/x86/pci/amdzentemp.c
diff -u src/sys/arch/x86/pci/amdzentemp.c:1.19 src/sys/arch/x86/pci/amdzentemp.c:1.20
--- src/sys/arch/x86/pci/amdzentemp.c:1.19 Fri Jul 28 00:11:15 2023
+++ src/sys/arch/x86/pci/amdzentemp.c Fri Jul 28 02:05:26 2023
@@ -1,4 +1,4 @@
-/* $NetBSD: amdzentemp.c,v 1.19 2023/07/28 00:11:15 msaitoh Exp $ */
+/* $NetBSD: amdzentemp.c,v 1.20 2023/07/28 02:05:26 msaitoh Exp $ */
/* $OpenBSD: kate.c,v 1.2 2008/03/27 04:52:03 cnst Exp $ */
/*
@@ -53,7 +53,7 @@
#include
-__KERNEL_RCSID(0, "$NetBSD: amdzentemp.c,v 1.19 2023/07/28 00:11:15 msaitoh Exp $ ");
+__KERNEL_RCSID(0, "$NetBSD: amdzentemp.c,v 1.20 2023/07/28 02:05:26 msaitoh Exp $ ");
#include
#include
@@ -370,15 +370,19 @@ amdzentemp_probe_ccd_sensors17h(struct a
{
int maxreg;
- sc->sc_ccd_offset = 0x154;
-
switch (model) {
case 0x00 ... 0x2f: /* Zen1, Zen+ */
+ sc->sc_ccd_offset = 0x154;
maxreg = 4;
break;
case 0x30 ... 0x3f: /* Zen2 TR (Castle Peak)/EPYC (Rome) */
case 0x60 ... 0x7f: /* Zen2 Ryzen (Renoir APU, Matisse) */
case 0x90 ... 0x9f: /* Zen2 Ryzen (Van Gogh APU) */
+ sc->sc_ccd_offset = 0x154;
+ maxreg = 8;
+ break;
+ case 0xa0 ... 0xaf: /* Zen2 Ryzen (Mendocino APU) */
+ sc->sc_ccd_offset = 0x300;
maxreg = 8;
break;
default:
CVS commit: src/sys/arch/x86/pci
Module Name:src Committed By: msaitoh Date: Fri Jul 28 02:05:26 UTC 2023 Modified Files: src/sys/arch/x86/pci: amdzentemp.c Log Message: Add Zen2 Mendocino APU support. To generate a diff of this commit: cvs rdiff -u -r1.19 -r1.20 src/sys/arch/x86/pci/amdzentemp.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/x86/pci
Module Name:src Committed By: msaitoh Date: Fri Jul 28 00:11:15 UTC 2023 Modified Files: src/sys/arch/x86/pci: amdzentemp.c Log Message: Add Zen4 Ryzen "Phoenix" support. To generate a diff of this commit: cvs rdiff -u -r1.18 -r1.19 src/sys/arch/x86/pci/amdzentemp.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/x86/pci/amdzentemp.c diff -u src/sys/arch/x86/pci/amdzentemp.c:1.18 src/sys/arch/x86/pci/amdzentemp.c:1.19 --- src/sys/arch/x86/pci/amdzentemp.c:1.18 Sat Jan 28 12:36:52 2023 +++ src/sys/arch/x86/pci/amdzentemp.c Fri Jul 28 00:11:15 2023 @@ -1,4 +1,4 @@ -/* $NetBSD: amdzentemp.c,v 1.18 2023/01/28 12:36:52 msaitoh Exp $ */ +/* $NetBSD: amdzentemp.c,v 1.19 2023/07/28 00:11:15 msaitoh Exp $ */ /* $OpenBSD: kate.c,v 1.2 2008/03/27 04:52:03 cnst Exp $ */ /* @@ -53,7 +53,7 @@ #include -__KERNEL_RCSID(0, "$NetBSD: amdzentemp.c,v 1.18 2023/01/28 12:36:52 msaitoh Exp $ "); +__KERNEL_RCSID(0, "$NetBSD: amdzentemp.c,v 1.19 2023/07/28 00:11:15 msaitoh Exp $ "); #include #include @@ -403,6 +403,7 @@ amdzentemp_probe_ccd_sensors19h(struct a maxreg = 8; break; case 0x60 ... 0x6f: /* Zen4 Ryzen "Raphael" */ + case 0x70 ... 0x7f: /* Zen4 Ryzen "Phoenix" */ sc->sc_ccd_offset = 0x308; maxreg = 8; break;
CVS commit: src/sys/arch/x86/pci
Module Name:src Committed By: msaitoh Date: Fri Jul 28 00:11:15 UTC 2023 Modified Files: src/sys/arch/x86/pci: amdzentemp.c Log Message: Add Zen4 Ryzen "Phoenix" support. To generate a diff of this commit: cvs rdiff -u -r1.18 -r1.19 src/sys/arch/x86/pci/amdzentemp.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/x86/include
Module Name:src Committed By: msaitoh Date: Thu Jul 27 00:34:07 UTC 2023 Modified Files: src/sys/arch/x86/include: specialreg.h Log Message: Add AMD IBPB_RET and BusLockThreshold. To generate a diff of this commit: cvs rdiff -u -r1.207 -r1.208 src/sys/arch/x86/include/specialreg.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/x86/include
Module Name:src Committed By: msaitoh Date: Thu Jul 27 00:34:07 UTC 2023 Modified Files: src/sys/arch/x86/include: specialreg.h Log Message: Add AMD IBPB_RET and BusLockThreshold. To generate a diff of this commit: cvs rdiff -u -r1.207 -r1.208 src/sys/arch/x86/include/specialreg.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/x86/include/specialreg.h diff -u src/sys/arch/x86/include/specialreg.h:1.207 src/sys/arch/x86/include/specialreg.h:1.208 --- src/sys/arch/x86/include/specialreg.h:1.207 Tue Jul 25 01:09:05 2023 +++ src/sys/arch/x86/include/specialreg.h Thu Jul 27 00:34:07 2023 @@ -1,4 +1,4 @@ -/* $NetBSD: specialreg.h,v 1.207 2023/07/25 01:09:05 mrg Exp $ */ +/* $NetBSD: specialreg.h,v 1.208 2023/07/27 00:34:07 msaitoh Exp $ */ /* * Copyright (c) 2014-2020 The NetBSD Foundation, Inc. @@ -890,6 +890,7 @@ #define CPUID_CAPEX_CPPC __BIT(27) /* Collaborative Processor Perf. Control */ #define CPUID_CAPEX_PSFD __BIT(28) /* Predictive Store Forward Dis */ #define CPUID_CAPEX_BTC_NO __BIT(29) /* Branch Type Confusion NO */ +#define CPUID_CAPEX_IBPB_RET __BIT(30) /* Clear RET address predictor */ #define CPUID_CAPEX_FLAGS "\20" \ "\1CLZERO" "\2IRPERF" "\3XSAVEERPTR" "\4INVLPGB" \ @@ -900,7 +901,7 @@ "\24IBRS_SAMEMODE" \ "\25EFER_LSMSLE_UN""\30PPIN" \ "\31SSBD" "\32VIRT_SSBD" "\33SSB_NO" "\34CPPC" \ - "\35PSFD" "\36BTC_NO" + "\35PSFD" "\36BTC_NO" "\37IBPB_RET" /* %ecx */ #define CPUID_CAPEX_PerfTscSize __BITS(17,16) /* Perf. tstamp counter size */ @@ -940,6 +941,7 @@ #define CPUID_AMD_SVM_IBSVIRT __BIT(26) /* IBS Virtualization */ #define CPUID_AMD_SVM_XLVTOFFFLTCHG __BIT(27) /* Ext LVToffset FLT changed */ #define CPUID_AMD_SVM_VMCBADRCHKCHG __BIT(28) /* VMCB addr check changed */ +#define CPUID_AMD_SVM_BUSLOCKTHRESH __BIT(29) /* Bus Lock Threshold */ #define CPUID_AMD_SVM_FLAGS "\20" \ @@ -952,7 +954,7 @@ "\21" "VGIF" "\22" "GMET" "\23x2AVIC" "\24SSSCHECK" \ "\25" "SPEC_CTRL" "\26" "ROGPT" "\30HOST_MCE_OVERRIDE" \ "\31" "TLBICTL" "\32VNMI" "\33IBSVIRT" "\34ExtLvtOffsetFaultChg" \ - "\35VmcbAddrChkChg" + "\35VmcbAddrChkChg" "\36BusLockThreshold" /* * AMD Instruction-Based Sampling Capabilities.
CVS commit: src/sys/arch/x86/x86
Module Name:src Committed By: riastradh Date: Wed Jul 26 21:45:29 UTC 2023 Modified Files: src/sys/arch/x86/x86: pmap.c Log Message: x86/pmap: Print quantities in failed assertions in pmap_load. To generate a diff of this commit: cvs rdiff -u -r1.424 -r1.425 src/sys/arch/x86/x86/pmap.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/x86/x86
Module Name:src Committed By: riastradh Date: Wed Jul 26 21:45:29 UTC 2023 Modified Files: src/sys/arch/x86/x86: pmap.c Log Message: x86/pmap: Print quantities in failed assertions in pmap_load. To generate a diff of this commit: cvs rdiff -u -r1.424 -r1.425 src/sys/arch/x86/x86/pmap.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/x86/x86/pmap.c diff -u src/sys/arch/x86/x86/pmap.c:1.424 src/sys/arch/x86/x86/pmap.c:1.425 --- src/sys/arch/x86/x86/pmap.c:1.424 Sun Jul 16 19:55:43 2023 +++ src/sys/arch/x86/x86/pmap.c Wed Jul 26 21:45:28 2023 @@ -1,4 +1,4 @@ -/* $NetBSD: pmap.c,v 1.424 2023/07/16 19:55:43 riastradh Exp $ */ +/* $NetBSD: pmap.c,v 1.425 2023/07/26 21:45:28 riastradh Exp $ */ /* * Copyright (c) 2008, 2010, 2016, 2017, 2019, 2020 The NetBSD Foundation, Inc. @@ -130,7 +130,7 @@ */ #include -__KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.424 2023/07/16 19:55:43 riastradh Exp $"); +__KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.425 2023/07/26 21:45:28 riastradh Exp $"); #include "opt_user_ldt.h" #include "opt_lockdebug.h" @@ -3574,6 +3574,8 @@ pmap_load(void) struct pmap *pmap, *oldpmap; struct lwp *l; uint64_t ncsw; + int ilevel __diagused; + u_long psl __diagused; kpreempt_disable(); retry: @@ -3587,12 +3589,12 @@ pmap_load(void) __insn_barrier(); /* should be able to take ipis. */ - KASSERT(ci->ci_ilevel < IPL_HIGH); + KASSERTMSG((ilevel = ci->ci_ilevel) < IPL_HIGH, "ilevel=%d", ilevel); #ifdef XENPV /* Check to see if interrupts are enabled (ie; no events are masked) */ - KASSERT(x86_read_psl() == 0); + KASSERTMSG((psl = x86_read_psl()) == 0, "psl=0x%lx", psl); #else - KASSERT((x86_read_psl() & PSL_I) != 0); + KASSERTMSG(((psl = x86_read_psl()) & PSL_I) != 0, "psl=0x%lx", psl); #endif KASSERT(l != NULL);
CVS commit: src/sys/arch/x86/x86
Module Name:src
Committed By: mrg
Date: Wed Jul 26 00:19:04 UTC 2023
Modified Files:
src/sys/arch/x86/x86: errata.c
Log Message:
fix the cpuids for the zen2 client CPUs.
i'm not exactly how i came up with the values i had, though one
of them was still valid and matched my test systems.
XXX: pullup-*
To generate a diff of this commit:
cvs rdiff -u -r1.31 -r1.32 src/sys/arch/x86/x86/errata.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/x86/x86/errata.c
diff -u src/sys/arch/x86/x86/errata.c:1.31 src/sys/arch/x86/x86/errata.c:1.32
--- src/sys/arch/x86/x86/errata.c:1.31 Tue Jul 25 01:09:05 2023
+++ src/sys/arch/x86/x86/errata.c Wed Jul 26 00:19:04 2023
@@ -1,4 +1,4 @@
-/* $NetBSD: errata.c,v 1.31 2023/07/25 01:09:05 mrg Exp $ */
+/* $NetBSD: errata.c,v 1.32 2023/07/26 00:19:04 mrg Exp $ */
/*-
* Copyright (c) 2007 The NetBSD Foundation, Inc.
@@ -47,7 +47,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: errata.c,v 1.31 2023/07/25 01:09:05 mrg Exp $");
+__KERNEL_RCSID(0, "$NetBSD: errata.c,v 1.32 2023/07/26 00:19:04 mrg Exp $");
#include
#include
@@ -98,8 +98,8 @@ static const u_int cpurevs[] = {
ML_A1, 0x0730F01, ZP_B1, 0x0800F11, ZP_B2, 0x0800F12,
PiR_B2, 0x0800F82, Rome_B0, 0x0830F10,
/* XXX client Zen2 names aren't known yet. */
- Z2_XB, 0x0840F70, Z2_Ren, 0x0860F80, Z2_Luc, 0x0870F10,
- Z2_Mat, 0x0890F70, Z2_VG, 0x0890F80, Z2_Men, 0x08A0F10,
+ Z2_XB, 0x0840F70, Z2_Ren, 0x0860F01, Z2_Luc, 0x0860F81,
+ Z2_Mat, 0x0870F10, Z2_VG, 0x0890F02, Z2_Men, 0x08A0F00,
Milan_B1, 0x0A00F11, Milan_B2, 0x0A00F12,
Genoa_B1, 0x0A10F11,
OINK
CVS commit: src/sys/arch/x86/x86
Module Name:src Committed By: mrg Date: Wed Jul 26 00:19:04 UTC 2023 Modified Files: src/sys/arch/x86/x86: errata.c Log Message: fix the cpuids for the zen2 client CPUs. i'm not exactly how i came up with the values i had, though one of them was still valid and matched my test systems. XXX: pullup-* To generate a diff of this commit: cvs rdiff -u -r1.31 -r1.32 src/sys/arch/x86/x86/errata.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/x86
Module Name:src
Committed By: mrg
Date: Tue Jul 25 01:09:05 UTC 2023
Modified Files:
src/sys/arch/x86/include: specialreg.h
src/sys/arch/x86/x86: errata.c
Log Message:
x86: turn off zenbleed chicken bit on Zen2 cpus.
this is based upon Taylor's original work. i just made the list
of CPUs to run on correct as i could determine. (also, add some
Zen3 and Zen4 cpuids not yet used by any errata.)
(might be nice to have a better way to expression revision ranges
rather than specific cpuid matches, eg, 0x30-0x4f models in a cpu
family, etc.)
tested on ryzen 3600, and a ported zenbleed PoC that no longer
shows any obtained text. (a similar module-version of it stopped
the PoC on a ryzen 3950x without having to reboot.)
https://www.amd.com/en/resources/product-security/bulletin/amd-sb-7008.html
https://lock.cmpxchg8b.com/zenbleed.html
To generate a diff of this commit:
cvs rdiff -u -r1.206 -r1.207 src/sys/arch/x86/include/specialreg.h
cvs rdiff -u -r1.30 -r1.31 src/sys/arch/x86/x86/errata.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/x86/include/specialreg.h
diff -u src/sys/arch/x86/include/specialreg.h:1.206 src/sys/arch/x86/include/specialreg.h:1.207
--- src/sys/arch/x86/include/specialreg.h:1.206 Tue Apr 11 06:42:30 2023
+++ src/sys/arch/x86/include/specialreg.h Tue Jul 25 01:09:05 2023
@@ -1,4 +1,4 @@
-/* $NetBSD: specialreg.h,v 1.206 2023/04/11 06:42:30 msaitoh Exp $ */
+/* $NetBSD: specialreg.h,v 1.207 2023/07/25 01:09:05 mrg Exp $ */
/*
* Copyright (c) 2014-2020 The NetBSD Foundation, Inc.
@@ -1394,6 +1394,7 @@
#define MSR_DE_CFG 0xc0011029
#define DE_CFG_ERRATA_721 0x0001
#define DE_CFG_LFENCE_SERIALIZE __BIT(1)
+#define DE_CFG_ERRATA_ZENBLEED __BIT(9)
#define DE_CFG_ERRATA_1021 __BIT(13)
#define MSR_BU_CFG2 0xc001102a
Index: src/sys/arch/x86/x86/errata.c
diff -u src/sys/arch/x86/x86/errata.c:1.30 src/sys/arch/x86/x86/errata.c:1.31
--- src/sys/arch/x86/x86/errata.c:1.30 Mon Jul 24 23:42:00 2023
+++ src/sys/arch/x86/x86/errata.c Tue Jul 25 01:09:05 2023
@@ -1,4 +1,4 @@
-/* $NetBSD: errata.c,v 1.30 2023/07/24 23:42:00 riastradh Exp $ */
+/* $NetBSD: errata.c,v 1.31 2023/07/25 01:09:05 mrg Exp $ */
/*-
* Copyright (c) 2007 The NetBSD Foundation, Inc.
@@ -47,7 +47,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: errata.c,v 1.30 2023/07/24 23:42:00 riastradh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: errata.c,v 1.31 2023/07/25 01:09:05 mrg Exp $");
#include
#include
@@ -73,9 +73,12 @@ typedef enum cpurev {
JH_E6, SH_B0, SH_B3, SH_C0, SH_CG, SH_D0, SH_E4, SH_E5,
DR_BA, DR_B2, DR_B3, RB_C2, RB_C3, BL_C2, BL_C3, DA_C2,
DA_C3, HY_D0, HY_D1, HY_D1_G34R1, PH_E0, LN_B0, KB_A1,
- ML_A1, ZP_B1, ZP_B2, PiR_B2, OINK
+ ML_A1, ZP_B1, ZP_B2, PiR_B2, Rome_B0, Z2_XB, Z2_Ren,
+ Z2_Luc, Z2_Mat, Z2_VG, Z2_Men, Milan_B1, Milan_B2, Genoa_B1,
+ OINK
} cpurev_t;
+/* These names match names from various AMD Errata/Revision Guides. */
static const u_int cpurevs[] = {
BH_E4, 0x0020fb1, CH_CG, 0xf82, CH_CG, 0xfb2,
CH_D0, 0x0010f80, CH_D0, 0x0010fb0, DH_CG, 0xfc0,
@@ -93,7 +96,12 @@ static const u_int cpurevs[] = {
HY_D0, 0x0100f80, HY_D1, 0x0100f81, HY_D1_G34R1, 0x0100f91,
PH_E0, 0x0100fa0, LN_B0, 0x0300f10, KB_A1, 0x0700F01,
ML_A1, 0x0730F01, ZP_B1, 0x0800F11, ZP_B2, 0x0800F12,
- PiR_B2, 0x0800F82,
+ PiR_B2, 0x0800F82, Rome_B0, 0x0830F10,
+ /* XXX client Zen2 names aren't known yet. */
+ Z2_XB, 0x0840F70, Z2_Ren, 0x0860F80, Z2_Luc, 0x0870F10,
+ Z2_Mat, 0x0890F70, Z2_VG, 0x0890F80, Z2_Men, 0x08A0F10,
+ Milan_B1, 0x0A00F11, Milan_B2, 0x0A00F12,
+ Genoa_B1, 0x0A10F11,
OINK
};
@@ -162,6 +170,10 @@ static const uint8_t x86_errata_set15[]
KB_A1, ML_A1, OINK
};
+static const uint8_t x86_errata_set16[] = {
+ Rome_B0, Z2_XB, Z2_Ren, Z2_Luc, Z2_Mat, Z2_VG, Z2_Men, OINK
+};
+
static bool x86_errata_setmsr(struct cpu_info *, errata_t *);
static bool x86_errata_testmsr(struct cpu_info *, errata_t *);
@@ -361,6 +373,16 @@ static errata_t errata[] = {
1095, FALSE, MSR_LS_CFG, x86_errata_set13,
x86_errata_setmsr, LS_CFG_ERRATA_1095
},
+ /*
+ * Zenbleed:
+ * https://www.amd.com/en/resources/product-security/bulletin/amd-sb-7008.html
+ * https://github.com/google/security-research/security/advisories/GHSA-v6wh-rxpg-cmm8
+ * https://lock.cmpxchg8b.com/zenbleed.html
+ */
+ {
+ -1, FALSE, MSR_DE_CFG, x86_errata_set16,
+ x86_errata_setmsr, DE_CFG_ERRATA_ZENBLEED,
+ },
};
static bool
CVS commit: src/sys/arch/x86
Module Name:src Committed By: mrg Date: Tue Jul 25 01:09:05 UTC 2023 Modified Files: src/sys/arch/x86/include: specialreg.h src/sys/arch/x86/x86: errata.c Log Message: x86: turn off zenbleed chicken bit on Zen2 cpus. this is based upon Taylor's original work. i just made the list of CPUs to run on correct as i could determine. (also, add some Zen3 and Zen4 cpuids not yet used by any errata.) (might be nice to have a better way to expression revision ranges rather than specific cpuid matches, eg, 0x30-0x4f models in a cpu family, etc.) tested on ryzen 3600, and a ported zenbleed PoC that no longer shows any obtained text. (a similar module-version of it stopped the PoC on a ryzen 3950x without having to reboot.) https://www.amd.com/en/resources/product-security/bulletin/amd-sb-7008.html https://lock.cmpxchg8b.com/zenbleed.html To generate a diff of this commit: cvs rdiff -u -r1.206 -r1.207 src/sys/arch/x86/include/specialreg.h cvs rdiff -u -r1.30 -r1.31 src/sys/arch/x86/x86/errata.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/x86/x86
Module Name:src
Committed By: riastradh
Date: Mon Jul 24 23:42:00 UTC 2023
Modified Files:
src/sys/arch/x86/x86: errata.c
Log Message:
x86/errata.c: Only say the errata revision search for cpu0.
To generate a diff of this commit:
cvs rdiff -u -r1.29 -r1.30 src/sys/arch/x86/x86/errata.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/x86/x86/errata.c
diff -u src/sys/arch/x86/x86/errata.c:1.29 src/sys/arch/x86/x86/errata.c:1.30
--- src/sys/arch/x86/x86/errata.c:1.29 Mon Jul 24 22:21:08 2023
+++ src/sys/arch/x86/x86/errata.c Mon Jul 24 23:42:00 2023
@@ -1,4 +1,4 @@
-/* $NetBSD: errata.c,v 1.29 2023/07/24 22:21:08 riastradh Exp $ */
+/* $NetBSD: errata.c,v 1.30 2023/07/24 23:42:00 riastradh Exp $ */
/*-
* Copyright (c) 2007 The NetBSD Foundation, Inc.
@@ -47,7 +47,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: errata.c,v 1.29 2023/07/24 22:21:08 riastradh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: errata.c,v 1.30 2023/07/24 23:42:00 riastradh Exp $");
#include
#include
@@ -416,8 +416,11 @@ x86_errata(void)
ci = curcpu();
x86_cpuid(0x8001, descs);
- aprint_verbose_dev(ci->ci_dev, "searching errata for cpu revision"
- " 0x%08"PRIx32"\n", descs[0]);
+ if (CPU_IS_PRIMARY(ci)) {
+ aprint_verbose_dev(ci->ci_dev,
+ "searching errata for cpu revision 0x%08"PRIx32"\n",
+ descs[0]);
+ }
for (i = 0;; i += 2) {
if ((rev = cpurevs[i]) == OINK)
CVS commit: src/sys/arch/x86/x86
Module Name:src Committed By: riastradh Date: Mon Jul 24 23:42:00 UTC 2023 Modified Files: src/sys/arch/x86/x86: errata.c Log Message: x86/errata.c: Only say the errata revision search for cpu0. To generate a diff of this commit: cvs rdiff -u -r1.29 -r1.30 src/sys/arch/x86/x86/errata.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/x86/x86
Module Name:src
Committed By: riastradh
Date: Mon Jul 24 22:21:09 UTC 2023
Modified Files:
src/sys/arch/x86/x86: errata.c
Log Message:
x86/errata.c: Say what revision we're searching for.
To generate a diff of this commit:
cvs rdiff -u -r1.28 -r1.29 src/sys/arch/x86/x86/errata.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/x86/x86/errata.c
diff -u src/sys/arch/x86/x86/errata.c:1.28 src/sys/arch/x86/x86/errata.c:1.29
--- src/sys/arch/x86/x86/errata.c:1.28 Mon Jul 24 22:20:53 2023
+++ src/sys/arch/x86/x86/errata.c Mon Jul 24 22:21:08 2023
@@ -1,4 +1,4 @@
-/* $NetBSD: errata.c,v 1.28 2023/07/24 22:20:53 riastradh Exp $ */
+/* $NetBSD: errata.c,v 1.29 2023/07/24 22:21:08 riastradh Exp $ */
/*-
* Copyright (c) 2007 The NetBSD Foundation, Inc.
@@ -47,7 +47,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: errata.c,v 1.28 2023/07/24 22:20:53 riastradh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: errata.c,v 1.29 2023/07/24 22:21:08 riastradh Exp $");
#include
#include
@@ -416,6 +416,8 @@ x86_errata(void)
ci = curcpu();
x86_cpuid(0x8001, descs);
+ aprint_verbose_dev(ci->ci_dev, "searching errata for cpu revision"
+ " 0x%08"PRIx32"\n", descs[0]);
for (i = 0;; i += 2) {
if ((rev = cpurevs[i]) == OINK)
CVS commit: src/sys/arch/x86/x86
Module Name:src Committed By: riastradh Date: Mon Jul 24 22:21:09 UTC 2023 Modified Files: src/sys/arch/x86/x86: errata.c Log Message: x86/errata.c: Say what revision we're searching for. To generate a diff of this commit: cvs rdiff -u -r1.28 -r1.29 src/sys/arch/x86/x86/errata.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/x86/x86
Module Name:src Committed By: riastradh Date: Mon Jul 24 22:20:53 UTC 2023 Modified Files: src/sys/arch/x86/x86: errata.c Log Message: x86/errata.c: Link to original AMD errata guide. This one is no longer updated; need to link to newer ones for individual families too. That's where all the cryptic nomenclature comes from here. To generate a diff of this commit: cvs rdiff -u -r1.27 -r1.28 src/sys/arch/x86/x86/errata.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/x86/x86
Module Name:src Committed By: riastradh Date: Mon Jul 24 22:20:53 UTC 2023 Modified Files: src/sys/arch/x86/x86: errata.c Log Message: x86/errata.c: Link to original AMD errata guide. This one is no longer updated; need to link to newer ones for individual families too. That's where all the cryptic nomenclature comes from here. To generate a diff of this commit: cvs rdiff -u -r1.27 -r1.28 src/sys/arch/x86/x86/errata.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/x86/x86/errata.c diff -u src/sys/arch/x86/x86/errata.c:1.27 src/sys/arch/x86/x86/errata.c:1.28 --- src/sys/arch/x86/x86/errata.c:1.27 Thu Oct 7 12:52:27 2021 +++ src/sys/arch/x86/x86/errata.c Mon Jul 24 22:20:53 2023 @@ -1,4 +1,4 @@ -/* $NetBSD: errata.c,v 1.27 2021/10/07 12:52:27 msaitoh Exp $ */ +/* $NetBSD: errata.c,v 1.28 2023/07/24 22:20:53 riastradh Exp $ */ /*- * Copyright (c) 2007 The NetBSD Foundation, Inc. @@ -41,11 +41,13 @@ * AMD Opteron Processors, Publication #25759, Revision: 3.69, * Issue Date: September 2006 * + * https://www.amd.com/system/files/TechDocs/25759.pdf + * * XXX This should perhaps be integrated with the identcpu code. */ #include -__KERNEL_RCSID(0, "$NetBSD: errata.c,v 1.27 2021/10/07 12:52:27 msaitoh Exp $"); +__KERNEL_RCSID(0, "$NetBSD: errata.c,v 1.28 2023/07/24 22:20:53 riastradh Exp $"); #include #include
CVS commit: src/sys/arch/x86/x86
Module Name:src
Committed By: riastradh
Date: Tue Jul 18 12:34:25 UTC 2023
Modified Files:
src/sys/arch/x86/x86: fpu.c
Log Message:
x86/fpu: In kernel mode fpu traps, print the instruction pointer.
To generate a diff of this commit:
cvs rdiff -u -r1.86 -r1.87 src/sys/arch/x86/x86/fpu.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/x86/x86/fpu.c
diff -u src/sys/arch/x86/x86/fpu.c:1.86 src/sys/arch/x86/x86/fpu.c:1.87
--- src/sys/arch/x86/x86/fpu.c:1.86 Fri Mar 3 14:40:16 2023
+++ src/sys/arch/x86/x86/fpu.c Tue Jul 18 12:34:25 2023
@@ -1,4 +1,4 @@
-/* $NetBSD: fpu.c,v 1.86 2023/03/03 14:40:16 riastradh Exp $ */
+/* $NetBSD: fpu.c,v 1.87 2023/07/18 12:34:25 riastradh Exp $ */
/*
* Copyright (c) 2008, 2019 The NetBSD Foundation, Inc. All
@@ -96,8 +96,9 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: fpu.c,v 1.86 2023/03/03 14:40:16 riastradh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: fpu.c,v 1.87 2023/07/18 12:34:25 riastradh Exp $");
+#include "opt_ddb.h"
#include "opt_multiprocessor.h"
#include
@@ -121,6 +122,10 @@ __KERNEL_RCSID(0, "$NetBSD: fpu.c,v 1.86
#include
#include
+#ifdef DDB
+#include
+#endif
+
#ifdef XENPV
#define clts() HYPERVISOR_fpu_taskswitch(0)
#define stts() HYPERVISOR_fpu_taskswitch(1)
@@ -560,7 +565,16 @@ fputrap(struct trapframe *frame)
ksiginfo_t ksi;
if (__predict_false(!USERMODE(frame->tf_cs))) {
- panic("fpu trap from kernel, trapframe %p\n", frame);
+ register_t ip = X86_TF_RIP(frame);
+ char where[128];
+
+#ifdef DDB
+ db_symstr(where, sizeof(where), (db_expr_t)ip, DB_STGY_PROC);
+#else
+ snprintf(where, sizeof(where), "%p", (void *)ip);
+#endif
+ panic("fpu trap from kernel at %s, trapframe %p\n", where,
+ frame);
}
KASSERT(curlwp->l_md.md_flags & MDL_FPU_IN_CPU);
CVS commit: src/sys/arch/x86/x86
Module Name:src Committed By: riastradh Date: Tue Jul 18 12:34:25 UTC 2023 Modified Files: src/sys/arch/x86/x86: fpu.c Log Message: x86/fpu: In kernel mode fpu traps, print the instruction pointer. To generate a diff of this commit: cvs rdiff -u -r1.86 -r1.87 src/sys/arch/x86/x86/fpu.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/x86/x86
Module Name:src
Committed By: msaitoh
Date: Thu Jul 13 09:12:24 UTC 2023
Modified Files:
src/sys/arch/x86/x86: coretemp.c
Log Message:
coretemp(4): Change limits of Tjmax.
- Change the lower limit from 70 to 60. At least, some BIOSes can change
the value down to 62.
- Change the upper limit from 110 to 120. At least, some BIOSes can change
the value up to 115.
- Print error message when rdmsr(TEMPERATURE_TARGET) failed.
- When Tjmax exceeded the limit, print warning message and use the value
as it is.
To generate a diff of this commit:
cvs rdiff -u -r1.38 -r1.39 src/sys/arch/x86/x86/coretemp.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/x86/x86/coretemp.c
diff -u src/sys/arch/x86/x86/coretemp.c:1.38 src/sys/arch/x86/x86/coretemp.c:1.39
--- src/sys/arch/x86/x86/coretemp.c:1.38 Thu Oct 7 12:52:27 2021
+++ src/sys/arch/x86/x86/coretemp.c Thu Jul 13 09:12:23 2023
@@ -1,4 +1,4 @@
-/* $NetBSD: coretemp.c,v 1.38 2021/10/07 12:52:27 msaitoh Exp $ */
+/* $NetBSD: coretemp.c,v 1.39 2023/07/13 09:12:23 msaitoh Exp $ */
/*-
* Copyright (c) 2011 The NetBSD Foundation, Inc.
@@ -61,7 +61,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: coretemp.c,v 1.38 2021/10/07 12:52:27 msaitoh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: coretemp.c,v 1.39 2023/07/13 09:12:23 msaitoh Exp $");
#include
#include
@@ -102,6 +102,10 @@ __KERNEL_RCSID(0, "$NetBSD: coretemp.c,v
#define MSR_TEMP_TARGET_READOUT __BITS(16, 23)
+#define TJMAX_DEFAULT 100
+#define TJMAX_LIMIT_LOW 60
+#define TJMAX_LIMIT_HIGH 120
+
static int coretemp_match(device_t, cfdata_t, void *);
static void coretemp_attach(device_t, device_t, void *);
static int coretemp_detach(device_t, int);
@@ -259,16 +263,15 @@ coretemp_tjmax(device_t self)
{
struct coretemp_softc *sc = device_private(self);
struct cpu_info *ci = sc->sc_ci;
- uint32_t model, stepping;
uint64_t msr;
+ uint32_t model, stepping;
+ int tjmax;
model = CPUID_TO_MODEL(ci->ci_signature);
stepping = CPUID_TO_STEPPING(ci->ci_signature);
- /*
- * Use 100C as the initial value.
- */
- sc->sc_tjmax = 100;
+ /* Set the initial value. */
+ sc->sc_tjmax = TJMAX_DEFAULT;
if ((model == 0x0f && stepping >= 2) || (model == 0x0e)) {
/*
@@ -304,20 +307,20 @@ coretemp_tjmax(device_t self)
sc->sc_tjmax = 90;
} else {
notee:
- /*
- * Attempt to get Tj(max) from IA32_TEMPERATURE_TARGET,
- * but only consider the interval [70, 110] C as valid.
- * It is not fully known which CPU models have the MSR.
- */
- if (rdmsr_safe(MSR_TEMPERATURE_TARGET, ) == EFAULT)
- return;
-
- msr = __SHIFTOUT(msr, MSR_TEMP_TARGET_READOUT);
-
- if (msr >= 70 && msr <= 110) {
- sc->sc_tjmax = msr;
+ /* Attempt to get Tj(max) from IA32_TEMPERATURE_TARGET. */
+ if (rdmsr_safe(MSR_TEMPERATURE_TARGET, ) == EFAULT) {
+ aprint_error_dev(sc->sc_dev,
+ "Failed to read TEMPERATURE_TARGET MSR. "
+ "Use the default (%d)\n", sc->sc_tjmax);
return;
}
+
+ tjmax = __SHIFTOUT(msr, MSR_TEMP_TARGET_READOUT);
+ if ((tjmax < TJMAX_LIMIT_LOW) || (tjmax > TJMAX_LIMIT_HIGH))
+ aprint_error_dev(sc->sc_dev,
+ "WARNING: Tjmax(%d) might exceeded the limit.\n",
+ tjmax);
+ sc->sc_tjmax = tjmax;
}
}
CVS commit: src/sys/arch/x86/x86
Module Name:src Committed By: msaitoh Date: Thu Jul 13 09:12:24 UTC 2023 Modified Files: src/sys/arch/x86/x86: coretemp.c Log Message: coretemp(4): Change limits of Tjmax. - Change the lower limit from 70 to 60. At least, some BIOSes can change the value down to 62. - Change the upper limit from 110 to 120. At least, some BIOSes can change the value up to 115. - Print error message when rdmsr(TEMPERATURE_TARGET) failed. - When Tjmax exceeded the limit, print warning message and use the value as it is. To generate a diff of this commit: cvs rdiff -u -r1.38 -r1.39 src/sys/arch/x86/x86/coretemp.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/x86/conf
Module Name:src Committed By: rin Date: Wed Jun 14 01:27:47 UTC 2023 Modified Files: src/sys/arch/x86/conf: files.x86 Log Message: Make PCI_ADDR_FIXUP depended on PCI_BUS_FIXUP. It is no-op if PCI_BUS_FIXUP is missing. To generate a diff of this commit: cvs rdiff -u -r1.125 -r1.126 src/sys/arch/x86/conf/files.x86 Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/x86/conf/files.x86 diff -u src/sys/arch/x86/conf/files.x86:1.125 src/sys/arch/x86/conf/files.x86:1.126 --- src/sys/arch/x86/conf/files.x86:1.125 Fri Oct 28 07:16:34 2022 +++ src/sys/arch/x86/conf/files.x86 Wed Jun 14 01:27:47 2023 @@ -1,4 +1,4 @@ -# $NetBSD: files.x86,v 1.125 2022/10/28 07:16:34 skrll Exp $ +# $NetBSD: files.x86,v 1.126 2023/06/14 01:27:47 rin Exp $ # options for MP configuration through the MP spec defflag opt_mpbios.h MPBIOS MPDEBUG MPBIOS_SCANPCI @@ -11,8 +11,8 @@ defflag MTRR defflag opt_intrdebug.h INTRDEBUG # PCI fixup options -defflag opt_pcifixup.h PCI_ADDR_FIXUP PCI_BUS_FIXUP - PCI_INTR_FIXUP PCI_INTR_FIXUP_FORCE +defflag opt_pcifixup.h PCI_BUS_FIXUP PCI_INTR_FIXUP PCI_INTR_FIXUP_FORCE +defflag opt_pcifixup.h PCI_ADDR_FIXUP : PCI_BUS_FIXUP defflag opt_pci.h NO_PCI_MSI_MSIX # To be able to test for NetBSD/xen in shared files
CVS commit: src/sys/arch/x86/conf
Module Name:src Committed By: rin Date: Wed Jun 14 01:27:47 UTC 2023 Modified Files: src/sys/arch/x86/conf: files.x86 Log Message: Make PCI_ADDR_FIXUP depended on PCI_BUS_FIXUP. It is no-op if PCI_BUS_FIXUP is missing. To generate a diff of this commit: cvs rdiff -u -r1.125 -r1.126 src/sys/arch/x86/conf/files.x86 Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/x86/x86
Module Name:src
Committed By: riastradh
Date: Mon May 22 16:28:08 UTC 2023
Modified Files:
src/sys/arch/x86/x86: efi_machdep.c
Log Message:
efi(4): Implement EFIIOC_GET_TABLE on x86.
PR kern/57076
XXX pullup-10
To generate a diff of this commit:
cvs rdiff -u -r1.5 -r1.6 src/sys/arch/x86/x86/efi_machdep.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/x86/x86/efi_machdep.c
diff -u src/sys/arch/x86/x86/efi_machdep.c:1.5 src/sys/arch/x86/x86/efi_machdep.c:1.6
--- src/sys/arch/x86/x86/efi_machdep.c:1.5 Mon May 22 16:27:48 2023
+++ src/sys/arch/x86/x86/efi_machdep.c Mon May 22 16:28:07 2023
@@ -1,4 +1,4 @@
-/* $NetBSD: efi_machdep.c,v 1.5 2023/05/22 16:27:48 riastradh Exp $ */
+/* $NetBSD: efi_machdep.c,v 1.6 2023/05/22 16:28:07 riastradh Exp $ */
/*-
* Copyright (c) 2016 The NetBSD Foundation, Inc.
@@ -27,7 +27,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: efi_machdep.c,v 1.5 2023/05/22 16:27:48 riastradh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: efi_machdep.c,v 1.6 2023/05/22 16:28:07 riastradh Exp $");
#include "efi.h"
#include "opt_efi.h"
@@ -973,12 +973,29 @@ efi_runtime_setvar(efi_char *name, struc
return status;
}
+static efi_status
+efi_runtime_gettab(const struct uuid *vendor, uint64_t *addrp)
+{
+ struct efi_cfgtbl *cfgtbl = efi_getcfgtblhead();
+ paddr_t pa;
+
+ if (cfgtbl == NULL)
+ return EFI_UNSUPPORTED;
+
+ pa = efi_getcfgtblpa(vendor);
+ if (pa == 0)
+ return EFI_NOT_FOUND;
+ *addrp = pa;
+ return EFI_SUCCESS;
+}
+
static struct efi_ops efi_runtime_ops = {
.efi_gettime = efi_runtime_gettime,
.efi_settime = efi_runtime_settime,
.efi_getvar = efi_runtime_getvar,
.efi_setvar = efi_runtime_setvar,
.efi_nextvar = efi_runtime_nextvar,
+ .efi_gettab = efi_runtime_gettab,
};
#endif /* EFI_RUNTIME */
CVS commit: src/sys/arch/x86/x86
Module Name:src Committed By: riastradh Date: Mon May 22 16:28:08 UTC 2023 Modified Files: src/sys/arch/x86/x86: efi_machdep.c Log Message: efi(4): Implement EFIIOC_GET_TABLE on x86. PR kern/57076 XXX pullup-10 To generate a diff of this commit: cvs rdiff -u -r1.5 -r1.6 src/sys/arch/x86/x86/efi_machdep.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/x86/pci
Module Name:src Committed By: andvar Date: Sat May 13 11:27:10 UTC 2023 Modified Files: src/sys/arch/x86/pci: pci_msi_machdep.c Log Message: s/requied/required/ in comments (likely grammar should be also improved in the future). To generate a diff of this commit: cvs rdiff -u -r1.17 -r1.18 src/sys/arch/x86/pci/pci_msi_machdep.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/x86/pci
Module Name:src Committed By: andvar Date: Sat May 13 11:27:10 UTC 2023 Modified Files: src/sys/arch/x86/pci: pci_msi_machdep.c Log Message: s/requied/required/ in comments (likely grammar should be also improved in the future). To generate a diff of this commit: cvs rdiff -u -r1.17 -r1.18 src/sys/arch/x86/pci/pci_msi_machdep.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/x86/pci/pci_msi_machdep.c diff -u src/sys/arch/x86/pci/pci_msi_machdep.c:1.17 src/sys/arch/x86/pci/pci_msi_machdep.c:1.18 --- src/sys/arch/x86/pci/pci_msi_machdep.c:1.17 Mon May 23 15:03:05 2022 +++ src/sys/arch/x86/pci/pci_msi_machdep.c Sat May 13 11:27:10 2023 @@ -1,4 +1,4 @@ -/* $NetBSD: pci_msi_machdep.c,v 1.17 2022/05/23 15:03:05 bouyer Exp $ */ +/* $NetBSD: pci_msi_machdep.c,v 1.18 2023/05/13 11:27:10 andvar Exp $ */ /* * Copyright (c) 2015 Internet Initiative Japan Inc. @@ -34,7 +34,7 @@ */ #include -__KERNEL_RCSID(0, "$NetBSD: pci_msi_machdep.c,v 1.17 2022/05/23 15:03:05 bouyer Exp $"); +__KERNEL_RCSID(0, "$NetBSD: pci_msi_machdep.c,v 1.18 2023/05/13 11:27:10 andvar Exp $"); #include "opt_intrdebug.h" #include "ioapic.h" @@ -433,7 +433,7 @@ x86_pci_msi_release(pci_chipset_tag_t pc /* * Establish a MSI handle. - * If multiple MSI handle is requied to establish, device driver must call + * If multiple MSI handle is required to establish, device driver must call * this function for each handle. */ void * @@ -453,7 +453,7 @@ x86_pci_msi_establish(pci_chipset_tag_t /* * Disestablish a MSI handle. - * If multiple MSI handle is requied to disestablish, device driver must call + * If multiple MSI handle is required to disestablish, device driver must call * this function for each handle. */ void @@ -478,7 +478,7 @@ x86_pci_msix_release(pci_chipset_tag_t p /* * Establish a MSI-X handle. - * If multiple MSI-X handle is requied to establish, device driver must call + * If multiple MSI-X handle is required to establish, device driver must call * this function for each handle. */ void * @@ -498,7 +498,7 @@ x86_pci_msix_establish(pci_chipset_tag_t /* * Disestablish a MSI-X handle. - * If multiple MSI-X handle is requied to disestablish, device driver must call + * If multiple MSI-X handle is required to disestablish, device driver must call * this function for each handle. */ void
CVS commit: src/sys/arch/x86/pci/imcsmb
Module Name:src
Committed By: riastradh
Date: Wed May 10 00:07:49 UTC 2023
Modified Files:
src/sys/arch/x86/pci/imcsmb: imc.c imcsmb.c
Log Message:
x86/imc(4): Use config_detach_children.
To generate a diff of this commit:
cvs rdiff -u -r1.5 -r1.6 src/sys/arch/x86/pci/imcsmb/imc.c \
src/sys/arch/x86/pci/imcsmb/imcsmb.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/x86/pci/imcsmb/imc.c
diff -u src/sys/arch/x86/pci/imcsmb/imc.c:1.5 src/sys/arch/x86/pci/imcsmb/imc.c:1.6
--- src/sys/arch/x86/pci/imcsmb/imc.c:1.5 Wed Sep 28 10:09:48 2022
+++ src/sys/arch/x86/pci/imcsmb/imc.c Wed May 10 00:07:49 2023
@@ -1,4 +1,4 @@
-/* $NetBSD: imc.c,v 1.5 2022/09/28 10:09:48 msaitoh Exp $ */
+/* $NetBSD: imc.c,v 1.6 2023/05/10 00:07:49 riastradh Exp $ */
/*-
* Copyright (c) 2018 The NetBSD Foundation, Inc.
@@ -65,7 +65,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: imc.c,v 1.5 2022/09/28 10:09:48 msaitoh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: imc.c,v 1.6 2023/05/10 00:07:49 riastradh Exp $");
#include
#include
@@ -259,16 +259,11 @@ imc_rescan(device_t self, const char *if
static int
imc_detach(device_t self, int flags)
{
- struct imc_softc *sc = device_private(self);
- int i, error;
+ int error;
- for (i = 0; i < 2; i++) {
- if (sc->sc_smbchild[i] != NULL) {
- error = config_detach(sc->sc_smbchild[i], flags);
- if (error)
-return error;
- }
- }
+ error = config_detach_children(self, flags);
+ if (error)
+ return error;
pmf_device_deregister(self);
return 0;
Index: src/sys/arch/x86/pci/imcsmb/imcsmb.c
diff -u src/sys/arch/x86/pci/imcsmb/imcsmb.c:1.5 src/sys/arch/x86/pci/imcsmb/imcsmb.c:1.6
--- src/sys/arch/x86/pci/imcsmb/imcsmb.c:1.5 Sat Aug 7 16:19:08 2021
+++ src/sys/arch/x86/pci/imcsmb/imcsmb.c Wed May 10 00:07:49 2023
@@ -1,4 +1,4 @@
-/* $NetBSD: imcsmb.c,v 1.5 2021/08/07 16:19:08 thorpej Exp $ */
+/* $NetBSD: imcsmb.c,v 1.6 2023/05/10 00:07:49 riastradh Exp $ */
/*-
* Copyright (c) 2018 The NetBSD Foundation, Inc.
@@ -66,7 +66,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: imcsmb.c,v 1.5 2021/08/07 16:19:08 thorpej Exp $");
+__KERNEL_RCSID(0, "$NetBSD: imcsmb.c,v 1.6 2023/05/10 00:07:49 riastradh Exp $");
#include
#include
@@ -182,14 +182,12 @@ imcsmb_chdet(device_t self, device_t chi
static int
imcsmb_detach(device_t self, int flags)
{
- int error;
struct imcsmb_softc *sc = device_private(self);
+ int error;
- if (sc->sc_smbus != NULL) {
- error = config_detach(sc->sc_smbus, flags);
- if (error)
- return error;
- }
+ error = config_detach_children(self, flags);
+ if (error)
+ return error;
pmf_device_deregister(self);
iic_tag_fini(>sc_i2c_tag);
