CVS commit: [netbsd-8] src/sys/arch/x86/x86
Module Name:src
Committed By: martin
Date: Fri Feb 19 17:49:19 UTC 2021
Modified Files:
src/sys/arch/x86/x86 [netbsd-8]: intr.c
Log Message:
Pull up following revision(s) (requested by knakahara in ticket #1657):
sys/arch/x86/x86/intr.c: revision 1.154 (via patch)
Fix x86's pci_intr_disestablish clean up routine. Pointed out by t-kusaba@IIJ,
thanks.
Fix panic on x86 by the following code.
sc_ih = pci_intr_establish_xname(sc_pc, ...);
pci_intr_disestablish(sc_pc, sc_ih);
sc_ih = pci_intr_establish(sc_pc, ...);
ena(4) do such processing when ifconfig down/up.
XXX pullup-8,9
To generate a diff of this commit:
cvs rdiff -u -r1.101.2.7 -r1.101.2.8 src/sys/arch/x86/x86/intr.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/x86/x86/intr.c
diff -u src/sys/arch/x86/x86/intr.c:1.101.2.7 src/sys/arch/x86/x86/intr.c:1.101.2.8
--- src/sys/arch/x86/x86/intr.c:1.101.2.7 Thu Nov 14 15:58:06 2019
+++ src/sys/arch/x86/x86/intr.c Fri Feb 19 17:49:19 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: intr.c,v 1.101.2.7 2019/11/14 15:58:06 martin Exp $ */
+/* $NetBSD: intr.c,v 1.101.2.8 2021/02/19 17:49:19 martin Exp $ */
/*-
* Copyright (c) 2007, 2008, 2009 The NetBSD Foundation, Inc.
@@ -133,7 +133,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: intr.c,v 1.101.2.7 2019/11/14 15:58:06 martin Exp $");
+__KERNEL_RCSID(0, "$NetBSD: intr.c,v 1.101.2.8 2021/02/19 17:49:19 martin Exp $");
#include "opt_intrdebug.h"
#include "opt_multiprocessor.h"
@@ -807,6 +807,9 @@ intr_source_free(struct cpu_info *ci, in
ci->ci_isources[slot] = NULL;
if (pic != &i8259_pic)
idt_vec_free(idtvec);
+
+ isp->is_recurse = NULL;
+ isp->is_resume = NULL;
}
#ifdef MULTIPROCESSOR
@@ -1161,12 +1164,12 @@ intr_disestablish_xcall(void *arg1, void
else
(*pic->pic_hwunmask)(pic, ih->ih_pin);
- /* Re-enable interrupts. */
- x86_write_psl(psl);
-
/* If the source is free we can drop it now. */
intr_source_free(ci, ih->ih_slot, pic, idtvec);
+ /* Re-enable interrupts. */
+ x86_write_psl(psl);
+
DPRINTF(("%s: remove slot %d (pic %s pin %d vec %d)\n",
device_xname(ci->ci_dev), ih->ih_slot, pic->pic_name,
ih->ih_pin, idtvec));
CVS commit: [netbsd-8] src/sys/arch/x86/x86
Module Name:src Committed By: martin Date: Tue Aug 18 09:41:10 UTC 2020 Modified Files: src/sys/arch/x86/x86 [netbsd-8]: ipmi.c Log Message: Pull up following revision(s) (requested by nonaka in ticket #1597): sys/dev/ipmi.c: revision 1.5 (applied to sys/arch/x86/x86/ipmi.c) ipmi(4): Fixed a bug that incorrect condition is notified. When the value obtained from the sensor is below the lower limit of the critical threshold, it is notified that the value is below the lower limit of the warning threshold. To generate a diff of this commit: cvs rdiff -u -r1.64 -r1.64.10.1 src/sys/arch/x86/x86/ipmi.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/x86/x86/ipmi.c diff -u src/sys/arch/x86/x86/ipmi.c:1.64 src/sys/arch/x86/x86/ipmi.c:1.64.10.1 --- src/sys/arch/x86/x86/ipmi.c:1.64 Thu Jul 7 06:55:40 2016 +++ src/sys/arch/x86/x86/ipmi.c Tue Aug 18 09:41:10 2020 @@ -1,4 +1,4 @@ -/* $NetBSD: ipmi.c,v 1.64 2016/07/07 06:55:40 msaitoh Exp $ */ +/* $NetBSD: ipmi.c,v 1.64.10.1 2020/08/18 09:41:10 martin Exp $ */ /* * Copyright (c) 2006 Manuel Bouyer. @@ -52,7 +52,7 @@ */ #include -__KERNEL_RCSID(0, "$NetBSD: ipmi.c,v 1.64 2016/07/07 06:55:40 msaitoh Exp $"); +__KERNEL_RCSID(0, "$NetBSD: ipmi.c,v 1.64.10.1 2020/08/18 09:41:10 martin Exp $"); #include #include @@ -1667,14 +1667,14 @@ ipmi_sensor_status(struct ipmi_softc *sc edata->value_cur > psensor->i_limits.sel_warnmax) return ENVSYS_SWARNOVER; - if (psensor->i_props & PROP_WARNMIN && - edata->value_cur < psensor->i_limits.sel_warnmin) - return ENVSYS_SWARNUNDER; - if (psensor->i_props & PROP_CRITMIN && edata->value_cur < psensor->i_limits.sel_critmin) return ENVSYS_SCRITUNDER; + if (psensor->i_props & PROP_WARNMIN && + edata->value_cur < psensor->i_limits.sel_warnmin) + return ENVSYS_SWARNUNDER; + break; case IPMI_SENSOR_TYPE_INTRUSION:
CVS commit: [netbsd-8] src/sys/arch/x86/include
Module Name:src Committed By: martin Date: Wed Aug 5 18:26:17 UTC 2020 Modified Files: src/sys/arch/x86/include [netbsd-8]: specialreg.h Log Message: Accidently not commited for ticket #1595: sys/arch/x86/include/specialreg.h 1.129 via patch Add six errata for AMD Family 17h (Ryzen etc). To generate a diff of this commit: cvs rdiff -u -r1.98.2.20 -r1.98.2.21 src/sys/arch/x86/include/specialreg.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/x86/include/specialreg.h diff -u src/sys/arch/x86/include/specialreg.h:1.98.2.20 src/sys/arch/x86/include/specialreg.h:1.98.2.21 --- src/sys/arch/x86/include/specialreg.h:1.98.2.20 Wed Aug 5 16:02:53 2020 +++ src/sys/arch/x86/include/specialreg.h Wed Aug 5 18:26:17 2020 @@ -1,4 +1,4 @@ -/* $NetBSD: specialreg.h,v 1.98.2.20 2020/08/05 16:02:53 martin Exp $ */ +/* $NetBSD: specialreg.h,v 1.98.2.21 2020/08/05 18:26:17 martin Exp $ */ /*- * Copyright (c) 1991 The Regents of the University of California. @@ -1055,6 +1055,9 @@ #define NB_CFG_INITAPICCPUIDLO (1ULL << 54) #define MSR_LS_CFG 0xc0011020 +#define LS_CFG_ERRATA_1033 __BIT(4) +#define LS_CFG_ERRATA_793 __BIT(15) +#define LS_CFG_ERRATA_1095 __BIT(57) #define LS_CFG_DIS_LS2_SQUISH 0x0200 #define LS_CFG_DIS_SSB_F15H 0x0040ULL #define LS_CFG_DIS_SSB_F16H 0x0002ULL @@ -1063,6 +1066,7 @@ #define MSR_IC_CFG 0xc0011021 #define IC_CFG_DIS_SEQ_PREFETCH 0x0800 #define IC_CFG_DIS_IND 0x4000 +#define IC_CFG_ERRATA_776 __BIT(26) #define MSR_DC_CFG 0xc0011022 #define DC_CFG_DIS_CNV_WC_SSO 0x0008 @@ -1077,9 +1081,16 @@ #define BU_CFG_WBPFSMCCHKDIS 0x2000ULL #define BU_CFG_WBENHWSBDIS 0x0001ULL +#define MSR_FP_CFG 0xc0011028 +#define FP_CFG_ERRATA_1049 __BIT(4) + #define MSR_DE_CFG 0xc0011029 #define DE_CFG_ERRATA_721 0x0001 #define DE_CFG_LFENCE_SERIALIZE __BIT(1) +#define DE_CFG_ERRATA_1021 __BIT(13) + +#define MSR_LS_CFG2 0xc001102d +#define LS_CFG2_ERRATA_1091 __BIT(34) /* AMD Family10h MSRs */ #define MSR_OSVW_ID_LENGTH 0xc0010140
CVS commit: [netbsd-8] src/sys/arch/x86/x86
Module Name:src
Committed By: martin
Date: Wed Aug 5 17:27:48 UTC 2020
Modified Files:
src/sys/arch/x86/x86 [netbsd-8]: errata.c
Log Message:
Pull up the following, requested by msaitoh in ticket #1595:
sys/arch/x86/include/specialreg.h 1.129 via patch
sys/arch/x86/x86/errata.c 1.24-1.26
- Add six errata for AMD Family 17h (Ryzen etc), tested by
Patrick Welche and mrg@.
To generate a diff of this commit:
cvs rdiff -u -r1.23 -r1.23.10.1 src/sys/arch/x86/x86/errata.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/x86/x86/errata.c
diff -u src/sys/arch/x86/x86/errata.c:1.23 src/sys/arch/x86/x86/errata.c:1.23.10.1
--- src/sys/arch/x86/x86/errata.c:1.23 Tue Jan 5 10:20:22 2016
+++ src/sys/arch/x86/x86/errata.c Wed Aug 5 17:27:48 2020
@@ -1,4 +1,4 @@
-/* $NetBSD: errata.c,v 1.23 2016/01/05 10:20:22 hannken Exp $ */
+/* $NetBSD: errata.c,v 1.23.10.1 2020/08/05 17:27:48 martin Exp $ */
/*-
* Copyright (c) 2007 The NetBSD Foundation, Inc.
@@ -45,7 +45,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: errata.c,v 1.23 2016/01/05 10:20:22 hannken Exp $");
+__KERNEL_RCSID(0, "$NetBSD: errata.c,v 1.23.10.1 2020/08/05 17:27:48 martin Exp $");
#include
#include
@@ -70,8 +70,8 @@ typedef enum cpurev {
BH_E4, CH_CG, CH_D0, DH_CG, DH_D0, DH_E3, DH_E6, JH_E1,
JH_E6, SH_B0, SH_B3, SH_C0, SH_CG, SH_D0, SH_E4, SH_E5,
DR_BA, DR_B2, DR_B3, RB_C2, RB_C3, BL_C2, BL_C3, DA_C2,
- DA_C3, HY_D0, HY_D1, HY_D1_G34R1, PH_E0, LN_B0,
- OINK
+ DA_C3, HY_D0, HY_D1, HY_D1_G34R1, PH_E0, LN_B0, KB_A1,
+ ML_A1, ZP_B1, ZP_B2, PiR_B2, OINK
} cpurev_t;
static const u_int cpurevs[] = {
@@ -89,7 +89,9 @@ static const u_int cpurevs[] = {
RB_C2, 0x0100f42, RB_C3, 0x0100f43, BL_C2, 0x0100f52,
BL_C3, 0x0100f53, DA_C2, 0x0100f62, DA_C3, 0x0100f63,
HY_D0, 0x0100f80, HY_D1, 0x0100f81, HY_D1_G34R1, 0x0100f91,
- PH_E0, 0x0100fa0, LN_B0, 0x0300f10,
+ PH_E0, 0x0100fa0, LN_B0, 0x0300f10, KB_A1, 0x0700F01,
+ ML_A1, 0x0730F01, ZP_B1, 0x0800F11, ZP_B2, 0x0800F12,
+ PiR_B2, 0x0800F82,
OINK
};
@@ -142,6 +144,22 @@ static const uint8_t x86_errata_set11[]
DA_C3, HY_D0, HY_D1, HY_D1_G34R1, PH_E0, LN_B0, OINK
};
+static const uint8_t x86_errata_set12[] = {
+ KB_A1, OINK
+};
+
+static const uint8_t x86_errata_set13[] = {
+ ZP_B1, ZP_B2, PiR_B2, OINK
+};
+
+static const uint8_t x86_errata_set14[] = {
+ ZP_B1, OINK
+};
+
+static const uint8_t x86_errata_set15[] = {
+ KB_A1, ML_A1, OINK
+};
+
static bool x86_errata_setmsr(struct cpu_info *, errata_t *);
static bool x86_errata_testmsr(struct cpu_info *, errata_t *);
@@ -285,6 +303,62 @@ static errata_t errata[] = {
721, FALSE, MSR_DE_CFG, x86_errata_set11,
x86_errata_setmsr, DE_CFG_ERRATA_721
},
+ /*
+ * 776: Incorrect Processor Branch Prediction for Two Consecutive
+ * Linear Pages
+ */
+ {
+ 776, FALSE, MSR_IC_CFG, x86_errata_set12,
+ x86_errata_setmsr, IC_CFG_ERRATA_776
+ },
+ /*
+ * 793: Specific Combination of Writes to Write Combined Memory
+ * Types and Locked Instructions May Cause Core Hang
+ */
+ {
+ 793, FALSE, MSR_LS_CFG, x86_errata_set15,
+ x86_errata_setmsr, LS_CFG_ERRATA_793
+ },
+ /*
+ * 1021: Load Operation May Receive Stale Data From Older Store
+ * Operation
+ */
+ {
+ 1021, FALSE, MSR_DE_CFG, x86_errata_set13,
+ x86_errata_setmsr, DE_CFG_ERRATA_1021
+ },
+ /*
+ * 1033: A Lock Operation May Cause the System to Hang
+ */
+ {
+ 1033, FALSE, MSR_LS_CFG, x86_errata_set14,
+ x86_errata_setmsr, LS_CFG_ERRATA_1033
+ },
+ /*
+ * 1049: FCMOV Instruction May Not Execute Correctly
+ */
+ {
+ 1049, FALSE, MSR_FP_CFG, x86_errata_set13,
+ x86_errata_setmsr, FP_CFG_ERRATA_1049
+ },
+#if 0 /* Should we apply this errata? The other OSes don't. */
+ /*
+ * 1091: Address Boundary Crossing Load Operation May Receive
+ * Stale Data
+ */
+ {
+ 1091, FALSE, MSR_LS_CFG2, x86_errata_set13,
+ x86_errata_setmsr, LS_CFG2_ERRATA_1091
+ },
+#endif
+ /*
+ * 1095: Potential Violation of Read Ordering In Lock Operation
+ * In SMT (Simultaneous Multithreading) Mode
+ */
+ {
+ 1095, FALSE, MSR_LS_CFG, x86_errata_set13,
+ x86_errata_setmsr, LS_CFG_ERRATA_1095
+ },
};
static bool
CVS commit: [netbsd-8] src/sys/arch/x86/x86
Module Name:src
Committed By: martin
Date: Wed Aug 5 16:05:49 UTC 2020
Modified Files:
src/sys/arch/x86/x86 [netbsd-8]: coretemp.c
Log Message:
Pull up following revision(s) (requested by msaitoh in ticket #1589):
sys/arch/x86/x86/coretemp.c: revision 1.37
Add special handling for model 0x0f stepping >=2 or mode 0x0e to get Tjmax.
To generate a diff of this commit:
cvs rdiff -u -r1.35.10.1 -r1.35.10.2 src/sys/arch/x86/x86/coretemp.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/x86/x86/coretemp.c
diff -u src/sys/arch/x86/x86/coretemp.c:1.35.10.1 src/sys/arch/x86/x86/coretemp.c:1.35.10.2
--- src/sys/arch/x86/x86/coretemp.c:1.35.10.1 Thu Jul 26 23:23:50 2018
+++ src/sys/arch/x86/x86/coretemp.c Wed Aug 5 16:05:49 2020
@@ -1,4 +1,4 @@
-/* $NetBSD: coretemp.c,v 1.35.10.1 2018/07/26 23:23:50 snj Exp $ */
+/* $NetBSD: coretemp.c,v 1.35.10.2 2020/08/05 16:05:49 martin Exp $ */
/*-
* Copyright (c) 2011 The NetBSD Foundation, Inc.
@@ -61,7 +61,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: coretemp.c,v 1.35.10.1 2018/07/26 23:23:50 snj Exp $");
+__KERNEL_RCSID(0, "$NetBSD: coretemp.c,v 1.35.10.2 2020/08/05 16:05:49 martin Exp $");
#include
#include
@@ -271,6 +271,19 @@ coretemp_tjmax(device_t self)
sc->sc_tjmax = 100;
if ((model == 0x0f && stepping >= 2) || (model == 0x0e)) {
+ /*
+ * Check MSR_IA32_PLATFORM_ID(0x17) bit 28. It's not documented
+ * in the datasheet, but the following page describes the
+ * detail:
+ * http://software.intel.com/en-us/articles/
+ * mobile-intel-core2-processor-detection-table/
+ * Was: http://softwarecommunity.intel.com/Wiki/Mobility/
+ * 720.htm
+ */
+ if (rdmsr_safe(MSR_IA32_PLATFORM_ID, &msr) != 0)
+ goto notee;
+ if ((model < 0x17) && ((msr & __BIT(28)) == 0))
+ goto notee;
if (rdmsr_safe(MSR_IA32_EXT_CONFIG, &msr) == EFAULT)
return;
@@ -290,6 +303,7 @@ coretemp_tjmax(device_t self)
} else
sc->sc_tjmax = 90;
} else {
+notee:
/*
* Attempt to get Tj(max) from IA32_TEMPERATURE_TARGET,
* but only consider the interval [70, 110] C as valid.
CVS commit: [netbsd-8] src/sys/arch/x86/include
Module Name:src Committed By: martin Date: Wed Aug 5 16:02:53 UTC 2020 Modified Files: src/sys/arch/x86/include [netbsd-8]: specialreg.h Log Message: Pull up the following revisions, requested by msaitoh in ticket #1588: sys/arch/x86/include/specialreg.h 1.162-1.168 via patch - AMD CPUID Fn8000_000a %edx bit 20 is "SPEC_CTRL". - Add some bit definitions of AMD's CPUID Fn8000_001f Encrypted Memory features. - Add AMD INVLPGB/TLBSYNC hypervisor enable in VMCB and TLBSYNC intercept bit. - Add AMD MSR_DE_CFG's bit 1 as DE_CFG_LFENCE_SERIALIZE. - Add some definitions for Intel: - Add CPUID leaf 6 %eax bit 19 for HW_FEEDBACK* and IA32_PACKAGE_TERM* MSRs. - Add CPUID leaf 7 %ecx bit 31 for Protection Keys. - Add definition of Load only TLB and Store only TLB. - Add IF_PSCHANGE_MC_NO bit of IA32_ARCH_CAPABILITIES - Fix HWP_IGNIDL. - Add CPUID 7 %edx bit 9 "SRBDS_CTRL" - Modify comment. Style and fix typo. To generate a diff of this commit: cvs rdiff -u -r1.98.2.19 -r1.98.2.20 src/sys/arch/x86/include/specialreg.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/x86/include/specialreg.h diff -u src/sys/arch/x86/include/specialreg.h:1.98.2.19 src/sys/arch/x86/include/specialreg.h:1.98.2.20 --- src/sys/arch/x86/include/specialreg.h:1.98.2.19 Wed Apr 15 14:25:09 2020 +++ src/sys/arch/x86/include/specialreg.h Wed Aug 5 16:02:53 2020 @@ -1,4 +1,4 @@ -/* $NetBSD: specialreg.h,v 1.98.2.19 2020/04/15 14:25:09 martin Exp $ */ +/* $NetBSD: specialreg.h,v 1.98.2.20 2020/08/05 16:02:53 martin Exp $ */ /*- * Copyright (c) 1991 The Regents of the University of California. @@ -247,10 +247,10 @@ ? 0 : (CPUID_TO_EXTMODEL(cpuid) << 4))) /* CPUID Fn0001 %ebx */ -#define CPUID_BRAND_INDEX __BITS(7,0) -#define CPUID_CLFLUSH_SIZE __BITS(15,8) -#define CPUID_HTT_CORES __BITS(23,16) -#define CPUID_LOCAL_APIC_ID __BITS(31,24) +#define CPUID_BRAND_INDEX __BITS(7,0) +#define CPUID_CLFLUSH_SIZE __BITS(15,8) +#define CPUID_HTT_CORES __BITS(23,16) +#define CPUID_LOCAL_APIC_ID __BITS(31,24) /* * Intel Deterministic Cache Parameter Leaf @@ -320,6 +320,7 @@ #define CPUID_DSPM_HWP_PECI __BIT(16) /* HWP PECI override */ #define CPUID_DSPM_HWP_FLEX __BIT(17) /* Flexible HWP */ #define CPUID_DSPM_HWP_FAST __BIT(18) /* Fast access for IA32_HWP_REQUEST */ +#define CPUID_DSPM_HW_FEEDBACK __BIT(19) /* HW_FEEDBACK*, IA32_PACKAGE_TERM* */ #define CPUID_DSPM_HWP_IGNIDL __BIT(20) /* Ignore Idle Logical Processor HWP */ #define CPUID_DSPM_FLAGS "\20" \ @@ -327,8 +328,8 @@ "\5" "PLN" "\6" "ECMD" "\7" "PTM" "\10" "HWP" \ "\11" "HWP_NOTIFY" "\12" "HWP_ACTWIN" "\13" "HWP_EPP" "\14" "HWP_PLR" \ "\16" "HDC" "\17" "TBM3" "\20" "HWP_CAP" \ - "\21" "HWP_PECI" "\22" "HWP_FLEX" "\23" "HWP_FAST" \ - "25" "HWP_IGNIDL" + "\21" "HWP_PECI" "\22" "HWP_FLEX" "\23" "HWP_FAST" "\24HW_FEEDBACK" \ + "\25" "HWP_IGNIDL" /* * Intel/AMD Digital Thermal Sensor and @@ -341,7 +342,7 @@ /* * Intel/AMD Structured Extended Feature leaf Fn_0007 - * %eax == 0: Subleaf 0 + * %ecx == 0: Subleaf 0 * %eax: The Maximum input value for supported subleaf. * %ebx: Feature bits. * %ecx: Feature bits. @@ -413,6 +414,7 @@ #define CPUID_SEF_MOVDIRI __BIT(27) /* MOVDIRI instruction */ #define CPUID_SEF_MOVDIR64B __BIT(28) /* MOVDIR64B instruction */ #define CPUID_SEF_SGXLC __BIT(30) /* SGX Launch Configuration */ +#define CPUID_SEF_PKS __BIT(31) /* Protection Keys */ #define CPUID_SEF_FLAGS1 "\177\20" \ "b\0PREFETCHWT1\0" "b\1AVX512_VBMI\0" "b\2UMIP\0" "b\3PKU\0" \ @@ -422,13 +424,14 @@ "f\21\5MAWAU\0" \ "b\26RDPID\0" \ "b\31CLDEMOTE\0" "b\33MOVDIRI\0" \ - "b\34MOVDIR64B\0" "b\36SGXLC\0" + "b\34MOVDIR64B\0" "b\36SGXLC\0" "b\37PKS\0" /* %edx */ #define CPUID_SEF_AVX512_4VNNIW __BIT(2) #define CPUID_SEF_AVX512_4FMAPS __BIT(3) #define CPUID_SEF_FSREP_MOV __BIT(4) /* Fast Short REP MOV */ #define CPUID_SEF_AVX512_VP2INTERSECT __BIT(8) +#define CPUID_SEF_SRBDS_CTRL __BIT(9) /* IA32_MCU_OPT_CTRL */ #define CPUID_SEF_MD_CLEAR __BIT(10) #define CPUID_SEF_TSX_FORCE_ABORT __BIT(13) /* MSR_TSX_FORCE_ABORT bit 0 */ #define CPUID_SEF_SERIALIZE __BIT(14) @@ -445,7 +448,7 @@ #define CPUID_SEF_FLAGS2 "\20" \ "\3" "AVX512_4VNNIW" "\4" "AVX512_4FMAPS" \ "\5" "FSREP_MOV" \ - "\11" "VP2INTERSECT" "\13" "MD_CLEAR" \ + "\11VP2INTERSECT" "\12SRBDS_CTRL" "\13MD_CLEAR" \ "\16TSX_FORCE_ABORT" "\17SERIALIZE" "\20HYBRID" \ "\21" "TSXLDTRK" \ "\25" "CET_IBT" \ @@ -561,6 +564,8 @@ #define CPUID_DATP_TCTYPE_D 1 /* Data TLB */ #define CPUID_DATP_TCTYPE_I 2 /* Instruction TLB */ #define CPUID_DATP_TCTYPE_U 3 /* Unified TLB */ +#define CPUID_DATP_TCTYPE_L 4 /* Load only TLB */ +#define CPUID_DATP_TCTYPE_S 5 /* Store only TLB */ #define CPUID_DATP_TCLEVEL __BITS(7, 5) /* TLB level (start at 1) */ #define CP
CVS commit: [netbsd-8] src/sys/arch/x86/x86
Module Name:src
Committed By: martin
Date: Mon Jul 20 18:40:09 UTC 2020
Modified Files:
src/sys/arch/x86/x86 [netbsd-8]: procfs_machdep.c
Log Message:
Pull up following revision(s) (requested by msaitoh in ticket #1581):
sys/arch/x86/x86/procfs_machdep.c: revision 1.37
sys/arch/x86/x86/procfs_machdep.c: revision 1.38
Add AMD protected processor identification number (PPIN).
Lowercase ppin.
To generate a diff of this commit:
cvs rdiff -u -r1.15.2.10 -r1.15.2.11 src/sys/arch/x86/x86/procfs_machdep.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/x86/x86/procfs_machdep.c
diff -u src/sys/arch/x86/x86/procfs_machdep.c:1.15.2.10 src/sys/arch/x86/x86/procfs_machdep.c:1.15.2.11
--- src/sys/arch/x86/x86/procfs_machdep.c:1.15.2.10 Wed Apr 15 14:25:09 2020
+++ src/sys/arch/x86/x86/procfs_machdep.c Mon Jul 20 18:40:08 2020
@@ -1,4 +1,4 @@
-/* $NetBSD: procfs_machdep.c,v 1.15.2.10 2020/04/15 14:25:09 martin Exp $ */
+/* $NetBSD: procfs_machdep.c,v 1.15.2.11 2020/07/20 18:40:08 martin Exp $ */
/*
* Copyright (c) 2001 Wasabi Systems, Inc.
@@ -42,7 +42,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: procfs_machdep.c,v 1.15.2.10 2020/04/15 14:25:09 martin Exp $");
+__KERNEL_RCSID(0, "$NetBSD: procfs_machdep.c,v 1.15.2.11 2020/07/20 18:40:08 martin Exp $");
#include
#include
@@ -155,7 +155,7 @@ static const char * const x86_features[]
{ /* (13) AMD 0x8008 ebx */
"clzero", "irperf", "xsaveerptr", NULL, "rdpru", NULL, NULL, NULL,
NULL, "wbnoinvd", NULL, NULL, NULL, NULL, NULL, NULL,
- NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
+ NULL, NULL, NULL, NULL, NULL, NULL, NULL, "ppin",
NULL, "virt_ssbd", NULL, NULL, NULL, NULL, NULL, NULL},
{ /* (14) 0x0006 eax */
CVS commit: [netbsd-8] src/sys/arch/x86/x86
Module Name:src
Committed By: martin
Date: Sat Jun 20 16:05:06 UTC 2020
Modified Files:
src/sys/arch/x86/x86 [netbsd-8]: cpu_rng.c
Log Message:
Pull up following revision(s) (requested by riastradh in ticket #1560):
sys/arch/x86/x86/cpu_rng.c: revision 1.16
Use x86_read_psl/x86_disable_intr/x86_read_psl to defer interrupts.
Using x86_disable_intr/x86_enable_intr causes a bit of a snag when we
try it early at boot before we're ready to handle interrupts, because
it has the effect of enabling interrupts!
Fixes instant reset at boot on VIA CPUs. The instant reset on boot
is new since the entropy rework, which initialized the x86 CPU RNG
earlier than before, but in principle this could also cause other
problems while not early at boot too.
XXX pullup
To generate a diff of this commit:
cvs rdiff -u -r1.5 -r1.5.12.1 src/sys/arch/x86/x86/cpu_rng.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/x86/x86/cpu_rng.c
diff -u src/sys/arch/x86/x86/cpu_rng.c:1.5 src/sys/arch/x86/x86/cpu_rng.c:1.5.12.1
--- src/sys/arch/x86/x86/cpu_rng.c:1.5 Mon Feb 29 00:17:54 2016
+++ src/sys/arch/x86/x86/cpu_rng.c Sat Jun 20 16:05:06 2020
@@ -1,4 +1,4 @@
-/* $NetBSD: cpu_rng.c,v 1.5 2016/02/29 00:17:54 riastradh Exp $ */
+/* $NetBSD: cpu_rng.c,v 1.5.12.1 2020/06/20 16:05:06 martin Exp $ */
/*-
* Copyright (c) 2015 The NetBSD Foundation, Inc.
@@ -136,6 +136,7 @@ exhausted:
static size_t
cpu_rng_via(cpu_rng_t *out)
{
+ u_long psl;
uint32_t creg0, rndsts;
/*
@@ -149,9 +150,9 @@ cpu_rng_via(cpu_rng_t *out)
* even if such a fault is generated.
*
* XXX can this really happen if we don't use "rep xstorrng"?
- *
*/
kpreempt_disable();
+ psl = x86_read_psl();
x86_disable_intr();
creg0 = rcr0();
lcr0(creg0 & ~(CR0_EM|CR0_TS)); /* Permit access to SIMD/FPU path */
@@ -165,7 +166,7 @@ cpu_rng_via(cpu_rng_t *out)
: "=a" (rndsts), "+D" (out) : "d" (0) : "memory");
/* Put CR0 back how it was */
lcr0(creg0);
- x86_enable_intr();
+ x86_write_psl(psl);
kpreempt_enable();
/*
CVS commit: [netbsd-8] src/sys/arch/x86/pci
Module Name:src
Committed By: martin
Date: Wed May 13 12:39:20 UTC 2020
Modified Files:
src/sys/arch/x86/pci [netbsd-8]: if_vmx.c
Log Message:
Pull up following revision(s) (requested by yamaguchi in ticket #1547):
sys/arch/x86/pci/if_vmx.c: revision 1.60
Fix the wrong logic about making the number of vmx(4) TX/RX queue
be power of two
reviewed by nonaka@n.o.
To generate a diff of this commit:
cvs rdiff -u -r1.19.6.7 -r1.19.6.8 src/sys/arch/x86/pci/if_vmx.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/x86/pci/if_vmx.c
diff -u src/sys/arch/x86/pci/if_vmx.c:1.19.6.7 src/sys/arch/x86/pci/if_vmx.c:1.19.6.8
--- src/sys/arch/x86/pci/if_vmx.c:1.19.6.7 Thu Dec 26 20:23:39 2019
+++ src/sys/arch/x86/pci/if_vmx.c Wed May 13 12:39:20 2020
@@ -1,4 +1,4 @@
-/* $NetBSD: if_vmx.c,v 1.19.6.7 2019/12/26 20:23:39 martin Exp $ */
+/* $NetBSD: if_vmx.c,v 1.19.6.8 2020/05/13 12:39:20 martin Exp $ */
/* $OpenBSD: if_vmx.c,v 1.16 2014/01/22 06:04:17 brad Exp $ */
/*
@@ -19,12 +19,13 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: if_vmx.c,v 1.19.6.7 2019/12/26 20:23:39 martin Exp $");
+__KERNEL_RCSID(0, "$NetBSD: if_vmx.c,v 1.19.6.8 2020/05/13 12:39:20 martin Exp $");
#include
#include
#include
#include
+#include
#include
#include
#include
@@ -398,23 +399,11 @@ CFATTACH_DECL3_NEW(vmx, sizeof(struct vm
static int
vmxnet3_calc_queue_size(int n)
{
- int v, q;
- v = n;
- while (v != 0) {
- if (powerof2(n) != 0)
- break;
- v /= 2;
- q = rounddown2(n, v);
- if (q != 0) {
- n = q;
- break;
- }
- }
- if (n == 0)
- n = 1;
+ if (__predict_false(n <= 0))
+ return 1;
- return n;
+ return (1U << (fls32(n) - 1));
}
static inline void
CVS commit: [netbsd-8] src/sys/arch/x86/x86
Module Name:src Committed By: martin Date: Tue Jan 21 16:47:24 UTC 2020 Modified Files: src/sys/arch/x86/x86 [netbsd-8]: cpu.c Log Message: Pull up following revision(s) (requested by pgoyette in ticket #1483): sys/arch/x86/x86/cpu.c: revision 1.181 If "application processors" were skipped/disabled at boot time (due to RB_MD1 being set), don't try to examine the featurebus info, since it was never retrieved. Addresses kern/54815 XXX pullup-9 To generate a diff of this commit: cvs rdiff -u -r1.130.2.8 -r1.130.2.9 src/sys/arch/x86/x86/cpu.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/x86/x86/cpu.c diff -u src/sys/arch/x86/x86/cpu.c:1.130.2.8 src/sys/arch/x86/x86/cpu.c:1.130.2.9 --- src/sys/arch/x86/x86/cpu.c:1.130.2.8 Sat Mar 9 17:10:19 2019 +++ src/sys/arch/x86/x86/cpu.c Tue Jan 21 16:47:24 2020 @@ -1,4 +1,4 @@ -/* $NetBSD: cpu.c,v 1.130.2.8 2019/03/09 17:10:19 martin Exp $ */ +/* $NetBSD: cpu.c,v 1.130.2.9 2020/01/21 16:47:24 martin Exp $ */ /*- * Copyright (c) 2000-2012 NetBSD Foundation, Inc. @@ -62,7 +62,7 @@ */ #include -__KERNEL_RCSID(0, "$NetBSD: cpu.c,v 1.130.2.8 2019/03/09 17:10:19 martin Exp $"); +__KERNEL_RCSID(0, "$NetBSD: cpu.c,v 1.130.2.9 2020/01/21 16:47:24 martin Exp $"); #include "opt_ddb.h" #include "opt_mpbios.h" /* for MPDEBUG */ @@ -535,6 +535,16 @@ cpu_rescan(device_t self, const char *if struct cpufeature_attach_args cfaa; struct cpu_info *ci = sc->sc_info; + /* + * If we booted with RB_MD1 to disable multiprocessor, the + * auto-configuration data still contains the additional + * CPUs. But their initialization was mostly bypassed + * during attach, so we have to make sure we don't look at + * their featurebus info, since it wasn't retrieved. + */ + if (ci == NULL) + return 0; + memset(&cfaa, 0, sizeof(cfaa)); cfaa.ci = ci;
CVS commit: [netbsd-8] src/sys/arch/x86/pci
Module Name:src
Committed By: martin
Date: Thu Dec 26 20:23:40 UTC 2019
Modified Files:
src/sys/arch/x86/pci [netbsd-8]: if_vmx.c
Log Message:
Pull up following revision(s) (requested by knakahara in ticket #1477):
sys/arch/x86/pci/if_vmx.c: revision 1.53
Fix missing splnet() for ether_ioctl() caused by if_vmx.c:r1.32.
pointed out by nonaka@n.o, thanks.
To generate a diff of this commit:
cvs rdiff -u -r1.19.6.6 -r1.19.6.7 src/sys/arch/x86/pci/if_vmx.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/x86/pci/if_vmx.c
diff -u src/sys/arch/x86/pci/if_vmx.c:1.19.6.6 src/sys/arch/x86/pci/if_vmx.c:1.19.6.7
--- src/sys/arch/x86/pci/if_vmx.c:1.19.6.6 Mon Jul 22 17:47:16 2019
+++ src/sys/arch/x86/pci/if_vmx.c Thu Dec 26 20:23:39 2019
@@ -1,4 +1,4 @@
-/* $NetBSD: if_vmx.c,v 1.19.6.6 2019/07/22 17:47:16 martin Exp $ */
+/* $NetBSD: if_vmx.c,v 1.19.6.7 2019/12/26 20:23:39 martin Exp $ */
/* $OpenBSD: if_vmx.c,v 1.16 2014/01/22 06:04:17 brad Exp $ */
/*
@@ -19,7 +19,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: if_vmx.c,v 1.19.6.6 2019/07/22 17:47:16 martin Exp $");
+__KERNEL_RCSID(0, "$NetBSD: if_vmx.c,v 1.19.6.7 2019/12/26 20:23:39 martin Exp $");
#include
#include
@@ -2887,7 +2887,9 @@ vmxnet3_ioctl(struct ifnet *ifp, u_long
break;
}
if (ifp->if_mtu != nmtu) {
+ s = splnet();
error = ether_ioctl(ifp, cmd, data);
+ splx(s);
if (error == ENETRESET)
error = vmxnet3_init(ifp);
}
CVS commit: [netbsd-8] src/sys/arch/x86
Module Name:src
Committed By: bouyer
Date: Thu Dec 5 16:54:59 UTC 2019
Modified Files:
src/sys/arch/x86/include [netbsd-8]: genfb_machdep.h
src/sys/arch/x86/x86 [netbsd-8]: genfb_machdep.c hyperv.c
Log Message:
Pull up following revision(s) (requested by nonaka in ticket #1466):
sys/arch/x86/x86/hyperv.c: revision 1.5
sys/arch/x86/include/genfb_machdep.h: revision 1.4
sys/arch/x86/x86/genfb_machdep.c: revision 1.15
Prevent panic when attaching genfb if using a serial console with Hyper-V Gen.2.
To generate a diff of this commit:
cvs rdiff -u -r1.3 -r1.3.48.1 src/sys/arch/x86/include/genfb_machdep.h
cvs rdiff -u -r1.12 -r1.12.6.1 src/sys/arch/x86/x86/genfb_machdep.c
cvs rdiff -u -r1.1.2.3 -r1.1.2.4 src/sys/arch/x86/x86/hyperv.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/x86/include/genfb_machdep.h
diff -u src/sys/arch/x86/include/genfb_machdep.h:1.3 src/sys/arch/x86/include/genfb_machdep.h:1.3.48.1
--- src/sys/arch/x86/include/genfb_machdep.h:1.3 Wed Feb 9 13:24:23 2011
+++ src/sys/arch/x86/include/genfb_machdep.h Thu Dec 5 16:54:59 2019
@@ -1,4 +1,4 @@
-/* $NetBSD: genfb_machdep.h,v 1.3 2011/02/09 13:24:23 jmcneill Exp $ */
+/* $NetBSD: genfb_machdep.h,v 1.3.48.1 2019/12/05 16:54:59 bouyer Exp $ */
/*-
* Copyright (c) 2009 Jared D. McNeill
@@ -29,6 +29,7 @@
#ifndef _X86_GENFB_MACHDEP_H
#define _X86_GENFB_MACHDEP_H
+int x86_genfb_init(void);
int x86_genfb_cnattach(void);
void x86_genfb_mtrr_init(uint64_t, uint32_t);
void x86_genfb_set_console_dev(device_t);
Index: src/sys/arch/x86/x86/genfb_machdep.c
diff -u src/sys/arch/x86/x86/genfb_machdep.c:1.12 src/sys/arch/x86/x86/genfb_machdep.c:1.12.6.1
--- src/sys/arch/x86/x86/genfb_machdep.c:1.12 Sat Feb 25 01:13:50 2017
+++ src/sys/arch/x86/x86/genfb_machdep.c Thu Dec 5 16:54:59 2019
@@ -1,4 +1,4 @@
-/* $NetBSD: genfb_machdep.c,v 1.12 2017/02/25 01:13:50 nonaka Exp $ */
+/* $NetBSD: genfb_machdep.c,v 1.12.6.1 2019/12/05 16:54:59 bouyer Exp $ */
/*-
* Copyright (c) 2009 Jared D. McNeill
@@ -31,7 +31,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: genfb_machdep.c,v 1.12 2017/02/25 01:13:50 nonaka Exp $");
+__KERNEL_RCSID(0, "$NetBSD: genfb_machdep.c,v 1.12.6.1 2019/12/05 16:54:59 bouyer Exp $");
#include "opt_mtrr.h"
@@ -136,23 +136,19 @@ x86_genfb_mtrr_init(uint64_t physaddr, u
}
int
-x86_genfb_cnattach(void)
+x86_genfb_init(void)
{
- static int ncalls = 0;
+ static int inited, attached;
struct rasops_info *ri = &x86_genfb_console_screen.scr_ri;
const struct btinfo_framebuffer *fbinfo;
bus_space_tag_t t = x86_bus_space_mem;
bus_space_handle_t h;
void *bits;
- long defattr;
int err;
- /* XXX jmcneill
- * Defer console initialization until UVM is initialized
- */
- ++ncalls;
- if (ncalls < 3)
- return -1;
+ if (inited)
+ return attached;
+ inited = 1;
memset(&x86_genfb_console_screen, 0, sizeof(x86_genfb_console_screen));
@@ -206,6 +202,27 @@ x86_genfb_cnattach(void)
x86_genfb_stdscreen.textops = &ri->ri_ops;
x86_genfb_stdscreen.capabilities = ri->ri_caps;
+ attached = 1;
+ return 1;
+}
+
+int
+x86_genfb_cnattach(void)
+{
+ static int ncalls = 0;
+ struct rasops_info *ri = &x86_genfb_console_screen.scr_ri;
+ long defattr;
+
+ /* XXX jmcneill
+ * Defer console initialization until UVM is initialized
+ */
+ ++ncalls;
+ if (ncalls < 3)
+ return -1;
+
+ if (!x86_genfb_init())
+ return 0;
+
ri->ri_ops.allocattr(ri, 0, 0, 0, &defattr);
wsdisplay_preattach(&x86_genfb_stdscreen, ri, 0, 0, defattr);
@@ -213,6 +230,12 @@ x86_genfb_cnattach(void)
}
#else /* NWSDISPLAY > 0 && NGENFB > 0 */
int
+x86_genfb_init(void)
+{
+ return 0;
+}
+
+int
x86_genfb_cnattach(void)
{
return 0;
Index: src/sys/arch/x86/x86/hyperv.c
diff -u src/sys/arch/x86/x86/hyperv.c:1.1.2.3 src/sys/arch/x86/x86/hyperv.c:1.1.2.4
--- src/sys/arch/x86/x86/hyperv.c:1.1.2.3 Wed Jun 12 10:17:32 2019
+++ src/sys/arch/x86/x86/hyperv.c Thu Dec 5 16:54:59 2019
@@ -1,4 +1,4 @@
-/* $NetBSD: hyperv.c,v 1.1.2.3 2019/06/12 10:17:32 martin Exp $ */
+/* $NetBSD: hyperv.c,v 1.1.2.4 2019/12/05 16:54:59 bouyer Exp $ */
/*-
* Copyright (c) 2009-2012,2016-2017 Microsoft Corp.
@@ -33,7 +33,7 @@
*/
#include
#ifdef __KERNEL_RCSID
-__KERNEL_RCSID(0, "$NetBSD: hyperv.c,v 1.1.2.3 2019/06/12 10:17:32 martin Exp $");
+__KERNEL_RCSID(0, "$NetBSD: hyperv.c,v 1.1.2.4 2019/12/05 16:54:59 bouyer Exp $");
#endif
#ifdef __FBSDID
__FBSDID("$FreeBSD: head/sys/dev/hyperv/vmbus/hyperv.c 331757 2018-03-30 02:25:12Z emaste $");
@@ -70,7 +70,7 @@ __FBSDID("$FreeBSD: head/sys/dev/hyperv/
#include
#include
-#include
+#include
#include
#include
@@ -1103,6 +1103,9 @@ device_hyperv_register(device_t dev, voi
sizeof(*aa->aa_type)) == 0) {
prop_dictionary_t dict = device_properties(dev);
+ /* Initialize genfb for serial console */
+ x86_genfb_init();
+
/*
*
CVS commit: [netbsd-8] src/sys/arch/x86/pci
Module Name:src
Committed By: martin
Date: Thu Mar 21 14:27:02 UTC 2019
Modified Files:
src/sys/arch/x86/pci [netbsd-8]: if_vmx.c
Log Message:
Pull up following revision(s) (requested by nonaka in ticket #1219):
sys/arch/x86/pci/if_vmx.c: revision 1.27
PR/54058: vmx(4): Fix device enable command failure when the number of vCPUs
is not a power of two.
Make the size of the vmx(4) TX/RX queue a power of two not exceeding
the number of vCPUs.
To generate a diff of this commit:
cvs rdiff -u -r1.19.6.4 -r1.19.6.5 src/sys/arch/x86/pci/if_vmx.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/x86/pci/if_vmx.c
diff -u src/sys/arch/x86/pci/if_vmx.c:1.19.6.4 src/sys/arch/x86/pci/if_vmx.c:1.19.6.5
--- src/sys/arch/x86/pci/if_vmx.c:1.19.6.4 Mon Apr 16 14:34:43 2018
+++ src/sys/arch/x86/pci/if_vmx.c Thu Mar 21 14:27:02 2019
@@ -1,4 +1,4 @@
-/* $NetBSD: if_vmx.c,v 1.19.6.4 2018/04/16 14:34:43 martin Exp $ */
+/* $NetBSD: if_vmx.c,v 1.19.6.5 2019/03/21 14:27:02 martin Exp $ */
/* $OpenBSD: if_vmx.c,v 1.16 2014/01/22 06:04:17 brad Exp $ */
/*
@@ -19,7 +19,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: if_vmx.c,v 1.19.6.4 2018/04/16 14:34:43 martin Exp $");
+__KERNEL_RCSID(0, "$NetBSD: if_vmx.c,v 1.19.6.5 2019/03/21 14:27:02 martin Exp $");
#include
#include
@@ -395,6 +395,29 @@ void vmxnet3_dma_free(struct vmxnet3_sof
CFATTACH_DECL3_NEW(vmx, sizeof(struct vmxnet3_softc),
vmxnet3_match, vmxnet3_attach, vmxnet3_detach, NULL, NULL, NULL, 0);
+/* round down to the nearest power of 2 */
+static int
+vmxnet3_calc_queue_size(int n)
+{
+ int v, q;
+
+ v = n;
+ while (v != 0) {
+ if (powerof2(n) != 0)
+ break;
+ v /= 2;
+ q = rounddown2(n, v);
+ if (q != 0) {
+ n = q;
+ break;
+ }
+ }
+ if (n == 0)
+ n = 1;
+
+ return n;
+}
+
static inline void
vmxnet3_write_bar0(struct vmxnet3_softc *sc, bus_size_t r, uint32_t v)
{
@@ -520,8 +543,10 @@ vmxnet3_attach(device_t parent, device_t
sc->vmx_mtx = mutex_obj_alloc(MUTEX_DEFAULT, IPL_NET);
callout_init(&sc->vmx_tick, CALLOUT_MPSAFE);
- sc->vmx_max_ntxqueues = ncpu;
- sc->vmx_max_nrxqueues = ncpu;
+ sc->vmx_max_ntxqueues =
+ vmxnet3_calc_queue_size(MIN(VMXNET3_MAX_TX_QUEUES, ncpu));
+ sc->vmx_max_nrxqueues =
+ vmxnet3_calc_queue_size(MIN(VMXNET3_MAX_RX_QUEUES, ncpu));
sc->vmx_ntxdescs = 512;
sc->vmx_nrxdescs = 256;
sc->vmx_max_rxsegs = VMXNET3_MAX_RX_SEGS;
CVS commit: [netbsd-8] src/sys/arch/x86/x86
Module Name:src
Committed By: martin
Date: Thu Mar 7 17:01:18 UTC 2019
Modified Files:
src/sys/arch/x86/x86 [netbsd-8]: procfs_machdep.c
Log Message:
Pull up following revision(s) (requested by msaitoh in ticket #1204):
sys/arch/x86/x86/procfs_machdep.c: revision 1.28
- Add wbnoinvd, virt_ssbd, tme, cldemote, movdiri, movdir64b and pconfig.
- Move AMD 0x8008 ebx's ibpb, ibrs and stibp to x86_features[8] linux
mapping.
To generate a diff of this commit:
cvs rdiff -u -r1.15.2.7 -r1.15.2.8 src/sys/arch/x86/x86/procfs_machdep.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/x86/x86/procfs_machdep.c
diff -u src/sys/arch/x86/x86/procfs_machdep.c:1.15.2.7 src/sys/arch/x86/x86/procfs_machdep.c:1.15.2.8
--- src/sys/arch/x86/x86/procfs_machdep.c:1.15.2.7 Sun Nov 18 11:16:52 2018
+++ src/sys/arch/x86/x86/procfs_machdep.c Thu Mar 7 17:01:18 2019
@@ -1,4 +1,4 @@
-/* $NetBSD: procfs_machdep.c,v 1.15.2.7 2018/11/18 11:16:52 martin Exp $ */
+/* $NetBSD: procfs_machdep.c,v 1.15.2.8 2019/03/07 17:01:18 martin Exp $ */
/*
* Copyright (c) 2001 Wasabi Systems, Inc.
@@ -42,7 +42,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: procfs_machdep.c,v 1.15.2.7 2018/11/18 11:16:52 martin Exp $");
+__KERNEL_RCSID(0, "$NetBSD: procfs_machdep.c,v 1.15.2.8 2019/03/07 17:01:18 martin Exp $");
#include
#include
@@ -115,14 +115,14 @@ static const char * const x86_features[]
"hw_pstate", "proc_feedback", "sme", NULL,
NULL, NULL, NULL, NULL,
NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
- NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL},
+ NULL, "ibrs", "ibpb", "stibp", NULL, NULL, NULL, NULL},
{ /* (8) Linux mapping */
"tpr_shadow", "vnmi", "flexpriority", "ept",
"vpid", "npt", "lbrv", "svm_lock",
"nrip_save", "tsc_scale", "vmcb_clean", "flushbyasid",
"decodeassists", "pausefilter", "pfthreshold", "vmmcall",
- NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
+ NULL, "ept_ad", NULL, NULL, NULL, NULL, NULL, NULL,
NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL},
{ /* (9) Intel-defined: 0007 ebx */
@@ -153,9 +153,9 @@ static const char * const x86_features[]
{ /* (13) AMD 0x8008 ebx */
"clzero", "irperf", "xsaveerptr", NULL, NULL, NULL, NULL, NULL,
- NULL, NULL, NULL, NULL, "ibpb", NULL, "ibrs", "stibp",
+ NULL, "wbnoinvd", NULL, NULL, NULL, NULL, NULL, NULL,
NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
- NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL},
+ NULL, "virt_ssbd", NULL, NULL, NULL, NULL, NULL, NULL},
{ /* (14) 0x0006 eax */
"dtherm", "ida", "arat", NULL, "pln", NULL, "pts", "hwp",
@@ -176,9 +176,9 @@ static const char * const x86_features[]
NULL, "avx512vbmi", "umip", "pku",
"ospke", NULL, "avx512_vbmi2", NULL,
"gfni", "vaes", "vpclmulqdq", "avx512_vnni",
- "avx512_bitalg", NULL, "avx512_vpopcntdq", NULL,
+ "avx512_bitalg", "tme", "avx512_vpopcntdq", NULL,
"la57", NULL, NULL, NULL, NULL, NULL, "rdpid", NULL,
- NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL},
+ NULL, "cldemote", NULL, "movdiri", "movdir64b", NULL, NULL, NULL},
{ /* (17) 0x8007 ebx */
"overflow_recov", "succor", NULL, "smca", NULL, NULL, NULL, NULL,
@@ -189,7 +189,7 @@ static const char * const x86_features[]
{ /* (18) Intel 0x0007 edx */
NULL, NULL, "avx512_4vnniw", "avx512_4fmaps", NULL, NULL, NULL, NULL,
NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
- NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
+ NULL, NULL, "pconfig", NULL, NULL, NULL, NULL, NULL,
NULL, NULL, NULL, NULL,
"flush_l1d", "arch_capabilities", NULL, "ssbd"},
};
CVS commit: [netbsd-8] src/sys/arch/x86/include
Module Name:src Committed By: martin Date: Tue Feb 12 09:27:17 UTC 2019 Modified Files: src/sys/arch/x86/include [netbsd-8]: specialreg.h Log Message: Actually pull up rev 1.139 (as claimed, but not done in previous), requested by msaitoh in ticket #1187: Fix bitstring format of Intel CPUID Architectural Performance Monitoring Fn000a %ebx. To generate a diff of this commit: cvs rdiff -u -r1.98.2.10 -r1.98.2.11 src/sys/arch/x86/include/specialreg.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/x86/include/specialreg.h diff -u src/sys/arch/x86/include/specialreg.h:1.98.2.10 src/sys/arch/x86/include/specialreg.h:1.98.2.11 --- src/sys/arch/x86/include/specialreg.h:1.98.2.10 Mon Feb 11 13:23:03 2019 +++ src/sys/arch/x86/include/specialreg.h Tue Feb 12 09:27:17 2019 @@ -1,4 +1,4 @@ -/* $NetBSD: specialreg.h,v 1.98.2.10 2019/02/11 13:23:03 martin Exp $ */ +/* $NetBSD: specialreg.h,v 1.98.2.11 2019/02/12 09:27:17 martin Exp $ */ /*- * Copyright (c) 1991 The Regents of the University of California. @@ -464,8 +464,8 @@ #define CPUID_PERF_BRMISPRRETR __BIT(6) /* No branch mispredict retry */ #define CPUID_PERF_FLAGS1 "\177\20" \ - "b\0\1CORECYCL\0" "b\1\1INSTRETRY\0" "b\2\1REFCYCL\0" "b\3\1LLCREF\0" \ - "b\4\1LLCMISS\0" "b\5\1BRINSRETR\0" "b\6\1BRMISPRRETR\0" + "b\0CORECYCL\0" "b\1INSTRETRY\0" "b\2REFCYCL\0" "b\3LLCREF\0" \ + "b\4LLCMISS\0" "b\5BRINSRETR\0" "b\6BRMISPRRETR\0" /* %edx */ #define CPUID_PERF_NFFPC __BITS(4, 0) /* Num of fixed-funct perfcnt */
CVS commit: [netbsd-8] src/sys/arch/x86
Module Name:src
Committed By: martin
Date: Thu Dec 27 12:17:19 UTC 2018
Modified Files:
src/sys/arch/x86/include [netbsd-8]: specialreg.h
src/sys/arch/x86/x86 [netbsd-8]: identcpu.c
Log Message:
Pull up following revision(s) (requested by maxv in ticket #1148):
sys/arch/x86/x86/identcpu.c: revision 1.81
sys/arch/x86/x86/identcpu.c: revision 1.82
sys/arch/x86/x86/identcpu.c: revision 1.84
sys/arch/x86/include/specialreg.h: revision 1.131
Declare the MSR_VIA_ACE values as macros, and use a consistent naming,
similar to the rest of the file.
I'm wondering if I'm not fixing a huge bug here. The ECX8 value we were
using was wrong: ECX8 is bit 1, not bit 0. Bit 0 is ALTINST, an alternate
ISA, which is now known to be backdoored.
So it looks like we were explicitly enabling the backdoor.
Not tested, because I don't have a VIA cpu.
-
Merge the VIA detection code into cpu_probe_c3.
-
Explicitly disable ALTINST on VIA, in case it isn't disabled by default
already (the 'VIA cpu backdoor').
To generate a diff of this commit:
cvs rdiff -u -r1.98.2.8 -r1.98.2.9 src/sys/arch/x86/include/specialreg.h
cvs rdiff -u -r1.55.2.5 -r1.55.2.6 src/sys/arch/x86/x86/identcpu.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/x86/include/specialreg.h
diff -u src/sys/arch/x86/include/specialreg.h:1.98.2.8 src/sys/arch/x86/include/specialreg.h:1.98.2.9
--- src/sys/arch/x86/include/specialreg.h:1.98.2.8 Tue Dec 4 11:52:57 2018
+++ src/sys/arch/x86/include/specialreg.h Thu Dec 27 12:17:19 2018
@@ -1,4 +1,4 @@
-/* $NetBSD: specialreg.h,v 1.98.2.8 2018/12/04 11:52:57 martin Exp $ */
+/* $NetBSD: specialreg.h,v 1.98.2.9 2018/12/27 12:17:19 martin Exp $ */
/*-
* Copyright (c) 1991 The Regents of the University of California.
@@ -871,7 +871,9 @@
#define MSR_VIA_RNG_NOISE_B 0x0100
#define MSR_VIA_RNG_2NOISE 0x0300
#define MSR_VIA_ACE 0x1107
-#define MSR_VIA_ACE_ENABLE 0x1000
+#define VIA_ACE_ALTINST 0x0001
+#define VIA_ACE_ECX8 0x0002
+#define VIA_ACE_ENABLE 0x1000
/*
* VIA "Eden" MSRs
Index: src/sys/arch/x86/x86/identcpu.c
diff -u src/sys/arch/x86/x86/identcpu.c:1.55.2.5 src/sys/arch/x86/x86/identcpu.c:1.55.2.6
--- src/sys/arch/x86/x86/identcpu.c:1.55.2.5 Fri Jul 13 15:51:28 2018
+++ src/sys/arch/x86/x86/identcpu.c Thu Dec 27 12:17:19 2018
@@ -1,4 +1,4 @@
-/* $NetBSD: identcpu.c,v 1.55.2.5 2018/07/13 15:51:28 martin Exp $ */
+/* $NetBSD: identcpu.c,v 1.55.2.6 2018/12/27 12:17:19 martin Exp $ */
/*-
* Copyright (c) 1999, 2000, 2001, 2006, 2007, 2008 The NetBSD Foundation, Inc.
@@ -30,7 +30,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: identcpu.c,v 1.55.2.5 2018/07/13 15:51:28 martin Exp $");
+__KERNEL_RCSID(0, "$NetBSD: identcpu.c,v 1.55.2.6 2018/12/27 12:17:19 martin Exp $");
#include "opt_xen.h"
@@ -482,32 +482,13 @@ static void
cpu_probe_winchip(struct cpu_info *ci)
{
- if (cpu_vendor != CPUVENDOR_IDT)
+ if (cpu_vendor != CPUVENDOR_IDT ||
+ CPUID_TO_FAMILY(ci->ci_signature) != 5)
return;
- switch (CPUID_TO_FAMILY(ci->ci_signature)) {
- case 5:
- /* WinChip C6 */
- if (CPUID_TO_MODEL(ci->ci_signature) == 4)
- ci->ci_feat_val[0] &= ~CPUID_TSC;
- break;
- case 6:
- /*
- * VIA Eden ESP
- *
- * Quoting from page 3-4 of: "VIA Eden ESP Processor Datasheet"
- * http://www.via.com.tw/download/mainboards/6/14/Eden20v115.pdf
- *
- * 1. The CMPXCHG8B instruction is provided and always enabled,
- *however, it appears disabled in the corresponding CPUID
- *function bit 0 to avoid a bug in an early version of
- *Windows NT. However, this default can be changed via a
- *bit in the FCR MSR.
- */
- ci->ci_feat_val[0] |= CPUID_CX8;
- wrmsr(MSR_VIA_FCR, rdmsr(MSR_VIA_FCR) | 0x0001);
- break;
- }
+ /* WinChip C6 */
+ if (CPUID_TO_MODEL(ci->ci_signature) == 4)
+ ci->ci_feat_val[0] &= ~CPUID_TSC;
}
static void
@@ -528,8 +509,25 @@ cpu_probe_c3(struct cpu_info *ci)
x86_cpuid(0x8000, descs);
lfunc = descs[0];
+ if (family == 6) {
+ /*
+ * VIA Eden ESP.
+ *
+ * Quoting from page 3-4 of: "VIA Eden ESP Processor Datasheet"
+ * http://www.via.com.tw/download/mainboards/6/14/Eden20v115.pdf
+ *
+ * 1. The CMPXCHG8B instruction is provided and always enabled,
+ *however, it appears disabled in the corresponding CPUID
+ *function bit 0 to avoid a bug in an early version of
+ *Windows NT. However, this default can be changed via a
+ *bit in the FCR MSR.
+ */
+ ci->ci_feat_val[0] |= CPUID_CX8;
+ wrmsr(MSR_VIA_FCR, rdmsr(MSR_VIA_FCR) | VIA_ACE_ECX8);
+ }
+
if (family > 6 || model > 0x9 || (model == 0x9 && stepping >= 3)) {
- /* Nehemiah or Esther */
+ /* VIA Nehemiah or Esther. */
x86_cpuid(0xc000, descs);
lfunc = descs[0];
if (lfunc >= 0xc001) { /* has ACE, RNG */
@@ -598,12 +596,17 @@ cpu_p
CVS commit: [netbsd-8] src/sys/arch/x86/pci
Module Name:src Committed By: martin Date: Sat Dec 15 13:38:59 UTC 2018 Modified Files: src/sys/arch/x86/pci [netbsd-8]: amdnb_misc.c amdtemp.c Log Message: Pull up following revision(s) (requested by is in ticket #1137): sys/arch/x86/pci/amdnb_misc.c: revision 1.3 sys/arch/x86/pci/amdtemp.c: revision 1.22 Added support for AMD family 16h cpu sensors - (just like 10h-14h). (Tested on netbsd-8.0 release.) To generate a diff of this commit: cvs rdiff -u -r1.2 -r1.2.36.1 src/sys/arch/x86/pci/amdnb_misc.c cvs rdiff -u -r1.20 -r1.20.2.1 src/sys/arch/x86/pci/amdtemp.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/x86/pci/amdnb_misc.c diff -u src/sys/arch/x86/pci/amdnb_misc.c:1.2 src/sys/arch/x86/pci/amdnb_misc.c:1.2.36.1 --- src/sys/arch/x86/pci/amdnb_misc.c:1.2 Mon Apr 16 16:07:24 2012 +++ src/sys/arch/x86/pci/amdnb_misc.c Sat Dec 15 13:38:59 2018 @@ -1,4 +1,4 @@ -/* $NetBSD: amdnb_misc.c,v 1.2 2012/04/16 16:07:24 cegger Exp $ */ +/* $NetBSD: amdnb_misc.c,v 1.2.36.1 2018/12/15 13:38:59 martin Exp $ */ /* * Copyright (c) 2012 The NetBSD Foundation, Inc. * All rights reserved. @@ -29,7 +29,7 @@ */ #include -__KERNEL_RCSID(0, "$NetBSD: amdnb_misc.c,v 1.2 2012/04/16 16:07:24 cegger Exp $"); +__KERNEL_RCSID(0, "$NetBSD: amdnb_misc.c,v 1.2.36.1 2018/12/15 13:38:59 martin Exp $"); #include #include @@ -67,6 +67,8 @@ amdnb_misc_match(device_t parent, cfdata case PCI_PRODUCT_AMD_AMD64_F11_MISC: case PCI_PRODUCT_AMD_F14_NB: /* Family 12h, too */ case PCI_PRODUCT_AMD_F15_MISC: + case PCI_PRODUCT_AMD_F16_NB: + case PCI_PRODUCT_AMD_F16_30_NB: break; default: return 0; Index: src/sys/arch/x86/pci/amdtemp.c diff -u src/sys/arch/x86/pci/amdtemp.c:1.20 src/sys/arch/x86/pci/amdtemp.c:1.20.2.1 --- src/sys/arch/x86/pci/amdtemp.c:1.20 Thu Jun 1 02:45:08 2017 +++ src/sys/arch/x86/pci/amdtemp.c Sat Dec 15 13:38:59 2018 @@ -1,4 +1,4 @@ -/* $NetBSD: amdtemp.c,v 1.20 2017/06/01 02:45:08 chs Exp $ */ +/* $NetBSD: amdtemp.c,v 1.20.2.1 2018/12/15 13:38:59 martin Exp $ */ /* $OpenBSD: kate.c,v 1.2 2008/03/27 04:52:03 cnst Exp $ */ /* @@ -48,7 +48,7 @@ #include -__KERNEL_RCSID(0, "$NetBSD: amdtemp.c,v 1.20 2017/06/01 02:45:08 chs Exp $ "); +__KERNEL_RCSID(0, "$NetBSD: amdtemp.c,v 1.20.2.1 2018/12/15 13:38:59 martin Exp $ "); #include #include @@ -212,7 +212,7 @@ amdtemp_match(device_t parent, cfdata_t /* Not yet supported CPUs */ - if (family > 0x15) + if (family > 0x16) return 0; return 1; @@ -257,6 +257,7 @@ amdtemp_attach(device_t parent, device_t case 0x12: /* AMD Lynx/Sabine (Llano) */ case 0x14: /* AMD Brazos (Ontario/Zacate/Desna) */ case 0x15: + case 0x16: amdtemp_family10_init(sc); break; @@ -284,6 +285,7 @@ amdtemp_attach(device_t parent, device_t case 0x12: case 0x14: case 0x15: + case 0x16: amdtemp_family10_setup_sensors(sc, device_unit(self)); break; } @@ -312,6 +314,7 @@ amdtemp_attach(device_t parent, device_t case 0x12: case 0x14: case 0x15: + case 0x16: sc->sc_sme->sme_refresh = amdtemp_family10_refresh; break; }
CVS commit: [netbsd-8] src/sys/arch/x86/x86
Module Name:src Committed By: martin Date: Sun Nov 18 11:16:52 UTC 2018 Modified Files: src/sys/arch/x86/x86 [netbsd-8]: procfs_machdep.c Log Message: Pull up following revision(s) (requested by msaitoh in ticket #1094): sys/arch/x86/x86/procfs_machdep.c: revision 1.25 - I misread ci_acpiid as ci_apicid... LAPIC ID is in ci_cpuid. Print it correctly. - ci_initapicid(Initial APIC ID) is uint32_t, so use %u. To generate a diff of this commit: cvs rdiff -u -r1.15.2.6 -r1.15.2.7 src/sys/arch/x86/x86/procfs_machdep.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/x86/x86/procfs_machdep.c diff -u src/sys/arch/x86/x86/procfs_machdep.c:1.15.2.6 src/sys/arch/x86/x86/procfs_machdep.c:1.15.2.7 --- src/sys/arch/x86/x86/procfs_machdep.c:1.15.2.6 Sun Sep 23 17:35:33 2018 +++ src/sys/arch/x86/x86/procfs_machdep.c Sun Nov 18 11:16:52 2018 @@ -1,4 +1,4 @@ -/* $NetBSD: procfs_machdep.c,v 1.15.2.6 2018/09/23 17:35:33 martin Exp $ */ +/* $NetBSD: procfs_machdep.c,v 1.15.2.7 2018/11/18 11:16:52 martin Exp $ */ /* * Copyright (c) 2001 Wasabi Systems, Inc. @@ -42,7 +42,7 @@ */ #include -__KERNEL_RCSID(0, "$NetBSD: procfs_machdep.c,v 1.15.2.6 2018/09/23 17:35:33 martin Exp $"); +__KERNEL_RCSID(0, "$NetBSD: procfs_machdep.c,v 1.15.2.7 2018/11/18 11:16:52 martin Exp $"); #include #include @@ -421,9 +421,9 @@ procfs_getonecpu(int xcpu, struct cpu_in left = 0; l = snprintf(p, left, - "apicid\t\t: %d\n" - "initial apicid\t: %d\n", - ci->ci_acpiid, + "apicid\t\t: %lu\n" + "initial apicid\t: %u\n", + ci->ci_cpuid, ci->ci_initapicid ); size += l;
CVS commit: [netbsd-8] src/sys/arch/x86
Module Name:src Committed By: martin Date: Sun Sep 23 17:35:33 UTC 2018 Modified Files: src/sys/arch/x86/include [netbsd-8]: specialreg.h src/sys/arch/x86/x86 [netbsd-8]: procfs_machdep.c Log Message: Pull up following revision(s) (requested by msaitoh in ticket #1026): sys/arch/x86/x86/procfs_machdep.c: revision 1.24 sys/arch/x86/include/specialreg.h: revision 1.130 OK'd by maxv: - Add cpuid 7 edx L1D_FLUSH bit. - Add IA32_ARCH_SKIP_L1DFL_VMENTRY bit. - Add IA32_FLUSH_CMD MSR. To generate a diff of this commit: cvs rdiff -u -r1.98.2.6 -r1.98.2.7 src/sys/arch/x86/include/specialreg.h cvs rdiff -u -r1.15.2.5 -r1.15.2.6 src/sys/arch/x86/x86/procfs_machdep.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/x86/include/specialreg.h diff -u src/sys/arch/x86/include/specialreg.h:1.98.2.6 src/sys/arch/x86/include/specialreg.h:1.98.2.7 --- src/sys/arch/x86/include/specialreg.h:1.98.2.6 Fri Jul 13 15:51:28 2018 +++ src/sys/arch/x86/include/specialreg.h Sun Sep 23 17:35:33 2018 @@ -1,4 +1,4 @@ -/* $NetBSD: specialreg.h,v 1.98.2.6 2018/07/13 15:51:28 martin Exp $ */ +/* $NetBSD: specialreg.h,v 1.98.2.7 2018/09/23 17:35:33 martin Exp $ */ /*- * Copyright (c) 1991 The Regents of the University of California. @@ -402,13 +402,14 @@ #define CPUID_SEF_AVX512_4FMAPS __BIT(3) #define CPUID_SEF_IBRS __BIT(26) /* IBRS / IBPB Speculation Control */ #define CPUID_SEF_STIBP __BIT(27) /* STIBP Speculation Control */ +#define CPUID_SEF_L1D_FLUSH __BIT(28) /* IA32_FLUSH_CMD MSR */ #define CPUID_SEF_ARCH_CAP __BIT(29) /* IA32_ARCH_CAPABILITIES */ #define CPUID_SEF_SSBD __BIT(31) /* Speculative Store Bypass Disable */ #define CPUID_SEF_FLAGS2 "\20" \ "\3" "AVX512_4VNNIW" "\4" "AVX512_4FMAPS" \ "\33" "IBRS" "\34" "STIBP" \ - "\36" "ARCH_CAP" "\40" "SSBD" + "\35" "L1D_FLUSH" "\36" "ARCH_CAP" "\40" "SSBD" /* * CPUID Processor extended state Enumeration Fn000d @@ -661,7 +662,10 @@ #define IA32_ARCH_RDCL_NO 0x01 #define IA32_ARCH_IBRS_ALL 0x02 #define IA32_ARCH_RSBA 0x04 +#define IA32_ARCH_SKIP_L1DFL_VMENTRY 0x08 #define IA32_ARCH_SSB_NO 0x10 +#define MSR_IA32_FLUSH_CMD 0x10b +#define IA32_FLUSH_CMD_L1D_FLUSH 0x01 #define MSR_BBL_CR_ADDR 0x116 /* PII+ only */ #define MSR_BBL_CR_DECC 0x118 /* PII+ only */ #define MSR_BBL_CR_CTL 0x119 /* PII+ only */ Index: src/sys/arch/x86/x86/procfs_machdep.c diff -u src/sys/arch/x86/x86/procfs_machdep.c:1.15.2.5 src/sys/arch/x86/x86/procfs_machdep.c:1.15.2.6 --- src/sys/arch/x86/x86/procfs_machdep.c:1.15.2.5 Sat Jun 9 15:14:49 2018 +++ src/sys/arch/x86/x86/procfs_machdep.c Sun Sep 23 17:35:33 2018 @@ -1,4 +1,4 @@ -/* $NetBSD: procfs_machdep.c,v 1.15.2.5 2018/06/09 15:14:49 martin Exp $ */ +/* $NetBSD: procfs_machdep.c,v 1.15.2.6 2018/09/23 17:35:33 martin Exp $ */ /* * Copyright (c) 2001 Wasabi Systems, Inc. @@ -42,7 +42,7 @@ */ #include -__KERNEL_RCSID(0, "$NetBSD: procfs_machdep.c,v 1.15.2.5 2018/06/09 15:14:49 martin Exp $"); +__KERNEL_RCSID(0, "$NetBSD: procfs_machdep.c,v 1.15.2.6 2018/09/23 17:35:33 martin Exp $"); #include #include @@ -190,7 +190,8 @@ static const char * const x86_features[] NULL, NULL, "avx512_4vnniw", "avx512_4fmaps", NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, - NULL, NULL, NULL, NULL, NULL, "arch_capabilities", NULL, "ssbd"}, + NULL, NULL, NULL, NULL, + "flush_l1d", "arch_capabilities", NULL, "ssbd"}, }; static int procfs_getonecpu(int, struct cpu_info *, char *, size_t *);
CVS commit: [netbsd-8] src/sys/arch/x86/x86
Module Name:src
Committed By: martin
Date: Tue Aug 7 13:28:59 UTC 2018
Modified Files:
src/sys/arch/x86/x86 [netbsd-8]: cpu.c
Log Message:
Pull up following revision(s) (requested by maxv in ticket #960):
sys/arch/x86/x86/cpu.c: revision 1.159
Oh. Don't call svs_pdir_switch if SVS is disabled, that's not needed.
I was playing around with PMCs, and was wondering why some cache misses
were occurring in svs_pdir_switch while I had SVS disabled.
To generate a diff of this commit:
cvs rdiff -u -r1.130.2.6 -r1.130.2.7 src/sys/arch/x86/x86/cpu.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/x86/x86/cpu.c
diff -u src/sys/arch/x86/x86/cpu.c:1.130.2.6 src/sys/arch/x86/x86/cpu.c:1.130.2.7
--- src/sys/arch/x86/x86/cpu.c:1.130.2.6 Sat Apr 14 10:11:49 2018
+++ src/sys/arch/x86/x86/cpu.c Tue Aug 7 13:28:59 2018
@@ -1,4 +1,4 @@
-/* $NetBSD: cpu.c,v 1.130.2.6 2018/04/14 10:11:49 martin Exp $ */
+/* $NetBSD: cpu.c,v 1.130.2.7 2018/08/07 13:28:59 martin Exp $ */
/*-
* Copyright (c) 2000-2012 NetBSD Foundation, Inc.
@@ -62,7 +62,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: cpu.c,v 1.130.2.6 2018/04/14 10:11:49 martin Exp $");
+__KERNEL_RCSID(0, "$NetBSD: cpu.c,v 1.130.2.7 2018/08/07 13:28:59 martin Exp $");
#include "opt_ddb.h"
#include "opt_mpbios.h" /* for MPDEBUG */
@@ -1265,7 +1265,9 @@ void
cpu_load_pmap(struct pmap *pmap, struct pmap *oldpmap)
{
#ifdef SVS
- svs_pdir_switch(pmap);
+ if (svs_enabled) {
+ svs_pdir_switch(pmap);
+ }
#endif
#ifdef PAE
CVS commit: [netbsd-8] src/sys/arch/x86/x86
Module Name:src
Committed By: snj
Date: Thu Jul 26 23:23:50 UTC 2018
Modified Files:
src/sys/arch/x86/x86 [netbsd-8]: coretemp.c
Log Message:
Pull up following revision(s) (requested by msaitoh in ticket #936):
sys/arch/x86/x86/coretemp.c: revision 1.36
- Detect and set Atom's Tj(max) to 90 if it's not the 45nm D400/D500/N400
series (90 for Diamondville and 100 for Pineview). From FreeBSD r221509.
- Reduce diff a little against FreeBSD.
To generate a diff of this commit:
cvs rdiff -u -r1.35 -r1.35.10.1 src/sys/arch/x86/x86/coretemp.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/x86/x86/coretemp.c
diff -u src/sys/arch/x86/x86/coretemp.c:1.35 src/sys/arch/x86/x86/coretemp.c:1.35.10.1
--- src/sys/arch/x86/x86/coretemp.c:1.35 Thu Jul 7 06:55:40 2016
+++ src/sys/arch/x86/x86/coretemp.c Thu Jul 26 23:23:50 2018
@@ -1,4 +1,4 @@
-/* $NetBSD: coretemp.c,v 1.35 2016/07/07 06:55:40 msaitoh Exp $ */
+/* $NetBSD: coretemp.c,v 1.35.10.1 2018/07/26 23:23:50 snj Exp $ */
/*-
* Copyright (c) 2011 The NetBSD Foundation, Inc.
@@ -61,7 +61,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: coretemp.c,v 1.35 2016/07/07 06:55:40 msaitoh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: coretemp.c,v 1.35.10.1 2018/07/26 23:23:50 snj Exp $");
#include
#include
@@ -265,14 +265,12 @@ coretemp_tjmax(device_t self)
model = CPUID_TO_MODEL(ci->ci_signature);
stepping = CPUID_TO_STEPPING(ci->ci_signature);
- sc->sc_tjmax = 100;
-
/*
- * On some Core 2 CPUs, there is an undocumented
- * MSR that tells if Tj(max) is 100 or 85. Note
- * that MSR_IA32_EXT_CONFIG is not safe on all CPUs.
+ * Use 100C as the initial value.
*/
- if ((model == 0x0F && stepping >= 2) || (model == 0x0E)) {
+ sc->sc_tjmax = 100;
+
+ if ((model == 0x0f && stepping >= 2) || (model == 0x0e)) {
if (rdmsr_safe(MSR_IA32_EXT_CONFIG, &msr) == EFAULT)
return;
@@ -285,6 +283,12 @@ coretemp_tjmax(device_t self)
/* The mobile Penryn family. */
sc->sc_tjmax = 105;
return;
+ } else if (model == 0x1c) {
+ if (stepping == 0x0a) {
+ /* 45nm Atom D400, N400 and D500 series */
+ sc->sc_tjmax = 100;
+ } else
+ sc->sc_tjmax = 90;
} else {
/*
* Attempt to get Tj(max) from IA32_TEMPERATURE_TARGET,
CVS commit: [netbsd-8] src/sys/arch/x86
Module Name:src
Committed By: martin
Date: Fri Jul 13 15:51:28 UTC 2018
Modified Files:
src/sys/arch/x86/include [netbsd-8]: specialreg.h
src/sys/arch/x86/x86 [netbsd-8]: identcpu.c
Log Message:
Pull up following revision(s) (requested by maya in ticket #912):
sys/arch/x86/x86/identcpu.c: revision 1.79
sys/arch/x86/include/specialreg.h: revision 1.127
Disable MWAIT/MONITOR on Apollo Lake CPUs to workaround APL30 errata.
We use MWAIT/MONITOR to hatch secondary CPUs. The errata means that
the wakeup may not happen, so SMP boot fails.
Use wrmsr to disable it in hardware too, for extra paranoia.
PR port-amd64/53420,
also reported on netbsd-users by joern clausen and ssartor.
To generate a diff of this commit:
cvs rdiff -u -r1.98.2.5 -r1.98.2.6 src/sys/arch/x86/include/specialreg.h
cvs rdiff -u -r1.55.2.4 -r1.55.2.5 src/sys/arch/x86/x86/identcpu.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/x86/include/specialreg.h
diff -u src/sys/arch/x86/include/specialreg.h:1.98.2.5 src/sys/arch/x86/include/specialreg.h:1.98.2.6
--- src/sys/arch/x86/include/specialreg.h:1.98.2.5 Sat Jun 9 15:12:21 2018
+++ src/sys/arch/x86/include/specialreg.h Fri Jul 13 15:51:28 2018
@@ -1,4 +1,4 @@
-/* $NetBSD: specialreg.h,v 1.98.2.5 2018/06/09 15:12:21 martin Exp $ */
+/* $NetBSD: specialreg.h,v 1.98.2.6 2018/07/13 15:51:28 martin Exp $ */
/*-
* Copyright (c) 1991 The Regents of the University of California.
@@ -683,6 +683,7 @@
#define MSR_THERM_STATUS 0x19c
#define MSR_THERM2_CTL 0x19d /* Pentium M */
#define MSR_MISC_ENABLE 0x1a0
+#define IA32_MISC_MWAIT_EN 0x4
#define MSR_TEMPERATURE_TARGET 0x1a2
#define MSR_DEBUGCTLMSR 0x1d9
#define MSR_LASTBRANCHFROMIP 0x1db
Index: src/sys/arch/x86/x86/identcpu.c
diff -u src/sys/arch/x86/x86/identcpu.c:1.55.2.4 src/sys/arch/x86/x86/identcpu.c:1.55.2.5
--- src/sys/arch/x86/x86/identcpu.c:1.55.2.4 Sat Jun 23 11:39:02 2018
+++ src/sys/arch/x86/x86/identcpu.c Fri Jul 13 15:51:28 2018
@@ -1,4 +1,4 @@
-/* $NetBSD: identcpu.c,v 1.55.2.4 2018/06/23 11:39:02 martin Exp $ */
+/* $NetBSD: identcpu.c,v 1.55.2.5 2018/07/13 15:51:28 martin Exp $ */
/*-
* Copyright (c) 1999, 2000, 2001, 2006, 2007, 2008 The NetBSD Foundation, Inc.
@@ -30,7 +30,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: identcpu.c,v 1.55.2.4 2018/06/23 11:39:02 martin Exp $");
+__KERNEL_RCSID(0, "$NetBSD: identcpu.c,v 1.55.2.5 2018/07/13 15:51:28 martin Exp $");
#include "opt_xen.h"
@@ -189,6 +189,24 @@ cpu_probe_intel_cache(struct cpu_info *c
}
static void
+cpu_probe_intel_errata(struct cpu_info *ci)
+{
+ u_int family, model, stepping;
+
+ family = CPUID_TO_FAMILY(ci->ci_signature);
+ model = CPUID_TO_MODEL(ci->ci_signature);
+ stepping = CPUID_TO_STEPPING(ci->ci_signature);
+
+ if (family == 0x6 && model == 0x5C && stepping == 0x9) { /* Apollo Lake */
+ wrmsr(MSR_MISC_ENABLE,
+ rdmsr(MSR_MISC_ENABLE) & ~IA32_MISC_MWAIT_EN);
+
+ cpu_feature[1] &= ~CPUID2_MONITOR;
+ ci->ci_feat_val[1] &= ~CPUID2_MONITOR;
+ }
+}
+
+static void
cpu_probe_intel(struct cpu_info *ci)
{
@@ -196,6 +214,7 @@ cpu_probe_intel(struct cpu_info *ci)
return;
cpu_probe_intel_cache(ci);
+ cpu_probe_intel_errata(ci);
}
static void
CVS commit: [netbsd-8] src/sys/arch/x86/x86
Module Name:src Committed By: martin Date: Sat Jun 9 15:14:49 UTC 2018 Modified Files: src/sys/arch/x86/x86 [netbsd-8]: procfs_machdep.c Log Message: Pull up following revision(s) (requested by msaitoh in ticket #867): sys/arch/x86/x86/procfs_machdep.c: revision 1.23 Add SSBD bit for Intel. To generate a diff of this commit: cvs rdiff -u -r1.15.2.4 -r1.15.2.5 src/sys/arch/x86/x86/procfs_machdep.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/x86/x86/procfs_machdep.c diff -u src/sys/arch/x86/x86/procfs_machdep.c:1.15.2.4 src/sys/arch/x86/x86/procfs_machdep.c:1.15.2.5 --- src/sys/arch/x86/x86/procfs_machdep.c:1.15.2.4 Fri Mar 16 13:08:14 2018 +++ src/sys/arch/x86/x86/procfs_machdep.c Sat Jun 9 15:14:49 2018 @@ -1,4 +1,4 @@ -/* $NetBSD: procfs_machdep.c,v 1.15.2.4 2018/03/16 13:08:14 martin Exp $ */ +/* $NetBSD: procfs_machdep.c,v 1.15.2.5 2018/06/09 15:14:49 martin Exp $ */ /* * Copyright (c) 2001 Wasabi Systems, Inc. @@ -42,7 +42,7 @@ */ #include -__KERNEL_RCSID(0, "$NetBSD: procfs_machdep.c,v 1.15.2.4 2018/03/16 13:08:14 martin Exp $"); +__KERNEL_RCSID(0, "$NetBSD: procfs_machdep.c,v 1.15.2.5 2018/06/09 15:14:49 martin Exp $"); #include #include @@ -190,7 +190,7 @@ static const char * const x86_features[] NULL, NULL, "avx512_4vnniw", "avx512_4fmaps", NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, - NULL, NULL, NULL, NULL, NULL, "arch_capabilities", NULL, NULL}, + NULL, NULL, NULL, NULL, NULL, "arch_capabilities", NULL, "ssbd"}, }; static int procfs_getonecpu(int, struct cpu_info *, char *, size_t *);
CVS commit: [netbsd-8] src/sys/arch/x86/acpi
Module Name:src
Committed By: martin
Date: Fri May 4 16:07:59 UTC 2018
Modified Files:
src/sys/arch/x86/acpi [netbsd-8]: acpi_wakeup.c
Log Message:
Pull up following revision(s) (requested by maya in ticket #784):
sys/arch/x86/acpi/acpi_wakeup.c: revision 1.46
Save and restore xcr0 when doing ACPI sleeps. Should fix PR/49174.
To generate a diff of this commit:
cvs rdiff -u -r1.45 -r1.45.8.1 src/sys/arch/x86/acpi/acpi_wakeup.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/x86/acpi/acpi_wakeup.c
diff -u src/sys/arch/x86/acpi/acpi_wakeup.c:1.45 src/sys/arch/x86/acpi/acpi_wakeup.c:1.45.8.1
--- src/sys/arch/x86/acpi/acpi_wakeup.c:1.45 Thu Oct 20 16:05:04 2016
+++ src/sys/arch/x86/acpi/acpi_wakeup.c Fri May 4 16:07:59 2018
@@ -1,4 +1,4 @@
-/* $NetBSD: acpi_wakeup.c,v 1.45 2016/10/20 16:05:04 maxv Exp $ */
+/* $NetBSD: acpi_wakeup.c,v 1.45.8.1 2018/05/04 16:07:59 martin Exp $ */
/*-
* Copyright (c) 2002, 2011 The NetBSD Foundation, Inc.
@@ -59,7 +59,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: acpi_wakeup.c,v 1.45 2016/10/20 16:05:04 maxv Exp $");
+__KERNEL_RCSID(0, "$NetBSD: acpi_wakeup.c,v 1.45.8.1 2018/05/04 16:07:59 martin Exp $");
#include
#include
@@ -250,6 +250,7 @@ acpi_md_sleep_enter(int state)
void
acpi_cpu_sleep(struct cpu_info *ci)
{
+ uint64_t xcr0 = 0;
int s;
KASSERT(!CPU_IS_PRIMARY(ci));
@@ -259,12 +260,21 @@ acpi_cpu_sleep(struct cpu_info *ci)
fpusave_cpu(true);
x86_disable_intr();
+ /*
+ * XXX also need to save the PMCs, the dbregs, and probably a few
+ * MSRs too.
+ */
+ if (rcr4() & CR4_OSXSAVE)
+ xcr0 = rdxcr(0);
+
if (acpi_md_sleep_prepare(-1))
goto out;
/* Execute Wakeup */
cpu_init_msrs(ci, false);
fpuinit(ci);
+ if (rcr4() & CR4_OSXSAVE)
+ wrxcr(0, xcr0);
#if NLAPIC > 0
lapic_enable();
@@ -285,6 +295,7 @@ out:
int
acpi_md_sleep(int state)
{
+ uint64_t xcr0 = 0;
int s, ret = 0;
#ifdef MULTIPROCESSOR
struct cpu_info *ci;
@@ -315,12 +326,21 @@ acpi_md_sleep(int state)
}
#endif
+ /*
+ * XXX also need to save the PMCs, the dbregs, and probably a few
+ * MSRs too.
+ */
+ if (rcr4() & CR4_OSXSAVE)
+ xcr0 = rdxcr(0);
+
if (acpi_md_sleep_prepare(state))
goto out;
/* Execute Wakeup */
cpu_init_msrs(&cpu_info_primary, false);
fpuinit(&cpu_info_primary);
+ if (rcr4() & CR4_OSXSAVE)
+ wrxcr(0, xcr0);
i8259_reinit();
#if NLAPIC > 0
lapic_enable();
CVS commit: [netbsd-8] src/sys/arch/x86/include
Module Name:src Committed By: martin Date: Wed Apr 18 14:14:17 UTC 2018 Modified Files: src/sys/arch/x86/include [netbsd-8]: specialreg.h Log Message: Pull up following revision(s) (requested by msaitoh in ticket #778): sys/arch/x86/include/specialreg.h: revision 1.118,1.119 From the latest Intel SDM: - Add Intel Fn_0006 %eax new bit 14-20 (HWP stuff). - Intel Fn_0007 %ecx bit 22 is for both RDPID and IA32_TSC_AUX. Add Some bit definitions of AMD Fn8001 %edx: - MMX - FXSR To generate a diff of this commit: cvs rdiff -u -r1.98.2.3 -r1.98.2.4 src/sys/arch/x86/include/specialreg.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/x86/include/specialreg.h diff -u src/sys/arch/x86/include/specialreg.h:1.98.2.3 src/sys/arch/x86/include/specialreg.h:1.98.2.4 --- src/sys/arch/x86/include/specialreg.h:1.98.2.3 Sat Mar 31 10:51:05 2018 +++ src/sys/arch/x86/include/specialreg.h Wed Apr 18 14:14:17 2018 @@ -1,4 +1,4 @@ -/* $NetBSD: specialreg.h,v 1.98.2.3 2018/03/31 10:51:05 martin Exp $ */ +/* $NetBSD: specialreg.h,v 1.98.2.4 2018/04/18 14:14:17 martin Exp $ */ /*- * Copyright (c) 1991 The Regents of the University of California. @@ -300,12 +300,19 @@ #define CPUID_DSPM_HWP_PLR __BIT(11) /* HWP Package Level Request */ #define CPUID_DSPM_HDC __BIT(13) /* Hardware Duty Cycling */ #define CPUID_DSPM_TBMT3 __BIT(14) /* Turbo Boost Max Technology 3.0 */ +#define CPUID_DSPM_HWP_CAP__BIT(15) /* HWP Capabilities */ +#define CPUID_DSPM_HWP_PECI __BIT(16) /* HWP PECI override */ +#define CPUID_DSPM_HWP_FLEX __BIT(17) /* Flexible HWP */ +#define CPUID_DSPM_HWP_FAST __BIT(18) /* Fast access for IA32_HWP_REQUEST */ +#define CPUID_DSPM_HWP_IGNIDL __BIT(20) /* Ignore Idle Logical Processor HWP */ #define CPUID_DSPM_FLAGS "\20" \ "\1" "DTS" "\2" "IDA" "\3" "ARAT" \ "\5" "PLN" "\6" "ECMD" "\7" "PTM" "\10" "HWP" \ "\11" "HWP_NOTIFY" "\12" "HWP_ACTWIN" "\13" "HWP_EPP" "\14" "HWP_PLR" \ - "\16" "HDC" "\17" "TBM3" + "\16" "HDC" "\17" "TBM3" "\20" "HWP_CAP" \ + "\21" "HWP_PECI" "\22" "HWP_FLEX" "\23" "HWP_FAST" \ + "25" "HWP_IGNIDL" /* * Intel Digital Thermal Sensor and @@ -381,7 +388,7 @@ #define CPUID_SEF_AVX512_VNNI __BIT(11) /* Vector neural Network Instruction */ #define CPUID_SEF_AVX512_BITALG __BIT(12) #define CPUID_SEF_AVX512_VPOPCNTDQ __BIT(14) -#define CPUID_SEF_RDPID __BIT(22) /* ReaD Processor ID */ +#define CPUID_SEF_RDPID __BIT(22) /* RDPID and IA32_TSC_AUX */ #define CPUID_SEF_SGXLC __BIT(30) /* SGX Launch Configuration */ #define CPUID_SEF_FLAGS1 "\20" \ @@ -491,6 +498,8 @@ #define CPUID_MPC 0x0008 /* Multiprocessing Capable */ #define CPUID_NOX 0x0010 /* No Execute Page Protection */ #define CPUID_MMXX 0x0040 /* AMD MMX Extensions */ +/* CPUID_MMX MMX supported */ +/* CPUID_FXSR fast FP/MMX save/restore */ #define CPUID_FFXSR 0x0200 /* FXSAVE/FXSTOR Extensions */ /* CPUID_P1GB 1GB Large Page Support */ /* CPUID_RDTSCP Read TSC Pair Instruction */ @@ -499,9 +508,11 @@ #define CPUID_3DNOW 0x8000 /* 3DNow! Instructions */ #define CPUID_EXT_FLAGS "\20" \ - "\14" "SYSCALL/SYSRET" "\24" "MPC" "\25" "NOX" \ - "\27" "MMXX" "\32" "FFXSR" "\33" "P1GB" "\34" "RDTSCP" \ - "\36" "LONG" "\37" "3DNOW2" "\40" "3DNOW" + "\14" "SYSCALL/SYSRET" \ + "\24" "MPC" \ + "\25" "NOX" "\27" "MMXX" "\30" "MMX" \ + "\31" "FXSR" "\32" "FFXSR" "\33" "P1GB" "\34" "RDTSCP" \ + "\36" "LONG" "\37" "3DNOW2" "\40" "3DNOW" /* AMD Fn8001 extended features - %ecx */ /* CPUID_LAHF LAHF/SAHF instruction */
CVS commit: [netbsd-8] src/sys/arch/x86/pci
Module Name:src
Committed By: martin
Date: Mon Apr 16 14:34:43 UTC 2018
Modified Files:
src/sys/arch/x86/pci [netbsd-8]: if_vmx.c
Log Message:
Pull up following revision(s) (requested by nonaka in ticket #767):
sys/arch/x86/pci/if_vmx.c: revision 1.23,1.24
vmx(4): handled SIOCZIFDATA.
vmx(4): compute if_ibytes using rxq->vxrxq_stats.vmrxs_ibytes.
To generate a diff of this commit:
cvs rdiff -u -r1.19.6.3 -r1.19.6.4 src/sys/arch/x86/pci/if_vmx.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/x86/pci/if_vmx.c
diff -u src/sys/arch/x86/pci/if_vmx.c:1.19.6.3 src/sys/arch/x86/pci/if_vmx.c:1.19.6.4
--- src/sys/arch/x86/pci/if_vmx.c:1.19.6.3 Mon Apr 16 14:18:53 2018
+++ src/sys/arch/x86/pci/if_vmx.c Mon Apr 16 14:34:43 2018
@@ -1,4 +1,4 @@
-/* $NetBSD: if_vmx.c,v 1.19.6.3 2018/04/16 14:18:53 martin Exp $ */
+/* $NetBSD: if_vmx.c,v 1.19.6.4 2018/04/16 14:34:43 martin Exp $ */
/* $OpenBSD: if_vmx.c,v 1.16 2014/01/22 06:04:17 brad Exp $ */
/*
@@ -19,7 +19,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: if_vmx.c,v 1.19.6.3 2018/04/16 14:18:53 martin Exp $");
+__KERNEL_RCSID(0, "$NetBSD: if_vmx.c,v 1.19.6.4 2018/04/16 14:34:43 martin Exp $");
#include
#include
@@ -2892,27 +2892,40 @@ vmxnet3_ioctl(struct ifnet *ifp, u_long
splx(s);
break;
case SIOCGIFDATA:
+ case SIOCZIFDATA:
ifp->if_ipackets = 0;
+ ifp->if_ibytes = 0;
ifp->if_iqdrops = 0;
ifp->if_ierrors = 0;
for (int i = 0; i < sc->vmx_nrxqueues; i++) {
- ifp->if_ipackets +=
- sc->vmx_rxq[i].vxrxq_stats.vmrxs_ipackets;
- ifp->if_iqdrops +=
- sc->vmx_rxq[i].vxrxq_stats.vmrxs_iqdrops;
- ifp->if_ierrors +=
- sc->vmx_rxq[i].vxrxq_stats.vmrxs_ierrors;
+ struct vmxnet3_rxqueue *rxq = &sc->vmx_rxq[i];
+
+ VMXNET3_RXQ_LOCK(rxq);
+ ifp->if_ipackets += rxq->vxrxq_stats.vmrxs_ipackets;
+ ifp->if_ibytes += rxq->vxrxq_stats.vmrxs_ibytes;
+ ifp->if_iqdrops += rxq->vxrxq_stats.vmrxs_iqdrops;
+ ifp->if_ierrors += rxq->vxrxq_stats.vmrxs_ierrors;
+ if (cmd == SIOCZIFDATA) {
+memset(&rxq->vxrxq_stats, 0,
+sizeof(rxq->vxrxq_stats));
+ }
+ VMXNET3_RXQ_UNLOCK(rxq);
}
ifp->if_opackets = 0;
ifp->if_obytes = 0;
ifp->if_omcasts = 0;
for (int i = 0; i < sc->vmx_ntxqueues; i++) {
- ifp->if_opackets +=
- sc->vmx_txq[i].vxtxq_stats.vmtxs_opackets;
- ifp->if_obytes +=
- sc->vmx_txq[i].vxtxq_stats.vmtxs_obytes;
- ifp->if_omcasts +=
- sc->vmx_txq[i].vxtxq_stats.vmtxs_omcasts;
+ struct vmxnet3_txqueue *txq = &sc->vmx_txq[i];
+
+ VMXNET3_TXQ_LOCK(txq);
+ ifp->if_opackets += txq->vxtxq_stats.vmtxs_opackets;
+ ifp->if_obytes += txq->vxtxq_stats.vmtxs_obytes;
+ ifp->if_omcasts += txq->vxtxq_stats.vmtxs_omcasts;
+ if (cmd == SIOCZIFDATA) {
+memset(&txq->vxtxq_stats, 0,
+sizeof(txq->vxtxq_stats));
+ }
+ VMXNET3_TXQ_UNLOCK(txq);
}
/* FALLTHROUGH */
default:
CVS commit: [netbsd-8] src/sys/arch/x86/pci
Module Name:src
Committed By: martin
Date: Mon Apr 16 14:18:53 UTC 2018
Modified Files:
src/sys/arch/x86/pci [netbsd-8]: if_vmx.c
Log Message:
Pull up following revision(s) (requested by nonaka in ticket #762):
sys/arch/x86/pci/if_vmx.c: revision 1.22
vmx(4): Fix calculation of interface statistics counter.
To generate a diff of this commit:
cvs rdiff -u -r1.19.6.2 -r1.19.6.3 src/sys/arch/x86/pci/if_vmx.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/x86/pci/if_vmx.c
diff -u src/sys/arch/x86/pci/if_vmx.c:1.19.6.2 src/sys/arch/x86/pci/if_vmx.c:1.19.6.3
--- src/sys/arch/x86/pci/if_vmx.c:1.19.6.2 Mon Feb 26 01:01:41 2018
+++ src/sys/arch/x86/pci/if_vmx.c Mon Apr 16 14:18:53 2018
@@ -1,4 +1,4 @@
-/* $NetBSD: if_vmx.c,v 1.19.6.2 2018/02/26 01:01:41 snj Exp $ */
+/* $NetBSD: if_vmx.c,v 1.19.6.3 2018/04/16 14:18:53 martin Exp $ */
/* $OpenBSD: if_vmx.c,v 1.16 2014/01/22 06:04:17 brad Exp $ */
/*
@@ -19,7 +19,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: if_vmx.c,v 1.19.6.2 2018/02/26 01:01:41 snj Exp $");
+__KERNEL_RCSID(0, "$NetBSD: if_vmx.c,v 1.19.6.3 2018/04/16 14:18:53 martin Exp $");
#include
#include
@@ -2892,20 +2892,26 @@ vmxnet3_ioctl(struct ifnet *ifp, u_long
splx(s);
break;
case SIOCGIFDATA:
+ ifp->if_ipackets = 0;
+ ifp->if_iqdrops = 0;
+ ifp->if_ierrors = 0;
for (int i = 0; i < sc->vmx_nrxqueues; i++) {
- ifp->if_ipackets =
+ ifp->if_ipackets +=
sc->vmx_rxq[i].vxrxq_stats.vmrxs_ipackets;
- ifp->if_iqdrops =
+ ifp->if_iqdrops +=
sc->vmx_rxq[i].vxrxq_stats.vmrxs_iqdrops;
- ifp->if_ierrors =
+ ifp->if_ierrors +=
sc->vmx_rxq[i].vxrxq_stats.vmrxs_ierrors;
}
+ ifp->if_opackets = 0;
+ ifp->if_obytes = 0;
+ ifp->if_omcasts = 0;
for (int i = 0; i < sc->vmx_ntxqueues; i++) {
- ifp->if_opackets =
+ ifp->if_opackets +=
sc->vmx_txq[i].vxtxq_stats.vmtxs_opackets;
- ifp->if_obytes =
+ ifp->if_obytes +=
sc->vmx_txq[i].vxtxq_stats.vmtxs_obytes;
- ifp->if_omcasts =
+ ifp->if_omcasts +=
sc->vmx_txq[i].vxtxq_stats.vmtxs_omcasts;
}
/* FALLTHROUGH */
CVS commit: [netbsd-8] src/sys/arch/x86/include
Module Name:src
Committed By: martin
Date: Sat Apr 14 10:41:15 UTC 2018
Modified Files:
src/sys/arch/x86/include [netbsd-8]: bootinfo.h
Log Message:
Pull up following revision(s) (requested by nonaka in ticket #753):
sys/arch/x86/include/bootinfo.h: revision 1.29
x86: Increase BOOTINFO_MAXSIZE to 8Kib.
Proposed on port-i386 and port-amd64 with no objections:
http://mail-index.netbsd.org/port-i386/2018/04/11/msg003692.html
http://mail-index.netbsd.org/port-amd64/2018/04/11/msg002697.html
To generate a diff of this commit:
cvs rdiff -u -r1.26 -r1.26.6.1 src/sys/arch/x86/include/bootinfo.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/x86/include/bootinfo.h
diff -u src/sys/arch/x86/include/bootinfo.h:1.26 src/sys/arch/x86/include/bootinfo.h:1.26.6.1
--- src/sys/arch/x86/include/bootinfo.h:1.26 Tue Feb 14 13:25:22 2017
+++ src/sys/arch/x86/include/bootinfo.h Sat Apr 14 10:41:15 2018
@@ -1,4 +1,4 @@
-/* $NetBSD: bootinfo.h,v 1.26 2017/02/14 13:25:22 nonaka Exp $ */
+/* $NetBSD: bootinfo.h,v 1.26.6.1 2018/04/14 10:41:15 martin Exp $ */
/*
* Copyright (c) 1997
@@ -244,7 +244,7 @@ struct btinfo_efimemmap {
#ifdef _KERNEL
-#define BOOTINFO_MAXSIZE 4096
+#define BOOTINFO_MAXSIZE 8192
#ifndef _LOCORE
/*
CVS commit: [netbsd-8] src/sys/arch/x86/x86
Module Name:src
Committed By: martin
Date: Thu Apr 12 13:08:16 UTC 2018
Modified Files:
src/sys/arch/x86/x86 [netbsd-8]: dbregs.c
Log Message:
Pull up following revision(s) (requested by kamil in ticket #712):
sys/arch/x86/x86/dbregs.c: revision 1.7-1.9
Fix the check, should be >=.
Hum, don't let userland set bit 13, because this can crash the kernel.
Add paranoid code to X86 Debug Registers
Reset certain bits in DR6 and DR7 in x86_dbregs_setup_initdbstate().
Reset X86_BREAKPOINT_CONDITION_DETECTED in DR6.
Reset X86_DR7_GENERAL_DETECT_ENABLE in DR7.
It's allowed by devices or software before the kernel boot, to
use these registers for their own purposes. Handle this paranoid case
explicitly setting the mentioned bits to zero.
Sponsored by
To generate a diff of this commit:
cvs rdiff -u -r1.6 -r1.6.6.1 src/sys/arch/x86/x86/dbregs.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/x86/x86/dbregs.c
diff -u src/sys/arch/x86/x86/dbregs.c:1.6 src/sys/arch/x86/x86/dbregs.c:1.6.6.1
--- src/sys/arch/x86/x86/dbregs.c:1.6 Thu Feb 23 12:01:12 2017
+++ src/sys/arch/x86/x86/dbregs.c Thu Apr 12 13:08:16 2018
@@ -1,4 +1,4 @@
-/* $NetBSD: dbregs.c,v 1.6 2017/02/23 12:01:12 martin Exp $ */
+/* $NetBSD: dbregs.c,v 1.6.6.1 2018/04/12 13:08:16 martin Exp $ */
/*-
* Copyright (c) 2016 The NetBSD Foundation, Inc.
@@ -43,6 +43,18 @@ extern struct pool x86_dbregspl;
static struct dbreg initdbstate;
+#define X86_BREAKPOINT_CONDITION_DETECTED ( \
+ X86_DR6_DR0_BREAKPOINT_CONDITION_DETECTED | \
+ X86_DR6_DR1_BREAKPOINT_CONDITION_DETECTED | \
+ X86_DR6_DR2_BREAKPOINT_CONDITION_DETECTED | \
+ X86_DR6_DR3_BREAKPOINT_CONDITION_DETECTED )
+
+#define X86_GLOBAL_BREAKPOINT ( \
+ X86_DR7_GLOBAL_DR0_BREAKPOINT | \
+ X86_DR7_GLOBAL_DR1_BREAKPOINT | \
+ X86_DR7_GLOBAL_DR2_BREAKPOINT | \
+ X86_DR7_GLOBAL_DR3_BREAKPOINT )
+
void
x86_dbregs_setup_initdbstate(void)
{
@@ -56,19 +68,17 @@ x86_dbregs_setup_initdbstate(void)
initdbstate.dr[6] = rdr6();
initdbstate.dr[7] = rdr7();
/* DR8-DR15 are reserved - skip */
-}
-#define X86_BREAKPOINT_CONDITION_DETECTED ( \
- X86_DR6_DR0_BREAKPOINT_CONDITION_DETECTED | \
- X86_DR6_DR1_BREAKPOINT_CONDITION_DETECTED | \
- X86_DR6_DR2_BREAKPOINT_CONDITION_DETECTED | \
- X86_DR6_DR3_BREAKPOINT_CONDITION_DETECTED )
+ /*
+ * Paranoid case.
+ *
+ * Explicitly reset some bits just in case they could be
+ * set by brave software/hardware before the kernel boot.
+ */
+ initdbstate.dr[6] &= ~X86_BREAKPOINT_CONDITION_DETECTED;
-#define X86_GLOBAL_BREAKPOINT ( \
- X86_DR7_GLOBAL_DR0_BREAKPOINT | \
- X86_DR7_GLOBAL_DR1_BREAKPOINT | \
- X86_DR7_GLOBAL_DR2_BREAKPOINT | \
- X86_DR7_GLOBAL_DR3_BREAKPOINT )
+ initdbstate.dr[7] &= ~X86_DR7_GENERAL_DETECT_ENABLE;
+}
void
x86_dbregs_clear(struct lwp *l)
@@ -188,14 +198,14 @@ x86_dbregs_validate(const struct dbreg *
/* Check that DR0-DR3 contain user-space address */
for (i = 0; i < X86_DBREGS; i++)
- if (regs->dr[i] > (vaddr_t)VM_MAXUSER_ADDRESS)
+ if (regs->dr[i] >= (vaddr_t)VM_MAXUSER_ADDRESS)
return EINVAL;
+ if (regs->dr[7] & X86_DR7_GENERAL_DETECT_ENABLE)
+ return EINVAL;
+
/*
* Skip checks for reserved registers (DR4-DR5, DR8-DR15).
- *
- * Don't validate DR6-DR7 as some bits are set by hardware and a user
- * cannot overwrite them.
*/
return 0;
CVS commit: [netbsd-8] src/sys/arch/x86/pci
Module Name:src
Committed By: martin
Date: Wed Apr 11 14:53:51 UTC 2018
Modified Files:
src/sys/arch/x86/pci [netbsd-8]: pci_machdep.c
Log Message:
Pull up following revision(s) (requested by nonaka in ticket #740):
sys/arch/x86/pci/pci_machdep.c: revision 1.80
efiboot reports parent ppb bus/device/function of booted network inteface.
To generate a diff of this commit:
cvs rdiff -u -r1.79 -r1.79.2.1 src/sys/arch/x86/pci/pci_machdep.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/x86/pci/pci_machdep.c
diff -u src/sys/arch/x86/pci/pci_machdep.c:1.79 src/sys/arch/x86/pci/pci_machdep.c:1.79.2.1
--- src/sys/arch/x86/pci/pci_machdep.c:1.79 Thu Jun 1 02:45:08 2017
+++ src/sys/arch/x86/pci/pci_machdep.c Wed Apr 11 14:53:50 2018
@@ -1,4 +1,4 @@
-/* $NetBSD: pci_machdep.c,v 1.79 2017/06/01 02:45:08 chs Exp $ */
+/* $NetBSD: pci_machdep.c,v 1.79.2.1 2018/04/11 14:53:50 martin Exp $ */
/*-
* Copyright (c) 1997, 1998 The NetBSD Foundation, Inc.
@@ -73,7 +73,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: pci_machdep.c,v 1.79 2017/06/01 02:45:08 chs Exp $");
+__KERNEL_RCSID(0, "$NetBSD: pci_machdep.c,v 1.79.2.1 2018/04/11 14:53:50 martin Exp $");
#include
#include
@@ -98,6 +98,7 @@ __KERNEL_RCSID(0, "$NetBSD: pci_machdep.
#include
#include
#include
+#include
#include
#include
@@ -149,6 +150,10 @@ __KERNEL_RCSID(0, "$NetBSD: pci_machdep.
#include
#endif
+#ifndef XEN
+#include
+#endif
+
#include "opt_pci_conf_mode.h"
#ifdef PCI_CONF_MODE
@@ -1016,6 +1021,7 @@ device_t
device_pci_register(device_t dev, void *aux)
{
static bool found_console = false;
+ device_t parent = device_parent(dev);
device_pci_props_register(dev, aux);
@@ -1037,8 +1043,7 @@ device_pci_register(device_t dev, void *
* information (checked below) must be sufficient to
* identify the device.
*/
- if (bin->bus == BI_BUS_PCI &&
- device_is_a(device_parent(dev), "pci")) {
+ if (bin->bus == BI_BUS_PCI && device_is_a(parent, "pci")) {
struct pci_attach_args *paa = aux;
int b, d, f;
@@ -1052,9 +1057,23 @@ device_pci_register(device_t dev, void *
pci_decompose_tag(paa->pa_pc, paa->pa_tag, &b, &d, &f);
if (bin->addr.tag == ((b << 8) | (d << 3) | f))
return dev;
+
+#ifndef XEN
+ /*
+ * efiboot reports parent ppb bus/device/function.
+ */
+ device_t grand = device_parent(parent);
+ if (efi_probe() && grand && device_is_a(grand, "ppb")) {
+struct ppb_softc *ppb_sc = device_private(grand);
+pci_decompose_tag(ppb_sc->sc_pc, ppb_sc->sc_tag,
+&b, &d, &f);
+if (bin->addr.tag == ((b << 8) | (d << 3) | f))
+ return dev;
+ }
+#endif
}
}
- if (device_parent(dev) && device_is_a(device_parent(dev), "pci") &&
+ if (parent && device_is_a(parent, "pci") &&
found_console == false) {
struct btinfo_framebuffer *fbinfo;
struct pci_attach_args *pa = aux;
CVS commit: [netbsd-8] src/sys/arch/x86/x86
Module Name:src
Committed By: martin
Date: Mon Apr 9 18:12:50 UTC 2018
Modified Files:
src/sys/arch/x86/x86 [netbsd-8]: cpu_topology.c
Log Message:
Pull up following revision(s) (requested by msaitoh in ticket #717):
sys/arch/x86/x86/cpu_topology.c: revision 1.11-1.13
Check for undefined behaviour when doing right-shift.
CPUID tells the ApicIdCoreIdSize in bits.
Compute Core/SMT-IDs for AMD family 17h (Ryzen).
To generate a diff of this commit:
cvs rdiff -u -r1.9.22.1 -r1.9.22.2 src/sys/arch/x86/x86/cpu_topology.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/x86/x86/cpu_topology.c
diff -u src/sys/arch/x86/x86/cpu_topology.c:1.9.22.1 src/sys/arch/x86/x86/cpu_topology.c:1.9.22.2
--- src/sys/arch/x86/x86/cpu_topology.c:1.9.22.1 Tue Nov 21 15:03:20 2017
+++ src/sys/arch/x86/x86/cpu_topology.c Mon Apr 9 18:12:50 2018
@@ -1,4 +1,4 @@
-/* $NetBSD: cpu_topology.c,v 1.9.22.1 2017/11/21 15:03:20 martin Exp $ */
+/* $NetBSD: cpu_topology.c,v 1.9.22.2 2018/04/09 18:12:50 martin Exp $ */
/*-
* Copyright (c) 2009 Mindaugas Rasiukevicius ,
@@ -36,7 +36,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: cpu_topology.c,v 1.9.22.1 2017/11/21 15:03:20 martin Exp $");
+__KERNEL_RCSID(0, "$NetBSD: cpu_topology.c,v 1.9.22.2 2018/04/09 18:12:50 martin Exp $");
#include
#include
@@ -108,6 +108,7 @@ x86_cpu_topology(struct cpu_info *ci)
core_max = lp_max;
break;
}
+
/* Number of Cores (NC) per package (ecx[7:0]). */
x86_cpuid(0x8008, descs);
core_max = (descs[2] & 0xff) + 1;
@@ -116,9 +117,9 @@ x86_cpu_topology(struct cpu_info *ci)
if (n != 0) {
/*
* Extended Method.
- * core_bits = 2 ^ n (power of two)
+ * core_max = 2 ^ n (power of two)
*/
- core_bits = 1 << n;
+ core_bits = n;
}
break;
default:
@@ -150,8 +151,21 @@ x86_cpu_topology(struct cpu_info *ci)
}
}
+ /* Family 0x17 supports SMT */
+ if (cpu_vendor == CPUVENDOR_AMD && cpu_family == 0x17) { /* XXX */
+ x86_cpuid(0x801e, descs);
+ const u_int threads = ((descs[1] >> 8) & 0xff) + 1;
+
+ KASSERT(smt_bits == 0 && smt_bits <= core_bits);
+ smt_bits = ilog2(threads);
+ core_bits -= smt_bits;
+ }
+
if (smt_bits + core_bits) {
- ci->ci_package_id = apic_id >> (smt_bits + core_bits);
+ if (smt_bits + core_bits < sizeof(apic_id) * NBBY)
+ ci->ci_package_id = apic_id >> (smt_bits + core_bits);
+ else
+ ci->ci_package_id = 0;
}
if (core_bits) {
u_int core_mask = __BITS(smt_bits, smt_bits + core_bits - 1);
CVS commit: [netbsd-8] src/sys/arch/x86/x86
Module Name:src
Committed By: martin
Date: Mon Apr 2 08:43:58 UTC 2018
Modified Files:
src/sys/arch/x86/x86 [netbsd-8]: svs.c
Log Message:
Pull up the following revisions, requested by maxv in ticket #683:
sys/arch/x86/x86/svs.c 1.15-1.17
Fix sysctl type, should be bool.
Use EOPNOTSUPP instead of EINVAL.
Improve the detection. Future generations of Intel CPUs will have a bit to
say they are not affected by Meltdown.
To generate a diff of this commit:
cvs rdiff -u -r1.14.2.2 -r1.14.2.3 src/sys/arch/x86/x86/svs.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/x86/x86/svs.c
diff -u src/sys/arch/x86/x86/svs.c:1.14.2.2 src/sys/arch/x86/x86/svs.c:1.14.2.3
--- src/sys/arch/x86/x86/svs.c:1.14.2.2 Thu Mar 22 16:59:04 2018
+++ src/sys/arch/x86/x86/svs.c Mon Apr 2 08:43:58 2018
@@ -1,4 +1,4 @@
-/* $NetBSD: svs.c,v 1.14.2.2 2018/03/22 16:59:04 martin Exp $ */
+/* $NetBSD: svs.c,v 1.14.2.3 2018/04/02 08:43:58 martin Exp $ */
/*
* Copyright (c) 2018 The NetBSD Foundation, Inc.
@@ -30,7 +30,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: svs.c,v 1.14.2.2 2018/03/22 16:59:04 martin Exp $");
+__KERNEL_RCSID(0, "$NetBSD: svs.c,v 1.14.2.3 2018/04/02 08:43:58 martin Exp $");
#include "opt_svs.h"
@@ -720,9 +720,10 @@ int
sysctl_machdep_svs_enabled(SYSCTLFN_ARGS)
{
struct sysctlnode node;
- int error, val;
+ int error;
+ bool val;
- val = *(int *)rnode->sysctl_data;
+ val = *(bool *)rnode->sysctl_data;
node = *rnode;
node.sysctl_data = &val;
@@ -732,7 +733,10 @@ sysctl_machdep_svs_enabled(SYSCTLFN_ARGS
return error;
if (val == 1) {
- error = EINVAL;
+ if (svs_enabled)
+ error = 0;
+ else
+ error = EOPNOTSUPP;
} else {
if (svs_enabled)
error = svs_disable();
@@ -746,8 +750,21 @@ sysctl_machdep_svs_enabled(SYSCTLFN_ARGS
void
svs_init(void)
{
+ uint64_t msr;
+
if (cpu_vendor != CPUVENDOR_INTEL) {
return;
}
+ if (cpu_info_primary.ci_feat_val[7] & CPUID_SEF_ARCH_CAP) {
+ msr = rdmsr(MSR_IA32_ARCH_CAPABILITIES);
+ if (msr & IA32_ARCH_RDCL_NO) {
+ /*
+ * The processor indicates it is not vulnerable to the
+ * Rogue Data Cache Load (Meltdown) flaw.
+ */
+ return;
+ }
+ }
+
svs_enable();
}
CVS commit: [netbsd-8] src/sys/arch/x86
Module Name:src
Committed By: martin
Date: Sun Apr 1 08:51:47 UTC 2018
Modified Files:
src/sys/arch/x86/include [netbsd-8]: cpu.h
src/sys/arch/x86/x86 [netbsd-8]: identcpu.c
Log Message:
Pull up following revision(s) (requested by maxv in ticket #681):
sys/arch/x86/include/cpu.h: revision 1.90
sys/arch/x86/x86/identcpu.c: revision 1.71
Retrieve cpuid.7:%edx.
To generate a diff of this commit:
cvs rdiff -u -r1.71.2.4 -r1.71.2.5 src/sys/arch/x86/include/cpu.h
cvs rdiff -u -r1.55.2.2 -r1.55.2.3 src/sys/arch/x86/x86/identcpu.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/x86/include/cpu.h
diff -u src/sys/arch/x86/include/cpu.h:1.71.2.4 src/sys/arch/x86/include/cpu.h:1.71.2.5
--- src/sys/arch/x86/include/cpu.h:1.71.2.4 Thu Mar 22 16:59:04 2018
+++ src/sys/arch/x86/include/cpu.h Sun Apr 1 08:51:47 2018
@@ -1,4 +1,4 @@
-/* $NetBSD: cpu.h,v 1.71.2.4 2018/03/22 16:59:04 martin Exp $ */
+/* $NetBSD: cpu.h,v 1.71.2.5 2018/04/01 08:51:47 martin Exp $ */
/*-
* Copyright (c) 1990 The Regents of the University of California.
@@ -177,7 +177,7 @@ struct cpu_info {
uint32_t ci_max_ext_cpuid; /* cpuid.8000:%eax */
volatile uint32_t ci_lapic_counter;
- uint32_t ci_feat_val[7]; /* X86 CPUID feature bits */
+ uint32_t ci_feat_val[8]; /* X86 CPUID feature bits */
/* [0] basic features cpuid.1:%edx
* [1] basic features cpuid.1:%ecx (CPUID2_xxx bits)
* [2] extended features cpuid:8001:%edx
@@ -185,6 +185,7 @@ struct cpu_info {
* [4] VIA padlock features
* [5] structured extended features cpuid.7:%ebx
* [6] structured extended features cpuid.7:%ecx
+ * [7] structured extended features cpuid.7:%edx
*/
const struct cpu_functions *ci_func; /* start/stop functions */
Index: src/sys/arch/x86/x86/identcpu.c
diff -u src/sys/arch/x86/x86/identcpu.c:1.55.2.2 src/sys/arch/x86/x86/identcpu.c:1.55.2.3
--- src/sys/arch/x86/x86/identcpu.c:1.55.2.2 Fri Mar 16 13:05:32 2018
+++ src/sys/arch/x86/x86/identcpu.c Sun Apr 1 08:51:47 2018
@@ -1,4 +1,4 @@
-/* $NetBSD: identcpu.c,v 1.55.2.2 2018/03/16 13:05:32 martin Exp $ */
+/* $NetBSD: identcpu.c,v 1.55.2.3 2018/04/01 08:51:47 martin Exp $ */
/*-
* Copyright (c) 1999, 2000, 2001, 2006, 2007, 2008 The NetBSD Foundation, Inc.
@@ -30,7 +30,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: identcpu.c,v 1.55.2.2 2018/03/16 13:05:32 martin Exp $");
+__KERNEL_RCSID(0, "$NetBSD: identcpu.c,v 1.55.2.3 2018/04/01 08:51:47 martin Exp $");
#include "opt_xen.h"
@@ -889,6 +889,7 @@ cpu_probe(struct cpu_info *ci)
x86_cpuid(7, descs);
ci->ci_feat_val[5] = descs[1]; /* %ebx */
ci->ci_feat_val[6] = descs[2]; /* %ecx */
+ ci->ci_feat_val[7] = descs[3]; /* %edx */
}
cpu_probe_intel(ci);
CVS commit: [netbsd-8] src/sys/arch/x86/include
Module Name:src Committed By: martin Date: Sat Mar 31 10:51:05 UTC 2018 Modified Files: src/sys/arch/x86/include [netbsd-8]: specialreg.h Log Message: Pull up following revision(s) (requested by maxv in ticket #678): sys/arch/x86/include/specialreg.h: revision 1.115-1.117,1.120 Add IC_CFG.DIS_IND: "Disable Indirect Branch Predictor". Available (at least) on AMD Families 10h, 12h and 16h. Add the IBRS and STIBP MSRs. ... and also add IBPB ... Add RDCL_NO and IBRS_ALL. To generate a diff of this commit: cvs rdiff -u -r1.98.2.2 -r1.98.2.3 src/sys/arch/x86/include/specialreg.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/x86/include/specialreg.h diff -u src/sys/arch/x86/include/specialreg.h:1.98.2.2 src/sys/arch/x86/include/specialreg.h:1.98.2.3 --- src/sys/arch/x86/include/specialreg.h:1.98.2.2 Fri Mar 16 13:05:31 2018 +++ src/sys/arch/x86/include/specialreg.h Sat Mar 31 10:51:05 2018 @@ -1,4 +1,4 @@ -/* $NetBSD: specialreg.h,v 1.98.2.2 2018/03/16 13:05:31 martin Exp $ */ +/* $NetBSD: specialreg.h,v 1.98.2.3 2018/03/31 10:51:05 martin Exp $ */ /*- * Copyright (c) 1991 The Regents of the University of California. @@ -630,7 +630,10 @@ #define MSR_EBC_FREQUENCY_ID 0x02c /* PIV only */ #define MSR_TEST_CTL 0x033 #define MSR_IA32_SPEC_CTRL 0x048 +#define IA32_SPEC_CTRL_IBRS 0x01 +#define IA32_SPEC_CTRL_STIBP 0x02 #define MSR_IA32_PRED_CMD 0x049 +#define IA32_PRED_CMD_IBPB 0x01 #define MSR_BIOS_UPDT_TRIG 0x079 #define MSR_BBL_CR_D0 0x088 /* PII+ only */ #define MSR_BBL_CR_D1 0x089 /* PII+ only */ @@ -644,6 +647,8 @@ #define MSR_IA32_EXT_CONFIG 0x0ee /* Undocumented. Core Solo/Duo only */ #define MSR_MTRRcap 0x0fe #define MSR_IA32_ARCH_CAPABILITIES 0x10a +#define IA32_ARCH_RDCL_NO 0x01 +#define IA32_ARCH_IBRS_ALL 0x02 #define MSR_BBL_CR_ADDR 0x116 /* PII+ only */ #define MSR_BBL_CR_DECC 0x118 /* PII+ only */ #define MSR_BBL_CR_CTL 0x119 /* PII+ only */ @@ -842,6 +847,7 @@ #define MSR_IC_CFG 0xc0011021 #define IC_CFG_DIS_SEQ_PREFETCH 0x0800 +#define IC_CFG_DIS_IND 0x4000 #define MSR_DC_CFG 0xc0011022 #define DC_CFG_DIS_CNV_WC_SSO 0x0008
CVS commit: [netbsd-8] src/sys/arch/x86/x86
Module Name:src
Committed By: martin
Date: Mon Mar 26 11:19:39 UTC 2018
Modified Files:
src/sys/arch/x86/x86 [netbsd-8]: intr.c
Log Message:
Pull up following revision(s) (requested by knakahara in ticket #658):
sys/arch/x86/x86/intr.c: revision 1.124
Fix "intrctl list" causes panic while attaching MSI/MSI-X devices.
When there are devices which is already pci_intr_alloc'ed, however is not
established yet, "intrctl list" causes panic. E.g.
# while true; do intrctl list > /dev/null ; done&
# drvctl -d ixg0 && drvctl -r pci0
And add some KASSERTMSG to similar but not the same code.
Pointed out by msaitoh@n.o.
XXX pullup-8
To generate a diff of this commit:
cvs rdiff -u -r1.101.2.3 -r1.101.2.4 src/sys/arch/x86/x86/intr.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/x86/x86/intr.c
diff -u src/sys/arch/x86/x86/intr.c:1.101.2.3 src/sys/arch/x86/x86/intr.c:1.101.2.4
--- src/sys/arch/x86/x86/intr.c:1.101.2.3 Fri Mar 16 13:17:56 2018
+++ src/sys/arch/x86/x86/intr.c Mon Mar 26 11:19:39 2018
@@ -1,4 +1,4 @@
-/* $NetBSD: intr.c,v 1.101.2.3 2018/03/16 13:17:56 martin Exp $ */
+/* $NetBSD: intr.c,v 1.101.2.4 2018/03/26 11:19:39 martin Exp $ */
/*-
* Copyright (c) 2007, 2008, 2009 The NetBSD Foundation, Inc.
@@ -133,7 +133,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: intr.c,v 1.101.2.3 2018/03/16 13:17:56 martin Exp $");
+__KERNEL_RCSID(0, "$NetBSD: intr.c,v 1.101.2.4 2018/03/26 11:19:39 martin Exp $");
#include "opt_intrdebug.h"
#include "opt_multiprocessor.h"
@@ -1839,6 +1839,9 @@ intr_get_affinity(struct intrsource *isp
return;
}
+ KASSERTMSG(isp->is_handlers != NULL,
+ "Don't get affinity for the device which is not established.");
+
ci = isp->is_handlers->ih_cpu;
if (ci == NULL) {
kcpuset_zero(cpuset);
@@ -1891,6 +1894,9 @@ intr_set_affinity(struct intrsource *isp
}
ih = isp->is_handlers;
+ KASSERTMSG(ih != NULL,
+ "Don't set affinity for the device which is not established.");
+
oldci = ih->ih_cpu;
if (newci == oldci) /* nothing to do */
return 0;
@@ -1957,6 +1963,13 @@ intr_is_affinity_intrsource(struct intrs
KASSERT(mutex_owned(&cpu_lock));
+ /*
+ * The device is already pci_intr_alloc'ed, however it is not
+ * established yet.
+ */
+ if (isp->is_handlers == NULL)
+ return false;
+
ci = isp->is_handlers->ih_cpu;
KASSERT(ci != NULL);
CVS commit: [netbsd-8] src/sys/arch/x86/x86
Module Name:src
Committed By: martin
Date: Fri Mar 16 13:08:14 UTC 2018
Modified Files:
src/sys/arch/x86/x86 [netbsd-8]: procfs_machdep.c
Log Message:
Pull up following revision(s) (requested by msaitoh in ticket #634):
sys/arch/x86/x86/procfs_machdep.c: revision 1.22
- Add AMD CPUID leaf 0x8008 ebx's xsaveerptr, ibpb, ibrs, stibp.
- Add Intel CPUID leaf 7 ebx's umip, avx512_vbmi2, gfni, vaes, vpclmulqdq,
avx512_vnni and avx512_bitalg.
- Add Intel CPUID leaf 7 edx's avx512_4vnniw, avx512_4fmaps and
arch_capabilities.
To generate a diff of this commit:
cvs rdiff -u -r1.15.2.3 -r1.15.2.4 src/sys/arch/x86/x86/procfs_machdep.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/x86/x86/procfs_machdep.c
diff -u src/sys/arch/x86/x86/procfs_machdep.c:1.15.2.3 src/sys/arch/x86/x86/procfs_machdep.c:1.15.2.4
--- src/sys/arch/x86/x86/procfs_machdep.c:1.15.2.3 Sat Jan 13 21:44:20 2018
+++ src/sys/arch/x86/x86/procfs_machdep.c Fri Mar 16 13:08:14 2018
@@ -1,4 +1,4 @@
-/* $NetBSD: procfs_machdep.c,v 1.15.2.3 2018/01/13 21:44:20 snj Exp $ */
+/* $NetBSD: procfs_machdep.c,v 1.15.2.4 2018/03/16 13:08:14 martin Exp $ */
/*
* Copyright (c) 2001 Wasabi Systems, Inc.
@@ -42,7 +42,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: procfs_machdep.c,v 1.15.2.3 2018/01/13 21:44:20 snj Exp $");
+__KERNEL_RCSID(0, "$NetBSD: procfs_machdep.c,v 1.15.2.4 2018/03/16 13:08:14 martin Exp $");
#include
#include
@@ -151,9 +151,9 @@ static const char * const x86_features[]
NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL},
- { /* (13) 0x8008 ebx */
- "clzero", "irperf", NULL, NULL, NULL, NULL, NULL, NULL,
- NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
+ { /* (13) AMD 0x8008 ebx */
+ "clzero", "irperf", "xsaveerptr", NULL, NULL, NULL, NULL, NULL,
+ NULL, NULL, NULL, NULL, "ibpb", NULL, "ibrs", "stibp",
NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL},
@@ -173,8 +173,10 @@ static const char * const x86_features[]
NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL},
{ /* (16) 0x0007:0 ecx */
- NULL, "avx512vbmi", NULL, "pku", "ospke", NULL, NULL, NULL,
- NULL, NULL, NULL, NULL, NULL, NULL, "avx512_vpopcntdq", NULL,
+ NULL, "avx512vbmi", "umip", "pku",
+ "ospke", NULL, "avx512_vbmi2", NULL,
+ "gfni", "vaes", "vpclmulqdq", "avx512_vnni",
+ "avx512_bitalg", NULL, "avx512_vpopcntdq", NULL,
"la57", NULL, NULL, NULL, NULL, NULL, "rdpid", NULL,
NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL},
@@ -183,6 +185,12 @@ static const char * const x86_features[]
NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL},
+
+ { /* (18) Intel 0x0007 edx */
+ NULL, NULL, "avx512_4vnniw", "avx512_4fmaps", NULL, NULL, NULL, NULL,
+ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
+ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
+ NULL, NULL, NULL, NULL, NULL, "arch_capabilities", NULL, NULL},
};
static int procfs_getonecpu(int, struct cpu_info *, char *, size_t *);
@@ -336,6 +344,14 @@ procfs_getonecpufeatures(struct cpu_info
diff = last - *left;
}
+ if ((cpu_vendor == CPUVENDOR_INTEL)
+ && (ci->ci_max_cpuid >= 0x0007)) {
+ x86_cpuid(0x0007, descs);
+ procfs_getonefeatreg(descs[3], x86_features[18], p + diff,
+ left);
+ diff = last - *left;
+ }
+
return 0; /* XXX */
}
CVS commit: [netbsd-8] src/sys/arch/x86/x86
Module Name:src
Committed By: martin
Date: Tue Mar 6 08:45:59 UTC 2018
Modified Files:
src/sys/arch/x86/x86 [netbsd-8]: pmap.c
Log Message:
Also pull up r1.267, requested by mrg in ticket #593: avoid a NULL pointer
deref and simplify.
To generate a diff of this commit:
cvs rdiff -u -r1.245.6.2 -r1.245.6.3 src/sys/arch/x86/x86/pmap.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/x86/x86/pmap.c
diff -u src/sys/arch/x86/x86/pmap.c:1.245.6.2 src/sys/arch/x86/x86/pmap.c:1.245.6.3
--- src/sys/arch/x86/x86/pmap.c:1.245.6.2 Tue Feb 27 09:07:33 2018
+++ src/sys/arch/x86/x86/pmap.c Tue Mar 6 08:45:59 2018
@@ -1,4 +1,4 @@
-/* $NetBSD: pmap.c,v 1.245.6.2 2018/02/27 09:07:33 martin Exp $ */
+/* $NetBSD: pmap.c,v 1.245.6.3 2018/03/06 08:45:59 martin Exp $ */
/*-
* Copyright (c) 2008, 2010, 2016, 2017 The NetBSD Foundation, Inc.
@@ -171,7 +171,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.245.6.2 2018/02/27 09:07:33 martin Exp $");
+__KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.245.6.3 2018/03/06 08:45:59 martin Exp $");
#include "opt_user_ldt.h"
#include "opt_lockdebug.h"
@@ -1737,8 +1737,8 @@ pmap_pp_needs_pve(struct pmap_page *pp)
* since the first pv entry is stored in the pmap_page.
*/
- return (pp->pp_flags & PP_EMBEDDED) != 0 ||
- !LIST_EMPTY(&pp->pp_head.pvh_list);
+ return pp && ((pp->pp_flags & PP_EMBEDDED) != 0 ||
+ !LIST_EMPTY(&pp->pp_head.pvh_list));
}
/*
@@ -4123,7 +4123,7 @@ pmap_enter_ma(struct pmap *pmap, vaddr_t
*/
bool needpves = pmap_pp_needs_pve(new_pp);
- if (new_pp && needpves) {
+ if (needpves) {
new_pve = pool_cache_get(&pmap_pv_cache, PR_NOWAIT);
new_sparepve = pool_cache_get(&pmap_pv_cache, PR_NOWAIT);
} else {
CVS commit: [netbsd-8] src/sys/arch/x86/include
Module Name:src Committed By: martin Date: Thu Mar 1 19:07:31 UTC 2018 Modified Files: src/sys/arch/x86/include [netbsd-8]: Makefile Log Message: Pull up following revision(s) (requested by kamil in ticket #599): sys/arch/x86/include/Makefile: revision 1.22 Stop installing dbregs.h This is now kernel-only header. The behavior is well specified by the CPU= documents and we don't introduce changes to it. Noted by To generate a diff of this commit: cvs rdiff -u -r1.21 -r1.21.8.1 src/sys/arch/x86/include/Makefile Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/x86/include/Makefile diff -u src/sys/arch/x86/include/Makefile:1.21 src/sys/arch/x86/include/Makefile:1.21.8.1 --- src/sys/arch/x86/include/Makefile:1.21 Thu Dec 15 12:04:18 2016 +++ src/sys/arch/x86/include/Makefile Thu Mar 1 19:07:31 2018 @@ -1,4 +1,4 @@ -# $NetBSD: Makefile,v 1.21 2016/12/15 12:04:18 kamil Exp $ +# $NetBSD: Makefile,v 1.21.8.1 2018/03/01 19:07:31 martin Exp $ INCSDIR=/usr/include/x86 @@ -11,7 +11,6 @@ INCS= aout_machdep.h \ cpu_ucode.h \ cputypes.h \ cpuvar.h \ - dbregs.h \ float.h \ fpu.h \ ieee.h ieeefp.h \
CVS commit: [netbsd-8] src/sys/arch/x86/pci
Module Name:src Committed By: snj Date: Mon Feb 26 01:01:41 UTC 2018 Modified Files: src/sys/arch/x86/pci [netbsd-8]: if_vmx.c Log Message: Pull up following revision(s) (requested by msaitoh in ticket #577): sys/arch/x86/pci/if_vmx.c: 1.21 m_free -> m_freem, otherwise leak To generate a diff of this commit: cvs rdiff -u -r1.19.6.1 -r1.19.6.2 src/sys/arch/x86/pci/if_vmx.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/x86/pci/if_vmx.c diff -u src/sys/arch/x86/pci/if_vmx.c:1.19.6.1 src/sys/arch/x86/pci/if_vmx.c:1.19.6.2 --- src/sys/arch/x86/pci/if_vmx.c:1.19.6.1 Tue Oct 24 08:38:59 2017 +++ src/sys/arch/x86/pci/if_vmx.c Mon Feb 26 01:01:41 2018 @@ -1,4 +1,4 @@ -/* $NetBSD: if_vmx.c,v 1.19.6.1 2017/10/24 08:38:59 snj Exp $ */ +/* $NetBSD: if_vmx.c,v 1.19.6.2 2018/02/26 01:01:41 snj Exp $ */ /* $OpenBSD: if_vmx.c,v 1.16 2014/01/22 06:04:17 brad Exp $ */ /* @@ -19,7 +19,7 @@ */ #include -__KERNEL_RCSID(0, "$NetBSD: if_vmx.c,v 1.19.6.1 2017/10/24 08:38:59 snj Exp $"); +__KERNEL_RCSID(0, "$NetBSD: if_vmx.c,v 1.19.6.2 2018/02/26 01:01:41 snj Exp $"); #include #include @@ -2527,7 +2527,7 @@ vmxnet3_txq_offload_ctx(struct vmxnet3_t offset = ETHER_HDR_LEN + ETHER_VLAN_ENCAP_LEN; break; default: - m_free(m); + m_freem(m); return (EINVAL); }
CVS commit: [netbsd-8] src/sys/arch/x86/pci
Module Name:src
Committed By: martin
Date: Tue Feb 6 09:05:27 UTC 2018
Modified Files:
src/sys/arch/x86/pci [netbsd-8]: amdsmn.c
Log Message:
Additionally pull up rev 1.3 of sys/arch/x86/pci/amdsmn.c, requested by
pgoyette in ticket #524:
rescan amdsmnbus instead of amdsmn (fixes panic)
To generate a diff of this commit:
cvs rdiff -u -r1.3.2.2 -r1.3.2.3 src/sys/arch/x86/pci/amdsmn.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/x86/pci/amdsmn.c
diff -u src/sys/arch/x86/pci/amdsmn.c:1.3.2.2 src/sys/arch/x86/pci/amdsmn.c:1.3.2.3
--- src/sys/arch/x86/pci/amdsmn.c:1.3.2.2 Mon Feb 5 13:06:55 2018
+++ src/sys/arch/x86/pci/amdsmn.c Tue Feb 6 09:05:27 2018
@@ -1,4 +1,4 @@
-/* $NetBSD: amdsmn.c,v 1.3.2.2 2018/02/05 13:06:55 martin Exp $ */
+/* $NetBSD: amdsmn.c,v 1.3.2.3 2018/02/06 09:05:27 martin Exp $ */
/*-
* Copyright (c) 2017 Conrad Meyer
@@ -29,7 +29,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: amdsmn.c,v 1.3.2.2 2018/02/05 13:06:55 martin Exp $ ");
+__KERNEL_RCSID(0, "$NetBSD: amdsmn.c,v 1.3.2.3 2018/02/06 09:05:27 martin Exp $ ");
/*
* Driver for the AMD Family 17h CPU System Management Network.
@@ -101,7 +101,7 @@ amdsmn_attach(device_t parent, device_t
sc->pc = pa->pa_pc;
sc->pcitag = pa->pa_tag;
aprint_normal(": AMD Family 17h System Management Network\n");
- amdsmn_rescan(self, "amdsmn", &flags);
+ amdsmn_rescan(self, "amdsmnbus", &flags);
}
static int
CVS commit: [netbsd-8] src/sys/arch/x86/x86
Module Name:src
Committed By: martin
Date: Mon Feb 5 15:11:54 UTC 2018
Modified Files:
src/sys/arch/x86/x86 [netbsd-8]: vmt.c
Log Message:
Pull up following revision(s) (requested by nakayama in ticket #532):
sys/arch/x86/x86/vmt.c: revision 1.20
Add line break.
To generate a diff of this commit:
cvs rdiff -u -r1.17.2.1 -r1.17.2.2 src/sys/arch/x86/x86/vmt.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/x86/x86/vmt.c
diff -u src/sys/arch/x86/x86/vmt.c:1.17.2.1 src/sys/arch/x86/x86/vmt.c:1.17.2.2
--- src/sys/arch/x86/x86/vmt.c:1.17.2.1 Wed Oct 25 07:05:55 2017
+++ src/sys/arch/x86/x86/vmt.c Mon Feb 5 15:11:54 2018
@@ -1,4 +1,4 @@
-/* $NetBSD: vmt.c,v 1.17.2.1 2017/10/25 07:05:55 snj Exp $ */
+/* $NetBSD: vmt.c,v 1.17.2.2 2018/02/05 15:11:54 martin Exp $ */
/* $OpenBSD: vmt.c,v 1.11 2011/01/27 21:29:25 dtucker Exp $ */
/*
@@ -179,6 +179,7 @@ vmt_attach(device_t parent, device_t sel
struct vmt_softc *sc = device_private(self);
aprint_naive("\n");
+ aprint_normal("\n");
sc->sc_dev = self;
sc->sc_log = NULL;
CVS commit: [netbsd-8] src/sys/arch/x86
Module Name:src
Committed By: snj
Date: Sat Jan 13 21:50:31 UTC 2018
Modified Files:
src/sys/arch/x86/include [netbsd-8]: intr.h
src/sys/arch/x86/pci [netbsd-8]: pci_intr_machdep.c
src/sys/arch/x86/x86 [netbsd-8]: intr.c
Log Message:
Pull up following revision(s) (requested by knakahara in ticket #493):
sys/arch/x86/include/intr.h: revision 1.53
sys/arch/x86/pci/pci_intr_machdep.c: revision 1.42
sys/arch/x86/x86/intr.c: revision 1.114 via patch
fix "intrctl list" panic when ACPI is disabled.
reviewed by cherry@n.o and tested by msaitoh@n.o, thanks.
To generate a diff of this commit:
cvs rdiff -u -r1.50 -r1.50.2.1 src/sys/arch/x86/include/intr.h
cvs rdiff -u -r1.40 -r1.40.2.1 src/sys/arch/x86/pci/pci_intr_machdep.c
cvs rdiff -u -r1.101 -r1.101.2.1 src/sys/arch/x86/x86/intr.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/x86/include/intr.h
diff -u src/sys/arch/x86/include/intr.h:1.50 src/sys/arch/x86/include/intr.h:1.50.2.1
--- src/sys/arch/x86/include/intr.h:1.50 Tue May 23 08:54:39 2017
+++ src/sys/arch/x86/include/intr.h Sat Jan 13 21:50:31 2018
@@ -1,4 +1,4 @@
-/* $NetBSD: intr.h,v 1.50 2017/05/23 08:54:39 nonaka Exp $ */
+/* $NetBSD: intr.h,v 1.50.2.1 2018/01/13 21:50:31 snj Exp $ */
/*-
* Copyright (c) 1998, 2001, 2006, 2007, 2008 The NetBSD Foundation, Inc.
@@ -199,6 +199,9 @@ int intr_find_mpmapping(int, int, intr_h
struct pic *intr_findpic(int);
void intr_printconfig(void);
+#if !defined(XEN)
+const char *intr_create_intrid(int, struct pic *, int, char *, size_t);
+#endif /* XEN */
struct intrsource *intr_allocate_io_intrsource(const char *);
void intr_free_io_intrsource(const char *);
Index: src/sys/arch/x86/pci/pci_intr_machdep.c
diff -u src/sys/arch/x86/pci/pci_intr_machdep.c:1.40 src/sys/arch/x86/pci/pci_intr_machdep.c:1.40.2.1
--- src/sys/arch/x86/pci/pci_intr_machdep.c:1.40 Thu Jun 1 02:45:08 2017
+++ src/sys/arch/x86/pci/pci_intr_machdep.c Sat Jan 13 21:50:31 2018
@@ -1,4 +1,4 @@
-/* $NetBSD: pci_intr_machdep.c,v 1.40 2017/06/01 02:45:08 chs Exp $ */
+/* $NetBSD: pci_intr_machdep.c,v 1.40.2.1 2018/01/13 21:50:31 snj Exp $ */
/*-
* Copyright (c) 1997, 1998, 2009 The NetBSD Foundation, Inc.
@@ -73,7 +73,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: pci_intr_machdep.c,v 1.40 2017/06/01 02:45:08 chs Exp $");
+__KERNEL_RCSID(0, "$NetBSD: pci_intr_machdep.c,v 1.40.2.1 2018/01/13 21:50:31 snj Exp $");
#include
#include
@@ -274,15 +274,42 @@ pci_intr_setattr(pci_chipset_tag_t pc, p
}
}
+static int
+pci_intr_find_intx_irq(pci_intr_handle_t ih, int *irq, struct pic **pic,
+int *pin)
+{
+
+ KASSERT(irq != NULL);
+ KASSERT(pic != NULL);
+ KASSERT(pin != NULL);
+
+ *pic = &i8259_pic;
+ *pin = *irq = APIC_IRQ_LEGACY_IRQ(ih);
+
+#if NIOAPIC > 0
+ if (ih & APIC_INT_VIA_APIC) {
+ struct ioapic_softc *ioapic;
+
+ ioapic = ioapic_find(APIC_IRQ_APIC(ih));
+ if (ioapic == NULL)
+ return ENOENT;
+ *pic = &ioapic->sc_pic;
+ *pin = APIC_IRQ_PIN(ih);
+ *irq = APIC_IRQ_LEGACY_IRQ(ih);
+ if (*irq < 0 || *irq >= NUM_LEGACY_IRQS)
+ *irq = -1;
+ }
+#endif
+
+ return 0;
+}
+
static void *
pci_intr_establish_xname_internal(pci_chipset_tag_t pc, pci_intr_handle_t ih,
int level, int (*func)(void *), void *arg, const char *xname)
{
int pin, irq;
struct pic *pic;
-#if NIOAPIC > 0
- struct ioapic_softc *ioapic;
-#endif
bool mpsafe;
pci_chipset_tag_t ipc;
@@ -302,25 +329,13 @@ pci_intr_establish_xname_internal(pci_ch
xname);
}
- pic = &i8259_pic;
- pin = irq = APIC_IRQ_LEGACY_IRQ(ih);
- mpsafe = ((ih & MPSAFE_MASK) != 0);
-
-#if NIOAPIC > 0
- if (ih & APIC_INT_VIA_APIC) {
- ioapic = ioapic_find(APIC_IRQ_APIC(ih));
- if (ioapic == NULL) {
- aprint_normal("pci_intr_establish: bad ioapic %d\n",
- APIC_IRQ_APIC(ih));
- return NULL;
- }
- pic = &ioapic->sc_pic;
- pin = APIC_IRQ_PIN(ih);
- irq = APIC_IRQ_LEGACY_IRQ(ih);
- if (irq < 0 || irq >= NUM_LEGACY_IRQS)
- irq = -1;
+ if (pci_intr_find_intx_irq(ih, &irq, &pic, &pin)) {
+ aprint_normal("%s: bad pic %d\n", __func__,
+ APIC_IRQ_APIC(ih));
+ return NULL;
}
-#endif
+
+ mpsafe = ((ih & MPSAFE_MASK) != 0);
return intr_establish_xname(irq, pic, pin, IST_LEVEL, level, func, arg,
mpsafe, xname);
@@ -377,6 +392,31 @@ pci_intr_type(pci_chipset_tag_t pc, pci_
}
}
+static const char *
+x86_pci_intx_create_intrid(pci_chipset_tag_t pc, pci_intr_handle_t ih, char *buf,
+size_t len)
+{
+#if !defined(XEN)
+ int pin, irq;
+ struct pic *pic;
+
+ KASSERT(!INT_VIA_MSI(ih));
+
+ pic = &i8259_pic;
+ pin = irq = APIC_IRQ_LEGACY_IRQ(ih);
+
+ if (pci_intr_find_intx_irq(ih, &irq, &pic, &pin)) {
+ aprint_normal("%s: bad pic %d\n", __func__,
+ APIC_IRQ_APIC(ih));
+ return NULL;
+ }
+
+ return intr_create_intrid(irq, pic, pin, buf, len);
+#else
+ return pci_intr_string(pc, ih, buf, len);
+#endif /* !XEN */
+}
CVS commit: [netbsd-8] src/sys/arch/x86/x86
Module Name:src
Committed By: snj
Date: Sat Jan 13 21:44:20 UTC 2018
Modified Files:
src/sys/arch/x86/x86 [netbsd-8]: procfs_machdep.c
Log Message:
Pull up following revision(s) (requested by msaitoh in ticket #492):
sys/arch/x86/x86/procfs_machdep.c: revision 1.21
Print intel_pt in /proc/cpuinfo.
To generate a diff of this commit:
cvs rdiff -u -r1.15.2.2 -r1.15.2.3 src/sys/arch/x86/x86/procfs_machdep.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/x86/x86/procfs_machdep.c
diff -u src/sys/arch/x86/x86/procfs_machdep.c:1.15.2.2 src/sys/arch/x86/x86/procfs_machdep.c:1.15.2.3
--- src/sys/arch/x86/x86/procfs_machdep.c:1.15.2.2 Tue Nov 21 15:11:52 2017
+++ src/sys/arch/x86/x86/procfs_machdep.c Sat Jan 13 21:44:20 2018
@@ -1,4 +1,4 @@
-/* $NetBSD: procfs_machdep.c,v 1.15.2.2 2017/11/21 15:11:52 martin Exp $ */
+/* $NetBSD: procfs_machdep.c,v 1.15.2.3 2018/01/13 21:44:20 snj Exp $ */
/*
* Copyright (c) 2001 Wasabi Systems, Inc.
@@ -42,7 +42,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: procfs_machdep.c,v 1.15.2.2 2017/11/21 15:11:52 martin Exp $");
+__KERNEL_RCSID(0, "$NetBSD: procfs_machdep.c,v 1.15.2.3 2018/01/13 21:44:20 snj Exp $");
#include
#include
@@ -113,7 +113,7 @@ static const char * const x86_features[]
{ /* (7) Linux mapping */
NULL, NULL, "cpb", "ebp", NULL, "pln", "pts", "dtherm",
"hw_pstate", "proc_feedback", "sme", NULL,
- NULL, NULL, NULL, "intel_pt",
+ NULL, NULL, NULL, NULL,
NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL},
@@ -130,7 +130,7 @@ static const char * const x86_features[]
"bmi2", "erms", "invpcid", "rtm", "cqm", NULL, "mpx", "rdt_a",
"avx512f", "avx512dq", "rdseed", "adx",
"smap", NULL, NULL, "clflushopt",
- "clwb", NULL, "avx512pf", "avx512er",
+ "clwb", "intel_pt", "avx512pf", "avx512er",
"avx512cd", "sha_ni", "avx512bw", "avx512vl"},
{ /* (10) 0x000d:1 eax */
CVS commit: [netbsd-8] src/sys/arch/x86/x86
Module Name:src
Committed By: snj
Date: Thu Dec 21 19:33:15 UTC 2017
Modified Files:
src/sys/arch/x86/x86 [netbsd-8]: fpu.c
Log Message:
Pull up following revision(s) (requested by maxv in ticket #442):
sys/arch/x86/x86/fpu.c: 1.19 via patch
Mask mxcsr, otherwise userland could set reserved bits to 1 and make
xrstor fault.
To generate a diff of this commit:
cvs rdiff -u -r1.12 -r1.12.8.1 src/sys/arch/x86/x86/fpu.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/x86/x86/fpu.c
diff -u src/sys/arch/x86/x86/fpu.c:1.12 src/sys/arch/x86/x86/fpu.c:1.12.8.1
--- src/sys/arch/x86/x86/fpu.c:1.12 Thu Sep 29 17:01:43 2016
+++ src/sys/arch/x86/x86/fpu.c Thu Dec 21 19:33:15 2017
@@ -1,4 +1,4 @@
-/* $NetBSD: fpu.c,v 1.12 2016/09/29 17:01:43 maxv Exp $ */
+/* $NetBSD: fpu.c,v 1.12.8.1 2017/12/21 19:33:15 snj Exp $ */
/*-
* Copyright (c) 2008 The NetBSD Foundation, Inc. All
@@ -96,7 +96,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: fpu.c,v 1.12 2016/09/29 17:01:43 maxv Exp $");
+__KERNEL_RCSID(0, "$NetBSD: fpu.c,v 1.12.8.1 2017/12/21 19:33:15 snj Exp $");
#include "opt_multiprocessor.h"
@@ -591,6 +591,7 @@ process_write_fpregs_xmm(struct lwp *l,
memcpy(&fpu_save->sv_xmm, fpregs, sizeof(fpu_save->sv_xmm));
/* Invalid bits in the mxcsr_mask will cause faults */
fpu_save->sv_xmm.fx_mxcsr_mask &= __INITIAL_MXCSR_MASK__;
+ fpu_save->sv_xmm.fx_mxcsr &= fpu_save->sv_xmm.fx_mxcsr_mask;
} else {
process_xmm_to_s87(fpregs, &fpu_save->sv_87);
}
CVS commit: [netbsd-8] src/sys/arch/x86/x86
Module Name:src
Committed By: martin
Date: Thu Nov 30 14:23:12 UTC 2017
Modified Files:
src/sys/arch/x86/x86 [netbsd-8]: lapic.c
Log Message:
Pull up following revision(s) (requested by maxv in ticket #403):
sys/arch/x86/x86/lapic.c: revision 1.63
Fix stack overflow, found when testing a new feature.
To generate a diff of this commit:
cvs rdiff -u -r1.58.2.3 -r1.58.2.4 src/sys/arch/x86/x86/lapic.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/x86/x86/lapic.c
diff -u src/sys/arch/x86/x86/lapic.c:1.58.2.3 src/sys/arch/x86/x86/lapic.c:1.58.2.4
--- src/sys/arch/x86/x86/lapic.c:1.58.2.3 Thu Nov 30 14:21:48 2017
+++ src/sys/arch/x86/x86/lapic.c Thu Nov 30 14:23:12 2017
@@ -1,4 +1,4 @@
-/* $NetBSD: lapic.c,v 1.58.2.3 2017/11/30 14:21:48 martin Exp $ */
+/* $NetBSD: lapic.c,v 1.58.2.4 2017/11/30 14:23:12 martin Exp $ */
/*-
* Copyright (c) 2000, 2008 The NetBSD Foundation, Inc.
@@ -32,7 +32,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: lapic.c,v 1.58.2.3 2017/11/30 14:21:48 martin Exp $");
+__KERNEL_RCSID(0, "$NetBSD: lapic.c,v 1.58.2.4 2017/11/30 14:23:12 martin Exp $");
#include "acpica.h"
#include "ioapic.h"
@@ -250,7 +250,7 @@ lapic_is_x2apic(void)
static void
lapic_setup_bsp(paddr_t lapic_base)
{
- u_int regs[4];
+ u_int regs[6];
const char *reason = NULL;
const char *hw_vendor;
bool bios_x2apic;
CVS commit: [netbsd-8] src/sys/arch/x86/x86
Module Name:src
Committed By: martin
Date: Thu Nov 30 14:21:48 UTC 2017
Modified Files:
src/sys/arch/x86/x86 [netbsd-8]: lapic.c
Log Message:
Pull up following revision(s) (requested by maxv in ticket #402):
sys/arch/x86/x86/lapic.c: revision 1.61
Fix a bug introduced in r1.55, this should be LAPIC_BASE.
To generate a diff of this commit:
cvs rdiff -u -r1.58.2.2 -r1.58.2.3 src/sys/arch/x86/x86/lapic.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/x86/x86/lapic.c
diff -u src/sys/arch/x86/x86/lapic.c:1.58.2.2 src/sys/arch/x86/x86/lapic.c:1.58.2.3
--- src/sys/arch/x86/x86/lapic.c:1.58.2.2 Fri Jul 14 08:41:18 2017
+++ src/sys/arch/x86/x86/lapic.c Thu Nov 30 14:21:48 2017
@@ -1,4 +1,4 @@
-/* $NetBSD: lapic.c,v 1.58.2.2 2017/07/14 08:41:18 martin Exp $ */
+/* $NetBSD: lapic.c,v 1.58.2.3 2017/11/30 14:21:48 martin Exp $ */
/*-
* Copyright (c) 2000, 2008 The NetBSD Foundation, Inc.
@@ -32,7 +32,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: lapic.c,v 1.58.2.2 2017/07/14 08:41:18 martin Exp $");
+__KERNEL_RCSID(0, "$NetBSD: lapic.c,v 1.58.2.3 2017/11/30 14:21:48 martin Exp $");
#include "acpica.h"
#include "ioapic.h"
@@ -367,7 +367,7 @@ lapic_map(paddr_t lapic_base)
if (CPUID_TO_FAMILY(curcpu()->ci_signature) >= 6) {
lapic_base = (paddr_t)rdmsr(MSR_APICBASE);
if ((lapic_base & APICBASE_PHYSADDR) == 0) {
- lapic_base |= APICBASE_PHYSADDR;
+ lapic_base |= LAPIC_BASE;
}
wrmsr(MSR_APICBASE, lapic_base | APICBASE_EN);
lapic_base &= APICBASE_PHYSADDR;
CVS commit: [netbsd-8] src/sys/arch/x86/x86
Module Name:src
Committed By: martin
Date: Tue Nov 21 15:11:52 UTC 2017
Modified Files:
src/sys/arch/x86/x86 [netbsd-8]: procfs_machdep.c
Log Message:
Pull up following revision(s) (requested by msaitoh in ticket #367):
sys/arch/x86/x86/procfs_machdep.c: revision 1.20
sys/arch/x86/x86/procfs_machdep.c: revision 1.17
sys/arch/x86/x86/procfs_machdep.c: revision 1.18
Print the following cpuid bits:
0x000d:1 eax (xsaveopt, xsavec, xgetbv1, xsaves)
0x000f:0 edx (cqm_llc)
0x000f:1 edx (cqm_occup_llc)
0x0006 eax (dtherm, ida, arat, pln, pts, hwp, hwp_notify,
hwp_act_window, hwp_epp, hwp_pkg_req)
- Use per cpu ci->ci_max_cupid instead of global "cpuid_level" variable.
- Print AMD specific cpuid leafs:
0x8008 ebx
0x800a edx
0x8007 ebx
Fix the location of AMD's smca(Scalable MCA) bit. Thanks Yasushi Oshima for
finding this bug.
To generate a diff of this commit:
cvs rdiff -u -r1.15.2.1 -r1.15.2.2 src/sys/arch/x86/x86/procfs_machdep.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/x86/x86/procfs_machdep.c
diff -u src/sys/arch/x86/x86/procfs_machdep.c:1.15.2.1 src/sys/arch/x86/x86/procfs_machdep.c:1.15.2.2
--- src/sys/arch/x86/x86/procfs_machdep.c:1.15.2.1 Thu Aug 31 11:34:54 2017
+++ src/sys/arch/x86/x86/procfs_machdep.c Tue Nov 21 15:11:52 2017
@@ -1,4 +1,4 @@
-/* $NetBSD: procfs_machdep.c,v 1.15.2.1 2017/08/31 11:34:54 martin Exp $ */
+/* $NetBSD: procfs_machdep.c,v 1.15.2.2 2017/11/21 15:11:52 martin Exp $ */
/*
* Copyright (c) 2001 Wasabi Systems, Inc.
@@ -42,7 +42,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: procfs_machdep.c,v 1.15.2.1 2017/08/31 11:34:54 martin Exp $");
+__KERNEL_RCSID(0, "$NetBSD: procfs_machdep.c,v 1.15.2.2 2017/11/21 15:11:52 martin Exp $");
#include
#include
@@ -55,6 +55,8 @@ __KERNEL_RCSID(0, "$NetBSD: procfs_machd
#include
#include
#include
+#include
+#include
/*
* The feature table. The order is the same as Linux's
@@ -106,11 +108,11 @@ static const char * const x86_features[]
"fma4", "tce", NULL, "nodeid_msr",
NULL, "tbm", "topoext", "perfctr_core",
"perfctr_nb", NULL, "bpext", "ptsc",
- "perfctr_l2", "mwaitx", NULL, NULL},
+ "perfctr_llc", "mwaitx", NULL, NULL},
{ /* (7) Linux mapping */
NULL, NULL, "cpb", "ebp", NULL, "pln", "pts", "dtherm",
- "hw_pstate", "proc_feedback", NULL, NULL,
+ "hw_pstate", "proc_feedback", "sme", NULL,
NULL, NULL, NULL, "intel_pt",
NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL},
@@ -131,7 +133,7 @@ static const char * const x86_features[]
"clwb", NULL, "avx512pf", "avx512er",
"avx512cd", "sha_ni", "avx512bw", "avx512vl"},
- { /* (10) 0x000d eax */
+ { /* (10) 0x000d:1 eax */
"xsaveopt", "xsavec", "xgetbv1", "xsaves", NULL, NULL, NULL, NULL,
NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
@@ -165,8 +167,9 @@ static const char * const x86_features[]
{ /* (15) 0x800a edx */
"npt", "lbrv", "svm_lock", "nrip_save",
"tsc_scale", "vmcb_clean", "flushbyasid", "decodeassists",
- NULL, NULL, "pausefilter", NULL, "pfthreshold", "avic", NULL, NULL,
- NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
+ NULL, NULL, "pausefilter", NULL, "pfthreshold", "avic", NULL,
+ "v_vmsave_vmload",
+ "vgif", NULL, NULL, NULL, NULL, NULL, NULL, NULL,
NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL},
{ /* (16) 0x0007:0 ecx */
@@ -176,7 +179,7 @@ static const char * const x86_features[]
NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL},
{ /* (17) 0x8007 ebx */
- "overflow_recov", "succor", "smca", NULL, NULL, NULL, NULL, NULL,
+ "overflow_recov", "succor", NULL, "smca", NULL, NULL, NULL, NULL,
NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL},
@@ -248,6 +251,7 @@ procfs_getonecpufeatures(struct cpu_info
{
size_t last = *left;
size_t diff;
+ u_int descs[4];
procfs_getonefeatreg(ci->ci_feat_val[0], x86_features[0], p, left);
diff = last - *left;
@@ -278,18 +282,59 @@ procfs_getonecpufeatures(struct cpu_info
left);
diff = last - *left;
- /* (10) 0x000d eax */
- /* (11) 0x000f(ecx=0) edx */
- /* (12) 0x000f(ecx=1) edx */
- /* (13) 0x8008 ebx */
- /* (14) 0x0006 eax */
- /* (15) 0x800a edx */
+ if (ci->ci_max_cpuid >= 0x0d) {
+ x86_cpuid2(0x0d, 1, descs);
+ procfs_getonefeatreg(descs[0], x86_features[10], p + diff,
+ left);
+ diff = last - *left;
+ }
+
+ if (ci->ci_max_cpuid >= 0x0f) {
+ x86_cpuid2(0x0f, 0, descs);
+ procfs_getonefeatreg(descs[3], x86_features[11], p + diff,
+ left);
+ diff = last - *left;
+
+ x86_cpuid2(0x0f, 1, descs);
+ procfs_getonefeatreg(descs[3], x86_features[
CVS commit: [netbsd-8] src/sys/arch/x86/x86
Module Name:src
Committed By: snj
Date: Wed Oct 25 07:05:55 UTC 2017
Modified Files:
src/sys/arch/x86/x86 [netbsd-8]: vmt.c
Log Message:
Pull up following revision(s) (requested by maya in ticket #325):
sys/arch/x86/x86/vmt.c: revision 1.18
Check that the host supports GET_SPEED as well as GET_VERSION
before deciding vmt_probe has succeeded.
qemu supports GET_VERSION but not the RPC protocol so the probe succeeds
but the attach fails, resulting in "vmt0: failed to open backdoor RPC
channel (TCLO protocol)". All known versions of vmware support GET_SPEED
and no known qemu versions do, so this prevents it from attempting to
attach (and failing) on qemu while still working on vmware.
stop checking vmt_type to avoid having to adapt this code.
- Taken from openbsd
To generate a diff of this commit:
cvs rdiff -u -r1.17 -r1.17.2.1 src/sys/arch/x86/x86/vmt.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/x86/x86/vmt.c
diff -u src/sys/arch/x86/x86/vmt.c:1.17 src/sys/arch/x86/x86/vmt.c:1.17.2.1
--- src/sys/arch/x86/x86/vmt.c:1.17 Thu Jun 1 02:45:08 2017
+++ src/sys/arch/x86/x86/vmt.c Wed Oct 25 07:05:55 2017
@@ -1,4 +1,4 @@
-/* $NetBSD: vmt.c,v 1.17 2017/06/01 02:45:08 chs Exp $ */
+/* $NetBSD: vmt.c,v 1.17.2.1 2017/10/25 07:05:55 snj Exp $ */
/* $OpenBSD: vmt.c,v 1.11 2011/01/27 21:29:25 dtucker Exp $ */
/*
@@ -126,28 +126,34 @@ static void vmt_pswitch_event(void *);
extern char hostname[MAXHOSTNAMELEN];
-static bool
-vmt_probe(uint32_t *type)
+static void
+vmt_probe_cmd(struct vm_backdoor *frame, uint16_t cmd)
{
- struct vm_backdoor frame;
+ memset(frame, 0, sizeof(*frame));
- memset(&frame, 0, sizeof(frame));
+ (frame->eax).word = VM_MAGIC;
+ (frame->ebx).word = ~VM_MAGIC;
+ (frame->ecx).part.low = cmd;
+ (frame->ecx).part.high = 0x;
+ (frame->edx).part.low = VM_PORT_CMD;
+ (frame->edx).part.high = 0;
- frame.eax.word = VM_MAGIC;
- frame.ebx.word = ~VM_MAGIC;
- frame.ecx.part.low = VM_CMD_GET_VERSION;
- frame.ecx.part.high = 0x;
- frame.edx.part.low = VM_PORT_CMD;
- frame.edx.part.high = 0;
+ vm_cmd(frame);
+}
- vm_cmd(&frame);
+static bool
+vmt_probe(void)
+{
+ struct vm_backdoor frame;
+ vmt_probe_cmd(&frame, VM_CMD_GET_VERSION);
if (frame.eax.word == 0x ||
frame.ebx.word != VM_MAGIC)
return false;
- if (type)
- *type = frame.ecx.word;
+ vmt_probe_cmd(&frame, VM_CMD_GET_SPEED);
+ if (frame.eax.word == VM_MAGIC)
+ return false;
return true;
}
@@ -163,23 +169,7 @@ vmt_match(device_t parent, cfdata_t matc
if ((ci->ci_flags & (CPUF_BSP|CPUF_SP|CPUF_PRIMARY)) == 0)
return 0;
- return vmt_probe(NULL);
-}
-
-static const char *
-vmt_type(void)
-{
- uint32_t vmwaretype = 0;
-
- vmt_probe(&vmwaretype);
-
- switch (vmwaretype) {
- case 1: return "Express";
- case 2: return "ESX Server";
- case 3: return "VMware Server";
- case 4: return "Workstation";
- default: return "Unknown";
- }
+ return vmt_probe();
}
static void
@@ -189,7 +179,6 @@ vmt_attach(device_t parent, device_t sel
struct vmt_softc *sc = device_private(self);
aprint_naive("\n");
- aprint_normal(": %s\n", vmt_type());
sc->sc_dev = self;
sc->sc_log = NULL;
CVS commit: [netbsd-8] src/sys/arch/x86/x86
Module Name:src
Committed By: martin
Date: Thu Aug 31 11:34:54 UTC 2017
Modified Files:
src/sys/arch/x86/x86 [netbsd-8]: procfs_machdep.c
Log Message:
Pull up following revision(s) (requested by msaitoh in ticket #247):
sys/arch/x86/x86/procfs_machdep.c: revision 1.16
Check buffer length correctly to not to print a garbage character.
Fixes PR#52352 reported by Yasushi Oshima.
To generate a diff of this commit:
cvs rdiff -u -r1.15 -r1.15.2.1 src/sys/arch/x86/x86/procfs_machdep.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/x86/x86/procfs_machdep.c
diff -u src/sys/arch/x86/x86/procfs_machdep.c:1.15 src/sys/arch/x86/x86/procfs_machdep.c:1.15.2.1
--- src/sys/arch/x86/x86/procfs_machdep.c:1.15 Mon May 15 04:21:14 2017
+++ src/sys/arch/x86/x86/procfs_machdep.c Thu Aug 31 11:34:54 2017
@@ -1,4 +1,4 @@
-/* $NetBSD: procfs_machdep.c,v 1.15 2017/05/15 04:21:14 msaitoh Exp $ */
+/* $NetBSD: procfs_machdep.c,v 1.15.2.1 2017/08/31 11:34:54 martin Exp $ */
/*
* Copyright (c) 2001 Wasabi Systems, Inc.
@@ -42,7 +42,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: procfs_machdep.c,v 1.15 2017/05/15 04:21:14 msaitoh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: procfs_machdep.c,v 1.15.2.1 2017/08/31 11:34:54 martin Exp $");
#include
#include
@@ -203,7 +203,7 @@ procfs_getcpuinfstr(char *bf, size_t *le
for (CPU_INFO_FOREACH(cii, ci)) {
procfs_getonecpu(i++, ci, bf, &used);
total += used + 1;
- if (used + 1 < size) {
+ if (used + 1 <= size) {
bf += used;
*bf++ = '\n';
size -= used + 1;
CVS commit: [netbsd-8] src/sys/arch/x86/x86
Module Name:src
Committed By: snj
Date: Fri Aug 25 05:42:55 UTC 2017
Modified Files:
src/sys/arch/x86/x86 [netbsd-8]: pmc.c
Log Message:
Pull up following revision(s) (requested by jdolecek in ticket #225):
sys/arch/x86/x86/pmc.c: revision 1.11
Fix GCC warning on NET4501, PR/52451.
To generate a diff of this commit:
cvs rdiff -u -r1.7.2.1 -r1.7.2.2 src/sys/arch/x86/x86/pmc.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/x86/x86/pmc.c
diff -u src/sys/arch/x86/x86/pmc.c:1.7.2.1 src/sys/arch/x86/x86/pmc.c:1.7.2.2
--- src/sys/arch/x86/x86/pmc.c:1.7.2.1 Tue Aug 1 23:18:30 2017
+++ src/sys/arch/x86/x86/pmc.c Fri Aug 25 05:42:55 2017
@@ -1,4 +1,4 @@
-/* $NetBSD: pmc.c,v 1.7.2.1 2017/08/01 23:18:30 snj Exp $ */
+/* $NetBSD: pmc.c,v 1.7.2.2 2017/08/25 05:42:55 snj Exp $ */
/*
* Copyright (c) 2017 The NetBSD Foundation, Inc.
@@ -73,7 +73,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: pmc.c,v 1.7.2.1 2017/08/01 23:18:30 snj Exp $");
+__KERNEL_RCSID(0, "$NetBSD: pmc.c,v 1.7.2.2 2017/08/25 05:42:55 snj Exp $");
#include "opt_pmc.h"
@@ -138,7 +138,7 @@ static int
pmc_nmi(const struct trapframe *tf, void *dummy)
{
struct cpu_info *ci = curcpu();
- pmc_state_t *pmc;
+ pmc_state_t *pmc = NULL;
pmc_cpu_t *cpu;
uint64_t ctr;
size_t i;
CVS commit: [netbsd-8] src/sys/arch/x86/x86
Module Name:src
Committed By: snj
Date: Fri Aug 25 05:41:55 UTC 2017
Modified Files:
src/sys/arch/x86/x86 [netbsd-8]: idt.c
Log Message:
Pull up following revision(s) (requested by jdolecek in ticket #224):
sys/arch/x86/x86/idt.c: revision 1.5
Remove incorrect KASSERT, only the allocation is protected by cpu_lock.
To generate a diff of this commit:
cvs rdiff -u -r1.4 -r1.4.8.1 src/sys/arch/x86/x86/idt.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/x86/x86/idt.c
diff -u src/sys/arch/x86/x86/idt.c:1.4 src/sys/arch/x86/x86/idt.c:1.4.8.1
--- src/sys/arch/x86/x86/idt.c:1.4 Sat Aug 27 14:19:47 2016
+++ src/sys/arch/x86/x86/idt.c Fri Aug 25 05:41:55 2017
@@ -1,4 +1,4 @@
-/* $NetBSD: idt.c,v 1.4 2016/08/27 14:19:47 maxv Exp $ */
+/* $NetBSD: idt.c,v 1.4.8.1 2017/08/25 05:41:55 snj Exp $ */
/*-
* Copyright (c) 1996, 1997, 1998, 2000, 2009 The NetBSD Foundation, Inc.
@@ -65,7 +65,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: idt.c,v 1.4 2016/08/27 14:19:47 maxv Exp $");
+__KERNEL_RCSID(0, "$NetBSD: idt.c,v 1.4.8.1 2017/08/25 05:41:55 snj Exp $");
#include
#include
@@ -119,7 +119,6 @@ void
idt_vec_set(int vec, void (*function)(void))
{
- KASSERT(mutex_owned(&cpu_lock) || !mp_online);
KASSERT(idt_allocmap[vec] == 1);
setgate(&idt[vec], function, 0, SDT_SYS386IGT, SEL_KPL,
GSEL(GCODE_SEL, SEL_KPL));
CVS commit: [netbsd-8] src/sys/arch/x86/x86
Module Name:src
Committed By: martin
Date: Fri Jul 14 08:41:18 UTC 2017
Modified Files:
src/sys/arch/x86/x86 [netbsd-8]: lapic.c
Log Message:
Pull up following revision(s) (requested by nonaka in ticket #135):
sys/arch/x86/x86/lapic.c: revision 1.60
PR/52266: Before access MSR[APICBASE], need to check if APIC is present.
To generate a diff of this commit:
cvs rdiff -u -r1.58.2.1 -r1.58.2.2 src/sys/arch/x86/x86/lapic.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/x86/x86/lapic.c
diff -u src/sys/arch/x86/x86/lapic.c:1.58.2.1 src/sys/arch/x86/x86/lapic.c:1.58.2.2
--- src/sys/arch/x86/x86/lapic.c:1.58.2.1 Mon Jul 10 12:26:21 2017
+++ src/sys/arch/x86/x86/lapic.c Fri Jul 14 08:41:18 2017
@@ -1,4 +1,4 @@
-/* $NetBSD: lapic.c,v 1.58.2.1 2017/07/10 12:26:21 martin Exp $ */
+/* $NetBSD: lapic.c,v 1.58.2.2 2017/07/14 08:41:18 martin Exp $ */
/*-
* Copyright (c) 2000, 2008 The NetBSD Foundation, Inc.
@@ -32,7 +32,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: lapic.c,v 1.58.2.1 2017/07/10 12:26:21 martin Exp $");
+__KERNEL_RCSID(0, "$NetBSD: lapic.c,v 1.58.2.2 2017/07/14 08:41:18 martin Exp $");
#include "acpica.h"
#include "ioapic.h"
@@ -237,7 +237,8 @@ lapic_is_x2apic(void)
{
uint64_t msr;
- if (rdmsr_safe(MSR_APICBASE, &msr) == EFAULT)
+ if (!ISSET(cpu_feature[0], CPUID_APIC) ||
+ rdmsr_safe(MSR_APICBASE, &msr) == EFAULT)
return false;
return (msr & (APICBASE_EN | APICBASE_EXTD)) ==
(APICBASE_EN | APICBASE_EXTD);
CVS commit: [netbsd-8] src/sys/arch/x86/x86
Module Name:src
Committed By: martin
Date: Mon Jul 10 12:26:21 UTC 2017
Modified Files:
src/sys/arch/x86/x86 [netbsd-8]: lapic.c
Log Message:
Pull up following revision(s) (requested by nonaka in ticket #110):
sys/arch/x86/x86/lapic.c: revision 1.59
PR/52266: use rdmsr_safe(9) instead of rdmsr(9) for old machine.
tested by simonb@
To generate a diff of this commit:
cvs rdiff -u -r1.58 -r1.58.2.1 src/sys/arch/x86/x86/lapic.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/x86/x86/lapic.c
diff -u src/sys/arch/x86/x86/lapic.c:1.58 src/sys/arch/x86/x86/lapic.c:1.58.2.1
--- src/sys/arch/x86/x86/lapic.c:1.58 Tue May 23 08:54:39 2017
+++ src/sys/arch/x86/x86/lapic.c Mon Jul 10 12:26:21 2017
@@ -1,4 +1,4 @@
-/* $NetBSD: lapic.c,v 1.58 2017/05/23 08:54:39 nonaka Exp $ */
+/* $NetBSD: lapic.c,v 1.58.2.1 2017/07/10 12:26:21 martin Exp $ */
/*-
* Copyright (c) 2000, 2008 The NetBSD Foundation, Inc.
@@ -32,7 +32,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: lapic.c,v 1.58 2017/05/23 08:54:39 nonaka Exp $");
+__KERNEL_RCSID(0, "$NetBSD: lapic.c,v 1.58.2.1 2017/07/10 12:26:21 martin Exp $");
#include "acpica.h"
#include "ioapic.h"
@@ -235,10 +235,12 @@ lapic_enable_x2apic(void)
bool
lapic_is_x2apic(void)
{
- uint64_t r;
+ uint64_t msr;
- r = rdmsr(MSR_APICBASE);
- return (r & (APICBASE_EN | APICBASE_EXTD)) == (APICBASE_EN | APICBASE_EXTD);
+ if (rdmsr_safe(MSR_APICBASE, &msr) == EFAULT)
+ return false;
+ return (msr & (APICBASE_EN | APICBASE_EXTD)) ==
+ (APICBASE_EN | APICBASE_EXTD);
}
/*
CVS commit: [netbsd-8] src/sys/arch/x86/x86
Module Name:src
Committed By: snj
Date: Wed Jul 5 20:23:09 UTC 2017
Modified Files:
src/sys/arch/x86/x86 [netbsd-8]: pmap.c
Log Message:
Pull up following revision(s) (requested by jdolecek in ticket #98):
sys/arch/x86/x86/pmap.c: revision 1.252
remove panicstr KASSERT() in pmap_kremove_local() - kernel dump can
legitimely invoked also without panic - via reboot -d
fixes PR kern/49610 by Manuel Bouyer
To generate a diff of this commit:
cvs rdiff -u -r1.245 -r1.245.6.1 src/sys/arch/x86/x86/pmap.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/x86/x86/pmap.c
diff -u src/sys/arch/x86/x86/pmap.c:1.245 src/sys/arch/x86/x86/pmap.c:1.245.6.1
--- src/sys/arch/x86/x86/pmap.c:1.245 Fri Mar 24 10:58:06 2017
+++ src/sys/arch/x86/x86/pmap.c Wed Jul 5 20:23:08 2017
@@ -1,4 +1,4 @@
-/* $NetBSD: pmap.c,v 1.245 2017/03/24 10:58:06 maxv Exp $ */
+/* $NetBSD: pmap.c,v 1.245.6.1 2017/07/05 20:23:08 snj Exp $ */
/*-
* Copyright (c) 2008, 2010, 2016, 2017 The NetBSD Foundation, Inc.
@@ -171,7 +171,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.245 2017/03/24 10:58:06 maxv Exp $");
+__KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.245.6.1 2017/07/05 20:23:08 snj Exp $");
#include "opt_user_ldt.h"
#include "opt_lockdebug.h"
@@ -1146,14 +1146,13 @@ pmap_kremove(vaddr_t sva, vsize_t len)
/*
* pmap_kremove_local: like pmap_kremove(), but only worry about
* TLB invalidations on the current CPU. this is only intended
- * for use while writing kernel crash dumps.
+ * for use while writing kernel crash dumps, either after panic
+ * or via reboot -d.
*/
void
pmap_kremove_local(vaddr_t sva, vsize_t len)
{
-
- KASSERT(panicstr != NULL);
pmap_kremove1(sva, len, true);
}
CVS commit: [netbsd-8] src/sys/arch/x86/x86
Module Name:src
Committed By: snj
Date: Wed Jun 14 04:47:33 UTC 2017
Modified Files:
src/sys/arch/x86/x86 [netbsd-8]: cpu.c
Log Message:
Pull up following revision(s) (requested by pgoyette in ticket #28):
sys/arch/x86/x86/cpu.c: revision 1.131
Further reduce the loop counter so that hatching completes before the
boot processor times us out.
Add a nice big XXX comment for why the counter is so low.
To generate a diff of this commit:
cvs rdiff -u -r1.130 -r1.130.2.1 src/sys/arch/x86/x86/cpu.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/x86/x86/cpu.c
diff -u src/sys/arch/x86/x86/cpu.c:1.130 src/sys/arch/x86/x86/cpu.c:1.130.2.1
--- src/sys/arch/x86/x86/cpu.c:1.130 Wed May 31 14:41:07 2017
+++ src/sys/arch/x86/x86/cpu.c Wed Jun 14 04:47:33 2017
@@ -1,4 +1,4 @@
-/* $NetBSD: cpu.c,v 1.130 2017/05/31 14:41:07 kre Exp $ */
+/* $NetBSD: cpu.c,v 1.130.2.1 2017/06/14 04:47:33 snj Exp $ */
/*-
* Copyright (c) 2000-2012 NetBSD Foundation, Inc.
@@ -62,7 +62,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: cpu.c,v 1.130 2017/05/31 14:41:07 kre Exp $");
+__KERNEL_RCSID(0, "$NetBSD: cpu.c,v 1.130.2.1 2017/06/14 04:47:33 snj Exp $");
#include "opt_ddb.h"
#include "opt_mpbios.h" /* for MPDEBUG */
@@ -835,7 +835,13 @@ cpu_hatch(void *v)
}
x86_mwait(0, 0);
} else {
- for (i = 100; i != 0; i--) {
+ /*
+ * XXX The loop repetition count could be a lot higher, but
+ * XXX currently qemu emulator takes a _very_long_time_ to
+ * XXX execute the pause instruction. So for now, use a low
+ * XXX value to allow the cpu to hatch before timing out.
+ */
+ for (i = 50; i != 0; i--) {
x86_pause();
}
}
