Re: i386: switch to clockintr(9)

2022-11-20 Thread Scott Bennett
On Wed, Nov 9, 2022 at 2:10 PM Scott Cheloha  wrote:
> On Sun, Nov 06, 2022 at 07:46:37PM +, Scott Cheloha wrote:
> > This patch switches i386 to clockintr(9).
> >
> > [...]
>
> The HPET pieces have been committed separately.  Here is an updated
> patch.

I have been running this on my (real) Pentium 4 i386 machine for a couple
weeks, rebasing onto -current, and have not noticed any regressions.

Of note:

- It boots
- ntpd is able to sync the clock
- I've built and installed many kernels with `make -j2'
  Build time always ~30 minutes
- APM suspend/resume works, though I only tested once
- Accelerated graphics (aka `glxgears -info') works when running cwm, though
  this machine does not normally run X

dmesg below if that's useful.

-Scott Bennett


OpenBSD 7.2-current (GENERIC.MP) #16: Fri Nov 18 22:27:28 EST 2022
scott@nimbus.puffers.private:/sys/arch/i386/compile/GENERIC.MP
real mem  = 1063301120 (1014MB)
avail mem = 1026936832 (979MB)
random: good seed from bootblocks
mpath0 at root
scsibus0 at mpath0: 256 targets
mainbus0 at root
bios0 at mainbus0: date 02/09/05, BIOS32 rev. 0 @ 0xffe90, SMBIOS rev.
2.3 @ 0xf0450 (74 entries)
bios0: vendor Dell Inc. version "A04" date 02/09/2005
bios0: Dell Inc. OptiPlex GX280
acpi0 at bios0: ACPI 1.0
acpi0: sleep states S0 S1 S3 S4 S5
acpi0: tables DSDT FACP SSDT APIC BOOT ASF! MCFG HPET
acpi0: wakeup devices VBTN(S4) PCI0(S5) PCI1(S5) PCI2(S5) PCI3(S5)
PCI4(S5) USB0(S3) USB1(S3) USB2(S3) USB3(S3)
acpitimer0 at acpi0: 3579545 Hz, 24 bits
acpimadt0 at acpi0 addr 0xfee0: PC-AT compat
cpu0 at mainbus0: apid 0 (boot processor)
cpu0: Intel(R) Pentium(R) 4 CPU 3.00GHz ("GenuineIntel" 686-class) 3
GHz, 0f-04-01
cpu0: 
FPU,V86,DE,PSE,TSC,MSR,PAE,MCE,CX8,APIC,SEP,MTRR,PGE,MCA,CMOV,PAT,PSE36,CFLUSH,DS,ACPI,MMX,FXSR,SSE,SSE2,SS,HTT,TM,PBE,SSE3,DTES64,MWAIT,DS-CPL,CNXT-ID,xTPR,NXE,MELTDOWN
mtrr: Pentium Pro MTRR support, 8 var ranges, 88 fixed ranges
cpu0: apic clock running at 199MHz
cpu1 at mainbus0: apid 1 (application processor)
cpu1: Intel(R) Pentium(R) 4 CPU 3.00GHz ("GenuineIntel" 686-class) 3
GHz, 0f-04-01
cpu1: 
FPU,V86,DE,PSE,TSC,MSR,PAE,MCE,CX8,APIC,SEP,MTRR,PGE,MCA,CMOV,PAT,PSE36,CFLUSH,DS,ACPI,MMX,FXSR,SSE,SSE2,SS,HTT,TM,PBE,SSE3,DTES64,MWAIT,DS-CPL,CNXT-ID,xTPR,NXE,MELTDOWN
ioapic0 at mainbus0: apid 8 pa 0xfec0, version 20, 24 pins, remapped
acpimcfg0 at acpi0
acpimcfg0: addr 0xe000, bus 0-255
acpimcfg0: addr 0x0, bus 0-0
acpihpet0 at acpi0: 14318179 Hz
acpiprt0 at acpi0: bus 0 (PCI0)
acpiprt1 at acpi0: bus 4 (PCI1)
acpiprt2 at acpi0: bus 2 (PCI2)
acpiprt3 at acpi0: bus 3 (PCI3)
acpiprt4 at acpi0: bus 1 (PCI4)
acpibtn0 at acpi0: VBTN
"PNP0A03" at acpi0 not configured
acpicmos0 at acpi0
"PNP0501" at acpi0 not configured
acpicpu0 at acpi0: C1(@1 halt!)
acpicpu1 at acpi0: C1(@1 halt!)
bios0: ROM list: 0xc/0xa800! 0xca800/0x1800!
pci0 at mainbus0 bus 0: configuration mode 1 (bios)
pchb0 at pci0 dev 0 function 0 "Intel 82915G Host" rev 0x04
ppb0 at pci0 dev 1 function 0 "Intel 82915G PCIE" rev 0x04: apic 8 int 16
pci1 at ppb0 bus 1
inteldrm0 at pci0 dev 2 function 0 "Intel 82915G Video" rev 0x04
drm0 at inteldrm0
intagp0 at inteldrm0
agp0 at intagp0: aperture at 0xc000, size 0x1000
inteldrm0: apic 8 int 16, I915G, gen 3
"Intel 82915G Video" rev 0x04 at pci0 dev 2 function 1 not configured
ppb1 at pci0 dev 28 function 0 "Intel 82801FB PCIE" rev 0x03: apic 8 int 16
pci2 at ppb1 bus 2
bge0 at pci2 dev 0 function 0 "Broadcom BCM5751" rev 0x01, BCM5750 A1
(0x4001): apic 8 int 16, address xx:xx:xx:xx:xx:xx
brgphy0 at bge0 phy 1: BCM5750 10/100/1000baseT PHY, rev. 0
ppb2 at pci0 dev 28 function 1 "Intel 82801FB PCIE" rev 0x03
pci3 at ppb2 bus 3
uhci0 at pci0 dev 29 function 0 "Intel 82801FB USB" rev 0x03: apic 8 int 21
uhci1 at pci0 dev 29 function 1 "Intel 82801FB USB" rev 0x03: apic 8 int 22
uhci2 at pci0 dev 29 function 2 "Intel 82801FB USB" rev 0x03: apic 8 int 18
uhci3 at pci0 dev 29 function 3 "Intel 82801FB USB" rev 0x03: apic 8 int 23
ehci0 at pci0 dev 29 function 7 "Intel 82801FB USB" rev 0x03: apic 8 int 21
usb0 at ehci0: USB revision 2.0
uhub0 at usb0 configuration 1 interface 0 "Intel EHCI root hub" rev
2.00/1.00 addr 1
ppb3 at pci0 dev 30 function 0 "Intel 82801BA Hub-to-PCI" rev 0xd3
pci4 at ppb3 bus 4
dc0 at pci4 dev 0 function 0 "ADMtek AN983" rev 0x11: apic 8 int 16,
address xx:xx:xx:xx:xx:xx
ukphy0 at dc0 phy 1: Generic IEEE 802.3u media interface, rev. 1: OUI
0x000749, model 0x0001
auich0 at pci0 dev 30 function 2 "Intel 82801FB AC97" rev 0x03: apic 8
int 23, ICH6
ac97: codec id 0x41445374 (Analog Devices AD1981B)
ac97: codec features headphone, 20 bit DAC, No 3D Stereo
audio0 at auich0
ichpcib0 at pci0 dev 31 function 0 "Intel 82801FB LPC" rev 0x03: PM disabl

resolv.conf(5): remove "either file" wording

2021-08-23 Thread Scott Bennett
In rev 1.61, references to resolv.conf.tail were removed, so it appears that
this page is now meant to solely document resolv.conf, a single file. So that
makes this sentence make not-so-much sense:

The configuration options (which may be placed in either file) are:

Diff below removes the "either file" wording.

Cheers,
Scott


diff c90212a02b599071a4e7b5e4709b67a0988d81b7 /usr/src
blob - 49ee20b2a5c863735baedf6c938512c029e76903
file + share/man/man5/resolv.conf.5
--- share/man/man5/resolv.conf.5
+++ share/man/man5/resolv.conf.5
@@ -69,11 +69,11 @@ or semicolon
 .Pq \&;
 in the file indicates the beginning of a comment;
 subsequent characters up to the end of the line are not interpreted by
 the routines that read the file.
 .Pp
-The configuration options (which may be placed in either file) are:
+The configuration options are:
 .Bl -tag -width nameserver
 .It Ic nameserver
 IPv4 address (in dot notation)
 or IPv6 address (in hex-and-colon notation)
 of a name server that the resolver should query.



Reference dhcpleased.conf(5)

2021-08-22 Thread Scott Bennett
Like the rad(8) and unwind(8) manuals do, add references to
dhcpleased.conf(5) in the appropriate places.

Cheers,
Scott

diff 4ccbc464479218d5b5f4125325c4d9358f653323 /usr/src
blob - 7ee3d8f92a1d31880ce1729f21940fd38ec24930
file + sbin/dhcpleased/dhcpleased.8
--- sbin/dhcpleased/dhcpleased.8
+++ sbin/dhcpleased/dhcpleased.8
@@ -83,6 +83,7 @@ Default
 configuration file.
 .El
 .Sh SEE ALSO
+.Xr dhcpleased.conf 5 ,
 .Xr hostname.if 5 ,
 .Xr dhcpd 8 ,
 .Xr dhcpleasectl 8 ,
blob - b68d592a25dead357e2a057c2026081821e15dc7
file + usr.sbin/dhcpleasectl/dhcpleasectl.8
--- usr.sbin/dhcpleasectl/dhcpleasectl.8
+++ usr.sbin/dhcpleasectl/dhcpleasectl.8
@@ -72,6 +72,7 @@ socket used for communication with
 .Xr dhcpleased 8 .
 .El
 .Sh SEE ALSO
+.Xr dhcpleased.conf 5 ,
 .Xr dhcpleased 8
 .Sh HISTORY
 The



Re: Unlock top part of uvm_fault()

2021-04-29 Thread Scott Bennett
On Thu, 22 Apr 2021 17:06:00 -0400, Scott Bennett  
wrote:
> On Thu, 22 Apr 2021 15:38:53 +0200, Martin Pieuchot  wrote:
> > Diff below remove the KERNEL_LOCK()/UNLOCK() dance from uvm_fault() for
> > both amd64 and sparc64.  That means the kernel lock will only be taken
> > for lower faults and some amap/anon code will now run without it.
>
> Hi Martin,
> 
> I'd be willing to test this on octeon. However, with my poor little EdgeRouter
> Lite, I would only be able to test building a few packages.
> 
> Would this be the correct diff for octeon?
> 
> diff 5fe2fdbf987b2faadb61c6a00cf1dd30ab3e7fa6 /usr/src
> blob - 6530ef75203fbea02a4f1aaca62e4e78a81f4cdf
> file + sys/arch/mips64/mips64/trap.c
> --- sys/arch/mips64/mips64/trap.c
> +++ sys/arch/mips64/mips64/trap.c
> @@ -340,9 +340,7 @@ itsa(struct trapframe *trapframe, struct cpu_info *ci,
>   va = trunc_page((vaddr_t)trapframe->badvaddr);
>   onfault = pcb->pcb_onfault;
>   pcb->pcb_onfault = 0;
> - KERNEL_LOCK();
>   rv = uvm_fault(kernel_map, va, 0, access_type);
> - KERNEL_UNLOCK();
>   pcb->pcb_onfault = onfault;
>   if (rv == 0)
>   return;
> @@ -421,9 +419,7 @@ fault_common_no_miss:
>  
>   onfault = pcb->pcb_onfault;
>   pcb->pcb_onfault = 0;
> - KERNEL_LOCK();
>   rv = uvm_fault(map, va, 0, access_type);
> - KERNEL_UNLOCK();
>   pcb->pcb_onfault = onfault;
>  
>   /*
> 

I tested the above by doing a kernel build and building one package
(lang/tcl/8.6). The system was stable, but the build times were virtually
the same. I used a snapshot from April 27 and applied my diff to sources
checked out on April 27.

kernel build times:

Before diff:
erl$ time make -j 2
   63m31.25s real   113m05.96s user11m52.75s system

After diff:
erl$ time make -j 2
   63m09.83s real   112m49.24s user11m33.18s system


lang/tcl/8.6 build times:

Before diff:
erl$ time make build
   39m04.35s real34m35.00s user 3m43.20s system

After diff:
erl$ time make build
   39m04.12s real34m34.70s user 3m41.03s system



Re: Unlock top part of uvm_fault()

2021-04-22 Thread Scott Bennett
On Thu, 22 Apr 2021 15:38:53 +0200, Martin Pieuchot  wrote:
> Diff below remove the KERNEL_LOCK()/UNLOCK() dance from uvm_fault() for
> both amd64 and sparc64.  That means the kernel lock will only be taken
> for lower faults and some amap/anon code will now run without it.
> 
> I'd be interested to have this tested and see how much does that impact
> the build time of packages.
> 
> We should be able to do the switch on an arch-by-arch basis.  It's
> easier for me to develop & debug on these two architectures so I started
> with them.  If you want to unlock another architecture and report back,
> I'd be glad.
> 
> Thanks,
> Martin

Hi Martin,

I'd be willing to test this on octeon. However, with my poor little EdgeRouter
Lite, I would only be able to test building a few packages.

Would this be the correct diff for octeon?

diff 5fe2fdbf987b2faadb61c6a00cf1dd30ab3e7fa6 /usr/src
blob - 6530ef75203fbea02a4f1aaca62e4e78a81f4cdf
file + sys/arch/mips64/mips64/trap.c
--- sys/arch/mips64/mips64/trap.c
+++ sys/arch/mips64/mips64/trap.c
@@ -340,9 +340,7 @@ itsa(struct trapframe *trapframe, struct cpu_info *ci,
va = trunc_page((vaddr_t)trapframe->badvaddr);
onfault = pcb->pcb_onfault;
pcb->pcb_onfault = 0;
-   KERNEL_LOCK();
rv = uvm_fault(kernel_map, va, 0, access_type);
-   KERNEL_UNLOCK();
pcb->pcb_onfault = onfault;
if (rv == 0)
return;
@@ -421,9 +419,7 @@ fault_common_no_miss:
 
onfault = pcb->pcb_onfault;
pcb->pcb_onfault = 0;
-   KERNEL_LOCK();
rv = uvm_fault(map, va, 0, access_type);
-   KERNEL_UNLOCK();
pcb->pcb_onfault = onfault;
 
/*



Re: uvm_page_physload: use km_alloc(9)

2021-04-20 Thread Scott Bennett
On Thu, 15 Apr 2021 14:00:18 +0200, Martin Pieuchot  wrote:
> On 13/04/21(Tue) 02:05, Alexander Bluhm wrote:
> > On Mon, Mar 22, 2021 at 11:50:00AM +0100, Mark Kettenis wrote:  
> > > > Date: Mon, 22 Mar 2021 11:29:52 +0100
> > > > From: Martin Pieuchot 
> > > > 
> > > > Convert the last MI uvm_km_zalloc(9) to km_alloc(9), ok?  
> > > 
> > > Also needs some careful testing on multiple architectures.  
> > 
> > I did run both diffs through a full regress on armv7, arm64, amd64,
> > i386 a while ago.  No fallout.  
> 
> I've been running those on sparc64.  So I'd be interested for tests on
> powerpc{,64} and octeon.  This is obviously for after release :o)
> 
> Index: kern/kern_malloc.c
> ===
> RCS file: /cvs/src/sys/kern/kern_malloc.c,v
> retrieving revision 1.144
> diff -u -p -r1.144 kern_malloc.c
> --- kern/kern_malloc.c23 Feb 2021 13:50:16 -  1.144
> +++ kern/kern_malloc.c13 Apr 2021 10:25:03 -
> @@ -580,8 +580,8 @@ kmeminit(void)
>   FALSE, &kmem_map_store);
>   kmembase = (char *)base;
>   kmemlimit = (char *)limit;
> - kmemusage = (struct kmemusage *) uvm_km_zalloc(kernel_map,
> - (vsize_t)(nkmempages * sizeof(struct kmemusage)));
> + kmemusage = km_alloc(round_page(nkmempages * sizeof(struct kmemusage)),
> + &kv_any, &kp_zero, &kd_waitok);
>   for (indx = 0; indx < MINBUCKET + 16; indx++) {
>   XSIMPLEQ_INIT(&bucket[indx].kb_freelist);
>   }
> Index: uvm/uvm_page.c
> ===
> RCS file: /cvs/src/sys/uvm/uvm_page.c,v
> retrieving revision 1.156
> diff -u -p -r1.156 uvm_page.c
> --- uvm/uvm_page.c26 Mar 2021 13:40:05 -  1.156
> +++ uvm/uvm_page.c13 Apr 2021 10:25:02 -
> @@ -542,8 +542,8 @@ uvm_page_physload(paddr_t start, paddr_t
>  
>   npages = end - start;  /* # of pages */
>  
> - pgs = (struct vm_page *)uvm_km_zalloc(kernel_map,
> - npages * sizeof(*pgs));
> + pgs = km_alloc(npages * sizeof(*pgs), &kv_any, &kp_zero,
> + &kd_waitok);
>   if (pgs == NULL) {
>   printf("uvm_page_physload: can not malloc vm_page "
>   "structs for segment\n");

I've been running this over the weekend on a (lightly used) EdgeRouter Lite.
Survived building a few kernels and performing some operations on a small git
repository. Haven't noticed any "bad things" happen on that octeon box with 
this.

Cheers,
Scott



Re: athn(4): switch Tx rate control to RA

2021-03-30 Thread Scott Bennett
On Tue, 23 Mar 2021 18:01:27 +0100, Stefan Sperling  wrote:
> This switches athn(4) to the new RA Tx rate adaptation module.
> Tests on athn(4) PCI devices are welcome.
> USB devices don't need to be tested in this case Tx rate adaptation
> is taken care of by firmware.
> 
> I could only test on AR9285 so far, but the result looks promising.

This seems to be working well on my apu2 in hostap mode:

athn0 at pci4 dev 0 function 0 "Atheros AR9281" rev 0x01: apic 5 int 16
athn0: AR9280 rev 2 (2T2R), ROM rev 22, address 04:f0:21:xx:xx:xx

However, my laptop with AR9287 was noticeably worse with this diff (dropped
pings, stuttering keystrokes in interactive ssh session, estimated 20
minutes to scp(1) a 20M file...). The combination of apu2 with diff and my
laptop sans diff is giving me good results though :)

athn0 at pci2 dev 0 function 0 "Atheros AR9287" rev 0x01: apic 2 int 17
athn0: AR9287 rev 2 (2T2R), ROM rev 4, address 74:de:2b:xx:xx:xx

On this laptop, I use a trunk(4) interface and I connect to the apu2 via
authpf(8). Some configs and dmesg below. Let me know how I can be of further
assistance.

$ cat /etc/hostname.athn0
join myap wpakey xxx
powersave
up

$ cat /etc/hostname.em0
up

$ cat /etc/hostname.trunk0
trunkproto failover trunkport em0
trunkport athn0
dhcp
up

$ ifconfig athn0
athn0: flags=8943 mtu 1500
lladdr d4:be:d9:xx:xx:xx
index 2 priority 4 llprio 3
trunk: trunkdev trunk0
groups: wlan
media: IEEE802.11 autoselect (HT-MCS2 mode 11n)
status: active
ieee80211: join myap chan 7 bssid xx:xx:xx:xx:xx:xx -36dBm wpakey 
wpaprotos wpa2 wpaakms psk wpaciphers ccmp wpagroupcipher ccmp powersave on 
(100ms sleep)


OpenBSD 6.9-beta (GENERIC.MP) #437: Tue Mar 30 14:45:23 MDT 2021
dera...@amd64.openbsd.org:/usr/src/sys/arch/amd64/compile/GENERIC.MP
real mem = 17064501248 (16273MB)
avail mem = 16531947520 (15766MB)
random: good seed from bootblocks
mpath0 at root
scsibus0 at mpath0: 256 targets
mainbus0 at root
bios0 at mainbus0: SMBIOS rev. 2.7 @ 0xebf20 (98 entries)
bios0: vendor Dell Inc. version "A13" date 06/20/2014
bios0: Dell Inc. Latitude E6430s
acpi0 at bios0: ACPI 5.0
acpi0: sleep states S0 S3 S4 S5
acpi0: tables DSDT FACP APIC FPDT MCFG HPET SSDT SSDT SSDT DMAR ASF! SLIC BGRT
acpi0: wakeup devices P0P1(S4) USB1(S3) USB2(S3) USB3(S3) USB5(S3) USB6(S3) 
USB7(S3) RP01(S4) PXSX(S4) RP02(S4) PXSX(S4) RP05(S4) PXSX(S4) RP06(S4) 
PXSX(S4) RP07(S4) [...]
acpitimer0 at acpi0: 3579545 Hz, 24 bits
acpimadt0 at acpi0 addr 0xfee0: PC-AT compat
cpu0 at mainbus0: apid 0 (boot processor)
cpu0: Intel(R) Core(TM) i5-3320M CPU @ 2.60GHz, 2592.04 MHz, 06-3a-09
cpu0: 
FPU,VME,DE,PSE,TSC,MSR,PAE,MCE,CX8,APIC,SEP,MTRR,PGE,MCA,CMOV,PAT,PSE36,CFLUSH,DS,ACPI,MMX,FXSR,SSE,SSE2,SS,HTT,TM,PBE,SSE3,PCLMUL,DTES64,MWAIT,DS-CPL,VMX,SMX,EST,TM2,SSSE3,CX16,xTPR,PDCM,PCID,SSE4.1,SSE4.2,x2APIC,POPCNT,DEADLINE,AES,XSAVE,AVX,F16C,RDRAND,NXE,RDTSCP,LONG,LAHF,PERF,ITSC,FSGSBASE,SMEP,ERMS,MD_CLEAR,IBRS,IBPB,STIBP,L1DF,SSBD,SENSOR,ARAT,XSAVEOPT,MELTDOWN
cpu0: 256KB 64b/line 8-way L2 cache
cpu0: smt 0, core 0, package 0
mtrr: Pentium Pro MTRR support, 10 var ranges, 88 fixed ranges
cpu0: apic clock running at 99MHz
cpu0: mwait min=64, max=64, C-substates=0.2.1.1.2, IBE
cpu1 at mainbus0: apid 2 (application processor)
cpu1: Intel(R) Core(TM) i5-3320M CPU @ 2.60GHz, 2591.60 MHz, 06-3a-09
cpu1: 
FPU,VME,DE,PSE,TSC,MSR,PAE,MCE,CX8,APIC,SEP,MTRR,PGE,MCA,CMOV,PAT,PSE36,CFLUSH,DS,ACPI,MMX,FXSR,SSE,SSE2,SS,HTT,TM,PBE,SSE3,PCLMUL,DTES64,MWAIT,DS-CPL,VMX,SMX,EST,TM2,SSSE3,CX16,xTPR,PDCM,PCID,SSE4.1,SSE4.2,x2APIC,POPCNT,DEADLINE,AES,XSAVE,AVX,F16C,RDRAND,NXE,RDTSCP,LONG,LAHF,PERF,ITSC,FSGSBASE,SMEP,ERMS,MD_CLEAR,IBRS,IBPB,STIBP,L1DF,SSBD,SENSOR,ARAT,XSAVEOPT,MELTDOWN
cpu1: 256KB 64b/line 8-way L2 cache
cpu1: smt 0, core 1, package 0
ioapic0 at mainbus0: apid 2 pa 0xfec0, version 20, 24 pins
acpimcfg0 at acpi0
acpimcfg0: addr 0xf800, bus 0-63
acpihpet0 at acpi0: 14318179 Hz
acpiprt0 at acpi0: bus 0 (PCI0)
acpiprt1 at acpi0: bus -1 (P0P1)
acpiprt2 at acpi0: bus 1 (RP01)
acpiprt3 at acpi0: bus 2 (RP02)
acpiprt4 at acpi0: bus -1 (RP05)
acpiprt5 at acpi0: bus 11 (RP06)
acpiprt6 at acpi0: bus -1 (RP07)
acpiprt7 at acpi0: bus -1 (RP08)
acpiprt8 at acpi0: bus -1 (PEG0)
acpiprt9 at acpi0: bus -1 (PEG1)
acpiprt10 at acpi0: bus -1 (PEG2)
acpiprt11 at acpi0: bus -1 (PEG3)
acpiprt12 at acpi0: bus 3 (RP03)
acpiprt13 at acpi0: bus 7 (RP04)
acpiec0 at acpi0
acpipci0 at acpi0 PCI0: 0x0004 0x0011 0x0001
acpicmos0 at acpi0
"SMO8810" at acpi0 not configured
"*pnp0c14" at acpi0 not configured
acpibtn0 at acpi0: LID0
acpibtn1 at acpi0: PBTN
acpibtn2 at acpi0: SBTN
acpiac0 at acpi0: AC unit offline
acpibat0 at acpi0: BAT0 model "DELL YJNKK18" serial 1 type LION oem "DP-SDI56"
acpibat1 at acpi0: BAT1 not present
acpibat2 at acpi0: BAT2 not present
"DELLABCE" at acpi0 not configured
acpicpu0 at acpi0: C3(200@87 mwait.1@0x30), C2(500@59 mwait.1@0x10), C1(1000@1 
mwait.1), PSS
acpicpu1 at a

resolvd.8 typo

2021-02-28 Thread Scott Bennett
Probably meant 'sent' instead of 'send'

diff refs/heads/master refs/heads/dev
blob - b03e36a6a8e0513fa1e38a2f078bddb50a796f08
blob + 51b3c984faeeb83bfcd2d68370294690b15c659e
--- sbin/resolvd/resolvd.8
+++ sbin/resolvd/resolvd.8
@@ -34,7 +34,7 @@ read by the resolver routines in the C library.
 checks whether
 .Xr unwind 8
 is running and
-monitors the routing socket for proposals send by
+monitors the routing socket for proposals sent by
 .Xr dhclient 8 ,
 .Xr slaacd 8 ,
 or network devices which learn DNS information such as



mdoc(7) closing macros in See also

2020-08-17 Thread Scott Bennett
Hi,

While learning the mdoc(7) markup language, I sometimes have trouble figuring
out which macros are used to close certain multi-line macros. It is certainly
not impossible to find the necessary closing macro to any arbitrary opening
macro, but for the macros that I use less often it can be a bit of a
scavenger hunt.

This could be much easier if the required closing macro were listed in the
"See also" section of the opening macro. In fact, there is already a precedent
in the Bf and Bl macros, which do list their closers (Ef and El, respectively)
in their "See also" sections.

I think the following patch could be useful to those starting to learn the
mdoc(7) language, or for anyone who prefers to jump right into the MACRO
REFERENCE section.

Thanks,
Scott Bennett

diff f7f933db8e4e532d6a39c747672ac5861ccd4883 
ced68e3867e5e6c3d2dc26f337effe036c033d47
blob - 7cbe1db136ad1619f26a599517c7c9b1d7e36ce8
blob + 45935846ab15de1500fd65ccb773c8371d614bbf
--- share/man/man7/mdoc.7
+++ share/man/man7/mdoc.7
@@ -677,10 +677,13 @@ Begin a block enclosed by angle brackets.
 Does not have any head arguments.
 This macro is almost never useful.
 See
 .Ic \&Aq
 for more details.
+.Pp
+See also
+.Ic \&Ac .
 .It Ic \&Ap
 Inserts an apostrophe without any surrounding whitespace.
 This is generally used as a grammatical device when referring to the verb
 form of a function.
 .Pp
@@ -870,13 +873,14 @@ Examples:
Hello   world.
 \&.Ed
 .Ed
 .Pp
 See also
-.Ic \&D1
+.Ic \&D1 ,
+.Ic \&Dl ,
 and
-.Ic \&Dl .
+.Ic \&Ed .
 .It Ic \&Bf Fl emphasis | literal | symbolic | Cm \&Em | \&Li | \&Sy
 Change the font mode for a scoped block of text.
 The
 .Fl emphasis
 and
@@ -921,10 +925,13 @@ macro line:
 \&.Ek
 .Ed
 .Pp
 Be careful in using over-long lines within a keep block!
 Doing so will clobber the right margin.
+.Pp
+See also
+.Ic \&Ek .
 .It Xo
 .Ic \&Bl
 .Fl Ns Ar type
 .Op Fl width Ar val
 .Op Fl offset Ar val
@@ -1062,10 +1069,12 @@ Examples:
 \&.Bo 1 ,
 \&.Dv BUFSIZ \&Bc
 .Ed
 .Pp
 See also
+.Ic \&Bc
+and
 .Ic \&Bq .
 .It Ic \&Bq Ar line
 Encloses its arguments in square brackets.
 .Pp
 Examples:
@@ -1095,10 +1104,12 @@ Examples:
 \&.Bro 1 , ... ,
 \&.Va n \&Brc
 .Ed
 .Pp
 See also
+.Ic \&Brc
+and
 .Ic \&Brq .
 .It Ic \&Brq Ar line
 Encloses its arguments in curly braces.
 .Pp
 Examples:
@@ -1275,10 +1286,12 @@ April is the cruellest month
 \&.Dc
 \e(em T.S. Eliot
 .Ed
 .Pp
 See also
+.Ic \&Dc
+and
 .Ic \&Dq .
 .It Ic \&Dq Ar line
 Encloses its arguments in
 .Dq typographic
 double-quotes.
@@ -1470,10 +1483,13 @@ An arbitrary enclosure.
 The
 .Ar opening_delimiter
 argument is used as the enclosure head, for example, specifying \e(lq
 will emulate
 .Ic \&Do .
+.Pp
+See also
+.Ic \&Ec .
 .It Ic \&Er Ar identifier ...
 Error constants for definitions of the
 .Va errno
 libc global variable.
 This is most often used in section 2 and 3 manual pages.
@@ -2016,10 +2032,13 @@ Examples:
 .Bd -literal -offset indent -compact
 \&.Oo
 \&.Op Fl flag Ns Ar value
 \&.Oc
 .Ed
+.Pp
+See also
+.Ic \&Oc .
 .It Ic \&Op Ar line
 Optional part of a command line.
 Prints the argument(s) in brackets.
 This is most often used in the
 .Em SYNOPSIS
@@ -2127,10 +2146,13 @@ See also
 and
 .Ic \&Sm .
 .It Ic \&Po Ar block
 Multi-line version of
 .Ic \&Pq .
+.Pp
+See also
+.Ic \&Pc .
 .It Ic \&Pp
 Break a paragraph.
 This will assert vertical space between prior and subsequent macros
 and/or text.
 .Pp
@@ -2164,10 +2186,13 @@ and
 .Ic \&Bd
 .Fl literal .
 .It Ic \&Qo Ar block
 Multi-line version of
 .Ic \&Qq .
+.Pp
+See also
+.Ic \&Qc .
 .It Ic \&Qq Ar line
 Encloses its arguments in
 .Qq typewriter
 double-quotes.
 Consider using
@@ -2221,10 +2246,13 @@ Examples:
 If an
 .Ic \&Rs
 block is used within a SEE ALSO section, a vertical space is asserted
 before the rendered output, else the block continues on the current
 line.
+.Pp
+See also
+.Ic \&Re .
 .It Ic \&Rv Fl std Op Ar function ...
 Insert a standard sentence regarding a function call's return value of 0
 on success and \-1 on error, with the
 .Va errno
 libc global variable set on error.
@@ -2277,10 +2305,13 @@ When called without an argument, the
 macro toggles the spacing mode.
 Using this is not recommended because it makes the code harder to read.
 .It Ic \&So Ar block
 Multi-line version of
 .Ic \&Sq .
+.Pp
+See also
+.Ic \&Sc .
 .It Ic \&Sq Ar line
 Encloses its arguments in
 .Sq typewriter
 single-quotes.
 .Pp
@@ -2675,10 +2706,13 @@ Extend the header of an
 macro or the body of a partial-implicit block macro
 beyond the end of the input line.
 This macro originally existed to work around the 9-argument limit
 of historic
 .Xr roff 7 .
+.Pp
+See also
+.Ic \&Xc .
 .It Ic \&Xr Ar name section
 Link to another manual
 .Pq Qq cross-reference .
 .Pp
 Cross reference the



sysctl.3: Fix variable spelling

2017-11-07 Thread Scott Bennett

'bet.' -> 'net.'

diff --git lib/libc/gen/sysctl.3 lib/libc/gen/sysctl.3
index 8d17e4796c8..15abe1e2ec3 100644
--- lib/libc/gen/sysctl.3
+++ lib/libc/gen/sysctl.3
@@ -1340,7 +1340,7 @@ The variables are as follows:
 Returns number of packet dropped.
 .It Dv IFQCTL_LEN Pq Va net.inet.ip.ifq.len
 Returns the current queue length.
-.It Dv IFQCTL_MAXLEN Pq Va bet.inet.ip.ifq.maxlen
+.It Dv IFQCTL_MAXLEN Pq Va net.inet.ip.ifq.maxlen
 Get or set the maximum number of queue length.
 .El
 .It Li ip.ipsec-allocs Pq Va net.inet.ip.ipsec-allocs