Re: [time-nuts] FE-5680A Breakout board
Moin! On Sun, 15 Jan 2012 00:56:05 + gonzo . cadbl...@hotmail.com wrote: On the schematic the inputs are listed as supply (ie. +15V_SUPPLY and +5V_SUPPLY), where as the outputs of the regs are marked with their actual voltages. The boards silk screen on the other hand lists the inputs as 7V and 17V. Ah.. ok.. overlooked that. In my original post I said I'd used the LM317 from the Eagle library, but infact use the pin compatible LM1084 (Eagle doesn't know about the LM1084). The LM1084 is a 5A device (vs 1.5A:LM317) with 1.5V LDO (vs 2.5V:LM317), so 17V is an acceptable minimum input. Ok. Heatsinking of the LM/TS/AMS1117 is not generious and it does run hot when SJ1 is shorted and the board is running with a single supply (15V input to the 5VReg). I have added more heatsink ares to the V1.1 board, but the '1117is rated to 800mA and is only loaded to 10% so I don't think it is a problem. Please be aware of the fine print: These chips can handle that much current if and only if you can keep the junction temperature below the rated maximum (usually 130-150°C). This means, you have to be able to disipate the approx 1W while keeping the case temp below 120°C. Natsemi/TI say that their SOT-223 case has a thermal resistance of 10°C/W (junction-case), so this should be easily done if you have enough copper around or have a pad where you can solder a small metal fin on (i guess any metal larger than 1cm^2 should be enough). Fortunately the 1117 has a themal shutdown that will prevent it from frying. And also a little warning here: There are many companies producing the same device, but the specs have little differences, especially when you get the device to its limits. In this case, when you let the *1117 run very hot, you should keep in mind that different versions behave differently. It is worth remembering that the boards I'm offering are simply the left overs from my own use (V1.0 board at least) and was never intended to be fully idiot proof. Fortunatly, this list seems to be an idiot free corner of the internet *g* not 100% idiot free, but the ratio of people who can think is very high :-) Attila Kinali -- Why does it take years to find the answers to the questions one should have asked long ago? ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there.
Re: [time-nuts] Controlling FEI 5680A
I am staying out of that discussion due to lack of knowledge, My question is wether the input circuit is acceptable or if some one has a different solution. We have integrated the Shera input including the interrupt counter on the chip, so there are only three interface pins, interrupt, data out and clock from the PIC to transfer the data. The interrupt count is pin selectable, just like the 5/10 MHz divide. We are presently looking at increasing the counter from 16 to 20 or 24 bits. I think before going forward there has to be agreement on the input circuit first, because it will influence every thing else. There may be other better solutions, the reason I picked this one is it is simple, low cost, very few parts, solderable and it works. Bert Kehren In a message dated 1/14/2012 10:14:26 P.M. Eastern Standard Time, mag...@rubidium.dyndns.org writes: On 01/14/2012 01:32 PM, ewkeh...@aol.com wrote: I have no expertise when it comes to filter design or programming PIC's or other micro controllers. But I know what works for me. For 11 years I have been using Shera controllers with very good results. (I still have some new assembled extra AA boards, if any one is interested, please contact me off list) Designing a PI-regulator in digital is pretty simple and works well. The core routine that needs to be run at the steady sample rate is this: Ph = getPD(); FI = FI + I*Ph; F = FI + P*Ph; outputFreq(F); where I and P gives the steering properties of the PI regulator. There is a few things to consider, such as the scaling and width. An implementational benefit of the above is that the integrator steering is done prior to the integrator, which makes the integrator state FI have static dynamics in relationship to the steering parameter I, which is practical as change of I (which is typically useful to change bandwidth) will not require rescaling of FI to maintain the same frequency. The relationship between P and I sets the damping factor of the loop. The loop bandwidth changes with the square root of I. It's not too hard to use a quick track-in mode with higher bandwidth and then scale it to slower mode. To achieve a quicker track-in of far-distance, diffrentiating the phase over time can be done, and then feed the integrator loop the scaled difference. That way will the frequency difference measured (complete with phase-wraps) steer the frequency state of the integrator and once the FLL is well tracked in the phase tracking just takes over. The FLL part can then be removed to reduce disturbances. Cheers, Magnus ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there. ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there.
Re: [time-nuts] Controlling FEI 5680A
On 01/15/2012 05:48 AM, Chris Albertson wrote: On Sat, Jan 14, 2012 at 4:32 AM,ewkeh...@aol.com wrote: I have no expertise when it comes to filter design or programming PIC's or other micro controllers. But I know what works for me. For 11 years I have been using Shera controllers with very good results. (I still have some new assembled extra AA boards, if any one is interested, please contact me off list) Over the years I have made hardware work around's and made my own boards ending up with 120 and 240 samples and 100 MHz clock in stead of 24 MHz. Over time chips are harder to get. The solution is an Altera MAX 3000 gate array and that input circuit can be implemented on a $ 2 100 MHz version or $ 5 200 MHz version using either a 100 MHz or 200 MHz clock. That circuit works with the present Shera PIC but that is a 28 pin $ 4 device. Since in this application the controller does not have to be all things for all devices it would make sense to use a PIC16F688 or any other 14 pin device. Have you thought about putting the PIC _INSIDE_ the Altera FPGA? It's a common trick to implement a microcontroller in the FPGA and you can get the code for just about any CPU core online. Here is an example of virtual PIC: http://www.embeddedtronics.com/pic_core.html If the PIC fits inside then that is one less chip on the PCB. The example above found that could run the virtual PIC a little faster than a real pic so you don't give up any performance A short notice on embedded CPU/MPUs into FPGAs. Using PIC or AVR might be tempting, but I consider any clone dirty from a rights perspective, MIPS for instance have been very protective on their side, so has ARM. So far has the SPARC been the only big one being accepted in their LEON-x variants that I know of. We be sad to see the cotton industry level being smashed by the big firm lawyers. So, either using the OpenRISC variants or similar. There is loads of CPUs on the OpenCores website, but just because they are there do not think they are free to use if they are clones of commercial stuff. I would either use one of the FPGA vendors CPUs and then write the core in C, or use a free CPU. I could also roll my own CPU, as I have already done before, but building a tool-chain including GCC is a bit of home-work. For my application I haven't bothered, but it is tempting to get C capabilities. Then again, if someone could show that the PIC and/or AVR is free to clone in FGPA, by showing a clear statement from the respective technology holders, then that would be a way forward. I've done this analysis before, and so far I have not seen any comprehensive open analysis covering these aspects. I fear that this is way off topic for this list, so I propose that this aspects is continued on another list, such as the FPGA-Synth list, which faces essentially the same problems. Cheers, Magnus ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there.
Re: [time-nuts] Controlling FEI 5680A
Magnus I agree, I can not se how any one can simplify this approach. A $2 gate array in a 0.5 $ socket that is solderable, a $ 2 14 pin DIP uP what ever brand, a clock generator, a RS232 interface, a 3.3 V regulator and two single gate 14's what more do you want. If communication is limited to the 5680 a 74AC14 could be used eliminating the RS232 chip and any SMD. The counter on the G/A has been increased to 21 bits. With all this working, some group may want to tackle it on a FPGA. Bert Kehren In a message dated 1/15/2012 10:46:42 A.M. Eastern Standard Time, mag...@rubidium.dyndns.org writes: On 01/15/2012 05:48 AM, Chris Albertson wrote: On Sat, Jan 14, 2012 at 4:32 AM,ewkeh...@aol.com wrote: I have no expertise when it comes to filter design or programming PIC's or other micro controllers. But I know what works for me. For 11 years I have been using Shera controllers with very good results. (I still have some new assembled extra AA boards, if any one is interested, please contact me off list) Over the years I have made hardware work around's and made my own boards ending up with 120 and 240 samples and 100 MHz clock in stead of 24 MHz. Over time chips are harder to get. The solution is an Altera MAX 3000 gate array and that input circuit can be implemented on a $ 2 100 MHz version or $ 5 200 MHz version using either a 100 MHz or 200 MHz clock. That circuit works with the present Shera PIC but that is a 28 pin $ 4 device. Since in this application the controller does not have to be all things for all devices it would make sense to use a PIC16F688 or any other 14 pin device. Have you thought about putting the PIC _INSIDE_ the Altera FPGA? It's a common trick to implement a microcontroller in the FPGA and you can get the code for just about any CPU core online. Here is an example of virtual PIC: http://www.embeddedtronics.com/pic_core.html If the PIC fits inside then that is one less chip on the PCB. The example above found that could run the virtual PIC a little faster than a real pic so you don't give up any performance A short notice on embedded CPU/MPUs into FPGAs. Using PIC or AVR might be tempting, but I consider any clone dirty from a rights perspective, MIPS for instance have been very protective on their side, so has ARM. So far has the SPARC been the only big one being accepted in their LEON-x variants that I know of. We be sad to see the cotton industry level being smashed by the big firm lawyers. So, either using the OpenRISC variants or similar. There is loads of CPUs on the OpenCores website, but just because they are there do not think they are free to use if they are clones of commercial stuff. I would either use one of the FPGA vendors CPUs and then write the core in C, or use a free CPU. I could also roll my own CPU, as I have already done before, but building a tool-chain including GCC is a bit of home-work. For my application I haven't bothered, but it is tempting to get C capabilities. Then again, if someone could show that the PIC and/or AVR is free to clone in FGPA, by showing a clear statement from the respective technology holders, then that would be a way forward. I've done this analysis before, and so far I have not seen any comprehensive open analysis covering these aspects. I fear that this is way off topic for this list, so I propose that this aspects is continued on another list, such as the FPGA-Synth list, which faces essentially the same problems. Cheers, Magnus ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there. ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there.
Re: [time-nuts] Controlling FEI 5680A
I have been watching for a bit now. Its more interesting now that my FE5680s working quite well. I have noticed on numbers of threads the conversation dramatically shifts from reasonably implemented low cost solutions to the ultimate FPGA. FPGAs are generally intended for the mass market with a steep learning curve. Though they can be pressed into whats of interest to time-nuts it simply seems like a overly complicated technology and method for a non-mass market solution. The tools that are available in any of the $2 micros these days are very good and you have a wide choice of tools and languages to develop in. I have several FPGA dev kits and have to say have never turned anything much out with them. On the flip side I have several of the dev kits for PIC and I get pretty much everything I want to done in those. Just simple, stupid, dumb stuff at a cost of a few dollars. Though it may have been lost in the thread. I think it started as a how do you control the 5680 with a GPS engine to lock it. It had hovered around filters and evolved to long counters and D/A converters. Still all reasonable approaches. If I build anything it would be along those lines. FPGA simply won't happen. Regards Paul WB8TSL On Sun, Jan 15, 2012 at 11:07 AM, ewkeh...@aol.com wrote: Magnus I agree, I can not se how any one can simplify this approach. A $2 gate array in a 0.5 $ socket that is solderable, a $ 2 14 pin DIP uP what ever brand, a clock generator, a RS232 interface, a 3.3 V regulator and two single gate 14's what more do you want. If communication is limited to the 5680 a 74AC14 could be used eliminating the RS232 chip and any SMD. The counter on the G/A has been increased to 21 bits. With all this working, some group may want to tackle it on a FPGA. Bert Kehren In a message dated 1/15/2012 10:46:42 A.M. Eastern Standard Time, mag...@rubidium.dyndns.org writes: On 01/15/2012 05:48 AM, Chris Albertson wrote: On Sat, Jan 14, 2012 at 4:32 AM,ewkeh...@aol.com wrote: I have no expertise when it comes to filter design or programming PIC's or other micro controllers. But I know what works for me. For 11 years I have been using Shera controllers with very good results. (I still have some new assembled extra AA boards, if any one is interested, please contact me off list) Over the years I have made hardware work around's and made my own boards ending up with 120 and 240 samples and 100 MHz clock in stead of 24 MHz. Over time chips are harder to get. The solution is an Altera MAX 3000 gate array and that input circuit can be implemented on a $ 2 100 MHz version or $ 5 200 MHz version using either a 100 MHz or 200 MHz clock. That circuit works with the present Shera PIC but that is a 28 pin $ 4 device. Since in this application the controller does not have to be all things for all devices it would make sense to use a PIC16F688 or any other 14 pin device. Have you thought about putting the PIC _INSIDE_ the Altera FPGA? It's a common trick to implement a microcontroller in the FPGA and you can get the code for just about any CPU core online. Here is an example of virtual PIC: http://www.embeddedtronics.com/pic_core.html If the PIC fits inside then that is one less chip on the PCB. The example above found that could run the virtual PIC a little faster than a real pic so you don't give up any performance A short notice on embedded CPU/MPUs into FPGAs. Using PIC or AVR might be tempting, but I consider any clone dirty from a rights perspective, MIPS for instance have been very protective on their side, so has ARM. So far has the SPARC been the only big one being accepted in their LEON-x variants that I know of. We be sad to see the cotton industry level being smashed by the big firm lawyers. So, either using the OpenRISC variants or similar. There is loads of CPUs on the OpenCores website, but just because they are there do not think they are free to use if they are clones of commercial stuff. I would either use one of the FPGA vendors CPUs and then write the core in C, or use a free CPU. I could also roll my own CPU, as I have already done before, but building a tool-chain including GCC is a bit of home-work. For my application I haven't bothered, but it is tempting to get C capabilities. Then again, if someone could show that the PIC and/or AVR is free to clone in FGPA, by showing a clear statement from the respective technology holders, then that would be a way forward. I've done this analysis before, and so far I have not seen any comprehensive open analysis covering these aspects. I fear that this is way off topic for this list, so I propose that this aspects is continued on another list, such as the FPGA-Synth list, which faces essentially the same problems. Cheers, Magnus ___ time-nuts mailing list --
Re: [time-nuts] Controlling FEI 5680A
Thank you Paul. By the way the GA programmer cost $ 10 and the software is free and relatively easy to use. Has most TTL functions in its library! Bert Kehren In a message dated 1/15/2012 11:27:50 A.M. Eastern Standard Time, paulsw...@gmail.com writes: I have been watching for a bit now. Its more interesting now that my FE5680s working quite well. I have noticed on numbers of threads the conversation dramatically shifts from reasonably implemented low cost solutions to the ultimate FPGA. FPGAs are generally intended for the mass market with a steep learning curve. Though they can be pressed into whats of interest to time-nuts it simply seems like a overly complicated technology and method for a non-mass market solution. The tools that are available in any of the $2 micros these days are very good and you have a wide choice of tools and languages to develop in. I have several FPGA dev kits and have to say have never turned anything much out with them. On the flip side I have several of the dev kits for PIC and I get pretty much everything I want to done in those. Just simple, stupid, dumb stuff at a cost of a few dollars. Though it may have been lost in the thread. I think it started as a how do you control the 5680 with a GPS engine to lock it. It had hovered around filters and evolved to long counters and D/A converters. Still all reasonable approaches. If I build anything it would be along those lines. FPGA simply won't happen. Regards Paul WB8TSL On Sun, Jan 15, 2012 at 11:07 AM, ewkeh...@aol.com wrote: Magnus I agree, I can not se how any one can simplify this approach. A $2 gate array in a 0.5 $ socket that is solderable, a $ 2 14 pin DIP uP what ever brand, a clock generator, a RS232 interface, a 3.3 V regulator and two single gate 14's what more do you want. If communication is limited to the 5680 a 74AC14 could be used eliminating the RS232 chip and any SMD. The counter on the G/A has been increased to 21 bits. With all this working, some group may want to tackle it on a FPGA. Bert Kehren In a message dated 1/15/2012 10:46:42 A.M. Eastern Standard Time, mag...@rubidium.dyndns.org writes: On 01/15/2012 05:48 AM, Chris Albertson wrote: On Sat, Jan 14, 2012 at 4:32 AM,ewkeh...@aol.com wrote: I have no expertise when it comes to filter design or programming PIC's or other micro controllers. But I know what works for me. For 11 years I have been using Shera controllers with very good results. (I still have some new assembled extra AA boards, if any one is interested, please contact me off list) Over the years I have made hardware work around's and made my own boards ending up with 120 and 240 samples and 100 MHz clock in stead of 24 MHz. Over time chips are harder to get. The solution is an Altera MAX 3000 gate array and that input circuit can be implemented on a $ 2 100 MHz version or $ 5 200 MHz version using either a 100 MHz or 200 MHz clock. That circuit works with the present Shera PIC but that is a 28 pin $ 4 device. Since in this application the controller does not have to be all things for all devices it would make sense to use a PIC16F688 or any other 14 pin device. Have you thought about putting the PIC _INSIDE_ the Altera FPGA? It's a common trick to implement a microcontroller in the FPGA and you can get the code for just about any CPU core online. Here is an example of virtual PIC: http://www.embeddedtronics.com/pic_core.html If the PIC fits inside then that is one less chip on the PCB.The example above found that could run the virtual PIC a little faster than a real pic so you don't give up any performance A short notice on embedded CPU/MPUs into FPGAs. Using PIC or AVR might be tempting, but I consider any clone dirty from a rights perspective, MIPS for instance have been very protective on their side, so has ARM. So far has the SPARC been the only big one being accepted in their LEON-x variants that I know of. We be sad to see the cotton industry level being smashed by the big firm lawyers. So, either using the OpenRISC variants or similar. There is loads of CPUs on the OpenCores website, but just because they are there do not think they are free to use if they are clones of commercial stuff. I would either use one of the FPGA vendors CPUs and then write the core in C, or use a free CPU. I could also roll my own CPU, as I have already done before, but building a tool-chain including GCC is a bit of home-work. For my application I haven't bothered, but it is tempting to get C capabilities. Then again, if someone could show that the PIC and/or AVR is free to clone in FGPA, by showing a clear statement from the respective technology holders, then that would be a way forward. I've done this analysis before, and so far I have not seen
[time-nuts] Adding adjustment pot to 5680
paul swed: Hardest part is attaching the 100K resistor to the ic. Boy thats small. I didn't solder the resistor directly to pin 5 of the IC. I found that pin 5 was connected to a nearby SMD capacitor that was a little easier to solder to. Attached is a photo of the correct location if you want to try bringing the EFC out for analog control. http://farm8.staticflickr.com/7170/6702435071_f684967719_b.jpg Where others had commented that the internal 7805 I added was running without a heatsink and would be close to max ratings, I started to worry and decided to mounted it on the heatsink that runs down the middle of the 5680A using an existing mounting hole that is used to mount a TO-220 device on the other side. The screw used to mount that device is too long so I replaced that screw with one that doesn't go quite 1/2 way through the heatsink and used an identical screw to mount the 7805 on the connector side of the heat sink. I had to elongate the mounting hole in the 7805 so it Wouldn’t interfere with the cover or the dimple in the cover where the screw that holds the cover on screws into the heatsink. The photo linked below shows the better way to mount the 7805 so you can use a single 15V supply for the 5680A. http://farm8.staticflickr.com/7157/6702428471_5a7b96068d_b.jpg -Arthur ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there.
Re: [time-nuts] Controlling FEI 5680A
I recommend bluetooth Bert Kehren In a message dated 1/15/2012 1:32:37 P.M. Eastern Standard Time, hmur...@megapathdsl.net writes: albertson.ch...@gmail.com said: So I want to be able to connect a desktop computer and a USB cable is to short. You can get USB cable extenders. They are 15 feet long with a hub built into the connector blob at the far end. There is a limit of 4 or 5. They obviously reduce the power available to the end device. I'm using a couple of them with no problems. They aren't the solution to the world's connectivity problems, but they are a handy tool if you are working with USB. -- These are my opinions, not necessarily my employer's. I hate spam. ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there. ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there.
Re: [time-nuts] Controlling FEI 5680A
On Sun, 15 Jan 2012 16:45:56 +0100, Magnus Danielson wrote: I could also roll my own CPU, as I have already done before, but building a tool-chain including GCC is a bit of home-work. For my application I haven't bothered, but it is tempting to get C capabilities. How about the new Zylin CPU. http://opensource.zylin.com/zpu.htm ... That said But i can't do a FPGA board@home (multilayer). That's why i think the idea of using the STM32F4-Discovery board , or even an Arduino (both around $20). With a Baseboard that can be etched@home or ordered somewhere. Would be a lot more interesting , for a normal hobbyist. A lot of the nice offers from BatchPcb etc. is not optimal , for European nuts (im in Denmark). Partly due to 25% VAT , but mostly the handling fee that the Post/Mail is allowed to charge for handling the VAT (in DK it's $25) + the 25% VAT. So a solution where the parts could also be bought in EU , would be nice. Rgds CFO - Timenut beginner in DK. ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there.
Re: [time-nuts] Adding adjustment pot to 5680
Arthur, Nice pixs well lit with good detail. If only I had spent some time digging around that would have been much easier to solder to. May change it the next time I am in the unit. I do agree that the reg was running pretty hard but you attached it to at least a 115 degree heat sink. (At least in open air with real attached heat sinks) I am unsure as to what I will do. Clearly I have the 7805 on an external heatsink. Nice and cool. I ran the wires through the pot hole to a cheap bournes 10K 10 turn pot. Since my plan is not for portable operation but a rack mounted device I will use a very stable external regulator and at 3.3 or 5 V then a very good 10 turn .1% linear 10K with numeric readout counter. Flea market special. Sort of scratch my head. I like the larger external heatsinks I was using and the fact that they kept that center rail at 115 degrees should extend the life of the electronics even though the RB ref tube is the real life limit. I think the only comment I have read is that someone added a heatsink for thermal mass stability. Lots of pondering on my part. Last check Ref at 8.26 E-12. I am noticing 500 ps semi regular phase jumps. Fact is it could be my other even older lucent RB. Time to get serious with the HP 5065 and the z3801. Who is fibbing to me?? Regards Paul On Sun, Jan 15, 2012 at 1:31 PM, Arthur Dent golgarfrinc...@yahoo.comwrote: paul swed: Hardest part is attaching the 100K resistor to the ic. Boy thats small. I didn't solder the resistor directly to pin 5 of the IC. I found that pin 5 was connected to a nearby SMD capacitor that was a little easier to solder to. Attached is a photo of the correct location if you want to try bringing the EFC out for analog control. http://farm8.staticflickr.com/7170/6702435071_f684967719_b.jpg Where others had commented that the internal 7805 I added was running without a heatsink and would be close to max ratings, I started to worry and decided to mounted it on the heatsink that runs down the middle of the 5680A using an existing mounting hole that is used to mount a TO-220 device on the other side. The screw used to mount that device is too long so I replaced that screw with one that doesn't go quite 1/2 way through the heatsink and used an identical screw to mount the 7805 on the connector side of the heat sink. I had to elongate the mounting hole in the 7805 so it Wouldn’t interfere with the cover or the dimple in the cover where the screw that holds the cover on screws into the heatsink. The photo linked below shows the better way to mount the 7805 so you can use a single 15V supply for the 5680A. http://farm8.staticflickr.com/7157/6702428471_5a7b96068d_b.jpg -Arthur ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there. ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there.
Re: [time-nuts] Controlling FEI 5680A
I would just use a PIC, AVR, or ARM even if I had to use more than one with some discrete logic on the side but I like solder, assembly, and low level coding in that order. If I find a small, cheap, easy to use, and general purpose FPGA, I may look into that as well. MIPS may be a special case for implementation. The original Loongson design (Chinese) lacked 4 instructions that MIPS still had IP protection on. On Sun, 15 Jan 2012 16:45:56 +0100, Magnus Danielson mag...@rubidium.dyndns.org wrote: A short notice on embedded CPU/MPUs into FPGAs. Using PIC or AVR might be tempting, but I consider any clone dirty from a rights perspective, MIPS for instance have been very protective on their side, so has ARM. So far has the SPARC been the only big one being accepted in their LEON-x variants that I know of. We be sad to see the cotton industry level being smashed by the big firm lawyers. So, either using the OpenRISC variants or similar. There is loads of CPUs on the OpenCores website, but just because they are there do not think they are free to use if they are clones of commercial stuff. I would either use one of the FPGA vendors CPUs and then write the core in C, or use a free CPU. I could also roll my own CPU, as I have already done before, but building a tool-chain including GCC is a bit of home-work. For my application I haven't bothered, but it is tempting to get C capabilities. Then again, if someone could show that the PIC and/or AVR is free to clone in FGPA, by showing a clear statement from the respective technology holders, then that would be a way forward. I've done this analysis before, and so far I have not seen any comprehensive open analysis covering these aspects. I fear that this is way off topic for this list, so I propose that this aspects is continued on another list, such as the FPGA-Synth list, which faces essentially the same problems. ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there.
Re: [time-nuts] Controlling FEI 5680A
One 14 pin uP along with a MAX3000A will do it hands down. Bert In a message dated 1/15/2012 2:43:54 P.M. Eastern Standard Time, davidwh...@gmail.com writes: I would just use a PIC, AVR, or ARM even if I had to use more than one with some discrete logic on the side but I like solder, assembly, and low level coding in that order. If I find a small, cheap, easy to use, and general purpose FPGA, I may look into that as well. MIPS may be a special case for implementation. The original Loongson design (Chinese) lacked 4 instructions that MIPS still had IP protection on. On Sun, 15 Jan 2012 16:45:56 +0100, Magnus Danielson mag...@rubidium.dyndns.org wrote: A short notice on embedded CPU/MPUs into FPGAs. Using PIC or AVR might be tempting, but I consider any clone dirty from a rights perspective, MIPS for instance have been very protective on their side, so has ARM. So far has the SPARC been the only big one being accepted in their LEON-x variants that I know of. We be sad to see the cotton industry level being smashed by the big firm lawyers. So, either using the OpenRISC variants or similar. There is loads of CPUs on the OpenCores website, but just because they are there do not think they are free to use if they are clones of commercial stuff. I would either use one of the FPGA vendors CPUs and then write the core in C, or use a free CPU. I could also roll my own CPU, as I have already done before, but building a tool-chain including GCC is a bit of home-work. For my application I haven't bothered, but it is tempting to get C capabilities. Then again, if someone could show that the PIC and/or AVR is free to clone in FGPA, by showing a clear statement from the respective technology holders, then that would be a way forward. I've done this analysis before, and so far I have not seen any comprehensive open analysis covering these aspects. I fear that this is way off topic for this list, so I propose that this aspects is continued on another list, such as the FPGA-Synth list, which faces essentially the same problems. ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there. ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there.
Re: [time-nuts] Controlling FEI 5680A
The MAX3000A and the PIC can be bought any place in the EU. Bert Kehren In a message dated 1/15/2012 2:09:24 P.M. Eastern Standard Time, xne...@luna.kyed.com writes: On Sun, 15 Jan 2012 16:45:56 +0100, Magnus Danielson wrote: I could also roll my own CPU, as I have already done before, but building a tool-chain including GCC is a bit of home-work. For my application I haven't bothered, but it is tempting to get C capabilities. How about the new Zylin CPU. http://opensource.zylin.com/zpu.htm ... That said But i can't do a FPGA board@home (multilayer). That's why i think the idea of using the STM32F4-Discovery board , or even an Arduino (both around $20). With a Baseboard that can be etched@home or ordered somewhere. Would be a lot more interesting , for a normal hobbyist. A lot of the nice offers from BatchPcb etc. is not optimal , for European nuts (im in Denmark). Partly due to 25% VAT , but mostly the handling fee that the Post/Mail is allowed to charge for handling the VAT (in DK it's $25) + the 25% VAT. So a solution where the parts could also be bought in EU , would be nice. Rgds CFO - Timenut beginner in DK. ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there. ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there.
Re: [time-nuts] Controlling FEI 5680A
We are talking about a controller for the new batch of $38 FE5680 units right? Unless you modify these the frequency must be controlled by RS232. Then you said FPGA right?If so why worry about the bits in the counter. You can change it later with a few minutes effort. If you have 250,000 gates that can run at 200MHz you don't have to ration them. Go for 24 bits and run the counter at 200MHz. The hard part is the FE5680, I don't think anyone here really understands it yet. How many DDS steps can you move it before it goes out of lock.Aging and temp co. are still TBD That is another change from a Sherra type controller, the FE5680 has a lock bit. You may as well use it to disable sending frequency change commands One other front end change. I few people have Thunderbolts and it would be faster to lock the FE5680 to the 10MHz signal then to the PPS. On Sun, Jan 15, 2012 at 2:11 AM, ewkeh...@aol.com wrote: I am staying out of that discussion due to lack of knowledge, My question is wether the input circuit is acceptable or if some one has a different solution. We have integrated the Shera input including the interrupt counter on the chip, so there are only three interface pins, interrupt, data out and clock from the PIC to transfer the data. The interrupt count is pin selectable, just like the 5/10 MHz divide. We are presently looking at increasing the counter from 16 to 20 or 24 bits. Chris Albertson Redondo Beach, California ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there.
Re: [time-nuts] Controlling FEI 5680A
On Sun, Jan 15, 2012 at 10:32 AM, Hal Murray hmur...@megapathdsl.net wrote: You can get USB cable extenders. They are 15 feet long with a hub built into the connector blob at the far end. There is a limit of 4 or 5. They obviously reduce the power available to the end device. -- May have solved this problem for good. I just found USB extenders that use Cat-5 or cat-6 cable. They say you can put in up to 150 feet of cable. There are transmit/receivers at each end and they use all four pairs and also transmit power over theca-5. mono price.com has then for $11. Better ones go for $100. But still I want Eithernet. People are talking about FPGAs so it is very easy to synthesize an ethernet controller. I've been looking at this, yes more than $3 but there is no PCB to design, build and assemble. http://store.gadgetfactory.net/index.php?main_page=product_infocPath=1products_id=18 Chris Albertson Redondo Beach, California ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there.
Re: [time-nuts] Controlling FEI 5680A
On Sun, Jan 15, 2012 at 7:45 AM, Magnus Danielson mag...@rubidium.dyndns.org wrote: A short notice on embedded CPU/MPUs into FPGAs. Using PIC or AVR might be tempting, but I consider any clone dirty from a rights perspective, MIPS for instance have been very protective on their side, so has ARM. So far has the SPARC been the only big one Look at open cores. There are dozens to choose from. Many are GLP or LGPL. http://opencores.org/projects I doubt anyone wants a MIPS or Pentium in a controller. You'd be using an 8-bit uP. Chris Albertson Redondo Beach, California ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there.
Re: [time-nuts] Controlling FEI 5680A
Why do it easy when you can do it difficult. With my Lab setup the frequency out of the Tbolt changes once in a while to correct the 1 PPS. That is how I explain what I se on my Tracor 527E. Maybe I am wrong. Bert In a message dated 1/15/2012 5:12:18 P.M. Eastern Standard Time, albertson.ch...@gmail.com writes: We are talking about a controller for the new batch of $38 FE5680 units right? Unless you modify these the frequency must be controlled by RS232. Then you said FPGA right?If so why worry about the bits in the counter. You can change it later with a few minutes effort. If you have 250,000 gates that can run at 200MHz you don't have to ration them. Go for 24 bits and run the counter at 200MHz. The hard part is the FE5680, I don't think anyone here really understands it yet. How many DDS steps can you move it before it goes out of lock.Aging and temp co. are still TBD That is another change from a Sherra type controller, the FE5680 has a lock bit. You may as well use it to disable sending frequency change commands One other front end change. I few people have Thunderbolts and it would be faster to lock the FE5680 to the 10MHz signal then to the PPS. On Sun, Jan 15, 2012 at 2:11 AM, ewkeh...@aol.com wrote: I am staying out of that discussion due to lack of knowledge, My question is wether the input circuit is acceptable or if some one has a different solution. We have integrated the Shera input including the interrupt counter on the chip, so there are only three interface pins, interrupt, data out and clock from the PIC to transfer the data. The interrupt count is pin selectable, just like the 5/10 MHz divide. We are presently looking at increasing the counter from 16 to 20 or 24 bits. Chris Albertson Redondo Beach, California ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there. ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there.
Re: [time-nuts] Controlling FEI 5680A
Hi Chris, One other front end change. I few people have Thunderbolts and it would be faster to lock the FE5680 to the 10MHz signal then to the PPS. Or remove the OCXO from the Thunderbolt and feed the GPS receiver with the FE5680 10MHz. Either modify the FE5680 for EFC och program a uC to get time/freq error from the receiver (bytes 6 to 9 in message 0x8F-A7). Then close the loop by adjusting 5680 frequency through RS232 from the same uC. Depending on use, you can retain the good Tbolt ocxo and lock it with a PLL to the 5680 10MHz. -- Björn ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there.
Re: [time-nuts] Controlling FEI 5680A
On 01/15/2012 11:34 PM, Chris Albertson wrote: On Sun, Jan 15, 2012 at 7:45 AM, Magnus Danielson mag...@rubidium.dyndns.org wrote: A short notice on embedded CPU/MPUs into FPGAs. Using PIC or AVR might be tempting, but I consider any clone dirty from a rights perspective, MIPS for instance have been very protective on their side, so has ARM. So far has the SPARC been the only big one Look at open cores. There are dozens to choose from. Many are GLP or LGPL. http://opencores.org/projects I doubt anyone wants a MIPS or Pentium in a controller. You'd be using an 8-bit uP. You missed my point. My point was that even if you have that nice and dandy list of CPUs with good locking licenses on the clone code, it doesn't mean that one is free to use it in commercial context. Sorry for not being so clear about that. I was somewhat distracted when I wrote it. Cheers, Magnus ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there.
Re: [time-nuts] Controlling FEI 5680A
On 01/16/2012 12:04 AM, b...@lysator.liu.se wrote: Hi Chris, One other front end change. I few people have Thunderbolts and it would be faster to lock the FE5680 to the 10MHz signal then to the PPS. Or remove the OCXO from the Thunderbolt and feed the GPS receiver with the FE5680 10MHz. Either modify the FE5680 for EFC och program a uC to get time/freq error from the receiver (bytes 6 to 9 in message 0x8F-A7). Then close the loop by adjusting 5680 frequency through RS232 from the same uC. Depending on use, you can retain the good Tbolt ocxo and lock it with a PLL to the 5680 10MHz. Ages ago we talked about locking up Superstar II receivers to an external 10 MHz source, such as a 10811. The Superstar II receivers builds on the Zarlink chipset, which uses 10 MHz as reference for their RF frontend chip, which then times the digital correlator chip. The Superstar II receiver has support for external clock input, and it is a fairly simple modification to have them accept it from the connector which you solder onto the layout part of the PCB. However, the Superstar II does not include the lock-up steering of the Thunderbolt, but larger cousins has this feature. The idea was to sniff the time error reports and let a small MCU do the PI-lockup of the OCXO of choice. I believe that attempts to use the frequency inputs on the Superstar II was done for a project, but as I recall it nobody had the time to follow it through, but I recall giving telephone-guiding around the PCB to show where to pick things up. Essentially much the same can be done with the Thunderbolt, which is an amazingly open platform as PLL parameters is easy to modify to fit the needs. Looking at the larger receivers, the Ashtech Z12 includes frequency locking for instance. This is used in reference applications where typically a rubidium is used and then a logger to pull RINEX data out of them and report home. However, I must say that use of a proper OCXO or rubidium, as reference to a GPS receiver will do much to lower the receivers close-in noise if done right, and this is a step away from the PPS crazyness for a better overall solution. This is where the Thunderbolts performance over TCXO-GPS with PPS output comes, and locking the OCXO using a PI regulator brings icing on that cake. Essentially all of the more modern receivers does not lock up to 10 MHz but has other odd frequencies. Letting a DDS generate the odd frequency might be useful approach. However, using DDS getting correct 10 MHz might be difficult, so either a slow phase-correction ramp or use of a PLL with the right gears might solve it if true 10 MHz is needed. Cheers, Magnus ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there.
Re: [time-nuts] New unit of time measurement
On Jan 14, 2012, at 23:12 , Poul-Henning Kamp wrote: You are not the first researcher of this interesting phenomena: http://www.washingtonpost.com/opinions/cellphone-ban-would-be-a-distraction/2011/12/16/gIQAdv2GyO_story.html Article states: Upon arriving at a red light, drivers apply the brakes, pick up their mobile devices, and begin reading and sending e-mails. The signal to resume driving comes not from the green light but from some motorist in the back tapping politely on the horn. This is why I begin honking immediately after stopping. It removes the latency, which can otherwise be annoying at a light with a short green cycle. :-) -- Mark J. Blair, NF6X n...@nf6x.net http://www.nf6x.net/ ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there.
Re: [time-nuts] New unit of time measurement
Actually a friend who lived in Rome proposed a new European definition of the nanosecond as the time between the lights going green and the sound of the horn of the car behind you. I still remember driving in the rushhour in Rome, now _that_ was scary. On 15 January 2012 14:40, Skip Withrow skip.with...@gmail.com wrote: Dear nuts, I would like to propose a new unit of time, the 'textsecond'. This is the interval of time from the time the signal light turns green to when the driver behind the idiot texting driver honks their horn. Still collecting data on its exact length, but seeing a lot more examples lately. I'm sure there is probably a much more clever name (and there are a lot of clever time-nuts out there). However, I don't want this comment on social behaviour to blossom into a lengthy OT thread. Regards, Skip Withrow ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there. -- Tom Harris celephi...@gmail.com ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there.
Re: [time-nuts] New unit of time measurement
On 01/16/2012 02:13 AM, Tom Harris wrote: Actually a friend who lived in Rome proposed a new European definition of the nanosecond as the time between the lights going green and the sound of the horn of the car behind you. I still remember driving in the rushhour in Rome, now _that_ was scary. And here I thought the femtofourthnight was a satisfactory solution. When in Turin I took the cab... and well, it was a fascinating experience. However, just the rising slope of the sound-wave will be slow enough to make ns precision measurements um... interesting. Cheers, Magnus ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there.
Re: [time-nuts] Adding adjustment pot to 5680
I have read about the EFC mod for the 5680A by Bill Riches and adapted for external by Arthur Dent. Nice work. Maybe I missed a detail in all the recent messages -- Question: Has anyone measured or calculated the tuning sensitivity of the pin-5 EFC voltage? (Hz/V number) ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there.
[time-nuts] ATT WP 92066-L5 (RB)
All this talk of the $38 RB from China got me to dig out a RB source I pick up a while ago. It's a WP 92066-L5 made by Ball Efratem for ATT. It also has a model sticker on the rear, ATT CC 406801969. It has a single 25 Pin + coax Mini D type connector on the rear panel. Anyone know the pin out ? Specs? When I first got it I searched the web and couldn't find aything, other than someone else asking the same question. 73 Steve F W1GSL *** Steve FinbergW1GSL w1...@mit.edu PO Box 397082 MIT BrCambridge MA 02139-7082 617 258 3754 *** ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there.
Re: [time-nuts] New unit of time measurement
In Germany hand-used phones during drive are banned for several years now. I think it makes sense. Well, humanoids should think on it DIY but the reality is another. In China I've seen down-counting LED displays for the red sign. But this is just to simple for Europe. Badly. - Henry Mark J. Blair schrieb: Article states: Upon arriving at a red light, drivers apply the brakes, pick up their mobile devices, and begin reading and sending e-mails. The signal to resume driving comes not from the green light but from some motorist in the back tapping politely on the horn. This is why I begin honking immediately after stopping. It removes the latency, which can otherwise be annoying at a light with a short green cycle. :-) -- ehydra.dyndns.info ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there.
Re: [time-nuts] ATT WP 92066-L5 (RB)
Is this a white box with a heatsink and a pair of BNCs on the front panel? If so, and it's the same as the one I had, it has an Efratom FRS in it - I don't know what the external pinout is, but you should be able to figure it out from the wiring on the oscillator (although I just removed mine..) Regards, Pete Bell On Mon, Jan 16, 2012 at 9:37 AM, Steven L. Finberg w1...@mit.edu wrote: All this talk of the $38 RB from China got me to dig out a RB source I pick up a while ago. It's a WP 92066-L5 made by Ball Efratem for ATT. It also has a model sticker on the rear, ATT CC 406801969. It has a single 25 Pin + coax Mini D type connector on the rear panel. Anyone know the pin out ? Specs? When I first got it I searched the web and couldn't find aything, other than someone else asking the same question. 73 Steve F W1GSL *** Steve Finberg W1GSL w1...@mit.edu PO Box 397082 MIT Br Cambridge MA 02139-7082 617 258 3754 *** ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there. ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there.
Re: [time-nuts] ATT WP 92066-L5 (RB)
Is it possible these wireless providers are using something like NTP on steroids with a Rb clock rather than GPSDO? ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there.
Re: [time-nuts] ATT WP 92066-L5 (RB)
Steve, Those were used in the old analog cellular base stations. The DB25 with the combo RF connector were a real odd ball, hard to find and expensive. Those units ran off 24 VDC. Sorry, I don't have the pin out but it should be fairly easy to trace out. They have a FRS Rb in them. These were used prior to CDMA so they had no need to have GPS or any other external correction source. I hope the FRS has good life left in for you. 73's, Doug K4CLE Connected by DROID on Verizon Wireless -Original message- From: Steven L. Finberg w1...@mit.edu To: time-nuts@febo.com Sent: Mon, Jan 16, 2012 02:38:03 GMT+00:00 Subject: [time-nuts] ATT WP 92066-L5 (RB) All this talk of the $38 RB from China got me to dig out a RB source I pick up a while ago. It's a WP 92066-L5 made by Ball Efratem for ATT. It also has a model sticker on the rear, ATT CC 406801969. It has a single 25 Pin + coax Mini D type connector on the rear panel. Anyone know the pin out ? Specs? When I first got it I searched the web and couldn't find aything, other than someone else asking the same question. 73 Steve F W1GSL * ** Steve FinbergW1GSL w1...@mit.edu PO Box 397082 MIT BrCambridge MA 02139-7082 617 258 3754 * ** ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there. ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there.
Re: [time-nuts] ATT WP 92066-L5 (RB)
So then any modern wireless provider setup would have a GPSDO with probably Rb clock? I assume the crystal based systems are not in favor, which is why they showed up on the surplus market. ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there.
Re: [time-nuts] Adding adjustment pot to 5680
I have not but it is sensitive and suspect I actually may have the answer in my notes. I was pretty much attempting to range it in to match my operating RB and it did that quite well. But as I say I suspect I could back out the sensitivity, maybe. Regards Paul On Sun, Jan 15, 2012 at 8:58 PM, Rex r...@sonic.net wrote: I have read about the EFC mod for the 5680A by Bill Riches and adapted for external by Arthur Dent. Nice work. Maybe I missed a detail in all the recent messages -- Question: Has anyone measured or calculated the tuning sensitivity of the pin-5 EFC voltage? (Hz/V number) __**_ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/** mailman/listinfo/time-nutshttps://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there. ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there.
[time-nuts] Adding adjustment pot to 5680
Rex: Question: Has anyone measured or calculated the tuning sensitivity of the pin-5 EFC voltage? (Hz/V number). I'm not sure what HEX number was loaded into my 5680A but the frequency was just slightly off from 10Mhz. Pin 5 on my 27M4BI quad opamp 'floats at 2.599V and to get 10Mhz out it needs to be at 2.445V. I guess I could correct the frequency digitally so it is at 10Mhz with pin 5 floating but I don't feel it is necessary. The output frequency I measured with zero volts on pin 5 (through the 100K resistor) was 10,000,000.028Hz and with 5V it was pretty close to 9,999,999.969Hz or .031Hz low so it's close to centered. I tried using a 2K 10-turn pot with about 10K on each side to restrict the tuning range further and give me finer control. After the 5680A had been on for a while I tried setting the frequency as close to 10Mhz as I could and watch the drift on my scope using the 10Mhz Rb from my Datum 9390 GPS receiver as the reference. The 5680A seemed to stay within 5ns for 45 minutes so the resolution on the pot is quite good and the 5680A seems quite stable. The pin 5 IC connection is the non-inverting input to the opamp and I'm not sure if connecting the 100K resistor to the inverting input, pin 6, would give you a positive change in frequency for a positive change in voltage or not. If you're using a pot for adjustment or if the controller can be programmed to change the polarity, it doesn't really make any difference and pin 5 works just great. I'm glad Bill Riches found this input and posted the information. -Arthur ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there.
Re: [time-nuts] ATT WP 92066-L5 (RB)
Hi Steve - I have the whole shelf, called the Lucent ED2R849-31 Rubidium Frequency Generator Shelf Manufactured by Efratom for Lucent The Rb's are FRS-C's by Efratom Includes: ED2R849-31 REF FREQ GEN SHELF e/w - 1 x WP92066 L5 - Rubidium (RB) (I have 2x) 1 x WP92066 L6 (XO) I have none It was used as a Cell Site Frequency Standard, runs on 24V. A Pic of the shelf is attached. NOT - see below. If I find pinouts I will post them. The FRS assembly pinouts are in the NOT attached spec. Post was too large, will send direct. The FRS spec is out there on the web. (I can email) John Allen K1AE -Original Message- From: time-nuts-boun...@febo.com [mailto:time-nuts-boun...@febo.com] On Behalf Of Steven L. Finberg Sent: Sunday, January 15, 2012 9:38 PM To: time-nuts@febo.com Subject: [time-nuts] ATT WP 92066-L5 (RB) All this talk of the $38 RB from China got me to dig out a RB source I pick up a while ago. It's a WP 92066-L5 made by Ball Efratem for ATT. It also has a model sticker on the rear, ATT CC 406801969. It has a single 25 Pin + coax Mini D type connector on the rear panel. Anyone know the pin out ? Specs? When I first got it I searched the web and couldn't find aything, other than someone else asking the same question. 73 Steve F W1GSL ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there.
Re: [time-nuts] ATT WP 92066-L5 (RB)
There is info in the time-nut archives under Efratom FRS About June 2009. http://www.febo.com/pipermail/time-nuts/ Also Didier has the manual at ko4bb.com John -Original Message- From: time-nuts-boun...@febo.com [mailto:time-nuts-boun...@febo.com] On Behalf Of Steven L. Finberg Sent: Sunday, January 15, 2012 9:38 PM To: time-nuts@febo.com Subject: [time-nuts] ATT WP 92066-L5 (RB) All this talk of the $38 RB from China got me to dig out a RB source I pick up a while ago. It's a WP 92066-L5 made by Ball Efratem for ATT. It also has a model sticker on the rear, ATT CC 406801969. It has a single 25 Pin + coax Mini D type connector on the rear panel. Anyone know the pin out ? Specs? When I first got it I searched the web and couldn't find aything, other than someone else asking the same question. 73 Steve F W1GSL *** Steve FinbergW1GSL w1...@mit.edu PO Box 397082 MIT BrCambridge MA 02139-7082 617 258 3754 *** ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there. ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there.
Re: [time-nuts] New unit of time measurement
In Germany hand-used phones during drive are banned for several years now. I think it makes sense. Well, humanoids should think on it DIY but the reality is another. Yes, that does make complete sense, along with anything which may distract the driver. In China I've seen down-counting LED displays for the red sign. But this is just to simple for Europe. Badly. - Henry I've certainly seen countdown display for pedestrians in several European cities. Cheers, David -- SatSignal software - quality software written to your requirements Web: http://www.satsignal.eu Email: david-tay...@blueyonder.co.uk ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there.
Re: [time-nuts] New unit of time measurement
In message 2867F1FA0E254465AF8CA85C85ED0C79@narvik, David J Taylor writes: In China I've seen down-counting LED displays for the red sign. But this is just to simple for Europe. Badly. I've certainly seen countdown display for pedestrians in several European cities. They are not used for cars here in Denmark because a certain testosterone driven segment of drivers think they are in pole-position when they see a count-down. -- Poul-Henning Kamp | UNIX since Zilog Zeus 3.20 p...@freebsd.org | TCP/IP since RFC 956 FreeBSD committer | BSD since 4.3-tahoe Never attribute to malice what can adequately be explained by incompetence. ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there.
