Re: [time-nuts] 10 MHz -> 16 MHz

2018-10-09 Thread Tom Holmes
Hi Pete...
TAPR doesn't really discontinue things until we've sold out the quantity we've 
built. Sometimes that is 100pieces, sometimes 500. It all depends on how many 
we think we can sell when the kit comes out. If we sell out and still see a lot 
of interest, we may do a second build. The Clock-Block has been around for a 
few years and took a couple of years to sell out. 

>From Tom Holmes, N8ZM

> On Oct 9, 2018, at 1:25 PM, Pete Lancashire  wrote:
> 
> I just wish the tapr would not discontinue things so fast it seems once you
> see it mentioned it's discontinued
> 
>> On Sun, Sep 30, 2018, 1:08 PM Bob kb8tq  wrote:
>> 
>> Hi
>> 
>> If (as originally specified) noise and jitter are not a big deal - there
>> are a lot
>> of chips out there like the ICS570. They are designed to do weird ratio
>> frequency
>> conversions so 10 to 12 or 10 to 16 are trivial for them. The Clockblock
>> board was
>> one way to get it all put together.
>> 
>> Bob
>> 
>>> On Sep 30, 2018, at 12:05 PM, Gerhard Hoffmann  wrote:
>>> 
>>> 
 Am 30.09.2018 um 16:49 schrieb Attila Kinali:
 
 The simplest way I can think of is the following:
 Use a 74LV8154 to divide the 10MHz down to 152.587890625Hz.
 Use the capture timer unit of the uC to measure the phase of the
 pulse. Use any kind of DAC (internal, external, PWM,...) to steer
 the 16MHz VCO. Depending on how fast the timer unit runs, this
 will give you something in the order of 10-200ns dead-band.
 By choosing the right frequency for the timer unit, one can
 get it to "dither" a bit and then use averaging.
 
 For lower jitter, use one half of a Nutt interpolator
 to get the timing difference between the 152Hz signal
 and the 16MHz (ie similar to what the SRS FS740 does).
 Use something akin Nick Sayer's time-to-amplitude converter
 for the fine measurement.
 
 Same works equally well for 12MHz.
 
 
>>> 
>>> Wow. That's truly a Rube Goldberg design.
>>> 
>>> There is a simpler way.  IDT ICS570. Digikey 800-1073-5-ND
>>> 
>>> Solder time less than 10 minutes.
>>> I had the 3V3-Version in the parts drawers, officially it takes the 5V
>>> version to generate the 160 MHz, but the 3V3 version happened to work,
>> too.
>>> The difference between 120 and 160 MHz is just a GND wire on pin 6 (vs.
>> open)
>>> 
>>> Divide by 10 is left as an exercise.
>>> 
>>> regards,
>>> Gerhard
>>> 
>>> (But then, some like to build and tune multiplier chains and mixers.)
>>> 
>>> 
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Re: [time-nuts] 10 MHz -> 16 MHz

2018-10-09 Thread John Ackermann N8UR

Hi Pete --

TAPR did one production run of the ClockBlock at the beginning of 2007, 
building 100 units, and they were available until all were sold (which 
IIRC took a couple of years).  I'm not sure if we ever looked at doing a 
second run, but I seem to remember that one of the components became 
either obsolete or crazy expensive.


But this is a good chance to describe how TAPR handles product 
manufacture.  We think of ourselves mainly as an R organization making 
stuff that's not available elsewhere.  We're a volunteer, non-profit, 
group and the up-front cost to get a bunch of boards assembled is a 
major hit to our bank account.  We can't afford to build units that will 
sit in inventory for years.  (This discussion is mainly about assembled 
products; the sunk cost for kits is usually much lower.)


So, our usual approach is to do one manufacturing run of a quantity we 
are pretty sure will sell out quickly.  It's usually not cost-effective 
to build less than 50 units, and the per-unit cost drops dramatically as 
you increase to 100 or 200 pieces.  We do our best to balance unit cost, 
upfront cost, and expected sales in a way that's prudent based on our 
resources.


We normally don't expect to do a second manufacturing run, as the first 
run usually consumes most of the demand.  If we place a second order for 
a smaller quantity, the unit cost goes up and we would have to increase 
price accordingly.  If we do a larger order, we risk turning our limited 
cash into aging inventory.


There are some cases where the demand justified a second run -- for 
example the TICC, where virtually all the units were pre-sold and we 
felt comfortable getting a second batch.  But our niche market is small 
enough that in most cases one run is enough to saturate it.


I believe we have some bare ClockBlock PCBs available; if you're 
interested in rolling your own unit, contact me off-line and I'll see 
what we can do.


John


On 10/09/2018 01:25 PM, Pete Lancashire wrote:

I just wish the tapr would not discontinue things so fast it seems once you
see it mentioned it's discontinued

On Sun, Sep 30, 2018, 1:08 PM Bob kb8tq  wrote:


Hi

If (as originally specified) noise and jitter are not a big deal - there
are a lot
of chips out there like the ICS570. They are designed to do weird ratio
frequency
conversions so 10 to 12 or 10 to 16 are trivial for them. The Clockblock
board was
one way to get it all put together.

Bob


On Sep 30, 2018, at 12:05 PM, Gerhard Hoffmann  wrote:


Am 30.09.2018 um 16:49 schrieb Attila Kinali:


The simplest way I can think of is the following:
Use a 74LV8154 to divide the 10MHz down to 152.587890625Hz.
Use the capture timer unit of the uC to measure the phase of the
pulse. Use any kind of DAC (internal, external, PWM,...) to steer
the 16MHz VCO. Depending on how fast the timer unit runs, this
will give you something in the order of 10-200ns dead-band.
By choosing the right frequency for the timer unit, one can
get it to "dither" a bit and then use averaging.

For lower jitter, use one half of a Nutt interpolator
to get the timing difference between the 152Hz signal
and the 16MHz (ie similar to what the SRS FS740 does).
Use something akin Nick Sayer's time-to-amplitude converter
for the fine measurement.

Same works equally well for 12MHz.




Wow. That's truly a Rube Goldberg design.

There is a simpler way.  IDT ICS570. Digikey 800-1073-5-ND

Solder time less than 10 minutes.
I had the 3V3-Version in the parts drawers, officially it takes the 5V
version to generate the 160 MHz, but the 3V3 version happened to work,

too.

The difference between 120 and 160 MHz is just a GND wire on pin 6 (vs.

open)


Divide by 10 is left as an exercise.

regards,
Gerhard

(But then, some like to build and tune multiplier chains and mixers.)



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Re: [time-nuts] 10 MHz -> 16 MHz

2018-10-09 Thread Pete Lancashire
I just wish the tapr would not discontinue things so fast it seems once you
see it mentioned it's discontinued

On Sun, Sep 30, 2018, 1:08 PM Bob kb8tq  wrote:

> Hi
>
> If (as originally specified) noise and jitter are not a big deal - there
> are a lot
> of chips out there like the ICS570. They are designed to do weird ratio
> frequency
> conversions so 10 to 12 or 10 to 16 are trivial for them. The Clockblock
> board was
> one way to get it all put together.
>
> Bob
>
> > On Sep 30, 2018, at 12:05 PM, Gerhard Hoffmann  wrote:
> >
> >
> > Am 30.09.2018 um 16:49 schrieb Attila Kinali:
> >
> >> The simplest way I can think of is the following:
> >> Use a 74LV8154 to divide the 10MHz down to 152.587890625Hz.
> >> Use the capture timer unit of the uC to measure the phase of the
> >> pulse. Use any kind of DAC (internal, external, PWM,...) to steer
> >> the 16MHz VCO. Depending on how fast the timer unit runs, this
> >> will give you something in the order of 10-200ns dead-band.
> >> By choosing the right frequency for the timer unit, one can
> >> get it to "dither" a bit and then use averaging.
> >>
> >> For lower jitter, use one half of a Nutt interpolator
> >> to get the timing difference between the 152Hz signal
> >> and the 16MHz (ie similar to what the SRS FS740 does).
> >> Use something akin Nick Sayer's time-to-amplitude converter
> >> for the fine measurement.
> >>
> >> Same works equally well for 12MHz.
> >>
> >>
> >
> > Wow. That's truly a Rube Goldberg design.
> >
> > There is a simpler way.  IDT ICS570. Digikey 800-1073-5-ND
> >
> > Solder time less than 10 minutes.
> > I had the 3V3-Version in the parts drawers, officially it takes the 5V
> > version to generate the 160 MHz, but the 3V3 version happened to work,
> too.
> > The difference between 120 and 160 MHz is just a GND wire on pin 6 (vs.
> open)
> >
> > Divide by 10 is left as an exercise.
> >
> > regards,
> > Gerhard
> >
> > (But then, some like to build and tune multiplier chains and mixers.)
> >
> >
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> http://lists.febo.com/mailman/listinfo/time-nuts_lists.febo.com
> > and follow the instructions there.
>
>
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Re: [time-nuts] 10 MHz -> 16 MHz

2018-10-03 Thread Bruce Griffiths
Brian
There are 2 parallel feedback paths one tuned to 6MHz and the other tuned to 
16MHz.
They can either share the same amp or use separate amplifiers. There's a NIST 
paper on using them to divide by factors other than 2 (e.g. 3, 5 etc).
https://tf.nist.gov/general/pdf/1890.pdf

Bruce
> On 04 October 2018 at 00:54 "Brian, WA1ZMS"  wrote:
> 
> 
> Bruce-
> 
> Does such a dual conjugate regen divider use a single mixer with the BPFs in 
> parallel?   Or are there multiple loops?  I'm trying to visualize the 
> topology.
> 
> I've built a few divide-by-2 regen dividers (both worked very well) but 
> nothing else.
> 
> -Brian
> 
> 
> > On Sep 30, 2018, at 4:25 PM, Bruce Griffiths  
> > wrote:
> > 
> > A low phase noise method is to use a dual conjugate regenerative divider 
> > with 6MHz and 16Mhz bandpass filters in the feedback loop to produce 16Mhz 
> > output.
> > 
> > For 12MHz output use 2MHz and 12MHz bandpass filters in the feedback loop. 
> > 
> > Bruce
> >> On 01 October 2018 at 09:05 Bob kb8tq  wrote:
> >> 
> >> 
> >> Hi
> >> 
> >> If (as originally specified) noise and jitter are not a big deal - there 
> >> are a lot 
> >> of chips out there like the ICS570. They are designed to do weird ratio 
> >> frequency
> >> conversions so 10 to 12 or 10 to 16 are trivial for them. The Clockblock 
> >> board was
> >> one way to get it all put together. 
> >> 
> >> Bob
> >> 
> >>> On Sep 30, 2018, at 12:05 PM, Gerhard Hoffmann  wrote:
> >>> 
> >>> 
>  Am 30.09.2018 um 16:49 schrieb Attila Kinali:
>  
>  The simplest way I can think of is the following:
>  Use a 74LV8154 to divide the 10MHz down to 152.587890625Hz.
>  Use the capture timer unit of the uC to measure the phase of the
>  pulse. Use any kind of DAC (internal, external, PWM,...) to steer
>  the 16MHz VCO. Depending on how fast the timer unit runs, this
>  will give you something in the order of 10-200ns dead-band.
>  By choosing the right frequency for the timer unit, one can
>  get it to "dither" a bit and then use averaging.
>  
>  For lower jitter, use one half of a Nutt interpolator
>  to get the timing difference between the 152Hz signal
>  and the 16MHz (ie similar to what the SRS FS740 does).
>  Use something akin Nick Sayer's time-to-amplitude converter
>  for the fine measurement.
>  
>  Same works equally well for 12MHz.
>  
>  
> 
> 
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Re: [time-nuts] 10 MHz -> 16 MHz

2018-10-03 Thread Magnus Danielson
Hi Brian,

The typical ones have two amplifier chains in parallel and one mixer.
You take the output from the amplifier branch of your liking.

The hard part is to tune them to run in synchronous mode and ensure they
stay there, or else there is a beat pattern causing excessive jitter
over that of the synchronous mode.

Cheers,
Magnus

On 10/3/18 1:54 PM, Brian, WA1ZMS wrote:
> Bruce-
> 
> Does such a dual conjugate regen divider use a single mixer with the BPFs in 
> parallel?   Or are there multiple loops?  I'm trying to visualize the 
> topology.
> 
> I've built a few divide-by-2 regen dividers (both worked very well) but 
> nothing else.
> 
> -Brian
> 
> 
>> On Sep 30, 2018, at 4:25 PM, Bruce Griffiths  
>> wrote:
>>
>> A low phase noise method is to use a dual conjugate regenerative divider 
>> with 6MHz and 16Mhz bandpass filters in the feedback loop to produce 16Mhz 
>> output.
>>
>> For 12MHz output use 2MHz and 12MHz bandpass filters in the feedback loop. 
>>
>> Bruce
>>> On 01 October 2018 at 09:05 Bob kb8tq  wrote:
>>>
>>>
>>> Hi
>>>
>>> If (as originally specified) noise and jitter are not a big deal - there 
>>> are a lot 
>>> of chips out there like the ICS570. They are designed to do weird ratio 
>>> frequency
>>> conversions so 10 to 12 or 10 to 16 are trivial for them. The Clockblock 
>>> board was
>>> one way to get it all put together. 
>>>
>>> Bob
>>>
 On Sep 30, 2018, at 12:05 PM, Gerhard Hoffmann  wrote:


> Am 30.09.2018 um 16:49 schrieb Attila Kinali:
>
> The simplest way I can think of is the following:
> Use a 74LV8154 to divide the 10MHz down to 152.587890625Hz.
> Use the capture timer unit of the uC to measure the phase of the
> pulse. Use any kind of DAC (internal, external, PWM,...) to steer
> the 16MHz VCO. Depending on how fast the timer unit runs, this
> will give you something in the order of 10-200ns dead-band.
> By choosing the right frequency for the timer unit, one can
> get it to "dither" a bit and then use averaging.
>
> For lower jitter, use one half of a Nutt interpolator
> to get the timing difference between the 152Hz signal
> and the 16MHz (ie similar to what the SRS FS740 does).
> Use something akin Nick Sayer's time-to-amplitude converter
> for the fine measurement.
>
> Same works equally well for 12MHz.
>
>
> 
> 
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Re: [time-nuts] 10 MHz -> 16 MHz

2018-10-03 Thread Brian, WA1ZMS
Bruce-

Does such a dual conjugate regen divider use a single mixer with the BPFs in 
parallel?   Or are there multiple loops?  I'm trying to visualize the topology.

I've built a few divide-by-2 regen dividers (both worked very well) but nothing 
else.

-Brian


> On Sep 30, 2018, at 4:25 PM, Bruce Griffiths  
> wrote:
> 
> A low phase noise method is to use a dual conjugate regenerative divider with 
> 6MHz and 16Mhz bandpass filters in the feedback loop to produce 16Mhz output.
> 
> For 12MHz output use 2MHz and 12MHz bandpass filters in the feedback loop. 
> 
> Bruce
>> On 01 October 2018 at 09:05 Bob kb8tq  wrote:
>> 
>> 
>> Hi
>> 
>> If (as originally specified) noise and jitter are not a big deal - there are 
>> a lot 
>> of chips out there like the ICS570. They are designed to do weird ratio 
>> frequency
>> conversions so 10 to 12 or 10 to 16 are trivial for them. The Clockblock 
>> board was
>> one way to get it all put together. 
>> 
>> Bob
>> 
>>> On Sep 30, 2018, at 12:05 PM, Gerhard Hoffmann  wrote:
>>> 
>>> 
 Am 30.09.2018 um 16:49 schrieb Attila Kinali:
 
 The simplest way I can think of is the following:
 Use a 74LV8154 to divide the 10MHz down to 152.587890625Hz.
 Use the capture timer unit of the uC to measure the phase of the
 pulse. Use any kind of DAC (internal, external, PWM,...) to steer
 the 16MHz VCO. Depending on how fast the timer unit runs, this
 will give you something in the order of 10-200ns dead-band.
 By choosing the right frequency for the timer unit, one can
 get it to "dither" a bit and then use averaging.
 
 For lower jitter, use one half of a Nutt interpolator
 to get the timing difference between the 152Hz signal
 and the 16MHz (ie similar to what the SRS FS740 does).
 Use something akin Nick Sayer's time-to-amplitude converter
 for the fine measurement.
 
 Same works equally well for 12MHz.
 
 


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Re: [time-nuts] 10 MHz -> 16 MHz

2018-10-01 Thread Richard (Rick) Karlquist




On 10/1/2018 9:01 AM, ew via time-nuts wrote:

I made a mistake in the previous post we use the ICS 570 with very good results 
in many applications. So it was easy to test. This has to be the easiest and 
lowest cost circuit. Start with an AC14 ST, followed by a divide by 5. I used 
part of a HC390 but a LS 90 will do. Take the 2 MHz output feed the input of 
the 570 and select 16X out comes 32 and 16 MHz. Material cost less than $ 5 
regulator included.
Bert Kehren


The big advantage of the ICS570 vs 99% of the other solutions
is that it does not require a microcontroller to baby sit it.
For a quick and easy solution, that aspect trumps everything
else.

At least for me. I took 1 course in Fortran 50 years ago,
and that was the extent of my software education.
During my whole career, I have too busy being well
paid to design hardware, to have any time left over to
learn software.  After Fortran was over, there was the Pascal
fad, then the C fad, etc, now I guess Python is the latest.
Never got involved in any of that.

Rick N6RK

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Re: [time-nuts] 10 MHz -> 16 MHz

2018-10-01 Thread ew via time-nuts
I made a mistake in the previous post we use the ICS 570 with very good results 
in many applications. So it was easy to test. This has to be the easiest and 
lowest cost circuit. Start with an AC14 ST, followed by a divide by 5. I used 
part of a HC390 but a LS 90 will do. Take the 2 MHz output feed the input of 
the 570 and select 16X out comes 32 and 16 MHz. Material cost less than $ 5 
regulator included.
Bert Kehren
In a message dated 10/1/2018 11:32:17 AM Eastern Standard Time, 
time-nuts@lists.febo.com writes:

Moot point with free running clock oscillators in the digitising soundcards 
often used.  Some of the all in one cards with fast A/D's andFPGA's etc can 
take an external frequency reference.
Some "adjustment" of the data can be done in software, to calibrate 
thefrequency domain.  Smoke and mirrors!
But yes, good point.
Dave B.
PS: Thanks to whoever mentioned the ICS525 or 527 IC's.  Oddly, I'd notcome 
across that family of chips before.  I'm currently messing with anold-school 
MC145151 PLL chip, to lock a 20.48MHz VCXO to 10MHz.  I"abuse" the IC by 
swapping the reference and VCXO inputs to get theneeded division ratios (for an 
80kHz phase comparison frequency.)
That and referencing the tuning diode from the +supply so the looptuning is the 
right way around seems to work scarily well.
The ICS525 would be a better bet perhaps, if I had to manufacture dozensof the 
things.  However, making PCB's is an issue for me (no creationfacilities nor 
experience with the needed layout software) so "dead bug"construction is the 
way at the moment!   Fun times...
>><<

On 
30/09/18 17:00, time-nuts-requ...@lists.febo.com wrote:> From: Pete Lancashire 
>>> It surprises me how the SDR designers in 90% of 
the cases don't even allow> for an external clock. It's like accuracy never 
came into thought.
-- Created on and sent from a Unix like PC running and using free and open 
source software.::
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Re: [time-nuts] 10 MHz -> 16 MHz

2018-10-01 Thread Dave B via time-nuts
Moot point with free running clock oscillators in the digitising sound
cards often used.  Some of the all in one cards with fast A/D's and
FPGA's etc can take an external frequency reference.

Some "adjustment" of the data can be done in software, to calibrate the
frequency domain.  Smoke and mirrors!

But yes, good point.

Dave B.

PS: Thanks to whoever mentioned the ICS525 or 527 IC's.  Oddly, I'd not
come across that family of chips before.  I'm currently messing with an
old-school MC145151 PLL chip, to lock a 20.48MHz VCXO to 10MHz.  I
"abuse" the IC by swapping the reference and VCXO inputs to get the
needed division ratios (for an 80kHz phase comparison frequency.)

That and referencing the tuning diode from the +supply so the loop
tuning is the right way around seems to work scarily well.

The ICS525 would be a better bet perhaps, if I had to manufacture dozens
of the things.  However, making PCB's is an issue for me (no creation
facilities nor experience with the needed layout software) so "dead bug"
construction is the way at the moment!   Fun times...

>><<



On 30/09/18 17:00, time-nuts-requ...@lists.febo.com wrote:
> From: Pete Lancashire 
>
>
> It surprises me how the SDR designers in 90% of the cases don't even allow
> for an external clock. It's like accuracy never came into thought.

-- 
Created on and sent from a Unix like PC running and using free and open source 
software.
::

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Re: [time-nuts] 10 MHz -> 16 MHz

2018-09-30 Thread Gerhard Hoffmann




Am 01.10.2018 um 03:01 schrieb Arthur Dent:

Oops, I meant divide by 5 to get 2 followed by 8x NB3N511 work?
___


That should work, also for the 12 MHz case with 6x instead of 8x.

But it still needs a second divider chip like the solution I built
this afternoon. Somewhere, there must exist a single chip SO-8 solution.

:-)

cheers, Gerhard



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Re: [time-nuts] 10 MHz -> 16 MHz

2018-09-30 Thread paul swed
Arthur that is a very attractive answer. I had never heard of the chip
before surely looks simple enough.
Regards
Paul
WB8TSL

On Sun, Sep 30, 2018 at 8:45 PM Arthur Dent 
wrote:

> Would a divide by 2 followed by a NB3N511 work?
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Re: [time-nuts] 10 MHz -> 16 MHz

2018-09-30 Thread Magnus Danielson
Hi,

There is clearly enough clock chips today that would fit the bill and
probably provide good enough jitter for you to operate it safely.
Look at products like this:
https://www.silabs.com/products/timing/clocks/general-purpose-clock-generators

There is more of them as you look around.

Then, also consider classic mixer-approach, which may be workable or not
for you:

Square the 10 MHz, feed into a tuned tank for 30 MHz, amplify and
square, divide by 5, mix produced 6 MHz with 10 MHz and amplify into a
tuned tank at 16 MHz, buffer and square as needed for output.

However, for the application at hand I would look at the modern clock
generator chips that has come a long way. Their relatively low noise is
due to their GHz CMOS oscillators and relatively quiet dividers. The
setup gives a relatively good flexibility. Fractional divisors has come
a long way to solve more problems. You get more than the real-estate of
one of the surface mounted DBM mixers would provide you. It's when you
want to go to very low noise that you would consider another approach.

Then again, I would enjoy the challenge of the mixer approach. So choose
method based on what is most rewarding, but for simplicity the clock
chips seems like a good go, so there it is more about locating a cheap
board with the right chip on it.

Cheers,
Magnus

On 9/30/18 5:57 AM, Tom Van Baak wrote:
> What's a clever, simple, reliable (pick 2 of 3) way to get 16 MHz out of 10 
> MHz? Low phase noise isn't a big requirement and jitter doesn't need to be 
> sub-nanosecond. The main requirement is perfect cycle count accuracy. This is 
> for driving a 16 MHz microcontroller from a 10 MHz Rb/Cs/GPSDO. 10 MHz input 
> is likely sine; 16 MHz output is 3v3 or 5v CMOS.
> 
> Thanks,
> /tvb
> 
> 
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Re: [time-nuts] 10 MHz -> 16 MHz

2018-09-30 Thread Bruce Griffiths
A low phase noise method is to use a dual conjugate regenerative divider with 
6MHz and 16Mhz bandpass filters in the feedback loop to produce 16Mhz output.

For 12MHz output use 2MHz and 12MHz bandpass filters in the feedback loop. 

Bruce
> On 01 October 2018 at 09:05 Bob kb8tq  wrote:
> 
> 
> Hi
> 
> If (as originally specified) noise and jitter are not a big deal - there are 
> a lot 
> of chips out there like the ICS570. They are designed to do weird ratio 
> frequency
> conversions so 10 to 12 or 10 to 16 are trivial for them. The Clockblock 
> board was
> one way to get it all put together. 
> 
> Bob
> 
> > On Sep 30, 2018, at 12:05 PM, Gerhard Hoffmann  wrote:
> > 
> > 
> > Am 30.09.2018 um 16:49 schrieb Attila Kinali:
> > 
> >> The simplest way I can think of is the following:
> >> Use a 74LV8154 to divide the 10MHz down to 152.587890625Hz.
> >> Use the capture timer unit of the uC to measure the phase of the
> >> pulse. Use any kind of DAC (internal, external, PWM,...) to steer
> >> the 16MHz VCO. Depending on how fast the timer unit runs, this
> >> will give you something in the order of 10-200ns dead-band.
> >> By choosing the right frequency for the timer unit, one can
> >> get it to "dither" a bit and then use averaging.
> >> 
> >> For lower jitter, use one half of a Nutt interpolator
> >> to get the timing difference between the 152Hz signal
> >> and the 16MHz (ie similar to what the SRS FS740 does).
> >> Use something akin Nick Sayer's time-to-amplitude converter
> >> for the fine measurement.
> >> 
> >> Same works equally well for 12MHz.
> >> 
> >> 
> > 
> > Wow. That's truly a Rube Goldberg design.
> > 
> > There is a simpler way.  IDT ICS570. Digikey 800-1073-5-ND
> > 
> > Solder time less than 10 minutes.
> > I had the 3V3-Version in the parts drawers, officially it takes the 5V
> > version to generate the 160 MHz, but the 3V3 version happened to work, too.
> > The difference between 120 and 160 MHz is just a GND wire on pin 6 (vs. 
> > open)
> > 
> > Divide by 10 is left as an exercise.
> > 
> > regards,
> > Gerhard
> > 
> > (But then, some like to build and tune multiplier chains and mixers.)
> > 
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Re: [time-nuts] 10 MHz -> 16 MHz

2018-09-30 Thread Bob kb8tq
Hi

If (as originally specified) noise and jitter are not a big deal - there are a 
lot 
of chips out there like the ICS570. They are designed to do weird ratio 
frequency
conversions so 10 to 12 or 10 to 16 are trivial for them. The Clockblock board 
was
one way to get it all put together. 

Bob

> On Sep 30, 2018, at 12:05 PM, Gerhard Hoffmann  wrote:
> 
> 
> Am 30.09.2018 um 16:49 schrieb Attila Kinali:
> 
>> The simplest way I can think of is the following:
>> Use a 74LV8154 to divide the 10MHz down to 152.587890625Hz.
>> Use the capture timer unit of the uC to measure the phase of the
>> pulse. Use any kind of DAC (internal, external, PWM,...) to steer
>> the 16MHz VCO. Depending on how fast the timer unit runs, this
>> will give you something in the order of 10-200ns dead-band.
>> By choosing the right frequency for the timer unit, one can
>> get it to "dither" a bit and then use averaging.
>> 
>> For lower jitter, use one half of a Nutt interpolator
>> to get the timing difference between the 152Hz signal
>> and the 16MHz (ie similar to what the SRS FS740 does).
>> Use something akin Nick Sayer's time-to-amplitude converter
>> for the fine measurement.
>> 
>> Same works equally well for 12MHz.
>> 
>> 
> 
> Wow. That's truly a Rube Goldberg design.
> 
> There is a simpler way.  IDT ICS570. Digikey 800-1073-5-ND
> 
> Solder time less than 10 minutes.
> I had the 3V3-Version in the parts drawers, officially it takes the 5V
> version to generate the 160 MHz, but the 3V3 version happened to work, too.
> The difference between 120 and 160 MHz is just a GND wire on pin 6 (vs. open)
> 
> Divide by 10 is left as an exercise.
> 
> regards,
> Gerhard
> 
> (But then, some like to build and tune multiplier chains and mixers.)
> 
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Re: [time-nuts] 10 MHz -> 16 MHz

2018-09-30 Thread ed breya
I agree with Alex - injection-locking would be the simplest of all, if 
the slight correction signal added every 16 cycles is acceptable.


Ed

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Re: [time-nuts] 10 MHz -> 16 MHz

2018-09-30 Thread Attila Kinali
On Sun, 30 Sep 2018 19:05:16 +0200
Gerhard Hoffmann  wrote:

> Wow. That's truly a Rube Goldberg design.

You are right, one can do it simpler, in a single chip:

Take a uC (STM32F030 comes to mind), use its PLL, VCO and clock output
to do the heavy lifting. No external components (beside a few capacitors)
required.

As the CPU itself and all the peripherals are not used, one can do
other shenanigans with them, like playing the imperial march on
a floppy drive.

Attila Kinali

-- 
The bad part of Zurich is where the degenerates
throw DARK chocolate at you.

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Re: [time-nuts] 10 MHz -> 16 MHz

2018-09-30 Thread Attila Kinali
On Sat, 29 Sep 2018 20:57:14 -0700
"Tom Van Baak"  wrote:

> What's a clever, simple, reliable (pick 2 of 3) way to get 16 MHz out of
> 10 MHz? Low phase noise isn't a big requirement and jitter doesn't need
> to be sub-nanosecond. The main requirement is perfect cycle count accuracy.
> This is for driving a 16 MHz microcontroller from a 10 MHz Rb/Cs/GPSDO.
> 10 MHz input is likely sine; 16 MHz output is 3v3 or 5v CMOS.


The simplest way I can think of is the following:
Use a 74LV8154 to divide the 10MHz down to 152.587890625Hz.
Use the capture timer unit of the uC to measure the phase of the
pulse. Use any kind of DAC (internal, external, PWM,...) to steer
the 16MHz VCO. Depending on how fast the timer unit runs, this
will give you something in the order of 10-200ns dead-band.
By choosing the right frequency for the timer unit, one can
get it to "dither" a bit and then use averaging.

For lower jitter, use one half of a Nutt interpolator
to get the timing difference between the 152Hz signal
and the 16MHz (ie similar to what the SRS FS740 does).
Use something akin Nick Sayer's time-to-amplitude converter 
for the fine measurement.

Same works equally well for 12MHz.

Attila Kinali
-- 
The bad part of Zurich is where the degenerates
throw DARK chocolate at you.

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Re: [time-nuts] 10 MHz -> 16 MHz

2018-09-30 Thread Mike Feher
Almost same answer as I gave Tom. Double to 20, divide by 10, and then mix
the 2 with the original 10, You could also just divide by 5 and then mix
that 2 with the original 10. Again, filtering required. 73 - Mike 

 

Mike B. Feher, N4FS

89 Arnold Blvd.

Howell NJ 07731

848-245-9115

 

-Original Message-
From: time-nuts  On Behalf Of Pete
Lancashire
Sent: Sunday, September 30, 2018 9:45 AM
To: Tom Van Baak ; Discussion of precise time and
frequency measurement 
Subject: Re: [time-nuts] 10 MHz -> 16 MHz

 

Same question 10 to 12:-)

 

On Sat, Sep 29, 2018, 8:58 PM Tom Van Baak < <mailto:t...@leapsecond.com>
t...@leapsecond.com> wrote:

 

> What's a clever, simple, reliable (pick 2 of 3) way to get 16 MHz out 

> of

> 1Almost 0 MHz? Low phase noise isn't a big requirement and jitter doesn't 

> need to be sub-nanosecond. The main requirement is perfect cycle count
accuracy.

> This is for driving a 16 MHz microcontroller from a 10 MHz 

> Rb/Cs/GPSDO. 10 MHz input is likely sine; 16 MHz output is 3v3 or 5v CMOS.

> 

> Thanks,

> /tvb

> 

> 

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Re: [time-nuts] 10 MHz -> 16 MHz

2018-09-30 Thread Gerhard Hoffmann




Am 30.09.2018 um 15:44 schrieb Pete Lancashire:

Same question 10 to 12:-)




Same Answer.

Select pins = (1, 1, 0) for 12 instead of (1, 1, 1) for 16.

\Gerhard



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Re: [time-nuts] 10 MHz -> 16 MHz

2018-09-30 Thread John Ackermann. N8UR
The clockblock could do that, or probably any of the newer synth chips.  Phase 
noise and jitter are lousy of course.

On Sep 29, 2018, 11:58 PM, at 11:58 PM, Tom Van Baak  
wrote:
>What's a clever, simple, reliable (pick 2 of 3) way to get 16 MHz out
>of 10 MHz? Low phase noise isn't a big requirement and jitter doesn't
>need to be sub-nanosecond. The main requirement is perfect cycle count
>accuracy. This is for driving a 16 MHz microcontroller from a 10 MHz
>Rb/Cs/GPSDO. 10 MHz input is likely sine; 16 MHz output is 3v3 or 5v
>CMOS.
>
>Thanks,
>/tvb
>
>
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Re: [time-nuts] 10 MHz -> 16 MHz

2018-09-30 Thread Gerhard Hoffmann

Ingrid clicked through the "you might find that useful too" - list

and stumbled across this:

< 
https://www.digikey.de/product-detail/de/adafruit-industries-llc/2045/1528-1206-ND/5353666 
   >


\Gerhard

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Re: [time-nuts] 10 MHz -> 16 MHz

2018-09-30 Thread Gerhard Hoffmann



Am 30.09.2018 um 06:15 schrieb Hal Murray:

What's a clever, simple, reliable (pick 2 of 3) way to get 16 MHz out of 10
MHz? Low phase noise isn't a big requirement and jitter doesn't need to be
sub-nanosecond. The main requirement is perfect cycle count accuracy. This is
for driving a 16 MHz microcontroller from a 10 MHz Rb/Cs/GPSDO. 10 MHz input
is likely sine; 16 MHz output is 3v3 or 5v CMOS.

There should be a PLL chip that includes the M and N dividers, but I'm not
familiar with that area.


Use this for f * 16:

< 
https://www.digikey.de/product-detail/de/on-semiconductor/NB3N3020DTG/NB3N3020DTGOS-ND/2003319 
  >


and a 74LVC for / 10.

The NB3N3020 could do *1.6 directly, but only for input frequency > 25 MHz.

regards,
Gerhard

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Re: [time-nuts] 10 MHz -> 16 MHz

2018-09-30 Thread Kasper Pedersen
On 09/30/2018 05:57 AM, Tom Van Baak wrote:
> What's a clever, simple, reliable (pick 2 of 3) way to get 16 MHz out of 10 
> MHz? Low phase noise isn't a big requirement and jitter doesn't need to be 
> sub-nanosecond. The main requirement is perfect cycle count accuracy. This is 
> for driving a 16 MHz microcontroller from a 10 MHz Rb/Cs/GPSDO. 10 MHz input 
> is likely sine; 16 MHz output is 3v3 or 5v CMOS.
> 
> Thanks,
> /tvb

When I have needed this, it has been for microcontrollers. I have let
the microcontroller do the locking, with 10MHz applied directly to an
input pin:

I run a reasonably fast* interrupt. Once inside the interrupt, I read
the current timer value, and read the port 8 times into registers.

This gives me 8 samples spaced 45 degrees apart on the 10MHz input,
which are then converted to a 8-bit field.

That 8-bit value is then used in a lookup table, which outputs a phase
value. This is compensated by what was read from the timer (how late we
got into the interrupt).

The phase error is then accumulated, and drives a PWM DAC, connected to
a varactor on the crystal.

It adds 3 external components in total, and for an annoying case like
8/5, it may well wobble 90 degrees.



It started with this Christmas-vacation experiment I never really finished:

https://n1.taur.dk/permanent/synth_v2.pdf



/Kasper Pedersen

*) oscillator_frequency * max_xtal_deviation * 4, typically 16kHz or so.

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Re: [time-nuts] 10 MHz -> 16 MHz

2018-09-30 Thread ew via time-nuts
We use the ICS527 for many applications easy to get 80 or 160 MHz. in non 
critical applications I use an AC14. Have a small board, 14 and ISC only if 
interested have to look for it it is pre relocation. Juerg may also have one. 
Corby uses it in his latest HP5065 tests along with a AD9850 DDS.Bert Kehren
In a message dated 9/30/2018 2:00:05 AM Eastern Standard Time, 
michael.c...@sfr.fr writes:

How about an ICS525 or ICS527. IDT’s calculator allows a 0 ppm frequency error. 
You would need a sine-square converter for input.

> Le 30 sept. 2018 à 05:57, Tom Van Baak  a écrit :
> 
> What's a clever, simple, reliable (pick 2 of 3) way to get 16 MHz out of 10 
> MHz? Low phase noise isn't a big requirement and jitter doesn't need to be 
> sub-nanosecond. The main requirement is perfect cycle count accuracy. This is 
> for driving a 16 MHz microcontroller from a 10 MHz Rb/Cs/GPSDO. 10 MHz input 
> is likely sine; 16 MHz output is 3v3 or 5v CMOS.
> 
> Thanks,
> /tvb
> 
> 
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People have only as much liberty as they have the intelligence to want and the 
courage to take.

Emma Goldman


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Re: [time-nuts] 10 MHz -> 16 MHz

2018-09-30 Thread Dana Whitlow
Tom,

Divide the 10 MHz down to 2 MHz in the usual way, then multiply by 8
with a cascade of three analog freq doublers separated by fairly narrow
bandpass filters.  Caveats:  Would need four filters total along the path
to get rid of unwanted frequency components, gain distributed along
the path to keep the signal level high enough to satisfy the doublers,
and might suffer excessive phase drift due to temperature changes of
the filters (and probably to a lesser extent) the doublers themselves.
You didn't mention phase stability requirements...

Freq doublers based on mixers or on full-wave rectification have the
pleasant property of having *most* of their output power in the proper
harmonic order, but require sinusoidal drives to work.  An unfiltered
digital drive signal won't suffice here.

Dana



On Sat, Sep 29, 2018 at 10:58 PM Tom Van Baak  wrote:

> What's a clever, simple, reliable (pick 2 of 3) way to get 16 MHz out of
> 10 MHz? Low phase noise isn't a big requirement and jitter doesn't need to
> be sub-nanosecond. The main requirement is perfect cycle count accuracy.
> This is for driving a 16 MHz microcontroller from a 10 MHz Rb/Cs/GPSDO. 10
> MHz input is likely sine; 16 MHz output is 3v3 or 5v CMOS.
>
> Thanks,
> /tvb
>
>
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Re: [time-nuts] 10 MHz -> 16 MHz

2018-09-30 Thread Francesco Messineo
On Sun, Sep 30, 2018 at 5:58 AM Tom Van Baak  wrote:
>
> What's a clever, simple, reliable (pick 2 of 3) way to get 16 MHz out of 10 
> MHz? Low phase noise isn't a big requirement and jitter doesn't need to be 
> sub-nanosecond. The main requirement is perfect cycle count accuracy. This is 
> for driving a 16 MHz microcontroller from a 10 MHz Rb/Cs/GPSDO. 10 MHz input 
> is likely sine; 16 MHz output is 3v3 or 5v CMOS.
>
> Thanks,
> /tvb

I would square the sine (like HP single BJT or double BJT squarers),
divide by 5 with any 74XX290 or xx390, then multiply by two three
times using 74XX86 XORs with one input delayed by two inverters. You
would need to play with the last inverters delay if your
microcontroller needs a symmetric clock

Frank

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Re: [time-nuts] 10 MHz -> 16 MHz

2018-09-30 Thread Luca
Simple 100 kHz ref frequency PLL  (like old cmos series) with 16 MHz VCXO (
very simple 16MHz xtal with varicap arrangement).
All parts in the ordinary spare generic stuff drawer..



Il domenica 30 settembre 2018, Bruce Griffiths 
ha scritto:

> Full wave rectify the sinewave input, extract the 8th Harmonic with a
> passive filter.
> Drive the input of a divide by 5 circuit via a suitable impedance
> converter network.
> Could even use a CMOS 74XX74 flipflop plus a few passive components as the
> divider.
>
> Bruce
>
> > On 30 September 2018 at 16:57 Tom Van Baak  wrote:
> >
> >
> > What's a clever, simple, reliable (pick 2 of 3) way to get 16 MHz out of
> 10 MHz? Low phase noise isn't a big requirement and jitter doesn't need to
> be sub-nanosecond. The main requirement is perfect cycle count accuracy.
> This is for driving a 16 MHz microcontroller from a 10 MHz Rb/Cs/GPSDO. 10
> MHz input is likely sine; 16 MHz output is 3v3 or 5v CMOS.
> >
> > Thanks,
> > /tvb
> >
> >
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Re: [time-nuts] 10 MHz -> 16 MHz

2018-09-29 Thread Jeremy Nichols
How about three doublers: 10 MHz -> 20 -> 40 -> 80 MHz and then divide
by 5 -> 16 MHz?

Jeremy
N6WFO

On Sat, Sep 29, 2018 at 9:17 PM Hal Murray  wrote:
>
>
> > What's a clever, simple, reliable (pick 2 of 3) way to get 16 MHz out of 10
> > MHz? Low phase noise isn't a big requirement and jitter doesn't need to be
> > sub-nanosecond. The main requirement is perfect cycle count accuracy. This 
> > is
> > for driving a 16 MHz microcontroller from a 10 MHz Rb/Cs/GPSDO. 10 MHz input
> > is likely sine; 16 MHz output is 3v3 or 5v CMOS.
>
> There should be a PLL chip that includes the M and N dividers, but I'm not
> familiar with that area.
>
> Some/many ARM chips include PLLs so you can use a convenient Xtal and run the
> CPU at a higher speed.  You might look for low cost break out boards for an
> SoC ARM.  Remove their Xtal, feed your 10 MHz into the right pad.  Program it
> to setup one of the counter/timers to do the right divide.
>
>
> --
> These are my opinions.  I hate spam.
>
>
>
>
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Re: [time-nuts] 10 MHz -> 16 MHz

2018-09-29 Thread Hal Murray


> What's a clever, simple, reliable (pick 2 of 3) way to get 16 MHz out of 10
> MHz? Low phase noise isn't a big requirement and jitter doesn't need to be
> sub-nanosecond. The main requirement is perfect cycle count accuracy. This is
> for driving a 16 MHz microcontroller from a 10 MHz Rb/Cs/GPSDO. 10 MHz input
> is likely sine; 16 MHz output is 3v3 or 5v CMOS. 

There should be a PLL chip that includes the M and N dividers, but I'm not 
familiar with that area.

Some/many ARM chips include PLLs so you can use a convenient Xtal and run the 
CPU at a higher speed.  You might look for low cost break out boards for an 
SoC ARM.  Remove their Xtal, feed your 10 MHz into the right pad.  Program it 
to setup one of the counter/timers to do the right divide.


-- 
These are my opinions.  I hate spam.




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