Bruce-

Does such a dual conjugate regen divider use a single mixer with the BPFs in 
parallel?   Or are there multiple loops?  I'm trying to visualize the topology.

I've built a few divide-by-2 regen dividers (both worked very well) but nothing 
else.

-Brian


> On Sep 30, 2018, at 4:25 PM, Bruce Griffiths <bruce.griffi...@xtra.co.nz> 
> wrote:
> 
> A low phase noise method is to use a dual conjugate regenerative divider with 
> 6MHz and 16Mhz bandpass filters in the feedback loop to produce 16Mhz output.
> 
> For 12MHz output use 2MHz and 12MHz bandpass filters in the feedback loop. 
> 
> Bruce
>> On 01 October 2018 at 09:05 Bob kb8tq <kb...@n1k.org> wrote:
>> 
>> 
>> Hi
>> 
>> If (as originally specified) noise and jitter are not a big deal - there are 
>> a lot 
>> of chips out there like the ICS570. They are designed to do weird ratio 
>> frequency
>> conversions so 10 to 12 or 10 to 16 are trivial for them. The Clockblock 
>> board was
>> one way to get it all put together. 
>> 
>> Bob
>> 
>>> On Sep 30, 2018, at 12:05 PM, Gerhard Hoffmann <dk...@arcor.de> wrote:
>>> 
>>> 
>>>> Am 30.09.2018 um 16:49 schrieb Attila Kinali:
>>>> 
>>>> The simplest way I can think of is the following:
>>>> Use a 74LV8154 to divide the 10MHz down to 152.587890625Hz.
>>>> Use the capture timer unit of the uC to measure the phase of the
>>>> pulse. Use any kind of DAC (internal, external, PWM,...) to steer
>>>> the 16MHz VCO. Depending on how fast the timer unit runs, this
>>>> will give you something in the order of 10-200ns dead-band.
>>>> By choosing the right frequency for the timer unit, one can
>>>> get it to "dither" a bit and then use averaging.
>>>> 
>>>> For lower jitter, use one half of a Nutt interpolator
>>>> to get the timing difference between the 152Hz signal
>>>> and the 16MHz (ie similar to what the SRS FS740 does).
>>>> Use something akin Nick Sayer's time-to-amplitude converter
>>>> for the fine measurement.
>>>> 
>>>> Same works equally well for 12MHz.
>>>> 
>>>> 


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