[U-Boot] [RFC][PATCH v2] bootm: Add sub commands
This version:
* cleans ups issues pointed out by Jerry
* adds a state machine to the command processing
* adds bd_t and cmdline process on linux for ppc
If this looks good I'll go ahead and clean it up for the other arches and OSes.
- k
Posting this again for discussion. The two features I'm interested in
enabling are:
* Having the ability to modify the device tree before its passed to
the kernel but after 'fdt boardsetup'
* Ability to do all setup but not actually jumping to the kernel.
(This is useful as a way to setup the memory image [kernel, ramdisk,
fdt, etc] for a different cpu than the boot one)
Having bootm sub-commands allows both of these as we can break up
the sequeunce of steps that are part of the bootm process.
---
common/cmd_bootm.c | 150 +-
include/image.h| 20 -
lib_ppc/bootm.c| 262 ++--
3 files changed, 338 insertions(+), 94 deletions(-)
diff --git a/common/cmd_bootm.c b/common/cmd_bootm.c
index 19257bb..1de11c2 100644
--- a/common/cmd_bootm.c
+++ b/common/cmd_bootm.c
@@ -34,6 +34,7 @@
#include bzlib.h
#include environment.h
#include lmb.h
+#include linux/ctype.h
#include asm/byteorder.h
#if defined(CONFIG_CMD_USB)
@@ -273,7 +274,7 @@ static int bootm_start(cmd_tbl_t *cmdtp, int flag, int
argc, char *argv[])
}
images.os.start = (ulong)os_hdr;
- images.valid = 1;
+ images.state = BOOTM_STATE_START;
return 0;
}
@@ -376,6 +377,121 @@ static int bootm_load_os(image_info_t os, ulong
*load_end, int boot_progress)
return 0;
}
+int do_bootm_subcommand (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+{
+ int ret = 0;
+ int state;
+
+ /* start */
+ if (argv[1][0] == 's') {
+ argc--;
+ argv++;
+ return bootm_start(cmdtp, flag, argc, argv);
+ }
+ /* loados */
+ else if (argv[1][0] == 'l') {
+ state = BOOTM_STATE_LOADOS;
+ }
+ /* ramdisk relocate */
+#if defined(CONFIG_PPC) || defined(CONFIG_M68K) || defined(CONFIG_SPARC)
+ else if (argv[1][0] == 'r') {
+ state = BOOTM_STATE_RAMDISK;
+ }
+#endif
+#ifdef CONFIG_OF_LIBFDT
+ /* fdt relocate */
+ else if (argv[1][0] == 'f') {
+ state = BOOTM_STATE_FDT;
+ }
+#endif
+ /* bd_t setup */
+ else if (argv[1][0] == 'b') {
+ state = BOOTM_STATE_OS_BD_T;
+ }
+ /* cmdline setup */
+ else if (argv[1][0] == 'c') {
+ state = BOOTM_STATE_OS_CMDLINE;
+ }
+ /* prep os */
+ else if (argv[1][0] == 'p') {
+ state = BOOTM_STATE_OS_PREP;
+ }
+ /* go */
+ else if (argv[1][0] == 'g') {
+ state = BOOTM_STATE_OS_GO;
+ }
+ /* Unrecognized command */
+ else {
+ printf (Usage:\n%s\n, cmdtp-usage);
+ return 1;
+ }
+
+ if (images.state = state) {
+ printf (Trying to execute a command out of order\n);
+ printf (Usage:\n%s\n, cmdtp-usage);
+ return 1;
+ }
+
+ images.state |= state;
+
+ switch (state) {
+ ulong load_end;
+ case BOOTM_STATE_START:
+ /* should never occur */
+ break;
+ case BOOTM_STATE_LOADOS:
+ ret = bootm_load_os(images.os, load_end, 0);
+ if (ret)
+ return ret;
+
+ lmb_reserve(images.lmb, images.os.load,
+ (load_end - images.os.load));
+ break;
+#if defined(CONFIG_PPC) || defined(CONFIG_M68K) || defined(CONFIG_SPARC)
+ case BOOTM_STATE_RAMDISK:
+ {
+ ulong rd_len = images.rd_end - images.rd_start;
+ char str[17];
+
+ ret = boot_ramdisk_high(images.lmb, images.rd_start,
+ rd_len, images.initrd_start,
images.initrd_end);
+ if (ret)
+ return ret;
+
+ sprintf(str, %lx, images.initrd_start);
+ setenv(initrd_start, str);
+ sprintf(str, %lx, images.initrd_end);
+ setenv(initrd_end, str);
+ }
+ break;
+#endif
+#ifdef CONFIG_OF_LIBFDT
+ case BOOTM_STATE_FDT:
+ {
+ ulong bootmap_base = getenv_bootm_low();
+ ret = boot_relocate_fdt(images.lmb, bootmap_base,
+ images.ft_addr, images.ft_len);
+ break;
+ }
+#endif
+ case BOOTM_STATE_OS_CMDLINE:
+ do_bootm_linux(BOOTM_STATE_OS_CMDLINE, argc, argv,
images);
+
Re: [U-Boot] [PATCH] ppc4xx: Canyonlands: Remove unnecessary FDT warning upon DTB fixup
Hi Wolfgang, On Monday 22 September 2008, Wolfgang Denk wrote: Depending on the configuration jumper SATA SELECT, U-Boot disabled either one PCIe node or the SATA node in the device tree blob. This patch removes the unnecessary and even confusing warning, when the node is not found at all. Signed-off-by: Stefan Roese [EMAIL PROTECTED] --- board/amcc/canyonlands/canyonlands.c | 16 1 files changed, 4 insertions(+), 12 deletions(-) Applied, thanks. Hope it's OK that I pulled this directly. Sure. Thanks. Best regards, Stefan = DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: [EMAIL PROTECTED] = ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] pci: Divided pci code of the powerpc
On Monday 22 September 2008, Andrew Dyer wrote:
I did a simple check.
Only powerpc and i386 and sh seem to use PCI.
If powerpc does not have a problem, would you commit it?
Do I have your go (or at least no veto) to apply this patch?
(forgot to reply all on this, already sent to the O.P.)
I think this is going to break some boards/archs. From the top
of the u-boot tree, if you do
find . -type f -exec grep pci_register_hose {} /dev/null \;
it shows all the source files that are registering a PCI bus. A quick
look shows there are MIPS, ARM, x86 in that list at least, that aren't
addressed by this change.
That's correct. This patch moves the original defines to the PPC specific
header and introduces new defines in the SH specific header. All other ARCH's
will not compile anymore when they try to include PCI support.
So, NAK from me. An acceptable patch would be to move the original defines at
least to all ARCH's already using PCI.
BTW: I fail to see what's really PPC specific about the pci code in question.
Nobuhiro, could you please elaborate what's the problem here?
Thanks.
Best regards,
Stefan
=
DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: [EMAIL PROTECTED]
=
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Re: [U-Boot] [PATCH] pci: Divided pci code of the powerpc
On Tuesday 23 September 2008, Andy Fleming wrote: I did a simple check. Only powerpc and i386 and sh seem to use PCI. If powerpc does not have a problem, would you commit it? Do I have your go (or at least no veto) to apply this patch? If some of that code is powerpc-only, maybe we should move the code out of pci.c, too? pci_hose_phys_to_bus() appears to be... board/eltec/bab7xx/pci.c only, actually. That doesn't seem to be correct. In include/pci.h: #define pci_phys_to_bus(dev, addr, flags) \ pci_hose_phys_to_bus(pci_bus_to_hose(PCI_BUS(dev)), (addr), (flags)) and later: #define pci_phys_to_mem(dev, addr) pci_phys_to_bus((dev), (addr), PCI_REGION_MEM) #define pci_phys_to_io(dev, addr) pci_phys_to_bus((dev), (addr), PCI_REGION_IO) So calling pci_phys_to_mem() or pci_phys_to_io() leads to a pci_hose_phys_to_bus() call in the end. Best regards, Stefan = DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: [EMAIL PROTECTED] = ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] 440spe MQ initialization
Set the MQ Read Passing MCIF Cycle limits to the recommended by AMCC values. This fixes the occasional 440SPe hard locking issues when the 440SPe's dedicated DMA engines are used (e.g. by the h/w accelerated RAID driver). Previously the appropriate initialization had been made in Linux, by the ppc440spe ADMA driver, which is wrong because modifying the MQ configuration registers after normal operation has begun is not supported and could have unpredictable results. Signed-off-by: Yuri Tikhonov [EMAIL PROTECTED] --- cpu/ppc4xx/44x_spd_ddr2.c | 10 ++ include/asm-ppc/ppc4xx-sdram.h |5 + 2 files changed, 11 insertions(+), 4 deletions(-) diff --git a/cpu/ppc4xx/44x_spd_ddr2.c b/cpu/ppc4xx/44x_spd_ddr2.c index f1d7684..995d5fe 100644 --- a/cpu/ppc4xx/44x_spd_ddr2.c +++ b/cpu/ppc4xx/44x_spd_ddr2.c @@ -2261,10 +2261,12 @@ static void program_memory_queue(unsigned long *dimm_populated, /* * Set optimal value for Memory Queue HB/LL Configuration registers */ - mtdcr(SDRAM_CONF1HB, mfdcr(SDRAM_CONF1HB) | SDRAM_CONF1HB_AAFR | - SDRAM_CONF1HB_RPEN | SDRAM_CONF1HB_RFTE); - mtdcr(SDRAM_CONF1LL, mfdcr(SDRAM_CONF1LL) | SDRAM_CONF1LL_AAFR | - SDRAM_CONF1LL_RPEN | SDRAM_CONF1LL_RFTE); + mtdcr(SDRAM_CONF1HB, (mfdcr(SDRAM_CONF1HB) ~SDRAM_CONF1HB_MASK) | + SDRAM_CONF1HB_AAFR | SDRAM_CONF1HB_RPEN | SDRAM_CONF1HB_RFTE | + SDRAM_CONF1HB_RPLM | SDRAM_CONF1HB_WRCL); + mtdcr(SDRAM_CONF1LL, (mfdcr(SDRAM_CONF1LL) ~SDRAM_CONF1LL_MASK) | + SDRAM_CONF1LL_AAFR | SDRAM_CONF1LL_RPEN | SDRAM_CONF1LL_RFTE | + SDRAM_CONF1LL_RPLM); mtdcr(SDRAM_CONFPATHB, mfdcr(SDRAM_CONFPATHB) | SDRAM_CONFPATHB_TPEN); #endif } diff --git a/include/asm-ppc/ppc4xx-sdram.h b/include/asm-ppc/ppc4xx-sdram.h index 8efa557..98faced 100644 --- a/include/asm-ppc/ppc4xx-sdram.h +++ b/include/asm-ppc/ppc4xx-sdram.h @@ -272,8 +272,11 @@ #define SDRAM_CONF1HB_PRPD 0x0008 /* PLB Read pipeline Disable - Bit 12 */ #define SDRAM_CONF1HB_PWPD 0x0004 /* PLB Write pipeline Disable - Bit 13 */ #define SDRAM_CONF1HB_PRW 0x0002 /* PLB Read Wait - Bit 14 */ +#define SDRAM_CONF1HB_RPLM 0x1000 /* Read Passing Limit 1 - Bits 16..19 */ #define SDRAM_CONF1HB_RPEN 0x0800 /* Read Passing Enable - Bit 20 */ #define SDRAM_CONF1HB_RFTE 0x0400 /* Read Flow Through Enable - Bit 21 */ +#define SDRAM_CONF1HB_WRCL 0x0080 /* MCIF Cycle Limit 1 - Bits 22..24 */ +#define SDRAM_CONF1HB_MASK 0xF380 /* RPLM WRCL mask */ #define SDRAM_ERRSTATHB(SDRAMQ_DCR_BASE+0x7) /* error status HB */ #define SDRAM_ERRADDUHB(SDRAMQ_DCR_BASE+0x8) /* error address upper 32 HB */ @@ -284,8 +287,10 @@ #define SDRAM_CONF1LL_PRPD 0x0008 /* PLB Read pipeline Disable - Bit 12 */ #define SDRAM_CONF1LL_PWPD 0x0004 /* PLB Write pipeline Disable - Bit 13 */ #define SDRAM_CONF1LL_PRW 0x0002 /* PLB Read Wait - Bit 14 */ +#define SDRAM_CONF1LL_RPLM 0x1000 /* Read Passing Limit 1 - Bits 16..19 */ #define SDRAM_CONF1LL_RPEN 0x0800 /* Read Passing Enable - Bit 20 */ #define SDRAM_CONF1LL_RFTE 0x0400 /* Read Flow Through Enable - Bit 21 */ +#define SDRAM_CONF1LL_MASK 0xF000 /* RPLM mask */ #define SDRAM_ERRSTATLL(SDRAMQ_DCR_BASE+0xC) /* error status LL */ #define SDRAM_ERRADDULL(SDRAMQ_DCR_BASE+0xD) /* error address upper 32 LL */ -- 1.5.6.1 Regards, Yuri -- Yuri Tikhonov, Senior Software Engineer Emcraft Systems, www.emcraft.com ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] 440spe MQ initialization
Hi Yuri, On Tuesday 23 September 2008, Yuri Tikhonov wrote: Set the MQ Read Passing MCIF Cycle limits to the recommended by AMCC values. This fixes the occasional 440SPe hard locking issues when the 440SPe's dedicated DMA engines are used (e.g. by the h/w accelerated RAID driver). Previously the appropriate initialization had been made in Linux, by the ppc440spe ADMA driver, which is wrong because modifying the MQ configuration registers after normal operation has begun is not supported and could have unpredictable results. AMCC just recently updated the 440SP(e) MQ initialization with this patch: commit 079589bcfb24ba11068460276a3cc9549ab5346f Author: Prodyut Hazarika [EMAIL PROTECTED] Date: Wed Aug 20 09:38:51 2008 -0700 ppc4xx: Optimize PLB4 Arbiter and Memory Queue settings for PPC440SP/SPe, PPC405EX and PPC460EX/GT/SX - Read pipeline depth set to 4 for PPC440SP/SPE, PPC405EX, PPC460EX/GT/SX processors - Moved PLB4 Arbiter register definitions to ppc4xx.h since it is shared across processors (405 and 440/460) - Optimize Memory Queue settings for PPC440SP/SPE and PPC460EX/GT/SX processors - Add register bit definitions for Memory Queue Configuration registers Signed-off-by: Prodyut Hazarika [EMAIL PROTECTED] Signed-off-by: Stefan Roese [EMAIL PROTECTED] I have a bad feeling changing this optimized settings without AMCC's specific ACK. Prodyut, are you ok with Yuri's change? Thanks. Best regards, Stefan = DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: [EMAIL PROTECTED] = ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] 440spe MQ initialization
On Tuesday 23 September 2008, Yuri Tikhonov wrote: BTW, when I said recommended by AMCC in the patch description I referred to the following information forwarded to me by Wolfgang Denk on Tue Mar 18 2008: --- Dear Yuri, here is some additional (and hopefully helpful) information from AMCC regarding the observed hangs on the katmai board: If possible, can you please check if you still see the lock up when you program MQ as follows: set value in HB and if you are using LL also as follows: MQ0_CF1H = 0x80001C80 MQ0_CF1L = 0x80001C80 Additionally, make sure that your PLB settings are: PLB0_ACR = 0xDF00 ( 4 deep read and 2 deep write) PLB1_ACR = 0xDF00 ( 4 deep read and 2 deep write) Please let me know if this fixes the issue. I also would like to know how you are programming your DMA and how is the traffic is pipelined. Regards, Olga Buchonina AMCC PowerPC Applications Engineering Understood. I just would like to see an ACK from AMCC on this since they just updated this MQ init code. Best regards, Stefan = DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: [EMAIL PROTECTED] = ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] MPC8555CDS broken on TOT (commit 8fd4166c, ELDK 4.2)
Hello, TOT U-Boot (commit 8fd4166c, compiled with ELDK 4.2) for the MPC8555CDS target is broken with the following symptoms: [flash the 8fd4166c image and reset the board] U-Boot 2008.10-rc2-00018-g8fd4166 (Sep 23 2008 - 10:23:59) CPU: 8555E, Version: 1.1, (0x80790011) Core: E500, Version: 2.0, (0x80200020) Clock Configuration: CPU: 825 MHz, CCB: 330 MHz, DDR: 165 MHz (330 MT/s data rate), LBC: 82 MHz CPM: 330 Mhz L1:D-cache 32 kB enabled I-cache 32 kB enabled Board: CDS Version 0x11, PCI Slot 1 CPU Board Revision 0.0 (0x) PCI1: 32 bit, 33 MHz, sync PCI2: 32 bit, 66 MHz, sync I2C: ready DRAM: Initializing SDRAM: 64 MB DDR: 256 MB And the output stops here, console is dead. Can't give more details as to what's going on the board -- don't have a HW debugger available. After a power-cycle, the board doesn't go as far as the first time after reset: U-Boot 2008.10-rc2-00018-g8fd4166 (Sep 23 2008 - 10:23:59) CPU: 8555E, Version: 1.1, (0x80790011) Core: E500, Version: 2.0, (0x80200020) Clock Configuration: CPU: 825 MHz, CCB: 330 MHz, DDR: 165 MHz (330 MT/s data rate), LBC: 82 MHz CPM: 330 Mhz L1:D-cache 32 kB enabled I-cache 32 kB enabled Subsequent power-cycles result in the same output, i.e., the output dies after the I-cache 32 kB enabled line. The U-Boot works fine as of commit 71074abb, but can't do a full bisection at the moment (can't flash the board easily). Brief search of the ML archives didn't reveal any such issue reported, so I'm posting this as a data point, and in the hopes that someone can take further investigation from here. I'll be happy to provide more details if needed, and might also be able to test a potential fix. Regards, Bartlomiej Sieka ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] stability USB memory sticks for the common OHCI USB layer.
Hello Stelian, Thanks for the logging. This is useful info. usb_control_msg: request: 0x1, requesttype: 0x23, value 0x14 index 0x1 length 0x0 New Device 1 usb_control_msg: request: 0x6, requesttype: 0x80, value 0x100 index 0x0 length 0x40 ERROR: USB-error: DEVICENOTRESPONDING: Device did not respond to token (IN) or did not provide a handshake (OUT) (5) Apparently the 1st access to the device already fails. Can you please try to set #define CONFIG_LEGACY_USB_INIT_SEQ 1 in your include/configs/board.h ? This enables the old way U-boot does the device initialisation. If this helps I have to check 1 of my patches, which changed this behaviour to make it compliant to the USB standard. The legacy implementation of U-boot is just wrong, but it might work. Kind Regards, Remy ERROR: USB-error: DEVICENOTRESPONDING: Device did not respond to token (IN) or did not provide a handshake (OUT) (5) usb_new_device: 64 byte descr usb_control_msg: request: 0x3, requesttype: 0x23, value 0x4 index 0x1 length 0x0 usb_control_msg: request: 0x0, requesttype: 0xA3, value 0x0 index 0x1 length 0x4 usb_control_msg: request: 0x1, requesttype: 0x23, value 0x14 index 0x1 length 0x0 set address 2 usb_control_msg: request: 0x5, requesttype: 0x0, value 0x2 index 0x0 length 0x0 ERROR: submit_control_message: pipesize for pipe 8000 is zero USB device not accepting new address (error=8000) usb_control_msg: request: 0x1, requesttype: 0x23, value 0x1 index 0x1 length 0x0 usb_control_msg: request: 0x0, requesttype: 0xA3, value 0x0 index 0x2 length 0x4 2 USB Device(s) found scanning bus for storage devices... 0 Storage Device(s) found U-Boot -- Stelian Pop [EMAIL PROTECTED] ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] 440spe MQ initialization
Hello, BTW, when I said recommended by AMCC in the patch description I referred to the following information forwarded to me by Wolfgang Denk on Tue Mar 18 2008: --- Dear Yuri, here is some additional (and hopefully helpful) information from AMCC regarding the observed hangs on the katmai board: If possible, can you please check if you still see the lock up when you program MQ as follows: set value in HB and if you are using LL also as follows: MQ0_CF1H = 0x80001C80 MQ0_CF1L = 0x80001C80 Additionally, make sure that your PLB settings are: PLB0_ACR = 0xDF00 ( 4 deep read and 2 deep write) PLB1_ACR = 0xDF00 ( 4 deep read and 2 deep write) Please let me know if this fixes the issue. I also would like to know how you are programming your DMA and how is the traffic is pipelined. Regards, Olga Buchonina AMCC PowerPC Applications Engineering Best regards, Wolfgang Denk --- On Tuesday, September 23, 2008 you wrote: Hi Yuri, On Tuesday 23 September 2008, Yuri Tikhonov wrote: Set the MQ Read Passing MCIF Cycle limits to the recommended by AMCC values. This fixes the occasional 440SPe hard locking issues when the 440SPe's dedicated DMA engines are used (e.g. by the h/w accelerated RAID driver). Previously the appropriate initialization had been made in Linux, by the ppc440spe ADMA driver, which is wrong because modifying the MQ configuration registers after normal operation has begun is not supported and could have unpredictable results. AMCC just recently updated the 440SP(e) MQ initialization with this patch: commit 079589bcfb24ba11068460276a3cc9549ab5346f Author: Prodyut Hazarika [EMAIL PROTECTED] Date: Wed Aug 20 09:38:51 2008 -0700 ppc4xx: Optimize PLB4 Arbiter and Memory Queue settings for PPC440SP/SPe, PPC405EX and PPC460EX/GT/SX - Read pipeline depth set to 4 for PPC440SP/SPE, PPC405EX, PPC460EX/GT/SX processors - Moved PLB4 Arbiter register definitions to ppc4xx.h since it is shared across processors (405 and 440/460) - Optimize Memory Queue settings for PPC440SP/SPE and PPC460EX/GT/SX processors - Add register bit definitions for Memory Queue Configuration registers Signed-off-by: Prodyut Hazarika [EMAIL PROTECTED] Signed-off-by: Stefan Roese [EMAIL PROTECTED] I have a bad feeling changing this optimized settings without AMCC's specific ACK. Prodyut, are you ok with Yuri's change? Thanks. Best regards, Stefan = DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: [EMAIL PROTECTED] = Regards, Yuri -- Yuri Tikhonov, Senior Software Engineer Emcraft Systems, www.emcraft.com ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [RFC][PATCH v2] bootm: Add sub commands
Dear Kumar Gala,
In message [EMAIL PROTECTED] you wrote:
This version:
* cleans ups issues pointed out by Jerry
* adds a state machine to the command processing
* adds bd_t and cmdline process on linux for ppc
Thanks a lot.
I'm still missing the possibility to use longer sub-command names, and
code to parse these in a sane way.
+int do_bootm_subcommand (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+{
+ int ret = 0;
+ int state;
+
+ /* start */
+ if (argv[1][0] == 's') {
+ argc--;
+ argv++;
+ return bootm_start(cmdtp, flag, argc, argv);
+ }
+ /* loados */
+ else if (argv[1][0] == 'l') {
+ state = BOOTM_STATE_LOADOS;
+ }
+ /* ramdisk relocate */
+#if defined(CONFIG_PPC) || defined(CONFIG_M68K) || defined(CONFIG_SPARC)
+ else if (argv[1][0] == 'r') {
+ state = BOOTM_STATE_RAMDISK;
+ }
+#endif
+#ifdef CONFIG_OF_LIBFDT
+ /* fdt relocate */
+ else if (argv[1][0] == 'f') {
+ state = BOOTM_STATE_FDT;
+ }
+#endif
+ /* bd_t setup */
+ else if (argv[1][0] == 'b') {
+ state = BOOTM_STATE_OS_BD_T;
+ }
+ /* cmdline setup */
+ else if (argv[1][0] == 'c') {
+ state = BOOTM_STATE_OS_CMDLINE;
+ }
+ /* prep os */
+ else if (argv[1][0] == 'p') {
+ state = BOOTM_STATE_OS_PREP;
+ }
+ /* go */
+ else if (argv[1][0] == 'g') {
+ state = BOOTM_STATE_OS_GO;
+ }
+ /* Unrecognized command */
+ else {
+ printf (Usage:\n%s\n, cmdtp-usage);
+ return 1;
+ }
I really wonder why you didn't use a switch statement here?
Anyway, as mentioned before, I do not like to be restrricted to one
letter subcommand names - we would rather sooner than later come up
with names that nobody can remember.
Maybe we can extend find_cmd() (in common/command.c) to take an
alternative command table (for the sub-commands) and reuse the
existing code?
[And then probably do this also for some other commands that take
subcommands..]
Best regards,
Wolfgang Denk
--
DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: [EMAIL PROTECTED]
In matters of principle, stand like a rock; in matters of taste,
swim with the current.- Thomas Jefferson
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Re: [U-Boot] U-Boot on ARM9
Hello. Thank you for your quick response. 2008/9/22 Hebbar [EMAIL PROTECTED]: [skip] Generally bootloader doesnt use IRQ for running. But if u need to use IRQ/FIQ u need to setup stacks for the Same. Right, because U-Boot is basically needed to initialize hardware and prepaare it to launch OS on it. IRQ/FIQ may be necessary to run standalone code within bootlloader ? -- Roman Mashak ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] PrimeCell Peripherals
Hello all, the board I'm porting U-Boot on, has several peripheral devices, which are, according to datasheet, are based on PrimeCell PLxx blocks (for example, vector interrupt controller is PL190 based; GPIOs are based on PL061 block and so on). I understand that PrimeCells are IP cores, which build up a variety of controllers for peripherals. Therefore I wonder, how well does U-Boot support ARM's PrimeCell peripherals? Greping sources gave only a couple of hits. I think these basic controllers like GPIO, interrupt controller etc., which are widely used on many ARM based platforms (i.e. (AMBA bus-compliant), but marked in U-Boot sources with different names or so ? Thanks in advance. -- Roman Mashak ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [RFC][PATCH v3] bootm: Add sub commands
* Use explicit command name matches
- k
---
common/cmd_bootm.c | 150 +-
include/image.h| 20 -
lib_ppc/bootm.c| 262 ++--
3 files changed, 338 insertions(+), 94 deletions(-)
diff --git a/common/cmd_bootm.c b/common/cmd_bootm.c
index 19257bb..3a20ad2 100644
--- a/common/cmd_bootm.c
+++ b/common/cmd_bootm.c
@@ -34,6 +34,7 @@
#include bzlib.h
#include environment.h
#include lmb.h
+#include linux/ctype.h
#include asm/byteorder.h
#if defined(CONFIG_CMD_USB)
@@ -273,7 +274,7 @@ static int bootm_start(cmd_tbl_t *cmdtp, int flag, int
argc, char *argv[])
}
images.os.start = (ulong)os_hdr;
- images.valid = 1;
+ images.state = BOOTM_STATE_START;
return 0;
}
@@ -376,6 +377,121 @@ static int bootm_load_os(image_info_t os, ulong
*load_end, int boot_progress)
return 0;
}
+int do_bootm_subcommand (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+{
+ int ret = 0;
+ int state;
+
+ /* start */
+ if (strcmp(argv[1], start) == 0) {
+ argc--;
+ argv++;
+ return bootm_start(cmdtp, flag, argc, argv);
+ }
+ /* loados */
+ else if (strcmp(argv[1], loados) == 0) {
+ state = BOOTM_STATE_LOADOS;
+ }
+ /* ramdisk relocate */
+#if defined(CONFIG_PPC) || defined(CONFIG_M68K) || defined(CONFIG_SPARC)
+ else if (strcmp(argv[1], ramdisk) == 0) {
+ state = BOOTM_STATE_RAMDISK;
+ }
+#endif
+#ifdef CONFIG_OF_LIBFDT
+ /* fdt relocate */
+ else if (strcmp(argv[1], fdt) == 0) {
+ state = BOOTM_STATE_FDT;
+ }
+#endif
+ /* bd_t setup */
+ else if (strcmp(argv[1], bdt) == 0) {
+ state = BOOTM_STATE_OS_BD_T;
+ }
+ /* cmdline setup */
+ else if (strcmp(argv[1], cmdline) == 0) {
+ state = BOOTM_STATE_OS_CMDLINE;
+ }
+ /* prep os */
+ else if (strcmp(argv[1], prepos) == 0) {
+ state = BOOTM_STATE_OS_PREP;
+ }
+ /* go */
+ else if (strcmp(argv[1], go) == 0) {
+ state = BOOTM_STATE_OS_GO;
+ }
+ /* Unrecognized command */
+ else {
+ printf (Usage:\n%s\n, cmdtp-usage);
+ return 1;
+ }
+
+ if (images.state = state) {
+ printf (Trying to execute a command out of order\n);
+ printf (Usage:\n%s\n, cmdtp-usage);
+ return 1;
+ }
+
+ images.state |= state;
+
+ switch (state) {
+ ulong load_end;
+ case BOOTM_STATE_START:
+ /* should never occur */
+ break;
+ case BOOTM_STATE_LOADOS:
+ ret = bootm_load_os(images.os, load_end, 0);
+ if (ret)
+ return ret;
+
+ lmb_reserve(images.lmb, images.os.load,
+ (load_end - images.os.load));
+ break;
+#if defined(CONFIG_PPC) || defined(CONFIG_M68K) || defined(CONFIG_SPARC)
+ case BOOTM_STATE_RAMDISK:
+ {
+ ulong rd_len = images.rd_end - images.rd_start;
+ char str[17];
+
+ ret = boot_ramdisk_high(images.lmb, images.rd_start,
+ rd_len, images.initrd_start,
images.initrd_end);
+ if (ret)
+ return ret;
+
+ sprintf(str, %lx, images.initrd_start);
+ setenv(initrd_start, str);
+ sprintf(str, %lx, images.initrd_end);
+ setenv(initrd_end, str);
+ }
+ break;
+#endif
+#ifdef CONFIG_OF_LIBFDT
+ case BOOTM_STATE_FDT:
+ {
+ ulong bootmap_base = getenv_bootm_low();
+ ret = boot_relocate_fdt(images.lmb, bootmap_base,
+ images.ft_addr, images.ft_len);
+ break;
+ }
+#endif
+ case BOOTM_STATE_OS_CMDLINE:
+ do_bootm_linux(BOOTM_STATE_OS_CMDLINE, argc, argv,
images);
+ break;
+ case BOOTM_STATE_OS_BD_T:
+ do_bootm_linux(BOOTM_STATE_OS_BD_T, argc, argv,
images);
+ break;
+ case BOOTM_STATE_OS_PREP:
+ do_bootm_linux(BOOTM_STATE_OS_PREP, argc, argv,
images);
+ break;
+ case BOOTM_STATE_OS_GO:
+ disable_interrupts();
+ do_bootm_linux(BOOTM_STATE_OS_GO, argc, argv, images);
+ break;
+ }
+
+ return ret;
+}
+
Re: [U-Boot] [PATCH] 440spe MQ initialization
Yuriy/Stefan- This is AMCC confirmation about configuration. Regards, Olga Buchonina AMCC PowerPC Applications Engineering -Original Message- From: Stefan Roese [mailto:[EMAIL PROTECTED] Sent: Tuesday, September 23, 2008 4:43 AM To: Yuri Tikhonov Cc: u-boot@lists.denx.de; Prodyut Hazarika; Olga Buchonina Subject: Re: [U-Boot] [PATCH] 440spe MQ initialization On Tuesday 23 September 2008, Yuri Tikhonov wrote: BTW, when I said recommended by AMCC in the patch description I referred to the following information forwarded to me by Wolfgang Denk on Tue Mar 18 2008: --- Dear Yuri, here is some additional (and hopefully helpful) information from AMCC regarding the observed hangs on the katmai board: If possible, can you please check if you still see the lock up when you program MQ as follows: set value in HB and if you are using LL also as follows: MQ0_CF1H = 0x80001C80 MQ0_CF1L = 0x80001C80 Additionally, make sure that your PLB settings are: PLB0_ACR = 0xDF00 ( 4 deep read and 2 deep write) PLB1_ACR = 0xDF00 ( 4 deep read and 2 deep write) Please let me know if this fixes the issue. I also would like to know how you are programming your DMA and how is the traffic is pipelined. Regards, Olga Buchonina AMCC PowerPC Applications Engineering Understood. I just would like to see an ACK from AMCC on this since they just updated this MQ init code. Best regards, Stefan = DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: [EMAIL PROTECTED] = CONFIDENTIALITY NOTICE: This e-mail message, including any attachments, is for the sole use of the intended recipient(s) and contains information that is confidential and proprietary to Applied Micro Circuits Corporation or its subsidiaries. It is to be used solely for the purpose of furthering the parties' business relationship. All unauthorized review, use, disclosure or distribution is prohibited. If you are not the intended recipient, please contact the sender by reply e-mail and destroy all copies of the original message. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [RFC] exposing finding a command for subcommands
How about something like this for exposing the command table code for
subcommands. I'll follow this up with an example of usage based on the
bootm subcommand patch
- k
A ---
common/command.c | 14 ++
include/command.h |7 +++
2 files changed, 17 insertions(+), 4 deletions(-)
diff --git a/common/command.c b/common/command.c
index aca57b2..d8e1495 100644
--- a/common/command.c
+++ b/common/command.c
@@ -341,10 +341,10 @@ cmd_tbl_t __u_boot_cmd_question_mark Struct_Section = {
/***
* find command table entry for a command
*/
-cmd_tbl_t *find_cmd (const char *cmd)
+cmd_tbl_t *__find_cmd (const char *cmd, cmd_tbl_t *table, int table_len)
{
cmd_tbl_t *cmdtp;
- cmd_tbl_t *cmdtp_temp = __u_boot_cmd_start;/*Init value */
+ cmd_tbl_t *cmdtp_temp = table; /*Init value */
const char *p;
int len;
int n_found = 0;
@@ -355,8 +355,8 @@ cmd_tbl_t *find_cmd (const char *cmd)
*/
len = ((p = strchr(cmd, '.')) == NULL) ? strlen (cmd) : (p - cmd);
- for (cmdtp = __u_boot_cmd_start;
-cmdtp != __u_boot_cmd_end;
+ for (cmdtp = table;
+cmdtp != table + table_len;
cmdtp++) {
if (strncmp (cmd, cmdtp-name, len) == 0) {
if (len == strlen (cmdtp-name))
@@ -373,6 +373,12 @@ cmd_tbl_t *find_cmd (const char *cmd)
return NULL;/* not found or ambiguous command */
}
+cmd_tbl_t *find_cmd (const char *cmd)
+{
+ int len = __u_boot_cmd_end - __u_boot_cmd_start;
+ return __find_cmd(cmd, __u_boot_cmd_start, len);
+}
+
#ifdef CONFIG_AUTO_COMPLETE
int var_complete(int argc, char *argv[], char last_char, int maxv, char
*cmdv[])
diff --git a/include/command.h b/include/command.h
index f92383d..03d340c 100644
--- a/include/command.h
+++ b/include/command.h
@@ -62,6 +62,7 @@ extern cmd_tbl_t __u_boot_cmd_end;
/* common/command.c */
cmd_tbl_t *find_cmd(const char *cmd);
+cmd_tbl_t *__find_cmd (const char *cmd, cmd_tbl_t *table, int table_len);
#ifdef CONFIG_AUTO_COMPLETE
extern void install_auto_complete(void);
@@ -102,11 +103,17 @@ extern int cmd_get_data_size(char* arg, int default_size);
#define U_BOOT_CMD(name,maxargs,rep,cmd,usage,help) \
cmd_tbl_t __u_boot_cmd_##name Struct_Section = {#name, maxargs, rep, cmd,
usage, help}
+#define U_BOOT_CMD_INIT(name,maxargs,rep,cmd,usage,help) \
+{#name, maxargs, rep, cmd, usage, help}
+
#else /* no long help info */
#define U_BOOT_CMD(name,maxargs,rep,cmd,usage,help) \
cmd_tbl_t __u_boot_cmd_##name Struct_Section = {#name, maxargs, rep, cmd,
usage}
+#define U_BOOT_CMD_INIT(name,maxargs,rep,cmd,usage,help) \
+{#name, maxargs, rep, cmd, usage}
+
#endif /* CFG_LONGHELP */
#endif /* __COMMAND_H */
--
1.5.5.1
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Re: [U-Boot] [RFC] exposing finding a command for subcommands
Here's an example of how we sould use this. Obviously the code after the
if (cmd) would change.
- k
diff --git a/common/cmd_bootm.c b/common/cmd_bootm.c
index 3a20ad2..64e7571 100644
--- a/common/cmd_bootm.c
+++ b/common/cmd_bootm.c
@@ -377,10 +377,23 @@ static int bootm_load_os(image_info_t os, ulong
*load_end, int boot_progress)
return 0;
}
+cmd_tbl_t cmd_bootm_sub[] = {
+ U_BOOT_CMD_INIT(start, CFG_MAXARGS, 1, BOOTM_STATE_START, , ),
+ U_BOOT_CMD_INIT(loados, CFG_MAXARGS, 1, BOOTM_STATE_LOADOS, , ),
+ U_BOOT_CMD_INIT(ramdisk, CFG_MAXARGS, 1, BOOTM_STATE_RAMDISK, , ),
+};
+
+
int do_bootm_subcommand (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
{
int ret = 0;
int state;
+ cmd_tbl_t *cmd;
+
+ cmd = __find_cmd(argv[1], cmd_bootm_sub[0], ARRAY_SIZE(cmd_bootm_sub));
+
+ if (cmd)
+ printf(%s %d\n, cmd-name, cmd-cmd);
/* start */
if (strcmp(argv[1], start) == 0) {
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Re: [U-Boot] PrimeCell Peripherals
Hi, how well does U-Boot support ARM's PrimeCell peripherals? What do u mean by support. I use U-booot as The Primary Bootloader on arm926ej-s based Board. By Default U-boot supports few Primecell peripherals drivers like PL0x1 UART. I developed few others my self, like pl18x mmc, rtc, gpio. I recently sent a patch for RTC pl031. U too can contribute if u can send patch's for other peripherals. Regards Gururaja -- View this message in context: http://www.nabble.com/-U-Boot--PrimeCell-Peripherals-tp19627089p19628769.html Sent from the Uboot - Users mailing list archive at Nabble.com. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [RFC] exposing finding a command for subcommands
Dear Kumar Gala,
In message [EMAIL PROTECTED] you wrote:
How about something like this for exposing the command table code for
subcommands. I'll follow this up with an example of usage based on the
bootm subcommand patch
Looks good to me. Just a question:
-cmd_tbl_t *find_cmd (const char *cmd)
+cmd_tbl_t *__find_cmd (const char *cmd, cmd_tbl_t *table, int table_len)
That means we would export __find_cmd() to other functions? We
shouldn't do that - __ names are reserved.
+#define U_BOOT_CMD_INIT(name,maxargs,rep,cmd,usage,help) \
+{#name, maxargs, rep, cmd, usage, help}
+
I think INIT is not a good name here. To me it sounds like a macro
to use just once. How about ENTRY or MKENT or something like this?
Best regards,
Wolfgang Denk
--
DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: [EMAIL PROTECTED]
Open the pod bay doors, HAL.- Dave Bowman, 2001
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[U-Boot] [PATCH] mpc83xx: add h/w flash protection to board configs (was Re: erase and saveenv stop working after using fw_setenv)
On Tue, 16 Sep 2008 11:04:50 +0200
Wolfgang Denk [EMAIL PROTECTED] wrote:
The problem is that the MPC8323ERDB board has flash chips that
support hardware flash protection (locking), but the board config
file does not select the CFG_FLASH_PROTECTION option. Therefore
U-Boot will not make any attempts to lock or unlock any flash
sectors.
I think two things should be done:
a) Kim, I think it would make sense to add CFG_FLASH_PROTECTION to
all board configurations that use lockable flash chips. I would
even consider this a bug fix and pull it into the upcoming 2008-10
release, if you want.
ok, I'll leave non-fsl boards up to their maintainers though:
From 6074f0f040f2870135af498c16141f6432fb92f9 Mon Sep 17 00:00:00 2001
From: Kim Phillips [EMAIL PROTECTED]
Date: Tue, 23 Sep 2008 09:38:49 -0500
Subject: [PATCH] mpc83xx: add h/w flash protection to board configs
the operating system may leave flash in a h/w locked state after writing.
This allows u-boot to continue to write flash by enabling h/w unlocking
by default.
Signed-off-by: Kim Phillips [EMAIL PROTECTED]
---
include/configs/MPC8313ERDB.h |1 +
include/configs/MPC8315ERDB.h |1 +
include/configs/MPC8323ERDB.h |1 +
include/configs/MPC832XEMDS.h |1 +
include/configs/MPC8349EMDS.h |1 +
include/configs/MPC8349ITX.h |1 +
include/configs/MPC8360EMDS.h |1 +
include/configs/MPC837XEMDS.h |1 +
include/configs/MPC837XERDB.h |1 +
9 files changed, 9 insertions(+), 0 deletions(-)
diff --git a/include/configs/MPC8313ERDB.h b/include/configs/MPC8313ERDB.h
index 55d7852..b361217 100644
--- a/include/configs/MPC8313ERDB.h
+++ b/include/configs/MPC8313ERDB.h
@@ -174,6 +174,7 @@
#define CONFIG_FLASH_CFI_DRIVER/* use the CFI driver */
#define CFG_FLASH_BASE 0xFE00 /* start of FLASH */
#define CFG_FLASH_SIZE 8 /* flash size in MB */
+#define CFG_FLASH_PROTECTION 1 /* Use h/w Flash protection. */
#define CFG_FLASH_EMPTY_INFO /* display empty sectors */
#define CFG_FLASH_USE_BUFFER_WRITE /* buffer up multiple bytes */
diff --git a/include/configs/MPC8315ERDB.h b/include/configs/MPC8315ERDB.h
index 5879a82..83f64c6 100644
--- a/include/configs/MPC8315ERDB.h
+++ b/include/configs/MPC8315ERDB.h
@@ -193,6 +193,7 @@
#define CFG_FLASH_BASE 0xFE00 /* FLASH base address */
#define CFG_FLASH_SIZE 8 /* FLASH size is 8M */
+#define CFG_FLASH_PROTECTION 1 /* Use h/w Flash protection. */
#define CFG_LBLAWBAR0_PRELIM CFG_FLASH_BASE /* Window base at flash base */
#define CFG_LBLAWAR0_PRELIM0x8016 /* 8MB window size */
diff --git a/include/configs/MPC8323ERDB.h b/include/configs/MPC8323ERDB.h
index 977142b..697c5ad 100644
--- a/include/configs/MPC8323ERDB.h
+++ b/include/configs/MPC8323ERDB.h
@@ -181,6 +181,7 @@
#define CONFIG_FLASH_CFI_DRIVER/* use the CFI driver */
#define CFG_FLASH_BASE 0xFE00 /* FLASH base address */
#define CFG_FLASH_SIZE 16 /* FLASH size is 16M */
+#define CFG_FLASH_PROTECTION 1 /* Use h/w Flash protection. */
#define CFG_LBLAWBAR0_PRELIM CFG_FLASH_BASE /* Window base at flash base */
#define CFG_LBLAWAR0_PRELIM0x8018 /* 32MB window size */
diff --git a/include/configs/MPC832XEMDS.h b/include/configs/MPC832XEMDS.h
index 01cf557..9a9b500 100644
--- a/include/configs/MPC832XEMDS.h
+++ b/include/configs/MPC832XEMDS.h
@@ -169,6 +169,7 @@
#define CONFIG_FLASH_CFI_DRIVER/* use the CFI driver */
#define CFG_FLASH_BASE 0xFE00 /* FLASH base address */
#define CFG_FLASH_SIZE 16 /* FLASH size is 16M */
+#define CFG_FLASH_PROTECTION 1 /* Use h/w Flash protection. */
#define CFG_LBLAWBAR0_PRELIM CFG_FLASH_BASE /* Window base at flash base */
#define CFG_LBLAWAR0_PRELIM0x8018 /* 32MB window size */
diff --git a/include/configs/MPC8349EMDS.h b/include/configs/MPC8349EMDS.h
index 87f1672..8135254 100644
--- a/include/configs/MPC8349EMDS.h
+++ b/include/configs/MPC8349EMDS.h
@@ -156,6 +156,7 @@
#define CONFIG_FLASH_CFI_DRIVER/* use the CFI driver */
#define CFG_FLASH_BASE 0xFE00 /* start of FLASH */
#define CFG_FLASH_SIZE 32 /* max flash size in MB */
+#define CFG_FLASH_PROTECTION 1 /* Use h/w Flash protection. */
/* #define CFG_FLASH_USE_BUFFER_WRITE */
#define CFG_BR0_PRELIM (CFG_FLASH_BASE | /* flash Base address
*/ \
diff --git a/include/configs/MPC8349ITX.h b/include/configs/MPC8349ITX.h
index fa0c0a7..81ea9f8 100644
--- a/include/configs/MPC8349ITX.h
+++ b/include/configs/MPC8349ITX.h
@@ -190,6 +190,7 @@ boards, we say we have two, but don't display a message if
we find only one. */
#define CFG_FLASH_BANKS_LIST {CFG_FLASH_BASE, CFG_FLASH_BASE +
[U-Boot] [PATCH] Expose command table search for sub-commands
Sub-command can benefit from using the same table and search functions
that top level commands have. Expose this functionality by refactoring
find_cmd() and introducing find_cmd_tbl() that sub-command processing
can call.
Signed-off-by: Kumar Gala [EMAIL PROTECTED]
---
common/command.c | 14 ++
include/command.h |7 +++
2 files changed, 17 insertions(+), 4 deletions(-)
diff --git a/common/command.c b/common/command.c
index aca57b2..fc9d79c 100644
--- a/common/command.c
+++ b/common/command.c
@@ -341,10 +341,10 @@ cmd_tbl_t __u_boot_cmd_question_mark Struct_Section = {
/***
* find command table entry for a command
*/
-cmd_tbl_t *find_cmd (const char *cmd)
+cmd_tbl_t *find_cmd_tbl (const char *cmd, cmd_tbl_t *table, int table_len)
{
cmd_tbl_t *cmdtp;
- cmd_tbl_t *cmdtp_temp = __u_boot_cmd_start;/*Init value */
+ cmd_tbl_t *cmdtp_temp = table; /*Init value */
const char *p;
int len;
int n_found = 0;
@@ -355,8 +355,8 @@ cmd_tbl_t *find_cmd (const char *cmd)
*/
len = ((p = strchr(cmd, '.')) == NULL) ? strlen (cmd) : (p - cmd);
- for (cmdtp = __u_boot_cmd_start;
-cmdtp != __u_boot_cmd_end;
+ for (cmdtp = table;
+cmdtp != table + table_len;
cmdtp++) {
if (strncmp (cmd, cmdtp-name, len) == 0) {
if (len == strlen (cmdtp-name))
@@ -373,6 +373,12 @@ cmd_tbl_t *find_cmd (const char *cmd)
return NULL;/* not found or ambiguous command */
}
+cmd_tbl_t *find_cmd (const char *cmd)
+{
+ int len = __u_boot_cmd_end - __u_boot_cmd_start;
+ return find_cmd_tbl(cmd, __u_boot_cmd_start, len);
+}
+
#ifdef CONFIG_AUTO_COMPLETE
int var_complete(int argc, char *argv[], char last_char, int maxv, char
*cmdv[])
diff --git a/include/command.h b/include/command.h
index f92383d..78feea5 100644
--- a/include/command.h
+++ b/include/command.h
@@ -62,6 +62,7 @@ extern cmd_tbl_t __u_boot_cmd_end;
/* common/command.c */
cmd_tbl_t *find_cmd(const char *cmd);
+cmd_tbl_t *find_cmd_tbl (const char *cmd, cmd_tbl_t *table, int table_len);
#ifdef CONFIG_AUTO_COMPLETE
extern void install_auto_complete(void);
@@ -102,11 +103,17 @@ extern int cmd_get_data_size(char* arg, int default_size);
#define U_BOOT_CMD(name,maxargs,rep,cmd,usage,help) \
cmd_tbl_t __u_boot_cmd_##name Struct_Section = {#name, maxargs, rep, cmd,
usage, help}
+#define U_BOOT_CMD_MKENT(name,maxargs,rep,cmd,usage,help) \
+{#name, maxargs, rep, cmd, usage, help}
+
#else /* no long help info */
#define U_BOOT_CMD(name,maxargs,rep,cmd,usage,help) \
cmd_tbl_t __u_boot_cmd_##name Struct_Section = {#name, maxargs, rep, cmd,
usage}
+#define U_BOOT_CMD_MKENT(name,maxargs,rep,cmd,usage,help) \
+{#name, maxargs, rep, cmd, usage}
+
#endif /* CFG_LONGHELP */
#endif /* __COMMAND_H */
--
1.5.5.1
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[U-Boot] [RFC][PATCH v4] bootm: Add sub commands
* Use new find_cmd_tbl() to process sub-commands
If this looks good I'll go ahead and clean it up for the other arches and OSes.
---
common/cmd_bootm.c | 142 -
include/image.h| 20 -
lib_ppc/bootm.c| 262 ++--
3 files changed, 330 insertions(+), 94 deletions(-)
diff --git a/common/cmd_bootm.c b/common/cmd_bootm.c
index 19257bb..e6dcb7a 100644
--- a/common/cmd_bootm.c
+++ b/common/cmd_bootm.c
@@ -34,6 +34,7 @@
#include bzlib.h
#include environment.h
#include lmb.h
+#include linux/ctype.h
#include asm/byteorder.h
#if defined(CONFIG_CMD_USB)
@@ -273,7 +274,7 @@ static int bootm_start(cmd_tbl_t *cmdtp, int flag, int
argc, char *argv[])
}
images.os.start = (ulong)os_hdr;
- images.valid = 1;
+ images.state = BOOTM_STATE_START;
return 0;
}
@@ -376,6 +377,113 @@ static int bootm_load_os(image_info_t os, ulong
*load_end, int boot_progress)
return 0;
}
+/* we over load the cmd field with our state machine info instead of a
+ * function pointer */
+cmd_tbl_t cmd_bootm_sub[] = {
+ U_BOOT_CMD_MKENT(start, 0, 1, (void *)BOOTM_STATE_START, , ),
+ U_BOOT_CMD_MKENT(loados, 0, 1, (void *)BOOTM_STATE_LOADOS, , ),
+#if defined(CONFIG_PPC) || defined(CONFIG_M68K) || defined(CONFIG_SPARC)
+ U_BOOT_CMD_MKENT(ramdisk, 0, 1, (void *)BOOTM_STATE_RAMDISK, , ),
+#endif
+#ifdef CONFIG_OF_LIBFDT
+ U_BOOT_CMD_MKENT(fdt, 0, 1, (void *)BOOTM_STATE_FDT, , ),
+#endif
+ U_BOOT_CMD_MKENT(bdt, 0, 1, (void *)BOOTM_STATE_OS_BD_T, , ),
+ U_BOOT_CMD_MKENT(cmdline, 0, 1, (void *)BOOTM_STATE_OS_CMDLINE, , ),
+ U_BOOT_CMD_MKENT(prep, 0, 1, (void *)BOOTM_STATE_OS_PREP, , ),
+ U_BOOT_CMD_MKENT(go, 0, 1, (void *)BOOTM_STATE_OS_GO, , ),
+};
+
+int do_bootm_subcommand (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+{
+ int ret = 0;
+ int state;
+ cmd_tbl_t *c;
+
+ c = find_cmd_tbl(argv[1], cmd_bootm_sub[0], ARRAY_SIZE(cmd_bootm_sub));
+
+ if (c) {
+ state = (int)c-cmd;
+
+ /* treat start special since it resets the state machine */
+ if (state == BOOTM_STATE_START) {
+ argc--;
+ argv++;
+ return bootm_start(cmdtp, flag, argc, argv);
+ }
+ }
+ /* Unrecognized command */
+ else {
+ printf (Usage:\n%s\n, cmdtp-usage);
+ return 1;
+ }
+
+ if (images.state = state) {
+ printf (Trying to execute a command out of order\n);
+ printf (Usage:\n%s\n, cmdtp-usage);
+ return 1;
+ }
+
+ images.state |= state;
+
+ switch (state) {
+ ulong load_end;
+ case BOOTM_STATE_START:
+ /* should never occur */
+ break;
+ case BOOTM_STATE_LOADOS:
+ ret = bootm_load_os(images.os, load_end, 0);
+ if (ret)
+ return ret;
+
+ lmb_reserve(images.lmb, images.os.load,
+ (load_end - images.os.load));
+ break;
+#if defined(CONFIG_PPC) || defined(CONFIG_M68K) || defined(CONFIG_SPARC)
+ case BOOTM_STATE_RAMDISK:
+ {
+ ulong rd_len = images.rd_end - images.rd_start;
+ char str[17];
+
+ ret = boot_ramdisk_high(images.lmb, images.rd_start,
+ rd_len, images.initrd_start,
images.initrd_end);
+ if (ret)
+ return ret;
+
+ sprintf(str, %lx, images.initrd_start);
+ setenv(initrd_start, str);
+ sprintf(str, %lx, images.initrd_end);
+ setenv(initrd_end, str);
+ }
+ break;
+#endif
+#ifdef CONFIG_OF_LIBFDT
+ case BOOTM_STATE_FDT:
+ {
+ ulong bootmap_base = getenv_bootm_low();
+ ret = boot_relocate_fdt(images.lmb, bootmap_base,
+ images.ft_addr, images.ft_len);
+ break;
+ }
+#endif
+ case BOOTM_STATE_OS_CMDLINE:
+ do_bootm_linux(BOOTM_STATE_OS_CMDLINE, argc, argv,
images);
+ break;
+ case BOOTM_STATE_OS_BD_T:
+ do_bootm_linux(BOOTM_STATE_OS_BD_T, argc, argv,
images);
+ break;
+ case BOOTM_STATE_OS_PREP:
+ do_bootm_linux(BOOTM_STATE_OS_PREP, argc, argv,
images);
+ break;
+ case BOOTM_STATE_OS_GO:
+ disable_interrupts();
+
Re: [U-Boot] [PATCH] 440spe MQ initialization
Hi Stefan/Yuri, I looked at the changes. I had already submitted the changes in an earlier patch. This code to set the PLB4 arbiter depth was moved to cpu_init_f function in cpu/ppc4xx/cpu_init.c since it is common across many processor families. Please don't do the same thing again in the program_memory_queue function. Thanks, Prodyut From: Stefan Roese [mailto:[EMAIL PROTECTED] Sent: Tue 9/23/2008 2:43 AM To: Yuri Tikhonov Cc: u-boot@lists.denx.de; Prodyut Hazarika; Olga Buchonina Subject: Re: [U-Boot] [PATCH] 440spe MQ initialization On Tuesday 23 September 2008, Yuri Tikhonov wrote: BTW, when I said recommended by AMCC in the patch description I referred to the following information forwarded to me by Wolfgang Denk on Tue Mar 18 2008: --- Dear Yuri, here is some additional (and hopefully helpful) information from AMCC regarding the observed hangs on the katmai board: If possible, can you please check if you still see the lock up when you program MQ as follows: set value in HB and if you are using LL also as follows: MQ0_CF1H = 0x80001C80 MQ0_CF1L = 0x80001C80 Additionally, make sure that your PLB settings are: PLB0_ACR = 0xDF00 ( 4 deep read and 2 deep write) PLB1_ACR = 0xDF00 ( 4 deep read and 2 deep write) Please let me know if this fixes the issue. I also would like to know how you are programming your DMA and how is the traffic is pipelined. Regards, Olga Buchonina AMCC PowerPC Applications Engineering Understood. I just would like to see an ACK from AMCC on this since they just updated this MQ init code. Best regards, Stefan = DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: [EMAIL PROTECTED] = ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] 440spe MQ initialization
Hello Prodyut, On Tuesday, September 23, 2008 you wrote: Hi Stefan/Yuri, I looked at the changes. I had already submitted the changes in an earlier patch. This code to set the PLB4 arbiter depth was moved to cpu_init_f function in cpu/ppc4xx/cpu_init.c since it is common across many processor families. Please don't do the same thing again in the program_memory_queue function. Well, actually my patch doesn't have a deal with the PLB configuring, but with MQ only. So, it's OK here. But then another question arises: in Linux, in ppc440spe_configure_raid_devices(), beside the other things we do the following: /* Configure PLB as follows: * PLB: 0xDF00. This means * - Priority level 00 fair priority, * - Priority level 01 fair priority, * - Priority level 11 fair priority, * - High Bus Utilization enabled, * - 4 Deep read pipe, * - 2 Deep write pipe. */ mask = (1 PLB_ACR_PPM0) | (1 PLB_ACR_PPM1) | (1 PLB_ACR_PPM3) | (1 PLB_ACR_HBU) | ((3 PLB_ACR_RDP_MSK) PLB_ACR_RDP) | (1 PLB_ACR_WRP); mtdcr(DCRN_PLB0_ACR, mask); mtdcr(DCRN_PLB1_ACR, mask); Is it OK, or should we remove these strings from the Linux driver, assuming U-Boot has already done this ? Thanks in advance, Yuri From: Stefan Roese [mailto:[EMAIL PROTECTED] Sent: Tue 9/23/2008 2:43 AM To: Yuri Tikhonov Cc: u-boot@lists.denx.de; Prodyut Hazarika; Olga Buchonina Subject: Re: [U-Boot] [PATCH] 440spe MQ initialization On Tuesday 23 September 2008, Yuri Tikhonov wrote: BTW, when I said recommended by AMCC in the patch description I referred to the following information forwarded to me by Wolfgang Denk on Tue Mar 18 2008: --- Dear Yuri, here is some additional (and hopefully helpful) information from AMCC regarding the observed hangs on the katmai board: If possible, can you please check if you still see the lock up when you program MQ as follows: set value in HB and if you are using LL also as follows: MQ0_CF1H = 0x80001C80 MQ0_CF1L = 0x80001C80 Additionally, make sure that your PLB settings are: PLB0_ACR = 0xDF00 ( 4 deep read and 2 deep write) PLB1_ACR = 0xDF00 ( 4 deep read and 2 deep write) Please let me know if this fixes the issue. I also would like to know how you are programming your DMA and how is the traffic is pipelined. Regards, Olga Buchonina AMCC PowerPC Applications Engineering Understood. I just would like to see an ACK from AMCC on this since they just updated this MQ init code. Best regards, Stefan = DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: [EMAIL PROTECTED] = -- Yuri Tikhonov, Senior Software Engineer Emcraft Systems, www.emcraft.com ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] 440spe MQ initialization
Hi Prodyut, On Tuesday, September 23, 2008 you wrote: Hi Yuri, Is it OK, or should we remove these strings from the Linux driver, assuming U-Boot has already done this ? Please go ahead and remove these from the linux driver. Thanks for confirmation, will do. And I think this driver has not been submitted to the powerpc tree, since I still don't see it in Josh's or Linus's tree. Yep, for now it's present in the linux-2.6-denx tree only. We are about to post this to MLs along with our RAID-6 related changes soon. From: Stefan Roese [mailto:[EMAIL PROTECTED] Sent: Tue 9/23/2008 2:43 AM To: Yuri Tikhonov Cc: u-boot@lists.denx.de; Prodyut Hazarika; Olga Buchonina Subject: Re: [U-Boot] [PATCH] 440spe MQ initialization On Tuesday 23 September 2008, Yuri Tikhonov wrote: BTW, when I said recommended by AMCC in the patch description I referred to the following information forwarded to me by Wolfgang Denk on Tue Mar 18 2008: --- Dear Yuri, here is some additional (and hopefully helpful) information from AMCC regarding the observed hangs on the katmai board: If possible, can you please check if you still see the lock up when you program MQ as follows: set value in HB and if you are using LL also as follows: MQ0_CF1H = 0x80001C80 MQ0_CF1L = 0x80001C80 Additionally, make sure that your PLB settings are: PLB0_ACR = 0xDF00 ( 4 deep read and 2 deep write) PLB1_ACR = 0xDF00 ( 4 deep read and 2 deep write) Please let me know if this fixes the issue. I also would like to know how you are programming your DMA and how is the traffic is pipelined. Regards, Olga Buchonina AMCC PowerPC Applications Engineering Understood. I just would like to see an ACK from AMCC on this since they just updated this MQ init code. Best regards, Stefan = DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: [EMAIL PROTECTED] = -- Yuri Tikhonov, Senior Software Engineer Emcraft Systems, www.emcraft.com Regards, Yuri -- Yuri Tikhonov, Senior Software Engineer Emcraft Systems, www.emcraft.com ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] 85xx: Remove setting of *cache-line-size in device trees
On Sep 16, 2008, at 11:36 AM, Kumar Gala wrote: ePAPR says if the *cache-block-size is the same as *cache-line-size than we don't need the *cache-line-size property. Signed-off-by: Kumar Gala [EMAIL PROTECTED] --- cpu/mpc85xx/fdt.c |3 --- 1 files changed, 0 insertions(+), 3 deletions(-) Andy, can we look at pushing this into v2008.10 - k ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] Remove CFG_EEPROM_PAGE* dependencies for temperature sensors
The checks for CFG_EEPROM_PAGE_WRITE_ENABLE and CFG_EEPROM_PAGE_WRITE_BITS in various temperature sensor drivers are not necessary Signed-off-by: Peter Tyser [EMAIL PROTECTED] --- drivers/hwmon/ds1621.c |5 - drivers/hwmon/lm75.c |6 -- drivers/hwmon/lm81.c |6 -- 3 files changed, 0 insertions(+), 17 deletions(-) diff --git a/drivers/hwmon/ds1621.c b/drivers/hwmon/ds1621.c index 749aa26..523f8be 100644 --- a/drivers/hwmon/ds1621.c +++ b/drivers/hwmon/ds1621.c @@ -26,11 +26,6 @@ */ #include common.h - -#if !defined(CFG_EEPROM_PAGE_WRITE_ENABLE) || \ - (CFG_EEPROM_PAGE_WRITE_BITS 1) -# error CFG_EEPROM_PAGE_WRITE_ENABLE must be defined and CFG_EEPROM_PAGE_WRITE_BITS must be greater than 1 to use CONFIG_DTT_DS1621 -#endif #include i2c.h #include dtt.h diff --git a/drivers/hwmon/lm75.c b/drivers/hwmon/lm75.c index 67a18f6..6770cdd 100644 --- a/drivers/hwmon/lm75.c +++ b/drivers/hwmon/lm75.c @@ -26,12 +26,6 @@ */ #include common.h - -#if !defined(CFG_EEPROM_PAGE_WRITE_ENABLE) || \ - (CFG_EEPROM_PAGE_WRITE_BITS 1) -# error CFG_EEPROM_PAGE_WRITE_ENABLE must be defined and CFG_EEPROM_PAGE_WRITE_BITS must be greater than 1 to use CONFIG_DTT_LM75 -#endif - #include i2c.h #include dtt.h diff --git a/drivers/hwmon/lm81.c b/drivers/hwmon/lm81.c index 9349eb6..668ee9f 100644 --- a/drivers/hwmon/lm81.c +++ b/drivers/hwmon/lm81.c @@ -31,12 +31,6 @@ */ #include common.h - -#if !defined(CFG_EEPROM_PAGE_WRITE_ENABLE) || \ - (CFG_EEPROM_PAGE_WRITE_BITS 1) -# error CFG_EEPROM_PAGE_WRITE_ENABLE must be defined and CFG_EEPROM_PAGE_WRITE_BITS must be greater than 1 to use CONFIG_DTT_LM81 -#endif - #include i2c.h #include dtt.h -- 1.5.4.3 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] Remove unused CFG_EEPROM_PAGE_WRITE_ENABLE references
Signed-off-by: Peter Tyser [EMAIL PROTECTED] --- doc/README.PIP405|8 include/configs/APC405.h |1 - include/configs/ASH405.h |1 - include/configs/B2.h |1 - include/configs/CATcenter.h |1 - include/configs/CMS700.h |1 - include/configs/CPCI2DP.h|1 - include/configs/CPCI405.h|1 - include/configs/CPCI4052.h |1 - include/configs/CPCI405AB.h |1 - include/configs/CPCI405DT.h |1 - include/configs/CPCIISER4.h |1 - include/configs/DP405.h |1 - include/configs/DU405.h |1 - include/configs/DU440.h |1 - include/configs/G2000.h |1 - include/configs/HH405.h |1 - include/configs/HUB405.h |1 - include/configs/MIP405.h |1 - include/configs/MPC8323ERDB.h|1 - include/configs/OCRTC.h |1 - include/configs/ORSG.h |1 - include/configs/PCI405.h |1 - include/configs/PIP405.h |1 - include/configs/PLU405.h |1 - include/configs/PMC405.h |1 - include/configs/PMC440.h |1 - include/configs/PPChameleonEVB.h |1 - include/configs/TASREG.h |1 - include/configs/TQM8272.h|1 - include/configs/TQM834x.h|1 - include/configs/TQM85xx.h|1 - include/configs/VOH405.h |1 - include/configs/VOM405.h |1 - include/configs/W7OLMC.h |1 - include/configs/W7OLMG.h |1 - include/configs/WUH405.h |1 - include/configs/XPEDITE1K.h |1 - include/configs/acadia.h |1 - include/configs/alpr.h |1 - include/configs/bamboo.h |1 - include/configs/canyonlands.h|1 - include/configs/ebony.h |1 - include/configs/ep82xxm.h|1 - include/configs/hcu4.h |1 - include/configs/hcu5.h |1 - include/configs/hymod.h |1 - include/configs/katmai.h |1 - include/configs/luan.h |1 - include/configs/lwmon5.h |1 - include/configs/mcu25.h |1 - include/configs/motionpro.h |1 - include/configs/muas3001.h |1 - include/configs/mucmc52.h|2 -- include/configs/ocotea.h |1 - include/configs/p3p440.h |1 - include/configs/pcs440ep.h |1 - include/configs/sequoia.h|1 - include/configs/socrates.h |1 - include/configs/stxssa.h |1 - include/configs/taishan.h|1 - include/configs/uc101.h |2 -- include/configs/walnut.h |1 - include/configs/yosemite.h |1 - include/configs/zeus.h |1 - 65 files changed, 0 insertions(+), 74 deletions(-) diff --git a/doc/README.PIP405 b/doc/README.PIP405 index 610ff21..07756a5 100644 --- a/doc/README.PIP405 +++ b/doc/README.PIP405 @@ -132,14 +132,6 @@ Identify: - CONFIG_IDENT_STRINGadded to the U_BOOT_VERSION String - -I2C stuff: --- -CFG_EEPROM_PAGE_WRITE_ENABLE enables page write of the I2C EEPROM - CFG_EEPROM_PAGE_WRITE_BITS _must_ be - defined. - - Environment / Console: -- diff --git a/include/configs/APC405.h b/include/configs/APC405.h index 6ee0a36..cd2b79d 100644 --- a/include/configs/APC405.h +++ b/include/configs/APC405.h @@ -315,7 +315,6 @@ extern int flash_banks; /* 16 byte page write mode using*/ /* last 4 bits of the address */ #define CFG_EEPROM_PAGE_WRITE_DELAY_MS 10 /* and takes up to 10 msec */ -#define CFG_EEPROM_PAGE_WRITE_ENABLE /* * External Bus Controller (EBC) Setup diff --git a/include/configs/ASH405.h b/include/configs/ASH405.h index 85c6a99..6cd0620 100644 --- a/include/configs/ASH405.h +++ b/include/configs/ASH405.h @@ -256,7 +256,6 @@ /* 16 byte page write mode using*/ /* last 4 bits of the address */ #define CFG_EEPROM_PAGE_WRITE_DELAY_MS 10 /* and takes up to 10 msec */ -#define CFG_EEPROM_PAGE_WRITE_ENABLE /* * Init Memory Controller: diff --git a/include/configs/B2.h b/include/configs/B2.h index d6ab1ad..8afd08d 100644 --- a/include/configs/B2.h +++ b/include/configs/B2.h @@ -194,7 +194,6 @@ /* 16 byte page write mode using*/ /* last 4 bits of the address */ #define CFG_EEPROM_PAGE_WRITE_DELAY_MS 10 /* and takes up to 10 msec */ -#define CFG_EEPROM_PAGE_WRITE_ENABLE /* Flash banks JFFS2 should use */ /* diff --git a/include/configs/CATcenter.h b/include/configs/CATcenter.h index 1603c9c..b67fe06 100644 --- a/include/configs/CATcenter.h +++
[U-Boot] What's needed for new cpu subdirectory?
For OMAP3 patch [1] I try to move common files currently in cpu/omap3 to cpu/arm_cortexa8/omap3 as discussed earlier [2]. Moving the files is easy, but how has main Makefile to be configured? I have ls -a cpu/arm_cortexa8/ . .. omap3 ls -a cpu/arm_cortexa8/omap3/ . board.c config.mk interrupts.c Makefile nand.c sys_info.c .. clock.c cpu.c lowlevel_init.S mem.c start.S syslib.c and in main Makefile @$(MKCONFIG) $(@:_config=) arm arm_cortexa8 omap3 evm omap3 This results in make -C cpu/arm_cortexa8 start.o which fails as start.S is in cpu/arm_cortexa8/omap3/ Any hint what is necessary to get stuff in cpu/arm_cortexa8/omap3/ compiled? Thanks Dirk [1] http://lists.denx.de/pipermail/u-boot/2008-September/040561.html [2] http://lists.denx.de/pipermail/u-boot/2008-September/040712.html ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] u-boot-v2 for imx27 Board
Hi, I was running U-boot-v2 on imx27ads board and it's hanging up on the terminal after the following display. U-Boot 2.0.0-rc5-git (Sep 22 2008 - 23:05:39) Board: Freescale i.MX27 ADS - Also I am using Intel P30 strata flash. When the MTD cfi driver is enabled in the menuconfig U-boot gives the following message and hangs up. U-Boot 2.0.0-rc5-git (Sep 22 2008 - 23:05:39) Board: Freescale i.MX27 ADS cfi_probe: cfi_flash base: 0xc000 size: 0x0200 Please provide your suggestions. Thanks, Lejin -Original Message- From: Robert Schwebel [mailto:[EMAIL PROTECTED] Sent: Friday, August 22, 2008 12:17 AM To: Lejin K Joy Cc: 'Sascha Hauer'; u-boot@lists.denx.de Subject: Re: [U-Boot] u-boot for imx27 Board Hi, On Thu, Aug 21, 2008 at 09:43:53PM +0530, Lejin K Joy wrote: Could you kindly suggest me the arm cross compiler's link /name using which you have compiled the u-boot. I am using obsolete-gcc-3.3.2.tar.bz2 compiler. We usually build the MX27 stuff with a generic arm-v4 cross toolchain, built with OSELAS.Toolchain-1.1.1. You can compile such a toolchain yourself easily with ptxdist, look here for the details: http://www.pengutronix.de/oselas/toolchain/index_en.html rsc -- Dipl.-Ing. Robert Schwebel | http://www.pengutronix.de Pengutronix - Linux Solutions for Science and Industry Handelsregister: Amtsgericht Hildesheim, HRA 2686 Hannoversche Str. 2, 31134 Hildesheim, Germany Phone: +49-5121-206917-0 | Fax: +49-5121-206917-9 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] Uboot-1.2.0 on MPC8360EMDS board
Hello, I am having problem when I try to bootup MPC8360EMDS with Uboot1.2. The following are logs. The board reboot when the uboot tried to run on the RAM. Any idea on this issue? Thanks, Mike U-Boot 1.2.1 (Sep 23 2008 - 14:35:42) MPC83XX Clock configuration: Coherent System Bus: 264 MHz Core: 528 MHz QE: 396 MHz Local Bus Controller: 264 MHz Local Bus: 66 MHz DDR: 264 MHz DDR Secondary:264 MHz SEC: 88 MHz I2C1: 264 MHz I2C2: 264 MHz CPU: MPC8360E, Rev: 21 at 528 MHz Board: Freescale MPC8360EMDS I2C: ready DRAM: cs0_bnds = 0x000f cs0_config = 0x8102 DDR:bar=0x DDR:ar=0x801b DDR:Module maximum data rate is: 400Mhz DDR:Effective data rate is: 266Mhz DDR:The MSB 1 of CAS Latency is: 4 Errata DDR6 (debug_reg=0x002c) DDR:timing_cfg_1=0x37353321 DDR:timing_cfg_2=0x0800 DDR DIMM: data bus width is 64 bit with ECC DDR:sdram_mode=0x0032 DDR:sdram_interval=0x045b0100 DDR:sdram_clk_cntl=0x DDRC ECC mode: OFF DDR:sdram_cfg=0xc200 SDRAM on Local Bus: 64 MB DDR RAM: 256 MB Top of RAM usable for U-Boot at: 1000 Reserving 205k for U-Boot at: 0ffcc000 Reserving 136k for malloc() at: 0ffaa000 Reserving 76 Bytes for Board Info at: 0ffa9fb4 Reserving 104 Bytes for Global Data at: 0ffa9f4c Stack Pointer at: 0ffa9f28 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] Uboot-1.2.0 on MPC8360EMDS board
Hi Mike, I'm very new to Powerpc so take my words with a lot of precautions. I see two possibilities with your problem: 1. As U-Boot seems to reset after Stack Pointer at: 0ffa9f28, you are likely to encounter a relocation issue. As I have learnt it the hard way (I cannot count the number of times my U-Boot hanged there), you may have misconfigured the SDRAM module. Check other code using the same chips, memory refresh timers and memory controller registers (SDRAM init sequence is configured in the initdram() function of your board specific .c file). http://www.denx.de/wiki/view/DULG/UBootCrashAfterRelocation http://www.denx.de/wiki/view/DULG/SDRAM 2. If your board always reboots at the same moment, whatever the U-Boot configuration is, you may have forgot to handle or deactivate your cpu watchdog. On my mpc8270 board, I can disable them with the CFG_SYPCR register; on yours, it seems to be with BCSR5[SWEN], but I'm really not sure (and it seems to be off by default). Also check the CONFIG_WATCHDOG option in U-Boot. Note that if you have slave cores on your board, you may also need to handle them. At last, perhaps try with a current version of U-Boot, you may get more help with it. I hope that this could help you. If not, just ignore, I just try to give back the help I got there. Good luck, Rémi On Tue, Sep 23, 2008 at 10:16 PM, Remi Lefevre [EMAIL PROTECTED] wrote: Hi Mike, I'm very new to Powerpc so take my words with a lot of precautions. I see two possibilities with your problem: 1. As U-Boot seems to reset after Stack Pointer at: 0ffa9f28, you are likely to encounter a relocation issue. As I have learnt it the hard way (I cannot count the number of times my U-Boot hanged there), you may have misconfigured the SDRAM module. Check other code using the same chips, memory refresh timers and memory controller registers (SDRAM init sequence is configured in the initdram() function of your board specific .c file). http://www.denx.de/wiki/view/DULG/UBootCrashAfterRelocation http://www.denx.de/wiki/view/DULG/SDRAM 2. If your board always reboots at the same moment, whatever the U-Boot configuration is, you may have forgot to handle or deactivate your cpu watchdog. On my mpc8270 board, I can disable them with the CFG_SYPCR register; on yours, it seems to be with BCSR5[SWEN], but I'm really not sure (and it seems to be off by default). Also check the CONFIG_WATCHDOG option in U-Boot. Note that if you have slave cores on your board, you may also need to handle them. At last, perhaps try with a current version of U-Boot, you may get more help with it. I hope that this could help you. If not, just ignore, I just try to give back the help I got there. Good luck, Rémi On Tue, Sep 23, 2008 at 8:57 PM, mike zheng [EMAIL PROTECTED] wrote: Hello, I am having problem when I try to bootup MPC8360EMDS with Uboot1.2. The following are logs. The board reboot when the uboot tried to run on the RAM. Any idea on this issue? Thanks, Mike U-Boot 1.2.1 (Sep 23 2008 - 14:35:42) MPC83XX Clock configuration: Coherent System Bus: 264 MHz Core: 528 MHz QE: 396 MHz Local Bus Controller: 264 MHz Local Bus: 66 MHz DDR: 264 MHz DDR Secondary:264 MHz SEC: 88 MHz I2C1: 264 MHz I2C2: 264 MHz CPU: MPC8360E, Rev: 21 at 528 MHz Board: Freescale MPC8360EMDS I2C: ready DRAM: cs0_bnds = 0x000f cs0_config = 0x8102 DDR:bar=0x DDR:ar=0x801b DDR:Module maximum data rate is: 400Mhz DDR:Effective data rate is: 266Mhz DDR:The MSB 1 of CAS Latency is: 4 Errata DDR6 (debug_reg=0x002c) DDR:timing_cfg_1=0x37353321 DDR:timing_cfg_2=0x0800 DDR DIMM: data bus width is 64 bit with ECC DDR:sdram_mode=0x0032 DDR:sdram_interval=0x045b0100 DDR:sdram_clk_cntl=0x DDRC ECC mode: OFF DDR:sdram_cfg=0xc200 SDRAM on Local Bus: 64 MB DDR RAM: 256 MB Top of RAM usable for U-Boot at: 1000 Reserving 205k for U-Boot at: 0ffcc000 Reserving 136k for malloc() at: 0ffaa000 Reserving 76 Bytes for Board Info at: 0ffa9fb4 Reserving 104 Bytes for Global Data at: 0ffa9f4c Stack Pointer at: 0ffa9f28 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] What's needed for new cpu subdirectory?
Dear Dirk, In message [EMAIL PROTECTED] you wrote: For OMAP3 patch [1] I try to move common files currently in cpu/omap3 to cpu/arm_cortexa8/omap3 as discussed earlier [2]. Ummm... if it's common files - shouldn't these go to cpu/arm_cortexa8/ then, and cpu/arm_cortexa8/omap3/ would have only OMAP3 specific files? Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: [EMAIL PROTECTED] Randal said it would be tough to do in sed. He didn't say he didn't understand sed. Randal understands sed quite well. Which is why he uses Perl. :-) - Larry Wall in [EMAIL PROTECTED] ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] Uboot-1.2.0 on MPC8360EMDS board
Dear Mike, In message [EMAIL PROTECTED] you wrote: I am having problem when I try to bootup MPC8360EMDS with Uboot1.2. The following are logs. The board reboot when the uboot tried to run on the RAM. Any idea on this issue? ... U-Boot 1.2.1 (Sep 23 2008 - 14:35:42) MPC83XX It's difficult to say anything when ewven the minimal information you provide is unreliable - the subject says Uboot-1.2.0, later you write Uboot1.2, and now we see U-Boot 1.2.1. I think you should know exactly which version you ar running. In any case: all of these versions are extremely old. Please use current code instead. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: [EMAIL PROTECTED] The X11 source code style is ATROCIOUS and should not be used as a model. - Doug Gwyn ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] PrimeCell Peripherals
Hello, 2008/9/23 Hebbar [EMAIL PROTECTED]: I use U-booot as The Primary Bootloader on arm926ej-s based Board. By Default U-boot supports few Primecell peripherals drivers like PL0x1 UART. Right, that's what I've found in the U-Boot sources. How come that widely used interrupt controllers like PL19x are not supported by default? I developed few others my self, like pl18x mmc, rtc, gpio. I recently sent a patch for RTC pl031. Yes, I saw that patch. Are you planning to send patch for GPIO as well? -- Roman Mashak ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] PrimeCell Peripherals
Hi, From: Roman Mashak [mailto:[EMAIL PROTECTED] Subject: Re: [U-Boot] PrimeCell Peripherals Right, that's what I've found in the U-Boot sources. How come that widely used interrupt controllers like PL19x are not supported by default? Thats because Most of the ARM based boards doesnt use Interrupts. Atleast as far as i have seen. IIRC U-boot is a single process bootloader hence Interrupts are not so much supported. Is there any interrupt related drivers in U-boot for other platforms? I recently sent a patch for RTC pl031. Yes, I saw that patch. Are you planning to send patch for GPIO as well? I havent done any Framework kind of a driver for GPIO. For me, it just works like a standalone hence i cannot submit the same. Later when i get time. I will prepare a GPIO Framework and submit for RFC in ML Regards Gururaja ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] PrimeCell Peripherals
Hello, 2008/9/23 Gururaja Hebbar K R [EMAIL PROTECTED]: Thats because Most of the ARM based boards doesnt use Interrupts. Atleast as far as i have seen. IIRC U-boot is a single process bootloader hence Interrupts are not so much supported. Is there any interrupt related drivers in U-boot for other platforms? In U-Boot source tree there are number of drivers with interrupt service routines running (for example, $(U_BOOT)/drivers/net/bcm570x.c) as well as various interrupts related macros (some of them not used thought), if this is what you mean. Perhaps these definitions are for future ? -- Roman Mashak ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] PrimeCell Peripherals
To add a bit to my previous message. 2008/9/23 Gururaja Hebbar K R [EMAIL PROTECTED]: Thats because Most of the ARM based boards doesnt use Interrupts. Atleast as far as i have seen. As far as I understood from U-Boot's README, a standalone mode can and may want to use interrupts -- so it'd reasonable to have interrupts controllers support, isn't it? Correct me if I'm wrong, just trying to understand the architecture of U-Boot more deeply. IIRC U-boot is a single process bootloader hence Interrupts are not so much supported. Is there any interrupt related drivers in U-boot for other platforms? -- Roman Mashak ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] PrimeCell Peripherals
Hi, In U-Boot source tree there are number of drivers with interrupt service routines running (for example, $(U_BOOT)/drivers/net/bcm570x.c) as well as various interrupts related macros (some of them not used thought), if this is what you mean. Perhaps these definitions are for future ? At $(U_BOOT)/drivers/net/bcm570x.c files header, it says * Broadcom BCM570x Ethernet Driver for U-Boot. * Support 5701, 5702, 5703, and 5704. Single instance driver. -- Single Instance Driver. Does this mean it doesn't handle Interrupt. Sorry I cannot say more as I don't have any knowledge abt this Also, CONFIG_BCM570x is used in $(U_BOOT)/include/configs/BMW.h which is a MPC based Board. May be MPC uses interrupts for its operation inside U-Boot. Regards Gururaja ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] ppc: Fix typo in include/mpc83xx.h
Fixed typo from CONIFG_MPC837X to CONFIG_MPC837X Signed-off-by: Nobuhiro Iwamatsu [EMAIL PROTECTED] --- include/mpc83xx.h |2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/include/mpc83xx.h b/include/mpc83xx.h index 5d82bb4..7f30d68 100644 --- a/include/mpc83xx.h +++ b/include/mpc83xx.h @@ -528,7 +528,7 @@ #if defined(CONFIG_MPC834X) #define HRCWH_ROM_LOC_PCI2 0x0020 #endif -#if defined(CONIFG_MPC837X) +#if defined(CONFIG_MPC837X) #define HRCWH_ROM_LOC_ON_CHIP_ROM 0x0030 #endif #define HRCWH_ROM_LOC_LOCAL_8BIT 0x0050 -- 1.5.6.3 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] PrimeCell Peripherals
Hi, 2008/9/23 Gururaja Hebbar K R [EMAIL PROTECTED]: At $(U_BOOT)/drivers/net/bcm570x.c files header, it says * Broadcom BCM570x Ethernet Driver for U-Boot. * Support 5701, 5702, 5703, and 5704. Single instance driver. -- Single Instance Driver. Does this mean it doesn't handle Interrupt. Sorry I cannot say more as I don't have any knowledge abt this Also, CONFIG_BCM570x is used in $(U_BOOT)/include/configs/BMW.h which is a MPC based Board. May be MPC uses interrupts for its operation inside U-Boot. Probably you're right and interrupts related stuff is meanugful on PPC platform; moreover README says about interrupts mainly in PPC or PowerPC marked sections. -- Roman Mashak ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] PrimeCell Peripherals
HI,
From: Roman Mashak [mailto:[EMAIL PROTECTED]
Subject: Re: [U-Boot] PrimeCell Peripherals
To add a bit to my previous message.
As far as I understood from U-Boot's README, a standalone
mode can and may want to use interrupts -- so it'd reasonable
to have interrupts controllers support, isn't it? Correct me
if I'm wrong, just trying to understand the architecture of
U-Boot more deeply.
U-boots readme is general for all platforms.
Yes, U-boot ARM supports interrupt mode, but generally not used.
Also standalone can use interrupt mode if the u-boot it is running on is
configured to support irq
i.e., CONFIG_USE_IRQ is defined.
Then the user has to also define a do_irq command to support the same
Kindly look at below file for do_irq function definitions its usage.
uboot\cpu\arm720t\interrupts.c
uboot\cpu\arm920t\interrupts.c
i havent seen this function definitions for arm926ej-s except
#ifndef CONFIG_USE_IRQ
void do_irq (struct pt_regs *pt_regs)
{
...
Regards
Gururaja
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