date:20110209

Dear Tanmay Upadhyay - Embedded,

In message 726556893.71716.1297242968960.javamail.r...@ahm.einfochips.com you 
wrote:
 --===1012086174==
 Content-Type: multipart/alternative; 
   boundary==_Part_71715_1073465620.1297242968958
 
 --=_Part_71715_1073465620.1297242968958
 Content-Type: text/plain; charset=utf-8
 Content-Transfer-Encoding: 7bit
 
 
 - Original Message - 
 From: Julian Pidancet julian.pidan...@citrix.com 
 To: u-boot@lists.denx.de 
 Cc: tanmay upadhyay tanmay.upadh...@einfochips.com, prafu...@marvell.com 
 Sent: Tuesday, February 8, 2011 11:50:54 PM 
 Subject: [PATCH] Kirkwood: Add support for OpenRD-Client  OpenRD-Ultimate 

Why are you reposting this old patch?  And why in an attachment?

Best regards,

Wolfgang Denk

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HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de
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but being *certain*.- Terry Pratchett, _Truckers_
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[U-Boot] [PATCH 2/3] mx31pdk: Use the new relocation scheme

Signed-off-by: Fabio Estevam fabio.este...@freescale.com
---
 board/freescale/mx31pdk/mx31pdk.c   |   10 -
 include/configs/mx31pdk.h   |6 +++
 nand_spl/board/freescale/mx31pdk/u-boot.lds |   59 +++---
 3 files changed, 66 insertions(+), 9 deletions(-)

diff --git a/board/freescale/mx31pdk/mx31pdk.c 
b/board/freescale/mx31pdk/mx31pdk.c
index 9f47169..2756e5a 100644
--- a/board/freescale/mx31pdk/mx31pdk.c
+++ b/board/freescale/mx31pdk/mx31pdk.c
@@ -33,10 +33,16 @@ DECLARE_GLOBAL_DATA_PTR;
 
 int dram_init(void)
 {
+   /* dram_init must store complete ramsize in gd-ram_size */
+   gd-ram_size = get_ram_size((volatile void *)CONFIG_SYS_SDRAM_BASE,
+   PHYS_SDRAM_1_SIZE);
+   return 0;
+}
+
+void dram_init_banksize(void)
+{
gd-bd-bi_dram[0].start = PHYS_SDRAM_1;
gd-bd-bi_dram[0].size = PHYS_SDRAM_1_SIZE;
-
-   return 0;
 }
 
 int board_init(void)
diff --git a/include/configs/mx31pdk.h b/include/configs/mx31pdk.h
index 3b90a01..d7286c0 100644
--- a/include/configs/mx31pdk.h
+++ b/include/configs/mx31pdk.h
@@ -155,6 +155,12 @@
 #define PHYS_SDRAM_1   CSD0_BASE
 #define PHYS_SDRAM_1_SIZE  (128 * 1024 * 1024)
 
+#define CONFIG_SYS_SDRAM_BASE  PHYS_SDRAM_1
+#define CONFIG_SYS_INIT_RAM_ADDR   IRAM_BASE_ADDR
+#define CONFIG_SYS_INIT_RAM_SIZE   IRAM_SIZE
+#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - 
GENERATED_GBL_DATA_SIZE)
+#define CONFIG_SYS_INIT_SP_ADDR(CONFIG_SYS_INIT_RAM_ADDR + 
CONFIG_SYS_GBL_DATA_OFFSET)
+
 /*---
  * FLASH and environment organization
  */
diff --git a/nand_spl/board/freescale/mx31pdk/u-boot.lds 
b/nand_spl/board/freescale/mx31pdk/u-boot.lds
index edd8430..ff289fb 100644
--- a/nand_spl/board/freescale/mx31pdk/u-boot.lds
+++ b/nand_spl/board/freescale/mx31pdk/u-boot.lds
@@ -1,3 +1,25 @@
+/*
+ * (C) Copyright 2009
+ * Wolfgang Denk, DENX Software Engineering, w...@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
 OUTPUT_FORMAT(elf32-littlearm, elf32-littlearm, elf32-littlearm)
 OUTPUT_ARCH(arm)
 ENTRY(_start)
@@ -19,18 +41,41 @@ SECTIONS
.rodata : { *(.rodata) }
 
. = ALIGN(4);
-   .data : { *(.data) }
+   .data : {
+   *(.data)
+   }
 
. = ALIGN(4);
-   .got : { *(.got) }
-
-   . = .;
__u_boot_cmd_start = .;
.u_boot_cmd : { *(.u_boot_cmd) }
__u_boot_cmd_end = .;
 
. = ALIGN(4);
-   __bss_start = .;
-   .bss : { *(.bss) }
-   _end = .;
+
+   .rel.dyn : {
+   __rel_dyn_start = .;
+   *(.rel*)
+   __rel_dyn_end = .;
+   }
+
+   .dynsym : {
+   __dynsym_start = .;
+   *(.dynsym)
+   }
+
+   .bss __rel_dyn_start (OVERLAY) : {
+   __bss_start = .;
+   *(.bss)
+. = ALIGN(4);
+   _end = .;
+   }
+
+   /DISCARD/ : { *(.bss*) }
+   /DISCARD/ : { *(.dynstr*) }
+   /DISCARD/ : { *(.dynsym*) }
+   /DISCARD/ : { *(.dynamic*) }
+   /DISCARD/ : { *(.hash*) }
+   /DISCARD/ : { *(.plt*) }
+   /DISCARD/ : { *(.interp*) }
+   /DISCARD/ : { *(.gnu*) }
 }
-- 
1.6.0.4


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[U-Boot] [PATCH 3/3] mx31pdk: Make the full boot log visible

Use board_early_init_f so that the full boot log output can be displayed.

Signed-off-by: Fabio Estevam fabio.este...@freescale.com
---
 board/freescale/mx31pdk/mx31pdk.c |7 ++-
 include/configs/mx31pdk.h |1 +
 2 files changed, 7 insertions(+), 1 deletions(-)

diff --git a/board/freescale/mx31pdk/mx31pdk.c 
b/board/freescale/mx31pdk/mx31pdk.c
index 2756e5a..a9f0fb4 100644
--- a/board/freescale/mx31pdk/mx31pdk.c
+++ b/board/freescale/mx31pdk/mx31pdk.c
@@ -45,7 +45,7 @@ void dram_init_banksize(void)
gd-bd-bi_dram[0].size = PHYS_SDRAM_1_SIZE;
 }
 
-int board_init(void)
+int board_early_init_f(void)
 {
/* CS5: CPLD incl. network controller */
__REG(CSCR_U(5)) = 0xd843;
@@ -56,6 +56,11 @@ int board_init(void)
mx31_uart1_hw_init();
mx31_spi2_hw_init();
 
+   return 0;
+}
+
+int board_init(void)
+{
gd-bd-bi_arch_number = MACH_TYPE_MX31_3DS; /* board id for linux */
/* adress of boot parameters */
gd-bd-bi_boot_params = PHYS_SDRAM_1 + 0x100;
diff --git a/include/configs/mx31pdk.h b/include/configs/mx31pdk.h
index d7286c0..86c758f 100644
--- a/include/configs/mx31pdk.h
+++ b/include/configs/mx31pdk.h
@@ -154,6 +154,7 @@
 #define CONFIG_NR_DRAM_BANKS   1
 #define PHYS_SDRAM_1   CSD0_BASE
 #define PHYS_SDRAM_1_SIZE  (128 * 1024 * 1024)
+#define CONFIG_BOARD_EARLY_INIT_F  1
 
 #define CONFIG_SYS_SDRAM_BASE  PHYS_SDRAM_1
 #define CONFIG_SYS_INIT_RAM_ADDR   IRAM_BASE_ADDR
-- 
1.6.0.4


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[U-Boot] [PATCH 1/3] arm1136: Fix NAND boot

Signed-off-by: Fabio Estevam fabio.este...@freescale.com
Signed-off-by: Magnus Lilja lilja.mag...@gmail.com
---
 arch/arm/cpu/arm1136/start.S |   16 
 1 files changed, 4 insertions(+), 12 deletions(-)

diff --git a/arch/arm/cpu/arm1136/start.S b/arch/arm/cpu/arm1136/start.S
index b771d31..bab2868 100644
--- a/arch/arm/cpu/arm1136/start.S
+++ b/arch/arm/cpu/arm1136/start.S
@@ -163,15 +163,7 @@ call_board_init_f:
bic sp, sp, #7 /* 8-byte alignment for ABI compliance */
ldr r0,=0x
 
-#ifdef CONFIG_NAND_SPL
-   bl  nand_boot
-#else
-#ifdef CONFIG_ONENAND_IPL
-   bl  start_oneboot
-#else
bl  board_init_f
-#endif /* CONFIG_ONENAND_IPL */
-#endif /* CONFIG_NAND_SPL */
 
 
/*--*/
 
@@ -267,10 +259,10 @@ clbss_l:str   r2, [r0]/* clear 
loop...*/
  */
 #ifdef CONFIG_NAND_SPL
ldr r0, _nand_boot_ofs
-   adr r1, _start
-   add pc, r0, r1
-_nand_boot_ofs
-   : .word nand_boot - _start
+   mov pc, r0
+
+_nand_boot_ofs:
+   .word nand_boot
 #else
 jump_2_ram:
ldr r0, _board_init_r_ofs
-- 
1.6.0.4


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Re: [U-Boot] [PATCH V4] mpc83xx:fix pcie configuration space read/write

2011-02-09 Thread Leo Liu

2011/2/6 Kim Phillips kim.phill...@freescale.com:
 On Wed, 19 Jan 2011 19:50:47 +0800
 Leo Liu liucai@gmail.com wrote:

 This patch fix a problem for the pcie enumeration when the mpc83xx pcie 
 controller is
 connected with switch or we use both of the two pcie controller.

 Signed-off-by: Leo Liu liucai@gmail.com
 ---

 applied after fixing some comment format, and moving:

 +/*private structure for mpc83xx pcie hose*/
 +static struct mpc83xx_pcie_priv {
 +     u8 index;
 +} pcie_priv[PCIE_MAX_BUSES] = {

 into a CONFIG_83XX_GENERIC_PCIE_REGISTER_HOSES protected area to avoid
 a compiler warning: 'pcie_priv' defined but not used.

 Thanks,

 Kim



Thanks so much!
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[U-Boot] Claim £750.000.00 GBP IN British Panasonic On-line Promo. Send:

2011-02-09 Thread r-mscheibe



Name.



Location...



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Re: [U-Boot] [RFC] ARM: mx31pdk: Use the new relocation scheme

Hi Albert,

On 2/8/2011 6:50 PM, Albert ARIBAUD wrote:
 Le 08/02/2011 21:18, stefano babic a écrit :
 Am 08.02.2011 20:26, schrieb Magnus Lilja:
 Patch reposted as a separate mail a couple of minutes ago.

 As I mention in the patch I think Fabio's patch has to be applied first.

 I think your patch is ok - Fabio fixed the syntax error as you do. We
 need only one of them.

 Another solution would be to change my patch somewhat to apply it first
 and then update Fabios patch to only touch the i.MX31-PDK specific
 files.

 IMHO this is the preferred way, because the two issues are orthogonal.
 Your patch fixes booting from NAND for ARM11, and  Fabio's patch fix the
 mx31pdk board only.
 
 Agreed.

Ok, I have just submitted the patch series treating one issue at the time.

 Note also that there was a recent patch to ARM926's start.S (replacing 'adr 
 r1, _start' with 'ldr r1, _TEXT_BASE' at line 284). The same should be done 
 on arm1136.

Ok, I haven´t added this change to my patch series yet, but I can do it on a 
separate patch after my original patch series is applied, if this is OK with 
you.

I have tested this recommended change and it worked fine on my mx31pdk board.

Thanks,

Fabio Estevam


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[U-Boot] eNET / x86 build fails with ld: -r and -shared may not be used together

2011-02-09 Thread Loïc Minier

Hi

 Since 2011.03-rc1, the eNET / x86 build fails with:
[...]
ld  --cref  -pic --emit-relocs -Bsymbolic -Bsymbolic-functions --cref  -pic 
--emit-relocs -Bsymbolic -Bsymbolic-functions -r -o 
/build/buildd-u-boot_2011.03~rc1-1-i386-1CnrCx/u-boot-2011.03~rc1/debian/build/eNET/examples/standalone/libstubs.o
  
/build/buildd-u-boot_2011.03~rc1-1-i386-1CnrCx/u-boot-2011.03~rc1/debian/build/eNET/examples/standalone/stubs.o
ld: -r and -shared may not be used together
https://buildd.debian.org/fetch.cgi?pkg=u-bootver=2011.03~rc1-1arch=i386stamp=1296819667file=log

 This sounds similar to the ARM failure, but -pie isn't used here.

   Thanks,
-- 
Loïc Minier
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Re: [U-Boot] [PATCH] Kirkwood: Add support for OpenRD-Client OpenRD-Ultimate

2011-02-09 Thread Tanmay Upadhyay


On Wednesday 09 February 2011 03:47 PM, Wolfgang Denk wrote:
 Dear Tanmay Upadhyay - Embedded,

 In message726556893.71716.1297242968960.javamail.r...@ahm.einfochips.com  
 you wrote:
 --===1012086174==
 Content-Type: multipart/alternative;
  boundary==_Part_71715_1073465620.1297242968958

 --=_Part_71715_1073465620.1297242968958
 Content-Type: text/plain; charset=utf-8
 Content-Transfer-Encoding: 7bit


 - Original Message -
 From: Julian Pidancetjulian.pidan...@citrix.com
 To: u-boot@lists.denx.de
 Cc: tanmay upadhyaytanmay.upadh...@einfochips.com, prafu...@marvell.com
 Sent: Tuesday, February 8, 2011 11:50:54 PM
 Subject: [PATCH] Kirkwood: Add support for OpenRD-Client  OpenRD-Ultimate

 Why are you reposting this old patch?  And why in an attachment?

 Best regards,

 Wolfgang Denk


Sorry if I made a mess. This was my first email to this mailing list 
which wasn't sent from 'git send-email'.

I just wanted to ack Julian's mail. I simply replied his mail and added 
'Acked by' line. May be my webmail made a mess of it. Sending this mail 
from Thunderbird. Hope this time it goes ok.

Regards,

Tanmay
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Re: [U-Boot] eNET / x86 build fails with ld: -r and -shared may not be used together

2011-02-09 Thread Graeme Russ

On Wednesday, February 9, 2011, Loïc Minier l...@dooz.org wrote:
         Hi

  Since 2011.03-rc1, the eNET / x86 build fails with:
 [...]
 ld  --cref  -pic --emit-relocs -Bsymbolic -Bsymbolic-functions --cref  -pic 
 --emit-relocs -Bsymbolic -Bsymbolic-functions -r -o 
 /build/buildd-u-boot_2011.03~rc1-1-i386-1CnrCx/u-boot-2011.03~rc1/debian/build/eNET/examples/standalone/libstubs.o
   
 /build/buildd-u-boot_2011.03~rc1-1-i386-1CnrCx/u-boot-2011.03~rc1/debian/build/eNET/examples/standalone/stubs.o
 ld: -r and -shared may not be used together
 https://buildd.debian.org/fetch.cgi?pkg=u-bootver=2011.03~rc1-1arch=i386stamp=1296819667file=log

  This sounds similar to the ARM failure, but -pie isn't used here.


This has been fixed in the latest x86 patch series sent to the list

Regards,

Graeme
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Re: [U-Boot] eNET / x86 build fails with ld: -r and -shared may not be used together

2011-02-09 Thread Loïc Minier

On Wed, Feb 09, 2011, Graeme Russ wrote:
 This has been fixed in the latest x86 patch series sent to the list

 Great!  I had flagged this patch series, but for some reason I thought
 this had been merged already.  I had checked the u-boot-x86.git tree
 before reporting this to the mailing-list, but it only had patches from
 October.  Is there another git tree where you usually stage your series?

   Thanks!
-- 
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Re: [U-Boot] eNET / x86 build fails with ld: -r and -shared may not be used together

2011-02-09 Thread Loïc Minier

 FTR, the patch I picked for the Debian package was:
 x86: Align config.mk and linker scripts with other arches

-- 
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[U-Boot] [PATCH 3/3] common/cmd_bdinfo.c: fix do_bdinfo() for AVR32

This patch fixes following warning message:

---8---
cmd_bdinfo.c:458: warning: initialization from incompatible pointer type
---8---

There was a prototype change in 54841ab50c20d6fa6c9cc3eb826989da3a22d934 for
argv[] pointer type to const. This change was not made for AVR32 cause this
code came in later by a merge.

Signed-off-by: Andreas Bießmann biessm...@corscience.de
---
 common/cmd_bdinfo.c |2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/common/cmd_bdinfo.c b/common/cmd_bdinfo.c
index bba7374..1d76ffa 100644
--- a/common/cmd_bdinfo.c
+++ b/common/cmd_bdinfo.c
@@ -304,7 +304,7 @@ int do_bdinfo ( cmd_tbl_t *cmdtp, int flag, int argc, char 
* const argv[])
 
 #elif defined(CONFIG_AVR32)
 
-int do_bdinfo ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_bdinfo ( cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 {
bd_t *bd = gd-bd;
 
-- 
1.7.2.3

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[U-Boot] [PATCH] cmd_bmp.c: message about compressed formats is debug info only.

Signed-off-by: Wolfgang Denk w...@denx.de
Cc: Anatolij Gustschin ag...@denx.de
---
 common/cmd_bmp.c |2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/common/cmd_bmp.c b/common/cmd_bmp.c
index f2a48f7..23fc82f 100644
--- a/common/cmd_bmp.c
+++ b/common/cmd_bmp.c
@@ -79,7 +79,7 @@ bmp_image_t *gunzip_bmp(unsigned long addr, unsigned long 
*lenp)
return NULL;
}
 
-   puts(Gzipped BMP image detected!\n);
+   debug(Gzipped BMP image detected!\n);
 
return bmp;
 }
-- 
1.7.4

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[U-Boot] [PATCH 0/3] Get AVR32 boards working with partial linking

This patch series make avr32 boards compile again. They where broken by
partial linking changes.

Additionally two warnings fixed. MAKEALL complained broken boards cause of
these warnings.

In my opinion these changes are fixes and should go into v2011.03. Some more
changes will follow for AVR32/AT91 rework branch.

All patches tested with atstk1002 and one selfmade board not in official tree.

Andreas Bießmann (3):
  cmd_nvedit: use explicit typecast for printf
  avr32: fix linking
  common/cmd_bdinfo.c: fix do_bdinfo() for AVR32

 arch/avr32/config.mk   |2 +-
 board/atmel/atngw100/config.mk |1 -
 board/atmel/atstk1000/config.mk|1 -
 board/earthlcd/favr-32-ezkit/config.mk |1 -
 board/mimc/mimc200/config.mk   |1 -
 board/miromico/hammerhead/config.mk|1 -
 common/cmd_bdinfo.c|2 +-
 common/cmd_nvedit.c|4 ++--
 8 files changed, 4 insertions(+), 9 deletions(-)

-- 
1.7.2.3

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[U-Boot] [PATCH 2/3] avr32: fix linking

This patch fixes following error:

---8---
avr32-linux-ld: --gc-sections and -r may not be used together
---8---

Since 8aba9dceebb14144e07d19593111ee3a999c37fc all avr32 boards are broken due
to linking error as seen above.

Signed-off-by: Andreas Bießmann biessm...@corscience.de
---
 arch/avr32/config.mk   |2 +-
 board/atmel/atngw100/config.mk |1 -
 board/atmel/atstk1000/config.mk|1 -
 board/earthlcd/favr-32-ezkit/config.mk |1 -
 board/mimc/mimc200/config.mk   |1 -
 board/miromico/hammerhead/config.mk|1 -
 6 files changed, 1 insertions(+), 6 deletions(-)

diff --git a/arch/avr32/config.mk b/arch/avr32/config.mk
index 1121ca1..51b9995 100644
--- a/arch/avr32/config.mk
+++ b/arch/avr32/config.mk
@@ -26,4 +26,4 @@ CROSS_COMPILE ?= avr32-linux-
 STANDALONE_LOAD_ADDR = 0x
 
 PLATFORM_RELFLAGS  += -ffixed-r5 -fPIC -mno-init-got -mrelax
-PLATFORM_LDFLAGS   += --relax
+LDFLAGS_u-boot = --gc-sections --relax
diff --git a/board/atmel/atngw100/config.mk b/board/atmel/atngw100/config.mk
index ea76d05..c3c7433 100644
--- a/board/atmel/atngw100/config.mk
+++ b/board/atmel/atngw100/config.mk
@@ -1,3 +1,2 @@
 CONFIG_SYS_TEXT_BASE   = 0x
 PLATFORM_RELFLAGS  += -ffunction-sections -fdata-sections
-PLATFORM_LDFLAGS   += --gc-sections
diff --git a/board/atmel/atstk1000/config.mk b/board/atmel/atstk1000/config.mk
index 8c03b77..bec7b7d 100644
--- a/board/atmel/atstk1000/config.mk
+++ b/board/atmel/atstk1000/config.mk
@@ -1,4 +1,3 @@
 PLATFORM_RELFLAGS  += -ffunction-sections -fdata-sections
-PLATFORM_LDFLAGS   += --gc-sections
 CONFIG_SYS_TEXT_BASE   = 0x
 LDSCRIPT   = $(src)board/atmel/atstk1000/u-boot.lds
diff --git a/board/earthlcd/favr-32-ezkit/config.mk 
b/board/earthlcd/favr-32-ezkit/config.mk
index f8bc88d..eb607ee 100644
--- a/board/earthlcd/favr-32-ezkit/config.mk
+++ b/board/earthlcd/favr-32-ezkit/config.mk
@@ -1,4 +1,3 @@
 PLATFORM_RELFLAGS  += -ffunction-sections -fdata-sections
-PLATFORM_LDFLAGS   += --gc-sections
 CONFIG_SYS_TEXT_BASE   = 0x
 LDSCRIPT   = $(src)board/earthlcd/favr-32-ezkit/u-boot.lds
diff --git a/board/mimc/mimc200/config.mk b/board/mimc/mimc200/config.mk
index ea76d05..c3c7433 100644
--- a/board/mimc/mimc200/config.mk
+++ b/board/mimc/mimc200/config.mk
@@ -1,3 +1,2 @@
 CONFIG_SYS_TEXT_BASE   = 0x
 PLATFORM_RELFLAGS  += -ffunction-sections -fdata-sections
-PLATFORM_LDFLAGS   += --gc-sections
diff --git a/board/miromico/hammerhead/config.mk 
b/board/miromico/hammerhead/config.mk
index ea76d05..c3c7433 100644
--- a/board/miromico/hammerhead/config.mk
+++ b/board/miromico/hammerhead/config.mk
@@ -1,3 +1,2 @@
 CONFIG_SYS_TEXT_BASE   = 0x
 PLATFORM_RELFLAGS  += -ffunction-sections -fdata-sections
-PLATFORM_LDFLAGS   += --gc-sections
-- 
1.7.2.3

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[U-Boot] [PATCH 1/3] cmd_nvedit: use explicit typecast for printf

This patch fixes warnings in MAKEALL for avr32:

---8---
cmd_nvedit.c: In function 'do_env_export':
cmd_nvedit.c:663: warning: format '%zX' expects type 'size_t', but argument 3 
has type 'ssize_t'
---8---

Signed-off-by: Andreas Bießmann biessm...@corscience.de
---
 common/cmd_nvedit.c |4 ++--
 1 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/common/cmd_nvedit.c b/common/cmd_nvedit.c
index fb69c24..6d8512a 100644
--- a/common/cmd_nvedit.c
+++ b/common/cmd_nvedit.c
@@ -659,7 +659,7 @@ static int do_env_export(cmd_tbl_t *cmdtp, int flag, int 
argc, char * const argv
errno);
return 1;
}
-   sprintf(buf, %zX, len);
+   sprintf(buf, %zX, (size_t)len);
setenv(filesize, buf);
 
return 0;
@@ -685,7 +685,7 @@ static int do_env_export(cmd_tbl_t *cmdtp, int flag, int 
argc, char * const argv
envp-flags = ACTIVE_FLAG;
 #endif
}
-   sprintf(buf, %zX, len + offsetof(env_t,data));
+   sprintf(buf, %zX, (size_t)(len + offsetof(env_t,data)));
setenv(filesize, buf);
 
return 0;
-- 
1.7.2.3

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Re: [U-Boot] [PATCH 0/3] Get AVR32 boards working with partial linking

2011-02-09 Thread Reinhard Meyer

Dear Andreas Bießmann,
 This patch series make avr32 boards compile again. They where broken by
 partial linking changes.
 
 Additionally two warnings fixed. MAKEALL complained broken boards cause of
 these warnings.
 
 In my opinion these changes are fixes and should go into v2011.03. Some more
 changes will follow for AVR32/AT91 rework branch.

Ok, yes it should be a bug fix.

 
 All patches tested with atstk1002 and one selfmade board not in official tree.
 
 Andreas Bießmann (3):
   cmd_nvedit: use explicit typecast for printf
   avr32: fix linking
   common/cmd_bdinfo.c: fix do_bdinfo() for AVR32
 
  arch/avr32/config.mk   |2 +-
  board/atmel/atngw100/config.mk |1 -
  board/atmel/atstk1000/config.mk|1 -
  board/earthlcd/favr-32-ezkit/config.mk |1 -
  board/mimc/mimc200/config.mk   |1 -
  board/miromico/hammerhead/config.mk|1 -

I can take those through u-boot-atmel.

  common/cmd_bdinfo.c|2 +-
  common/cmd_nvedit.c|4 ++--

Shall I also handle those, or is someone else going to handle them? Wolfgang?

Best Regards,
Reinhard
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[U-Boot] [PATCH 02/15] avr32: use single linker script

This patch move the atstk100x linker script to $(CPUDIR) and delete other
pure copies of this file in each board directory.

Signed-off-by: Andreas Bießmann biessm...@corscience.de
---
 arch/avr32/config.mk   |2 +
 .../atmel/atstk1000 = arch/avr32/cpu}/u-boot.lds  |0
 board/atmel/atngw100/u-boot.lds|   72 
 board/atmel/atstk1000/config.mk|1 -
 board/earthlcd/favr-32-ezkit/config.mk |1 -
 board/earthlcd/favr-32-ezkit/u-boot.lds|   70 ---
 board/mimc/mimc200/u-boot.lds  |   72 
 board/miromico/hammerhead/u-boot.lds   |   72 
 8 files changed, 2 insertions(+), 288 deletions(-)
 rename {board/atmel/atstk1000 = arch/avr32/cpu}/u-boot.lds (100%)
 delete mode 100644 board/atmel/atngw100/u-boot.lds
 delete mode 100644 board/earthlcd/favr-32-ezkit/u-boot.lds
 delete mode 100644 board/mimc/mimc200/u-boot.lds
 delete mode 100644 board/miromico/hammerhead/u-boot.lds

diff --git a/arch/avr32/config.mk b/arch/avr32/config.mk
index eab4b49..9a98bc4 100644
--- a/arch/avr32/config.mk
+++ b/arch/avr32/config.mk
@@ -29,3 +29,5 @@ PLATFORM_RELFLAGS += -ffixed-r5 -fPIC -mno-init-got 
-mrelax
 PLATFORM_RELFLAGS  += -ffunction-sections -fdata-sections
 
 LDFLAGS_u-boot = --gc-sections --relax
+
+LDSCRIPT   := $(SRCTREE)/$(CPUDIR)/u-boot.lds
diff --git a/board/atmel/atstk1000/u-boot.lds b/arch/avr32/cpu/u-boot.lds
similarity index 100%
rename from board/atmel/atstk1000/u-boot.lds
rename to arch/avr32/cpu/u-boot.lds
diff --git a/board/atmel/atngw100/u-boot.lds b/board/atmel/atngw100/u-boot.lds
deleted file mode 100644
index a7243f2..000
--- a/board/atmel/atngw100/u-boot.lds
+++ /dev/null
@@ -1,72 +0,0 @@
-/* -*- Fundamental -*-
- *
- * Copyright (C) 2005-2006 Atmel Corporation
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-OUTPUT_FORMAT(elf32-avr32, elf32-avr32, elf32-avr32)
-OUTPUT_ARCH(avr32)
-ENTRY(_start)
-
-SECTIONS
-{
-   . = 0;
-   _text = .;
-   .text : {
-   *(.exception.text)
-   *(.text)
-   *(.text.*)
-   }
-   _etext = .;
-
-   .rodata : {
-   *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
-   }
-
-   . = ALIGN(8);
-   _data = .;
-   .data : {
-   *(.data)
-   *(.data.*)
-   }
-
-   . = ALIGN(4);
-   __u_boot_cmd_start = .;
-   .u_boot_cmd : {
-   KEEP(*(.u_boot_cmd))
-   }
-   __u_boot_cmd_end = .;
-
-   . = ALIGN(4);
-   _got = .;
-   .got : {
-   *(.got)
-   }
-   _egot = .;
-
-   . = ALIGN(8);
-   _edata = .;
-
-   .bss : {
-   *(.bss)
-   *(.bss.*)
-   }
-   . = ALIGN(8);
-   _end = .;
-}
diff --git a/board/atmel/atstk1000/config.mk b/board/atmel/atstk1000/config.mk
index bcc0886..34b709a 100644
--- a/board/atmel/atstk1000/config.mk
+++ b/board/atmel/atstk1000/config.mk
@@ -1,2 +1 @@
 CONFIG_SYS_TEXT_BASE   = 0x
-LDSCRIPT   = $(src)board/atmel/atstk1000/u-boot.lds
diff --git a/board/earthlcd/favr-32-ezkit/config.mk 
b/board/earthlcd/favr-32-ezkit/config.mk
index 838660f..34b709a 100644
--- a/board/earthlcd/favr-32-ezkit/config.mk
+++ b/board/earthlcd/favr-32-ezkit/config.mk
@@ -1,2 +1 @@
 CONFIG_SYS_TEXT_BASE   = 0x
-LDSCRIPT   = $(src)board/earthlcd/favr-32-ezkit/u-boot.lds
diff --git a/board/earthlcd/favr-32-ezkit/u-boot.lds 
b/board/earthlcd/favr-32-ezkit/u-boot.lds
deleted file mode 100644
index 0d413a0..000
--- a/board/earthlcd/favr-32-ezkit/u-boot.lds
+++ /dev/null
@@ -1,70 +0,0 @@
-/* -*- Fundamental -*-
- *
- * Copyright (C) 2008 Atmel Corporation
- *
- * See file CREDITS for list of people who contributed to this project.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the Free
- * Software Foundation; either version 2 of the License, or (at your option)
- * any later version.
- *
- * This program is distributed in

[U-Boot] [PATCH 10/15] mimc200: fix #define XXXX 1

Signed-off-by: Andreas Bießmann biessm...@corscience.de
---
 include/configs/mimc200.h |   56 ++--
 1 files changed, 28 insertions(+), 28 deletions(-)

diff --git a/include/configs/mimc200.h b/include/configs/mimc200.h
index f004ec8..66b9477 100644
--- a/include/configs/mimc200.h
+++ b/include/configs/mimc200.h
@@ -26,12 +26,12 @@
 
 #include asm/arch/hardware.h
 
-#define CONFIG_AVR32   1
-#define CONFIG_AT32AP  1
-#define CONFIG_AT32AP7000  1
-#define CONFIG_MIMC200 1
+#define CONFIG_AVR32
+#define CONFIG_AT32AP
+#define CONFIG_AT32AP7000
+#define CONFIG_MIMC200
 
-#define CONFIG_MIMC200_EXT_FLASH   1
+#define CONFIG_MIMC200_EXT_FLASH
 
 #define CONFIG_SYS_HZ  1000
 
@@ -40,8 +40,8 @@
  * frequency, the HSB and PBB busses to run at 1/2 the PLL frequency
  * and the PBA bus to run at 1/4 the PLL frequency.
  */
-#define CONFIG_PLL 1
-#define CONFIG_SYS_POWER_MANAGER   1
+#define CONFIG_PLL
+#define CONFIG_SYS_POWER_MANAGER
 #define CONFIG_SYS_OSC0_HZ 1000
 #define CONFIG_SYS_PLL0_DIV1
 #define CONFIG_SYS_PLL0_MUL15
@@ -69,11 +69,11 @@
 #define CONFIG_MIMC200_DBGLINK 1
 
 /* User serviceable stuff */
-#define CONFIG_DOS_PARTITION   1
+#define CONFIG_DOS_PARTITION
 
-#define CONFIG_CMDLINE_TAG 1
-#define CONFIG_SETUP_MEMORY_TAGS   1
-#define CONFIG_INITRD_TAG  1
+#define CONFIG_CMDLINE_TAG
+#define CONFIG_SETUP_MEMORY_TAGS
+#define CONFIG_INITRD_TAG
 
 #define CONFIG_STACKSIZE   (2048)
 
@@ -83,9 +83,9 @@
 #define CONFIG_BOOTCOMMAND \
fsload boot/uImage; bootm
 
-#define CONFIG_SILENT_CONSOLE  1   /* enable silent startup */
-#define CONFIG_DISABLE_CONSOLE 1   /* disable console */
-#define CONFIG_SYS_DEVICE_NULLDEV  1   /* include nulldev 
device */
+#define CONFIG_SILENT_CONSOLE   /* enable silent startup */
+#define CONFIG_DISABLE_CONSOLE  /* disable console */
+#define CONFIG_SYS_DEVICE_NULLDEV   /* include nulldev device */
 
 #define CONFIG_LCD 1
 
@@ -94,16 +94,16 @@
  * data on the serial line may interrupt the boot sequence.
  */
 #define CONFIG_BOOTDELAY   0
-#define CONFIG_ZERO_BOOTDELAY_CHECK1
-#define CONFIG_AUTOBOOT1
+#define CONFIG_ZERO_BOOTDELAY_CHECK
+#define CONFIG_AUTOBOOT
 
 /*
  * After booting the board for the first time, new ethernet addresses
  * should be generated and assigned to the environment variables
  * ethaddr and eth1addr. This is normally done during production.
  */
-#define CONFIG_OVERWRITE_ETHADDR_ONCE  1
-#define CONFIG_NET_MULTI   1
+#define CONFIG_OVERWRITE_ETHADDR_ONCE
+#define CONFIG_NET_MULTI
 
 /*
  * BOOTP/DHCP options
@@ -124,13 +124,13 @@
 #define CONFIG_CMD_MMC
 #define CONFIG_CMD_NET
 
-#define CONFIG_ATMEL_USART 1
-#define CONFIG_MACB1
-#define CONFIG_PORTMUX_PIO 1
+#define CONFIG_ATMEL_USART
+#define CONFIG_MACB
+#define CONFIG_PORTMUX_PIO
 #define CONFIG_SYS_NR_PIOS 5
-#define CONFIG_SYS_HSDRAMC 1
-#define CONFIG_MMC 1
-#define CONFIG_ATMEL_MCI   1
+#define CONFIG_SYS_HSDRAMC
+#define CONFIG_MMC
+#define CONFIG_ATMEL_MCI
 
 #if defined(CONFIG_LCD)
 #define CONFIG_CMD_BMP
@@ -151,8 +151,8 @@
 
 #define CONFIG_NR_DRAM_BANKS   1
 
-#define CONFIG_SYS_FLASH_CFI   1
-#define CONFIG_FLASH_CFI_DRIVER1
+#define CONFIG_SYS_FLASH_CFI
+#define CONFIG_FLASH_CFI_DRIVER
 
 #define CONFIG_SYS_FLASH_BASE  0x
 #define CONFIG_SYS_FLASH_SIZE  0x80
@@ -168,7 +168,7 @@
 #define CONFIG_SYS_FRAM_BASE   0x0800
 #define CONFIG_SYS_FRAM_SIZE   0x2
 
-#define CONFIG_ENV_IS_IN_FLASH 1
+#define CONFIG_ENV_IS_IN_FLASH
 #define CONFIG_ENV_SIZE65536
 #define CONFIG_ENV_ADDR(CONFIG_SYS_FLASH_BASE + 
CONFIG_SYS_FLASH_SIZE - CONFIG_ENV_SIZE)
 
@@ -186,7 +186,7 @@
 #define CONFIG_SYS_CBSIZE  256
 #define CONFIG_SYS_MAXARGS 16
 #define CONFIG_SYS_PBSIZE  (CONFIG_SYS_CBSIZE + 
sizeof(CONFIG_SYS_PROMPT) + 16)
-#define CONFIG_SYS_LONGHELP1
+#define CONFIG_SYS_LONGHELP
 
 #define CONFIG_SYS_MEMTEST_START   EBI_SDRAM_BASE
 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 
0x1f0)
-- 
1.7.2.3

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[U-Boot] [PATCH 00/15] [REWORK AVR32/AT91] additional changes for avr32

This series do some cleanup all avr32 boards. This series is on top of 'Get
AVR32 boards working with partial linking' rebased to
u-boot-atmel/rework110202.

In summary the board specific config.mk and u-boot.lds files are deleted in
favor of a version at architecture level. Theses files had all the same
content cause they where pure copies of the atstk100x ones.

I have splitted the patches to each board cause some of them should be
actively maintained and the respectively maintainer should have a chance to
give some feedback.

Andreas Bießmann (15):
  avr32/config.mk: simplify PLATFORM_RELFLAGS
  avr32: use single linker script
  atngw100: fix #define  1
  atstk1002: fix #define  1
  atstk1003: fix #define  1
  atstk1004: fix #define  1
  atstk1006: fix #define  1
  favr-32-ezkit: fix #define  1
  hammerhead: fix #define  1
  mimc200: fix #define  1
  atngw100: move CONFIG_SYS_TEXT_BASE to header
  atstk100x: move CONFIG_SYS_TEXT_BASE to header
  favr-32-ezkit: move CONFIG_SYS_TEXT_BASE to header
  mimc200: move CONFIG_SYS_TEXT_BASE to header
  hammerhead: move CONFIG_SYS_TEXT_BASE to header

 arch/avr32/config.mk   |4 +
 .../atmel/atstk1000 = arch/avr32/cpu}/u-boot.lds  |0
 board/atmel/atngw100/config.mk |2 -
 board/atmel/atngw100/u-boot.lds|   72 
 board/atmel/atstk1000/config.mk|3 -
 board/earthlcd/favr-32-ezkit/config.mk |3 -
 board/earthlcd/favr-32-ezkit/u-boot.lds|   70 ---
 board/mimc/mimc200/config.mk   |2 -
 board/mimc/mimc200/u-boot.lds  |   72 
 board/miromico/hammerhead/config.mk|2 -
 board/miromico/hammerhead/u-boot.lds   |   72 
 include/configs/atngw100.h |   55 ---
 include/configs/atstk1002.h|   49 +++---
 include/configs/atstk1003.h|   43 ++--
 include/configs/atstk1004.h|   43 ++--
 include/configs/atstk1006.h|   49 +++---
 include/configs/favr-32-ezkit.h|   47 +++--
 include/configs/hammerhead.h   |   49 +++---
 include/configs/mimc200.h  |   57 
 19 files changed, 204 insertions(+), 490 deletions(-)
 rename {board/atmel/atstk1000 = arch/avr32/cpu}/u-boot.lds (100%)
 delete mode 100644 board/atmel/atngw100/config.mk
 delete mode 100644 board/atmel/atngw100/u-boot.lds
 delete mode 100644 board/atmel/atstk1000/config.mk
 delete mode 100644 board/earthlcd/favr-32-ezkit/config.mk
 delete mode 100644 board/earthlcd/favr-32-ezkit/u-boot.lds
 delete mode 100644 board/mimc/mimc200/config.mk
 delete mode 100644 board/mimc/mimc200/u-boot.lds
 delete mode 100644 board/miromico/hammerhead/config.mk
 delete mode 100644 board/miromico/hammerhead/u-boot.lds

-- 
1.7.2.3

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[U-Boot] [PATCH 06/15] atstk1004: fix #define XXXX 1

Signed-off-by: Andreas Bießmann biessm...@corscience.de
---
 include/configs/atstk1004.h |   42 +-
 1 files changed, 21 insertions(+), 21 deletions(-)

diff --git a/include/configs/atstk1004.h b/include/configs/atstk1004.h
index 344ba8f..a225395 100644
--- a/include/configs/atstk1004.h
+++ b/include/configs/atstk1004.h
@@ -26,13 +26,13 @@
 
 #include asm/arch/hardware.h
 
-#define CONFIG_AVR32   1
-#define CONFIG_AT32AP  1
-#define CONFIG_AT32AP7002  1
-#define CONFIG_ATSTK1004   1
-#define CONFIG_ATSTK1000   1
+#define CONFIG_AVR32
+#define CONFIG_AT32AP
+#define CONFIG_AT32AP7002
+#define CONFIG_ATSTK1004
+#define CONFIG_ATSTK1000
 
-#define CONFIG_ATSTK1000_EXT_FLASH 1
+#define CONFIG_ATSTK1000_EXT_FLASH
 
 /*
  * Timer clock frequency. We're using the CPU-internal COUNT register
@@ -46,8 +46,8 @@
  * PLL frequency.
  * (CONFIG_SYS_OSC0_HZ * CONFIG_SYS_PLL0_MUL) / CONFIG_SYS_PLL0_DIV = PLL MHz
  */
-#define CONFIG_PLL 1
-#define CONFIG_SYS_POWER_MANAGER   1
+#define CONFIG_PLL
+#define CONFIG_SYS_POWER_MANAGER
 #define CONFIG_SYS_OSC0_HZ 2000
 #define CONFIG_SYS_PLL0_DIV1
 #define CONFIG_SYS_PLL0_MUL7
@@ -89,11 +89,11 @@
 #define CONFIG_USART_ID1
 
 /* User serviceable stuff */
-#define CONFIG_DOS_PARTITION   1
+#define CONFIG_DOS_PARTITION
 
-#define CONFIG_CMDLINE_TAG 1
-#define CONFIG_SETUP_MEMORY_TAGS   1
-#define CONFIG_INITRD_TAG  1
+#define CONFIG_CMDLINE_TAG
+#define CONFIG_SETUP_MEMORY_TAGS
+#define CONFIG_INITRD_TAG
 
 #define CONFIG_STACKSIZE   (2048)
 
@@ -109,8 +109,8 @@
  * data on the serial line may interrupt the boot sequence.
  */
 #define CONFIG_BOOTDELAY   1
-#define CONFIG_AUTOBOOT1
-#define CONFIG_AUTOBOOT_KEYED  1
+#define CONFIG_AUTOBOOT
+#define CONFIG_AUTOBOOT_KEYED
 #define CONFIG_AUTOBOOT_PROMPT \
Press SPACE to abort autoboot in %d seconds\n, bootdelay
 #define CONFIG_AUTOBOOT_DELAY_STR  d
@@ -133,11 +133,11 @@
 #undef CONFIG_CMD_SETGETDCR
 #undef CONFIG_CMD_XIMG
 
-#define CONFIG_ATMEL_USART 1
-#define CONFIG_PORTMUX_PIO 1
-#define CONFIG_SYS_HSDRAMC 1
-#define CONFIG_MMC 1
-#define CONFIG_ATMEL_MCI   1
+#define CONFIG_ATMEL_USART
+#define CONFIG_PORTMUX_PIO
+#define CONFIG_SYS_HSDRAMC
+#define CONFIG_MMC
+#define CONFIG_ATMEL_MCI
 
 #define CONFIG_SYS_DCACHE_LINESZ   32
 #define CONFIG_SYS_ICACHE_LINESZ   32
@@ -161,7 +161,7 @@
 #define CONFIG_SYS_INTRAM_SIZE INTERNAL_SRAM_SIZE
 #define CONFIG_SYS_SDRAM_BASE  EBI_SDRAM_BASE
 
-#define CONFIG_ENV_IS_IN_FLASH 1
+#define CONFIG_ENV_IS_IN_FLASH
 #define CONFIG_ENV_SIZE65536
 #define CONFIG_ENV_ADDR(CONFIG_SYS_FLASH_BASE + 
CONFIG_SYS_FLASH_SIZE - CONFIG_ENV_SIZE)
 
@@ -178,7 +178,7 @@
 #define CONFIG_SYS_CBSIZE  256
 #define CONFIG_SYS_MAXARGS 16
 #define CONFIG_SYS_PBSIZE  (CONFIG_SYS_CBSIZE + 
sizeof(CONFIG_SYS_PROMPT) + 16)
-#define CONFIG_SYS_LONGHELP1
+#define CONFIG_SYS_LONGHELP
 
 #define CONFIG_SYS_MEMTEST_START   EBI_SDRAM_BASE
 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 
0x70)
-- 
1.7.2.3

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[U-Boot] [PATCH 11/15] atngw100: move CONFIG_SYS_TEXT_BASE to header

Signed-off-by: Andreas Bießmann biessm...@corscience.de
---
 board/atmel/atngw100/config.mk |1 -
 include/configs/atngw100.h |1 +
 2 files changed, 1 insertions(+), 1 deletions(-)
 delete mode 100644 board/atmel/atngw100/config.mk

diff --git a/board/atmel/atngw100/config.mk b/board/atmel/atngw100/config.mk
deleted file mode 100644
index 34b709a..000
--- a/board/atmel/atngw100/config.mk
+++ /dev/null
@@ -1 +0,0 @@
-CONFIG_SYS_TEXT_BASE   = 0x
diff --git a/include/configs/atngw100.h b/include/configs/atngw100.h
index 70f1e8a..bda6eed 100644
--- a/include/configs/atngw100.h
+++ b/include/configs/atngw100.h
@@ -149,6 +149,7 @@
 #define CONFIG_SYS_MAX_FLASH_SECT  135
 
 #define CONFIG_SYS_MONITOR_BASECONFIG_SYS_FLASH_BASE
+#define CONFIG_SYS_TEXT_BASE   0x
 
 #define CONFIG_SYS_INTRAM_BASE INTERNAL_SRAM_BASE
 #define CONFIG_SYS_INTRAM_SIZE INTERNAL_SRAM_SIZE
-- 
1.7.2.3

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[U-Boot] [PATCH 09/15] hammerhead: fix #define XXXX 1

Signed-off-by: Andreas Bießmann biessm...@corscience.de
---
 include/configs/hammerhead.h |   48 +-
 1 files changed, 24 insertions(+), 24 deletions(-)

diff --git a/include/configs/hammerhead.h b/include/configs/hammerhead.h
index 1f20fff..5a2d146 100644
--- a/include/configs/hammerhead.h
+++ b/include/configs/hammerhead.h
@@ -24,10 +24,10 @@
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
-#define CONFIG_AVR32   1
-#define CONFIG_AT32AP  1
-#define CONFIG_AT32AP7000  1
-#define CONFIG_HAMMERHEAD  1
+#define CONFIG_AVR32
+#define CONFIG_AT32AP
+#define CONFIG_AT32AP7000
+#define CONFIG_HAMMERHEAD
 
 #define CONFIG_SYS_HZ  1000
 
@@ -36,8 +36,8 @@
  * frequency, the HSB and PBB busses to run at 1/2 the PLL frequency
  * and the PBA bus to run at 1/4 the PLL frequency.
  */
-#define CONFIG_PLL 1
-#define CONFIG_SYS_POWER_MANAGER   1
+#define CONFIG_PLL
+#define CONFIG_SYS_POWER_MANAGER
 #define CONFIG_SYS_OSC0_HZ 2500
 #define CONFIG_SYS_PLL0_DIV1
 #define CONFIG_SYS_PLL0_MUL5
@@ -65,11 +65,11 @@
 #define CONFIG_HOSTNAMEhammerhead
 
 /* User serviceable stuff */
-#define CONFIG_DOS_PARTITION   1
+#define CONFIG_DOS_PARTITION
 
-#define CONFIG_CMDLINE_TAG 1
-#define CONFIG_SETUP_MEMORY_TAGS   1
-#define CONFIG_INITRD_TAG  1
+#define CONFIG_CMDLINE_TAG
+#define CONFIG_SETUP_MEMORY_TAGS
+#define CONFIG_INITRD_TAG
 
 #define CONFIG_STACKSIZE   (2048)
 
@@ -84,8 +84,8 @@
  * data on the serial line may interrupt the boot sequence.
  */
 #define CONFIG_BOOTDELAY   1
-#define CONFIG_AUTOBOOT1
-#define CONFIG_AUTOBOOT_KEYED  1
+#define CONFIG_AUTOBOOT
+#define CONFIG_AUTOBOOT_KEYED
 #define CONFIG_AUTOBOOT_PROMPT \
Press SPACE to abort autoboot in %d seconds\n, bootdelay
 #define CONFIG_AUTOBOOT_DELAY_STR  d
@@ -96,8 +96,8 @@
  * should be generated and assigned to the environment variables
  * ethaddr. This is normally done during production.
  */
-#define CONFIG_OVERWRITE_ETHADDR_ONCE  1
-#define CONFIG_NET_MULTI   1
+#define CONFIG_OVERWRITE_ETHADDR_ONCE
+#define CONFIG_NET_MULTI
 
 /*
  * BOOTP/DHCP options
@@ -119,21 +119,21 @@
 #undef CONFIG_CMD_FPGA
 #undef CONFIG_CMD_SETGETDCR
 
-#define CONFIG_ATMEL_USART 1
-#define CONFIG_MACB1
-#define CONFIG_PORTMUX_PIO 1
+#define CONFIG_ATMEL_USART
+#define CONFIG_MACB
+#define CONFIG_PORTMUX_PIO
 #define CONFIG_SYS_NR_PIOS 5
-#define CONFIG_SYS_HSDRAMC 1
-#define CONFIG_MMC 1
-#define CONFIG_ATMEL_MCI   1
+#define CONFIG_SYS_HSDRAMC
+#define CONFIG_MMC
+#define CONFIG_ATMEL_MCI
 
 #define CONFIG_SYS_DCACHE_LINESZ   32
 #define CONFIG_SYS_ICACHE_LINESZ   32
 
 #define CONFIG_NR_DRAM_BANKS   1
 
-#define CONFIG_SYS_FLASH_CFI   1
-#define CONFIG_FLASH_CFI_DRIVER1
+#define CONFIG_SYS_FLASH_CFI
+#define CONFIG_FLASH_CFI_DRIVER
 
 #define CONFIG_SYS_FLASH_BASE  0x
 #define CONFIG_SYS_FLASH_SIZE  0x80
@@ -147,7 +147,7 @@
 
 #define CONFIG_SYS_SDRAM_BASE  0x1000
 
-#define CONFIG_ENV_IS_IN_FLASH 1
+#define CONFIG_ENV_IS_IN_FLASH
 #define CONFIG_ENV_SIZE65536
 #define CONFIG_ENV_ADDR(CONFIG_SYS_FLASH_BASE + 
CONFIG_SYS_FLASH_SIZE - CONFIG_ENV_SIZE)
 
@@ -166,7 +166,7 @@
 #define CONFIG_SYS_CBSIZE  256
 #define CONFIG_SYS_MAXARGS 16
 #define CONFIG_SYS_PBSIZE  (CONFIG_SYS_CBSIZE + 
sizeof(CONFIG_SYS_PROMPT) + 16)
-#define CONFIG_SYS_LONGHELP1
+#define CONFIG_SYS_LONGHELP
 
 #define CONFIG_SYS_MEMTEST_START   CONFIG_SYS_SDRAM_BASE
 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 
0x1f0)
-- 
1.7.2.3

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[U-Boot] [PATCH 01/15] avr32/config.mk: simplify PLATFORM_RELFLAGS

This patch removes PLATFORM_RELFLAGS from board specific config.mk files and
define them in arch specific config.mk file.

Signed-off-by: Andreas Bießmann biessm...@corscience.de
---
 arch/avr32/config.mk   |2 ++
 board/atmel/atngw100/config.mk |1 -
 board/atmel/atstk1000/config.mk|1 -
 board/earthlcd/favr-32-ezkit/config.mk |1 -
 board/mimc/mimc200/config.mk   |1 -
 board/miromico/hammerhead/config.mk|1 -
 6 files changed, 2 insertions(+), 5 deletions(-)

diff --git a/arch/avr32/config.mk b/arch/avr32/config.mk
index 51b9995..eab4b49 100644
--- a/arch/avr32/config.mk
+++ b/arch/avr32/config.mk
@@ -26,4 +26,6 @@ CROSS_COMPILE ?= avr32-linux-
 STANDALONE_LOAD_ADDR = 0x
 
 PLATFORM_RELFLAGS  += -ffixed-r5 -fPIC -mno-init-got -mrelax
+PLATFORM_RELFLAGS  += -ffunction-sections -fdata-sections
+
 LDFLAGS_u-boot = --gc-sections --relax
diff --git a/board/atmel/atngw100/config.mk b/board/atmel/atngw100/config.mk
index c3c7433..34b709a 100644
--- a/board/atmel/atngw100/config.mk
+++ b/board/atmel/atngw100/config.mk
@@ -1,2 +1 @@
 CONFIG_SYS_TEXT_BASE   = 0x
-PLATFORM_RELFLAGS  += -ffunction-sections -fdata-sections
diff --git a/board/atmel/atstk1000/config.mk b/board/atmel/atstk1000/config.mk
index bec7b7d..bcc0886 100644
--- a/board/atmel/atstk1000/config.mk
+++ b/board/atmel/atstk1000/config.mk
@@ -1,3 +1,2 @@
-PLATFORM_RELFLAGS  += -ffunction-sections -fdata-sections
 CONFIG_SYS_TEXT_BASE   = 0x
 LDSCRIPT   = $(src)board/atmel/atstk1000/u-boot.lds
diff --git a/board/earthlcd/favr-32-ezkit/config.mk 
b/board/earthlcd/favr-32-ezkit/config.mk
index eb607ee..838660f 100644
--- a/board/earthlcd/favr-32-ezkit/config.mk
+++ b/board/earthlcd/favr-32-ezkit/config.mk
@@ -1,3 +1,2 @@
-PLATFORM_RELFLAGS  += -ffunction-sections -fdata-sections
 CONFIG_SYS_TEXT_BASE   = 0x
 LDSCRIPT   = $(src)board/earthlcd/favr-32-ezkit/u-boot.lds
diff --git a/board/mimc/mimc200/config.mk b/board/mimc/mimc200/config.mk
index c3c7433..34b709a 100644
--- a/board/mimc/mimc200/config.mk
+++ b/board/mimc/mimc200/config.mk
@@ -1,2 +1 @@
 CONFIG_SYS_TEXT_BASE   = 0x
-PLATFORM_RELFLAGS  += -ffunction-sections -fdata-sections
diff --git a/board/miromico/hammerhead/config.mk 
b/board/miromico/hammerhead/config.mk
index c3c7433..34b709a 100644
--- a/board/miromico/hammerhead/config.mk
+++ b/board/miromico/hammerhead/config.mk
@@ -1,2 +1 @@
 CONFIG_SYS_TEXT_BASE   = 0x
-PLATFORM_RELFLAGS  += -ffunction-sections -fdata-sections
-- 
1.7.2.3

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[U-Boot] [PATCH 15/15] hammerhead: move CONFIG_SYS_TEXT_BASE to header

Signed-off-by: Andreas Bießmann biessm...@corscience.de
---
 board/miromico/hammerhead/config.mk |1 -
 include/configs/hammerhead.h|1 +
 2 files changed, 1 insertions(+), 1 deletions(-)
 delete mode 100644 board/miromico/hammerhead/config.mk

diff --git a/board/miromico/hammerhead/config.mk 
b/board/miromico/hammerhead/config.mk
deleted file mode 100644
index 34b709a..000
--- a/board/miromico/hammerhead/config.mk
+++ /dev/null
@@ -1 +0,0 @@
-CONFIG_SYS_TEXT_BASE   = 0x
diff --git a/include/configs/hammerhead.h b/include/configs/hammerhead.h
index 5a2d146..bfdfc0a 100644
--- a/include/configs/hammerhead.h
+++ b/include/configs/hammerhead.h
@@ -141,6 +141,7 @@
 #define CONFIG_SYS_MAX_FLASH_SECT  135
 
 #define CONFIG_SYS_MONITOR_BASECONFIG_SYS_FLASH_BASE
+#define CONFIG_SYS_TEXT_BASE   0x
 
 #define CONFIG_SYS_INTRAM_BASE 0x2400
 #define CONFIG_SYS_INTRAM_SIZE 0x8000
-- 
1.7.2.3

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[U-Boot] [PATCH 03/15] atngw100: fix #define XXXX 1

Signed-off-by: Andreas Bießmann biessm...@corscience.de
---
 include/configs/atngw100.h |   54 ++--
 1 files changed, 27 insertions(+), 27 deletions(-)

diff --git a/include/configs/atngw100.h b/include/configs/atngw100.h
index a93ba8b..70f1e8a 100644
--- a/include/configs/atngw100.h
+++ b/include/configs/atngw100.h
@@ -26,10 +26,10 @@
 
 #include asm/arch/hardware.h
 
-#define CONFIG_AVR32   1
-#define CONFIG_AT32AP  1
-#define CONFIG_AT32AP7000  1
-#define CONFIG_ATNGW1001
+#define CONFIG_AVR32
+#define CONFIG_AT32AP
+#define CONFIG_AT32AP7000
+#define CONFIG_ATNGW100
 
 #define CONFIG_SYS_HZ  1000
 
@@ -38,8 +38,8 @@
  * frequency, the HSB and PBB busses to run at 1/2 the PLL frequency
  * and the PBA bus to run at 1/4 the PLL frequency.
  */
-#define CONFIG_PLL 1
-#define CONFIG_SYS_POWER_MANAGER   1
+#define CONFIG_PLL
+#define CONFIG_SYS_POWER_MANAGER
 #define CONFIG_SYS_OSC0_HZ 2000
 #define CONFIG_SYS_PLL0_DIV1
 #define CONFIG_SYS_PLL0_MUL7
@@ -64,11 +64,11 @@
 #define CONFIG_USART_BASE  ATMEL_BASE_USART1
 #define CONFIG_USART_ID1
 /* User serviceable stuff */
-#define CONFIG_DOS_PARTITION   1
+#define CONFIG_DOS_PARTITION
 
-#define CONFIG_CMDLINE_TAG 1
-#define CONFIG_SETUP_MEMORY_TAGS   1
-#define CONFIG_INITRD_TAG  1
+#define CONFIG_CMDLINE_TAG
+#define CONFIG_SETUP_MEMORY_TAGS
+#define CONFIG_INITRD_TAG
 
 #define CONFIG_STACKSIZE   (2048)
 
@@ -83,8 +83,8 @@
  * data on the serial line may interrupt the boot sequence.
  */
 #define CONFIG_BOOTDELAY   1
-#define CONFIG_AUTOBOOT1
-#define CONFIG_AUTOBOOT_KEYED  1
+#define CONFIG_AUTOBOOT
+#define CONFIG_AUTOBOOT_KEYED
 #define CONFIG_AUTOBOOT_PROMPT \
Press SPACE to abort autoboot in %d seconds\n, bootdelay
 #define CONFIG_AUTOBOOT_DELAY_STR  d
@@ -95,8 +95,8 @@
  * should be generated and assigned to the environment variables
  * ethaddr and eth1addr. This is normally done during production.
  */
-#define CONFIG_OVERWRITE_ETHADDR_ONCE  1
-#define CONFIG_NET_MULTI   1
+#define CONFIG_OVERWRITE_ETHADDR_ONCE
+#define CONFIG_NET_MULTI
 
 /*
  * BOOTP/DHCP options
@@ -123,25 +123,25 @@
 #undef CONFIG_CMD_SOURCE
 #undef CONFIG_CMD_XIMG
 
-#define CONFIG_ATMEL_USART 1
-#define CONFIG_MACB1
-#define CONFIG_PORTMUX_PIO 1
+#define CONFIG_ATMEL_USART
+#define CONFIG_MACB
+#define CONFIG_PORTMUX_PIO
 #define CONFIG_SYS_NR_PIOS 5
-#define CONFIG_SYS_HSDRAMC 1
-#define CONFIG_MMC 1
-#define CONFIG_ATMEL_MCI   1
-#define CONFIG_ATMEL_SPI   1
+#define CONFIG_SYS_HSDRAMC
+#define CONFIG_MMC
+#define CONFIG_ATMEL_MCI
+#define CONFIG_ATMEL_SPI
 
-#define CONFIG_SPI_FLASH   1
-#define CONFIG_SPI_FLASH_ATMEL 1
+#define CONFIG_SPI_FLASH
+#define CONFIG_SPI_FLASH_ATMEL
 
 #define CONFIG_SYS_DCACHE_LINESZ   32
 #define CONFIG_SYS_ICACHE_LINESZ   32
 
 #define CONFIG_NR_DRAM_BANKS   1
 
-#define CONFIG_SYS_FLASH_CFI   1
-#define CONFIG_FLASH_CFI_DRIVER1
+#define CONFIG_SYS_FLASH_CFI
+#define CONFIG_FLASH_CFI_DRIVER
 
 #define CONFIG_SYS_FLASH_BASE  0x
 #define CONFIG_SYS_FLASH_SIZE  0x80
@@ -154,7 +154,7 @@
 #define CONFIG_SYS_INTRAM_SIZE INTERNAL_SRAM_SIZE
 #define CONFIG_SYS_SDRAM_BASE  EBI_SDRAM_BASE
 
-#define CONFIG_ENV_IS_IN_FLASH 1
+#define CONFIG_ENV_IS_IN_FLASH
 #define CONFIG_ENV_SIZE65536
 #define CONFIG_ENV_ADDR(CONFIG_SYS_FLASH_BASE + 
CONFIG_SYS_FLASH_SIZE - CONFIG_ENV_SIZE)
 
@@ -172,7 +172,7 @@
 #define CONFIG_SYS_CBSIZE  256
 #define CONFIG_SYS_MAXARGS 16
 #define CONFIG_SYS_PBSIZE  (CONFIG_SYS_CBSIZE + 
sizeof(CONFIG_SYS_PROMPT) + 16)
-#define CONFIG_SYS_LONGHELP1
+#define CONFIG_SYS_LONGHELP
 
 #define CONFIG_SYS_MEMTEST_START   EBI_SDRAM_BASE
 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 
0x1f0)
-- 
1.7.2.3

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[U-Boot] [PATCH 05/15] atstk1003: fix #define XXXX 1

Signed-off-by: Andreas Bießmann biessm...@corscience.de
---
 include/configs/atstk1003.h |   42 +-
 1 files changed, 21 insertions(+), 21 deletions(-)

diff --git a/include/configs/atstk1003.h b/include/configs/atstk1003.h
index 85337bf..9cc5cb9 100644
--- a/include/configs/atstk1003.h
+++ b/include/configs/atstk1003.h
@@ -26,13 +26,13 @@
 
 #include asm/arch/hardware.h
 
-#define CONFIG_AVR32   1
-#define CONFIG_AT32AP  1
-#define CONFIG_AT32AP7001  1
-#define CONFIG_ATSTK1003   1
-#define CONFIG_ATSTK1000   1
+#define CONFIG_AVR32
+#define CONFIG_AT32AP
+#define CONFIG_AT32AP7001
+#define CONFIG_ATSTK1003
+#define CONFIG_ATSTK1000
 
-#define CONFIG_ATSTK1000_EXT_FLASH 1
+#define CONFIG_ATSTK1000_EXT_FLASH
 
 /*
  * Timer clock frequency. We're using the CPU-internal COUNT register
@@ -46,8 +46,8 @@
  * PLL frequency.
  * (CONFIG_SYS_OSC0_HZ * CONFIG_SYS_PLL0_MUL) / CONFIG_SYS_PLL0_DIV = PLL MHz
  */
-#define CONFIG_PLL 1
-#define CONFIG_SYS_POWER_MANAGER   1
+#define CONFIG_PLL
+#define CONFIG_SYS_POWER_MANAGER
 #define CONFIG_SYS_OSC0_HZ 2000
 #define CONFIG_SYS_PLL0_DIV1
 #define CONFIG_SYS_PLL0_MUL7
@@ -89,11 +89,11 @@
 #define CONFIG_USART_ID1
 
 /* User serviceable stuff */
-#define CONFIG_DOS_PARTITION   1
+#define CONFIG_DOS_PARTITION
 
-#define CONFIG_CMDLINE_TAG 1
-#define CONFIG_SETUP_MEMORY_TAGS   1
-#define CONFIG_INITRD_TAG  1
+#define CONFIG_CMDLINE_TAG
+#define CONFIG_SETUP_MEMORY_TAGS
+#define CONFIG_INITRD_TAG
 
 #define CONFIG_STACKSIZE   (2048)
 
@@ -109,8 +109,8 @@
  * data on the serial line may interrupt the boot sequence.
  */
 #define CONFIG_BOOTDELAY   1
-#define CONFIG_AUTOBOOT1
-#define CONFIG_AUTOBOOT_KEYED  1
+#define CONFIG_AUTOBOOT
+#define CONFIG_AUTOBOOT_KEYED
 #define CONFIG_AUTOBOOT_PROMPT \
Press SPACE to abort autoboot in %d seconds\n, bootdelay
 #define CONFIG_AUTOBOOT_DELAY_STR  d
@@ -133,11 +133,11 @@
 #undef CONFIG_CMD_SETGETDCR
 #undef CONFIG_CMD_XIMG
 
-#define CONFIG_ATMEL_USART 1
-#define CONFIG_PORTMUX_PIO 1
-#define CONFIG_SYS_HSDRAMC 1
-#define CONFIG_MMC 1
-#define CONFIG_ATMEL_MCI   1
+#define CONFIG_ATMEL_USART
+#define CONFIG_PORTMUX_PIO
+#define CONFIG_SYS_HSDRAMC
+#define CONFIG_MMC
+#define CONFIG_ATMEL_MCI
 
 #define CONFIG_SYS_DCACHE_LINESZ   32
 #define CONFIG_SYS_ICACHE_LINESZ   32
@@ -161,7 +161,7 @@
 #define CONFIG_SYS_INTRAM_SIZE INTERNAL_SRAM_SIZE
 #define CONFIG_SYS_SDRAM_BASE  EBI_SDRAM_BASE
 
-#define CONFIG_ENV_IS_IN_FLASH 1
+#define CONFIG_ENV_IS_IN_FLASH
 #define CONFIG_ENV_SIZE65536
 #define CONFIG_ENV_ADDR(CONFIG_SYS_FLASH_BASE + 
CONFIG_SYS_FLASH_SIZE - CONFIG_ENV_SIZE)
 
@@ -178,7 +178,7 @@
 #define CONFIG_SYS_CBSIZE  256
 #define CONFIG_SYS_MAXARGS 16
 #define CONFIG_SYS_PBSIZE  (CONFIG_SYS_CBSIZE + 
sizeof(CONFIG_SYS_PROMPT) + 16)
-#define CONFIG_SYS_LONGHELP1
+#define CONFIG_SYS_LONGHELP
 
 #define CONFIG_SYS_MEMTEST_START   EBI_SDRAM_BASE
 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 
0x70)
-- 
1.7.2.3

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[U-Boot] [PATCH 07/15] atstk1006: fix #define XXXX 1

Signed-off-by: Andreas Bießmann biessm...@corscience.de
---
 include/configs/atstk1006.h |   48 +-
 1 files changed, 24 insertions(+), 24 deletions(-)

diff --git a/include/configs/atstk1006.h b/include/configs/atstk1006.h
index e8553fc..d681929 100644
--- a/include/configs/atstk1006.h
+++ b/include/configs/atstk1006.h
@@ -26,13 +26,13 @@
 
 #include asm/arch/hardware.h
 
-#define CONFIG_AVR32   1
-#define CONFIG_AT32AP  1
-#define CONFIG_AT32AP7000  1
-#define CONFIG_ATSTK1006   1
-#define CONFIG_ATSTK1000   1
+#define CONFIG_AVR32
+#define CONFIG_AT32AP
+#define CONFIG_AT32AP7000
+#define CONFIG_ATSTK1006
+#define CONFIG_ATSTK1000
 
-#define CONFIG_ATSTK1000_EXT_FLASH 1
+#define CONFIG_ATSTK1000_EXT_FLASH
 
 /*
  * Timer clock frequency. We're using the CPU-internal COUNT register
@@ -46,8 +46,8 @@
  * PLL frequency.
  * (CONFIG_SYS_OSC0_HZ * CONFIG_SYS_PLL0_MUL) / CONFIG_SYS_PLL0_DIV = PLL MHz
  */
-#define CONFIG_PLL 1
-#define CONFIG_SYS_POWER_MANAGER   1
+#define CONFIG_PLL
+#define CONFIG_SYS_POWER_MANAGER
 #define CONFIG_SYS_OSC0_HZ 2000
 #define CONFIG_SYS_PLL0_DIV1
 #define CONFIG_SYS_PLL0_MUL7
@@ -89,11 +89,11 @@
 #define CONFIG_USART_ID1
 
 /* User serviceable stuff */
-#define CONFIG_DOS_PARTITION   1
+#define CONFIG_DOS_PARTITION
 
-#define CONFIG_CMDLINE_TAG 1
-#define CONFIG_SETUP_MEMORY_TAGS   1
-#define CONFIG_INITRD_TAG  1
+#define CONFIG_CMDLINE_TAG
+#define CONFIG_SETUP_MEMORY_TAGS
+#define CONFIG_INITRD_TAG
 
 #define CONFIG_STACKSIZE   (2048)
 
@@ -109,8 +109,8 @@
  * data on the serial line may interrupt the boot sequence.
  */
 #define CONFIG_BOOTDELAY   1
-#define CONFIG_AUTOBOOT1
-#define CONFIG_AUTOBOOT_KEYED  1
+#define CONFIG_AUTOBOOT
+#define CONFIG_AUTOBOOT_KEYED
 #define CONFIG_AUTOBOOT_PROMPT \
Press SPACE to abort autoboot in %d seconds\n, bootdelay
 #define CONFIG_AUTOBOOT_DELAY_STR  d
@@ -121,8 +121,8 @@
  * should be generated and assigned to the environment variables
  * ethaddr and eth1addr. This is normally done during production.
  */
-#define CONFIG_OVERWRITE_ETHADDR_ONCE  1
-#define CONFIG_NET_MULTI   1
+#define CONFIG_OVERWRITE_ETHADDR_ONCE
+#define CONFIG_NET_MULTI
 
 /*
  * BOOTP options
@@ -148,13 +148,13 @@
 #undef CONFIG_CMD_SOURCE
 #undef CONFIG_CMD_XIMG
 
-#define CONFIG_ATMEL_USART 1
-#define CONFIG_MACB1
-#define CONFIG_PORTMUX_PIO 1
+#define CONFIG_ATMEL_USART
+#define CONFIG_MACB
+#define CONFIG_PORTMUX_PIO
 #define CONFIG_SYS_NR_PIOS 5
-#define CONFIG_SYS_HSDRAMC 1
-#define CONFIG_MMC 1
-#define CONFIG_ATMEL_MCI   1
+#define CONFIG_SYS_HSDRAMC
+#define CONFIG_MMC
+#define CONFIG_ATMEL_MCI
 
 #define CONFIG_SYS_DCACHE_LINESZ   32
 #define CONFIG_SYS_ICACHE_LINESZ   32
@@ -178,7 +178,7 @@
 #define CONFIG_SYS_INTRAM_SIZE INTERNAL_SRAM_SIZE
 #define CONFIG_SYS_SDRAM_BASE  EBI_SDRAM_BASE
 
-#define CONFIG_ENV_IS_IN_FLASH 1
+#define CONFIG_ENV_IS_IN_FLASH
 #define CONFIG_ENV_SIZE65536
 #define CONFIG_ENV_ADDR(CONFIG_SYS_FLASH_BASE + 
CONFIG_SYS_FLASH_SIZE - CONFIG_ENV_SIZE)
 
@@ -196,7 +196,7 @@
 #define CONFIG_SYS_CBSIZE  256
 #define CONFIG_SYS_MAXARGS 16
 #define CONFIG_SYS_PBSIZE  (CONFIG_SYS_CBSIZE + 
sizeof(CONFIG_SYS_PROMPT) + 16)
-#define CONFIG_SYS_LONGHELP1
+#define CONFIG_SYS_LONGHELP
 
 #define CONFIG_SYS_MEMTEST_START   EBI_SDRAM_BASE
 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 
0x3f0)
-- 
1.7.2.3

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[U-Boot] [PATCH 04/15] atstk1002: fix #define XXXX 1

Signed-off-by: Andreas Bießmann biessm...@corscience.de
---
 include/configs/atstk1002.h |   48 +-
 1 files changed, 24 insertions(+), 24 deletions(-)

diff --git a/include/configs/atstk1002.h b/include/configs/atstk1002.h
index ba1b56c..997e9dd 100644
--- a/include/configs/atstk1002.h
+++ b/include/configs/atstk1002.h
@@ -26,13 +26,13 @@
 
 #include asm/arch/hardware.h
 
-#define CONFIG_AVR32   1
-#define CONFIG_AT32AP  1
-#define CONFIG_AT32AP7000  1
-#define CONFIG_ATSTK1002   1
-#define CONFIG_ATSTK1000   1
+#define CONFIG_AVR32
+#define CONFIG_AT32AP
+#define CONFIG_AT32AP7000
+#define CONFIG_ATSTK1002
+#define CONFIG_ATSTK1000
 
-#define CONFIG_ATSTK1000_EXT_FLASH 1
+#define CONFIG_ATSTK1000_EXT_FLASH
 
 /*
  * Timer clock frequency. We're using the CPU-internal COUNT register
@@ -46,8 +46,8 @@
  * PLL frequency.
  * (CONFIG_SYS_OSC0_HZ * CONFIG_SYS_PLL0_MUL) / CONFIG_SYS_PLL0_DIV = PLL MHz
  */
-#define CONFIG_PLL 1
-#define CONFIG_SYS_POWER_MANAGER   1
+#define CONFIG_PLL
+#define CONFIG_SYS_POWER_MANAGER
 #define CONFIG_SYS_OSC0_HZ 2000
 #define CONFIG_SYS_PLL0_DIV1
 #define CONFIG_SYS_PLL0_MUL7
@@ -89,11 +89,11 @@
 #define CONFIG_USART_ID1
 
 /* User serviceable stuff */
-#define CONFIG_DOS_PARTITION   1
+#define CONFIG_DOS_PARTITION
 
-#define CONFIG_CMDLINE_TAG 1
-#define CONFIG_SETUP_MEMORY_TAGS   1
-#define CONFIG_INITRD_TAG  1
+#define CONFIG_CMDLINE_TAG
+#define CONFIG_SETUP_MEMORY_TAGS
+#define CONFIG_INITRD_TAG
 
 #define CONFIG_STACKSIZE   (2048)
 
@@ -109,8 +109,8 @@
  * data on the serial line may interrupt the boot sequence.
  */
 #define CONFIG_BOOTDELAY   1
-#define CONFIG_AUTOBOOT1
-#define CONFIG_AUTOBOOT_KEYED  1
+#define CONFIG_AUTOBOOT
+#define CONFIG_AUTOBOOT_KEYED
 #define CONFIG_AUTOBOOT_PROMPT \
Press SPACE to abort autoboot in %d seconds\n, bootdelay
 #define CONFIG_AUTOBOOT_DELAY_STR  d
@@ -121,8 +121,8 @@
  * should be generated and assigned to the environment variables
  * ethaddr and eth1addr. This is normally done during production.
  */
-#define CONFIG_OVERWRITE_ETHADDR_ONCE  1
-#define CONFIG_NET_MULTI   1
+#define CONFIG_OVERWRITE_ETHADDR_ONCE
+#define CONFIG_NET_MULTI
 
 /*
  * BOOTP options
@@ -148,13 +148,13 @@
 #undef CONFIG_CMD_SOURCE
 #undef CONFIG_CMD_XIMG
 
-#define CONFIG_ATMEL_USART 1
-#define CONFIG_MACB1
-#define CONFIG_PORTMUX_PIO 1
+#define CONFIG_ATMEL_USART
+#define CONFIG_MACB
+#define CONFIG_PORTMUX_PIO
 #define CONFIG_SYS_NR_PIOS 5
-#define CONFIG_SYS_HSDRAMC 1
-#define CONFIG_MMC 1
-#define CONFIG_ATMEL_MCI   1
+#define CONFIG_SYS_HSDRAMC
+#define CONFIG_MMC
+#define CONFIG_ATMEL_MCI
 
 #define CONFIG_SYS_DCACHE_LINESZ   32
 #define CONFIG_SYS_ICACHE_LINESZ   32
@@ -178,7 +178,7 @@
 #define CONFIG_SYS_INTRAM_SIZE INTERNAL_SRAM_SIZE
 #define CONFIG_SYS_SDRAM_BASE  EBI_SDRAM_BASE
 
-#define CONFIG_ENV_IS_IN_FLASH 1
+#define CONFIG_ENV_IS_IN_FLASH
 #define CONFIG_ENV_SIZE65536
 #define CONFIG_ENV_ADDR(CONFIG_SYS_FLASH_BASE + 
CONFIG_SYS_FLASH_SIZE - CONFIG_ENV_SIZE)
 
@@ -196,7 +196,7 @@
 #define CONFIG_SYS_CBSIZE  256
 #define CONFIG_SYS_MAXARGS 16
 #define CONFIG_SYS_PBSIZE  (CONFIG_SYS_CBSIZE + 
sizeof(CONFIG_SYS_PROMPT) + 16)
-#define CONFIG_SYS_LONGHELP1
+#define CONFIG_SYS_LONGHELP
 
 #define CONFIG_SYS_MEMTEST_START   EBI_SDRAM_BASE
 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 
0x70)
-- 
1.7.2.3

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[U-Boot] [PATCH 08/15] favr-32-ezkit: fix #define XXXX 1

Signed-off-by: Andreas Bießmann biessm...@corscience.de
---
 include/configs/favr-32-ezkit.h |   46 +++---
 1 files changed, 23 insertions(+), 23 deletions(-)

diff --git a/include/configs/favr-32-ezkit.h b/include/configs/favr-32-ezkit.h
index e723ad1..f364dad 100644
--- a/include/configs/favr-32-ezkit.h
+++ b/include/configs/favr-32-ezkit.h
@@ -24,12 +24,12 @@
 
 #include asm/arch/hardware.h
 
-#define CONFIG_AVR32   1
-#define CONFIG_AT32AP  1
-#define CONFIG_AT32AP7000  1
-#define CONFIG_FAVR32_EZKIT1
+#define CONFIG_AVR32
+#define CONFIG_AT32AP
+#define CONFIG_AT32AP7000
+#define CONFIG_FAVR32_EZKIT
 
-#define CONFIG_FAVR32_EZKIT_EXT_FLASH  1
+#define CONFIG_FAVR32_EZKIT_EXT_FLASH
 
 /*
  * Timer clock frequency. We're using the CPU-internal COUNT register
@@ -43,8 +43,8 @@
  * PLL frequency.
  * (CONFIG_SYS_OSC0_HZ * CONFIG_SYS_PLL0_MUL) / CONFIG_SYS_PLL0_DIV = PLL MHz
  */
-#define CONFIG_PLL 1
-#define CONFIG_SYS_POWER_MANAGER   1
+#define CONFIG_PLL
+#define CONFIG_SYS_POWER_MANAGER
 #define CONFIG_SYS_OSC0_HZ 2000
 #define CONFIG_SYS_PLL0_DIV1
 #define CONFIG_SYS_PLL0_MUL7
@@ -86,11 +86,11 @@
 #define CONFIG_USART_ID3
 
 /* User serviceable stuff */
-#define CONFIG_DOS_PARTITION   1
+#define CONFIG_DOS_PARTITION
 
-#define CONFIG_CMDLINE_TAG 1
-#define CONFIG_SETUP_MEMORY_TAGS   1
-#define CONFIG_INITRD_TAG  1
+#define CONFIG_CMDLINE_TAG
+#define CONFIG_SETUP_MEMORY_TAGS
+#define CONFIG_INITRD_TAG
 
 #define CONFIG_STACKSIZE   (2048)
 
@@ -106,8 +106,8 @@
  * data on the serial line may interrupt the boot sequence.
  */
 #define CONFIG_BOOTDELAY   1
-#define CONFIG_AUTOBOOT1
-#define CONFIG_AUTOBOOT_KEYED  1
+#define CONFIG_AUTOBOOT
+#define CONFIG_AUTOBOOT_KEYED
 #define CONFIG_AUTOBOOT_PROMPT \
Press SPACE to abort autoboot in %d seconds\n, bootdelay
 #define CONFIG_AUTOBOOT_DELAY_STR  d
@@ -118,8 +118,8 @@
  * should be generated and assigned to the environment variables
  * ethaddr and eth1addr. This is normally done during production.
  */
-#define CONFIG_OVERWRITE_ETHADDR_ONCE  1
-#define CONFIG_NET_MULTI   1
+#define CONFIG_OVERWRITE_ETHADDR_ONCE
+#define CONFIG_NET_MULTI
 
 /*
  * BOOTP options
@@ -145,13 +145,13 @@
 #undef CONFIG_CMD_SOURCE
 #undef CONFIG_CMD_XIMG
 
-#define CONFIG_ATMEL_USART 1
-#define CONFIG_MACB1
-#define CONFIG_PORTMUX_PIO 1
+#define CONFIG_ATMEL_USART
+#define CONFIG_MACB
+#define CONFIG_PORTMUX_PIO
 #define CONFIG_SYS_NR_PIOS 5
-#define CONFIG_SYS_HSDRAMC 1
-#define CONFIG_MMC 1
-#define CONFIG_ATMEL_MCI   1
+#define CONFIG_SYS_HSDRAMC
+#define CONFIG_MMC
+#define CONFIG_ATMEL_MCI
 
 #define CONFIG_SYS_DCACHE_LINESZ   32
 #define CONFIG_SYS_ICACHE_LINESZ   32
@@ -175,7 +175,7 @@
 #define CONFIG_SYS_INTRAM_SIZE INTERNAL_SRAM_SIZE
 #define CONFIG_SYS_SDRAM_BASE  EBI_SDRAM_BASE
 
-#define CONFIG_ENV_IS_IN_FLASH 1
+#define CONFIG_ENV_IS_IN_FLASH
 #define CONFIG_ENV_SIZE65536
 #define CONFIG_ENV_ADDR(CONFIG_SYS_FLASH_BASE + 
CONFIG_SYS_FLASH_SIZE - CONFIG_ENV_SIZE)
 
@@ -193,7 +193,7 @@
 #define CONFIG_SYS_CBSIZE  256
 #define CONFIG_SYS_MAXARGS 16
 #define CONFIG_SYS_PBSIZE  (CONFIG_SYS_CBSIZE + 
sizeof(CONFIG_SYS_PROMPT) + 16)
-#define CONFIG_SYS_LONGHELP1
+#define CONFIG_SYS_LONGHELP
 
 #define CONFIG_SYS_MEMTEST_START   EBI_SDRAM_BASE
 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 
0x70)
-- 
1.7.2.3

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[U-Boot] [PATCH 12/15] atstk100x: move CONFIG_SYS_TEXT_BASE to header

Signed-off-by: Andreas Bießmann biessm...@corscience.de
---
 board/atmel/atstk1000/config.mk |1 -
 include/configs/atstk1002.h |1 +
 include/configs/atstk1003.h |1 +
 include/configs/atstk1004.h |1 +
 include/configs/atstk1006.h |1 +
 5 files changed, 4 insertions(+), 1 deletions(-)
 delete mode 100644 board/atmel/atstk1000/config.mk

diff --git a/board/atmel/atstk1000/config.mk b/board/atmel/atstk1000/config.mk
deleted file mode 100644
index 34b709a..000
--- a/board/atmel/atstk1000/config.mk
+++ /dev/null
@@ -1 +0,0 @@
-CONFIG_SYS_TEXT_BASE   = 0x
diff --git a/include/configs/atstk1002.h b/include/configs/atstk1002.h
index 997e9dd..c17d107 100644
--- a/include/configs/atstk1002.h
+++ b/include/configs/atstk1002.h
@@ -173,6 +173,7 @@
 #define CONFIG_SYS_MAX_FLASH_SECT  135
 
 #define CONFIG_SYS_MONITOR_BASECONFIG_SYS_FLASH_BASE
+#define CONFIG_SYS_TEXT_BASE   0x
 
 #define CONFIG_SYS_INTRAM_BASE INTERNAL_SRAM_BASE
 #define CONFIG_SYS_INTRAM_SIZE INTERNAL_SRAM_SIZE
diff --git a/include/configs/atstk1003.h b/include/configs/atstk1003.h
index 9cc5cb9..a77d52e 100644
--- a/include/configs/atstk1003.h
+++ b/include/configs/atstk1003.h
@@ -156,6 +156,7 @@
 #define CONFIG_SYS_MAX_FLASH_SECT  135
 
 #define CONFIG_SYS_MONITOR_BASECONFIG_SYS_FLASH_BASE
+#define CONFIG_SYS_TEXT_BASE   0x
 
 #define CONFIG_SYS_INTRAM_BASE INTERNAL_SRAM_BASE
 #define CONFIG_SYS_INTRAM_SIZE INTERNAL_SRAM_SIZE
diff --git a/include/configs/atstk1004.h b/include/configs/atstk1004.h
index a225395..cc00a0a 100644
--- a/include/configs/atstk1004.h
+++ b/include/configs/atstk1004.h
@@ -156,6 +156,7 @@
 #define CONFIG_SYS_MAX_FLASH_SECT  135
 
 #define CONFIG_SYS_MONITOR_BASECONFIG_SYS_FLASH_BASE
+#define CONFIG_SYS_TEXT_BASE   0x
 
 #define CONFIG_SYS_INTRAM_BASE INTERNAL_SRAM_BASE
 #define CONFIG_SYS_INTRAM_SIZE INTERNAL_SRAM_SIZE
diff --git a/include/configs/atstk1006.h b/include/configs/atstk1006.h
index d681929..2cff140 100644
--- a/include/configs/atstk1006.h
+++ b/include/configs/atstk1006.h
@@ -173,6 +173,7 @@
 #define CONFIG_SYS_MAX_FLASH_SECT  135
 
 #define CONFIG_SYS_MONITOR_BASECONFIG_SYS_FLASH_BASE
+#define CONFIG_SYS_TEXT_BASE   0x
 
 #define CONFIG_SYS_INTRAM_BASE INTERNAL_SRAM_BASE
 #define CONFIG_SYS_INTRAM_SIZE INTERNAL_SRAM_SIZE
-- 
1.7.2.3

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[U-Boot] [PATCH 13/15] favr-32-ezkit: move CONFIG_SYS_TEXT_BASE to header

Signed-off-by: Andreas Bießmann biessm...@corscience.de
---
 board/earthlcd/favr-32-ezkit/config.mk |1 -
 include/configs/favr-32-ezkit.h|1 +
 2 files changed, 1 insertions(+), 1 deletions(-)
 delete mode 100644 board/earthlcd/favr-32-ezkit/config.mk

diff --git a/board/earthlcd/favr-32-ezkit/config.mk 
b/board/earthlcd/favr-32-ezkit/config.mk
deleted file mode 100644
index 34b709a..000
--- a/board/earthlcd/favr-32-ezkit/config.mk
+++ /dev/null
@@ -1 +0,0 @@
-CONFIG_SYS_TEXT_BASE   = 0x
diff --git a/include/configs/favr-32-ezkit.h b/include/configs/favr-32-ezkit.h
index f364dad..4c30b39 100644
--- a/include/configs/favr-32-ezkit.h
+++ b/include/configs/favr-32-ezkit.h
@@ -170,6 +170,7 @@
 #define CONFIG_SYS_MAX_FLASH_SECT  135
 
 #define CONFIG_SYS_MONITOR_BASECONFIG_SYS_FLASH_BASE
+#define CONFIG_SYS_TEXT_BASE   0x
 
 #define CONFIG_SYS_INTRAM_BASE INTERNAL_SRAM_BASE
 #define CONFIG_SYS_INTRAM_SIZE INTERNAL_SRAM_SIZE
-- 
1.7.2.3

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[U-Boot] [PATCH 14/15] mimc200: move CONFIG_SYS_TEXT_BASE to header

Signed-off-by: Andreas Bießmann biessm...@corscience.de
---
 board/mimc/mimc200/config.mk |1 -
 include/configs/mimc200.h|1 +
 2 files changed, 1 insertions(+), 1 deletions(-)
 delete mode 100644 board/mimc/mimc200/config.mk

diff --git a/board/mimc/mimc200/config.mk b/board/mimc/mimc200/config.mk
deleted file mode 100644
index 34b709a..000
--- a/board/mimc/mimc200/config.mk
+++ /dev/null
@@ -1 +0,0 @@
-CONFIG_SYS_TEXT_BASE   = 0x
diff --git a/include/configs/mimc200.h b/include/configs/mimc200.h
index 66b9477..6c52769 100644
--- a/include/configs/mimc200.h
+++ b/include/configs/mimc200.h
@@ -160,6 +160,7 @@
 #define CONFIG_SYS_MAX_FLASH_SECT  135
 
 #define CONFIG_SYS_MONITOR_BASECONFIG_SYS_FLASH_BASE
+#define CONFIG_SYS_TEXT_BASE   0x
 
 #define CONFIG_SYS_INTRAM_BASE INTERNAL_SRAM_BASE
 #define CONFIG_SYS_INTRAM_SIZE INTERNAL_SRAM_SIZE
-- 
1.7.2.3

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[U-Boot] Can't erase or read NOR using mtd part-id

2011-02-09 Thread Alexandre Gambier

Hello,

I'm using u-boot to boot a Linux-based device.
I created some MTD partitions for my NOR and NAND flashes.

Here is the configuration:

device nor0 NOR, # parts = 4
  #: namesizeoffset  mask_flags
  0: U-Boot  0x0008  0x  0
  1: Environment 0x0002  0x0008  0
  2: Kernel  0x0040  0x000a  0
  3: FreeNOR 0x0036  0x004a  0

device nand0 NAND, # parts = 2
  #: namesizeoffset  mask_flags
  0: FS  0x0200  0x  0
  1: FreeNAND0x0600  0x0200  0

active partition: nor0,0 - (U-Boot) 0x0008 @ 0x

defaults:
mtdids  : nor0=NOR,nand0=NAND
mtdparts: 
mtdparts=NOR:512k(U-Boot),128k(Environment),4M(Kernel),-(FreeNOR);NAND:32M(FS),-(FreeNAND)

When I want to erase the U-Boot partition I can't use the command `erase 
U-Boot`, the following error occurs : incorrect device type in U-Boot.
I must use the command `erase 1:0-7`.

Is-it normal ?

My second question is when I try to read the Environment partition with 
the command `md.b Environment 128` I get the following dump (which is 
not correct).

000e: 0e 40 ff e0 18 40 c0 cb 18 40 18 40 0c cb 03 61
.@...@...@.@...a
001e: a5 e0 18 40 01 21 1f e0 18 40 ff cb 18 40 ff cb
...@.!...@...@..
002e: 18 40 ff cb 03 64 b5 c7 03 69 92 6a a8 39 b4 da
.@...d...i.j.9..
003e: b6 db 90 3a 29 08 49 29 f6 e0 18 40 10 cb 18 40
...:).I)...@...@
004e: 18 40 03 61 00 e2 01 e3 18 43 01 e0 3c 31 22 21
.@.a.C..1!
005e: 0f 88 fb 8f 01 70 80 e0 18 40 18 40 18 40 03 61
.p...@.@.@.a
006e: f6 e0 18 40 10 cb 18 40 18 40 12 20 40 e0 18 40...@...@.@. 
@..@
007e: 18 40 03 cb 18 40 80 cb 03 61 f7 e0 18 40 10 cb
.@...@...a...@..
008e: 18 40 18 40 12 20 90 e0 18 40 18 40 18 40 03 61.@.@. 
...@.@.@.a
009e: f6 e0 18 40 10 cb 18 40 02 cb 18 40 12 20 40 e0
...@...@...@. @.
00ae: 18 40 18 40 03 cb 18 40 80 cb 03 61 f7 e0 18 40
.@.@...@...a...@
00be: 10 cb 18 40 02 cb 18 40 12 20 88 e0 18 40 18 40...@...@. 
...@.@
00ce: 18 40 03 61 f6 e0 18 40 10 cb 18 40 01 cb 18 40
.@.a...@...@...@
00de: 12 20 48 e0 18 40 18 40 03 cb 18 40 80 cb 03 61. 
H..@.@...@...a
00ee: f7 e0 18 40 10 cb 18 40 01 cb 18 40 12 20 98 e0
...@...@...@. ..
00fe: 18 40 18 40 18 40 03 61 f6 e0 18 40 10 cb 18 40
.@.@.@.a...@...@
010e: 03 cb 18 40 12 20 48 e0 18 40 18 40 03 cb 18 40...@. 
H..@.@...@
011e: 80 cb 03 61 f7 e0 18 40 10 cb 18 40 03 cb 18 40
...a...@...@...@
012e: 12 20 a0 e0 18 40 18 40. ...@.@

If use the command `md.b 0xA008 128` I get the right dump...

a008: 0e c8 12 74 62 6f 6f 74 64 65 6c 61 79 3d 31 30
...tbootdelay=10
a0080010: 00 62 61 75 64 72 61 74 65 3d 31 31 35 32 30 30
.baudrate=115200
a0080020: 00 62 6f 61 72 64 3d 73 6b 79 77 6f 72 74 68 00
.board=skyworth.
a0080030: 6d 6f 6e 69 74 6f 72 5f 62 61 73 65 3d 30 78 41
monitor_base=0xA
a0080040: 30 30 30 30 30 30 30 00 6d 6f 6e 69 74 6f 72 5f
000.monitor_
a0080050: 6c 65 6e 3d 30 78 30 30 30 38 30 30 30 30 00 6d
len=0x0008.m
a0080060: 6f 6e 69 74 6f 72 5f 73 65 63 3d 31 3a 30 2d 37
onitor_sec=1:0-7
a0080070: 00 6c 6f 61 64 5f 61 64 64 72 3d 30 78 38 30 30
.load_addr=0x800
a0080080: 30 30 30 30 30 00 65 74 68 61 64 64 72 3d 30 30
0.ethaddr=00
a0080090: 3a 30 65 3a 65 62 3a 30 30 3a 33 34 3a 62 63 00
:0e:eb:00:34:bc.
a00800a0: 73 65 72 76 65 72 69 70 3d 31 39 32 2e 31 36 38
serverip=192.168
a00800b0: 2e 31 2e 36 30 00 69 70 61 64 64 72 3d 31 39 32
.1.60.ipaddr=192
a00800c0: 2e 31 36 38 2e 31 2e 31 31 30 00 66 69 72 73 74
.168.1.110.first
a00800d0: 5f 69 6e 69 74 3d 6d 74 64 20 64 65 6c 20 61 6c_init=mtd 
del al
a00800e0: 6c 3b 72 75 6e 20 65 72 61 73 65 5f 6e 6f 72 3bl;run 
erase_nor;
a00800f0: 6d 74 64 20 64 65 66 61 75 6c 74 3b 73 61 76 65mtd 
default;save
a0080100: 65 6e 76 3b 72 75 6e 20 75 70 64 61 74 65 5f 75env;run 
update_u
a0080110: 62 6f 6f 74 00 65 72 61 73 65 5f 6e 6f 72 3d 70
boot.erase_nor=p
a0080120: 72 6f 74 65 63 74 20 6frotect o

Is-it normal as well ?

Thanls in advance for your help.
Alex.


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[U-Boot] NOR sectors are not all protected as they should be.

2011-02-09 Thread Alexandre Gambier

Hello,

I'm using U-Boot with a NOR and a NAND Flash.

U-Boot is stored into the NOR flash.
The NOR flash is setup as :

0xA000 - 0xA008 - 512k - 8 sectors - reserved for U-Boot.bin
0xA008 - 0xA00A - 128k - 2 sectors - reserved for U-Boot 
environment

If I use the command `flinfo` to see which sectors are protected I see 
this...

Sector Start Addresses:
   A000   RO   A001   RO   A002   RO   A003   RO   
A004 E
   A005 E  A006 E  A007 E  A008   RO   
A009 E RO
   A00A E  A00B E  A00C E  A00D E  
A00E E
   A00F E  A010 E  A011 E  A012 E  
A013 E
   A014 E  A015 E  A016 E  A017 E  
A018 E
   A019 E  A01A E  A01B E  A01C E  
A01D E
   A01E E  A01F E  A020 E  A021 E  
A022 E
   A023 E  A024 E  A025 E  A026 E  
A027 E
   A028 E  A029 E  A02A E  A02B E  
A02C E
   A02D E  A02E E  A02F E  A030 E  
A031 E
   A032 E  A033 E  A034 E  A035 E  
A036 E
   A037 E  A038 E  A039 E  A03A E  
A03B E
   A03C E  A03D E  A03E E  A03F E  
A040 E
   A041 E  A042 E  A043 E  A044 E  
A045 E
   A046 E  A047 E  A048 E  A049 E  
A04A E
   A04B E  A04C E  A04D E  A04E E  
A04F E
   A050 E  A051 E  A052 E  A053 E  
A054 E
   A055 E  A056 E  A057 E  A058 E  
A059 E
   A05A E  A05B E  A05C E  A05D E  
A05E E
   A05F E  A060 E  A061 E  A062 E  
A063 E
   A064 E  A065 E  A066 E  A067 E  
A068 E
   A069 E  A06A E  A06B E  A06C E  
A06D E
   A06E E  A06F E  A070 E  A071 E  
A072 E
   A073 E  A074 E  A075 E  A076 E  
A077 E
   A078 E  A079 E  A07A E  A07B E  
A07C E
   A07D E  A07E E  A07F E

The first sectors #0,1,2,3 are protected and sectors #8,9 (U-Boot 
environment) are protected.
It should be sectors #0,1,2,3,4,5,6,7 and sectors #8,9.

I had a looked into U-Boot source to find a constant that defines how 
many sectors should be protected for the monitor but I didn't find it.
I guess U-Boot protect these sectors during the boot sequence.
What constant must be defined to protect all of the sectors 
(#0,1,2,3,4,5,6,7) ?

thanks in advance.
Alex
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Re: [U-Boot] Can't erase or read NOR using mtd part-id

2011-02-09 Thread Alexandre Gambier

Hello,

thanks for your reply.
I'm running u-boot 1.3.1. I got it from STLinux.

I will try to set CONFIG_JFFS2.
But does it mean it will erase the partition using JFFS2 ?
Will it support to read and write the environment settings with this 
file format ?

Alex


On 02/09/2011 05:10 PM, Alexander Stein wrote:
 Hello,

 On Wednesday 09 February 2011, 16:52:35 Alexandre Gambier wrote:
 I'm using u-boot to boot a Linux-based device.
 Which version og u-boot are you running?

 I created some MTD partitions for my NOR and NAND flashes.

 Here is the configuration:

 device nor0NOR, # parts = 4
#: namesizeoffset  mask_flags
0: U-Boot  0x0008  0x  0
1: Environment 0x0002  0x0008  0
2: Kernel  0x0040  0x000a  0
3: FreeNOR 0x0036  0x004a  0

 device nand0NAND, # parts = 2
#: namesizeoffset  mask_flags
0: FS  0x0200  0x  0
1: FreeNAND0x0600  0x0200  0

 active partition: nor0,0 - (U-Boot) 0x0008 @ 0x

 defaults:
 mtdids  : nor0=NOR,nand0=NAND
 mtdparts:
 mtdparts=NOR:512k(U-Boot),128k(Environment),4M(Kernel),-(FreeNOR);NAND:32M(
 FS),-(FreeNAND)

 When I want to erase the U-Boot partition I can't use the command `erase
 U-Boot`, the following error occurs : incorrect device type in U-Boot.
 I must use the command `erase 1:0-7`.

 Is-it normal ?
 Some old version also had to set CONFIG_JFFS2 to get erase  friends to accept
 mtdparts.

 HTH
 Alexander

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Re: [U-Boot] P2020 SPL L2 clearing


On Feb 9, 2011, at 2:06 AM, Fabian Cenedese wrote:

 
 I'm creating a SPL u-boot image for our board. In the file
 arch/powerpc/cpu/mpc85xx/cpu_init_nand.c is the setup for
 the L2 cache as SRAM. In the end is a loop that fills the
 cache with 0 (512KB in this case).
 
 1. Why is the access byte-wise and not dword-wise? This
 is only for mpc85xx and I think they all can access the cache
 with 32bits instead of just 8. That would speed up by factor 4
 (confirmed in my tests with P2020).
 
 No real reason, probably historic and no one noticed.  Patch welcome to 
 change this to 32-bit accesses, not really sure why we just dont call memset.
 
 I can try that too and see how it goes. I will test this for my board
 and send a patch once I get my way around git (didn't use it so far).
 
 2. Why does the cache to be cleared at all? L2-SRAM is usually
 just used to copy in the second part of the u-boot image, so
 the 0s will be overwritten again anyway.
 
 This needs to be done because we enable ECC.
 
 Isn't this an optional feature? Shouldn't this loop be enclosed in
 # ifdef CONFIG_DDR_ECC or doesn't this apply to L2-SRAM?

No, its not optional for the L2 cache (especially when we are in SRAM mode).  
Its also independent of DDR ECC.

- k
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Re: [U-Boot] Can't erase or read NOR using mtd part-id

2011-02-09 Thread Alexander Stein

Hello,

On Wednesday 09 February 2011, 16:52:35 Alexandre Gambier wrote:
 I'm using u-boot to boot a Linux-based device.

Which version og u-boot are you running?

 I created some MTD partitions for my NOR and NAND flashes.
 
 Here is the configuration:
 
 device nor0 NOR, # parts = 4
   #: namesizeoffset  mask_flags
   0: U-Boot  0x0008  0x  0
   1: Environment 0x0002  0x0008  0
   2: Kernel  0x0040  0x000a  0
   3: FreeNOR 0x0036  0x004a  0
 
 device nand0 NAND, # parts = 2
   #: namesizeoffset  mask_flags
   0: FS  0x0200  0x  0
   1: FreeNAND0x0600  0x0200  0
 
 active partition: nor0,0 - (U-Boot) 0x0008 @ 0x
 
 defaults:
 mtdids  : nor0=NOR,nand0=NAND
 mtdparts:
 mtdparts=NOR:512k(U-Boot),128k(Environment),4M(Kernel),-(FreeNOR);NAND:32M(
 FS),-(FreeNAND)
 
 When I want to erase the U-Boot partition I can't use the command `erase
 U-Boot`, the following error occurs : incorrect device type in U-Boot.
 I must use the command `erase 1:0-7`.
 
 Is-it normal ?

Some old version also had to set CONFIG_JFFS2 to get erase  friends to accept 
mtdparts.

HTH
Alexander
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Re: [U-Boot] Can't erase or read NOR using mtd part-id

2011-02-09 Thread Alexander Stein

Hello,

On Wednesday 09 February 2011, 17:16:37 Alexandre Gambier wrote:
 thanks for your reply.
 I'm running u-boot 1.3.1. I got it from STLinux.

ouch, that's pretty old.

 I will try to set CONFIG_JFFS2.
 But does it mean it will erase the partition using JFFS2 ?

No, the feature depended on both MTDPARTS and JFFS2 which has changed by now.
If this doesn't work. I can't help you (see above)

Alexander
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Re: [U-Boot] NOR sectors are not all protected as they should be.

Dear Alexandre Gambier,

In message 4d52ba80.4060...@ftemaximal.fr you wrote:
 Hello,
 
 I'm using U-Boot with a NOR and a NAND Flash.
 
 U-Boot is stored into the NOR flash.
 The NOR flash is setup as :
 
 0xA000 - 0xA008 - 512k - 8 sectors - reserved for U-Boot.bin
 0xA008 - 0xA00A - 128k - 2 sectors - reserved for U-Boot 
 environment
 
 If I use the command `flinfo` to see which sectors are protected I see 
 this...
 
 Sector Start Addresses:
A000   RO   A001   RO   A002   RO   A003   RO   A004 E
A005 E  A006 E  A007 E  A008   RO   A009 E 
 RO
A00A E  A00B E  A00C E  A00D E  A00E E
A00F E  A010 E  A011 E  A012 E  A013 E
...
 
 The first sectors #0,1,2,3 are protected and sectors #8,9 (U-Boot 
 environment) are protected.
 It should be sectors #0,1,2,3,4,5,6,7 and sectors #8,9.

No, it should not.  Only the sectors that actually contain the U-Boot
code and environment are protected.  Obviously your image is small
enough to fit in the first 4 sectors (= 256 KiB).  Actually this is a
perfectly normal size, and your reservation of 512 KiB was just a
waste of memory.  You can see that the following sectors are unused
from the 'E' (= empty) flag.

When they don't contain any code, there is also no need to pretect
them, right?


Best regards,

Wolfgang Denk

-- 
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Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de
What about WRITING it first and rationalizing it afterwords?  :-)
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Re: [U-Boot] Can't erase or read NOR using mtd part-id

Dear Alexandre Gambier,

In message 4d52b843.5010...@ftemaximal.fr you wrote:
 
 I'm using u-boot to boot a Linux-based device.
 I created some MTD partitions for my NOR and NAND flashes.
 
 Here is the configuration:
 
 device nor0 NOR, # parts = 4
   #: namesizeoffset  mask_flags
   0: U-Boot  0x0008  0x  0
   1: Environment 0x0002  0x0008  0
   2: Kernel  0x0040  0x000a  0
   3: FreeNOR 0x0036  0x004a  0
 
...
 When I want to erase the U-Boot partition I can't use the command `erase 
 U-Boot`, the following error occurs : incorrect device type in U-Boot.
 I must use the command `erase 1:0-7`.
 
 Is-it normal ?

There are many ways to specify a flash area. When referring to MTD
partitions, the synatx is device name,partition number, i. e.
for the partition named U-Boot above you use

erase nor0,0

So yes, the behaviour is normal.

 My second question is when I try to read the Environment partition with 
 the command `md.b Environment 128` I get the following dump (which is 
 not correct).
 
 000e: 0e 40 ff e0 18 40 c0 cb 18 40 18 40 0c cb 03 61
 .@...@...@.@...a
...

Only very few commands (and only flash related ones) accept MTD
partition specifications for addresses.  md does not. What happpens
here is that the argument Environment gets parsed as a hex number.
Only the first character, 'E', can successfully be converted, then the
conversion stops (without error message).  Then you get the dump
starting at 0x000E.

 Is-it normal as well ?

Yes, it is.

Best regards,

Wolfgang Denk

-- 
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HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de
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[U-Boot] [PATCH] fsl: update CRC after system EEPROM identifier

2011-02-09 Thread Timur Tabi

The mac id command is used to initialize the EEPROM data to a specific
format, but it was not updating the CRC.  This didn't cause any real
problems, because writing the data to the EEPROM will always update the
CRC anyway, but it did result in a bogus CRC warning.

Signed-off-by: Timur Tabi ti...@freescale.com
---
 board/freescale/common/sys_eeprom.c |1 +
 1 files changed, 1 insertions(+), 0 deletions(-)

diff --git a/board/freescale/common/sys_eeprom.c 
b/board/freescale/common/sys_eeprom.c
index 11dfd84..3ecfb06 100644
--- a/board/freescale/common/sys_eeprom.c
+++ b/board/freescale/common/sys_eeprom.c
@@ -361,6 +361,7 @@ int do_mac(cmd_tbl_t *cmdtp, int flag, int argc, char * 
const argv[])
 #else
memcpy(e.id, CCID, sizeof(e.id));
 #endif
+   update_crc();
return 0;
}
 
-- 
1.7.3.4


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Re: [U-Boot] Please pull u-boot-ppc4xx/master

Dear Stefan Roese,

In message 201102071138.38372...@denx.de you wrote:
 Hi Wolfgang
 
 please pull the following patch (initial version posted before the 
 merge-window closed):
 
 The following changes since commit 42d44f631c4e8e5359775bdc098f2fffde4e5c05:
 
   Prepare v2011.03-rc1 (2011-02-02 22:37:32 +0100)
 
 are available in the git repository at:
   git://www.denx.de/git/u-boot-ppc4xx.git master
 
 Dirk Eibach (1):
   ppc4xx: Add DLVision-10G board support
 
  MAINTAINERS|1 +
  arch/powerpc/include/asm/global_data.h |3 +
  board/gdsys/405ep/405ep.c  |   66 ++--
  board/gdsys/405ep/Makefile |1 +
  board/gdsys/405ep/dlvision-10g.c   |  239 
  board/gdsys/405ep/io.c |   19 +--
  board/gdsys/405ep/iocon.c  |   24 +--
  board/gdsys/common/Makefile|1 +
  board/gdsys/common/fpga.h  |   37 
  board/gdsys/common/osd.c   |  309 +++
  board/gdsys/common/osd.h   |2 +-
  boards.cfg |1 +
  include/configs/dlvision-10g.h |  316 
 
  include/configs/io.h   |8 +-
  include/configs/iocon.h|   25 ++-
  include/gdsys_fpga.h   |  108 +++
  16 files changed, 994 insertions(+), 166 deletions(-)
  create mode 100644 board/gdsys/405ep/dlvision-10g.c
  delete mode 100644 board/gdsys/common/fpga.h
  create mode 100644 include/configs/dlvision-10g.h
  create mode 100644 include/gdsys_fpga.h

Applied, thanks.

Best regards,

Wolfgang Denk

-- 
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HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de
No journaling file system can recover your data if the disk dies.
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Re: [U-Boot] [Nios] Pull Request

Dear Scott McNutt,

In message 4d514868.6060...@psyent.com you wrote:
 Dear Wolfgang,
 
 The following changes since commit 8d4addc3c3fe1a9ea160a5a1a20a1f934ff3fe97:
Wolfgang Denk (1):
  Merge branch 'master' of git://git.denx.de/u-boot-mpc83xx
 
 are available in the git repository at:
 
git://git.denx.de/u-boot-nios.git next
 
 Thomas Chou (4):
nios2: add gpio_free
altera_spi: add spi_set_speed
nios2: use long for ssize_t
nios2: add gpio_is_valid
 
   arch/nios2/include/asm/gpio.h|   12 
   arch/nios2/include/asm/posix_types.h |2 +-
   board/altera/nios2-generic/custom_fpga.h |1 +
   board/altera/nios2-generic/gpio.c|   11 +++
   drivers/spi/altera_spi.c |5 +
   5 files changed, 30 insertions(+), 1 deletions(-)

Applied, thanks.

Best regards,

Wolfgang Denk

-- 
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HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de
God runs electromagnetics by wave theory on  Monday,  Wednesday,  and
Friday,  and the Devil runs them by quantum theory on Tuesday, Thurs-
day, and Saturday.   -- William Bragg
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[U-Boot] Pull request: nand flash

2011-02-09 Thread Scott Wood

The following changes since commit 8d4addc3c3fe1a9ea160a5a1a20a1f934ff3fe97:

  Merge branch 'master' of git://git.denx.de/u-boot-mpc83xx (2011-02-06 
22:41:53 +0100)

are available in the git repository at:

  git://git.denx.de/u-boot-nand-flash.git master

Scott Wood (1):
  NAND: env: remember the flags used in the previous environment

 common/env_nand.c |6 +-
 1 files changed, 5 insertions(+), 1 deletions(-)

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Re: [U-Boot] eNET / x86 build fails with ld: -r and -shared may not be used together

2011-02-09 Thread Graeme Russ

On Thursday, February 10, 2011, Loïc Minier l...@dooz.org wrote:
 On Wed, Feb 09, 2011, Graeme Russ wrote:
 This has been fixed in the latest x86 patch series sent to the list

  Great!  I had flagged this patch series, but for some reason I thought
  this had been merged already.  I had checked the u-boot-x86.git tree
  before reporting this to the mailing-list, but it only had patches from
  October.  Is there another git tree where you usually stage your series?


This series will go into u-boot-x86 this weekend

Regards

Graeme
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[U-Boot] P1022 eTSEC

2011-02-09 Thread Renaud Barbier

We have a system with a P1022 connected to a 5461S in SGMII mode.

In order to make it work in SGMII mode, I set TBI ANA to 0x4001 as per
AN3869. Note that those bit are described as reserved in the P1022 doc 
that I have.
I was then able to transfer data at 100/1000 (10 not tested).

As per AN3869 a value of 0x1a0 is  for 1000BASE-X.


Looking at the tsec driver (drivers/net/tsec.c), one can see:

#define TBIANA_SETTINGS ( \
 TBIANA_ASYMMETRIC_PAUSE \
 | TBIANA_SYMMETRIC_PAUSE \
 | TBIANA_FULL_DUPLEX \
 )
== 0x1a0

if (regs-ecntrl  ECNTRL_SGMII_MODE)
 tsec_configure_serdes(priv);

That would mean the TBI ANA is not set correctly when SGMII
is reported.

Please can you verify this.

Cheers.



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Re: [U-Boot] P1022 eTSEC

2011-02-09 Thread Renaud Barbier

Correction: P1013

On 09/02/11 20:21, Renaud Barbier wrote:
 We have a system with a P1022 connected to a 5461S in SGMII mode.

 In order to make it work in SGMII mode, I set TBI ANA to 0x4001 as per
 AN3869. Note that those bit are described as reserved in the P1022 doc
 that I have.
 I was then able to transfer data at 100/1000 (10 not tested).

 As per AN3869 a value of 0x1a0 is  for 1000BASE-X.


 Looking at the tsec driver (drivers/net/tsec.c), one can see:

 #define TBIANA_SETTINGS ( \
   TBIANA_ASYMMETRIC_PAUSE \
   | TBIANA_SYMMETRIC_PAUSE \
   | TBIANA_FULL_DUPLEX \
   )
 ==  0x1a0

 if (regs-ecntrl  ECNTRL_SGMII_MODE)
   tsec_configure_serdes(priv);

 That would mean the TBI ANA is not set correctly when SGMII
 is reported.

 Please can you verify this.

 Cheers.



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-- 
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14, Links Place
3/2 great Michael House
Edinburgh, EH67EN
Tel: +44 131 561 3532

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Re: [U-Boot] Pull request: nand flash

Dear Scott Wood,

In message 20110209195903.ga10...@schlenkerla.am.freescale.net you wrote:
 The following changes since commit 8d4addc3c3fe1a9ea160a5a1a20a1f934ff3fe97:
 
   Merge branch 'master' of git://git.denx.de/u-boot-mpc83xx (2011-02-06 
 22:41:53 +0100)
 
 are available in the git repository at:
 
   git://git.denx.de/u-boot-nand-flash.git master
 
 Scott Wood (1):
   NAND: env: remember the flags used in the previous environment
 
  common/env_nand.c |6 +-
  1 files changed, 5 insertions(+), 1 deletions(-)

Applied, thanks.

Best regards,

Wolfgang Denk

-- 
DENX Software Engineering GmbH, MD: Wolfgang Denk  Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de
He is truly wise who gains wisdom from another's mishap.
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Re: [U-Boot] [PATCH] cmd_bmp.c: message about compressed formats is debug info only.

2011-02-09 Thread Anatolij Gustschin

Hello Wolfgang,

On Wed,  9 Feb 2011 15:11:10 +0100
Wolfgang Denk w...@denx.de wrote:

 Signed-off-by: Wolfgang Denk w...@denx.de
 Cc: Anatolij Gustschin ag...@denx.de
 ---
  common/cmd_bmp.c |2 +-
  1 files changed, 1 insertions(+), 1 deletions(-)

Applied to u-boot-video/master. Thanks.

Anatolij
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[U-Boot] Pull request: u-boot-video/master

2011-02-09 Thread Anatolij Gustschin

Hallo Wolfgang,

The following changes since commit 494a7d215bfba17f1a94736df40c332c8713c30e:

  Merge branch 'master' of git://git.denx.de/u-boot-nand-flash (2011-02-09 
21:22:58 +0100)

are available in the git repository at:

  git://git.denx.de/u-boot-video.git master

Wolfgang Denk (1):
  cmd_bmp.c: message about compressed formats is debug info only.

 common/cmd_bmp.c |2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

Anatolij
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Re: [U-Boot] Pull request u-boot-marvell.git

2011-02-09 Thread Albert ARIBAUD

Le 09/02/2011 10:49, Prafulla Wadaskar a écrit :
 Hi Albert/Wolfgang

 Please pull

 The following changes since commit 97a85b223ab316d11f3a374fecc5d449a1c8a694:
Scott Wood (1):
  powerpc/nand spl: link libgcc

 are available in the git repository at:

u-boot-marvell.git on next branch.

Hi Prafulla et al.,

FYI, I will pull this tomorrow evening.

Amicalement,
-- 
Albert.
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Re: [U-Boot] [PATCH] fsl: update CRC after system EEPROM identifier

2011-02-09 Thread Timur Tabi

On Wed, Feb 9, 2011 at 1:40 PM, Timur Tabi ti...@freescale.com wrote:
 The mac id command is used to initialize the EEPROM data to a specific
 format, but it was not updating the CRC.  This didn't cause any real
 problems, because writing the data to the EEPROM will always update the
 CRC anyway, but it did result in a bogus CRC warning.

 Signed-off-by: Timur Tabi ti...@freescale.com
 ---

That should say, after setting EEPROM identifier

-- 
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[U-Boot] [PATCH] [RFC] SF: Add sf erase offset +len command handler.

2011-02-09 Thread Richard Retanubun

From hints by Wolfgang, this patch adds the ability to handle +len
argument for spi flash erase, which will round up the length to the
nearest [sector|page|block]_size.

This is done by adding a new member to
struct spi_flash::u32 block_size

The name 'block_size' is chosen to mean:
the smallest unit erase commands will check against.

If block_size is considered a kludgy name, please propose another.

Most of the driver (excluding atmel) will now only calculate this
unit once during probe and will be able to use it directly.

For atmel, I added code to populate the block_size structure member
but felt too ignorant to actually modify the erase unit check.

Code compiles cleanly. fo all drivers, but I can only test
stmicro (M25P40 and M25P16).
---
 common/cmd_sf.c|   63 +--
 drivers/mtd/spi/atmel.c|1 +
 drivers/mtd/spi/macronix.c |4 +-
 drivers/mtd/spi/spansion.c |3 +-
 drivers/mtd/spi/sst.c  |3 +-
 drivers/mtd/spi/stmicro.c  |3 +-
 drivers/mtd/spi/winbond.c  |6 ++--
 include/spi_flash.h|3 +-
 8 files changed, 74 insertions(+), 12 deletions(-)

diff --git a/common/cmd_sf.c b/common/cmd_sf.c
index 6e7be81..b1fed6e 100644
--- a/common/cmd_sf.c
+++ b/common/cmd_sf.c
@@ -19,6 +19,59 @@
 
 static struct spi_flash *flash;
 
+
+/*
+ * This function computes the length argument for the erase command.
+ * The length on which the command is to operate can be given in two forms:
+ * 1. cmd offset len  - operate on 'offset',  'len')
+ * 2. cmd offset +len - operate on 'offset',  'round_up(len)')
+ * If the second form is used and the length doesn't fall on the
+ * sector boundary, than it will be adjusted to the next sector boundary.
+ * If it isn't in the flash, the function will fail (return -1).
+ * Input:
+ *arg: length specification (i.e. both command arguments)
+ * Output:
+ *len: computed length for operation
+ * Return:
+ *1: success
+ *   -1: failure (bad format, bad address).
+*/
+static int sf_parse_len_arg(char *arg, ulong *len)
+{
+   char *ep;
+   char round_up_len; /* indicates if the +length form used */
+   ulong sector_size;
+   ulong len_arg;
+
+
+   round_up_len = 0;
+   if (arg  *arg == '+'){
+   round_up_len = 1;
+   ++arg;
+   }
+
+   len_arg = simple_strtoul(arg, ep, 16);
+   if (ep == arg || *ep != '\0')
+   return -1;
+
+   if (round_up_len) {
+   /* Get sector size from flash and round up */
+   sector_size =   flash-block_size;
+   if (sector_size  0) {
+   *len = len_arg -1)/sector_size) + 1) * sector_size);
+   if (*len  flash-size) {
+   return -1;
+   }
+   } else {
+   return -1;
+   }
+   } else {
+   *len = len_arg;
+   }
+
+   return 1;
+}
+
 static int do_spi_flash_probe(int argc, char * const argv[])
 {
unsigned int bus = 0;
@@ -135,9 +188,11 @@ static int do_spi_flash_erase(int argc, char * const 
argv[])
offset = simple_strtoul(argv[1], endp, 16);
if (*argv[1] == 0 || *endp != 0)
goto usage;
-   len = simple_strtoul(argv[2], endp, 16);
-   if (*argv[2] == 0 || *endp != 0)
+
+   ret = sf_parse_len_arg(argv[2], len);
+   if (ret != 1) {
goto usage;
+   }
 
ret = spi_flash_erase(flash, offset, len);
if (ret) {
@@ -149,6 +204,7 @@ static int do_spi_flash_erase(int argc, char * const argv[])
 
 usage:
puts(Usage: sf erase offset len\n);
+   puts(   sf erase offset +len\n);
return 1;
 }
 
@@ -189,5 +245,6 @@ U_BOOT_CMD(
 `offset' to memory at `addr'\n
sf write addr offset len   - write `len' bytes from memory\n
 at `addr' to flash at `offset'\n
-   sf erase offset len- erase `len' bytes from `offset'
+   sf erase offset [+]len - erase `len' bytes from `offset'\n
+  - `+len' round up `len' to block size
 );
diff --git a/drivers/mtd/spi/atmel.c b/drivers/mtd/spi/atmel.c
index 8d02169..ec1a7b7 100644
--- a/drivers/mtd/spi/atmel.c
+++ b/drivers/mtd/spi/atmel.c
@@ -539,6 +539,7 @@ struct spi_flash *spi_flash_probe_atmel(struct spi_slave 
*spi, u8 *idcode)
asf-flash.size = page_size * params-pages_per_block
* params-blocks_per_sector
* params-nr_sectors;
+   asf-flash.block_size = page_size;
 
printf(SF: Detected %s with page size %u, total ,
   params-name, page_size);
diff --git a/drivers/mtd/spi/macronix.c b/drivers/mtd/spi/macronix.c
index 76d5284..98e553b 100644
--- a/drivers/mtd/spi/macronix.c
+++ b/drivers/mtd/spi/macronix.c
@@ -247,8 +247,7 @@ int

Re: [U-Boot] PATCH-add 0X hexadecimal prefix to simple_strtoul

2011-02-09 Thread Scott Wood

On Wed, 9 Feb 2011 07:40:44 +0100
Albert ARIBAUD albert.arib...@free.fr wrote:

 Le 09/02/2011 07:19, Chris Moore a écrit :
  I also noticed this in some of my (rare) posts.
  I am using TB 3.1.5.
  I am too ashamed to admit my OS ;-)
 
  A nonsense test case written with correct spacing: a = (b  (c  1)) 
  ((d  ((e  1)  1)));
  If you receive this correctly then please excuse me for the noise :(
 
 Received correctly. :)
 
 In Rob's case I am not sure that the issue is due to TB eating selected 
 spaces upon reception; my own TB (3.1.7), using ^U to display the raw 
 message from Rob, shows missing spaces are actually in what was sent, 
 and I think Wolfgang does not use TB at all.

It's when quoting a message for a reply that Thunderbird does this mangling.

-Scott

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Re: [U-Boot] eNET / x86 build fails with ld: -r and -shared may not be used together

2011-02-09 Thread Graeme Russ

On Thu, Feb 10, 2011 at 12:58 AM, Loïc Minier l...@dooz.org wrote:
  FTR, the patch I picked for the Debian package was:
  x86: Align config.mk and linker scripts with other arches


Can you add your acked-by

Thanks,

Graeme
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Re: [U-Boot] P1022 eTSEC

2011-02-09 Thread Peter Tyser

Hi Renaud,

On Wed, 2011-02-09 at 20:21 +, Renaud Barbier wrote:
We have a system with a P1022 connected to a 5461S in SGMII mode.

In order to make it work in SGMII mode, I set TBI ANA to 0x4001 as per
AN3869. Note that those bit are described as reserved in the P1022 doc
that I have.
I was then able to transfer data at 100/1000 (10 not tested).

As per AN3869 a value of 0x1a0 is for 1000BASE-X.

Looking at the tsec driver (drivers/net/tsec.c), one can see:

#define TBIANA_SETTINGS ( \
TBIANA_ASYMMETRIC_PAUSE \
| TBIANA_SYMMETRIC_PAUSE \
| TBIANA_FULL_DUPLEX \
)
== 0x1a0

if (regs-ecntrl ECNTRL_SGMII_MODE)
tsec_configure_serdes(priv);

That would mean the TBI ANA is not set correctly when SGMII
is reported.

Please can you verify this.

Gotta love those undocumented register bits:) This same issue has been
discussed a number of times, but no one ever noticed the 0x4001 in
AN3869, or assumed it was an error. The bug also didn't seem to affect
some PHYs, eg Vitesse models:

http://old.nabble.com/-U-Boot---PATCH--tsec:-Force-TBI-PHY-to-1000Mbps-full-duplex-in-SGMII-mode-td26188785.html
http://comments.gmane.org/gmane.comp.boot-loaders.u-boot/89059
http://comments.gmane.org/gmane.comp.boot-loaders.u-boot/80256

My company worked around the issue by not enabling auto-negotiation in
the TBI control register via a custom CONFIG_TSEC_TBICR_SETTINGS value.
I just tried removing our workaround and setting TBIANA_SETTINGS to
0x4001, and it looks like it works on a P2020-based board with a
BCM5482S PHY.

It'd be ideal if someone from from Freescale chimed in so we knew what
bits we were hitting in the TBIANA register. The change has my ack
though. Let me know if you don't plan on submitting a change and I'll
update our boards, as well as the value of TBIANA_SETTINGS.

Best,
Peter

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[U-Boot] [PATCH] fsl: add 'pixis_reset dump' command

2011-02-09 Thread Timur Tabi

Add the 'pixis_reset dump' command, which displays the contents of the PIXIS
registers.  This command is only available if DEBUG is defined.

Signed-off-by: Timur Tabi ti...@freescale.com
---
 board/freescale/common/ngpixis.c |   58 ++
 1 files changed, 58 insertions(+), 0 deletions(-)

diff --git a/board/freescale/common/ngpixis.c b/board/freescale/common/ngpixis.c
index 4e01e5a..765f035 100644
--- a/board/freescale/common/ngpixis.c
+++ b/board/freescale/common/ngpixis.c
@@ -119,11 +119,50 @@ void __set_altbank(void)
 }
 void set_altbank(void) __attribute__((weak, alias(__set_altbank)));
 
+#ifdef DEBUG
+static void pixis_dump_regs(void)
+{
+   unsigned int i;
+
+   printf(id=%02x\n, PIXIS_READ(id));
+   printf(arch=%02x\n, PIXIS_READ(arch));
+   printf(scver=%02x\n, PIXIS_READ(scver));
+   printf(csr=%02x\n, PIXIS_READ(csr));
+   printf(rst=%02x\n, PIXIS_READ(rst));
+   printf(aux=%02x\n, PIXIS_READ(aux));
+   printf(spd=%02x\n, PIXIS_READ(spd));
+   printf(brdcfg0=%02x\n, PIXIS_READ(brdcfg0));
+   printf(brdcfg1=%02x\n, PIXIS_READ(brdcfg1));
+   printf(addr=%02x\n, PIXIS_READ(addr));
+   printf(data=%02x\n, PIXIS_READ(data));
+   printf(led=%02x\n, PIXIS_READ(led));
+   printf(vctl=%02x\n, PIXIS_READ(vctl));
+   printf(vstat=%02x\n, PIXIS_READ(vstat));
+   printf(vcfgen0=%02x\n, PIXIS_READ(vcfgen0));
+   printf(ocmcsr=%02x\n, PIXIS_READ(ocmcsr));
+   printf(ocmmsg=%02x\n, PIXIS_READ(ocmmsg));
+   printf(gmdbg=%02x\n, PIXIS_READ(gmdbg));
+   printf(sclk=%02x%02x%02x\n,
+  PIXIS_READ(sclk[0]), PIXIS_READ(sclk[1]), PIXIS_READ(sclk[2]));
+   printf(dclk=%02x%02x%02x\n,
+  PIXIS_READ(dclk[0]), PIXIS_READ(dclk[1]), PIXIS_READ(dclk[2]));
+   printf(watch=%02x\n, PIXIS_READ(watch));
+
+   for (i = 0; i  8; i++) {
+   printf(SW%u=%02x/%02x , i + 1,
+   PIXIS_READ(s[i].sw), PIXIS_READ(s[i].en));
+   }
+   putc('\n');
+}
+#endif
 
 int pixis_reset_cmd(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 {
unsigned int i;
char *p_altbank = NULL;
+#ifdef DEBUG
+   char *p_dump = NULL;
+#endif
char *unknown_param = NULL;
 
/* No args is a simple reset request.
@@ -137,6 +176,13 @@ int pixis_reset_cmd(cmd_tbl_t *cmdtp, int flag, int argc, 
char * const argv[])
continue;
}
 
+#ifdef DEBUG
+   if (strcmp(argv[i], dump) == 0) {
+   p_dump = argv[i];
+   continue;
+   }
+#endif
+
unknown_param = argv[i];
}
 
@@ -145,6 +191,15 @@ int pixis_reset_cmd(cmd_tbl_t *cmdtp, int flag, int argc, 
char * const argv[])
return 1;
}
 
+#ifdef DEBUG
+   if (p_dump) {
+   pixis_dump_regs();
+
+   /* 'dump' ignores other commands */
+   return 0;
+   }
+#endif
+
if (p_altbank)
set_altbank();
else
@@ -161,4 +216,7 @@ U_BOOT_CMD(
Reset the board using the FPGA sequencer,
- hard reset to default bank\n
pixis_reset altbank - reset to alternate bank\n
+#ifdef DEBUG
+   pixis_reset dump - display the PIXIS registers\n
+#endif
);
-- 
1.7.3.4


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[U-Boot] NAND biterr?

2011-02-09 Thread Karl M

Hello all,

I was wondering if anyone has implemented a working NAND biterr
command for U-Boot (presently running a rather customized variant of
1.3.3).

I'm trying to test some automatic NAND error recovery code, and this
seemed like an appropriate way to verify it.

I found an older implementation in a web search, but was unable to get
it to compile. As there were also comments about forthcoming updates
for that patch, I figured I would just ask here.

Thanks,


---Karl
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[U-Boot] JFFS2 duplicate file entries

2011-02-09 Thread Fei, Yiyang

Hi,

 

I'm using the 2010.12 u-boot source code.  I use a JFFS2 partition on a
NAND flash to store the kernel image as well as an FGPA images for my
platform.  I also mount this partition inside the kernel because I need
the ability to overwrite the contents during a field-upgrade of the
embedded software.  When I make changes to this partition from the
kernel, everything looks correct.  But when I reboot and break into
u-boot, the contents of the partition is incorrect.  For example, if I
do the following from the kernel...

 

/mnt/bootfs # ll

-rw-r--r--1 6410562004  9232568 Feb 10  2011
netviz_core_fpga.bit

-rw-r--r--1 6410562004  2138968 Feb 10  2011 uImage

/mnt/bootfs # touch test

/mnt/bootfs # ll

-rw-r--r--1 6410562004  9232568 Feb 10  2011
netviz_core_fpga.bit

-rw-r--r--1 root root 0 Jan  1 00:27 test

-rw-r--r--1 6410562004  2138968 Feb 10  2011 uImage

/mnt/bootfs # rm test

/mnt/bootfs # ll

-rw-r--r--1 6410562004  9232568 Feb 10  2011
netviz_core_fpga.bit

-rw-r--r--1 6410562004  2138968 Feb 10  2011 uImage

/mnt/bootfs # echo some text  test

/mnt/bootfs # ll

-rw-r--r--1 6410562004  9232568 Feb 10  2011
netviz_core_fpga.bit

-rw-r--r--1 root root10 Jan  1 00:27 test

-rw-r--r--1 6410562004  2138968 Feb 10  2011 uImage

/mnt/bootfs # reboot

 

During the boot, if I break into u-boot, here is what I see...

 

Hit any key to stop autoboot:  0

NetViz ls

 -rw-r--r--  9232568 Thu Feb 10 00:31:27 2011 netviz_core_fpga.bit

 -rw-r--r--  2138968 Thu Feb 10 00:31:03 2011 uImage

 -rw-r--r--0 Thu Jan 01 00:27:14 1970 test

 -rw-r--r--   10 Thu Jan 01 00:27:42 1970 test

NetViz

 

Do you have any suggestions on how I should track down the cause for
this problem?

 

Yiyang Fei



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Re: [U-Boot] SATA support?

2011-02-09 Thread Aaron Williams

On Tuesday, February 08, 2011 10:08:12 pm Albert ARIBAUD wrote:
 Hi Aaron,
 
 Le 08/02/2011 22:58, Aaron Williams a écrit :
  Hi,
  
  I'm trying to compile AHCI support but I'm running into a lot of
  problems. It looks like AHCI is based off of SCSI whereas other SATA
  drivers appear not to be. Is ahci.c being maintained or should I use one
  of the other drivers? Currently for my testing I have a couple Silicon
  Image 3132 PCIe boards.
  
  -Aaron Williams
 
 I cannot answer on SATA[/PCIe] as such, but depending on your
 requirements and your hardware, you may possibly find it easier to use
 IDE/(P)ATA hardware emulation like I did on the ARM edminiv2 board.
 
 Amicalement,

One problem is that we're already using the IDE/(P)ATA for our compact flash 
which is not on the PCI bus. I was hoping to use the SATA  AHCI support but it 
looks like it hasn't been maintained.

-Aaron
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Re: [U-Boot] PCIE supported networking cards?

2011-02-09 Thread Aaron Williams

I got it working, thanks to the patch. I had to make a few minor patches for 
our platform to map pointers to 64-bit physical addresses and a wrapper to 
access the PCI BAR address space and it works well.

-Aaron

On Wednesday, February 02, 2011 10:05:52 pm Aaron Williams wrote:
 Disregard my previous email. I'm running into some issues trying to get
 PCIe working in u-boot.
 
 -Aaron
 
 On Wednesday, February 02, 2011 03:51:14 pm Aaron Williams wrote:
  Thanks,
  
  I took the patch but it looks like it's unable to read the eeprom. It's
  possible it may also have something to do with our PCIE implementation
  since I'm trying to bring that up with the updated u-boot. I also need to
  go through the code and make sure that the driver is 64-bit friendly
  since we load u-boot above 4GB when enough memory is loaded
  (virt_to_phys returns a 64-bit address on our platform).
  
  In the Linux e1000e driver I do see some differences between the
  e1000_82573 and the e1000_82574.
  
  -Aaron
  
  PCIe: Port 0 is SRIO, skipping.
  PCIe: Port 1 link active, 1 lanes, speed gen1
  PCI Autoconfig: Bus Memory region: [0xf800-0x],
  
  Physical Memory [f800-x]
  
  PCI Autoconfig: Bus I/O region: [0x10-0x1000e],
  
  Physical Memory: [10-1000e]
  
  address=0x10 bus_lower=0x100400PCI:   Bus Dev VenId DevId Class Int
  PCI Autoconfig: Bus Memory region: [0xf800-0x],
  
  Physical Memory [f800-x]
  
  PCI Autoconfig: Bus I/O region: [0x10-0x1000e],
  
  Physical Memory: [10-1000e]
  
  PCI Scan: Found Bus 0, Device 0, Function 0
  PCI Autoconfig: BAR 0, Mem, size=0x2, address=0xf800
  bus_lower=0xf802
  PCI Autoconfig: BAR 1, Mem, size=0x8, address=0xf808
  bus_lower=0xf810
  PCI Autoconfig: BAR 2, I/O, size=0x20, address=0x10
  bus_lower=0x100020 PCI Autoconfig: BAR 3, Mem, size=0x4000,
  address=0xf810
  bus_lower=0xf8104000
  PCIe: port=1, first_bus=0, last_bus=0
  e1000_initialize
  e1000#0: iobase 0xf800
  e1000_set_mac_type
  Found 52574, setting mac type to 17
  e1000_set_media_type
  copper interface
  e1000_reset_hw
  Masking off all interrupts
  Issuing a global reset to MAC
  Masking off all interrupts
  e1000_init_eeprom_params
  e1000_is_onboard_nvm_eeprom
  e1000_validate_eeprom_checksum
  e1000_read_eeprom
  e1000_is_onboard_nvm_eeprom
  e1000_read_eeprom
  e1000_is_onboard_nvm_eeprom
  e1000_read_eeprom
  e1000_is_onboard_nvm_eeprom
  e1000_read_eeprom
  e1000_is_onboard_nvm_eeprom
  e1000_read_eeprom
  e1000_is_onboard_nvm_eeprom
  e1000_read_eeprom
  e1000_is_onboard_nvm_eeprom
  e1000_read_eeprom
  e1000_is_onboard_nvm_eeprom
  e1000_read_eeprom
  e1000_is_onboard_nvm_eeprom
  e1000_read_eeprom
  e1000_is_onboard_nvm_eeprom
  e1000_read_eeprom
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  e1000_read_eeprom
  e1000_is_onboard_nvm_eeprom
  e1000_read_eeprom
  e1000_is_onboard_nvm_eeprom
  e1000_read_eeprom
  e1000_is_onboard_nvm_eeprom
  e1000_read_eeprom
  e1000_is_onboard_nvm_eeprom
  e1000_read_eeprom
  e1000_is_onboard_nvm_eeprom
  e1000_read_eeprom
  e1000_is_onboard_nvm_eeprom
  e1000_read_eeprom
  e1000_is_onboard_nvm_eeprom
  e1000_read_eeprom
  e1000_is_onboard_nvm_eeprom
  e1000_read_eeprom
  e1000_is_onboard_nvm_eeprom
  e1000_read_eeprom
  e1000_is_onboard_nvm_eeprom
  e1000_read_eeprom
  e1000_is_onboard_nvm_eeprom
  e1000_read_eeprom
  e1000_is_onboard_nvm_eeprom
  e1000_read_eeprom
  e1000_is_onboard_nvm_eeprom
  e1000_read_eeprom
  e1000_is_onboard_nvm_eeprom
  e1000_read_eeprom
  e1000_is_onboard_nvm_eeprom
  e1000_read_eeprom
  e1000_is_onboard_nvm_eeprom
  e1000_read_eeprom
  e1000_is_onboard_nvm_eeprom
  e1000_read_eeprom
  e1000_is_onboard_nvm_eeprom
  e1000_read_eeprom
  e1000_is_onboard_nvm_eeprom
  e1000_read_eeprom
  e1000_is_onboard_nvm_eeprom
  e1000_read_eeprom
  e1000_is_onboard_nvm_eeprom
  e1000_read_eeprom
  e1000_is_onboard_nvm_eeprom
  e1000_read_eeprom
  e1000_is_onboard_nvm_eeprom
  e1000_read_eeprom
  e1000_is_onboard_nvm_eeprom
  e1000_read_eeprom
  e1000_is_onboard_nvm_eeprom
  e1000_read_eeprom
  e1000_is_onboard_nvm_eeprom
  e1000_read_eeprom
  e1000_is_onboard_nvm_eeprom
  e1000_read_eeprom
  e1000_is_onboard_nvm_eeprom
  e1000_read_eeprom
  e1000_is_onboard_nvm_eeprom
  e1000_read_eeprom
  e1000_is_onboard_nvm_eeprom
  e1000_read_eeprom
  e1000_is_onboard_nvm_eeprom
  e1000_read_eeprom
  e1000_is_onboard_nvm_eeprom
  e1000_read_eeprom
  e1000_is_onboard_nvm_eeprom
  e1000_read_eeprom
  e1000_is_onboard_nvm_eeprom
  e1000_read_eeprom
  e1000_is_onboard_nvm_eeprom
  e1000_read_eeprom
  e1000_is_onboard_nvm_eeprom
  e1000_read_eeprom
  e1000_is_onboard_nvm_eeprom
  e1000_read_eeprom

[U-Boot] Skipping bad blocks while reading and writing JFFS2 image to NAND flash

2011-02-09 Thread Fei, Yiyang

Hi,

 

When writing a JFFS2 image to NAND flash, any bad blocks in the BBT is
skipped.  However, while scanning a JFFS2 partition, bad blocks are not
skipped.  Is this intended or am I mis-configuring u-boot somehow?

 

I'm using the 2010.12 u-boot source code.  The BBT table for my system
includes the following bad blocks...

Bad block table found at page 524224, version 0x03

Bad block table found at page 524160, version 0x03

nand_read_bbt: Bad block at 0x00d4

nand_read_bbt: Bad block at 0x2bb4

nand_read_bbt: Bad block at 0x2bb6

nand_read_bbt: Bad block at 0x2fec

nand_read_bbt: Bad block at 0x3b6a

nand_read_bbt: Bad block at 0x3ff4

 

Offset 0xD4 is in the middle of my JFFS2 partition, which contains
my kernel image.  During boot, when the JFFS2 partition is loaded, I see
the following errors:

In:serial

Out:   serial

Err:   serial

### JFFS2 loading 'netviz_core_fpga.bit' to 0x100

Scanning JFFS2 FS: .  

read_nand_cached: error reading nand off 0xd4 size 8192 bytes

 done.

### JFFS2 load complete: 9232568 bytes loaded to 0x100

 

I traced the code path while writing and reading NAND.  The nand write
command eventually calls the nand_write_skip_bad() function in
nand_util.c which is why it was skipping the bad blocks; this is what I
think should happen.  However, the JFFS2 code directly calls nand_read()
function instead.  What should be the correct behavior?

 

Thanks,

Yiyang Fei



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Re: [U-Boot] [PATCH v3] ftwdt010_wdt: support faraday ftwdt010 watchdog

2011-02-09 Thread Macpaul Lin

Dear Wolfgang,

Since the Linux Driver still under clean up, I will modify the copyright
 statement
 of this driver for u-boot and send patch v3.


I have modified copyright statement for this patch ftwdt010_wdt v3
http://patchwork.ozlabs.org/patch/77564/
and send patch v4
http://patchwork.ozlabs.org/patch/80490/
about 2 weeks ago.

Just remind you if this method is capable, please apply the new patch.
Thanks a lot.


-- 
Best regards,
Macpaul Lin
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[U-Boot] Art of England Magazine - April 2011 edition - your invitation, deadline 3 days

2011-02-09 Thread Art of England Magazine

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Re: [U-Boot] [PATCH 3/3] powerpc/85xx: Add eSDHC support on P2020DS


On Jan 29, 2011, at 5:20 PM, Kumar Gala wrote:

 From: Jerry Huang chang-ming.hu...@freescale.com
 
 We enable SDHC_CD and SDHC_WP signals (pin muxed with GPIO8  GPIO9
 respectively).
 
 We enable EXT2, FAT, and parition support for both MMC  USB configs.
 
 Signed-off-by: Jerry Huang chang-ming.hu...@freescale.com
 Signed-off-by: Jin Qing b24...@freescale.com
 Signed-off-by: Kumar Gala ga...@kernel.crashing.org
 ---
 board/freescale/p2020ds/p2020ds.c |   15 ++-
 include/configs/P2020DS.h |   25 -
 2 files changed, 38 insertions(+), 2 deletions(-)

applied to 85xx next

- k
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Re: [U-Boot] [PATCH] powerpc/85xx: Update P2020DS default env settings


On Jan 29, 2011, at 5:21 PM, Kumar Gala wrote:

 From: Li Yang le...@freescale.com
 
 Read MAC address from EEPROM. Add hwconfig settings.
 
 Modified the default othbootargs to include the cache-sram-size
 parameter. This parameter is needed as the L2 as SRAM is ON by
 default in the P2020RDB kernel and used by the Gianfar driver.
 
 Also cleanup some of the boot commands.
 
 Signed-off-by: Li Yang le...@freescale.com
 Signed-off-by: Zhao Chenhui b35...@freescale.com
 Signed-off-by: Kumar Gala ga...@kernel.crashing.org
 ---
 include/configs/P2020DS.h |   22 --
 1 files changed, 12 insertions(+), 10 deletions(-)

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Re: [U-Boot] [PATCH v2] powerpc: Move cpu specific lmb reserve to arch_lmb_reserve


On Jan 31, 2011, at 4:15 PM, Kumar Gala wrote:

 We've been utilizing board_lmb_reserve to reserve the boot page for MP
 systems.  We can just move this into arch_lmb_reserve for 85xx  86xx
 systems rather than duplicating in each board port.
 
 Signed-off-by: Kumar Gala ga...@kernel.crashing.org
 ---
 * Fix compiler warning for not including asm/mp.h in bootm.c
 
 arch/powerpc/lib/bootm.c  |5 +
 board/freescale/corenet_ds/corenet_ds.c   |   11 +--
 board/freescale/mpc8572ds/mpc8572ds.c |   11 +--
 board/freescale/mpc8641hpcn/mpc8641hpcn.c |   11 +--
 board/freescale/p1022ds/p1022ds.c |   10 +-
 board/freescale/p1_p2_rdb/p1_p2_rdb.c |9 -
 board/freescale/p2020ds/p2020ds.c |   10 +-
 board/sbc8641d/sbc8641d.c |9 -
 board/xes/xpedite517x/xpedite517x.c   |9 -
 board/xes/xpedite537x/xpedite537x.c   |9 -
 board/xes/xpedite550x/xpedite550x.c   |9 -
 11 files changed, 10 insertions(+), 93 deletions(-)

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Re: [U-Boot] [PATCH v2] powerpc/85xx: Remove config.mk for nand linker script


On Jan 31, 2011, at 10:53 PM, Kumar Gala wrote:

 Move the include of mpc85xx/u-boot-nand.lds to utilize
 CONFIG_SYS_LDSCRIPT rather than having an explicit config.mk
 
 Signed-off-by: Kumar Gala ga...@kernel.crashing.org
 ---
 * Use $(TOPDIR)/$(CPUDIR)/u-boot-nand.lds so we should work in O=
 * Move CONFIG_SYS_LDSCRIPT for NAND to !CONFIG_NAND_SPL case
 
 board/freescale/mpc8536ds/config.mk  |   30 --
 board/freescale/mpc8569mds/config.mk |   30 --
 board/freescale/mpc8572ds/config.mk  |   30 --
 board/freescale/p1_p2_rdb/config.mk  |   31 ---
 include/configs/MPC8536DS.h  |1 +
 include/configs/MPC8569MDS.h |1 +
 include/configs/MPC8572DS.h  |1 +
 include/configs/P1_P2_RDB.h  |1 +
 8 files changed, 4 insertions(+), 121 deletions(-)
 delete mode 100644 board/freescale/mpc8536ds/config.mk
 delete mode 100644 board/freescale/mpc8569mds/config.mk
 delete mode 100644 board/freescale/mpc8572ds/config.mk
 delete mode 100644 board/freescale/p1_p2_rdb/config.mk

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Re: [U-Boot] [PATCH 1/2] powerpc/8xxx: Replace fsl_ddr_get_mem_data_rate with get_ddr_freq()


On Jan 31, 2011, at 10:54 PM, Kumar Gala wrote:

 Every 85xx board implements fsl_ddr_get_mem_data_rate via get_ddr_freq()
 and every 86xx board uses get_bus_freq().  If implement get_ddr_freq()
 as a static inline to call get_bus_freq() we can remove
 fsl_ddr_get_mem_data_rate altogether and just call get_ddr_freq()
 directly.
 
 Signed-off-by: Kumar Gala ga...@kernel.crashing.org
 ---
 arch/powerpc/cpu/mpc8xxx/ddr/util.c |6 ++
 board/freescale/corenet_ds/ddr.c|5 -
 board/freescale/mpc8536ds/ddr.c |5 -
 board/freescale/mpc8540ads/ddr.c|8 
 board/freescale/mpc8541cds/ddr.c|5 -
 board/freescale/mpc8544ds/ddr.c |5 -
 board/freescale/mpc8548cds/ddr.c|5 -
 board/freescale/mpc8555cds/ddr.c|5 -
 board/freescale/mpc8560ads/ddr.c|8 
 board/freescale/mpc8568mds/ddr.c|6 --
 board/freescale/mpc8569mds/ddr.c|6 --
 board/freescale/mpc8572ds/ddr.c |5 -
 board/freescale/mpc8610hpcd/ddr.c   |5 -
 board/freescale/mpc8641hpcn/ddr.c   |7 +--
 board/freescale/p1022ds/ddr.c   |5 -
 board/freescale/p2020ds/ddr.c   |5 -
 board/sbc8548/ddr.c |5 -
 board/sbc8560/ddr.c |8 
 board/sbc8641d/ddr.c|5 -
 board/socrates/ddr.c|5 -
 board/stx/stxgp3/ddr.c  |8 
 board/stx/stxssa/ddr.c  |8 
 board/xes/xpedite517x/ddr.c |7 +--
 board/xes/xpedite520x/ddr.c |5 -
 board/xes/xpedite537x/ddr.c |5 -
 board/xes/xpedite550x/ddr.c |5 -
 include/common.h|4 
 27 files changed, 8 insertions(+), 148 deletions(-)

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Re: [U-Boot] [PATCH 2/2 v3] powerpc/8xxx: Refactor fsl_ddr_get_spd into common code from board


On Feb 4, 2011, at 2:44 PM, Kumar Gala wrote:

 Move fsl_ddr_get_spd into common mpc8xxx/ddr/main.c as most boards
 pretty much do the same thing.  The only variations are in how many
 controllers or DIMMs per controller exist.  To make this work we
 standardize on the names of the SPD_EEPROM_ADDRESS defines based on the
 use case of the board.
 
 We allow boards to override get_spd to either do board specific fixups
 to the SPD data or deal with any unique behavior of how the SPD eeproms
 are wired up.
 
 Signed-off-by: Kumar Gala ga...@kernel.crashing.org
 ---
 * Changed __get_spd error message from debug - printf

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Re: [U-Boot] [PATCH] powerpc/85xx: Cleanup some QE related defines


On Jan 31, 2011, at 11:16 PM, Kumar Gala wrote:

 Move some processor specific QE defines into config_mpc85xx.h and use
 QE_MURAM_SIZE to cleanup some ifdef mess in the QE immap struct.
 
 Also fixed up some comment style issues in immap_qe.h
 
 Signed-off-by: Kumar Gala ga...@kernel.crashing.org
 ---
 arch/powerpc/include/asm/config_mpc85xx.h |6 ++
 arch/powerpc/include/asm/immap_qe.h   |   98 +
 2 files changed, 37 insertions(+), 67 deletions(-)

applied to 85xx next

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Re: [U-Boot] [PATCH] powerpc: Add cpu_secondary_init_r to allow for initialization post env setup


On Feb 2, 2011, at 12:21 PM, Kumar Gala wrote:

 We can simplify some cpu/SoC level initialization by moving it to be
 after the environment and non-volatile storage is setup as there might
 be dependancies on such things in various boot configurations.
 
 For example for FSL SoC's with QE if we boot from NAND we need it setup
 to extra the ucode image to initialize the QE.  If we always do this
 after environment  non-volatile storage is working we can have the code
 be the same regardless of NOR, NAND, SPI, MMC boot.
 
 Signed-off-by: Kumar Gala ga...@kernel.crashing.org
 ---
 * This is really second version of the cpu_late_init_r patch
  - changed where we call cpu_secondary_init_r to be right after env_relocate
 
 arch/powerpc/cpu/mpc85xx/cpu_init.c |   15 +--
 arch/powerpc/lib/board.c|   14 ++
 2 files changed, 23 insertions(+), 6 deletions(-)

applied to 85xx next

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Re: [U-Boot] [PATCH] powerpc/85xx: Don't build read_tlbcam_entry for CONFIG_NAND_SPL


On Feb 3, 2011, at 8:22 PM, Kumar Gala wrote:

 Slim down NAND SPL build a bit as we don't need read_tlbcam_entry.
 
 Signed-off-by: Kumar Gala ga...@kernel.crashing.org
 ---
 arch/powerpc/cpu/mpc85xx/tlb.c |4 ++--
 1 files changed, 2 insertions(+), 2 deletions(-)

applied to 85xx next

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Re: [U-Boot] [PATCH 1/2] powerpc/85xx: Add support for Freescale P1023/P1017 Processors


On Feb 4, 2011, at 2:41 PM, Kumar Gala wrote:

 From: Roy Zang tie-fei.z...@freescale.com
 
 Add P1023 (dual core)  P1017 (single core) specific information:
 * SERDES Table
 * Added P1023/P1017 to cpu_type_list and SVR list
  (fixed issue with P1013 not being sorted correctly).
 * Added P1023/P1027 to config_mpc85xx.h
 * Added new LAW type introduced on P1023/P1017
 * Updated a few immap register/defines unique to P1023/P1017
 
 Signed-off-by: Roy Zang tie-fei.z...@freescale.com
 Signed-off-by: Kumar Gala ga...@kernel.crashing.org
 ---
 arch/powerpc/cpu/mpc85xx/Makefile |2 +
 arch/powerpc/cpu/mpc85xx/p1023_serdes.c   |   53 +
 arch/powerpc/cpu/mpc8xxx/cpu.c|6 +++-
 arch/powerpc/include/asm/config_mpc85xx.h |   20 +++
 arch/powerpc/include/asm/fsl_law.h|1 +
 arch/powerpc/include/asm/immap_85xx.h |   14 
 arch/powerpc/include/asm/processor.h  |4 ++
 7 files changed, 99 insertions(+), 1 deletions(-)
 create mode 100644 arch/powerpc/cpu/mpc85xx/p1023_serdes.c

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Re: [U-Boot] [PATCH 2/2] powerpc/85xx: Refactor Qman/Portal support to be shared between SoCs


On Feb 4, 2011, at 2:41 PM, Kumar Gala wrote:

 From: Haiying Wang haiying.w...@freescale.com
 
 There are some differences between CoreNet (P2040, P3041, P5020, P4080)
 and and non-CoreNet (P1017, P1023) based SoCs in what features exist and
 the memory maps.
 
 * Rename various immap defines to remove _CORENET_ if they are shared
 * Added P1023/P1017 specific memory offsets
 * Only setup LIODNs or LIODN related code on CORENET based SoCs
 (features doesn't exist on P1023/P1017)
 
 Signed-off-by: Haiying Wang haiying.w...@freescale.com
 Signed-off-by: Kumar Gala ga...@kernel.crashing.org
 ---
 arch/powerpc/cpu/mpc85xx/Makefile |2 +-
 arch/powerpc/cpu/mpc85xx/portals.c|   32 +++-
 arch/powerpc/cpu/mpc85xx/speed.c  |7 +++
 arch/powerpc/include/asm/fsl_liodn.h  |   10 +-
 arch/powerpc/include/asm/immap_85xx.h |   12 ++--
 include/configs/corenet_ds.h  |1 +
 6 files changed, 43 insertions(+), 21 deletions(-)

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Re: [U-Boot] [PATCH] powerpc/85xx: Update fixed DDR3 timing table for P4080DS


On Feb 4, 2011, at 3:57 PM, York Sun wrote:

 Most of time U-boot doesn't get an exact clock number. For example, clock
 900MHz may be detected as 899.99MHz. 800MHz could be 799.99MHz. Update the
 table to align the desired clocks in the middle.
 
 Signed-off-by: York Sun york...@freescale.com
 ---
 board/freescale/corenet_ds/p4080ds_ddr.c |   16 
 1 files changed, 8 insertions(+), 8 deletions(-)

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Re: [U-Boot] [PATCH] powerpc/8xxx: Display DIMM model


On Feb 4, 2011, at 3:58 PM, York Sun wrote:

 Beside displaying RDIMM or UDIMM, this patch adds display of the model numbers
 embedded in SPD.
 
 Signed-off-by: York Sun york...@freescale.com
 ---
 .../cpu/mpc8xxx/ddr/lc_common_dimm_params.c|   11 +++
 1 files changed, 7 insertions(+), 4 deletions(-)

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Re: [U-Boot] [PATCH] fsl: update CRC after system EEPROM identifier


On Feb 9, 2011, at 3:08 PM, Timur Tabi wrote:

 On Wed, Feb 9, 2011 at 1:40 PM, Timur Tabi ti...@freescale.com wrote:
 The mac id command is used to initialize the EEPROM data to a specific
 format, but it was not updating the CRC.  This didn't cause any real
 problems, because writing the data to the EEPROM will always update the
 CRC anyway, but it did result in a bogus CRC warning.
 
 Signed-off-by: Timur Tabi ti...@freescale.com
 ---
 
 That should say, after setting EEPROM identifier

Fixed, committed to 85xx

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Re: [U-Boot] [PATCH]fsl_ddr: Adds 16 bit DDR Data width option


On Feb 7, 2011, at 3:39 AM, Poonam Aggrwal wrote:

 Signed-off-by: Poonam Aggrwal poonam.aggr...@freescale.com
 Cc: York Sun york...@freescale.com
 ---
 P1014 processor supports maximum 16bit DDR data width.
 Based of: git://git.am.freescale.net/mirrors/u-boot.git (branch, master)
 arch/powerpc/cpu/mpc8xxx/ddr/util.c  |4 +++-
 arch/powerpc/include/asm/fsl_ddr_sdram.h |1 +
 2 files changed, 4 insertions(+), 1 deletions(-)

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Re: [U-Boot] [PATCH]powerpc/qoriq: Use BR_PHYS_ADDR macro to setup BRs on P1_P2_RDB


On Feb 7, 2011, at 3:38 AM, Poonam Aggrwal wrote:

 
 Signed-off-by: Poonam Aggrwal poonam.aggr...@freescale.com
 ---
 Based of: git://git.am.freescale.net/mirrors/u-boot.git (branch, master)
 include/configs/P1_P2_RDB.h |5 +++--
 1 files changed, 3 insertions(+), 2 deletions(-)

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[U-Boot] [PATCH 2/2] powerpc/85xx: corrected p1_p2_rdb EEPROM address

From: Priyanka Jain priyanka.j...@freescale.com

Board EEPROM is used to read/save Ethernet MAC addresses.

Signed-off-by: Priyanka Jain priyanka.j...@freescale.com
Signed-off-by: Kumar Gala ga...@kernel.crashing.org
---
 include/configs/P1_P2_RDB.h |3 +--
 1 files changed, 1 insertions(+), 2 deletions(-)

diff --git a/include/configs/P1_P2_RDB.h b/include/configs/P1_P2_RDB.h
index bf34740..982cdd5 100644
--- a/include/configs/P1_P2_RDB.h
+++ b/include/configs/P1_P2_RDB.h
@@ -344,7 +344,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
 #define CONFIG_I2C_MULTI_BUS
 #define CONFIG_I2C_CMD_TREE
 #define CONFIG_SYS_I2C_SPEED   40  /* I2C speed and slave address*/
-#define CONFIG_SYS_I2C_EEPROM_ADDR 0x57
 #define CONFIG_SYS_I2C_SLAVE   0x7F
 #define CONFIG_SYS_I2C_NOPROBES{{0,0x29}}  /* Don't probe these 
addrs */
 #define CONFIG_SYS_I2C_OFFSET  0x3000
@@ -357,7 +356,7 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
 #ifdef CONFIG_ID_EEPROM
 #define CONFIG_SYS_I2C_EEPROM_NXID
 #endif
-#define CONFIG_SYS_I2C_EEPROM_ADDR 0x57
+#define CONFIG_SYS_I2C_EEPROM_ADDR 0x52
 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
 #define CONFIG_SYS_EEPROM_BUS_NUM  1
 
-- 
1.7.2.3

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[U-Boot] [PATCH 1/2] powerpc/85xx: Fix p1_p2_rdb boards.cfg

We should have been defining the actual board name in the options, not
the processor.  Fix this for P1011RDB, P1020RDB, P2010RDB, and P2020RDB.

Signed-off-by: Kumar Gala ga...@kernel.crashing.org
---
 boards.cfg |   26 +-
 1 files changed, 13 insertions(+), 13 deletions(-)

diff --git a/boards.cfg b/boards.cfg
index 59d4a41..9b34287 100644
--- a/boards.cfg
+++ b/boards.cfg
@@ -480,26 +480,26 @@ MPC8569MDS_NAND  powerpc mpc85xx 
mpc8569mds  freesca
 MPC8572DSpowerpc mpc85xx mpc8572ds   
freescale  -   MPC8572DS
 MPC8572DS_36BIT  powerpc mpc85xx mpc8572ds   
freescale  -   MPC8572DS:36BIT
 MPC8572DS_NAND   powerpc mpc85xx mpc8572ds   
freescale  -   MPC8572DS:NAND
-P1011RDB powerpc mpc85xx p1_p2_rdb   
freescale  -   P1_P2_RDB:P1011
-P1011RDB_NANDpowerpc mpc85xx p1_p2_rdb   
freescale  -   P1_P2_RDB:P1011,NAND
-P1011RDB_SDCARD  powerpc mpc85xx p1_p2_rdb   
freescale  -   P1_P2_RDB:P1011,SDCARD
-P1011RDB_SPIFLASHpowerpc mpc85xx p1_p2_rdb   
freescale  -   P1_P2_RDB:P1011,SPIFLASH
+P1011RDB powerpc mpc85xx p1_p2_rdb   
freescale  -   P1_P2_RDB:P1011RDB
+P1011RDB_NANDpowerpc mpc85xx p1_p2_rdb   
freescale  -   P1_P2_RDB:P1011RDB,NAND
+P1011RDB_SDCARD  powerpc mpc85xx p1_p2_rdb   
freescale  -   P1_P2_RDB:P1011RDB,SDCARD
+P1011RDB_SPIFLASHpowerpc mpc85xx p1_p2_rdb   
freescale  -   P1_P2_RDB:P1011RDB,SPIFLASH
 P1020RDB powerpc mpc85xx p1_p2_rdb   
freescale  -   P1_P2_RDB:P1020RDB
 P1020RDB_NANDpowerpc mpc85xx p1_p2_rdb   
freescale  -   P1_P2_RDB:P1020RDB,NAND
 P1020RDB_SDCARD  powerpc mpc85xx p1_p2_rdb   
freescale  -   P1_P2_RDB:P1020RDB,SDCARD
-P1020RDB_SPIFLASHpowerpc mpc85xx p1_p2_rdb   
freescale  -   P1_P2_RDB:P1020,SPIFLASH
+P1020RDB_SPIFLASHpowerpc mpc85xx p1_p2_rdb   
freescale  -   P1_P2_RDB:P1020RDB,SPIFLASH
 P1022DS  powerpc mpc85xx p1022ds 
freescale
-P2010RDB powerpc mpc85xx p1_p2_rdb   
freescale  -   P1_P2_RDB:P2010
-P2010RDB_NANDpowerpc mpc85xx p1_p2_rdb   
freescale  -   P1_P2_RDB:P2010,NAND
-P2010RDB_SDCARD  powerpc mpc85xx p1_p2_rdb   
freescale  -   P1_P2_RDB:P2010,SDCARD
-P2010RDB_SPIFLASHpowerpc mpc85xx p1_p2_rdb   
freescale  -   P1_P2_RDB:P2010,SPIFLASH
+P2010RDB powerpc mpc85xx p1_p2_rdb   
freescale  -   P1_P2_RDB:P2010RDB
+P2010RDB_NANDpowerpc mpc85xx p1_p2_rdb   
freescale  -   P1_P2_RDB:P2010RDB,NAND
+P2010RDB_SDCARD  powerpc mpc85xx p1_p2_rdb   
freescale  -   P1_P2_RDB:P2010RDB,SDCARD
+P2010RDB_SPIFLASHpowerpc mpc85xx p1_p2_rdb   
freescale  -   P1_P2_RDB:P2010RDB,SPIFLASH
 P2020DS  powerpc mpc85xx p2020ds 
freescale
 P2020DS_36BITpowerpc mpc85xx p2020ds 
freescale  -   P2020DS:36BIT
 P2020DS_DDR2 powerpc mpc85xx p2020ds 
freescale  -   P2020DS:DDR2
-P2020RDB powerpc mpc85xx p1_p2_rdb   
freescale  -   P1_P2_RDB:P2020
-P2020RDB_NANDpowerpc mpc85xx p1_p2_rdb   
freescale  -   P1_P2_RDB:P2020,NAND
-P2020RDB_SDCARD  powerpc mpc85xx p1_p2_rdb   
freescale  -   P1_P2_RDB:P2020,SDCARD
-P2020RDB_SPIFLASHpowerpc mpc85xx p1_p2_rdb   
freescale  -   P1_P2_RDB:P2020,SPIFLASH
+P2020RDB powerpc mpc85xx p1_p2_rdb   
freescale  -   P1_P2_RDB:P2020RDB
+P2020RDB_NANDpowerpc mpc85xx p1_p2_rdb   
freescale  -   P1_P2_RDB:P2020RDB,NAND
+P2020RDB_SDCARD  powerpc mpc85xx p1_p2_rdb   
freescale  -   P1_P2_RDB:P2020RDB,SDCARD
+P2020RDB_SPIFLASHpowerpc mpc85xx p1_p2_rdb   
freescale  -   P1_P2_RDB:P2020RDB,SPIFLASH
 P4080DS  powerpc mpc85xx corenet_ds  
freescale
 mpq101

Re: [U-Boot] [PATCH 4/4 v3] p1021mds: add QE and UEC support


On Feb 8, 2011, at 2:51 PM, Haiying Wang wrote:

 P1021 has some QE pins which need to be set in pmuxcr register before using QE
 functions. In this patch, pin QE0 and QE3 are set for UCC1 and UCC5 in Eth 
 mode.
 QE9 and QE12 are set for MII management. QE12 needs to be released after MII
 access because QE12 pin is muxed with LBCTL signal.
 
 Signed-off-by: Haiying Wang haiying.w...@freescale.com
 ---
 v3: change resetting micrel phy via bcsr to board specific.
 arch/powerpc/cpu/mpc85xx/speed.c  |4 ++
 arch/powerpc/include/asm/immap_85xx.h |   13 
 board/freescale/p1021mds/p1021mds.c   |   51 +
 drivers/qe/uec.c  |   41 +-
 include/configs/P1021MDS.h|   44 
 5 files changed, 152 insertions(+), 1 deletions(-)

still want to see QE related changes in their own patch, I'll post a version 
that merges part of this and part of 2/4 into one patch.

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Re: [U-Boot] [PATCH 3/4] powerpc/85xx: load ucode from nand flash before qe_init


On Feb 7, 2011, at 3:14 PM, haiying.w...@freescale.com 
haiying.w...@freescale.com wrote:

 From: Haiying Wang haiying.w...@freescale.com
 
 In the case the QE's microcode is stored in nand flash, we need to load it 
 from
 NAND flash to ddr first then the qe_init can get the ucode correctly.
 
 Signed-off-by: Haiying Wang haiying.w...@freescale.com
 ---
 arch/powerpc/cpu/mpc85xx/cpu_init.c |   17 +
 1 files changed, 17 insertions(+), 0 deletions(-)

applied to 85xx dev

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[U-Boot] [PATCH] powerpc/85xx: Add P1021/P1012 specific QE and UEC support

From: Haiying Wang haiying.w...@freescale.com

P1021 has some QE pins which need to be set in pmuxcr register before using QE
functions. In this patch, pin QE0 and QE3 are set for UCC1 and UCC5 in Eth mode.
QE9 and QE12 are set for MII management. QE12 needs to be released after MII
access because QE12 pin is muxed with LBCTL signal.

Also added relevant QE support defines unique to P1021/P1012.

Signed-off-by: Haiying Wang haiying.w...@freescale.com
Signed-off-by: Kumar Gala ga...@kernel.crashing.org
---
 arch/powerpc/cpu/mpc85xx/speed.c  |4 +++
 arch/powerpc/include/asm/config_mpc85xx.h |6 
 arch/powerpc/include/asm/immap_85xx.h |   37 ++---
 drivers/qe/uec.c  |   32 -
 4 files changed, 69 insertions(+), 10 deletions(-)

diff --git a/arch/powerpc/cpu/mpc85xx/speed.c b/arch/powerpc/cpu/mpc85xx/speed.c
index d440b6a..dbe0ea4 100644
--- a/arch/powerpc/cpu/mpc85xx/speed.c
+++ b/arch/powerpc/cpu/mpc85xx/speed.c
@@ -165,10 +165,14 @@ void get_sys_info (sys_info_t * sysInfo)
 #endif
 
 #ifdef CONFIG_QE
+#ifdef CONFIG_P1021
+   sysInfo-freqQE =  sysInfo-freqSystemBus;
+#else
qe_ratio = ((gur-porpllsr)  MPC85xx_PORPLLSR_QE_RATIO)
 MPC85xx_PORPLLSR_QE_RATIO_SHIFT;
sysInfo-freqQE = qe_ratio * CONFIG_SYS_CLK_FREQ;
 #endif
+#endif
 
 #ifdef CONFIG_SYS_DPAA_FMAN
sysInfo-freqFMan[0] = sysInfo-freqSystemBus / 2;
diff --git a/arch/powerpc/include/asm/config_mpc85xx.h 
b/arch/powerpc/include/asm/config_mpc85xx.h
index 18327fd..2afb16a 100644
--- a/arch/powerpc/include/asm/config_mpc85xx.h
+++ b/arch/powerpc/include/asm/config_mpc85xx.h
@@ -103,6 +103,9 @@
 #define CONFIG_SYS_FSL_NUM_LAWS12
 #define CONFIG_TSECV2
 #define CONFIG_SYS_FSL_SEC_COMPAT  2
+#define QE_MURAM_SIZE  0x6000UL
+#define MAX_QE_RISC1
+#define QE_NUM_OF_SNUM 28
 
 #elif defined(CONFIG_P1013)
 #define CONFIG_MAX_CPUS1
@@ -137,6 +140,9 @@
 #define CONFIG_SYS_FSL_NUM_LAWS12
 #define CONFIG_TSECV2
 #define CONFIG_SYS_FSL_SEC_COMPAT  2
+#define QE_MURAM_SIZE  0x6000UL
+#define MAX_QE_RISC1
+#define QE_NUM_OF_SNUM 28
 
 #elif defined(CONFIG_P1022)
 #define CONFIG_MAX_CPUS2
diff --git a/arch/powerpc/include/asm/immap_85xx.h 
b/arch/powerpc/include/asm/immap_85xx.h
index d26d648..b58ecd8 100644
--- a/arch/powerpc/include/asm/immap_85xx.h
+++ b/arch/powerpc/include/asm/immap_85xx.h
@@ -1923,6 +1923,19 @@ typedef struct ccsr_gur {
 #define MPC85xx_PMUXCR_SD_DATA 0x8000
 #define MPC85xx_PMUXCR_SDHC_CD 0x4000
 #define MPC85xx_PMUXCR_SDHC_WP 0x2000
+#define MPC85xx_PMUXCR_QE0 0x8000
+#define MPC85xx_PMUXCR_QE1 0x4000
+#define MPC85xx_PMUXCR_QE2 0x2000
+#define MPC85xx_PMUXCR_QE3 0x1000
+#define MPC85xx_PMUXCR_QE4 0x0800
+#define MPC85xx_PMUXCR_QE5 0x0400
+#define MPC85xx_PMUXCR_QE6 0x0200
+#define MPC85xx_PMUXCR_QE7 0x0100
+#define MPC85xx_PMUXCR_QE8 0x0080
+#define MPC85xx_PMUXCR_QE9 0x0040
+#define MPC85xx_PMUXCR_QE100x0020
+#define MPC85xx_PMUXCR_QE110x0010
+#define MPC85xx_PMUXCR_QE120x0008
u32 pmuxcr2;/* Alt. function signal multiplex control 2 */
u8  res6[8];
u32 devdisr;/* Device disable control */
@@ -1956,29 +1969,35 @@ typedef struct ccsr_gur {
u8  res9[12];
u32 pvr;/* Processor version */
u32 svr;/* System version */
-   u8  res10a[8];
+   u8  res10[8];
u32 rstcr;  /* Reset control */
 #if defined(CONFIG_MPC8568)||defined(CONFIG_MPC8569)
-   u8  res10b[76];
+   u8  res11a[76];
par_io_t qe_par_io[7];
-   u8  res10c[1600];
+   u8  res11b[1600];
+#elif defined(CONFIG_P1021)
+   u8  res11a[12];
+   u32 iovselsr;
+   u8  res11b[60];
+   par_io_t qe_par_io[3];
+   u8  res11c[1496];
 #else
-   u8  res10b[1868];
+   u8  res11a[1868];
 #endif
u32 clkdvdr;/* Clock Divide register */
-   u8  res10d[1532];
+   u8  res12[1532];
u32 clkocr; /* Clock out select */
-   u8  res11[12];
+   u8  res13[12];
u32 ddrdllcr;   /* DDR DLL control */
-   u8  res12[12];
+   u8  res14[12];
u32 lbcdllcr;   /* LBC DLL control */
-   u8  res13[248];
+   u8  res15[248];
u32 lbiuiplldcr0;   /* LBIU PLL Debug Reg 0 */
u32 lbiuiplldcr1;   /* LBIU PLL Debug Reg 1 */
u32 ddrioovcr;  /* DDR IO Override

Re: [U-Boot] [PATCH 1/2] env_mmc: Allow board code to override the environment address


On Jan 29, 2011, at 5:29 PM, Kumar Gala wrote:

 From: Mingkai Hu mingkai...@freescale.com
 
 On some boards the environment may not be located at a fixed address in
 the MMC/SDHC card.  This allows those boards to implement their own
 means to report what address the environment is located at.
 
 Signed-off-by: Mingkai Hu mingkai...@freescale.com
 Signed-off-by: Jerry Huang chang-ming.hu...@freescale.com
 Signed-off-by: Zhao Chenhui b35...@freescale.com
 Signed-off-by: Kumar Gala ga...@kernel.crashing.org
 ---
 common/env_mmc.c |   31 +++
 1 files changed, 27 insertions(+), 4 deletions(-)
 
 diff --git a/common/env_mmc.c b/common/env_mmc.c
 index 71dcc4c..83f40f4 100644
 --- a/common/env_mmc.c
 +++ b/common/env_mmc.c
 @@ -1,5 +1,5 @@
 /*
 - * (C) Copyright 2008-2010 Freescale Semiconductor, Inc.
 + * (C) Copyright 2008-2011 Freescale Semiconductor, Inc.
  *
  * See file CREDITS for list of people who contributed to this
  * project.
 @@ -51,6 +51,19 @@ static void use_default(void);
 
 DECLARE_GLOBAL_DATA_PTR;
 
 +#if !defined(CONFIG_ENV_OFFSET)
 +#define CONFIG_ENV_OFFSET 0
 +#endif
 +
 +static int __mmc_get_env_addr(struct mmc *mmc, u32 *env_addr)
 +{
 + *env_addr = CONFIG_ENV_OFFSET;
 + return 0;
 +}
 +__attribute__((weak, alias(__mmc_get_env_addr)))
 +int mmc_get_env_addr(struct mmc *mmc, u32 *env_addr);
 +
 +
 uchar env_get_char_spec(int index)
 {
   return *((uchar *)(gd-env_addr + index));
 @@ -102,10 +115,14 @@ int saveenv(void)
   ssize_t len;
   char*res;
   struct mmc *mmc = find_mmc_device(CONFIG_SYS_MMC_ENV_DEV);
 + u32 offset;
 
   if (init_mmc_for_env(mmc))
   return 1;
 
 + if(mmc_get_env_addr(mmc, offset))
 + return 1;
 +
   res = (char *)env_new.data;
   len = hexport_r(env_htab, '\0', res, ENV_SIZE);
   if (len  0) {
 @@ -114,7 +131,7 @@ int saveenv(void)
   }
   env_new.crc   = crc32(0, env_new.data, ENV_SIZE);
   printf(Writing to MMC(%d)... , CONFIG_SYS_MMC_ENV_DEV);
 - if (write_env(mmc, CONFIG_ENV_SIZE, CONFIG_ENV_OFFSET, (u_char 
 *)env_new)) {
 + if (write_env(mmc, CONFIG_ENV_SIZE, offset, (u_char *)env_new)) {
   puts(failed\n);
   return 1;
   }
 @@ -141,16 +158,22 @@ inline int read_env(struct mmc *mmc, unsigned long size,
 void env_relocate_spec(void)
 {
 #if !defined(ENV_IS_EMBEDDED)
 -   char buf[CONFIG_ENV_SIZE];
 + char buf[CONFIG_ENV_SIZE];
 
   struct mmc *mmc = find_mmc_device(CONFIG_SYS_MMC_ENV_DEV);
 + u32 offset;
 
   if (init_mmc_for_env(mmc)) {
   use_default();
   return;
   }
 
 - if (read_env(mmc, CONFIG_ENV_SIZE, CONFIG_ENV_OFFSET, buf)) {
 + if(mmc_get_env_addr(mmc, offset)) {
 + use_default();
 + return ;
 + }
 +
 + if (read_env(mmc, CONFIG_ENV_SIZE, offset, buf)) {
   use_default();
   return;
   }
 -- 

Wolfgang,

Any comments on this?

- k
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Re: [U-Boot] Thunderbird bug (was PATCH-add 0X hexadecimal prefix to simple_strtoul)

2011-02-09 Thread Chris Moore

Hi,

Le 09/02/2011 22:17, Scott Wood a écrit :
 On Wed, 9 Feb 2011 07:40:44 +0100
 Albert ARIBAUDalbert.arib...@free.fr  wrote:

 Le 09/02/2011 07:19, Chris Moore a écrit :
 I also noticed this in some of my (rare) posts.
 I am using TB 3.1.5.
 I am too ashamed to admit my OS ;-)

 A nonsense test case written with correct spacing: a = (b  (c  1))
 ((d  ((e  1)  1)));
 If you receive this correctly then please excuse me for the noise :(
 Received correctly. :)

 In Rob's case I am not sure that the issue is due to TB eating selected
 spaces upon reception; my own TB (3.1.7), using ^U to display the raw
 message from Rob, shows missing spaces are actually in what was sent,
 and I think Wolfgang does not use TB at all.
 It's when quoting a message for a reply that Thunderbird does this mangling.


Right, that would seem to be this bug: 
https://bugzilla.mozilla.org/show_bug.cgi?id=448198
I have certainly encountered this one when quoting :(

But there is also: https://bugzilla.mozilla.org/show_bug.cgi?id=597181
I wonder if I haven't run into this one too :(

Cheers,
Chris


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Re: [U-Boot] [PATCH] fsl_pci: Add support for FSL PCIe controllers v2.x


On Feb 4, 2011, at 2:42 PM, Kumar Gala wrote:

 From: Prabhakar Kushwaha prabha...@freescale.com
 
 FSL PCIe controller v2.1:
   - New MSI inbound window
   - Same Inbound windows address as PCIe controller v1.x
 
 Added new pit_t member(pmit) to struct ccsr_pci for MSI inbound window
 
 FSL PCIe controller v2.2 and v2.3:
   - Different addresses for PCIe inbound window 3,2,1
   - Exposed PCIe inbound window 0
   - New PCIe interrupt status register
 
 Added new Interrupt Status register to struct ccsr_pci  updated pit_t array
 size to reflect the 4 inbound windows.
 
 To maintain backward compatiblilty, on V2.2 or greater controllers we
 start with inbound window 1 and leave inbound 0 with its default value
 (which maps to CCSRBAR).
 
 Signed-off-by: Prabhakar Kushwaha prabha...@freescale.com
 Signed-off-by: Kumar Gala ga...@kernel.crashing.org
 ---
 arch/powerpc/include/asm/fsl_pci.h |   20 
 drivers/pci/fsl_pci_init.c |   12 ++--
 2 files changed, 26 insertions(+), 6 deletions(-)

applied to 85xx next

- k
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Re: [U-Boot] [PATCH v3] powerpc/8xxx: Fix LAW init to respect pre-initialized entries