Re: [U-Boot] [PATCH 2/3] arm: omap: innovator: Prepare for mach-types.h changes
On 05/01/11 23:28, Alessandro Rubini wrote: I'm sorry for sounding rude, it's not my intention. I didn't follow closely the discussion about mach_types.h, but I think we are heading in the wrong direction. Exactly, this is the problem... Please, read: http://www.mail-archive.com/u-boot@lists.denx.de/msg51265.html For example, this patch: -if (machine_is_omap_h2()) -gd-bd-bi_arch_number = MACH_TYPE_OMAP_H2; -else if (machine_is_omap_innovator()) -gd-bd-bi_arch_number = MACH_TYPE_OMAP_INNOVATOR; -else -gd-bd-bi_arch_number = MACH_TYPE_OMAP_GENERIC; +#if defined(CONFIG_MACH_OMAP_H2) +gd-bd-bi_arch_number = MACH_TYPE_OMAP_H2; +#elif defined(CONFIG_MACH_OMAP_INNOVATOR) +gd-bd-bi_arch_number = MACH_TYPE_OMAP_INNOVATOR; +#else +gd-bd-bi_arch_number = MACH_TYPE_OMAP_GENERIC; +#endif Since when turning if into ifdef has been a wise move for maintainability? This never was... I agree, but it at least the board won't break when the mach-types.h is cut down the way explained in this thread, so please, read the thread. I can make another patch which will not convert the if into ifdef (either way is compile time expanded), but introduce machine_is_omap_h2() and machine_is_omap_innovator() macros definition in a board specific .h file. Do you think it will be a better solution? The commis says: This board used machine_is_* macros for identifying the arch number. Use compile time defines instead. But this already was compile-time: no code generated. But even if it generated code, I prefer 3 run-time comparisons than 3 compile-time ifdefs. This is a compile time expanded macros. Note that mach_types.h, as designed by Russell King, already had compile time selection, becuase if you selected one machine only (like in u-boot), one of the if becomes compile-time-true and the other ones become 0. That is the problem... We want to move away from Russell's mach-types.h as it gets cut down to only machines supported by mainline Linux kernel and apparently does not suit U-Boot needs. I see a lot of discussion about checkpatch compliance and cleanup-only patches are being accepted; this goes in the opposite direction, for no reason apparent to me. Please, read the thread... -- Regards, Igor. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] Add _end for the end of u-boot image for SMDK6400
On 05/02/2011 02:49 AM, Wolfgang Denk wrote: Dear seedshope, In message 1304268966-25640-1-git-send-email-bocui...@gmail.com you wrote: From: seedshope bocui...@gmail.com Since we rename _end to __bss_end__, But we need add _end symbol for the end of u-boot image. Signed-off-by: Zhong Hongbo bocui...@gmail.com Why are you sending the same patch twice? Hi Wolfgang, Sorry, My Email have some issue. Now it have already fix it. Thanks, seedshope Best regards, Wolfgang Denk ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v3] ftide020: add faraday ide ahb controller
Faraday's ftide020_s is an IDE-AHB controller for SoC design.
This patch add the u-boot driver (PIO) of ftide020 ATA (IDE) driver.
IDE commands include read, info, and other functions has been implemented.
Because this IDE controller support AHB interface only which is differ
from other most IDE controller supports PCI interface. Some registers
access is required during CMD/DATA I/O. Hence a configuration
CONFIG_IDE_AHB is required to be defined according to the feature in
cmd_ide.c.
Signed-off-by: Macpaul Lin macp...@andestech.com
---
Changes for v2:
- replace default PIO mode from 0 to 4.
- clean up lines exceed 80 charecters as could as possible.
- Since the Linux driver of ftide020 hasn't been send to kernel mailing list,
we fixed the GPL statement in this driver.
- clean up space before tab problem.
Changes for v3:
- Clean up remaining lines over 80 characters in ftide020.h.
- Remove useless driver version define.
- Remove redundant TRUE/FALSE define.
- Replace P_DEBUG marco to debug().
drivers/block/Makefile |1 +
drivers/block/ftide020.c | 367 ++
drivers/block/ftide020.h | 283 +++
3 files changed, 651 insertions(+), 0 deletions(-)
create mode 100644 drivers/block/ftide020.c
create mode 100644 drivers/block/ftide020.h
diff --git a/drivers/block/Makefile b/drivers/block/Makefile
index aa7dc87..2efe981 100644
--- a/drivers/block/Makefile
+++ b/drivers/block/Makefile
@@ -28,6 +28,7 @@ LIB := $(obj)libblock.o
COBJS-$(CONFIG_SCSI_AHCI) += ahci.o
COBJS-$(CONFIG_ATA_PIIX) += ata_piix.o
COBJS-$(CONFIG_FSL_SATA) += fsl_sata.o
+COBJS-$(CONFIG_IDE_FTIDE020) += ftide020.o
COBJS-$(CONFIG_LIBATA) += libata.o
COBJS-$(CONFIG_CMD_MG_DISK) += mg_disk.o
COBJS-$(CONFIG_MVSATA_IDE) += mvsata_ide.o
diff --git a/drivers/block/ftide020.c b/drivers/block/ftide020.c
new file mode 100644
index 000..2eef3e9
--- /dev/null
+++ b/drivers/block/ftide020.c
@@ -0,0 +1,367 @@
+/*
+ * Faraday FTIDE020 ATA Controller (AHB)
+ *
+ * (C) Copyright 2011 Andes Technology
+ * Greentime Hu greent...@andestech.com
+ * Macpaul Lin macp...@andestech.com
+ * Kuo-Wei Chou kwc...@andestech.com
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ */
+/* ftide020.c - ide support functions for the FTIDE020_S controller */
+
+#include config.h
+#include common.h
+#include ata.h
+#include ide.h
+#include asm/io.h
+#include api_public.h
+
+#include ftide020.h
+
+/* base address */
+#define FTIDE_BASE CONFIG_SYS_ATA_BASE_ADDR
+
+/*
+ * data address - The CMD and DATA use the same FIFO in FTIDE020_S
+ * FTIDE_DATA = CONFIG_SYS_ATA_BASE_ADDR + CONFIG_SYS_ATA_DATA_OFFSET
+ * = ftide020-rw_fifo
+ */
+#define FTIDE_DATA (ftide020-rw_fifo)
+
+/* command and data I/O macros */
+/* 0x0 - DATA FIFO */
+#define WRITE_DATA(x) outl((x), ftide020-rw_fifo) /* 0x00 */
+#define READ_DATA()inl(ftide020-rw_fifo) /* 0x00 */
+/* 0x04 - R: Status Reg, W: CMD_FIFO */
+#define WRITE_CMD(x) outl((x), ftide020-cmd_fifo) /* 0x04 */
+#define READ_STATUS() inl(ftide020-cmd_fifo)/* 0x04 */
+
+#define mdelay(n) ({unsigned long msec = (n); while (msec--) udelay(1000); })
+
+void ftide_set_device(int cx8, int dev)
+{
+ static struct ftide020_s *ftide020 = (struct ftide020_s *) FTIDE_BASE;
+
+ WRITE_CMD(SET_DEV_CMD | IDE_SET_CX8(cx8) | dev);
+}
+
+unsigned char ide_read_register(int dev, unsigned int port)
+{
+ static struct ftide020_s *ftide020 = (struct ftide020_s *) FTIDE_BASE;
+
+ ftide_set_device(0, dev);
+ WRITE_CMD(READ_REG_CMD | IDE_REG_CS_READ(CONFIG_IDE_REG_CS) |
+ IDE_REG_DA_WRITE(port));
+
+ return READ_DATA() 0xff;
+}
+
+void ide_write_register(int dev, unsigned int port, unsigned char val)
+{
+ static struct ftide020_s *ftide020 = (struct ftide020_s *) FTIDE_BASE;
+
+ ftide_set_device(0, dev);
+ WRITE_CMD(WRITE_REG_CMD | IDE_REG_CS_WRITE(CONFIG_IDE_REG_CS) |
+ IDE_REG_DA_WRITE(port) | val);
+}
+
+void ide_write_data(int dev, ulong *sect_buf, int words)
+{
+ static struct ftide020_s *ftide020 = (struct ftide020_s *) FTIDE_BASE;
+
+ ftide_set_device(0,
Re: [U-Boot] [PATCH 3/3] arm: at91: ether: Prepare for mach-types.h changes
On 05/01/11 22:38, Reinhard Meyer wrote:
Dear Igor Grinberg,
at91 ethernet module used machine_is_cbs337() macro for board specific
Linux compatibility issue.
Use compile time defines instead.
Signed-off-by: Igor Grinberggrinb...@compulab.co.il
---
arch/arm/cpu/arm920t/at91rm9200/ether.c | 18 +-
1 files changed, 9 insertions(+), 9 deletions(-)
diff --git a/arch/arm/cpu/arm920t/at91rm9200/ether.c
b/arch/arm/cpu/arm920t/at91rm9200/ether.c
index e1cdeba..4aeb883 100644
--- a/arch/arm/cpu/arm920t/at91rm9200/ether.c
+++ b/arch/arm/cpu/arm920t/at91rm9200/ether.c
@@ -201,15 +201,15 @@ int eth_init (bd_t * bd)
* that MicroMonitor behavior so we avoid needing to make such OS code
* care about which bootloader was used.
*/
-if (machine_is_csb337()) {
-p_mac-EMAC_SA2H = (enetaddr[0] 8) | (enetaddr[1]);
-p_mac-EMAC_SA2L = (enetaddr[2] 24) | (enetaddr[3] 16)
- | (enetaddr[4] 8) | (enetaddr[5]);
-} else {
-p_mac-EMAC_SA2L = (enetaddr[3] 24) | (enetaddr[2] 16)
- | (enetaddr[1] 8) | (enetaddr[0]);
-p_mac-EMAC_SA2H = (enetaddr[5] 8) | (enetaddr[4]);
-}
+#ifdef CONFIG_MACH_CSB337
+p_mac-EMAC_SA2H = (enetaddr[0] 8) | (enetaddr[1]);
+p_mac-EMAC_SA2L = (enetaddr[2] 24) | (enetaddr[3] 16)
+| (enetaddr[4] 8) | (enetaddr[5]);
+#else
+p_mac-EMAC_SA2L = (enetaddr[3] 24) | (enetaddr[2] 16)
+| (enetaddr[1] 8) | (enetaddr[0]);
+p_mac-EMAC_SA2H = (enetaddr[5] 8) | (enetaddr[4]);
+#endif
p_mac-EMAC_RBQP = (long) (rbfdt[0]);
p_mac-EMAC_RSR= ~(AT91C_EMAC_RSR_OVR | AT91C_EMAC_REC |
AT91C_EMAC_BNA);
There is nothing wrong with your patch itself, but it let me to take a closer
look at the
reasoning of why there is a machine dependency. The full code at this section
is:
eth_getenv_enetaddr(ethaddr, enetaddr);
/* The CSB337 originally used a version of the MicroMonitor bootloader
* which saved Ethernet addresses in the wrong order. Operating
* systems (like Linux) know this, and apply a workaround. Replicate
* that MicroMonitor behavior so we avoid needing to make such OS code
* care about which bootloader was used.
*/
if (machine_is_csb337()) {
p_mac-EMAC_SA2H = (enetaddr[0] 8) | (enetaddr[1]);
p_mac-EMAC_SA2L = (enetaddr[2] 24) | (enetaddr[3] 16)
| (enetaddr[4] 8) | (enetaddr[5]);
} else {
p_mac-EMAC_SA2L = (enetaddr[3] 24) | (enetaddr[2] 16)
| (enetaddr[1] 8) | (enetaddr[0]);
p_mac-EMAC_SA2H = (enetaddr[5] 8) | (enetaddr[4]);
}
So, for the sake of a(nother) broken bootloader and a workaround in Linux we
store the MAC address in the wrong order? What if U-Boot itself is used to
make
LAN accesses?
Well, I've read the comment before preparing the patch.
Actually, I felt like: this should be thrown away!.
Also, I haven't found csb337 board in the tree...
I didn't want to decide for you (If I'm not mistaken,
you are the maintainer of Atmel) what to do with it, so I left it.
Do you think we should remove this?
I would love to send another patch to remove this completely.
Apart from that, it feels entirely wrong to do so. Fix the kernel to NOT do a
workaround instead should be the better approach.
Yep, I totally agree...
Any opinions by Ben or Wolfgang on this?
--
Regards,
Igor.
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Re: [U-Boot] [PATCH 22/30] km/common: implement setboardid as a command
Hi,
On 04/30/2011 10:25 AM, Wolfgang Denk wrote:
Dear Valentin Longchamp,
In message
30d7413306aba80ca4540c3353d884bdffe9a643.1302272395.git.valentin.longch...@keymile.com
you wrote:
From: Holger Brunck holger.bru...@keymile.com
Read out board id and HW key from the IVM eeprom and set
these values as an environment variable was now done inside the
code as a command.
This begs to ask: and how has it been done so far? Should this patch
not remove some old code, then?
Yes it does, we did it previously in the default environment. But this was an
out of tree patch so far. Maybe I should adapt the commit message.
+{
+unsigned char buf[32];
+char *p;
+
+p = get_local_var(IVM_BoardId);
+sprintf((char *)buf, %s, p);
+setenv(boardid, (char *)buf);
+p = get_local_var(IVM_HWKey);
+sprintf((char *)buf, %s, p);
+setenv(hwkey, (char *)buf);
get_local_var() will return NULL in some cases. Error handling
missing.
Ok.
+return 0;
As is, the return 0 makes no sense, but I guess this will change when
you add error handling.
Yes.
Thanks.
Best regards
Holger Brunck
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Re: [U-Boot] [PATCH 24/30] km/common: add pnvramsize to default environment
Hi Mr. Denk, On 04/30/2011 10:32 AM, Wolfgang Denk wrote: Dear Valentin Longchamp, In message ba20e078a0b5ac55510f321b282dbff192ffba15.1302272395.git.valentin.longch...@keymile.com you wrote: From: Holger Brunck holger.bru...@keymile.com The pnvram size was used later from start scripts in linux. Therefore it must be set inside u-boot. How does this work? A plain setenv() here just adds an entry to the hash table where U-Boot stores the variables. This data is not accessable in Linux (start scripts in linux being init scripts?) Argh. Good catch. It actually works because we do initially one time a saveenv when we start a boot with the release environment. But it isn't good to be dependent to a previously saveenv. I will remove it there and add this variable to the default environment. Best regards Holger Brunck ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH V5 1/4] VCMA9: use ARM relocation feature to fix build error
Signed-off-by: David Müller d.muel...@elsoft.ch --- include/configs/VCMA9.h |5 + 1 files changed, 5 insertions(+), 0 deletions(-) Changes for V5: - remove unneeded comment and change subject diff --git a/include/configs/VCMA9.h b/include/configs/VCMA9.h index ebe9e42..3cd1bc3 100644 --- a/include/configs/VCMA9.h +++ b/include/configs/VCMA9.h @@ -247,4 +247,9 @@ #define MULTI_PURPOSE_SOCKET_ADDR 0x0800 +#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 +#define CONFIG_SYS_INIT_SP_ADDR(CONFIG_SYS_SDRAM_BASE + 0x1000 - \ + GENERATED_GBL_DATA_SIZE) + + #endif /* __CONFIG_H */ -- 1.7.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH V5 0/4] update VCMA9 port
This patch serie brings the VCMA9 port in sync with the latest U-Boot version by doing the following: - do the necessary adjustments to support the ARM relocation feature - use the CFI flash driver (and removing the old one) - remove the unneeded config.mk file - various cleanups/coding style fixes --- board/mpl/vcma9/Makefile|4 +- board/mpl/vcma9/cmd_vcma9.c | 56 + board/mpl/vcma9/config.mk | 24 -- board/mpl/vcma9/flash.c | 432 -- board/mpl/vcma9/lowlevel_init.S | 549 ++- board/mpl/vcma9/vcma9.c | 284 ++--- board/mpl/vcma9/vcma9.h | 121 ++ include/configs/VCMA9.h | 256 ++- 8 files changed, 661 insertions(+), 1065 deletions(-) Changes for V2: - delete config.mk Changes for V3: - adjust patch meta info Changes for V4: - split patch into smaller pieces - prefix patches with VCMA9 - additional tabulator cleanup in VCMA9.h - remove unneeded #undef CONFIG_SYS_ARM_WITHOUT_RELOC in VCMA9.h Changes for V5: - remove unneeded comment and change subject - remove dead debug code and move externs into header file ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH V5 2/4] VCMA9: remove unneeded config.mk
Signed-off-by: David Müller d.muel...@elsoft.ch --- board/mpl/vcma9/config.mk | 24 include/configs/VCMA9.h |2 ++ 2 files changed, 2 insertions(+), 24 deletions(-) delete mode 100644 board/mpl/vcma9/config.mk diff --git a/board/mpl/vcma9/config.mk b/board/mpl/vcma9/config.mk deleted file mode 100644 index e345913..000 --- a/board/mpl/vcma9/config.mk +++ /dev/null @@ -1,24 +0,0 @@ -# -# (C) Copyright 2002, 2003 -# David Mueller, ELSOFT AG, d.muel...@elsoft.ch -# -# MPL VCMA9 board with S3C2410X (ARM920T) cpu -# -# see http://www.mpl.ch/ for more information about the MPL VCMA9 -# - -# -# MPL VCMA9 has 1 bank of minimal 16 MB DRAM -# from 0x3000 -# -# Linux-Kernel is expected to be at 3000'8000, entry 3000'8000 -# optionally with a ramdisk at 3040' -# -# we load ourself to 33F8' -# -# download area is 3080' -# - - -#CONFIG_SYS_TEXT_BASE = 0x30F8 -CONFIG_SYS_TEXT_BASE = 0x33F8 diff --git a/include/configs/VCMA9.h b/include/configs/VCMA9.h index 3cd1bc3..1962674 100644 --- a/include/configs/VCMA9.h +++ b/include/configs/VCMA9.h @@ -38,6 +38,8 @@ #define CONFIG_S3C2410 1 /* specifically a SAMSUNG S3C2410 SoC */ #define CONFIG_VCMA9 1 /* on a MPL VCMA9 Board */ +#define CONFIG_SYS_TEXT_BASE 0x0 + /* input clock of PLL */ #define CONFIG_SYS_CLK_FREQ1200/* VCMA9 has 12MHz input clock */ -- 1.7.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH V5 3/4] VCMA9: use CFI driver (and remove the old one)
Signed-off-by: David Müller d.muel...@elsoft.ch
---
board/mpl/vcma9/Makefile |2 +-
board/mpl/vcma9/flash.c | 432 --
board/mpl/vcma9/vcma9.c | 12 ++
include/configs/VCMA9.h | 28 +--
4 files changed, 22 insertions(+), 452 deletions(-)
delete mode 100644 board/mpl/vcma9/flash.c
diff --git a/board/mpl/vcma9/Makefile b/board/mpl/vcma9/Makefile
index 27cef1d..59c25f9 100644
--- a/board/mpl/vcma9/Makefile
+++ b/board/mpl/vcma9/Makefile
@@ -28,7 +28,7 @@ endif
LIB= $(obj)lib$(BOARD).o
-COBJS := vcma9.o flash.o cmd_vcma9.o
+COBJS := vcma9.o cmd_vcma9.o
COBJS += ../common/common_util.o
SOBJS := lowlevel_init.o
diff --git a/board/mpl/vcma9/flash.c b/board/mpl/vcma9/flash.c
deleted file mode 100644
index 7abf9cf..000
--- a/board/mpl/vcma9/flash.c
+++ /dev/null
@@ -1,432 +0,0 @@
-/*
- * (C) Copyright 2002
- * Sysgo Real-Time Solutions, GmbH www.elinos.com
- * Alex Zuepke a...@sysgo.de
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include common.h
-
-ulong myflush (void);
-
-
-#define FLASH_BANK_SIZEPHYS_FLASH_SIZE
-#define MAIN_SECT_SIZE 0x1/* 64 KB */
-
-flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS];
-
-
-#define CMD_READ_ARRAY 0x00F0
-#define CMD_UNLOCK10x00AA
-#define CMD_UNLOCK20x0055
-#define CMD_ERASE_SETUP0x0080
-#define CMD_ERASE_CONFIRM 0x0030
-#define CMD_PROGRAM0x00A0
-#define CMD_UNLOCK_BYPASS 0x0020
-
-#define MEM_FLASH_ADDR1(*(volatile u16
*)(CONFIG_SYS_FLASH_BASE + (0x0555 1)))
-#define MEM_FLASH_ADDR2(*(volatile u16
*)(CONFIG_SYS_FLASH_BASE + (0x02AA 1)))
-
-#define BIT_ERASE_DONE 0x0080
-#define BIT_RDY_MASK 0x0080
-#define BIT_PROGRAM_ERROR 0x0020
-#define BIT_TIMEOUT0x8000 /* our flag */
-
-#define READY 1
-#define ERR 2
-#define TMO 4
-
-/*---
- */
-
-ulong flash_init (void)
-{
- int i, j;
- ulong size = 0;
-
- for (i = 0; i CONFIG_SYS_MAX_FLASH_BANKS; i++) {
- ulong flashbase = 0;
-
- flash_info[i].flash_id =
-#if defined(CONFIG_AMD_LV400)
- (AMD_MANUFACT FLASH_VENDMASK) |
- (AMD_ID_LV400B FLASH_TYPEMASK);
-#elif defined(CONFIG_AMD_LV800)
- (AMD_MANUFACT FLASH_VENDMASK) |
- (AMD_ID_LV800B FLASH_TYPEMASK);
-#else
-#error Unknown flash configured
-#endif
- flash_info[i].size = FLASH_BANK_SIZE;
- flash_info[i].sector_count = CONFIG_SYS_MAX_FLASH_SECT;
- memset (flash_info[i].protect, 0, CONFIG_SYS_MAX_FLASH_SECT);
- if (i == 0)
- flashbase = PHYS_FLASH_1;
- else
- panic (configured too many flash banks!\n);
- for (j = 0; j flash_info[i].sector_count; j++) {
- if (j = 3) {
- /* 1st one is 16 KB */
- if (j == 0) {
- flash_info[i].start[j] =
- flashbase + 0;
- }
-
- /* 2nd and 3rd are both 8 KB */
- if ((j == 1) || (j == 2)) {
- flash_info[i].start[j] =
- flashbase + 0x4000 + (j -
- 1) *
- 0x2000;
- }
-
- /* 4th 32 KB */
- if (j == 3) {
- flash_info[i].start[j] =
- flashbase + 0x8000;
- }
- } else {
- flash_info[i].start[j] =
- flashbase + (j - 3) *
[U-Boot] [PATCH V5 4/4] VCMA9: various cleanups/code style fixes
Signed-off-by: David Müller d.muel...@elsoft.ch
---
board/mpl/vcma9/Makefile|4 +-
board/mpl/vcma9/cmd_vcma9.c | 56 +
board/mpl/vcma9/lowlevel_init.S | 549 ++-
board/mpl/vcma9/vcma9.c | 272 +---
board/mpl/vcma9/vcma9.h | 121 ++
include/configs/VCMA9.h | 223 +
6 files changed, 634 insertions(+), 591 deletions(-)
Changes for V5:
- remove dead debug code and move externs into header file
diff --git a/board/mpl/vcma9/Makefile b/board/mpl/vcma9/Makefile
index 59c25f9..6228762 100644
--- a/board/mpl/vcma9/Makefile
+++ b/board/mpl/vcma9/Makefile
@@ -28,8 +28,8 @@ endif
LIB= $(obj)lib$(BOARD).o
-COBJS := vcma9.o cmd_vcma9.o
-COBJS += ../common/common_util.o
+COBJS := ../common/common_util.o
+COBJS += $(BOARD).o cmd_$(BOARD).o
SOBJS := lowlevel_init.o
diff --git a/board/mpl/vcma9/cmd_vcma9.c b/board/mpl/vcma9/cmd_vcma9.c
index 0d5f46e..fa49918 100644
--- a/board/mpl/vcma9/cmd_vcma9.c
+++ b/board/mpl/vcma9/cmd_vcma9.c
@@ -43,15 +43,6 @@ static uchar cs8900_chksum(ushort data)
DECLARE_GLOBAL_DATA_PTR;
-extern void print_vcma9_info(void);
-extern int vcma9_cantest(int);
-extern int vcma9_nandtest(void);
-extern int vcma9_nanderase(void);
-extern int vcma9_nandread(ulong);
-extern int vcma9_nandwrite(ulong);
-extern int vcma9_dactest(int);
-extern int do_mplcommon(cmd_tbl_t *cmdtp, int flag, int argc, char * const
argv[]);
-
/* - */
int do_vcma9(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
@@ -60,7 +51,7 @@ int do_vcma9(cmd_tbl_t *cmdtp, int flag, int argc, char *
const argv[])
char cs8900_name[10];
if (strcmp(argv[1], info) == 0)
{
- print_vcma9_info();
+ vcma9_print_info();
return 0;
}
#if defined(CONFIG_CS8900)
@@ -133,48 +124,6 @@ int do_vcma9(cmd_tbl_t *cmdtp, int flag, int argc, char *
const argv[])
return 0;
}
#endif
-#if 0
- if (strcmp(argv[1], cantest) == 0) {
- if (argc = 3)
- vcma9_cantest(strcmp(argv[2], s) ? 0 : 1);
- else
- vcma9_cantest(0);
- return 0;
- }
- if (strcmp(argv[1], nandtest) == 0) {
- vcma9_nandtest();
- return 0;
- }
- if (strcmp(argv[1], nanderase) == 0) {
- vcma9_nanderase();
- return 0;
- }
- if (strcmp(argv[1], nandread) == 0) {
- ulong offset = 0;
-
- if (argc = 3)
- offset = simple_strtoul(argv[2], NULL, 16);
-
- vcma9_nandread(offset);
- return 0;
- }
- if (strcmp(argv[1], nandwrite) == 0) {
- ulong offset = 0;
-
- if (argc = 3)
- offset = simple_strtoul(argv[2], NULL, 16);
-
- vcma9_nandwrite(offset);
- return 0;
- }
- if (strcmp(argv[1], dactest) == 0) {
- if (argc = 3)
- vcma9_dactest(strcmp(argv[2], s) ? 0 : 1);
- else
- vcma9_dactest(0);
- return 0;
- }
-#endif
return (do_mplcommon(cmdtp, flag, argc, argv));
}
@@ -182,5 +131,6 @@ int do_vcma9(cmd_tbl_t *cmdtp, int flag, int argc, char *
const argv[])
U_BOOT_CMD(
vcma9, 6, 1, do_vcma9,
VCMA9 specific commands,
- flash mem [SrcAddr]\n- updates U-Boot with image in memory
+ flash mem [SrcAddr] - updates U-Boot with image in memory\n
+ vcma9 info- displays board information
);
diff --git a/board/mpl/vcma9/lowlevel_init.S b/board/mpl/vcma9/lowlevel_init.S
index 062e868..dadaac7 100644
--- a/board/mpl/vcma9/lowlevel_init.S
+++ b/board/mpl/vcma9/lowlevel_init.S
@@ -4,9 +4,9 @@
* Copyright (C) 1999 2000 2001 Erik Mouw (j.a.k.m...@its.tudelft.nl) and
* Jan-Derk Bakker (j.d.bak...@its.tudelft.nl)
*
- * Modified for the Samsung SMDK2410 by
- * (C) Copyright 2002
+ * Modified for MPL VCMA9 by
* David Mueller, ELSOFT AG, d.muel...@elsoft.ch
+ * (C) Copyright 2002, 2003, 2004, 2005
*
* See file CREDITS for list of people who contributed to this
* project.
@@ -32,12 +32,21 @@
#include version.h
-/* some parameters for the board */
+/* register definitions */
+#define PLD_BASE 0x2800
+#define MISC_REG 0x103
+#define SDRAM_REG 0x106
#define BWSCON 0x4800
-#define PLD_BASE 0x2C00
-#define SDRAM_REG 0x2C000106
+#define CLKBASE0x4C00
+#define LOCKTIME 0x0
+#define MPLLCON0x4
+#define UPLLCON0x8
+#define GPIOBASE 0x5600
+#define GSTATUS1 0xB0
+#define FASTCPU0x02
+/* some parameters for the board */
/* BWSCON */
Re: [U-Boot] [PATCH 06/30] powerpc/km82xx: move SDRAM config to board config
Hello, On 04/30/2011 09:56 AM, Wolfgang Denk wrote: Dear Valentin Longchamp, In message 08249e40b548fff1e636cecf980e11adabda14ac.1302272395.git.valentin.longch...@keymile.com you wrote: From: Holger Brunck holger.bru...@keymile.com To be prepared for mgcoge3ne which has a different SDRAM on board. The config was moved from generic code to board specific header. Signed-off-by: Holger Brunck holger.bru...@keymile.com Acked-by: Heiko Schocher h...@denx.de cc: Wolfgang Denk w...@denx.de cc: Detlev Zundel d...@denx.de cc: Valentin Longchamp valentin.longch...@keymile.com Signed-off-by: Valentin Longchamp valentin.longch...@keymile.com --- include/configs/km82xx-common.h | 26 -- include/configs/mgcoge.h| 26 ++ include/configs/mgcoge2ne.h | 23 +++ 3 files changed, 49 insertions(+), 26 deletions(-) If I'm understanding this right, we now duplicate the definitions into two files, because two boards happen to use the same SDRAM. Would it Yes. not make more sense to move this into a single copy of a SDRAM specific header, which then gets included by all boards that use this SDRAM type? This way we can avoid multiple copied of the same stuff (which always is a maintenance nightmare) for popular RAM types. Yes this sounds reasonable. But later on in the patch serie we replace the mgcoge2ne support with the support for mgcoge3ne which has a different SDRAM. And therefore this common file would become obsolete. I try to rebase these patches that the mgcoge3ne support is also part of this patch. BTW: What would your proposal for a filename for a SDRAM specific header? Best regards Holger Brunck ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v3 1/3] ftsmc020: fix relocation
Avoid relocation problem by fix global declaration.
Signed-off-by: Macpaul Lin macp...@andestech.com
---
Changes for v2:
- Remove assembly register offsets for support lowlevel_init.S.
- The nested structure of register offsets has been rewrote.
- Fix relocation related declaration.
Changes for v3:
- Split this patch into 3 different patches according to Wolfgang's suggestion
- Fix gloable declarations to avoid problem in relocation.
- Un-nested the register structure.
- Add missing definitions in header according to datasheet.
drivers/mtd/ftsmc020.c |7 +++
1 files changed, 3 insertions(+), 4 deletions(-)
diff --git a/drivers/mtd/ftsmc020.c b/drivers/mtd/ftsmc020.c
index b027685..ddeb3a4 100644
--- a/drivers/mtd/ftsmc020.c
+++ b/drivers/mtd/ftsmc020.c
@@ -27,12 +27,10 @@ struct ftsmc020_config {
unsigned inttiming;
};
-static struct ftsmc020_config config[] = CONFIG_SYS_FTSMC020_CONFIGS;
-
-static struct ftsmc020 *smc = (struct ftsmc020 *)CONFIG_FTSMC020_BASE;
-
static void ftsmc020_setup_bank(unsigned int bank, struct ftsmc020_config *cfg)
{
+ struct ftsmc020 *smc = (struct ftsmc020 *)CONFIG_FTSMC020_BASE;
+
if (bank 3) {
printf(bank # %u invalid\n, bank);
return;
@@ -44,6 +42,7 @@ static void ftsmc020_setup_bank(unsigned int bank, struct
ftsmc020_config *cfg)
void ftsmc020_init(void)
{
+ struct ftsmc020_config config[] = CONFIG_SYS_FTSMC020_CONFIGS;
int i;
for (i = 0; i ARRAY_SIZE(config); i++)
--
1.7.3.5
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[U-Boot] [PATCH v3 2/3] ftsmc020: un-nest the register structure in header
Un-nestted the register structure in ftsmc020.h
Signed-off-by: Macpaul Lin macp...@andestech.com
---
Changes for v2:
- Remove assembly register offsets for support lowlevel_init.S.
- The nested structure of register offsets has been rewrote.
- Fix relocation related declaration.
Changes for v3:
- Split this patch into 3 different patches according to Wolfgang's suggestion
- Fix gloable declarations to avoid problem in relocation.
- Un-nested the register structure.
- Add missing definitions in header according to datasheet.
include/faraday/ftsmc020.h | 14 --
1 files changed, 8 insertions(+), 6 deletions(-)
diff --git a/include/faraday/ftsmc020.h b/include/faraday/ftsmc020.h
index a0c8689..0a3d5a2 100644
--- a/include/faraday/ftsmc020.h
+++ b/include/faraday/ftsmc020.h
@@ -25,13 +25,15 @@
#ifndef __ASSEMBLY__
+struct ftsmc020_bank {
+ unsigned intcr;
+ unsigned inttpr;
+};
+
struct ftsmc020 {
- struct {
- unsigned intcr; /* 0x00, 0x08, 0x10, 0x18 */
- unsigned inttpr;/* 0x04, 0x0c, 0x14, 0x1c */
- } bank[4];
- unsigned intpad[8]; /* 0x20 - 0x3c */
- unsigned intssr;/* 0x40 */
+ struct ftsmc020_bank bank[4]; /* 0x00 - 0x1c */
+ unsigned intpad[8]; /* 0x20 - 0x3c */
+ unsigned intssr;/* 0x40 */
};
void ftsmc020_init(void);
--
1.7.3.5
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[U-Boot] [PATCH v3 3/3] ftsmc020: add missing definitions
Add missing definitions in header file according to datasheet. Signed-off-by: Macpaul Lin macp...@andestech.com --- Changes for v2: - Remove assembly register offsets for support lowlevel_init.S. - The nested structure of register offsets has been rewrote. - Fix relocation related declaration. Changes for v3: - Split this patch into 3 different patches according to Wolfgang's suggestion - Fix gloable declarations to avoid problem in relocation. - Un-nested the register structure. - Add missing definitions in header according to datasheet. include/faraday/ftsmc020.h |5 + 1 files changed, 5 insertions(+), 0 deletions(-) diff --git a/include/faraday/ftsmc020.h b/include/faraday/ftsmc020.h index 0a3d5a2..d381938 100644 --- a/include/faraday/ftsmc020.h +++ b/include/faraday/ftsmc020.h @@ -48,6 +48,10 @@ void ftsmc020_init(void); #define FTSMC020_BANK_WPROT(1 11) +#define FTSMC020_BANK_TYPE1(1 10) +#define FTSMC020_BANK_TYPE2(1 9) +#define FTSMC020_BANK_TYPE3(1 8) + #define FTSMC020_BANK_SIZE_32K (0xb 4) #define FTSMC020_BANK_SIZE_64K (0xc 4) #define FTSMC020_BANK_SIZE_128K(0xd 4) @@ -59,6 +63,7 @@ void ftsmc020_init(void); #define FTSMC020_BANK_SIZE_8M (0x3 4) #define FTSMC020_BANK_SIZE_16M (0x4 4) #define FTSMC020_BANK_SIZE_32M (0x5 4) +#define FTSMC020_BANK_SIZE_64M (0x6 4) #define FTSMC020_BANK_MBW_8(0x0 0) #define FTSMC020_BANK_MBW_16 (0x1 0) -- 1.7.3.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 08/30] powerpc/km82xx: rename mgcoge2ne to mgcoge3ne board support
Hello, On 04/30/2011 10:05 AM, Wolfgang Denk wrote: Dear Valentin Longchamp, In message c5ba4fd44d7260d169b924ddda97c4a4c7460dd5.1302272395.git.valentin.longch...@keymile.com you wrote: From: Holger Brunck holger.bru...@keymile.com This patch rename mgcoge2ne board support to mgcoge3ne. The board is similar to mgcoge. The difference is that a NUMONYX flash is used and a larger SDRAM (256MB). Also introduce CONFIG_KM_82XX to collect ppc82xx common settings. I understand this is just a rename, but I want to ask anyway: if flash type and RAM size are the only differences, then why do we need two separate board definitions here? Would not even the same U-Boot binary image run on both boards? These flashes are CFI compatible, so the CFI driver would work on both, and RAM size autodetection has been available in U-Boot forever. In worst case, we coul differentiate boards by an additional #define, which means we only need a single line entry in boards.cfg. Why do we need to support two board entries? the SDRAM configuration is different to mgcoge. And the CFI flash on mgcoge has a dual die in a single chip and therefore e.g.CONFIG_SYS_MAX_FLASH_BANKS is different to mgcoge3ne. Additionaly some functional differences are part of the board support, this is added later on. E.g. mgcoge3ne is part of mgcoge3 which has two processors deployed and there are some connections between the processors via GPIOs which are not present on mgcoge. So in my opinion an additional board suport is reasonable in this case. Best regards Holger Brunck ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 10/30] arm/km: add addbootcount environment variable
Hello,
On 04/30/2011 10:09 AM, Wolfgang Denk wrote:
Dear Valentin Longchamp,
In message
ab89ca576a2ad8bcde3b08039a71a9a7695a7eef.1302272395.git.valentin.longch...@keymile.com
you wrote:
From: Holger Brunck holger.bru...@keymile.com
This environment variable is used to set the bootcount address
for the kernel.
addbootcount reads to me as add something to the boot counter. I
do not expect that this has anything to do with an address. Please use
something like bootcount_addr (or bootcnt_addr or similar)
instead.
@@ -106,6 +106,13 @@ int set_km_env(void)
varaddr = gd-ram_size - CONFIG_KM_RESERVED_PRAM - CONFIG_KM_PHRAM;
sprintf((char *)buf, 0x%x, varaddr);
setenv(varaddr, (char *)buf);
+
+#ifdef BOOTCOUNT_ADDR
+unsigned int bootcountaddr;
+bootcountaddr = gd-ram_size - CONFIG_KM_RESERVED_PRAM;
+sprintf((char *)buf, 0x%x, bootcountaddr);
+setenv(bootcountaddr, (char *)buf);
+#endif
NAK. We don't allow declarations in the middle of the code.
Ok.
}
diff --git a/include/configs/km_arm.h b/include/configs/km_arm.h
index 70113d4..89f9d35 100644
--- a/include/configs/km_arm.h
+++ b/include/configs/km_arm.h
@@ -64,6 +64,9 @@
#define CONFIG_KM_KERNEL_ADDR 0x200 /* 4096KBytes */
#define CONFIG_KM_DEF_ENV_CPU
\
+addbootcount= \
+setenv bootargs ${bootargs} \
+bootcountaddr=${bootcountaddr}\0 \
Argh. Not I see what you mean. Please fix the description,it is
completely misleading.
Ok, I will adapt this. Thanks for reviewing.
Best regards
Holger Brunck
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Re: [U-Boot] [PATCH 23/30] km/common: replace env var checkboardidlist by function
Hello,
On 04/30/2011 10:29 AM, Wolfgang Denk wrote:
Dear Valentin Longchamp,
In message
e341fcb668eb67e1eb44ea638e96f9bb514c8bfb.1302272395.git.valentin.longch...@keymile.com
you wrote:
From: Thomas Herzmann thomas.herzm...@keymile.com
The environment variable (defining a checkboardidlist function)
has been replaced by a u-boot function call. This call is much
faster and the environment is a leaner.
...
+p = get_local_var(IVM_BoardId);
+strict_strtoul(p, 16, ivmbid);
+p = get_local_var(IVM_HWKey);
+strict_strtoul(p, 16, ivmhwkey);
Error handling missing.
Ok.
+while (!found) {
+/* loop over each bid/hwkey pair in the list */
+unsigned long bid = 0;
+unsigned long hwkey = 0;
+while (*rest !isxdigit(*rest))
+rest++;
+bid = simple_strtoul(rest, endp, 16);
+if (*endp == '_') {
+rest = endp + 1;
+hwkey = simple_strtoul(rest, endp, 16);
+rest = endp;
+while (*rest !isxdigit(*rest))
+rest++;
+}
+if ((!bid) || (!hwkey)) {
+/* end of list */
+break;
+}
+if (verbose) {
+printf(trying bid=0x%lX, hwkey=%ld\n,
+bid, hwkey);
+}
+if ((bid == ivmbid) (hwkey == ivmhwkey)) {
+char buf[10];
+
+found = 1;
+envbid = bid;
+envhwkey = hwkey;
+sprintf(buf, %lx, bid);
+setenv(boardid, buf);
+sprintf(buf, %lx, hwkey);
+setenv(hwkey, buf);
+saveenv();
+}
How well has this code been tested? I may not understand it correctly
(which might be an indication that some comments are missing that
actually explain what you are doing), or there might be some unhandled
error cases.
It is tested on our boards. But indeed the commit message should be better to be
able to understand the functionality. Additionaly we check if additionaly some
error cases are not handled.
Best regards
Holger Brunck
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Re: [U-Boot] [PATCH] mvsata: issue hard reset on initialization
-Original Message-
From: Michael Walle [mailto:mich...@walle.cc]
Sent: Monday, May 02, 2011 3:35 AM
To: u-boot@lists.denx.de
Cc: Michael Walle; Prafulla Wadaskar
Subject: [PATCH] mvsata: issue hard reset on initialization
Before the actual initialization do a hard reset of the SATA port and
the
connected device.
Copying Albert for his ack
Regards..
Prafulla . .
Signed-off-by: Michael Walle mich...@walle.cc
Cc: Prafulla Wadaskar prafu...@marvell.com
---
drivers/block/mvsata_ide.c | 10 +-
1 files changed, 9 insertions(+), 1 deletions(-)
diff --git a/drivers/block/mvsata_ide.c b/drivers/block/mvsata_ide.c
index 3d6993a..ff880d5 100644
--- a/drivers/block/mvsata_ide.c
+++ b/drivers/block/mvsata_ide.c
@@ -33,7 +33,9 @@
/* SATA port registers */
struct mvsata_port_registers {
- u32 reserved1[192];
+ u32 reserved0[10];
+ u32 edma_cmd;
+ u32 reserved1[181];
/* offset 0x300 : ATA Interface registers */
u32 sstatus;
u32 serror;
@@ -76,6 +78,7 @@ struct mvsata_port_registers {
* and for SStatus DETection.
*/
+#define MVSATA_EDMA_CMD_ATA_RST 0x0004
#define MVSATA_SCONTROL_DET_MASK 0x000F
#define MVSATA_SCONTROL_DET_NONE 0x
#define MVSATA_SCONTROL_DET_INIT 0x0001
@@ -115,6 +118,11 @@ static int mvsata_ide_initialize_port(struct
mvsata_port_registers *port)
u32 status;
u32 timeleft = 1; /* wait at most 10 ms for SATA reset to
complete */
+ /* Hard reset */
+ writel(MVSATA_EDMA_CMD_ATA_RST, port-edma_cmd);
+ udelay(25);
+ writel(0, port-edma_cmd);
+
/* Set control IPM to 3 (no low power) and DET to 1 (initialize) */
control = readl(port-scontrol);
control = (control ~MVSATA_SCONTROL_MASK) | MVSATA_PORT_INIT;
--
1.7.2.3
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Re: [U-Boot] [PATCH 06/30] powerpc/km82xx: move SDRAM config to board config
Dear Holger Brunck, In message 4dbe659d.3040...@keymile.com you wrote: BTW: What would your proposal for a filename for a SDRAM specific header? Name it after the SDRAM chip type? I think we should create a directory hierarchy for this: chips/sdram/ chips/ddr/ chips/ddr2/ chips/ddr3/ We already have a few of such files - but this shows also how it should NOT be done (because we have here lots of duplicated files again): - find * -name 'mt4*' board/canmb/mt48lc16m32s2-75.h board/esd/cpci5200/mt46v16m16-75.h board/esd/pf5200/mt46v16m16-75.h board/esd/mecp5200/mt46v16m16-75.h board/a4m072/mt46v32m16.h board/icecube/mt46v16m16-75.h board/icecube/mt46v32m16.h board/icecube/mt48lc16m16a2-75.h board/inka4x0/mt46v16m16-75.h board/inka4x0/mt46v32m16-75.h board/inka4x0/mt48lc16m16a2-75.h board/bc3450/mt48lc16m16a2-75.h board/pm520/mt46v16m16-75.h board/pm520/mt48lc16m16a2-75.h board/total5200/mt48lc16m16a2-75.h board/total5200/mt48lc32m16a2-75.h board/mcc200/mt48lc8m32b2-6-7.h board/mcc200/mt46v16m16-75.h board/mcc200/mt48lc16m16a2-75.h board/mcc200/mt48lc16m32s2-75.h board/munices/mt48lc16m16a2-75.h board/phytec/pcm030/mt46v32m16-75.h board/tqc/tqm5200/mt48lc16m16a2-75.h Eventually this is the start of a bigger cleanup action then :-) Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de Due to lack of disk space, this fortune database has been discontinued. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 08/30] powerpc/km82xx: rename mgcoge2ne to mgcoge3ne board support
Dear Holger Brunck, In message 4dbe6962.1010...@keymile.com you wrote: the SDRAM configuration is different to mgcoge. And the CFI flash on mgcoge has a dual die in a single chip and therefore e.g.CONFIG_SYS_MAX_FLASH_BANKS is different to mgcoge3ne. OK, but these can trivially be handled within one set of board files. Additionaly some functional differences are part of the board support, this is added later on. E.g. mgcoge3ne is part of mgcoge3 which has two processors deployed and there are some connections between the processors via GPIOs which are not present on mgcoge. So in my opinion an additional board suport is reasonable in this case. Well, it's your board and you have to maintain it in the long run, but I'm not convinced that this is a wise decision. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de There is a multi-legged creature crawling on your shoulder. -- Spock, A Taste of Armageddon, stardate 3193.9 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 23/30] km/common: replace env var checkboardidlist by function
Dear Holger Brunck, In message 4dbe6b91.7090...@keymile.com you wrote: How well has this code been tested? I may not understand it correctly (which might be an indication that some comments are missing that actually explain what you are doing), or there might be some unhandled error cases. It is tested on our boards. But indeed the commit message should be better to be able to understand the functionality. Additionaly we check if additionaly some error cases are not handled. And please comment the _code_! Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de Life, loathe it or ignore it, you can't like it. - Marvin the paranoid android ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2 3/6] Kirkwood: allow to override CONFIG_SYS_TCLK
-Original Message- From: Simon Guinot [mailto:sgui...@lacie.com] Sent: Monday, May 02, 2011 2:40 AM To: Prafulla Wadaskar; Albert ARIBAUD; Wolfgang Denk Cc: u-boot@lists.denx.de; Simon Guinot Subject: [PATCH v2 3/6] Kirkwood: allow to override CONFIG_SYS_TCLK This patch allow to override CONFIG_SYS_TCLK from board configuration files. This is needed for the Network Space v2 which use a non standard core clock frequency (166MHz instead of 200MHz for a 6281 SoC). As a possible enhancement for 6281 and 6282 devices, TCLK could be dynamically detected by checking the Sample at Reset register bit 21. Additionally this patch fix a typo. Signed-off-by: Simon Guinot sgui...@lacie.com --- arch/arm/include/asm/arch-kirkwood/kw88f6281.h |8 +--- 1 files changed, 5 insertions(+), 3 deletions(-) diff --git a/arch/arm/include/asm/arch-kirkwood/kw88f6281.h b/arch/arm/include/asm/arch-kirkwood/kw88f6281.h index 80723ea..22d10f1 100644 --- a/arch/arm/include/asm/arch-kirkwood/kw88f6281.h +++ b/arch/arm/include/asm/arch-kirkwood/kw88f6281.h @@ -27,11 +27,13 @@ #ifndef _ASM_ARCH_KW88F6281_H #define _ASM_ARCH_KW88F6281_H -/* SOC specific definations */ +/* SOC specific definitions */ #define KW88F6281_REGS_PHYS_BASE 0xf100 #define KW_REGS_PHY_BASE KW88F6281_REGS_PHYS_BASE -/* TCLK Core Clock defination*/ -#define CONFIG_SYS_TCLK2 /* 200MHz */ +/* TCLK Core Clock definition */ +#ifndef CONFIG_SYS_TCLK +#define CONFIG_SYS_TCLK 2 /* 200MHz */ +#endif #endif /* _ASM_ARCH_KW88F6281_H */ Acked-by: Prafulla Wadaskar prafu...@marvell.com Regards.. Prafulla . . -- 1.6.3.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] Pull request: u-boot-arm/master
Hi Wolfgang, 2011/5/1 Wolfgang Denk w...@denx.de: Dear Macpaul Lin, OK, as you explain it, can you please split this commit into 4 separate patches then: 1) code clean up 2) fix relocation problem 3) reorganize structures for better coding style 4) enhance code I have split the original patch v2 ftsmc020: enhanced features and unnested structures - http://patchwork.ozlabs.org/patch/89078/; into 3 patches according to your suggestion as follows: ftsmc020: fix relocation http://patchwork.ozlabs.org/patch/93606/ ftsmc020: un-nest the register structure in header http://patchwork.ozlabs.org/patch/93607/ ftsmc020: add missing definitions http://patchwork.ozlabs.org/patch/93608/ I also attached the In-reply-to header in the e-mail with these v3 patches. So these 3 patches should be in the origin thread of previous patch v2. Thanks. -- Best regards, Macpaul Lin ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2 2/6] sf: disable write protection for Macronix flash
-Original Message-
From: Simon Guinot [mailto:sgui...@lacie.com]
Sent: Monday, May 02, 2011 2:40 AM
To: Prafulla Wadaskar; Albert ARIBAUD; Wolfgang Denk
Cc: u-boot@lists.denx.de; Simon Guinot
Subject: [PATCH v2 2/6] sf: disable write protection for Macronix flash
Signed-off-by: Simon Guinot sgui...@lacie.com
---
drivers/mtd/spi/macronix.c | 87
1 files changed, 87 insertions(+), 0 deletions(-)
diff --git a/drivers/mtd/spi/macronix.c b/drivers/mtd/spi/macronix.c
index 8e4d71c..b587ac9 100644
--- a/drivers/mtd/spi/macronix.c
+++ b/drivers/mtd/spi/macronix.c
@@ -49,6 +49,10 @@
#define CMD_MX25XX_DP0xb9/* Deep Power-down */
#define CMD_MX25XX_RES 0xab/* Release from DP, and Read
Signature
*/
+/* Status registers */
+#define MX25XX_SR_BP (0xF 2) /* Block Protect */
+#define MX25XX_SR_SRWP (1 7)/* Write Protect */
+
struct macronix_spi_flash_params {
u16 idcode;
u16 page_size;
@@ -120,6 +124,86 @@ static const struct macronix_spi_flash_params
macronix_spi_flash_table[] = {
},
};
+static int macronix_write_status(struct spi_flash *flash, u8 sr)
+{
+ u8 cmd[2];
+ int ret;
+
+ ret = spi_flash_cmd(flash-spi, CMD_MX25XX_WREN, NULL, 0);
+ if (ret 0) {
+ debug(SF: Enabling Write failed\n);
+ return ret;
+ }
+
+ cmd[0] = CMD_MX25XX_WRSR;
+ cmd[1] = sr;
+ ret = spi_xfer(flash-spi, 16, cmd, NULL, SPI_XFER_BEGIN);
+ if (ret) {
+ debug(SF: fail to write status register\n);
+ return ret;
+ }
+
+ spi_xfer(flash-spi, 0, NULL, NULL, SPI_XFER_END);
+
+ ret = spi_flash_cmd_wait_ready(flash, SPI_FLASH_PROG_TIMEOUT);
+ if (ret 0) {
+ debug(SF: write status register timed out\n);
+ return ret;
+ }
+
+ return 0;
+}
+
+static int macronix_read_status(struct spi_flash *flash, u8 *sr)
+{
+ u8 cmd = CMD_MX25XX_RDSR;
+ int ret;
+
+ ret = spi_xfer(flash-spi, 8, cmd, NULL, SPI_XFER_BEGIN);
+ if (ret) {
+ debug(SF: Failed to send command %02x: %d\n, cmd, ret);
+ return ret;
+ }
+ ret = spi_xfer(flash-spi, 8, NULL, sr, 0);
+ if (ret) {
+ debug(SF: fail to read status register: %d\n, ret);
+ return ret;
+ }
+
+ spi_xfer(flash-spi, 0, NULL, NULL, SPI_XFER_END);
+
+ return 0;
+}
+
+static int macronix_disable_protect(struct spi_flash *flash)
+{
+ int ret;
+ u8 sr;
+
+ ret = macronix_read_status(flash, sr);
+ if (ret)
+ return ret;
+
+ if ((sr MX25XX_SR_BP) == 0)
+ return ret;
+
+ /* Disable status register write protection. */
+ sr = ~MX25XX_SR_SRWP;
+ ret = macronix_write_status(flash, sr);
+ if (ret)
+ return ret;
+
+ /* Disable block protection. */
+ sr = ~MX25XX_SR_BP;
+ ret = macronix_write_status(flash, sr);
+ if (ret)
+ return ret;
+
+ printf(SF: disable write protection\n);
+
+ return 0;
+}
+
static int macronix_write(struct spi_flash *flash,
u32 offset, size_t len, const void *buf)
{
@@ -223,5 +307,8 @@ struct spi_flash *spi_flash_probe_macronix(struct
spi_slave *spi, u8 *idcode)
* params-sectors_per_block;
mcx-flash.size = mcx-flash.sector_size * params-nr_blocks;
+ if (macronix_disable_protect(mcx-flash))
+ printf(SF: disable write protection failed\n);
+
This will forced disable the flash being written.
What if some one has purposely protected certain flash sectors?
This feature should be addressed through protect CLI
Regards..
Prafulla . .
return mcx-flash;
}
--
1.6.3.1
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Re: [U-Boot] [PATCH 6/6] Add support for Network Space v2
-Original Message- From: Simon Guinot [mailto:simon.gui...@sequanux.org] Sent: Sunday, May 01, 2011 8:34 PM To: Prafulla Wadaskar; Albert ARIBAUD Cc: u-boot@lists.denx.de; Simon Guinot Subject: [PATCH 6/6] Add support for Network Space v2 From: Simon Guinot sgui...@lacie.com This patch add support for the Network Space v2 board and parents. This include Network Space (Max) v2 and Internet Space v2. It's good it you can provide any pointer for board information if any. Signed-off-by: Simon Guinot sgui...@lacie.com --- Makefile |7 ++ board/LaCie/netspace_v2/Makefile | 49 ++ board/LaCie/netspace_v2/kwbimage.cfg | 162 + board/LaCie/netspace_v2/netspace_v2.c | 150 ++ board/LaCie/netspace_v2/netspace_v2.h | 39 include/configs/netspace_v2.h | 142 + 6 files changed, 549 insertions(+), 0 deletions(-) create mode 100644 board/LaCie/netspace_v2/Makefile create mode 100644 board/LaCie/netspace_v2/kwbimage.cfg create mode 100644 board/LaCie/netspace_v2/netspace_v2.c create mode 100644 board/LaCie/netspace_v2/netspace_v2.h create mode 100644 include/configs/netspace_v2.h I hope these are not clone from existing supported board. If you have 80% similarities, you can use the same source code. diff --git a/Makefile b/Makefile index ada951e..18e6ecd 100644 --- a/Makefile +++ b/Makefile @@ -897,6 +897,13 @@ TNY_A9260_config : unconfig @echo #define CONFIG_$(@:_config=) 1 $(obj)include/config.h @$(MKCONFIG) -n $@ -a tny_a9260 arm arm926ejs tny_a9260 calao at91 +inetspace_v2_config \ +netspace_v2_config \ +netspace_max_v2_config : unconfig + @mkdir -p $(obj)include + @echo #define CONFIG_$(shell echo $(@:_config=) | tr 'a-z' 'A-Z') 1 $(obj)include/config.h + @$(MKCONFIG) -n $@ -a netspace_v2 arm arm926ejs netspace_v2 LaCie kirkwood + Please refer better way of doing it. Ref boards.cfg file in : http://lists.denx.de/pipermail/u-boot/2011-April/091368.html Regards.. Prafulla . . ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 08/30] powerpc/km82xx: rename mgcoge2ne to mgcoge3ne board support
On 05/02/2011 10:42 AM, Wolfgang Denk wrote: Dear Holger Brunck, In message 4dbe6962.1010...@keymile.com you wrote: the SDRAM configuration is different to mgcoge. And the CFI flash on mgcoge has a dual die in a single chip and therefore e.g.CONFIG_SYS_MAX_FLASH_BANKS is different to mgcoge3ne. OK, but these can trivially be handled within one set of board files. with a lot of #ifdef MGCOGE3NE in one config file or do I misunderstand something? Additionaly some functional differences are part of the board support, this is added later on. E.g. mgcoge3ne is part of mgcoge3 which has two processors deployed and there are some connections between the processors via GPIOs which are not present on mgcoge. So in my opinion an additional board suport is reasonable in this case. Well, it's your board and you have to maintain it in the long run, but I'm not convinced that this is a wise decision. So your proposal would be to do something like mgcoge powerpc mpc8260 km82xx keymile - mgcoge3ne:MGCOGE3NE,... in boards.cfg and only one config file for both boards? Best regards Holger Brunck ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v7 01/10] nds32: add header files support for nds32
Hi Wolfgang,
2011/4/30 Wolfgang Denk w...@denx.de:
Dear Macpaul Lin,
It means adding any new code to U-Boot which includes typedefs.
According to the checkpatch result, typedef warning exists in 4 files.
arch/nds32/include/asm/posix_types.h
arch/nds32/include/asm/types.h
arch/nds32/include/asm/global_data.h
arch/nds32/include/asm/u-boot.h.
File arch/nds32/include/asm/posix_types.h and arch/nds32/include/asm/types.h
come from the Linux kernel. Which is usually used for posix
compatibility for Linux Kernel.
So these files should be fixed in Linux, too, because it is the Linux
checkpatch tool which throws this warning.
I don't think this affects POSIX compatibility. Which typedef's are
required by POSIX?
1. posix_types.h
I cannot say I'm sure that the posix_types.h is not necessary for u-boot.
If this posix_types.h won't be used any more, should we keep it in u-boot?
I listed the required typedef for POSIX compatibility in Linux kernel
as follows which
are also support by other architectures.
typedef unsigned short __kernel_dev_t;
typedef unsigned long __kernel_ino_t;
typedef unsigned short __kernel_mode_t;
typedef unsigned short __kernel_nlink_t;
typedef long __kernel_off_t;
typedef int__kernel_pid_t;
typedef unsigned short __kernel_ipc_pid_t;
typedef unsigned short __kernel_uid_t;
typedef unsigned short __kernel_gid_t;
typedef unsigned int __kernel_size_t;
typedef int__kernel_ssize_t;
typedef int__kernel_ptrdiff_t;
typedef long __kernel_time_t;
typedef long __kernel_suseconds_t;
typedef long __kernel_clock_t;
typedef int__kernel_daddr_t;
typedef char *__kernel_caddr_t;
typedef unsigned short __kernel_uid16_t;
typedef unsigned short __kernel_gid16_t;
typedef unsigned int __kernel_uid32_t;
typedef unsigned int __kernel_gid32_t;
typedef unsigned short __kernel_old_uid_t;
typedef unsigned short __kernel_old_gid_t;
typedef long long __kernel_loff_t;
typedef struct {
#if defined(__KERNEL__) || defined(__USE_ALL)
int val[2];
#else /* !defined(__KERNEL__) !defined(__USE_ALL) */
int __val[2];
#endif /* !defined(__KERNEL__) !defined(__USE_ALL) */
} __kernel_fsid_t;
Maybe this is old code that was added before checkpatch existed?
It looks the kernel is not going to fix the old typedef for
posix_types.h and types.h
Eventually they would not add these files as is any more today.
Even though kernel would not add these files with typedef for
implementing POSIX,
however, any new architecture want to be commit to Linux kernel must
implementing
the old typedef code for POSIX compatibility support unless they
want to rewrite all
POSIX interfaces.
2. types.h
typedef unsigned short umode_t;
typedef unsigned long phys_addr_t;
typedef unsigned long phys_size_t;
Take phys_addr_t as example, the following code in u-boot will use it.
include/common.h:223:phys_size_t initdram (int) will use such typedef.
../include/lmb.h:40:extern phys_addr_t lmb_alloc(struct lmb *lmb,
phys_size_t size, ulong align);
../include/addr_map.h:27: phys_size_t
size, int idx);
../include/image.h:455:phys_size_t getenv_bootm_size(void);
This file will use umode_t
../fs/ubifs/ubifs.h:115:umode_t i_mode;
I think they say please do not add any new typedef might mean to
those typedef
used in drivers or protocols.
I mean all of them.
In the other 2 files arch/nds32/include/asm/global_data.h and
arch/nds32/include/asm/u-boot.h,
typedef was used for
#449: FILE: arch/nds32/include/asm/global_data.h:46:
+typedef struct global_data {
+} gd_t;
#1505: FILE: arch/nds32/include/asm/u-boot.h:41:
+typedef struct bd_info {
+} bd_t;
Ouch. You got me there... :-(
I don't know if you have any idea of fixing it in u-boot.
Well, the fix is basicly straightforward - replace all ocurrences of
gd_t and bd_t in the U-Boot code. But this is a bigger issue and more
work than I dare to push on you. I'm grinding my teeth, but I will
accept these.
Okay, well then, according to the list above I think the problem of typedefs in
global_data.h and u-boot.h is similar to types.h. I don't know if you
agree with it?
If posix_types.h won't be used in u-boot, I'll suggest u-boot remove it.
However, I've found that if I have removed posix_types.h in
arch/nds32/includes/asm
will lead the following compilation fail.
/home/macpaul/u-boot/u-boot-nds32/include/linux/posix_types.h:46:29:
asm/posix_types.h: No such file or directory
In file included from /home/macpaul/u-boot/u-boot-nds32/include/linux/types.h:8,
from /home/macpaul/u-boot/u-boot-nds32/include/common.h:40,
from lib/asm-offsets.c:18:
[U-Boot] [PATCH v3 2/5] Kirkwood: allow to override CONFIG_SYS_TCLK
From: Simon Guinot sgui...@lacie.com This patch allow to override CONFIG_SYS_TCLK from board configuration files. This is needed for the Network Space v2 which use a non standard core clock frequency (166MHz instead of 200MHz for a 6281 SoC). As a possible enhancement for 6281 and 6282 devices, TCLK could be dynamically detected by checking the Sample at Reset register bit 21. Additionally this patch fix a typo. Signed-off-by: Simon Guinot sgui...@lacie.com Acked-by: Prafulla Wadaskar prafu...@marvell.com --- arch/arm/include/asm/arch-kirkwood/kw88f6281.h |8 +--- 1 files changed, 5 insertions(+), 3 deletions(-) diff --git a/arch/arm/include/asm/arch-kirkwood/kw88f6281.h b/arch/arm/include/asm/arch-kirkwood/kw88f6281.h index 80723ea..22d10f1 100644 --- a/arch/arm/include/asm/arch-kirkwood/kw88f6281.h +++ b/arch/arm/include/asm/arch-kirkwood/kw88f6281.h @@ -27,11 +27,13 @@ #ifndef _ASM_ARCH_KW88F6281_H #define _ASM_ARCH_KW88F6281_H -/* SOC specific definations */ +/* SOC specific definitions */ #define KW88F6281_REGS_PHYS_BASE 0xf100 #define KW_REGS_PHY_BASE KW88F6281_REGS_PHYS_BASE -/* TCLK Core Clock defination*/ -#define CONFIG_SYS_TCLK 2 /* 200MHz */ +/* TCLK Core Clock definition */ +#ifndef CONFIG_SYS_TCLK +#define CONFIG_SYS_TCLK2 /* 200MHz */ +#endif #endif /* _ASM_ARCH_KW88F6281_H */ -- 1.6.3.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v3 3/5] mv-common.h: fix DRAM banks configuration
From: Simon Guinot sgui...@lacie.com The asm/arch/config.h header define CONFIG_NR_DRAM_BANKS_MAX, which is needed to configure DRAM banks. This patch move the asm/arch/config.h header inclusion above the DRAM banks configuration. Additionally this patch fix a typo. Signed-off-by: Simon Guinot sgui...@lacie.com --- include/configs/mv-common.h |8 1 files changed, 4 insertions(+), 4 deletions(-) diff --git a/include/configs/mv-common.h b/include/configs/mv-common.h index a8937dd..0a39257 100644 --- a/include/configs/mv-common.h +++ b/include/configs/mv-common.h @@ -113,6 +113,9 @@ #define CONFIG_SYS_RESET_ADDRESS 0x/* Rst Vector Adr */ #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ +/* Include platform Common Definitions */ +#include asm/arch/config.h + /* * DRAM Banks configuration, Custom config can be done in board.h */ @@ -124,10 +127,7 @@ #endif #endif /* CONFIG_NR_DRAM_BANKS */ -/* Include platform Common Definations */ -#include asm/arch/config.h - -/* Include driver Common Definations */ +/* Include driver Common Definitions */ /* * Common NAND configuration */ -- 1.6.3.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v3 0/6] Add support for LaCie NAS Network Space v2
This patch series adds support for Network Space v2 board and parents. Changes since v1: - netconsole: restore NetOurIP check - add entries to MAINTAINERS file - move boards from root Makefile to boards.cfg - move MACH_TYPE definition into netspace_v2.h - remove CONFIG_SYS_HZ redefinition - turn PHY initialization message into debug() Changes since v2: - drop patch for Macronix MX25L4005A - rewrite patch sf: disable write protection for Macronix flash, using the common spi flash code - fix Definitions typo in mv-common.h - netconsole: add a /* Fall through */ comment before the NETCONS case label Simon Guinot (6): sf: disable write protection for Macronix flash Kirkwood: allow to override CONFIG_SYS_TCLK mv-common.h: fix DRAM banks configuration netconsole: remove `serverip' check Add support for Network Space v2 MAINTAINERS|6 + arch/arm/include/asm/arch-kirkwood/kw88f6281.h |8 +- board/LaCie/netspace_v2/Makefile | 49 +++ board/LaCie/netspace_v2/kwbimage.cfg | 162 board/LaCie/netspace_v2/netspace_v2.c | 144 + board/LaCie/netspace_v2/netspace_v2.h | 39 ++ boards.cfg |3 + drivers/mtd/spi/macronix.c | 42 ++ include/configs/mv-common.h|8 +- include/configs/netspace_v2.h | 149 ++ net/net.c |3 +- 11 files changed, 605 insertions(+), 8 deletions(-) ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v3 1/5] sf: disable write protection for Macronix flash
From: Simon Guinot sgui...@lacie.com
Signed-off-by: Simon Guinot sgui...@lacie.com
---
drivers/mtd/spi/macronix.c | 42 ++
1 files changed, 42 insertions(+), 0 deletions(-)
diff --git a/drivers/mtd/spi/macronix.c b/drivers/mtd/spi/macronix.c
index 8e4d71c..9a3895d 100644
--- a/drivers/mtd/spi/macronix.c
+++ b/drivers/mtd/spi/macronix.c
@@ -120,6 +120,45 @@ static const struct macronix_spi_flash_params
macronix_spi_flash_table[] = {
},
};
+static int macronix_write_status(struct spi_flash *flash, u8 sr)
+{
+ u8 cmd;
+ int ret;
+
+ ret = spi_flash_cmd(flash-spi, CMD_MX25XX_WREN, NULL, 0);
+ if (ret 0) {
+ debug(SF: enabling write failed\n);
+ return ret;
+ }
+
+ cmd = CMD_MX25XX_WRSR;
+ ret = spi_flash_cmd_write(flash-spi, cmd, 1, sr, 1);
+ if (ret) {
+ debug(SF: fail to write status register\n);
+ return ret;
+ }
+
+ ret = spi_flash_cmd_wait_ready(flash, SPI_FLASH_PROG_TIMEOUT);
+ if (ret 0) {
+ debug(SF: write status register timed out\n);
+ return ret;
+ }
+
+ return 0;
+}
+
+static int macronix_unlock(struct spi_flash *flash)
+{
+ int ret;
+
+ /* Enable status register writing and clear BP# bits */
+ ret = macronix_write_status(flash, 0);
+ if (ret)
+ debug(SF: fail to disable write protection\n);
+
+ return ret;
+}
+
static int macronix_write(struct spi_flash *flash,
u32 offset, size_t len, const void *buf)
{
@@ -223,5 +262,8 @@ struct spi_flash *spi_flash_probe_macronix(struct spi_slave
*spi, u8 *idcode)
* params-sectors_per_block;
mcx-flash.size = mcx-flash.sector_size * params-nr_blocks;
+ /* Clear BP# bits for read-only flash */
+ macronix_unlock(mcx-flash);
+
return mcx-flash;
}
--
1.6.3.1
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[U-Boot] [PATCH v3 4/5] netconsole: remove `serverip' check
From: Simon Guinot sgui...@lacie.com
Netconsole use the environment variable `ncip' to configure the
destination IP. `serverip' don't need to be defined.
Signed-off-by: Simon Guinot sgui...@lacie.com
---
net/net.c |3 ++-
1 files changed, 2 insertions(+), 1 deletions(-)
diff --git a/net/net.c b/net/net.c
index e50bdf1..19ac019 100644
--- a/net/net.c
+++ b/net/net.c
@@ -1718,7 +1718,6 @@ static int net_check_prereq (proto_t protocol)
#if defined(CONFIG_CMD_NFS)
case NFS:
#endif
- case NETCONS:
case TFTP:
if (NetServerIP == 0) {
puts (*** ERROR: `serverip' not set\n);
@@ -1728,7 +1727,9 @@ static int net_check_prereq (proto_t protocol)
defined(CONFIG_CMD_DNS)
common:
#endif
+ /* Fall through */
+ case NETCONS:
if (NetOurIP == 0) {
puts (*** ERROR: `ipaddr' not set\n);
return (1);
--
1.6.3.1
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[U-Boot] [PATCH v3 5/5] Add support for Network Space v2
From: Simon Guinot sgui...@lacie.com This patch add support for the Network Space v2 board and parents. This include Network Space (Max) v2 and Internet Space v2. Signed-off-by: Simon Guinot sgui...@lacie.com --- MAINTAINERS |6 + board/LaCie/netspace_v2/Makefile | 49 ++ board/LaCie/netspace_v2/kwbimage.cfg | 162 + board/LaCie/netspace_v2/netspace_v2.c | 144 + board/LaCie/netspace_v2/netspace_v2.h | 39 boards.cfg|3 + include/configs/netspace_v2.h | 149 ++ 7 files changed, 552 insertions(+), 0 deletions(-) create mode 100644 board/LaCie/netspace_v2/Makefile create mode 100644 board/LaCie/netspace_v2/kwbimage.cfg create mode 100644 board/LaCie/netspace_v2/netspace_v2.c create mode 100644 board/LaCie/netspace_v2/netspace_v2.h create mode 100644 include/configs/netspace_v2.h diff --git a/MAINTAINERS b/MAINTAINERS index 24a55c2..47b724c 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -645,6 +645,12 @@ Sedji Gaouaousedji.gaou...@atmel.com at91sam9g10ek ARM926EJS (AT91SAM9G10 SoC) at91sam9m10g45ekARM926EJS (AT91SAM9G45 SoC) +Simon Guinot simon.gui...@sequanux.org + + inetspace_v2ARM926EJS (Kirkwood SoC) + netspace_v2 ARM926EJS (Kirkwood SoC) + netspace_max_v2 ARM926EJS (Kirkwood SoC) + Marius Gröger m...@sysgo.de impa7 ARM720T (EP7211) diff --git a/board/LaCie/netspace_v2/Makefile b/board/LaCie/netspace_v2/Makefile new file mode 100644 index 000..a245f2c --- /dev/null +++ b/board/LaCie/netspace_v2/Makefile @@ -0,0 +1,49 @@ +# +# Copyright (C) 2011 Simon Guinot sgui...@lacie.com +# +# Based on Kirkwood support: +# (C) Copyright 2009 +# Marvell Semiconductor www.marvell.com +# Written-by: Prafulla Wadaskar prafu...@marvell.com +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# + +include $(TOPDIR)/config.mk + +LIB= $(obj)lib$(BOARD).o + +COBJS := netspace_v2.o + +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS)) +SOBJS := $(addprefix $(obj),$(SOBJS)) + +$(LIB):$(obj).depend $(OBJS) $(SOBJS) + $(call cmd_link_o_target, $(OBJS) $(SOBJS)) + +clean: + rm -f $(SOBJS) $(OBJS) + +distclean: clean + rm -f $(LIB) core *.bak .depend + +# + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +# diff --git a/board/LaCie/netspace_v2/kwbimage.cfg b/board/LaCie/netspace_v2/kwbimage.cfg new file mode 100644 index 000..361feeb --- /dev/null +++ b/board/LaCie/netspace_v2/kwbimage.cfg @@ -0,0 +1,162 @@ +# +# Copyright (C) 2011 Simon Guinot sgui...@lacie.com +# +# Based on Kirkwood support: +# (C) Copyright 2009 +# Marvell Semiconductor www.marvell.com +# Written-by: Prafulla Wadaskar prafu...@marvell.com +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# Refer docs/README.kwimage for more details about how-to configure +# and create kirkwood boot image +# + +# Boot Media configurations +BOOT_FROM spi # Boot from SPI flash + +# SOC registers configuration using bootrom header extension +# Maximum KWBIMAGE_MAX_CONFIG configurations allowed + +# Configure RGMII-0 interface pad voltage to 1.8V +DATA 0xFFD100e0 0x1B1B1B9B + +#Dram initalization for SINGLE x16 CL=5 @ 400MHz +DATA 0xFFD01400 0x43000618 # DDR Configuration register +# bit13-0: 0xa00 (2560 DDR2 clks refresh rate) +# bit23-14: zero +# bit24: 1= enable exit self refresh mode on DDR access +# bit25: 1 required +# bit29-26: zero +# bit31-30: 01 + +DATA 0xFFD01404 0x35143000 # DDR Controller Control Low +# bit 4:0=addr/cmd in smame cycle +# bit 5:0=clk is driven during self
Re: [U-Boot] [PATCH v2 2/6] sf: disable write protection for Macronix flash
Hi Prafulla,
On Mon, May 02, 2011 at 01:53:29AM -0700, Prafulla Wadaskar wrote:
static int macronix_write(struct spi_flash *flash,
u32 offset, size_t len, const void *buf)
{
@@ -223,5 +307,8 @@ struct spi_flash *spi_flash_probe_macronix(struct
spi_slave *spi, u8 *idcode)
* params-sectors_per_block;
mcx-flash.size = mcx-flash.sector_size * params-nr_blocks;
+ if (macronix_disable_protect(mcx-flash))
+ printf(SF: disable write protection failed\n);
+
This will forced disable the flash being written.
Yes, as the SST driver do. Maybe it is good enough for the Macronix
driver too ?
What if some one has purposely protected certain flash sectors?
Honestly, I don't know. Block protection for SPI flashes is not
supported either by u-boot (except for SST which only disable it)
nor by Linux. So, I am not sure this feature is really used.
This feature should be addressed through protect CLI
I could add an unlock method to the SPI flash operation structure.
And then, I could bind this method to a CLI command sf unlock...
Do you want me to do that ?
Regards,
Simon
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Re: [U-Boot] [PATCH v2 2/6] sf: disable write protection for Macronix flash
-Original Message-
From: Simon Guinot [mailto:simon.gui...@sequanux.org]
Sent: Monday, May 02, 2011 3:28 PM
To: Prafulla Wadaskar
Cc: Simon Guinot; Albert ARIBAUD; Wolfgang Denk; u-boot@lists.denx.de;
Prabhanjan Sarnaik; Ashish Karkare; Mike Frysinger
Subject: Re: [U-Boot] [PATCH v2 2/6] sf: disable write protection for
Macronix flash
Hi Prafulla,
On Mon, May 02, 2011 at 01:53:29AM -0700, Prafulla Wadaskar wrote:
static int macronix_write(struct spi_flash *flash,
u32 offset, size_t len, const void *buf)
{
@@ -223,5 +307,8 @@ struct spi_flash
*spi_flash_probe_macronix(struct
spi_slave *spi, u8 *idcode)
* params-sectors_per_block;
mcx-flash.size = mcx-flash.sector_size * params-nr_blocks;
+ if (macronix_disable_protect(mcx-flash))
+ printf(SF: disable write protection failed\n);
+
This will forced disable the flash being written.
Yes, as the SST driver do. Maybe it is good enough for the Macronix
driver too ?
What if some one has purposely protected certain flash sectors?
Honestly, I don't know. Block protection for SPI flashes is not
supported either by u-boot (except for SST which only disable it)
nor by Linux. So, I am not sure this feature is really used.
This feature should be addressed through protect CLI
I could add an unlock method to the SPI flash operation structure.
And then, I could bind this method to a CLI command sf unlock...
Do you want me to do that ?
Let's get Mike's opinion on this.
Regards..
Prafulla . .
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Re: [U-Boot] [PATCH 3/3] arm: at91: ether: Prepare for mach-types.h changes
Hi Igor,
On 05/01/11 22:38, Reinhard Meyer wrote:
Dear Igor Grinberg,
at91 ethernet module used machine_is_cbs337() macro for board specific
Linux compatibility issue.
Use compile time defines instead.
Signed-off-by: Igor Grinberggrinb...@compulab.co.il
---
arch/arm/cpu/arm920t/at91rm9200/ether.c | 18 +-
1 files changed, 9 insertions(+), 9 deletions(-)
diff --git a/arch/arm/cpu/arm920t/at91rm9200/ether.c
b/arch/arm/cpu/arm920t/at91rm9200/ether.c
index e1cdeba..4aeb883 100644
--- a/arch/arm/cpu/arm920t/at91rm9200/ether.c
+++ b/arch/arm/cpu/arm920t/at91rm9200/ether.c
@@ -201,15 +201,15 @@ int eth_init (bd_t * bd)
* that MicroMonitor behavior so we avoid needing to make such OS code
* care about which bootloader was used.
*/
-if (machine_is_csb337()) {
-p_mac-EMAC_SA2H = (enetaddr[0] 8) | (enetaddr[1]);
-p_mac-EMAC_SA2L = (enetaddr[2] 24) | (enetaddr[3] 16)
- | (enetaddr[4] 8) | (enetaddr[5]);
-} else {
-p_mac-EMAC_SA2L = (enetaddr[3] 24) | (enetaddr[2] 16)
- | (enetaddr[1] 8) | (enetaddr[0]);
-p_mac-EMAC_SA2H = (enetaddr[5] 8) | (enetaddr[4]);
-}
+#ifdef CONFIG_MACH_CSB337
+p_mac-EMAC_SA2H = (enetaddr[0] 8) | (enetaddr[1]);
+p_mac-EMAC_SA2L = (enetaddr[2] 24) | (enetaddr[3] 16)
+| (enetaddr[4] 8) | (enetaddr[5]);
+#else
+p_mac-EMAC_SA2L = (enetaddr[3] 24) | (enetaddr[2] 16)
+| (enetaddr[1] 8) | (enetaddr[0]);
+p_mac-EMAC_SA2H = (enetaddr[5] 8) | (enetaddr[4]);
+#endif
p_mac-EMAC_RBQP = (long) (rbfdt[0]);
p_mac-EMAC_RSR= ~(AT91C_EMAC_RSR_OVR | AT91C_EMAC_REC |
AT91C_EMAC_BNA);
There is nothing wrong with your patch itself, but it let me to take a
closer look at the
reasoning of why there is a machine dependency. The full code at this
section is:
eth_getenv_enetaddr(ethaddr, enetaddr);
/* The CSB337 originally used a version of the MicroMonitor bootloader
* which saved Ethernet addresses in the wrong order. Operating
* systems (like Linux) know this, and apply a workaround. Replicate
* that MicroMonitor behavior so we avoid needing to make such OS code
* care about which bootloader was used.
*/
if (machine_is_csb337()) {
p_mac-EMAC_SA2H = (enetaddr[0] 8) | (enetaddr[1]);
p_mac-EMAC_SA2L = (enetaddr[2] 24) | (enetaddr[3] 16)
| (enetaddr[4] 8) | (enetaddr[5]);
} else {
p_mac-EMAC_SA2L = (enetaddr[3] 24) | (enetaddr[2] 16)
| (enetaddr[1] 8) | (enetaddr[0]);
p_mac-EMAC_SA2H = (enetaddr[5] 8) | (enetaddr[4]);
}
So, for the sake of a(nother) broken bootloader and a workaround in Linux we
store the MAC address in the wrong order? What if U-Boot itself is used to
make
LAN accesses?
Well, I've read the comment before preparing the patch.
Actually, I felt like: this should be thrown away!.
Also, I haven't found csb337 board in the tree...
I didn't want to decide for you (If I'm not mistaken,
you are the maintainer of Atmel) what to do with it, so I left it.
Do you think we should remove this?
I would love to send another patch to remove this completely.
I'd say remove it. Why do I say that?
[dzu@pollux u-boot-testing (master)]$ make csb337_config
make: *** No rule to make target `csb337_config'. Stop.
make: *** [csb337_config] Error 1
[dzu@pollux u-boot-testing (master)]$ grep -i csb337 Makefile
[dzu@pollux u-boot-testing (master)]$ grep -i csb337 boards.cfg
[dzu@pollux u-boot-testing (master)]$
Cheers
Detlev
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Re: [U-Boot] [PATCH 6/6] Add support for Network Space v2
On Mon, May 02, 2011 at 02:18:10AM -0700, Prafulla Wadaskar wrote: -Original Message- From: Simon Guinot [mailto:simon.gui...@sequanux.org] Sent: Sunday, May 01, 2011 8:34 PM To: Prafulla Wadaskar; Albert ARIBAUD Cc: u-boot@lists.denx.de; Simon Guinot Subject: [PATCH 6/6] Add support for Network Space v2 From: Simon Guinot sgui...@lacie.com This patch add support for the Network Space v2 board and parents. This include Network Space (Max) v2 and Internet Space v2. It's good it you can provide any pointer for board information if any. I can only provide some commercial links and their availability for a long period is not guaranteed. Signed-off-by: Simon Guinot sgui...@lacie.com --- Makefile |7 ++ board/LaCie/netspace_v2/Makefile | 49 ++ board/LaCie/netspace_v2/kwbimage.cfg | 162 + board/LaCie/netspace_v2/netspace_v2.c | 150 ++ board/LaCie/netspace_v2/netspace_v2.h | 39 include/configs/netspace_v2.h | 142 + 6 files changed, 549 insertions(+), 0 deletions(-) create mode 100644 board/LaCie/netspace_v2/Makefile create mode 100644 board/LaCie/netspace_v2/kwbimage.cfg create mode 100644 board/LaCie/netspace_v2/netspace_v2.c create mode 100644 board/LaCie/netspace_v2/netspace_v2.h create mode 100644 include/configs/netspace_v2.h I hope these are not clone from existing supported board. If you have 80% similarities, you can use the same source code. No, this boards are not clones from the already supported ones. diff --git a/Makefile b/Makefile index ada951e..18e6ecd 100644 --- a/Makefile +++ b/Makefile @@ -897,6 +897,13 @@ TNY_A9260_config : unconfig @echo #define CONFIG_$(@:_config=) 1 $(obj)include/config.h @$(MKCONFIG) -n $@ -a tny_a9260 arm arm926ejs tny_a9260 calao at91 +inetspace_v2_config\ +netspace_v2_config \ +netspace_max_v2_config : unconfig + @mkdir -p $(obj)include + @echo #define CONFIG_$(shell echo $(@:_config=) | tr 'a-z' 'A-Z') 1 $(obj)include/config.h + @$(MKCONFIG) -n $@ -a netspace_v2 arm arm926ejs netspace_v2 LaCie kirkwood + Please refer better way of doing it. Ref boards.cfg file in : http://lists.denx.de/pipermail/u-boot/2011-April/091368.html This mistake is fixed since the v2 patch series. Regards, Simon signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] Pull request: u-boot-arm/master
Dear Macpaul Lin, In message banlktiksq59aoy3wp_wyrvk3mhdm1vh...@mail.gmail.com you wrote: I have split the original patch v2 ftsmc020: enhanced features and unnested structures - http://patchwork.ozlabs.org/patch/89078/; into 3 patches according to your suggestion as follows: ftsmc020: fix relocation http://patchwork.ozlabs.org/patch/93606/ ftsmc020: un-nest the register structure in header http://patchwork.ozlabs.org/patch/93607/ ftsmc020: add missing definitions http://patchwork.ozlabs.org/patch/93608/ I also attached the In-reply-to header in the e-mail with these v3 patches. So these 3 patches should be in the origin thread of previous patch v2. Thanks! Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de Accident: A condition in which presence of mind is good, but absence of body is better. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] ftpmu010.h: fix some missing declaration in header
Fix some missing declaration in header.
Signed-off-by: Macpaul Lin macp...@andestech.com
---
include/faraday/ftpmu010.h |3 +++
1 files changed, 3 insertions(+), 0 deletions(-)
diff --git a/include/faraday/ftpmu010.h b/include/faraday/ftpmu010.h
index 77c29a9..5e9d7b9 100644
--- a/include/faraday/ftpmu010.h
+++ b/include/faraday/ftpmu010.h
@@ -180,7 +180,10 @@ struct ftpmu010 {
#ifndef __ASSEMBLY__
void ftpmu010_32768osc_enable(void);
void ftpmu010_dlldis_disable(void);
+void ftpmu010_mfpsr_diselect_dev(unsigned int dev);
+void ftpmu010_mfpsr_select_dev(unsigned int dev);
void ftpmu010_sdram_clk_disable(unsigned int cr0);
+void ftpmu010_sdramhtc_set(unsigned int val);
#endif
#ifdef __ASSEMBLY__
--
1.7.3.5
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Re: [U-Boot] PPC405EX CHIP_21 erratum
Hi Steve, On Friday 29 April 2011 18:54:02 Steven A. Falco wrote: We've been bitten by the PPC405EX CHIP_21 erratum. How did it affect you exactly? Was an incorrect PVR detected? Did this result in some problems (Linux etc)? I've looked through the U-Boot code, but it doesn't appear that there is a work-around for this one. Correct, there currently is no workaround. The following patch is my adaptation of AMCC's suggestion as to the fix. But I have to say that I don't care for it, if for no other reason that it will break if a rev E comes out. Also, I made it #ifdef'd on CONFIG_405EX, but it will not work on a 405EXr. And I have seen a 405EX report its PVR as if it were a 405EXr. It's not looking good for the suggested work-around. AMCC claims this can be fixed in hardware, by always doing a double reset. Naturally, that is hard to implement and would mean massive rework of existing boards. Yes, there are many 405EX(r) boards in the field already. Such an hardware workaround should really be avoided if possible. So I am contemplating a different work-around, whereby software always resets the board on a cold boot (if such a thing can be reliably detected). That would hopefully be the equivalent of the hardware double reset, and would not be dependent on specific PVR values, making it more future proof. Has anyone else run across this? Do you have similar concerns about the patch? No, I have not seen this problem before. And yes, I would also prefer your alternative suggestion, with the always reboot after powerup optionally built into the U-Boot image. But as you already mentioned, we would have to find a way to reliably detect the powerup reset, so that we don't end in an reset-loop. Cheers, Stefan -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-0 Fax: (+49)-8142-66989-80 Email: off...@denx.de ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2 2/6] sf: disable write protection for Macronix flash
On Mon, May 2, 2011 at 04:53, Prafulla Wadaskar wrote: From: Simon Guinot [mailto:sgui...@lacie.com] --- a/drivers/mtd/spi/macronix.c +++ b/drivers/mtd/spi/macronix.c + if (macronix_disable_protect(mcx-flash)) + printf(SF: disable write protection failed\n); This will forced disable the flash being written. What if some one has purposely protected certain flash sectors? This feature should be addressed through protect CLI there is no spi flash protect api today, so until that happens, what Simon is proposing is correct -mike ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 3/7] JFFS2: Calculate buf_len before we read data from flash
Hi Baidu,
Hi, Detlev :
2011/4/30 Detlev Zundel d...@denx.de:
Hi Baidu,
[...]
diff --git a/fs/jffs2/jffs2_1pass.c b/fs/jffs2/jffs2_1pass.c
index 8eb77b1..be6ac78 100644
--- a/fs/jffs2/jffs2_1pass.c
+++ b/fs/jffs2/jffs2_1pass.c
@@ -1643,6 +1643,8 @@ jffs2_1pass_build_lists(struct part_info * part)
case JFFS2_NODETYPE_INODE:
if (buf_ofs + buf_len ofs + sizeof(struct
jffs2_raw_inode)) {
+ buf_len = min_t(uint32_t, buf_size,
sector_ofs
+ + part-sector_size - ofs);
I am somewhat uncomfortable that buf_len is used in the if condition
before it is recalculated inside. Are you sure that this cannot lead to
problems, i.e. can buf_len become larger than it was when entering the
condition?
It works well in my boards.
Aha. I am all happy for you that this works, but we really need to be
as sure as we can be that the code does the right thing. It works for
me is not enough.
Please read every line code in the uboot jffs2 carefully. Know more
about JFFS2.
I was asking you a question about a potential problem that I see with
your changes. Can you answer the question or not? If you cannot answer
it, then you are changing things that you do not understand. Personally
I don't trust bug-fixes that are not understood completely.
Cheers
Detlev
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Re: [U-Boot] [PATCH 6/7] JFFS2: scanning performance improvement
Hi Baidu,
Hi,Detlev
+ }
+
This has style-problems. Actually all of your patches have style
problems. Checking them as one single patch gives:
total: 32 errors, 22 warnings, 369 lines checked
Please rework the whole series.
I do not know why my patch has style-error. I use Unicode(UTF-8).
What character do you use?
This has nothing to do with character encoding. You should run
checkpatch.pl[1] on your changes as stated on our wiki page[2]. When
you do this, you will see this:
ERROR: trailing whitespace
#127: FILE: fs/jffs2/jffs2_1pass.c:964:
+^I^I^I$
ERROR: trailing whitespace
#129: FILE: fs/jffs2/jffs2_1pass.c:966:
+^I^I^Iwe compare the DIRENT's ino with the latest DIRENT's ino $
WARNING: line over 80 characters
#129: FILE: fs/jffs2/jffs2_1pass.c:966:
+ we compare the DIRENT's ino with the latest DIRENT's
ino
ERROR: trailing whitespace
#130: FILE: fs/jffs2/jffs2_1pass.c:967:
+^I^I^Ito determine whether this DIRENT is the latest one. $
ERROR: trailing whitespace
#133: FILE: fs/jffs2/jffs2_1pass.c:970:
+^I^I^Iif(jDir-ino != jffs2_1pass_find_inode(pL, jDir-name, pino)) $
WARNING: line over 80 characters
#133: FILE: fs/jffs2/jffs2_1pass.c:970:
+ if(jDir-ino != jffs2_1pass_find_inode(pL, jDir-name,
pino))
ERROR: space required before the open parenthesis '('
#133: FILE: fs/jffs2/jffs2_1pass.c:970:
+ if(jDir-ino != jffs2_1pass_find_inode(pL, jDir-name,
pino))
ERROR: trailing whitespace
#168: FILE: fs/jffs2/jffs2_nand_1pass.c:374:
+^I^Iif ((pino == jDir-pino) $
ERROR: trailing whitespace
#169: FILE: fs/jffs2/jffs2_nand_1pass.c:375:
+^I^I(len == jDir-nsize) $
ERROR: trailing whitespace
#179: FILE: fs/jffs2/jffs2_nand_1pass.c:488:
+^I^I^Iwe compare the DIRENT's ino with the latest DIRENT's ino $
WARNING: line over 80 characters
#179: FILE: fs/jffs2/jffs2_nand_1pass.c:488:
+ we compare the DIRENT's ino with the latest DIRENT's
ino
ERROR: trailing whitespace
#180: FILE: fs/jffs2/jffs2_nand_1pass.c:489:
+^I^I^Ito determine whether this DIRENT is the latest one. $
ERROR: trailing whitespace
#183: FILE: fs/jffs2/jffs2_nand_1pass.c:492:
+^I^I^Iif(jDir.ino != jffs2_1pass_find_inode(pL, jDir-name, pino)) $
WARNING: line over 80 characters
#183: FILE: fs/jffs2/jffs2_nand_1pass.c:492:
+ if(jDir.ino != jffs2_1pass_find_inode(pL, jDir-name,
pino))
ERROR: space required before the open parenthesis '('
#183: FILE: fs/jffs2/jffs2_nand_1pass.c:492:
+ if(jDir.ino != jffs2_1pass_find_inode(pL, jDir-name,
pino))
ERROR: trailing whitespace
#185: FILE: fs/jffs2/jffs2_nand_1pass.c:494:
+^I^I^I$
ERROR: trailing whitespace
#309: FILE: fs/jffs2/jffs2_1pass.c:680:
+^I^I$
ERROR: space required before the open parenthesis '('
#311: FILE: fs/jffs2/jffs2_1pass.c:682:
+ if(!pL-readbuf) {
WARNING: line over 80 characters
#457: FILE: fs/jffs2/jffs2_1pass.c:1646:
+ buf_len = min_t(uint32_t, buf_size,
sector_ofs
ERROR: trailing whitespace
#458: FILE: fs/jffs2/jffs2_1pass.c:1647:
+^I^I^I^I^I^I+ part-sector_size - ofs);^I^I$
WARNING: line over 80 characters
#458: FILE: fs/jffs2/jffs2_1pass.c:1647:
+ + part-sector_size - ofs);
ERROR: trailing whitespace
#471: FILE: fs/jffs2/jffs2_1pass.c:1664:
+^I^I^I^Iif (buf_ofs + buf_len ofs + $
ERROR: trailing whitespace
#472: FILE: fs/jffs2/jffs2_1pass.c:1665:
+^I^I^I^I^Isizeof(struct jffs2_raw_dirent) + $
WARNING: line over 80 characters
#473: FILE: fs/jffs2/jffs2_1pass.c:1666:
+ ((struct jffs2_raw_dirent
*)node)-nsize) {
WARNING: line over 80 characters
#474: FILE: fs/jffs2/jffs2_1pass.c:1667:
+ buf_len = min_t(uint32_t, buf_size,
sector_ofs
ERROR: trailing whitespace
#475: FILE: fs/jffs2/jffs2_1pass.c:1668:
+^I^I^I^I^I^I+ part-sector_size - ofs);^I$
ERROR: space required before the open parenthesis '('
#575: FILE: fs/jffs2/jffs2_1pass.c:665:
+ if(pL-readbuf)
ERROR: space prohibited after that '!' (ctx:BxW)
#585: FILE: fs/jffs2/jffs2_1pass.c:1474:
+ if(! jffs_init_1pass_list(part))
^
ERROR: space required before the open parenthesis '('
#585: FILE: fs/jffs2/jffs2_1pass.c:1474:
+ if(! jffs_init_1pass_list(part))
ERROR: trailing whitespace
#587: FILE: fs/jffs2/jffs2_1pass.c:1476:
+^I$
ERROR: trailing whitespace
#594: FILE: fs/jffs2/jffs2_1pass.c:1483:
+^I$
ERROR: space prohibited after that '!' (ctx:BxW)
#615: FILE: fs/jffs2/jffs2_nand_1pass.c:810:
+ if(! jffs_init_1pass_list(part))
^
ERROR: space required before
[U-Boot] [PATCH v2 3/3] arm: at91: ether: Prepare for mach-types.h changes
at91 ethernet module used machine_is_cbs337() macro for board specific
Linux compatibility issue.
Remove this, as no such board exist in current U-Boot tree.
Signed-off-by: Igor Grinberg grinb...@compulab.co.il
---
arch/arm/cpu/arm920t/at91rm9200/ether.c | 18 +++---
1 files changed, 3 insertions(+), 15 deletions(-)
diff --git a/arch/arm/cpu/arm920t/at91rm9200/ether.c
b/arch/arm/cpu/arm920t/at91rm9200/ether.c
index e1cdeba..2015e13 100644
--- a/arch/arm/cpu/arm920t/at91rm9200/ether.c
+++ b/arch/arm/cpu/arm920t/at91rm9200/ether.c
@@ -195,21 +195,9 @@ int eth_init (bd_t * bd)
eth_getenv_enetaddr(ethaddr, enetaddr);
- /* The CSB337 originally used a version of the MicroMonitor bootloader
-* which saved Ethernet addresses in the wrong order. Operating
-* systems (like Linux) know this, and apply a workaround. Replicate
-* that MicroMonitor behavior so we avoid needing to make such OS code
-* care about which bootloader was used.
-*/
- if (machine_is_csb337()) {
- p_mac-EMAC_SA2H = (enetaddr[0] 8) | (enetaddr[1]);
- p_mac-EMAC_SA2L = (enetaddr[2] 24) | (enetaddr[3] 16)
-| (enetaddr[4] 8) | (enetaddr[5]);
- } else {
- p_mac-EMAC_SA2L = (enetaddr[3] 24) | (enetaddr[2] 16)
-| (enetaddr[1] 8) | (enetaddr[0]);
- p_mac-EMAC_SA2H = (enetaddr[5] 8) | (enetaddr[4]);
- }
+ p_mac-EMAC_SA2L = (enetaddr[3] 24) | (enetaddr[2] 16)
+| (enetaddr[1] 8) | (enetaddr[0]);
+ p_mac-EMAC_SA2H = (enetaddr[5] 8) | (enetaddr[4]);
p_mac-EMAC_RBQP = (long) (rbfdt[0]);
p_mac-EMAC_RSR = ~(AT91C_EMAC_RSR_OVR | AT91C_EMAC_REC |
AT91C_EMAC_BNA);
--
1.7.3.4
___
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U-Boot@lists.denx.de
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[U-Boot] [PATCH] powerpc/corenet_ds: Change CONFIG_SYS_DCSRBAR_PHYS
This patch changes DCSR's 36 bit physical address from F__ to F_F000_. Most 36bit physical addresses (except SDRAM/PCI MEM...) are at F__ + 32BIT_ADDR. To be consistent we should change CONFIG_SYS_DCSRBAR_PHYS. Tested at P4080_DS eval board. Signed-off-by: Ralf Trübenbach ralf.truebenb...@men.de Cc: Kumar Gala kumar.g...@freescale.com Cc: Andy Fleming aflem...@gmail.com --- diff --git a/include/configs/corenet_ds.h b/include/configs/corenet_ds.h index d1cda15..a80aeac 100644 --- a/include/configs/corenet_ds.h +++ b/include/configs/corenet_ds.h @@ -134,9 +134,11 @@ #endif #define CONFIG_SYS_IMMRCONFIG_SYS_CCSRBAR /* PQII uses CONFIG_SYS_IMMR */ -#ifdef CONFIG_PHYS_64BIT #define CONFIG_SYS_DCSRBAR 0xf000 -#define CONFIG_SYS_DCSRBAR_PHYS0xfull +#ifdef CONFIG_PHYS_64BIT +#define CONFIG_SYS_DCSRBAR_PHYS0xff000ull +#else +#define CONFIG_SYS_DCSRBAR_PHYSCONFIG_SYS_DCSRBAR #endif /* EEPROM */ -- Best Regards/Mit freundlichen Gruessen Ralf Trübenbach Ralf Trübenbach, Software Design MEN Mikro Elektronik GmbH Neuwieder Straße 5-7 90411 Nürnberg, Germany Phone +49-911-99 33 5-0 Fax +49-911-99 33 5-910 ralf.truebenb...@men.de www.men.de MEN Mikro Elektronik GmbH - Manfred Schmitz (CTO), Udo Fuchs (CFO) - Handelsregister/Trade Register AG Nürnberg HRB 5540 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 0/5] introduce nand write.ubi, and drop ffs for jffs2 too
Hi Artem, On Fri, 2011-04-29 at 13:58 +0200, Detlev Zundel wrote: Hi Ben, It was found that on da850evm, where the NAND ECC used does not map all 0xff data to 0xff ECC, that flashing UBI and JFFS2 image from U-boot with nand write[.e] command resulted in alot of ECC errors... for UBI the result was an unmountable filesystem on second attach from linux. For JFFS2 the result was a multitude of ECC errors printed on the cosole on the second mount in Linux -- the filesystem remains mountable for awhile but eventually collapses. I am not sure that I can follow you here so I have to ask you to clarify the problem for me. I understand that a page of 0xffs does _not_ have an ECC of all 0xffs. Actually I would be surprised if there was any ECC having this property, so I doubt that this is da850 specific, correct? So I am wondering about two things: - If I erase a page in NAND, will the ECC be updated by someone or will it be 0xffs? If the latter, then is it normal to have ECC errors on freshly erased pages? - If we (correctly) write 0xffs even to an erased page, a generated ECC should match this content, so I do not see where ECC errors should come from in this setting. Summarily, I do not understand where the ECC errors came from in your setup and what the faulting party in that scenario actually is/was. Can you please enlighten me? I do not know why I'm in CC, but I see that the code to skip all 0xFFs looks like it was copied from UBI. The reason why UBI and UBI user-space tools skip NAND pages with all 0xFFs when writing is described here: http://www.linux-mtd.infradead.org/doc/ubi.html#L_flasher_algo If it is too long to read, in short: 1. if we write to flash, we always write to an erased eraseblock, obviously :-) Yes - I simply wasn't sure if the software layers below (in U-Boot) would do an erase on demand before writing. Reading the code, this isn't the case (I should have known this), so the skipping should really be safe. 2. erased erase block contains all 0xFFs, so skipping 0xFF NAND pages is harmless. 3. writing 0xFF pages has side-effects - the ECC bytes in OOB will be used 4. If we are flashing an UBIFS image, UBIFS will use the half-filled eraseblocks, and if the free pages were written with 0xFFs, they'll become unusable. So we skip 0xFF pages at the end. Not all, only the last ones. E.g., if your eraseblock consists of 4 pages, and you write data, 0xFFs, data, 0xFFs, then we'll only write data, 0xFFs, data, so that the last NAND page can be used later. Sorry for my poor English, and I'm writing in a hurry - have to have to a pub to farewell several colleagues who are leaving the company :) Thanks for your input. So I still fail to see where the ECC errors come from. The closes thing that makes sense for me, is that Bens problem very likely wasn't ECC connected at all but the result of the not capable to write twice. I.e. his NAND flashes cannot be written to twice. When he flashed the images in U-Boot, there were trailing empty blocks that got programmed and UBIFS assumed that it _could_ write to them so it tried and failed and somehow got tripped up over this. If this is the case then we should change the commit message to point to the real problem that this patch fixes. Cheers Detlev -- ``The number of UNIX installations has grown to 10, with more expected.'' Unix Programmers Manual -- 1972 The number of UNIX variants has grown to dozens, with more expected. -- 2001 -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-40 Fax: (+49)-8142-66989-80 Email: d...@denx.de ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v9 02/10] nds32: add NDS32 support into common header file
Add NDS32 support into common header file. Signed-off-by: Macpaul Lin macp...@andestech.com Changes for v1-v7: - No change Changes for v8: - Fix the patch according to dependency of x86's Fix Changes for v9: - No change --- include/common.h |4 1 files changed, 4 insertions(+), 0 deletions(-) diff --git a/include/common.h b/include/common.h index 00e266e..aa1abe6 100644 --- a/include/common.h +++ b/include/common.h @@ -275,6 +275,10 @@ intsetenv (char *, char *); #ifdef CONFIG_X86 /* x86 version to be fixed! */ # include asm/u-boot-x86.h #endif /* CONFIG_X86 */ +#ifdef CONFIG_NDS32 +# include asm/mach-types.h +# include asm/u-boot-nds32.h /* NDS32 version to be fixed! */ +#endif /* CONFIG_NDS32 */ #ifdef CONFIG_AUTO_COMPLETE int env_complete(char *var, int maxv, char *cmdv[], int maxsz, char *buf); -- 1.7.3.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v9 01/10] nds32: add header files support for nds32
Add generic header files support for nds32 architecture.
Cache, ptregs, data type and other definitions are included.
Signed-off-by: Macpaul Lin macp...@andestech.com
Changes for v1-v4:
- Code cleanup and style formatting.
Changes for v5-v6:
- This patch also updated the following changes against the
change after master tree (v2010.12-rc1).
- fix upper case definitions in cache.h
- Support GD_FLG_ENV_READY and env_buf vars in nds32 global_data.h.
- Add readsb, writesb functions into io.h.
Changes for v7:
- clean up
- volatile:
- types.h
- remove typedef volatile unsigned char vuchar;
- remove typedef volatile unsigned long vulong;
- remove typedef volatile unsigned short vushort;
- u-boot.h: remove bd_info_ext bi_ext
- bitops.h: add accessor function to bit operation with volatile var.
- system.h: add system.h for local_irq operation with flag.
Changes for v8:
- ptrace.h: rewrite the pt_reg structure, and merge ptregs.h.
- ptregs.h: removed
Changes for v9:
- No change.
---
arch/nds32/include/asm/bitops.h | 186 +++
arch/nds32/include/asm/byteorder.h| 36 +++
arch/nds32/include/asm/cache.h| 54 +
arch/nds32/include/asm/config.h | 26 ++
arch/nds32/include/asm/global_data.h | 82 +++
arch/nds32/include/asm/io.h | 410 +
arch/nds32/include/asm/mach-types.h | 29 +++
arch/nds32/include/asm/memory.h | 19 ++
arch/nds32/include/asm/posix_types.h | 84 +++
arch/nds32/include/asm/processor.h| 25 ++
arch/nds32/include/asm/ptrace.h | 88 +++
arch/nds32/include/asm/string.h | 57 +
arch/nds32/include/asm/system.h | 88 +++
arch/nds32/include/asm/types.h| 63 +
arch/nds32/include/asm/u-boot-nds32.h | 50
arch/nds32/include/asm/u-boot.h | 63 +
arch/nds32/include/asm/unaligned.h| 31 +++
17 files changed, 1391 insertions(+), 0 deletions(-)
create mode 100644 arch/nds32/include/asm/bitops.h
create mode 100644 arch/nds32/include/asm/byteorder.h
create mode 100644 arch/nds32/include/asm/cache.h
create mode 100644 arch/nds32/include/asm/config.h
create mode 100644 arch/nds32/include/asm/global_data.h
create mode 100644 arch/nds32/include/asm/io.h
create mode 100644 arch/nds32/include/asm/mach-types.h
create mode 100644 arch/nds32/include/asm/memory.h
create mode 100644 arch/nds32/include/asm/posix_types.h
create mode 100644 arch/nds32/include/asm/processor.h
create mode 100644 arch/nds32/include/asm/ptrace.h
create mode 100644 arch/nds32/include/asm/string.h
create mode 100644 arch/nds32/include/asm/system.h
create mode 100644 arch/nds32/include/asm/types.h
create mode 100644 arch/nds32/include/asm/u-boot-nds32.h
create mode 100644 arch/nds32/include/asm/u-boot.h
create mode 100644 arch/nds32/include/asm/unaligned.h
diff --git a/arch/nds32/include/asm/bitops.h b/arch/nds32/include/asm/bitops.h
new file mode 100644
index 000..c56f04b
--- /dev/null
+++ b/arch/nds32/include/asm/bitops.h
@@ -0,0 +1,186 @@
+/*
+ * Copyright 1995, Russell King.
+ * Various bits and pieces copyrights include:
+ * Linus Torvalds (test_bit).
+ *
+ * Copyright (C) 2011 Andes Technology Corporation
+ * Shawn Lin, Andes Technology Corporation nobuh...@andestech.com
+ *
+ * bit 0 is the LSB of addr; bit 32 is the LSB of (addr+1).
+ *
+ * Please note that the code in this file should never be included
+ * from user space. Many of these are not implemented in assembler
+ * since they would be too costly. Also, they require priviledged
+ * instructions (which are not available from user mode) to ensure
+ * that they are atomic.
+ */
+
+#ifndef __ASM_NDS_BITOPS_H
+#define __ASM_NDS_BITOPS_H
+
+#ifdef __KERNEL__
+
+#include asm/system.h
+
+#define smp_mb__before_clear_bit() do { } while (0)
+#define smp_mb__after_clear_bit() do { } while (0)
+
+/*
+ * Function prototypes to keep gcc -Wall happy.
+ */
+extern void set_bit(int nr, volatile void *addr);
+
+static inline void __set_bit(int nr, volatile void *addr)
+{
+ int *a = (int *)addr;
+ int mask;
+
+ a += nr 5;
+ mask = 1 (nr 0x1f);
+ *a |= mask;
+}
+
+extern void clear_bit(int nr, volatile void *addr);
+
+static inline void __clear_bit(int nr, volatile void *addr)
+{
+ int *a = (int *)addr;
+ int mask;
+ unsigned long flags;
+
+ a += nr 5;
+ mask = 1 (nr 0x1f);
+ local_irq_save(flags);
+ *a = ~mask;
+ local_irq_restore(flags);
+}
+
+extern void change_bit(int nr, volatile void *addr);
+
+static inline void __change_bit(int nr, volatile void *addr)
+{
+ int mask;
+ unsigned long *ADDR = (unsigned long *)addr;
+
+ ADDR += nr 5;
+ mask = 1 (nr 31);
+ *ADDR ^= mask;
+}
+
+extern int test_and_set_bit(int nr, volatile void *addr);
+
+static inline int __test_and_set_bit(int nr, volatile void
[U-Boot] [PATCH v9 04/10] nds32/ag101: dev offset header of SoC ag101
Add header file of device offset support for SoC ag101. SoC ag101 is the first chip using NDS32 N1213 cpu core. Note: Ag101 is actually use ftsdmc021 instead of ftsdmc020 as dram controller, which is probably wrong in the datasheet. Signed-off-by: Macpaul Lin macp...@andestech.com Changes for v1-v6: - Code clean up and style formatting. Changes for v7-v9: - No change. --- arch/nds32/include/asm/arch-ag101/ag101.h | 68 + 1 files changed, 68 insertions(+), 0 deletions(-) create mode 100644 arch/nds32/include/asm/arch-ag101/ag101.h diff --git a/arch/nds32/include/asm/arch-ag101/ag101.h b/arch/nds32/include/asm/arch-ag101/ag101.h new file mode 100644 index 000..011989a --- /dev/null +++ b/arch/nds32/include/asm/arch-ag101/ag101.h @@ -0,0 +1,68 @@ +/* + * Copyright (C) 2011 Andes Technology Corporation + * Nobuhiro Lin, Andes Technology Corporation nobuh...@andestech.com + * Macpaul Lin, Andes Technology Corporation macp...@andestech.com + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#ifndef __AG101_H +#define __AG101_H + +/* Hardware register bases */ +#define CONFIG_FTAHBC020S_BASE 0x9010 /* AHB Controller */ +#define CONFIG_FTSMC020_BASE 0x9020 /* Static Memory Controller (SRAM) */ +#define CONFIG_FTSDMC021_BASE 0x9030 /* FTSDMC020/021 SDRAM Controller */ +#define CONFIG_FTDMAC020_BASE 0x9040 /* DMA Controller */ +#define CONFIG_FTAPBBRG020S_01_BASE0x9050 /* AHB-to-APB Bridge */ +#define CONFIG_FTLCDC100_BASE 0x9060 /* LCD Controller */ +#define CONFIG_RESERVED_01_BASE0x9070 /* Reserved */ +#define CONFIG_RESERVED_02_BASE0x9080 /* Reserved */ +#define CONFIG_FTMAC100_BASE 0x9090 /* Ethernet */ +#define CONFIG_EXT_USB_HOST_BASE 0x90A0 /* External USB host */ +#define CONFIG_USB_DEV_BASE0x90B0 /* USB Device */ +#define CONFIG_EXT_AHBPCIBRG_BASE 0x90C0 /* External AHB-to-PCI Bridge (FTPCI100 not exist in ag101) */ +#define CONFIG_RESERVED_03_BASE0x90D0 /* Reserved */ +#define CONFIG_EXT_AHBAPBBRG_BASE 0x90E0 /* External AHB-to-APB Bridger (FTAPBBRG020S_02) */ +#define CONFIG_EXT_AHBSLAVE01_BASE 0x90F0 /* External AHB slave1 (LCD) */ + +#define CONFIG_EXT_AHBSLAVE02_BASE 0x9200 /* External AHB slave2 (FUSBH200) */ + +/* DEBUG LED */ +#define CONFIG_DEBUG_LED 0x902C /* Debug LED */ + +/* APB Device definitions */ +#define CONFIG_FTPMU010_BASE 0x9810 /* Power Management Unit */ +#define CONFIG_FTUART010_01_BASE 0x9830 /* BT UART 2/IrDA (UART 01 in Linux) */ +#define CONFIG_FTTMR010_BASE 0x9840 /* Counter/Timers */ +#define CONFIG_FTWDT010_BASE 0x9850 /* Watchdog Timer */ +#define CONFIG_FTRTC010_BASE 0x9860 /* Real Time Clock */ +#define CONFIG_FTGPIO010_BASE 0x9870 /* GPIO */ +#define CONFIG_FTINTC010_BASE 0x9880 /* Interrupt Controller */ +#define CONFIG_FTIIC010_BASE 0x98A0 /* I2C */ +#define CONFIG_RESERVED_04_BASE0x98C0 /* Reserved */ +#define CONFIG_FTCFC010_BASE 0x98D0 /* Compat Flash Controller */ +#define CONFIG_FTSDC010_BASE 0x98E0 /* SD Controller */ + +#define CONFIG_FTSSP010_02_BASE0x9940 /* Synchronous Serial Port Controller (SSP) I2S/AC97 */ +#define CONFIG_FTUART010_02_BASE 0x9960 /* ST UART ? SSP 02 (UART 02 in Linux) */ + +/* The following address was not defined in Linux */ +#define CONFIG_FTUART010_03_BASE 0x9820 /* FF UART 3 */ +#define CONFIG_FTSSP010_01_BASE0x98B0 /* Synchronous Serial Port Controller (SSP) 01 */ +#define CONFIG_IRDA_BASE 0x9890 /* IrDA */ +#define CONFIG_PMW_BASE0x9910 /* PWM - Pulse Width Modulator Controller */ + +#endif /* __AG101_H */ -- 1.7.3.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v9 03/10] nds32/core N1213: NDS32 N12 core family N1213
Add N1213 cpu core (N12 Core family) support for NDS32 arch. This patch includes start.S for the initialize procedure of N1213. NDS32 Core N1213 has the following hardware features. Core: - 16-/32-bit mixable instruction format - 32 general-purpose 32-bit registers - 8-stage pipeline - Dynamic branch prediction - 32/64/128/256 BTB - Return address stack (RAS) - Vector interrupts for internal/external - 3 HW-level nested interruptions - User and super-user mode support - Memory-mapped I/O - Address space up to 4GB Memory Management Unit: - TLB - Optional hardware page table walker - Two groups of page size support Memory Subsystem: - I D cache - I D local memory (LM) Bus Interface: - Synchronous/Asynchronous AHB bus: 0, 1 or 2 ports Start procedure: start.S will start up the N1213 CPU core at first, then jump to SoC dependent lowlevel_init.S and watchdog.S to configure peripheral devices. Signed-off-by: Macpaul Lin macp...@andestech.com Changes v1 to v6: - Style clean up and reorganize code Changes v7-v9: - No Change. --- arch/nds32/cpu/n1213/Makefile | 50 + arch/nds32/cpu/n1213/start.S| 447 +++ arch/nds32/cpu/n1213/u-boot.lds | 68 ++ 3 files changed, 565 insertions(+), 0 deletions(-) create mode 100644 arch/nds32/cpu/n1213/Makefile create mode 100644 arch/nds32/cpu/n1213/start.S create mode 100644 arch/nds32/cpu/n1213/u-boot.lds diff --git a/arch/nds32/cpu/n1213/Makefile b/arch/nds32/cpu/n1213/Makefile new file mode 100644 index 000..111d14f --- /dev/null +++ b/arch/nds32/cpu/n1213/Makefile @@ -0,0 +1,50 @@ +# +# (C) Copyright 2000-2006 +# Wolfgang Denk, DENX Software Engineering, w...@denx.de. +# +# Copyright (C) 2011 Andes Technology Corporation +# Shawn Lin, Andes Technology Corporation nobuh...@andestech.com +# Macpaul Lin, Andes Technology Corporation macp...@andestech.com +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB= $(obj)lib$(CPU).o + +START = start.o + +SRCS := $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS) $(SOBJS)) +START := $(addprefix $(obj),$(START)) + +all: $(obj).depend $(START) $(LIB) + +$(LIB):$(OBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) + +# + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +# diff --git a/arch/nds32/cpu/n1213/start.S b/arch/nds32/cpu/n1213/start.S new file mode 100644 index 000..b04f3a5 --- /dev/null +++ b/arch/nds32/cpu/n1213/start.S @@ -0,0 +1,447 @@ +/* + * Andesboot - Startup Code for Whitiger core + * + * Copyright (C) 2006 Andes Technology Corporation + * Copyright (C) 2006 Shawn Lin nobuh...@andestech.com + * Copyright (C) 2011 Macpaul macp...@andestech.com + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include config.h +#include common.h +#include version.h + +/* + * Jump vector table for EVIC mode + */ +#define ENA_DCAC 2UL +#define DIS_DCAC ~ENA_DCAC +#define ICAC_MEM_KBF_ISET (0x07) ! I Cache sets per way +#define ICAC_MEM_KBF_IWAY (0x073) ! I cache ways +#define ICAC_MEM_KBF_ISZ (0x076) ! I cache line size +#define DCAC_MEM_KBF_DSET (0x07) ! D Cache
[U-Boot] [PATCH v9 05/10] nds32/ag101: lowlevel_init.S of ag101
lowlevel_init.S is a peripheral initial procedure of ag101. It configures onboard dram, clock, and power settings. It also prepars the dram environment before moving u-boot from rom and flash into dram. This version of lowlevel_init.S also replace hardcode value by MARCO defines from the GPL version andesboot for better code quality. Signed-off-by: Macpaul Lin macp...@andestech.com Changes from v1-v4: - Code clean up and formatting style. Changes from v5-v6 - Change hard code value into MARCO definitions. - ftsmc010 - Fix FTSMC020_TPR_AT2 from 1 to 3 (0xff3ff) - ftsdmc021 - Fix hardcoded address of CR1, CR2, TR1, TR2, BANK0 registers. - Fix the default configuration value of FTSDMC and FTSMC controller. - Remove some ftpmu010 and flash probe code to C functions. Changes for v7-v9: - No change. --- arch/nds32/cpu/n1213/ag101/lowlevel_init.S | 160 1 files changed, 160 insertions(+), 0 deletions(-) create mode 100644 arch/nds32/cpu/n1213/ag101/lowlevel_init.S diff --git a/arch/nds32/cpu/n1213/ag101/lowlevel_init.S b/arch/nds32/cpu/n1213/ag101/lowlevel_init.S new file mode 100644 index 000..96969ba --- /dev/null +++ b/arch/nds32/cpu/n1213/ag101/lowlevel_init.S @@ -0,0 +1,160 @@ +/* + * Copyright (C) 2011 Andes Technology Corporation + * Shawn Lin, Andes Technology Corporation nobuh...@andestech.com + * Macpaul Lin, Andes Technology Corporation macp...@andestech.com + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +.text + +#include common.h +#include config.h + +#ifndef CONFIG_SKIP_LOWLEVEL_INIT +.globl lowlevel_init +lowlevel_init: + move$r10, $lp + jal mem_init + jal remap + + ret $r10 + +mem_init: + move$r11, $lp + + /* +* mem_init: +* There are 2 bank connected to FTSMC020 on AG101 +* BANK0: FLASH/ROM (SW5, J16), BANK1: OnBoard SDRAM. +* we need to set onboard SDRAM before remap and relocation. +*/ + li $r0, (CONFIG_FTSMC020_BASE+FTSMC020_BANK0_CR) + li $r1, (FTSMC020_BANK1_CONFIG)! 0x1052 + swi $r1, [$r0] + li $r1, (FTSMC020_BANK1_TIMING)! 0x00151151 + swi $r1, [$r0+FTSMC020_BANK0_TPR] + + /* +* config AHB Controller +*/ + li $r0, (CONFIG_FTAHBC020S_BASE + FTAHBC020S_SLAVE_BSR_6) + li $r1, (CONFIG_SYS_FTAHBC020S_SLAVE_BSR_6) + swi $r1, [$r0] + + /* +* config PMU +*/ + li $r0, (CONFIG_FTPMU010_BASE + FTPMU010_PDLLCR0) + lwi $r1, [$r0] + ! ftpmu010_dlldis_disable, must do it in lowleve_init + li $r2, FTPMU010_PDLLCR0_DLLDIS! 0x0001 + or $r1, $r1, $r2 + swi $r1, [$r0] + + /* +* config SDRAM controller +*/ + li $r0, (CONFIG_FTSDMC021_BASE) + li $r1, (CONFIG_SYS_FTSDMC021_TP1) ! 0x00011312 + swi $r1, [$r0] + li $r1, (CONFIG_SYS_FTSDMC021_TP2) ! 0x00480180 + swi $r1, [$r0+FTSDMC021_OFFSET_TP2] + li $r1, (CONFIG_SYS_FTSDMC021_CR1) ! 0x2326 + swi $r1, [$r0+FTSDMC021_OFFSET_CR1] + li $r1, (FTSDMC021_CR2_IPREC) ! 0x0010 + swi $r1, [$r0+FTSDMC021_OFFSET_CR2] +1: + lwi $r1, [$r0+FTSDMC021_OFFSET_CR2] + andi$r1, $r1, (CONFIG_SYS_FTSDMC021_CR2)! 0x1C + bnez$r1, 1b + + li $r1, (FTSDMC021_CR2_ISMR) ! 0x0004 + swi $r1, [$r0+FTSDMC021_OFFSET_CR2] +2: + lwi $r1, [$r0+FTSDMC021_OFFSET_CR2] + bnez$r1, 2b + + li $r1, (FTSDMC021_CR2_IREF) ! 0x0008 + swi $r1, [$r0+FTSDMC021_OFFSET_CR2] +3: + lwi $r1, [$r0+FTSDMC021_OFFSET_CR2] + bnez$r1, 3b + + move$lp, $r11 + ret + +remap: + move$r11, $lp +#ifdef __NDS32_N1213_43U1H__ /* AG101 */ + bal 2f +relo_base: + move$r0, $lp +#else +relo_base: + mfusr $r0, $pc +#endif + + /* +* relocation, copy ROM code to SDRAM (current at 0x1000) +*/ + li $r4,
[U-Boot] [PATCH v9 06/10] nds32/ag101: cpu and init funcs of SoC ag101
Add main function of SoC ag101 based on NDS32 n1213 core. cpu.c According to the bootstrap procedure in n1213 Core, to turn off watchdog timer is suggested after the cpu is in superuser mdoe. 1. bootstrap 1.1 reset - start of Andesboot 1.2 to superuser mode - as is when reset 1.3 Turn off watchdog timer If you take look into the start.S in n1213, you will find that system will turn off watchdog after start.S has been retunred from lowlevel_init. Since the watchdog device is depends on the SoC is choosed. It should be belonged to the SoC (ag101) folder. watchdog.S: If you've ran another bootloader before u-boot was started the watchdog might have been enabled already. Signed-off-by: Macpaul Lin macp...@andestech.com Changes for v1-v4: - Code clean up. Changes for v5-v6: - Split watchdog.S from lowlevel_init.S. - Fix hardware reset by using watchdog reset in do_reset() in cpu.c. - reset_cpu was remove inside do_reset(). Changes for v7: - clean up. Changes for v8-v9: - No change. --- arch/nds32/cpu/n1213/ag101/Makefile | 58 + arch/nds32/cpu/n1213/ag101/cpu.c | 207 + arch/nds32/cpu/n1213/ag101/timer.c| 204 arch/nds32/cpu/n1213/ag101/watchdog.S | 48 4 files changed, 517 insertions(+), 0 deletions(-) create mode 100644 arch/nds32/cpu/n1213/ag101/Makefile create mode 100644 arch/nds32/cpu/n1213/ag101/cpu.c create mode 100644 arch/nds32/cpu/n1213/ag101/timer.c create mode 100644 arch/nds32/cpu/n1213/ag101/watchdog.S diff --git a/arch/nds32/cpu/n1213/ag101/Makefile b/arch/nds32/cpu/n1213/ag101/Makefile new file mode 100644 index 000..e96b1e4 --- /dev/null +++ b/arch/nds32/cpu/n1213/ag101/Makefile @@ -0,0 +1,58 @@ +# +# (C) Copyright 2009 +# Marvell Semiconductor www.marvell.com +# Written-by: Prafulla Wadaskar prafu...@marvell.com +# +# Copyright (C) 2011 Andes Technology Corporation +# Shawn Lin, Andes Technology Corporation nobuh...@andestech.com +# Macpaul Lin, Andes Technology Corporation macp...@andestech.com +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, +# MA 02110-1301 USA +# + +include $(TOPDIR)/config.mk + +LIB= $(obj)lib$(SOC).o + +COBJS-y:= cpu.o timer.o + +ifndef CONFIG_SKIP_LOWLEVEL_INIT +SOBJS := lowlevel_init.o +endif + +ifndef CONFIG_SKIP_TRUNOFF_WATCHDOG +SOBJS += watchdog.o +endif + +SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c) +OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS-y)) + +all: $(obj).depend $(LIB) + +$(LIB):$(OBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) + +# + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +# diff --git a/arch/nds32/cpu/n1213/ag101/cpu.c b/arch/nds32/cpu/n1213/ag101/cpu.c new file mode 100644 index 000..8e7eb0a --- /dev/null +++ b/arch/nds32/cpu/n1213/ag101/cpu.c @@ -0,0 +1,207 @@ +/* + * (C) Copyright 2002 + * Sysgo Real-Time Solutions, GmbH www.elinos.com + * Marius Groeger mgroe...@sysgo.de + * + * (C) Copyright 2002 + * Gary Jennejohn, DENX Software Engineering, g...@denx.de + * + * Copyright (C) 2011 Andes Technology Corporation + * Shawn Lin, Andes Technology Corporation nobuh...@andestech.com + * Macpaul Lin, Andes Technology Corporation macp...@andestech.com + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +/* CPU specific code */ +#include
[U-Boot] [PATCH v9 07/10] nds32/lib: add generic funcs in NDS32 lib
Add Makefile, board.c, interrupts.c and bootm.c functions to nds32 architecture. Signed-off-by: Macpaul Lin macp...@andestech.com Changes for v1-v4: - code clean up and formatting style. Changes for v5-v6: - board.c - Do some clean up and add code - Remove display banner which hasn't support. - Add ftpmu010 related power management unit code. - Remove useless LED related code. - Move SDRAM init to board sepecific files. (ex. adp-ag101.c) - Remove CONFIG_SOFT_I2C which hasn't been support. - Remove CONFIG_FSL_ESDHC which hasn't been support. - clean up. Changes for v7: - clean up. - move single file patch arch/nds32/config.mk to this commit. - interrupts.c refine origin interrupt enable and disable. Changes for v8: - interrups.c: fix up for new ptraces.h. Changes for v9: - support CONFIG_STANDALONE_LOAD_ADDR in config.mk Signed-off-by: Macpaul Lin macp...@andestech.com --- arch/nds32/config.mk| 35 + arch/nds32/lib/Makefile | 52 +++ arch/nds32/lib/board.c | 346 +++ arch/nds32/lib/bootm.c | 241 ++ arch/nds32/lib/interrupts.c | 131 5 files changed, 805 insertions(+), 0 deletions(-) create mode 100644 arch/nds32/config.mk create mode 100644 arch/nds32/lib/Makefile create mode 100644 arch/nds32/lib/board.c create mode 100644 arch/nds32/lib/bootm.c create mode 100644 arch/nds32/lib/interrupts.c diff --git a/arch/nds32/config.mk b/arch/nds32/config.mk new file mode 100644 index 000..3df2963 --- /dev/null +++ b/arch/nds32/config.mk @@ -0,0 +1,35 @@ +# +# (C) Copyright 2000-2002 +# Wolfgang Denk, DENX Software Engineering, w...@denx.de. +# +# (C) Copyright 2011 +# Shawn Lin, Andes Technology Corporation nobuh...@andestech.com +# Macpaul Lin, Andes Technology Corporation macp...@andestech.com +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA + +CROSS_COMPILE ?= nds32le-linux- + +CONFIG_STANDALONE_LOAD_ADDR = 0x30 -T nds32.lds + +PLATFORM_RELFLAGS += -fno-strict-aliasing -fno-common +PLATFORM_RELFLAGS += -gdwarf-2 +PLATFORM_CPPFLAGS += -DCONFIG_NDS32 -D__nds32__ -G0 -ffixed-8 + +LDSCRIPT := $(SRCTREE)/$(CPUDIR)/u-boot.lds diff --git a/arch/nds32/lib/Makefile b/arch/nds32/lib/Makefile new file mode 100644 index 000..eca4324 --- /dev/null +++ b/arch/nds32/lib/Makefile @@ -0,0 +1,52 @@ +# +# (C) Copyright 2000-2006 +# Wolfgang Denk, DENX Software Engineering, w...@denx.de. +# +# Copyright (C) 2011 Andes Technology Corporation +# Shawn Lin, Andes Technology Corporation nobuh...@andestech.com +# Macpaul Lin, Andes Technology Corporation macp...@andestech.com +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB= $(obj)lib$(ARCH).o + +OBJS := board.o bootm.o interrupts.o + +all: $(LIB) + +$(LIB):$(OBJS) $(SOBJS) + $(AR) crv $@ $^ + +clean: + rm -f $(SOBJS) $(OBJS) + +distclean: clean + rm -f $(LIB) core *.bak .depend + +# + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +# diff --git a/arch/nds32/lib/board.c b/arch/nds32/lib/board.c new file mode 100644 index 000..6ed4194 --- /dev/null +++ b/arch/nds32/lib/board.c @@ -0,0 +1,346 @@ +/* + * (C) Copyright 2002-2006 + * Wolfgang Denk, DENX Software
[U-Boot] [PATCH v9 08/10] nds32: standalone support
Add standalone program related support for nds32 architecture.
Signed-off-by: Macpaul Lin macp...@andestech.com
Changes for v1-v6:
- code clean up.
Changes for v7-v9:
- No change.
---
examples/standalone/nds32.lds | 64 +
examples/standalone/stubs.c | 17 +-
examples/standalone/x86-testapp.c | 12 +++
3 files changed, 92 insertions(+), 1 deletions(-)
create mode 100644 examples/standalone/nds32.lds
diff --git a/examples/standalone/nds32.lds b/examples/standalone/nds32.lds
new file mode 100644
index 000..c2ac107
--- /dev/null
+++ b/examples/standalone/nds32.lds
@@ -0,0 +1,64 @@
+/*
+ * Copyright (C) 2011 Andes Technology Corporation
+ * Shawn Lin, Andes Technology Corporation nobuh...@andestech.com
+ * Macpaul Lin, Andes Technology Corporation macp...@andestech.com
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+OUTPUT_FORMAT(elf32-nds32, elf32-nds32, elf32-nds32)
+OUTPUT_ARCH(nds32)
+ENTRY(_start)
+SECTIONS
+{
+ . = 0x;
+
+ . = ALIGN(4);
+ .text :
+ {
+ *(.text)
+ }
+
+ . = ALIGN(4);
+ .data : { *(.data) }
+
+ . = ALIGN(4);
+ .data : { *(.data) }
+
+ . = ALIGN(4);
+
+ .got : {
+ __got_start = .;
+ *(.got)
+ __got_end = .;
+ }
+
+ . = ALIGN(4);
+ __bss_start = .;
+ .bss : { *(.bss) }
+ __bss_end = .;
+
+ . = ALIGN(4);
+ .rela.text : { *(.rela.text .rela.text.* .rela.gnu.linkonce.t.*) }
+
+ _end = .;
+
+ . = 0x0200;
+ .u_boot_ohci_data_st : { *(.u_boot_ohci_data_st) }
+}
diff --git a/examples/standalone/stubs.c b/examples/standalone/stubs.c
index 507d38c..11c7565 100644
--- a/examples/standalone/stubs.c
+++ b/examples/standalone/stubs.c
@@ -167,8 +167,23 @@ gd_t *global_data;
jmp %%g1\n \
nop\n \
: : i(offsetof(gd_t, jt)), i(XF_ ## x * sizeof(void *)) : g1 );
-
+#elif defined(CONFIG_NDS32)
+/*
+ * r16 holds the pointer to the global_data. gp is call clobbered.
+ * not support reduced register (16 GPR).
+ */
+#define EXPORT_FUNC(x) \
+ asm volatile ( \
+ .globl #x \n\
+#x :\n \
+ lwi $r16, [$gp + (%0)]\n \
+ lwi $r16, [$r16 + (%1)]\n \
+ jr $r16\n \
+ : : i(offsetof(gd_t, jt)), i(XF_ ## x * sizeof(void *)) : $r16);
#else
+/*addi$sp, $sp, -24\n\
+ br $r16\n \*/
+
#error stubs definition missing for this architecture
#endif
diff --git a/examples/standalone/x86-testapp.c
b/examples/standalone/x86-testapp.c
index e8603d9..a4ac6f8 100644
--- a/examples/standalone/x86-testapp.c
+++ b/examples/standalone/x86-testapp.c
@@ -52,6 +52,16 @@ asm volatile (
\
lw $25, %1($25)\n \
jr $25\n \
: : i(offsetof(xxx_t, pfunc)), i(XF_ ## x * sizeof(void *)) : t9);
+#elif defined(__nds32__)
+#define EXPORT_FUNC(x) \
+asm volatile ( \
+ .globl mon_ #x \n\
+mon_ #x :\n\
+ lwi $r16, [$gp + (%0)]\n \
+ lwi $r16, [$r16 + (%1)]\n \
+ jr $r16\n \
+ : : i(offsetof(xxx_t, pfunc)), i(XF_ ## x * sizeof(void *)) :
$r16);
+
#else
#error [No stub code for this arch]
#endif
@@ -72,6 +82,8 @@ int main(void)
register volatile xxx_t *pq asm(r8);
#elif defined(__mips__)
register volatile xxx_t *pq asm(k0);
+#elif defined(__nds32__)
+ register volatile xxx_t *pq asm($r16);
#endif
char buf[32];
--
1.7.3.5
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[U-Boot] [PATCH v9 09/10] nds32: common bdinfo, bootm, image support
Add support of NDS32 to common commands bdinfo, bootm, and image format.
Signed-off-by: Macpaul Lin macp...@andestech.com
Changes for v1-v6:
- Code clean up
Changes for v7-v9:
- No Change.
---
common/cmd_bdinfo.c | 28 +++-
common/cmd_bootm.c |2 ++
common/image.c |1 +
include/image.h |5 +
4 files changed, 35 insertions(+), 1 deletions(-)
diff --git a/common/cmd_bdinfo.c b/common/cmd_bdinfo.c
index 1d76ffa..cfa7de6 100644
--- a/common/cmd_bdinfo.c
+++ b/common/cmd_bdinfo.c
@@ -411,13 +411,39 @@ int do_bdinfo ( cmd_tbl_t *cmdtp, int flag, int argc,
char * const argv[])
return 0;
}
+#elif defined(CONFIG_NDS32)
+
+int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+{
+ int i;
+ bd_t *bd = gd-bd;
+
+ print_num(arch_number,bd-bi_arch_number);
+ print_num(env_t, (ulong)bd-bi_env);
+ print_num(boot_params,(ulong)bd-bi_boot_params);
+
+ for (i = 0; i CONFIG_NR_DRAM_BANKS; ++i) {
+ print_num(DRAM bank, i);
+ print_num(- start, bd-bi_dram[i].start);
+ print_num(- size,bd-bi_dram[i].size);
+ }
+
+#if defined(CONFIG_CMD_NET)
+ print_eth(0);
+ printf(ip_addr = %pI4\n, bd-bi_ip_addr);
+#endif
+ printf(baudrate= %d bps\n, bd-bi_baudrate);
+
+ return 0;
+}
+
#else
#error a case for this architecture does not exist!
#endif
static void print_num(const char *name, ulong value)
{
- printf (%-12s= 0x%08lX\n, name, value);
+ printf(%-12s= 0x%08lX\n, name, value);
}
#if !(defined(CONFIG_ARM) || defined(CONFIG_M68K)) || defined(CONFIG_CMD_NET)
diff --git a/common/cmd_bootm.c b/common/cmd_bootm.c
index 1966da4..79b9031 100644
--- a/common/cmd_bootm.c
+++ b/common/cmd_bootm.c
@@ -187,6 +187,8 @@ void arch_preboot_os(void) __attribute__((weak,
alias(__arch_preboot_os)));
#define IH_INITRD_ARCH IH_ARCH_SH
#elif defined(__sparc__)
#define IH_INITRD_ARCH IH_ARCH_SPARC
+#elif defined(__nds32__)
+ #define IH_INITRD_ARCH IH_ARCH_NDS32
#else
# error Unknown CPU type
#endif
diff --git a/common/image.c b/common/image.c
index e542a57..dac17c0 100644
--- a/common/image.c
+++ b/common/image.c
@@ -93,6 +93,7 @@ static const table_entry_t uimage_arch[] = {
{ IH_ARCH_SPARC64,sparc64, SPARC 64 Bit, },
{ IH_ARCH_BLACKFIN, blackfin, Blackfin, },
{ IH_ARCH_AVR32, avr32,AVR32,},
+ { IH_ARCH_NDS32, nds32,NDS32,},
{ -1, , , },
};
diff --git a/include/image.h b/include/image.h
index c31e862..5a619bc 100644
--- a/include/image.h
+++ b/include/image.h
@@ -106,6 +106,7 @@
#define IH_ARCH_BLACKFIN 16 /* Blackfin */
#define IH_ARCH_AVR32 17 /* AVR32*/
#define IH_ARCH_ST200 18 /* STMicroelectronics ST200 */
+#define IH_ARCH_NDS32 19 /* ANDES Technology - NDS32 */
/*
* Image Types
@@ -504,6 +505,8 @@ static inline int image_check_target_arch (const
image_header_t *hdr)
if (!image_check_arch (hdr, IH_ARCH_SH))
#elif defined(__sparc__)
if (!image_check_arch (hdr, IH_ARCH_SPARC))
+#elif defined(__nds32__)
+ if (!image_check_arch(hdr, IH_ARCH_NDS32))
#else
# error Unknown CPU type
#endif
@@ -656,6 +659,8 @@ static inline int fit_image_check_target_arch (const void
*fdt, int node)
if (!fit_image_check_arch (fdt, node, IH_ARCH_SH))
#elif defined(__sparc__)
if (!fit_image_check_arch (fdt, node, IH_ARCH_SPARC))
+#elif defined(__nds32__)
+ if (!fit_image_check_arch(fdt, node, IH_ARCH_NDS32))
#else
# error Unknown CPU type
#endif
--
1.7.3.5
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[U-Boot] [PATCH v9 10/10] adp-ag101: add board adp-ag101 support
Add evaluation board adp-ag101 aconfiguration file adp-ag101.h.
Add adp-ag101.c board config and related settings.
Add board adp-ag101 into boards.cfg
Signed-off-by: Macpaul Lin macp...@andestech.com
Changes for v1-v4:
- code clean up
Changes for v5-v6:
- Refine the definitions and parameters about CLK,
AHB controller, SDRAM controller, Static memory controllers.
- Add APB_CLK, AHB_CLK, SYS_CLK definitions for backward compatible.
- ftahbc010:
- Update include path of ftahbc010.
- ftsdmc021:
- Update include path of ftsdmc021.
- ftsmc020:
- Update include path of ftsmc020.
- ftwdt010:
- Fix WDT define and update include path.
- Fix ftwdt010 for hardware reset.
- ftpmu010:
- Remove duplicate PMU definitions.
- Add related configurations.
- Fix MAX malloc len and fix saveenv.
- clean up.
Changes for v7:
- clean up.
- Move CONFIG_SYS_TEXT_BASE from board/config.mk.
- Fix Makefile and remove config.mk
Changes for v8:
- No change.
Changes for v9:
- Fix because other boards has been added into boards.cfg and
broken this patch.
---
MAINTAINERS | 11 +
MAKEALL |6 +
board/AndesTech/adp-ag101/Makefile| 57 +
board/AndesTech/adp-ag101/adp-ag101.c | 81 +++
boards.cfg|1 +
include/configs/adp-ag101.h | 378 +
6 files changed, 534 insertions(+), 0 deletions(-)
create mode 100644 board/AndesTech/adp-ag101/Makefile
create mode 100644 board/AndesTech/adp-ag101/adp-ag101.c
create mode 100644 include/configs/adp-ag101.h
diff --git a/MAINTAINERS b/MAINTAINERS
index e2a4ba9..37194ad 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1138,5 +1138,16 @@ Chong Huang chu...@ucrobotics.com
bf525-ucr2 BF525
#
+# NDS32 Systems: #
+# #
+# Maintainer Name, Email Address #
+# Board CPU #
+#
+
+Macpaul Lin macp...@andestech.com
+
+ ADP-AG101 N1213 (AG101 SoC)
+
+#
# End of MAINTAINERS list #
#
diff --git a/MAKEALL b/MAKEALL
index c3df657..fd1c63e 100755
--- a/MAKEALL
+++ b/MAKEALL
@@ -612,6 +612,12 @@ LIST_sh=$(boards_by_arch sh)
LIST_sparc=$(boards_by_arch sparc)
+#
+## NDS32 Systems
+#
+
+LIST_nds32=$(boards_by_arch nds32)
+
#---
build_target() {
diff --git a/board/AndesTech/adp-ag101/Makefile
b/board/AndesTech/adp-ag101/Makefile
new file mode 100644
index 000..5a403b1
--- /dev/null
+++ b/board/AndesTech/adp-ag101/Makefile
@@ -0,0 +1,57 @@
+#
+# Copyright (C) 2011 Andes Technology Corporation
+# Shawn Lin, Andes Technology Corporation nobuh...@andestech.com
+# Macpaul Lin, Andes Technology Corporation macp...@andestech.com
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB= $(obj)lib$(BOARD).o
+
+COBJS := adp-ag101.o
+
+SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS := $(addprefix $(obj),$(COBJS))
+SOBJS := $(addprefix $(obj),$(SOBJS))
+
+$(LIB):$(obj).depend $(OBJS) $(SOBJS)
+ $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
+
+clean:
+ rm -f $(SOBJS) $(OBJS)
+
+distclean: clean
+ rm -f $(LIB) core *.bak $(obj).depend
+
+ifdef CONFIG_SYS_LDSCRIPT
+LDSCRIPT := $(subst ,,$(CONFIG_SYS_LDSCRIPT))
+else
+LDSCRIPT := $(SRCTREE)/arch/$(ARCH)/cpu/$(CPU)/u-boot.lds
+endif
+
+#
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
Re: [U-Boot] ttyO2 and ttyS2 in console bootcmd.
On 5/1/2011 7:16 PM, Chris Rodley wrote: Hi, How does uboot specify whether it accepts ttySO or ttyS2 in the console part of the boot cmd. I am trying to boot the 2.6.39 kernel .. my new uboot works with 2.6.32 using ttyS2. It does not work with the new 2.6.39, but I can get that to boot by compiling uboot for the BeagleBoard and using ttySO. I have spent a lot of time looking at the differences in the code and have not been able to work out what it is that needs to be changed on my custom uboot to make it work. Any ideas? From the u-boot command prompt, first display the env variable console with the printenv command. It is probably currently set to ttyS2,115200n8. Use setenv to change console to ttyO2,115200n8, then save it with saveenv. Here is how it should look: Overo # printenv console console=ttyS2,115200n8 Overo # setenv console ttyO2,115200n8 iRobot # saveenv Saving Environment to NAND... Erasing Nand... Erasing at 0x24 -- 100% complete. Writing to Nand... done Overo # Thanks, CJ ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] boot-up time optimization. Where to start?
Dear Wolfgang,
Am Mittwoch, 27. April 2011, 21:08:50 schrieb Wolfgang Denk:
In message 201104271759.11818.alexander.st...@systec-electronic.com you
wrote:
Setting stdin, stdout and stderr takes a lot of time (IIRC ~500ms). Which
IMO is useless on a bootloader without LCD support.
Statements like this are completely worhtless if you don;t tell
exactly on which architecture and board, and with which exact version
of U-Boot such numbers have been measured.
Ok, let me be more precise on this.
We used U-Boot v2010.09 on a custom board running on an I.MX35 (ARM1136).
We noticed the following code snippet took relatively long.
From common/console.c in console_init_r(void):
/* Setting environment variables */
for (i = 0; i 3; i++) {
setenv(stdio_names[i], stdio_devices[i]-name);
}
We added PIN toggling around this part of code and measured something 100ms.
A collegue said it was ~100ms, I remembered ~500ms. Dunno who is right.
Regards,
Alexander
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Re: [U-Boot] [PATCH] powerpc/corenet_ds: Change CONFIG_SYS_DCSRBAR_PHYS
On May 2, 2011, at 7:59 AM, Trübenbach, Ralf wrote: This patch changes DCSR's 36 bit physical address from F__ to F_F000_. Most 36bit physical addresses (except SDRAM/PCI MEM...) are at F__ + 32BIT_ADDR. To be consistent we should change CONFIG_SYS_DCSRBAR_PHYS. Tested at P4080_DS eval board. Signed-off-by: Ralf Trübenbach ralf.truebenb...@men.de Cc: Kumar Gala kumar.g...@freescale.com Cc: Andy Fleming aflem...@gmail.com --- NAK. I see no reason to change the physical memory map. - k ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] sntp: fix problems at setting RTC at multi-bus I2C systems
Setting the RTC via SNTP did not work if the current I2C bus no. is different from the bus no. the RTC is connected to. Signed-off-by: Ralf Trübenbach ralf.truebenb...@men.de --- I don't like that I have to include the I2C things into sntp.c. But changing the rtc_set() function in 20 RTC drivers I don't like, too. diff --git a/net/sntp.c b/net/sntp.c index 76c10ec..7eee0db 100644 --- a/net/sntp.c +++ b/net/sntp.c @@ -9,6 +9,9 @@ #include command.h #include net.h #include rtc.h +#if defined(CONFIG_CMD_DATE) +#include i2c.h +#endif #include sntp.h @@ -53,20 +56,30 @@ struct sntp_pkt_t *rpktp = (struct sntp_pkt_t *)pkt; struct rtc_time tm; ulong seconds; +#if defined(CONFIG_CMD_DATE) + int old_bus; +#endif debug(%s\n, __func__); if (dest != SntpOurPort) return; /* -* As the RTC's used in U-Boot sepport second resolution only +* As the RTC's used in U-Boot support second resolution only * we simply ignore the sub-second field. */ memcpy (seconds, rpktp-transmit_timestamp, sizeof(ulong)); to_tm(ntohl(seconds) - 2208988800UL + NetTimeOffset, tm); #if defined(CONFIG_CMD_DATE) + /* switch to correct I2C bus */ + old_bus = I2C_GET_BUS(); + I2C_SET_BUS(CONFIG_SYS_RTC_BUS_NUM); + rtc_set (tm); + + /* switch back to original I2C bus */ + I2C_SET_BUS(old_bus); #endif printf (Date: %4d-%02d-%02d Time: %2d:%02d:%02d\n, tm.tm_year, tm.tm_mon, tm.tm_mday, -- Best Regards/Mit freundlichen Gruessen Ralf Trübenbach Ralf Trübenbach, Software Design MEN Mikro Elektronik GmbH Neuwieder Straße 5-7 90411 Nürnberg, Germany Phone +49-911-99 33 5-0 Fax +49-911-99 33 5-910 ralf.truebenb...@men.de www.men.de MEN Mikro Elektronik GmbH - Manfred Schmitz (CTO), Udo Fuchs (CFO) - Handelsregister/Trade Register AG Nürnberg HRB 5540 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [GIT PULL] Pull request u-boot-mpc85xx.git
On Apr 30, 2011, at 4:03 PM, Wolfgang Denk wrote: Dear Kumar Gala, In message alpine.lfd.2.00.1104291544410.28...@right.am.freescale.net you wrote: The following changes since commit a000b7950da938d2df37ec5e081cd0680e6e4bbe: ... Trübenbach, Ralf (1): powerpc/85xx: Fix Wrong PCIe 3 virtual address on corenet_ds platforms It appears you are changing the commit messages without notice? The posted subject was: QorIQ corenet_ds.h: Wrong PCIe 3 virtual address Please don't - this makes it very difficult to match your commits to postings on the ML. 51 files changed, 1252 insertions(+), 128 deletions(-) Applied. Best regards, Wolfgang Denk I thought that was less of an issue because of our use of patchworks. - k ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v9 05/10] nds32/ag101: lowlevel_init.S of ag101
Dear Macpaul Lin, In message 1304342712-17120-5-git-send-email-macp...@andestech.com you wrote: lowlevel_init.S is a peripheral initial procedure of ag101. It configures onboard dram, clock, and power settings. It also prepars the dram environment before moving u-boot from rom and flash into dram. This version of lowlevel_init.S also replace hardcode value by MARCO defines from the GPL version andesboot for better code quality. Signed-off-by: Macpaul Lin macp...@andestech.com Changes from v1-v4: - Code clean up and formatting style. Changes from v5-v6 - Change hard code value into MARCO definitions. - ftsmc010 - Fix FTSMC020_TPR_AT2 from 1 to 3 (0xff3ff) - ftsdmc021 - Fix hardcoded address of CR1, CR2, TR1, TR2, BANK0 registers. - Fix the default configuration value of FTSDMC and FTSMC controller. - Remove some ftpmu010 and flash probe code to C functions. Changes for v7-v9: - No change. --- Patch changelog belongs _below_ the --- line, not above. arch/nds32/cpu/n1213/ag101/lowlevel_init.S | 160 1 files changed, 160 insertions(+), 0 deletions(-) create mode 100644 arch/nds32/cpu/n1213/ag101/lowlevel_init.S This file alone makes no sense. Pluease submit as a single commit together with the other board code. ... + /* + * relocation, copy ROM code to SDRAM (current at 0x1000) + */ + li $r4, CONFIG_SYS_RELO_ADDR ! 0x1000 + li $r5, 0x0 + la $r1, relo_base + sub $r2, $r0, $r1 + sethi $r6, hi20(andesboot_end) + ori $r6, $r6, lo12(andesboot_end) + add $r6, $r6, $r2 +1: + lwi $r7, [$r5] + swi $r7, [$r4] + addi$r5, $r5, #4 + addi$r4, $r4, #4 + blt $r5, $r6, 1b You are using non-standard and completely undocumented CONFIG option here, CONFIG_SYS_RELO_ADDR. Please don't. I think when adding new architecture support we should avaid errors done with other architectures in the past (see ARM, MIPS, ...). Please implement proper relocation to a dynamically determined address at the upper end of RAM. Keep in mind that the intention is to have only a single lib/board.c isnatead of a collection of slightly different arch-specific arch/*/board.c versions. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de In an organization, each person rises to the level of his own incom- petency - The Peter Principle ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] boot-up time optimization. Where to start?
Hi Alexander,
Dear Wolfgang,
Am Mittwoch, 27. April 2011, 21:08:50 schrieb Wolfgang Denk:
In message 201104271759.11818.alexander.st...@systec-electronic.com you
wrote:
Setting stdin, stdout and stderr takes a lot of time (IIRC ~500ms). Which
IMO is useless on a bootloader without LCD support.
Statements like this are completely worhtless if you don;t tell
exactly on which architecture and board, and with which exact version
of U-Boot such numbers have been measured.
Ok, let me be more precise on this.
We used U-Boot v2010.09 on a custom board running on an I.MX35 (ARM1136).
We noticed the following code snippet took relatively long.
From common/console.c in console_init_r(void):
/* Setting environment variables */
for (i = 0; i 3; i++) {
setenv(stdio_names[i], stdio_devices[i]-name);
}
We added PIN toggling around this part of code and measured something 100ms.
A collegue said it was ~100ms, I remembered ~500ms. Dunno who is right.
It doesn't really matter who is right - 100ms is way off for setting
these variables. Looking into common/cmd_nvedit.c, these variables have
a special handling and there are ifdef's involved, so its not
straightforward to read. You should really find out, where in there the
time is spent for your board and fix the problem ;)
Cheers
Detlev
--
I can understand that things like user-level libraries have to take crazy people
into account, but the kernel internal libraries definitely do not.
-- Linus Torvalds
--
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HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-40 Fax: (+49)-8142-66989-80 Email: d...@denx.de
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Re: [U-Boot] [PATCH v9 10/10] adp-ag101: add board adp-ag101 support
Dear Macpaul Lin,
In message 1304342712-17120-10-git-send-email-macp...@andestech.com you wrote:
Add evaluation board adp-ag101 aconfiguration file adp-ag101.h.
Add adp-ag101.c board config and related settings.
Add board adp-ag101 into boards.cfg
...
+ if (expected_size != actual_size)
+ printf(Warning: Only %lu of %lu MiB SDRAM is working\n,
+ actual_size 20, expected_size 20);
Please use braces around multi-line statements.
+ if (banknum == 0) { /* non-CFI boot flash */
+ info-portwidth = FLASH_CFI_8BIT;
+ info-chipwidth = FLASH_CFI_BY8;
+ info-interface = FLASH_CFI_X8;
+ return 1;
+ } else
+ return 0;
Use braces in both branches.
...
+#define CONFIG_SYS_NS16550_COM1 CONFIG_FTUART010_02_BASE /*
0x9960 */
Line too long. Please fix globally.
...
+#define CONFIG_SYS_FTAHBC020S_SLAVE_BSR_6
(FTAHBC020S_SLAVE_BSR_BASE(CONFIG_SYS_FTAHBC020S_SLAVE_BSR_BASE) | \
+
FTAHBC020S_SLAVE_BSR_SIZE(FTAHBC020S_SLAVE_BSR_SIZE_2G))
Ditto.
+/* memtest works on 63 MB in DRAM */
+#define CONFIG_SYS_MEMTEST_START 0x
+#define CONFIG_SYS_MEMTEST_END 0x0020
Comments and code are not in sync.
+/* relocation parameters */
+#define CONFIG_SYS_RELO_ADDR 0x1000
This should go, too. See previous message.
Best regards,
Wolfgang Denk
--
DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de
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equivalent to a gang bent on destruction. - John Cage, composer
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Re: [U-Boot] [PATCH] spi: Tegra2: Add SPI driver for SPIFLASH on Seaboard
Mike,
On Fri, Apr 29, 2011 at 4:21 PM, Mike Frysinger vap...@gentoo.org wrote:
On Thursday, April 28, 2011 10:55:13 Tom Warren wrote:
Signed-off-by: Tom Warren twar...@nvidia.com
---
This patch adds support for the SPIFLASH peripheral on Tegra2 (SPI 1).
Probe, erase, read and write are all supported, as well as low-level
SPI commands via 'sspi'.
Note that, at this time, only Seaboard has a SPI flash part (Winbond).
With this code, I've written U-Boot to SPI from within U-Boot, and
booted the system from that SPI image (boot sel jumpers must be set
to SPI [1000], and the UART ENABLE jumper must be set to GPIO CTRL).
so this is a driver for a SPI bus, and the board you're working on just
happens to have some SPI flashes connected to it ? then the SPIFLASH part
is irrelevant, as is the board in question. please remove references to both
and just refer to this as a SPI driver for Tegra2 processors.
No, there are 4 general purpose SPI interfaces in Tegra2 (SLINK), and
1 dedicated SPI FLASH controller. From the Tegra2 TRM:
The Serial Flash interface (SFLASH) Controller interfaces Tegra 2 to
SPI-capable devices such as Flash
memories and ADC/DAC devices. Tegra 2 supports only master mode of SPI
operation on this interface.
This interface is specifically intended for serial flash and similar
devices. For a general purpose SPI
interface, use the SLINK serial interface.
The register sets are similar, but not identical.
As to the board reference, it's in my comments so people wishing to
use this will know that only Seaboard is available w/a SPI chip -
there's no provision for that on the Harmony board.
--- /dev/null
+++ b/arch/arm/include/asm/arch-tegra2/tegra2_spi.h
if the only thing that uses this is the spi driver, then please put this in
drivers/spi/tegra2_spi.h
Will do.
+#define SPI_CMD_GO (1 30)
dont put a tab after the #define
OK. I'll fix 'em up.
--- a/arch/arm/lib/board.c
+++ b/arch/arm/lib/board.c
this change needs to be split out into a dedicated one
-
this new line should not be deleted
+#if defined(CONFIG_CMD_SPI)
+#include spi.h
+#endif
no need to protect the inclusion. just always include it.
OK.
#endif
-
#if defined(CONFIG_CMD_NAND)
nor should this newline be deleted
puts (NAND: );
nand_init(); /* go init the NAND */
#endif
-
+#if defined(CONFIG_CMD_SPI)
nor this newline
I'm going to remove these changes from arm/lib/board.c and move
spi_init() to our common board file (nvidia/common/board.c.
+int spi_claim_bus(struct spi_slave *slave)
+{
+ /* Move bulk of spi_init code here? */
yes, so do that
OK, I'll look into that.
+void spi_release_bus(struct spi_slave *slave)
+{
this func should be disabling the spi bus
OK, I'll look into that, too.
+void spi_cs_activate(struct spi_slave *slave)
+{
+ struct pmux_tri_ctlr *pmt = (struct pmux_tri_ctlr
*)NV_PA_APB_MISC_BASE;
+ struct spi_tegra *spi = (struct spi_tegra *)TEGRA2_SPI_BASE;
+ u32 val;
+
+ /*
+ * Delay here to clean up comms - spurious chars seen around SPI xfers.
+ * Fine-tune later.
+ */
+ udelay(1000);
fine tune now ?
The comment went in during development, and the 1000 values is the
final fine-tuned value (1ms). So I'll change the comment.
+ /*
+ * On Seaboard, MOSI/MISO are shared w/UART.
+ * Use GPIO I3 (UART_DISABLE) to tristate UART during SPI activity.
+ * Enable UART later (cs_deactivate) so we can use it for U-Boot comms.
+ */
+ gpio_direction_output(UART_DISABLE_GPIO, 1);
board specific issues shouldnt be in a processor driver.
Please explain what you mean by a processor driver. This does need an
ifdef, so any future board that doesn't have Seaboard's defiency of a
muxed SPIFLASH/UART won't have to mess with a GPIO, but for Seaboard,
we have to dynamically change GPIO_PI3 every SPI transaction to ensure
UART spew can continue (in DEBUG builds, etc.).
+ int numBytes = (bitlen + 7) / 8;
no camel case. use num_bytes.
Sure, will do. This came over from the driver I ported from.
+ for (i = 0; i bytes; ++i) {
+ ((u8 *)din)[i] = (tmpdin
24);
create a dedicated pointer and deference that. casts on the lhs are poor
style.
Again, this was in the driver source I used as a porting reference.
I'll change it.
--- a/include/configs/seaboard.h
+++ b/include/configs/seaboard.h
this should be split out into a dedicated patch
OK.
Thanks,
Tom
-mike
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Re: [U-Boot] [PATCH] GPIO: Tegra2: add GPIO driver for Seaboard and Harmony
Mike, On Fri, Apr 29, 2011 at 4:22 PM, Mike Frysinger vap...@gentoo.org wrote: same as the SPI patch, if this is a driver for GPIO hardware on a processor, then it should be labeled as such. do not mention specific boards. OK. I'll change the comments. changes that update board config headers to enable the new driver should be split out into a dedicated patch. Will do. Thanks, Tom -mike ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v9 05/10] nds32/ag101: lowlevel_init.S of ag101
Hi Wolfgang, Patch changelog belongs _below_ the --- line, not above. Sorry for this mistaken, will fix in Patch v10 arch/nds32/cpu/n1213/ag101/lowlevel_init.S | 160 1 files changed, 160 insertions(+), 0 deletions(-) create mode 100644 arch/nds32/cpu/n1213/ag101/lowlevel_init.S This file alone makes no sense. Pluease submit as a single commit together with the other board code. The single file is intend to be reviewed and fix up easyly because I know there must be some problem of this lowlevel_init.S. I think this should go with the SoC. So I will merge it into ag101 SoC level related code. ... + /* + * relocation, copy ROM code to SDRAM (current at 0x1000) + */ + li $r4, CONFIG_SYS_RELO_ADDR ! 0x1000 + li $r5, 0x0 + la $r1, relo_base + sub $r2, $r0, $r1 + sethi $r6, hi20(andesboot_end) + ori $r6, $r6, lo12(andesboot_end) + add $r6, $r6, $r2 +1: + lwi $r7, [$r5] + swi $r7, [$r4] + addi $r5, $r5, #4 + addi $r4, $r4, #4 + blt $r5, $r6, 1b You are using non-standard and completely undocumented CONFIG option here, CONFIG_SYS_RELO_ADDR. Please don't. I think when adding new architecture support we should avaid errors done with other architectures in the past (see ARM, MIPS, ...). Sure. Please implement proper relocation to a dynamically determined address at the upper end of RAM. Keep in mind that the intention is to have only a single lib/board.c isnatead of a collection of slightly different arch-specific arch/*/board.c versions. Best regards, Wolfgang Denk Will try to fix it soon. Thanks. -- Best regards, Macpaul Lin ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [GIT PULL] Pull request u-boot-mpc85xx.git
On Mon, May 2, 2011 at 10:00 AM, Kumar Gala ga...@kernel.crashing.org wrote: I thought that was less of an issue because of our use of patchworks. How? Patchwork uses the same subject line as the email. There's still the problem of trying to correlate the actual commit to the entry in patchwork. On the other hand, I don't know of any good way to correct a patch's subject line without having the patch re-submitted to the mailing list. -- Timur Tabi Linux kernel developer at Freescale ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] boot-up time optimization. Where to start?
Hi Detlev,
Am Montag, 2. Mai 2011, 17:31:15 schrieb Detlev Zundel:
Hi Alexander,
Dear Wolfgang,
Am Mittwoch, 27. April 2011, 21:08:50 schrieb Wolfgang Denk:
In message 201104271759.11818.alexander.st...@systec-electronic.com
you
wrote:
Setting stdin, stdout and stderr takes a lot of time (IIRC ~500ms).
Which IMO is useless on a bootloader without LCD support.
Statements like this are completely worhtless if you don;t tell
exactly on which architecture and board, and with which exact version
of U-Boot such numbers have been measured.
Ok, let me be more precise on this.
We used U-Boot v2010.09 on a custom board running on an I.MX35 (ARM1136).
We noticed the following code snippet took relatively long.
From common/console.c in console_init_r(void):
/* Setting environment variables */
for (i = 0; i 3; i++) {
setenv(stdio_names[i], stdio_devices[i]-name);
}
We added PIN toggling around this part of code and measured something
100ms. A collegue said it was ~100ms, I remembered ~500ms. Dunno who is
right.
It doesn't really matter who is right - 100ms is way off for setting
these variables. Looking into common/cmd_nvedit.c, these variables have
a special handling and there are ifdef's involved, so its not
straightforward to read. You should really find out, where in there the
time is spent for your board and fix the problem ;)
Our 'fix' was removing the stated lines at all.
Regards,
Alexander
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Re: [U-Boot] boot-up time optimization. Where to start?
Hi Alexander,
[...]
Ok, let me be more precise on this.
We used U-Boot v2010.09 on a custom board running on an I.MX35 (ARM1136).
We noticed the following code snippet took relatively long.
From common/console.c in console_init_r(void):
/* Setting environment variables */
for (i = 0; i 3; i++) {
setenv(stdio_names[i], stdio_devices[i]-name);
}
We added PIN toggling around this part of code and measured something
100ms. A collegue said it was ~100ms, I remembered ~500ms. Dunno who is
right.
It doesn't really matter who is right - 100ms is way off for setting
these variables. Looking into common/cmd_nvedit.c, these variables have
a special handling and there are ifdef's involved, so its not
straightforward to read. You should really find out, where in there the
time is spent for your board and fix the problem ;)
Our 'fix' was removing the stated lines at all.
That is not a fix but simply ignoring a problem. Maybe if you find out
why these lines have such an unexpected run-time, you will solve more
problems also.
We have a mantra here on the mailing list, so let me introduce you to
it:
Solve the problems one by one in the order that you encounter them.
Every ignored problem will come back later and catch you. Really, it
will.
Now repeat after me ;)
Cheers
Detlev
--
There is no need to be rigid in carrying out policies about what changes
to install. To do a good job of maintaining Emacs doesn't require acting
like government bureaucrats.
-- Richard Stallman e1mix3y-0005iz...@fencepost.gnu.org
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[U-Boot] [PATCH 2/2] powerpc/85xx: verify the device tree before booting Linux
Introduce ft_verify_fdt(), a function that is called after the device tree
has been fixed up, to display warning messages if there is a mismatch between
the physical addresses of some devices that U-Boot has configured with what
the device tree says the addresses are.
This is a particular problem if when booting a 36-bit device tree from a 32-bit
U-Boot (or vice versa), because the physical address of CCSR and the serial
devices are wrong in the device tree. When the operating system boots, no
messages are displayed, the so the user generally has no idea what's wrong.
Signed-off-by: Timur Tabi ti...@freescale.com
---
At Kumar's request, this patch replaces [v3] powerpc/85xx: introduce
'fdt verify' command. The PCI checking has been dropped, because Kumar wants
PCI addresses to be fixed up, not verified (TBD in a future patch). Also,
this code is now run on every boot via a weak function, rather than an 'fdt'
command. It never really made much sense to make this a command-line command,
because running fdt commands is clunky.
arch/powerpc/cpu/mpc85xx/fdt.c | 67
arch/powerpc/lib/bootm.c | 19 +++
2 files changed, 86 insertions(+), 0 deletions(-)
diff --git a/arch/powerpc/cpu/mpc85xx/fdt.c b/arch/powerpc/cpu/mpc85xx/fdt.c
index 6e909b5..841f32c 100644
--- a/arch/powerpc/cpu/mpc85xx/fdt.c
+++ b/arch/powerpc/cpu/mpc85xx/fdt.c
@@ -497,3 +497,70 @@ void ft_cpu_setup(void *blob, bd_t *bd)
do_fixup_by_compat_u32(blob, fsl,gianfar-ptp-timer,
timer-frequency, gd-bus_clk/2, 1);
}
+
+/*
+ * For some CCSR devices, we only have the virtual address, not the physical
+ * address. This is because we map CCSR as a whole, so we typically don't need
+ * a macro for the physical address of any device within CCSR. In this case,
+ * we calculate the physical address of that device using it's the difference
+ * between the virtual address of the device and the virtual address of the
+ * beginning of CCSR.
+ */
+#define CCSR_VIRT_TO_PHYS(x) \
+ (CONFIG_SYS_CCSRBAR_PHYS + ((x) - CONFIG_SYS_CCSRBAR))
+
+/*
+ * Verify the device tree
+ *
+ * This function compares several CONFIG_xxx macros that contain physical
+ * addresses with the corresponding nodes in the device tree, to see if
+ * the physical addresses are all correct. For example, if
+ * CONFIG_SYS_NS16550_COM1 is defined, then it contains the virtual address
+ * of the first UART. We convert this to a physical address and compare
+ * that with the physical address of the first ns16550-compatible node
+ * in the device tree. If they don't match, then we display a warning.
+ */
+void ft_verify_fdt(void *fdt)
+{
+ uint64_t ccsr = 0;
+ int aliases;
+ int off;
+
+ /* First check the CCSR base address */
+ off = fdt_node_offset_by_prop_value(fdt, -1, device_type, soc, 4);
+ if (off 0)
+ ccsr = fdt_get_base_address(fdt, off);
+
+ if (!ccsr) {
+ printf(Warning: could not determine base CCSR address in
+ device tree\n);
+ /* No point in checking anything else */
+ return;
+ }
+
+ if (ccsr != CONFIG_SYS_CCSRBAR_PHYS) {
+ printf(Warning: U-Boot configured CCSR at address %llx,\n
+ but the device tree has it at %llx\n,
+ (uint64_t) CONFIG_SYS_CCSRBAR_PHYS, ccsr);
+ /* No point in checking anything else */
+ return;
+ }
+
+ /*
+* Get the 'aliases' node. If there isn't one, then there's nothing
+* left to do.
+*/
+ aliases = fdt_path_offset(fdt, /aliases);
+ if (aliases 0) {
+#ifdef CONFIG_SYS_NS16550_COM1
+ fdt_verify_alias_address(fdt, aliases, serial0,
+ CCSR_VIRT_TO_PHYS(CONFIG_SYS_NS16550_COM1));
+#endif
+
+#ifdef CONFIG_SYS_NS16550_COM2
+ fdt_verify_alias_address(fdt, aliases, serial1,
+ CCSR_VIRT_TO_PHYS(CONFIG_SYS_NS16550_COM2));
+#endif
+ }
+
+}
diff --git a/arch/powerpc/lib/bootm.c b/arch/powerpc/lib/bootm.c
index e01787d..53b9b27 100644
--- a/arch/powerpc/lib/bootm.c
+++ b/arch/powerpc/lib/bootm.c
@@ -226,6 +226,23 @@ static int boot_bd_t_linux(bootm_headers_t *images)
return ret;
}
+/*
+ * Verify the device tree.
+ *
+ * This function is called after all device tree fix-ups have been enacted,
+ * so that the final device tree can be verified. The definition of verified
+ * is up to the specific implementation. However, it generally means that the
+ * addresses of some of the devices in the device tree are compared with the
+ * actual addresses at which U-Boot has placed them.
+ *
+ * The function should display warning messages for any problems it finds.
+ * U-Boot will still attempt to boot the operating system, however.
+ */
+static void __ft_verify_fdt(void *fdt)
+{
+}
+__attribute__((weak,
Re: [U-Boot] [PATCH v2] MPC837x: set i2c1_clk
On Thu, 14 Apr 2011 14:57:40 +0200 Andre Schwarz andre.schw...@matrix-vision.de wrote: Running on mpc837x without CONFIG_FSL_ESDHC leads to i2c1_clk not being set at all. It is bound to clock of encryption module. fix this. Signed-off-by: Andre Schwarz andre.schw...@matrix-vision.de --- Changes for v2: - fix commit message mangling in subject line. thanks for listing change matter, subsequent versions of patches should inherit prior versions In-reply-to: and References: headers. arch/powerpc/cpu/mpc83xx/speed.c |2 ++ 1 files changed, 2 insertions(+), 0 deletions(-) diff --git a/arch/powerpc/cpu/mpc83xx/speed.c b/arch/powerpc/cpu/mpc83xx/speed.c index 5e616dd..1eca1a8 100644 --- a/arch/powerpc/cpu/mpc83xx/speed.c +++ b/arch/powerpc/cpu/mpc83xx/speed.c @@ -327,6 +327,8 @@ int get_clocks(void) i2c1_clk = enc_clk; #elif defined(CONFIG_FSL_ESDHC) i2c1_clk = sdhc_clk; +#elif defined(CONFIG_MPC837x) + i2c1_clk = enc_clk; #endif can you consolidate this and the other i2c1_clk-to-enc_clk assignments in one #elif defined(...) || defined(...), etc. not sure if the FSL_ESDHC ifdef would need to be moved above that. btw, subjects in this patchseries should be of the form [PATCH x/y]. Thanks, Kim ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 1/2] fdt: introduce fdt_verify_alias_address() and fdt_get_base_address()
Introduce two functions, fdt_verify_alias_address() and fdt_get_base_address(),
which can be used to verify the physical address of a device in a device tree.
fdt_get_base_address() returns the base address of an SOC or PCI node.
fdt_verify_alias_address() prints a message if the address of a node specified
by an alias does not match the given physical address.
Signed-off-by: Timur Tabi ti...@freescale.com
---
common/fdt_support.c | 54 +
include/fdt_support.h |4 +++
2 files changed, 58 insertions(+), 0 deletions(-)
diff --git a/common/fdt_support.c b/common/fdt_support.c
index 496040b..4075ade 100644
--- a/common/fdt_support.c
+++ b/common/fdt_support.c
@@ -1223,3 +1223,57 @@ err_size:
return ret;
}
#endif
+
+/*
+ * Verify the physical address of device tree node for a given alias
+ *
+ * This function locates the device tree node of a given alias, and then
+ * verifies that the physical address of that device matches the given
+ * parameter. It displays a message if there is a mismatch.
+ */
+void fdt_verify_alias_address(void *fdt, int anode, const char *alias, u64
addr)
+{
+ const char *path;
+ const u32 *reg;
+ int node, len;
+ u64 dt_addr;
+
+ path = fdt_getprop(fdt, anode, alias, NULL);
+ if (!path)
+ return;
+
+ node = fdt_path_offset(fdt, path);
+ if (node 0)
+ return;
+
+ reg = fdt_getprop(fdt, node, reg, len);
+ if (!reg)
+ return;
+
+ dt_addr = fdt_translate_address(fdt, node, reg);
+ if (addr != dt_addr) {
+ printf(Warning: U-Boot configured device %s at address %llx,\n
+ but the device tree has it address %llx.\n,
+ alias, addr, dt_addr);
+ }
+}
+
+/*
+ * Returns the base address of an SOC or PCI node
+ */
+u64 fdt_get_base_address(void *fdt, int node)
+{
+ int size;
+ u32 naddr;
+ const u32 *prop;
+
+ prop = fdt_getprop(fdt, node, #address-cells, size);
+ if (prop size == 4)
+ naddr = *prop;
+ else
+ naddr = 2;
+
+ prop = fdt_getprop(fdt, node, ranges, size);
+
+ return prop ? fdt_translate_address(fdt, node, prop + naddr) : 0;
+}
diff --git a/include/fdt_support.h b/include/fdt_support.h
index ce6817b..3709615 100644
--- a/include/fdt_support.h
+++ b/include/fdt_support.h
@@ -90,5 +90,9 @@ int fdt_node_offset_by_compat_reg(void *blob, const char
*compat,
int fdt_alloc_phandle(void *blob);
int fdt_add_edid(void *blob, const char *compat, unsigned char *buf);
+void fdt_verify_alias_address(void *fdt, int anode, const char *alias,
+ u64 addr);
+u64 fdt_get_base_address(void *fdt, int node);
+
#endif /* ifdef CONFIG_OF_LIBFDT */
#endif /* ifndef __FDT_SUPPORT_H */
--
1.7.3.4
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Re: [U-Boot] [PATCH] mpc83xx fdt: do not adjust clock frequency of external UARTs
On Fri, 15 Apr 2011 14:30:33 +0200 David Müller d.muel...@elsoft.ch wrote: The current 83xx FDT implementation adjusts the clock frequency of all 16550 UARTs found in the device tree. This behaviour is ok for the UARTs which are part of the SoC, but wrong for any additional external UART. Signed-off-by: David Müller d.muel...@elsoft.ch --- arch/powerpc/cpu/mpc83xx/fdt.c | 27 +-- 1 files changed, 25 insertions(+), 2 deletions(-) (a) this is not an mpc83xx-specific issue (b) the fdt code here should instead be modified to only adjust clock properties on UART nodes contained within the SoC node, not the entire fdt. Any UARTs not a part of the SoC should get their clocks updated in board/ code (or, as in this case, set manually in the device tree). Kim ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v3 1/5] sf: disable write protection for Macronix flash
On Mon, May 2, 2011 at 05:38, Simon Guinot wrote:
--- a/drivers/mtd/spi/macronix.c
+++ b/drivers/mtd/spi/macronix.c
@@ -120,6 +120,45 @@
},
};
+static int macronix_write_status(struct spi_flash *flash, u8 sr)
+{
+ u8 cmd;
+ int ret;
+
+ ret = spi_flash_cmd(flash-spi, CMD_MX25XX_WREN, NULL, 0);
this is spi_flash_cmd_write_enable() now
-mike
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Re: [U-Boot] boot-up time optimization. Where to start?
Dear Alexander Stein,
In message 201105021640.27241.alexander.st...@systec-electronic.com you wrote:
Ok, let me be more precise on this.
We used U-Boot v2010.09 on a custom board running on an I.MX35 (ARM1136).
Let's summarize known facts:
1. You are talking about an out-of-tree port, i. e. code which is
completely unknown here, so it is basicly impossible to comment.
We can barely speculate.
2. This is an ARM board.
3. This is an old version before cache support for ARM was added.
We noticed the following code snippet took relatively long.
From common/console.c in console_init_r(void):
/* Setting environment variables */
for (i = 0; i 3; i++) {
setenv(stdio_names[i], stdio_devices[i]-name);
}
We added PIN toggling around this part of code and measured something 100ms.
A collegue said it was ~100ms, I remembered ~500ms. Dunno who is right.
Both numbers are way off.
Let me speculate: (I) you have a _huge_ environment allocated for your
board, probably 100 KiB or more; (II) you are loading it from a slow
storage device, probably NAND flash; (III) you are running on a narrow
system bus (16 bit) with non-optimal RAM timings; (IV) you do all this
with caches turned off; (V) you measure some numbers but you don;t
understand what they mean.
I bet some beer that at least 3 of these speculations hit the point.
Best regards,
Wolfgang Denk
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Re: [U-Boot] boot-up time optimization. Where to start?
Dear Alexander Stein, In message 201105021807.52142.alexander.st...@systec-electronic.com you wrote: Our 'fix' was removing the stated lines at all. Did you understand what you were doing? Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de You shouldn't make my toaster angry. - Household security explained in Johnny Quest ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [GIT PULL] Pull request u-boot-mpc85xx.git
Dear Tabi Timur-B04825, In message banlktimz0ifscmf9oo-q_9sv9wc0rqt...@mail.gmail.com you wrote: How? Patchwork uses the same subject line as the email. There's still the problem of trying to correlate the actual commit to the entry in patchwork. On the other hand, I don't know of any good way to correct a patch's subject line without having the patch re-submitted to the mailing list. It's possible to match a patch based on it's content. For example, you can use something like HASH=$(/home/wd/bin/pwparser.py --hash $MBOX) pwclient apply -h $HASH pwclient update -s 'Accepted' -h $HASH [error checking omitted here] to apply and update the status of a patch in PW. So you can of course find out which patch it was based on the hash, which depends on the content, not the subject. But this is way too expensive and time consuming for regular work. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de Q: Why do mountain climbers rope themselves together? A: To prevent the sensible ones from going home. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [GIT PULL] Pull request u-boot-mpc85xx.git
Dear Kumar Gala, In message 9bc90f9c-896b-47e9-b445-2692aad1f...@kernel.crashing.org you wrote: It appears you are changing the commit messages without notice? The posted subject was: QorIQ corenet_ds.h: Wrong PCIe 3 virtual address Please don't - this makes it very difficult to match your commits to postings on the ML. ... I thought that was less of an issue because of our use of patchworks. Think that thought to an end, please. It is counterproductive. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de The human mind ordinarily operates at only ten percent of its capaci- ty - the rest is overhead for the operating system. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] sntp: fix problems at setting RTC at multi-bus I2C systems
On Monday, May 02, 2011 10:57:11 Trübenbach, Ralf wrote: Setting the RTC via SNTP did not work if the current I2C bus no. is different from the bus no. the RTC is connected to. Signed-off-by: Ralf Trübenbach ralf.truebenb...@men.de --- I don't like that I have to include the I2C things into sntp.c. But changing the rtc_set() function in 20 RTC drivers I don't like, too. that would probably be the correct answer though. not all rtc devices are i2c, and binding i2c logic to the `date` command is wrong. looks like when Stefan added this logic to cmd_date.c, he did it incorrectly -mike signature.asc Description: This is a digitally signed message part. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] sntp: fix problems at setting RTC at multi-bus I2C systems
Dear =?iso-8859-1?Q?Tr=FCbenbach=2C_Ralf?=, In message b578782695ec1545a6e9231c72f8ed2b093...@men-ex2.intra.men.de you wrote: Setting the RTC via SNTP did not work if the current I2C bus no. is different from the bus no. the RTC is connected to. Signed-off-by: Ralf Tr=FCbenbach ralf.truebenb...@men.de --- I don't like that I have to include the I2C things into sntp.c. Right, this is totally the wrong place. But changing the rtc_set() function in 20 RTC drivers I don't like, too. But that's where such code belongs - probably not into all of them, but into a single central locatioon. index 76c10ec..7eee0db 100644 --- a/net/sntp.c +++ b/net/sntp.c @@ -9,6 +9,9 @@ #include command.h #include net.h #include rtc.h +#if defined(CONFIG_CMD_DATE) +#include i2c.h +#endif This also makes little sense - what if the RTC is not I2C, but bus attached? - * As the RTC's used in U-Boot sepport second resolution only + * As the RTC's used in U-Boot support second resolution only Unrelated changes must be submitted separately. #if defined(CONFIG_CMD_DATE) + /* switch to correct I2C bus */ + old_bus = I2C_GET_BUS(); + I2C_SET_BUS(CONFIG_SYS_RTC_BUS_NUM); + rtc_set (tm); + + /* switch back to original I2C bus */ + I2C_SET_BUS(old_bus); #endif Totally wrong: wrong place, wrong dependeny. NAK. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de I often quote myself; it adds spice to my conversation. - G. B. Shaw ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v3 1/5] sf: disable write protection for Macronix flash
Hi Mike,
On Mon, May 02, 2011 at 12:50:13PM -0400, Mike Frysinger wrote:
On Mon, May 2, 2011 at 05:38, Simon Guinot wrote:
--- a/drivers/mtd/spi/macronix.c
+++ b/drivers/mtd/spi/macronix.c
@@ -120,6 +120,45 @@
},
};
+static int macronix_write_status(struct spi_flash *flash, u8 sr)
+{
+ u8 cmd;
+ int ret;
+
+ ret = spi_flash_cmd(flash-spi, CMD_MX25XX_WREN, NULL, 0);
this is spi_flash_cmd_write_enable() now
I will rebase this patch against your sf branch.
Simon
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[U-Boot] LED Status APIs
Hi, i'm currently developing a BSP for the Buffalo LS-XHL (ARM based) and stumble across the two LED APIs. Is there any particular reason to have two different APIs? I guess an ARM BSP has to support both? Eg. the 'classic status API' is used in cmd_ide.c for example and the ARM one is used in arm startup code. -- Michael ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] LED Status APIs
Dear Michael Walle, In message 201105022219.58458.mich...@walle.cc you wrote: i'm currently developing a BSP for the Buffalo LS-XHL (ARM based) and stumble across the two LED APIs. Is there any particular reason to have two different APIs? I guess an ARM BSP has to support both? Eg. the 'classic status API' is used in cmd_ide.c for example and the ARM one is used in arm startup code. Actually none of them is really needed. If you don't have any explicit requirements to provide certain feedback or status information though LEDs, then just omit this alltogether. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de About the use of language: it is impossible to sharpen a pencil with a blunt ax. It is equally vain to try to do it with ten blunt axes instead. -- Edsger Dijkstra ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v4 0/5] Add support for LaCie NAS Network Space v2
From: Simon Guinot sgui...@lacie.com This patch series adds support for Network Space v2 board and parents. Changes since v1: - netconsole: restore NetOurIP check - add entries to MAINTAINERS file - move boards from root Makefile to boards.cfg - move MACH_TYPE definition into netspace_v2.h - remove CONFIG_SYS_HZ redefinition - turn PHY initialization message into debug() Changes since v2: - drop patch for Macronix MX25L4005A - rewrite patch sf: disable write protection for Macronix flash, using the common spi flash code - fix Definitions typo in mv-common.h - netconsole: add a /* Fall through */ comment before the NETCONS case label Changes since v3: - sf macronix: use spi_flash_cmd_write_enable() - enhance commit message for patch Add support for Network Space v2 Simon Guinot (5): sf: disable write protection for Macronix flash Kirkwood: allow to override CONFIG_SYS_TCLK mv-common.h: fix DRAM banks configuration netconsole: remove `serverip' check Add support for Network Space v2 MAINTAINERS|6 + arch/arm/include/asm/arch-kirkwood/kw88f6281.h |8 +- board/LaCie/netspace_v2/Makefile | 49 +++ board/LaCie/netspace_v2/kwbimage.cfg | 162 board/LaCie/netspace_v2/netspace_v2.c | 144 + board/LaCie/netspace_v2/netspace_v2.h | 39 ++ boards.cfg |3 + drivers/mtd/spi/macronix.c | 42 ++ include/configs/mv-common.h|8 +- include/configs/netspace_v2.h | 149 ++ net/net.c |3 +- 11 files changed, 605 insertions(+), 8 deletions(-) create mode 100644 board/LaCie/netspace_v2/Makefile create mode 100644 board/LaCie/netspace_v2/kwbimage.cfg create mode 100644 board/LaCie/netspace_v2/netspace_v2.c create mode 100644 board/LaCie/netspace_v2/netspace_v2.h create mode 100644 include/configs/netspace_v2.h ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v4 3/5] mv-common.h: fix DRAM banks configuration
From: Simon Guinot sgui...@lacie.com The asm/arch/config.h header define CONFIG_NR_DRAM_BANKS_MAX, which is needed to configure DRAM banks. This patch move the asm/arch/config.h header inclusion above the DRAM banks configuration. Additionally this patch fix a typo. Signed-off-by: Simon Guinot sgui...@lacie.com --- include/configs/mv-common.h |8 1 files changed, 4 insertions(+), 4 deletions(-) diff --git a/include/configs/mv-common.h b/include/configs/mv-common.h index a8937dd..0a39257 100644 --- a/include/configs/mv-common.h +++ b/include/configs/mv-common.h @@ -113,6 +113,9 @@ #define CONFIG_SYS_RESET_ADDRESS 0x/* Rst Vector Adr */ #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ +/* Include platform Common Definitions */ +#include asm/arch/config.h + /* * DRAM Banks configuration, Custom config can be done in board.h */ @@ -124,10 +127,7 @@ #endif #endif /* CONFIG_NR_DRAM_BANKS */ -/* Include platform Common Definations */ -#include asm/arch/config.h - -/* Include driver Common Definations */ +/* Include driver Common Definitions */ /* * Common NAND configuration */ -- 1.6.3.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v4 1/5] sf: disable write protection for Macronix flash
From: Simon Guinot sgui...@lacie.com
Signed-off-by: Simon Guinot sgui...@lacie.com
---
drivers/mtd/spi/macronix.c | 42 ++
1 files changed, 42 insertions(+), 0 deletions(-)
diff --git a/drivers/mtd/spi/macronix.c b/drivers/mtd/spi/macronix.c
index 96fd5f0..dacbc28 100644
--- a/drivers/mtd/spi/macronix.c
+++ b/drivers/mtd/spi/macronix.c
@@ -117,6 +117,45 @@ static const struct macronix_spi_flash_params
macronix_spi_flash_table[] = {
},
};
+static int macronix_write_status(struct spi_flash *flash, u8 sr)
+{
+ u8 cmd;
+ int ret;
+
+ ret = spi_flash_cmd_write_enable(flash);
+ if (ret 0) {
+ debug(SF: enabling write failed\n);
+ return ret;
+ }
+
+ cmd = CMD_MX25XX_WRSR;
+ ret = spi_flash_cmd_write(flash-spi, cmd, 1, sr, 1);
+ if (ret) {
+ debug(SF: fail to write status register\n);
+ return ret;
+ }
+
+ ret = spi_flash_cmd_wait_ready(flash, SPI_FLASH_PROG_TIMEOUT);
+ if (ret 0) {
+ debug(SF: write status register timed out\n);
+ return ret;
+ }
+
+ return 0;
+}
+
+static int macronix_unlock(struct spi_flash *flash)
+{
+ int ret;
+
+ /* Enable status register writing and clear BP# bits */
+ ret = macronix_write_status(flash, 0);
+ if (ret)
+ debug(SF: fail to disable write protection\n);
+
+ return ret;
+}
+
static int macronix_erase(struct spi_flash *flash, u32 offset, size_t len)
{
return spi_flash_cmd_erase(flash, CMD_MX25XX_BE, offset, len);
@@ -157,5 +196,8 @@ struct spi_flash *spi_flash_probe_macronix(struct spi_slave
*spi, u8 *idcode)
* params-sectors_per_block;
flash-size = flash-sector_size * params-nr_blocks;
+ /* Clear BP# bits for read-only flash */
+ macronix_unlock(flash);
+
return flash;
}
--
1.6.3.1
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[U-Boot] [PATCH v4 4/5] netconsole: remove `serverip' check
From: Simon Guinot sgui...@lacie.com
Netconsole use the environment variable `ncip' to configure the
destination IP. `serverip' don't need to be defined.
Signed-off-by: Simon Guinot sgui...@lacie.com
---
net/net.c |3 ++-
1 files changed, 2 insertions(+), 1 deletions(-)
diff --git a/net/net.c b/net/net.c
index e50bdf1..19ac019 100644
--- a/net/net.c
+++ b/net/net.c
@@ -1718,7 +1718,6 @@ static int net_check_prereq (proto_t protocol)
#if defined(CONFIG_CMD_NFS)
case NFS:
#endif
- case NETCONS:
case TFTP:
if (NetServerIP == 0) {
puts (*** ERROR: `serverip' not set\n);
@@ -1728,7 +1727,9 @@ static int net_check_prereq (proto_t protocol)
defined(CONFIG_CMD_DNS)
common:
#endif
+ /* Fall through */
+ case NETCONS:
if (NetOurIP == 0) {
puts (*** ERROR: `ipaddr' not set\n);
return (1);
--
1.6.3.1
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[U-Boot] [PATCH v4 2/5] Kirkwood: allow to override CONFIG_SYS_TCLK
From: Simon Guinot sgui...@lacie.com This patch allow to override CONFIG_SYS_TCLK from board configuration files. This is needed for the Network Space v2 which use a non standard core clock frequency (166MHz instead of 200MHz for a 6281 SoC). As a possible enhancement for 6281 and 6282 devices, TCLK could be dynamically detected by checking the Sample at Reset register bit 21. Additionally this patch fix a typo. Signed-off-by: Simon Guinot sgui...@lacie.com Acked-by: Prafulla Wadaskar prafu...@marvell.com --- arch/arm/include/asm/arch-kirkwood/kw88f6281.h |8 +--- 1 files changed, 5 insertions(+), 3 deletions(-) diff --git a/arch/arm/include/asm/arch-kirkwood/kw88f6281.h b/arch/arm/include/asm/arch-kirkwood/kw88f6281.h index 80723ea..22d10f1 100644 --- a/arch/arm/include/asm/arch-kirkwood/kw88f6281.h +++ b/arch/arm/include/asm/arch-kirkwood/kw88f6281.h @@ -27,11 +27,13 @@ #ifndef _ASM_ARCH_KW88F6281_H #define _ASM_ARCH_KW88F6281_H -/* SOC specific definations */ +/* SOC specific definitions */ #define KW88F6281_REGS_PHYS_BASE 0xf100 #define KW_REGS_PHY_BASE KW88F6281_REGS_PHYS_BASE -/* TCLK Core Clock defination*/ -#define CONFIG_SYS_TCLK 2 /* 200MHz */ +/* TCLK Core Clock definition */ +#ifndef CONFIG_SYS_TCLK +#define CONFIG_SYS_TCLK2 /* 200MHz */ +#endif #endif /* _ASM_ARCH_KW88F6281_H */ -- 1.6.3.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v4 5/5] Add support for Network Space v2
From: Simon Guinot sgui...@lacie.com This patch add support for the Network Space v2 board and parents, based on the Marvell Kirkwood SoC. This include Network Space (Max) v2 and Internet Space v2. Signed-off-by: Simon Guinot sgui...@lacie.com --- MAINTAINERS |6 + board/LaCie/netspace_v2/Makefile | 49 ++ board/LaCie/netspace_v2/kwbimage.cfg | 162 + board/LaCie/netspace_v2/netspace_v2.c | 144 + board/LaCie/netspace_v2/netspace_v2.h | 39 boards.cfg|3 + include/configs/netspace_v2.h | 149 ++ 7 files changed, 552 insertions(+), 0 deletions(-) create mode 100644 board/LaCie/netspace_v2/Makefile create mode 100644 board/LaCie/netspace_v2/kwbimage.cfg create mode 100644 board/LaCie/netspace_v2/netspace_v2.c create mode 100644 board/LaCie/netspace_v2/netspace_v2.h create mode 100644 include/configs/netspace_v2.h diff --git a/MAINTAINERS b/MAINTAINERS index e2a4ba9..f905a48 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -652,6 +652,12 @@ Sedji Gaouaousedji.gaou...@atmel.com at91sam9g10ek ARM926EJS (AT91SAM9G10 SoC) at91sam9m10g45ekARM926EJS (AT91SAM9G45 SoC) +Simon Guinot simon.gui...@sequanux.org + + inetspace_v2ARM926EJS (Kirkwood SoC) + netspace_v2 ARM926EJS (Kirkwood SoC) + netspace_max_v2 ARM926EJS (Kirkwood SoC) + Marius Gröger m...@sysgo.de impa7 ARM720T (EP7211) diff --git a/board/LaCie/netspace_v2/Makefile b/board/LaCie/netspace_v2/Makefile new file mode 100644 index 000..a245f2c --- /dev/null +++ b/board/LaCie/netspace_v2/Makefile @@ -0,0 +1,49 @@ +# +# Copyright (C) 2011 Simon Guinot sgui...@lacie.com +# +# Based on Kirkwood support: +# (C) Copyright 2009 +# Marvell Semiconductor www.marvell.com +# Written-by: Prafulla Wadaskar prafu...@marvell.com +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# + +include $(TOPDIR)/config.mk + +LIB= $(obj)lib$(BOARD).o + +COBJS := netspace_v2.o + +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS)) +SOBJS := $(addprefix $(obj),$(SOBJS)) + +$(LIB):$(obj).depend $(OBJS) $(SOBJS) + $(call cmd_link_o_target, $(OBJS) $(SOBJS)) + +clean: + rm -f $(SOBJS) $(OBJS) + +distclean: clean + rm -f $(LIB) core *.bak .depend + +# + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +# diff --git a/board/LaCie/netspace_v2/kwbimage.cfg b/board/LaCie/netspace_v2/kwbimage.cfg new file mode 100644 index 000..361feeb --- /dev/null +++ b/board/LaCie/netspace_v2/kwbimage.cfg @@ -0,0 +1,162 @@ +# +# Copyright (C) 2011 Simon Guinot sgui...@lacie.com +# +# Based on Kirkwood support: +# (C) Copyright 2009 +# Marvell Semiconductor www.marvell.com +# Written-by: Prafulla Wadaskar prafu...@marvell.com +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# Refer docs/README.kwimage for more details about how-to configure +# and create kirkwood boot image +# + +# Boot Media configurations +BOOT_FROM spi # Boot from SPI flash + +# SOC registers configuration using bootrom header extension +# Maximum KWBIMAGE_MAX_CONFIG configurations allowed + +# Configure RGMII-0 interface pad voltage to 1.8V +DATA 0xFFD100e0 0x1B1B1B9B + +#Dram initalization for SINGLE x16 CL=5 @ 400MHz +DATA 0xFFD01400 0x43000618 # DDR Configuration register +# bit13-0: 0xa00 (2560 DDR2 clks refresh rate) +# bit23-14: zero +# bit24: 1= enable exit self refresh mode on DDR access +# bit25: 1 required +# bit29-26: zero +# bit31-30: 01 + +DATA 0xFFD01404 0x35143000 # DDR Controller Control Low +# bit 4:0=addr/cmd in smame cycle +# bit
Re: [U-Boot] [PATCH v4 1/5] sf: disable write protection for Macronix flash
thanks, ive added this to my sf branch -mike signature.asc Description: This is a digitally signed message part. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] spi: Tegra2: Add SPI driver for SPIFLASH on Seaboard
On Monday, May 02, 2011 11:33:24 Tom Warren wrote:
On Fri, Apr 29, 2011 at 4:21 PM, Mike Frysinger wrote:
On Thursday, April 28, 2011 10:55:13 Tom Warren wrote:
This patch adds support for the SPIFLASH peripheral on Tegra2 (SPI 1).
Probe, erase, read and write are all supported, as well as low-level
SPI commands via 'sspi'.
Note that, at this time, only Seaboard has a SPI flash part (Winbond).
With this code, I've written U-Boot to SPI from within U-Boot, and
booted the system from that SPI image (boot sel jumpers must be set
to SPI [1000], and the UART ENABLE jumper must be set to GPIO CTRL).
so this is a driver for a SPI bus, and the board you're working on just
happens to have some SPI flashes connected to it ? then the SPIFLASH
part is irrelevant, as is the board in question. please remove
references to both and just refer to this as a SPI driver for Tegra2
processors.
No, there are 4 general purpose SPI interfaces in Tegra2 (SLINK), and
1 dedicated SPI FLASH controller. From the Tegra2 TRM:
The Serial Flash interface (SFLASH) Controller interfaces Tegra 2 to
SPI-capable devices such as Flash
memories and ADC/DAC devices. Tegra 2 supports only master mode of SPI
operation on this interface.
This interface is specifically intended for serial flash and similar
devices. For a general purpose SPI
interface, use the SLINK serial interface.
The register sets are similar, but not identical.
do you plan on writing a driver for the SLINK logic ? would it be a new file,
or would you keep the two integrated ? if diff files, i'd name this one
tegra2_sflash_spi.c. if you keep them merged, then tegra2_spi.c is fine.
As to the board reference, it's in my comments so people wishing to
use this will know that only Seaboard is available w/a SPI chip -
there's no provision for that on the Harmony board.
generally, processor drivers are not concerned with board issues. if you want
to document board-specific issues somewhere, add a doc/README.boardname.
--- a/arch/arm/lib/board.c
+++ b/arch/arm/lib/board.c
+#if defined(CONFIG_CMD_SPI)
I'm going to remove these changes from arm/lib/board.c and move
spi_init() to our common board file (nvidia/common/board.c.
i dont think you want to do this. other than the style changes, and needing a
sep changeset, having the arm board.c file call spi_init() is desirable.
+ * On Seaboard, MOSI/MISO are shared w/UART.
+ * Use GPIO I3 (UART_DISABLE) to tristate UART during SPI
activity.
+ * Enable UART later (cs_deactivate) so we can use it
for U-Boot comms.
+ gpio_direction_output(UART_DISABLE_GPIO, 1);
board specific issues shouldnt be in a processor driver.
Please explain what you mean by a processor driver.
you're writing a driver for the Tegra2 SoC. that is the only thing this
driver should be doing. that means no board-specific logic is allowed.
This does need an
ifdef, so any future board that doesn't have Seaboard's defiency of a
muxed SPIFLASH/UART won't have to mess with a GPIO, but for Seaboard,
we have to dynamically change GPIO_PI3 every SPI transaction to ensure
UART spew can continue (in DEBUG builds, etc.).
right, this is a board-specific issue. thus it doesnt belong in a driver that
is only concerned with the Tegra2 SoC.
what you could do is:
void spi_init_common(void) { ... only tegra2 code ... }
void spi_init(void) __attribute__((weak, alias(spi_init_common)));
and then in the seaboard directory, add:
void spi_init(void)
{
... do random gpio/portmux stuff ...
spi_init_common();
}
or another style would be to:
extern void spi_board_init(void) __weak;
void spi_init(void)
{
if (spi_board_init())
spi_board_init();
... only tegra2 code ...
}
and then in the seaboard directory, add:
void spi_board_init(void)
{
... do random gpio/portmux stuff ...
}
-mike
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Re: [U-Boot] [PATCH v4 0/5] Add support for LaCie NAS Network Space v2
Dear Simon Guinot, In message 1304370102-5978-1-git-send-email-simon.gui...@sequanux.org you wrote: From: Simon Guinot sgui...@lacie.com This patch series adds support for Network Space v2 board and parents. Changes since v1: ... Please read http://www.denx.de/wiki/view/U-Boot/Patches#Sending_updated_patch_versions You are supposed to provide such a changelog not (only) in a header message, but in each patch of the series. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de If it happens once, it's a bug. If it happens twice, it's a feature. If it happens more than twice, it's a design philosophy. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] PPC405EX CHIP_21 erratum
Hi Steve,
On Friday 29 April 2011 18:54:02 Steven A. Falco wrote:
We've been bitten by the PPC405EX CHIP_21 erratum.
How did it affect you exactly? Was an incorrect PVR detected? Did this result
in some problems (Linux etc)?
The problem goes way beyond the PVR value. We have been getting hangs at
the point that U-Boot is printing out the results of its PCIe discovery.
We would get PCIE1: successfully set as root-complex and the board would hang
forever. We traced this to an infinite loop in 4xx_pcie.c, which we fixed as
follows:
@ -724,8 +724,21 @@ int __ppc4xx_init_pcie_port_hw(int port, int rootport)
SDR_WRITE(SDRN_PESDR_RCSSET(port), 0x01101000);
/* poll for phy !reset */
- while (!(SDR_READ(SDRN_PESDR_PHYSTA(port)) 0x1000))
- ;
+{
+int i = 0;
+
+while (!(SDR_READ(SDRN_PESDR_PHYSTA(port)) 0x1000))
+{
+udelay(1000);
+
+if (i++ 2000)
+{
+printf(PCIE%d phy reset timed out, PHYSTA = 0x%08x\n,
+ port, SDR_READ(SDRN_PESDR_PHYSTA(port)));
+break;
+}
+}
+}
/* deassert the PE0_gpl_utl_reset */
SDR_WRITE(SDRN_PESDR_RCSSET(port), 0x00101000);
Basically, when we see the PVR issue, we also see that the PCIe phy never
becomes ready. With the patch above, we would not hang in U-Boot. Instead
we'd move on to load Linux, which would crash with an Oops. The board
would then reboot, and begin running normally. This behavior is consistent
with CHIP_21, which implies that on the second reboot the chip works properly.
Note that this only happens with a few of our boards, and not 100%. We
have some boards that are particularly bad, and others that always work
perfectly.
We contacted AMCC support. Their reply included the following:
there was an errata for REVD in 405EX which required soft reset
for PCIE to work correctly. Maybe this is a reason. The errata is
CHIP_21: Incorrect Value read from the SDR0_ECID0:3 and PVR registers.
And it affects PCIE reset as well.
So apparently, this is a serious bug that really needs a workaround. Now the
question is what is the best way to work around it.
I've looked through the
U-Boot code, but it doesn't appear that there is a work-around for this
one.
Correct, there currently is no workaround.
The following patch is my adaptation of AMCC's suggestion as to the fix.
But I have to say that I don't care for it, if for no other reason that it
will break if a rev E comes out.
Also, I made it #ifdef'd on CONFIG_405EX, but it will not work on a 405EXr.
And I have seen a 405EX report its PVR as if it were a 405EXr. It's not
looking good for the suggested work-around.
AMCC claims this can be fixed in hardware, by always doing a double reset.
Naturally, that is hard to implement and would mean massive rework of
existing boards.
Yes, there are many 405EX(r) boards in the field already. Such an hardware
workaround should really be avoided if possible.
So I am contemplating a different work-around, whereby software always
resets the board on a cold boot (if such a thing can be reliably
detected). That would hopefully be the equivalent of the hardware double
reset, and would not be dependent on specific PVR values, making it more
future proof.
Has anyone else run across this? Do you have similar concerns about the
patch?
No, I have not seen this problem before. And yes, I would also prefer your
alternative suggestion, with the always reboot after powerup optionally
built into the U-Boot image. But as you already mentioned, we would have to
find a way to reliably detect the powerup reset, so that we don't end in an
reset-loop.
I have not been able to find a way to distinguish a power-up versus a reboot.
So for now, I've implemented the AMCC bug fix more or less as written. To do
it right, we'd have to add entries in every U-Boot config file for the
405 EX/EXr to definitively specify the CPU type expected, and to put the
list of allowed PVRs in the code.
This means that the PVR is essentially useless to distinguish between the
EX and EXr, because we have seen one misbehaving EX report as an EXr!
If the PVR had been garbage, we could maybe use it, but reporting wrong yet
legal values makes it worthless.
All our boards use the EX, so we are able to live with this, but I realize
it is not a solution for the larger community. That is why I have not
proposed a definitive patch.
Steve
Cheers,
Stefan
--
DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-0 Fax: (+49)-8142-66989-80 Email: off...@denx.de
--
A: Because it makes the logic of the discussion difficult to follow.
Q: Why shouldn't I top post?
A: No.
Q: Should I top post?
Re: [U-Boot] LED Status APIs
Hi Wolfgang, Am Montag 02 Mai 2011, 22:36:22 schrieb Wolfgang Denk: Dear Michael Walle, In message 201105022219.58458.mich...@walle.cc you wrote: i'm currently developing a BSP for the Buffalo LS-XHL (ARM based) and stumble across the two LED APIs. Is there any particular reason to have two different APIs? I guess an ARM BSP has to support both? Eg. the 'classic status API' is used in cmd_ide.c for example and the ARM one is used in arm startup code. Actually none of them is really needed. If you don't have any explicit requirements to provide certain feedback or status information though LEDs, then just omit this alltogether. I certainly need some indicator because the board doesn't have any serial output. Would it make sense to unify that APIs into a single one? Any thoughts on that? -- Michael ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] LED Status APIs
On Monday, May 02, 2011 18:01:29 Michael Walle wrote: Would it make sense to unify that APIs into a single one? Any thoughts on that? CONFIG_STATUS_LED is the common API people should migrate to if your LED's are simply connected to a GPIO, and your arch supports the generic GPIO framework, then the work is done for you already. look at the logic in include/configs/bf526-ezbrd.h as an example. that is the only board- specific code needed. -mike signature.asc Description: This is a digitally signed message part. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v5 0/5] Add support for LaCie NAS Network Space v2
This patch series adds support for Network Space v2 board and parents. Changes for v2: - netconsole: restore NetOurIP check - add entries to MAINTAINERS file - move boards from root Makefile to boards.cfg - move MACH_TYPE definition into netspace_v2.h - remove CONFIG_SYS_HZ redefinition - turn PHY initialization message into debug() Changes for v3: - drop patch for Macronix MX25L4005A - rewrite patch sf: disable write protection for Macronix flash, using the common spi flash code - fix Definitions typo in mv-common.h - netconsole: add a /* Fall through */ comment before the NETCONS case label Changes for v4: - sf macronix: use spi_flash_cmd_write_enable() - enhance commit message for patch Add support for Network Space v2 Changes for v5: - add a changelog per patch Simon Guinot (5): sf: disable write protection for Macronix flash Kirkwood: allow to override CONFIG_SYS_TCLK mv-common.h: fix DRAM banks configuration netconsole: remove `serverip' check Add support for Network Space v2 MAINTAINERS|6 + arch/arm/include/asm/arch-kirkwood/kw88f6281.h |8 +- board/LaCie/netspace_v2/Makefile | 49 +++ board/LaCie/netspace_v2/kwbimage.cfg | 162 board/LaCie/netspace_v2/netspace_v2.c | 144 + board/LaCie/netspace_v2/netspace_v2.h | 39 ++ boards.cfg |3 + drivers/mtd/spi/macronix.c | 42 ++ include/configs/mv-common.h|8 +- include/configs/netspace_v2.h | 149 ++ net/net.c |3 +- 11 files changed, 605 insertions(+), 8 deletions(-) create mode 100644 board/LaCie/netspace_v2/Makefile create mode 100644 board/LaCie/netspace_v2/kwbimage.cfg create mode 100644 board/LaCie/netspace_v2/netspace_v2.c create mode 100644 board/LaCie/netspace_v2/netspace_v2.h create mode 100644 include/configs/netspace_v2.h ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v5 3/5] mv-common.h: fix DRAM banks configuration
From: Simon Guinot sgui...@lacie.com The asm/arch/config.h header define CONFIG_NR_DRAM_BANKS_MAX, which is needed to configure DRAM banks. This patch move the asm/arch/config.h header inclusion above the DRAM banks configuration. Additionally this patch fix a typo. Signed-off-by: Simon Guinot sgui...@lacie.com --- Changes for v2: none Changes for v3: - fix Definitions typo in mv-common.h Changes for v4,5: none include/configs/mv-common.h |8 1 files changed, 4 insertions(+), 4 deletions(-) diff --git a/include/configs/mv-common.h b/include/configs/mv-common.h index a8937dd..0a39257 100644 --- a/include/configs/mv-common.h +++ b/include/configs/mv-common.h @@ -113,6 +113,9 @@ #define CONFIG_SYS_RESET_ADDRESS 0x/* Rst Vector Adr */ #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ +/* Include platform Common Definitions */ +#include asm/arch/config.h + /* * DRAM Banks configuration, Custom config can be done in board.h */ @@ -124,10 +127,7 @@ #endif #endif /* CONFIG_NR_DRAM_BANKS */ -/* Include platform Common Definations */ -#include asm/arch/config.h - -/* Include driver Common Definations */ +/* Include driver Common Definitions */ /* * Common NAND configuration */ -- 1.6.3.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v5 1/5] sf: disable write protection for Macronix flash
From: Simon Guinot sgui...@lacie.com
Signed-off-by: Simon Guinot sgui...@lacie.com
---
Changes for v2: none
Changes for v3:
- rewrite patch using the common spi flash code
Changes for v4:
- use spi_flash_cmd_write_enable()
Changes for v5: none
drivers/mtd/spi/macronix.c | 42 ++
1 files changed, 42 insertions(+), 0 deletions(-)
diff --git a/drivers/mtd/spi/macronix.c b/drivers/mtd/spi/macronix.c
index 96fd5f0..dacbc28 100644
--- a/drivers/mtd/spi/macronix.c
+++ b/drivers/mtd/spi/macronix.c
@@ -117,6 +117,45 @@ static const struct macronix_spi_flash_params
macronix_spi_flash_table[] = {
},
};
+static int macronix_write_status(struct spi_flash *flash, u8 sr)
+{
+ u8 cmd;
+ int ret;
+
+ ret = spi_flash_cmd_write_enable(flash);
+ if (ret 0) {
+ debug(SF: enabling write failed\n);
+ return ret;
+ }
+
+ cmd = CMD_MX25XX_WRSR;
+ ret = spi_flash_cmd_write(flash-spi, cmd, 1, sr, 1);
+ if (ret) {
+ debug(SF: fail to write status register\n);
+ return ret;
+ }
+
+ ret = spi_flash_cmd_wait_ready(flash, SPI_FLASH_PROG_TIMEOUT);
+ if (ret 0) {
+ debug(SF: write status register timed out\n);
+ return ret;
+ }
+
+ return 0;
+}
+
+static int macronix_unlock(struct spi_flash *flash)
+{
+ int ret;
+
+ /* Enable status register writing and clear BP# bits */
+ ret = macronix_write_status(flash, 0);
+ if (ret)
+ debug(SF: fail to disable write protection\n);
+
+ return ret;
+}
+
static int macronix_erase(struct spi_flash *flash, u32 offset, size_t len)
{
return spi_flash_cmd_erase(flash, CMD_MX25XX_BE, offset, len);
@@ -157,5 +196,8 @@ struct spi_flash *spi_flash_probe_macronix(struct spi_slave
*spi, u8 *idcode)
* params-sectors_per_block;
flash-size = flash-sector_size * params-nr_blocks;
+ /* Clear BP# bits for read-only flash */
+ macronix_unlock(flash);
+
return flash;
}
--
1.6.3.1
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