Re: [U-Boot] [PATCH] tools/envcrc: fix compile breakage
Dear Igor Grinberg, In message 1322467058-30532-1-git-send-email-grinb...@compulab.co.il you wrote: When ENV_IS_EMBEDDED is not set, but CONFIG_BUILD_ENVCRC is set, the environment.h file does not get included resulting in unrecognized env_t type. Fix this by moving the include directive. Hm... the fix seems wrong to me. What happens now if ENV_IS_EMBEDDED is set, but CONFIG_BUILD_ENVCRC is _not_ set? Did this change pass a MAKEALL for example for ppc? Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de The thing is, as you progress in the Craft, you'll learn there is another rule... When you break rules, break 'em good and hard. - Terry Pratchett, _Wyrd Sisters_ ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v3] ftsdc010: improve performance and capability
Hi Andy,
Changes for v2:
- Fix the problem if we read status register too fast in
FTSDC010_CMD_RETRY
loop. If we read status register here too fast, the hardware will
report
RSP_TIMEOUT incorrectly.
Changes for v3:
- Remove host high speed capability due to hardware limitation.
- Remove unused variables.
- if (status FTSDC010_STATUS_FIFO_ORUN) {
+ if (status FTSDC010_STATUS_FIFO_URUN) {
Was this a bug before? If so, it should be mentioned in the changelog
that you fixed it.
Thanks. I missed this modification to be marked in the change log.
/* check DATA TIMEOUT or FAIL */
if (data) {
+ if (sta FTSDC010_STATUS_DATA_END) {
+ /* Transfer Complete */
+ clear |= FTSDC010_STATUS_DATA_END;
+ }
+
+ if (sta FTSDC010_STATUS_DATA_CRC_OK) {
+ /* Data CRC_OK */
+ clear |= FTSDC010_STATUS_DATA_CRC_OK;
+ }
Instead of:
if (foo) {
/* comment */
bar;
}
It's better, I think to do:
/* comment */
if (foo)
bar;
Okay, I'll fix it in patch v4.
However, aside from that, the interrupt clearing confuses me. Usually,
you read the event register, and then write it back to clear
it. If there is more than one error, some of the status bits will be
left uncleared. If you only want to clear the bits being dealt with in
a particular section, I think it would be clearer and safer to set
clear up-front based on a MASK of bits that are being dealt with in
that section.
The MASK bits doesn't really work at all. :-(
If I've disabled some of the interrupt flags by mask, these disabled flag
will still raise
(I think is a design flaw in hardware) if the error or success has happened.
The event (status) register is different from the clear register.
They are 2 different register with slightly different definition of their
bit fields,
these 2 registers are only partially identical of the meaning of the flags.
The flags indeed can be separate to different stage during one command
transaction.
Actually, not all the error status bit will raise at the same time.
Some flags will only be raised exclusively.
For example, there will be only one flag raised on time for the following 3
flags,
FTSDC010_STATUS_RSP_TIMEOUT, FTSDC010_STATUS_RSP_CRC_FAIL, and
FTSDC010_STATUS_RSP_CRC_OK.
If one of the flag didn't be cleared right now, say, RSP_TIMEOUT, the
hardware will clear it if RSP_CRC_FAIL must be
raised in the next time.
+
if (sta FTSDC010_STATUS_DATA_TIMEOUT) {
/* DATA TIMEOUT */
- debug(%s: DATA TIMEOUT: sta: %08x\n,
- __func__, sta);
+ debug(%s: DATA TIMEOUT: sta: %08x\n, __func__,
sta);
clear |= FTSDC010_STATUS_DATA_TIMEOUT;
Why set clear? This code returns before clear is written.
writel(sta, host-reg-clr);
+
return TIMEOUT;
Why did you say the code returns before clear is written?
FTSDC010_STATUS_DATA_TIMEOUT and FTSDC010_STATUS_DATA_CRC_FAIL are
exclusive just like
RSP_TIMEOUT and RSP_CRC_FAIL managed by hardware.
The driver will indeed clear DATA_TIMEOUT when the flag of clear has been
set and then will be wrote into
clear register on the next line of the code writel(sta, host-reg-clr);,
Finally we return TIMEOUT since the DATA_TIMEOUT has been detected.
We have a COMM_ERR returned after the DATA_CRC_FAIL has been detected and
cleared also.
} else if (sta FTSDC010_STATUS_DATA_CRC_FAIL) {
/* Error Interrupt */
- debug(%s: DATA CRC FAIL: sta: %08x\n,
- __func__, sta);
+ debug(%s: DATA CRC FAIL: sta: %08x\n,
__func__, sta);
clear |= FTSDC010_STATUS_DATA_CRC_FAIL;
writel(clear, host-reg-clr);
Ok, here clear is actually written to the register, but doesn't it
leave open the possibility that DATA_END is still there? Maybe it
doesn't matter for this, but it seems very fragile.
The clear here is used to clear FTSDC010_STATUS_DATA_END and
FTSDC010_STATUS_DATA_CRC_OK.
Only these 2 flags are independent to other DATA related flags.
The last writel() is used to clear up these 2 DATA_END and DATA_CRC_OK if
TIMEOUT and CRC_ERR didn't happened.
--
Best regards,
Macpaul Lin
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Re: [U-Boot] [PATCH] tools/envcrc: fix compile breakage
Dear Igor Grinberg, In message 1322467058-30532-1-git-send-email-grinb...@compulab.co.il you wrote: When ENV_IS_EMBEDDED is not set, but CONFIG_BUILD_ENVCRC is set, the environment.h file does not get included resulting in unrecognized env_t type. Fix this by moving the include directive. ... -extern uint32_t crc32 (uint32_t, const unsigned char *, unsigned int); ... +extern uint32_t crc32 (uint32_t, const unsigned char *, unsigned int); Also, instead of moving this line, you should rather insert something like #include u-boot/crc.h ... Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de Too much of anything, even love, isn't necessarily a good thing. -- Kirk, The Trouble with Tribbles, stardate 4525.6 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 1/2] TI: netdev: add driver for cpsw ethernet device
Tom,
Can we do cache enabling of cpsw as a follow up patch to this?
As, initial aim is to upstream basic cpsw functional driver first
and then follow on other features like you said cache enable etc.
Regards
Chandan
-Original Message-
From: u-boot-boun...@lists.denx.de [mailto:u-boot-
boun...@lists.denx.de] On Behalf Of Kumar Nath, Chandan
Sent: Friday, November 11, 2011 8:42 PM
To: Tom Rini
Cc: u-boot@lists.denx.de; Chemparathy, Cyril
Subject: Re: [U-Boot] [PATCH 1/2] TI: netdev: add driver for cpsw
ethernet device
-Original Message-
From: Tom Rini [mailto:tom.r...@gmail.com]
Sent: Friday, November 11, 2011 8:19 PM
To: Kumar Nath, Chandan
Cc: u-boot@lists.denx.de; Chemparathy, Cyril
Subject: Re: [U-Boot] [PATCH 1/2] TI: netdev: add driver for cpsw
ethernet device
On Thu, Nov 10, 2011 at 11:01 PM, Kumar Nath, Chandan
chandan.n...@ti.com wrote:
-Original Message-
From: Tom Rini [mailto:tom.r...@gmail.com]
Sent: Thursday, November 10, 2011 8:11 PM
To: Kumar Nath, Chandan
Cc: u-boot@lists.denx.de; Chemparathy, Cyril
Subject: Re: [U-Boot] [PATCH 1/2] TI: netdev: add driver for cpsw
ethernet device
On Wed, Nov 9, 2011 at 10:47 PM, Kumar Nath, Chandan
chandan.n...@ti.com wrote:
-Original Message-
From: Tom Rini [mailto:tom.r...@gmail.com]
Sent: Friday, October 21, 2011 9:09 PM
To: Kumar Nath, Chandan
Cc: u-boot@lists.denx.de; Chemparathy, Cyril
Subject: Re: [U-Boot] [PATCH 1/2] TI: netdev: add driver for
cpsw
ethernet device
On Fri, Oct 21, 2011 at 12:02 AM, Chandan Nath
chandan.n...@ti.com
wrote:
From: Cyril Chemparathy cy...@ti.com
CPSW is an on-chip ethernet switch that is found on various
SoCs
from
Texas
Instruments. This patch adds a simple driver (based on the
Linux
driver) for
this hardware module.
Have you made the driver safe with dcache enabled?
No, driver is not made safe with dcache enabled. Can you please
tell
me
why I need to enable dcache.
Because we really want to enable the dcache for performance
reasons.
Given that to enable dcache on am335x we just need:
#ifndef CONFIG_SYS_DCACHE_OFF
void enable_caches(void)
{
/* Enable D-cache. I-cache is already enabled in start.S
*/
dcache_enable();
}
#endif
We really want to not add drivers that aren't cache safe,
especially
when it's not a lot of work to do so.
I tried enabling dcache by adding above code. But when I executed
dhcp command,
it was not able to find any IP address and keeps trying infinitely.
Correct. The cpsw driver in u-boot is not cache coherent, which is
what I'm asking you to fix. Looking at the patches to make the
davinci emac driver cache cohernet might be of some help here.
Ok, I will look into this and update you.
--
Tom
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Re: [U-Boot] [PATCH] Blackfin: br4: new board port
Dear Wolfgang Denk,
Signed-off-by: Dimitar Penev dpn at switchfin dot org
Cc: Mike Frysinger vapier {AT} gentoo {DOT} org
www.switchfin.org/patches/uBoot-br4-v1.patch
If you want to submit a patch, then please follow the rules explained
for example here: http://www.denx.de/wiki/U-Boot/Patches
Most of all, send the patch to the mailing list. Just posting a URL
will definitely be ignored.
I will try to fix my mail client and use plain text as it is explained for
the future.
Thanks
Dimitar Penev
Best regards,
Wolfgang Denk
--
DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de
We Klingons believe as you do -- the sick should die. Only the strong
should live.
-- Kras, Friday's Child, stardate 3497.2
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Re: [U-Boot] [PATCH] post: fix compile issue for post tests on kirkwood
Hi, On 11/27/2011 08:07 AM, Marek Vasut wrote: commit f31a911fe (arm, post: add missing post_time_ms for arm) enables get_ticks and get_tbclk for all arm based boards, but kirkwood has currently no implementation for this. So undefine this for kirkwood boards. So this means the kirkwood timer doesn't conform to current timer api? Why work it around and not fix it then? I think this is better approach Right? :) So now the question is ... who's gonna do it ? ;-) Patch from any one is welcomed. :-D Anyone, eh? Anyone ... anyone like the maintainer maybe ? :-D I would have loved to do it, but I am very busy with some other very important assignment. May be I will post a patch in feb2012 I'll keep an eye on this ;-) I do also agree that implementing the functions would be better then adding an #ifdef as my patch does. But I currently got also no time to do this. So could someone please pick this patch up that the keymile ARM boards are compilable again? Best regards Holger ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] tools/envcrc: fix compile breakage
Hi Wolfgang, On 11/28/11 10:18, Wolfgang Denk wrote: Dear Igor Grinberg, In message 1322467058-30532-1-git-send-email-grinb...@compulab.co.il you wrote: When ENV_IS_EMBEDDED is not set, but CONFIG_BUILD_ENVCRC is set, the environment.h file does not get included resulting in unrecognized env_t type. Fix this by moving the include directive. ... -extern uint32_t crc32 (uint32_t, const unsigned char *, unsigned int); ... +extern uint32_t crc32 (uint32_t, const unsigned char *, unsigned int); Also, instead of moving this line, you should rather insert something like #include u-boot/crc.h ... I had no intend to clean this file, but I can do this change in a separate patch. -- Regards, Igor. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] tools/envcrc: fix compile breakage
Hi Wolfgang, On 11/28/11 10:07, Wolfgang Denk wrote: Dear Igor Grinberg, In message 1322467058-30532-1-git-send-email-grinb...@compulab.co.il you wrote: When ENV_IS_EMBEDDED is not set, but CONFIG_BUILD_ENVCRC is set, the environment.h file does not get included resulting in unrecognized env_t type. Fix this by moving the include directive. Hm... the fix seems wrong to me. What happens now if ENV_IS_EMBEDDED is set, but CONFIG_BUILD_ENVCRC is _not_ set? Well, you should look into that file... it says: #if defined(ENV_IS_EMBEDDED) !defined(CONFIG_BUILD_ENVCRC) # define CONFIG_BUILD_ENVCRC 1 #endif So this will not be a problem. As for the logic of it... I don't know what was the original intend. Did this change pass a MAKEALL for example for ppc? I don't have the tool chain for ppc. I think the original fix has been tested by Stefano. Is there a requirement to have all the supported architectures tool chains, for submitting patches? Stefano, Mike, can you, please, test it on PPC and Blackfin? Thanks -- Regards, Igor. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2] mmc: add host_caps checking avoid switch card improperly
Add a host capability checking to avoid the mmc stack switch the card to HIGHSPEED mode when the card supports HIGHSPEED while the host doesn't. This patch avoid furthur transaction problem when the mmc/sd card runs different mode to the host. Signed-off-by: Macpaul Lin macp...@andestech.com Changes for v2: - Replace OR logic by AND logic; switch to high speed if controller support one of the high speed mode. --- drivers/mmc/mmc.c | 10 ++ 1 files changed, 10 insertions(+), 0 deletions(-) diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c index 21665ec..98abf1c 100644 --- a/drivers/mmc/mmc.c +++ b/drivers/mmc/mmc.c @@ -785,6 +785,16 @@ retry_scr: if (!(__be32_to_cpu(switch_status[3]) SD_HIGHSPEED_SUPPORTED)) return 0; + /* +* If the host doesn't support SD_HIGHSPEED, do not switch card to +* HIGHSPEED mode even if the card support SD_HIGHSPPED. +* This can avoid furthur problem when the card runs in different +* mode between the host. +*/ + if (!((mmc-host_caps MMC_MODE_HS_52MHz) + (mmc-host_caps MMC_MODE_HS))) + return 0; + err = sd_switch(mmc, SD_SWITCH_SWITCH, 0, 1, (u8 *)switch_status); if (err) -- 1.7.3.5 CONFIDENTIALITY NOTICE: This e-mail (and its attachments) may contain confidential and legally privileged information or information protected from disclosure. If you are not the intended recipient, you are hereby notified that any disclosure, copying, distribution, or use of the information contained herein is strictly prohibited. In this case, please immediately notify the sender by return e-mail, delete the message (and any accompanying documents) and destroy all printed hard copies. Thank you for your cooperation. Copyright ANDES TECHNOLOGY CORPORATION - All Rights Reserved. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] Email testing.
Sorry this is an e-mail testing from this address, Please ignore it. Macpaul Lin CONFIDENTIALITY NOTICE: This e-mail (and its attachments) may contain confidential and legally privileged information or information protected from disclosure. If you are not the intended recipient, you are hereby notified that any disclosure, copying, distribution, or use of the information contained herein is strictly prohibited. In this case, please immediately notify the sender by return e-mail, delete the message (and any accompanying documents) and destroy all printed hard copies. Thank you for your cooperation. Copyright ANDES TECHNOLOGY CORPORATION - All Rights Reserved. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v3] mmc: add host_caps checking avoid switch card improperly
Add a host capability checking to avoid the mmc stack switch the card to HIGHSPEED mode when the card supports HIGHSPEED while the host doesn't. This patch avoid furthur transaction problem when the mmc/sd card runs different mode to the host. Signed-off-by: Macpaul Lin macp...@andestech.com --- Changes for v2: - Replace OR logic by AND logic; switch to high speed if controller support one of the high speed mode. Changes for v3: - Correct the incorrect patch format. drivers/mmc/mmc.c | 10 ++ 1 files changed, 10 insertions(+), 0 deletions(-) diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c index 21665ec..98abf1c 100644 --- a/drivers/mmc/mmc.c +++ b/drivers/mmc/mmc.c @@ -785,6 +785,16 @@ retry_scr: if (!(__be32_to_cpu(switch_status[3]) SD_HIGHSPEED_SUPPORTED)) return 0; + /* +* If the host doesn't support SD_HIGHSPEED, do not switch card to +* HIGHSPEED mode even if the card support SD_HIGHSPPED. +* This can avoid furthur problem when the card runs in different +* mode between the host. +*/ + if (!((mmc-host_caps MMC_MODE_HS_52MHz) + (mmc-host_caps MMC_MODE_HS))) + return 0; + err = sd_switch(mmc, SD_SWITCH_SWITCH, 0, 1, (u8 *)switch_status); if (err) -- 1.7.3.5 CONFIDENTIALITY NOTICE: This e-mail (and its attachments) may contain confidential and legally privileged information or information protected from disclosure. If you are not the intended recipient, you are hereby notified that any disclosure, copying, distribution, or use of the information contained herein is strictly prohibited. In this case, please immediately notify the sender by return e-mail, delete the message (and any accompanying documents) and destroy all printed hard copies. Thank you for your cooperation. Copyright ANDES TECHNOLOGY CORPORATION - All Rights Reserved. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2] mmc: add host_caps checking avoid switch card improperly
Add a host capability checking to avoid the mmc stack switch the card to HIGHSPEED mode when the card supports HIGHSPEED while the host doesn't. This patch avoid furthur transaction problem when the mmc/sd card runs different mode to the host. Signed-off-by: Macpaul Lin macp...@andestech.com --- Changes for v2: - Replace OR logic by AND logic; switch to high speed if controller support one of the high speed mode. drivers/mmc/mmc.c | 10 ++ 1 files changed, 10 insertions(+), 0 deletions(-) diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c index 21665ec..98abf1c 100644 --- a/drivers/mmc/mmc.c +++ b/drivers/mmc/mmc.c @@ -785,6 +785,16 @@ retry_scr: if (!(__be32_to_cpu(switch_status[3]) SD_HIGHSPEED_SUPPORTED)) return 0; + /* +* If the host doesn't support SD_HIGHSPEED, do not switch card to +* HIGHSPEED mode even if the card support SD_HIGHSPPED. +* This can avoid furthur problem when the card runs in different +* mode between the host. +*/ + if (!((mmc-host_caps MMC_MODE_HS_52MHz) + (mmc-host_caps MMC_MODE_HS))) + return 0; + err = sd_switch(mmc, SD_SWITCH_SWITCH, 0, 1, (u8 *)switch_status); if (err) -- 1.7.3.5 CONFIDENTIALITY NOTICE: This e-mail (and its attachments) may contain confidential and legally privileged information or information protected from disclosure. If you are not the intended recipient, you are hereby notified that any disclosure, copying, distribution, or use of the information contained herein is strictly prohibited. In this case, please immediately notify the sender by return e-mail, delete the message (and any accompanying documents) and destroy all printed hard copies. Thank you for your cooperation. Copyright ANDES TECHNOLOGY CORPORATION - All Rights Reserved. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2] mmc: add host_caps checking avoid switch card improperly
Add a host capability checking to avoid the mmc stack switch the card to HIGHSPEED mode when the card supports HIGHSPEED while the host doesn't. This patch avoid furthur transaction problem when the mmc/sd card runs different mode to the host. Signed-off-by: Macpaul Lin macp...@andestech.com --- Changes for v2: - Replace OR logic by AND logic; switch to high speed if controller support one of the high speed mode. drivers/mmc/mmc.c | 10 ++ 1 files changed, 10 insertions(+), 0 deletions(-) diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c index 21665ec..98abf1c 100644 --- a/drivers/mmc/mmc.c +++ b/drivers/mmc/mmc.c @@ -785,6 +785,16 @@ retry_scr: if (!(__be32_to_cpu(switch_status[3]) SD_HIGHSPEED_SUPPORTED)) return 0; + /* +* If the host doesn't support SD_HIGHSPEED, do not switch card to +* HIGHSPEED mode even if the card support SD_HIGHSPPED. +* This can avoid furthur problem when the card runs in different +* mode between the host. +*/ + if (!((mmc-host_caps MMC_MODE_HS_52MHz) + (mmc-host_caps MMC_MODE_HS))) + return 0; + err = sd_switch(mmc, SD_SWITCH_SWITCH, 0, 1, (u8 *)switch_status); if (err) -- 1.7.3.5 CONFIDENTIALITY NOTICE: This e-mail (and its attachments) may contain confidential and legally privileged information or information protected from disclosure. If you are not the intended recipient, you are hereby notified that any disclosure, copying, distribution, or use of the information contained herein is strictly prohibited. In this case, please immediately notify the sender by return e-mail, delete the message (and any accompanying documents) and destroy all printed hard copies. Thank you for your cooperation. Copyright ANDES TECHNOLOGY CORPORATION - All Rights Reserved. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2] mmc: add host_caps checking avoid switch card improperly
Hi Andy 2011/11/28 Macpaul Lin macp...@andestech.com Add a host capability checking to avoid the mmc stack switch the card to HIGHSPEED mode when the card supports HIGHSPEED while the host doesn't. This patch avoid furthur transaction problem when the mmc/sd card runs different mode to the host. Signed-off-by: Macpaul Lin macp...@andestech.com Sorry for sending these multiple mails. The IT department of my company has set the mail server with incorrect routing parameters. Please drop these multiple mails which are the same. I'll delete them in patchworks and left the only one patch v2 of this patch which should be correct. -- Best regards, Macpaul Lin ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 5/5] pxa: fix relocation
Am 26.11.2011 23:27, schrieb Remy Bohmer: 2011/10/17 Stefan Herbrechtsmeiersherb...@cit-ec.uni-bielefeld.de: The current relocation don't work correct, as it doesn't clear the initial ram (dcache) after relocation. This leads to missing bootargs during Linux boot. Additionally the current relocation use the sdram address for the initial ram which introduce a bug in the sdram initialization. This patch extend the relocation in order to disable the mmu and to clear the dcache after the relocation. Additionally it makes the initial ram address and size configurable and fix the various CONFIG_SYS_INIT_SP_ADDR definitions in the pxa board config files. Signed-off-by: Stefan Herbrechtsmeiersherb...@cit-ec.uni-bielefeld.de CC: Marek Vasutmarek.va...@gmail.com CC: Prakash Kumarprak...@embedx.com CC: Robert Schwebelr.schwe...@pengutronix.de CC: Cliff Brakecliff.br...@gmail.com CC: Stefano Babicsba...@denx.de I see that nobody picked this is up so far, and I will not do it as well... It is posted as part of a series with USB patches, while this one is not related to USB. So, repost it as an stand-alone patch? This patch was superseded by 'PXA: Rework start.S to be closer to other ARMs' from Marek. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v3 01/15] arm, davinci: Move pinmux functions from board to arch tree
Hello Christian, Christian Riesch wrote: Signed-off-by: Christian Riesch christian.rie...@omicron.at Cc: Sandeep Paulraj s-paul...@ti.com Cc: Heiko Schocher h...@denx.de Cc: Sudhakar Rajashekhara sudhakar@ti.com Cc: Syed Mohammed Khasim sm.kha...@gmail.com Cc: Sughosh Ganu urwithsugh...@gmail.com Cc: Nick Thompson nick.thomp...@gefanuc.com Cc: Stefano Babic sba...@denx.de --- arch/arm/cpu/arm926ejs/davinci/Makefile|2 +- .../arm/cpu/arm926ejs/davinci/pinmux.c |0 arch/arm/include/asm/arch-davinci/hardware.h |2 ++ board/davinci/common/Makefile |2 +- board/davinci/da8xxevm/da830evm.c |2 -- board/davinci/da8xxevm/da850evm.c |2 -- board/davinci/da8xxevm/hawkboard_nand_spl.c|2 -- board/davinci/ea20/ea20.c |2 -- nand_spl/board/davinci/da8xxevm/Makefile |6 +++--- 9 files changed, 7 insertions(+), 13 deletions(-) rename board/davinci/common/davinci_pinmux.c = arch/arm/cpu/arm926ejs/davinci/pinmux.c (100%) Acked-by: Heiko Schocher h...@denx.de bye, Heiko -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v3 02/15] arm, hawkboard: Remove obsolete struct pinmux_config i2c_pins
Hello Christian, Christian Riesch wrote: The configuration in struct pinmux_config i2c_pins does not configure the pins for i2c but for uart. Since this function is already configured by struct pinmux_config uart2_pins the i2c_pins struct is obsolete. Signed-off-by: Christian Riesch christian.rie...@omicron.at Cc: Heiko Schocher h...@denx.de Cc: Syed Mohammed Khasim sm.kha...@gmail.com Cc: Sughosh Ganu urwithsugh...@gmail.com Cc: Sandeep Paulraj s-paul...@ti.com --- board/davinci/da8xxevm/hawkboard_nand_spl.c |6 -- 1 files changed, 0 insertions(+), 6 deletions(-) Acked-by: Heiko Schocherhsdenx.de bye, Heiko -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v3 03/15] arm, da850evm: Do pinmux configuration for EMAC together with other pinmuxes
Hello Christian, Christian Riesch wrote: Pinmux configuration for the EMAC was done in a separate call of davinci_configure_pin_mux(). This patch moves all the pinmux configuration that is done for this board to a common place. Signed-off-by: Christian Riesch christian.rie...@omicron.at Cc: Heiko Schocher h...@denx.de Cc: Sandeep Paulraj s-paul...@ti.com Cc: Sudhakar Rajashekhara sudhakar@ti.com --- board/davinci/da8xxevm/da850evm.c |6 +++--- 1 files changed, 3 insertions(+), 3 deletions(-) Acked-by: Heiko Schocherh...@denx.de bye, Heiko -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v3 04/15] arm, da850: Add pinmux configurations to the arch tree
Hello Christian, Christian Riesch wrote: Up to now nearly every davinci board has separate code for the definition of pinmux configurations. This patch adds pinmux configurations for the DA850 SoCs to the arch tree which may later be used for all DA850 based boards. Signed-off-by: Christian Riesch christian.rie...@omicron.at Cc: Sandeep Paulraj s-paul...@ti.com Cc: Heiko Schocher h...@denx.de Cc: Mike Frysinger vap...@gentoo.org --- arch/arm/cpu/arm926ejs/davinci/Makefile |1 + arch/arm/cpu/arm926ejs/davinci/da850_pinmux.c | 166 +++ arch/arm/include/asm/arch-davinci/pinmux_defs.h | 50 +++ 3 files changed, 217 insertions(+), 0 deletions(-) create mode 100644 arch/arm/cpu/arm926ejs/davinci/da850_pinmux.c create mode 100644 arch/arm/include/asm/arch-davinci/pinmux_defs.h Acked-by: Heiko Schocherh...@denx.de bye, Heiko -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v3 05/15] arm, da850evm: Use the pinmux configurations defined in the arch tree
Hello Christian, Christian Riesch wrote: The boards in board/davinci/da8xxevm/ define pinmux_config[] vectors that contain pinmux configurations for emac, uarts, memory controllers... In an earlier patch such pinmux configurations were added to the arch tree. This patch makes the da850evm use these definitions instead of defining its own. Signed-off-by: Christian Riesch christian.rie...@omicron.at Cc: Sandeep Paulraj s-paul...@ti.com Cc: Heiko Schocher h...@denx.de Cc: Sudhakar Rajashekhara sudhakar@ti.com Cc: Mike Frysinger vap...@gentoo.org --- board/davinci/da8xxevm/da850evm.c | 153 ++--- include/configs/da850_am18xxevm.h |1 + include/configs/da850evm.h|1 + 3 files changed, 27 insertions(+), 128 deletions(-) Acked-by: Heiko Schocherh...@denx.de bye, Heiko -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v3 06/15] arm, hawkboard: Use the pinmux configurations defined in the arch tree
Hello Christian, Christian Riesch wrote: The boards in board/davinci/da8xxevm/ define pinmux_config[] vectors that contain pinmux configurations for emac, uarts, memory controllers... In an earlier patch such pinmux configurations were added to the arch tree. This patch makes the hawkboard use these definitions instead of defining its own. Signed-off-by: Christian Riesch christian.rie...@omicron.at Cc: Sandeep Paulraj s-paul...@ti.com Cc: Heiko Schocher h...@denx.de Cc: Syed Mohammed Khasim sm.kha...@gmail.com Cc: Sughosh Ganu urwithsugh...@gmail.com Cc: Mike Frysinger vap...@gentoo.org --- board/davinci/da8xxevm/hawkboard_nand_spl.c | 51 -- include/configs/hawkboard.h |1 + nand_spl/board/davinci/da8xxevm/Makefile|5 +++ 3 files changed, 14 insertions(+), 43 deletions(-) Acked-by: Heiko Schocherh...@denx.de bye, Heiko -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v3 07/15] arm, davinci: Remove duplication of pinmux configuration code
Hello Christian, Christian Riesch wrote: This patch replaces the pinmux configuration code in arch/arm/cpu/arm926ejs/davinci/da850_lowlevel.c by the code from arch/arm/cpu/arm926ejs/davinci/pinmux.c. Signed-off-by: Christian Riesch christian.rie...@omicron.at Cc: Sandeep Paulraj s-paul...@ti.com Cc: Heiko Schocher h...@denx.de --- arch/arm/cpu/arm926ejs/davinci/da850_lowlevel.c | 36 +- 1 files changed, 8 insertions(+), 28 deletions(-) Acked-by: Heiko Schocherh...@denx.de bye, Heiko -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v3 13/15] arm, da850evm: Add an SPL for SPI boot
Hello Christian,
Christian Riesch wrote:
Signed-off-by: Christian Riesch christian.rie...@omicron.at
Cc: Heiko Schocher h...@denx.de
Cc: Sandeep Paulraj s-paul...@ti.com
Cc: Sudhakar Rajashekhara sudhakar@ti.com
---
board/davinci/da8xxevm/da850evm.c |4 +-
board/davinci/da8xxevm/u-boot-spl.lds | 73
+
include/configs/da850evm.h| 53
3 files changed, 129 insertions(+), 1 deletions(-)
create mode 100644 board/davinci/da8xxevm/u-boot-spl.lds
[...]
diff --git a/include/configs/da850evm.h b/include/configs/da850evm.h
index 2e2aa19..23eed0f 100644
--- a/include/configs/da850evm.h
+++ b/include/configs/da850evm.h
@@ -65,6 +65,41 @@
#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */
#define CONFIG_STACKSIZE (256*1024) /* regular stack */
+#define CONFIG_SYS_DA850_SYSCFG_SUSPSRC ((1 27) | (1 22) | (1 20) |
\
+ (1 5) | (1 16))
Please use here the DAVINCI_SYSCFG_SUSPSRC_* defines from
arch/arm/include/asm/arch-davinci/hardware.h
+
+/*
+ * PLL configuration
+ */
+#define CONFIG_SYS_DV_CLKMODE 0
+#define CONFIG_SYS_DA850_PLL0_POSTDIV 1
+#define CONFIG_SYS_DA850_PLL0_PLLDIV1 0x8000
+#define CONFIG_SYS_DA850_PLL0_PLLDIV2 0x8001
+#define CONFIG_SYS_DA850_PLL0_PLLDIV3 0x8002
+#define CONFIG_SYS_DA850_PLL0_PLLDIV4 0x8003
+#define CONFIG_SYS_DA850_PLL0_PLLDIV5 0x8002
+#define CONFIG_SYS_DA850_PLL0_PLLDIV6 CONFIG_SYS_DA850_PLL0_PLLDIV1
+#define CONFIG_SYS_DA850_PLL0_PLLDIV7 0x8005
+
+#define CONFIG_SYS_DA850_PLL1_POSTDIV 1
+#define CONFIG_SYS_DA850_PLL1_PLLDIV1 0x8000
+#define CONFIG_SYS_DA850_PLL1_PLLDIV2 0x8001
+#define CONFIG_SYS_DA850_PLL1_PLLDIV3 0x8002
+
+#define CONFIG_SYS_DA850_PLL0_PLLM 24
+#define CONFIG_SYS_DA850_PLL1_PLLM 21
+
+/*
+ * DDR2 memory configuration
+ */
+#define CONFIG_SYS_DA850_DDR2_DDRPHYCR 0x00C4
+#define CONFIG_SYS_DA850_DDR2_SDBCR0x0A034622
+#define CONFIG_SYS_DA850_DDR2_SDBCR2 0x
+#define CONFIG_SYS_DA850_DDR2_SDTIMR 0x184929C8
+#define CONFIG_SYS_DA850_DDR2_SDTIMR2 0xB80FC700
+#define CONFIG_SYS_DA850_DDR2_SDRCR0x0406
Could you use here the DV_DDR_* defines from
arch/arm/include/asm/arch-davinci/ddr2_defs.h
+#define CONFIG_SYS_DA850_DDR2_PBBPR0x30
+
/*
* Serial Driver info
*/
@@ -76,6 +111,7 @@
#define CONFIG_CONS_INDEX1 /* use UART0 for console */
#define CONFIG_BAUDRATE 115200 /* Default baud rate */
#define CONFIG_SYS_BAUDRATE_TABLE{ 9600, 19200, 38400, 57600, 115200 }
+#define CONFIG_SYS_DA850_LPSC_UART DAVINCI_LPSC_UART2
#define CONFIG_SPI
#define CONFIG_SPI_FLASH
@@ -242,6 +278,23 @@
#undef CONFIG_CMD_ENV
#endif
+/* defines for SPL */
+#define CONFIG_SPL
+#define CONFIG_SPL_SPI_SUPPORT
+#define CONFIG_SPL_SPI_FLASH_SUPPORT
+#define CONFIG_SPL_SPI_LOAD
+#define CONFIG_SPL_SPI_BUS 0
+#define CONFIG_SPL_SPI_CS 0
+#define CONFIG_SPL_SERIAL_SUPPORT
+#define CONFIG_SPL_LIBCOMMON_SUPPORT
+#define CONFIG_SPL_LIBGENERIC_SUPPORT
+#define CONFIG_SPL_LDSCRIPT $(BOARDDIR)/u-boot-spl.lds
+#define CONFIG_SPL_STACK 0x8001ff00
+#define CONFIG_SPL_TEXT_BASE 0x8000
+#define CONFIG_SPL_MAX_SIZE 32768
+#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x8000
+#define CONFIG_SYS_SPI_U_BOOT_SIZE 0x3
+
/* additions for new relocation code, must added to all boards */
#define CONFIG_SYS_SDRAM_BASE0xc000
#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x1000
- /* Fix this */ \
Could you use here some space from On-Chip RAM?
bye,
Heiko
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Re: [U-Boot] [PATCH 4/5] usbtty: init endpoints prior to startup events
Am 26.11.2011 23:25, schrieb Remy Bohmer: 2011/10/17 Stefan Herbrechtsmeiersherb...@cit-ec.uni-bielefeld.de: On some usb device controllers (pxa) the endpoint configuration must be programmed prior to enable it. Signed-off-by: Stefan Herbrechtsmeiersherb...@cit-ec.uni-bielefeld.de CC: Marek Vasutmarek.va...@gmail.com CC: Remy Bohmerli...@bohmer.net --- drivers/serial/usbtty.c |4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-) Applied to u-boot-usb I was surprised that the patch was applied without comments as it change the usbtty core behaviour and has the possibility to break other drivers. Should I CC the affected driver and board maintainer to hopefully get some feedback? Regards, Stefan ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2 1/2] TI: netdev: add driver for cpsw ethernet device
Andy,
-Original Message-
From: Andy Fleming [mailto:aflem...@gmail.com]
Sent: Friday, November 11, 2011 4:14 AM
To: Kumar Nath, Chandan
Cc: u-boot@lists.denx.de; Chemparathy, Cyril
Subject: Re: [U-Boot] [PATCH v2 1/2] TI: netdev: add driver for cpsw
ethernet device
On Thu, Nov 10, 2011 at 6:40 AM, Chandan Nath chandan.n...@ti.com
wrote:
From: Cyril Chemparathy cy...@ti.com
CPSW is an on-chip ethernet switch that is found on various SoCs from
Texas
Instruments. This patch adds a simple driver (based on the Linux
driver) for
this hardware module.
Which Linux driver is this based on?
This is based on linux CPSW driver, which is yet to be up streamed.
Signed-off-by: Cyril Chemparathy cy...@ti.com
---
Changes since v1:
- Code cleanup and removal of cpsw_eth_set_mac_addr function
drivers/net/Makefile | 1 +
drivers/net/cpsw.c | 862
++
include/netdev.h | 29 ++
3 files changed, 892 insertions(+), 0 deletions(-)
create mode 100644 drivers/net/cpsw.c
+
+#define BIT(x) (1 (x))
+#define BITMASK(bits) (BIT(bits) - 1)
+#define PHY_REG_MASK 0x1f
+#define PHY_ID_MASK 0x1f
These 4 defines seem very generic
I did not find any generic code for these definitions in arch/arm
and so keeping these definitions here.
+struct cpsw_priv {
+ struct eth_device *dev;
+ struct cpsw_platform_data data;
+ int host_port;
+
+ struct cpsw_regs *regs;
+ void *dma_regs;
+ struct cpsw_host_regs *host_port_regs;
+ void *ale_regs;
+
+ struct cpdma_desc descs[NUM_DESCS];
+ struct cpdma_desc *desc_free;
+ struct cpdma_chan rx_chan, tx_chan;
+
+ struct cpsw_slave *slaves;
+#define for_each_slave(priv, func, arg...) \
+ do { \
+ int idx; \
+ for (idx = 0; idx (priv)-data.slaves; idx++) \
+ (func)((priv)-slaves + idx, ##arg); \
+ } while (0)
+};
It seems a bit awkward to me to put a complex macro like this inside
the structure definition. After further review, I think it should also
be defined differently, more like the list macros:
#define for_each_slave(slave, priv) \
for (slave = (priv)-slaves; slave != (priv)-slaves +
(priv)-data.slaves; slave++)
It makes the code more maintainable, as the macro no longer contains
the implicit assumption that func has a slave pointer as its first
argument.
This complex macro will be separated out and will be defined like list macros
as you have
mentioned above.
+
+static inline int cpsw_ale_get_field(u32 *ale_entry, u32 start, u32
bits)
+{
+ int idx;
+
+ idx = start / 32;
+ start -= idx * 32;
+ idx = 2 - idx; /* flip */
+ return (ale_entry[idx] start) BITMASK(bits);
+}
+
+static inline void cpsw_ale_set_field(u32 *ale_entry, u32 start, u32
bits,
+ u32 value)
+{
+ int idx;
+
+ value = BITMASK(bits);
+ idx = start / 32;
+ start -= idx * 32;
+ idx = 2 - idx; /* flip */
+ ale_entry[idx] = ~(BITMASK(bits) start);
+ ale_entry[idx] |= (value start);
+}
These two functions seem both very generic, and also over-worked.
Should this be changed to a different implementation?
+
+#define DEFINE_ALE_FIELD(name, start, bits)
\
+static inline int cpsw_ale_get_##name(u32 *ale_entry)
\
+{
\
+ return cpsw_ale_get_field(ale_entry, start, bits);
\
+}
\
+static inline void cpsw_ale_set_##name(u32 *ale_entry, u32 value)
\
+{
\
+ cpsw_ale_set_field(ale_entry, start, bits, value);
\
+}
+
+DEFINE_ALE_FIELD(entry_type, 60, 2)
+DEFINE_ALE_FIELD(mcast_state, 62, 2)
+DEFINE_ALE_FIELD(port_mask, 64, 3)
+DEFINE_ALE_FIELD(ucast_type, 66, 2)
+DEFINE_ALE_FIELD(port_num, 64, 2)
+DEFINE_ALE_FIELD(blocked, 63, 1)
+DEFINE_ALE_FIELD(secure, 62, 1)
+DEFINE_ALE_FIELD(mcast, 47, 1)
+
+/* The MAC address field in the ALE entry cannot be macroized as
above */
+static inline void cpsw_ale_get_addr(u32 *ale_entry, u8 *addr)
+{
+ int i;
+
+ for (i = 0; i 6; i++)
+ addr[i] = cpsw_ale_get_field(ale_entry, 40 - 8*i, 8);
+}
+
+static inline void cpsw_ale_set_addr(u32 *ale_entry, u8 *addr)
+{
+ int i;
+
+ for (i = 0;
[U-Boot] [PATCH v3 0/3] arm, davinci: add am1808 based enbw_cmc board
repost from:
[U-Boot] [PATCH v2 0/3] arm, davinci: add am1808 based enbw_cmc board
http://lists.denx.de/pipermail/u-boot/2011-October/104399.html
Following patches are needed for this patchset
- patchset from Christian Riesch:
[U-Boot] [PATCH v3 00/15] Add an SPL to boot the da850evm from SPI
http://lists.denx.de/pipermail/u-boot/2011-November/82.html
- [U-Boot,1/2] arm, arm926ejs: always do cpu critical inits
patchwork.ozlabs.org/patch/124787/
- [U-Boot] arm, fdt: update ethernet mac address before booting Linux
http://patchwork.ozlabs.org/patch/114736/
- [U-Boot] : davinci: Replace CONFIG_PRELOADER with CONFIG_SPL_BUILD in
board/davinci/common/misc.c
http://patchwork.ozlabs.org/patch/114482/
checkpatch:
total: 0 errors, 0 warnings, 75 lines checked
2028_ml/0001-arm-davinci-move-davinci_rtc-struct-to-hardware.h.patch has no
obvious style problems and is ready for submission.
total: 0 errors, 0 warnings, 18 lines checked
2028_ml/0002-arm-davinci-da850-add-uart1-tx-rx-pinmux-config.patch has no
obvious style problems and is ready for submission.
WARNING: Use #include linux/gpio.h instead of asm/gpio.h
#223: FILE: board/enbw/enbw_cmc/enbw_cmc.c:41:
+#include asm/gpio.h
WARNING: Use #include linux/io.h instead of asm/io.h
#229: FILE: board/enbw/enbw_cmc/enbw_cmc.c:47:
+#include asm/io.h
WARNING: simple_strtoul is obsolete, use kstrtoul instead
#610: FILE: board/enbw/enbw_cmc/enbw_cmc.c:428:
+ sprintf(buf, %ld, simple_strtoul(s, NULL, 10) + 1);
ERROR: Macros with multiple statements should be enclosed in a do - while loop
#951: FILE: include/configs/enbw_cmc.h:99:
+#define CONFIG_DTT_SENSORS {0} /* Sensor addresses */
total: 1 errors, 3 warnings, 1168 lines checked
2028_ml/0003-arm-davinci-add-support-for-am1808-based-enbw_cmc-bo.patch has
style problems, please review.
If any of these errors are false positives, please report
them to the maintainer, see CHECKPATCH in MAINTAINERS.
Cc: Paulraj Sandeep s-paul...@ti.com
Cc: Albert ARIBAUD albert.u.b...@aribaud.net
Cc: Igor Grinberg grinb...@compulab.co.il
Cc: Christian Riesch christian.rie...@omicron.at
Heiko Schocher (3):
arm, davinci: move davinci_rtc struct to hardware.h
arm, davinci, da850: add uart1 tx rx pinmux config
arm, davinci: add support for am1808 based enbw_cmc board
MAINTAINERS |1 +
arch/arm/cpu/arm926ejs/davinci/da850_pinmux.c |5 +
arch/arm/include/asm/arch-davinci/hardware.h| 39 ++
arch/arm/include/asm/arch-davinci/pinmux_defs.h |1 +
board/enbw/enbw_cmc/Makefile| 51 ++
board/enbw/enbw_cmc/enbw_cmc.c | 652 +++
boards.cfg |1 +
drivers/rtc/davinci.c | 26 -
include/configs/enbw_cmc.h | 451
9 files changed, 1201 insertions(+), 26 deletions(-)
create mode 100644 board/enbw/enbw_cmc/Makefile
create mode 100644 board/enbw/enbw_cmc/enbw_cmc.c
create mode 100644 include/configs/enbw_cmc.h
--
1.7.6.4
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[U-Boot] [PATCH v3 1/3] arm, davinci: move davinci_rtc struct to hardware.h
move struct davinci_rtc to arch/arm/include/asm/arch-davinci/hardware.h
and add RTC_KICK0R_WE, RTC_KICK1R_WE defines,
so they are global useable.
Signed-off-by: Heiko Schocher h...@denx.de
Cc: Sandeep Paulraj s-paul...@ti.com
---
arch/arm/include/asm/arch-davinci/hardware.h | 39 ++
drivers/rtc/davinci.c| 26 -
2 files changed, 39 insertions(+), 26 deletions(-)
diff --git a/arch/arm/include/asm/arch-davinci/hardware.h
b/arch/arm/include/asm/arch-davinci/hardware.h
index 06819a6..dd89e84 100644
--- a/arch/arm/include/asm/arch-davinci/hardware.h
+++ b/arch/arm/include/asm/arch-davinci/hardware.h
@@ -588,4 +588,43 @@ static inline int get_async3_src(void)
#include asm/arch/syscfg_defs.h
#include asm/arch/timer_defs.h
#endif
+
+struct davinci_rtc {
+ dv_reg second;
+ dv_reg minutes;
+ dv_reg hours;
+ dv_reg day;
+ dv_reg month; /* 0x10 */
+ dv_reg year;
+ dv_reg dotw;
+ dv_reg resv1;
+ dv_reg alarmsecond; /* 0x20 */
+ dv_reg alarmminute;
+ dv_reg alarmhour;
+ dv_reg alarmday;
+ dv_reg alarmmonth; /* 0x30 */
+ dv_reg alarmyear;
+ dv_reg resv2[2];
+ dv_reg ctrl; /* 0x40 */
+ dv_reg status;
+ dv_reg irq;
+ dv_reg complsb;
+ dv_reg compmsb; /* 0x50 */
+ dv_reg osc;
+ dv_reg resv3[2];
+ dv_reg scratch0; /* 0x60 */
+ dv_reg scratch1;
+ dv_reg scratch2;
+ dv_reg kick0r;
+ dv_reg kick1r; /* 0x70 */
+};
+
+#define RTC_STATE_BUSY 0x01
+#define RTC_STATE_RUN 0x02
+
+#define RTC_KICK0R_WE 0x130be783
+#define RTC_KICK1R_WE 0xe0f1a495
+
+#define davinci_rtc_base ((struct davinci_rtc *)DAVINCI_RTC_BASE)
+
#endif /* __ASM_ARCH_HARDWARE_H */
diff --git a/drivers/rtc/davinci.c b/drivers/rtc/davinci.c
index 8436cbf..5cafff4 100644
--- a/drivers/rtc/davinci.c
+++ b/drivers/rtc/davinci.c
@@ -27,32 +27,6 @@
#include asm/arch/hardware.h
#if defined(CONFIG_CMD_DATE)
-struct davinci_rtc {
- u_int32_t second;
- u_int32_t minutes;
- u_int32_t hours;
- u_int32_t day;
- u_int32_t month; /* 0x10 */
- u_int32_t year;
- u_int32_t dotw;
- u_int32_t resv1;
- u_int32_t alarmsecond; /* 0x20 */
- u_int32_t alarmminute;
- u_int32_t alarmhour;
- u_int32_t alarmday;
- u_int32_t alarmmonth; /* 0x30 */
- u_int32_t alarmyear;
- u_int32_t resv2[2];
- u_int32_t ctrl; /* 0x40 */
- u_int32_t status;
- u_int32_t irq;
-};
-
-#define RTC_STATE_BUSY 0x01
-#define RTC_STATE_RUN 0x02
-
-#define davinci_rtc_base ((struct davinci_rtc *)DAVINCI_RTC_BASE)
-
int rtc_get(struct rtc_time *tmp)
{
struct davinci_rtc *rtc = davinci_rtc_base;
--
1.7.6.4
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[U-Boot] [PATCH v3 2/3] arm, davinci, da850: add uart1 tx rx pinmux config
Signed-off-by: Heiko Schocher h...@denx.de
Cc: Sandeep Paulraj s-paul...@ti.com
Cc: Tom Rini tom.r...@gmail.com
Cc: Albert ARIBAUD albert.u.b...@aribaud.net
Cc: Christian Riesch christian.rie...@omicron.at
---
arch/arm/cpu/arm926ejs/davinci/da850_pinmux.c |5 +
arch/arm/include/asm/arch-davinci/pinmux_defs.h |1 +
2 files changed, 6 insertions(+), 0 deletions(-)
diff --git a/arch/arm/cpu/arm926ejs/davinci/da850_pinmux.c
b/arch/arm/cpu/arm926ejs/davinci/da850_pinmux.c
index a3472ea..fa07fb5 100644
--- a/arch/arm/cpu/arm926ejs/davinci/da850_pinmux.c
+++ b/arch/arm/cpu/arm926ejs/davinci/da850_pinmux.c
@@ -35,6 +35,11 @@ const struct pinmux_config spi1_pins_scs0[] = {
};
/* UART pin muxer settings */
+const struct pinmux_config uart1_pins_txrx[] = {
+ { pinmux(4), 2, 6 }, /* UART1_RXD */
+ { pinmux(4), 2, 7 }, /* UART1_TXD */
+};
+
const struct pinmux_config uart2_pins_txrx[] = {
{ pinmux(4), 2, 4 }, /* UART2_RXD */
{ pinmux(4), 2, 5 }, /* UART2_TXD */
diff --git a/arch/arm/include/asm/arch-davinci/pinmux_defs.h
b/arch/arm/include/asm/arch-davinci/pinmux_defs.h
index 191494b..07aceaa 100644
--- a/arch/arm/include/asm/arch-davinci/pinmux_defs.h
+++ b/arch/arm/include/asm/arch-davinci/pinmux_defs.h
@@ -28,6 +28,7 @@ extern const struct pinmux_config spi1_pins_base[3];
extern const struct pinmux_config spi1_pins_scs0[1];
/* UART pin muxer settings */
+extern const struct pinmux_config uart1_pins_txrx[2];
extern const struct pinmux_config uart2_pins_txrx[2];
extern const struct pinmux_config uart2_pins_rtscts[2];
--
1.7.6.4
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[U-Boot] [PATCH v3 3/3] arm, davinci: add support for am1808 based enbw_cmc board
- booting from NOR Flash with direct boot method - POST support - LOGBUF support Signed-off-by: Heiko Schocher h...@denx.de Cc: Paulraj Sandeep s-paul...@ti.com Cc: Albert ARIBAUD albert.u.b...@aribaud.net Cc: Igor Grinberg grinb...@compulab.co.il Cc: Christian Riesch christian.rie...@omicron.at *** - changes for v2 - use CONFIG_MACH_TYPE instead setting the MACH_TYPE in board specific code, as Igor Grinberg suggested. - add logversion=2 to default Environment - Fix typo CONFIG_AM1808_LOWLEVEL as Christian Riesch suggested. - Fix comment for PLL0 and PLL1 frequency and use PLLM = 18 for PLL0 to get the 456 MHz as Christian Riesch commented. Also fix the DDR RAM timing according to the new settings from the PLL - add MMC support - enable USB PSC - correct default environment key_cmd* vars - added MAINTAINERS entry - changes for v3: - rebased to TOT commit 56b13b1e06473d189bc202eb8a541d673fd20247 - Power on required peripherals as early as possible, and do that only once. - rename defaultenvironment variable uboot to u-boot - change key_cmd_* values in the default environment - add CONFIG_FLASH_CFI_MTD - remove CONFIG_EMAC_MDIO_PHY_NUM - add GP6[1] as GPIO pin (Out[13]), value 1 - change pinmux 7_11_8 to EMA_CS4 - change pinmux 7_7_4 to EMA_CS3 - change pinmux 7_3_0 to EMA_CS2 - change UART1_CTS/RTS pin function to gpio mode - add CONFIG_SYS_DA850_LPSC_UART, CONFIG_SYS_DA850_DDR2_PBBPR and CONFIG_SYS_DA850_SYSCFG_SUSPSRC defines to board config - count all restarts in an environment variable called restartcount. - changed LED5 behaviour: - switch LED5 on as early as possible in board_gpio_init() - switch LED5 off in board_late_init() - switch LED5 on in show_boot_progress() state 1 - switch LED5 off in show_boot_progress() state 4 - switch LED5 on in show_boot_progress() state 15 - add CONFIG_SYS_DAVINCI_EMAC_PHY_COUNT - cleanup board file: - use davinci_configure_pin_mux_items() for pinmux setup - don't need CONFIG_SYS_DA850_PINMUX* anymore - based on patches from christian riesch - use gpio api for accessing LEDs, where possible - rename environment var flash_self to nand_selfnand - pass per cmdline use_dma=0 for davinci_mmc - needed patches: [U-Boot,v3,01/15] arm, davinci: Move pinmux functions from board to arch tree http://patchwork.ozlabs.org/patch/127683/ [U-Boot,v3,02/15] arm, hawkboard: Remove obsolete struct pinmux_config i2c_pins http://patchwork.ozlabs.org/patch/127678/ [U-Boot,v3,03/15] arm, da850evm: Do pinmux configuration for EMAC together with other pinmuxes http://patchwork.ozlabs.org/patch/127677/ [U-Boot,v3,04/15] arm, da850: Add pinmux configurations to the arch tree http://patchwork.ozlabs.org/patch/127689/ [U-Boot,v3,05/15] arm, da850evm: Use the pinmux configurations defined in the arch tree http://patchwork.ozlabs.org/patch/127679/ [U-Boot,v3,06/15] arm, hawkboard: Use the pinmux configurations defined in the arch tree http://patchwork.ozlabs.org/patch/127686/ [U-Boot,v3,07/15] arm, davinci: Remove duplication of pinmux configuration code http://patchwork.ozlabs.org/patch/127680/ [U-Boot,1/2] arm, arm926ejs: always do cpu critical inits patchwork.ozlabs.org/patch/124787/ [U-Boot] arm, fdt: update ethernet mac address before booting Linux http://patchwork.ozlabs.org/patch/114736/ [U-Boot] : davinci: Replace CONFIG_PRELOADER with CONFIG_SPL_BUILD in board/davinci/common/misc.c http://patchwork.ozlabs.org/patch/114482/ --- MAINTAINERS|1 + board/enbw/enbw_cmc/Makefile | 51 +++ board/enbw/enbw_cmc/enbw_cmc.c | 652 boards.cfg |1 + include/configs/enbw_cmc.h | 451 +++ 5 files changed, 1156 insertions(+), 0 deletions(-) create mode 100644 board/enbw/enbw_cmc/Makefile create mode 100644 board/enbw/enbw_cmc/enbw_cmc.c create mode 100644 include/configs/enbw_cmc.h diff --git a/MAINTAINERS b/MAINTAINERS index f6f6b72..1b49b2f 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -810,6 +810,7 @@ Jens Scharsig e...@bus-elektronik.de Heiko Schocher h...@denx.de + enbw_cmcARM926EJS (AM1808 SoC) magnesium i.MX27 mgcoge3un ARM926EJS (Kirkwood SoC) diff --git a/board/enbw/enbw_cmc/Makefile b/board/enbw/enbw_cmc/Makefile new file mode 100644 index 000..bdba069 --- /dev/null +++ b/board/enbw/enbw_cmc/Makefile @@ -0,0 +1,51 @@ +# +# (C) Copyright 2000, 2001, 2002 +# Wolfgang Denk, DENX Software Engineering, w...@denx.de. +# +# Copyright (C) 2007 Sergey Kubushyn k...@koi8.net +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your
[U-Boot] Hello. 28-11-2011.
Hello. 28-11-2011. Greetings, my name is Daniel Tsai I live in Hong Kong. I am contacting you because I want you to be my partner in a business Project of 44.5million U.S. dollars, 50% is your share. If interested, please contact me back through my private e-mail address danieltsa...@yahoo.com.hk or danielts...@aol.com I'll let you know what is to do next immediately I get your answer. Thank you. Daniel Tsai. This e-mail message, including any attachments, is for the sole use of the intended recipient(s) and may contain private, confidential and/or privileged information. Any unauthorized review, use, disclosure, or distribution is prohibited. If you are not the intended recipient, employee or agent responsible for delivering this message, please contact the sender by reply e-mail and delete all copies of the original e-mail message. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v3 0/3] arm, davinci: add am1808 based enbw_cmc board
Hi Heiko,
On 11/28/11 12:44, Heiko Schocher wrote:
repost from:
[U-Boot] [PATCH v2 0/3] arm, davinci: add am1808 based enbw_cmc board
http://lists.denx.de/pipermail/u-boot/2011-October/104399.html
Following patches are needed for this patchset
- patchset from Christian Riesch:
[U-Boot] [PATCH v3 00/15] Add an SPL to boot the da850evm from SPI
http://lists.denx.de/pipermail/u-boot/2011-November/82.html
- [U-Boot,1/2] arm, arm926ejs: always do cpu critical inits
patchwork.ozlabs.org/patch/124787/
- [U-Boot] arm, fdt: update ethernet mac address before booting Linux
http://patchwork.ozlabs.org/patch/114736/
- [U-Boot] : davinci: Replace CONFIG_PRELOADER with CONFIG_SPL_BUILD in
board/davinci/common/misc.c
http://patchwork.ozlabs.org/patch/114482/
checkpatch:
total: 0 errors, 0 warnings, 75 lines checked
2028_ml/0001-arm-davinci-move-davinci_rtc-struct-to-hardware.h.patch has
no obvious style problems and is ready for submission.
total: 0 errors, 0 warnings, 18 lines checked
2028_ml/0002-arm-davinci-da850-add-uart1-tx-rx-pinmux-config.patch has no
obvious style problems and is ready for submission.
WARNING: Use #include linux/gpio.h instead of asm/gpio.h
#223: FILE: board/enbw/enbw_cmc/enbw_cmc.c:41:
+#include asm/gpio.h
WARNING: Use #include linux/io.h instead of asm/io.h
#229: FILE: board/enbw/enbw_cmc/enbw_cmc.c:47:
+#include asm/io.h
WARNING: simple_strtoul is obsolete, use kstrtoul instead
#610: FILE: board/enbw/enbw_cmc/enbw_cmc.c:428:
+ sprintf(buf, %ld, simple_strtoul(s, NULL, 10) + 1);
ERROR: Macros with multiple statements should be enclosed in a do - while loop
#951: FILE: include/configs/enbw_cmc.h:99:
+#define CONFIG_DTT_SENSORS {0} /* Sensor addresses */
total: 1 errors, 3 warnings, 1168 lines checked
2028_ml/0003-arm-davinci-add-support-for-am1808-based-enbw_cmc-bo.patch
has style problems, please review.
If any of these errors are false positives, please report
them to the maintainer, see CHECKPATCH in MAINTAINERS.
This does not look like tools/checkpatch.pl in current U-Boot source.
Have you tried to use the tools/checkpatch.pl from current U-Boot source?
Cc: Paulraj Sandeep s-paul...@ti.com
Cc: Albert ARIBAUD albert.u.b...@aribaud.net
Cc: Igor Grinberg grinb...@compulab.co.il
Cc: Christian Riesch christian.rie...@omicron.at
Heiko Schocher (3):
arm, davinci: move davinci_rtc struct to hardware.h
arm, davinci, da850: add uart1 tx rx pinmux config
arm, davinci: add support for am1808 based enbw_cmc board
MAINTAINERS |1 +
arch/arm/cpu/arm926ejs/davinci/da850_pinmux.c |5 +
arch/arm/include/asm/arch-davinci/hardware.h| 39 ++
arch/arm/include/asm/arch-davinci/pinmux_defs.h |1 +
board/enbw/enbw_cmc/Makefile| 51 ++
board/enbw/enbw_cmc/enbw_cmc.c | 652
+++
boards.cfg |1 +
drivers/rtc/davinci.c | 26 -
include/configs/enbw_cmc.h | 451
9 files changed, 1201 insertions(+), 26 deletions(-)
create mode 100644 board/enbw/enbw_cmc/Makefile
create mode 100644 board/enbw/enbw_cmc/enbw_cmc.c
create mode 100644 include/configs/enbw_cmc.h
--
Regards,
Igor.
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Re: [U-Boot] [PATCH v6] net: ll_temac: Add LL TEMAC driver to u-boot
Stephan Linz wrote:
Am Sonntag, den 27.11.2011, 20:09 +0100 schrieb Wolfgang Denk:
Dear Stephan Linz,
In message 1322419397-26326-2-git-send-email-l...@li-pro.net you wrote:
Xilinx LocalLink Tri-Mode Ether MAC driver can be
used by Xilinx Microblaze or Xilinx ppc405/440 in
SDMA and FIFO mode. DCR or XPS bus can be used.
The driver uses and requires MII and PHYLIB.
Signed-off-by: Stephan Linz l...@li-pro.net
...
+static inline void xps_ll_temac_check_status(struct temac_reg *regs, u32 mask)
+{
+ unsigned timeout = 2000;
+ while (timeout (!(in_be32(regs-rdy) mask)))
+ timeout--;
This has been asked before: what exactly is the limit for the timeout
here? 2000 loops though that loop is not exactly a known value.
Please add some udelay() here (which is also good for triggering the
watchdog, should you have one running).
Hi Wolfgang,
I'll try to make the timeout handling more precise. Your argument with
the watchdog is an interesting issue I forget completely. Thanks for the
hint.
+ if (!timeout)
+ printf(%s: Timeout\n, __func__);
Why is this function void when you are know that you might have to
handle error situations (like a timeout)?
+static void xps_ll_temac_hostif_set(struct eth_device *dev, u8 phy_addr,
+ u8 reg_addr, u16 phy_data)
+{
+ struct temac_reg *regs = (struct temac_reg *)dev-iobase;
+
+ out_be32(regs-lsw, (phy_data LSW_REGDAT_MASK));
+ out_be32(regs-ctl, CTL_WEN | TEMAC_MIIMWD);
+ out_be32(regs-lsw,
+ ((phy_addr LSW_PHYAD_POS) LSW_PHYAD_MASK) |
+ (reg_addr LSW_REGAD_MASK));
+ out_be32(regs-ctl, CTL_WEN | TEMAC_MIIMAI);
+ xps_ll_temac_check_status(regs, RSE_MIIM_WR);
+}
So what happens here if we have a timeout in
xps_ll_temac_check_status()? SHould such an error not be handled?
Yes we should. I'll fix it.
+ * Undirect hostif read to ll_temac.
Undirect?? Or Indirect ?
read to?? Or read from ?
Please fix globally.
yep.
+#ifdef DEBUG
+static inline void read_phy_reg(struct eth_device *dev, u8 phy_addr)
+{
+ int j, result;
+ debug(phy%d , phy_addr);
Please always have one blank line between declarations and code.
Please fix globally.
yep.
+ if (ll_temac-ctrlreset)
+ if (ll_temac-ctrlreset(dev))
+ return -1;
Braces needed for multiline statements. Please fix globally.
yep.
+/* halt device */
+static void ll_temac_halt(struct eth_device *dev)
+{
+#ifdef ETH_HALTING
+ struct ll_temac *ll_temac = dev-priv;
+
+ /* Disable Receiver */
+ xps_ll_temac_indirect_set(dev, TEMAC_RCW0, 0);
+
+ /* Disable Transmitter */
+ xps_ll_temac_indirect_set(dev, TEMAC_TC, 0);
+
+ if (ll_temac-ctrlhalt)
+ ll_temac-ctrlhalt(dev);
+#endif
+}
ETH_HALTING is permanently undef'ed, so all this is dead code. Please
remove.
@Michal: Is there any platform which can not halt the TEMAC? I have no
problem with this code but I left ETH_HALTING undefined from original
driver code. I would like to remove all the ETH_HALTING statements and
hold this code.
+static int ll_temac_bus_reset(struct mii_dev *bus)
+{
+ debug(Just bus reset\n);
+ return 0;
+}
Can we remove this function? It does not appear to perform any useful
operation?
@Michal: Have you any objections?
@all: What is the meaning of mii_dev bus reset? What is expacted from
the perspective of the MII driver code?
It was necessary before this patch.
phylib: reset mii bus only if reset handler is registered
sha1: e3a77218a256edbe201112a39beeed8adcabae3f
Currently you can simple remove.
Michal
--
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w: www.monstr.eu p: +42-0-721842854
Maintainer of Linux kernel 2.6 Microblaze Linux - http://www.monstr.eu/fdt/
Microblaze U-BOOT custodian
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Re: [U-Boot] [PATCH v6] net: ll_temac: Add LL TEMAC driver to u-boot
Stephan Linz wrote:
Am Sonntag, den 27.11.2011, 20:09 +0100 schrieb Wolfgang Denk:
Dear Stephan Linz,
In message 1322419397-26326-2-git-send-email-l...@li-pro.net you wrote:
Xilinx LocalLink Tri-Mode Ether MAC driver can be
used by Xilinx Microblaze or Xilinx ppc405/440 in
SDMA and FIFO mode. DCR or XPS bus can be used.
The driver uses and requires MII and PHYLIB.
Signed-off-by: Stephan Linz l...@li-pro.net
...
+static inline void xps_ll_temac_check_status(struct temac_reg *regs, u32 mask)
+{
+ unsigned timeout = 2000;
+ while (timeout (!(in_be32(regs-rdy) mask)))
+ timeout--;
This has been asked before: what exactly is the limit for the timeout
here? 2000 loops though that loop is not exactly a known value.
Please add some udelay() here (which is also good for triggering the
watchdog, should you have one running).
Hi Wolfgang,
I'll try to make the timeout handling more precise. Your argument with
the watchdog is an interesting issue I forget completely. Thanks for the
hint.
+ if (!timeout)
+ printf(%s: Timeout\n, __func__);
Why is this function void when you are know that you might have to
handle error situations (like a timeout)?
+static void xps_ll_temac_hostif_set(struct eth_device *dev, u8 phy_addr,
+ u8 reg_addr, u16 phy_data)
+{
+ struct temac_reg *regs = (struct temac_reg *)dev-iobase;
+
+ out_be32(regs-lsw, (phy_data LSW_REGDAT_MASK));
+ out_be32(regs-ctl, CTL_WEN | TEMAC_MIIMWD);
+ out_be32(regs-lsw,
+ ((phy_addr LSW_PHYAD_POS) LSW_PHYAD_MASK) |
+ (reg_addr LSW_REGAD_MASK));
+ out_be32(regs-ctl, CTL_WEN | TEMAC_MIIMAI);
+ xps_ll_temac_check_status(regs, RSE_MIIM_WR);
+}
So what happens here if we have a timeout in
xps_ll_temac_check_status()? SHould such an error not be handled?
Yes we should. I'll fix it.
+ * Undirect hostif read to ll_temac.
Undirect?? Or Indirect ?
read to?? Or read from ?
Please fix globally.
yep.
+#ifdef DEBUG
+static inline void read_phy_reg(struct eth_device *dev, u8 phy_addr)
+{
+ int j, result;
+ debug(phy%d , phy_addr);
Please always have one blank line between declarations and code.
Please fix globally.
yep.
+ if (ll_temac-ctrlreset)
+ if (ll_temac-ctrlreset(dev))
+ return -1;
Braces needed for multiline statements. Please fix globally.
yep.
+/* halt device */
+static void ll_temac_halt(struct eth_device *dev)
+{
+#ifdef ETH_HALTING
+ struct ll_temac *ll_temac = dev-priv;
+
+ /* Disable Receiver */
+ xps_ll_temac_indirect_set(dev, TEMAC_RCW0, 0);
+
+ /* Disable Transmitter */
+ xps_ll_temac_indirect_set(dev, TEMAC_TC, 0);
+
+ if (ll_temac-ctrlhalt)
+ ll_temac-ctrlhalt(dev);
+#endif
+}
ETH_HALTING is permanently undef'ed, so all this is dead code. Please
remove.
@Michal: Is there any platform which can not halt the TEMAC? I have no
problem with this code but I left ETH_HALTING undefined from original
driver code. I would like to remove all the ETH_HALTING statements and
hold this code.
I am not aware about any problem with halting. I had it there for debugging
purpose. You can simple remove ETH_HALTING statemets.
Michal
--
Michal Simek, Ing. (M.Eng)
w: www.monstr.eu p: +42-0-721842854
Maintainer of Linux kernel 2.6 Microblaze Linux - http://www.monstr.eu/fdt/
Microblaze U-BOOT custodian
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Re: [U-Boot] [PATCHv3 1/3] ARM: OMAP3: Remove unused define CONFIG_OMAP3430
Thomas Weber wrote: This patch removes the CONFIG_OMAP3430, because it is unused. Acked-by: Enric Balletbo i Serraeballe...@iseebcn.com Acked-by: Tom Rinitr...@ti.com Acked-by: Igor Grinberggrinb...@compulab.co.il Signed-off-by: Thomas Weberwe...@corscience.de Acked-by: Luca Ceresoli luca.ceres...@comelit.it But please check my name spelling in Cc:, as I received only one of your v3 patches. Thanks. Luca ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCHv3 2/3] ARM: OMAP3: Remove unused define SDRC_R_C_B
Thomas Weber wrote: This patch removes the unused definition of SDRC_R_C_B from the config files. Acked-by: Enric Balletbo i Serraeballe...@iseebcn.com Acked-by: Igor Grinberggrinb...@compulab.co.il Signed-off-by: Thomas Weberwe...@corscience.de Acked-by: Luca Ceresoli luca.ceres...@comelit.it Luca ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCHv3 3/3] ARM: OMAP: Remove STACKSIZE for IRQ and FIQ if unused
Thomas Weber wrote: This patch removes the definition of stack sizes for irq and fiq if the CONFIG_USE_IRQ is undefined before. Acked-by: Enric Balletbo i Serraeballe...@iseebcn.com Acked-by: Tom Rinitr...@ti.com Acked-by: Igor Grinberggrinb...@compulab.co.il Signed-off-by: Thomas Weberwe...@corscience.de This does not touch the board I maintain, but since I was in Cc:, and I successfully tested the whole series on my board: Acked-by: Luca Ceresoli luca.ceres...@comelit.it Luca ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] LL TEMAC V6 refactored
Stephan Linz wrote: @Michal: please, can you test this code on Xilinx PPC4xx platforms and acknowledge the results? I have no access to a ml405 and ml507. Note: To use the driver on Microblaze, you will need additional platform patches by Michal Simek: - http://patchwork.ozlabs.org/patch/112535/ - http://patchwork.ozlabs.org/patch/112534/ - http://patchwork.ozlabs.org/patch/112532/ I will collect all related patches on a public bundle: - http://patchwork.ozlabs.org/bundle/rexut/net-ll_temac/ I will test it on ppc board when none has any objection about the code. Thanks, Michal -- Michal Simek, Ing. (M.Eng) w: www.monstr.eu p: +42-0-721842854 Maintainer of Linux kernel 2.6 Microblaze Linux - http://www.monstr.eu/fdt/ Microblaze U-BOOT custodian ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v3 3/3] arm, davinci: add support for am1808 based enbw_cmc board
Hi Heiko, On 11/28/11 12:44, Heiko Schocher wrote: - booting from NOR Flash with direct boot method - POST support - LOGBUF support Signed-off-by: Heiko Schocher h...@denx.de Cc: Paulraj Sandeep s-paul...@ti.com Cc: Albert ARIBAUD albert.u.b...@aribaud.net Cc: Igor Grinberg grinb...@compulab.co.il Cc: Christian Riesch christian.rie...@omicron.at *** - changes for v2 - use CONFIG_MACH_TYPE instead setting the MACH_TYPE in board specific code, as Igor Grinberg suggested. - add logversion=2 to default Environment - Fix typo CONFIG_AM1808_LOWLEVEL as Christian Riesch suggested. - Fix comment for PLL0 and PLL1 frequency and use PLLM = 18 for PLL0 to get the 456 MHz as Christian Riesch commented. Also fix the DDR RAM timing according to the new settings from the PLL - add MMC support - enable USB PSC - correct default environment key_cmd* vars - added MAINTAINERS entry - changes for v3: - rebased to TOT commit 56b13b1e06473d189bc202eb8a541d673fd20247 - Power on required peripherals as early as possible, and do that only once. - rename defaultenvironment variable uboot to u-boot - change key_cmd_* values in the default environment - add CONFIG_FLASH_CFI_MTD - remove CONFIG_EMAC_MDIO_PHY_NUM - add GP6[1] as GPIO pin (Out[13]), value 1 - change pinmux 7_11_8 to EMA_CS4 - change pinmux 7_7_4 to EMA_CS3 - change pinmux 7_3_0 to EMA_CS2 - change UART1_CTS/RTS pin function to gpio mode - add CONFIG_SYS_DA850_LPSC_UART, CONFIG_SYS_DA850_DDR2_PBBPR and CONFIG_SYS_DA850_SYSCFG_SUSPSRC defines to board config - count all restarts in an environment variable called restartcount. - changed LED5 behaviour: - switch LED5 on as early as possible in board_gpio_init() - switch LED5 off in board_late_init() - switch LED5 on in show_boot_progress() state 1 - switch LED5 off in show_boot_progress() state 4 - switch LED5 on in show_boot_progress() state 15 - add CONFIG_SYS_DAVINCI_EMAC_PHY_COUNT - cleanup board file: - use davinci_configure_pin_mux_items() for pinmux setup - don't need CONFIG_SYS_DA850_PINMUX* anymore - based on patches from christian riesch - use gpio api for accessing LEDs, where possible - rename environment var flash_self to nand_selfnand - pass per cmdline use_dma=0 for davinci_mmc - needed patches: [U-Boot,v3,01/15] arm, davinci: Move pinmux functions from board to arch tree http://patchwork.ozlabs.org/patch/127683/ [U-Boot,v3,02/15] arm, hawkboard: Remove obsolete struct pinmux_config i2c_pins http://patchwork.ozlabs.org/patch/127678/ [U-Boot,v3,03/15] arm, da850evm: Do pinmux configuration for EMAC together with other pinmuxes http://patchwork.ozlabs.org/patch/127677/ [U-Boot,v3,04/15] arm, da850: Add pinmux configurations to the arch tree http://patchwork.ozlabs.org/patch/127689/ [U-Boot,v3,05/15] arm, da850evm: Use the pinmux configurations defined in the arch tree http://patchwork.ozlabs.org/patch/127679/ [U-Boot,v3,06/15] arm, hawkboard: Use the pinmux configurations defined in the arch tree http://patchwork.ozlabs.org/patch/127686/ [U-Boot,v3,07/15] arm, davinci: Remove duplication of pinmux configuration code http://patchwork.ozlabs.org/patch/127680/ [U-Boot,1/2] arm, arm926ejs: always do cpu critical inits patchwork.ozlabs.org/patch/124787/ [U-Boot] arm, fdt: update ethernet mac address before booting Linux http://patchwork.ozlabs.org/patch/114736/ [U-Boot] : davinci: Replace CONFIG_PRELOADER with CONFIG_SPL_BUILD in board/davinci/common/misc.c http://patchwork.ozlabs.org/patch/114482/ --- MAINTAINERS|1 + board/enbw/enbw_cmc/Makefile | 51 +++ board/enbw/enbw_cmc/enbw_cmc.c | 652 boards.cfg |1 + include/configs/enbw_cmc.h | 451 +++ 5 files changed, 1156 insertions(+), 0 deletions(-) create mode 100644 board/enbw/enbw_cmc/Makefile create mode 100644 board/enbw/enbw_cmc/enbw_cmc.c create mode 100644 include/configs/enbw_cmc.h diff --git a/MAINTAINERS b/MAINTAINERS index f6f6b72..1b49b2f 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -810,6 +810,7 @@ Jens Scharsig e...@bus-elektronik.de Heiko Schocher h...@denx.de + enbw_cmcARM926EJS (AM1808 SoC) magnesium i.MX27 mgcoge3un ARM926EJS (Kirkwood SoC) diff --git a/board/enbw/enbw_cmc/Makefile b/board/enbw/enbw_cmc/Makefile new file mode 100644 index 000..bdba069 --- /dev/null +++ b/board/enbw/enbw_cmc/Makefile @@ -0,0 +1,51 @@ +# +# (C) Copyright 2000, 2001, 2002 +# Wolfgang Denk, DENX Software Engineering, w...@denx.de. +# +# Copyright (C) 2007 Sergey Kubushyn k...@koi8.net +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you
Re: [U-Boot] [PATCH] Blackfin: br4: new board port
Dear Wolfgang Denk, Dear Mike Frysinger, +#define CONFIG_HOSTNAME br4 +#define CONFIG_IPADDR 192.168.1.100 +#define CONFIG_GATEWAYIP 192.168.1.1 +#define CONFIG_SERVERIP 192.168.1.2 +#define CONFIG_TFTP_BLOCKSIZE 4404 NAK. i'm guessing you're only NAK-ing the middle three lines Right. I have to admit that I'm not sure i having the last ine is a clever idea, but in any case it's not my problem. I have not dug in the code to understand the impact in details but what I have observed is that the tftp transfer in our local network is getting speeded up few times with the last line added. It is for the files in the 10 MB size range in case it matters. Probably you can just mention the expected negative side of this line? Thank you Dimitar Penev Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de He'd heard her use that sweet, innocent tone of voice before. It meant that, pretty soon, there was going to be trouble. - Terry Pratchett, _Truckers_ ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [RFC/PATCH] davinci: disable dcache on boards with EMAC
Hi, On Sun, Nov 27, 2011 at 5:41 PM, Tom Rini tom.r...@gmail.com wrote: On Sun, Nov 27, 2011 at 8:09 AM, Wolfgang Denk w...@denx.de wrote: In message 1321048618-20616-1-git-send-email-ya...@emcraft.com you wrote: DaVinci EMAC driver has no support for running with D-Cache enabled so disable D-Cache on all DaVinci boards with EMAC device. Signed-off-by: Ilya Yanok ya...@emcraft.com --- I can't test it on any DaVinci boards right now but my understanding is that currently EMAC driver can't work properly with D-Cache enabled. [...] Why do we have to permanently disable the data cache just because the network driver is broken? USB is also broken, and probably other drivers as well. To be clear, the problem is that today the driver is broken (not cache safe) and this series of patches fixes that problem. In doing so we expose that arm926ejs doesn't have complete cache support today. What do you mean by broken? Is it never working or is it working sometimes or not working under specific conditions? I have a DA850 based board and I use the Davinci EMAC driver (CONFIG_DRIVER_TI_EMAC). I don't have these CONFIG_SYS_xCACHE_OFF defines in my board config file so I guess D-Cache is enabled. But Ethernet works fine, so what am I missing here? Is D-Cache disabled somewhere else? Regards, Christian ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] practicality of demonstrating u-boot in a QEMU session?
i'm teaching some embedded linux next week and, while i will have physical boards for the students to play with, i'd also like to demonstrate basic u-boot within a QEMU session as far as that's practical. the boards themselves will be powerpc-based lite5200 (icecube) systems all currently populated with u-boot (some old versions, some newer) so certainly they'll have u-boot on the systems when the time comes to start running them. regarding the QEMU session, i get the impression that QEMU and powerpc still have problems but, if it's a QEMU session, i'm free to choose the architecture so picking ARM is probably a good bet. i found a couple useful articles online: http://balau82.wordpress.com/2010/03/10/u-boot-for-arm-on-qemu/ http://balau82.wordpress.com/2010/04/12/booting-linux-with-u-boot-on-qemu-arm/ so i can use them as a starting point, but both of them are well over a year old so i'm wondering if there's a more recent, canonical online explanation of emulating u-boot in a QEMU session just for demo purposes, and at what point the emulation breaks down given the lack of actual underlying hardware. thanks for any pointers. i've never tried u-boot in a QEMU session before; hence the fairly intro-level request for help. rday -- Robert P. J. Day Ottawa, Ontario, CANADA http://crashcourse.ca Twitter: http://twitter.com/rpjday LinkedIn: http://ca.linkedin.com/in/rpjday ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] vision2: Fix checkpatch warning -- added to next
Hi Fabio,
Le 21/11/2011 16:57, Fabio Estevam a écrit :
Fix the following checkpatch warning:
WARNING: braces {} are not necessary for single statement blocks
Signed-off-by: Fabio Estevamfabio.este...@freescale.com
---
board/ttcontrol/vision2/vision2.c |3 +--
1 files changed, 1 insertions(+), 2 deletions(-)
diff --git a/board/ttcontrol/vision2/vision2.c
b/board/ttcontrol/vision2/vision2.c
index f556d30..282de95 100644
--- a/board/ttcontrol/vision2/vision2.c
+++ b/board/ttcontrol/vision2/vision2.c
@@ -428,9 +428,8 @@ static void setup_gpios(void)
gpio_direction_output(4, 1);
gpio_direction_output(7, 0);
- for (i = 65; i 71; i++) {
+ for (i = 65; i 71; i++)
gpio_direction_output(i, 0);
- }
gpio_direction_output(94, 0);
(chose to add to next as it is not a bugfix per se; vision2 builds fine
already without this patch)
Added to u-boot-arm/next, thanks!
Amicalement,
--
Albert.
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Re: [U-Boot] [RFC/PATCH] davinci: disable dcache on boards with EMAC
Hi all, Le 27/11/2011 20:36, Wolfgang Denk a écrit : Don't you think that adding stub implementation for cache functions on arm926ejs and fixing the driver is better? Yes, that would be the 4th approach, listed as much better :-) Better yet, have an ARM-wide, not only ARM926EJ-S, cache framework with a hierarchy of cache function implementations, from ARM architectures to Cores / SoCs or even boards. My general idea is that: - each ISA (ARMv4/5/4/7/etc) should provide generic implementations for cache handling functions to all cores, SoCs, boards that use this ISA, and that implementation should be used by default; - each core / SoC should be able to easily provide specific cache function variants to all boards based on it, on a function granularity (i.e. reuse as much of the ISA cache handling code as possible); - maybe a board should be able to easily provide specific cache functions as well; - the cache API should hide L1 / L2 intricacies at the client level, i.e. a driver that wants to flush to memory should just call 'cache_flush_range(address, size)' without wondering which caches the board provides; - global cache enable/disable/flush (as opposed to cache range) should be used only in very few cases (init and exit, meaning U-Boot startup and jum-to-OS cases). The system of 'overloading' between lib, ISA and SoC / Core could be achieved through weak symbols maybe, or a set of CONFIG variables, e.g. CONFIG_ARM_CACHE_FLUSH would be set to the name of the function to use for cache flushing, etc. However, I have very little time ATM even to try and keep up with patches and pull reqs, so I simply cannot submit any code for ARM cache handling. Thus anyone wishing to submit code along the lines above, or provide an RFC if they feel there is a better approach, is more than welcome, and I *promise* I'll give such submissions first priority -- at which point I suggest making sure I am in the To: list of the patch submission mails. Best regards, Wolfgang Denk Amicalement, -- Albert. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] MIPS: fix endianess handling
Make endianess of target CPU configurable. Use the new config option for dbau1550_el and pb1000 boards. Adapt linking of standalone applications to pass through endianess options to LD. Build tested with: - ELDK 4 mips_4KC- and mips4KCle - Sourcery CodeBench Lite 2011.03-93 Signed-off-by: Daniel Schwierzeck daniel.schwierz...@googlemail.com Cc: Thomas Lange tho...@corelatus.se Cc: Mike Frysinger vap...@gentoo.org Cc: Wolfgang Denk w...@denx.de --- Another try to finally fix this originated by discussion: [1] http://thread.gmane.org/gmane.comp.boot-loaders.u-boot/118111/focus=118122 Related discussions: [2] http://thread.gmane.org/gmane.comp.boot-loaders.u-boot/81572 [3] http://thread.gmane.org/gmane.comp.boot-loaders.u-boot/45404 README |6 ++ arch/mips/cpu/mips32/config.mk | 21 +++-- boards.cfg |4 ++-- examples/standalone/Makefile |6 +- 4 files changed, 28 insertions(+), 9 deletions(-) diff --git a/README b/README index 07f1d11..468bfdf 100644 --- a/README +++ b/README @@ -374,6 +374,12 @@ The following options need to be configured: Defines the string to utilize when trying to match PCIe device tree nodes for the given platform. +- Generic CPU options: + CONFIG_SYS_BIG_ENDIAN, CONFIG_SYS_LITTLE_ENDIAN + + Defines the endianess of the CPU. Implementation of those + values is arch specific. + - Intel Monahans options: CONFIG_SYS_MONAHANS_RUN_MODE_OSC_RATIO diff --git a/arch/mips/cpu/mips32/config.mk b/arch/mips/cpu/mips32/config.mk index 4d1b273..a1cd590 100644 --- a/arch/mips/cpu/mips32/config.mk +++ b/arch/mips/cpu/mips32/config.mk @@ -27,14 +27,23 @@ # Note: Toolchains with binutils prior to v2.16 # are no longer supported by U-Boot MIPS tree! # -MIPSFLAGS = -march=mips32r2 +MIPSFLAGS := -march=mips32r2 +# Handle special prefix in ELDK 4.0 toolchain ifneq (,$(findstring 4KCle,$(CROSS_COMPILE))) -ENDIANNESS = -EL -else -ENDIANNESS = -EB +ENDIANNESS := -EL endif -MIPSFLAGS += $(ENDIANNESS) +ifdef CONFIG_SYS_LITTLE_ENDIAN +ENDIANNESS := -EL +endif + +ifdef CONFIG_SYS_BIG_ENDIAN +ENDIANNESS := -EB +endif + +# Default to EB if no endianess is configured +ENDIANNESS ?= -EB -PLATFORM_CPPFLAGS += $(MIPSFLAGS) +PLATFORM_CPPFLAGS += $(MIPSFLAGS) $(ENDIANNESS) +PLATFORM_LDFLAGS += $(ENDIANNESS) diff --git a/boards.cfg b/boards.cfg index c83d861..2cd917e 100644 --- a/boards.cfg +++ b/boards.cfg @@ -324,13 +324,13 @@ dbau1000 mipsmips32 dbau1x00- dbau1100 mipsmips32 dbau1x00- au1x00 dbau1x00:DBAU1100 dbau1500 mipsmips32 dbau1x00- au1x00 dbau1x00:DBAU1500 dbau1550 mipsmips32 dbau1x00- au1x00 dbau1x00:DBAU1550 -dbau1550_el mipsmips32 dbau1x00- au1x00 dbau1x00:DBAU1550 +dbau1550_el mipsmips32 dbau1x00- au1x00 dbau1x00:DBAU1550,SYS_LITTLE_ENDIAN gth2 mipsmips32 - - au1x00 incaip mipsmips32 incaip - incaip incaip_100MHzmipsmips32 incaip - incaip incaip:CPU_CLOCK_RATE=1 incaip_133MHzmipsmips32 incaip - incaip incaip:CPU_CLOCK_RATE=13300 incaip_150MHzmipsmips32 incaip - incaip incaip:CPU_CLOCK_RATE=15000 -pb1000 mipsmips32 pb1x00 - au1x00 pb1x00:PB1000 +pb1000 mipsmips32 pb1x00 - au1x00 pb1x00:PB1000,SYS_LITTLE_ENDIAN qemu_mipsmipsmips32 qemu-mips - - qemu-mips tb0229 mipsmips32 vct_premium mipsmips32 vct micronas - vct:VCT_PREMIUM diff --git a/examples/standalone/Makefile b/examples/standalone/Makefile index e23865b..eab23b4 100644 --- a/examples/standalone/Makefile +++ b/examples/standalone/Makefile @@ -88,6 +88,10 @@ endif CFLAGS_NTR := $(call cc-option,-fno-toplevel-reorder) CFLAGS += $(CFLAGS_NTR) +# Pass through endianess settings in LDFLAGS to LD +LDFLAGS_ENDIAN += $(filter -EB,$(LDFLAGS)) +LDFLAGS_ENDIAN += $(filter -EL,$(LDFLAGS)) + all: $(obj).depend $(OBJS) $(LIB) $(SREC) $(BIN) $(ELF) # @@ -96,7 +100,7 @@ $(LIB): $(obj).depend $(LIBOBJS) $(ELF):
[U-Boot] [PATCH] OMAP3: Change devkit8000 maintainer
Signed-off-by: Thomas Weber we...@corscience.de --- MAINTAINERS |8 1 files changed, 4 insertions(+), 4 deletions(-) diff --git a/MAINTAINERS b/MAINTAINERS index f6f6b72..6ea465d 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -696,10 +696,6 @@ Chander Kashyap k.chan...@samsung.com Torsten Koschorrek koschor...@synertronixx.de scb9328 ARM920T (i.MXL) -Frederik Kriewitz frede...@kriewitz.eu - - devkit8000 ARM ARMV7 (OMAP3530 SoC) - Sergey Kubushyn k...@koi8.net DV-EVM ARM926EJS @@ -876,6 +872,10 @@ Tom Warren twar...@nvidia.com harmony Tegra2 (ARM7 A9 Dual Core) seaboardTegra2 (ARM7 A9 Dual Core) +Thomas Weber we...@corscience.de + + devkit8000 ARM ARMV7 (OMAP3530 SoC) + Lei Wen lei...@marvell.com dkb ARM926EJS (PANTHEON 88AP920 SOC) -- 1.7.8.rc3 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] sdhc_boot: Make mmc_get_env_addr dependant on CONFIG_FSL_ESDHC
Since commit 97039ab98 (env_mmc: Allow board code to override the environment
address)
mmc_get_env_addr is a weak-aliased function in common/env_mmc.c
board/freescale/common/sdhc_boot.c also defines mmc_get_env_addr, but this
should be
dependant on CONFIG_FSL_ESDHC.
Add this protection in the mmc_get_env_addr definition in sdhc_boot.c.
This fixes the retrieval of CONFIG_ENV_OFFSET on i.MX28.
Signed-off-by: Fabio Estevam fabio.este...@freescale.com
---
board/freescale/common/sdhc_boot.c |2 ++
1 files changed, 2 insertions(+), 0 deletions(-)
diff --git a/board/freescale/common/sdhc_boot.c
b/board/freescale/common/sdhc_boot.c
index e432318..1d7ff1e 100644
--- a/board/freescale/common/sdhc_boot.c
+++ b/board/freescale/common/sdhc_boot.c
@@ -32,6 +32,7 @@
#define ESDHC_BOOT_IMAGE_SIZE 0x48
#define ESDHC_BOOT_IMAGE_ADDR 0x50
+#if defined(CONFIG_FSL_ESDHC)
int mmc_get_env_addr(struct mmc *mmc, u32 *env_addr)
{
u8 *tmp_buf;
@@ -60,4 +61,5 @@ int mmc_get_env_addr(struct mmc *mmc, u32 *env_addr)
free(tmp_buf);
return 0;
+#endif
}
--
1.7.1
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Re: [U-Boot] [PATCH 1/2] TI: netdev: add driver for cpsw ethernet device
On Mon, Nov 28, 2011 at 1:23 AM, Kumar Nath, Chandan chandan.n...@ti.com wrote: Tom, Can we do cache enabling of cpsw as a follow up patch to this? As, initial aim is to upstream basic cpsw functional driver first and then follow on other features like you said cache enable etc. Per Wolfgang in the davinci emac thread, no, no new enet drivers that aren't cache safe. -- Tom ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCHv3 2/3] ARM: OMAP3: Remove unused define SDRC_R_C_B
On 11/26/2011 01:30 PM, Thomas Weber wrote: This patch removes the unused definition of SDRC_R_C_B from the config files. Acked-by: Enric Balletbo i Serra eballe...@iseebcn.com Acked-by: Igor Grinberg grinb...@compulab.co.il Signed-off-by: Thomas Weber we...@corscience.de Acked-by: Tom Rini tr...@ti.com -- Tom ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [RFC/PATCH] davinci: disable dcache on boards with EMAC
On Mon, Nov 28, 2011 at 5:06 AM, Christian Riesch christian.rie...@omicron.at wrote: Hi, On Sun, Nov 27, 2011 at 5:41 PM, Tom Rini tom.r...@gmail.com wrote: On Sun, Nov 27, 2011 at 8:09 AM, Wolfgang Denk w...@denx.de wrote: In message 1321048618-20616-1-git-send-email-ya...@emcraft.com you wrote: DaVinci EMAC driver has no support for running with D-Cache enabled so disable D-Cache on all DaVinci boards with EMAC device. Signed-off-by: Ilya Yanok ya...@emcraft.com --- I can't test it on any DaVinci boards right now but my understanding is that currently EMAC driver can't work properly with D-Cache enabled. [...] Why do we have to permanently disable the data cache just because the network driver is broken? USB is also broken, and probably other drivers as well. To be clear, the problem is that today the driver is broken (not cache safe) and this series of patches fixes that problem. In doing so we expose that arm926ejs doesn't have complete cache support today. What do you mean by broken? Is it never working or is it working sometimes or not working under specific conditions? I have a DA850 based board and I use the Davinci EMAC driver (CONFIG_DRIVER_TI_EMAC). I don't have these CONFIG_SYS_xCACHE_OFF defines in my board config file so I guess D-Cache is enabled. But Ethernet works fine, so what am I missing here? Is D-Cache disabled somewhere else? Today, right now? I tried a dm365evm back in August on top-of-tree and emac didn't work until I disabled caches. I don't have day-to-day access to that board however to confirm the current state. -- Tom ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v3 2/3] arm, davinci, da850: add uart1 tx rx pinmux config
On Mon, Nov 28, 2011 at 3:44 AM, Heiko Schocher h...@denx.de wrote:
Signed-off-by: Heiko Schocher h...@denx.de
Cc: Sandeep Paulraj s-paul...@ti.com
Cc: Tom Rini tom.r...@gmail.com
Cc: Albert ARIBAUD albert.u.b...@aribaud.net
Cc: Christian Riesch christian.rie...@omicron.at
Acked-by: Tom Rini tr...@ti.com
---
arch/arm/cpu/arm926ejs/davinci/da850_pinmux.c | 5 +
arch/arm/include/asm/arch-davinci/pinmux_defs.h | 1 +
2 files changed, 6 insertions(+), 0 deletions(-)
diff --git a/arch/arm/cpu/arm926ejs/davinci/da850_pinmux.c
b/arch/arm/cpu/arm926ejs/davinci/da850_pinmux.c
index a3472ea..fa07fb5 100644
--- a/arch/arm/cpu/arm926ejs/davinci/da850_pinmux.c
+++ b/arch/arm/cpu/arm926ejs/davinci/da850_pinmux.c
@@ -35,6 +35,11 @@ const struct pinmux_config spi1_pins_scs0[] = {
};
/* UART pin muxer settings */
+const struct pinmux_config uart1_pins_txrx[] = {
+ { pinmux(4), 2, 6 }, /* UART1_RXD */
+ { pinmux(4), 2, 7 }, /* UART1_TXD */
+};
+
const struct pinmux_config uart2_pins_txrx[] = {
{ pinmux(4), 2, 4 }, /* UART2_RXD */
{ pinmux(4), 2, 5 }, /* UART2_TXD */
diff --git a/arch/arm/include/asm/arch-davinci/pinmux_defs.h
b/arch/arm/include/asm/arch-davinci/pinmux_defs.h
index 191494b..07aceaa 100644
--- a/arch/arm/include/asm/arch-davinci/pinmux_defs.h
+++ b/arch/arm/include/asm/arch-davinci/pinmux_defs.h
@@ -28,6 +28,7 @@ extern const struct pinmux_config spi1_pins_base[3];
extern const struct pinmux_config spi1_pins_scs0[1];
/* UART pin muxer settings */
+extern const struct pinmux_config uart1_pins_txrx[2];
extern const struct pinmux_config uart2_pins_txrx[2];
extern const struct pinmux_config uart2_pins_rtscts[2];
--
1.7.6.4
--
Tom
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Re: [U-Boot] [PATCH] Blackfin: br4: new board port
Dear Dimitar Penev, In message 003601ccada7$ce75c4b0$2901a8c0@dpn you wrote: I will try to fix my mail client and use plain text as it is explained for the future. You don't even need to fix your mail client. Just use git send-email. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de A memorandum is written not to inform the reader, but to protect the writer. -- Dean Acheson ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] tools/envcrc: fix compile breakage
Dear Igor Grinberg, In message 4ed34e9b.7040...@compulab.co.il you wrote: Hm... the fix seems wrong to me. What happens now if ENV_IS_EMBEDDED is set, but CONFIG_BUILD_ENVCRC is _not_ set? Well, you should look into that file... It's faster for me to ask you to do that :-) Did this change pass a MAKEALL for example for ppc? I don't have the tool chain for ppc. I think the original fix has been tested by Stefano. Is there a requirement to have all the supported architectures tool chains, for submitting patches? Not for all, but http://www.denx.de/wiki/U-Boot/Patches says Please also run MAKEALL for _at_least_one_other_architecture_ than the one you made your modifications in. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de They that can give up essential liberty to obtain a little temporary saftey deserve neither liberty not saftey. - Benjamin Franklin, 1759 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v3 3/3] arm, davinci: add support for am1808 based enbw_cmc board
Hello Igor,
Igor Grinberg wrote:
Hi Heiko,
On 11/28/11 12:44, Heiko Schocher wrote:
- booting from NOR Flash with direct boot method
- POST support
- LOGBUF support
Signed-off-by: Heiko Schocher h...@denx.de
Cc: Paulraj Sandeep s-paul...@ti.com
Cc: Albert ARIBAUD albert.u.b...@aribaud.net
Cc: Igor Grinberg grinb...@compulab.co.il
Cc: Christian Riesch christian.rie...@omicron.at
***
[...]
diff --git a/board/enbw/enbw_cmc/Makefile b/board/enbw/enbw_cmc/Makefile
new file mode 100644
index 000..bdba069
--- /dev/null
+++ b/board/enbw/enbw_cmc/Makefile
@@ -0,0 +1,51 @@
[...]
+clean:
+rm -f $(SOBJS) $(OBJS)
+
+distclean: clean
+rm -f $(LIB) core *.bak *~ .depend
clean and distclean on that directory level should be gone.
fixed, thanks!
+
+#
+# This is for $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#
diff --git a/board/enbw/enbw_cmc/enbw_cmc.c b/board/enbw/enbw_cmc/enbw_cmc.c
new file mode 100644
index 000..6333b3a
--- /dev/null
+++ b/board/enbw/enbw_cmc/enbw_cmc.c
@@ -0,0 +1,652 @@
+/*
+ * (C) Copyright 2011
+ * Heiko Schocher, DENX Software Engineering, h...@denx.de.
[...]
+
+#include common.h
+#include command.h
+#include environment.h
+#include hwconfig.h
+#include i2c.h
+#include malloc.h
+#include miiphy.h
+#include mmc.h
+#include net.h
+#include netdev.h
+#include asm/arch/hardware.h
+#include asm/arch/emif_defs.h
+#include asm/arch/emac_defs.h
+#include asm/gpio.h
+#include asm/arch/gpio.h
+#include asm/arch/davinci_misc.h
+#include asm/arch/sdmmc_defs.h
+#include asm/arch/timer_defs.h
+#include asm/arch/pinmux_defs.h
+#include asm/io.h
+#include asm/arch/da850_lowlevel.h
Can the above includes be made like:
all #include *.h together
all #include asm/*.h together
all #include asm/arch/*.h together
?
Done.
+
+DECLARE_GLOBAL_DATA_PTR;
+
[...]
+
+const int pinmuxes_size = ARRAY_SIZE(pinmuxes);
Where do you use this one? and why not just inline it?
This is introduced through patch (not in mainline yet):
[U-Boot,v3,07/15] arm, davinci: Remove duplication of pinmux configuration code
http://patchwork.ozlabs.org/patch/127680/
+
+struct gpio_config {
+char name[GPIO_NAME_SIZE];
+unsigned char bank;
+unsigned char gpio;
+unsigned char out;
+unsigned char value;
+};
+
+static const struct gpio_config enbw_gpio_config[] = {
+{ RS485 enable, 8, 11, 1, 0 },
+{ RS485 iso, 8, 10, 1, 0 },
+{ W2HUT RS485 Rx ena, 8, 9, 1, 0 },
+{ W2HUT RS485 iso, 8, 8, 1, 0 },
+{ LAN reset, 7, 15, 1, 1 },
+{ ena 11V PLC, 7, 14, 1, 0 },
+{ ena 1.5V PLC, 7, 13, 1, 0 },
+{ disable VBUS, 7, 12, 1, 1 },
+{ PLC reset, 6, 13, 1, 1 },
+{ LCM RS, 6, 12, 1, 0 },
+{ LCM R/W, 6, 11, 1, 0 },
+{ PLC pairing, 6, 10, 1, 0 },
+{ PLC MDIO CLK, 6, 9, 1, 0 },
+{ HK218, 6, 8, 1, 0 },
+{ HK218 Rx, 6, 1, 1, 1 },
+{ TPM reset, 6, 0, 1, 1 },
+{ LCM E, 2, 2, 1, 1 },
+{ PV-IF RxD ena, 0, 15, 1, 0 },
+{ LED1, 1, 15, 1, 1 },
+{ LED2, 0, 1, 1, 1 },
+{ LED3, 0, 2, 1, 1 },
+{ LED4, 0, 3, 1, 1 },
+{ LED5, 0, 4, 1, 1 },
+{ LED6, 0, 5, 1, 0 },
+{ LED7, 0, 6, 1, 0 },
+{ LED8, 0, 14, 1, 0 },
+{ USER1, 0, 12, 0, 0 },
+{ USER2, 0, 13, 0, 0 },
+};
This will look much better if all values will be aligned -
making columns.
Done.
Also, IMO, this is usable platform wide.
Hmm.. this is board specific gpio pin setup ...
+
+#ifndef CONFIG_USE_IRQ
+void irq_init(void)
+{
+/*
+ * Mask all IRQs by clearing the global enable and setting
+ * the enable clear for all the 90 interrupts.
+ */
+
+writel(0, davinci_aintc_regs-ger);
+
+writel(0, davinci_aintc_regs-hier);
+
+writel(0x, davinci_aintc_regs-ecr1);
+writel(0x, davinci_aintc_regs-ecr2);
+writel(0x, davinci_aintc_regs-ecr3);
+}
+#endif
+
+void davinci_emac_mii_mode_sel(int mode_sel)
+{
+int val;
+
+val = readl(davinci_syscfg_regs-cfgchip3);
+if (mode_sel == 0)
+val = ~(1 8);
+else
+val |= (1 8);
+writel(val, davinci_syscfg_regs-cfgchip3);
+}
This one also can be used platform wide.
Ok, done. Move for this board/davinci/common/misc.c to
arch/arm/cpu/arm926ejs/davinci/misc.c in a seperate patch.
[...]
+int board_init(void)
+{
+int i, ret;
+
+#ifndef CONFIG_USE_IRQ
+irq_init();
+#endif
+/* address of boot parameters, not used as booting with DTT */
+gd-bd-bi_boot_params = 0;
+
+for (i = 0; i ARRAY_SIZE(enbw_gpio_config); i++) {
+int gpio = enbw_gpio_config[i].bank * 16 +
+enbw_gpio_config[i].gpio;
+
+ret = gpio_request(gpio, enbw_gpio_config[i].name);
+
Re: [U-Boot] [PATCH v2] mmc: add host_caps checking avoid switch card improperly
Dear Macpaul Lin, In message CACCg+XOTFWB8jrXsg4Z+o4eAV3b9iaEr64_=+omzns+maj+...@mail.gmail.com you wrote: Please drop these multiple mails which are the same. I'll delete them in patchworks and left the only one patch v2 of this patch which should be correct. But you've sent a V3, too ??? Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de How many seconds are there in a year? If I tell you there are 3.155 x 10^7, you won't even try to remember it. On the other hand, who could forget that, to within half a percent, pi seconds is a nanocentury. - Tom Duff, Bell Labs ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v3 3/3] arm, davinci: add support for am1808 based enbw_cmc board
Dear Igor Grinberg, it is really not necessary to quote 1300+ lines of unrelated code. Just provide sufficient context for your remarks. In message 4ed373c6.5020...@compulab.co.il you wrote: + ret = gpio_request(gpio, enbw_gpio_config[i].name); + if (ret) + printf(%s: Could not get %s gpio\n, __func__, + enbw_gpio_config[i].name); + else instead of having that else and adding another level of indentation below you can just add continue; Really? There is no return in this error handling, so why do you think we should continue to run this code even after an error? Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de It would be illogical to assume that all conditions remain stable -- Spock, The Enterprise Incident, stardate 5027.3 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] Blackfin: br4: new board port
Dear Dimitar Penev, In message 001301ccadc3$30140c70$2901a8c0@dpn you wrote: +#define CONFIG_TFTP_BLOCKSIZE 4404 ... I have to admit that I'm not sure i having the last ine is a clever idea, but in any case it's not my problem. I have not dug in the code to understand the impact in details but what I have observed is that the tftp transfer in our local network is getting speeded up few times with the last line added. It is for the files in the 10 MB size range in case it matters. Probably you can just mention the expected negative side of this line? Not all networks may support such a big MTU ? Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de That was the thing about deserts. They had their own gravity. They sucked you into the centre. - Terry Pratchett, _Small Gods_ ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] practicality of demonstrating u-boot in a QEMU session?
Dear Robert P. J. Day, In message alpine.DEB.2.02.280701300.6538@oneiric you wrote: i'm teaching some embedded linux next week and, while i will have physical boards for the students to play with, i'd also like to demonstrate basic u-boot within a QEMU session as far as that's practical. Or use sandbox? Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de How many seconds are there in a year? If I tell you there are 3.155 x 10^7, you won't even try to remember it. On the other hand, who could forget that, to within half a percent, pi seconds is a nanocentury. - Tom Duff, Bell Labs ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v3 3/3] arm, davinci: add support for am1808 based enbw_cmc board
Dear Heiko Schocher, In message 4ed3a6a8.5010...@denx.de you wrote: + ret = gpio_request(gpio, enbw_gpio_config[i].name); + if (ret) + printf(%s: Could not get %s gpio\n, __func__, + enbw_gpio_config[i].name); + else instead of having that else and adding another level of indentation below you can just add continue; Done. Is this really a good idea?? Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de One essential to success is that you desire be an all-obsessing one, your thoughts and aims be co-ordinated, and your energy be concentra- ted and applied without letup. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [RFC/PATCH] davinci: disable dcache on boards with EMAC
Hi Tom, On Mon, Nov 28, 2011 at 3:53 PM, Tom Rini tom.r...@gmail.com wrote: On Mon, Nov 28, 2011 at 5:06 AM, Christian Riesch christian.rie...@omicron.at wrote: On Sun, Nov 27, 2011 at 5:41 PM, Tom Rini tom.r...@gmail.com wrote: On Sun, Nov 27, 2011 at 8:09 AM, Wolfgang Denk w...@denx.de wrote: In message 1321048618-20616-1-git-send-email-ya...@emcraft.com you wrote: DaVinci EMAC driver has no support for running with D-Cache enabled so disable D-Cache on all DaVinci boards with EMAC device. Signed-off-by: Ilya Yanok ya...@emcraft.com --- I can't test it on any DaVinci boards right now but my understanding is that currently EMAC driver can't work properly with D-Cache enabled. [...] Why do we have to permanently disable the data cache just because the network driver is broken? USB is also broken, and probably other drivers as well. To be clear, the problem is that today the driver is broken (not cache safe) and this series of patches fixes that problem. In doing so we expose that arm926ejs doesn't have complete cache support today. What do you mean by broken? Is it never working or is it working sometimes or not working under specific conditions? I have a DA850 based board and I use the Davinci EMAC driver (CONFIG_DRIVER_TI_EMAC). I don't have these CONFIG_SYS_xCACHE_OFF defines in my board config file so I guess D-Cache is enabled. But Ethernet works fine, so what am I missing here? Is D-Cache disabled somewhere else? Today, right now? I tried a dm365evm back in August on top-of-tree and emac didn't work until I disabled caches. I don't have day-to-day access to that board however to confirm the current state. Yes, right now. I did a test now with the da850evm with the current u-boot, commit 99258c34103efad3395c679256a221731d010c4b, and my recent patchset [1] applied (all my tools currently expect this patchset, so it was easier for me, but my patchset does not touch the emac driver). I did a make mrproper make da850evm_config make -s u-boot.ais flashed the u-boot.ais to SPI flash and successfully tested the Ethernet connection by loading a kernel image via tftpboot. Then I commented out the lines #define CONFIG_SYS_ICACHE_OFF #define CONFIG_SYS_DCACHE_OFF #define CONFIG_SYS_L2CACHE_OFF re-built u-boot and tried the same, the Ethernet connection still worked and I could still load the kernel image. So what am I missing here? Regards, Christian [1] http://lists.denx.de/pipermail/u-boot/2011-November/82.html ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [RFC/PATCH] davinci: disable dcache on boards with EMAC
Dear Christian Riesch, In message cabkloboon_r_xwzorihbhnnrm4+jfykvkqdvtoih6cvckxs...@mail.gmail.com you wrote: ... Then I commented out the lines #define CONFIG_SYS_ICACHE_OFF #define CONFIG_SYS_DCACHE_OFF #define CONFIG_SYS_L2CACHE_OFF re-built u-boot and tried the same, the Ethernet connection still worked and I could still load the kernel image. What does the dc command print in your configuration? Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de Bus error -- please leave by the rear door. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] :::Confirm Via Website:::
Dear E-mail User, This is to inform you that your email address with MICROS ID MCX-27604-MFG-176CN-9KD emerge our second place winner of $485,000 plus a brand new Range Rover SUV from the SHEZHEN YAXI™ end of year promotion. Please confirm your status by logging to our site below. Website : www.shezyaxin.com Username : win2 Password : da211 Regards. Sofia Teresa Gonzalez. European Zonal Cordinator© ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v3] ftsdc010: improve performance and capability
On Mon, Nov 28, 2011 at 2:07 AM, Macpaul Lin macp...@gmail.com wrote:
However, aside from that, the interrupt clearing confuses me. Usually,
you read the event register, and then write it back to clear
it. If there is more than one error, some of the status bits will be
left uncleared. If you only want to clear the bits being dealt with in
a particular section, I think it would be clearer and safer to set
clear up-front based on a MASK of bits that are being dealt with in
that section.
The MASK bits doesn't really work at all. :-(
If I've disabled some of the interrupt flags by mask, these disabled flag
will still raise
(I think is a design flaw in hardware) if the error or success has happened.
The event (status) register is different from the clear register.
They are 2 different register with slightly different definition of their
bit fields,
these 2 registers are only partially identical of the meaning of the flags.
The flags indeed can be separate to different stage during one command
transaction.
Actually, not all the error status bit will raise at the same time.
Some flags will only be raised exclusively.
For example, there will be only one flag raised on time for the following 3
flags,
FTSDC010_STATUS_RSP_TIMEOUT, FTSDC010_STATUS_RSP_CRC_FAIL, and
FTSDC010_STATUS_RSP_CRC_OK.
If one of the flag didn't be cleared right now, say, RSP_TIMEOUT, the
hardware will clear it if RSP_CRC_FAIL must be
raised in the next time.
Alright, if you say the bits aren't all the same, and they will be
cleared by the hardware before the next interrupt, then I'll withdraw
that issue.
+
if (sta FTSDC010_STATUS_DATA_TIMEOUT) {
/* DATA TIMEOUT */
- debug(%s: DATA TIMEOUT: sta: %08x\n,
- __func__, sta);
+ debug(%s: DATA TIMEOUT: sta: %08x\n, __func__,
sta);
clear |= FTSDC010_STATUS_DATA_TIMEOUT;
Why set clear? This code returns before clear is written.
writel(sta, host-reg-clr);
+
return TIMEOUT;
Why did you say the code returns before clear is written?
I'm saying this sets clear to FTSDC010_STATUS_DATA_TIMEOUT, but then
it writes sta to the clr register, and returns.
clear is never used after being set in this case.
FTSDC010_STATUS_DATA_TIMEOUT and FTSDC010_STATUS_DATA_CRC_FAIL are exclusive
just like
RSP_TIMEOUT and RSP_CRC_FAIL managed by hardware.
The driver will indeed clear DATA_TIMEOUT when the flag of clear has been
set and then will be wrote into
clear register on the next line of the code writel(sta, host-reg-clr);,
Finally we return TIMEOUT since the DATA_TIMEOUT has been detected.
We have a COMM_ERR returned after the DATA_CRC_FAIL has been detected and
cleared also.
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Re: [U-Boot] [RFC/PATCH] davinci: disable dcache on boards with EMAC
Hi Christian, On 28.11.2011 19:43, Christian Riesch wrote: What do you mean by broken? Is it never working or is it working sometimes or not working under specific conditions? I have a DA850 based board and I use the Davinci EMAC driver (CONFIG_DRIVER_TI_EMAC). I don't have these CONFIG_SYS_xCACHE_OFF defines in my board config file so I guess D-Cache is enabled. But Ethernet works fine, so what am I missing here? Is D-Cache disabled somewhere else? Today, right now? I tried a dm365evm back in August on top-of-tree and emac didn't work until I disabled caches. I don't have day-to-day access to that board however to confirm the current state. Yes, right now. I think it's because of: commit cba4b1809f043bf85c806e5a4e342f62bd5ded45 Author: Aneesh V ane...@ti.com Date: Tue Aug 16 04:33:05 2011 + arm: do not force d-cache enable on all boards c2dd0d45540397704de9b13287417d21049d34c6 added dcache_enable() to board_init_r(). This enables d-cache for all ARM boards. As a result some of the arm boards that are not cache-ready are broken. Revert this change and allow platform code to take the decision on d-cache enabling. Also add some documentation for cache usage in ARM. Signed-off-by: Aneesh V ane...@ti.com Don't you see WARNING: Caches not enabled message during boot? 2Wolfgang: So caches are actually disabled on everything except OMAP... Regards, Ilya. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v3 01/15] arm, davinci: Move pinmux functions from board to arch tree
Christian, On 25/11/11 12:37, Christian Riesch wrote: Signed-off-by: Christian Riesch christian.rie...@omicron.at Cc: Sandeep Paulraj s-paul...@ti.com Cc: Heiko Schocher h...@denx.de Cc: Sudhakar Rajashekhara sudhakar@ti.com Cc: Syed Mohammed Khasim sm.kha...@gmail.com Cc: Sughosh Ganu urwithsugh...@gmail.com Cc: Nick Thompson nick.thomp...@gefanuc.com Cc: Stefano Babic sba...@denx.de --- arch/arm/cpu/arm926ejs/davinci/Makefile|2 +- .../arm/cpu/arm926ejs/davinci/pinmux.c |0 arch/arm/include/asm/arch-davinci/hardware.h |2 ++ board/davinci/common/Makefile |2 +- board/davinci/da8xxevm/da830evm.c |2 -- board/davinci/da8xxevm/da850evm.c |2 -- board/davinci/da8xxevm/hawkboard_nand_spl.c|2 -- board/davinci/ea20/ea20.c |2 -- nand_spl/board/davinci/da8xxevm/Makefile |6 +++--- 9 files changed, 7 insertions(+), 13 deletions(-) rename board/davinci/common/davinci_pinmux.c = arch/arm/cpu/arm926ejs/davinci/pinmux.c (100%) The da830 parts of the complete patch set are pretty minor, but FWIW: Acked-by: Nick Thompson nick.thomp...@ge.com ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 05/11] MIPS: add sleep handler for slave CPUs in multi-processor systems
On 11/24/11 10:57 PM, Daniel Schwierzeck wrote: diff --git a/arch/mips/cpu/mips32/start.S b/arch/mips/cpu/mips32/start.S index 9c1b2f7..b6cb4be 100644 --- a/arch/mips/cpu/mips32/start.S +++ b/arch/mips/cpu/mips32/start.S @@ -224,6 +224,14 @@ reset: setup_c0_status_reset + /* Set all slave CPUs in sleep mode */ +#ifdef CONFIG_SYS_MPS_SLAVE_CPU_SLEEP + mfc0k0, CP0_EBASE + and k0, EBASEF_CPUNUM + bne k0, zero, slave_cpu_sleep +nop +#endif + /* Init Timer */ mtc0zero, CP0_COUNT mtc0zero, CP0_COMPARE Just wondered, why is this conditionally selected? To save text size, or other reason? The change looks Ok with s/MPS/MIPS/ typo fixed as pointed by Andrew. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [RFC/PATCH] davinci: disable dcache on boards with EMAC
Dear Ilya Yanok, In message 4ed3b09a.7060...@emcraft.com you wrote: Don't you see WARNING: Caches not enabled message during boot? 2Wolfgang: So caches are actually disabled on everything except OMAP... I see. What a chaos. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de People with narrow minds usually have broad tongues. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH V3 00/13] Support for HTKW mcx board
Hi All, these patches introduce support for HTKW mcx board (AM3517-based) including DaVinci EMAC driver fixes to work on AM35xx, SPL fixes and OMAP3 EHCI support. This is an updated version of previously posted patches: http://thread.gmane.org/gmane.comp.boot-loaders.u-boot/116535 Patches are rebased on the current master and no-op implementation for dcache operations on arm926ejs added. Signed-off-by: Ilya Yanok ya...@emcraft.com ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 02/13] davinci_emac: use internal addresses in buffer descriptors
On AM35xx CPPI RAM had different addresses when accessed from the CPU
and from the EMAC. We need to account this to deal with the buffer
descriptors correctly.
Signed-off-by: Ilya Yanok ya...@emcraft.com
---
drivers/net/davinci_emac.c | 39 ++-
1 files changed, 30 insertions(+), 9 deletions(-)
diff --git a/drivers/net/davinci_emac.c b/drivers/net/davinci_emac.c
index 43c4373..2ac6874 100644
--- a/drivers/net/davinci_emac.c
+++ b/drivers/net/davinci_emac.c
@@ -48,6 +48,27 @@
unsigned int emac_dbg = 0;
#define debug_emac(fmt,args...)if (emac_dbg) printf(fmt,##args)
+#ifdef EMAC_HW_RAM_ADDR
+static inline unsigned long BD_TO_HW(unsigned long x)
+{
+ if (x == 0)
+ return 0;
+
+ return x - EMAC_WRAPPER_RAM_ADDR + EMAC_HW_RAM_ADDR;
+}
+
+static inline unsigned long HW_TO_BD(unsigned long x)
+{
+ if (x == 0)
+ return 0;
+
+ return x - EMAC_HW_RAM_ADDR + EMAC_WRAPPER_RAM_ADDR;
+}
+#else
+#define BD_TO_HW(x)(x)
+#define HW_TO_BD(x)(x)
+#endif
+
#ifdef DAVINCI_EMAC_GIG_ENABLE
#define emac_gigabit_enable(phy_addr) davinci_eth_gigabit_enable(phy_addr)
#else
@@ -448,7 +469,7 @@ static int davinci_eth_open(struct eth_device *dev, bd_t
*bis)
/* Create RX queue and set receive process in place */
emac_rx_active_head = emac_rx_desc;
for (cnt = 0; cnt EMAC_MAX_RX_BUFFERS; cnt++) {
- rx_desc-next = (u_int32_t)(rx_desc + 1);
+ rx_desc-next = BD_TO_HW((u_int32_t)(rx_desc + 1));
rx_desc-buffer = emac_rx_buffers[cnt *
(EMAC_MAX_ETHERNET_PKT_SIZE + EMAC_PKT_ALIGN)];
rx_desc-buff_off_len = EMAC_MAX_ETHERNET_PKT_SIZE;
rx_desc-pkt_flag_len = EMAC_CPPI_OWNERSHIP_BIT;
@@ -501,7 +522,7 @@ static int davinci_eth_open(struct eth_device *dev, bd_t
*bis)
emac_gigabit_enable(active_phy_addr[index]);
/* Start receive process */
- writel((u_int32_t)emac_rx_desc, adap_emac-RX0HDP);
+ writel(BD_TO_HW((u_int32_t)emac_rx_desc), adap_emac-RX0HDP);
debug_emac(- emac_open\n);
@@ -619,7 +640,7 @@ static int davinci_eth_send_packet (struct eth_device *dev,
EMAC_CPPI_OWNERSHIP_BIT |
EMAC_CPPI_EOP_BIT);
/* Send the packet */
- writel((unsigned long)emac_tx_desc, adap_emac-TX0HDP);
+ writel(BD_TO_HW((unsigned long)emac_tx_desc), adap_emac-TX0HDP);
/* Wait for packet to complete or link down */
while (1) {
@@ -663,14 +684,14 @@ static int davinci_eth_rcv_packet (struct eth_device *dev)
}
/* Ack received packet descriptor */
- writel((unsigned long)rx_curr_desc, adap_emac-RX0CP);
+ writel(BD_TO_HW((ulong)rx_curr_desc), adap_emac-RX0CP);
curr_desc = rx_curr_desc;
emac_rx_active_head =
- (volatile emac_desc *) rx_curr_desc-next;
+ (volatile emac_desc *) (HW_TO_BD(rx_curr_desc-next));
if (status EMAC_CPPI_EOQ_BIT) {
if (emac_rx_active_head) {
- writel((unsigned long)emac_rx_active_head,
+ writel(BD_TO_HW((ulong)emac_rx_active_head),
adap_emac-RX0HDP);
} else {
emac_rx_queue_active = 0;
@@ -688,7 +709,7 @@ static int davinci_eth_rcv_packet (struct eth_device *dev)
emac_rx_active_head = curr_desc;
emac_rx_active_tail = curr_desc;
if (emac_rx_queue_active != 0) {
- writel((unsigned long)emac_rx_active_head,
+ writel(BD_TO_HW((ulong)emac_rx_active_head),
adap_emac-RX0HDP);
printf (INFO: emac_rcv_pkt: active queue head
= 0, HDP fired\n);
emac_rx_queue_active = 1;
@@ -696,10 +717,10 @@ static int davinci_eth_rcv_packet (struct eth_device *dev)
} else {
tail_desc = emac_rx_active_tail;
emac_rx_active_tail = curr_desc;
- tail_desc-next = (unsigned int) curr_desc;
+ tail_desc-next = BD_TO_HW((ulong) curr_desc);
status = tail_desc-pkt_flag_len;
if (status EMAC_CPPI_EOQ_BIT) {
- writel((unsigned long)curr_desc,
+ writel(BD_TO_HW((ulong)curr_desc),
adap_emac-RX0HDP);
status = ~EMAC_CPPI_EOQ_BIT;
tail_desc-pkt_flag_len = status;
--
1.7.6.4
___
U-Boot mailing list
[U-Boot] [PATCH 04/13] arm926ejs: add noop implementation for dcache ops
Added noop implementation for dcache operations that will buzz
about missing real implementation and disable the dcache.
This fixes compilation of DaVinci EMAC driver on arm926ejs.
Signed-off-by: Ilya Yanok ya...@emcraft.com
---
arch/arm/cpu/arm926ejs/Makefile |2 +-
arch/arm/cpu/arm926ejs/cache.c | 75 +++
2 files changed, 76 insertions(+), 1 deletions(-)
create mode 100644 arch/arm/cpu/arm926ejs/cache.c
diff --git a/arch/arm/cpu/arm926ejs/Makefile b/arch/arm/cpu/arm926ejs/Makefile
index a56ff08..5923e65 100644
--- a/arch/arm/cpu/arm926ejs/Makefile
+++ b/arch/arm/cpu/arm926ejs/Makefile
@@ -26,7 +26,7 @@ include $(TOPDIR)/config.mk
LIB= $(obj)lib$(CPU).o
START = start.o
-COBJS = cpu.o
+COBJS = cpu.o cache.o
ifdef CONFIG_SPL_BUILD
ifdef CONFIG_SPL_NO_CPU_SUPPORT_CODE
diff --git a/arch/arm/cpu/arm926ejs/cache.c b/arch/arm/cpu/arm926ejs/cache.c
new file mode 100644
index 000..4415642
--- /dev/null
+++ b/arch/arm/cpu/arm926ejs/cache.c
@@ -0,0 +1,75 @@
+/*
+ * (C) Copyright 2011
+ * Ilya Yanok, EmCraft Systems
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc.
+ */
+#include linux/types.h
+#include common.h
+
+#ifndef CONFIG_SYS_DCACHE_OFF
+static inline void dcache_noop(void)
+{
+ if (dcache_status()) {
+ puts(WARNING: cache operations are not implemented!\n
+WARNING: disabling D-Cache now, you can re-enable it
+later with 'dcache on' command\n);
+ dcache_disable();
+ }
+}
+
+void invalidate_dcache_all(void)
+{
+ dcache_noop();
+}
+
+void flush_dcache_all(void)
+{
+ dcache_noop();
+}
+
+void invalidate_dcache_range(unsigned long start, unsigned long stop)
+{
+ dcache_noop();
+}
+
+void flush_dcache_range(unsigned long start, unsigned long stop)
+{
+ dcache_noop();
+}
+#else /* #ifndef CONFIG_SYS_DCACHE_OFF */
+void invalidate_dcache_all(void)
+{
+}
+
+void flush_dcache_all(void)
+{
+}
+
+void invalidate_dcache_range(unsigned long start, unsigned long stop)
+{
+}
+
+void flush_dcache_range(unsigned long start, unsigned long stop)
+{
+}
+
+void flush_cache(unsigned long start, unsigned long size)
+{
+}
+#endif /* #ifndef CONFIG_SYS_DCACHE_OFF */
--
1.7.6.4
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 08/13] AM3517: move AM3517 specific mux defines to generic header
AM3517 specific CONTROL_PADCONF_* defines moved from board-specific
files to asm/arch-omap3/mux.h
Signed-off-by: Ilya Yanok ya...@emcraft.com
---
arch/arm/include/asm/arch-omap3/mux.h | 41 +
board/logicpd/am3517evm/am3517evm.h | 40
board/ti/am3517crane/am3517crane.h| 39 ---
3 files changed, 41 insertions(+), 79 deletions(-)
diff --git a/arch/arm/include/asm/arch-omap3/mux.h
b/arch/arm/include/asm/arch-omap3/mux.h
index 0c01c73..6daef49 100644
--- a/arch/arm/include/asm/arch-omap3/mux.h
+++ b/arch/arm/include/asm/arch-omap3/mux.h
@@ -404,6 +404,47 @@
#define CONTROL_PADCONF_SDRC_CKE0 0x0262
#define CONTROL_PADCONF_SDRC_CKE1 0x0264
+/* AM3517 specific mux configuration */
+#define CONTROL_PADCONF_SYS_NRESWARM 0x0A08
+/* CCDC */
+#define CONTROL_PADCONF_CCDC_PCLK 0x01E4
+#define CONTROL_PADCONF_CCDC_FIELD 0x01E6
+#define CONTROL_PADCONF_CCDC_HD0x01E8
+#define CONTROL_PADCONF_CCDC_VD0x01EA
+#define CONTROL_PADCONF_CCDC_WEN 0x01EC
+#define CONTROL_PADCONF_CCDC_DATA0 0x01EE
+#define CONTROL_PADCONF_CCDC_DATA1 0x01F0
+#define CONTROL_PADCONF_CCDC_DATA2 0x01F2
+#define CONTROL_PADCONF_CCDC_DATA3 0x01F4
+#define CONTROL_PADCONF_CCDC_DATA4 0x01F6
+#define CONTROL_PADCONF_CCDC_DATA5 0x01F8
+#define CONTROL_PADCONF_CCDC_DATA6 0x01FA
+#define CONTROL_PADCONF_CCDC_DATA7 0x01FC
+/* RMII */
+#define CONTROL_PADCONF_RMII_MDIO_DATA 0x01FE
+#define CONTROL_PADCONF_RMII_MDIO_CLK 0x0200
+#define CONTROL_PADCONF_RMII_RXD0 0x0202
+#define CONTROL_PADCONF_RMII_RXD1 0x0204
+#define CONTROL_PADCONF_RMII_CRS_DV0x0206
+#define CONTROL_PADCONF_RMII_RXER 0x0208
+#define CONTROL_PADCONF_RMII_TXD0 0x020A
+#define CONTROL_PADCONF_RMII_TXD1 0x020C
+#define CONTROL_PADCONF_RMII_TXEN 0x020E
+#define CONTROL_PADCONF_RMII_50MHZ_CLK 0x0210
+#define CONTROL_PADCONF_USB0_DRVBUS0x0212
+/* CAN */
+#define CONTROL_PADCONF_HECC1_TXD 0x0214
+#define CONTROL_PADCONF_HECC1_RXD 0x0216
+
+#define CONTROL_PADCONF_SYS_BOOT7 0x0218
+#define CONTROL_PADCONF_SDRC_DQS0N 0x021A
+#define CONTROL_PADCONF_SDRC_DQS1N 0x021C
+#define CONTROL_PADCONF_SDRC_DQS2N 0x021E
+#define CONTROL_PADCONF_SDRC_DQS3N 0x0220
+#define CONTROL_PADCONF_STRBEN_DLY00x0222
+#define CONTROL_PADCONF_STRBEN_DLY10x0224
+#define CONTROL_PADCONF_SYS_BOOT8 0x0226
+
#define MUX_VAL(OFFSET,VALUE)\
writew((VALUE), OMAP34XX_CTRL_BASE + (OFFSET));
diff --git a/board/logicpd/am3517evm/am3517evm.h
b/board/logicpd/am3517evm/am3517evm.h
index 3d74ef1..68d746c 100644
--- a/board/logicpd/am3517evm/am3517evm.h
+++ b/board/logicpd/am3517evm/am3517evm.h
@@ -31,46 +31,6 @@ const omap3_sysinfo sysinfo = {
AM3517EVM Board,
NAND,
};
-/* AM3517 specific mux configuration */
-#define CONTROL_PADCONF_SYS_NRESWARM 0x0A08
-/* CCDC */
-#define CONTROL_PADCONF_CCDC_PCLK 0x01E4
-#define CONTROL_PADCONF_CCDC_FIELD 0x01E6
-#define CONTROL_PADCONF_CCDC_HD0x01E8
-#define CONTROL_PADCONF_CCDC_VD0x01EA
-#define CONTROL_PADCONF_CCDC_WEN 0x01EC
-#define CONTROL_PADCONF_CCDC_DATA0 0x01EE
-#define CONTROL_PADCONF_CCDC_DATA1 0x01F0
-#define CONTROL_PADCONF_CCDC_DATA2 0x01F2
-#define CONTROL_PADCONF_CCDC_DATA3 0x01F4
-#define CONTROL_PADCONF_CCDC_DATA4 0x01F6
-#define CONTROL_PADCONF_CCDC_DATA5 0x01F8
-#define CONTROL_PADCONF_CCDC_DATA6 0x01FA
-#define CONTROL_PADCONF_CCDC_DATA7 0x01FC
-/* RMII */
-#define CONTROL_PADCONF_RMII_MDIO_DATA 0x01FE
-#define CONTROL_PADCONF_RMII_MDIO_CLK 0x0200
-#define CONTROL_PADCONF_RMII_RXD0 0x0202
-#define CONTROL_PADCONF_RMII_RXD1 0x0204
-#define CONTROL_PADCONF_RMII_CRS_DV0x0206
-#define CONTROL_PADCONF_RMII_RXER 0x0208
-#define CONTROL_PADCONF_RMII_TXD0 0x020A
-#define CONTROL_PADCONF_RMII_TXD1 0x020C
-#define CONTROL_PADCONF_RMII_TXEN 0x020E
-#define CONTROL_PADCONF_RMII_50MHZ_CLK 0x0210
-#define CONTROL_PADCONF_USB0_DRVBUS0x0212
-/* CAN */
-#define CONTROL_PADCONF_HECC1_TXD 0x0214
-#define CONTROL_PADCONF_HECC1_RXD 0x0216
-
-#define CONTROL_PADCONF_SYS_BOOT7 0x0218
-#define CONTROL_PADCONF_SDRC_DQS0N 0x021A
-#define CONTROL_PADCONF_SDRC_DQS1N 0x021C
-#define CONTROL_PADCONF_SDRC_DQS2N 0x021E
-#define CONTROL_PADCONF_SDRC_DQS3N 0x0220
-#define CONTROL_PADCONF_STRBEN_DLY00x0222
-#define CONTROL_PADCONF_STRBEN_DLY10x0224
-#define CONTROL_PADCONF_SYS_BOOT8 0x0226
/*
* IEN - Input Enable
diff --git a/board/ti/am3517crane/am3517crane.h
b/board/ti/am3517crane/am3517crane.h
index 41db972..71335a3 100644
--- a/board/ti/am3517crane/am3517crane.h
+++ b/board/ti/am3517crane/am3517crane.h
@@ -30,45 +30,6 @@ const omap3_sysinfo sysinfo = {
CraneBoard,
NAND,
};
-/* AM3517 specific mux configuration */
-#define
[U-Boot] [PATCH 06/13] davinci_emac: hardcode 100Mbps for AM35xx and RMII
For some reason code setting the speed based on the PHY feedback causes troubles on AM3517 so hardcode 100Mbps for now. Signed-off-by: Ilya Yanok ya...@emcraft.com --- drivers/net/davinci_emac.c |3 ++- 1 files changed, 2 insertions(+), 1 deletions(-) diff --git a/drivers/net/davinci_emac.c b/drivers/net/davinci_emac.c index 4760390..d6c4e63 100644 --- a/drivers/net/davinci_emac.c +++ b/drivers/net/davinci_emac.c @@ -520,7 +520,8 @@ static int davinci_eth_open(struct eth_device *dev, bd_t *bis) writel(1, adap_emac-RXUNICASTSET); /* Enable MII interface and Full duplex mode */ -#ifdef CONFIG_SOC_DA8XX +#if defined(CONFIG_SOC_DA8XX) || \ + (defined(CONFIG_OMAP34XX) defined(CONFIG_DRIVER_TI_EMAC_USE_RMII)) writel((EMAC_MACCONTROL_MIIEN_ENABLE | EMAC_MACCONTROL_FULLDUPLEX_ENABLE | EMAC_MACCONTROL_RMIISPEED_100), -- 1.7.6.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 01/13] davinci_emac: move arch-independent defines to separate header
DaVinci EMAC is found not only on DaVinci SoCs but on some OMAP3 SoCs
also. This patch moves common defines from arch-davinci/emac_defs.h to
drivers/net/davinci_emac.h
DaVinci specific PHY drivers hacked to include the new header. We might
want to switch to phylib in future.
Signed-off-by: Ilya Yanok ya...@emcraft.com
---
arch/arm/cpu/arm926ejs/davinci/dp83848.c |1 +
arch/arm/cpu/arm926ejs/davinci/et1011c.c |1 +
arch/arm/cpu/arm926ejs/davinci/ksz8873.c |1 +
arch/arm/cpu/arm926ejs/davinci/lxt972.c |1 +
arch/arm/include/asm/arch-davinci/emac_defs.h | 289 ---
drivers/net/davinci_emac.c|1 +
drivers/net/davinci_emac.h| 314 +
7 files changed, 319 insertions(+), 289 deletions(-)
create mode 100644 drivers/net/davinci_emac.h
diff --git a/arch/arm/cpu/arm926ejs/davinci/dp83848.c
b/arch/arm/cpu/arm926ejs/davinci/dp83848.c
index c71c685..d435e4b 100644
--- a/arch/arm/cpu/arm926ejs/davinci/dp83848.c
+++ b/arch/arm/cpu/arm926ejs/davinci/dp83848.c
@@ -29,6 +29,7 @@
#include net.h
#include dp83848.h
#include asm/arch/emac_defs.h
+#include ../../../../../drivers/net/davinci_emac.h
#ifdef CONFIG_DRIVER_TI_EMAC
diff --git a/arch/arm/cpu/arm926ejs/davinci/et1011c.c
b/arch/arm/cpu/arm926ejs/davinci/et1011c.c
index df35e44..68650e5 100644
--- a/arch/arm/cpu/arm926ejs/davinci/et1011c.c
+++ b/arch/arm/cpu/arm926ejs/davinci/et1011c.c
@@ -22,6 +22,7 @@
#include net.h
#include miiphy.h
#include asm/arch/emac_defs.h
+#include ../../../../../drivers/net/davinci_emac.h
#ifdef CONFIG_DRIVER_TI_EMAC
diff --git a/arch/arm/cpu/arm926ejs/davinci/ksz8873.c
b/arch/arm/cpu/arm926ejs/davinci/ksz8873.c
index 634eda0..3546e7f 100644
--- a/arch/arm/cpu/arm926ejs/davinci/ksz8873.c
+++ b/arch/arm/cpu/arm926ejs/davinci/ksz8873.c
@@ -36,6 +36,7 @@
#include net.h
#include asm/arch/emac_defs.h
#include asm/io.h
+#include ../../../../../drivers/net/davinci_emac.h
int ksz8873_is_phy_connected(int phy_addr)
{
diff --git a/arch/arm/cpu/arm926ejs/davinci/lxt972.c
b/arch/arm/cpu/arm926ejs/davinci/lxt972.c
index 733d413..cce1fe4 100644
--- a/arch/arm/cpu/arm926ejs/davinci/lxt972.c
+++ b/arch/arm/cpu/arm926ejs/davinci/lxt972.c
@@ -30,6 +30,7 @@
#include miiphy.h
#include lxt971a.h
#include asm/arch/emac_defs.h
+#include ../../../../../drivers/net/davinci_emac.h
#ifdef CONFIG_DRIVER_TI_EMAC
diff --git a/arch/arm/include/asm/arch-davinci/emac_defs.h
b/arch/arm/include/asm/arch-davinci/emac_defs.h
index ea52888..8a17de9 100644
--- a/arch/arm/include/asm/arch-davinci/emac_defs.h
+++ b/arch/arm/include/asm/arch-davinci/emac_defs.h
@@ -84,295 +84,6 @@
#define EMAC_MDIO_CLOCK_FREQ 200 /* 2.0 MHz */
#endif
-/* Ethernet Min/Max packet size */
-#define EMAC_MIN_ETHERNET_PKT_SIZE 60
-#define EMAC_MAX_ETHERNET_PKT_SIZE 1518
-#define EMAC_PKT_ALIGN 18 /* 1518 + 18 = 1536 (packet
aligned on 32 byte boundry) */
-
-/* Number of RX packet buffers
- * NOTE: Only 1 buffer supported as of now
- */
-#define EMAC_MAX_RX_BUFFERS10
-
-
-/***
- Internally used macros ***
- ***/
-
-#define EMAC_CH_TX 1
-#define EMAC_CH_RX 0
-
-/* Each descriptor occupies 4 words, lets start RX desc's at 0 and
- * reserve space for 64 descriptors max
- */
-#define EMAC_RX_DESC_BASE 0x0
-#define EMAC_TX_DESC_BASE 0x1000
-
-/* EMAC Teardown value */
-#define EMAC_TEARDOWN_VALUE0xfffc
-
-/* MII Status Register */
-#define MII_STATUS_REG 1
-
-/* Number of statistics registers */
-#define EMAC_NUM_STATS 36
-
-
-/* EMAC Descriptor */
-typedef volatile struct _emac_desc
-{
- u_int32_t next; /* Pointer to next descriptor in chain
*/
- u_int8_t*buffer;/* Pointer to data buffer */
- u_int32_t buff_off_len; /* Buffer Offset(MSW) and Length(LSW) */
- u_int32_t pkt_flag_len; /* Packet Flags(MSW) and Length(LSW) */
-} emac_desc;
-
-/* CPPI bit positions */
-#define EMAC_CPPI_SOP_BIT (0x8000)
-#define EMAC_CPPI_EOP_BIT (0x4000)
-#define EMAC_CPPI_OWNERSHIP_BIT(0x2000)
-#define EMAC_CPPI_EOQ_BIT (0x1000)
-#define EMAC_CPPI_TEARDOWN_COMPLETE_BIT(0x0800)
-#define EMAC_CPPI_PASS_CRC_BIT (0x0400)
-
-#define EMAC_CPPI_RX_ERROR_FRAME (0x03fc)
-
-#define EMAC_MACCONTROL_MIIEN_ENABLE (0x20)
-#define EMAC_MACCONTROL_FULLDUPLEX_ENABLE (0x1)
-#define EMAC_MACCONTROL_GIGABIT_ENABLE (1 7)
-#define EMAC_MACCONTROL_GIGFORCE (1 17)
-#define EMAC_MACCONTROL_RMIISPEED_100 (1 15)
-
-#define EMAC_MAC_ADDR_MATCH(1 19)
-#define
[U-Boot] [PATCH 09/13] nand_spl_simple: add support for software ECC
This patch adds support for software ECC to the nand_spl_simple driver.
To enable this one have to define CONFIG_SPL_NAND_SOFTECC.
Tested on OMAP3.
Signed-off-by: Ilya Yanok ya...@emcraft.com
---
drivers/mtd/nand/nand_ecc.c|2 +-
drivers/mtd/nand/nand_spl_simple.c | 11 ++-
2 files changed, 11 insertions(+), 2 deletions(-)
diff --git a/drivers/mtd/nand/nand_ecc.c b/drivers/mtd/nand/nand_ecc.c
index 52bc916..81f0e08 100644
--- a/drivers/mtd/nand/nand_ecc.c
+++ b/drivers/mtd/nand/nand_ecc.c
@@ -50,7 +50,7 @@
* only nand_correct_data() is needed
*/
-#ifndef CONFIG_NAND_SPL
+#if !defined(CONFIG_NAND_SPL) || defined(CONFIG_SPL_NAND_SOFTECC)
/*
* Pre-calculated 256-way 1 byte column parity
*/
diff --git a/drivers/mtd/nand/nand_spl_simple.c
b/drivers/mtd/nand/nand_spl_simple.c
index e5003e6..ed821f2 100644
--- a/drivers/mtd/nand/nand_spl_simple.c
+++ b/drivers/mtd/nand/nand_spl_simple.c
@@ -21,6 +21,7 @@
#include common.h
#include nand.h
#include asm/io.h
+#include linux/mtd/nand_ecc.h
static int nand_ecc_pos[] = CONFIG_SYS_NAND_ECCPOS;
static nand_info_t mtd;
@@ -204,7 +205,8 @@ static int nand_read_page(int block, int page, void *dst)
oob_data = ecc_calc + 0x200;
for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {
- this-ecc.hwctl(mtd, NAND_ECC_READ);
+ if (this-ecc.mode != NAND_ECC_SOFT)
+ this-ecc.hwctl(mtd, NAND_ECC_READ);
this-read_buf(mtd, p, eccsize);
this-ecc.calculate(mtd, p, ecc_calc[i]);
}
@@ -274,6 +276,13 @@ void nand_init(void)
(void __iomem *)CONFIG_SYS_NAND_BASE;
board_nand_init(nand_chip);
+#ifdef CONFIG_SPL_NAND_SOFTECC
+ if (nand_chip.ecc.mode == NAND_ECC_SOFT) {
+ nand_chip.ecc.calculate = nand_calculate_ecc;
+ nand_chip.ecc.correct = nand_correct_data;
+ }
+#endif
+
if (nand_chip.select_chip)
nand_chip.select_chip(mtd, 0);
}
--
1.7.6.4
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[U-Boot] [PATCH 07/13] AM35xx: add EMAC support
AM35xx has DaVinci-compatible EMAC.
Signed-off-by: Ilya Yanok ya...@emcraft.com
---
arch/arm/cpu/armv7/omap3/Makefile |1 +
arch/arm/cpu/armv7/omap3/emac.c | 44 +
arch/arm/include/asm/arch-omap3/am35x_def.h |3 +
arch/arm/include/asm/arch-omap3/emac_defs.h | 56 +++
4 files changed, 104 insertions(+), 0 deletions(-)
create mode 100644 arch/arm/cpu/armv7/omap3/emac.c
create mode 100644 arch/arm/include/asm/arch-omap3/emac_defs.h
diff --git a/arch/arm/cpu/armv7/omap3/Makefile
b/arch/arm/cpu/armv7/omap3/Makefile
index 8e85891..6ebfd32 100644
--- a/arch/arm/cpu/armv7/omap3/Makefile
+++ b/arch/arm/cpu/armv7/omap3/Makefile
@@ -32,6 +32,7 @@ COBJS += clock.o
COBJS += mem.o
COBJS += sys_info.o
+COBJS-$(CONFIG_DRIVER_TI_EMAC) += emac.o
COBJS-$(CONFIG_EMIF4) += emif4.o
COBJS-$(CONFIG_SDRC) += sdrc.o
diff --git a/arch/arm/cpu/armv7/omap3/emac.c b/arch/arm/cpu/armv7/omap3/emac.c
new file mode 100644
index 000..14667f1
--- /dev/null
+++ b/arch/arm/cpu/armv7/omap3/emac.c
@@ -0,0 +1,44 @@
+/*
+ *
+ * DaVinci EMAC initialization.
+ *
+ * (C) Copyright 2011, Ilya Yanok, Emcraft Systems
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc.
+ */
+
+#include common.h
+#include netdev.h
+#include asm/io.h
+#include asm/arch/am35x_def.h
+
+/*
+ * Initializes on-chip ethernet controllers.
+ * to override, implement board_eth_init()
+ */
+int cpu_eth_init(bd_t *bis)
+{
+ u32 reset;
+
+ /* ensure that the module is out of reset */
+ reset = readl(am35x_scm_general_regs-ip_sw_reset);
+ reset = ~CPGMACSS_SW_RST;
+ writel(reset, am35x_scm_general_regs-ip_sw_reset);
+
+ return davinci_emac_initialize();
+}
diff --git a/arch/arm/include/asm/arch-omap3/am35x_def.h
b/arch/arm/include/asm/arch-omap3/am35x_def.h
index 81942a8..bbaf1bc 100644
--- a/arch/arm/include/asm/arch-omap3/am35x_def.h
+++ b/arch/arm/include/asm/arch-omap3/am35x_def.h
@@ -32,6 +32,9 @@
#ifndef __KERNEL_STRICT_NAMES
#ifndef __ASSEMBLY__
+/* IP_SW_RESET bits */
+#define CPGMACSS_SW_RST(1 1)/* reset CPGMAC */
+
/* General register mappings of system control module */
#define AM35X_SCM_GEN_BASE 0x48002270
struct am35x_scm_general {
diff --git a/arch/arm/include/asm/arch-omap3/emac_defs.h
b/arch/arm/include/asm/arch-omap3/emac_defs.h
new file mode 100644
index 000..8506c55
--- /dev/null
+++ b/arch/arm/include/asm/arch-omap3/emac_defs.h
@@ -0,0 +1,56 @@
+/*
+ * Copyright (C) 2007 Sergey Kubushyn k...@koi8.net
+ *
+ * Based on:
+ *
+ *
+ *
+ * dm644x_emac.h
+ *
+ * TI DaVinci (DM644X) EMAC peripheral driver header for DV-EVM
+ *
+ * Copyright (C) 2005 Texas Instruments.
+ *
+ *
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ *
+
+ * Modifications:
+ * ver. 1.0: Sep 2005, TI PSP Team - Created EMAC version for uBoot.
+ *
+ */
+
+#ifndef _AM3517_EMAC_H_
+#define _AM3517_EMAC_H_
+
+#define EMAC_BASE_ADDR 0x5C01
+#define EMAC_WRAPPER_BASE_ADDR 0x5C00
+#define EMAC_WRAPPER_RAM_ADDR 0x5C02
+#define EMAC_MDIO_BASE_ADDR0x5C03
+#define EMAC_HW_RAM_ADDR 0x01E2
+
+#define EMAC_MDIO_BUS_FREQ 16600 /* 166 MHZ check */
+#define EMAC_MDIO_CLOCK_FREQ 100 /* 2.0 MHz */
+
+/* SOFTRESET macro definition interferes with
[U-Boot] [PATCH 05/13] davinci_emac: fix for running with dcache enabled
DaVinci EMAC is present on TI AM35xx SoCs (ARMv7) which run with D-Cache
enabled by default. So we have to take care and flush/invalidate the
cache before/after the DMA operations.
Please note that the receive buffer alignment to 32 byte boundary comes
from the old driver version I don't know if it is really needed or
alignment to cache line size is enough.
Signed-off-by: Ilya Yanok ya...@emcraft.com
---
drivers/net/davinci_emac.c | 41 +++--
drivers/net/davinci_emac.h |5 +++--
2 files changed, 42 insertions(+), 4 deletions(-)
diff --git a/drivers/net/davinci_emac.c b/drivers/net/davinci_emac.c
index 4f9ed2f..4760390 100644
--- a/drivers/net/davinci_emac.c
+++ b/drivers/net/davinci_emac.c
@@ -41,6 +41,7 @@
#include net.h
#include miiphy.h
#include malloc.h
+#include linux/compiler.h
#include asm/arch/emac_defs.h
#include asm/io.h
#include davinci_emac.h
@@ -105,7 +106,8 @@ static volatile emac_desc *emac_rx_active_tail = 0;
static int emac_rx_queue_active = 0;
/* Receive packet buffers */
-static unsigned char emac_rx_buffers[EMAC_MAX_RX_BUFFERS *
(EMAC_MAX_ETHERNET_PKT_SIZE + EMAC_PKT_ALIGN)];
+static unsigned char emac_rx_buffers[EMAC_MAX_RX_BUFFERS * EMAC_RXBUF_SIZE]
+ __aligned(ARCH_DMA_MINALIGN);
#ifndef CONFIG_SYS_DAVINCI_EMAC_PHY_COUNT
#define CONFIG_SYS_DAVINCI_EMAC_PHY_COUNT 3
@@ -119,6 +121,26 @@ static u_int8_tnum_phy;
phy_t phy[CONFIG_SYS_DAVINCI_EMAC_PHY_COUNT];
+static inline void davinci_flush_rx_descs(void)
+{
+ /* flush the whole RX descs area */
+ flush_dcache_range(EMAC_WRAPPER_RAM_ADDR + EMAC_RX_DESC_BASE,
+ EMAC_WRAPPER_RAM_ADDR + EMAC_TX_DESC_BASE);
+}
+
+static inline void davinci_invalidate_rx_descs(void)
+{
+ /* invalidate the whole RX descs area */
+ invalidate_dcache_range(EMAC_WRAPPER_RAM_ADDR + EMAC_RX_DESC_BASE,
+ EMAC_WRAPPER_RAM_ADDR + EMAC_TX_DESC_BASE);
+}
+
+static inline void davinci_flush_desc(emac_desc *desc)
+{
+ flush_dcache_range((unsigned long)desc,
+ (unsigned long)desc + sizeof(*desc));
+}
+
static int davinci_eth_set_mac_addr(struct eth_device *dev)
{
unsigned long mac_hi;
@@ -470,7 +492,7 @@ static int davinci_eth_open(struct eth_device *dev, bd_t
*bis)
emac_rx_active_head = emac_rx_desc;
for (cnt = 0; cnt EMAC_MAX_RX_BUFFERS; cnt++) {
rx_desc-next = BD_TO_HW((u_int32_t)(rx_desc + 1));
- rx_desc-buffer = emac_rx_buffers[cnt *
(EMAC_MAX_ETHERNET_PKT_SIZE + EMAC_PKT_ALIGN)];
+ rx_desc-buffer = emac_rx_buffers[cnt * EMAC_RXBUF_SIZE];
rx_desc-buff_off_len = EMAC_MAX_ETHERNET_PKT_SIZE;
rx_desc-pkt_flag_len = EMAC_CPPI_OWNERSHIP_BIT;
rx_desc++;
@@ -482,6 +504,8 @@ static int davinci_eth_open(struct eth_device *dev, bd_t
*bis)
emac_rx_active_tail = rx_desc;
emac_rx_queue_active = 1;
+ davinci_flush_rx_descs();
+
/* Enable TX/RX */
writel(EMAC_MAX_ETHERNET_PKT_SIZE, adap_emac-RXMAXLEN);
writel(0, adap_emac-RXBUFFEROFFSET);
@@ -639,6 +663,11 @@ static int davinci_eth_send_packet (struct eth_device *dev,
EMAC_CPPI_SOP_BIT |
EMAC_CPPI_OWNERSHIP_BIT |
EMAC_CPPI_EOP_BIT);
+
+ flush_dcache_range((unsigned long)packet,
+ (unsigned long)packet + length);
+ davinci_flush_desc(emac_tx_desc);
+
/* Send the packet */
writel(BD_TO_HW((unsigned long)emac_tx_desc), adap_emac-TX0HDP);
@@ -671,6 +700,8 @@ static int davinci_eth_rcv_packet (struct eth_device *dev)
volatile emac_desc *tail_desc;
int status, ret = -1;
+ davinci_invalidate_rx_descs();
+
rx_curr_desc = emac_rx_active_head;
status = rx_curr_desc-pkt_flag_len;
if ((rx_curr_desc) ((status EMAC_CPPI_OWNERSHIP_BIT) == 0)) {
@@ -678,6 +709,9 @@ static int davinci_eth_rcv_packet (struct eth_device *dev)
/* Error in packet - discard it and requeue desc */
printf (WARN: emac_rcv_pkt: Error in packet\n);
} else {
+ unsigned long tmp = (unsigned long)rx_curr_desc-buffer;
+
+ invalidate_dcache_range(tmp, tmp + EMAC_RXBUF_SIZE);
NetReceive (rx_curr_desc-buffer,
(rx_curr_desc-buff_off_len 0x));
ret = rx_curr_desc-buff_off_len 0x;
@@ -703,6 +737,7 @@ static int davinci_eth_rcv_packet (struct eth_device *dev)
rx_curr_desc-buff_off_len = EMAC_MAX_ETHERNET_PKT_SIZE;
rx_curr_desc-pkt_flag_len = EMAC_CPPI_OWNERSHIP_BIT;
rx_curr_desc-next = 0;
+
[U-Boot] [PATCH 03/13] davinci_emac: conditionally compile specific PHY support
Signed-off-by: Ilya Yanok ya...@emcraft.com
---
drivers/net/davinci_emac.c |8
1 files changed, 8 insertions(+), 0 deletions(-)
diff --git a/drivers/net/davinci_emac.c b/drivers/net/davinci_emac.c
index 2ac6874..4f9ed2f 100644
--- a/drivers/net/davinci_emac.c
+++ b/drivers/net/davinci_emac.c
@@ -803,6 +803,7 @@ int davinci_emac_initialize(void)
phy_id |= tmp 0x;
switch (phy_id) {
+#ifdef PHY_KSZ8873
case PHY_KSZ8873:
sprintf(phy[i].name, KSZ8873 @ 0x%02x,
active_phy_addr[i]);
@@ -811,6 +812,8 @@ int davinci_emac_initialize(void)
phy[i].get_link_speed = ksz8873_get_link_speed;
phy[i].auto_negotiate = ksz8873_auto_negotiate;
break;
+#endif
+#ifdef PHY_LXT972
case PHY_LXT972:
sprintf(phy[i].name, LXT972 @ 0x%02x,
active_phy_addr[i]);
@@ -819,6 +822,8 @@ int davinci_emac_initialize(void)
phy[i].get_link_speed = lxt972_get_link_speed;
phy[i].auto_negotiate = lxt972_auto_negotiate;
break;
+#endif
+#ifdef PHY_DP83848
case PHY_DP83848:
sprintf(phy[i].name, DP83848 @ 0x%02x,
active_phy_addr[i]);
@@ -827,6 +832,8 @@ int davinci_emac_initialize(void)
phy[i].get_link_speed = dp83848_get_link_speed;
phy[i].auto_negotiate = dp83848_auto_negotiate;
break;
+#endif
+#ifdef PHY_ET1011C
case PHY_ET1011C:
sprintf(phy[i].name, ET1011C @ 0x%02x,
active_phy_addr[i]);
@@ -835,6 +842,7 @@ int davinci_emac_initialize(void)
phy[i].get_link_speed = et1011c_get_link_speed;
phy[i].auto_negotiate = gen_auto_negotiate;
break;
+#endif
default:
sprintf(phy[i].name, GENERIC @ 0x%02x,
active_phy_addr[i]);
--
1.7.6.4
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[U-Boot] [PATCH 10/13] omap_gpmc: use SOFTECC in SPL if it's enabled
Use software ECC for the SPL build if support for software ECC in SPL is enabled. Signed-off-by: Ilya Yanok ya...@emcraft.com --- drivers/mtd/nand/omap_gpmc.c |4 +++- 1 files changed, 3 insertions(+), 1 deletions(-) diff --git a/drivers/mtd/nand/omap_gpmc.c b/drivers/mtd/nand/omap_gpmc.c index 5bbec48..1dfe074 100644 --- a/drivers/mtd/nand/omap_gpmc.c +++ b/drivers/mtd/nand/omap_gpmc.c @@ -348,7 +348,7 @@ int board_nand_init(struct nand_chip *nand) nand-chip_delay = 100; /* Default ECC mode */ -#ifndef CONFIG_SPL_BUILD +#if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_NAND_SOFTECC) nand-ecc.mode = NAND_ECC_SOFT; #else nand-ecc.mode = NAND_ECC_HW; @@ -359,7 +359,9 @@ int board_nand_init(struct nand_chip *nand) nand-ecc.correct = omap_correct_data; nand-ecc.calculate = omap_calculate_ecc; omap_hwecc_init(nand); +#endif +#ifdef CONFIG_SPL_BUILD if (nand-options NAND_BUSWIDTH_16) nand-read_buf = nand_read_buf16; else -- 1.7.6.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 11/13] nand_spl_simple: store temp data at CONFIG_SPL_NAND_WORKSPACE
Currently nand_spl_simple puts it's temp data at 0x1 offset in SDRAM which is likely to contain already loaded data. I can't see any way to determine some safe address automagically so make it up to board porter to provide the safe-to-use address via CONFIG_SPL_NAND_WORKSPACE value. Signed-off-by: Ilya Yanok ya...@emcraft.com --- drivers/mtd/nand/nand_spl_simple.c |7 ++- 1 files changed, 6 insertions(+), 1 deletions(-) diff --git a/drivers/mtd/nand/nand_spl_simple.c b/drivers/mtd/nand/nand_spl_simple.c index ed821f2..70f3cfe 100644 --- a/drivers/mtd/nand/nand_spl_simple.c +++ b/drivers/mtd/nand/nand_spl_simple.c @@ -199,8 +199,13 @@ static int nand_read_page(int block, int page, void *dst) /* No malloc available for now, just use some temporary locations * in SDRAM +* Please provide some safe value for CONFIG_SPL_NAND_WORKSPACE in +* your board configuration, this is just a guess!! */ - ecc_calc = (u_char *)(CONFIG_SYS_SDRAM_BASE + 0x1); +#ifndef CONFIG_SPL_NAND_WORKSPACE +#define CONFIG_SPL_NAND_WORKSPACE (CONFIG_SYS_SDRAM_BASE + 0x1) +#endif + ecc_calc = (u_char *)CONFIG_SPL_NAND_WORKSPACE; ecc_code = ecc_calc + 0x100; oob_data = ecc_calc + 0x200; -- 1.7.6.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 13/13] mcx: support for HTKW mcx board
This patch adds support for the HTKW mcx AM3517-based board.
Serial, Ethernet, NAND, MMC, RTC, EHCI USB host and both
NAND and MMC SPLs are supported.
Requires updated mach-types file.
Signed-off-by: Ilya Yanok ya...@emcraft.com
---
MAINTAINERS |4 +
board/htkw/mcx/Makefile | 38 +
board/htkw/mcx/mcx.c| 88 ++
board/htkw/mcx/mcx.h| 408 +++
boards.cfg |1 +
include/configs/mcx.h | 378 +++
6 files changed, 917 insertions(+), 0 deletions(-)
create mode 100644 board/htkw/mcx/Makefile
create mode 100644 board/htkw/mcx/mcx.c
create mode 100644 board/htkw/mcx/mcx.h
create mode 100644 include/configs/mcx.h
diff --git a/MAINTAINERS b/MAINTAINERS
index f6f6b72..fdc1a53 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -889,6 +889,10 @@ Richard Woodruff r-woodru...@ti.com
omap2420h4 ARM1136EJS
+Ilya Yanok ya...@emcraft.com
+
+ mcx ARM ARMV7 (AM35x SoC)
+
Syed Mohammed Khasim sm.kha...@gmail.com
Sughosh Ganu urwithsugh...@gmail.com
diff --git a/board/htkw/mcx/Makefile b/board/htkw/mcx/Makefile
new file mode 100644
index 000..4c8db10
--- /dev/null
+++ b/board/htkw/mcx/Makefile
@@ -0,0 +1,38 @@
+#
+# Copyright (C) 2011 Ilya Yanok, Emcraft Systems
+#
+# Based on ti/evm/Makefile
+#
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 2 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc.
+#
+
+include $(TOPDIR)/config.mk
+
+LIB= $(obj)lib$(BOARD).o
+
+COBJS := $(BOARD).o
+
+SRCS := $(COBJS:.o=.c)
+OBJS := $(addprefix $(obj),$(COBJS))
+
+$(LIB):$(obj).depend $(OBJS)
+ $(call cmd_link_o_target, $(OBJS))
+
+#
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
diff --git a/board/htkw/mcx/mcx.c b/board/htkw/mcx/mcx.c
new file mode 100644
index 000..7ee23b0
--- /dev/null
+++ b/board/htkw/mcx/mcx.c
@@ -0,0 +1,88 @@
+/*
+ * Copyright (C) 2011 Ilya Yanok, Emcraft Systems
+ *
+ * Based on ti/evm/evm.c
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc.
+ */
+
+#include common.h
+#include asm/io.h
+#include asm/arch/mem.h
+#include asm/arch/mmc_host_def.h
+#include asm/arch/mux.h
+#include asm/arch/sys_proto.h
+#include asm/mach-types.h
+#include asm/gpio.h
+#include asm/omap_gpio.h
+#include i2c.h
+#include mcx.h
+
+DECLARE_GLOBAL_DATA_PTR;
+
+/*
+ * Routine: board_init
+ * Description: Early hardware init.
+ */
+int board_init(void)
+{
+ gpmc_init(); /* in SRAM or SDRAM, finish GPMC */
+ /* boot param addr */
+ gd-bd-bi_boot_params = (OMAP34XX_SDRC_CS0 + 0x100);
+
+ return 0;
+}
+
+/*
+ * Routine: misc_init_r
+ * Description: Init i2c, ethernet, etc... (done here so udelay works)
+ */
+int misc_init_r(void)
+{
+ dieid_num_r();
+
+ return 0;
+}
+
+/*
+ * Routine: set_muxconf_regs
+ * Description: Setting up the configuration Mux registers specific to the
+ * hardware. Many pins need to be moved from protect to primary
+ * mode.
+ */
+void set_muxconf_regs(void)
+{
+ MUX_MCX();
+}
+
+#if defined(CONFIG_GENERIC_MMC) defined(CONFIG_OMAP_HSMMC) \
+ !defined(CONFIG_SPL_BUILD)
+int board_mmc_init(bd_t *bis)
+{
+ omap_mmc_init(0);
+ return 0;
+}
+#endif
+
+#ifdef CONFIG_USB_EHCI_OMAP
+#define USB_HOST_PWR_EN132
+int board_usb_init(void)
+{
+ gpio_request(USB_HOST_PWR_EN, USB_HOST_PWR_EN);
+ gpio_direction_output(USB_HOST_PWR_EN, 1);
+
+ return 0;
+}
+#endif
diff --git a/board/htkw/mcx/mcx.h b/board/htkw/mcx/mcx.h
new file mode 100644
index 000..d675a48
--- /dev/null
+++ b/board/htkw/mcx/mcx.h
@@ -0,0 +1,408 @@
+/*
+ * Copyright (C) 2011 Ilya
Re: [U-Boot] [RFC/PATCH] davinci: disable dcache on boards with EMAC
Hi Albert, On 28.11.2011 16:56, Albert ARIBAUD wrote: Yes, that would be the 4th approach, listed as much better :-) Better yet, have an ARM-wide, not only ARM926EJ-S, cache framework with a hierarchy of cache function implementations, from ARM architectures to Cores / SoCs or even boards. Surely, that will be much-much better. Actually I think there is some room for even more unification: - alignment checks are need for (almost?) any arch - many ARM families share the same (or very similar) CP15 register set - ??? Unfortunately, I don't have enough time right now to dig into this. Regards, Ilya. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 08/11] MIPS: add additional reserved vectors for MIPS24K and MIPS34K cores
On 11/24/11 10:57 PM, Daniel Schwierzeck wrote: @@ -206,11 +206,28 @@ _start: RVECENT(romReserved,125) RVECENT(romReserved,126) RVECENT(romReserved,127) + XVECENT(romExcHandle,0x400); + RVECENT(romReserved,129); + RVECENT(romReserved,130); + RVECENT(romReserved,131); + RVECENT(romReserved,132); + RVECENT(romReserved,133); + RVECENT(romReserved,134); + RVECENT(romReserved,135); + RVECENT(romReserved,136); + RVECENT(romReserved,137); + RVECENT(romReserved,138); + RVECENT(romReserved,139); + RVECENT(romReserved,140); + RVECENT(romReserved,141); + RVECENT(romReserved,142); + RVECENT(romReserved,143); + XVECENT(romExcHandle,0x480);# bfc00480: EJTAG debug exception /* * We hope there are no more reserved vectors! -* 128 * 8 == 1024 == 0x400 -* so this is address R_VEC+0x400 == 0xbfc00400 +* 144 * 8 == 1152 == 0x480 +* so this is address R_VEC+0x480 == 0xbfc00480 */ .align 4 reset: IIUC those exception vectors of +0x400/+0x480 have nothing to do with 24K processor core nor 34K either. The change itself is Ok, and any other version taking Marek's comment into account is also welcome. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v5] ulpi: add generic ULPI functionality
Hi,
On Sun, Nov 27, 2011 at 4:19 PM, Jana Rapava ferma...@gmail.com wrote:
Add generic functions for reading, writing and setting bits in ULPI registers.
Signed-off-by: Jana Rapava ferma...@gmail.com
Cc: Remy Bohmer li...@bohmer.net
Cc: Stefano Babic sba...@denx.de
Cc: Igor Grinberg grinb...@compulab.co.il
Cc: Wolfgang Grandegger w...@denx.de
Cc: Simon Glass s...@chromium.org
---
Changes for v2:
- make code EHCI-independent
- use udelay() in waiting loop
- mark static functions as static
- naming changes
Changes for v3:
- merge with patch ulpi: add generic ULPI support header file
- rewrite ULPI interface in more functionality-oriented way
Changes for v4:
- add error-checking
- add waiting for completion into ulpi_reset() function
Changes for v5:
- CodingStyle changes
- add comments
- simplify implemenation of the ULPI interface functions
I think this is a lot cleaner, thank you.
Makefile | 1 +
drivers/usb/ulpi/Makefile | 45 +++
drivers/usb/ulpi/ulpi-viewport.c | 114 ++
drivers/usb/ulpi/ulpi.c | 158 +
include/usb/ulpi.h | 238
++
5 files changed, 556 insertions(+), 0 deletions(-)
create mode 100644 drivers/usb/ulpi/Makefile
create mode 100644 drivers/usb/ulpi/ulpi-viewport.c
create mode 100644 drivers/usb/ulpi/ulpi.c
create mode 100644 include/usb/ulpi.h
diff --git a/drivers/usb/ulpi/ulpi.c b/drivers/usb/ulpi/ulpi.c
new file mode 100644
index 000..c4dc408
--- /dev/null
+++ b/drivers/usb/ulpi/ulpi.c
@@ -0,0 +1,158 @@
[snip]
+int ulpi_drive_vbus(u32 ulpi_viewport,
+ int ext_power_supply, int use_ext_indicator)
+{
+ int flags = ULPI_OTG_DRVVBUS |
+ (ext_power_supply) ? ULPI_OTG_DRVVBUS_EXT : 0 |
+ (use_ext_indicator) ? ULPI_OTG_EXTVBUSIND : 0;
You have a few places where some people might prefer brackets, but not
important. This one I think really should be:
int flags = ULPI_OTG_DRVVBUS |
(ext_power_supply ? ULPI_OTG_DRVVBUS_EXT : 0) |
(use_ext_indicator ? ULPI_OTG_EXTVBUSIND : 0);
or perhaps if you like:
int flags = ULPI_OTG_DRVVBUS;
if (ext_power_supply)
flags |= ULPI_OTG_DRVVBUS_EXT;
if (use_ext_indicator)
flags |= ULPI_OTG_EXTVBUSIND;
+
+ return ulpi_write(ulpi_viewport, ulpi-otg_ctrl_set, flags);
+}
+
+/*
Otherwise:
Acked-by: Simon Glass s...@chromium.org
Regards,
Simon
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Re: [U-Boot] [PATCH 1/4] PXA: Drop CERF250 board
Hi Marek,
On Fri, Nov 25, 2011 at 10:53 AM, Marek Vasut marek.va...@gmail.com wrote:
The board is unmaintained and maintainer doesn't respond.
Should this and the other patches be version 2, or perhaps 3?
Also I like Mike's suggested phrasing (something like The board
doesn't build and maintainer doesn't respond) since if it built OK we
would presumably just leave it.
Regards,
Simon
Signed-off-by: Marek Vasut marek.va...@gmail.com
Cc: Simon Glass s...@chromium.org
Cc: Anatolij Gustschin ag...@denx.de
---
MAINTAINERS | 4 -
board/cerf250/Makefile | 43 -
board/cerf250/cerf250.c | 85 -
board/cerf250/flash.c | 429
-
boards.cfg | 1 -
doc/README.scrapyard | 1 +
include/configs/cerf250.h | 229
7 files changed, 1 insertions(+), 791 deletions(-)
delete mode 100644 board/cerf250/Makefile
delete mode 100644 board/cerf250/cerf250.c
delete mode 100644 board/cerf250/flash.c
delete mode 100644 include/configs/cerf250.h
diff --git a/MAINTAINERS b/MAINTAINERS
index 37bbb34..3835154 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -711,10 +711,6 @@ Sergey Kubushyn k...@koi8.net
SONATA ARM926EJS
SCHMOOGIE ARM926EJS
-Prakash Kumar prak...@embedx.com
-
- cerf250 xscale/pxa
-
Vipin Kumar vipin.ku...@st.com
spear300 ARM926EJS (spear300 Soc)
diff --git a/board/cerf250/Makefile b/board/cerf250/Makefile
deleted file mode 100644
index cf4742e..000
--- a/board/cerf250/Makefile
+++ /dev/null
@@ -1,43 +0,0 @@
-#
-# (C) Copyright 2000-2006
-# Wolfgang Denk, DENX Software Engineering, w...@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := cerf250.o flash.o
-
-SRCS := $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#
diff --git a/board/cerf250/cerf250.c b/board/cerf250/cerf250.c
deleted file mode 100644
index 043afea..000
--- a/board/cerf250/cerf250.c
+++ /dev/null
@@ -1,85 +0,0 @@
-/*
- * (C) Copyright 2002
- * Kyle Harris, Nexus Technologies, Inc. khar...@nexus-tech.net
- *
- * (C) Copyright 2002
- * Sysgo Real-Time Solutions, GmbH www.elinos.com
- * Marius Groeger mgroe...@sysgo.de
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include common.h
-#include netdev.h
-
-DECLARE_GLOBAL_DATA_PTR;
-
-/* -
*/
-
-
-/*
- * Miscelaneous platform dependent initialisations
- */
-
-int board_init (void)
-{
- /* We have RAM, disable cache */
- dcache_disable();
- icache_disable();
-
- /* arch number of cerf PXA Board */
- gd-bd-bi_arch_number = MACH_TYPE_PXA_CERF;
-
- /* adress of boot parameters */
- gd-bd-bi_boot_params = 0xa100;
-
- return 0;
-}
-
-int board_late_init(void)
-{
- setenv(stdout, serial);
- setenv(stderr, serial);
- return 0;
Re: [U-Boot] [PATCH 1/4] PXA: Drop CERF250 board
Hi Marek,
On Fri, Nov 25, 2011 at 10:53 AM, Marek Vasut marek.va...@gmail.com wrote:
The board is unmaintained and maintainer doesn't respond.
Should this and the other patches be version 2, or perhaps 3?
Probably.
Also I like Mike's suggested phrasing (something like The board
doesn't build and maintainer doesn't respond) since if it built OK we
would presumably just leave it.
I think they don't build, at least that's how it was when I recently tried. And
since I don't see any opposing force, let's drop them.
M
Regards,
Simon
Signed-off-by: Marek Vasut marek.va...@gmail.com
Cc: Simon Glass s...@chromium.org
Cc: Anatolij Gustschin ag...@denx.de
---
MAINTAINERS |4 -
board/cerf250/Makefile| 43 -
board/cerf250/cerf250.c | 85 -
board/cerf250/flash.c | 429
- boards.cfg
|1 -
doc/README.scrapyard |1 +
include/configs/cerf250.h | 229
7 files changed, 1 insertions(+), 791 deletions(-)
delete mode 100644 board/cerf250/Makefile
delete mode 100644 board/cerf250/cerf250.c
delete mode 100644 board/cerf250/flash.c
delete mode 100644 include/configs/cerf250.h
diff --git a/MAINTAINERS b/MAINTAINERS
index 37bbb34..3835154 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -711,10 +711,6 @@ Sergey Kubushyn k...@koi8.net
SONATA ARM926EJS
SCHMOOGIE ARM926EJS
-Prakash Kumar prak...@embedx.com
-
- cerf250 xscale/pxa
-
Vipin Kumar vipin.ku...@st.com
spear300ARM926EJS (spear300 Soc)
diff --git a/board/cerf250/Makefile b/board/cerf250/Makefile
deleted file mode 100644
index cf4742e..000
--- a/board/cerf250/Makefile
+++ /dev/null
@@ -1,43 +0,0 @@
-#
-# (C) Copyright 2000-2006
-# Wolfgang Denk, DENX Software Engineering, w...@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB= $(obj)lib$(BOARD).o
-
-COBJS := cerf250.o flash.o
-
-SRCS := $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-
-$(LIB):$(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-
# -
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-
# diff --git a/board/cerf250/cerf250.c b/board/cerf250/cerf250.c
deleted file mode 100644
index 043afea..000
--- a/board/cerf250/cerf250.c
+++ /dev/null
@@ -1,85 +0,0 @@
-/*
- * (C) Copyright 2002
- * Kyle Harris, Nexus Technologies, Inc. khar...@nexus-tech.net
- *
- * (C) Copyright 2002
- * Sysgo Real-Time Solutions, GmbH www.elinos.com
- * Marius Groeger mgroe...@sysgo.de
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include common.h
-#include netdev.h
-
-DECLARE_GLOBAL_DATA_PTR;
-
-/*
- */ -
-
-/*
- * Miscelaneous platform dependent initialisations
- */
-
-int board_init (void)
-{
- /* We have RAM, disable cache */
- dcache_disable();
- icache_disable();
-
- /* arch number of
Re: [U-Boot] [PATCH 1/4] PXA: Drop CERF250 board
Hi Marek, On Mon, Nov 28, 2011 at 9:21 AM, Marek Vasut marek.va...@gmail.com wrote: Hi Marek, On Fri, Nov 25, 2011 at 10:53 AM, Marek Vasut marek.va...@gmail.com wrote: The board is unmaintained and maintainer doesn't respond. Should this and the other patches be version 2, or perhaps 3? Probably. Also I like Mike's suggested phrasing (something like The board doesn't build and maintainer doesn't respond) since if it built OK we would presumably just leave it. I think they don't build, at least that's how it was when I recently tried. And since I don't see any opposing force, let's drop them. OK, so does that mean you will change the commit message along these lines and issue a new version? Regards, Simon M Regards, Simon Signed-off-by: Marek Vasut marek.va...@gmail.com Cc: Simon Glass s...@chromium.org Cc: Anatolij Gustschin ag...@denx.de --- MAINTAINERS | 4 - board/cerf250/Makefile | 43 - board/cerf250/cerf250.c | 85 - board/cerf250/flash.c | 429 - boards.cfg | 1 - doc/README.scrapyard | 1 + include/configs/cerf250.h | 229 7 files changed, 1 insertions(+), 791 deletions(-) delete mode 100644 board/cerf250/Makefile delete mode 100644 board/cerf250/cerf250.c delete mode 100644 board/cerf250/flash.c delete mode 100644 include/configs/cerf250.h diff --git a/MAINTAINERS b/MAINTAINERS index 37bbb34..3835154 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -711,10 +711,6 @@ Sergey Kubushyn k...@koi8.net SONATA ARM926EJS SCHMOOGIE ARM926EJS -Prakash Kumar prak...@embedx.com - - cerf250 xscale/pxa - Vipin Kumar vipin.ku...@st.com spear300 ARM926EJS (spear300 Soc) diff --git a/board/cerf250/Makefile b/board/cerf250/Makefile deleted file mode 100644 index cf4742e..000 --- a/board/cerf250/Makefile +++ /dev/null @@ -1,43 +0,0 @@ -# -# (C) Copyright 2000-2006 -# Wolfgang Denk, DENX Software Engineering, w...@denx.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -include $(TOPDIR)/config.mk - -LIB = $(obj)lib$(BOARD).o - -COBJS := cerf250.o flash.o - -SRCS := $(COBJS:.o=.c) -OBJS := $(addprefix $(obj),$(COBJS)) - -$(LIB): $(obj).depend $(OBJS) - $(call cmd_link_o_target, $(OBJS)) - - # - -# defines $(obj).depend target -include $(SRCTREE)/rules.mk - -sinclude $(obj).depend - - # diff --git a/board/cerf250/cerf250.c b/board/cerf250/cerf250.c deleted file mode 100644 index 043afea..000 --- a/board/cerf250/cerf250.c +++ /dev/null @@ -1,85 +0,0 @@ -/* - * (C) Copyright 2002 - * Kyle Harris, Nexus Technologies, Inc. khar...@nexus-tech.net - * - * (C) Copyright 2002 - * Sysgo Real-Time Solutions, GmbH www.elinos.com - * Marius Groeger mgroe...@sysgo.de - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#include common.h -#include netdev.h - -DECLARE_GLOBAL_DATA_PTR; - -/* - */ - - -/* - * Miscelaneous platform dependent
Re: [U-Boot] [PATCH] mmc: Implement card detection.
* Andy Fleming wrote:
On Thu, Nov 17, 2011 at 5:51 AM, Thierry Reding
thierry.red...@avionic-design.de wrote:
Check for board-specific card detect each time an MMC/SD device is
initialized. If card detection is not implemented, this code behaves as
before and continues assuming a card is present. If no card is detected,
has_init is reset for the MMC/SD device (to force initialization next
time) and an error is returned.
Signed-off-by: Thierry Reding thierry.red...@avionic-design.de
---
drivers/mmc/mmc.c | 9 +
1 files changed, 9 insertions(+), 0 deletions(-)
diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c
index 37ce6e8..d18c095 100644
--- a/drivers/mmc/mmc.c
+++ b/drivers/mmc/mmc.c
@@ -1191,6 +1191,15 @@ block_dev_desc_t *mmc_get_dev(int dev)
int mmc_init(struct mmc *mmc)
{
int err, retry = 3;
+ u8 card_detect = 0;
+
+ if (board_mmc_getcd(card_detect, mmc) == 0) {
Well, now the time has come to think about how we want this to work.
As some others noted, the FSL code has been treating the cd argument
to board_mmc_getcd() as a bit that is asserted low. My inclination is
to change all of them to work as you have proposed (cd == 1 == card
is detected), but I'd like input from the community. Card detection
isn't so speedy that the extra inversion required is much of a factor.
Are there any good arguments for keeping the meaning as ~CD?
Also, to handle code like is in fsl_esdhc.c for fallback in case no
board-specific code is written, I'm thinking we should use a mechanism
similar to the ethernet drivers:
if (board_eth_init != __def_eth_init) {
if (board_eth_init(bis) 0)
printf(Board Net Initialization Failed\n);
} else if (cpu_eth_init != __def_eth_init) {
if (cpu_eth_init(bis) 0)
printf(CPU Net Initialization Failed\n);
Basically, if the board_eth_init is set to something, call it.
Otherwise, call the cpu_eth_init, if it exists.
So we could have:
int mmc_getcd(mmc, cd) // mmc should always have been the first argument...
Yes, the cd parameter really should be second, or, as you propose later, not
be a parameter at all.
{
if (board_mmc_getcd != __def_mmc_getcd)
return board_mmc_getcd(mmc, cd);
else if (cpu_mmc_getcd != __def_mmc_getcd)
return cpu_mmc_getcd(mmc, cd);
return -1;
}
I don't see how that buys us much. What's wrong with the following? That's
much more straightforward in my opinion.
int mmc_getcd(struct mmc *mmc)
{
int cd;
cd = board_mmc_getcd(mmc);
if (cd 0)
cd = cpu_mmc_getcd(mmc);
return cd;
}
I don't have any real objections, though. It's probably more of a matter of
taste than technical merit. The only advantage that the second version has is
that it allows the cpu_mmc_getcd() to serve as fallback if board_mmc_getcd()
is implemented but still returns -1 (not implemented, for whatever reason).
Open questions:
1) If we use this sort of mechanism, we don't really need the -1
means it's not implemented error. Perhaps we could change it to be:
cd = mmc_getcd(mmc) ?
That can even work if we keep -1 to mean not implemented.
2) Should we add the ability for *drivers* to specify a card detect
mechanism, and if so, where should it fit in the priority order? Most
systems seem to provide GPIOs for the card detection, and even the
controllers which support card detection from the device are often not
always hooked up in such a way to actually *use* that support.
I'm not sure I understand what cpu_mmc_getcd() is supposed to mean. Shouldn't
that really be the driver default implementation instead? Typically the CPU
implementation will be the SoC implementation, right? In that case it would
really be the driver card-detect mechanism, not that of the CPU.
+ if (!card_detect) {
+ mmc-has_init = 0;
+ printf(MMC: no card present\n);
+ return NO_CARD_ERR;
+ }
+ }
Anyway, I liked this patch, and want to apply it, but there are some
issues we need to resolve before we can apply it.
Andy
Thierry
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Re: [U-Boot] [PATCH 1/6] tegra: Move cpu_init_cp15() to arch_cpu_init()
On 11/23/2011 03:59 PM, Simon Glass wrote: This call is more of an architecture requirement than a board one, so move it there. Signed-off-by: Simon Glass s...@chromium.org Acked-by: Stephen Warren swar...@nvidia.com -- nvpublic ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 2/6] tegra: Move clock_early_init() to arch_cpu_init()
On 11/23/2011 03:59 PM, Simon Glass wrote: The clock init is not board specific, so move it into the cpu code. Signed-off-by: Simon Glass s...@chromium.org Acked-by: Stephen Warren swar...@nvidia.com -- nvpublic ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 3/6] tegra: Add a function mux feature
On 11/23/2011 03:59 PM, Simon Glass wrote:
funcmux permits selection of config options for particular peripherals,
such as the pins that are used for that peripheral, if there are several
options.
Add UART selection to start with.
+static void enable_uart(enum periph_id pid)
+{
+ /* Assert UART reset and enable clock */
+ reset_set_enable(pid, 1);
+ clock_enable(pid);
+ clock_ll_set_source(pid, 0);/* UARTx_CLK_SRC = 00, PLLP_OUT0 */
+
+ /* wait for 2us */
+ udelay(2);
+
+ /* De-assert reset to UART */
+ reset_set_enable(pid, 0);
+}
That doesn't seem like anything to do with function muxing.
+void funcmux_select(enum periph_id id, int func)
Parameter func doesn't appear to be used. Is it to support e.g. UART1
being routed to different sets of pins based on board design? If so, the
values of func should be defined by this patch too, and validated in
the code below, so that people don't start passing bogus data without
issue now, then suddenly get hit when we see boards with different
pinmux configurations.
+{
+ switch (id) {
+ case PERIPH_ID_UART1:
+ pinmux_set_func(PINGRP_IRRX, PMUX_FUNC_UARTA);
+ pinmux_set_func(PINGRP_IRTX, PMUX_FUNC_UARTA);
+ pinmux_tristate_disable(PINGRP_IRRX);
+ pinmux_tristate_disable(PINGRP_IRTX);
+ break;
+
+ case PERIPH_ID_UART2:
+ pinmux_set_func(PINGRP_UAD, PMUX_FUNC_IRDA);
+ pinmux_tristate_disable(PINGRP_UAD);
+ break;
+
+ case PERIPH_ID_UART4:
+ pinmux_set_func(PINGRP_GMC, PMUX_FUNC_UARTD);
+ pinmux_tristate_disable(PINGRP_GMC);
+ break;
+
+ default:
+ debug(%s: invalid periph_id %d, __func__, id);
+ break;
+ }
+}
I'm not entirely convinced that centralizing this in a function rather
than putting the board-specific muxing into the per-board files is the
right way to go. What's wrong with the kernel's approach of a single
table describing each board's complete pinmux settings? Eventually, all
this will come from DT anyway, won't it?
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Re: [U-Boot] [PATCH 6/6] tegra: Fix build error in plutux, medcom
On 11/23/2011 03:59 PM, Simon Glass wrote:
We need to define CONFIG_ENV_IS_NOWHERE to avoid this error:
cmd_nvedit.c:69:3: error: #error Define one of
CONFIG_ENV_IS_IN_{EEPROM|FLASH|DATAFLASH|ONENAND|SPI_FLASH|MG_DISK|NVRAM|MMC}
or CONFIG_ENV_IS_NOWHERE
Seems like you need to wrap that.
Acked-by: Stephen Warren swar...@nvidia.com
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Re: [U-Boot] [PATCH 01/14] fdt: Tidy up a few fdtdec problems
On 11/23/2011 08:54 PM, Simon Glass wrote:
This fixes three trivial issues in fdtdec.c:
1. fdtdec_get_is_enabled() doesn't really need a default value
2. The fdt must be word-aligned, since otherwise it will fail on ARM
3. The compat_names[] array is missing its first element
diff --git a/lib/fdtdec.c b/lib/fdtdec.c
...
#define COMPAT(id, name) name
static const char * const compat_names[COMPAT_COUNT] = {
+ COMPAT(UNKNOWN, none),
};
Could you educate me on why that change is necessary? Maybe explain this
in the commit description?
-int fdtdec_get_is_enabled(const void *blob, int node, int default_val)
+int fdtdec_get_is_enabled(const void *blob, int node)
{
const char *cell;
cell = fdt_getprop(blob, node, status, NULL);
if (cell)
return 0 == strcmp(cell, ok);
- return default_val;
+ return 1;
}
Not that this patch changes this, but isn't okay also a legal
enabled value, and perhaps even the recommended value? See
http://lists.ozlabs.org/pipermail/devicetree-discuss/2011-July/006389.html.
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Re: [U-Boot] [PATCH 02/14] fdt: Add functions to access phandles, arrays and bools
On 11/23/2011 08:54 PM, Simon Glass wrote:
Add a function to lookup a property which is a phandle in a node, and
another to read a fixed-length integer array from an fdt property.
Also add a function to read boolean properties.
Signed-off-by: Simon Glass s...@chromium.org
Looking at the U-Boot custodians web page, you need to send the core DT
changes (well, probably anything DT related) to Jerry Van Baren.
+/**
+ * Look up a property in a node and return its contents in an integer
+ * array of given length. The property must have at least enough data for
+ * the array (4*count bytes). It may have more, but this will be ignored.
+ *
+ * @param blob FDT blob
+ * @param node node to examine
+ * @param prop_name name of property to find
+ * @param array array to fill with data
+ * @param count number of array elements
+ * @return 0 if ok, or -FDT_ERR_NOTFOUND if the property is not found,
+ * or -FDT_ERR_BADLAYOUT if not enough data
+ */
+int fdtdec_get_int_array(const void *blob, int node, const char *prop_name,
+ int *array, int count);
The kernel's equivalent of this function retrieves an array of U32s. Is
one version more correct than the other?
+/**
+ * Look up a boolean property in a node and return it.
+ *
+ * A boolean properly is true if present in the device tree and false if not
+ * present, or present with a 0 value.
+ *
+ * @param blob FDT blob
+ * @param node node to examine
+ * @param prop_name name of property to find
+ * @return 1 if the properly is present; 0 if it isn't present or is 0
+ */
+int fdtdec_get_bool(const void *blob, int node, const char *prop_name);
Does U-Boot allow use of the bool type here?
+/**
+ * Look up a property in a node and check that it has a minimum length.
+ *
+ * @param blob FDT blob
+ * @param node node to examine
+ * @param prop_name name of property to find
+ * @param min_lenminimum property length in bytes
+ * @param err0 if ok, or -FDT_ERR_NOTFOUND if the property
is not
+ found, or -FDT_ERR_BADLAYOUT if not enough data
+ * @return pointer to cell, which is only valid if err == 0
+ */
+static const void *get_prop_len(const void *blob, int node,
+ const char *prop_name, int min_len, int *err)
Based on the function name, I'd expect it to return the length of the
property; perhaps get_prop_check_min_len?
+/**
+ * Look up a boolean property in a node and return it.
+ *
+ * A boolean properly is true if present in the device tree and false if not
+ * present, or present with a 0 value.
+ *
+ * @param blob FDT blob
+ * @param node node to examine
+ * @param prop_name name of property to find
+ * @return 1 if the properly is present; 0 if it isn't present or is 0
+ */
+int fdtdec_get_bool(const void *blob, int node, const char *prop_name)
+{
+ const s32 *cell;
+ int len;
+
+ debug(%s: %s\n, __func__, prop_name);
+ cell = fdt_getprop(blob, node, prop_name, len);
+ if (!cell)
+ return 0;
+ if (len = sizeof(u32) *cell == 0)
+ return 0;
+
+ return 1;
+}
In the kernel, I believe that property existence is all that's usually
checked. Is that wrong? Did the definition of a boolean property's value
in the function description above come from the specification? If a
property had a length of 0/1/2/3 with a zero value, it seems very odd to
treat that as true.
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Re: [U-Boot] [PATCH] tools/envcrc: fix compile breakage
On Mon, Nov 28, 2011 at 04:04, Igor Grinberg wrote: I don't have the tool chain for ppc. http://dev.gentoo.org/~vapier/u-boot/ -mike ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [GIT PULL] Pull request: u-boot-staging
Dear Igor Grinberg, In message 4ece39a9.4080...@compulab.co.il you wrote: As for my understanding, the delivery path ends with the repository from which the pull process starts. That makes no sense either. What about the case where the author provides (say, for convenience) a git repository where we can pull from, instead of applying the posting from the ML or PW? Well, I don't see how this is different from the custodian case, except that contributor is not a custodian. So would the custodian have to sign then, or not? If yes, how would he do in a convenient way (git pull does not provide a -s option or similar to auto-sign all pulled commits [which would not make sense to me anyway])? If no, then what is the difference between the git pull and - say - a git am ? Hm... what's the difference then between pulling from a tree or cherry picking from it? What about rebasing a tree? Cherry picking changes the commit id even if there are no conflicts and can be done only on one commit at a time. I cannot see what is special with a commit id in the context of signing a patch, or not. My understanding is that the SCM is just an unrelated tool here, andw e could use SVN or even (ick!) CVS instead, and still the concept of Signed-off-by:s should and would work. Let me make it clear, I'm not arguing that one way is better then another. I just thought that we are following the Linux model, as there is no document describing, how this thing should be done. Is there a document that describes exactly how this is be done for Linux? So far, all our conclusions appear to be derived from observations. Again, no rule - is kind of rule, but it would be nice to have a document describing this decision, so less questions will arise. Agreed. Does Linux have such a thing? [I could not find anything that goes into more detail than the SP file, which IMO is not really clear about that.] Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de Always try to do things in chronological order; it's less confusing that way. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] Pull request: u-boot-video/master
Dear Anatolij Gustschin, In message 2027202055.15fa9fe2@wker you wrote: Hello Wolfgang, The following changes since commit fdbe8b9a2d1858ba35dd6214315563ad44d4a0e3: Merge branch 'h...@denx.de' of git://git.denx.de/u-boot-staging (2011-11-23 21:23:45 +0100) are available in the git repository at: git://git.denx.de/u-boot-video.git master Jerry Huang (1): DIU: 1080P and 720P support Marek Vasut (1): CFB: Fix font rendering on mx5 framebuffer drivers/video/cfb_console.c |2 +- drivers/video/fsl_diu_fb.c | 38 ++ 2 files changed, 39 insertions(+), 1 deletions(-) Applied, thanks. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de I think it's a new feature. Don't tell anyone it was an accident. :-) -- Larry Wall on s/foo/bar/eieio in 10...@jpl-devvax.jpl.nasa.gov ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] practicality of demonstrating u-boot in a QEMU session?
On Mon, 28 Nov 2011, Wolfgang Denk wrote: Dear Robert P. J. Day, In message alpine.DEB.2.02.280701300.6538@oneiric you wrote: i'm teaching some embedded linux next week and, while i will have physical boards for the students to play with, i'd also like to demonstrate basic u-boot within a QEMU session as far as that's practical. Or use sandbox? ah, i was unaware of that, thanks. rday -- Robert P. J. Day Ottawa, Ontario, CANADA http://crashcourse.ca Twitter: http://twitter.com/rpjday LinkedIn: http://ca.linkedin.com/in/rpjday ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v4] Add board_pre_console_putc to deal with early console output
On Fri, Nov 25, 2011 at 3:53 AM, Stefano Babic sba...@denx.de wrote: On 25/11/2011 08:35, Simon Glass wrote: Hi, On Tue, Oct 18, 2011 at 4:50 PM, Graeme Russ graeme.r...@gmail.com wrote: Hi Simon, Hi Simon, A new board_pre_console_putc() function is added to the board API. If provided by the board it will be called in the event of console output before the console is ready. This function should turn on all UARTs and spray the character out if it possibly can. The feature is controlled by a new CONFIG_PRE_CONSOLE_PUTC option. Signed-off-by: Simon Glass s...@chromium.org Acked-by: Graeme Russ graeme.r...@gmail.com Just going through my backlog. Any interest in merging this? I have frankly missed the patch - I will read the related thread, and I will take a look. For now I will put this patch in my TODO list in patchwork. Hi Stefano, Thank you - no particular reason for you to notice it, but I thought I would cc you. The original purpose was to get some sort of message out of a board that fails very early (before console_init_f()). It is useful when using an fdt, since if the fdt cannot be found it is nice to print a friendly message somehow. Regards, Simon Best regards, Stefano -- = DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: off...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 05/14] tegra: fdt: Add Tegra2x device tree file
On 11/23/2011 08:54 PM, Simon Glass wrote: This was taken from commit 1ea6b8f at: git://git.kernel.org/pub/scm/linux/kernel/git/olof/tegra.git That's not the latest version in linux-next. Also, this doesn't include quite a few changes that have been sent to the mailing lists but not yet applied. In particular, linux-next now includes a minimal USB binding. Should we just use this in U-Boot for now? We should get review on the kernel lists before bringing in this more advanced USB binding in U-Boot, and perhaps even add the binding into the kernel at the same time? Patches have been posted to: * Convert to the finalized ARM GIC binding. * Disable devices in the per-board .dts files that aren't used on those boards. * Various other cleanups in order to make the .dts files match the kernel's non-DT board files. * Perhaps more that I forget. I suppose those could be applied to U-Boot as and when they are applied to the kernel. -- nvpublic ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] Pull request: u-boot-staging (updated)
Dear Anatolij Gustschin,
In message 202831.10432bf4@wker you wrote:
Hello Wolfgang,
Added a patch from Stefano.
The following changes since commit 99258c34103efad3395c679256a221731d010c4b:
Merge branch 'master' of git://git.denx.de/u-boot-mmc (2011-11-27 16:03:21
+0100)
are available in the git repository at:
git://git.denx.de/u-boot-staging ag...@denx.de
Alexander Holler (1):
OMAP3: Use sdelay from arch/arm/cpu/armv7/syslib.c instead of cloning
that.
Christian Riesch (3):
davinci_schmoogie: define CONFIG_MACH_TYPE for davinci_schmoogie board
davinci_sonata: define CONFIG_MACH_TYPE for davinci_sonata board
hawkboard: Replace HAWKBOARD_KICK{0, 1}_UNLOCK defines
Igor Grinberg (1):
dataflash: fix parameters order in write_dataflash()
Stefano Babic (1):
MAKEALL: drop obsolete mx31pdk_nand target
Stelian Pop (1):
Fix Stelian's email address
Yan-Pai Chen (1):
arm: a320evb: define mach-type in board config file
CREDITS|2 +-
MAINTAINERS|2 +-
MAKEALL|1 -
arch/arm/cpu/arm920t/at91/at91rm9200_devices.c |2 +-
arch/arm/cpu/arm926ejs/at91/at91cap9_devices.c |2 +-
arch/arm/cpu/arm926ejs/at91/at91sam9260_devices.c |2 +-
arch/arm/cpu/arm926ejs/at91/at91sam9261_devices.c |2 +-
arch/arm/cpu/arm926ejs/at91/at91sam9263_devices.c |2 +-
.../cpu/arm926ejs/at91/at91sam9m10g45_devices.c|2 +-
arch/arm/cpu/arm926ejs/at91/at91sam9rl_devices.c |2 +-
arch/arm/cpu/arm926ejs/at91/led.c |2 +-
arch/arm/cpu/arm926ejs/at91/reset.c|2 +-
arch/arm/cpu/arm926ejs/at91/timer.c|2 +-
arch/arm/cpu/arm926ejs/mb86r0x/timer.c |2 +-
arch/arm/cpu/armv7/omap3/board.c | 12 +---
arch/arm/include/asm/arch-at91/at91_common.h |2 +-
arch/arm/include/asm/arch-at91/at91cap9.h |2 +-
arch/arm/include/asm/arch-at91/at91cap9_matrix.h |2 +-
arch/arm/include/asm/arch-at91/clk.h |2 +-
arch/arm/include/asm/arch-at91/hardware.h |2 +-
arch/arm/include/asm/arch-davinci/davinci_misc.h |3 ---
arch/arm/include/asm/dma-mapping.h |2 +-
board/afeb9260/Makefile|2 +-
board/afeb9260/afeb9260.c |2 +-
board/atmel/at91sam9260ek/Makefile |2 +-
board/atmel/at91sam9260ek/at91sam9260ek.c |2 +-
board/atmel/at91sam9260ek/led.c|2 +-
board/atmel/at91sam9261ek/Makefile |2 +-
board/atmel/at91sam9261ek/at91sam9261ek.c |2 +-
board/atmel/at91sam9261ek/led.c|2 +-
board/atmel/at91sam9263ek/Makefile |2 +-
board/atmel/at91sam9263ek/at91sam9263ek.c |2 +-
board/atmel/at91sam9263ek/led.c|2 +-
board/atmel/at91sam9m10g45ek/Makefile |2 +-
board/atmel/at91sam9m10g45ek/at91sam9m10g45ek.c|2 +-
board/atmel/at91sam9m10g45ek/led.c |2 +-
board/atmel/at91sam9rlek/Makefile |2 +-
board/atmel/at91sam9rlek/at91sam9rlek.c|2 +-
board/atmel/at91sam9rlek/led.c |2 +-
board/calao/sbc35_a9g20/Makefile |2 +-
board/calao/sbc35_a9g20/sbc35_a9g20.c |2 +-
board/calao/tny_a9260/Makefile |2 +-
board/calao/tny_a9260/tny_a9260.c |2 +-
board/davinci/da8xxevm/hawkboard.c |4 ++--
board/davinci/da8xxevm/hawkboard_nand_spl.c|4 ++--
board/davinci/schmoogie/schmoogie.c|3 ---
board/davinci/sonata/sonata.c |3 ---
board/emk/top9000/top9000.c|2 +-
board/esd/meesc/Makefile |2 +-
board/esd/meesc/meesc.c|2 +-
board/esd/otc570/Makefile |2 +-
board/esd/otc570/otc570.c |2 +-
board/eukrea/cpu9260/Makefile |2 +-
board/eukrea/cpu9260/cpu9260.c |2 +-
board/faraday/a320evb/a320evb.c|1 -
board/ronetix/pm9261/Makefile |2 +-
board/ronetix/pm9261/led.c |2 +-
board/ronetix/pm9261/pm9261.c |2 +-
board/ronetix/pm9263/Makefile |2 +-
board/ronetix/pm9263/led.c |2 +-
board/ronetix/pm9263/pm9263.c |2 +-
board/ronetix/pm9g45/Makefile |2 +-
board/ronetix/pm9g45/pm9g45.c
Re: [U-Boot] [RFC PATCH 1/3] MAINTAINERS: Fix my email address
Dear Stephen Warren, In message 1321735649-27138-2-git-send-email-swar...@nvidia.com you wrote: I forgot to edit it when I cut/paste Tom Warren's MAINTAINERS entry. Signed-off-by: Stephen Warren swar...@nvidia.com --- MAINTAINERS |2 +- 1 files changed, 1 insertions(+), 1 deletions(-) Applied, thanks. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de More software projects have gone awry for lack of calendar time than for all other causes combined. - Fred Brooks, Jr., _The Mythical Man Month_ ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
