Re: [U-Boot] UBIFS fails on SheevaPlug
Tried latest available version for SheevaPlug: Marvell version U-Boot 2012.04.01 (Jun 01 2012 - 02:27:06) Marvell-Sheevaplug - eSATA - SD/MMC gcc (Debian 4.6.3-5) 4.6.3 GNU ld (GNU Binutils for Debian) 2.22 Same result. Do you know if u-boot has a functionality to recover ubifs partitions? On Mon, Oct 29, 2012 at 7:25 AM, Dimax dimax.m...@gmail.com wrote: Hi. 1) Is this an upstream u-boot? Marvell version U-Boot 2011.12 (Jan 08 2012 - 21:53:47) Marvell-Sheevaplug - eSATA - SD/MMC gcc (Debian 4.6.2-9) 4.6.2 GNU ld (GNU Binutils for Debian) 2.22 I will try latest one today. 2) Can you NAND (driver) do subpage writes ? How can I know it? On Mon, Oct 29, 2012 at 12:54 AM, Marek Vasut ma...@denx.de wrote: Dear Dimax, HI, After power short u-boot fails to mount UBIFS and board stuck. Below is a trace of u-boot Marvell boot UBI: mtd1 is detached from ubi0 Creating 1 MTD partitions on nand0: 0x0050-0x2000 : mtd=2 UBI: attaching mtd1 to ubi0 UBI: physical eraseblock size: 131072 bytes (128 KiB) UBI: logical eraseblock size:129024 bytes UBI: smallest flash I/O unit:2048 UBI: sub-page size: 512 [...] 1) Is this an upstream u-boot? 2) Can you NAND (driver) do subpage writes ? Best regards, Marek Vasut ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] UBIFS fails on SheevaPlug
Dear Dimax, On 29.10.12 07:38, Dimax wrote: Tried latest available version for SheevaPlug: Marvell version U-Boot 2012.04.01 (Jun 01 2012 - 02:27:06) Marvell-Sheevaplug - eSATA - SD/MMC gcc (Debian 4.6.3-5) 4.6.3 GNU ld (GNU Binutils for Debian) 2.22 Same result. Do you know if u-boot has a functionality to recover ubifs partitions? It should work. AFAIR there is a problem when the malloc arena is to small. I do currently not know if [1] made it into mainline. However, can you please check if expanding the CONFIG_SYS_MALLOC_LEN fixes your problem? Best regards Andreas Bießmann [1] http://article.gmane.org/gmane.comp.boot-loaders.u-boot/124769 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] UBIFS fails on SheevaPlug
HI, So you say I have to rebuild u-boot with expanded CONFIG_SYS_MALLOC_LEN. So far I have used rebuild images from: http://people.debian.org/~tbm/u-boot/2011.12-3/sheevaplug/u-boot.kwb I see following files in the parrent directory: [image: [ ]] u-boot_2012.04.01-2.debian.tar.gz http://people.debian.org/%7Etbm/u-boot/2012.04.01-2/u-boot_2012.04.01-2.debian.tar.gz[image: [ ]] u-boot_2012.04.01-2_armel.deb http://people.debian.org/%7Etbm/u-boot/2012.04.01-2/u-boot_2012.04.01-2_armel.deb[image: [ ]] u-boot_2012.04.01.orig.tar.bz2 http://people.debian.org/%7Etbm/u-boot/2012.04.01-2/u-boot_2012.04.01.orig.tar.bz2 Is it all I need to rebuild? Are there any general instructions? On Mon, Oct 29, 2012 at 8:48 AM, Andreas Bießmann andreas.de...@googlemail.com wrote: Dear Dimax, On 29.10.12 07:38, Dimax wrote: Tried latest available version for SheevaPlug: Marvell version U-Boot 2012.04.01 (Jun 01 2012 - 02:27:06) Marvell-Sheevaplug - eSATA - SD/MMC gcc (Debian 4.6.3-5) 4.6.3 GNU ld (GNU Binutils for Debian) 2.22 Same result. Do you know if u-boot has a functionality to recover ubifs partitions? It should work. AFAIR there is a problem when the malloc arena is to small. I do currently not know if [1] made it into mainline. However, can you please check if expanding the CONFIG_SYS_MALLOC_LEN fixes your problem? Best regards Andreas Bießmann [1] http://article.gmane.org/gmane.comp.boot-loaders.u-boot/124769 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] video: atmel: implement lcd_setcolreg funtion
Signed-off-by: Bo Shen voice.s...@atmel.com
---
drivers/video/atmel_hlcdfb.c |6 ++
1 file changed, 6 insertions(+)
diff --git a/drivers/video/atmel_hlcdfb.c b/drivers/video/atmel_hlcdfb.c
index beb7fa3..4110d4d 100644
--- a/drivers/video/atmel_hlcdfb.c
+++ b/drivers/video/atmel_hlcdfb.c
@@ -51,6 +51,12 @@ short console_row;
#define lcdc_readl(reg)__raw_readl((reg))
#define lcdc_writel(reg, val) __raw_writel((val), (reg))
+void lcd_setcolreg(ushort regno, ushort red, ushort green, ushort blue)
+{
+ lcdc_writel((red 16) | (green 8) | blue,
+ panel_info.mmio + ATMEL_LCDC_LUT(regno));
+}
+
void lcd_ctrl_init(void *lcdbase)
{
unsigned long value;
--
1.7.9.5
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Re: [U-Boot] [PATCH] OMAP3: igep0020: Add pad config for WIFI/BT GPIOs
Hi, 2012/10/28 Anders Hedlund anders.j.hedl...@gmail.com: This adds support for WIFI/BT GPIOs which were previously missing. Signed-off-by: Anders Hedlund anders.j.hedl...@gmail.com Cc: Enric Balletbo i Serra eballe...@iseebcn.com Cc: Jonas Zetterberg j...@jozz.se --- board/isee/igep0020/igep0020.h |6 ++ 1 file changed, 6 insertions(+) diff --git a/board/isee/igep0020/igep0020.h b/board/isee/igep0020/igep0020.h index 3335ecc..283b75e 100644 --- a/board/isee/igep0020/igep0020.h +++ b/board/isee/igep0020/igep0020.h @@ -132,6 +132,12 @@ static void setup_net_chip(void); MUX_VAL(CP(MMC1_DAT1), (IEN | PTU | EN | M0)) /* MMC1_DAT1 */\ MUX_VAL(CP(MMC1_DAT2), (IEN | PTU | EN | M0)) /* MMC1_DAT2 */\ MUX_VAL(CP(MMC1_DAT3), (IEN | PTU | EN | M0)) /* MMC1_DAT3 */\ + MUX_VAL(CP(CAM_HS), (IDIS | PTU | DIS | M4)) /* GPIO_94 */\ + MUX_VAL(CP(CAM_VS), (IDIS | PTU | DIS | M4)) /* GPIO_95 */\ + MUX_VAL(CP(MMC2_DAT4), (IDIS | PTU | DIS | M4)) /* GPIO_136 */\ + MUX_VAL(CP(MMC2_DAT5), (IDIS | PTU | DIS | M4)) /* GPIO_137 */\ + MUX_VAL(CP(MMC2_DAT6), (IDIS | PTU | DIS | M4)) /* GPIO_138 */\ + MUX_VAL(CP(MMC2_DAT7), (IDIS | PTU | DIS | M4)) /* GPIO_139 */\ MUX_VAL(CP(UART3_TX_IRTX), (IDIS | PTD | DIS | M0)) /* UART3_TX */\ MUX_VAL(CP(UART3_RX_IRRX), (IEN | PTD | DIS | M0)) /* UART3_RX */\ MUX_VAL(CP(I2C1_SCL), (IEN | PTU | EN | M0)) /* I2C1_SCL */\ -- 1.7.10.4 Thanks for the patch but u-boot should only mux the pins they use, as u-boot does not use wifi this is not applicable here. Did you have problems with wifi ? Then we should check if these pins are muxe'd at kernel level, I think so. Cheers, Enric ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] USB gadget driver
Hi All, I am porting the USB gadget driver to a new hardware. Problems I encounter: 1) In bulk_out_complete, the bh-state is set to BUF_STATE_FULL, then after sleep_thread of the wait for CBW to arrive, it becomes BUF_STATE_BUSY. Please help me. victor CONFIDENTIALITY NOTE: This e-mail and any attachments may contain confidential information and may be protected by legal privilege. If you are not the intended addressee (or authorized to receive for the addressee). be aware that any disclosure, copying, distribution or use of this e-mail or any attachment is prohibited. If you have received this e-mail in error, please notify us immediately by returning it to the sender and delete this copy from your system. Thank you for your cooperation. KeyASIC Inc. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] UBIFS fails on SheevaPlug
Dear Dimax, On 29.10.2012 07:55, Dimax wrote: HI, So you say I have to rebuild u-boot with expanded CONFIG_SYS_MALLOC_LEN. So far I have used rebuild images from: http://people.debian.org/~tbm/u-boot/2011.12-3/sheevaplug/u-boot.kwb http://people.debian.org/%7Etbm/u-boot/2011.12-3/sheevaplug/u-boot.kwb I see following files in the parrent directory: [ ] u-boot_2012.04.01-2.debian.tar.gz http://people.debian.org/%7Etbm/u-boot/2012.04.01-2/u-boot_2012.04.01-2.debian.tar.gz [ ] u-boot_2012.04.01-2_armel.deb http://people.debian.org/%7Etbm/u-boot/2012.04.01-2/u-boot_2012.04.01-2_armel.deb [ ] u-boot_2012.04.01.orig.tar.bz2 http://people.debian.org/%7Etbm/u-boot/2012.04.01-2/u-boot_2012.04.01.orig.tar.bz2 so if you are using a distributed version of u-boot, why don't file a bug there? Is it all I need to rebuild? Yes, after increasing the size of malloc arena (supposed my suspicion is correct). Are there any general instructions? Does u-boot-src/README section 'Building the Software' fit your needs? BEWARE! If you never built u-boot you should know you may brick your device, see the countless de-bricking guides for sheevaplug and prove you can de-brick it before you brick it ;) Best regards Andreas Bießmann ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] UBIFS fails on SheevaPlug
Hi, What if I compile a new u-boot but to try it I will load and flash new created image after original u-boot and will run it from withing original reboot manually just pointing a new image address? Can it work? On Mon, Oct 29, 2012 at 10:38 AM, Andreas Bießmann andreas.de...@googlemail.com wrote: Dear Dimax, On 29.10.2012 07:55, Dimax wrote: HI, So you say I have to rebuild u-boot with expanded CONFIG_SYS_MALLOC_LEN. So far I have used rebuild images from: http://people.debian.org/~tbm/u-boot/2011.12-3/sheevaplug/u-boot.kwb http://people.debian.org/%7Etbm/u-boot/2011.12-3/sheevaplug/u-boot.kwb I see following files in the parrent directory: [ ] u-boot_2012.04.01-2.debian.tar.gz http://people.debian.org/%7Etbm/u-boot/2012.04.01-2/u-boot_2012.04.01-2.debian.tar.gz [ ] u-boot_2012.04.01-2_armel.deb http://people.debian.org/%7Etbm/u-boot/2012.04.01-2/u-boot_2012.04.01-2_armel.deb [ ] u-boot_2012.04.01.orig.tar.bz2 http://people.debian.org/%7Etbm/u-boot/2012.04.01-2/u-boot_2012.04.01.orig.tar.bz2 so if you are using a distributed version of u-boot, why don't file a bug there? Is it all I need to rebuild? Yes, after increasing the size of malloc arena (supposed my suspicion is correct). Are there any general instructions? Does u-boot-src/README section 'Building the Software' fit your needs? BEWARE! If you never built u-boot you should know you may brick your device, see the countless de-bricking guides for sheevaplug and prove you can de-brick it before you brick it ;) Best regards Andreas Bießmann ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] UBIFS fails on SheevaPlug
Dear Dimax, please do not TOFU. On 29.10.2012 09:50, Dimax wrote: Hi, What if I compile a new u-boot but to try it I will load and flash new created image after original u-boot and will run it from withing original reboot manually just pointing a new image address? Can it work? well, you mean to run a u-boot out of a running u-boot? U-Boot is not designed to do so. But some devices may allow you to just run a newer u-boot from a running one (at91;). You need to know that u-boot set up your SDRAM timings which destroys the content of the DRAM. So if your new u-boot is located there it can not be executed. I dunno if the kirkwood can do so, but I think they can not. You will need a) a JTAG b) another boot device, for example USB, MMC, whichever device the kirwood SoC can read from its ROM code (I do not know) to de-brick it. Please ask some kirkwood specialist or google, there are a lot of sheevaplug hackers out there, one of them may be able to help you here. Best regards Andreas Bießmann ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [RFC] common/lcd: use lcd_setcolreg() in bitmap_plot
Hi Nikita, On 28.10.2012 08:10, Nikita Kiryanov wrote: Hi Andreas, I think this change can also be applied to lcd_display_bitmap(), and then configuration_get_cmap() can be eliminated. hopefully yes, but first of all I would like to hear that the change can work on all supported devices, so please test and send results to the list. Best regards Andreas Bießmann ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [RFC] common/lcd: use lcd_setcolreg() in bitmap_plot
On 10/26/2012 19:23, Andreas Bießmann wrote:
The lcd_setcolreg() is a API provided by the lcd driver and used to setup the
color lookup table. However the lcd driver setup the CLUT by using a lot
of #ifdiffery and accessing the CLUT arrays which are cleanly hidden by the API
call. Remove that and use the API.
Signed-off-by: Andreas Bießmann andreas.de...@googlemail.com
Cc: Marek Vasut ma...@denx.de
Cc: Bo Shen voice.s...@atmel.com
Cc: Tom Rini tr...@ti.com
---
This is a RFC currently cause it touches a lot of boards but is only runtime
tested on at91sam9263ek. Unfortunately a 'MAKEALL -a arm' does break cause the
atmel_hlcd driver do not provide the required API (lcd_setcolreg()) - Bo, can
you please fix this, I do not have an atmel_hlcdc enabled device.
On the other hand this change also touches other architectures I can not test.
This patch is actually only compile tested for arm and avr32 arches.
And last I have to say that there is another position in this file where the
CLUT is modified directly by the code. This should also be changed to use the
lcd_setcolreg API.
This patch shall superseed http://patchwork.ozlabs.org/patch/193466/
common/lcd.c | 47 +--
1 file changed, 9 insertions(+), 38 deletions(-)
Tested on sam9x5ek board. It works well.
Tested-by: Bo Shen voice.s...@atmel.com
diff --git a/common/lcd.c b/common/lcd.c
index b6be800..4938381 100644
--- a/common/lcd.c
+++ b/common/lcd.c
@@ -523,11 +523,6 @@ static inline ushort *configuration_get_cmap(void)
#ifdef CONFIG_LCD_LOGO
void bitmap_plot(int x, int y)
{
-#ifdef CONFIG_ATMEL_LCD
- uint *cmap = (uint *)bmp_logo_palette;
-#else
- ushort *cmap = (ushort *)bmp_logo_palette;
-#endif
ushort i, j;
uchar *bmap;
uchar *fb;
@@ -545,44 +540,20 @@ void bitmap_plot(int x, int y)
fb = (uchar *)(lcd_base + y * lcd_line_length + x);
if (NBITS(panel_info.vl_bpix) 12) {
- /* Leave room for default color map
-* default case: generic system with no cmap (most likely 16bpp)
-* cmap was set to the source palette, so no change is done.
-* This avoids even more ifdefs in the next stanza
-*/
-#if defined(CONFIG_MPC823)
- cmap = (ushort *) (cp-lcd_cmap[BMP_LOGO_OFFSET *
sizeof(ushort)]);
-#elif defined(CONFIG_ATMEL_LCD)
- cmap = (uint *)configuration_get_cmap();
-#else
- cmap = configuration_get_cmap();
-#endif
WATCHDOG_RESET();
/* Set color map */
for (i = 0; i ARRAY_SIZE(bmp_logo_palette); ++i) {
- ushort colreg = bmp_logo_palette[i];
-#ifdef CONFIG_ATMEL_LCD
- uint lut_entry;
-#ifdef CONFIG_ATMEL_LCD_BGR555
- lut_entry = ((colreg 0x000F) 11) |
- ((colreg 0x00F0) 2) |
- ((colreg 0x0F00) 7);
-#else /* CONFIG_ATMEL_LCD_RGB565 */
- lut_entry = ((colreg 0x000F) 1) |
- ((colreg 0x00F0) 3) |
- ((colreg 0x0F00) 4);
-#endif
- *(cmap + BMP_LOGO_OFFSET) = lut_entry;
- cmap++;
-#else /* !CONFIG_ATMEL_LCD */
-#ifdef CONFIG_SYS_INVERT_COLORS
- *cmap++ = 0x - colreg;
-#else
- *cmap++ = colreg;
-#endif
-#endif /* CONFIG_ATMEL_LCD */
+ /* use the most significant bits here */
+ uint8_t red = ((bmp_logo_palette[i] 4) 0xF0);
+ uint8_t green = ((bmp_logo_palette[i] 0) 0xF0);
+ uint8_t blue = ((bmp_logo_palette[i] 4) 0xF0);
+ debug(LCD: setup colreg %u with
+ R: 0x%02x G: 0x%02x B: 0x%02x (0x%04x)\n,
+ i+BMP_LOGO_OFFSET, red, green, blue,
bmp_logo_palette[i]);
+ /* leave room for the default colormap here */
+ lcd_setcolreg(i+BMP_LOGO_OFFSET, red, green, blue);
}
WATCHDOG_RESET();
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Re: [U-Boot] UBIFS fails on SheevaPlug
On Mon, Oct 29, 2012 at 11:11 AM, Andreas Bießmann andreas.de...@googlemail.com wrote: Dear Dimax, please do not TOFU. Sorry don't know what you mean? On 29.10.2012 09:50, Dimax wrote: Hi, What if I compile a new u-boot but to try it I will load and flash new created image after original u-boot and will run it from withing original reboot manually just pointing a new image address? Can it work? I'm not going to run new-u-boot from RAM. I will flash it. Can I ask original u-boot to JMP to a flash address and run a new-u-boot from where? I once debricked SheevaPlug with USB stick. Have to recall how it was done. But as far as I remember I've found it in the internet so it should be still where. I understand that I first have to make sure I can debrick my board before I start playing with u-boot. I also want to look back at my original problem of non-recovered UBIFS. Want to make sure my effort will not be useless. Let's say I've increased the memory allocation size. But are you sure u-boot implementation of ubifs really can recover partitions just like original Linux driver does? Is it implemented at all? If yes I have another doubt. In one forum I've read that u-boot treats UBIFS partition as read only (while it actually is rw for Linux). And thus u-boot does not even try to take any action that required writes. What you think? well, you mean to run a u-boot out of a running u-boot? U-Boot is not designed to do so. But some devices may allow you to just run a newer u-boot from a running one (at91;). You need to know that u-boot set up your SDRAM timings which destroys the content of the DRAM. So if your new u-boot is located there it can not be executed. I dunno if the kirkwood can do so, but I think they can not. You will need a) a JTAG b) another boot device, for example USB, MMC, whichever device the kirwood SoC can read from its ROM code (I do not know) to de-brick it. Please ask some kirkwood specialist or google, there are a lot of sheevaplug hackers out there, one of them may be able to help you here. Best regards Andreas Bießmann ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] UBIFS fails on SheevaPlug
Dear Dimax, On 29.10.2012 10:27, Dimax wrote: On Mon, Oct 29, 2012 at 11:11 AM, Andreas Bießmann andreas.de...@googlemail.com mailto:andreas.de...@googlemail.com wrote: Dear Dimax, please do not TOFU. Sorry don't know what you mean? you did it right ;) http://en.wikipedia.org/wiki/Top-posting#Top-posting On 29.10.2012 09:50, Dimax wrote: Hi, What if I compile a new u-boot but to try it I will load and flash new created image after original u-boot and will run it from withing original reboot manually just pointing a new image address? Can it work? I'm not going to run new-u-boot from RAM. I will flash it. Can I ask original u-boot to JMP to a flash address and run a new-u-boot from where? well, NAND is no XIP media, you need to move the stuff _always_ from NAND to RAM to use it. I once debricked SheevaPlug with USB stick. Have to recall how it was done. But as far as I remember I've found it in the internet so it should be still where. I understand that I first have to make sure I can debrick my board before I start playing with u-boot. Ok. I also want to look back at my original problem of non-recovered UBIFS. Want to make sure my effort will not be useless. Let's say I've increased the memory allocation size. But are you sure u-boot implementation of ubifs really can recover partitions just like original Linux driver does? Is it implemented at all? If yes I have another doubt. In one forum I've read that u-boot treats UBIFS partition as read only (while it actually is rw for Linux). And thus u-boot does not even try to take any action that required writes. What you think? In fact the u-boot port is copied from linux kernel. It may lack some newest fixes but in general it has the same features as the linux kernel has. The link I posted in my first mail did mention that the error message for ubifs_get_sb() in ubifs_mount() is useless cause we may have different root causes here. If your error message had displayed ENOMEM (or -12) you may have got the root cause by yourself. However, it may be another reason on your side, looking forward to see your solution. Best regards Andreas Bießmann ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 0/3] Bring in new I2C framework
Hello Simon, On 26.10.2012 18:08, Simon Glass wrote: On Thu, Oct 25, 2012 at 10:48 PM, Heiko Schocherh...@denx.de wrote: Hello Simon, On 25.10.2012 23:37, Simon Glass wrote: On Mon, Oct 22, 2012 at 10:40 AM, Heiko Schocherh...@denx.de wrote: [...] 2. The init is a bit odd, in that we can call init() repeatedly. Perhaps that function should be renamed to reset, and the init should be used for calling just once at the start? What do you mean here exactly? I couldn´t parse this ... Well there is start-of-day setup, which I think should be called init. This is done once on boot for each i2c adapter. Hmm... I am not sure if this is only done on boot, because we should close or deinit an adapter if not used any more in U-Boot as the U-Boot principle says: http://www.denx.de/wiki/view/U-Boot/DesignPrinciples#2_Keep_it_Fast So I want to add in future some deinit to every adapter, and call it from i2c_set_bus() when switching to another i2c adapter ... And then there is the i2c_init() which seems to be called whenever we feel like it - e.g. to change speed. I suggest that we use init() to mean start-of-day init and reset(), or similar, to mean any post-init. I am not suggest that for this series, just as a future effort. Yes, that should be changed. We do not need an init() in the i2c API, as i2c_set_bus_num() do this for us (and later also the deinit()) We just need a set/get_speed() and a deblock()/reset() ? Maybe a step in the API cleanup? 3. Rather than each device having to call i2c_get_bus_num() to find out what bus is referred to, why not just pass this information in? In fact the adapter pointer can serve for this. Not the struct i2c_adapter must passed, but the struct i2c_bus! And each device should know, which i2c bus it uses, or? So at the end we should have something like i2c_read(struct i2c_bus *bus, ...) calls ... and the i2c core can detect, if this bus is the current, if so go on, if not switch to this bus. So at the end i2c_set_bus_num would be go static ... 4. So perhaps the i2c read/write functions should change from: int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len) to: int i2c_read((struct i2c_adapter *adapter, uint addr, int alen, uchar *buffer, int len) Yep, exactly, see comments to point 3 ... That would be the best (and I think in previous discussions I defined this as one goal ...), but this would be (another) big change, because this is an *API* change, with maybe a lot of config file changes ... Let us bring in the new i2c framework with all i2c drivers converted, and then do the next step ... maybe one step more, if mareks device model is ready, we can switch easy to DM ... and maybe get this API change for free ... Yes. I certainly understand the need to fit in with what is already there, and avoid a massive API change, which can be performed as a follow-on patch anyway. With your info above I will adjust the tegra driver to work with this and test it. Ok, great! So I post v2 patches after you tested ... And Yes, we should do this API change, but I tend to do this step after the new i2c framework is stable and all i2c drivers are converted to it ... Later, I wonder whether the concept of a 'current' i2c bus should be maintained by the command line interpreter, rather than the i2c system. Because to be honest, most of the drivers I see have to save the current bus number, set the current bus, do the operation, then set the bus back how they found it (to preserve whatever the user things is the current bus). Yes, suboptimal ... but this is independent from the new i2c framework patches! It is possible (with old/new i2c bus framework) to introduce a current commandline i2c bus, and then, before calling i2c_read/write from the commandline, call a i2c_set_bus_num() ... then we can get rid of this store/restore current i2c bus ... waiting for patches ;-) OK. Granted there is overhead with i2c muxes, but the i2c core can remember the state of these muxes and doesn't have to switch things until there has been a change since the last transaction. This exactly do the i2c_set_bus_num() now! Great. This last suggestion can be dealt with later, but I thought I would bring it up. I am happy about every comment! :-) Thanks, Simon bye, Heiko -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] OMAP3: igep0020: Add pad config for WIFI/BT GPIOs
2012/10/29 Enric Balletbo Serra eballe...@gmail.com: Hi, 2012/10/28 Anders Hedlund anders.j.hedl...@gmail.com: This adds support for WIFI/BT GPIOs which were previously missing. Signed-off-by: Anders Hedlund anders.j.hedl...@gmail.com Cc: Enric Balletbo i Serra eballe...@iseebcn.com Cc: Jonas Zetterberg j...@jozz.se --- board/isee/igep0020/igep0020.h |6 ++ 1 file changed, 6 insertions(+) diff --git a/board/isee/igep0020/igep0020.h b/board/isee/igep0020/igep0020.h index 3335ecc..283b75e 100644 --- a/board/isee/igep0020/igep0020.h +++ b/board/isee/igep0020/igep0020.h @@ -132,6 +132,12 @@ static void setup_net_chip(void); MUX_VAL(CP(MMC1_DAT1), (IEN | PTU | EN | M0)) /* MMC1_DAT1 */\ MUX_VAL(CP(MMC1_DAT2), (IEN | PTU | EN | M0)) /* MMC1_DAT2 */\ MUX_VAL(CP(MMC1_DAT3), (IEN | PTU | EN | M0)) /* MMC1_DAT3 */\ + MUX_VAL(CP(CAM_HS), (IDIS | PTU | DIS | M4)) /* GPIO_94 */\ + MUX_VAL(CP(CAM_VS), (IDIS | PTU | DIS | M4)) /* GPIO_95 */\ + MUX_VAL(CP(MMC2_DAT4), (IDIS | PTU | DIS | M4)) /* GPIO_136 */\ + MUX_VAL(CP(MMC2_DAT5), (IDIS | PTU | DIS | M4)) /* GPIO_137 */\ + MUX_VAL(CP(MMC2_DAT6), (IDIS | PTU | DIS | M4)) /* GPIO_138 */\ + MUX_VAL(CP(MMC2_DAT7), (IDIS | PTU | DIS | M4)) /* GPIO_139 */\ MUX_VAL(CP(UART3_TX_IRTX), (IDIS | PTD | DIS | M0)) /* UART3_TX */\ MUX_VAL(CP(UART3_RX_IRRX), (IEN | PTD | DIS | M0)) /* UART3_RX */\ MUX_VAL(CP(I2C1_SCL), (IEN | PTU | EN | M0)) /* I2C1_SCL */\ -- 1.7.10.4 Thanks for the patch but u-boot should only mux the pins they use, as u-boot does not use wifi this is not applicable here. Did you have problems with wifi ? Then we should check if these pins are muxe'd at kernel level, I think so. Yes. In linux kernel v3.6 WIFI/BT does not work due to this issue. I also have a fix for this but in my oppinion this kind of HW configuration should be made in the boot loader. Br, Anders Cheers, Enric ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 0/3] Bring in new I2C framework
Hello Stephen,
On 26.10.2012 18:07, Stephen Warren wrote:
On 10/25/2012 11:48 PM, Heiko Schocher wrote:
Hello Simon,
On 25.10.2012 23:37, Simon Glass wrote:
On Mon, Oct 22, 2012 at 10:40 AM, Heiko Schocherh...@denx.de wrote:
rebased/reworked the I2C multibus patches from Simon Glass found
here:
http://www.mail-archive.com/u-boot@lists.denx.de/msg75530.html
It seems the timing is coming, to bring this in mainline and
move boards over to the new i2c framework. As an example I
converted the soft-i2c driver (and all boards using it) to
the new framework, so this patchseries has to be tested
intensively, as I can check compile only ...
I am very happy to see this, thank you.
I am too ;-) and Sorry that I am only now ready ...
I have brought this in and tried to get it running for Tegra. A few
points:
1. The methods in struct i2c_adapter should IMO be passed a struct
i2c_adapter *, so they can determine which adapter is being accessed.
Otherwise I can't see how they would know.
They can get the current used adapter through the defines in
include/i2c.h:
[...]
#define I2C_ADAP_NR(bus)i2c_adap[i2c_bus[bus].adapter]
#define I2C_BUS ((struct i2c_bus_hose *)gd-cur_i2c_bus)
#define I2C_ADAPi2c_adap[I2C_BUS-adapter]
#define I2C_ADAP_HWNR (I2C_ADAP-hwadapnr)
preparing just the fsl i2c driver and there I do for example:
drivers/i2c/fsl_i2c.c
[...]
static const struct fsl_i2c *i2c_dev[2] = {
(struct fsl_i2c *) (CONFIG_SYS_IMMR + CONFIG_SYS_FSL_I2C_OFFSET),
#ifdef CONFIG_SYS_FSL_I2C2_OFFSET
(struct fsl_i2c *) (CONFIG_SYS_IMMR + CONFIG_SYS_FSL_I2C2_OFFSET)
#endif
};
[...]
static int fsl_i2c_probe(uchar chip)
{
struct fsl_i2c *dev = (struct fsl_i2c *)i2c_dev[I2C_ADAP_HWNR];
[...]
but of course, we still can change the struct i2c_adapter if
needed ... but we have one more parameter ... Ok, not really a bad
problem.
That rather relies on their being a concept of a current I2C adapter.
It seems a little limiting to require that. What if the current
adapter is the user-selected adapter for commands to operate on, but
e.g. some power-management driver wants to use I2C to communicate with a
PMIC during the internals of some other command. Sure, you could save
and later restore the I2C core's idea of current adapter, but it'd
surely be cleaner to just pass around the I2C adapter ID or struct
pointer everywhere to avoid the need for save/restore.
Yes, you are right, but just the same problem with current code!
You mixed here two things!
The idea behind the current i2c adapter was/is, that the i2c
core need to know, which bus is current because there is the
possibility that on one adapter are more i2c busses, because
of using i2c muxes ... and we must know, on which bus we are
currently, because if we want to switch to another bus, we must
first disable the old way (and maybe disable the i2c adapter too).
- If we want this feature, we need a current adapter. If we say,
Ok, we do not want this disabling... we can get rid of it, yes!
But I think it is safer to disable the i2c muxes, before
switching to another bus ... so this current i2c adapter
is an i2c core internal! We should of course change the i2c
API that we pass the bus to the i2c API, but, as I said this
to simon, this is another big change, and I want to have this
step after getting in the new i2c framework (and maybe hope,
that when we convert to mareks DM, we get this for free),
because we must also adapt for example all dtt, RTC, because
they need to know on which bus they resist, and we have to
config this ...
The problem from storing/restoring the current cmdline i2c
bus, is another problem, which is an independent patch!
You can make with current code a patch, which holds the current
i2c cmdline bus in a variable, and then get rid of this store/
restore calls as for example found in cmd_date.c ...
bye,
Heiko
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Re: [U-Boot] [PATCH 0/3] Bring in new I2C framework
Hello Tom, On 26.10.2012 20:44, Tom Rini wrote: On Thu, Oct 25, 2012 at 02:37:08PM -0700, Simon Glass wrote: [snip] Later, I wonder whether the concept of a 'current' i2c bus should be maintained by the command line interpreter, rather than the i2c system. Because to be honest, most of the drivers I see have to save the current bus number, set the current bus, do the operation, then set the bus back how they found it (to preserve whatever the user things is the current bus). I agree. Lets move the notion of current to cmd_i2c and make everything internally pass around the bus to operate on. Or try going down this path and find a fatal problem :) As I wrote to simon, stephen, this is an independent problem from the new framework patches! - There are two steps to do: - save the curent cmdline bus in a variable, and call i2c_set_bus_num() before you call i2c_* from the commandline, get rid of the store/restore calls ... - change the i2c API to pass the i2c bus in the i2c_* functions - in the new i2c framework, i2c_set_bus() gets static and the gd-current_i2c_bus is used only in i2c_core.c This two steps can be done in one step, but the second step is complicated enough, so it is better to do it in two steps (I think)! Waiting for patches ;-) The i2c framework change is independent from this! The current_i2c_bus is used i2c_core internally for storing the current active i2c bus, based on the idea of having only one i2c bus active in U-Boot, see therefore the U-Boot principle: http://www.denx.de/wiki/view/U-Boot/DesignPrinciples#2_Keep_it_Fast Initialize devices only when they are needed within U-Boot, i.e. don't initialize the Ethernet interface(s) unless U-Boot performs [...], etc. (and don't forget to shut down these devices after using them - otherwise nasty things may happen when you try to boot your OS). therefore the current i2c bus is needed! If we want to drop this U-Boot principle, we can get rid of current_i2c_bus ... (Ok, currently U-Boot do not deactivate not used i2c adapters ...) bye, Heiko -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] UBIFS fails on SheevaPlug
Dear Andreas Bießmann, Dear Dimax, On 29.10.2012 10:27, Dimax wrote: On Mon, Oct 29, 2012 at 11:11 AM, Andreas Bießmann andreas.de...@googlemail.com mailto:andreas.de...@googlemail.com wrote: Dear Dimax, please do not TOFU. Sorry don't know what you mean? you did it right ;) http://en.wikipedia.org/wiki/Top-posting#Top-posting Or read here http://www.ietf.org/rfc/rfc1855.txt [...] Best regards, Marek Vasut ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] OMAP3: igep0020: Add pad config for WIFI/BT GPIOs
2012/10/29 Anders Hedlund anders.j.hedl...@gmail.com: 2012/10/29 Enric Balletbo Serra eballe...@gmail.com: Hi, 2012/10/28 Anders Hedlund anders.j.hedl...@gmail.com: This adds support for WIFI/BT GPIOs which were previously missing. Signed-off-by: Anders Hedlund anders.j.hedl...@gmail.com Cc: Enric Balletbo i Serra eballe...@iseebcn.com Cc: Jonas Zetterberg j...@jozz.se --- board/isee/igep0020/igep0020.h |6 ++ 1 file changed, 6 insertions(+) diff --git a/board/isee/igep0020/igep0020.h b/board/isee/igep0020/igep0020.h index 3335ecc..283b75e 100644 --- a/board/isee/igep0020/igep0020.h +++ b/board/isee/igep0020/igep0020.h @@ -132,6 +132,12 @@ static void setup_net_chip(void); MUX_VAL(CP(MMC1_DAT1), (IEN | PTU | EN | M0)) /* MMC1_DAT1 */\ MUX_VAL(CP(MMC1_DAT2), (IEN | PTU | EN | M0)) /* MMC1_DAT2 */\ MUX_VAL(CP(MMC1_DAT3), (IEN | PTU | EN | M0)) /* MMC1_DAT3 */\ + MUX_VAL(CP(CAM_HS), (IDIS | PTU | DIS | M4)) /* GPIO_94 */\ + MUX_VAL(CP(CAM_VS), (IDIS | PTU | DIS | M4)) /* GPIO_95 */\ + MUX_VAL(CP(MMC2_DAT4), (IDIS | PTU | DIS | M4)) /* GPIO_136 */\ + MUX_VAL(CP(MMC2_DAT5), (IDIS | PTU | DIS | M4)) /* GPIO_137 */\ + MUX_VAL(CP(MMC2_DAT6), (IDIS | PTU | DIS | M4)) /* GPIO_138 */\ + MUX_VAL(CP(MMC2_DAT7), (IDIS | PTU | DIS | M4)) /* GPIO_139 */\ MUX_VAL(CP(UART3_TX_IRTX), (IDIS | PTD | DIS | M0)) /* UART3_TX */\ MUX_VAL(CP(UART3_RX_IRRX), (IEN | PTD | DIS | M0)) /* UART3_RX */\ MUX_VAL(CP(I2C1_SCL), (IEN | PTU | EN | M0)) /* I2C1_SCL */\ -- 1.7.10.4 Thanks for the patch but u-boot should only mux the pins they use, as u-boot does not use wifi this is not applicable here. Did you have problems with wifi ? Then we should check if these pins are muxe'd at kernel level, I think so. Yes. In linux kernel v3.6 WIFI/BT does not work due to this issue. I also have a fix for this but in my oppinion this kind of HW configuration should be made in the boot loader. This was discussed before in this ML, and the result of the discussion was that bootloaders should set only the minimum required for the uboot functionality and kernel boot. So the way to fix this problem is muxing these pins in kernel. Cheers, Enric Br, Anders Cheers, Enric ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] UBIFS fails on SheevaPlug
Dear Marek Vasut, On 29.10.2012 11:19, Marek Vasut wrote: Dear Andreas Bießmann, Dear Dimax, On 29.10.2012 10:27, Dimax wrote: On Mon, Oct 29, 2012 at 11:11 AM, Andreas Bießmann andreas.de...@googlemail.com mailto:andreas.de...@googlemail.com wrote: Dear Dimax, please do not TOFU. Sorry don't know what you mean? you did it right ;) http://en.wikipedia.org/wiki/Top-posting#Top-posting Or read here http://www.ietf.org/rfc/rfc1855.txt thank you for the RFC, but I can not find the TOFU abbreviation in it ;) However you are right, that should be the pointer for formal correctness. Best regards Andreas Bießmann ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v4 0/4] am335x_evm: Enable UART{1,2,3,4,5}
Tested-by: Matthias Fuchs matthias.fu...@esd.eu
... on AM335x IDK board with console on UART3.
Matthias
On 25.10.2012 14:21, Andrew Bradford wrote:
To support serial ports other than UART0 on am335x based systems like
the Beaglebone with the RS232 cape and am335x_evm with daughterboard.
Changes from v3:
* Patch 4/4 simplified further.
Changes from v2:
* Patch 4/4 cleaned up to define CONS_INDEX and SERIALX in the
target options.
Changes from v1:
* Reduced from 6 patches to 4.
* Reworked on Marek Vasut's serial changes.
* Added UART3 for am335x_evm profile 5.
Andrew Bradford (4):
am33xx: Enable UART{1,2,3,4,5} clocks
am33xx: Enable UART{1,2,3,4,5} pin-mux
serial: ns16550: Enable COM5 and COM6
am335x_evm: Enable use of UART{1,2,3,4,5}
arch/arm/cpu/armv7/am33xx/board.c| 17
arch/arm/cpu/armv7/am33xx/clock.c| 35 +
arch/arm/include/asm/arch-am33xx/sys_proto.h |7 +++-
board/ti/am335x/mux.c| 54
++
boards.cfg |7 +++-
drivers/serial/serial_ns16550.c | 36 +++--
include/configs/am335x_evm.h | 12 +++---
7 files changed, 158 insertions(+), 10 deletions(-)
-
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[U-Boot] [PATCH] am335x: add initial AM335x IDK board support
This patch extends the am335x_evm board for the AM335x IDK.
The IDK board uses MII for the ethernet phy (same as
Beaglebone board) and MMC0 for storage (but without
card detect line).
The IDK uses UART3 for console. So u-boot must be build
with CONFIG_SERIAL4 and CONFIG_CONS_INDEX=4 or for
the am335x_evm_uart3 board configuration as introduced
by Andrew Bradfords recent patch series am33xx: Enable
UART {1,2,3,4,5}...
Signed-off-by: Matthias Fuchs matthias.fu...@esd.eu
---
arch/arm/cpu/armv7/am33xx/board.c |9 +++--
board/ti/am335x/mux.c | 20
2 files changed, 27 insertions(+), 2 deletions(-)
diff --git a/arch/arm/cpu/armv7/am33xx/board.c
b/arch/arm/cpu/armv7/am33xx/board.c
index e324265..3818d84 100644
--- a/arch/arm/cpu/armv7/am33xx/board.c
+++ b/arch/arm/cpu/armv7/am33xx/board.c
@@ -64,6 +64,11 @@ static inline int board_is_bone(void)
return !strncmp(header.name, A335BONE, HDR_NAME_LEN);
}
+static inline int board_is_idk(void)
+{
+ return !strncmp(header.config, SKU#02, 6);
+}
+
static inline int board_is_evm_sk(void)
{
return !strncmp(A335X_SK, header.name, HDR_NAME_LEN);
@@ -211,7 +216,7 @@ void s_init(void)
int board_mmc_init(bd_t *bis)
{
int ret;
-
+
ret = omap_mmc_init(0, 0, 0);
if (ret)
return ret;
@@ -302,7 +307,7 @@ int board_eth_init(bd_t *bis)
return -1;
}
- if (board_is_bone()) {
+ if (board_is_bone() || board_is_idk()) {
writel(MII_MODE_ENABLE, cdev-miisel);
cpsw_slaves[0].phy_if = cpsw_slaves[1].phy_if =
PHY_INTERFACE_MODE_MII;
diff --git a/board/ti/am335x/mux.c b/board/ti/am335x/mux.c
index 82b5852..f20cfbc 100644
--- a/board/ti/am335x/mux.c
+++ b/board/ti/am335x/mux.c
@@ -301,6 +301,17 @@ static struct module_pin_mux mmc0_pin_mux[] = {
{-1},
};
+static struct module_pin_mux mmc0_no_cd_pin_mux[] = {
+ {OFFSET(mmc0_dat3), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* MMC0_DAT3 */
+ {OFFSET(mmc0_dat2), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* MMC0_DAT2 */
+ {OFFSET(mmc0_dat1), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* MMC0_DAT1 */
+ {OFFSET(mmc0_dat0), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* MMC0_DAT0 */
+ {OFFSET(mmc0_clk), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* MMC0_CLK */
+ {OFFSET(mmc0_cmd), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* MMC0_CMD */
+ {OFFSET(mcasp0_aclkr), (MODE(4) | RXACTIVE)}, /* MMC0_WP */
+ {-1},
+};
+
static struct module_pin_mux mmc0_pin_mux_sk_evm[] = {
{OFFSET(mmc0_dat3), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* MMC0_DAT3 */
{OFFSET(mmc0_dat2), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* MMC0_DAT2 */
@@ -496,6 +507,15 @@ void enable_board_pin_mux(struct am335x_baseboard_id
*header)
configure_module_pin_mux(mmc1_pin_mux);
configure_module_pin_mux(spi0_pin_mux);
}
+ } else if (!strncmp(header-config, SKU#02, 6)) {
+ /*
+* Industrial Motor Control (IDK)
+* note: IDK console is on UART3 by default.
+* So u-boot mus be build with CONFIG_SERIAL4 and
+* CONFIG_CONS_INDEX=4
+*/
+ configure_module_pin_mux(mii1_pin_mux);
+ configure_module_pin_mux(mmc0_no_cd_pin_mux);
} else if (!strncmp(header-name, A335X_SK, HDR_NAME_LEN)) {
/* Starter Kit EVM */
configure_module_pin_mux(i2c1_pin_mux);
--
1.6.1
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Re: [U-Boot] [PATCH] am335x: add initial AM335x IDK board support
Matthias == Matthias Fuchs matthias.fu...@esd.eu writes:
Matthias This patch extends the am335x_evm board for the AM335x IDK.
Matthias The IDK board uses MII for the ethernet phy (same as
Matthias Beaglebone board) and MMC0 for storage (but without
Matthias card detect line).
Matthias The IDK uses UART3 for console. So u-boot must be build
Matthias with CONFIG_SERIAL4 and CONFIG_CONS_INDEX=4 or for
Matthias the am335x_evm_uart3 board configuration as introduced
Matthias by Andrew Bradfords recent patch series am33xx: Enable
Matthias UART {1,2,3,4,5}...
The changes look good from a quick look, but notice that the ti board
support has recently moved to board/ti/am335x/board.c. Could you rebase
against current git and resend?
--
Bye, Peter Korsgaard
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Re: [U-Boot] [PATCH 0/3] Bring in new I2C framework
Hi Heiko, On Mon, Oct 29, 2012 at 2:44 AM, Heiko Schocher h...@denx.de wrote: Hello Simon, On 26.10.2012 18:08, Simon Glass wrote: On Thu, Oct 25, 2012 at 10:48 PM, Heiko Schocherh...@denx.de wrote: Hello Simon, On 25.10.2012 23:37, Simon Glass wrote: On Mon, Oct 22, 2012 at 10:40 AM, Heiko Schocherh...@denx.de wrote: [...] 2. The init is a bit odd, in that we can call init() repeatedly. Perhaps that function should be renamed to reset, and the init should be used for calling just once at the start? What do you mean here exactly? I couldn´t parse this ... Well there is start-of-day setup, which I think should be called init. This is done once on boot for each i2c adapter. Hmm... I am not sure if this is only done on boot, because we should close or deinit an adapter if not used any more in U-Boot as the U-Boot principle says: http://www.denx.de/wiki/view/U-Boot/DesignPrinciples#2_Keep_it_Fast So I want to add in future some deinit to every adapter, and call it from i2c_set_bus() when switching to another i2c adapter ... Well deinit() should be probably be done before finishing U-Boot, not after every transaction, since you don't know that the current transaction will be the last. When using FDT, you need to look up the available i2c ports in the driver, and this should be done once at the start. If the i2c core can call a suitable init function then this is easier, rather than us having to keep track of whether the init is done or not. And then there is the i2c_init() which seems to be called whenever we feel like it - e.g. to change speed. I suggest that we use init() to mean start-of-day init and reset(), or similar, to mean any post-init. I am not suggest that for this series, just as a future effort. Yes, that should be changed. We do not need an init() in the i2c API, as i2c_set_bus_num() do this for us (and later also the deinit()) We just need a set/get_speed() and a deblock()/reset() ? Maybe a step in the API cleanup? Yes, a future step I think. I feel that i2c is one of the darker corners of U-Boot and so am keen to get this tidied up. 3. Rather than each device having to call i2c_get_bus_num() to find out what bus is referred to, why not just pass this information in? In fact the adapter pointer can serve for this. Not the struct i2c_adapter must passed, but the struct i2c_bus! And each device should know, which i2c bus it uses, or? So at the end we should have something like i2c_read(struct i2c_bus *bus, ...) calls ... and the i2c core can detect, if this bus is the current, if so go on, if not switch to this bus. So at the end i2c_set_bus_num would be go static ... 4. So perhaps the i2c read/write functions should change from: int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len) to: int i2c_read((struct i2c_adapter *adapter, uint addr, int alen, uchar *buffer, int len) Yep, exactly, see comments to point 3 ... That would be the best (and I think in previous discussions I defined this as one goal ...), but this would be (another) big change, because this is an *API* change, with maybe a lot of config file changes ... Let us bring in the new i2c framework with all i2c drivers converted, and then do the next step ... maybe one step more, if mareks device model is ready, we can switch easy to DM ... and maybe get this API change for free ... Yes. I certainly understand the need to fit in with what is already there, and avoid a massive API change, which can be performed as a follow-on patch anyway. With your info above I will adjust the tegra driver to work with this and test it. Ok, great! So I post v2 patches after you tested ... And Yes, we should do this API change, but I tend to do this step after the new i2c framework is stable and all i2c drivers are converted to it ... [snip] Regards, Simon bye, Heiko -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] OMAP3: igep0020: Add pad config for WIFI/BT GPIOs
2012/10/29 Enric Balletbo Serra eballe...@gmail.com: 2012/10/29 Anders Hedlund anders.j.hedl...@gmail.com: 2012/10/29 Enric Balletbo Serra eballe...@gmail.com: Hi, 2012/10/28 Anders Hedlund anders.j.hedl...@gmail.com: This adds support for WIFI/BT GPIOs which were previously missing. Signed-off-by: Anders Hedlund anders.j.hedl...@gmail.com Cc: Enric Balletbo i Serra eballe...@iseebcn.com Cc: Jonas Zetterberg j...@jozz.se --- board/isee/igep0020/igep0020.h |6 ++ 1 file changed, 6 insertions(+) diff --git a/board/isee/igep0020/igep0020.h b/board/isee/igep0020/igep0020.h index 3335ecc..283b75e 100644 --- a/board/isee/igep0020/igep0020.h +++ b/board/isee/igep0020/igep0020.h @@ -132,6 +132,12 @@ static void setup_net_chip(void); MUX_VAL(CP(MMC1_DAT1), (IEN | PTU | EN | M0)) /* MMC1_DAT1 */\ MUX_VAL(CP(MMC1_DAT2), (IEN | PTU | EN | M0)) /* MMC1_DAT2 */\ MUX_VAL(CP(MMC1_DAT3), (IEN | PTU | EN | M0)) /* MMC1_DAT3 */\ + MUX_VAL(CP(CAM_HS), (IDIS | PTU | DIS | M4)) /* GPIO_94 */\ + MUX_VAL(CP(CAM_VS), (IDIS | PTU | DIS | M4)) /* GPIO_95 */\ + MUX_VAL(CP(MMC2_DAT4), (IDIS | PTU | DIS | M4)) /* GPIO_136 */\ + MUX_VAL(CP(MMC2_DAT5), (IDIS | PTU | DIS | M4)) /* GPIO_137 */\ + MUX_VAL(CP(MMC2_DAT6), (IDIS | PTU | DIS | M4)) /* GPIO_138 */\ + MUX_VAL(CP(MMC2_DAT7), (IDIS | PTU | DIS | M4)) /* GPIO_139 */\ MUX_VAL(CP(UART3_TX_IRTX), (IDIS | PTD | DIS | M0)) /* UART3_TX */\ MUX_VAL(CP(UART3_RX_IRRX), (IEN | PTD | DIS | M0)) /* UART3_RX */\ MUX_VAL(CP(I2C1_SCL), (IEN | PTU | EN | M0)) /* I2C1_SCL */\ -- 1.7.10.4 Thanks for the patch but u-boot should only mux the pins they use, as u-boot does not use wifi this is not applicable here. Did you have problems with wifi ? Then we should check if these pins are muxe'd at kernel level, I think so. Yes. In linux kernel v3.6 WIFI/BT does not work due to this issue. I also have a fix for this but in my oppinion this kind of HW configuration should be made in the boot loader. This was discussed before in this ML, and the result of the discussion was that bootloaders should set only the minimum required for the uboot functionality and kernel boot. So the way to fix this problem is muxing these pins in kernel. Ok. Thanks for this info. I'll withdraw this patch and make one of the linux kernel instead. Br, Anders Cheers, Enric Br, Anders Cheers, Enric ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] Pull request:u-boot-coldfire/master
Hi, Tom, The following changes since commit 5bb3505fa867ded03cbee83f7722ab5182930637: Merge branch 'master' of git://git.denx.de/u-boot-arm (2012-10-26 15:44:31 -0700) are available in the git repository at: git://git.denx.de/u-boot-coldfire.git master Jason Jin (2): ColdFire: Update the lds file for M54418TWR board. ColdFire: Remove save env in NAND support for M54418TWR board. board/freescale/m54418twr/u-boot.lds |8 +--- include/configs/M54418TWR.h |2 +- 2 files changed, 6 insertions(+), 4 deletions(-) Thanks. Best Regards, Jason ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] UBIFS fails on SheevaPlug
-Original Message- From: u-boot-boun...@lists.denx.de [mailto:u-boot- boun...@lists.denx.de] On Behalf Of Dimax Sent: 28 October 2012 20:18 To: u-boot@lists.denx.de Subject: [U-Boot] UBIFS fails on SheevaPlug HI, After power short u-boot fails to mount UBIFS and board stuck. Below is a trace of u-boot Marvell boot UBI: mtd1 is detached from ubi0 Creating 1 MTD partitions on nand0: 0x0050-0x2000 : mtd=2 UBI: attaching mtd1 to ubi0 UBI: physical eraseblock size: 131072 bytes (128 KiB) UBI: logical eraseblock size:129024 bytes UBI: smallest flash I/O unit:2048 UBI: sub-page size: 512 UBI: VID header offset: 512 (aligned 512) UBI: data offset:2048 UBI: attached mtd1 to ubi0 UBI: MTD device name:mtd=2 UBI: MTD device size:507 MiB UBI: number of good PEBs:4055 UBI: number of bad PEBs: 1 UBI: max. allowed volumes: 128 UBI: wear-leveling threshold:4096 UBI: number of internal volumes: 1 UBI: number of user volumes: 1 UBI: available PEBs: 0 UBI: total number of reserved PEBs: 4055 UBI: number of PEBs reserved for bad PEB handling: 40 UBI: max/mean erase counter: 1/0 UBIFS: recovery needed Error reading superblock on volume 'ubi:rootfs'! UBIFS not mounted, use ubifs mount to mount volume first! UBIFS not mounted, use ubifs mount to mount volume first! Wrong Image Format for bootm command ERROR: can't get kernel image! Marvell To recover from this situation I boot from USB stick and simply mounts the same UBIFS partition: root@debian:~# mount -t ubifs ubi0:rootfs /mnt [ 306.205029] UBIFS: recovery needed [ 309.341987] UBIFS: recovery completed [ 309.345705] UBIFS: mounted UBI device 0, volume 0, name rootfs [ 309.351738] UBIFS: file system size: 515192832 bytes (503118 KiB, 491 MiB, 3993 LEBs) [ 309.359789] UBIFS: journal size: 25804800 bytes (25200 KiB, 24 MiB, 200 LEBs) [ 309.367495] UBIFS: media format: w4/r0 (latest is w4/r0) [ 309.373352] UBIFS: default compressor: lzo [ 309.377479] UBIFS: reserved for root: 4952683 bytes (4836 KiB) As you can see mount manage to recover partition. Is where any way to make u-boot to recover UBIFS partition as well? What else can I do to make my system stable and survive power shorts? Dear Dimax Thanks for reporting this issue, I am not UBIFS expert, but I will check this problem at my end. Regards... Prafulla . . . ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 0/2] Standardize on run-time board ID variables
On 10/26/2012 01:45 AM, Joe Hershberger wrote:
Hi Tom,
On Wed, Oct 24, 2012 at 2:32 PM, Tom Rini tr...@ti.com wrote:
On Wed, Oct 24, 2012 at 01:05:16PM -0600, Stephen Warren wrote:
On 10/24/2012 12:41 PM, Tom Rini wrote:
On Wed, Oct 24, 2012 at 11:50:38AM -0600, Stephen Warren wrote:
On 10/24/2012 11:28 AM, Tom Rini wrote:
Hey all,
I've been thinking about one of the problems we need to solve
over in TI AM335x land and that is given that we support a
number of different boards with a single binary (and we have an
i2c eeprom that tells us what board and revision we are on),
the user needs to be able to easily determine what board we are
on so they know what dtb file to load so they can boot. To
this end I've added CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG to the
README which says when set we have board_name and board_rev set
at run-time. Then for am335x[1]
With CONFIG_ENV_VARS_UBOOT_CONFIG set, there's a environment
variable named $board that indicates which board U-Boot is
running on (and other related variables). The idea is that the
user can:
fsload ${devtype} ${devnum}:${rootpart} ${fdt_addr_r} \
/boot/${soc}-${board}.dtb
Now, CONFIG_ENV_VARS_UBOOT_CONFIG sets $board at compile-time,
since the config variable was created in the context on a U-Boot
that runs on a single board. However, I see no reason why we
can't maintain the user-visible results of this config option
even in other cases, so that everything is consistent to the
user
This works assuming that board maps to the device tree name. A bit
more below...
True. I've made sure of that for Tegra.
To that end, can we make CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG set
$board instead of $board_name?
I had talked with Joe about this on IRC briefly and he seemed to
be against overwriting board
Why is that? Perhaps alternatively, CONFIG_ENV_VARS_UBOOT_CONFIG
should set both board and a default value for board_name.
Joe?
It think in the use-case that you are talking about (multiple boards,
one binary) the board from the build of the binary could still be
useful to know in addition to the run-time-determined board name and
rev. I think it would also be useful to have the target available
in the env for the same reason. Tom and I also discussed this on IRC.
OK, so in that case I guess CONFIG_ENV_VARS_UBOOT_CONFIG should set both
board and board_name, so that both variables always exist for use by
scripts, so scripts don't have to contain endless conditionals. For the
multiple-boards-one-binary case, board_name can always be overridden at
run-time. If everyone agrees, I can send a patch to add that variable to
CONFIG_ENV_VARS_UBOOT_CONFIG.
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[U-Boot] [PATCH] M68K: eb_cpu5282: general update and enhanced board support
From: Jens Scharsig (BuS Elektronik) e...@bus-elektronik.de
- update clock settings for higher perfomance
- change standard baud rate to 115200
- fix flash base address
- remove unused defines
- add I2C support
- switch form board dependent flash to cfi
- remove board dependent flash code
- use sdram bank 0 instead of bank 1 on boot
- enable on board frame buffer instead external
- remove fake mac address form config
- add watchdog support
- add status led support
Signed-off-by: Jens Scharsig (BuS Elektronik) e...@bus-elektronik.de
---
board/BuS/eb_cpu5282/Makefile |2 +-
board/BuS/eb_cpu5282/cfm_flash.c | 212 ---
board/BuS/eb_cpu5282/cfm_flash.h | 40
board/BuS/eb_cpu5282/config.mk| 27 ---
board/BuS/eb_cpu5282/eb_cpu5282.c | 102 ++---
board/BuS/eb_cpu5282/flash.c | 415 -
boards.cfg|2 +-
include/configs/eb_cpu5282.h | 101 +
8 files changed, 142 insertions(+), 759 deletions(-)
delete mode 100644 board/BuS/eb_cpu5282/cfm_flash.c
delete mode 100644 board/BuS/eb_cpu5282/cfm_flash.h
delete mode 100644 board/BuS/eb_cpu5282/config.mk
delete mode 100644 board/BuS/eb_cpu5282/flash.c
diff --git a/board/BuS/eb_cpu5282/Makefile b/board/BuS/eb_cpu5282/Makefile
index 0f14699..ac860c1 100644
--- a/board/BuS/eb_cpu5282/Makefile
+++ b/board/BuS/eb_cpu5282/Makefile
@@ -25,7 +25,7 @@ include $(TOPDIR)/config.mk
LIB= $(obj)lib$(BOARD).o
-COBJS = $(BOARD).o cfm_flash.o flash.o
+COBJS = $(BOARD).o
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS))
diff --git a/board/BuS/eb_cpu5282/cfm_flash.c b/board/BuS/eb_cpu5282/cfm_flash.c
deleted file mode 100644
index fe03b17..000
--- a/board/BuS/eb_cpu5282/cfm_flash.c
+++ /dev/null
@@ -1,212 +0,0 @@
-/*
- * Basic Flash Driver for Freescale MCF 5281/5282 internal FLASH
- *
- * (C) Copyright 2005 BuS Elektronik GmbH Co.KG e...@bus-elektonik.de
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include common.h
-#include asm/m5282.h
-#include cfm_flash.h
-
-#if defined(CONFIG_M5281) || defined(CONFIG_M5282)
-
-#if (CONFIG_SYS_CLK2000)
- #define CFM_CLK (((long) CONFIG_SYS_CLK / (40 * 8) + 1) | 0x40)
-#else
- #define CFM_CLK ((long) CONFIG_SYS_CLK / 40 + 1)
-#endif
-
-#define cmf_backdoor_address(addr) (((addr) 0x0007) | 0x0400 | \
-(CONFIG_SYS_MBAR 0xC000))
-
-void cfm_flash_print_info (flash_info_t * info)
-{
- printf (Freescale: );
- switch (info-flash_id FLASH_TYPEMASK) {
- case FREESCALE_ID_MCF5281 FLASH_TYPEMASK:
- printf (MCF5281 internal FLASH\n);
- break;
- case FREESCALE_ID_MCF5282 FLASH_TYPEMASK:
- printf (MCF5282 internal FLASH\n);
- break;
- default:
- printf (Unknown Chip Type\n);
- break;
- }
-}
-
-void cfm_flash_init (flash_info_t * info)
-{
- int sector;
- ulong protection;
- MCFCFM_MCR = 0;
- MCFCFM_CLKD = CFM_CLK;
- debug (CFM Clock divider: %ld (%d Hz @ %ld Hz)\n,CFM_CLK,\
- CONFIG_SYS_CLK / (2* ((CFM_CLK 0x3F)+1) * (1+((CFM_CLK
0x40)6)*7)),\
- CONFIG_SYS_CLK);
- MCFCFM_SACC = 0;
- MCFCFM_DACC = 0;
-
- if (MCFCFM_SEC MCFCFM_SEC_KEYEN)
- puts(CFM backdoor access is enabled\n);
- if (MCFCFM_SEC MCFCFM_SEC_SECSTAT)
- puts(CFM securety is enabled\n);
-
- #ifdef CONFIG_M5281
- info-flash_id = (FREESCALE_MANUFACT FLASH_VENDMASK) |
-(FREESCALE_ID_MCF5281 FLASH_TYPEMASK);
- info-size = 256*1024;
- info-sector_count = 16;
- #else
- info-flash_id = (FREESCALE_MANUFACT FLASH_VENDMASK) |
-(FREESCALE_ID_MCF5282 FLASH_TYPEMASK);
- info-size = 512*1024;
- info-sector_count = 32;
- #endif
- protection = MCFCFM_PROT;
- for (sector = 0; sector info-sector_count; sector++)
- {
- if (sector == 0)
- {
-
[U-Boot] [PATCH v3 0/22] AHCI / SATA Improvements
This series contains a set of improvements for the SATA susbsystem, mostly targeted at solid-state drivers and improving start-up time. The patches are tested on various x86 Chromebooks. Changes in v3: - Remove use of DEFINE_PCI_DEVICE_TABLE suggested by siren checkpatch - Use struct pci_device_id properly - Add new patch to enable setenv_ulong/addr() for powerpc - Fix setenv operation to use correct function - Move missing #ifdef CONFIG_AHCI_SETFEATURES_XFER from later commit - Remove . from end of commit subject - Move #ifdef change into earlier commit - Add patch to support 64-bit LBA option when reading capacity - Add new patch to correct ide_read/write() function signatures Changes in v2: - Use struct pci_device_id instead of defining new struct scsi_device - Squash in CONFIG_PCI patch - Set 'scsidevs' environment variable to number of SCSI disks Gabe Black (3): ahci: Make sending the SETFEATURES_XFER command optional ahci: Make the AHCI code find the capacity of disks 128 GB properly ahci: Support 64-bit LBA option when reading capacity Hung-Te Lin (2): scsi: Add scsi_write to SCSI driver ahci: support scsi writing in AHCI driver Marc Jones (2): ahci: Support spin-up and link-up separately ahci: Perform SATA flush after disk write. Simon Glass (3): Support setenv_ulong() and setenv_addr() for powerpc ide: Correct function signatures for ide_read/write() x86: config: Enable AHCI support for coreboot Stefan Reinauer (4): scsi: Add function and env var to report number of scsi drives ahci: Optimise AHCI controller reset and start-up ahci: Improve AHCI debugging ahci: cosmetics and cleanup Taylor Hutt (4): ahci: Use sizeof(fis) instead of hardcoding '20' ahci: Fix 'Invaild' typo ahci: Use virt_to_phys() to denote physical addresses for DMA ahci: flush / invalidate dcache around SATA commands Vadim Bendebury (2): ahci: Support splitting of read transactions into multiple chunks scsi: Provide support for a list of AHCI controllers. Walter Murphy (2): ahci: Adjust SATA timeouts for hard disk (spinup delay command timeout) ahci: Expand HDD Logical Block addressability up to 32 bits README |3 + common/cmd_ide.c | 27 +-- common/cmd_scsi.c | 255 drivers/block/ahci.c | 401 +++- include/ahci.h |1 + include/ata.h |3 + include/common.h |2 +- include/configs/coreboot.h | 22 +++ include/scsi.h |4 + 9 files changed, 585 insertions(+), 133 deletions(-) -- 1.7.7.3 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v3 01/22] ahci: Support splitting of read transactions into multiple chunks
From: Vadim Bendebury vben...@chromium.org
With an Intel AHCI controller, the driver does not operate properly
if the requested amount of blocks to read exceeds 255.
It is probably possible to specify 0 as the block count and the driver
will read 256 blocks, but it was decided to limit the number of blocks
read at once to 128 (it should be a power of 2 for the optimal
performance of solid state drives).
Signed-off-by: Vadim Bendebury vben...@chromium.org
Signed-off-by: Simon Glass s...@chromium.org
---
drivers/block/ahci.c | 98 +++---
1 files changed, 69 insertions(+), 29 deletions(-)
diff --git a/drivers/block/ahci.c b/drivers/block/ahci.c
index 7b2ec50..d94da1f 100644
--- a/drivers/block/ahci.c
+++ b/drivers/block/ahci.c
@@ -42,6 +42,14 @@ hd_driveid_t *ataid[AHCI_MAX_PORTS];
#define writel_with_flush(a,b) do { writel(a,b); readl(b); } while (0)
+/*
+ * Some controllers limit number of blocks they can read at once. Contemporary
+ * SSD devices work much faster if the read size is aligned to a power of 2.
+ * Let's set default to 128 and allowing to be overwritten if needed.
+ */
+#ifndef MAX_SATA_BLOCKS_READ
+#define MAX_SATA_BLOCKS_READ 0x80
+#endif
static inline u32 ahci_port_base(u32 base, u32 port)
{
@@ -88,6 +96,8 @@ static int ahci_host_init(struct ahci_probe_ent *probe_ent)
int i, j;
volatile u8 *port_mmio;
+ debug(ahci_host_init: start\n);
+
cap_save = readl(mmio + HOST_CAP);
cap_save = ((1 28) | (1 17));
cap_save |= (1 27);
@@ -129,6 +139,9 @@ static int ahci_host_init(struct ahci_probe_ent *probe_ent)
debug(cap 0x%x port_map 0x%x n_ports %d\n,
probe_ent-cap, probe_ent-port_map, probe_ent-n_ports);
+ if (probe_ent-n_ports CONFIG_SYS_SCSI_MAX_SCSI_ID)
+ probe_ent-n_ports = CONFIG_SYS_SCSI_MAX_SCSI_ID;
+
for (i = 0; i probe_ent-n_ports; i++) {
probe_ent-port[i].port_mmio = ahci_port_base((u32) mmio, i);
port_mmio = (u8 *) probe_ent-port[i].port_mmio;
@@ -277,8 +290,8 @@ static int ahci_init_one(pci_dev_t pdev)
probe_ent-pio_mask = 0x1f;
probe_ent-udma_mask = 0x7f;/*Fixme,assume to support UDMA6 */
- probe_ent-mmio_base = (u32)pci_map_bar(pdev, AHCI_PCI_BAR,
- PCI_REGION_MEM);
+ pci_read_config_dword(pdev, PCI_BASE_ADDRESS_5, probe_ent-mmio_base);
+ debug(ahci mmio_base=0x%08x\n, probe_ent-mmio_base);
/* Take from kernel:
* JMicron-specific fixup:
@@ -398,7 +411,7 @@ static int ahci_port_start(u8 port)
* 32 bytes each in size
*/
pp-cmd_slot = (struct ahci_cmd_hdr *)mem;
- debug(cmd_slot = %p\n, pp-cmd_slot);
+ debug(cmd_slot = 0x%x\n, (unsigned)pp-cmd_slot);
mem += (AHCI_CMD_SLOT_SZ + 224);
/*
@@ -561,42 +574,69 @@ static int ata_scsiop_inquiry(ccb *pccb)
*/
static int ata_scsiop_read10(ccb * pccb)
{
- u32 len = 0;
+ u32 lba = 0;
+ u16 blocks = 0;
u8 fis[20];
+ u8 *user_buffer = pccb-pdata;
+ u32 user_buffer_size = pccb-datalen;
- len = (((u32) pccb-cmd[7]) 8) | ((u32) pccb-cmd[8]);
+ /* Retrieve the base LBA number from the ccb structure. */
+ memcpy(lba, pccb-cmd + 2, sizeof(lba));
+ lba = be32_to_cpu(lba);
- /* For 10-byte and 16-byte SCSI R/W commands, transfer
+ /*
+* And the number of blocks.
+*
+* For 10-byte and 16-byte SCSI R/W commands, transfer
* length 0 means transfer 0 block of data.
* However, for ATA R/W commands, sector count 0 means
* 256 or 65536 sectors, not 0 sectors as in SCSI.
*
* WARNING: one or two older ATA drives treat 0 as 0...
*/
- if (!len)
- return 0;
+ blocks = (((u16)pccb-cmd[7]) 8) | ((u16) pccb-cmd[8]);
+
+ debug(scsi_ahci: read %d blocks starting from lba 0x%x\n,
+ (unsigned)lba, blocks);
+
+ /* Preset the FIS */
memset(fis, 0, 20);
+ fis[0] = 0x27; /* Host to device FIS. */
+ fis[1] = 1 7; /* Command FIS. */
+ fis[2] = ATA_CMD_RD_DMA; /* Command byte. */
- /* Construct the FIS */
- fis[0] = 0x27; /* Host to device FIS. */
- fis[1] = 1 7;/* Command FIS. */
- fis[2] = ATA_CMD_RD_DMA;/* Command byte. */
-
- /* LBA address, only support LBA28 in this driver */
- fis[4] = pccb-cmd[5];
- fis[5] = pccb-cmd[4];
- fis[6] = pccb-cmd[3];
- fis[7] = (pccb-cmd[2] 0x0f) | 0xe0;
-
- /* Sector Count */
- fis[12] = pccb-cmd[8];
- fis[13] = pccb-cmd[7];
-
- /* Read from ahci */
- if (get_ahci_device_data(pccb-target, (u8 *) fis, 20,
-pccb-pdata, pccb-datalen)) {
- debug(scsi_ahci: SCSI READ10 command failure.\n);
[U-Boot] [PATCH v3 17/22] ahci: Adjust SATA timeouts for hard disk (spinup delay command timeout)
From: Walter Murphy wmur...@google.com
Note: These are timeout values and not delay values, so the event being
timed out will complete whenever it is actually ready, with a
measurement granularity of 1 millisecond, up till the timeout value.
Therefore, there is no effect on SSD booting.
The values were determined by instrumenting the code and measuring the
actual time taken by several different models of HDD for each of the
parameters and then adding 50% more for the spinup value and just
doubling the command timeout value.
Signed-off-by: Walter Murphy wmur...@chromium.org
Signed-off-by: Simon Glass s...@chromium.org
---
drivers/block/ahci.c | 14 ++
1 files changed, 10 insertions(+), 4 deletions(-)
diff --git a/drivers/block/ahci.c b/drivers/block/ahci.c
index a05d9cf..719574f 100644
--- a/drivers/block/ahci.c
+++ b/drivers/block/ahci.c
@@ -52,6 +52,10 @@ hd_driveid_t *ataid[AHCI_MAX_PORTS];
#define MAX_SATA_BLOCKS_READ_WRITE 0x80
#endif
+/* Maximum timeouts for each event */
+#define WAIT_MS_DATAIO 5000
+#define WAIT_MS_LINKUP 4
+
static inline u32 ahci_port_base(u32 base, u32 port)
{
return base + 0x100 + (port * 0x80);
@@ -201,14 +205,14 @@ static int ahci_host_init(struct ahci_probe_ent
*probe_ent)
writel(PORT_CMD_SPIN_UP, port_mmio + PORT_CMD);
j = 0;
- while (j 1000) {
+ while (j WAIT_MS_LINKUP) {
tmp = readl(port_mmio + PORT_SCR_STAT);
if ((tmp 0xf) == 0x3)
break;
udelay(1000);
j++;
}
- if (j == 1000)
+ if (j == WAIT_MS_LINKUP)
debug(timeout.\n);
else
debug(ok.\n);
@@ -429,7 +433,8 @@ static void ahci_set_feature(u8 port)
writel(1, port_mmio + PORT_CMD_ISSUE);
readl(port_mmio + PORT_CMD_ISSUE);
- if (waiting_for_cmd_completed(port_mmio + PORT_CMD_ISSUE, 150, 0x1)) {
+ if (waiting_for_cmd_completed(port_mmio + PORT_CMD_ISSUE,
+ WAIT_MS_DATAIO, 0x1)) {
printf(set feature error on port %d!\n, port);
}
}
@@ -535,7 +540,8 @@ static int ahci_device_data_io(u8 port, u8 *fis, int
fis_len, u8 *buf,
writel_with_flush(1, port_mmio + PORT_CMD_ISSUE);
- if (waiting_for_cmd_completed(port_mmio + PORT_CMD_ISSUE, 150, 0x1)) {
+ if (waiting_for_cmd_completed(port_mmio + PORT_CMD_ISSUE,
+ WAIT_MS_DATAIO, 0x1)) {
printf(timeout exit!\n);
return -1;
}
--
1.7.7.3
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[U-Boot] [PATCH v3 03/22] scsi: Add scsi_write to SCSI driver
From: Hung-Te Lin hun...@chromium.org
Implement write functionality in the scsi layer. A ''scsi write'
command is also added to console for testing.
Signed-off-by: Hung-Te Lin hun...@chromium.org
Signed-off-by: Simon Glass s...@chromium.org
---
common/cmd_scsi.c | 115 +---
1 files changed, 108 insertions(+), 7 deletions(-)
diff --git a/common/cmd_scsi.c b/common/cmd_scsi.c
index 50eb239..31ea788 100644
--- a/common/cmd_scsi.c
+++ b/common/cmd_scsi.c
@@ -75,11 +75,15 @@ void scsi_setup_test_unit_ready(ccb * pccb);
void scsi_setup_read_capacity(ccb * pccb);
void scsi_setup_read6(ccb * pccb, unsigned long start, unsigned short blocks);
void scsi_setup_read_ext(ccb * pccb, unsigned long start, unsigned short
blocks);
+static void scsi_setup_write_ext(ccb *pccb, unsigned long start,
+ unsigned short blocks);
void scsi_setup_inquiry(ccb * pccb);
void scsi_ident_cpy (unsigned char *dest, unsigned char *src, unsigned int
len);
-ulong scsi_read(int device, ulong blknr, ulong blkcnt, void *buffer);
+static ulong scsi_read(int device, ulong blknr, lbaint_t blkcnt, void *buffer);
+static ulong scsi_write(int device, ulong blknr,
+ lbaint_t blkcnt, const void *buffer);
/*
@@ -109,6 +113,7 @@ void scsi_scan(int mode)
scsi_dev_desc[i].dev=i;
scsi_dev_desc[i].part_type=PART_TYPE_UNKNOWN;
scsi_dev_desc[i].block_read=scsi_read;
+ scsi_dev_desc[i].block_write = scsi_write;
}
scsi_max_devs=0;
for(i=0;iCONFIG_SYS_SCSI_MAX_SCSI_ID;i++) {
@@ -335,6 +340,19 @@ int do_scsi (cmd_tbl_t *cmdtp, int flag, int argc, char *
const argv[])
n = scsi_read(scsi_curr_dev, blk, cnt, (ulong
*)addr);
printf (%ld blocks read: %s\n,n,(n==cnt) ?
OK : ERROR);
return 0;
+ } else if (strcmp(argv[1], write) == 0) {
+ ulong addr = simple_strtoul(argv[2], NULL, 16);
+ ulong blk = simple_strtoul(argv[3], NULL, 16);
+ ulong cnt = simple_strtoul(argv[4], NULL, 16);
+ ulong n;
+ printf(\nSCSI write: device %d block # %ld,
+ count %ld ... ,
+ scsi_curr_dev, blk, cnt);
+ n = scsi_write(scsi_curr_dev, blk, cnt,
+ (ulong *)addr);
+ printf(%ld blocks written: %s\n, n,
+ (n == cnt) ? OK : ERROR);
+ return 0;
}
} /* switch */
return CMD_RET_USAGE;
@@ -346,9 +364,10 @@ int do_scsi (cmd_tbl_t *cmdtp, int flag, int argc, char *
const argv[])
#define SCSI_MAX_READ_BLK 0x /* almost the maximum amount of the scsi_ext
command.. */
-ulong scsi_read(int device, ulong blknr, ulong blkcnt, void *buffer)
+static ulong scsi_read(int device, ulong blknr, lbaint_t blkcnt, void *buffer)
{
- ulong start,blks, buf_addr;
+ lbaint_t start, blks;
+ uintptr_t buf_addr;
unsigned short smallblks;
ccb* pccb=(ccb *)tempccb;
device=0xff;
@@ -359,7 +378,9 @@ ulong scsi_read(int device, ulong blknr, ulong blkcnt, void
*buffer)
buf_addr=(unsigned long)buffer;
start=blknr;
blks=blkcnt;
- debug (\nscsi_read: dev %d startblk %lx, blccnt %lx buffer
%lx\n,device,start,blks,(unsigned long)buffer);
+ debug(\nscsi_read: dev %d startblk LBAF
+ , blccnt LBAF buffer %lx\n,
+ device, start, blks, (unsigned long)buffer);
do {
pccb-pdata=(unsigned char *)buf_addr;
if(blksSCSI_MAX_READ_BLK) {
@@ -376,7 +397,9 @@ ulong scsi_read(int device, ulong blknr, ulong blkcnt, void
*buffer)
start+=blks;
blks=0;
}
- debug (scsi_read_ext: startblk %lx, blccnt %x buffer
%lx\n,start,smallblks,buf_addr);
+ debug(scsi_read_ext: startblk LBAF
+ , blccnt %x buffer %lx\n,
+ start, smallblks, buf_addr);
if(scsi_exec(pccb)!=TRUE) {
scsi_print_error(pccb);
blkcnt-=blks;
@@ -384,10 +407,65 @@ ulong scsi_read(int device, ulong blknr, ulong blkcnt,
void *buffer)
}
buf_addr+=pccb-datalen;
} while(blks!=0);
- debug (scsi_read_ext: end startblk %lx, blccnt %x buffer
%lx\n,start,smallblks,buf_addr);
+ debug(scsi_read_ext: end startblk LBAF
+ , blccnt %x buffer %lx\n, start, smallblks, buf_addr);
[U-Boot] [PATCH v3 10/22] ahci: support scsi writing in AHCI driver
From: Hung-Te Lin hun...@chromium.org
The scsi write command requires support from underlying driver.
This CL enables SCSI_WRITE10 in AHCI driver.
Tested in U-Boot console, try to i/o with sector #64:
scsi read 1000 40 1
md.b 1000 200 # check if things are not 0xcc
mw.b 1000 cc 200 # try to fill with 0xcc
scsi write 1000 40 1
mw.b 1000 0 200 # fill with zero
md.b 1000 200 # should be all 0
scsi read 1000 40 1
md.b 1000 200 # should be all 0xcc
Signed-off-by: Hung-Te Lin hun...@chromium.org
Signed-off-by: Simon Glass s...@chromium.org
---
Changes in v3:
- Remove . from end of commit subject
drivers/block/ahci.c | 54 +++--
1 files changed, 30 insertions(+), 24 deletions(-)
diff --git a/drivers/block/ahci.c b/drivers/block/ahci.c
index 2236321..5092352 100644
--- a/drivers/block/ahci.c
+++ b/drivers/block/ahci.c
@@ -43,12 +43,13 @@ hd_driveid_t *ataid[AHCI_MAX_PORTS];
#define writel_with_flush(a,b) do { writel(a,b); readl(b); } while (0)
/*
- * Some controllers limit number of blocks they can read at once. Contemporary
- * SSD devices work much faster if the read size is aligned to a power of 2.
- * Let's set default to 128 and allowing to be overwritten if needed.
+ * Some controllers limit number of blocks they can read/write at once.
+ * Contemporary SSD devices work much faster if the read/write size is aligned
+ * to a power of 2. Let's set default to 128 and allowing to be overwritten if
+ * needed.
*/
-#ifndef MAX_SATA_BLOCKS_READ
-#define MAX_SATA_BLOCKS_READ 0x80
+#ifndef MAX_SATA_BLOCKS_READ_WRITE
+#define MAX_SATA_BLOCKS_READ_WRITE 0x80
#endif
static inline u32 ahci_port_base(u32 base, u32 port)
@@ -464,8 +465,8 @@ static int ahci_port_start(u8 port)
}
-static int get_ahci_device_data(u8 port, u8 *fis, int fis_len, u8 *buf,
- int buf_len)
+static int ahci_device_data_io(u8 port, u8 *fis, int fis_len, u8 *buf,
+ int buf_len, u8 is_write)
{
struct ahci_ioports *pp = (probe_ent-port[port]);
@@ -474,7 +475,7 @@ static int get_ahci_device_data(u8 port, u8 *fis, int
fis_len, u8 *buf,
u32 port_status;
int sg_count;
- debug(Enter get_ahci_device_data: for port %d\n, port);
+ debug(Enter %s: for port %d\n, __func__, port);
if (port probe_ent-n_ports) {
printf(Invaild port number %d\n, port);
@@ -490,7 +491,7 @@ static int get_ahci_device_data(u8 port, u8 *fis, int
fis_len, u8 *buf,
memcpy((unsigned char *)pp-cmd_tbl, fis, fis_len);
sg_count = ahci_fill_sg(port, buf, buf_len);
- opts = (fis_len 2) | (sg_count 16);
+ opts = (fis_len 2) | (sg_count 16) | (is_write 6);
ahci_fill_cmd_slot(pp, opts);
writel_with_flush(1, port_mmio + PORT_CMD_ISSUE);
@@ -499,8 +500,7 @@ static int get_ahci_device_data(u8 port, u8 *fis, int
fis_len, u8 *buf,
printf(timeout exit!\n);
return -1;
}
- debug(get_ahci_device_data: %d byte transferred.\n,
- pp-cmd_slot-status);
+ debug(%s: %d byte transferred.\n, __func__, pp-cmd_slot-status);
return 0;
}
@@ -570,8 +570,8 @@ static int ata_scsiop_inquiry(ccb *pccb)
if (!(tmpid = malloc(sizeof(hd_driveid_t
return -ENOMEM;
- if (get_ahci_device_data(port, (u8 *) fis, 20,
-tmpid, sizeof(hd_driveid_t))) {
+ if (ahci_device_data_io(port, (u8 *) fis, 20, tmpid,
+ sizeof(hd_driveid_t), 0)) {
debug(scsi_ahci: SCSI inquiry command failure.\n);
return -EIO;
}
@@ -590,9 +590,9 @@ static int ata_scsiop_inquiry(ccb *pccb)
/*
- * SCSI READ10 command operation.
+ * SCSI READ10/WRITE10 command operation.
*/
-static int ata_scsiop_read10(ccb * pccb)
+static int ata_scsiop_read_write(ccb *pccb, u8 is_write)
{
u32 lba = 0;
u16 blocks = 0;
@@ -616,20 +616,21 @@ static int ata_scsiop_read10(ccb * pccb)
*/
blocks = (((u16)pccb-cmd[7]) 8) | ((u16) pccb-cmd[8]);
- debug(scsi_ahci: read %d blocks starting from lba 0x%x\n,
- (unsigned)lba, blocks);
+ debug(scsi_ahci: %s %d blocks starting from lba 0x%x\n,
+ is_write ? write : read, (unsigned)lba, blocks);
/* Preset the FIS */
memset(fis, 0, 20);
fis[0] = 0x27; /* Host to device FIS. */
fis[1] = 1 7; /* Command FIS. */
- fis[2] = ATA_CMD_RD_DMA; /* Command byte. */
+ /* Command byte (read/write). */
+ fis[2] = is_write ? ATA_CMD_WR_DMA : ATA_CMD_RD_DMA;
while (blocks) {
u16 now_blocks; /* number of blocks per iteration */
u32 transfer_size; /* number of bytes per iteration */
- now_blocks = min(MAX_SATA_BLOCKS_READ, blocks);
+ now_blocks = min(MAX_SATA_BLOCKS_READ_WRITE,
[U-Boot] [PATCH v3 12/22] ahci: Use sizeof(fis) instead of hardcoding '20'
From: Taylor Hutt th...@chromium.org
This cleanup replaces the hardcoded use of '20', which represents the
number of bytes in the FIS, with sizeof(fis).
Signed-off-by: Taylor Hutt th...@chromium.org
Signed-off-by: Simon Glass s...@chromium.org
---
drivers/block/ahci.c | 10 +-
1 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers/block/ahci.c b/drivers/block/ahci.c
index c16e8ba..10fae88 100644
--- a/drivers/block/ahci.c
+++ b/drivers/block/ahci.c
@@ -383,14 +383,14 @@ static void ahci_set_feature(u8 port)
u8 fis[20];
/* set feature */
- memset(fis, 0, 20);
+ memset(fis, 0, sizeof(fis));
fis[0] = 0x27;
fis[1] = 1 7;
fis[2] = ATA_CMD_SETF;
fis[3] = SETFEATURES_XFER;
fis[12] = __ilog2(probe_ent-udma_mask + 1) + 0x40 - 0x01;
- memcpy((unsigned char *)pp-cmd_tbl, fis, 20);
+ memcpy((unsigned char *)pp-cmd_tbl, fis, sizeof(fis));
ahci_fill_cmd_slot(pp, cmd_fis_len);
writel(1, port_mmio + PORT_CMD_ISSUE);
readl(port_mmio + PORT_CMD_ISSUE);
@@ -559,7 +559,7 @@ static int ata_scsiop_inquiry(ccb *pccb)
if (pccb-datalen = 35)
return 0;
- memset(fis, 0, 20);
+ memset(fis, 0, sizeof(fis));
/* Construct the FIS */
fis[0] = 0x27; /* Host to device FIS. */
fis[1] = 1 7;/* Command FIS. */
@@ -570,7 +570,7 @@ static int ata_scsiop_inquiry(ccb *pccb)
if (!(tmpid = malloc(sizeof(hd_driveid_t
return -ENOMEM;
- if (ahci_device_data_io(port, (u8 *) fis, 20, tmpid,
+ if (ahci_device_data_io(port, (u8 *) fis, sizeof(fis), tmpid,
sizeof(hd_driveid_t), 0)) {
debug(scsi_ahci: SCSI inquiry command failure.\n);
return -EIO;
@@ -620,7 +620,7 @@ static int ata_scsiop_read_write(ccb *pccb, u8 is_write)
is_write ? write : read, (unsigned)lba, blocks);
/* Preset the FIS */
- memset(fis, 0, 20);
+ memset(fis, 0, sizeof(fis));
fis[0] = 0x27; /* Host to device FIS. */
fis[1] = 1 7; /* Command FIS. */
/* Command byte (read/write). */
--
1.7.7.3
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[U-Boot] [PATCH v3 21/22] ide: Correct function signatures for ide_read/write()
The prototypes in the header were changed by commit 4ac8f8e0 but the
functions no longer match. Correct this.
It seems odd that block devices take an lbaint_t for the block count, but
an unsigned long for the blknr. Surely we should promote blknr to lbaint_t
also?
Signed-off-by: Simon Glass s...@chromium.org
---
Changes in v3:
- Add new patch to correct ide_read/write() function signatures
common/cmd_ide.c | 27 +--
1 files changed, 9 insertions(+), 18 deletions(-)
diff --git a/common/cmd_ide.c b/common/cmd_ide.c
index d508e9f..0105bdb 100644
--- a/common/cmd_ide.c
+++ b/common/cmd_ide.c
@@ -96,7 +96,8 @@ static void ident_cpy (unsigned char *dest, unsigned char
*src, unsigned int len
#ifdef CONFIG_ATAPI
static voidatapi_inquiry(block_dev_desc_t *dev_desc);
-ulong atapi_read (int device, lbaint_t blknr, ulong blkcnt, void *buffer);
+static ulong atapi_read(int device, ulong blknr, lbaint_t blkcnt,
+ void *buffer);
#endif
@@ -826,7 +827,7 @@ static void ide_ident(block_dev_desc_t *dev_desc)
/* - */
-ulong ide_read(int device, lbaint_t blknr, ulong blkcnt, void *buffer)
+ulong ide_read(int device, ulong blknr, lbaint_t blkcnt, void *buffer)
{
ulong n = 0;
unsigned char c;
@@ -840,7 +841,7 @@ ulong ide_read(int device, lbaint_t blknr, ulong blkcnt,
void *buffer)
lba48 = 1;
}
#endif
- debug(ide_read dev %d start %lX, blocks %lX buffer at %lX\n,
+ debug(ide_read dev %d start %lX, blocks LBAF buffer at %lX\n,
device, blknr, blkcnt, (ulong) buffer);
ide_led(DEVICE_LED(device), 1); /* LED on */
@@ -930,13 +931,8 @@ ulong ide_read(int device, lbaint_t blknr, ulong blkcnt,
void *buffer)
if ((c (ATA_STAT_DRQ | ATA_STAT_BUSY | ATA_STAT_ERR)) !=
ATA_STAT_DRQ) {
-#if defined(CONFIG_SYS_64BIT_LBA)
- printf(Error (no IRQ) dev %d blk %lld: status
0x%02x\n,
+ printf(Error (no IRQ) dev %d blk %ld: status %#02x\n,
device, blknr, c);
-#else
- printf(Error (no IRQ) dev %d blk %ld: status 0x%02x\n,
- device, (ulong) blknr, c);
-#endif
break;
}
@@ -955,7 +951,7 @@ IDE_READ_E:
/* - */
-ulong ide_write(int device, lbaint_t blknr, ulong blkcnt, const void *buffer)
+ulong ide_write(int device, ulong blknr, lbaint_t blkcnt, const void *buffer)
{
ulong n = 0;
unsigned char c;
@@ -1023,13 +1019,8 @@ ulong ide_write(int device, lbaint_t blknr, ulong
blkcnt, const void *buffer)
if ((c (ATA_STAT_DRQ | ATA_STAT_BUSY | ATA_STAT_ERR)) !=
ATA_STAT_DRQ) {
-#if defined(CONFIG_SYS_64BIT_LBA)
- printf(Error (no IRQ) dev %d blk %lld: status
0x%02x\n,
+ printf(Error (no IRQ) dev %d blk %ld: status %#02x\n,
device, blknr, c);
-#else
- printf(Error (no IRQ) dev %d blk %ld: status 0x%02x\n,
- device, (ulong) blknr, c);
-#endif
goto WR_OUT;
}
@@ -1518,13 +1509,13 @@ static void atapi_inquiry(block_dev_desc_t *dev_desc)
#define ATAPI_READ_BLOCK_SIZE 2048/* assuming CD part */
#define ATAPI_READ_MAX_BLOCK (ATAPI_READ_MAX_BYTES/ATAPI_READ_BLOCK_SIZE)
-ulong atapi_read(int device, lbaint_t blknr, ulong blkcnt, void *buffer)
+ulong atapi_read(int device, ulong blknr, lbaint_t blkcnt, void *buffer)
{
ulong n = 0;
unsigned char ccb[12]; /* Command descriptor block */
ulong cnt;
- debug(atapi_read dev %d start %lX, blocks %lX buffer at %lX\n,
+ debug(atapi_read dev %d start %lX, blocks LBAF buffer at %lX\n,
device, blknr, blkcnt, (ulong) buffer);
do {
--
1.7.7.3
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[U-Boot] [PATCH v3 13/22] ahci: Fix 'Invaild' typo
From: Taylor Hutt th...@chromium.org
This fixes a spelling error in a message which can be output to the
console.
Signed-off-by: Taylor Hutt th...@chromium.org
Signed-off-by: Simon Glass s...@chromium.org
---
Changes in v3:
- Move #ifdef change into earlier commit
drivers/block/ahci.c |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/drivers/block/ahci.c b/drivers/block/ahci.c
index 10fae88..20c5336 100644
--- a/drivers/block/ahci.c
+++ b/drivers/block/ahci.c
@@ -478,7 +478,7 @@ static int ahci_device_data_io(u8 port, u8 *fis, int
fis_len, u8 *buf,
debug(Enter %s: for port %d\n, __func__, port);
if (port probe_ent-n_ports) {
- printf(Invaild port number %d\n, port);
+ printf(Invalid port number %d\n, port);
return -1;
}
--
1.7.7.3
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[U-Boot] [PATCH v3 18/22] ahci: Support spin-up and link-up separately
From: Marc Jones marc.jo...@chromium.org
Add HDD handling to the SSD-only AHCI driver, by separately dealing with
spin-up and link-up.
Signed-off-by: Marc Jones marc.jo...@chromium.org
Signed-off-by: Simon Glass s...@chromium.org
---
drivers/block/ahci.c | 45 +++--
1 files changed, 39 insertions(+), 6 deletions(-)
diff --git a/drivers/block/ahci.c b/drivers/block/ahci.c
index 719574f..19c5f13 100644
--- a/drivers/block/ahci.c
+++ b/drivers/block/ahci.c
@@ -53,6 +53,7 @@ hd_driveid_t *ataid[AHCI_MAX_PORTS];
#endif
/* Maximum timeouts for each event */
+#define WAIT_MS_SPINUP 1
#define WAIT_MS_DATAIO 5000
#define WAIT_MS_LINKUP 4
@@ -129,7 +130,7 @@ static int ahci_host_init(struct ahci_probe_ent *probe_ent)
unsigned short vendor;
#endif
volatile u8 *mmio = (volatile u8 *)probe_ent-mmio_base;
- u32 tmp, cap_save;
+ u32 tmp, cap_save, cmd;
int i, j;
volatile u8 *port_mmio;
@@ -137,7 +138,7 @@ static int ahci_host_init(struct ahci_probe_ent *probe_ent)
cap_save = readl(mmio + HOST_CAP);
cap_save = ((1 28) | (1 17));
- cap_save |= (1 27);
+ cap_save |= (1 27); /* Staggered Spin-up. Not needed. */
/* global controller reset */
tmp = readl(mmio + HOST_CTL);
@@ -201,9 +202,18 @@ static int ahci_host_init(struct ahci_probe_ent *probe_ent)
msleep(500);
}
- debug(Spinning up port %d... , i);
- writel(PORT_CMD_SPIN_UP, port_mmio + PORT_CMD);
-
+ /* Add the spinup command to whatever mode bits may
+* already be on in the command register.
+*/
+ cmd = readl(port_mmio + PORT_CMD);
+ cmd |= PORT_CMD_FIS_RX;
+ cmd |= PORT_CMD_SPIN_UP;
+ writel_with_flush(cmd, port_mmio + PORT_CMD);
+
+ /* Bring up SATA link.
+* SATA link bringup time is usually less than 1 ms; only very
+* rarely has it taken between 1-2 ms. Never seen it above 2 ms.
+*/
j = 0;
while (j WAIT_MS_LINKUP) {
tmp = readl(port_mmio + PORT_SCR_STAT);
@@ -212,7 +222,30 @@ static int ahci_host_init(struct ahci_probe_ent *probe_ent)
udelay(1000);
j++;
}
- if (j == WAIT_MS_LINKUP)
+ if (j == WAIT_MS_LINKUP) {
+ printf(SATA link %d timeout.\n, i);
+ continue;
+ } else {
+ debug(SATA link ok.\n);
+ }
+
+ /* Clear error status */
+ tmp = readl(port_mmio + PORT_SCR_ERR);
+ if (tmp)
+ writel(tmp, port_mmio + PORT_SCR_ERR);
+
+ debug(Spinning up device on SATA port %d... , i);
+
+ j = 0;
+ while (j WAIT_MS_SPINUP) {
+ tmp = readl(port_mmio + PORT_TFDATA);
+ if (!(tmp (ATA_STAT_BUSY | ATA_STAT_DRQ)))
+ break;
+ udelay(1000);
+ j++;
+ }
+ printf(Target spinup took %d ms.\n, j);
+ if (j == WAIT_MS_SPINUP)
debug(timeout.\n);
else
debug(ok.\n);
--
1.7.7.3
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[U-Boot] [PATCH v3 08/22] ahci: cosmetics and cleanup
From: Stefan Reinauer reina...@chromium.org
- print the correct speed
- print all the AHCI capability flags
(information taken from Linux kernel driver)
- clean up some comments
For example, this might show the following string:
AHCI 0001.0300 32 slots 6 ports 6 Gbps 0x3 impl SATA mode
Signed-off-by: Stefan Reinauer reina...@chromium.org
Commit-Ready: Stefan Reinauer reina...@chromium.org
Signed-off-by: Simon Glass s...@chromium.org
Tested-by: Stefan Reinauer reina...@chromium.org
---
drivers/block/ahci.c | 25 ++---
include/ahci.h |1 +
2 files changed, 19 insertions(+), 7 deletions(-)
diff --git a/drivers/block/ahci.c b/drivers/block/ahci.c
index af31c97..0a7ad81 100644
--- a/drivers/block/ahci.c
+++ b/drivers/block/ahci.c
@@ -194,7 +194,7 @@ static int ahci_host_init(struct ahci_probe_ent *probe_ent)
/* set irq mask (enables interrupts) */
writel(DEF_PORT_IRQ, port_mmio + PORT_IRQ_MASK);
- /*register linkup ports */
+ /* register linkup ports */
tmp = readl(port_mmio + PORT_SCR_STAT);
debug(Port %d status: 0x%x\n, i, tmp);
if ((tmp 0xf) == 0x03)
@@ -222,12 +222,13 @@ static void ahci_print_info(struct ahci_probe_ent
*probe_ent)
u16 cc;
#endif
volatile u8 *mmio = (volatile u8 *)probe_ent-mmio_base;
- u32 vers, cap, impl, speed;
+ u32 vers, cap, cap2, impl, speed;
const char *speed_s;
const char *scc_s;
vers = readl(mmio + HOST_VERSION);
cap = probe_ent-cap;
+ cap2 = readl(mmio + HOST_CAP2);
impl = probe_ent-port_map;
speed = (cap 20) 0xf;
@@ -235,6 +236,8 @@ static void ahci_print_info(struct ahci_probe_ent
*probe_ent)
speed_s = 1.5;
else if (speed == 2)
speed_s = 3;
+ else if (speed == 3)
+ speed_s = 6;
else
speed_s = ?;
@@ -260,8 +263,9 @@ static void ahci_print_info(struct ahci_probe_ent
*probe_ent)
((cap 8) 0x1f) + 1, (cap 0x1f) + 1, speed_s, impl, scc_s);
printf(flags:
- %s%s%s%s%s%s
- %s%s%s%s%s%s%s\n,
+ %s%s%s%s%s%s%s
+ %s%s%s%s%s%s%s
+ %s%s%s%s%s%s\n,
cap (1 31) ? 64bit : ,
cap (1 30) ? ncq : ,
cap (1 28) ? ilck : ,
@@ -272,9 +276,16 @@ static void ahci_print_info(struct ahci_probe_ent
*probe_ent)
cap (1 19) ? nz : ,
cap (1 18) ? only : ,
cap (1 17) ? pmp : ,
+ cap (1 16) ? fbss : ,
cap (1 15) ? pio : ,
cap (1 14) ? slum : ,
- cap (1 13) ? part : );
+ cap (1 13) ? part : ,
+ cap (1 7) ? ccc : ,
+ cap (1 6) ? ems : ,
+ cap (1 5) ? sxs : ,
+ cap2 (1 2) ? apst : ,
+ cap2 (1 1) ? nvmp : ,
+ cap2 (1 0) ? boh : );
}
#ifndef CONFIG_SCSI_AHCI_PLAT
@@ -369,7 +380,7 @@ static void ahci_set_feature(u8 port)
u32 cmd_fis_len = 5;/* five dwords */
u8 fis[20];
- /*set feature */
+ /* set feature */
memset(fis, 0, 20);
fis[0] = 0x27;
fis[1] = 1 7;
@@ -383,7 +394,7 @@ static void ahci_set_feature(u8 port)
readl(port_mmio + PORT_CMD_ISSUE);
if (waiting_for_cmd_completed(port_mmio + PORT_CMD_ISSUE, 150, 0x1)) {
- printf(set feature error!\n);
+ printf(set feature error on port %d!\n, port);
}
}
diff --git a/include/ahci.h b/include/ahci.h
index c4fb9e7..babbdc6 100644
--- a/include/ahci.h
+++ b/include/ahci.h
@@ -51,6 +51,7 @@
#define HOST_IRQ_STAT 0x08 /* interrupt status */
#define HOST_PORTS_IMPL0x0c /* bitmap of implemented ports */
#define HOST_VERSION 0x10 /* AHCI spec. version compliancy */
+#define HOST_CAP2 0x24 /* host capabilities, extended */
/* HOST_CTL bits */
#define HOST_RESET (1 0) /* reset controller; self-clear */
--
1.7.7.3
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[U-Boot] [PATCH v3 16/22] ahci: flush / invalidate dcache around SATA commands
From: Taylor Hutt th...@chromium.org
Exynos5 automatically performs DMA when the SATA controller executes
commands. This adds the necessary dcache-to-memory flush
invalidation calls to allow the DMA to properly function.
Signed-off-by: Taylor Hutt th...@chromium.org
Signed-off-by: Simon Glass s...@chromium.org
---
drivers/block/ahci.c | 39 +++
1 files changed, 39 insertions(+), 0 deletions(-)
diff --git a/drivers/block/ahci.c b/drivers/block/ahci.c
index 00de086..a05d9cf 100644
--- a/drivers/block/ahci.c
+++ b/drivers/block/ahci.c
@@ -70,6 +70,39 @@ static void ahci_setup_port(struct ahci_ioports *port,
unsigned long base,
#define msleep(a) udelay(a * 1000)
+static void ahci_dcache_flush_range(unsigned begin, unsigned len)
+{
+ const unsigned long start = begin;
+ const unsigned long end = start + len;
+
+ debug(%s: flush dcache: [%#lx, %#lx)\n, __func__, start, end);
+ flush_dcache_range(start, end);
+}
+
+/*
+ * SATA controller DMAs to physical RAM. Ensure data from the
+ * controller is invalidated from dcache; next access comes from
+ * physical RAM.
+ */
+static void ahci_dcache_invalidate_range(unsigned begin, unsigned len)
+{
+ const unsigned long start = begin;
+ const unsigned long end = start + len;
+
+ debug(%s: invalidate dcache: [%#lx, %#lx)\n, __func__, start, end);
+ invalidate_dcache_range(start, end);
+}
+
+/*
+ * Ensure data for SATA controller is flushed out of dcache and
+ * written to physical memory.
+ */
+static void ahci_dcache_flush_sata_cmd(struct ahci_ioports *pp)
+{
+ ahci_dcache_flush_range((unsigned long)pp-cmd_slot,
+ AHCI_PORT_PRIV_DMA_SZ);
+}
+
static int waiting_for_cmd_completed(volatile u8 *offset,
int timeout_msec,
u32 sign)
@@ -392,6 +425,7 @@ static void ahci_set_feature(u8 port)
memcpy((unsigned char *)pp-cmd_tbl, fis, sizeof(fis));
ahci_fill_cmd_slot(pp, cmd_fis_len);
+ ahci_dcache_flush_sata_cmd(pp);
writel(1, port_mmio + PORT_CMD_ISSUE);
readl(port_mmio + PORT_CMD_ISSUE);
@@ -496,12 +530,17 @@ static int ahci_device_data_io(u8 port, u8 *fis, int
fis_len, u8 *buf,
opts = (fis_len 2) | (sg_count 16) | (is_write 6);
ahci_fill_cmd_slot(pp, opts);
+ ahci_dcache_flush_sata_cmd(pp);
+ ahci_dcache_flush_range((unsigned)buf, (unsigned)buf_len);
+
writel_with_flush(1, port_mmio + PORT_CMD_ISSUE);
if (waiting_for_cmd_completed(port_mmio + PORT_CMD_ISSUE, 150, 0x1)) {
printf(timeout exit!\n);
return -1;
}
+
+ ahci_dcache_invalidate_range((unsigned)buf, (unsigned)buf_len);
debug(%s: %d byte transferred.\n, __func__, pp-cmd_slot-status);
return 0;
--
1.7.7.3
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[U-Boot] [PATCH v3 20/22] ahci: Expand HDD Logical Block addressability up to 32 bits
From: Walter Murphy wmur...@google.com
Currently, this driver uses a 28bit interface to AHCI, this
limits the number of blocks addressable to 2^28, or the max
disk size to 512(2^28) or about 137GB. This change allows
supporting drives up to about 2TB.
Testing this is a bit difficult. There is test code that
can be inserted into U-Boot that will write test patterns
into certain unused blocks. These patterns can be manually
checked using 'dd' after boot. Another way is to confirm the
original error that exposed this bug is fixed. IOW: see if
AU (Auto Update) will now work on the drive. Also, check
that there are no warning messages from the 'cgpt' utility.
Signed-off-by: Walter Murphy wmur...@chromium.org
Signed-off-by: Simon Glass s...@chromium.org
---
drivers/block/ahci.c | 12
1 files changed, 8 insertions(+), 4 deletions(-)
diff --git a/drivers/block/ahci.c b/drivers/block/ahci.c
index 963efec..8c785ae 100644
--- a/drivers/block/ahci.c
+++ b/drivers/block/ahci.c
@@ -707,7 +707,7 @@ static int ata_scsiop_read_write(ccb *pccb, u8 is_write)
fis[0] = 0x27; /* Host to device FIS. */
fis[1] = 1 7; /* Command FIS. */
/* Command byte (read/write). */
- fis[2] = is_write ? ATA_CMD_WR_DMA : ATA_CMD_RD_DMA;
+ fis[2] = is_write ? ATA_CMD_WRITE_EXT : ATA_CMD_READ_EXT;
while (blocks) {
u16 now_blocks; /* number of blocks per iteration */
@@ -721,11 +721,15 @@ static int ata_scsiop_read_write(ccb *pccb, u8 is_write)
return -EIO;
}
- /* LBA address, only support LBA28 in this driver */
+ /* LBA48 SATA command but only use 32bit address range within
+* that. The next smaller command range (28bit) is too small.
+*/
fis[4] = (lba 0) 0xff;
fis[5] = (lba 8) 0xff;
fis[6] = (lba 16) 0xff;
- fis[7] = ((lba 24) 0xf) | 0xe0;
+ fis[7] = 1 6; /* device reg: set LBA mode */
+ fis[8] = ((lba 24) 0xff);
+ fis[3] = 0xe0; /* features */
/* Block (sector) count */
fis[12] = (now_blocks 0) 0xff;
@@ -963,7 +967,7 @@ static int ata_io_flush(u8 port)
memset(fis, 0, 20);
fis[0] = 0x27; /* Host to device FIS. */
fis[1] = 1 7; /* Command FIS. */
- fis[2] = ATA_CMD_FLUSH;
+ fis[2] = ATA_CMD_FLUSH_EXT;
memcpy((unsigned char *)pp-cmd_tbl, fis, 20);
ahci_fill_cmd_slot(pp, cmd_fis_len);
--
1.7.7.3
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[U-Boot] [PATCH v3 15/22] ahci: Use virt_to_phys() to denote physical addresses for DMA
From: Taylor Hutt th...@chromium.org Update the assignment of various physical memory buffers used by the SATA controller to explicitly be denoted as physical addresses. The memory is identity-mapped, so these function calls are a nop, but they provide good semantic documentation for any maintainers. The return value of virt_to_phys() is 'unsigned long'. On machines where sizeof(unsigned long) != sizeof(pointer), a cast through (uintptr_t) is needed to appease the compiler due to the potential of losing the upper 32 bits of the address. In compilation this scenario, a physical address could be 64-bits, yet the C pointer environment only allows 32-bit addresses; the constraint is that pointers cannot address more than 4Gb of memory and if virt_to_phys() ever returns an out-of-range value for the physical address, there are issues with emmory mapping which must be solved. However, since the memory is identify mappeed, there is no problem introducing the cast: the original pointer will reside in 32-bits, so the physical address will also be within in 32-bits. Signed-off-by: Taylor Hutt th...@chromium.org Signed-off-by: Simon Glass s...@chromium.org --- drivers/block/ahci.c | 10 ++ 1 files changed, 6 insertions(+), 4 deletions(-) diff --git a/drivers/block/ahci.c b/drivers/block/ahci.c index 20c5336..00de086 100644 --- a/drivers/block/ahci.c +++ b/drivers/block/ahci.c @@ -431,25 +431,27 @@ static int ahci_port_start(u8 port) * First item in chunk of DMA memory: 32-slot command table, * 32 bytes each in size */ - pp-cmd_slot = (struct ahci_cmd_hdr *)mem; + pp-cmd_slot = + (struct ahci_cmd_hdr *)(uintptr_t)virt_to_phys((void *)mem); debug(cmd_slot = 0x%x\n, (unsigned)pp-cmd_slot); mem += (AHCI_CMD_SLOT_SZ + 224); /* * Second item: Received-FIS area */ - pp-rx_fis = mem; + pp-rx_fis = virt_to_phys((void *)mem); mem += AHCI_RX_FIS_SZ; /* * Third item: data area for storing a single command * and its scatter-gather table */ - pp-cmd_tbl = mem; + pp-cmd_tbl = virt_to_phys((void *)mem); debug(cmd_tbl_dma = 0x%x\n, pp-cmd_tbl); mem += AHCI_CMD_TBL_HDR; - pp-cmd_tbl_sg = (struct ahci_sg *)mem; + pp-cmd_tbl_sg = + (struct ahci_sg *)(uintptr_t)virt_to_phys((void *)mem); writel_with_flush((u32) pp-cmd_slot, port_mmio + PORT_LST_ADDR); -- 1.7.7.3 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v3 19/22] ahci: Perform SATA flush after disk write.
From: Marc Jones marc.jo...@chromium.org
Writes in u-boot are so rare, and the logic to know when is
the last write and do a flush only there is sufficiently
difficult. Just do a flush after every write. This incurs,
usually, one extra flush when the rare writes do happen.
Signed-off-by: Marc Jones marc.jo...@chromium.org
Signed-off-by: Simon Glass s...@chromium.org
---
drivers/block/ahci.c | 52 +-
include/ata.h|3 ++
2 files changed, 54 insertions(+), 1 deletions(-)
diff --git a/drivers/block/ahci.c b/drivers/block/ahci.c
index 19c5f13..963efec 100644
--- a/drivers/block/ahci.c
+++ b/drivers/block/ahci.c
@@ -37,6 +37,8 @@
#include linux/ctype.h
#include ahci.h
+static int ata_io_flush(u8 port);
+
struct ahci_probe_ent *probe_ent = NULL;
hd_driveid_t *ataid[AHCI_MAX_PORTS];
@@ -55,6 +57,7 @@ hd_driveid_t *ataid[AHCI_MAX_PORTS];
/* Maximum timeouts for each event */
#define WAIT_MS_SPINUP 1
#define WAIT_MS_DATAIO 5000
+#define WAIT_MS_FLUSH 5000
#define WAIT_MS_LINKUP 4
static inline u32 ahci_port_base(u32 base, u32 port)
@@ -267,7 +270,7 @@ static int ahci_host_init(struct ahci_probe_ent *probe_ent)
/* register linkup ports */
tmp = readl(port_mmio + PORT_SCR_STAT);
- debug(Port %d status: 0x%x\n, i, tmp);
+ debug(SATA port %d status: 0x%x\n, i, tmp);
if ((tmp 0xf) == 0x03)
probe_ent-link_port_map |= (0x01 i);
}
@@ -736,6 +739,17 @@ static int ata_scsiop_read_write(ccb *pccb, u8 is_write)
is_write ? WRITE : READ);
return -EIO;
}
+
+ /* If this transaction is a write, do a following flush.
+* Writes in u-boot are so rare, and the logic to know when is
+* the last write and do a flush only there is sufficiently
+* difficult. Just do a flush after every write. This incurs,
+* usually, one extra flush when the rare writes do happen.
+*/
+ if (is_write) {
+ if (-EIO == ata_io_flush(pccb-target))
+ return -EIO;
+ }
user_buffer += transfer_size;
user_buffer_size -= transfer_size;
blocks -= now_blocks;
@@ -929,6 +943,42 @@ err_out:
}
#endif
+/*
+ * In the general case of generic rotating media it makes sense to have a
+ * flush capability. It probably even makes sense in the case of SSDs because
+ * one cannot always know for sure what kind of internal cache/flush mechanism
+ * is embodied therein. At first it was planned to invoke this after the last
+ * write to disk and before rebooting. In practice, knowing, a priori, which
+ * is the last write is difficult. Because writing to the disk in u-boot is
+ * very rare, this flush command will be invoked after every block write.
+ */
+static int ata_io_flush(u8 port)
+{
+ u8 fis[20];
+ struct ahci_ioports *pp = (probe_ent-port[port]);
+ volatile u8 *port_mmio = (volatile u8 *)pp-port_mmio;
+ u32 cmd_fis_len = 5;/* five dwords */
+
+ /* Preset the FIS */
+ memset(fis, 0, 20);
+ fis[0] = 0x27; /* Host to device FIS. */
+ fis[1] = 1 7; /* Command FIS. */
+ fis[2] = ATA_CMD_FLUSH;
+
+ memcpy((unsigned char *)pp-cmd_tbl, fis, 20);
+ ahci_fill_cmd_slot(pp, cmd_fis_len);
+ writel_with_flush(1, port_mmio + PORT_CMD_ISSUE);
+
+ if (waiting_for_cmd_completed(port_mmio + PORT_CMD_ISSUE,
+ WAIT_MS_FLUSH, 0x1)) {
+ debug(scsi_ahci: flush command timeout on port %d.\n, port);
+ return -EIO;
+ }
+
+ return 0;
+}
+
+
void scsi_bus_reset(void)
{
/*Not implement*/
diff --git a/include/ata.h b/include/ata.h
index 3b2d737..a614724 100644
--- a/include/ata.h
+++ b/include/ata.h
@@ -114,6 +114,9 @@
#define ATA_CMD_WRITE_EXT 0x34/* Write Sectores (with retries) with
48bit addressing */
#define ATA_CMD_VRFY_EXT 0x42/* Read Verify (with retries) with
48bit addressing */
+#define ATA_CMD_FLUSH 0xE7 /* Flush drive cache */
+#define ATA_CMD_FLUSH_EXT 0xEA /* Flush drive cache, with 48bit addressing */
+
/*
* ATAPI Commands
*/
--
1.7.7.3
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[U-Boot] [PATCH v3 04/22] Support setenv_ulong() and setenv_addr() for powerpc
This includes were outside an #ifdef CONFIG_PPC, but there is not reason to exclude powerpc from using them. Move the declaration outside the #ifdef. Signed-off-by: Simon Glass s...@chromium.org --- Changes in v3: - Add new patch to enable setenv_ulong/addr() for powerpc include/common.h |2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/include/common.h b/include/common.h index b23e90b..12b3e03 100644 --- a/include/common.h +++ b/include/common.h @@ -345,9 +345,9 @@ int saveenv (void); int inline setenv(const char *, const char *); #else intsetenv (const char *, const char *); +#endif /* CONFIG_PPC */ int setenv_ulong(const char *varname, ulong value); int setenv_addr(const char *varname, const void *addr); -#endif /* CONFIG_PPC */ #ifdef CONFIG_ARM # include asm/mach-types.h # include asm/setup.h -- 1.7.7.3 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v3 07/22] ahci: Improve AHCI debugging
From: Stefan Reinauer reina...@chromium.org
- remove unused ssleep macro
- add some useful debugging information
Signed-off-by: Stefan Reinauer reina...@chromium.org
Signed-off-by: Simon Glass s...@chromium.org
---
drivers/block/ahci.c |3 ++-
1 files changed, 2 insertions(+), 1 deletions(-)
diff --git a/drivers/block/ahci.c b/drivers/block/ahci.c
index ad397dc..af31c97 100644
--- a/drivers/block/ahci.c
+++ b/drivers/block/ahci.c
@@ -68,7 +68,6 @@ static void ahci_setup_port(struct ahci_ioports *port,
unsigned long base,
#define msleep(a) udelay(a * 1000)
-#define ssleep(a) msleep(a * 1000)
static int waiting_for_cmd_completed(volatile u8 *offset,
int timeout_msec,
@@ -153,6 +152,7 @@ static int ahci_host_init(struct ahci_probe_ent *probe_ent)
tmp = readl(port_mmio + PORT_CMD);
if (tmp (PORT_CMD_LIST_ON | PORT_CMD_FIS_ON |
PORT_CMD_FIS_RX | PORT_CMD_START)) {
+ debug(Port %d is active. Deactivating.\n, i);
tmp = ~(PORT_CMD_LIST_ON | PORT_CMD_FIS_ON |
PORT_CMD_FIS_RX | PORT_CMD_START);
writel_with_flush(tmp, port_mmio + PORT_CMD);
@@ -163,6 +163,7 @@ static int ahci_host_init(struct ahci_probe_ent *probe_ent)
msleep(500);
}
+ debug(Spinning up port %d... , i);
writel(PORT_CMD_SPIN_UP, port_mmio + PORT_CMD);
j = 0;
--
1.7.7.3
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[U-Boot] [PATCH v3 05/22] scsi: Add function and env var to report number of scsi drives
From: Stefan Reinauer reina...@chromium.org
Add a new function to find out the number of available SCSI disks. Also
set the 'scsidevs' environment variable after each scan.
Signed-off-by: Stefan Reinauer reina...@chromium.org
Signed-off-by: Simon Glass s...@chromium.org
---
Changes in v3:
- Fix setenv operation to use correct function
Changes in v2:
- Set 'scsidevs' environment variable to number of SCSI disks
README|3 +++
common/cmd_scsi.c |8
include/scsi.h|2 ++
3 files changed, 13 insertions(+), 0 deletions(-)
diff --git a/README b/README
index 69da2b8..801772c 100644
--- a/README
+++ b/README
@@ -1039,6 +1039,9 @@ The following options need to be configured:
devices.
CONFIG_SYS_SCSI_SYM53C8XX_CCF to fix clock timing (80Mhz)
+The environment variable 'scsidevs' is set to the number of
+SCSI devices found during the last scan.
+
- NETWORK Support (PCI):
CONFIG_E1000
Support for Intel 8254x/8257x gigabit chips.
diff --git a/common/cmd_scsi.c b/common/cmd_scsi.c
index 31ea788..9bd8ec9 100644
--- a/common/cmd_scsi.c
+++ b/common/cmd_scsi.c
@@ -184,6 +184,14 @@ removable:
scsi_curr_dev=0;
else
scsi_curr_dev = -1;
+
+ printf(Found %d device(s).\n, scsi_max_devs);
+ setenv_ulong(scsidevs, scsi_max_devs);
+}
+
+int scsi_get_disk_count(void)
+{
+ return scsi_max_devs;
}
#ifdef CONFIG_PCI
diff --git a/include/scsi.h b/include/scsi.h
index 89ae45f..9681d19 100644
--- a/include/scsi.h
+++ b/include/scsi.h
@@ -189,6 +189,8 @@ void scsi_low_level_init(int busdevfunc);
void scsi_init(void);
void scsi_scan(int mode);
+/** @return the number of scsi disks */
+int scsi_get_disk_count(void);
#define SCSI_IDENTIFY 0xC0 /* not used */
--
1.7.7.3
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[U-Boot] [PATCH v3 09/22] ahci: Make sending the SETFEATURES_XFER command optional
From: Gabe Black gabebl...@chromium.org
This command doesn't really do anything when talking to a SATA device, and
sending it confuses some of them. This change makes sending the command
optional, and defaults to not. The situations where it should be sent are not
the common case.
With the standard SSD in the machine, here are some times with the option
turned off:
1. 8277
2. 8273
3. 8050
And turned on:
1. 8303
2. 8155
3. 8276
Sending that command seems to have no meaningful effect on performance.
This fixes problems with an SSD marked Toshiba NV6424, Taiwan 11159AE P
and TC58NVG5D2FTA10.
Signed-off-by: Gabe Black gabebl...@chromium.org
Signed-off-by: Taylor Hutt th...@chromium.org
Signed-off-by: Simon Glass s...@chromium.org
---
Changes in v3:
- Move missing #ifdef CONFIG_AHCI_SETFEATURES_XFER from later commit
drivers/block/ahci.c |6 ++
1 files changed, 6 insertions(+), 0 deletions(-)
diff --git a/drivers/block/ahci.c b/drivers/block/ahci.c
index 0a7ad81..2236321 100644
--- a/drivers/block/ahci.c
+++ b/drivers/block/ahci.c
@@ -373,6 +373,7 @@ static void ahci_fill_cmd_slot(struct ahci_ioports *pp, u32
opts)
}
+#ifdef CONFIG_AHCI_SETFEATURES_XFER
static void ahci_set_feature(u8 port)
{
struct ahci_ioports *pp = (probe_ent-port[port]);
@@ -397,6 +398,7 @@ static void ahci_set_feature(u8 port)
printf(set feature error on port %d!\n, port);
}
}
+#endif
static int ahci_port_start(u8 port)
@@ -743,7 +745,9 @@ void scsi_low_level_init(int busdevfunc)
printf(Can not start port %d\n, i);
continue;
}
+#ifdef CONFIG_AHCI_SETFEATURES_XFER
ahci_set_feature((u8) i);
+#endif
}
}
}
@@ -784,7 +788,9 @@ int ahci_init(u32 base)
printf(Can not start port %d\n, i);
continue;
}
+#ifdef CONFIG_AHCI_SETFEATURES_XFER
ahci_set_feature((u8) i);
+#endif
}
}
err_out:
--
1.7.7.3
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[U-Boot] [PATCH v3 06/22] ahci: Optimise AHCI controller reset and start-up
From: Stefan Reinauer reina...@chromium.org
The existing code waits a whole second for the AHCI controller to reset.
Instead, let's poll the status register to see if the reset has
succeeded and return earlier if possible. This brings down the time for
AHCI probing from 1s to 20ms.
Signed-off-by: Stefan Reinauer reina...@chromium.org
Signed-off-by: Simon Glass s...@chromium.org
---
drivers/block/ahci.c | 24 +++-
1 files changed, 15 insertions(+), 9 deletions(-)
diff --git a/drivers/block/ahci.c b/drivers/block/ahci.c
index d94da1f..ad397dc 100644
--- a/drivers/block/ahci.c
+++ b/drivers/block/ahci.c
@@ -110,13 +110,15 @@ static int ahci_host_init(struct ahci_probe_ent
*probe_ent)
/* reset must complete within 1 second, or
* the hardware should be considered fried.
*/
- ssleep(1);
-
- tmp = readl(mmio + HOST_CTL);
- if (tmp HOST_RESET) {
- debug(controller reset failed (0x%x)\n, tmp);
- return -1;
- }
+ i = 1000;
+ do {
+ udelay(1000);
+ tmp = readl(mmio + HOST_CTL);
+ if (!i--) {
+ debug(controller reset failed (0x%x)\n, tmp);
+ return -1;
+ }
+ } while (tmp HOST_RESET);
writel_with_flush(HOST_AHCI_EN, mmio + HOST_CTL);
writel(cap_save, mmio + HOST_CAP);
@@ -164,13 +166,17 @@ static int ahci_host_init(struct ahci_probe_ent
*probe_ent)
writel(PORT_CMD_SPIN_UP, port_mmio + PORT_CMD);
j = 0;
- while (j 100) {
- msleep(10);
+ while (j 1000) {
tmp = readl(port_mmio + PORT_SCR_STAT);
if ((tmp 0xf) == 0x3)
break;
+ udelay(1000);
j++;
}
+ if (j == 1000)
+ debug(timeout.\n);
+ else
+ debug(ok.\n);
tmp = readl(port_mmio + PORT_SCR_ERR);
debug(PORT_SCR_ERR 0x%x\n, tmp);
--
1.7.7.3
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[U-Boot] [PATCH v3 11/22] ahci: Make the AHCI code find the capacity of disks 128 GB properly
From: Gabe Black gabebl...@chromium.org
In the structure returned by the ATA identify device command, there are two
fields which describe the device capacity. One is a 32 bit data type which
reports the number of sectors as a 28 bit LBA, and the other is a 64 bit data
type which is for a 48 bit LBA. If the device doesn't support 48 bit LBAs,
the small value is the only value with the correct size. If it supports more,
if the number of sectors is small enough to fit into 28 bits, both fields
reflect the correct value. If it's too large, the smaller field has 28 bits of
1s, 0xfff, and the other field has the correct value.
The AHCI driver is implemented by attaching to the generic SCSI code and
translating on the fly between SCSI binary data structures and AHCI data
structures. It responds to requests to execute specific SCSI commands by
executing the equivalent AHCI commands and then crafting a response which
matches what a SCSI disk would send.
The AHCI driver now considers both fields and chooses the correct one when
implementing both the SCSI READ CAPACITY (10) and READ CAPACITY (16) commands.
Signed-off-by: Gabe Black gabebl...@chromium.org
Signed-off-by: Simon Glass s...@chromium.org
---
drivers/block/ahci.c | 55 +
include/scsi.h |2 +
2 files changed, 52 insertions(+), 5 deletions(-)
diff --git a/drivers/block/ahci.c b/drivers/block/ahci.c
index 5092352..c16e8ba 100644
--- a/drivers/block/ahci.c
+++ b/drivers/block/ahci.c
@@ -672,6 +672,7 @@ static int ata_scsiop_read_write(ccb *pccb, u8 is_write)
static int ata_scsiop_read_capacity10(ccb *pccb)
{
u32 cap;
+ u32 block_size;
if (!ataid[pccb-target]) {
printf(scsi_ahci: SCSI READ CAPACITY10 command failure.
@@ -680,12 +681,53 @@ static int ata_scsiop_read_capacity10(ccb *pccb)
return -EPERM;
}
- cap = be32_to_cpu(ataid[pccb-target]-lba_capacity);
+ cap = le32_to_cpu(ataid[pccb-target]-lba_capacity);
+ if (cap == 0xfff) {
+ unsigned short *cap48 = ataid[pccb-target]-lba48_capacity;
+ if (cap48[2] || cap48[3]) {
+ cap = 0x;
+ } else {
+ cap = (le16_to_cpu(cap48[1]) 16) |
+ (le16_to_cpu(cap48[0]));
+ }
+ }
+
+ cap = cpu_to_be32(cap);
memcpy(pccb-pdata, cap, sizeof(cap));
- pccb-pdata[4] = pccb-pdata[5] = 0;
- pccb-pdata[6] = 512 8;
- pccb-pdata[7] = 512 0xff;
+ block_size = cpu_to_be32((u32)512);
+ memcpy(pccb-pdata[4], block_size, 4);
+
+ return 0;
+}
+
+
+/*
+ * SCSI READ CAPACITY16 command operation.
+ */
+static int ata_scsiop_read_capacity16(ccb *pccb)
+{
+ u64 cap;
+ u64 block_size;
+
+ if (!ataid[pccb-target]) {
+ printf(scsi_ahci: SCSI READ CAPACITY16 command failure.
+ \tNo ATA info!\n
+ \tPlease run SCSI commmand INQUIRY firstly!\n);
+ return -EPERM;
+ }
+
+ cap = le32_to_cpu(ataid[pccb-target]-lba_capacity);
+ if (cap == 0xfff) {
+ memcpy(cap, ataid[pccb-target]-lba48_capacity, sizeof(cap));
+ cap = le64_to_cpu(cap);
+ }
+
+ cap = cpu_to_be64(cap);
+ memcpy(pccb-pdata, cap, sizeof(cap));
+
+ block_size = cpu_to_be64((u64)512);
+ memcpy(pccb-pdata[8], block_size, 8);
return 0;
}
@@ -711,9 +753,12 @@ int scsi_exec(ccb *pccb)
case SCSI_WRITE10:
ret = ata_scsiop_read_write(pccb, 1);
break;
- case SCSI_RD_CAPAC:
+ case SCSI_RD_CAPAC10:
ret = ata_scsiop_read_capacity10(pccb);
break;
+ case SCSI_RD_CAPAC16:
+ ret = ata_scsiop_read_capacity16(pccb);
+ break;
case SCSI_TST_U_RDY:
ret = ata_scsiop_test_unit_ready(pccb);
break;
diff --git a/include/scsi.h b/include/scsi.h
index 9681d19..9da764b 100644
--- a/include/scsi.h
+++ b/include/scsi.h
@@ -150,6 +150,8 @@ typedef struct SCSI_cmd_block{
#define SCSI_READ6 0x08/* Read 6-byte (MANDATORY) */
#define SCSI_READ100x28/* Read 10-byte (MANDATORY) */
#define SCSI_RD_CAPAC 0x25/* Read Capacity (MANDATORY) */
+#define SCSI_RD_CAPAC10SCSI_RD_CAPAC /* Read Capacity (10) */
+#define SCSI_RD_CAPAC160x9e/* Read Capacity (16) */
#define SCSI_RD_DEFECT 0x37/* Read Defect Data (O) */
#define SCSI_READ_LONG 0x3E/* Read Long (O) */
#define SCSI_REASS_BLK 0x07/* Reassign Blocks (O) */
--
1.7.7.3
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[U-Boot] [PATCH v3 22/22] x86: config: Enable AHCI support for coreboot
Enable AHCI driver for Intel SATA devices.
Signed-off-by: Simon Glass s...@chromium.org
---
include/configs/coreboot.h | 22 ++
1 files changed, 22 insertions(+), 0 deletions(-)
diff --git a/include/configs/coreboot.h b/include/configs/coreboot.h
index 3df085b..cc95e2b 100644
--- a/include/configs/coreboot.h
+++ b/include/configs/coreboot.h
@@ -45,6 +45,28 @@
#undef CONFIG_WATCHDOG
#undef CONFIG_HW_WATCHDOG
+/* SATA AHCI storage */
+
+#define CONFIG_SCSI_AHCI
+
+#ifdef CONFIG_SCSI_AHCI
+#define CONFIG_SYS_64BIT_LBA
+#define CONFIG_SATA_INTEL 1
+#define CONFIG_SCSI_DEV_LIST {PCI_VENDOR_ID_INTEL, \
+ PCI_DEVICE_ID_INTEL_NM10_AHCI}, \
+ {PCI_VENDOR_ID_INTEL, \
+ PCI_DEVICE_ID_INTEL_COUGARPOINT_AHCI_MOBILE}, \
+ {PCI_VENDOR_ID_INTEL, \
+ PCI_DEVICE_ID_INTEL_COUGARPOINT_AHCI_SERIES6}, \
+ {PCI_VENDOR_ID_INTEL, \
+ PCI_DEVICE_ID_INTEL_PANTHERPOINT_AHCI_MOBILE}
+
+#define CONFIG_SYS_SCSI_MAX_SCSI_ID2
+#define CONFIG_SYS_SCSI_MAX_LUN1
+#define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \
+CONFIG_SYS_SCSI_MAX_LUN)
+#endif
+
/*---
* Real Time Clock Configuration
*/
--
1.7.7.3
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[U-Boot] [PATCH v3 14/22] ahci: Support 64-bit LBA option when reading capacity
From: Gabe Black gabebl...@chromium.org
Capacity needs to allow for a 64-bit value.
Signed-off-by: Gabe Black gabebl...@google.com
Signed-off-by: Simon Glass s...@chromium.org
---
Changes in v3:
- Add patch to support 64-bit LBA option when reading capacity
common/cmd_scsi.c | 92 ++---
1 files changed, 66 insertions(+), 26 deletions(-)
diff --git a/common/cmd_scsi.c b/common/cmd_scsi.c
index 9bd8ec9..266bfa6 100644
--- a/common/cmd_scsi.c
+++ b/common/cmd_scsi.c
@@ -72,7 +72,6 @@ static block_dev_desc_t
scsi_dev_desc[CONFIG_SYS_SCSI_MAX_DEVICE];
* forward declerations of some Setup Routines
*/
void scsi_setup_test_unit_ready(ccb * pccb);
-void scsi_setup_read_capacity(ccb * pccb);
void scsi_setup_read6(ccb * pccb, unsigned long start, unsigned short blocks);
void scsi_setup_read_ext(ccb * pccb, unsigned long start, unsigned short
blocks);
static void scsi_setup_write_ext(ccb *pccb, unsigned long start,
@@ -81,6 +80,8 @@ void scsi_setup_inquiry(ccb * pccb);
void scsi_ident_cpy (unsigned char *dest, unsigned char *src, unsigned int
len);
+static int scsi_read_capacity(ccb *pccb, lbaint_t *capacity,
+ unsigned long *blksz);
static ulong scsi_read(int device, ulong blknr, lbaint_t blkcnt, void *buffer);
static ulong scsi_write(int device, ulong blknr,
lbaint_t blkcnt, const void *buffer);
@@ -93,7 +94,8 @@ static ulong scsi_write(int device, ulong blknr,
void scsi_scan(int mode)
{
unsigned char i,perq,modi,lun;
- unsigned long capacity,blksz;
+ lbaint_t capacity;
+ unsigned long blksz;
ccb* pccb=(ccb *)tempccb;
if(mode==1) {
@@ -158,16 +160,10 @@ void scsi_scan(int mode)
scsi_print_error(pccb);
continue;
}
- pccb-datalen=8;
- scsi_setup_read_capacity(pccb);
- if(scsi_exec(pccb)!=TRUE) {
+ if (scsi_read_capacity(pccb, capacity, blksz)) {
scsi_print_error(pccb);
continue;
}
- capacity=((unsigned long)tempbuff[0]24)|((unsigned
long)tempbuff[1]16)|
- ((unsigned
long)tempbuff[2]8)|((unsigned long)tempbuff[3]);
- blksz=((unsigned long)tempbuff[4]24)|((unsigned
long)tempbuff[5]16)|
- ((unsigned long)tempbuff[6]8)|((unsigned
long)tempbuff[7]);
scsi_dev_desc[scsi_max_devs].lba=capacity;
scsi_dev_desc[scsi_max_devs].blksz=blksz;
scsi_dev_desc[scsi_max_devs].type=perq;
@@ -514,6 +510,67 @@ void scsi_trim_trail (unsigned char *str, unsigned int len)
}
}
+int scsi_read_capacity(ccb *pccb, lbaint_t *capacity, unsigned long *blksz)
+{
+ *capacity = 0;
+
+ memset(pccb-cmd, 0, sizeof(pccb-cmd));
+ pccb-cmd[0] = SCSI_RD_CAPAC10;
+ pccb-cmd[1] = pccb-lun 5;
+ pccb-cmdlen = 10;
+ pccb-msgout[0] = SCSI_IDENTIFY; /* NOT USED */
+
+ pccb-datalen = 8;
+ if (scsi_exec(pccb) != TRUE)
+ return 1;
+
+ *capacity = ((lbaint_t)pccb-pdata[0] 24) |
+ ((lbaint_t)pccb-pdata[1] 16) |
+ ((lbaint_t)pccb-pdata[2] 8) |
+ ((lbaint_t)pccb-pdata[3]);
+
+ if (*capacity != 0x) {
+ /* Read capacity (10) was sufficient for this drive. */
+ *blksz = ((unsigned long)pccb-pdata[4] 24) |
+((unsigned long)pccb-pdata[5] 16) |
+((unsigned long)pccb-pdata[6] 8) |
+((unsigned long)pccb-pdata[7]);
+ return 0;
+ }
+
+ /* Read capacity (10) was insufficient. Use read capacity (16). */
+
+ memset(pccb-cmd, 0, sizeof(pccb-cmd));
+ pccb-cmd[0] = SCSI_RD_CAPAC16;
+ pccb-cmd[1] = 0x10;
+ pccb-cmdlen = 16;
+ pccb-msgout[0] = SCSI_IDENTIFY; /* NOT USED */
+
+ pccb-datalen = 16;
+ if (scsi_exec(pccb) != TRUE)
+ return 1;
+
+ *capacity = ((uint64_t)pccb-pdata[0] 56) |
+ ((uint64_t)pccb-pdata[1] 48) |
+ ((uint64_t)pccb-pdata[2] 40) |
+ ((uint64_t)pccb-pdata[3] 32) |
+ ((uint64_t)pccb-pdata[4] 24) |
+ ((uint64_t)pccb-pdata[5] 16) |
+ ((uint64_t)pccb-pdata[6] 8) |
+ ((uint64_t)pccb-pdata[7]);
+
+ *blksz = ((uint64_t)pccb-pdata[8] 56) |
+((uint64_t)pccb-pdata[9] 48) |
+((uint64_t)pccb-pdata[10] 40) |
+((uint64_t)pccb-pdata[11] 32) |
+((uint64_t)pccb-pdata[12] 24) |
+((uint64_t)pccb-pdata[13] 16) |
+
[U-Boot] [PATCH v3 02/22] scsi: Provide support for a list of AHCI controllers.
From: Vadim Bendebury vben...@chromium.org
Many AHCI controllers are identical, the main (and often the
only) difference being the PCI Vendor ID/Device ID combination
reported by the device.
This change allows the config file to define a list of PCI vendor
ID/device ID pairs. The driver would scan the list and initialize
the first device it finds.
No actual multiple device list is introduced yet, this change
just add the framework.
Signed-off-by: Vadim Bendebury vben...@chromium.org
Signed-off-by: Taylor Hutt th...@chromium.org
Signed-off-by: Simon Glass s...@chromium.org
---
Changes in v3:
- Remove use of DEFINE_PCI_DEVICE_TABLE suggested by siren checkpatch
- Use struct pci_device_id properly
Changes in v2:
- Use struct pci_device_id instead of defining new struct scsi_device
- Squash in CONFIG_PCI patch
common/cmd_scsi.c | 40 +++-
1 files changed, 35 insertions(+), 5 deletions(-)
diff --git a/common/cmd_scsi.c b/common/cmd_scsi.c
index 22d0119..50eb239 100644
--- a/common/cmd_scsi.c
+++ b/common/cmd_scsi.c
@@ -34,6 +34,9 @@
#include image.h
#include pci.h
+#ifdef CONFIG_SCSI_DEV_LIST
+#define SCSI_DEV_LIST CONFIG_SCSI_DEV_LIST
+#else
#ifdef CONFIG_SCSI_SYM53C8XX
#define SCSI_VEND_ID 0x1000
#ifndef CONFIG_SCSI_DEV_ID
@@ -49,8 +52,12 @@
#elif !defined(CONFIG_SCSI_AHCI_PLAT)
#error no scsi device defined
#endif
+#define SCSI_DEV_LIST {SCSI_VEND_ID, SCSI_DEV_ID}
+#endif
-
+#ifdef CONFIG_PCI
+const struct pci_device_id scsi_device_list[] = { SCSI_DEV_LIST };
+#endif
static ccb tempccb;/* temporary scsi command buffer */
static unsigned char tempbuff[512]; /* temporary data buffer */
@@ -178,15 +185,38 @@ removable:
void scsi_init(void)
{
int busdevfunc;
+ int i;
+ /*
+* Find a device from the list, this driver will support a single
+* controller.
+*/
+ for (i = 0; i ARRAY_SIZE(scsi_device_list); i++) {
+ /* get PCI Device ID */
+ busdevfunc = pci_find_device(scsi_device_list[i].vendor,
+scsi_device_list[i].device,
+0);
+ if (busdevfunc != -1)
+ break;
+ }
- busdevfunc=pci_find_device(SCSI_VEND_ID,SCSI_DEV_ID,0); /* get PCI
Device ID */
- if(busdevfunc==-1) {
- printf(Error SCSI Controller (%04X,%04X) not
found\n,SCSI_VEND_ID,SCSI_DEV_ID);
+ if (busdevfunc == -1) {
+ printf(Error: SCSI Controller(s) );
+ for (i = 0; i ARRAY_SIZE(scsi_device_list); i++) {
+ printf(%04X:%04X ,
+ scsi_device_list[i].vendor,
+ scsi_device_list[i].device);
+ }
+ printf(not found\n);
return;
}
#ifdef DEBUG
else {
- printf(SCSI Controller (%04X,%04X) found
(%d:%d:%d)\n,SCSI_VEND_ID,SCSI_DEV_ID,(busdevfunc16)0xFF,(busdevfunc11)0x1F,(busdevfunc8)0x7);
+ printf(SCSI Controller (%04X,%04X) found (%d:%d:%d)\n,
+ scsi_device_list[i].vendor,
+ scsi_device_list[i].device,
+ (busdevfunc 16) 0xFF,
+ (busdevfunc 11) 0x1F,
+ (busdevfunc 8) 0x7);
}
#endif
scsi_low_level_init(busdevfunc);
--
1.7.7.3
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Re: [U-Boot] ping failed; host 192.168.1.101 is not alive
hi No I dont have any firewall running. I have enabled to receive all packets [] i am using the uboot version 2011.03 with the following changes. But i think it will not affect the ping functionality. Any help. I will try putting more logs and pointing the issue. attached is the patch Ajoy akdas75 wrote: hi Anatolij I tried your suggestion I generate a macid from uboot/tools/gen_eth_addr. Still the ping says host not alive I have attached the uboot log and also the wireshark snapshot on the host host : 192.168.1.101 development board : 192.168.1.100 Ajoy http://old.nabble.com/file/p34610904/uboot_log_1.txt uboot_log_1.txt http://old.nabble.com/file/p34610904/snap_wireshark_host.JPG snap_wireshark_host.JPG akdas75 wrote: Hi http://old.nabble.com/file/p34608548/uboot-log.rtf uboot-log.rtf I am using beagle board C4 with zippy expansion board. I am able to do NFS at the kernel level. I want to o tftp at the u-boot level. my beagle board is connected to the host via cross ethernet cable. the phy chip is enc28j60. when i ping the host it says host not alive. i have attached the env variables please help http://old.nabble.com/file/p34615656/u-boot.patch u-boot.patch -- View this message in context: http://old.nabble.com/ping-failed--host-192.168.1.101-is-not-alive-tp34608548p34615656.html Sent from the Uboot - Users mailing list archive at Nabble.com. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 0/3] Bring in new I2C framework
On 10/29/2012 03:47 AM, Heiko Schocher wrote:
Hello Stephen,
On 26.10.2012 18:07, Stephen Warren wrote:
On 10/25/2012 11:48 PM, Heiko Schocher wrote:
Hello Simon,
On 25.10.2012 23:37, Simon Glass wrote:
On Mon, Oct 22, 2012 at 10:40 AM, Heiko Schocherh...@denx.de wrote:
rebased/reworked the I2C multibus patches from Simon Glass found
here:
http://www.mail-archive.com/u-boot@lists.denx.de/msg75530.html
It seems the timing is coming, to bring this in mainline and
move boards over to the new i2c framework. As an example I
converted the soft-i2c driver (and all boards using it) to
the new framework, so this patchseries has to be tested
intensively, as I can check compile only ...
I am very happy to see this, thank you.
I am too ;-) and Sorry that I am only now ready ...
I have brought this in and tried to get it running for Tegra. A few
points:
1. The methods in struct i2c_adapter should IMO be passed a struct
i2c_adapter *, so they can determine which adapter is being accessed.
Otherwise I can't see how they would know.
They can get the current used adapter through the defines in
include/i2c.h:
[...]
#define I2C_ADAP_NR(bus)i2c_adap[i2c_bus[bus].adapter]
#define I2C_BUS ((struct i2c_bus_hose *)gd-cur_i2c_bus)
#define I2C_ADAPi2c_adap[I2C_BUS-adapter]
#define I2C_ADAP_HWNR (I2C_ADAP-hwadapnr)
preparing just the fsl i2c driver and there I do for example:
drivers/i2c/fsl_i2c.c
[...]
static const struct fsl_i2c *i2c_dev[2] = {
(struct fsl_i2c *) (CONFIG_SYS_IMMR +
CONFIG_SYS_FSL_I2C_OFFSET),
#ifdef CONFIG_SYS_FSL_I2C2_OFFSET
(struct fsl_i2c *) (CONFIG_SYS_IMMR +
CONFIG_SYS_FSL_I2C2_OFFSET)
#endif
};
[...]
static int fsl_i2c_probe(uchar chip)
{
struct fsl_i2c *dev = (struct fsl_i2c *)i2c_dev[I2C_ADAP_HWNR];
[...]
but of course, we still can change the struct i2c_adapter if
needed ... but we have one more parameter ... Ok, not really a bad
problem.
That rather relies on their being a concept of a current I2C adapter.
It seems a little limiting to require that. What if the current
adapter is the user-selected adapter for commands to operate on, but
e.g. some power-management driver wants to use I2C to communicate with a
PMIC during the internals of some other command. Sure, you could save
and later restore the I2C core's idea of current adapter, but it'd
surely be cleaner to just pass around the I2C adapter ID or struct
pointer everywhere to avoid the need for save/restore.
Yes, you are right, but just the same problem with current code!
You mixed here two things!
I think you're reading more into what I was saying than what I actually
said.
If there are e.g. 4 I2C controllers in an SoC, the driver needs to know
which one is in use. Passing that information directly to the driver
functions is much simple than requiring the SoC I2C driver to go grovel
in some I2C core global variables to find out the same information.
This is all unrelated to I2C bus muxes; they shouldn't be implemented as
part of an SoC I2C driver anyway, so the driver shouldn't know about bus
muxes before or after this patch - the I2C core should manage that.
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Re: [U-Boot] [PATCH 0/3] Bring in new I2C framework
Hi Stephen,
On Mon, Oct 29, 2012 at 8:34 AM, Stephen Warren swar...@wwwdotorg.org wrote:
On 10/29/2012 03:47 AM, Heiko Schocher wrote:
Hello Stephen,
On 26.10.2012 18:07, Stephen Warren wrote:
On 10/25/2012 11:48 PM, Heiko Schocher wrote:
Hello Simon,
On 25.10.2012 23:37, Simon Glass wrote:
On Mon, Oct 22, 2012 at 10:40 AM, Heiko Schocherh...@denx.de wrote:
rebased/reworked the I2C multibus patches from Simon Glass found
here:
http://www.mail-archive.com/u-boot@lists.denx.de/msg75530.html
It seems the timing is coming, to bring this in mainline and
move boards over to the new i2c framework. As an example I
converted the soft-i2c driver (and all boards using it) to
the new framework, so this patchseries has to be tested
intensively, as I can check compile only ...
I am very happy to see this, thank you.
I am too ;-) and Sorry that I am only now ready ...
I have brought this in and tried to get it running for Tegra. A few
points:
1. The methods in struct i2c_adapter should IMO be passed a struct
i2c_adapter *, so they can determine which adapter is being accessed.
Otherwise I can't see how they would know.
They can get the current used adapter through the defines in
include/i2c.h:
[...]
#define I2C_ADAP_NR(bus)i2c_adap[i2c_bus[bus].adapter]
#define I2C_BUS ((struct i2c_bus_hose *)gd-cur_i2c_bus)
#define I2C_ADAPi2c_adap[I2C_BUS-adapter]
#define I2C_ADAP_HWNR (I2C_ADAP-hwadapnr)
preparing just the fsl i2c driver and there I do for example:
drivers/i2c/fsl_i2c.c
[...]
static const struct fsl_i2c *i2c_dev[2] = {
(struct fsl_i2c *) (CONFIG_SYS_IMMR +
CONFIG_SYS_FSL_I2C_OFFSET),
#ifdef CONFIG_SYS_FSL_I2C2_OFFSET
(struct fsl_i2c *) (CONFIG_SYS_IMMR +
CONFIG_SYS_FSL_I2C2_OFFSET)
#endif
};
[...]
static int fsl_i2c_probe(uchar chip)
{
struct fsl_i2c *dev = (struct fsl_i2c *)i2c_dev[I2C_ADAP_HWNR];
[...]
but of course, we still can change the struct i2c_adapter if
needed ... but we have one more parameter ... Ok, not really a bad
problem.
That rather relies on their being a concept of a current I2C adapter.
It seems a little limiting to require that. What if the current
adapter is the user-selected adapter for commands to operate on, but
e.g. some power-management driver wants to use I2C to communicate with a
PMIC during the internals of some other command. Sure, you could save
and later restore the I2C core's idea of current adapter, but it'd
surely be cleaner to just pass around the I2C adapter ID or struct
pointer everywhere to avoid the need for save/restore.
Yes, you are right, but just the same problem with current code!
You mixed here two things!
I think you're reading more into what I was saying than what I actually
said.
If there are e.g. 4 I2C controllers in an SoC, the driver needs to know
which one is in use. Passing that information directly to the driver
functions is much simple than requiring the SoC I2C driver to go grovel
in some I2C core global variables to find out the same information.
I think Heiko agreed with this, just that he wants to take things a
step at a time.
This is all unrelated to I2C bus muxes; they shouldn't be implemented as
part of an SoC I2C driver anyway, so the driver shouldn't know about bus
muxes before or after this patch - the I2C core should manage that.
Regards,
Simon
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Re: [U-Boot] UBIFS fails on SheevaPlug
Hello Dimax, On 10/29/2012 2:57 PM, Dimax wrote: I also want to look back at my original problem of non-recovered UBIFS. Want to make sure my effort will not be useless. Let's say I've increased the memory allocation size. But are you sure u-boot implementation of ubifs really can recover partitions just like original Linux driver does? Is it implemented at all? AFAIK, u-boot can't recover your partition. u-boot just mounts it read-only. ~Vikram ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] UBIFS fails on SheevaPlug
-Original Message- From: u-boot-boun...@lists.denx.de [mailto:u-boot- boun...@lists.denx.de] On Behalf Of Andreas Bießmann Sent: 29 October 2012 14:41 To: Dimax Cc: Marek Vasut; u-boot@lists.denx.de Subject: Re: [U-Boot] UBIFS fails on SheevaPlug Dear Dimax, please do not TOFU. On 29.10.2012 09:50, Dimax wrote: Hi, What if I compile a new u-boot but to try it I will load and flash new created image after original u-boot and will run it from withing original reboot manually just pointing a new image address? Can it work? well, you mean to run a u-boot out of a running u-boot? U-Boot is not designed to do so. But some devices may allow you to It will not work. just run a newer u-boot from a running one (at91;). You need to know that u-boot set up your SDRAM timings which destroys the content of the DRAM. So if your new u-boot is located there it can not be executed. I dunno if the kirkwood can do so, but I think they can not. You will need a) a JTAG b) another boot device, for example USB, MMC, whichever device the kirwood SoC can read from its ROM code (I do not know) to de-brick it. Please ask some kirkwood specialist or google, there are a lot of sheevaplug hackers out there, one of them may be able to help you here. You will need a JTAG key (amontec on any other) and OpenOCD s/w tool. Then you can build and test your code on Kirkwood w/o flashing on the device (i.e. running from RAM) You may look for developer guidelines on the google or plugcomputer forum. Regards... Prafulla . . . ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] common/spl: Mark arguments as unused
On 10/28/2012 12:04:06 PM, Vikram Narayanan wrote:
On 10/24/2012 10:41 PM, Scott Wood wrote:
On 10/23/2012 11:14:34 PM, Vikram Narayanan wrote:
On 10/24/2012 7:22 AM, Scott Wood wrote:
On 10/23/2012 12:15:11 PM, Vikram Narayanan wrote:
On 10/23/2012 9:15 PM, Tom Rini wrote:
On Tue, Oct 23, 2012 at 12:26:53PM +0200, Stefan Roese wrote:
On 10/23/2012 12:05 PM, Vikram Narayanan wrote:
As dummy{1,2} are not used anywhere, mark it with
__maybe_unused
Signed-off-by: Vikram Narayananvikram...@gmail.com
Cc: Stefan Roeses...@denx.de
---
common/spl/spl.c | 2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/common/spl/spl.c b/common/spl/spl.c
index 0d829c0..62fd3bd 100644
--- a/common/spl/spl.c
+++ b/common/spl/spl.c
@@ -145,7 +145,7 @@ static void spl_ram_load_image(void)
}
#endif
-void board_init_r(gd_t *dummy1, ulong dummy2)
+void board_init_r(__maybe_unused gd_t *dummy1, __maybe_unused
ulong dummy2)
{
u32 boot_device;
debug(spl:board_init_r()\n);
Perhaps even __always_unused instead of __maybe_unused as these
variables are never used?
Also, what does this give us? Fixing a sparse warning?
Not a sparse warning. I noticed this while looking at the code.
If there's no warning, why do we need to ugly up the code with
__maybe_unused?
I'd rather call this a proper way of coding, than calling it ugly.
But
perceptions differ.
If you want to push for a change to the official coding style, and
changing the warning options to go with it, go ahead (I'll argue
against
it of course), but until and unless you succeed at that, this isn't
the
way U-Boot code is written. I don't see a single instance of
__maybe_unused in an argument list, or a single instance of
__always_unused anywhere in U-Boot other than its definition.
Unnecessary clutter is harmful to readability.
It's not worth arguing over a single line of code that isn't going to
cause any significant change. That would save us both some time.
So you're withdrawing the patch?
I'm more concerned about the precedent it sets than the one specific
line.
-Scott
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Re: [U-Boot] Pull request:u-boot-coldfire/master
On Mon, Oct 29, 2012 at 02:22:52PM +, Jin Zhengxiong-R64188 wrote: Hi, Tom, The following changes since commit 5bb3505fa867ded03cbee83f7722ab5182930637: Merge branch 'master' of git://git.denx.de/u-boot-arm (2012-10-26 15:44:31 -0700) are available in the git repository at: git://git.denx.de/u-boot-coldfire.git master Jason Jin (2): ColdFire: Update the lds file for M54418TWR board. ColdFire: Remove save env in NAND support for M54418TWR board. board/freescale/m54418twr/u-boot.lds |8 +--- include/configs/M54418TWR.h |2 +- 2 files changed, 6 insertions(+), 4 deletions(-) Applied to u-boot/master, thanks! -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] Pull request: u-boot-mpc8xx/master
On Sun, Oct 28, 2012 at 08:33:06PM +0100, Wolfgang Denk wrote: Dear tom, the following changes since commit 5bb3505fa867ded03cbee83f7722ab5182930637: Merge branch 'master' of git://git.denx.de/u-boot-arm (2012-10-26 15:44:31 -0700) are available in the git repository at: git://git.denx.de/u-boot-mpc8xx.git master for you to fetch changes up to 28aa27b608bddf20a655e10c09412f93d2f83a5a: ESTEEM192E: adjust linker script to grown code size (2012-10-28 20:18:32 +0100) Wolfgang Denk (3): PPC: remove dead boards (AMX860, c2mon, ETX094, IAD210, LANTEC, SCM) TQM8xx: adjust linker script to grown code size ESTEEM192E: adjust linker script to grown code size MAINTAINERS | 6 - README | 4 +- arch/powerpc/cpu/mpc8xx/fec.c| 2 +- arch/powerpc/cpu/mpc8xx/scc.c| 16 +- board/c2mon/Makefile | 44 --- board/c2mon/c2mon.c | 236 board/c2mon/flash.c | 570 board/c2mon/pcmcia.c | 282 -- board/c2mon/u-boot.lds | 106 -- board/c2mon/u-boot.lds.debug | 137 --- board/esteem192e/u-boot.lds | 1 - board/etx094/Makefile| 44 --- board/etx094/etx094.c| 384 --- board/etx094/flash.c | 687 - board/etx094/u-boot.lds | 107 -- board/lantec/Makefile| 44 --- board/lantec/flash.c | 625 -- board/lantec/lantec.c| 208 -- board/lantec/u-boot.lds | 107 -- board/lantec/u-boot.lds.debug| 137 --- board/siemens/IAD210/IAD210.c| 299 --- board/siemens/IAD210/Makefile| 44 --- board/siemens/IAD210/atm.c | 652 board/siemens/IAD210/atm.h | 287 -- board/siemens/IAD210/flash.c | 502 - board/siemens/IAD210/u-boot.lds | 107 -- board/siemens/SCM/Makefile | 49 --- board/siemens/SCM/flash.c| 488 board/siemens/SCM/fpga_scm.c | 104 - board/siemens/SCM/scm.c | 541 -- board/siemens/SCM/scm.h | 89 - board/siemens/common/README | 27 -- board/siemens/common/fpga.c | 369 -- board/siemens/common/fpga.h | 53 --- board/tqc/tqm8xx/u-boot.lds | 4 +- board/westel/amx860/Makefile | 44 --- board/westel/amx860/amx860.c | 93 - board/westel/amx860/flash.c | 637 --- board/westel/amx860/u-boot.lds | 107 -- board/westel/amx860/u-boot.lds.debug | 138 --- boards.cfg | 7 - doc/README.scrapyard | 6 + include/commproc.h | 131 +-- include/configs/AMX860.h | 299 --- include/configs/ETX094.h | 357 -- include/configs/IAD210.h | 381 --- include/configs/LANTEC.h | 358 -- include/configs/SCM.h| 710 --- include/configs/c2mon.h | 417 include/pcmcia.h | 2 - include/status_led.h | 36 -- post/cpu/mpc8xx/ether.c | 45 +-- 52 files changed, 17 insertions(+), 3 deletions(-) delete mode 100644 board/c2mon/Makefile delete mode 100644 board/c2mon/c2mon.c delete mode 100644 board/c2mon/flash.c delete mode 100644 board/c2mon/pcmcia.c delete mode 100644 board/c2mon/u-boot.lds delete mode 100644 board/c2mon/u-boot.lds.debug delete mode 100644 board/etx094/Makefile delete mode 100644 board/etx094/etx094.c delete mode 100644 board/etx094/flash.c delete mode 100644 board/etx094/u-boot.lds delete mode 100644 board/lantec/Makefile delete mode 100644 board/lantec/flash.c delete mode 100644 board/lantec/lantec.c delete mode 100644 board/lantec/u-boot.lds delete mode 100644 board/lantec/u-boot.lds.debug delete mode 100644 board/siemens/IAD210/IAD210.c delete mode 100644 board/siemens/IAD210/Makefile delete mode 100644 board/siemens/IAD210/atm.c delete mode 100644 board/siemens/IAD210/atm.h delete mode 100644 board/siemens/IAD210/flash.c delete mode 100644 board/siemens/IAD210/u-boot.lds delete mode 100644 board/siemens/SCM/Makefile delete mode 100644 board/siemens/SCM/flash.c delete mode 100644 board/siemens/SCM/fpga_scm.c delete mode 100644 board/siemens/SCM/scm.c delete mode 100644 board/siemens/SCM/scm.h
Re: [U-Boot] UBIFS fails on SheevaPlug
I remember I have unbricked sheevaplug with USB key. But I'm still not sure if effort is not useless as I see no conclusion about u-boot ability to recover UBIFS partition (at least to try). Can anybody tell it for sure? On Mon, Oct 29, 2012 at 2:15 PM, Prafulla Wadaskar prafu...@marvell.comwrote: -Original Message- From: u-boot-boun...@lists.denx.de [mailto:u-boot- boun...@lists.denx.de] On Behalf Of Andreas Bießmann Sent: 29 October 2012 14:41 To: Dimax Cc: Marek Vasut; u-boot@lists.denx.de Subject: Re: [U-Boot] UBIFS fails on SheevaPlug Dear Dimax, please do not TOFU. On 29.10.2012 09:50, Dimax wrote: Hi, What if I compile a new u-boot but to try it I will load and flash new created image after original u-boot and will run it from withing original reboot manually just pointing a new image address? Can it work? well, you mean to run a u-boot out of a running u-boot? U-Boot is not designed to do so. But some devices may allow you to It will not work. just run a newer u-boot from a running one (at91;). You need to know that u-boot set up your SDRAM timings which destroys the content of the DRAM. So if your new u-boot is located there it can not be executed. I dunno if the kirkwood can do so, but I think they can not. You will need a) a JTAG b) another boot device, for example USB, MMC, whichever device the kirwood SoC can read from its ROM code (I do not know) to de-brick it. Please ask some kirkwood specialist or google, there are a lot of sheevaplug hackers out there, one of them may be able to help you here. You will need a JTAG key (amontec on any other) and OpenOCD s/w tool. Then you can build and test your code on Kirkwood w/o flashing on the device (i.e. running from RAM) You may look for developer guidelines on the google or plugcomputer forum. Regards... Prafulla . . . ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 0/4] apf27: add support of armadeus apf27 v2
Difference between v1 and v2: - use spl instead of nand_spl - use gpio api - remove use of useless CONFIG_SYS - remove use of config.mk - remove dead code Philippe Reynes (4): apf27: add missing constant to mx27 apf27: add support for the armadeus APF27 board apf27: add spl support for the apf27 apf27: add FPGA support for the apf27 board MAINTAINERS |5 + arch/arm/cpu/arm926ejs/mx27/asm-offsets.c | 34 ++ arch/arm/include/asm/arch-mx27/imx-regs.h | 11 +- arch/arm/include/asm/arch-mx27/mxc_nand.h | 83 + board/armadeus/apf27/Makefile | 51 +++ board/armadeus/apf27/apf27.c | 424 ++ board/armadeus/apf27/apf27.h | 477 + board/armadeus/apf27/fpga.c | 262 ++ board/armadeus/apf27/fpga.h | 39 ++ board/armadeus/apf27/start.S | 549 + board/armadeus/apf27/u-boot-spl.lds | 87 + boards.cfg|1 + include/configs/apf27.h | 458 13 files changed, 2480 insertions(+), 1 deletions(-) create mode 100644 arch/arm/include/asm/arch-mx27/mxc_nand.h create mode 100644 board/armadeus/apf27/Makefile create mode 100644 board/armadeus/apf27/apf27.c create mode 100644 board/armadeus/apf27/apf27.h create mode 100644 board/armadeus/apf27/fpga.c create mode 100644 board/armadeus/apf27/fpga.h create mode 100644 board/armadeus/apf27/start.S create mode 100644 board/armadeus/apf27/u-boot-spl.lds create mode 100644 include/configs/apf27.h -- 1.7.4.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 1/4] apf27: add missing constant to mx27
Signed-off-by: Philippe Reynes trem...@yahoo.fr
Signed-off-by: Eric Jarrige eric.jarr...@armadeus.org
create mode 100644 arch/arm/include/asm/arch-mx27/mxc_nand.h
diff --git a/arch/arm/cpu/arm926ejs/mx27/asm-offsets.c
b/arch/arm/cpu/arm926ejs/mx27/asm-offsets.c
index f3a8d7b..b95c58c 100644
--- a/arch/arm/cpu/arm926ejs/mx27/asm-offsets.c
+++ b/arch/arm/cpu/arm926ejs/mx27/asm-offsets.c
@@ -34,6 +34,7 @@ int main(void)
DEFINE(PCDR1, IMX_PLL_BASE + offsetof(struct pll_regs, pcdr1));
DEFINE(PCCR0, IMX_PLL_BASE + offsetof(struct pll_regs, pccr0));
DEFINE(PCCR1, IMX_PLL_BASE + offsetof(struct pll_regs, pccr1));
+ DEFINE(CCSR, IMX_PLL_BASE + offsetof(struct pll_regs, ccsr));
DEFINE(ESDCTL0_ROF, offsetof(struct esdramc_regs, esdctl0));
DEFINE(ESDCFG0_ROF, offsetof(struct esdramc_regs, esdcfg0));
@@ -41,5 +42,38 @@ int main(void)
DEFINE(ESDCFG1_ROF, offsetof(struct esdramc_regs, esdcfg1));
DEFINE(ESDMISC_ROF, offsetof(struct esdramc_regs, esdmisc));
+ DEFINE(GPCR, IMX_SYSTEM_CTL_BASE +
+ offsetof(struct system_control_regs, gpcr));
+ DEFINE(FMCR, IMX_SYSTEM_CTL_BASE +
+ offsetof(struct system_control_regs, fmcr));
+ DEFINE(DSCR2, IMX_SYSTEM_CTL_BASE +
+ offsetof(struct system_control_regs, dscr2));
+ DEFINE(DSCR3, IMX_SYSTEM_CTL_BASE +
+ offsetof(struct system_control_regs, dscr3));
+ DEFINE(DSCR7, IMX_SYSTEM_CTL_BASE +
+ offsetof(struct system_control_regs, dscr7));
+ DEFINE(DSCR10, IMX_SYSTEM_CTL_BASE +
+ offsetof(struct system_control_regs, dscr10));
+
+ DEFINE(CS0U, IMX_WEIM_BASE + offsetof(struct weim_regs, cs0u));
+ DEFINE(CS0L, IMX_WEIM_BASE + offsetof(struct weim_regs, cs0l));
+ DEFINE(CS0A, IMX_WEIM_BASE + offsetof(struct weim_regs, cs0a));
+ DEFINE(CS1U, IMX_WEIM_BASE + offsetof(struct weim_regs, cs1u));
+ DEFINE(CS1L, IMX_WEIM_BASE + offsetof(struct weim_regs, cs1l));
+ DEFINE(CS1A, IMX_WEIM_BASE + offsetof(struct weim_regs, cs1a));
+ DEFINE(CS2U, IMX_WEIM_BASE + offsetof(struct weim_regs, cs2u));
+ DEFINE(CS2L, IMX_WEIM_BASE + offsetof(struct weim_regs, cs2l));
+ DEFINE(CS2A, IMX_WEIM_BASE + offsetof(struct weim_regs, cs2a));
+ DEFINE(CS3U, IMX_WEIM_BASE + offsetof(struct weim_regs, cs3u));
+ DEFINE(CS3L, IMX_WEIM_BASE + offsetof(struct weim_regs, cs3l));
+ DEFINE(CS3A, IMX_WEIM_BASE + offsetof(struct weim_regs, cs3a));
+ DEFINE(CS4U, IMX_WEIM_BASE + offsetof(struct weim_regs, cs4u));
+ DEFINE(CS4L, IMX_WEIM_BASE + offsetof(struct weim_regs, cs4l));
+ DEFINE(CS4A, IMX_WEIM_BASE + offsetof(struct weim_regs, cs4a));
+ DEFINE(CS5U, IMX_WEIM_BASE + offsetof(struct weim_regs, cs5u));
+ DEFINE(CS5L, IMX_WEIM_BASE + offsetof(struct weim_regs, cs5l));
+ DEFINE(CS5A, IMX_WEIM_BASE + offsetof(struct weim_regs, cs5a));
+ DEFINE(EIM, IMX_WEIM_BASE + offsetof(struct weim_regs, eim));
+
return 0;
}
diff --git a/arch/arm/include/asm/arch-mx27/imx-regs.h
b/arch/arm/include/asm/arch-mx27/imx-regs.h
index 2f6c823..d3a14e1 100644
--- a/arch/arm/include/asm/arch-mx27/imx-regs.h
+++ b/arch/arm/include/asm/arch-mx27/imx-regs.h
@@ -185,7 +185,7 @@ struct iim_regs {
struct fuse_bank {
u32 fuse_regs[0x20];
u32 fuse_rsvd[0xe0];
- } bank[1];
+ } bank[2];
};
struct fuse_bank0_regs {
@@ -511,4 +511,13 @@ struct fuse_bank0_regs {
#define IIM_ERR_SNSE (1 2)
#define IIM_ERR_PARITYE(1 1)
+/*
+ * Memory areas of the NFC
+ */
+#define IMX_NFC_BASE(0xD800)
+#define IMX_NFC_MAIN_AREA0 (0xD800)
+#define IMX_NFC_MAIN_AREA1 (0xD8000200)
+#define IMX_NFC_SPARE_AREA0 (0xD8000800)
+#define IMX_NFC_REGS(0xD8000E00)
+
#endif /* _IMX_REGS_H */
diff --git a/arch/arm/include/asm/arch-mx27/mxc_nand.h
b/arch/arm/include/asm/arch-mx27/mxc_nand.h
new file mode 100644
index 000..3429601
--- /dev/null
+++ b/arch/arm/include/asm/arch-mx27/mxc_nand.h
@@ -0,0 +1,83 @@
+/*
+ * (c) 2012 Philippe Reynes trem...@yahoo.fr
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple
[U-Boot] [PATCH 2/4] apf27: add support for the armadeus APF27 board
Signed-off-by: Philippe Reynes trem...@yahoo.fr
Signed-off-by: Eric Jarrige eric.jarr...@armadeus.org
Signed-off-by: Nicolas Colombain nicolas.colomb...@armadeus.com
create mode 100644 board/armadeus/apf27/Makefile
create mode 100644 board/armadeus/apf27/apf27.c
create mode 100644 board/armadeus/apf27/apf27.h
create mode 100644 include/configs/apf27.h
diff --git a/MAINTAINERS b/MAINTAINERS
index 1b2da94..297467a 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1011,6 +1011,11 @@ Nobuhiro Iwamatsu nobuhiro.iwamatsu...@renesas.com
armadillo-800evaR8A7740 (RMOBILE SoC)
+Eric Jarrige eric.jarr...@armadeus.org
+Philippe Reynes trem...@yahoo.fr
+
+ apf27 ARM926EJS (imx27 SoC)
+
-
Unknown / orphaned boards:
diff --git a/board/armadeus/apf27/Makefile b/board/armadeus/apf27/Makefile
new file mode 100644
index 000..1da9548
--- /dev/null
+++ b/board/armadeus/apf27/Makefile
@@ -0,0 +1,45 @@
+#
+# (C) Copyright 2000-2004
+# Wolfgang Denk, DENX Software Engineering, w...@denx.de.
+# (C) Copyright 2012
+# Eric Jarrige eric.jarr...@armadeus.org
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB= $(obj)lib$(BOARD).o
+
+COBJS := apf27.o
+
+SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS := $(addprefix $(obj),$(COBJS))
+SOBJS := $(addprefix $(obj),$(SOBJS))
+
+$(LIB):$(obj).depend $(OBJS) $(SOBJS)
+ $(call cmd_link_o_target, $(OBJS) $(SOBJS))
+
+#
+
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#
diff --git a/board/armadeus/apf27/apf27.c b/board/armadeus/apf27/apf27.c
new file mode 100644
index 000..4f2b821
--- /dev/null
+++ b/board/armadeus/apf27/apf27.c
@@ -0,0 +1,408 @@
+/*
+ * Copyright (C) 2007 Sascha Hauer, Pengutronix
+ * Copyright (C) 2008-2012 Eric Jarrige eric.jarr...@armadeus.org
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ */
+
+#include common.h
+#include crc.h
+#include jffs2/jffs2.h
+#include nand.h
+#include netdev.h
+#include asm/io.h
+#include asm/arch/imx-regs.h
+#include asm/arch/gpio.h
+#include asm/errno.h
+#include environment.h
+#include apf27.h
+
+DECLARE_GLOBAL_DATA_PTR;
+
+/*
+ * Fuse bank 1 row 8 is reserved for future use and therefore available for
+ * custormer use. The APF27 board uses this fuse to store the board revision:
+ * 0: initial board revision
+ * 1: first revision - Presence of the second RAM chip on the board is blown in
+ * fuse bank 1 row 9 bit 0 - No hardware change
+ * N: to be defined
+ */
+u32 get_board_rev(void)
+{
+ struct iim_regs *iim = (struct iim_regs *)IMX_IIM_BASE;
+
+ return readl(iim-bank[1].fuse_regs[8]);
+}
+
+/*
+ * Fuse bank 1 row 9 is reserved for future use and therefore available for
+ * custormer use. The APF27 board revision 1 uses the bit 0 to permanently
store
+ * the presence of the second RAM chip
+ * 0: AFP27 with 1 RAM of 64 MiB
+ * 1: AFP27 with 2 RAM chips of 64 MiB each (128MB)
+ */
+int get_num_ram_bank(void)
+{
+ struct iim_regs *iim = (struct iim_regs *)IMX_IIM_BASE;
+ int nr_dram_banks = 1;
+
+ if ((get_board_rev() 0) (CONFIG_NR_DRAM_BANKS 1))
+ nr_dram_banks += readl(iim-bank[1].fuse_regs[9]) 0x01;
+ else
+ nr_dram_banks = CONFIG_NR_DRAM_POPULATED;
+
+ return nr_dram_banks;
+}
+
+static void apf27_gpio_init(void)
+{
+
[U-Boot] [PATCH 4/4] apf27: add FPGA support for the apf27 board
Signed-off-by: Philippe Reynes trem...@yahoo.fr
Signed-off-by: Eric Jarrige eric.jarr...@armadeus.org
create mode 100644 board/armadeus/apf27/fpga.c
create mode 100644 board/armadeus/apf27/fpga.h
diff --git a/board/armadeus/apf27/Makefile b/board/armadeus/apf27/Makefile
index f57f405..9d356a3 100644
--- a/board/armadeus/apf27/Makefile
+++ b/board/armadeus/apf27/Makefile
@@ -29,6 +29,9 @@ LIB = $(obj)lib$(BOARD).o
ifndef CONFIG_SPL_BUILD
COBJS := apf27.o
+ifdef CONFIG_FPGA
+COBJS += fpga.o
+endif
endif
SRCS := $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c)
diff --git a/board/armadeus/apf27/apf27.c b/board/armadeus/apf27/apf27.c
index 4f2b821..502bc8e 100644
--- a/board/armadeus/apf27/apf27.c
+++ b/board/armadeus/apf27/apf27.c
@@ -21,6 +21,7 @@
#include common.h
#include crc.h
+#include fpga.h
#include jffs2/jffs2.h
#include nand.h
#include netdev.h
@@ -371,6 +372,21 @@ misc_init_r(void)
struct mtd_device *dev;
struct part_info *part;
+#if defined(CONFIG_FPGA)
+ /* init and download fpga */
+ if ((autoload) (0 == strcmp(autoload, 1))) {
+ if (mtdparts_init() == 0)
+ if (find_dev_and_part(firmware,
+ dev, pnum, part) == 0) {
+ size = part-size;
+ if (nand_read_skip_bad(nand_info[0],
+ part-offset, size, firmware_buffer))
+ size = 0;
+ }
+ }
+ APF27_init_fpga(firmware_buffer, size);
+#endif
+
/* detect compatibility issue of environment version */
s = getenv(env_version);
if ((NULL == s) || (0 != strcmp(s, CONFIG_ENV_VERSION))) {
diff --git a/board/armadeus/apf27/fpga.c b/board/armadeus/apf27/fpga.c
new file mode 100644
index 000..d5c27a7
--- /dev/null
+++ b/board/armadeus/apf27/fpga.c
@@ -0,0 +1,262 @@
+/*
+ * (C) Copyright 2002-2012
+ * Eric Jarrige eric.jarr...@armadeus.org
+ * Rich Ireland, Enterasys Networks, rirel...@enterasys.com.
+ * Keith Outwater, keith_outwa...@mvis.com.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ */
+#include common.h
+
+#include asm/arch/imx-regs.h
+#include asm/gpio.h
+#include asm/io.h
+#include command.h
+#include config.h
+#include fpga.h
+#include spartan3.h
+#include apf27.h
+
+/*
+ * Note that these are pointers to code that is in Flash. They will be
+ * relocated at runtime.
+ * Spartan2 code is used to download our Spartan 3 :) code is compatible.
+ * Just take care about the file size
+ */
+Xilinx_Spartan3_Slave_Parallel_fns fpga_fns = {
+ fpga_pre_fn,
+ fpga_pgm_fn,
+ fpga_init_fn,
+ NULL,
+ fpga_done_fn,
+ fpga_clk_fn,
+ fpga_cs_fn,
+ fpga_wr_fn,
+ fpga_rdata_fn,
+ fpga_wdata_fn,
+ fpga_busy_fn,
+ fpga_abort_fn,
+ fpga_post_fn,
+};
+
+Xilinx_desc fpga[CONFIG_FPGA_COUNT] = {
+ {Xilinx_Spartan3,
+slave_parallel,
+1196128l/8,
+(void *) fpga_fns,
+0}
+};
+
+/*
+ * Initialize GPIO port B before download
+ */
+int
+fpga_pre_fn(int cookie)
+{
+ /* Initialize GPIO pins */
+ gpio_set_value(ACFG_FPGA_PWR, 1);
+ imx_gpio_mode(ACFG_FPGA_INIT | GPIO_IN | GPIO_PUEN | GPIO_GPIO);
+ imx_gpio_mode(ACFG_FPGA_DONE | GPIO_IN | GPIO_PUEN | GPIO_GPIO);
+ imx_gpio_mode(ACFG_FPGA_PRG | GPIO_OUT | GPIO_PUEN | GPIO_GPIO);
+ imx_gpio_mode(ACFG_FPGA_CLK | GPIO_OUT | GPIO_PUEN | GPIO_GPIO);
+ imx_gpio_mode(ACFG_FPGA_RW | GPIO_OUT | GPIO_PUEN | GPIO_GPIO);
+ imx_gpio_mode(ACFG_FPGA_CS | GPIO_OUT | GPIO_PUEN | GPIO_GPIO);
+ imx_gpio_mode(ACFG_FPGA_SUSPEND|GPIO_OUT|GPIO_PUEN|GPIO_GPIO);
+ gpio_set_value(ACFG_FPGA_RESET, 1);
+ imx_gpio_mode(ACFG_FPGA_RESET | GPIO_OUT | GPIO_PUEN | GPIO_GPIO);
+ imx_gpio_mode(ACFG_FPGA_PWR | GPIO_OUT | GPIO_PUEN | GPIO_GPIO);
+ gpio_set_value(ACFG_FPGA_PRG, 1);
+ gpio_set_value(ACFG_FPGA_CLK, 1);
+ gpio_set_value(ACFG_FPGA_RW, 1);
+ gpio_set_value(ACFG_FPGA_CS, 1);
+ gpio_set_value(ACFG_FPGA_SUSPEND, 0);
+ gpio_set_value(ACFG_FPGA_PWR, 0);
+
+ return
[U-Boot] [PATCH 3/4] apf27: add spl support for the apf27
Signed-off-by: Philippe Reynes trem...@yahoo.fr
Signed-off-by: Eric Jarrige eric.jarr...@armadeus.org
create mode 100644 board/armadeus/apf27/start.S
create mode 100644 board/armadeus/apf27/u-boot-spl.lds
diff --git a/board/armadeus/apf27/Makefile b/board/armadeus/apf27/Makefile
index 1da9548..f57f405 100644
--- a/board/armadeus/apf27/Makefile
+++ b/board/armadeus/apf27/Makefile
@@ -27,11 +27,14 @@ include $(TOPDIR)/config.mk
LIB= $(obj)lib$(BOARD).o
+ifndef CONFIG_SPL_BUILD
COBJS := apf27.o
+endif
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
+SRCS := $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS))
SOBJS := $(addprefix $(obj),$(SOBJS))
+START := $(addprefix $(obj),$(START))
$(LIB):$(obj).depend $(OBJS) $(SOBJS)
$(call cmd_link_o_target, $(OBJS) $(SOBJS))
diff --git a/board/armadeus/apf27/start.S b/board/armadeus/apf27/start.S
new file mode 100644
index 000..374b4ea
--- /dev/null
+++ b/board/armadeus/apf27/start.S
@@ -0,0 +1,549 @@
+/*
+ * IMX27 NAND Flash SPL (Secondary Program Loader)
+ *
+ * Copyright (c) 2008 Armadeus Project / eja
+ *
+ * Based on Freescale NAND SPL
+ *
+ * Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
+ * Copyright (c) 2008-2012 Eric Jarrige eric.jarr...@armadeus.org
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+
+#include config.h
+#include version.h
+#include asm/macro.h
+#include asm/arch/mxc_nand.h
+#include asm/arch/imx-regs.h
+#include generated/asm-offsets.h
+#include apf27.h
+
+/*
+ * Standard NAND flash commands
+ */
+#define NAND_CMD_READ0 0
+#define NAND_CMD_READ1 1
+#define NAND_CMD_PAGEPROG 0x10
+#define NAND_CMD_READOOB 0x50
+#define NAND_CMD_ERASE10x60
+#define NAND_CMD_STATUS0x70
+#define NAND_CMD_STATUS_MULTI 0x71
+#define NAND_CMD_SEQIN 0x80
+#define NAND_CMD_READID0x90
+#define NAND_CMD_ERASE20xd0
+#define NAND_CMD_RESET 0xff
+
+/* Extended commands for large page devices */
+#define NAND_CMD_READSTART 0x30
+#define NAND_CMD_CACHEDPROG0x15
+
+/* Status bits */
+#define NAND_STATUS_FAIL 0x01
+#define NAND_STATUS_FAIL_N10x02
+#define NAND_STATUS_TRUE_READY 0x20
+#define NAND_STATUS_READY 0x40
+#define NAND_STATUS_WP 0x80
+
+ .macro nand_boot
+
+#ifdef CONFIG_BOOT_TRACE_REG
+/*
+ * If CONFIG_BOOT_TRACE_REG is a SDRAM address then be sure to use the
following
+ * 2 command after SDRAM init
+ */
+
+/* Backup state of previous boot to CONFIG_BOOT_TRACE_REG+4*/
+#define BACKUP_TRACE() \
+ ldr r4, =CONFIG_BOOT_TRACE_REG; \
+ ldr r3, [r4]; \
+ str r3, [r4, #0x04];
+
+/* Save a state of boot at CONFIG_BOOT_TRACE_REG */
+#define BOOT_TRACE(val)\
+ ldr r4, =CONFIG_BOOT_TRACE_REG; \
+ ldr r3, =val; \
+ str r3, [r4];
+#else
+#define BACKUP_TRACE()
+#define BOOT_TRACE(val)
+#endif
+
+nand_boot_setup:
+
+ /* Copy SPL image from flash to SDRAM first */
+ BOOT_TRACE(1)
+ ldr r0, =IMX_NFC_MAIN_AREA0
+ add r2, r0, #(IMX_NFC_SPARE_AREA0-IMX_NFC_MAIN_AREA0) //2KB NFC Buff
+ ldr r1, =CONFIG_SYS_NAND_U_BOOT_DST
+
+ BOOT_TRACE(2)
+1: ldmia r0!, {r3-r10}
+ stmia r1!, {r3-r10}
+ cmp r0, r2
+ blo 1b
+
+
+
+ /* Jump to SDRAM */
+ BOOT_TRACE(3)
+ ldr r1, =0x7FF
+ and r0, pc, r1 /* offset of pc */
+ ldr r1, =CONFIG_SYS_NAND_U_BOOT_DST
+ add r1, r1, #0x10
+ add pc, r0, r1
+ nop
+ nop
+ nop
+ nop
+
+NAND_Copy_Main:
+ BOOT_TRACE(4)
+ /* r0: nfc base. Reloaded after each page copying */
+ ldr r0, =IMX_NFC_MAIN_AREA0
+
+ /* r1: starting flash addr to be copied. Updated constantly */
+ /* bypass the first preloaded pages */
+ ldr r1, =(IMX_NFC_SPARE_AREA0-IMX_NFC_MAIN_AREA0)
+
+ /* r2: end of 1st RAM buf. Doesn't change */
+ ldr r2, =IMX_NFC_MAIN_AREA1
+
+ /* r12: NFC register base. Doesn't change */
+ ldr r12, =IMX_NFC_REGS
+
+
Re: [U-Boot] [PATCH v4 2/5] arm bootm: Do not append zero ATAG_MEM
On Sat, Oct 27, 2012 at 05:29:32PM +0200, Marek Vasut wrote: Dear Tom Rini, On Fri, Oct 19, 2012 at 02:00:05PM +0200, Pali Roh??r wrote: If dram bank size is calculated at runtime, it can be zero on some boards. This patch added code which ignore these zero bank size in ATAG_MEM. Signed-off-by: Pali Roh??r pali.ro...@gmail.com My reading of the kernel's arm_add_memory says that empty ATAG_MEM tags are handled correctly (which is to say, parsed and found as -EINVAL). So if we _have_to_ we can add this change. I don't think we _have_to_ ... Indeed. After talking with Pali on irc some more and checking things again, we can simply drop this patch. Other platforms pass 0 size ATAG_MEM to the kernel and have for ages, so it's handled. -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v4 5/5] New board support: Nokia RX-51 aka N900
On Tuesday 23 October 2012 09:20:39 Igor Grinberg wrote:
+/*
+ * Routine: board_init
+ * Description: Early hardware init.
+ */
+int board_init(void)
+{
+ gpmc_init(); /* in SRAM or SDRAM, finish GPMC */
+ /* board id for Linux */
+ gd-bd-bi_arch_number = MACH_TYPE_NOKIA_RX51;
This should be specified in the board config file
(see CONFIG_MACH_TYPE in README), unless, you have multiple
board types supported in the same board file/binary
(which does not look like the case here) and it is runtime
detectable.
I sent new version of this patch.
--
Pali Rohár
pali.ro...@gmail.com
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Re: [U-Boot] Current u-boot memory mapping
On Sat, Oct 27, 2012 at 08:17:00PM +0900, RgC wrote: [snip] My understanding is that after relocation no area between the bottom and the top of RAM is reserved. We can use it freely. Is this correct? Basically, yes. You can use 'bdinfo' to see what / where things are being used at run-time. If writing to the the free area in RAM results in crashing u-boot then there is problem in the relocation procedure or a possible linker script problem. Well, it depends on how you trigger that crash. If you're writing near where U-Boot is running you can overwrite yourself pretty easily. If you aren't, then are you sure you've configured your memory controller correctly? -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 0/2] Standardize on run-time board ID variables
On Mon, Oct 29, 2012 at 09:15:41AM -0600, Stephen Warren wrote:
On 10/26/2012 01:45 AM, Joe Hershberger wrote:
Hi Tom,
On Wed, Oct 24, 2012 at 2:32 PM, Tom Rini tr...@ti.com wrote:
On Wed, Oct 24, 2012 at 01:05:16PM -0600, Stephen Warren wrote:
On 10/24/2012 12:41 PM, Tom Rini wrote:
On Wed, Oct 24, 2012 at 11:50:38AM -0600, Stephen Warren wrote:
On 10/24/2012 11:28 AM, Tom Rini wrote:
Hey all,
I've been thinking about one of the problems we need to solve
over in TI AM335x land and that is given that we support a
number of different boards with a single binary (and we have an
i2c eeprom that tells us what board and revision we are on),
the user needs to be able to easily determine what board we are
on so they know what dtb file to load so they can boot. To
this end I've added CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG to the
README which says when set we have board_name and board_rev set
at run-time. Then for am335x[1]
With CONFIG_ENV_VARS_UBOOT_CONFIG set, there's a environment
variable named $board that indicates which board U-Boot is
running on (and other related variables). The idea is that the
user can:
fsload ${devtype} ${devnum}:${rootpart} ${fdt_addr_r} \
/boot/${soc}-${board}.dtb
Now, CONFIG_ENV_VARS_UBOOT_CONFIG sets $board at compile-time,
since the config variable was created in the context on a U-Boot
that runs on a single board. However, I see no reason why we
can't maintain the user-visible results of this config option
even in other cases, so that everything is consistent to the
user
This works assuming that board maps to the device tree name. A bit
more below...
True. I've made sure of that for Tegra.
To that end, can we make CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG set
$board instead of $board_name?
I had talked with Joe about this on IRC briefly and he seemed to
be against overwriting board
Why is that? Perhaps alternatively, CONFIG_ENV_VARS_UBOOT_CONFIG
should set both board and a default value for board_name.
Joe?
It think in the use-case that you are talking about (multiple boards,
one binary) the board from the build of the binary could still be
useful to know in addition to the run-time-determined board name and
rev. I think it would also be useful to have the target available
in the env for the same reason. Tom and I also discussed this on IRC.
OK, so in that case I guess CONFIG_ENV_VARS_UBOOT_CONFIG should set both
board and board_name, so that both variables always exist for use by
scripts, so scripts don't have to contain endless conditionals. For the
multiple-boards-one-binary case, board_name can always be overridden at
run-time. If everyone agrees, I can send a patch to add that variable to
CONFIG_ENV_VARS_UBOOT_CONFIG.
Works for me.
--
Tom
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Re: [U-Boot] [PATCH v3 21/22] ide: Correct function signatures for ide_read/write()
On Mon, Oct 29, 2012 at 08:24:04AM -0700, Simon Glass wrote: The prototypes in the header were changed by commit 4ac8f8e0 but the functions no longer match. Correct this. Oops, not sure how I missed that. It seems odd that block devices take an lbaint_t for the block count, but an unsigned long for the blknr. Surely we should promote blknr to lbaint_t also? It's a bit odd, I agree but doc/driver-model/UDM-block.txt promises to correct this so I went first for consistency in all users. Reviewed-by: Tom Rini tr...@ti.com -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v3 21/22] ide: Correct function signatures for ide_read/write()
Hi, On Mon, Oct 29, 2012 at 11:22 AM, Tom Rini tr...@ti.com wrote: On Mon, Oct 29, 2012 at 08:24:04AM -0700, Simon Glass wrote: The prototypes in the header were changed by commit 4ac8f8e0 but the functions no longer match. Correct this. Oops, not sure how I missed that. It seems odd that block devices take an lbaint_t for the block count, but an unsigned long for the blknr. Surely we should promote blknr to lbaint_t also? It's a bit odd, I agree but doc/driver-model/UDM-block.txt promises to correct this so I went first for consistency in all users. Yes, it isn't any worse than it was. Reviewed-by: Tom Rini tr...@ti.com Thanks, Simon -- Tom ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] UBIFS fails on SheevaPlug
On 10/29/2012 10:55 PM, Dimax wrote: I remember I have unbricked sheevaplug with USB key. But I'm still not sure if effort is not useless as I see no conclusion about u-boot ability to recover UBIFS partition (at least to try). Can anybody tell it for sure? This is what I've got from the code [1]. Code flow - common/cmd_ubifs.c: do_ubifs_mount calls ubifs_mount fs/ubifs/super.c, In ubifs_mount() (line 1167) flags = MS_RDONLY; (line 1188) calls ubifs_get_sb (with flags as a param) ubifs_get_sb (line 1018) The flags get updated here. sb-s_flags = flags; (line 1057) Calls ubifs_fill_super sb gets assigned, so are the flags. c-vfs_sb = sb; (line 962) Calls mount_ubifs mount_ubifs(c); (line 983) In mount_ubifs() (line 582) struct super_block *sb = c-vfs_sb; int err, mounted_read_only = (sb-s_flags MS_RDONLY); sb taken from the assigned ptr @ line 962. Flags extracted from the assigned flags @ 1188. Just see where the variable 'mounter_read_only' gets referred and you'll get the answer. U-boot will _not_ recover your UBIFS partition like the Linux kernel. CMIIW. [1] http://git.denx.de/?p=u-boot.git;a=tree;h=5bb3505fa867ded03cbee83f7722ab5182930637;hb=5bb3505fa867ded03cbee83f7722ab5182930637 Hope this helps, Vikram ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] common/spl: Mark arguments as unused
On 10/29/2012 10:04 PM, Scott Wood wrote: It's not worth arguing over a single line of code that isn't going to cause any significant change. That would save us both some time. So you're withdrawing the patch? Yes. I'm more concerned about the precedent it sets than the one specific line. Agree with your concern. ~Vikram ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] UBIFS fails on SheevaPlug
U-boot will _not_ recover your UBIFS partition like the Linux kernel. CMIIW. In other words it is not possible to use UBIFS on embedded Linux boards with u-boot unless you can provide unterminated power supply. I'm going to another solution - Split flash in two UBIFS partitions. Make the first one read only and put kernel and all critical data where. And have logs and user data on second RW partition. This way kernel should always start and if required recover second RW partition. Do you have any suggestions on how to do it or where to start? More likely I have to look at mtd utilities? On Mon, Oct 29, 2012 at 8:53 PM, Vikram Narayanan vikram...@gmail.comwrote: On 10/29/2012 10:55 PM, Dimax wrote: I remember I have unbricked sheevaplug with USB key. But I'm still not sure if effort is not useless as I see no conclusion about u-boot ability to recover UBIFS partition (at least to try). Can anybody tell it for sure? This is what I've got from the code [1]. Code flow - common/cmd_ubifs.c: do_ubifs_mount calls ubifs_mount fs/ubifs/super.c, In ubifs_mount() (line 1167) flags = MS_RDONLY; (line 1188) calls ubifs_get_sb (with flags as a param) ubifs_get_sb (line 1018) The flags get updated here. sb-s_flags = flags; (line 1057) Calls ubifs_fill_super sb gets assigned, so are the flags. c-vfs_sb = sb; (line 962) Calls mount_ubifs mount_ubifs(c); (line 983) In mount_ubifs() (line 582) struct super_block *sb = c-vfs_sb; int err, mounted_read_only = (sb-s_flags MS_RDONLY); sb taken from the assigned ptr @ line 962. Flags extracted from the assigned flags @ 1188. Just see where the variable 'mounter_read_only' gets referred and you'll get the answer. U-boot will _not_ recover your UBIFS partition like the Linux kernel. CMIIW. [1] http://git.denx.de/?p=u-boot.git;a=tree;h=5bb3505fa867ded03cbee83f7722ab5182930637;hb=5bb3505fa867ded03cbee83f7722ab5182930637 Hope this helps, Vikram ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] arm720t: add back common.h include
Add back common.h header that was removed in previous patch so that
CONFIG_TEGRA can be evaluated correctly.
Signed-off-by: Allen Martin amar...@nvidia.com
---
arch/arm/cpu/arm720t/interrupts.c |2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/cpu/arm720t/interrupts.c
b/arch/arm/cpu/arm720t/interrupts.c
index 8e763b7..623a24b 100644
--- a/arch/arm/cpu/arm720t/interrupts.c
+++ b/arch/arm/cpu/arm720t/interrupts.c
@@ -26,6 +26,8 @@
* MA 02111-1307 USA
*/
+#include common.h
+
#ifdef CONFIG_USE_IRQ
void do_irq (struct pt_regs *pt_regs)
{
--
1.7.10.4
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Re: [U-Boot] [PATCH v5 1/7] powerpc: Extract EPAPR_MAGIC constants into processor.h
On Tue, Oct 23, 2012 at 10:28:29AM +0200, Stefan Roese wrote: By extracting these defines into a header, they can be re-used by other C sources as well. This will be done by the SPL framework OS boot support. Signed-off-by: Stefan Roese s...@denx.de release.S:354:0: warning: EPAPR_MAGIC redefined [enabled by default] .../P2020RDB-PC_36BIT/include2/asm/processor.h:1346:0: note: this is the location of the previous definition Please fix, thanks! -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] arm720t: add back common.h include
-Original Message-
From: Allen Martin [mailto:amar...@nvidia.com]
Sent: Monday, October 29, 2012 1:48 PM
To: Tom Warren; swar...@wwwdotorg.org; ma...@denx.de
Cc: u-boot@lists.denx.de; Allen Martin
Subject: [PATCH] arm720t: add back common.h include
Add back common.h header that was removed in previous patch so that
CONFIG_TEGRA can be evaluated correctly.
This fixes a build break w/Tegra20 caused by Marek's arm720t 'cleanup'.
Acked-by: Tom Warren twar...@nvidia.com
I'll take this into u-boot-tegra since we need it to build OK. I'll be posting
a pull request in the next couple of days for ARM/master if you want to wait
for this until then, Albert.
When that set of patches propagates up to u-boot/master, it should fix all the
serial/SPL problems with the Tegra20 builds there.
Tom
Signed-off-by: Allen Martin amar...@nvidia.com
---
arch/arm/cpu/arm720t/interrupts.c |2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/cpu/arm720t/interrupts.c
b/arch/arm/cpu/arm720t/interrupts.c
index 8e763b7..623a24b 100644
--- a/arch/arm/cpu/arm720t/interrupts.c
+++ b/arch/arm/cpu/arm720t/interrupts.c
@@ -26,6 +26,8 @@
* MA 02111-1307 USA
*/
+#include common.h
+
#ifdef CONFIG_USE_IRQ
void do_irq (struct pt_regs *pt_regs)
{
--
1.7.10.4
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Re: [U-Boot] [PATCH] arm720t: add back common.h include
Thanks, Allen. Nice work. Applied to /next and testing now. I'll push a new
copy to denx.de if it builds/boots OK.
-Original Message-
From: Allen Martin [mailto:amar...@nvidia.com]
Sent: Monday, October 29, 2012 1:48 PM
To: Tom Warren; swar...@wwwdotorg.org; ma...@denx.de
Cc: u-boot@lists.denx.de; Allen Martin
Subject: [PATCH] arm720t: add back common.h include
Add back common.h header that was removed in previous patch so that
CONFIG_TEGRA can be evaluated correctly.
Signed-off-by: Allen Martin amar...@nvidia.com
---
arch/arm/cpu/arm720t/interrupts.c |2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/cpu/arm720t/interrupts.c
b/arch/arm/cpu/arm720t/interrupts.c
index 8e763b7..623a24b 100644
--- a/arch/arm/cpu/arm720t/interrupts.c
+++ b/arch/arm/cpu/arm720t/interrupts.c
@@ -26,6 +26,8 @@
* MA 02111-1307 USA
*/
+#include common.h
+
#ifdef CONFIG_USE_IRQ
void do_irq (struct pt_regs *pt_regs)
{
--
1.7.10.4
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Re: [U-Boot] [PATCH V4 1/3] fs: delete unused Makefile
On Mon, Oct 22, 2012 at 10:43:49AM -0600, Stephen Warren wrote: From: Stephen Warren swar...@nvidia.com fs/Makefile is unused. The top-level Makefile sets LIBS-y += fs/xxx and hence causes make to directly descend two directory levels into each individual filesystem, and it never descends into fs/ itself. So, delete this useless file. Signed-off-by: Stephen Warren swar...@nvidia.com Reviewed-by: Beno??t Th??baudeau benoit.thebaud...@advansee.com Acked-by: Simon Glass s...@chromium.org This, and the series, now applied to u-boot/master, thanks! -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] FPGA: Cyclon II: Correctly reset the FPGA before configuration
On Tue, Oct 23, 2012 at 11:11:41AM +0200, Stefan Roese wrote: From: Stephan Gatzka stephan.gat...@hbm.com Deassert the CONFIG pin before asserting it again. This assures that the FPGA will be resetted and therefore configuration will be correctly enabled. This is also already done on other FPGA's, e.g. Stratix. Signed-off-by: Stephan Gatzka stephan.gat...@hbm.com Signed-off-by: Stefan Roese s...@denx.de Applied to u-boot/master, thanks! -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] ext4: Fix printf() format string error
On Tue, Oct 23, 2012 at 04:49:25PM -0700, Simon Glass wrote: Fix the following error in the ext4 command: cmd_ext4.c:110:3: error: format '%lu' expects argument of type 'long unsigned int', but argument 4 has type 'int' [-Werror=format] Signed-off-by: Simon Glass s...@chromium.org Applied to u-boot/master, thanks! -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] UBIFS fails on SheevaPlug
Dear Vikram Narayanan, first of all you are right. u-boot ubifs implementation will never recover the ubifs on media, cause it is mounted read only. On 29.10.2012 19:53, Vikram Narayanan wrote: On 10/29/2012 10:55 PM, Dimax wrote: I remember I have unbricked sheevaplug with USB key. But I'm still not sure if effort is not useless as I see no conclusion about u-boot ability to recover UBIFS partition (at least to try). Can anybody tell it for sure? This is what I've got from the code [1]. Code flow - common/cmd_ubifs.c: do_ubifs_mount calls ubifs_mount fs/ubifs/super.c, In ubifs_mount() (line 1167) flags = MS_RDONLY; (line 1188) calls ubifs_get_sb (with flags as a param) ubifs_get_sb (line 1018) The flags get updated here. sb-s_flags = flags; (line 1057) calls sget() (line 1043) which in turn calls kzalloc() (line 67) which may return -ENOMEM But u-boot will manage to get the data out of the unordered ubifs (if no error like this ENOMEM occur). That is the same process as in kernel if it is mounted read-only (recovery deferred). So if the kernel can manage to mount the unordered ubifs u-boot should do so. If it can't (but the kernel can) there is an error that should be fixed. Best regards Andreas Bießmann ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2 24/25] drivers/mtd/nand: sparse fixes
nand_ecc.c:82:5: warning: symbol 'nand_calculate_ecc' was not declared. Should
it be static?
nand_ecc.c:155:5: warning: symbol 'nand_correct_data' was not declared. Should
it be static?
nand_base.c:2854:1: error: directive in argument list
nand_base.c:2856:1: error: directive in argument list
Signed-off-by: Kim Phillips kim.phill...@freescale.com
---
v2: re-worked based upon input from Scott, checkpatch fixes.
drivers/mtd/nand/nand_base.c | 13 +++--
drivers/mtd/nand/nand_ecc.c | 1 +
2 files changed, 8 insertions(+), 6 deletions(-)
diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c
index 71f5027..d3b71a5 100644
--- a/drivers/mtd/nand/nand_base.c
+++ b/drivers/mtd/nand/nand_base.c
@@ -2601,6 +2601,7 @@ static const struct nand_flash_dev
*nand_get_flash_type(struct mtd_info *mtd,
int *maf_id, int *dev_id,
const struct nand_flash_dev
*type)
{
+ const char *name;
int i, maf_idx;
u8 id_data[8];
int ret;
@@ -2848,14 +2849,14 @@ ident_done:
chip-cmdfunc = nand_command_lp;
/* TODO onfi flash name */
- MTDDEBUG (MTD_DEBUG_LEVEL0, NAND device: Manufacturer ID:
-0x%02x, Chip ID: 0x%02x (%s %s)\n, *maf_id, *dev_id,
- nand_manuf_ids[maf_idx].name,
+ name = type-name;
#ifdef CONFIG_SYS_NAND_ONFI_DETECTION
- chip-onfi_version ? chip-onfi_params.model : type-name);
-#else
- type-name);
+ if (chip-onfi_version)
+ name = chip-onfi_params.model;
#endif
+ MTDDEBUG(MTD_DEBUG_LEVEL0, NAND device: Manufacturer ID:
+ 0x%02x, Chip ID: 0x%02x (%s %s)\n, *maf_id, *dev_id,
+nand_manuf_ids[maf_idx].name, name);
return type;
}
diff --git a/drivers/mtd/nand/nand_ecc.c b/drivers/mtd/nand/nand_ecc.c
index 81f0e08..097cf62 100644
--- a/drivers/mtd/nand/nand_ecc.c
+++ b/drivers/mtd/nand/nand_ecc.c
@@ -39,6 +39,7 @@
#include asm/errno.h
#include linux/mtd/mtd.h
+#include linux/mtd/nand_ecc.h
/* The PPC4xx NDFC uses Smart Media (SMC) bytes order */
#ifdef CONFIG_NAND_NDFC
--
1.8.0
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[U-Boot] [PATCH v2 03/25] include/linux/unaligned/generic.h: fix warning: preprocessor token __force redefined
include/linux/unaligned/generic.h:5:9: warning: preprocessor token __force redefined include/linux/compiler.h:10:10: this was the original definition fixup __force definitions in compat.h code appears to be placed there as a cover up from a code import from linux when u-boot didn't yet have a compiler.h, introduced by commit b1b4e89a0f3b75854c39a62cae41bad56d210adf Add LZO decompressor support. Signed-off-by: Kim Phillips kim.phill...@freescale.com --- v2: no change include/linux/unaligned/generic.h | 3 --- 1 file changed, 3 deletions(-) diff --git a/include/linux/unaligned/generic.h b/include/linux/unaligned/generic.h index cc688e1..02d97ff 100644 --- a/include/linux/unaligned/generic.h +++ b/include/linux/unaligned/generic.h @@ -1,9 +1,6 @@ #ifndef _LINUX_UNALIGNED_GENERIC_H #define _LINUX_UNALIGNED_GENERIC_H -/* define __force to nothing in U-Boot */ -#define __force - /* * Cause a link-time error if we try an unaligned access other than * 1,2,4 or 8 bytes long -- 1.8.0 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2 17/25] powerpc/mpc83xx: sparse fixes
fdt.c:91:78: warning: Using plain integer as NULL pointer
fdt.c:103:78: warning: Using plain integer as NULL pointer
speed.c:55:11: warning: symbol 'corecnf_tab' was not declared. Should it be
static?
speed.c:519:5: warning: symbol 'do_clocks' was not declared. Should it be
static?
mpc8313erdb.c:73:17: warning: obsolete struct initializer, use C99 syntax
mpc8313erdb.c:74:17: warning: obsolete struct initializer, use C99 syntax
mpc8313erdb.c:75:17: warning: obsolete struct initializer, use C99 syntax
mpc8313erdb.c:76:17: warning: obsolete struct initializer, use C99 syntax
mpc8313erdb.c:79:17: warning: obsolete struct initializer, use C99 syntax
mpc8313erdb.c:80:17: warning: obsolete struct initializer, use C99 syntax
mpc8313erdb.c:81:17: warning: obsolete struct initializer, use C99 syntax
mpc8313erdb.c:82:17: warning: obsolete struct initializer, use C99 syntax
mpc8313erdb.c:85:17: warning: obsolete struct initializer, use C99 syntax
mpc8313erdb.c:86:17: warning: obsolete struct initializer, use C99 syntax
mpc8313erdb.c:87:17: warning: obsolete struct initializer, use C99 syntax
mpc8313erdb.c:88:17: warning: obsolete struct initializer, use C99 syntax
Signed-off-by: Kim Phillips kim.phill...@freescale.com
---
v2: checkpatch fixes.
arch/powerpc/cpu/mpc83xx/fdt.c| 6 --
arch/powerpc/cpu/mpc83xx/speed.c | 4 ++--
board/freescale/mpc8313erdb/mpc8313erdb.c | 24
3 files changed, 18 insertions(+), 16 deletions(-)
diff --git a/arch/powerpc/cpu/mpc83xx/fdt.c b/arch/powerpc/cpu/mpc83xx/fdt.c
index 028c8f0..1f54781 100644
--- a/arch/powerpc/cpu/mpc83xx/fdt.c
+++ b/arch/powerpc/cpu/mpc83xx/fdt.c
@@ -88,7 +88,8 @@ void ft_cpu_setup(void *blob, bd_t *bd)
u32 tmp[] = { 32, 0x8, 33, 0x8, 34, 0x8 };
path = fdt_path_offset(blob, prop);
- prop = fdt_getprop(blob, path, interrupts, 0);
+ prop = fdt_getprop(blob, path, interrupts,
+ NULL);
if (prop)
fdt_setprop(blob, path, interrupts,
tmp, sizeof(tmp));
@@ -100,7 +101,8 @@ void ft_cpu_setup(void *blob, bd_t *bd)
u32 tmp[] = { 35, 0x8, 36, 0x8, 37, 0x8 };
path = fdt_path_offset(blob, prop);
- prop = fdt_getprop(blob, path, interrupts, 0);
+ prop = fdt_getprop(blob, path, interrupts,
+ NULL);
if (prop)
fdt_setprop(blob, path, interrupts,
tmp, sizeof(tmp));
diff --git a/arch/powerpc/cpu/mpc83xx/speed.c b/arch/powerpc/cpu/mpc83xx/speed.c
index fb0f7aa..b8c05d1 100644
--- a/arch/powerpc/cpu/mpc83xx/speed.c
+++ b/arch/powerpc/cpu/mpc83xx/speed.c
@@ -52,7 +52,7 @@ typedef struct {
mult_t vco_divider;
} corecnf_t;
-corecnf_t corecnf_tab[] = {
+static corecnf_t corecnf_tab[] = {
{_byp, _byp}, /* 0x00 */
{_byp, _byp}, /* 0x01 */
{_byp, _byp}, /* 0x02 */
@@ -531,7 +531,7 @@ ulong get_ddr_freq(ulong dummy)
return gd-mem_clk;
}
-int do_clocks (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
+static int do_clocks(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
char buf[32];
diff --git a/board/freescale/mpc8313erdb/mpc8313erdb.c
b/board/freescale/mpc8313erdb/mpc8313erdb.c
index 730ec4e..1071803 100644
--- a/board/freescale/mpc8313erdb/mpc8313erdb.c
+++ b/board/freescale/mpc8313erdb/mpc8313erdb.c
@@ -70,22 +70,22 @@ int checkboard(void)
#ifndef CONFIG_NAND_SPL
static struct pci_region pci_regions[] = {
{
- bus_start: CONFIG_SYS_PCI1_MEM_BASE,
- phys_start: CONFIG_SYS_PCI1_MEM_PHYS,
- size: CONFIG_SYS_PCI1_MEM_SIZE,
- flags: PCI_REGION_MEM | PCI_REGION_PREFETCH
+ .bus_start = CONFIG_SYS_PCI1_MEM_BASE,
+ .phys_start = CONFIG_SYS_PCI1_MEM_PHYS,
+ .size = CONFIG_SYS_PCI1_MEM_SIZE,
+ .flags = PCI_REGION_MEM | PCI_REGION_PREFETCH
},
{
- bus_start: CONFIG_SYS_PCI1_MMIO_BASE,
- phys_start: CONFIG_SYS_PCI1_MMIO_PHYS,
- size: CONFIG_SYS_PCI1_MMIO_SIZE,
- flags: PCI_REGION_MEM
+ .bus_start = CONFIG_SYS_PCI1_MMIO_BASE,
+ .phys_start = CONFIG_SYS_PCI1_MMIO_PHYS,
+ .size = CONFIG_SYS_PCI1_MMIO_SIZE,
+ .flags = PCI_REGION_MEM
},
{
- bus_start: CONFIG_SYS_PCI1_IO_BASE,
- phys_start: CONFIG_SYS_PCI1_IO_PHYS,
- size: CONFIG_SYS_PCI1_IO_SIZE,
-
[U-Boot] [PATCH v2 08/25] include/image.h: sparse fixes
include/image.h:378:1: warning: cast to restricted __be32
include/image.h:381:1: warning: cast to restricted __be32
include/image.h:382:1: warning: cast to restricted __be32
include/image.h:383:1: warning: cast to restricted __be32
fix by annotating image header integers big endian.
Signed-off-by: Kim Phillips kim.phill...@freescale.com
---
v2: no changes
include/image.h | 15 ---
1 file changed, 8 insertions(+), 7 deletions(-)
diff --git a/include/image.h b/include/image.h
index 4e5863f..0a895f2 100644
--- a/include/image.h
+++ b/include/image.h
@@ -34,6 +34,7 @@
#define __IMAGE_H__
#include compiler.h
+#include asm/byteorder.h
#ifdef USE_HOSTCC
@@ -183,13 +184,13 @@
* all data in network byte order (aka natural aka bigendian).
*/
typedef struct image_header {
- uint32_tih_magic; /* Image Header Magic Number*/
- uint32_tih_hcrc;/* Image Header CRC Checksum*/
- uint32_tih_time;/* Image Creation Timestamp */
- uint32_tih_size;/* Image Data Size */
- uint32_tih_load;/* Data Load Address */
- uint32_tih_ep; /* Entry Point Address */
- uint32_tih_dcrc;/* Image Data CRC Checksum */
+ __be32 ih_magic; /* Image Header Magic Number*/
+ __be32 ih_hcrc;/* Image Header CRC Checksum*/
+ __be32 ih_time;/* Image Creation Timestamp */
+ __be32 ih_size;/* Image Data Size */
+ __be32 ih_load;/* Data Load Address */
+ __be32 ih_ep; /* Entry Point Address */
+ __be32 ih_dcrc;/* Image Data CRC Checksum */
uint8_t ih_os; /* Operating System */
uint8_t ih_arch;/* CPU architecture */
uint8_t ih_type;/* Image Type */
--
1.8.0
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[U-Boot] [PATCH v2 06/25] arch/powerpc/lib/extable.c: sparse fix
extable.c:66:9: warning: symbol 'ex_tab_message' was not declared. Should it be
static?
making it static can produce a new build warning on some boards:
extable.c:66:12: warning: 'ex_tab_message' defined but not used
[-Wunused-variable]
but ex_tab_message doesn't do much even when used, so just remove it.
Signed-off-by: Kim Phillips kim.phill...@freescale.com
---
v2: doesn't make it static, it just deletes it
arch/powerpc/lib/extable.c | 5 +
1 file changed, 1 insertion(+), 4 deletions(-)
diff --git a/arch/powerpc/lib/extable.c b/arch/powerpc/lib/extable.c
index 7408d5c..60983ae 100644
--- a/arch/powerpc/lib/extable.c
+++ b/arch/powerpc/lib/extable.c
@@ -63,8 +63,6 @@ search_one_table(const struct exception_table_entry *first,
return 0;
}
-intex_tab_message = 1;
-
unsigned long
search_exception_table(unsigned long addr)
{
@@ -74,8 +72,7 @@ search_exception_table(unsigned long addr)
ret = search_one_table(__start___ex_table, __stop___ex_table-1, addr);
/* if the serial port does not hang in exception, printf can be used */
#if !defined(CONFIG_SYS_SERIAL_HANG_IN_EXCEPTION)
- if (ex_tab_message)
- debug(Bus Fault @ 0x%08lx, fixup 0x%08lx\n, addr, ret);
+ debug(Bus Fault @ 0x%08lx, fixup 0x%08lx\n, addr, ret);
#endif
if (ret) return ret;
--
1.8.0
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[U-Boot] [PATCH v2 14/25] lib/vsprintf.c: sparse fixes
vsprintf.c:31:12: warning: symbol 'hex_asc' was not declared. Should it be
static?
vsprintf.c:398:18: warning: Using plain integer as NULL pointer
Signed-off-by: Kim Phillips kim.phill...@freescale.com
---
v2: no changes
lib/vsprintf.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/lib/vsprintf.c b/lib/vsprintf.c
index d762763..7215531 100644
--- a/lib/vsprintf.c
+++ b/lib/vsprintf.c
@@ -28,7 +28,7 @@
/* some reluctance to put this into a new limits.h, so it is here */
#define INT_MAX((int)(~0U1))
-const char hex_asc[] = 0123456789abcdef;
+static const char hex_asc[] = 0123456789abcdef;
#define hex_asc_lo(x) hex_asc[((x) 0x0f)]
#define hex_asc_hi(x) hex_asc[((x) 0xf0) 4]
@@ -395,7 +395,7 @@ static char *string(char *buf, char *end, char *s, int
field_width,
{
int len, i;
- if (s == 0)
+ if (s == NULL)
s = NULL;
len = strnlen(s, precision);
--
1.8.0
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[U-Boot] [PATCH v2 04/25] include/linux/stddef.h: avoid 'warning: preprocessor token offsetof redefined'
hack to avoid: /opt/gcc-4.6.3-nolibc/powerpc-linux/bin/../lib/gcc/powerpc-linux/4.6.3/include/stddef.h:413:9: warning: preprocessor token offsetof redefined u-boot/include/linux/stddef.h:20:9: this was the original definition tried protecting with __KERNEL__, and #including compiler.h first. Even tried include dir reordering to no avail: +++ b/config.mk @@ -194,7 +194,11 @@ OBJCFLAGS += --gap-fill=0xff gccincdir := $(shell $(CC) -print-file-name=include) CPPFLAGS := $(DBGFLAGS) $(OPTFLAGS) $(RELFLAGS)\ - -D__KERNEL__ + -D__KERNEL__ \ + -I $(gccincdir) \ + -nostdinc + +# -isystem $(gccincdir) \ # Enable garbage collection of un-used sections for SPL ifeq ($(CONFIG_SPL_BUILD),y) @@ -227,8 +231,7 @@ CPPFLAGS += -I$(OBJTREE)/include2 -I$(OBJTREE)/include endif CPPFLAGS += -I$(TOPDIR)/include -CPPFLAGS += -fno-builtin -ffreestanding -nostdinc \ - -isystem $(gccincdir) -pipe $(PLATFORM_CPPFLAGS) +CPPFLAGS += -fno-builtin -ffreestanding -pipe $(PLATFORM_CPPFLAGS) Signed-off-by: Kim Phillips kim.phill...@freescale.com --- v2: no change include/linux/stddef.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/include/linux/stddef.h b/include/linux/stddef.h index 81e34c2..c540f61 100644 --- a/include/linux/stddef.h +++ b/include/linux/stddef.h @@ -12,7 +12,9 @@ #include linux/types.h #endif +#ifndef __CHECKER__ #undef offsetof #define offsetof(TYPE, MEMBER) ((size_t) ((TYPE *)0)-MEMBER) +#endif #endif -- 1.8.0 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2 05/25] arch/powerpc/include/asm/io.h: fix warning: preprocessor token __iomem redefined
a fixup __iomem definition in arch code appears to be placed there as a cover
up from a code import from linux when u-boot didn't yet have a compiler.h,
introduced by commit 812711ce6b3a386125dcf0d6a59588e461abbb87 Implement
__raw_{read,write}[bwl] on all architectures.
git show 812711ce6b3a386125dcf0d6a59588e461abbb87:include/linux/compiler.h
fatal: Path 'include/linux/compiler.h' exists on disk, but not in
'812711ce6b3a386125dcf0d6a59588e461abbb87'.
Signed-off-by: Kim Phillips kim.phill...@freescale.com
---
v2: no change
arch/powerpc/include/asm/io.h | 1 -
1 file changed, 1 deletion(-)
diff --git a/arch/powerpc/include/asm/io.h b/arch/powerpc/include/asm/io.h
index 9e20861..1f12c29 100644
--- a/arch/powerpc/include/asm/io.h
+++ b/arch/powerpc/include/asm/io.h
@@ -127,7 +127,6 @@ static inline void isync(void)
/*
* Non ordered and non-swapping raw accessors
*/
-#define __iomem
#define PCI_FIX_ADDR(addr) (addr)
static inline unsigned char __raw_readb(const volatile void __iomem *addr)
--
1.8.0
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[U-Boot] [PATCH v2 13/25] lib/zlib: sparse fixes
define Z_NULL to (void *)0 include/u-boot/zlib.h to get rid of most of
the NULL pointer warnings.
inflate.c:942:1: warning: non-ANSI definition of function 'inflateEnd'
inflate.c:9:1: warning: non-ANSI definition of function 'inflateReset'
inflate.c:12:17: warning: Using plain integer as NULL pointer
inflate.c:12:42: warning: Using plain integer as NULL pointer
inflate.c:15:17: warning: Using plain integer as NULL pointer
inflate.c:21:19: warning: Using plain integer as NULL pointer
inflate.c:35:1: warning: non-ANSI definition of function 'inflateInit2_'
inflate.c:38:20: warning: Using plain integer as NULL pointer
inflate.c:41:17: warning: Using plain integer as NULL pointer
inflate.c:42:17: warning: Using plain integer as NULL pointer
inflate.c:50:18: warning: Using plain integer as NULL pointer
inflate.c:65:23: warning: Using plain integer as NULL pointer
inflate.c:69:21: warning: Using plain integer as NULL pointer
inflate.c:78:1: warning: non-ANSI definition of function 'inflateInit_'
inflate.c:86:1: warning: non-ANSI definition of function 'fixedtables'
inflate.c:108:26: warning: Using plain integer as NULL pointer
inflate.c:109:1: warning: non-ANSI definition of function 'updatewindow'
inflate.c:112:30: warning: Using plain integer as NULL pointer
inflate.c:339:1: warning: non-ANSI definition of function 'inflate'
inflate.c:349:17: warning: Using plain integer as NULL pointer
inflate.c:349:42: warning: Using plain integer as NULL pointer
inflate.c:350:27: warning: Using plain integer as NULL pointer
inflate.c:369:42: warning: Using plain integer as NULL pointer
inflate.c:376:32: warning: Using plain integer as NULL pointer
inflate.c:401:54: warning: Using plain integer as NULL pointer
inflate.c:419:32: warning: Using plain integer as NULL pointer
inflate.c:426:32: warning: Using plain integer as NULL pointer
inflate.c:433:32: warning: Using plain integer as NULL pointer
inflate.c:444:36: warning: Using plain integer as NULL pointer
inflate.c:449:37: warning: Using plain integer as NULL pointer
inflate.c:450:38: warning: Using plain integer as NULL pointer
inflate.c:457:40: warning: Using plain integer as NULL pointer
inflate.c:458:47: warning: Using plain integer as NULL pointer
inflate.c:480:40: warning: Using plain integer as NULL pointer
inflate.c:481:50: warning: Using plain integer as NULL pointer
inflate.c:491:37: warning: Using plain integer as NULL pointer
inflate.c:492:37: warning: Using plain integer as NULL pointer
inflate.c:501:40: warning: Using plain integer as NULL pointer
inflate.c:502:53: warning: Using plain integer as NULL pointer
inflate.c:512:37: warning: Using plain integer as NULL pointer
inflate.c:513:40: warning: Using plain integer as NULL pointer
inflate.c:525:32: warning: Using plain integer as NULL pointer
inflate.c:529:52: warning: Using plain integer as NULL pointer
inflate.c:543:54: warning: Using plain integer as NULL pointer
inflate.c:932:17: warning: Using plain integer as NULL pointer
inflate.c:932:42: warning: Using plain integer as NULL pointer
inflate.c:935:26: warning: Using plain integer as NULL pointer
inflate.c:940:19: warning: Using plain integer as NULL pointer
adler32.c:58:5: warning: non-ANSI definition of function 'adler32'
adler32.c:81:16: warning: Using plain integer as NULL pointer
zutil.c:53:9: warning: non-ANSI definition of function 'zcalloc'
zutil.c:64:9: warning: non-ANSI definition of function 'zcfree'
inffast.c:70:1: warning: non-ANSI definition of function 'inflate_fast'
inftrees.c:33:1: warning: non-ANSI definition of function 'inflate_table'
Signed-off-by: Kim Phillips kim.phill...@freescale.com
---
v2: added checkpatch fixes.
include/u-boot/zlib.h | 2 +-
lib/zlib/adler32.c| 5 +
lib/zlib/inffast.c| 5 ++---
lib/zlib/inflate.c| 29 -
lib/zlib/inftrees.c | 10 +++---
lib/zlib/zutil.c | 10 ++
6 files changed, 17 insertions(+), 44 deletions(-)
diff --git a/include/u-boot/zlib.h b/include/u-boot/zlib.h
index b611fe7..e23ceb5 100644
--- a/include/u-boot/zlib.h
+++ b/include/u-boot/zlib.h
@@ -505,7 +505,7 @@ typedef gz_header FAR *gz_headerp;
#define Z_DEFLATED 8
/* The deflate compression method (the only one supported in this version) */
-#define Z_NULL 0 /* for initializing zalloc, zfree, opaque */
+#define Z_NULL (void *)0 /* for initializing zalloc, zfree, opaque */
/* basic functions */
diff --git a/lib/zlib/adler32.c b/lib/zlib/adler32.c
index dc9480d..b468441 100644
--- a/lib/zlib/adler32.c
+++ b/lib/zlib/adler32.c
@@ -54,10 +54,7 @@
#endif
/* = */
-uLong ZEXPORT adler32(adler, buf, len)
-uLong adler;
-const Bytef *buf;
-uInt len;
+uLong ZEXPORT adler32(uLong adler, const Bytef *buf, uInt len)
{
unsigned long sum2;
unsigned n;
diff --git a/lib/zlib/inffast.c b/lib/zlib/inffast.c
index 38f2f90..0700e04 100644
---
[U-Boot] [PATCH v2 10/25] common/misc: sparse fixes
command.c:44:38: error: bad constant expression dlmalloc.c:1468:2: warning: Using plain integer as NULL pointer dlmalloc.c:1468:5: warning: Using plain integer as NULL pointer dlmalloc.c:2176:12: warning: Using plain integer as NULL pointer dlmalloc.c:2179:31: warning: Using plain integer as NULL pointer dlmalloc.c:2382:14: warning: Using plain integer as NULL pointer dlmalloc.c:2436:14: warning: Using plain integer as NULL pointer dlmalloc.c:2582:31: warning: Using plain integer as NULL pointer dlmalloc.c:2585:17: warning: Using plain integer as NULL pointer dlmalloc.c:2646:14: warning: Using plain integer as NULL pointer dlmalloc.c:2659:19: warning: Using plain integer as NULL pointer dlmalloc.c:2692:19: warning: Using plain integer as NULL pointer dlmalloc.c:2707:19: warning: Using plain integer as NULL pointer dlmalloc.c:2708:14: warning: Using plain integer as NULL pointer dlmalloc.c:2786:31: warning: Using plain integer as NULL pointer dlmalloc.c:2801:12: warning: Using plain integer as NULL pointer dlmalloc.c:2801:22: warning: Using plain integer as NULL pointer dlmalloc.c:2926:27: warning: Using plain integer as NULL pointer dlmalloc.c:2928:14: warning: Using plain integer as NULL pointer dlmalloc.c:2929:12: warning: Using plain integer as NULL pointer dlmalloc.c:3075:14: warning: Using plain integer as NULL pointer hush.c:292:14: warning: symbol 'last_return_code' was not declared. Should it be static? hush.c:293:5: warning: symbol 'nesting_level' was not declared. Should it be static? hush.c:2175:20: warning: Using plain integer as NULL pointer hush.c:2175:34: warning: Using plain integer as NULL pointer hush.c:2210:41: warning: Using plain integer as NULL pointer hush.c:2216:45: warning: Using plain integer as NULL pointer hush.c:2249:25: warning: Using plain integer as NULL pointer hush.c:2332:13: warning: symbol 'new_pipe' was not declared. Should it be static? hush.c:2390:5: warning: symbol 'reserved_word' was not declared. Should it be static? hush.c:2927:5: warning: symbol 'parse_stream' was not declared. Should it be static? hush.c:3127:6: warning: symbol 'mapset' was not declared. Should it be static? hush.c:3133:6: warning: symbol 'update_ifs_map' was not declared. Should it be static? hush.c:3161:5: warning: symbol 'parse_stream_outer' was not declared. Should it be static? hush.c:3295:34: warning: Using plain integer as NULL pointer hush.c:3631:5: warning: symbol 'do_showvar' was not declared. Should it be static image.c:1282:29: warning: Using plain integer as NULL pointer image.c:1315:41: warning: Using plain integer as NULL pointer image.c:1330:25: warning: Using plain integer as NULL pointer image.c:1706:25: warning: Using plain integer as NULL pointer main.c:510:10: warning: symbol 'hist_num' was not declared. Should it be static? main.c:512:5: warning: symbol 'hist_list' was not declared. Should it be static? main.c:513:6: warning: symbol 'hist_lines' was not declared. Should it be static? usb_storage.c:195:6: warning: symbol 'usb_show_progress' was not declared. Should it be static? usb_storage.c:440:48: warning: Using plain integer as NULL pointer usb_storage.c:503:5: warning: symbol 'usb_stor_BBB_comdat' was not declared. Should it be static? usb_storage.c:551:5: warning: symbol 'usb_stor_CB_comdat' was not declared. Should it be static? usb_storage.c:629:55: warning: Using plain integer as NULL pointer usb_storage.c:620:5: warning: symbol 'usb_stor_CBI_get_status' was not declared. Should it be static? usb_storage.c:675:43: warning: Using plain integer as NULL pointer usb_storage.c:668:5: warning: symbol 'usb_stor_BBB_clear_endpt_stall' was not declared. Should it be static? usb_storage.c:679:5: warning: symbol 'usb_stor_BBB_transport' was not declared. Should it be static? usb_storage.c:801:5: warning: symbol 'usb_stor_CB_transport' was not declared. Sh xyzModem.c:104:1: warning: symbol 'CYGACC_COMM_IF_GETC_TIMEOUT' was not declared. Should it be static? xyzModem.c:122:1: warning: symbol 'CYGACC_COMM_IF_PUTC' was not declared. Should it be static? xyzModem.c:169:1: warning: symbol 'parse_num' was not declared. Should it be stat note: hush.c's nesting_level deleted because not used. Signed-off-by: Kim Phillips kim.phill...@freescale.com --- v2: un-static search_device, it is being used elsewhere. Tested on netspace_lite_v2: console.c:537:18: warning: symbol 'search_device' was not declared. Should it be static? v2 also added checkpatch fixes, except for dlmalloc, which needs a _lot_ of work. common/command.c | 9 - common/dlmalloc.c| 36 ++-- common/hush.c| 31 --- common/image.c | 8 common/main.c| 10 +- common/usb_storage.c | 20 ++-- common/xyzModem.c| 6 +++--- 7 files changed, 64 insertions(+), 56 deletions(-) diff --git a/common/command.c b/common/command.c index 50c8429..f51df26 100644 ---
[U-Boot] [PATCH v2 19/25] drivers/gpio/mpc83xx_gpio.c: sparse fixes
mpc83xx_gpio.c:166:26: warning: non-ANSI function declaration of function
'mpc83xx_gpio_init_f'
mpc83xx_gpio.c:190:26: warning: non-ANSI function declaration of function
'mpc83xx_gpio_init_r'
Signed-off-by: Kim Phillips kim.phill...@freescale.com
---
v2: no changes
drivers/gpio/mpc83xx_gpio.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpio/mpc83xx_gpio.c b/drivers/gpio/mpc83xx_gpio.c
index a9afcb2..e167852 100644
--- a/drivers/gpio/mpc83xx_gpio.c
+++ b/drivers/gpio/mpc83xx_gpio.c
@@ -163,7 +163,7 @@ int gpio_set_value(unsigned gpio, int value)
}
/* Configure GPIO registers early */
-void mpc83xx_gpio_init_f()
+void mpc83xx_gpio_init_f(void)
{
immap_t *im = (immap_t *)CONFIG_SYS_IMMR;
@@ -187,7 +187,7 @@ void mpc83xx_gpio_init_f()
}
/* Initialize GPIO soft-copies */
-void mpc83xx_gpio_init_r()
+void mpc83xx_gpio_init_r(void)
{
#if MPC83XX_GPIO_CTRLRS = 1
gpio_output_value[0] = CONFIG_MPC83XX_GPIO_0_INIT_VALUE;
--
1.8.0
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[U-Boot] [PATCH v2 16/25] powerpc/mpc85xx: sparse fixes
fsl_corenet_serdes.c:485:6: warning: symbol '__soc_serdes_init' was not
declared. Should it be static?
cpu_init.c:185:6: warning: symbol 'invalidate_cpc' was not declared. Should it
be static?
bcsr.c:28:27: warning: non-ANSI function declaration of function
'enable_8568mds_duart'
bcsr.c:39:33: warning: non-ANSI function declaration of function
'enable_8568mds_flash_write'
bcsr.c:46:34: warning: non-ANSI function declaration of function
'disable_8568mds_flash_write'
bcsr.c:53:29: warning: non-ANSI function declaration of function
'enable_8568mds_qe_mdio'
bcsr.c:28:33: warning: non-ANSI function declaration of function
'enable_8569mds_flash_write'
bcsr.c:33:34: warning: non-ANSI function declaration of function
'disable_8569mds_flash_write'
bcsr.c:38:28: warning: non-ANSI function declaration of function
'enable_8569mds_qe_uec'
bcsr.c:63:47: warning: non-ANSI function declaration of function
'disable_8569mds_brd_eeprom_write_protect'
ngpixis.c:245:1: error: directive in argument list
ngpixis.c:247:1: error: directive in argument list
Signed-off-by: Kim Phillips kim.phill...@freescale.com
---
v2: fix ngpixis command help to depend on CONFIG_SYS_LONGHELP
arch/powerpc/cpu/mpc85xx/cpu_init.c | 2 +-
arch/powerpc/cpu/mpc85xx/fsl_corenet_serdes.c | 2 +-
board/freescale/common/ngpixis.c | 12
board/freescale/mpc8568mds/bcsr.c | 8
board/freescale/mpc8569mds/bcsr.c | 8
5 files changed, 18 insertions(+), 14 deletions(-)
diff --git a/arch/powerpc/cpu/mpc85xx/cpu_init.c
b/arch/powerpc/cpu/mpc85xx/cpu_init.c
index 736293c..f01804b 100644
--- a/arch/powerpc/cpu/mpc85xx/cpu_init.c
+++ b/arch/powerpc/cpu/mpc85xx/cpu_init.c
@@ -182,7 +182,7 @@ static void enable_cpc(void)
printf(Corenet Platform Cache: %d KB enabled\n, size);
}
-void invalidate_cpc(void)
+static void invalidate_cpc(void)
{
int i;
cpc_corenet_t *cpc = (cpc_corenet_t *)CONFIG_SYS_FSL_CPC_ADDR;
diff --git a/arch/powerpc/cpu/mpc85xx/fsl_corenet_serdes.c
b/arch/powerpc/cpu/mpc85xx/fsl_corenet_serdes.c
index e6b1b1b..7f466ac 100644
--- a/arch/powerpc/cpu/mpc85xx/fsl_corenet_serdes.c
+++ b/arch/powerpc/cpu/mpc85xx/fsl_corenet_serdes.c
@@ -489,7 +489,7 @@ static void wait_for_rstdone(unsigned int bank)
}
-void __soc_serdes_init(void)
+static void __soc_serdes_init(void)
{
/* Allow for SoC-specific initialization in SOC_serdes.c */
};
diff --git a/board/freescale/common/ngpixis.c b/board/freescale/common/ngpixis.c
index 276ae3c..3c75028 100644
--- a/board/freescale/common/ngpixis.c
+++ b/board/freescale/common/ngpixis.c
@@ -237,13 +237,17 @@ int pixis_reset_cmd(cmd_tbl_t *cmdtp, int flag, int argc,
char * const argv[])
return 0;
}
-U_BOOT_CMD(
- pixis_reset, CONFIG_SYS_MAXARGS, 1, pixis_reset_cmd,
- Reset the board using the FPGA sequencer,
+#ifdef CONFIG_SYS_LONGHELP
+static char pixis_help_text[] =
- hard reset to default bank\n
pixis_reset altbank - reset to alternate bank\n
#ifdef DEBUG
pixis_reset dump - display the PIXIS registers\n
#endif
- pixis_reset sysclk SYSCLK_freq - reset with SYSCLK frequency(KHz)\n
+ pixis_reset sysclk SYSCLK_freq - reset with SYSCLK frequency(KHz)\n;
+#endif
+
+U_BOOT_CMD(
+ pixis_reset, CONFIG_SYS_MAXARGS, 1, pixis_reset_cmd,
+ Reset the board using the FPGA sequencer, pixis_help_text
);
diff --git a/board/freescale/mpc8568mds/bcsr.c
b/board/freescale/mpc8568mds/bcsr.c
index 30676e1..2a172cc 100644
--- a/board/freescale/mpc8568mds/bcsr.c
+++ b/board/freescale/mpc8568mds/bcsr.c
@@ -25,7 +25,7 @@
#include bcsr.h
-void enable_8568mds_duart()
+void enable_8568mds_duart(void)
{
volatile uint* duart_mux= (uint *)(CONFIG_SYS_CCSRBAR +
0xe0060);
volatile uint* devices = (uint *)(CONFIG_SYS_CCSRBAR +
0xe0070);
@@ -36,21 +36,21 @@ void enable_8568mds_duart()
bcsr[5] |= 0x01;/* Enable Duart in BCSR*/
}
-void enable_8568mds_flash_write()
+void enable_8568mds_flash_write(void)
{
volatile u8 *bcsr = (u8 *)(CONFIG_SYS_BCSR);
bcsr[9] |= 0x01;
}
-void disable_8568mds_flash_write()
+void disable_8568mds_flash_write(void)
{
volatile u8 *bcsr = (u8 *)(CONFIG_SYS_BCSR);
bcsr[9] = ~(0x01);
}
-void enable_8568mds_qe_mdio()
+void enable_8568mds_qe_mdio(void)
{
u8 *bcsr = (u8 *)(CONFIG_SYS_BCSR);
diff --git a/board/freescale/mpc8569mds/bcsr.c
b/board/freescale/mpc8569mds/bcsr.c
index b688e5c..37d0c5f 100644
--- a/board/freescale/mpc8569mds/bcsr.c
+++ b/board/freescale/mpc8569mds/bcsr.c
@@ -25,17 +25,17 @@
#include bcsr.h
-void enable_8569mds_flash_write()
+void enable_8569mds_flash_write(void)
{
setbits_8((u8 *)(CONFIG_SYS_BCSR_BASE + 17), BCSR17_FLASH_nWP);
}
-void disable_8569mds_flash_write()
+void disable_8569mds_flash_write(void)
{
clrbits_8((u8 *)(CONFIG_SYS_BCSR_BASE + 17),
[U-Boot] [PATCH v2 11/25] net/: sparse fixes
bootp.c:44:14: warning: symbol 'dhcp_state' was not declared. Should it be
static?
bootp.c:45:15: warning: symbol 'dhcp_leasetime' was not declared. Should it be
static?
bootp.c:46:10: warning: symbol 'NetDHCPServerIP' was not declared. Should it be
static?
arp.c:30:17: warning: symbol 'NetArpWaitReplyIP' was not declared. Should it be
static?
arp.c:37:16: warning: symbol 'NetArpTxPacket' was not declared. Should it be
static?
arp.c:38:17: warning: symbol 'NetArpPacketBuf' was not declared. Should it be
static?
atheros.c:33:19: warning: symbol 'AR8021_driver' was not declared. Should it be
static?
net.c:183:7: warning: symbol 'PktBuf' was not declared. Should it be static?
net.c:159:21: warning: symbol 'net_state' was not declared. Should it be static?
ping.c:73:6: warning: symbol 'ping_start' was not declared. Should it be static?
ping.c:82:13: warning: symbol 'ping_receive' was not declared. Should it be
static?
tftp.c:53:7: warning: symbol 'TftpRRQTimeoutMSecs' was not declared. Should it
be static?
tftp.c:54:5: warning: symbol 'TftpRRQTimeoutCountMax' was not declared. Should
it be static?
eth.c:125:19: warning: symbol 'eth_current' was not declared. Should it be
static?
Note: in the ping.c fix, commit a36b12f95a29647a06b5459198684fc142482020
net: Move PING out of net.c mistakenly carried the ifdef CMD_PING
clause from when it was necessary to avoid warnings when it was embedded
in net.c.
Signed-off-by: Kim Phillips kim.phill...@freescale.com
---
v2: no changes
common/update.c | 1 +
drivers/net/phy/atheros.c | 2 +-
include/net.h | 9 +
net/arp.c | 6 +++---
net/bootp.c | 6 +++---
net/net.c | 2 +-
net/ping.h| 3 ---
net/tftp.h| 3 +++
8 files changed, 17 insertions(+), 15 deletions(-)
diff --git a/common/update.c b/common/update.c
index 5b1a064..94d6a82 100644
--- a/common/update.c
+++ b/common/update.c
@@ -37,6 +37,7 @@
#include command.h
#include flash.h
#include net.h
+#include net/tftp.h
#include malloc.h
/* env variable holding the location of the update file */
diff --git a/drivers/net/phy/atheros.c b/drivers/net/phy/atheros.c
index 798473d..9b3808b 100644
--- a/drivers/net/phy/atheros.c
+++ b/drivers/net/phy/atheros.c
@@ -30,7 +30,7 @@ static int ar8021_config(struct phy_device *phydev)
return 0;
}
-struct phy_driver AR8021_driver = {
+static struct phy_driver AR8021_driver = {
.name = AR8021,
.uid = 0x4dd040,
.mask = 0xf0,
diff --git a/include/net.h b/include/net.h
index 3539336..970d4d1 100644
--- a/include/net.h
+++ b/include/net.h
@@ -102,12 +102,13 @@ extern int eth_register(struct eth_device* dev);/*
Register network device */
extern int eth_unregister(struct eth_device *dev);/* Remove network device */
extern void eth_try_another(int first_restart);/* Change the device */
extern void eth_set_current(void); /* set nterface to ethcur var */
+
/* get the current device MAC */
+extern struct eth_device *eth_current;
+
static inline __attribute__((always_inline))
struct eth_device *eth_get_dev(void)
{
- extern struct eth_device *eth_current;
-
return eth_current;
}
extern struct eth_device *eth_get_dev_by_name(const char *devname);
@@ -517,10 +518,10 @@ enum net_loop_state {
NETLOOP_SUCCESS,
NETLOOP_FAIL
};
+extern enum net_loop_state net_state;
+
static inline void net_set_state(enum net_loop_state state)
{
- extern enum net_loop_state net_state;
-
debug_cond(DEBUG_INT_STATE, --- NetState set to %d\n, state);
net_state = state;
}
diff --git a/net/arp.c b/net/arp.c
index 8e1d2ed..20c6b2d 100644
--- a/net/arp.c
+++ b/net/arp.c
@@ -27,15 +27,15 @@
#endif
IPaddr_t NetArpWaitPacketIP;
-IPaddr_t NetArpWaitReplyIP;
+static IPaddr_tNetArpWaitReplyIP;
/* MAC address of waiting packet's destination */
uchar *NetArpWaitPacketMAC;
intNetArpWaitTxPacketSize;
ulong NetArpWaitTimerStart;
intNetArpWaitTry;
-uchar *NetArpTxPacket; /* THE ARP transmit packet */
-uchar NetArpPacketBuf[PKTSIZE_ALIGN + PKTALIGN];
+static uchar *NetArpTxPacket;/* THE ARP transmit packet */
+static uchar NetArpPacketBuf[PKTSIZE_ALIGN + PKTALIGN];
void ArpInit(void)
{
diff --git a/net/bootp.c b/net/bootp.c
index cd5c5dd..4300f1c 100644
--- a/net/bootp.c
+++ b/net/bootp.c
@@ -41,9 +41,9 @@ ulong BootpID;
intBootpTry;
#if defined(CONFIG_CMD_DHCP)
-dhcp_state_t dhcp_state = INIT;
-unsigned long dhcp_leasetime;
-IPaddr_t NetDHCPServerIP;
+static dhcp_state_t dhcp_state = INIT;
+static unsigned long dhcp_leasetime;
+static IPaddr_t NetDHCPServerIP;
static void DhcpHandler(uchar *pkt, unsigned dest, IPaddr_t sip, unsigned src,
unsigned len);
diff --git a/net/net.c b/net/net.c
index 569fec4..82c4cc9 100644
--- a/net/net.c
+++
[U-Boot] [PATCH v2 20/25] drivers/input/input.c: sparse fix
input.c:97:5: warning: symbol 'input_queue_ascii' was not declared. Should it be
Signed-off-by: Kim Phillips kim.phill...@freescale.com
---
v2: no changes
drivers/input/input.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/input/input.c b/drivers/input/input.c
index 9800667..04fa5f0 100644
--- a/drivers/input/input.c
+++ b/drivers/input/input.c
@@ -110,7 +110,7 @@ static struct {
/* Maximum number of output characters that an ANSI sequence expands to */
#define ANSI_CHAR_MAX 3
-int input_queue_ascii(struct input_config *config, int ch)
+static int input_queue_ascii(struct input_config *config, int ch)
{
if (config-fifo_in + 1 == INPUT_BUFFER_LEN) {
if (!config-fifo_out)
--
1.8.0
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[U-Boot] [PATCH v2 22/25] drivers/mmc/fsl_esdhc.c: sparse fixes
fsl_esdhc.c:71:6: warning: symbol 'esdhc_xfertyp' was not declared. Should it
be static?
fsl_esdhc.c:413:6: warning: symbol 'set_sysctl' was not declared. Should it be
st
Signed-off-by: Kim Phillips kim.phill...@freescale.com
---
v2: no changes
drivers/mmc/fsl_esdhc.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c
index 3f8d30d..301dd8c 100644
--- a/drivers/mmc/fsl_esdhc.c
+++ b/drivers/mmc/fsl_esdhc.c
@@ -68,7 +68,7 @@ struct fsl_esdhc {
};
/* Return the XFERTYP flags for a given command and data packet */
-uint esdhc_xfertyp(struct mmc_cmd *cmd, struct mmc_data *data)
+static uint esdhc_xfertyp(struct mmc_cmd *cmd, struct mmc_data *data)
{
uint xfertyp = 0;
@@ -410,7 +410,7 @@ esdhc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct
mmc_data *data)
return 0;
}
-void set_sysctl(struct mmc *mmc, uint clock)
+static void set_sysctl(struct mmc *mmc, uint clock)
{
int sdhc_clk = gd-sdhc_clk;
int div, pre_div;
--
1.8.0
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[U-Boot] [PATCH v2 18/25] drivers/block/: sparse fixes
sata_sil.c:371:7: warning: symbol 'sil_sata_rw_lba28' was not declared. Should it be static? sata_sil.c:399:7: warning: symbol 'sil_sata_rw_lba48' was not declared. Should it be static? sata_sil.c:429:6: warning: symbol 'sil_sata_cmd_flush_cache' was not declared. Should it be static? sata_sil.c:441:6: warning: symbol 'sil_sata_cmd_flush_cache_ext' was not declared. Should it be static? sata_sil.c:489:7: warning: symbol 'sata_read' was not declared. Should it be static? sata_sil.c:505:7: warning: symbol 'sata_write' was not declared. Should it be static? sata_sil.c:526:5: warning: symbol 'init_sata' was not declared. Should it be static? sata_sil.c:588:5: warning: symbol 'scan_sata' was not declared. Should it be static? fsl_sata.c:59:6: warning: symbol 'dprint_buffer' was not declared. Should it be static? fsl_sata.c:187:42: warning: incorrect type in assignment (different base types) fsl_sata.c:187:42:expected unsigned int [unsigned] [usertype] cda fsl_sata.c:187:42:got restricted __le32 [usertype] noident fsl_sata.c:291:6: warning: symbol 'fsl_sata_hardware_reset' was not declared. Should it be static? fsl_sata.c:418:27: warning: incorrect type in assignment (different base types) fsl_sata.c:418:27:expected unsigned int [unsigned] [usertype] dba fsl_sata.c:418:27:got restricted __le32 [usertype] noident fsl_sata.c:424:41: warning: incorrect type in assignment (different base types) fsl_sata.c:424:41:expected unsigned int [unsigned] [usertype] ext_c_ddc fsl_sata.c:424:41:got restricted __le32 [usertype] noident fsl_sata.c:431:41: warning: incorrect type in assignment (different base types) fsl_sata.c:431:41:expected unsigned int [unsigned] [usertype] ext_c_ddc fsl_sata.c:431:41:got restricted __le32 [usertype] noident fsl_sata.c:442:22: warning: incorrect type in assignment (different base types) fsl_sata.c:442:22:expected unsigned int [unsigned] [usertype] cda fsl_sata.c:442:22:got restricted __le32 [usertype] noident fsl_sata.c:446:31: warning: incorrect type in assignment (different base types) fsl_sata.c:446:31:expected unsigned int [unsigned] [usertype] prde_fis_len fsl_sata.c:446:31:got restricted __le32 [usertype] noident fsl_sata.c:448:22: warning: incorrect type in assignment (different base types) fsl_sata.c:448:22:expected unsigned int [unsigned] [usertype] ttl fsl_sata.c:448:22:got restricted __le32 [usertype] noident fsl_sata.c:460:28: warning: incorrect type in assignment (different base types) fsl_sata.c:460:28:expected unsigned int [unsigned] [usertype] attribute fsl_sata.c:460:28:got restricted __le32 [usertype] noident fsl_sata.c:623:6: warning: symbol 'fsl_sata_flush_cache' was not declared. Should it be static? fsl_sata.c:667:5: warning: symbol 'fsl_sata_rw_ncq_cmd' was not declared. Should it be static? fsl_sata.c:710:6: warning: symbol 'fsl_sata_flush_cache_ext' was not declared. Should it be static? fsl_sata.c:725:6: warning: symbol 'fsl_sata_software_reset' was not declared. Should it be static? fsl_sata.c:760:5: warning: symbol 'ata_low_level_rw_lba48' was not declared. Should it be static? fsl_sata.c:795:5: warning: symbol 'ata_low_level_rw_lba28' was not declared. Should it be static? the following compiler warnings show up after fixing the above, so remove those three functions: fsl_sata.c:59:13: warning: 'dprint_buffer' defined but not used [-Wunused-function] fsl_sata.c:291:13: warning: 'fsl_sata_hardware_reset' defined but not used [-Wunused-function] fsl_sata.c:726:13: warning: 'fsl_sata_software_reset' defined but not used [-Wunused-function] Other than that, the following are fixed by __iomem annotation: fsl_sata.c:84:39: warning: incorrect type in argument 1 (different address spaces) fsl_sata.c:84:39:expected unsigned int const volatile [noderef] asn:2*addr fsl_sata.c:84:39:got unsigned int volatile *addr fsl_sata.c:172:26: warning: incorrect type in argument 1 (different address spaces) fsl_sata.c:172:26:expected unsigned int const volatile [noderef] asn:2*addr fsl_sata.c:172:26:got unsigned int *noident fsl_sata.c:175:19: warning: incorrect type in argument 1 (different address spaces) fsl_sata.c:175:19:expected unsigned int volatile [noderef] asn:2*addr fsl_sata.c:175:19:got unsigned int *noident fsl_sata.c:181:19: warning: incorrect type in argument 1 (different address spaces) fsl_sata.c:181:19:expected unsigned int volatile [noderef] asn:2*addr fsl_sata.c:181:19:got unsigned int *noident fsl_sata.c:184:26: warning: incorrect type in argument 1 (different address spaces) fsl_sata.c:184:26:expected unsigned int const volatile [noderef] asn:2*addr fsl_sata.c:184:26:got unsigned int *noident fsl_sata.c:186:19: warning: incorrect type in argument 1 (different address spaces) fsl_sata.c:186:19:expected unsigned int volatile [noderef] asn:2*addr fsl_sata.c:186:19:got unsigned int *noident fsl_sata.c:189:26: warning: incorrect
[U-Boot] [PATCH v2 23/25] drivers/mtd/cfi_flash.c: sparse fixes
cfi_flash.c:756:43: warning: Using plain integer as NULL pointer
cfi_flash.c:1150:52: warning: cast to non-scalar
cfi_flash.c:1433:46: warning: cast truncates bits from constant value (890089
becomes 89)
cfi_flash.c:1490:61: warning: cast truncates bits from constant value (1f001f
becomes 1f)
cfi_flash.c:1508:61: warning: cast truncates bits from constant value (10001
becomes 1)
cfi_flash.c:1738:63: warning: cast truncates bits from constant value (10001
becomes 1)
cfi_flash.c:1857:6: warning: symbol '__flash_cmd_reset' was not declared.
Should it be static?
Signed-off-by: Kim Phillips kim.phill...@freescale.com
---
v2: checkpatch fixes.
drivers/mtd/cfi_flash.c | 22 +-
1 file changed, 13 insertions(+), 9 deletions(-)
diff --git a/drivers/mtd/cfi_flash.c b/drivers/mtd/cfi_flash.c
index 43140f3..b2dfc53 100644
--- a/drivers/mtd/cfi_flash.c
+++ b/drivers/mtd/cfi_flash.c
@@ -752,8 +752,8 @@ static void flash_add_byte (flash_info_t * info, cfiword_t
* cword, uchar c)
*/
static flash_sect_t find_sector (flash_info_t * info, ulong addr)
{
- static flash_sect_t saved_sector = 0; /* previously found sector */
- static flash_info_t *saved_info = 0; /* previously used flash bank */
+ static flash_sect_t saved_sector; /* previously found sector */
+ static flash_info_t *saved_info; /* previously used flash bank */
flash_sect_t sector = saved_sector;
if ((info != saved_info) || (sector = info-sector_count))
@@ -1147,8 +1147,9 @@ int flash_erase (flash_info_t * info, int s_first, int
s_last)
}
if (use_flash_status_poll(info)) {
- cfiword_t cword =
(cfiword_t)0xULL;
+ cfiword_t cword;
void *dest;
+ cword.ll = 0xULL;
dest = flash_map(info, sect, 0);
st = flash_status_poll(info, cword, dest,
info-erase_blk_tout,
erase);
@@ -1430,8 +1431,8 @@ int write_buff (flash_info_t * info, uchar * src, ulong
addr, ulong cnt)
static int cfi_protect_bugfix(flash_info_t *info, long sector, int prot)
{
- if ((info-manufacturer_id == (uchar)INTEL_MANUFACT)
- (info-device_id == NUMONYX_256MBIT)) {
+ if (info-manufacturer_id == ((INTEL_MANUFACT FLASH_VENDMASK) 16)
+info-device_id == NUMONYX_256MBIT) {
/*
* see errata called
* Numonyx Axcell P33/P30 Specification Update :)
@@ -1487,7 +1488,8 @@ int flash_real_protect (flash_info_t * info, long sector,
int prot)
case CFI_CMDSET_AMD_EXTENDED:
case CFI_CMDSET_AMD_STANDARD:
/* U-Boot only checks the first byte */
- if (info-manufacturer_id == (uchar)ATM_MANUFACT) {
+ if (info-manufacturer_id ==
+ ((ATM_MANUFACT FLASH_VENDMASK) 16)) {
if (prot) {
flash_unlock_seq (info, 0);
flash_write_cmd (info, 0,
@@ -1505,7 +1507,8 @@ int flash_real_protect (flash_info_t * info, long sector,
int prot)
0, ATM_CMD_UNLOCK_SECT);
}
}
- if (info-manufacturer_id == (uchar)AMD_MANUFACT) {
+ if (info-manufacturer_id ==
+ ((AMD_MANUFACT FLASH_VENDMASK) 16)) {
int flag = disable_interrupts();
int lock_flag;
@@ -1735,7 +1738,8 @@ static int cmdset_amd_init(flash_info_t *info, struct
cfi_qry *qry)
flash_write_cmd(info, 0, info-cfi_offset, FLASH_CMD_CFI);
#ifdef CONFIG_SYS_FLASH_PROTECTION
- if (info-ext_addr info-manufacturer_id == (uchar)AMD_MANUFACT) {
+ if (info-ext_addr info-manufacturer_id ==
+ ((AMD_MANUFACT FLASH_VENDMASK) 16)) {
ushort spus;
/* read sector protect/unprotect scheme */
@@ -1854,7 +1858,7 @@ static void flash_read_cfi (flash_info_t *info, void *buf,
p[i] = flash_read_uchar(info, start + i);
}
-void __flash_cmd_reset(flash_info_t *info)
+static void __flash_cmd_reset(flash_info_t *info)
{
/*
* We do not yet know what kind of commandset to use, so we issue
--
1.8.0
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