Re: [U-Boot] MAKEALL
first, please keep mailing list in CC. On Wed, 29 Jan 2014 12:56:55 +0530 JYOTI DUBEY wrote: > How can I compile u-boot for arm processor and nitrogen6x board? install armv7a cross toolchain and setup the environment for cross compiling, then run ./MAKEALL nitrogen6q There are another targets for nitrogen6 board variants with more DRAM and/or dual or solo CPU: nitrogen6q2g, nitrogen6dl, nitrogen6dl2g, nitrogen6s, nitrogen6s1g. So, use what is suitable for your board variant. HTH, Anatolij ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] fdt: rename IMAAGE_OF_BOARD_SETUP to IMAGE_OF_BOARD_SETUP
Signed-off-by: Masahiro Yamada Cc: Simon Glass --- common/image-fdt.c | 2 +- include/image.h| 4 ++-- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/common/image-fdt.c b/common/image-fdt.c index 6f9ce7d..a54a919 100644 --- a/common/image-fdt.c +++ b/common/image-fdt.c @@ -463,7 +463,7 @@ int image_setup_libfdt(bootm_headers_t *images, void *blob, return -1; } arch_fixup_memory_node(blob); - if (IMAAGE_OF_BOARD_SETUP) + if (IMAGE_OF_BOARD_SETUP) ft_board_setup(blob, gd->bd); fdt_fixup_ethernet(blob); diff --git a/include/image.h b/include/image.h index 7de2bb2..86c74f9 100644 --- a/include/image.h +++ b/include/image.h @@ -99,9 +99,9 @@ struct lmb; #endif #ifdef CONFIG_OF_BOARD_SETUP -# define IMAAGE_OF_BOARD_SETUP 1 +# define IMAGE_OF_BOARD_SETUP 1 #else -# define IMAAGE_OF_BOARD_SETUP 0 +# define IMAGE_OF_BOARD_SETUP 0 #endif /* -- 1.8.3.2 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] MAKEALL
On Wed, 29 Jan 2014 12:43:30 +0530 JYOTI DUBEY wrote: > What is the use of executing MAKEALL file available in u-boot folder? ./MAKEALL -h HTH, Anatolij ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] MAKEALL
What is the use of executing MAKEALL file available in u-boot folder? ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] ventana: Add Gateworks Ventana family support
Hi Tim, On 29.01.2014 02:26, Tim Harvey wrote: Regardless of what is loading the next level (u-boot.bin) the initial flashing of NAND is still currently handled only by kobs-ng so I'm not sure how this differs in this respect. I plan to look at adding the functionality of kobs-ng to u-boot at some point. If as I think kobs-ng is only a flasher, it does not take part to the build of U-Boot binaries. IMHO it should be not part of U-Boot sources, but maybe there are some features that can be interesting. I was not referring to making the code a part of uboot sources but adding the functionality that it provides such that one could use uboot to update itself on an IMX NAND device. I'm actually surprised nobody has done this before for IMX in general as its a bit inconvenient to boot to a linux based OS in order to run kobs-ng to flash the bootloader. Regardless, this would be functionality added later. That would be really convenient. Not having to boot Linux and to rely on kobs-ng for flashing U-Boot for NAND booting imx6. It appears the only other mainlined IMX6 bootloader to support NAND is the Titanium and there is no README for it at all. If there were, I would expect it to say pretty much the same thing that my proposed Ventana README states. There was a comment by Fabio on original titanium patch to include a README explaining how to flash and boot from NAND but it apparently didn't make it in: http://thread.gmane.org/gmane.comp.boot-loaders.u-boot/158436/focus=158441 I've added Stefan Roese and Fabio to the cc to hear their thoughts. Yes, your README seems correct to me. So for this README: Reviewed-by: Stefan Roese Thanks, Stefan ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 1/9] arc: add architecture header files
Hello Alexey,
Thanks for your patches, more or less just nitpicking comments ...
Am 29.01.2014 00:09, schrieb Alexey Brodkin:
Signed-off-by: Alexey Brodkin
No commit message, please add one. (Are this files from the Linux
kernel? If so please add a comment in the commit message + add a
hint which linux commit you used, thanks!)
Cc: Mischa Jonker
Cc: Francois Bedard
---
arch/arc/include/asm/arch-arc700/hardware.h | 0
arch/arc/include/asm/arcregs.h | 324
arch/arc/include/asm/bitops.h | 19 ++
arch/arc/include/asm/byteorder.h| 23 ++
arch/arc/include/asm/cache.h| 23 ++
arch/arc/include/asm/config.h | 12 ++
arch/arc/include/asm/errno.h| 1 +
arch/arc/include/asm/global_data.h | 19 ++
arch/arc/include/asm/io.h | 287
arch/arc/include/asm/posix_types.h | 73 +++
arch/arc/include/asm/processor.h| 0
arch/arc/include/asm/ptrace.h | 101 +
arch/arc/include/asm/sections.h | 1 +
arch/arc/include/asm/string.h | 0
arch/arc/include/asm/types.h| 55 +
arch/arc/include/asm/u-boot.h | 15 ++
arch/arc/include/asm/unaligned.h| 1 +
17 files changed, 954 insertions(+)
create mode 100644 arch/arc/include/asm/arch-arc700/hardware.h
create mode 100644 arch/arc/include/asm/arcregs.h
create mode 100644 arch/arc/include/asm/bitops.h
create mode 100644 arch/arc/include/asm/byteorder.h
create mode 100644 arch/arc/include/asm/cache.h
create mode 100644 arch/arc/include/asm/config.h
create mode 100644 arch/arc/include/asm/errno.h
create mode 100644 arch/arc/include/asm/global_data.h
create mode 100644 arch/arc/include/asm/io.h
create mode 100644 arch/arc/include/asm/posix_types.h
create mode 100644 arch/arc/include/asm/processor.h
create mode 100644 arch/arc/include/asm/ptrace.h
create mode 100644 arch/arc/include/asm/sections.h
create mode 100644 arch/arc/include/asm/string.h
create mode 100644 arch/arc/include/asm/types.h
create mode 100644 arch/arc/include/asm/u-boot.h
create mode 100644 arch/arc/include/asm/unaligned.h
diff --git a/arch/arc/include/asm/arch-arc700/hardware.h
b/arch/arc/include/asm/arch-arc700/hardware.h
new file mode 100644
index 000..e69de29
Empty file ?
diff --git a/arch/arc/include/asm/arcregs.h b/arch/arc/include/asm/arcregs.h
new file mode 100644
index 000..87b0a60
--- /dev/null
+++ b/arch/arc/include/asm/arcregs.h
@@ -0,0 +1,324 @@
+/*
+ * Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. All rights reserved.
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#ifndef _ASM_ARC_ARCREGS_H
+#define _ASM_ARC_ARCREGS_H
+
+#ifdef __KERNEL__
+
+/* Build Configuration Registers */
+#define ARC_REG_DCCMBASE_BCR 0x61/* DCCM Base Addr */
+#define ARC_REG_CRC_BCR0x62
+#define ARC_REG_DVFB_BCR 0x64
+#define ARC_REG_EXTARITH_BCR 0x65
+#define ARC_REG_VECBASE_BCR0x68
+#define ARC_REG_PERIBASE_BCR 0x69
+#define ARC_REG_FP_BCR 0x6B/* Single-Precision FPU */
+#define ARC_REG_DPFP_BCR 0x6C/* Dbl Precision FPU */
+#define ARC_REG_DCCM_BCR 0x74/* DCCM Present + SZ */
+#define ARC_REG_TIMERS_BCR 0x75
+#define ARC_REG_ICCM_BCR 0x78
+#define ARC_REG_XY_MEM_BCR 0x79
+#define ARC_REG_MAC_BCR0x7a
+#define ARC_REG_MUL_BCR0x7b
+#define ARC_REG_SWAP_BCR 0x7c
+#define ARC_REG_NORM_BCR 0x7d
+#define ARC_REG_MIXMAX_BCR 0x7e
+#define ARC_REG_BARREL_BCR 0x7f
+#define ARC_REG_D_UNCACH_BCR 0x6A
+
+/* status32 Bits Positions */
+#define STATUS_AE_BIT 5 /* Exception active */
+#define STATUS_DE_BIT 6 /* PC is in delay slot */
+#define STATUS_U_BIT 7 /* User/Kernel mode */
+#define STATUS_L_BIT 12 /* Loop inhibit */
+
+/* These masks correspond to the status word(STATUS_32) bits */
+#define STATUS_AE_MASK (1<
Bad comment style
+ * Inline ASM macros to read/write AUX Regs
+ * Essentially invocation of lr/sr insns from "C"
+ */
+
+#if 1
+
+#define read_aux_reg(reg) __builtin_arc_lr(reg)
+
+/* gcc builtin sr needs reg param to be long immediate */
+#define write_aux_reg(reg_immed, val) \
+ __builtin_arc_sr((unsigned int)val, reg_immed)
+
+#else
Please remove dead code ...
+
+#define read_aux_reg(reg) \
+({ \
+ unsigned int __ret; \
+ __asm__ __volatile__( \
+ " lr%0, [%1]"\
+ : "=r"(__ret) \
+ : "i"(reg)); \
+ __ret; \
+})
+
+/*
+ * Aux Reg address is specified as long immediate by caller
+ * e.g.
+ *write_aux_reg(0x69, some_val);
+ * T
[U-Boot] [PATCH] ARM: bcm2835: config.mk isn't needed
The entries in config.mk were needed so that U-Boot could be built with an old version of the Raspberry Pi Foundation's toolchain. Without them, the build would error out with: ...-ld: error: .../libgcc.a(_bswapsi2.o) uses VFP register arguments, u-boot does not However, none of the 3 toolchains in the latest version of their tools.git, nor the Ubuntu/Linaro ARM compilers in at least Ubuntu Quantal or Saucy, need these options set in order to compile a working U-Boot. Hence, remove the options for simplicity. Reported-by: Tom Rini Signed-off-by: Stephen Warren --- arch/arm/cpu/arm1176/bcm2835/config.mk | 19 --- 1 file changed, 19 deletions(-) delete mode 100644 arch/arm/cpu/arm1176/bcm2835/config.mk diff --git a/arch/arm/cpu/arm1176/bcm2835/config.mk b/arch/arm/cpu/arm1176/bcm2835/config.mk deleted file mode 100644 index b87ce24..000 --- a/arch/arm/cpu/arm1176/bcm2835/config.mk +++ /dev/null @@ -1,19 +0,0 @@ -# -# (C) Copyright 2012 Stephen Warren -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License -# version 2 as published by the Free Software Foundation. -# -# This program is distributed in the hope that it will be useful, but -# WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. - -# Don't attempt to override the target CPU/ABI options; -# the Raspberry Pi toolchain does the right thing by default. -PLATFORM_RELFLAGS := $(filter-out -msoft-float,$(PLATFORM_RELFLAGS)) -PLATFORM_CPPFLAGS := $(filter-out -march=armv5t,$(PLATFORM_CPPFLAGS)) -- 1.8.3.2 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] ARM: rpi_b: set $fdtfile in default environment
U-Boot names the Raspberry Pi board rpi_b. This means that the common
expression for DTB filename ${soc}-${board}.dtb expands to
bcm2835-rpi_b.dtb. However, the DTB generated by the Linux kernel is
bcm2835-rpi-b.dtb. Set $fdtfile in U-Boot's environment so that scripts
look for the correct DTB filename.
An alternative would be to rename the U-Boot board to rpi-b. However,
that change would be far more invasive, and end up affecting users (i.e
they'd have to change their U-Boot build commands).
Signed-off-by: Stephen Warren
---
include/configs/rpi_b.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/include/configs/rpi_b.h b/include/configs/rpi_b.h
index 0b7add7..976ceaa 100644
--- a/include/configs/rpi_b.h
+++ b/include/configs/rpi_b.h
@@ -123,6 +123,7 @@
"scriptaddr=0x\0" \
"kernel_addr_r=0x0100\0" \
"fdt_addr_r=0x0200\0" \
+ "fdtfile=bcm2835-rpi-b.dtb\0" \
"ramdisk_addr_r=0x0210\0" \
"boot_targets=mmc0\0" \
\
--
1.8.3.2
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[U-Boot] the definition of TEXT_BASE
Hello everyone, I begin my journey of u-boot recently and I got a lot of problems because I learn it by myself, so I really need helps of experts. This is also my first time to use the mailing list, so if I do something wrong or impolite, please tell me. This time my question is about the definition of TEXT_BASE. I want to know how to calculate the value of TEXT_BASE for a fixed board. I'm reading the bootloader for ARM920T and board SMDK2410. TEXT_BASE=0x33F80. The reason offered in the config.mk is : # # SMDK2410 has 1 bank of 64 MB DRAM # # 3000' to 3400' # # Linux-Kernel is expected to be at 3000'8000, entry 3000'8000 # optionally with a ramdisk at 3080' # # we load ourself to 33F8' # # download area is 3300' # I can't understand and look forward for any information as a help. Thanks for advance! Ming ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v7 0/38] Switch over to real Kbuild
Hello Gerhard, > Just a minor issue: Given that your work on the build > infrastructure touches rather many parts of the tree (and thus > might easily conflict with other regular development), and that And sadly v7 does not apply again. :-( I will post v8. (It will not have any special update. Just rebasing.) > "current master" is a moving target -- may I suggest that you > mention the specific commit that you rebase against, in the > absence of tags between releases? Going forward I will do this. Thanks! Best Regards Masahiro Yamada ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v7 38/38] tools/env: cross-compile fw_printenv without setting HOSTCC
Hello Gerhard. > It's a little funny that the build progress says "HOSTCC" while > it does a cross build, but agree that this is mere cosmetics and > results from the development history of the tool's use scenario. I have to admit I compromised on this matter. I did not want to add many build rules just for fixing the cosmetic appearance.. Best Regards Masahiro Yamada ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v7 0/38] Switch over to real Kbuild
Hello Gerhard.
> I really should have provided this earlier. Wanted to run some
> more ARM tests, but haven't taken the time yet and did not want
> to further delay my "tested by" feedback.
>
> Have run-tested v5 and v7 on PowerPC based hardware, and
> build-tested other iterations of the patch set.
>
> Tested-by: Gerhard Sittig
>
> The test was done for MPC5121 on an ifm AC14xx board; the U-Boot
> binary works as expected, the fw_printenv(1) tool can be cross
> built as well as native, out-of-source builds work perfectly (and
> allow to identify where the source resides -- yay!).
Your close test is highly appreciated. Thanks!!
I will add your Tested-by creadit to 17/38, 21/38, 38/38
when I post v8.
I will also add your run-time test report to the cover letter of v8.
Run-time test report for another board:
I am testing with Xilinx Zynq ZC706 board.
("zynq_zc70x" entry in boards.cfg)
It is working as I expect and I also confirmed it can correctly boot
Linux Kernel.
Best Regards
Masahiro Yamada
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Re: [U-Boot] [PATCH] ventana: Add Gateworks Ventana family support
On Tue, Jan 28, 2014 at 2:20 AM, Stefano Babic wrote:
> Hi Tim,
>
> On 28/01/2014 00:36, Tim Harvey wrote:
>
diff --git a/board/gateworks/gw_ventana/README
b/board/gateworks/gw_ventana/README
new file mode 100644
index 000..9de55ba
--- /dev/null
+++ b/board/gateworks/gw_ventana/README
@@ -0,0 +1,49 @@
+U-Boot for the Gateworks Ventana Product Family boards
+
+This file contains information for the port of U-Boot to the Gateworks
+Ventana Product family boards.
+
+1. Boot source, boot from NAND
+--
+
+The i.MX6 BOOT ROM expects some headers that provide details of NAND
layout
+and bad block information (referred to as 'bootstreams') which are
replicated
+multiple times in NAND.
The number of replications is configurable through
+board strapping options and eFUSE settings. The Freescale 'kobs-ng'
+application from the Freescale LTIB BSP, which runs under Linux, must be
used
+to program the bootstream in order to setup the replicated headers
correctly.
>>>
>>> The behavior is quite different as we have currently in mainline. With
>>> kobs-ng you flash u-boot.bin, while the result image for i.MXes in
>>> mailine is u-boot.imx (u-boot.bin with imx header).
>>
>> I'm not familiar with the IMX family other than IMX6 but for IMX6
>> kobs-ng does use u-boot.imx and not u-boot.bin. kobs needs the
>> headers which are not part of u-boot.bin. Are you sure you are not
>> mistaken here? Can you point me to some references?
>
> I think there is a misunderstanding due to the usage of "headers". What
> do you mean with headers here ? As you talk about BOOT ROM, the only
> header that the ROM understands is the i.MX image header, that is the
> description of the image itself with the DCD and all that stuff. When
> you say that kobs-ng needs "headers", it seems you are talking about .h
> files,
I should not have used the word 'header'.
I _am_ talking about the Image Vector Table (IVT) and Device
Configuration Data (DCD) data structures that the IMX6 BOOT ROM needs
to boot and which are present in u-boot.imx. The kobs-ng (at least
for IMX6) needs u-boot.imx because it contains these structures built
from imximage and it must flash them onto the boot media.
>
> As far as I know, kobs-ng is a flasher - a utility to install u-boot on
> the target. It is not the only method to install the binary. I think you
> should rework the text making the statements more clearer.
Can you re-read the README instructions? Other than the bad link I
feel they are very clear. I think perhaps your thinking that I was in
error specifying that kobs-ng needing u-boot.imx added to some
confusion?
>
>> Regardless of what is loading the next level (u-boot.bin) the initial
>> flashing of NAND is still currently handled only by kobs-ng so I'm not
>> sure how this differs in this respect. I plan to look at adding the
>> functionality of kobs-ng to u-boot at some point.
>
> If as I think kobs-ng is only a flasher, it does not take part to the
> build of U-Boot binaries. IMHO it should be not part of U-Boot sources,
> but maybe there are some features that can be interesting.
>
I was not referring to making the code a part of uboot sources but
adding the functionality that it provides such that one could use
uboot to update itself on an IMX NAND device. I'm actually surprised
nobody has done this before for IMX in general as its a bit
inconvenient to boot to a linux based OS in order to run kobs-ng to
flash the bootloader. Regardless, this would be functionality added
later.
It appears the only other mainlined IMX6 bootloader to support NAND is
the Titanium and there is no README for it at all. If there were, I
would expect it to say pretty much the same thing that my proposed
Ventana README states. There was a comment by Fabio on original
titanium patch to include a README explaining how to flash and boot
from NAND but it apparently didn't make it in:
http://thread.gmane.org/gmane.comp.boot-loaders.u-boot/158436/focus=158441
I've added Stefan Roese and Fabio to the cc to hear their thoughts.
+ * retries.
+ */
+int gsc_i2c_read(uchar chip, uint addr, int alen, uchar *buf, int len)
+{
+ int retry = 3;
+ int n = 0;
+ int ret;
+
+ while (n++ < retry) {
+ ret = i2c_read(chip, addr, alen, buf, len);
+ if (!ret)
+ break;
+ printf("%s: 0x%02x 0x%02x retry%d: %d\n", __func__, chip,
addr,
+n, ret);
+ if (ret != -ENODEV)
+ break;
+ mdelay(10);
+ }
>>>
>>> Whcih is the benefit of trying three times ?
>>
>> it provides a little more redundancy than 2 times, and a little less than 4
>> ;)
>
> As there is no guarantee that works, but it is only statisti
Re: [U-Boot] eMMC boot partition booting and SMDK5250 support
Jaehoon, How you think? On 29/01/14 04:31, Tom Rini wrote: > On Tue, Jan 28, 2014 at 12:25:02PM -0500, Tom Rini wrote: >> Hey guys, >> >> I've posted a patch to support the eMMC boot partitions found on the TI >> DRA7xx EVM the other day, and I've been looking at what exactly happens >> with the 'mmc open ...' and 'mmc close ...' commands the >> CONFIG_SUPPORT_EMMC_BOOT enables. I've got a few questions about how >> exactly the support works on the SMDK5250 and what your platform >> requirements are, so we can re-work the code to be a bit more generic. >> >> Why do we have it as "open" and "close" ? Is this because it's a >> version 4.2[1] style device? I'm working with 4.3-compatible (it's >> actually 4.41, but same method just larger partitions) one and that can >> be done with setting EXT_CSD[179] (BOOT_CONFIG / Boot configuration) _and_ >> EXT_CSD[177] to a specific and different value than we've hard-coded >> now. >> >> I would like to change things to be: >> "mmc open " - Note required for eMMC 4.2 boot method. >> "mmc close " - Same >> "mmc bootpart " - Used for eMMC 4.3 and later boot >> sequence option 1/2 >> "mmc bootbus " - Note used in all boot sequences >> >> This would make the SMDK5250 sequence be (based on how I think it works >> today): >> mmc dev ... >> mmc open >> mmc write ... >> mmc bootpart ... >> mmc bootbus ... >> mmc close >> >> And the DRA7xx sequence be: >> mmc dev ... >> mmc write ... >> mmc bootpart ... >> mmc bootbus ... > > Oh! And I forgot the current 'bootpart' which appears to be a resize > operation would become 'bootpart-resize'. > ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [RFC] [PATCH] omap3_beagle: fdt: xMA/B set hsusb2_power_reg active-high
With the xM revision C, the DC control of the usb hub was inverted.
By adding the enable-active-high property to hsusb2_power_reg, mainline
omap3-beagle-xm.dtb
will now activiate properly activate the usb hub on older xMA/B varients.
Signed-off-by: Robert Nelson
CC: Tom Rini
---
include/configs/omap3_beagle.h | 4
1 file changed, 4 insertions(+)
diff --git a/include/configs/omap3_beagle.h b/include/configs/omap3_beagle.h
index c58bc91..d7d63ce 100644
--- a/include/configs/omap3_beagle.h
+++ b/include/configs/omap3_beagle.h
@@ -249,6 +249,9 @@
"setenv fdtfile omap3-beagle-xm.dtb; fi; " \
"if test $fdtfile = undefined; then " \
"echo WARNING: Could not determine device tree to use;
fi; \0" \
+ "fixfdt=" \
+ "if test $beaglerev = xMAB; then " \
+ "fdt addr ${fdtaddr}; fdt resize; fdt set
/hsusb2_power_reg enable-active-high; fi; \0" \
"bootenv=uEnv.txt\0" \
"loadbootenv=fatload mmc ${mmcdev} ${loadaddr} ${bootenv}\0" \
"importbootenv=echo Importing environment from mmc ...; " \
@@ -308,6 +311,7 @@
"setenv bootfile zImage;" \
"if run loadimage; then " \
"run loadfdt;" \
+ "run fixfdt;" \
"run mmcbootz; " \
"fi; " \
--
1.8.5.3
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[U-Boot] [PATCH 8/9] arc: add architecture to MAKEALL
Signed-off-by: Alexey Brodkin
Cc: Mischa Jonker
Cc: Francois Bedard
---
MAKEALL | 6 ++
1 file changed, 6 insertions(+)
diff --git a/MAKEALL b/MAKEALL
index 562071a..54b0d89 100755
--- a/MAKEALL
+++ b/MAKEALL
@@ -529,6 +529,12 @@ LIST_sparc="$(targets_by_arch sparc)"
LIST_nds32="$(targets_by_arch nds32)"
+#
+## ARC Systems
+#
+
+LIST_arc="$(targets_by_arch arc)"
+
#---
get_target_location() {
--
1.8.5.3
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[U-Boot] [PATCH 6/9] arc: add Arcangel4 board support
Prerequisite is http://patchwork.ozlabs.org/patch/300901/
Signed-off-by: Alexey Brodkin
Cc: Mischa Jonker
Cc: Francois Bedard
---
board/synopsys/arcangel4/Makefile| 7 +++
board/synopsys/arcangel4/arcangel4.c | 25 ++
boards.cfg | 1 +
include/configs/arcangel4.h | 96
4 files changed, 129 insertions(+)
create mode 100644 board/synopsys/arcangel4/Makefile
create mode 100644 board/synopsys/arcangel4/arcangel4.c
create mode 100644 include/configs/arcangel4.h
diff --git a/board/synopsys/arcangel4/Makefile
b/board/synopsys/arcangel4/Makefile
new file mode 100644
index 000..f849750
--- /dev/null
+++ b/board/synopsys/arcangel4/Makefile
@@ -0,0 +1,7 @@
+#
+# Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+obj-y += arcangel4.o
diff --git a/board/synopsys/arcangel4/arcangel4.c
b/board/synopsys/arcangel4/arcangel4.c
new file mode 100644
index 000..e2ffcd0
--- /dev/null
+++ b/board/synopsys/arcangel4/arcangel4.c
@@ -0,0 +1,25 @@
+/*
+ * Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include
+
+DECLARE_GLOBAL_DATA_PTR;
+
+int board_early_init_f(void)
+{
+ gd->cpu_clk = CONFIG_SYS_CLK_FREQ;
+ gd->ram_size = CONFIG_SYS_SDRAM_SIZE;
+
+ return 0;
+}
+
+int board_early_init_r(void)
+{
+ gd->bd->bi_memstart = CONFIG_SYS_SDRAM_BASE;
+ gd->bd->bi_memsize = CONFIG_SYS_SDRAM_SIZE;
+
+ return 0;
+}
diff --git a/boards.cfg b/boards.cfg
index 2dfd2b4..41269fe 100644
--- a/boards.cfg
+++ b/boards.cfg
@@ -1229,6 +1229,7 @@ Active sparc leon3 - gaisler
-
Active sparc leon3 - gaisler -
gr_xc3s_1500 -
-
Active sparc leon3 - gaisler -
grsim-
-
Active x86 x86corebootchromebook-x86 coreboot
coreboot-x86 coreboot:SYS_TEXT_BASE=0x0111
-
+Active arc arc700 - synopsysarcangel4
arcangel4-
Alexey Brodkin
Orphan arm arm1136mx31- imx31_phycore
imx31_phycore_eetimx31_phycore:IMX31_PHYCORE_EET
(resigned) Guennadi Liakhovetski
Orphan arm arm1136mx31freescale -
mx31ads -
(resigned) Guennadi Liakhovetski
Orphan arm pxa- - -
lubbock -
(dead address) Kyle Harris
diff --git a/include/configs/arcangel4.h b/include/configs/arcangel4.h
new file mode 100644
index 000..3d415a0
--- /dev/null
+++ b/include/configs/arcangel4.h
@@ -0,0 +1,96 @@
+/*
+ * Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#ifndef _CONFIG_ARCANGEL4_H_
+#define _CONFIG_ARCANGEL4_H_
+
+/*
+ * CPU configuration
+ */
+#define CONFIG_ARC700
+#define CONFIG_ARC_MMU_VER 3
+#define CONFIG_SYS_CACHELINE_SIZE 64
+#define CONFIG_SYS_CLK_FREQ7000
+#define CONFIG_SYS_TIMER_RATE CONFIG_SYS_CLK_FREQ
+
+/*
+ * Board configuration
+ */
+#define CONFIG_SYS_GENERIC_BOARD
+#define CONFIG_SKIP_LOWLEVEL_INIT /* U-Boot is in RAM already */
+
+#define CONFIG_BOARD_EARLY_INIT_F
+#define CONFIG_BOARD_EARLY_INIT_R
+
+/*
+ * Memory configuration
+ */
+#define CONFIG_SYS_TEXT_BASE 0x8100
+#define CONFIG_SYS_MONITOR_BASECONFIG_SYS_TEXT_BASE
+
+#define CONFIG_SYS_DDR_SDRAM_BASE 0x8000
+#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE
+#define CONFIG_SYS_SDRAM_SIZE 0x1000 /* 256 Mb */
+
+#define CONFIG_SYS_INIT_SP_ADDR\
+ (CONFIG_SYS_SDRAM_BASE + 0x1000 - GENERATED_GBL_DATA_SIZE)
+
+#define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRA
[U-Boot] [PATCH 4/9] arc: bdinfo and image support
Signed-off-by: Alexey Brodkin
Cc: Mischa Jonker
Cc: Francois Bedard
---
common/cmd_bdinfo.c | 18 ++
common/image.c | 1 +
include/image.h | 1 +
3 files changed, 20 insertions(+)
diff --git a/common/cmd_bdinfo.c b/common/cmd_bdinfo.c
index 713de14..15119a7 100644
--- a/common/cmd_bdinfo.c
+++ b/common/cmd_bdinfo.c
@@ -517,6 +517,24 @@ int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char *
const argv[])
return 0;
}
+#elif defined(CONFIG_ARC700)
+
+int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+{
+ bd_t *bd = gd->bd;
+
+ print_num("mem start", bd->bi_memstart);
+ print_lnum("mem size", bd->bi_memsize);
+
+#if defined(CONFIG_CMD_NET)
+ print_eth(0);
+ printf("ip_addr = %s\n", getenv("ipaddr"));
+#endif
+ printf("baudrate= %d bps\n", bd->bi_baudrate);
+
+ return 0;
+}
+
#else
#error "a case for this architecture does not exist!"
#endif
diff --git a/common/image.c b/common/image.c
index ae95c3f..9c6bec5 100644
--- a/common/image.c
+++ b/common/image.c
@@ -82,6 +82,7 @@ static const table_entry_t uimage_arch[] = {
{ IH_ARCH_OPENRISC, "or1k", "OpenRISC 1000",},
{ IH_ARCH_SANDBOX,"sandbox", "Sandbox", },
{ IH_ARCH_ARM64, "arm64","AArch64", },
+ { IH_ARCH_ARC,"arc", "ARC", },
{ -1, "", "", },
};
diff --git a/include/image.h b/include/image.h
index 7de2bb2..3ba8c2e 100644
--- a/include/image.h
+++ b/include/image.h
@@ -157,6 +157,7 @@ struct lmb;
#define IH_ARCH_NDS32 20 /* ANDES Technology - NDS32 */
#define IH_ARCH_OPENRISC21 /* OpenRISC 1000 */
#define IH_ARCH_ARM64 22 /* ARM64*/
+#define IH_ARCH_ARC23 /* Synopsys DesignWare ARC */
/*
* Image Types
--
1.8.5.3
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 7/9] arc: add AXS101 board support
Signed-off-by: Alexey Brodkin
Cc: Mischa Jonker
Cc: Francois Bedard
---
board/synopsys/axs101/Makefile | 8 ++
board/synopsys/axs101/axs101.c | 61 +++
board/synopsys/axs101/nand.c | 224 +
boards.cfg | 1 +
include/configs/axs101.h | 194 +++
5 files changed, 488 insertions(+)
create mode 100644 board/synopsys/axs101/Makefile
create mode 100644 board/synopsys/axs101/axs101.c
create mode 100644 board/synopsys/axs101/nand.c
create mode 100644 include/configs/axs101.h
diff --git a/board/synopsys/axs101/Makefile b/board/synopsys/axs101/Makefile
new file mode 100644
index 000..f0965f7
--- /dev/null
+++ b/board/synopsys/axs101/Makefile
@@ -0,0 +1,8 @@
+#
+# Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+obj-y += axs101.o
+obj-$(CONFIG_CMD_NAND) += nand.o
diff --git a/board/synopsys/axs101/axs101.c b/board/synopsys/axs101/axs101.c
new file mode 100644
index 000..93e44dd
--- /dev/null
+++ b/board/synopsys/axs101/axs101.c
@@ -0,0 +1,61 @@
+/*
+ * Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+
+DECLARE_GLOBAL_DATA_PTR;
+
+int board_early_init_f(void)
+{
+ gd->cpu_clk = CONFIG_SYS_CLK_FREQ;
+ gd->ram_size = CONFIG_SYS_SDRAM_SIZE;
+
+ return 0;
+}
+
+int board_early_init_r(void)
+{
+ gd->bd->bi_memstart = CONFIG_SYS_SDRAM_BASE;
+ gd->bd->bi_memsize = CONFIG_SYS_SDRAM_SIZE;
+
+ return 0;
+}
+
+int board_mmc_init(bd_t *bis)
+{
+ struct dwmci_host *host = NULL;
+
+ host = malloc(sizeof(struct dwmci_host));
+ if (!host) {
+ printf("dwmci_host malloc fail!\n");
+ return 1;
+ }
+
+ memset(host, 0, sizeof(struct dwmci_host));
+ host->name = "Synopsys Mobile storage";
+ host->ioaddr = (void *)ARC_DWMMC_BASE;
+ host->buswidth = 4;
+ host->dev_index = 0;
+ host->bus_hz = 2500;
+
+ add_dwmci(host, 5200, 40);
+
+ return 0;
+}
+
+int board_eth_init(bd_t *bis)
+{
+ if (designware_initialize(0, ARC_DWGMAC_BASE, 0,
+ PHY_INTERFACE_MODE_RGMII) >= 0)
+ return 1;
+
+ return 0;
+}
diff --git a/board/synopsys/axs101/nand.c b/board/synopsys/axs101/nand.c
new file mode 100644
index 000..9667080
--- /dev/null
+++ b/board/synopsys/axs101/nand.c
@@ -0,0 +1,224 @@
+/*
+ * Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include
+#include
+#include
+#include
+#include
+
+#define BUS_WIDTH 8 /* AXI data bus width in bytes */
+
+/* DMA buffer descriptor bits & masks */
+#define BD_STAT_OWN(1 << 31)
+#define BD_STAT_BD_FIRST (1 << 3)
+#define BD_STAT_BD_LAST(1 << 2)
+#define BD_SIZES_BUFFER1_MASK 0xfff
+
+#define BD_STAT_BD_COMPLETE(BD_STAT_BD_FIRST | BD_STAT_BD_LAST)
+
+/* Controller command flags */
+#define B_WFR (1 << 19) /* 1b - Wait for ready */
+#define B_LC (1 << 18) /* 1b - Last cycle */
+#define B_IWC (1 << 13) /* 1b - Interrupt when complete */
+
+/* NAND cycle types */
+#define B_CT_ADDRESS (0x0 << 16) /* Address operation*/
+#define B_CT_COMMAND (0x1 << 16) /* Command operation*/
+#define B_CT_WRITE (0x2 << 16) /* Write operation */
+#define B_CT_READ (0x3 << 16) /* Write operation */
+
+enum nand_isr_t {
+ NAND_ISR_DATAREQUIRED = 0,
+ NAND_ISR_TXUNDERFLOW,
+ NAND_ISR_TXOVERFLOW,
+ NAND_ISR_DATAAVAILABLE,
+ NAND_ISR_RXUNDERFLOW,
+ NAND_ISR_RXOVERFLOW,
+ NAND_ISR_TXDMACOMPLETE,
+ NAND_ISR_RXDMACOMPLETE,
+ NAND_ISR_DESCRIPTORUNAVAILABLE,
+ NAND_ISR_CMDDONE,
+ NAND_ISR_CMDAVAILABLE,
+ NAND_ISR_CMDERROR,
+ NAND_ISR_DATATRANSFEROVER,
+ NAND_ISR_NONE
+};
+
+enum nand_regs_t {
+ AC_FIFO = 0,/* address and command fifo */
+ IDMAC_BDADDR = 0x18,/* idmac descriptor list base address */
+ INT_STATUS = 0x118, /* interrupt status register */
+ INT_CLR_STATUS = 0x120, /* interrupt clear status register */
+};
+
+struct nand_bd {
+ uint32_t status;/* DES0 */
+ uint32_t sizes; /* DES1 */
+ uint32_t buffer_ptr0; /* DES2 */
+ uint32_t buffer_ptr1; /* DES3 */
+};
+
+#define NAND_REG_WRITE(r, v) writel(v, CONFIG_SYS_NAND_BASE + r)
+#define NAND_REG_READ(r) readl(CONFIG_SYS_NAND_BASE + r)
+
+static struct nand_bd *bd; /* DMA buffer descriptors */
+
+/**
+ * axs101_nand_write_buf - write buffer to chip
+ * @mtd: MTD device structure
[U-Boot] [PATCH 9/9] arc: add README for architecture
Signed-off-by: Alexey Brodkin Cc: Mischa Jonker Cc: Francois Bedard --- doc/README.ARC | 27 +++ 1 file changed, 27 insertions(+) create mode 100644 doc/README.ARC diff --git a/doc/README.ARC b/doc/README.ARC new file mode 100644 index 000..5f414fb --- /dev/null +++ b/doc/README.ARC @@ -0,0 +1,27 @@ +Synopsys' DesignWare(r) ARC(r) Processors are a family of 32-bit CPUs +that SoC designers can optimize for a wide range of uses, from deeply embedded +to high-performance host applications. + +More information on ARC cores avaialble here: +http://www.synopsys.com/IP/ProcessorIP/ARCProcessors/Pages/default.aspx + +Designers can differentiate their products by using patented configuration +technology to tailor each ARC processor instance to meet specific performance, +power and area requirements. + +The DesignWare ARC processors are also extendable, allowing designers to add +their own custom instructions that dramatically increase performance. + +Synopsys' ARC processors have been used by over 170 customers worldwide who +collectively ship more than 1 billion ARC-based chips annually. + +All DesignWare ARC processors utilize a 16-/32-bit ISA that provides excellent +performance and code density for embedded and host SoC applications. + +The RISC microprocessors are synthesizable and can be implemented in any foundry +or process, and are supported by a complete suite of development tools. + +The ARC GNU toolchain with support for all ARC Processors can be downloaded +from here (available pre-built toolchains as well): + +https://github.com/foss-for-synopsys-dwc-arc-processors/toolchain/releases -- 1.8.5.3 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 5/9] arc: add support for standalone programs
Signed-off-by: Alexey Brodkin Cc: Mischa Jonker Cc: Francois Bedard --- examples/standalone/stubs.c | 13 + 1 file changed, 13 insertions(+) diff --git a/examples/standalone/stubs.c b/examples/standalone/stubs.c index 32a19ce..9346bc2 100644 --- a/examples/standalone/stubs.c +++ b/examples/standalone/stubs.c @@ -210,6 +210,19 @@ gd_t *global_data; " l.jrr13\n" \ " l.nop\n"\ : : "i"(offsetof(gd_t, jt)), "i"(XF_ ## x * sizeof(void *)) : "r13"); +#elif defined(CONFIG_ARC) +/* + * r25 holds the pointer to the global_data. r10 is call clobbered. + */ +#define EXPORT_FUNC(x) \ + asm volatile( \ +" .align 4\n" \ +" .globl " #x "\n" \ +#x ":\n" \ +" ld %%r10, [%%r25, %0]\n" \ +" ld %%r10, [%%r10, %1]\n" \ +" j [%%r10]\n" \ + : : "i"(offsetof(gd_t, jt)), "i"(XF_ ## x * sizeof(void *)) : "r10"); #else /*"addi$sp, $sp, -24\n"\ " br $r16\n" \*/ -- 1.8.5.3 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 3/9] arc: add library functions
Signed-off-by: Alexey Brodkin
Cc: Mischa Jonker
Cc: Francois Bedard
---
arch/arc/lib/Makefile | 9
arch/arc/lib/bootm.c| 106
arch/arc/lib/relocate.c | 74 +
arch/arc/lib/sections.c | 21 ++
4 files changed, 210 insertions(+)
create mode 100644 arch/arc/lib/Makefile
create mode 100644 arch/arc/lib/bootm.c
create mode 100644 arch/arc/lib/relocate.c
create mode 100644 arch/arc/lib/sections.c
diff --git a/arch/arc/lib/Makefile b/arch/arc/lib/Makefile
new file mode 100644
index 000..6420cf2
--- /dev/null
+++ b/arch/arc/lib/Makefile
@@ -0,0 +1,9 @@
+#
+# Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+obj-y += sections.o
+obj-y += relocate.o
+obj-$(CONFIG_CMD_BOOTM) += bootm.o
diff --git a/arch/arc/lib/bootm.c b/arch/arc/lib/bootm.c
new file mode 100644
index 000..d185a50
--- /dev/null
+++ b/arch/arc/lib/bootm.c
@@ -0,0 +1,106 @@
+/*
+ * Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include
+
+DECLARE_GLOBAL_DATA_PTR;
+
+static ulong get_sp(void)
+{
+ ulong ret;
+
+ asm("mov %0, sp" : "=r"(ret) : );
+ return ret;
+}
+
+void arch_lmb_reserve(struct lmb *lmb)
+{
+ ulong sp;
+
+ /*
+* Booting a (Linux) kernel image
+*
+* Allocate space for command line and board info - the
+* address should be as high as possible within the reach of
+* the kernel (see CONFIG_SYS_BOOTMAPSZ settings), but in unused
+* memory, which means far enough below the current stack
+* pointer.
+*/
+ sp = get_sp();
+ debug("## Current stack ends at 0x%08lx ", sp);
+
+ /* adjust sp by 4K to be safe */
+ sp -= 4096;
+ lmb_reserve(lmb, sp, (CONFIG_SYS_SDRAM_BASE + gd->ram_size - sp));
+}
+
+static int cleanup_before_linux(void)
+{
+ disable_interrupts();
+ flush_dcache_all();
+ invalidate_icache_all();
+
+ return 0;
+}
+
+/* Subcommand: PREP */
+static void boot_prep_linux(bootm_headers_t *images)
+{
+ if (image_setup_linux(images))
+ hang();
+}
+
+/* Subcommand: GO */
+static void boot_jump_linux(bootm_headers_t *images, int flag)
+{
+ void (*kernel_entry)(int zero, int arch, uint params);
+ unsigned int r0, r2;
+ int fake = (flag & BOOTM_STATE_OS_FAKE_GO);
+
+ kernel_entry = (void (*)(int, int, uint))images->ep;
+
+ debug("## Transferring control to Linux (at address %08lx)...\n",
+ (ulong) kernel_entry);
+ bootstage_mark(BOOTSTAGE_ID_RUN_OS);
+
+ printf("\nStarting kernel ...%s\n\n", fake ?
+ "(fake run for tracing)" : "");
+ bootstage_mark_name(BOOTSTAGE_ID_BOOTM_HANDOFF, "start_kernel");
+
+ cleanup_before_linux();
+
+ if (IMAGE_ENABLE_OF_LIBFDT && images->ft_len) {
+ r0 = 2;
+ r2 = (unsigned int)images->ft_addr;
+ } else {
+ r0 = 1;
+ r2 = (unsigned int)getenv("bootargs");
+ }
+
+ if (!fake)
+ kernel_entry(r0, 0, r2);
+}
+
+int do_bootm_linux(int flag, int argc, char *argv[], bootm_headers_t *images)
+{
+ /* No need for those on ARC */
+ if ((flag & BOOTM_STATE_OS_BD_T) || (flag & BOOTM_STATE_OS_CMDLINE))
+ return -1;
+
+ if (flag & BOOTM_STATE_OS_PREP) {
+ boot_prep_linux(images);
+ return 0;
+ }
+
+ if (flag & (BOOTM_STATE_OS_GO | BOOTM_STATE_OS_FAKE_GO)) {
+ boot_jump_linux(images, flag);
+ return 0;
+ }
+
+ boot_prep_linux(images);
+ boot_jump_linux(images, flag);
+ return 0;
+}
diff --git a/arch/arc/lib/relocate.c b/arch/arc/lib/relocate.c
new file mode 100644
index 000..710b792
--- /dev/null
+++ b/arch/arc/lib/relocate.c
@@ -0,0 +1,74 @@
+/*
+ * Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include
+#include
+#include
+
+DECLARE_GLOBAL_DATA_PTR;
+
+extern char __text_end[];
+
+/*
+ * Base functionality is taken from x86 version with added ARC-specifics
+ */
+int do_elf_reloc_fixups(void)
+{
+ Elf32_Rela *re_src = (Elf32_Rela *)(&__rel_dyn_start);
+ Elf32_Rela *re_end = (Elf32_Rela *)(&__rel_dyn_end);
+
+ Elf32_Addr *offset_ptr_rom, *last_offset = NULL;
+ Elf32_Addr *offset_ptr_ram;
+
+ do {
+ /* Get the location from the relocation entry */
+ offset_ptr_rom = (Elf32_Addr *)re_src->r_offset;
+
+ /* Check that the location of the relocation is in .text */
+ if (offset_ptr_rom >= (Elf32_Addr *)CONFIG_SYS_TEXT_BASE &&
+ offset_ptr_rom > last_offset) {
+ unsigned int val;
+ /* Switch to the in-RAM version */
+
[U-Boot] [PATCH 1/9] arc: add architecture header files
Signed-off-by: Alexey Brodkin
Cc: Mischa Jonker
Cc: Francois Bedard
---
arch/arc/include/asm/arch-arc700/hardware.h | 0
arch/arc/include/asm/arcregs.h | 324
arch/arc/include/asm/bitops.h | 19 ++
arch/arc/include/asm/byteorder.h| 23 ++
arch/arc/include/asm/cache.h| 23 ++
arch/arc/include/asm/config.h | 12 ++
arch/arc/include/asm/errno.h| 1 +
arch/arc/include/asm/global_data.h | 19 ++
arch/arc/include/asm/io.h | 287
arch/arc/include/asm/posix_types.h | 73 +++
arch/arc/include/asm/processor.h| 0
arch/arc/include/asm/ptrace.h | 101 +
arch/arc/include/asm/sections.h | 1 +
arch/arc/include/asm/string.h | 0
arch/arc/include/asm/types.h| 55 +
arch/arc/include/asm/u-boot.h | 15 ++
arch/arc/include/asm/unaligned.h| 1 +
17 files changed, 954 insertions(+)
create mode 100644 arch/arc/include/asm/arch-arc700/hardware.h
create mode 100644 arch/arc/include/asm/arcregs.h
create mode 100644 arch/arc/include/asm/bitops.h
create mode 100644 arch/arc/include/asm/byteorder.h
create mode 100644 arch/arc/include/asm/cache.h
create mode 100644 arch/arc/include/asm/config.h
create mode 100644 arch/arc/include/asm/errno.h
create mode 100644 arch/arc/include/asm/global_data.h
create mode 100644 arch/arc/include/asm/io.h
create mode 100644 arch/arc/include/asm/posix_types.h
create mode 100644 arch/arc/include/asm/processor.h
create mode 100644 arch/arc/include/asm/ptrace.h
create mode 100644 arch/arc/include/asm/sections.h
create mode 100644 arch/arc/include/asm/string.h
create mode 100644 arch/arc/include/asm/types.h
create mode 100644 arch/arc/include/asm/u-boot.h
create mode 100644 arch/arc/include/asm/unaligned.h
diff --git a/arch/arc/include/asm/arch-arc700/hardware.h
b/arch/arc/include/asm/arch-arc700/hardware.h
new file mode 100644
index 000..e69de29
diff --git a/arch/arc/include/asm/arcregs.h b/arch/arc/include/asm/arcregs.h
new file mode 100644
index 000..87b0a60
--- /dev/null
+++ b/arch/arc/include/asm/arcregs.h
@@ -0,0 +1,324 @@
+/*
+ * Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. All rights reserved.
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#ifndef _ASM_ARC_ARCREGS_H
+#define _ASM_ARC_ARCREGS_H
+
+#ifdef __KERNEL__
+
+/* Build Configuration Registers */
+#define ARC_REG_DCCMBASE_BCR 0x61/* DCCM Base Addr */
+#define ARC_REG_CRC_BCR0x62
+#define ARC_REG_DVFB_BCR 0x64
+#define ARC_REG_EXTARITH_BCR 0x65
+#define ARC_REG_VECBASE_BCR0x68
+#define ARC_REG_PERIBASE_BCR 0x69
+#define ARC_REG_FP_BCR 0x6B/* Single-Precision FPU */
+#define ARC_REG_DPFP_BCR 0x6C/* Dbl Precision FPU */
+#define ARC_REG_DCCM_BCR 0x74/* DCCM Present + SZ */
+#define ARC_REG_TIMERS_BCR 0x75
+#define ARC_REG_ICCM_BCR 0x78
+#define ARC_REG_XY_MEM_BCR 0x79
+#define ARC_REG_MAC_BCR0x7a
+#define ARC_REG_MUL_BCR0x7b
+#define ARC_REG_SWAP_BCR 0x7c
+#define ARC_REG_NORM_BCR 0x7d
+#define ARC_REG_MIXMAX_BCR 0x7e
+#define ARC_REG_BARREL_BCR 0x7f
+#define ARC_REG_D_UNCACH_BCR 0x6A
+
+/* status32 Bits Positions */
+#define STATUS_AE_BIT 5 /* Exception active */
+#define STATUS_DE_BIT 6 /* PC is in delay slot */
+#define STATUS_U_BIT 7 /* User/Kernel mode */
+#define STATUS_L_BIT 12 /* Loop inhibit */
+
+/* These masks correspond to the status word(STATUS_32) bits */
+#define STATUS_AE_MASK (1<> 10)
+#define TO_MB(bytes) (TO_KB(bytes) >> 10)
+#define PAGES_TO_KB(n_pages) ((n_pages) << (PAGE_SHIFT - 10))
+#define PAGES_TO_MB(n_pages) (PAGES_TO_KB(n_pages) >> 10)
+
+#ifdef CONFIG_ARC_FPU_SAVE_RESTORE
+/* These DPFP regs need to be saved/restored across ctx-sw */
+struct arc_fpu {
+ struct {
+ unsigned int l, h;
+ } aux_dpfp[2];
+};
+#endif
+
+/*
+ ***
+ * Build Configuration Registers, with encoded hardware config
+ */
+struct bcr_identity {
+#ifdef CONFIG_CPU_BIG_ENDIAN
+ unsigned int chip_id:16, cpu_id:8, family:8;
+#else
+ unsigned int family:8, cpu_id:8, chip_id:16;
+#endif
+};
+
+#define EXTN_SWAP_VALID 0x1
+#define EXTN_NORM_VALID 0x2
+#define EXTN_MINMAX_VALID 0x2
+#define EXTN_BARREL_VALID 0x2
+
+struct bcr_extn {
+#ifdef CONFIG_CPU_BIG_ENDIAN
+ unsigned int pad:20, crc:1, ext_arith:2, mul:2, barrel:2, minmax:2,
+norm:2, swap:1;
+#else
+ unsigned int swap:1, norm:2, minmax:2, barrel:2, mul:2, ext_arith:2,
+crc:1, pad:20;
+#endif
+};
+
+/* DSP Options Ref Manual */
+struct bcr_extn_mac_mul {
+#ifdef CONFIG_CPU_BIG_END
[U-Boot] [PATCH 2/9] arc: add cpu files
Signed-off-by: Alexey Brodkin
Cc: Mischa Jonker
Cc: Francois Bedard
---
arch/arc/config.mk | 31 +
arch/arc/cpu/arc700/Makefile | 13 ++
arch/arc/cpu/arc700/cache.c | 161
arch/arc/cpu/arc700/config.mk| 7 ++
arch/arc/cpu/arc700/cpu.c| 37 ++
arch/arc/cpu/arc700/interrupts.c | 211 +++
arch/arc/cpu/arc700/reset.c | 19 +++
arch/arc/cpu/arc700/start.S | 262 +++
arch/arc/cpu/arc700/timer.c | 28 +
arch/arc/cpu/arc700/u-boot.lds | 72 +++
10 files changed, 841 insertions(+)
create mode 100644 arch/arc/config.mk
create mode 100644 arch/arc/cpu/arc700/Makefile
create mode 100644 arch/arc/cpu/arc700/cache.c
create mode 100644 arch/arc/cpu/arc700/config.mk
create mode 100644 arch/arc/cpu/arc700/cpu.c
create mode 100644 arch/arc/cpu/arc700/interrupts.c
create mode 100644 arch/arc/cpu/arc700/reset.c
create mode 100644 arch/arc/cpu/arc700/start.S
create mode 100644 arch/arc/cpu/arc700/timer.c
create mode 100644 arch/arc/cpu/arc700/u-boot.lds
diff --git a/arch/arc/config.mk b/arch/arc/config.mk
new file mode 100644
index 000..76f4f7c
--- /dev/null
+++ b/arch/arc/config.mk
@@ -0,0 +1,31 @@
+#
+# Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+ifndef CONFIG_SYS_BIG_ENDIAN
+CONFIG_SYS_LITTLE_ENDIAN = 1
+endif
+
+ifdef CONFIG_SYS_LITTLE_ENDIAN
+CROSS_COMPILE ?= arc-buildroot-linux-uclibc-
+endif
+
+ifdef CONFIG_SYS_BIG_ENDIAN
+CROSS_COMPILE ?= arceb-buildroot-linux-uclibc-
+PLATFORM_LDFLAGS += -EB
+endif
+
+PLATFORM_CPPFLAGS += -ffixed-r25 -D__ARC__ -DCONFIG_ARC -gdwarf-2
+
+LDSCRIPT := $(SRCTREE)/$(CPUDIR)/u-boot.lds
+
+# Needed for relocation
+LDFLAGS_FINAL += -pie
+
+# Load address for standalone apps
+CONFIG_STANDALONE_LOAD_ADDR ?= 0x8200
+
+# Support generic board on ARC
+__HAVE_ARCH_GENERIC_BOARD := y
diff --git a/arch/arc/cpu/arc700/Makefile b/arch/arc/cpu/arc700/Makefile
new file mode 100644
index 000..cdc5002
--- /dev/null
+++ b/arch/arc/cpu/arc700/Makefile
@@ -0,0 +1,13 @@
+#
+# Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+extra-y+= start.o
+
+obj-y += cache.o
+obj-y += cpu.o
+obj-y += interrupts.o
+obj-y += reset.o
+obj-y += timer.o
diff --git a/arch/arc/cpu/arc700/cache.c b/arch/arc/cpu/arc700/cache.c
new file mode 100644
index 000..2e6dc18
--- /dev/null
+++ b/arch/arc/cpu/arc700/cache.c
@@ -0,0 +1,161 @@
+/*
+ * Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include
+#include
+
+/* Instruction cache related Auxiliary registers */
+#define ARC_REG_IC_BCR 0x77
+#define ARC_REG_IC_IVIC0x10
+#define ARC_REG_IC_CTRL0x11
+#define ARC_REG_IC_IVIL0x19
+#if (CONFIG_ARC_MMU_VER > 2)
+#define ARC_REG_IC_PTAG0x1E
+#endif
+
+/* Bit values in IC_CTRL */
+#define IC_CTRL_CACHE_DISABLE (1 << 0)
+
+/* Data cache related Auxiliary registers */
+#define ARC_REG_DC_BCR 0x72
+#define ARC_REG_DC_IVDC0x47
+#define ARC_REG_DC_CTRL0x48
+#define ARC_REG_DC_IVDL0x4A
+#define ARC_REG_DC_FLSH0x4B
+#define ARC_REG_DC_FLDL0x4C
+#if (CONFIG_ARC_MMU_VER > 2)
+#define ARC_REG_DC_PTAG0x5C
+#endif
+
+/* Bit values in DC_CTRL */
+#define DC_CTRL_CACHE_DISABLE (1 << 0)
+#define DC_CTRL_INV_MODE_FLUSH (1 << 6)
+#define DC_CTRL_FLUSH_STATUS (1 << 8)
+
+#define CACHE_LINE_SIZECONFIG_SYS_CACHELINE_SIZE
+
+int icache_status(void)
+{
+ return (read_aux_reg(ARC_REG_IC_CTRL) & IC_CTRL_CACHE_DISABLE) !=
+ IC_CTRL_CACHE_DISABLE;
+}
+
+void icache_enable(void)
+{
+ write_aux_reg(ARC_REG_IC_CTRL, read_aux_reg(ARC_REG_IC_CTRL) &
+ ~IC_CTRL_CACHE_DISABLE);
+}
+
+void icache_disable(void)
+{
+ write_aux_reg(ARC_REG_IC_CTRL, read_aux_reg(ARC_REG_IC_CTRL) |
+ IC_CTRL_CACHE_DISABLE);
+}
+
+void invalidate_icache_all(void)
+{
+#ifndef CONFIG_SYS_ICACHE_OFF
+ /* Any write to IC_IVIC register triggers invalidation of entire I$ */
+ write_aux_reg(ARC_REG_IC_IVIC, 1);
+#endif /* CONFIG_SYS_ICACHE_OFF */
+}
+
+int dcache_status(void)
+{
+ return (read_aux_reg(ARC_REG_DC_CTRL) & DC_CTRL_CACHE_DISABLE) !=
+ DC_CTRL_CACHE_DISABLE;
+}
+
+void dcache_enable(void)
+{
+ unsigned int temp = read_aux_reg(ARC_REG_DC_CTRL);
+ temp &= ~DC_CTRL_INV_MODE_FLUSH;
+ write_aux_reg(ARC_REG_DC_CTRL, temp & ~DC_CTRL_CACHE_DISABLE);
+}
+
+void dcache_disable(void)
+{
+ write_aux_reg(ARC_REG_DC_CTRL, read_aux_reg(ARC_REG_DC_CTRL) |
+ DC_CTRL_CACHE_DISABLE);
+}
+
+void flush_dcache_all(void)
+{
+ /* Do flush of entire cache */
+ wri
[U-Boot] [PATCH 0/9] Add support for the ARC700 architecture
This patch series adds support for the Synopsys DesignWare ARC700 architecture. DesignWare ARC700 is family of 32-bit CPUs developed by Synopsys, Inc. Since version 3.9 ARC architecture is supported in mainline Linux developemnt. And now to get better support in commonly used boot-loader we are introducing port of U-Boot for ARC700 CPUs. Patches included in this series are also available on GitHub in the 'for-upstream-v1' branch: g...@github.com:foss-for-synopsys-dwc-arc-processors/u-boot.git Also browsable here: https://github.com/foss-for-synopsys-dwc-arc-processors/u-boot/tree/for-upstream-v1 NOTE: there's an acked by Tom Rini prerequisite for Arcangel4 board: http://patchwork.ozlabs.org/patch/300901/ For those who are interested in building this port please download pre-built toolchains for x86_64 hosts. For RedHat-based distros: https://github.com/foss-for-synopsys-dwc-arc-processors/toolchain/releases/download/arc-4.8-R2/arc_gnu_4.8-R2_prebuilt_uclibc_le_rhel6_install.tar.gz For Debian-based distros: https://github.com/foss-for-synopsys-dwc-arc-processors/toolchain/releases/download/arc-4.8-R2/arc_gnu_4.8-R2_prebuilt_uclibc_le_ubuntu_install.tar.gz Alexey Brodkin (9): arc: add architecture header files arc: add cpu files arc: add library functions arc: bdinfo and image support arc: add support for standalone programs arc: add Arcangel4 board support arc: add AXS101 board support arc: add architecture to MAKEALL arc: add README for architecture MAKEALL | 6 + arch/arc/config.mk | 31 +++ arch/arc/cpu/arc700/Makefile| 13 ++ arch/arc/cpu/arc700/cache.c | 161 ++ arch/arc/cpu/arc700/config.mk | 7 + arch/arc/cpu/arc700/cpu.c | 37 arch/arc/cpu/arc700/interrupts.c| 211 ++ arch/arc/cpu/arc700/reset.c | 19 ++ arch/arc/cpu/arc700/start.S | 262 ++ arch/arc/cpu/arc700/timer.c | 28 +++ arch/arc/cpu/arc700/u-boot.lds | 72 +++ arch/arc/include/asm/arch-arc700/hardware.h | 0 arch/arc/include/asm/arcregs.h | 324 arch/arc/include/asm/bitops.h | 19 ++ arch/arc/include/asm/byteorder.h| 23 ++ arch/arc/include/asm/cache.h| 23 ++ arch/arc/include/asm/config.h | 12 ++ arch/arc/include/asm/errno.h| 1 + arch/arc/include/asm/global_data.h | 19 ++ arch/arc/include/asm/io.h | 287 arch/arc/include/asm/posix_types.h | 73 +++ arch/arc/include/asm/processor.h| 0 arch/arc/include/asm/ptrace.h | 101 + arch/arc/include/asm/sections.h | 1 + arch/arc/include/asm/string.h | 0 arch/arc/include/asm/types.h| 55 + arch/arc/include/asm/u-boot.h | 15 ++ arch/arc/include/asm/unaligned.h| 1 + arch/arc/lib/Makefile | 9 + arch/arc/lib/bootm.c| 106 + arch/arc/lib/relocate.c | 74 +++ arch/arc/lib/sections.c | 21 ++ board/synopsys/arcangel4/Makefile | 7 + board/synopsys/arcangel4/arcangel4.c| 25 +++ board/synopsys/axs101/Makefile | 8 + board/synopsys/axs101/axs101.c | 61 ++ board/synopsys/axs101/nand.c| 224 +++ boards.cfg | 2 + common/cmd_bdinfo.c | 18 ++ common/image.c | 1 + doc/README.ARC | 27 +++ examples/standalone/stubs.c | 13 ++ include/configs/arcangel4.h | 96 + include/configs/axs101.h| 194 + include/image.h | 1 + 45 files changed, 2688 insertions(+) create mode 100644 arch/arc/config.mk create mode 100644 arch/arc/cpu/arc700/Makefile create mode 100644 arch/arc/cpu/arc700/cache.c create mode 100644 arch/arc/cpu/arc700/config.mk create mode 100644 arch/arc/cpu/arc700/cpu.c create mode 100644 arch/arc/cpu/arc700/interrupts.c create mode 100644 arch/arc/cpu/arc700/reset.c create mode 100644 arch/arc/cpu/arc700/start.S create mode 100644 arch/arc/cpu/arc700/timer.c create mode 100644 arch/arc/cpu/arc700/u-boot.lds create mode 100644 arch/arc/include/asm/arch-arc700/hardware.h create mode 100644 arch/arc/include/asm/arcregs.h create mode 100644 arch/arc/include/asm/bitops.h create mode 100644 arch/arc/include/asm/byteorder.h create mode 100644 arch/arc/include/asm/cache.h create mode 100644 arch/arc/include/asm/config.h create mode 100644 arch/arc/include/asm/errno.h create mode 100644 arc
[U-Boot] [PATCH V2 2/2] pxe: implement fdtdir extlinux.conf tag
From: Stephen Warren
People who write (or scripts that auto-generate) extlinux.conf don't
want to know about HW-specific information such as FDT filenames. Create
a new extlinux.conf tag "fdtdir" that specifies only the directory where
FDT files are located, and defer all knowledge of the filename to U-Boot.
The algorithm implemented is:
==
if $fdt_addr_r is set:
if "fdt" tag was specified in extlinux.conf:
load the FDT from the filename in the tag
else if "fdtdir" tag was specified in extlinux.conf:
if "fdtfile" is set in the environment:
load the FDT from filename in "$fdtfile"
else:
load the FDT from some automatically generated filename
if no FDT file was loaded, and $fdtaddr is set:
# This indicates an FDT packaged with firmware
use the FDT at $fdtaddr
==
A small part of an example /boot/extlinux.conf might be:
==
LABEL primary
LINUX zImage
FDTDIR ./
LABEL failsafe
LINUX bkp/zImage
FDTDIR bkp/
==
... with /boot/tegra20-seaboard.dtb or /boot/bkp/tegra20-seaboard.dtb
being loaded by the sysboot/pxe code.
Signed-off-by: Stephen Warren
---
v2: Added support for "devicetreedir" config file tag, per the spec.
v1 (relative to RFC): no change; just reposting as non-RFC.
This patch is related to, but actually doesn't depend on the following
from Dennis Gilmore:
- cmd_pxe.c add any option for filesystem with sysboot uses generic load
- config: add config_distro_defaults.h
---
common/cmd_pxe.c | 78 +++-
1 file changed, 72 insertions(+), 6 deletions(-)
diff --git a/common/cmd_pxe.c b/common/cmd_pxe.c
index 4f00b1a607d4..2bd572d64691 100644
--- a/common/cmd_pxe.c
+++ b/common/cmd_pxe.c
@@ -445,6 +445,7 @@ struct pxe_label {
char *append;
char *initrd;
char *fdt;
+ char *fdtdir;
int ipappend;
int attempted;
int localboot;
@@ -517,6 +518,9 @@ static void label_destroy(struct pxe_label *label)
if (label->fdt)
free(label->fdt);
+ if (label->fdtdir)
+ free(label->fdtdir);
+
free(label);
}
@@ -675,13 +679,67 @@ static int label_boot(cmd_tbl_t *cmdtp, struct pxe_label
*label)
bootm_argv[3] = getenv("fdt_addr_r");
/* if fdt label is defined then get fdt from server */
- if (bootm_argv[3] && label->fdt) {
- if (get_relfile_envaddr(cmdtp, label->fdt, "fdt_addr_r") < 0) {
- printf("Skipping %s for failure retrieving fdt\n",
- label->name);
- return 1;
+ if (bootm_argv[3]) {
+ char *fdtfile = NULL;
+ char *fdtfilefree = NULL;
+
+ if (label->fdt) {
+ fdtfile = label->fdt;
+ } else if (label->fdtdir) {
+ fdtfile = getenv("fdtfile");
+ /*
+* For complex cases, it might be worth calling a
+* board- or SoC-provided function here to provide a
+* better default:
+*
+* if (!fdtfile)
+* fdtfile = gen_fdtfile();
+*
+* If this is added, be sure to keep the default below,
+* or move it to the default weak implementation of
+* gen_fdtfile().
+*/
+ if (!fdtfile) {
+ char *soc = getenv("soc");
+ char *board = getenv("board");
+ char *slash;
+
+ len = strlen(label->fdtdir);
+ if (!len)
+ slash = "./";
+ else if (label->fdtdir[len - 1] != '/')
+ slash = "/";
+ else
+ slash = "";
+
+ len = strlen(label->fdtdir) + strlen(slash) +
+ strlen(soc) + 1 + strlen(board) + 5;
+ fdtfilefree = malloc(len);
+ if (!fdtfilefree) {
+ printf("malloc fail (FDT filename)\n");
+ return 1;
+ }
+
+ snprintf(fdtfilefree, len, "%s%s%s-%s.dtb",
+ label->fdtdir, slash, soc, board);
+ fdtfile = fdtfilefree;
+ }
}
- } else
+
+ if (fdtfile) {
+ int err = get_relfile_envaddr(cmdtp, fdtfile,
"fdt_addr_r");
+ free(fdtfilefree);
+
Re: [U-Boot] eMMC boot partition booting and SMDK5250 support
On Tue, Jan 28, 2014 at 12:25:02PM -0500, Tom Rini wrote: > Hey guys, > > I've posted a patch to support the eMMC boot partitions found on the TI > DRA7xx EVM the other day, and I've been looking at what exactly happens > with the 'mmc open ...' and 'mmc close ...' commands the > CONFIG_SUPPORT_EMMC_BOOT enables. I've got a few questions about how > exactly the support works on the SMDK5250 and what your platform > requirements are, so we can re-work the code to be a bit more generic. > > Why do we have it as "open" and "close" ? Is this because it's a > version 4.2[1] style device? I'm working with 4.3-compatible (it's > actually 4.41, but same method just larger partitions) one and that can > be done with setting EXT_CSD[179] (BOOT_CONFIG / Boot configuration) _and_ > EXT_CSD[177] to a specific and different value than we've hard-coded > now. Or, is this done to save a step in terms of issuing 'mmc dev' commands and thus the 'close' is to done to get people back to the user partition? Thanks! -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH V2 1/2] pxe: support "devicetree" tag
From: Stephen Warren
The specification for extlinux.conf[1] states that "fdt" is an alias for
"devicetree". To date, U-Boot only implements "fdt". Rectify that.
[1] http://freedesktop.org/wiki/Specifications/BootLoaderSpec/
Signed-off-by: Stephen Warren
---
v2: New patch.
---
common/cmd_pxe.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/common/cmd_pxe.c b/common/cmd_pxe.c
index c27ec354cc59..4f00b1a607d4 100644
--- a/common/cmd_pxe.c
+++ b/common/cmd_pxe.c
@@ -745,6 +745,7 @@ static const struct token keywords[] = {
{"append", T_APPEND},
{"initrd", T_INITRD},
{"include", T_INCLUDE},
+ {"devicetree", T_FDT},
{"fdt", T_FDT},
{"ontimeout", T_ONTIMEOUT,},
{"ipappend", T_IPAPPEND,},
--
1.8.1.5
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Re: [U-Boot] [PATCH 3/3] powerpc/mpc85xx: SECURE BOOT- Disable law 0 for non PBL platforms
On Mon, 2014-01-27 at 01:28 -0600, Bansal Aneesh-B39320 wrote: > > > ISBC creates a LAW 0 entry for non PBL platforms, which is not > > > disabled before transferring the control to uboot. > > > The LAW 0 entry has to be disabled. > > > > > > Signed-off-by: Aneesh Bansal > > > --- > > > arch/powerpc/cpu/mpc85xx/start.S | 58 > > > > > > 1 file changed, 58 insertions(+) > > > > > > diff --git a/arch/powerpc/cpu/mpc85xx/start.S > > > b/arch/powerpc/cpu/mpc85xx/start.S > > > index 5440bf5..2b2c4dd 100644 > > > --- a/arch/powerpc/cpu/mpc85xx/start.S > > > +++ b/arch/powerpc/cpu/mpc85xx/start.S > > > @@ -116,6 +116,64 @@ _start_e500: > > > mtspr SPRN_HDBCR0, r3 > > > #endif > > > > > > +#if defined(CONFIG_SECURE_BOOT) && defined(CONFIG_E500) && \ > > > + !defined(CONFIG_E500MC) > > > > CONFIG_E500 can be assumed in this file. > > > > > + /* ISBC creates a LAW 0 entry for non PBL platforms, > > > + * which is not disabled before transferring the control to uboot. > > > + * Disable the LAW 0 entry here. > > > + */ > > > > Could you explain what this LAW 0 entry is for, why we don't need it, > > and why we can't wait until later to clear it? > > > > -Scott > > Boot ROM creates a LAW 0 entry for IFC and at entry at U-boot during > secure boot, we want to have the same environment as in case of > Non-secure Boot. So, this LAW entry is being removed at start. But in the secure boot case aren't you currently running from that LAW? And I don't think wanting to have the same environment is a good reason for injecting more code into the already messy start.S, if there isn't a good reason why it can't be done later. -Scott ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 2/3] powerpc/p1010rdb: SECURE BOOT- enable workaround for IFC errata A003399
On Sun, 2014-01-26 at 23:27 -0600, Bansal Aneesh-B39320 wrote: > > -Original Message- > > From: Wood Scott-B07421 > > Sent: Tuesday, January 21, 2014 3:36 AM > > To: Bansal Aneesh-B39320 > > Cc: u-boot@lists.denx.de; Sun York-R58495 > > Subject: Re: [PATCH 2/3] powerpc/p1010rdb: SECURE BOOT- enable workaround > > for IFC errata A003399 > > > > On Mon, 2014-01-20 at 14:57 +0530, Aneesh Bansal wrote: > > > The workaround for IFC errata A003399 was not enabled in case of > > > secure boot. So, secure boot from NOR was not working. > > > > > > Signed-off-by: Aneesh Bansal > > > --- > > > include/configs/P1010RDB.h | 3 +-- > > > 1 file changed, 1 insertion(+), 2 deletions(-) > > > > > > diff --git a/include/configs/P1010RDB.h b/include/configs/P1010RDB.h > > > index c21cf07..b0e51fb 100644 > > > --- a/include/configs/P1010RDB.h > > > +++ b/include/configs/P1010RDB.h > > > @@ -455,8 +455,7 @@ extern unsigned long get_sdram_size(void); #endif > > > > > > #ifdef CONFIG_SYS_FSL_ERRATUM_IFC_A003399 > > > -#if !defined(CONFIG_SPL) && !defined(CONFIG_SYS_RAMBOOT)\ > > > - && !defined(CONFIG_SECURE_BOOT) > > > +#if !defined(CONFIG_SPL) && !defined(CONFIG_SYS_RAMBOOT) > > > #define CONFIG_A003399_NOR_WORKAROUND #endif #endif > > > > Why do you need the workaround? Doesn't secure boot involve the bootrom > > loading U-Boot into SRAM, rather than execute-in-place from NOR? > > > > -Scott > > > The Boot ROM code does not copy the U-boot from NOR into SRAM. In case of > secure > boot from NOR, it is executed as an execute-in-place memory and so this > workaround > is required. That doesn't sound very secure. -Scott ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] u-boot x86 on qemu
Hi all,
I am using u-boot from git://git.denx.de/u-boot-x86.git
I build u-boot by:
make coreboot-x86_config
make
u-boot is then set as a payload for coreboot.
I then run coreboot as a bios for qemu:
qemu-system-i386 -bios ./build/coreboot.rom -m 1g -nographic -s -S
the system hangs when calling the function
u64 get_ticks()
because gd->arch.tsc_base is false and hence
panic("No tick base available"); is executed.
panic will itself call udelay(10 )
which in turn calls __udelay (kv)
which finally calls get_ticks() again.
There is then a recursive behavior here which will go on executing until
the stack is "depleted".
Has anyone come across this behavior?
what could be the reason for the tick base not to be set properly?
regards
--
José Marinho
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[U-Boot] [uBoot 2/2] ARM: O5/dra7xx: Add SATA boot support
Add the SATA boot support for OMAP5 and dra7xx.
Renamed the omap_sata_init to the common init_sata(int dev)
for commonality in with sata stack.
Added the ROM boot device ID for SATA.
Signed-off-by: Dan Murphy
---
arch/arm/cpu/armv7/omap-common/sata.c |3 ++-
arch/arm/include/asm/arch-omap5/spl.h |1 +
board/ti/dra7xx/evm.c |2 +-
board/ti/omap5_uevm/evm.c |2 +-
4 files changed, 5 insertions(+), 3 deletions(-)
diff --git a/arch/arm/cpu/armv7/omap-common/sata.c
b/arch/arm/cpu/armv7/omap-common/sata.c
index f5468c4..cad4fee 100644
--- a/arch/arm/cpu/armv7/omap-common/sata.c
+++ b/arch/arm/cpu/armv7/omap-common/sata.c
@@ -12,6 +12,7 @@
#include
#include
#include
+#include
#include
#include "pipe3-phy.h"
@@ -31,7 +32,7 @@ struct omap_pipe3 sata_phy = {
.dpll_map = dpll_map_sata,
};
-int omap_sata_init(void)
+int init_sata(int dev)
{
int ret;
u32 val;
diff --git a/arch/arm/include/asm/arch-omap5/spl.h
b/arch/arm/include/asm/arch-omap5/spl.h
index 2d5a62e..4a279cf 100644
--- a/arch/arm/include/asm/arch-omap5/spl.h
+++ b/arch/arm/include/asm/arch-omap5/spl.h
@@ -15,6 +15,7 @@
#define BOOT_DEVICE_MMC15
#define BOOT_DEVICE_MMC26
#define BOOT_DEVICE_MMC2_2 7
+#define BOOT_DEVICE_SATA 9
#define BOOT_DEVICE_SPI10
#define BOOT_DEVICE_UART 0x43
diff --git a/board/ti/dra7xx/evm.c b/board/ti/dra7xx/evm.c
index 1b60b8f..38d656c 100644
--- a/board/ti/dra7xx/evm.c
+++ b/board/ti/dra7xx/evm.c
@@ -80,7 +80,7 @@ int board_init(void)
int board_late_init(void)
{
- omap_sata_init();
+ init_sata(0);
return 0;
}
diff --git a/board/ti/omap5_uevm/evm.c b/board/ti/omap5_uevm/evm.c
index af854da..abf7fe3 100644
--- a/board/ti/omap5_uevm/evm.c
+++ b/board/ti/omap5_uevm/evm.c
@@ -70,7 +70,7 @@ int board_init(void)
int board_late_init(void)
{
- omap_sata_init();
+ init_sata(0);
return 0;
}
--
1.7.9.5
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[U-Boot] [uBoot 1/2] common: spl: Add spl sata boot support
Add spl_sata to read a fat partition from a bootable SATA
drive.
Signed-off-by: Dan Murphy
---
common/Makefile |3 +++
common/cmd_scsi.c |2 ++
common/spl/Makefile |1 +
common/spl/spl.c |5 +
common/spl/spl_sata.c | 51 +
include/spl.h |3 +++
spl/Makefile |1 +
7 files changed, 66 insertions(+)
create mode 100644 common/spl/spl_sata.c
diff --git a/common/Makefile b/common/Makefile
index 4d99ecd..b0f5b62 100644
--- a/common/Makefile
+++ b/common/Makefile
@@ -201,6 +201,9 @@ ifdef CONFIG_SPL_USB_HOST_SUPPORT
obj-$(CONFIG_SPL_USB_SUPPORT) += usb.o usb_hub.o
obj-$(CONFIG_USB_STORAGE) += usb_storage.o
endif
+ifdef CONFIG_SPL_SATA_SUPPORT
+obj-$(CONFIG_CMD_SCSI) += cmd_scsi.o
+endif
ifneq ($(CONFIG_SPL_NET_SUPPORT),y)
obj-$(CONFIG_ENV_IS_NOWHERE) += env_nowhere.o
obj-$(CONFIG_ENV_IS_IN_MMC) += env_mmc.o
diff --git a/common/cmd_scsi.c b/common/cmd_scsi.c
index 7b97dc9..b3f7687 100644
--- a/common/cmd_scsi.c
+++ b/common/cmd_scsi.c
@@ -168,7 +168,9 @@ removable:
scsi_curr_dev = -1;
printf("Found %d device(s).\n", scsi_max_devs);
+#ifndef CONFIG_SPL_BUILD
setenv_ulong("scsidevs", scsi_max_devs);
+#endif
}
int scsi_get_disk_count(void)
diff --git a/common/spl/Makefile b/common/spl/Makefile
index 65a1484f..64569c2 100644
--- a/common/spl/Makefile
+++ b/common/spl/Makefile
@@ -18,4 +18,5 @@ obj-$(CONFIG_SPL_NET_SUPPORT) += spl_net.o
obj-$(CONFIG_SPL_MMC_SUPPORT) += spl_mmc.o
obj-$(CONFIG_SPL_USB_SUPPORT) += spl_usb.o
obj-$(CONFIG_SPL_FAT_SUPPORT) += spl_fat.o
+obj-$(CONFIG_SPL_SATA_SUPPORT) += spl_sata.o
endif
diff --git a/common/spl/spl.c b/common/spl/spl.c
index 0645cee..774fdad 100644
--- a/common/spl/spl.c
+++ b/common/spl/spl.c
@@ -210,6 +210,11 @@ void board_init_r(gd_t *dummy1, ulong dummy2)
spl_usb_load_image();
break;
#endif
+#ifdef CONFIG_SPL_SATA_SUPPORT
+ case BOOT_DEVICE_SATA:
+ spl_sata_load_image();
+ break;
+#endif
default:
debug("SPL: Un-supported Boot Device\n");
hang();
diff --git a/common/spl/spl_sata.c b/common/spl/spl_sata.c
new file mode 100644
index 000..88d6b06
--- /dev/null
+++ b/common/spl/spl_sata.c
@@ -0,0 +1,51 @@
+/*
+ * (C) Copyright 2013
+ * Texas Instruments,
+ *
+ * Dan Murphy
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ *
+ * Derived work from spl_usb.c
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+DECLARE_GLOBAL_DATA_PTR;
+
+void spl_sata_load_image(void)
+{
+ int err;
+ block_dev_desc_t *stor_dev;
+
+ err = init_sata(CONFIG_SPL_SATA_BOOT_DEVICE);
+ if (err) {
+#ifdef CONFIG_SPL_LIBCOMMON_SUPPORT
+ printf("spl: sata init failed: err - %d\n", err);
+#endif
+ hang();
+ } else {
+ /* try to recognize storage devices immediately */
+ stor_dev = scsi_get_dev(0);
+ }
+
+ debug("boot mode - FAT\n");
+
+#ifdef CONFIG_SPL_OS_BOOT
+ if (spl_start_uboot() || spl_load_image_fat_os(stor_dev,
+
CONFIG_SYS_SATA_FAT_BOOT_PARTITION))
+#endif
+ err = spl_load_image_fat(stor_dev,
+ CONFIG_SYS_SATA_FAT_BOOT_PARTITION,
+ CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME);
+ if (err) {
+ puts("Error loading sata device\n");
+ hang();
+ }
+}
diff --git a/include/spl.h b/include/spl.h
index 5e24856..ee09fb6 100644
--- a/include/spl.h
+++ b/include/spl.h
@@ -64,6 +64,9 @@ void spl_net_load_image(const char *device);
/* USB SPL functions */
void spl_usb_load_image(void);
+/* SATA SPL functions */
+void spl_sata_load_image(void);
+
/* SPL FAT image functions */
int spl_load_image_fat(block_dev_desc_t *block_dev, int partition, const char
*filename);
int spl_load_image_fat_os(block_dev_desc_t *block_dev, int partition);
diff --git a/spl/Makefile b/spl/Makefile
index 4143e38..28fcfdd 100644
--- a/spl/Makefile
+++ b/spl/Makefile
@@ -85,6 +85,7 @@ LIBS-$(CONFIG_SPL_USBETH_SUPPORT) += drivers/usb/gadget/
LIBS-$(CONFIG_SPL_WATCHDOG_SUPPORT) += drivers/watchdog/
LIBS-$(CONFIG_SPL_USB_HOST_SUPPORT) += drivers/usb/host/
LIBS-$(CONFIG_OMAP_USB_PHY) += drivers/usb/phy/
+LIBS-$(CONFIG_SPL_SATA_SUPPORT) += drivers/block/
ifneq (,$(CONFIG_MX23)$(CONFIG_MX35)$(filter $(SOC), mx25 mx27 mx5 mx6 mx31
mx35))
LIBS-y += arch/$(ARCH)/imx-common/
--
1.7.9.5
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Re: [U-Boot] [PATCH] pci: mx6: Implement reset callback
On Tuesday, January 28, 2014 at 04:06:12 PM, Stefano Babic wrote:
> Hi Marek,
>
> On 24/01/2014 16:25, Marek Vasut wrote:
> > Add a callback so that a board can implement it's own specific routine to
> > toggle the port's nRESET line.
> >
> > Signed-off-by: Marek Vasut
> > Cc: Stefano Babic
> > ---
> >
> > drivers/pci/pcie_imx.c | 12 +---
> > 1 file changed, 9 insertions(+), 3 deletions(-)
> >
> > diff --git a/drivers/pci/pcie_imx.c b/drivers/pci/pcie_imx.c
> > index 0a74867..b554075 100644
> > --- a/drivers/pci/pcie_imx.c
> > +++ b/drivers/pci/pcie_imx.c
> > @@ -450,6 +450,13 @@ static int imx6_pcie_init_phy(void)
> >
> > return 0;
> >
> > }
> >
> > +__weak int imx6_pcie_toggle_reset(void)
> > +{
> > + /* This function ought to be overridden ! */
> > + puts("WARNING: Make sure the PCIe nRESET line is connected!\n");
> > + return 0;
> > +}
> > +
>
> Just to know: I assume that the nRESET is implemented with a GPIO.
Yes, that's how it is on all designs I saw thus far (but see below).
> I am
> expecting then in the board files a diffusion of imx6_pcie_toggle_reset,
> where the oinly difference is the number of GPIO.
The problem is, there are boards with no nRESET connected to the slot. These
boards are broken, thus will print the warning message.
> What about to define the GPIO in the board configuration file instead of
> defininig the function as __weak ?
I am hell-bent on printing the warning message there btw.. Such broken designs
should be caught early on.
> Something like
>
> imx6_pcie_toggle_reset(int nReset)
> {
> ..
> }
>
> static int imx6_pcie_deassert_core_reset(void)
> {
>
> ...
> imx6_pcie_toggle_reset(CONFIG_IMX6_PCIE_RESET);
>
> }
>
> Best regards,
> Stefano Babic
Best regards,
Marek Vasut
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Re: [U-Boot] eMMC boot partition booting and SMDK5250 support
On Tue, Jan 28, 2014 at 12:25:02PM -0500, Tom Rini wrote: > Hey guys, > > I've posted a patch to support the eMMC boot partitions found on the TI > DRA7xx EVM the other day, and I've been looking at what exactly happens > with the 'mmc open ...' and 'mmc close ...' commands the > CONFIG_SUPPORT_EMMC_BOOT enables. I've got a few questions about how > exactly the support works on the SMDK5250 and what your platform > requirements are, so we can re-work the code to be a bit more generic. > > Why do we have it as "open" and "close" ? Is this because it's a > version 4.2[1] style device? I'm working with 4.3-compatible (it's > actually 4.41, but same method just larger partitions) one and that can > be done with setting EXT_CSD[179] (BOOT_CONFIG / Boot configuration) _and_ > EXT_CSD[177] to a specific and different value than we've hard-coded > now. > > I would like to change things to be: > "mmc open " - Note required for eMMC 4.2 boot method. > "mmc close " - Same > "mmc bootpart " - Used for eMMC 4.3 and later boot > sequence option 1/2 > "mmc bootbus " - Note used in all boot sequences > > This would make the SMDK5250 sequence be (based on how I think it works > today): > mmc dev ... > mmc open > mmc write ... > mmc bootpart ... > mmc bootbus ... > mmc close > > And the DRA7xx sequence be: > mmc dev ... > mmc write ... > mmc bootpart ... > mmc bootbus ... Oh! And I forgot the current 'bootpart' which appears to be a resize operation would become 'bootpart-resize'. -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v3] mx6: Enable L2 cache support
Hi Dirk, On Tue, Jan 28, 2014 at 2:53 PM, Dirk Behme wrote: > Just for better understanding: Do you want to keep this intentionally > simple? Or is there any special reason why you don't set additional > (performance) registers here? E.g. the L2 PREFETCH and POWER registers, and > the tag and data latency settings? Like done in the kernel. The idea was to keep it simple initially and then we can extend L2 support as needed. Regards, Fabio Estevam ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] arm: Switch to -mno-unaligned-access when supported by the compiler
On Tue, Jan 28, 2014 at 06:43:14PM +, Måns Rullgård wrote: > Tom Rini writes: > > > When we tell the compiler to optimize for ARMv7 it assumes a default of > > unaligned accesses being supported at the hardware level and can make > > use of this to perform what it deems as an optimization in any case, > > including allowing for data to become unaligned. We explicitly disallow > > this hardware feature so we must tell the compiler. > > > > Cc: Albert ARIBAUD > > Cc: Mans Rullgard > > Signed-off-by: Tom Rini > > --- > > arch/arm/cpu/armv7/config.mk |6 +- > > arch/arm/cpu/armv8/config.mk |5 +- > > common/Makefile |4 -- > > doc/README.arm-unaligned-accesses | 122 > > - > > fs/ubifs/Makefile |3 - > > lib/Makefile |3 - > > 6 files changed, 5 insertions(+), 138 deletions(-) > > delete mode 100644 doc/README.arm-unaligned-accesses > > Awesome. > > You should also remove the reference to the (deleted) readme file from > arch/arm/lib/interrupts.c And top-level README. I'll do that in a v2 later, thanks. -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] arm: Switch to -mno-unaligned-access when supported by the compiler
Tom Rini writes: > When we tell the compiler to optimize for ARMv7 it assumes a default of > unaligned accesses being supported at the hardware level and can make > use of this to perform what it deems as an optimization in any case, > including allowing for data to become unaligned. We explicitly disallow > this hardware feature so we must tell the compiler. > > Cc: Albert ARIBAUD > Cc: Mans Rullgard > Signed-off-by: Tom Rini > --- > arch/arm/cpu/armv7/config.mk |6 +- > arch/arm/cpu/armv8/config.mk |5 +- > common/Makefile |4 -- > doc/README.arm-unaligned-accesses | 122 > - > fs/ubifs/Makefile |3 - > lib/Makefile |3 - > 6 files changed, 5 insertions(+), 138 deletions(-) > delete mode 100644 doc/README.arm-unaligned-accesses Awesome. You should also remove the reference to the (deleted) readme file from arch/arm/lib/interrupts.c -- Måns Rullgård m...@mansr.com ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] Illegal use of FP ops in clock_ti814x.c
On Tue, Oct 29, 2013 at 08:23:07AM -0400, Tom Rini wrote: > -BEGIN PGP SIGNED MESSAGE- > Hash: SHA1 > > On 10/29/2013 06:48 AM, Wolfgang Denk wrote: > > Dear Måns Rullgård, > > > > In message you wrote: > >> > Something like this should be equivalent. That said, it > looks suspiciously like it's meant to simply do a division > and round up. If that is the case, +225 should be +249. It > probably makes no difference for the values actually > encountered. > >>> > >>> Umm... this is the part which I do not understand. > >>> > >>> The original code adds 90%; you add 90%, too. However, to > >>> round up, one usually adds only 50% ? > >> > >> Adding 50% would round to nearest. For integer division to round > >> up, you must add one less than the divisor. > > > > Agreed. But do we want to round up? The original code used +90%, > > which is something else, too... > > And I imagine it's unlikely the original author of the code is around > anymore, or recalls exactly why. I'm pretty sure Matt just lifted the > code from the vendor tree and since it wasn't throwing warnings didn't > notice the floating point part. > > >>> Where are these 90% coming from? Are they in any way > >>> meaningful, or even critical? > >> > >> My guess is that it was someone's approximation of 249 / 250. I > >> don't know the hardware, so it's conceivable that it really > >> should be this way, although it seems unlikely. > > > > Are you able to test such a modificationon actual hardware? > > I suspect Matt can, after Linaro Connect. I don't have one of these > platforms handy but I think he still does. Thankfully Tom reminded me of this because I lost some of the list traffic due to some local mail issues. Although not explicitly mentioned in the TRM or any application notes I can find, the 90% appears to come from jitter compensation for the delta sigma fractional divider. I see some comments that imply this in various old vendor kernel tree clock implementations where they are rounding various pll constants. I can't be 100% sure without some insight from TI folks. Given that it's working for our known users, I'd like to preserve that until we get somebody that can shed some light on that. As Tom guessed, I low-level cherry-picked a lot of pieces from long-lost authors in this area. I obviously missed this floating point math in the cleanup. I tested this patch on my TI8148 EVM and it works as expected. Acked-by: Matt Porter -Matt ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] arm: Switch to -mno-unaligned-access when supported by the compiler
When we tell the compiler to optimize for ARMv7 it assumes a default of unaligned accesses being supported at the hardware level and can make use of this to perform what it deems as an optimization in any case, including allowing for data to become unaligned. We explicitly disallow this hardware feature so we must tell the compiler. Cc: Albert ARIBAUD Cc: Mans Rullgard Signed-off-by: Tom Rini --- arch/arm/cpu/armv7/config.mk |6 +- arch/arm/cpu/armv8/config.mk |5 +- common/Makefile |4 -- doc/README.arm-unaligned-accesses | 122 - fs/ubifs/Makefile |3 - lib/Makefile |3 - 6 files changed, 5 insertions(+), 138 deletions(-) delete mode 100644 doc/README.arm-unaligned-accesses diff --git a/arch/arm/cpu/armv7/config.mk b/arch/arm/cpu/armv7/config.mk index 38b7c40..ae4427c 100644 --- a/arch/arm/cpu/armv7/config.mk +++ b/arch/arm/cpu/armv7/config.mk @@ -10,9 +10,11 @@ PF_CPPFLAGS_ARMV7 := $(call cc-option, -march=armv7-a, -march=armv5) PLATFORM_CPPFLAGS += $(PF_CPPFLAGS_ARMV7) -# SEE README.arm-unaligned-accesses +# On supported platforms we clear the bit which allows for hardware +# unaligned access so we must tell the compiler so it can make the correct +# decision. PF_NO_UNALIGNED := $(call cc-option, -mno-unaligned-access,) -PLATFORM_NO_UNALIGNED := $(PF_NO_UNALIGNED) +PLATFORM_CPPFLAGS += $(PF_NO_UNALIGNED) ifneq ($(CONFIG_IMX_CONFIG),) ifdef CONFIG_SPL diff --git a/arch/arm/cpu/armv8/config.mk b/arch/arm/cpu/armv8/config.mk index 027a68c..f5b9559 100644 --- a/arch/arm/cpu/armv8/config.mk +++ b/arch/arm/cpu/armv8/config.mk @@ -6,10 +6,7 @@ # PLATFORM_RELFLAGS += -fno-common -ffixed-x18 -# SEE README.arm-unaligned-accesses -PF_NO_UNALIGNED := $(call cc-option, -mstrict-align) -PLATFORM_NO_UNALIGNED := $(PF_NO_UNALIGNED) - PF_CPPFLAGS_ARMV8 := $(call cc-option, -march=armv8-a) +PF_NO_UNALIGNED := $(call cc-option, -mstrict-align) PLATFORM_CPPFLAGS += $(PF_CPPFLAGS_ARMV8) PLATFORM_CPPFLAGS += $(PF_NO_UNALIGNED) diff --git a/common/Makefile b/common/Makefile index 4d99ecd..53d1798 100644 --- a/common/Makefile +++ b/common/Makefile @@ -238,7 +238,3 @@ $(obj)env_embedded.o: $(src)env_embedded.c $(CC) $(AFLAGS) -Wa,--no-warn \ -DENV_CRC=$(shell $(obj)../tools/envcrc) \ -c -o $@ $(src)env_embedded.c - -# SEE README.arm-unaligned-accesses -$(obj)hush.o: CFLAGS += $(PLATFORM_NO_UNALIGNED) -$(obj)fdt_support.o: CFLAGS += $(PLATFORM_NO_UNALIGNED) diff --git a/doc/README.arm-unaligned-accesses b/doc/README.arm-unaligned-accesses deleted file mode 100644 index c37d135..000 --- a/doc/README.arm-unaligned-accesses +++ /dev/null @@ -1,122 +0,0 @@ -If you are reading this because of a data abort: the following MIGHT -be relevant to your abort, if it was caused by an alignment violation. -In order to determine this, use the PC from the abort dump along with -an objdump -s -S of the u-boot ELF binary to locate the function where -the abort happened; then compare this function with the examples below. -If they match, then you've been hit with a compiler generated unaligned -access, and you should rewrite your code or add -mno-unaligned-access -to the command line of the offending file. - -Note that the PC shown in the abort message is relocated. In order to -be able to match it to an address in the ELF binary dump, you will need -to know the relocation offset. If your target defines CONFIG_CMD_BDI -and if you can get to the prompt and enter commands before the abort -happens, then command "bdinfo" will give you the offset. Otherwise you -will need to try a build with DEBUG set, which will display the offset, -or use a debugger and set a breakpoint at relocate_code() to see the -offset (passed as an argument). - -* - -Since U-Boot runs on a variety of hardware, some only able to perform -unaligned accesses with a strong penalty, some unable to perform them -at all, the policy regarding unaligned accesses is to not perform any, -unless absolutely necessary because of hardware or standards. - -Also, on hardware which permits it, the core is configured to throw -data abort exceptions on unaligned accesses in order to catch these -unallowed accesses as early as possible. - -Until version 4.7, the gcc default for performing unaligned accesses -(-mno-unaligned-access) is to emulate unaligned accesses using aligned -loads and stores plus shifts and masks. Emulated unaligned accesses -will not be caught by hardware. These accesses may be costly and may -be actually unnecessary. In order to catch these accesses and remove -or optimize them, option -munaligned-access is explicitly set for all -versions of gcc which support it. - -From gcc 4.7 onward starting at armv7 architectures, the default for -performing unaligned accesses is to use unaligned native loads and -stores (-munaligned-access), because the cost of unaligned accesses -has dropped on a
[U-Boot] eMMC boot partition booting and SMDK5250 support
Hey guys, I've posted a patch to support the eMMC boot partitions found on the TI DRA7xx EVM the other day, and I've been looking at what exactly happens with the 'mmc open ...' and 'mmc close ...' commands the CONFIG_SUPPORT_EMMC_BOOT enables. I've got a few questions about how exactly the support works on the SMDK5250 and what your platform requirements are, so we can re-work the code to be a bit more generic. Why do we have it as "open" and "close" ? Is this because it's a version 4.2[1] style device? I'm working with 4.3-compatible (it's actually 4.41, but same method just larger partitions) one and that can be done with setting EXT_CSD[179] (BOOT_CONFIG / Boot configuration) _and_ EXT_CSD[177] to a specific and different value than we've hard-coded now. I would like to change things to be: "mmc open " - Note required for eMMC 4.2 boot method. "mmc close " - Same "mmc bootpart " - Used for eMMC 4.3 and later boot sequence option 1/2 "mmc bootbus " - Note used in all boot sequences This would make the SMDK5250 sequence be (based on how I think it works today): mmc dev ... mmc open mmc write ... mmc bootpart ... mmc bootbus ... mmc close And the DRA7xx sequence be: mmc dev ... mmc write ... mmc bootpart ... mmc bootbus ... Comments? I plan to start down this path shortly, thanks! [1]: http://www.micron.com/~/media/Documents/Products/Technical%20Note/NAND%20Flash/tn2918.pdf -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] Fwd: [ Uboot code understanding guide ]
On Tue, Jan 28, 2014 at 11:16 AM, Devarsh gadhia wrote: > Hey wolfgang, > > I am trying to port uboot on beagle boneblack. > Eventhogh uboot has support for beagle board(but not for BBB), I'd like to > port uboot 2013.10 on BBB as 1 task of ubuntu porting on BBB. Ah why a 3rd port? there's always two configs you can use on the BBB.. "am335x_evm" which supports: AM335x GP EVM AM335x EVM SK Beaglebone White Beaglebone Black or the "am335x_boneblack" which is just a tweak of "am335x_evm" to support only the BBB Regards, -- Robert Nelson http://www.rcn-ee.com/ ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] Fwd: [ Uboot code understanding guide ]
Hey wolfgang, I am trying to port uboot on beagle boneblack. Eventhogh uboot has support for beagle board(but not for BBB), I'd like to port uboot 2013.10 on BBB as 1 task of ubuntu porting on BBB. There are omap Soc supprted code in uboot source but to understand the flow as a beginner is a bit more complex. I'd search for the similar details in the mailchain first. Thanks for your response. On Jan 27, 2014 7:56 PM, "Wolfgang Denk" wrote: > Dear Devarsh gadhia, > > In message 0l9r-0ulh...@mail.gmail.com> you wrote: > > > > I have started working on uboot porting on beaglebone black. > > What exactly needs porting on this board? Does UBoot not work right > out of the box? > > > I want to learn the code flow of uboot code so that i can add necessary > > HOOKs for the porting and understanding the kernel and fs porting > further. > > > > i am new to uboot and linux so could you please let me know the way to > > start with the walk through of the code ? > > As it has been pointed out several times in the last few days: start > at _start, and follow the flow... See also the archives. > > Best regards, > > Wolfgang Denk > > -- > DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel > HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany > Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de > Unix is supported by IBM, like a hanging man is supported by rope. > - Don Libes & Sandy Ressler: _Life With Unix_ > ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v3] mx6: Enable L2 cache support
Hi Fabio,
Am 28.01.2014 15:54, schrieb Fabio Estevam:
Add L2 cache support and enable it by default.
Signed-off-by: Fabio Estevam
---
Changes since v2:
- Add L2_PL310_BASE definition in imx_regs.h
Changes since v1:
- Fx typo in commit log
arch/arm/cpu/armv7/mx6/soc.c | 20
arch/arm/include/asm/arch-mx6/imx-regs.h | 1 +
include/configs/mx6_common.h | 5 +
3 files changed, 26 insertions(+)
diff --git a/arch/arm/cpu/armv7/mx6/soc.c b/arch/arm/cpu/armv7/mx6/soc.c
index 0208cba..b84de87 100644
--- a/arch/arm/cpu/armv7/mx6/soc.c
+++ b/arch/arm/cpu/armv7/mx6/soc.c
@@ -8,6 +8,8 @@
*/
#include
+#include
+#include
#include
#include
#include
@@ -336,3 +338,21 @@ void imx_setup_hdmi(void)
writel(reg, &mxc_ccm->chsccdr);
}
#endif
+
+#ifndef CONFIG_SYS_L2CACHE_OFF
+#define L2CACHE1
+void v7_outer_cache_enable(void)
+{
+ struct pl310_regs *const pl310 = (struct pl310_regs *)L2_PL310_BASE;
+
+ setbits_le32(&pl310->pl310_ctrl, L2CACHE);
+
+}
Just for better understanding: Do you want to keep this intentionally
simple? Or is there any special reason why you don't set additional
(performance) registers here? E.g. the L2 PREFETCH and POWER
registers, and the tag and data latency settings? Like done in the kernel.
Best regards
Dirk
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Re: [U-Boot] post in uboot for arm
Dear shobin b, In message you wrote: > > I have to do post for arm in uboot-toradex(iris based colibri t20 > board)(arm board).how can i do that?what changes i have to make in uboot? > > First can you please tell me how to do memory post test in uboot. You have been posting your messages now for more than a month, again and again: http://article.gmane.org/gmane.comp.boot-loaders.u-boot/176738 http://article.gmane.org/gmane.comp.boot-loaders.u-boot/176839 http://article.gmane.org/gmane.comp.boot-loaders.u-boot/176929 http://article.gmane.org/gmane.comp.boot-loaders.u-boot/177123 http://article.gmane.org/gmane.comp.boot-loaders.u-boot/179013 You don't keep mail threads, instead you post always new, again and again. > please give me a solution. I'm afraid you fail to understand how free community support works. I highly recommend to read [1]. You should not expect that we can provide a ready-to-use solution for you - we can try to help if you have problems on your way, but we shoul dbe able to see that you at least try to work of the issue yourself. If you want a ready-o-use turnkey solution, then please ask for a commercial solution provider. Thi s is out of scope of a mailing list like this. [1] http://www.catb.org/~esr/faqs/smart-questions.html Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de When properly administered, vacations do not diminish productivity: for every week you're away and get nothing done, there's another when your boss is away and you get twice as much done. -- Daniel B. Luten ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] arm: Handle .gnu.hash section in ldscripts
Dear Andreas Färber, In message <52e7b855.2080...@suse.de> you wrote: > > > Do I understand you correctly that this fixes a _build_ error? So we > > can assume as long as the other archtiectures build fine, they are not > > affected by this? > > Affirmative. :) OK, then we can just lean back and relax :) Thanks! Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de A rolling stone gathers momentum. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] pci: mx6: Implement reset callback
Hi Marek,
On 24/01/2014 16:25, Marek Vasut wrote:
> Add a callback so that a board can implement it's own specific routine to
> toggle the port's nRESET line.
>
> Signed-off-by: Marek Vasut
> Cc: Stefano Babic
> ---
> drivers/pci/pcie_imx.c | 12 +---
> 1 file changed, 9 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/pci/pcie_imx.c b/drivers/pci/pcie_imx.c
> index 0a74867..b554075 100644
> --- a/drivers/pci/pcie_imx.c
> +++ b/drivers/pci/pcie_imx.c
> @@ -450,6 +450,13 @@ static int imx6_pcie_init_phy(void)
> return 0;
> }
>
> +__weak int imx6_pcie_toggle_reset(void)
> +{
> + /* This function ought to be overridden ! */
> + puts("WARNING: Make sure the PCIe nRESET line is connected!\n");
> + return 0;
> +}
> +
Just to know: I assume that the nRESET is implemented with a GPIO. I am
expecting then in the board files a diffusion of imx6_pcie_toggle_reset,
where the oinly difference is the number of GPIO.
What about to define the GPIO in the board configuration file instead of
defininig the function as __weak ?
Something like
imx6_pcie_toggle_reset(int nReset)
{
..
}
static int imx6_pcie_deassert_core_reset(void)
{
...
imx6_pcie_toggle_reset(CONFIG_IMX6_PCIE_RESET);
}
Best regards,
Stefano Babic
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[U-Boot] post in uboot for arm
Hi, I have to do post for arm in uboot-toradex(iris based colibri t20 board)(arm board).how can i do that?what changes i have to make in uboot? First can you please tell me how to do memory post test in uboot. please give me a solution. regards, shobin.b ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v3] mx6: Enable L2 cache support
On 28/01/2014 15:54, Fabio Estevam wrote:
> Add L2 cache support and enable it by default.
>
> Signed-off-by: Fabio Estevam
> ---
> Changes since v2:
> - Add L2_PL310_BASE definition in imx_regs.h
> Changes since v1:
> - Fx typo in commit log
>
> arch/arm/cpu/armv7/mx6/soc.c | 20
> arch/arm/include/asm/arch-mx6/imx-regs.h | 1 +
> include/configs/mx6_common.h | 5 +
> 3 files changed, 26 insertions(+)
>
> diff --git a/arch/arm/cpu/armv7/mx6/soc.c b/arch/arm/cpu/armv7/mx6/soc.c
> index 0208cba..b84de87 100644
> --- a/arch/arm/cpu/armv7/mx6/soc.c
> +++ b/arch/arm/cpu/armv7/mx6/soc.c
> @@ -8,6 +8,8 @@
> */
>
> #include
> +#include
> +#include
> #include
> #include
> #include
> @@ -336,3 +338,21 @@ void imx_setup_hdmi(void)
> writel(reg, &mxc_ccm->chsccdr);
> }
> #endif
> +
> +#ifndef CONFIG_SYS_L2CACHE_OFF
> +#define L2CACHE 1
> +void v7_outer_cache_enable(void)
> +{
> + struct pl310_regs *const pl310 = (struct pl310_regs *)L2_PL310_BASE;
> +
> + setbits_le32(&pl310->pl310_ctrl, L2CACHE);
> +
> +}
> +
> +void v7_outer_cache_disable(void)
> +{
> + struct pl310_regs *const pl310 = (struct pl310_regs *)L2_PL310_BASE;
> +
> + clrbits_le32(&pl310->pl310_ctrl, L2CACHE);
> +}
> +#endif /* !CONFIG_SYS_L2CACHE_OFF */
> diff --git a/arch/arm/include/asm/arch-mx6/imx-regs.h
> b/arch/arm/include/asm/arch-mx6/imx-regs.h
> index f2ad6e9..c2d210a 100644
> --- a/arch/arm/include/asm/arch-mx6/imx-regs.h
> +++ b/arch/arm/include/asm/arch-mx6/imx-regs.h
> @@ -53,6 +53,7 @@
> #define GLOBAL_TIMER_BASE_ADDR 0x00A00200
> #define PRIVATE_TIMERS_WD_BASE_ADDR 0x00A00600
> #define IC_DISTRIBUTOR_BASE_ADDR0x00A01000
> +#define L2_PL310_BASE0x00A02000
> #define GPV0_BASE_ADDR 0x00B0
> #define GPV1_BASE_ADDR 0x00C0
> #define PCIE_ARB_BASE_ADDR 0x0100
> diff --git a/include/configs/mx6_common.h b/include/configs/mx6_common.h
> index 514d634..63afa46 100644
> --- a/include/configs/mx6_common.h
> +++ b/include/configs/mx6_common.h
> @@ -22,4 +22,9 @@
> #define CONFIG_ARM_ERRATA_751472
> #define CONFIG_BOARD_POSTCLK_INIT
>
> +#ifndef CONFIG_SYS_L2CACHE_OFF
> +#define CONFIG_SYS_L2_PL310
> +#define CONFIG_SYS_PL310_BASEL2_PL310_BASE
> +#endif
> +
> #endif
>
Acked-by: Stefano Babic
Best regards,
Stefano Babic
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[U-Boot] [PATCH v3] mx6: Enable L2 cache support
Add L2 cache support and enable it by default.
Signed-off-by: Fabio Estevam
---
Changes since v2:
- Add L2_PL310_BASE definition in imx_regs.h
Changes since v1:
- Fx typo in commit log
arch/arm/cpu/armv7/mx6/soc.c | 20
arch/arm/include/asm/arch-mx6/imx-regs.h | 1 +
include/configs/mx6_common.h | 5 +
3 files changed, 26 insertions(+)
diff --git a/arch/arm/cpu/armv7/mx6/soc.c b/arch/arm/cpu/armv7/mx6/soc.c
index 0208cba..b84de87 100644
--- a/arch/arm/cpu/armv7/mx6/soc.c
+++ b/arch/arm/cpu/armv7/mx6/soc.c
@@ -8,6 +8,8 @@
*/
#include
+#include
+#include
#include
#include
#include
@@ -336,3 +338,21 @@ void imx_setup_hdmi(void)
writel(reg, &mxc_ccm->chsccdr);
}
#endif
+
+#ifndef CONFIG_SYS_L2CACHE_OFF
+#define L2CACHE1
+void v7_outer_cache_enable(void)
+{
+ struct pl310_regs *const pl310 = (struct pl310_regs *)L2_PL310_BASE;
+
+ setbits_le32(&pl310->pl310_ctrl, L2CACHE);
+
+}
+
+void v7_outer_cache_disable(void)
+{
+ struct pl310_regs *const pl310 = (struct pl310_regs *)L2_PL310_BASE;
+
+ clrbits_le32(&pl310->pl310_ctrl, L2CACHE);
+}
+#endif /* !CONFIG_SYS_L2CACHE_OFF */
diff --git a/arch/arm/include/asm/arch-mx6/imx-regs.h
b/arch/arm/include/asm/arch-mx6/imx-regs.h
index f2ad6e9..c2d210a 100644
--- a/arch/arm/include/asm/arch-mx6/imx-regs.h
+++ b/arch/arm/include/asm/arch-mx6/imx-regs.h
@@ -53,6 +53,7 @@
#define GLOBAL_TIMER_BASE_ADDR 0x00A00200
#define PRIVATE_TIMERS_WD_BASE_ADDR 0x00A00600
#define IC_DISTRIBUTOR_BASE_ADDR0x00A01000
+#define L2_PL310_BASE 0x00A02000
#define GPV0_BASE_ADDR 0x00B0
#define GPV1_BASE_ADDR 0x00C0
#define PCIE_ARB_BASE_ADDR 0x0100
diff --git a/include/configs/mx6_common.h b/include/configs/mx6_common.h
index 514d634..63afa46 100644
--- a/include/configs/mx6_common.h
+++ b/include/configs/mx6_common.h
@@ -22,4 +22,9 @@
#define CONFIG_ARM_ERRATA_751472
#define CONFIG_BOARD_POSTCLK_INIT
+#ifndef CONFIG_SYS_L2CACHE_OFF
+#define CONFIG_SYS_L2_PL310
+#define CONFIG_SYS_PL310_BASE L2_PL310_BASE
+#endif
+
#endif
--
1.8.1.2
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Re: [U-Boot] [PATCH v2] mx6: Enable L2 cache support
Hi Fabio,
On 28/01/2014 15:22, Fabio Estevam wrote:
> Add L2 cache support and enable it by default.
>
> Signed-off-by: Fabio Estevam
> ---
> Changes since v1:
> - Fx typo in commit log
>
> arch/arm/cpu/armv7/mx6/soc.c | 22 ++
> include/configs/mx6_common.h | 5 +
> 2 files changed, 27 insertions(+)
>
> diff --git a/arch/arm/cpu/armv7/mx6/soc.c b/arch/arm/cpu/armv7/mx6/soc.c
> index 0208cba..5e1e5e9 100644
> --- a/arch/arm/cpu/armv7/mx6/soc.c
> +++ b/arch/arm/cpu/armv7/mx6/soc.c
> @@ -8,6 +8,8 @@
> */
>
> #include
> +#include
> +#include
> #include
> #include
> #include
> @@ -336,3 +338,23 @@ void imx_setup_hdmi(void)
> writel(reg, &mxc_ccm->chsccdr);
> }
> #endif
> +
> +#ifndef CONFIG_SYS_L2CACHE_OFF
> +#define L2CACHE 1
> +void v7_outer_cache_enable(void)
> +{
> + struct pl310_regs *const pl310 =
> + (struct pl310_regs *)CONFIG_SYS_PL310_BASE;
> +
> + setbits_le32(&pl310->pl310_ctrl, L2CACHE);
> +
> +}
> +
> +void v7_outer_cache_disable(void)
> +{
> + struct pl310_regs *const pl310 =
> + (struct pl310_regs *)CONFIG_SYS_PL310_BASE;
> +
> + clrbits_le32(&pl310->pl310_ctrl, L2CACHE);
> +}
> +#endif /* !CONFIG_SYS_L2CACHE_OFF */
> diff --git a/include/configs/mx6_common.h b/include/configs/mx6_common.h
> index 514d634..993eca1 100644
> --- a/include/configs/mx6_common.h
> +++ b/include/configs/mx6_common.h
> @@ -22,4 +22,9 @@
> #define CONFIG_ARM_ERRATA_751472
> #define CONFIG_BOARD_POSTCLK_INIT
>
> +#ifndef CONFIG_SYS_L2CACHE_OFF
> +#define CONFIG_SYS_L2_PL310
> +#define CONFIG_SYS_PL310_BASE 0x00A02000
Why is the address defined here nad not in imx_regs.h ?
Best regards,
Stefano
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[U-Boot] u-boot spl with fat32 on arm
Hi guys, I do play a little bit with u-boot spl and I am curious about fat32 implementation. There is MAX_CLUSTSIZE which is 65k and there are 3 buffers in fat.c code do_fat_read_at_block get_contents_vfatname_block get_dentfromdir_block All these 3 are placed to bss section. I have just 192k of memory for SPL that's why I tried 2 things 1. Place these 3 fat arrays to different memory which is working fine 2. Decrease MAX_CLUSTSIZE to any low value (I do use 8k). Unfortunately if I decrease MAX_CLUSTSIZE and add them to bss section SPL doesn't work. If I add them to a different section in front of or behind bss everything is just fine. That's why I have a question where can be the problem in this behaviour that keeping 8k MAX_CLUSTSIZE in bss section doesn't work and keeping 8k MAX_CLUSTSIZE out of bss section works. bss relocation is not done in SPL. Maybe someone could know where the problem can be before I look at ASM code. Thanks for your hints, Michal -- Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91 w: www.monstr.eu p: +42-0-721842854 Maintainer of Linux kernel - Microblaze cpu - http://www.monstr.eu/fdt/ Maintainer of Linux kernel - Xilinx Zynq ARM architecture Microblaze U-BOOT custodian and responsible for u-boot arm zynq platform signature.asc Description: OpenPGP digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2] mx6: Enable L2 cache support
Add L2 cache support and enable it by default.
Signed-off-by: Fabio Estevam
---
Changes since v1:
- Fx typo in commit log
arch/arm/cpu/armv7/mx6/soc.c | 22 ++
include/configs/mx6_common.h | 5 +
2 files changed, 27 insertions(+)
diff --git a/arch/arm/cpu/armv7/mx6/soc.c b/arch/arm/cpu/armv7/mx6/soc.c
index 0208cba..5e1e5e9 100644
--- a/arch/arm/cpu/armv7/mx6/soc.c
+++ b/arch/arm/cpu/armv7/mx6/soc.c
@@ -8,6 +8,8 @@
*/
#include
+#include
+#include
#include
#include
#include
@@ -336,3 +338,23 @@ void imx_setup_hdmi(void)
writel(reg, &mxc_ccm->chsccdr);
}
#endif
+
+#ifndef CONFIG_SYS_L2CACHE_OFF
+#define L2CACHE1
+void v7_outer_cache_enable(void)
+{
+ struct pl310_regs *const pl310 =
+ (struct pl310_regs *)CONFIG_SYS_PL310_BASE;
+
+ setbits_le32(&pl310->pl310_ctrl, L2CACHE);
+
+}
+
+void v7_outer_cache_disable(void)
+{
+ struct pl310_regs *const pl310 =
+ (struct pl310_regs *)CONFIG_SYS_PL310_BASE;
+
+ clrbits_le32(&pl310->pl310_ctrl, L2CACHE);
+}
+#endif /* !CONFIG_SYS_L2CACHE_OFF */
diff --git a/include/configs/mx6_common.h b/include/configs/mx6_common.h
index 514d634..993eca1 100644
--- a/include/configs/mx6_common.h
+++ b/include/configs/mx6_common.h
@@ -22,4 +22,9 @@
#define CONFIG_ARM_ERRATA_751472
#define CONFIG_BOARD_POSTCLK_INIT
+#ifndef CONFIG_SYS_L2CACHE_OFF
+#define CONFIG_SYS_L2_PL310
+#define CONFIG_SYS_PL310_BASE 0x00A02000
+#endif
+
#endif
--
1.8.1.2
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[U-Boot] [PATCH] mx6: Enable L2 cache support
Add L3 cache support and enable it by default.
Signed-off-by: Fabio Estevam
---
arch/arm/cpu/armv7/mx6/soc.c | 22 ++
include/configs/mx6_common.h | 5 +
2 files changed, 27 insertions(+)
diff --git a/arch/arm/cpu/armv7/mx6/soc.c b/arch/arm/cpu/armv7/mx6/soc.c
index 0208cba..5e1e5e9 100644
--- a/arch/arm/cpu/armv7/mx6/soc.c
+++ b/arch/arm/cpu/armv7/mx6/soc.c
@@ -8,6 +8,8 @@
*/
#include
+#include
+#include
#include
#include
#include
@@ -336,3 +338,23 @@ void imx_setup_hdmi(void)
writel(reg, &mxc_ccm->chsccdr);
}
#endif
+
+#ifndef CONFIG_SYS_L2CACHE_OFF
+#define L2CACHE1
+void v7_outer_cache_enable(void)
+{
+ struct pl310_regs *const pl310 =
+ (struct pl310_regs *)CONFIG_SYS_PL310_BASE;
+
+ setbits_le32(&pl310->pl310_ctrl, L2CACHE);
+
+}
+
+void v7_outer_cache_disable(void)
+{
+ struct pl310_regs *const pl310 =
+ (struct pl310_regs *)CONFIG_SYS_PL310_BASE;
+
+ clrbits_le32(&pl310->pl310_ctrl, L2CACHE);
+}
+#endif /* !CONFIG_SYS_L2CACHE_OFF */
diff --git a/include/configs/mx6_common.h b/include/configs/mx6_common.h
index 514d634..993eca1 100644
--- a/include/configs/mx6_common.h
+++ b/include/configs/mx6_common.h
@@ -22,4 +22,9 @@
#define CONFIG_ARM_ERRATA_751472
#define CONFIG_BOARD_POSTCLK_INIT
+#ifndef CONFIG_SYS_L2CACHE_OFF
+#define CONFIG_SYS_L2_PL310
+#define CONFIG_SYS_PL310_BASE 0x00A02000
+#endif
+
#endif
--
1.8.1.2
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Re: [U-Boot] [PATCH v3] arm: exynos: change to use clrbits macro instead of readl/writel function
On Mon, Jan 27, 2014 at 09:14 +0900, Inha Song wrote: > > Use setbits/clrbits macro instead of readl/writel function > > Signed-off-by: Inha Song You make this look like a mechanical edit sweep, and keep ignoring that it fixes a real bug where clock setup was operating on random data, and don't pass this information to those who work with your submission (maintainers and release engineers). Can you please be bothered to accept and incorporate the feedback that you get, and don't waste the time of those who spend this time and effort? Thank you! virtually yours Gerhard Sittig -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr. 5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: off...@denx.de ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v7 0/38] Switch over to real Kbuild
On Fri, Jan 24, 2014 at 19:37 +0900, Masahiro Yamada wrote: > > Changes for v6: > - Rebase on the current u-boot/master Just a minor issue: Given that your work on the build infrastructure touches rather many parts of the tree (and thus might easily conflict with other regular development), and that "current master" is a moving target -- may I suggest that you mention the specific commit that you rebase against, in the absence of tags between releases? This could avoid the search for issues in the case when conflicts do arise, and might help testers setup their configuration, and might get you more test feedback. virtually yours Gerhard Sittig -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr. 5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: off...@denx.de ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] arm: Handle .gnu.hash section in ldscripts
Dear Wolfgang Denk, Am 27.01.2014 20:11, schrieb Wolfgang Denk: > In message <52e6a96b.1080...@suse.de> you wrote: >> >> I figured out that the section was apparently not caught by the .gnu* >> wildcard and this patch fixed our build for the following ARM configs: > > Do I understand you correctly that this fixes a _build_ error? So we > can assume as long as the other archtiectures build fine, they are not > affected by this? Affirmative. :) Best regards, Andreas -- SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 Nürnberg, Germany GF: Jeff Hawn, Jennifer Guild, Felix Imendörffer; HRB 16746 AG Nürnberg ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v7 38/38] tools/env: cross-compile fw_printenv without setting HOSTCC
On Fri, Jan 24, 2014 at 19:38 +0900, Masahiro Yamada wrote:
>
> fw_printenv is a program which mostly runs on the target Linux.
>
> Before switching to Kbuild, we needed to set HOSTCC at the
> command line like this:
> make HOSTCC= env
>
> Going forward we can cross compile it by specifying CROSS_COMPILE:
> make CROSS_COMPILE= env
> This looks more natural.
As mentioned in my tested-by response, the tool builds fine for
both cross and native builds. Have checked the output of the
file(1) command and that the binaries can run on their respective
target platform (got the builtin help text), haven't checked the
correct operation though.
It's a little funny that the build progress says "HOSTCC" while
it does a cross build, but agree that this is mere cosmetics and
results from the development history of the tool's use scenario.
And it's good that you could keep the original 'env' make target
name, this keeps the mainline documentation as is, and keeps
external references stable (external projects need not adjust to
different versions and how to invoke them).
As a side note, I noticed that there are "different schools" of
how to build the software. You appear to assume that the spec
for CROSS_COMPILE is the exception, and always gets passed in
explicit ways. While I "live in the world" where a shell gets
setup for cross compilation, and _all_ of the remaining work is
done this way, i.e. native builds are the exceptional case.
But this does not matter, it's just an observation, and depends
on what your main activity is or what you initially get taught.
In any case, with a ${CROSS_COMPILE} spec you get cross built
binaries, with no spec or an empty spec you get native binaries
(this is how I created native binaries from a cross build
environment -- pass 'CROSS_COMPILE=' to the make(1) invocation).
virtually yours
Gerhard Sittig
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Re: [U-Boot] [PATCH v7 0/38] Switch over to real Kbuild
On Fri, Jan 24, 2014 at 19:37 +0900, Masahiro Yamada wrote: > > [ ... ] > > Changes for v7: > - Fix a bug in spl build: > In v6, build failed if we try to build another SPL board > without doing "make clobber". > For example, > $ make omap3_beagle_config > $ make CROSS_COMPILE= > $ make am335x_evm_config > $ make CROSS_COMPILE= > This failed in v6. We needed either "make clobber" or "make mrproper" > before switching to another board. > Now, we can two or more boards continuously. > > Changes for v6: > - Rebase on the current u-boot/master > - Linux Kernel 3.13 was released on Jan. 20, so import build scripts > from v3.13 to be breeding edge. > - Minor change in post/lib_powerpc/fpu/Makefile > - Include cmd_files under nand_spl/board/*/*/Makefile > > Changes for v5: > - Fix a bug reported by Gerhard Sittig: > "make tools" before running "make" failed at v4. > - Revive "env" target so that we can build only under tools/env/. > - Add a new patch at the tail: > 38/38 "tools/env: cross-compile fw_printenv without setting HOSTCC" > - Describe "clobber" target shortly by deleteing "*.imx" and "*.map" > with wildcard matching. > - Rebase on the current u-boot/master I really should have provided this earlier. Wanted to run some more ARM tests, but haven't taken the time yet and did not want to further delay my "tested by" feedback. Have run-tested v5 and v7 on PowerPC based hardware, and build-tested other iterations of the patch set. Tested-by: Gerhard Sittig The test was done for MPC5121 on an ifm AC14xx board; the U-Boot binary works as expected, the fw_printenv(1) tool can be cross built as well as native, out-of-source builds work perfectly (and allow to identify where the source resides -- yay!). The most recent test setup was created from - U-Boot master e222b1f36fed "powerpc/mpc85xx:Increase binary size for P, B & T series boards." - the "sandbox: Use system headers first for sandbox's os.c in a different way" prerequisite patch - the v7 version of this Kbuild series virtually yours Gerhard Sittig -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr. 5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: off...@denx.de ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH V2] disk:efi: avoid unaligned access on efi partition
This patch fixes part_efi code to avoid unaligned access exception
on some ARM platforms.
Signed-off-by: Piotr Wilczek
Signed-off-by: Kyungmin Park
CC: Tom Rini
CC: Albert ARIBAUD
---
Chnages for V2:
- used put_unaligned to copy value;
- use __aligned to align local array;
disk/part_efi.c |7 ---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/disk/part_efi.c b/disk/part_efi.c
index 9c33ae7..eb2cd57 100644
--- a/disk/part_efi.c
+++ b/disk/part_efi.c
@@ -225,7 +225,7 @@ static int set_protective_mbr(block_dev_desc_t *dev_desc)
p_mbr->signature = MSDOS_MBR_SIGNATURE;
p_mbr->partition_record[0].sys_ind = EFI_PMBR_OSTYPE_EFI_GPT;
p_mbr->partition_record[0].start_sect = 1;
- p_mbr->partition_record[0].nr_sects = (u32) dev_desc->lba;
+ put_unaligned(dev_desc->lba, &p_mbr->partition_record[0].nr_sects);
/* Write MBR sector to the MMC device */
if (dev_desc->block_write(dev_desc->dev, 0, 1, p_mbr) != 1) {
@@ -361,6 +361,8 @@ int gpt_fill_pte(gpt_header *gpt_h, gpt_entry *gpt_e,
#ifdef CONFIG_PARTITION_UUIDS
char *str_uuid;
#endif
+ static efi_guid_t basic_guid __aligned(0x04) =
+ PARTITION_BASIC_DATA_GUID;
for (i = 0; i < parts; i++) {
/* partition starting lba */
@@ -388,8 +390,7 @@ int gpt_fill_pte(gpt_header *gpt_h, gpt_entry *gpt_e,
gpt_e[i].ending_lba = cpu_to_le64(offset - 1);
/* partition type GUID */
- memcpy(gpt_e[i].partition_type_guid.b,
- &PARTITION_BASIC_DATA_GUID, 16);
+ gpt_e[i].partition_type_guid = basic_guid;
#ifdef CONFIG_PARTITION_UUIDS
str_uuid = partitions[i].uuid;
--
1.7.9.5
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Re: [U-Boot] [PATCH 9/9] board:trats2:fdt: Enable device tree on Trats2
Hi Jaehoon,
> On 01/27/2014 11:15 PM, Piotr Wilczek wrote:
> > This patch enables to run Trats2 board on device tree.
> >
> > Signed-off-by: Piotr Wilczek
> > Signed-off-by: Kyungmin Park
> > CC: Minkyu Kang
> > ---
> > board/samsung/dts/exynos4412-trats2.dts | 434
> +++
> > board/samsung/trats2/trats2.c | 216 +--
> > include/configs/trats2.h| 199 ++
> > 3 files changed, 459 insertions(+), 390 deletions(-) create mode
> > 100644 board/samsung/dts/exynos4412-trats2.dts
> >
> > diff --git a/board/samsung/dts/exynos4412-trats2.dts
> > b/board/samsung/dts/exynos4412-trats2.dts
> > new file mode 100644
> > index 000..c8f847c
> > --- /dev/null
> > +++ b/board/samsung/dts/exynos4412-trats2.dts
> > @@ -0,0 +1,434 @@
> > +/*
> > + * Samsung's Exynos4412 based Trats2 board device tree source
> > + *
> > + * Copyright (c) 2014 Samsung Electronics Co., Ltd.
> > + * http://www.samsung.com
> > + *
> > + * SPDX-License-Identifier:GPL-2.0+
> > + */
> > +
> > +/dts-v1/;
> > +/include/ "exynos4.dtsi"
> > +
> > +/ {
> > + model = "Samsung Trats2 based on Exynos4412";
> > + compatible = "samsung,trats2", "samsung,exynos4412";
> > +
> > + config {
> > + samsung,dsim-device-name = "s6e8ax0";
> > + };
> > +
> > + aliases {
> > + i2c0 = "/i2c@1386";
> > + i2c1 = "/i2c@1387";
> > + i2c2 = "/i2c@1388";
> > + i2c3 = "/i2c@1389";
> > + i2c4 = "/i2c@138a";
> > + i2c5 = "/i2c@138b";
> > + i2c6 = "/i2c@138c";
> > + i2c7 = "/i2c@138d";
> > + serial0 = "/serial@1380";
> > + console = "/serial@1382";
> > + mmc0 = "sdhci@1251";
> > + mmc2 = "sdhci@1251";
>
> mmc2 isn't 0x1251.
It is 0x1253, thanks.
Best regards,
Piotr Wilczek
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Re: [U-Boot] [PATCH 4/9] drivers:mmc:sdhci: enable support for DT
Hi Jaehoon,
> Hi, Piotr.
>
> On 01/27/2014 11:15 PM, Piotr Wilczek wrote:
> > This patch enables support for device tree for sdhci driver.
> > Non DT case is still supported.
> >
> > Signed-off-by: Piotr Wilczek
> > Signed-off-by: Kyungmin Park
> > Cc: Minkyu Kang
> > ---
> > arch/arm/include/asm/arch-exynos/mmc.h |7 ++
> > drivers/mmc/s5p_sdhci.c| 130
> +++-
> > include/fdtdec.h |1 +
> > include/sdhci.h|5 ++
> > lib/fdtdec.c |1 +
> > 5 files changed, 143 insertions(+), 1 deletion(-)
> >
> > diff --git a/arch/arm/include/asm/arch-exynos/mmc.h
> > b/arch/arm/include/asm/arch-exynos/mmc.h
> > index 98d6530..0fb6461 100644
> > --- a/arch/arm/include/asm/arch-exynos/mmc.h
> > +++ b/arch/arm/include/asm/arch-exynos/mmc.h
> > @@ -53,6 +53,8 @@
> > #define SDHCI_CTRL4_DRIVE_MASK(_x) ((_x) << 16)
> > #define SDHCI_CTRL4_DRIVE_SHIFT(16)
> >
> > +#define SDHCI_MAX_HOSTS 4
> > +
> > int s5p_sdhci_init(u32 regbase, int index, int bus_width);
> >
> > static inline int s5p_mmc_init(int index, int bus_width) @@ -62,4
> > +64,9 @@ static inline int s5p_mmc_init(int index, int bus_width)
> >
> > return s5p_sdhci_init(base, index, bus_width); }
> > +
> > +#ifdef CONFIG_OF_CONTROL
> > +int exynos_mmc_init(const void *blob); #endif
> > +
> > #endif
> > diff --git a/drivers/mmc/s5p_sdhci.c b/drivers/mmc/s5p_sdhci.c index
> > 40ff873..7456ee0 100644
> > --- a/drivers/mmc/s5p_sdhci.c
> > +++ b/drivers/mmc/s5p_sdhci.c
> > @@ -8,9 +8,15 @@
> > #include
> > #include
> > #include
> > +#include
> > +#include
> > +#include
> > #include
> > #include
> > -
> > +#include
> > +#ifdef CONFIG_OF_CONTROL
> > +#include
> > +#endif
> > static char *S5P_NAME = "SAMSUNG SDHCI"; static void
> > s5p_sdhci_set_control_reg(struct sdhci_host *host) { @@ -86,3
> +92,125
> > @@ int s5p_sdhci_init(u32 regbase, int index, int bus_width)
> >
> > return add_sdhci(host, 5200, 40); }
> > +
> > +#ifdef CONFIG_OF_CONTROL
> > +struct sdhci_host sdhci_host[SDHCI_MAX_HOSTS];
> > +
> > +static int do_sdhci_init(struct sdhci_host *host) {
> > + int dev_id, flag;
> > + int err = 0;
> > +
> > + flag = host->bus_width == 8 ? PINMUX_FLAG_8BIT_MODE :
> PINMUX_FLAG_NONE;
> > + dev_id = host->index + PERIPH_ID_SDMMC0;
> > +
> > + if (fdt_gpio_isvalid(&host->pwr_gpio)) {
> > + gpio_direction_output(host->pwr_gpio.gpio, 1);
>
> what's pwr_gpio? Is it used for the both(eMMC and SD card)?
pwr_gpio is used only for eMMC.
cd_gpio is used for SD Card.
>
> > + err = exynos_pinmux_config(dev_id, flag);
> > + if (err) {
> > + debug("MMC not configured\n");
> > + return err;
> > + }
> > + }
> > +
> > + if (fdt_gpio_isvalid(&host->cd_gpio)) {
> > + gpio_direction_output(host->cd_gpio.gpio, 0xf);
> > + if (gpio_get_value(host->cd_gpio.gpio))
> > + return -ENODEV;
> > +
> > + err = exynos_pinmux_config(dev_id, flag);
> > + if (err) {
> > + printf("external SD not configured\n");
> > + return err;
> > + }
> > + }
> > +
> > + host->name = S5P_NAME;
> > +
> > + host->quirks = SDHCI_QUIRK_NO_HISPD_BIT |
> SDHCI_QUIRK_BROKEN_VOLTAGE |
> > + SDHCI_QUIRK_BROKEN_R1B | SDHCI_QUIRK_32BIT_DMA_ADDR |
> > + SDHCI_QUIRK_WAIT_SEND_CMD;
> > + host->voltages = MMC_VDD_32_33 | MMC_VDD_33_34 | MMC_VDD_165_195;
> > + host->version = sdhci_readw(host, SDHCI_HOST_VERSION);
> > +
> > + host->set_control_reg = &s5p_sdhci_set_control_reg;
> > + host->set_clock = set_mmc_clk;
> > +
> > + host->host_caps = MMC_MODE_HC;
> > +
> > + return add_sdhci(host, 5200, 40); }
> > +
> > +static int sdhci_get_config(const void *blob, int node, struct
> > +sdhci_host *host) {
> > + int bus_width, dev_id;
> > + unsigned int base;
> > +
> > + /* Get device id */
> > + dev_id = pinmux_decode_periph_id(blob, node);
> > + if (dev_id < PERIPH_ID_SDMMC0) {
>
> Didn't need to check other boundary?
Yes, I should check for the PERIPH_ID_SDMMC3
>
> > + debug("MMC: Can't get device id\n");
> > + return -1;
> > + }
> > + host->index = dev_id - PERIPH_ID_SDMMC0;
> > +
> > + /* Get bus width */
> > + bus_width = fdtdec_get_int(blob, node, "samsung,bus-width", 0);
> > + if (bus_width <= 0) {
> > + debug("MMC: Can't get bus-width\n");
> > + return -1;
> > + }
> > + host->bus_width = bus_width;
> > +
> > + /* Get the base address from the device node */
> > + base = fdtdec_get_addr(blob, node, "reg");
> > + if (!base) {
> > + debug("DWMMC: Can't get base address\n");
>
> DWMMC?
MMC
>
> > + return -1;
> > + }
> > + host->ioaddr = (void *)base;
> > +
> > + fdtdec_decode_gpio(blob, node, "pwr-gpios", &host->pwr_gp
Re: [U-Boot] [PATCH 1/9] exynos4:pinmux:fdt: decode peripheral id
Hi Jaehoon,
Thanks for review. Please comments below.
> -Original Message-
>
> Hi, Piotr.
>
> On 01/27/2014 11:15 PM, Piotr Wilczek wrote:
> > This patch adds api to decode peripheral id based in interrupt
> number.
> >
> > Signed-off-by: Piotr Wilczek
> > Signed-off-by: Kyungmin Park
> > CC: Minkyu Kang
> > ---
> > arch/arm/cpu/armv7/exynos/pinmux.c | 21 +
> > 1 file changed, 21 insertions(+)
> >
> > diff --git a/arch/arm/cpu/armv7/exynos/pinmux.c
> > b/arch/arm/cpu/armv7/exynos/pinmux.c
> > index 904177a..3201d53 100644
> > --- a/arch/arm/cpu/armv7/exynos/pinmux.c
> > +++ b/arch/arm/cpu/armv7/exynos/pinmux.c
> > @@ -741,6 +741,25 @@ int exynos_pinmux_config(int peripheral, int
> > flags) }
> >
> > #ifdef CONFIG_OF_CONTROL
> > +
>
> Remove the white space.
Ok.
>
> > +static int exynos4_pinmux_decode_periph_id(const void *blob, int
> > +node) {
> > + int err;
> > + u32 cell[3];
> > +
> > + err = fdtdec_get_int_array(blob, node, "interrupts", cell,
> > + ARRAY_SIZE(cell));
> > + if (err)
> > + return PERIPH_ID_NONE;
> > +
> > + /* check for invalid peripheral id */
> > + if ((PERIPH_ID_SDMMC4 > cell[1]) || (cell[1] < PERIPH_ID_UART0))
>
> What's condition checking? i didn't understand this.
> PERIPH_ID_SDMMC > cell[1] or PERIPH_ID_UART0 > cell[1] is valid?
>
It supposed to check if cell[1] is within supported periph_id range and
should be like this:
If ((cell[1] >= PERIPH_ID_UART0) && (cell[1] < PERIPH_ID_COUNT))
> Best Regards,
> Jaehoon Chung
>
> > + return cell[1];
> > +
> > + debug(" invalid peripheral id\n");
> > + return PERIPH_ID_NONE;
> > +}
> > +
> > static int exynos5_pinmux_decode_periph_id(const void *blob, int
> > node) {
> > int err;
> > @@ -763,6 +782,8 @@ int pinmux_decode_periph_id(const void *blob, int
> > node) {
> > if (cpu_is_exynos5())
> > return exynos5_pinmux_decode_periph_id(blob, node);
> > + else if (cpu_is_exynos4())
> > + return exynos4_pinmux_decode_periph_id(blob, node);
> > else
> > return PERIPH_ID_NONE;
> > }
> >
Best regards,
Piotr Wilczek
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[U-Boot] Pull request: u-boot-nds32
Hi Tom, Please pull the following patch from u-boot-nds32 into your tree. Thanks! The following changes since commit 0876703cf2ee107372b56037d4eeeb7604c56796: boards.cfg: Keep the entries sorted (2014-01-27 08:28:35 -0500) are available in the git repository at: git://git.denx.de/u-boot-nds32.git master for you to fetch changes up to f889cc81c1572f4af0be950fd49bb6b67bc580fb: nds32: add support for leopard and orca board boot flow auto detect (2014-01-28 19:23:01 +0800) rick (1): nds32: add support for leopard and orca board boot flow auto detect arch/nds32/cpu/n1213/ag101/asm-offsets.c |1 + arch/nds32/cpu/n1213/ag101/lowlevel_init.S | 88 ++- 2 files changed, 85 insertions(+), 4 deletions(-) ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] board: nios2: Check if flash is configured before calling early_flash_cmd_reset()
If CONFIG_CFI_FLASH_MTD is not defined, then we shouldn't perform the
flash early reset.
This commit fixes the following build error:
nios2-generic.c: In function `__early_flash_cmd_reset':
nios2-generic.c:23: error: `AMD_CMD_RESET' undeclared (first use in this
function)
nios2-generic.c:23: error: (Each undeclared identifier is reported only once
nios2-generic.c:23: error: for each function it appears in.)
nios2-generic.c:24: error: `FLASH_CMD_RESET' undeclared (first use in this
function)
which was introduced by:
commit a113fb39df43546c704aa8eba55720da9a9dfedd
Author: Ezequiel Garcia
Date: Fri Dec 20 18:34:53 2013 -0300
board: nios2: Add CONFIG_CFI_FLASH_MTD guard to flash.h header include
Signed-off-by: Ezequiel Garcia
Cc: Thomas Chou
Reported-by: Masahiro Yamada
Signed-off-by: Ezequiel Garcia
---
BTW, can't see why we are doing this "weak alias" trick. Looks bogus to me.
board/altera/nios2-generic/nios2-generic.c | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/board/altera/nios2-generic/nios2-generic.c
b/board/altera/nios2-generic/nios2-generic.c
index aa126d7..5ab9471 100644
--- a/board/altera/nios2-generic/nios2-generic.c
+++ b/board/altera/nios2-generic/nios2-generic.c
@@ -16,7 +16,8 @@
void text_base_hook(void); /* nop hook for text_base.S */
-#if defined(CONFIG_ENV_IS_IN_FLASH) && defined(CONFIG_ENV_ADDR)
+#if defined(CONFIG_ENV_IS_IN_FLASH) && defined(CONFIG_ENV_ADDR) && \
+defined(CONFIG_CFI_FLASH_MTD)
static void __early_flash_cmd_reset(void)
{
/* reset flash before we read env */
@@ -37,7 +38,8 @@ int board_early_init_f(void)
"led");
#endif
#endif
-#if defined(CONFIG_ENV_IS_IN_FLASH) && defined(CONFIG_ENV_ADDR)
+#if defined(CONFIG_ENV_IS_IN_FLASH) && defined(CONFIG_ENV_ADDR) && \
+defined(CONFIG_CFI_FLASH_MTD)
early_flash_cmd_reset();
#endif
return 0;
--
1.8.1.5
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Re: [U-Boot] [PATCH 2/2] mx6qsabreauto: Add splash screen support
Hi Fabio,
On 27/01/2014 17:05, Fabio Estevam wrote:
> Allow the splash screen to work on LVDS or HDMI.
>
> Signed-off-by: Fabio Estevam
> ---
> board/freescale/mx6qsabreauto/mx6qsabreauto.c | 195
> ++
> include/configs/mx6qsabreauto.h | 16 +++
> 2 files changed, 211 insertions(+)
>
> diff --git a/board/freescale/mx6qsabreauto/mx6qsabreauto.c
> b/board/freescale/mx6qsabreauto/mx6qsabreauto.c
> index 928dadf..44fc71a 100644
> --- a/board/freescale/mx6qsabreauto/mx6qsabreauto.c
> +++ b/board/freescale/mx6qsabreauto/mx6qsabreauto.c
> @@ -23,6 +23,10 @@
> #include
> #include
> #include
> +#include
> +#include
> +#include
> +#include
>
> DECLARE_GLOBAL_DATA_PTR;
>
> @@ -43,6 +47,8 @@ DECLARE_GLOBAL_DATA_PTR;
>
> #define PC MUX_PAD_CTRL(I2C_PAD_CTRL)
>
> +#define LVDS_BACKLIGHT IMX_GPIO_NR(2, 9)
> +
> int dram_init(void)
> {
> gd->ram_size = get_ram_size((void *)PHYS_SDRAM, PHYS_SDRAM_SIZE);
> @@ -132,6 +138,10 @@ iomux_v3_cfg_t const usdhc3_pads[] = {
> MX6_PAD_NANDF_CS2__GPIO6_IO15 | MUX_PAD_CTRL(NO_PAD_CTRL),
> };
>
> +static iomux_v3_cfg_t const backlight[] = {
> + MX6_PAD_SD4_DAT1__GPIO2_IO09 | MUX_PAD_CTRL(ENET_PAD_CTRL),
> +};
> +
> static void setup_iomux_uart(void)
> {
> imx_iomux_v3_setup_multiple_pads(uart4_pads, ARRAY_SIZE(uart4_pads));
> @@ -190,6 +200,186 @@ int board_phy_config(struct phy_device *phydev)
> return 0;
> }
>
> +#if defined(CONFIG_VIDEO_IPUV3)
> +struct display_info_t {
> + int bus;
> + int addr;
> + int pixfmt;
> + int (*detect)(struct display_info_t const *dev);
> + void(*enable)(struct display_info_t const *dev);
> + struct fb_videomode mode;
> +};
> +
> +static int detect_hdmi(struct display_info_t const *dev)
> +{
> + struct hdmi_regs *hdmi = (struct hdmi_regs *)HDMI_ARB_BASE_ADDR;
> + return readb(&hdmi->phy_stat0) & HDMI_DVI_STAT;
> +}
> +
> +static void disable_lvds(struct display_info_t const *dev)
> +{
> + struct iomuxc *iomux = (struct iomuxc *)IOMUXC_BASE_ADDR;
> + int reg = readl(&iomux->gpr[2]);
> + reg &= ~IOMUXC_GPR2_LVDS_CH0_MODE_MASK;
> + writel(reg, &iomux->gpr[2]);
> +}
> +
> +static void do_enable_hdmi(struct display_info_t const *dev)
> +{
> + disable_lvds(dev);
> + imx_enable_hdmi_phy();
> +}
> +
> +static void enable_lvds(struct display_info_t const *dev)
> +{
> + struct iomuxc *iomux = (struct iomuxc *)
> + IOMUXC_BASE_ADDR;
> + u32 reg = readl(&iomux->gpr[2]);
> + reg |= IOMUXC_GPR2_DATA_WIDTH_CH0_18BIT;
> + writel(reg, &iomux->gpr[2]);
> +}
> +
> +static struct display_info_t const displays[] = {{
> + .bus= -1,
> + .addr = 0,
> + .pixfmt = IPU_PIX_FMT_RGB666,
> + .detect = NULL,
> + .enable = enable_lvds,
> + .mode = {
> + .name = "Hannstar-XGA",
> + .refresh= 60,
> + .xres = 1024,
> + .yres = 768,
> + .pixclock = 15385,
> + .left_margin= 220,
> + .right_margin = 40,
> + .upper_margin = 21,
> + .lower_margin = 7,
> + .hsync_len = 60,
> + .vsync_len = 10,
> + .sync = FB_SYNC_EXT,
> + .vmode = FB_VMODE_NONINTERLACED
> +} }, {
> + .bus= -1,
> + .addr = 0,
> + .pixfmt = IPU_PIX_FMT_RGB24,
> + .detect = detect_hdmi,
> + .enable = do_enable_hdmi,
> + .mode = {
> + .name = "HDMI",
> + .refresh= 60,
> + .xres = 1024,
> + .yres = 768,
> + .pixclock = 15385,
> + .left_margin= 220,
> + .right_margin = 40,
> + .upper_margin = 21,
> + .lower_margin = 7,
> + .hsync_len = 60,
> + .vsync_len = 10,
> + .sync = FB_SYNC_EXT,
> + .vmode = FB_VMODE_NONINTERLACED
> +} } };
> +
> +int board_video_skip(void)
> +{
> + int i;
> + int ret;
> + char const *panel = getenv("panel");
> + if (!panel) {
> + for (i = 0; i < ARRAY_SIZE(displays); i++) {
> + struct display_info_t const *dev = displays+i;
> + if (dev->detect && dev->detect(dev)) {
> + panel = dev->mode.name;
> + printf("auto-detected panel %s\n", panel);
> + break;
> + }
> + }
> + if (!panel) {
> + panel = displays[0].mode.name;
> + printf("No panel detected: default to %s\n", panel);
> + i = 0;
> + }
> + } else {
> + for (i = 0; i < ARRAY_SIZE(displays); i++) {
> +
Re: [U-Boot] [PATCH] ventana: Add Gateworks Ventana family support
Hi Tim,
On 28/01/2014 00:36, Tim Harvey wrote:
>
> I will include the ddr config files from boundary with a
> ../../boundary/... where they do not differ. The clocks.cfg does
> differ (see below) but I liked the way Boundary broke these files out
> do want to re-use as much as possible.
ok, I see. Clock for NAND is not enabled in nitrogen's file. Well, then
we should have only clocks.cfg for ventana.
>>> diff --git a/board/gateworks/gw_ventana/README
>>> b/board/gateworks/gw_ventana/README
>>> new file mode 100644
>>> index 000..9de55ba
>>> --- /dev/null
>>> +++ b/board/gateworks/gw_ventana/README
>>> @@ -0,0 +1,49 @@
>>> +U-Boot for the Gateworks Ventana Product Family boards
>>> +
>>> +This file contains information for the port of U-Boot to the Gateworks
>>> +Ventana Product family boards.
>>> +
>>> +1. Boot source, boot from NAND
>>> +--
>>> +
>>> +The i.MX6 BOOT ROM expects some headers that provide details of NAND layout
>>> +and bad block information (referred to as 'bootstreams') which are
>>> replicated
>>> +multiple times in NAND.
>>> The number of replications is configurable through
>>> +board strapping options and eFUSE settings. The Freescale 'kobs-ng'
>>> +application from the Freescale LTIB BSP, which runs under Linux, must be
>>> used
>>> +to program the bootstream in order to setup the replicated headers
>>> correctly.
>>
>> The behavior is quite different as we have currently in mainline. With
>> kobs-ng you flash u-boot.bin, while the result image for i.MXes in
>> mailine is u-boot.imx (u-boot.bin with imx header).
>
> I'm not familiar with the IMX family other than IMX6 but for IMX6
> kobs-ng does use u-boot.imx and not u-boot.bin. kobs needs the
> headers which are not part of u-boot.bin. Are you sure you are not
> mistaken here? Can you point me to some references?
I think there is a misunderstanding due to the usage of "headers". What
do you mean with headers here ? As you talk about BOOT ROM, the only
header that the ROM understands is the i.MX image header, that is the
description of the image itself with the DCD and all that stuff. When
you say that kobs-ng needs "headers", it seems you are talking about .h
files,
As far as I know, kobs-ng is a flasher - a utility to install u-boot on
the target. It is not the only method to install the binary. I think you
should rework the text making the statements more clearer.
> Regardless of what is loading the next level (u-boot.bin) the initial
> flashing of NAND is still currently handled only by kobs-ng so I'm not
> sure how this differs in this respect. I plan to look at adding the
> functionality of kobs-ng to u-boot at some point.
If as I think kobs-ng is only a flasher, it does not take part to the
build of U-Boot binaries. IMHO it should be not part of U-Boot sources,
but maybe there are some features that can be interesting.
>>> + * retries.
>>> + */
>>> +int gsc_i2c_read(uchar chip, uint addr, int alen, uchar *buf, int len)
>>> +{
>>> + int retry = 3;
>>> + int n = 0;
>>> + int ret;
>>> +
>>> + while (n++ < retry) {
>>> + ret = i2c_read(chip, addr, alen, buf, len);
>>> + if (!ret)
>>> + break;
>>> + printf("%s: 0x%02x 0x%02x retry%d: %d\n", __func__, chip,
>>> addr,
>>> +n, ret);
>>> + if (ret != -ENODEV)
>>> + break;
>>> + mdelay(10);
>>> + }
>>
>> Whcih is the benefit of trying three times ?
>
> it provides a little more redundancy than 2 times, and a little less than 4 ;)
As there is no guarantee that works, but it is only statistics, it looks
more a workaround as a solution.
>
> Our GSC can occasionally be 'busy' and NAK (every 1Hz it does some
> internal processing).
ok - but is there no way to understand that the component is busy ?
I mean, in most hardware solutions (there is plenty of them in
Freescale's SOCs), software must poll a bit (a pin, whatever...) to
check if it can access the component. Nothing here ?
> As there are several places where I perform an
> i2c transaction to one of the GSC's slave devices (it emulates several
> i2c devices) I wanted to consolidate where I had retry logic. There
> is nothing magic about 3 tries necessarily but I have found that with
> the speed of the SoC we never fail more than 2 successive reads due to
> the periodic loading of the GSC.
>
> If you want more info on the GSC you can read about it here:
> http://trac.gateworks.com/wiki/gsc
I read the doc - however, there is no mention about this important detail !
>>
>>> +
>>> +/*
>>> + * For SPL boot some boards need i2c before SDRAM is initialized so force
>>> + * variables to live in SRAM
>>> + */
>>
>> Agree - but then I will see SPL...
>>
>>> +static struct ventana_board_info __attribute__((section(".data")))
>>> ventana_info;
>>
>> Can you explain why do you need this ?
>
> This was in preparation for SPL. I'm not clear if th
Re: [U-Boot] [PATCH 9/9] board:trats2:fdt: Enable device tree on Trats2
On 01/27/2014 11:15 PM, Piotr Wilczek wrote:
> This patch enables to run Trats2 board on device tree.
>
> Signed-off-by: Piotr Wilczek
> Signed-off-by: Kyungmin Park
> CC: Minkyu Kang
> ---
> board/samsung/dts/exynos4412-trats2.dts | 434
> +++
> board/samsung/trats2/trats2.c | 216 +--
> include/configs/trats2.h| 199 ++
> 3 files changed, 459 insertions(+), 390 deletions(-)
> create mode 100644 board/samsung/dts/exynos4412-trats2.dts
>
> diff --git a/board/samsung/dts/exynos4412-trats2.dts
> b/board/samsung/dts/exynos4412-trats2.dts
> new file mode 100644
> index 000..c8f847c
> --- /dev/null
> +++ b/board/samsung/dts/exynos4412-trats2.dts
> @@ -0,0 +1,434 @@
> +/*
> + * Samsung's Exynos4412 based Trats2 board device tree source
> + *
> + * Copyright (c) 2014 Samsung Electronics Co., Ltd.
> + * http://www.samsung.com
> + *
> + * SPDX-License-Identifier: GPL-2.0+
> + */
> +
> +/dts-v1/;
> +/include/ "exynos4.dtsi"
> +
> +/ {
> + model = "Samsung Trats2 based on Exynos4412";
> + compatible = "samsung,trats2", "samsung,exynos4412";
> +
> + config {
> + samsung,dsim-device-name = "s6e8ax0";
> + };
> +
> + aliases {
> + i2c0 = "/i2c@1386";
> + i2c1 = "/i2c@1387";
> + i2c2 = "/i2c@1388";
> + i2c3 = "/i2c@1389";
> + i2c4 = "/i2c@138a";
> + i2c5 = "/i2c@138b";
> + i2c6 = "/i2c@138c";
> + i2c7 = "/i2c@138d";
> + serial0 = "/serial@1380";
> + console = "/serial@1382";
> + mmc0 = "sdhci@1251";
> + mmc2 = "sdhci@1251";
mmc2 isn't 0x1251.
> + };
> +
> + i2c@138d {
> + samsung,i2c-sda-delay = <100>;
> + samsung,i2c-slave-addr = <0x10>;
> + samsung,i2c-max-bus-freq = <10>;
> + status = "okay";
> +
> + max77686_pmic@09 {
> + compatible = "maxim,max77686_pmic";
> + interrupts = <7 0>;
> + reg = <0x09 0 0>;
> + #clock-cells = <1>;
> +
> + voltage-regulators {
> + ldo1_reg: ldo1 {
> + regulator-compatible = "LDO1";
> + regulator-name = "VALIVE_1.0V_AP";
> + regulator-min-microvolt = <100>;
> + regulator-max-microvolt = <100>;
> + regulator-always-on;
> + regulator-mem-on;
> + };
> +
> + ldo2_reg: ldo2 {
> + regulator-compatible = "LDO2";
> + regulator-name = "VM1M2_1.2V_AP";
> + regulator-min-microvolt = <120>;
> + regulator-max-microvolt = <120>;
> + regulator-always-on;
> + regulator-mem-on;
> + };
> +
> + ldo3_reg: ldo3 {
> + regulator-compatible = "LDO3";
> + regulator-name = "VCC_1.8V_AP";
> + regulator-min-microvolt = <180>;
> + regulator-max-microvolt = <180>;
> + regulator-always-on;
> + regulator-mem-on;
> + };
> +
> + ldo4_reg: ldo4 {
> + regulator-compatible = "LDO4";
> + regulator-name = "VCC_2.8V_AP";
> + regulator-min-microvolt = <280>;
> + regulator-max-microvolt = <280>;
> + regulator-always-on;
> + regulator-mem-on;
> + };
> +
> + ldo5_reg: ldo5 {
> + regulator-compatible = "LDO5";
> + regulator-name = "VCC_1.8V_IO";
> + regulator-min-microvolt = <180>;
> + regulator-max-microvolt = <180>;
> + regulator-always-on;
> + regulator-mem-on;
> + };
> +
> + ldo6_reg: ldo6 {
> + regulator-compatible = "LDO6";
> + regulator-name = "VMPLL_1.0V_A
Re: [U-Boot] [PATCH 4/9] drivers:mmc:sdhci: enable support for DT
Hi, Piotr.
On 01/27/2014 11:15 PM, Piotr Wilczek wrote:
> This patch enables support for device tree for sdhci driver.
> Non DT case is still supported.
>
> Signed-off-by: Piotr Wilczek
> Signed-off-by: Kyungmin Park
> Cc: Minkyu Kang
> ---
> arch/arm/include/asm/arch-exynos/mmc.h |7 ++
> drivers/mmc/s5p_sdhci.c| 130
> +++-
> include/fdtdec.h |1 +
> include/sdhci.h|5 ++
> lib/fdtdec.c |1 +
> 5 files changed, 143 insertions(+), 1 deletion(-)
>
> diff --git a/arch/arm/include/asm/arch-exynos/mmc.h
> b/arch/arm/include/asm/arch-exynos/mmc.h
> index 98d6530..0fb6461 100644
> --- a/arch/arm/include/asm/arch-exynos/mmc.h
> +++ b/arch/arm/include/asm/arch-exynos/mmc.h
> @@ -53,6 +53,8 @@
> #define SDHCI_CTRL4_DRIVE_MASK(_x) ((_x) << 16)
> #define SDHCI_CTRL4_DRIVE_SHIFT (16)
>
> +#define SDHCI_MAX_HOSTS 4
> +
> int s5p_sdhci_init(u32 regbase, int index, int bus_width);
>
> static inline int s5p_mmc_init(int index, int bus_width)
> @@ -62,4 +64,9 @@ static inline int s5p_mmc_init(int index, int bus_width)
>
> return s5p_sdhci_init(base, index, bus_width);
> }
> +
> +#ifdef CONFIG_OF_CONTROL
> +int exynos_mmc_init(const void *blob);
> +#endif
> +
> #endif
> diff --git a/drivers/mmc/s5p_sdhci.c b/drivers/mmc/s5p_sdhci.c
> index 40ff873..7456ee0 100644
> --- a/drivers/mmc/s5p_sdhci.c
> +++ b/drivers/mmc/s5p_sdhci.c
> @@ -8,9 +8,15 @@
> #include
> #include
> #include
> +#include
> +#include
> +#include
> #include
> #include
> -
> +#include
> +#ifdef CONFIG_OF_CONTROL
> +#include
> +#endif
> static char *S5P_NAME = "SAMSUNG SDHCI";
> static void s5p_sdhci_set_control_reg(struct sdhci_host *host)
> {
> @@ -86,3 +92,125 @@ int s5p_sdhci_init(u32 regbase, int index, int bus_width)
>
> return add_sdhci(host, 5200, 40);
> }
> +
> +#ifdef CONFIG_OF_CONTROL
> +struct sdhci_host sdhci_host[SDHCI_MAX_HOSTS];
> +
> +static int do_sdhci_init(struct sdhci_host *host)
> +{
> + int dev_id, flag;
> + int err = 0;
> +
> + flag = host->bus_width == 8 ? PINMUX_FLAG_8BIT_MODE : PINMUX_FLAG_NONE;
> + dev_id = host->index + PERIPH_ID_SDMMC0;
> +
> + if (fdt_gpio_isvalid(&host->pwr_gpio)) {
> + gpio_direction_output(host->pwr_gpio.gpio, 1);
what's pwr_gpio? Is it used for the both(eMMC and SD card)?
> + err = exynos_pinmux_config(dev_id, flag);
> + if (err) {
> + debug("MMC not configured\n");
> + return err;
> + }
> + }
> +
> + if (fdt_gpio_isvalid(&host->cd_gpio)) {
> + gpio_direction_output(host->cd_gpio.gpio, 0xf);
> + if (gpio_get_value(host->cd_gpio.gpio))
> + return -ENODEV;
> +
> + err = exynos_pinmux_config(dev_id, flag);
> + if (err) {
> + printf("external SD not configured\n");
> + return err;
> + }
> + }
> +
> + host->name = S5P_NAME;
> +
> + host->quirks = SDHCI_QUIRK_NO_HISPD_BIT | SDHCI_QUIRK_BROKEN_VOLTAGE |
> + SDHCI_QUIRK_BROKEN_R1B | SDHCI_QUIRK_32BIT_DMA_ADDR |
> + SDHCI_QUIRK_WAIT_SEND_CMD;
> + host->voltages = MMC_VDD_32_33 | MMC_VDD_33_34 | MMC_VDD_165_195;
> + host->version = sdhci_readw(host, SDHCI_HOST_VERSION);
> +
> + host->set_control_reg = &s5p_sdhci_set_control_reg;
> + host->set_clock = set_mmc_clk;
> +
> + host->host_caps = MMC_MODE_HC;
> +
> + return add_sdhci(host, 5200, 40);
> +}
> +
> +static int sdhci_get_config(const void *blob, int node, struct sdhci_host
> *host)
> +{
> + int bus_width, dev_id;
> + unsigned int base;
> +
> + /* Get device id */
> + dev_id = pinmux_decode_periph_id(blob, node);
> + if (dev_id < PERIPH_ID_SDMMC0) {
Didn't need to check other boundary?
> + debug("MMC: Can't get device id\n");
> + return -1;
> + }
> + host->index = dev_id - PERIPH_ID_SDMMC0;
> +
> + /* Get bus width */
> + bus_width = fdtdec_get_int(blob, node, "samsung,bus-width", 0);
> + if (bus_width <= 0) {
> + debug("MMC: Can't get bus-width\n");
> + return -1;
> + }
> + host->bus_width = bus_width;
> +
> + /* Get the base address from the device node */
> + base = fdtdec_get_addr(blob, node, "reg");
> + if (!base) {
> + debug("DWMMC: Can't get base address\n");
DWMMC?
> + return -1;
> + }
> + host->ioaddr = (void *)base;
> +
> + fdtdec_decode_gpio(blob, node, "pwr-gpios", &host->pwr_gpio);
> + fdtdec_decode_gpio(blob, node, "cd-gpios", &host->cd_gpio);
> +
> + return 0;
> +}
> +
> +static int process_nodes(const void *blob, int node_list[], int count)
> +{
> + struct sdhci_host *host;
> + int i, node;
> +
> + debug("%s: count = %d\n", __f
[U-Boot] [PATCH] config: remove platform CONFIG_SYS_HZ definition part 3
This commit removes platform CONFIG_SYS_HZ definition for the remainders of part1 (commit cdb23792) and part2 (commit f232950f). Signed-off-by: Masahiro Yamada Cc: Rob Herring --- board/fads/fads.h | 2 -- include/configs/T1040QDS.h | 1 - include/configs/T1040RDB.h | 1 - include/configs/T1042RDB_PI.h | 1 - include/configs/T2080QDS.h | 1 - include/configs/apf27.h| 5 - include/configs/balloon3.h | 1 - include/configs/corvus.h | 1 - include/configs/hummingboard.h | 1 - include/configs/koelsch.h | 1 - include/configs/lager.h| 1 - include/configs/palmld.h | 1 - include/configs/palmtc.h | 1 - include/configs/scb9328.h | 1 - include/configs/taurus.h | 1 - include/configs/udoo.h | 1 - include/configs/usb_a9263.h| 1 - include/configs/zipitz2.h | 1 - 18 files changed, 23 deletions(-) diff --git a/board/fads/fads.h b/board/fads/fads.h index cf6c928..fa49080 100644 --- a/board/fads/fads.h +++ b/board/fads/fads.h @@ -127,8 +127,6 @@ #define CONFIG_SYS_LOAD_ADDR 0x0010 -#defineCONFIG_SYS_HZ 1000/* decrementer freq: 1 ms ticks */ - /* * Low Level Configuration Settings * (address mappings, register initial values, etc.) diff --git a/include/configs/T1040QDS.h b/include/configs/T1040QDS.h index 8234a82..bf82c3e 100644 --- a/include/configs/T1040QDS.h +++ b/include/configs/T1040QDS.h @@ -670,7 +670,6 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ #define CONFIG_SYS_BARGSIZECONFIG_SYS_CBSIZE/* Boot Argument Buffer Size */ -#define CONFIG_SYS_HZ 1000/* decrementer freq: 1ms ticks*/ /* * For booting Linux, the board info and command line data diff --git a/include/configs/T1040RDB.h b/include/configs/T1040RDB.h index 5e988c2..998abe3 100644 --- a/include/configs/T1040RDB.h +++ b/include/configs/T1040RDB.h @@ -596,7 +596,6 @@ #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ #define CONFIG_SYS_BARGSIZECONFIG_SYS_CBSIZE/* Boot Argument Buffer Size */ -#define CONFIG_SYS_HZ 1000/* decrementer freq: 1ms ticks*/ /* * For booting Linux, the board info and command line data diff --git a/include/configs/T1042RDB_PI.h b/include/configs/T1042RDB_PI.h index aafa813..6804a8d 100644 --- a/include/configs/T1042RDB_PI.h +++ b/include/configs/T1042RDB_PI.h @@ -600,7 +600,6 @@ #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ #define CONFIG_SYS_BARGSIZECONFIG_SYS_CBSIZE/* Boot Argument Buffer Size */ -#define CONFIG_SYS_HZ 1000/* decrementer freq: 1ms ticks*/ /* * For booting Linux, the board info and command line data diff --git a/include/configs/T2080QDS.h b/include/configs/T2080QDS.h index 9bd0fe2..9448ec8 100644 --- a/include/configs/T2080QDS.h +++ b/include/configs/T2080QDS.h @@ -680,7 +680,6 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ #define CONFIG_SYS_BARGSIZECONFIG_SYS_CBSIZE/* Boot Argument Buffer Size */ -#define CONFIG_SYS_HZ 1000/* decrementer freq: 1ms ticks*/ /* * For booting Linux, the board info and command line data diff --git a/include/configs/apf27.h b/include/configs/apf27.h index 1193013..b10c48c 100644 --- a/include/configs/apf27.h +++ b/include/configs/apf27.h @@ -356,11 +356,6 @@ #endif /* CONFIG_CMD_DATE */ /* - * Clocks - */ -#defineCONFIG_SYS_HZ 1000/* Ticks per second */ - -/* * PLL * * 31 | x |x| x x x x |x x x x x x x x x x |x x|x x x x|x x x x x x x x x x| 0 diff --git a/include/configs/balloon3.h b/include/configs/balloon3.h index b41a823..5228ba6 100644 --- a/include/configs/balloon3.h +++ b/include/configs/balloon3.h @@ -84,7 +84,6 @@ * Clock Configuration */ #undef CONFIG_SYS_CLKS_IN_HZ -#defineCONFIG_SYS_HZ 1000 #defineCONFIG_SYS_CPUSPEED 0x290 /* 520MHz */ /* diff --git a/include/configs/corvus.h b/include/configs/corvus.h index 11ba4cf..959e188 100644 --- a/include/configs/corvus.h +++ b/include/configs/corvus.h @@ -33,7 +33,6 @@ /* ARM asynchronous clock */ #define CONFIG_SYS_AT91_SLOW_CLOCK 32768 #define CONFIG_SYS_AT91_MAIN_CLOCK 1200 /* from 12 MHz crystal */ -#define CONFIG_SYS_HZ 1000 #define CONFIG_AT91FAMILY diff --git a/include/configs/hummingboard.h b/include/configs/hummingboard.h index 4055af5..d36d16e 100644 --- a/include/configs/hummingboard.h +++ b/include
[U-Boot] [PATCH] m68k: Remove M5271EVB and idmr board support
CONFIG_SYS_HZ must be always 1000, but M5271EVB.h defines it
as 100 and idmr.h defines it as (5000 / 64).
When compiling these two boards, a warning message is displayed:
time.c:14:2: warning: #warning "CONFIG_SYS_HZ must be 1000
and should not be defined by platforms" [-Wcpp]
There are no board maintainers for them so this commit just
deletes them.
Signed-off-by: Masahiro Yamada
Cc: Rob Herring
Cc: Jason Jin
---
board/freescale/m5271evb/Makefile | 8 -
board/freescale/m5271evb/config.mk | 9 -
board/freescale/m5271evb/m5271evb.c | 115
board/freescale/m5271evb/u-boot.lds | 85 -
board/idmr/Makefile | 8 -
board/idmr/config.mk| 9 -
board/idmr/flash.c | 342
board/idmr/idmr.c | 152
board/idmr/u-boot.lds | 82 -
boards.cfg | 2 -
doc/README.scrapyard| 6 +-
include/configs/M5271EVB.h | 234
include/configs/idmr.h | 240 -
13 files changed, 4 insertions(+), 1288 deletions(-)
delete mode 100644 board/freescale/m5271evb/Makefile
delete mode 100644 board/freescale/m5271evb/config.mk
delete mode 100644 board/freescale/m5271evb/m5271evb.c
delete mode 100644 board/freescale/m5271evb/u-boot.lds
delete mode 100644 board/idmr/Makefile
delete mode 100644 board/idmr/config.mk
delete mode 100644 board/idmr/flash.c
delete mode 100644 board/idmr/idmr.c
delete mode 100644 board/idmr/u-boot.lds
delete mode 100644 include/configs/M5271EVB.h
delete mode 100644 include/configs/idmr.h
diff --git a/board/freescale/m5271evb/Makefile
b/board/freescale/m5271evb/Makefile
deleted file mode 100644
index 77138c6..000
--- a/board/freescale/m5271evb/Makefile
+++ /dev/null
@@ -1,8 +0,0 @@
-#
-# (C) Copyright 2000-2006
-# Wolfgang Denk, DENX Software Engineering, w...@denx.de.
-#
-# SPDX-License-Identifier: GPL-2.0+
-#
-
-obj-y = m5271evb.o
diff --git a/board/freescale/m5271evb/config.mk
b/board/freescale/m5271evb/config.mk
deleted file mode 100644
index 957f584..000
--- a/board/freescale/m5271evb/config.mk
+++ /dev/null
@@ -1,9 +0,0 @@
-#
-# (C) Copyright 2000-2006
-# Wolfgang Denk, DENX Software Engineering, w...@denx.de.
-# Coldfire contribution by Bernhard Kuhn
-#
-# SPDX-License-Identifier: GPL-2.0+
-#
-
-CONFIG_SYS_TEXT_BASE = 0xffe0
diff --git a/board/freescale/m5271evb/m5271evb.c
b/board/freescale/m5271evb/m5271evb.c
deleted file mode 100644
index 5981a27..000
--- a/board/freescale/m5271evb/m5271evb.c
+++ /dev/null
@@ -1,115 +0,0 @@
-/*
- * (C) Copyright 2000-2006
- * Wolfgang Denk, DENX Software Engineering, w...@denx.de.
- *
- * SPDX-License-Identifier:GPL-2.0+
- */
-
-#include
-#include
-
-int checkboard (void) {
- puts ("Board: Freescale M5271EVB\n");
- return 0;
-};
-
-phys_size_t initdram (int board_type) {
-
- int i;
-
- /* Enable Address lines 23-21 and lower 16bits of data path */
- mbar_writeByte(MCF_GPIO_PAR_AD, MCF_GPIO_AD_ADDR23 |
- MCF_GPIO_AD_ADDR22 | MCF_GPIO_AD_ADDR21 |
- MCF_GPIO_AD_DATAL);
-
- /* Set CS2 pin to be SD_CS0 */
- mbar_writeByte(MCF_GPIO_PAR_CS, mbar_readByte(MCF_GPIO_PAR_CS)
- | MCF_GPIO_PAR_CS_PAR_CS2);
-
- /* Configure SDRAM Control Pin Assignemnt Register */
- mbar_writeByte(MCF_GPIO_PAR_SDRAM, MCF_GPIO_SDRAM_CSSDCS_00 |
- MCF_GPIO_SDRAM_SDWE | MCF_GPIO_SDRAM_SCAS |
- MCF_GPIO_SDRAM_SRAS | MCF_GPIO_SDRAM_SCKE |
- MCF_GPIO_SDRAM_SDCS_11);
- asm(" nop");
-
- /*
-* Check to see if the SDRAM has already been initialized
-* by a run control tool
-*/
- if (!(mbar_readLong(MCF_SDRAMC_DACR0) & MCF_SDRAMC_DACRn_RE)) {
- /* Initialize DRAM Control Register: DCR */
- mbar_writeShort(MCF_SDRAMC_DCR,
- MCF_SDRAMC_DCR_RTIM(2)
- | MCF_SDRAMC_DCR_RC(0x2E));
- asm(" nop");
-
- /*
-* Initialize DACR0
-*
-* CASL: 01
-* CBM: cmd at A20, bank select bits 21 and up
-* PS: 32bit port size
-*/
- mbar_writeLong(MCF_SDRAMC_DACR0,
- MCF_SDRAMC_DACRn_BA(CONFIG_SYS_SDRAM_BASE>>18)
- | MCF_SDRAMC_DACRn_CASL(1)
- | MCF_SDRAMC_DACRn_CBM(3)
- | MCF_SDRAMC_DACRn_PS(0));
- asm(" nop");
-
- /* Initialize DMR0 */
- mbar_writeLong(MCF_SDRAMC_DMR0,
- MCF_SDRAMC_DMRn_BAM_16M
- | MCF_SDRAMC_DMRn_V);
- asm("
[U-Boot] [PATCH] mini2440.h: Delete remainder of dead board
Commit af5b9b1f removed mini2440 board support,
but missed to delete include/configs/mini2440.h.
Signed-off-by: Masahiro Yamada
---
include/configs/mini2440.h | 170 -
1 file changed, 170 deletions(-)
delete mode 100644 include/configs/mini2440.h
diff --git a/include/configs/mini2440.h b/include/configs/mini2440.h
deleted file mode 100644
index 5e9e98d..000
--- a/include/configs/mini2440.h
+++ /dev/null
@@ -1,170 +0,0 @@
-/*
- * (C) Copyright 2002
- * Sysgo Real-Time Solutions, GmbH
- * Marius Groeger
- * Gary Jennejohn
- * David Mueller
- *
- * (C) Copyright 2009-2010
- * Michel Pollet
- *
- * (C) Copyright 2012
- * Gabriel Huau
- *
- * Configuation settings for the MINI2440 board.
- *
- * SPDX-License-Identifier:GPL-2.0+
- */
-
-#ifndef __CONFIG_H
-#define __CONFIG_H
-
-#define CONFIG_SYS_TEXT_BASE 0x0
-#define CONFIG_S3C2440_GPIO
-
-/*
- * High Level Configuration Options
- */
-#define CONFIG_ARM920T /* This is an ARM920T Core */
-#define CONFIG_S3C24X0 /* in a SAMSUNG S3C24X0 SoC */
-#define CONFIG_S3C2440 /* in a SAMSUNG S3C2440 SoC */
-#define CONFIG_MINI2440/* on a MIN2440 Board */
-
-#define MACH_TYPE_MINI2440 1999
-#define CONFIG_MACH_TYPE MACH_TYPE_MINI2440
-
-/*
- * We don't use lowlevel_init
- */
-#define CONFIG_SKIP_LOWLEVEL_INIT
-#define CONFIG_BOARD_EARLY_INIT_F
-
-/*
- * input clock of PLL
- */
-/* MINI2440 has 12.MHz input clock */
-#define CONFIG_SYS_CLK_FREQ1200
-
-/*
- * Size of malloc() pool
- */
-#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2048*1024)
-
-/*
- * Hardware drivers
- */
-#define CONFIG_DRIVER_DM9000
-#define CONFIG_DRIVER_DM9000_NO_EEPROM
-#define CONFIG_DM9000_BASE 0x2300
-#define DM9000_IO CONFIG_DM9000_BASE
-#define DM9000_DATA(CONFIG_DM9000_BASE+4)
-
-/*
- * select serial console configuration
- */
-#define CONFIG_S3C24X0_SERIAL
-#define CONFIG_SERIAL1
-
-/*
- * allow to overwrite serial and ethaddr
- */
-#define CONFIG_ENV_OVERWRITE
-
-/*
- * Command definition
- */
-#include
-
-#define CONFIG_CMD_DHCP
-#define CONFIG_CMD_PORTIO
-#define CONFIG_CMD_REGINFO
-#define CONFIG_CMD_SAVES
-
-/*
- * Miscellaneous configurable options
- */
-#define CONFIG_LONGHELP
-#define CONFIG_SYS_PROMPT "MINI2440 => "
-#define CONFIG_SYS_CBSIZE 256
-#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
-#define CONFIG_SYS_MAXARGS 32
-#define CONFIG_SYS_BARGSIZECONFIG_SYS_CBSIZE
-
-#define CONFIG_SYS_MEMTEST_START 0x3000
-#define CONFIG_SYS_MEMTEST_END 0x3400 /* 64MB in DRAM */
-
-/* default load address*/
-#define CONFIG_SYS_LOAD_ADDR 0x3200
-
-/* boot parameters address */
-#define CONFIG_BOOT_PARAM_ADDR 0x3100
-
-/*
- * the PWM TImer 4 uses a counter of 15625 for 10 ms, so we need
- * it to wrap 100 times (total 1562500) to get 1 sec.
- */
-#define CONFIG_SYS_HZ 1562500
-
-/*
- * valid baudrates
- */
-#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
-#define CONFIG_BAUDRATE115200
-
-/*
- * Stack sizes
- * The stack sizes are set up in start.S using the settings below
- */
-#define CONFIG_STACKSIZE (128*1024) /* regular stack */
-#ifdef CONFIG_USE_IRQ
-#define CONFIG_STACKSIZE_IRQ (8*1024)/* IRQ stack */
-#define CONFIG_STACKSIZE_FIQ (4*1024)/* FIQ stack */
-#endif
-
-/*
- * Physical Memory Map
- */
-#define CONFIG_NR_DRAM_BANKS1 /* we have 1 bank of DRAM */
-#define PHYS_SDRAM_SIZE (64*1024*1024) /* 64MB of DRAM */
-#define CONFIG_SYS_SDRAM_BASE 0x3000
-#define CONFIG_SYS_FLASH_BASE 0x0
-
-/*
- * Stack should be on the SRAM because
- * DRAM is not init
- */
-#define CONFIG_SYS_INIT_SP_ADDR(0x40001000 -
GENERATED_GBL_DATA_SIZE)
-
-/*
- * NOR FLASH organization
- * Now uses the standard CFI interface
- * FLASH and environment organization
- */
-#define CONFIG_SYS_FLASH_CFI
-#define CONFIG_FLASH_CFI_DRIVER
-#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT
-#define CONFIG_SYS_MONITOR_BASE0x0
-/* max number of memory banks */
-#define CONFIG_SYS_MAX_FLASH_BANKS 1
-/* 512 * 4096 sectors, or 32 * 64k blocks */
-#define CONFIG_SYS_MAX_FLASH_SECT 512
-#define CONFIG_FLASH_SHOW_PROGRESS 1
-
-/*
- * Config for NOR flash
- */
-#define CONFIG_ENV_IS_IN_FLASH
-#define CONFIG_MY_ENV_OFFSET 0x4
-/* addr of environment */
-#define CONFIG_ENV_ADDR(CONFIG_SYS_FLASH_BASE +
CONFIG_MY_ENV_OFFSET)
-/* 16k Total Size of Environment Sector */
-#define CONFIG_ENV_SIZE0x4000
-
-/* ATAG configuration */
-#define CONFIG_INITRD_TAG
-#define CONFIG_SETUP_MEMORY_TAGS
-#define CONFIG_CMDLINE_TAG
-#define CONFIG_CMDLINE_EDITING
-#define CONFIG_AUTO_COMPLETE
-
-#endif
Re: [U-Boot] [PATCH 1/9] exynos4:pinmux:fdt: decode peripheral id
Hi, Piotr.
On 01/27/2014 11:15 PM, Piotr Wilczek wrote:
> This patch adds api to decode peripheral id based in interrupt number.
>
> Signed-off-by: Piotr Wilczek
> Signed-off-by: Kyungmin Park
> CC: Minkyu Kang
> ---
> arch/arm/cpu/armv7/exynos/pinmux.c | 21 +
> 1 file changed, 21 insertions(+)
>
> diff --git a/arch/arm/cpu/armv7/exynos/pinmux.c
> b/arch/arm/cpu/armv7/exynos/pinmux.c
> index 904177a..3201d53 100644
> --- a/arch/arm/cpu/armv7/exynos/pinmux.c
> +++ b/arch/arm/cpu/armv7/exynos/pinmux.c
> @@ -741,6 +741,25 @@ int exynos_pinmux_config(int peripheral, int flags)
> }
>
> #ifdef CONFIG_OF_CONTROL
> +
Remove the white space.
> +static int exynos4_pinmux_decode_periph_id(const void *blob, int node)
> +{
> + int err;
> + u32 cell[3];
> +
> + err = fdtdec_get_int_array(blob, node, "interrupts", cell,
> + ARRAY_SIZE(cell));
> + if (err)
> + return PERIPH_ID_NONE;
> +
> + /* check for invalid peripheral id */
> + if ((PERIPH_ID_SDMMC4 > cell[1]) || (cell[1] < PERIPH_ID_UART0))
What's condition checking? i didn't understand this.
PERIPH_ID_SDMMC > cell[1] or PERIPH_ID_UART0 > cell[1] is valid?
Best Regards,
Jaehoon Chung
> + return cell[1];
> +
> + debug(" invalid peripheral id\n");
> + return PERIPH_ID_NONE;
> +}
> +
> static int exynos5_pinmux_decode_periph_id(const void *blob, int node)
> {
> int err;
> @@ -763,6 +782,8 @@ int pinmux_decode_periph_id(const void *blob, int node)
> {
> if (cpu_is_exynos5())
> return exynos5_pinmux_decode_periph_id(blob, node);
> + else if (cpu_is_exynos4())
> + return exynos4_pinmux_decode_periph_id(blob, node);
> else
> return PERIPH_ID_NONE;
> }
>
___
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Re: [U-Boot] [PATCH] Add lzmadec command
Hello, Here's the patch that enables lzmadec command in sandbox. Should I send it as a new thread or is it fine like that ? Regards Patrice --- include/configs/sandbox.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/include/configs/sandbox.h b/include/configs/sandbox.h index a6d5582..c995882 100644 --- a/include/configs/sandbox.h +++ b/include/configs/sandbox.h @@ -131,4 +131,6 @@ #define CONFIG_TPM_TIS_SANDBOX +#define CONFIG_CMD_LZMADEC + #endif -- 2014-01-26 Simon Glass : > Hi Patrice, > > > On 24 January 2014 14:39, Tom Rini wrote: >> >> On Thu, Dec 19, 2013 at 11:10:24AM +0100, Patrice B wrote: >> >> > Hi, >> > >> > I needed to be able to uncompress lzma files. I did this command >> > based on unzip command and propose it if it could help. Hopping the >> > patch is correctly done... >> > >> > Best regards. >> > >> >Patrice >> > >> > >> > Signed-off-by: Patrice Bouchand > > >> >> >> The code looks fine, but we don't add code that isn't enabled anywhere. >> So unless Simon wants to pick this up for sandbox, I'm marking this as >> deferred in patchwork, thanks! >> > > It's fine to enable this in sandbox if you want to - just send a separate > patch to add the CONFIG to include/configs/sandbox.h, test it in sandbox > (make sandbox_config; make; ./u-boot) and Cc me. I will pick it up. > > Regards, > Simon > >> >> -- >> Tom > > ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
