Re: [U-Boot] [PATCH V3] ARM: mx6: Add support for Kosagi Novena
Hi Marek,
I checked the I2C stuff, didn't saw any major issues. Here are a couple
of comments for possible improvements:
On 09/21/2014 04:44 PM, Marek Vasut wrote:
+/*
+ * I2C
+ */
+/* I2C1, RAM */
+struct i2c_pads_info i2c_pad_info0 = {
I can suggest to reword the comment as: "I2C1: DDR3 SO-DIMM RAM" or
something similar, to avoid confusion with I2C RAM.
+/* I2C2 Camera, MIPI */
+static struct i2c_pads_info i2c_pad_info1 = {
I didn't found any MIPI camera on the schematic, so I think the comment
is misleading. The connected devices on I2C2 are PMIC, HDMI DDC, FPGA,
and only the PMIC could be useful for booting. So I can suggest to
reword the comment like: "I2C2: PMIC".
+/* I2C3, J15 - RGB connector */
+static struct i2c_pads_info i2c_pad_info2 = {
I didn't found such connect J15 on my schematic (novena_pvt2.pdf).
There's a connector JP10L, which is for the LCD panel. Again the comment
could be reworded as: "I2C3: Utility EEPROM, LCD panel"
+static void novena_spl_setup_iomux_i2c(void)
+{
+ setup_i2c(0, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info0);
+ setup_i2c(1, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info1);
+ setup_i2c(2, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info2);
+}
Is the I2C1 bus used anywhere? I found only usage of I2C2 for PMIC and
I2C3 for Utility EEPROM reading.
+/* I2C EEPROM */
+#ifdef CONFIG_CMD_EEPROM
+#define CONFIG_SYS_I2C_MULTI_EEPROMS
+#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
+#define CONFIG_SYS_SPD_BUS_NUM 2
+#endif
I'm puzzled by the value of CONFIG_SYS_SPD_BUS_NUM - the SPD MEM is
connected to I2C1, which should be bus 0, right?
These are only recommendations, please feel free to accept/reject them
as you wish. The only reason why I suggest them is because usually the
U-Boot source code is excellent documentation about the hardware boards,
and any effort spent to clarify the peripherals and their usage will be
greatly appreciated later by the U-Boot users.
Thanks again for your serious efforts to kick-off the Novena board support.
Kind regards,
Nikolay
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Re: [U-Boot] [PATCH V3] ARM: mx6: Add support for Kosagi Novena
Hi Marek, On 09/21/2014 04:44 PM, Marek Vasut wrote: diff --git a/board/kosagi/novena/Makefile b/board/kosagi/novena/Makefile new file mode 100644 index 000..f67bbc9 --- /dev/null +++ b/board/kosagi/novena/Makefile @@ -0,0 +1,11 @@ +# +# Copyright (C) 2014 Marek Vasut +# +# SPDX-License-Identifier: GPL-2.0+ +# + +ifndef CONFIG_SPL_BUILD +obj-y := novena.o +else +obj-y := novena_spl.o +endif What do you say about using only "positive" descriptions instead of the negation, like this: ifdef CONFIG_SPL_BUILD obj-y := novena_spl.o else obj-y := novena.o endif In long term people tend to misunderstand the negations, and sometimes (unfortunately) start to build additional negations on top, so it's hard to follow the logic in the end. One more comment - isn't the file novena.o used also for the TPL, when building for SPL? Kind regards, Nikolay ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH][v2] driver/mtd: Use generic timer API for FSL IFC, eLBC
Freescale's flash control driver is using architecture specific timer API
i.e. usec2ticks
Replace usec2ticks with get_timer() (generic timer API)
Signed-off-by: Prabhakar Kushwaha
---
Changes for v2: updated timeout time to 10ms
drivers/mtd/nand/fsl_elbc_nand.c | 8
drivers/mtd/nand/fsl_ifc_nand.c | 21 ++---
2 files changed, 14 insertions(+), 15 deletions(-)
diff --git a/drivers/mtd/nand/fsl_elbc_nand.c b/drivers/mtd/nand/fsl_elbc_nand.c
index 2f31fc9..58b55cb 100644
--- a/drivers/mtd/nand/fsl_elbc_nand.c
+++ b/drivers/mtd/nand/fsl_elbc_nand.c
@@ -37,7 +37,6 @@
#define MAX_BANKS 8
#define ERR_BYTE 0xFF /* Value returned for read bytes when read failed */
-#define FCM_TIMEOUT_MSECS 10 /* Maximum number of mSecs to wait for FCM */
#define LTESR_NAND_MASK (LTESR_FCT | LTESR_PAR | LTESR_CC)
@@ -199,7 +198,8 @@ static int fsl_elbc_run_command(struct mtd_info *mtd)
struct fsl_elbc_mtd *priv = chip->priv;
struct fsl_elbc_ctrl *ctrl = priv->ctrl;
fsl_lbc_t *lbc = ctrl->regs;
- long long end_tick;
+ u32 timeo = (CONFIG_SYS_HZ * 10) / 1000;
+ u32 time_start;
u32 ltesr;
/* Setup the FMR[OP] to execute without write protection */
@@ -218,10 +218,10 @@ static int fsl_elbc_run_command(struct mtd_info *mtd)
out_be32(&lbc->lsor, priv->bank);
/* wait for FCM complete flag or timeout */
- end_tick = usec2ticks(FCM_TIMEOUT_MSECS * 1000) + get_ticks();
+ time_start = get_timer(0);
ltesr = 0;
- while (end_tick > get_ticks()) {
+ while (get_timer(time_start) < timeo) {
ltesr = in_be32(&lbc->ltesr);
if (ltesr & LTESR_CC)
break;
diff --git a/drivers/mtd/nand/fsl_ifc_nand.c b/drivers/mtd/nand/fsl_ifc_nand.c
index 8b453cb..4db8a91 100644
--- a/drivers/mtd/nand/fsl_ifc_nand.c
+++ b/drivers/mtd/nand/fsl_ifc_nand.c
@@ -26,8 +26,6 @@
#define MAX_BANKS CONFIG_SYS_FSL_IFC_BANK_COUNT
#define ERR_BYTE 0xFF /* Value returned for read bytes
when read failed */
-#define IFC_TIMEOUT_MSECS 10 /* Maximum number of mSecs to wait for IFC
- NAND Machine */
struct fsl_ifc_ctrl;
@@ -292,7 +290,8 @@ static int fsl_ifc_run_command(struct mtd_info *mtd)
struct fsl_ifc_mtd *priv = chip->priv;
struct fsl_ifc_ctrl *ctrl = priv->ctrl;
struct fsl_ifc *ifc = ctrl->regs;
- long long end_tick;
+ u32 timeo = (CONFIG_SYS_HZ * 10) / 1000;
+ u32 time_start;
u32 eccstat[4];
int i;
@@ -304,9 +303,9 @@ static int fsl_ifc_run_command(struct mtd_info *mtd)
IFC_NAND_SEQ_STRT_FIR_STRT);
/* wait for NAND Machine complete flag or timeout */
- end_tick = usec2ticks(IFC_TIMEOUT_MSECS * 1000) + get_ticks();
+ time_start = get_timer(0);
- while (end_tick > get_ticks()) {
+ while (get_timer(time_start) < timeo) {
ctrl->status = ifc_in32(&ifc->ifc_nand.nand_evter_stat);
if (ctrl->status & IFC_NAND_EVTER_STAT_OPC)
@@ -810,15 +809,16 @@ static int fsl_ifc_sram_init(uint32_t ver)
struct fsl_ifc *ifc = ifc_ctrl->regs;
uint32_t cs = 0, csor = 0, csor_8k = 0, csor_ext = 0;
uint32_t ncfgr = 0;
- long long end_tick;
+ u32 timeo = (CONFIG_SYS_HZ * 10) / 1000;
+ u32 time_start;
if (ver > FSL_IFC_V1_1_0) {
ncfgr = ifc_in32(&ifc->ifc_nand.ncfgr);
ifc_out32(&ifc->ifc_nand.ncfgr, ncfgr | IFC_NAND_SRAM_INIT_EN);
/* wait for SRAM_INIT bit to be clear or timeout */
- end_tick = usec2ticks(IFC_TIMEOUT_MSECS * 1000) + get_ticks();
- while (end_tick > get_ticks()) {
+ time_start = get_timer(0);
+ while (get_timer(time_start) < timeo) {
ifc_ctrl->status =
ifc_in32(&ifc->ifc_nand.nand_evter_stat);
@@ -861,10 +861,9 @@ static int fsl_ifc_sram_init(uint32_t ver)
/* start read seq */
ifc_out32(&ifc->ifc_nand.nandseq_strt, IFC_NAND_SEQ_STRT_FIR_STRT);
- /* wait for NAND Machine complete flag or timeout */
- end_tick = usec2ticks(IFC_TIMEOUT_MSECS * 1000) + get_ticks();
+ time_start = get_timer(0);
- while (end_tick > get_ticks()) {
+ while (get_timer(time_start) < timeo) {
ifc_ctrl->status = ifc_in32(&ifc->ifc_nand.nand_evter_stat);
if (ifc_ctrl->status & IFC_NAND_EVTER_STAT_OPC)
--
1.9.1
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[U-Boot] [PATCH] powerpc/mpc85xx: Use IFC accessor function
IFC registers can be of type Little Endian or big Endian depending upon Freescale SoC. Here SoC defines the register type of IFC IP. So use IFC acessor functions instead of in_be32(). Signed-off-by: Prabhakar Kushwaha --- arch/powerpc/cpu/mpc85xx/cpu_init_early.c | 6 +++--- arch/powerpc/cpu/mpc85xx/speed.c | 2 +- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/arch/powerpc/cpu/mpc85xx/cpu_init_early.c b/arch/powerpc/cpu/mpc85xx/cpu_init_early.c index 47b712d..1f00e3c 100644 --- a/arch/powerpc/cpu/mpc85xx/cpu_init_early.c +++ b/arch/powerpc/cpu/mpc85xx/cpu_init_early.c @@ -70,9 +70,9 @@ void setup_ifc(void) #endif /* Change flash's physical address */ - out_be32(&(ifc_regs->cspr_cs[0].cspr), CONFIG_SYS_CSPR0); - out_be32(&(ifc_regs->csor_cs[0].csor), CONFIG_SYS_CSOR0); - out_be32(&(ifc_regs->amask_cs[0].amask), CONFIG_SYS_AMASK0); + ifc_out32(&(ifc_regs->cspr_cs[0].cspr), CONFIG_SYS_CSPR0); + ifc_out32(&(ifc_regs->csor_cs[0].csor), CONFIG_SYS_CSOR0); + ifc_out32(&(ifc_regs->amask_cs[0].amask), CONFIG_SYS_AMASK0); return ; } diff --git a/arch/powerpc/cpu/mpc85xx/speed.c b/arch/powerpc/cpu/mpc85xx/speed.c index 3236f6a..8426b1a 100644 --- a/arch/powerpc/cpu/mpc85xx/speed.c +++ b/arch/powerpc/cpu/mpc85xx/speed.c @@ -430,7 +430,7 @@ void get_sys_info(sys_info_t *sys_info) #endif #if defined(CONFIG_FSL_IFC) - ccr = in_be32(&ifc_regs->ifc_ccr); + ccr = ifc_in32(&ifc_regs->ifc_ccr); ccr = ((ccr & IFC_CCR_CLK_DIV_MASK) >> IFC_CCR_CLK_DIV_SHIFT) + 1; sys_info->freq_localbus = sys_info->freq_systembus / ccr; -- 1.9.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 1/7] spl: pbl: Add new SPL image for pblimage tool
Alison,
On 9/22/14 7:43 PM, "Wang Huan-B18965" wrote:
>Hi, York,
>
>> On 09/21/2014 11:17 PM, Wang Huan-B18965 wrote:
>> >
>> > [Alison Wang] Let me explain the sequence.
>> >
>> > 1. u-boot-spl.bin is produced. The size of it is not a fixed value.
>> >
>> > 2. u-boot-spl-pbl-pad.bin is produced. The size of it is defined by
>> > CONFIG_SPL_MAX_SIZE. For detail, u-boot-spl-pbl-pad.bin is generated
>> > by padding u-boot-spl.bin to the size of CONFIG_SPL_MAX_SIZE.
>> >
>> > The following is the reason for using u-boot-spl-pbl-pad.bin.
>> >
>> > First of all, the SPL part need to be reorganized for the recognition
>> > of PBL through the pblimage tool.
>> >
>> > For the pblimage tool, the SPL image is splitted into 64 byte chunks,
>> > and PBL needs a command for each piece. In current pblimage tool, the
>> > size of the SPL image(u-boot-spl.bin) should be a fixed value like
>> > PowerPC. Well, for LS102xA and some other ARM platforms, the size of
>> > the SPL image (u-boot-spl.bin) is changeable. So a new image
>> > spl/u-boot-spl-pbl-pad.bin is produced, and the size of it is a fixed
>> > value "CONFIG_SPL_MAX_SIZE". Then use u-boot-spl-pbl-pad.bin instead
>> > of spl/u-boot-spl.bin to generate spl/u-boot-spl.pbl.
>> >
>> > 3. spl/u-boot-spl.pbl is produced through pblimage tool. As
>> > CONFIG_SPL_PBL_PAD is enabled, spl/u-boot-spl-pbl-pad.bin is used as
>> > the source file instead of spl/u-boot-spl.bin.
>> >
>> > 4. u-boot-with-spl-pbl.bin is produced. For detail,
>> > u-boot-with-spl-pbl.bin is generated by padding spl/u-boot-spl.pbl to
>> > the offset of CONFIG_SPL_PAD_TO and adding u-boot.img.
>> >
>> > As the size of spl/u-boot-spl.pbl is not a fixed value, we pad it to
>> > the offset of CONFIG_SPL_PAD_TO. So it is convenient for us to
>> > determine the location of u-boot.img in SD card.
>> >
>>
>> Sorry for the late respond. I was away for an urgent project.
>>
>> If I understand you correctly, you define a CONFIG_SPL_MAX_SIZE and pad
>> the final binary file to this size. How do you determine the size? I
>> understand PBL loading mechanism. Would it be possible to pad to 64
>> byte boundary (or any practical size since it is adjustable) and avoid
>> the definition of CONFIG_SPL_MAX_SIZE?
>
>[Alison Wang] I checked the size of spl/u-boot-spl.bin, then determined
>CONFIG_SPL_MAX_SIZE which is larger than the size of spl/u-boot-spl.bin.
>For Pblimage tool, the size of SPL image need to be a fixed value.
>For example, for PowerPC, no matter how the SPL code is changed, the
>size of spl/u-boot-spl.bin is always 0x28000 (so the "pbl_cmd_initaddr"
>is always 0x8200). But for LS1, the size of spl/u-boot-spl.bin is not
>a fixed size. When the SPL code is changed, the size of spl/u-boot-spl.bin
>is changed, so "pbl_cmd_initaddr" is changed too. It's unacceptable for
>pblimage
>tool("pbl_cmd_initaddr" need to be a fixed value). To fix this issue, I
>use
>CONFIG_SPL_MAX_SIZE.
>
>Do you mean there is some approach to pad spl/u-boot-spl.bin to any
>practical size and avoid the definition of CONFIG_SPL_MAX_SIZE?
PBL image is created this way
A) Create the RCW header
B) Determine u-boot image size
C) Subtract the size from top of 24-bit space, that's what you see
0x8200-size. The magic number 0x8200 is used to make the result as
0x81xx. The highest of 0x8 is ACS=1, the lowest bit of 0x81 is
CONTINUE=1, the xx is the 24-bit offset. By changing the offset, you
can load the data into memory, up to 64 byte a time. By making a lot of
0x81xx, you make a sequence of commands to load 64 byte a time, until
all image is loaded.
Given the above mechanism, do you still think the image has to be a fixed
size? I think you need to adjust pblimage.c to deal with the variable
size, and pad the last chunk to be aligned with 2^n byte.
York
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Re: [U-Boot] [PATCH 0/3] arm: add interrupt support
Hi Georges, 2014-09-23 3:24 GMT+09:00 Georges Savoundararadj : > Le 22/09/2014 03:35, Masahiro Yamada a écrit : >> >> On Sun, 21 Sep 2014 23:33:47 +0200 >> Georges Savoundararadj wrote: >> >>> Hi folks, >>> >>> I wanted to use interrupt on U-Boot on my Raspberry Pi but I have >>> found that it did not work properly. >>> >>> My patches intend to make interrupt work. >> >> >> I am not sure if interrupt feature is necessary for a boot loader. > > Of course, It is not necessary. > > But for U-boot, I think it is still important to handle exception correctly > even if interrupts are not used. Don't you? > > For instance, without these patches an undefined instruction or any other > exception causes an unexpected behavior. It is better to handle properly > these cases (dump registers and reset CPU, see functions do_* in > arch/arm/lib/interrupts.c). > My patches should better be considered as *bugfixes*. > Sorry, totally my misunderstanding. (I thought you were trying to implement a full interrupt feature.) As long as they are bug fixes of exception handlers, they are fine. I should have read your patches more carefully before my response. Again, my apologies.. Best Regards Masahiro Yamada -- Best Regards Masahiro Yamada ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] Please pull u-boot-x86.git branch misc
2014-09-23 2:26 GMT+09:00 Simon Glass :
> Hi Masahiro,
>
> On 22 September 2014 11:13, Masahiro YAMADA wrote:
>> 2014-09-23 0:33 GMT+09:00 Simon Glass :
>>
>>>
>>> Jagannadha Sutradharudu Teki (1):
>>> sandbox: Update minor documentation changes
>>
>>
>> As I commented in
>> http://patchwork.ozlabs.org/patch/384547/
>> the second hunk does not make sense at all
>> and not fixed yet.
>
> I did read your comment but thought it was addressed. Are you wanting
> to change this line also?
>
>> The chosen vendor and board names are also 'sandbox', so there is a single
>
> Let me know what you'd like it to say, and I'll prepare a patch.
Prior to commit 2dabac1337facbd (sandbox: set sandbox's vendor to null),
the following statement was correct:
The chosen vendor and board names are also 'sandbox', so there is a single
board in board/sandbox/sandbox.
Since commit 2dabac1337facbd:
The board name is 'sandbox' but the vendor name is unset, so there is a single
board in board/sandbox.
(Note, the board directory is specified by board/${VENDOR}/${BOARD},
or board/${BOARD} if VENDOR is null. )
--
Best Regards
Masahiro Yamada
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[U-Boot] Newbie question
I recently bought a Jetson TK1 with the intent of learning all about ARM board bring up; essentially everything that happens between the reset vector and the spawning of the init process (in Linux). I've got a good understanding of this for x86, and I'd like to similarly understand what happens with an ARM SoC. I've been having a rough go of it, for example I cannot even find in explicit terms what the reset vector address is. I began to think that maybe I'm presupposing too many x86 artifacts and that that's not at all how ARM works. x86 has a lot of cruft left over from the 70s, after all. So I know that there is a u-boot port for the Jetson, so I cloned the source, started swimming through it, and quickly started to drown :) So, my questions are these: Can anyone briefly explain how the build system works, i.e. how the source is configured to build for Jetson, and how I find where u-boot's entry point is, so I can just look at what it does? Thank you, Don ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 1/7] spl: pbl: Add new SPL image for pblimage tool
Hi, York,
> On 09/21/2014 11:17 PM, Wang Huan-B18965 wrote:
> >
> > [Alison Wang] Let me explain the sequence.
> >
> > 1. u-boot-spl.bin is produced. The size of it is not a fixed value.
> >
> > 2. u-boot-spl-pbl-pad.bin is produced. The size of it is defined by
> > CONFIG_SPL_MAX_SIZE. For detail, u-boot-spl-pbl-pad.bin is generated
> > by padding u-boot-spl.bin to the size of CONFIG_SPL_MAX_SIZE.
> >
> > The following is the reason for using u-boot-spl-pbl-pad.bin.
> >
> > First of all, the SPL part need to be reorganized for the recognition
> > of PBL through the pblimage tool.
> >
> > For the pblimage tool, the SPL image is splitted into 64 byte chunks,
> > and PBL needs a command for each piece. In current pblimage tool, the
> > size of the SPL image(u-boot-spl.bin) should be a fixed value like
> > PowerPC. Well, for LS102xA and some other ARM platforms, the size of
> > the SPL image (u-boot-spl.bin) is changeable. So a new image
> > spl/u-boot-spl-pbl-pad.bin is produced, and the size of it is a fixed
> > value "CONFIG_SPL_MAX_SIZE". Then use u-boot-spl-pbl-pad.bin instead
> > of spl/u-boot-spl.bin to generate spl/u-boot-spl.pbl.
> >
> > 3. spl/u-boot-spl.pbl is produced through pblimage tool. As
> > CONFIG_SPL_PBL_PAD is enabled, spl/u-boot-spl-pbl-pad.bin is used as
> > the source file instead of spl/u-boot-spl.bin.
> >
> > 4. u-boot-with-spl-pbl.bin is produced. For detail,
> > u-boot-with-spl-pbl.bin is generated by padding spl/u-boot-spl.pbl to
> > the offset of CONFIG_SPL_PAD_TO and adding u-boot.img.
> >
> > As the size of spl/u-boot-spl.pbl is not a fixed value, we pad it to
> > the offset of CONFIG_SPL_PAD_TO. So it is convenient for us to
> > determine the location of u-boot.img in SD card.
> >
>
> Sorry for the late respond. I was away for an urgent project.
>
> If I understand you correctly, you define a CONFIG_SPL_MAX_SIZE and pad
> the final binary file to this size. How do you determine the size? I
> understand PBL loading mechanism. Would it be possible to pad to 64
> byte boundary (or any practical size since it is adjustable) and avoid
> the definition of CONFIG_SPL_MAX_SIZE?
[Alison Wang] I checked the size of spl/u-boot-spl.bin, then determined
CONFIG_SPL_MAX_SIZE which is larger than the size of spl/u-boot-spl.bin.
For Pblimage tool, the size of SPL image need to be a fixed value.
For example, for PowerPC, no matter how the SPL code is changed, the
size of spl/u-boot-spl.bin is always 0x28000 (so the "pbl_cmd_initaddr"
is always 0x8200). But for LS1, the size of spl/u-boot-spl.bin is not
a fixed size. When the SPL code is changed, the size of spl/u-boot-spl.bin
is changed, so "pbl_cmd_initaddr" is changed too. It's unacceptable for pblimage
tool("pbl_cmd_initaddr" need to be a fixed value). To fix this issue, I use
CONFIG_SPL_MAX_SIZE.
Do you mean there is some approach to pad spl/u-boot-spl.bin to any
practical size and avoid the definition of CONFIG_SPL_MAX_SIZE?
Best Regards,
Alison Wang
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[U-Boot] [PATCH 2/4] dm: serial: Tidy up the pl01x driver
Adjust the driver so that leaf functions take a pointer to the serial port
register base. Put all the global configuration in the init function, and
use the same settings from then on.
This makes it much easier to move to driver model without duplicating the
code, since with driver model we use platform data rather than global
settings.
The driver is compiled with either the CONFIG_PL010_SERIAL or
CONFIG_PL011_SERIAL option and this determines the uart type. With driver
model this needs to come in from platform data, so create a new
CONFIG_PL01X_SERIAL config which brings in the driver, and adjust the
driver to support both peripheral variants.
Signed-off-by: Simon Glass
---
drivers/serial/Makefile| 5 +-
drivers/serial/serial_pl01x.c | 300 +++--
.../{serial_pl01x.h => serial_pl01x_internal.h}| 0
include/serial_pl01x.h | 27 ++
4 files changed, 192 insertions(+), 140 deletions(-)
rename drivers/serial/{serial_pl01x.h => serial_pl01x_internal.h} (100%)
create mode 100644 include/serial_pl01x.h
diff --git a/drivers/serial/Makefile b/drivers/serial/Makefile
index 9ac3496..edf6936 100644
--- a/drivers/serial/Makefile
+++ b/drivers/serial/Makefile
@@ -7,8 +7,11 @@
ifdef CONFIG_DM_SERIAL
obj-y += serial-uclass.o
+obj-$(CONFIG_PL01X_SERIAL) += serial_pl01x.o
else
obj-y += serial.o
+obj-$(CONFIG_PL010_SERIAL) += serial_pl01x.o
+obj-$(CONFIG_PL011_SERIAL) += serial_pl01x.o
obj-$(CONFIG_SYS_NS16550_SERIAL) += serial_ns16550.o
endif
@@ -25,8 +28,6 @@ obj-$(CONFIG_IMX_SERIAL) += serial_imx.o
obj-$(CONFIG_KS8695_SERIAL) += serial_ks8695.o
obj-$(CONFIG_MAX3100_SERIAL) += serial_max3100.o
obj-$(CONFIG_MXC_UART) += serial_mxc.o
-obj-$(CONFIG_PL010_SERIAL) += serial_pl01x.o
-obj-$(CONFIG_PL011_SERIAL) += serial_pl01x.o
obj-$(CONFIG_PXA_SERIAL) += serial_pxa.o
obj-$(CONFIG_SA1100_SERIAL) += serial_sa1100.o
obj-$(CONFIG_S3C24X0_SERIAL) += serial_s3c24x0.o
diff --git a/drivers/serial/serial_pl01x.c b/drivers/serial/serial_pl01x.c
index dfb610e..665a0e4 100644
--- a/drivers/serial/serial_pl01x.c
+++ b/drivers/serial/serial_pl01x.c
@@ -12,125 +12,86 @@
/* Simple U-Boot driver for the PrimeCell PL010/PL011 UARTs */
#include
+#include
#include
#include
#include
+#include
#include
-#include "serial_pl01x.h"
+#include "serial_pl01x_internal.h"
-/*
- * Integrator AP has two UARTs, we use the first one, at 38400-8-N-1
- * Integrator CP has two UARTs, use the first one, at 38400-8-N-1
- * Versatile PB has four UARTs.
- */
-#define CONSOLE_PORT CONFIG_CONS_INDEX
static volatile unsigned char *const port[] = CONFIG_PL01x_PORTS;
+static enum pl01x_type pl01x_type __attribute__ ((section(".data")));
+static struct pl01x_regs *base_regs __attribute__ ((section(".data")));
#define NUM_PORTS (sizeof(port)/sizeof(port[0]))
-static void pl01x_putc (int portnum, char c);
-static int pl01x_getc (int portnum);
-static int pl01x_tstc (int portnum);
-unsigned int baudrate = CONFIG_BAUDRATE;
DECLARE_GLOBAL_DATA_PTR;
-static struct pl01x_regs *pl01x_get_regs(int portnum)
+static int pl01x_putc(struct pl01x_regs *regs, char c)
{
- return (struct pl01x_regs *) port[portnum];
-}
-
-#ifdef CONFIG_PL010_SERIAL
-
-static int pl01x_serial_init(void)
-{
- struct pl01x_regs *regs = pl01x_get_regs(CONSOLE_PORT);
- unsigned int divisor;
-
- /* First, disable everything */
- writel(0, ®s->pl010_cr);
+ /* Wait until there is space in the FIFO */
+ if (readl(®s->fr) & UART_PL01x_FR_TXFF)
+ return -EAGAIN;
- /* Set baud rate */
- switch (baudrate) {
- case 9600:
- divisor = UART_PL010_BAUD_9600;
- break;
+ /* Send the character */
+ writel(c, ®s->dr);
- case 19200:
- divisor = UART_PL010_BAUD_9600;
- break;
+ return 0;
+}
- case 38400:
- divisor = UART_PL010_BAUD_38400;
- break;
+static int pl01x_getc(struct pl01x_regs *regs)
+{
+ unsigned int data;
- case 57600:
- divisor = UART_PL010_BAUD_57600;
- break;
+ /* Wait until there is data in the FIFO */
+ if (readl(®s->fr) & UART_PL01x_FR_RXFE)
+ return -EAGAIN;
- case 115200:
- divisor = UART_PL010_BAUD_115200;
- break;
+ data = readl(®s->dr);
- default:
- divisor = UART_PL010_BAUD_38400;
+ /* Check for an error flag */
+ if (data & 0xFF00) {
+ /* Clear the error */
+ writel(0x, ®s->ecr);
+ return -1;
}
- writel((divisor & 0xf00) >> 8, ®s->pl010_lcrm);
- writel(divisor & 0xff, ®s->pl010_lcrl);
-
- /* Set the UART to be 8 bits, 1 stop bit, no parity, fifo enabled */
- writel(UART_PL010_LCRH_WLEN_8 | UART_PL010_LCRH_FEN, ®s->pl010_lcrh);
-
- /*
[U-Boot] [PATCH 4/4] dm: rpi: Move serial to driver model
Adjust the configuration to use the driver model version of the pl01x
serial driver. Add the required platform data.
Signed-off-by: Simon Glass
---
board/raspberrypi/rpi_b/rpi_b.c | 12
include/configs/rpi_b.h | 6 +++---
2 files changed, 15 insertions(+), 3 deletions(-)
diff --git a/board/raspberrypi/rpi_b/rpi_b.c b/board/raspberrypi/rpi_b/rpi_b.c
index 447c940..d009abe 100644
--- a/board/raspberrypi/rpi_b/rpi_b.c
+++ b/board/raspberrypi/rpi_b/rpi_b.c
@@ -20,6 +20,7 @@
#include
#include
#include
+#include
#include
#include
#include
@@ -36,6 +37,17 @@ U_BOOT_DEVICE(bcm2835_gpios) = {
.platdata = &gpio_platdata,
};
+static const struct pl01x_serial_platdata serial_platdata = {
+ .base = 0x20201000,
+ .type = TYPE_PL011,
+ .clock = 300,
+};
+
+U_BOOT_DEVICE(bcm2835_serials) = {
+ .name = "serial_pl01x",
+ .platdata = &serial_platdata,
+};
+
struct msg_get_arm_mem {
struct bcm2835_mbox_hdr hdr;
struct bcm2835_mbox_tag_get_arm_mem get_arm_mem;
diff --git a/include/configs/rpi_b.h b/include/configs/rpi_b.h
index d9475e9..42e3a63 100644
--- a/include/configs/rpi_b.h
+++ b/include/configs/rpi_b.h
@@ -35,6 +35,7 @@
#define CONFIG_DM
#define CONFIG_CMD_DM
#define CONFIG_DM_GPIO
+#define CONFIG_DM_SERIAL
/* Memory layout */
#define CONFIG_NR_DRAM_BANKS 1
@@ -52,6 +53,7 @@
CONFIG_SYS_SDRAM_SIZE - \
GENERATED_GBL_DATA_SIZE)
#define CONFIG_SYS_MALLOC_LEN SZ_4M
+#define CONFIG_SYS_MALLOC_F_LEN(1 << 10)
#define CONFIG_SYS_MEMTEST_START 0x0010
#define CONFIG_SYS_MEMTEST_END 0x0020
#define CONFIG_LOADADDR0x0020
@@ -83,9 +85,7 @@
#define CONFIG_BCM2835_SDHCI
/* Console UART */
-#define CONFIG_PL011_SERIAL
-#define CONFIG_PL011_CLOCK 300
-#define CONFIG_PL01x_PORTS { (void *)0x20201000 }
+#define CONFIG_PL01X_SERIAL
#define CONFIG_CONS_INDEX 0
#define CONFIG_BAUDRATE115200
--
2.1.0.rc2.206.gedb03e5
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[U-Boot] [PATCH 1/4] dm: rpi: Convert GPIO driver to driver model
Convert the BCM2835 GPIO driver to use driver model, and switch over
Raspberry Pi to use this, since it is the only board.
Signed-off-by: Simon Glass
---
arch/arm/include/asm/arch-bcm2835/gpio.h | 9 ++
board/raspberrypi/rpi_b/rpi_b.c | 11 ++
drivers/gpio/bcm2835_gpio.c | 180 +++
include/configs/rpi_b.h | 5 +
4 files changed, 182 insertions(+), 23 deletions(-)
diff --git a/arch/arm/include/asm/arch-bcm2835/gpio.h
b/arch/arm/include/asm/arch-bcm2835/gpio.h
index 9a49b6e..db42896 100644
--- a/arch/arm/include/asm/arch-bcm2835/gpio.h
+++ b/arch/arm/include/asm/arch-bcm2835/gpio.h
@@ -52,4 +52,13 @@ struct bcm2835_gpio_regs {
u32 gppudclk[2];
};
+/**
+ * struct bcm2835_gpio_platdata - GPIO platform description
+ *
+ * @base: Base address of GPIO controller
+ */
+struct bcm2835_gpio_platdata {
+ unsigned long base;
+};
+
#endif /* _BCM2835_GPIO_H_ */
diff --git a/board/raspberrypi/rpi_b/rpi_b.c b/board/raspberrypi/rpi_b/rpi_b.c
index 220bb90..447c940 100644
--- a/board/raspberrypi/rpi_b/rpi_b.c
+++ b/board/raspberrypi/rpi_b/rpi_b.c
@@ -16,15 +16,26 @@
#include
#include
+#include
#include
#include
#include
+#include
#include
#include
#include
DECLARE_GLOBAL_DATA_PTR;
+static const struct bcm2835_gpio_platdata gpio_platdata = {
+ .base = BCM2835_GPIO_BASE,
+};
+
+U_BOOT_DEVICE(bcm2835_gpios) = {
+ .name = "gpio_bcm2835",
+ .platdata = &gpio_platdata,
+};
+
struct msg_get_arm_mem {
struct bcm2835_mbox_hdr hdr;
struct bcm2835_mbox_tag_get_arm_mem get_arm_mem;
diff --git a/drivers/gpio/bcm2835_gpio.c b/drivers/gpio/bcm2835_gpio.c
index 97b5137..332cfc2 100644
--- a/drivers/gpio/bcm2835_gpio.c
+++ b/drivers/gpio/bcm2835_gpio.c
@@ -6,73 +6,207 @@
*/
#include
+#include
+#include
#include
#include
-inline int gpio_is_valid(unsigned gpio)
+#define GPIO_NAME_SIZE 20
+
+struct bcm2835_gpios {
+ char label[BCM2835_GPIO_COUNT][GPIO_NAME_SIZE];
+ struct bcm2835_gpio_regs *reg;
+};
+
+/**
+ * gpio_is_requested() - check if a GPIO has been requested
+ *
+ * @bank: Bank to check
+ * @offset:GPIO offset within bank to check
+ * @return true if marked as requested, false if not
+ */
+static inline bool gpio_is_requested(struct bcm2835_gpios *gpios, int offset)
{
- return (gpio < BCM2835_GPIO_COUNT);
+ return *gpios->label[offset] != '\0';
}
-int gpio_request(unsigned gpio, const char *label)
+static int check_requested(struct udevice *dev, unsigned offset,
+ const char *func)
{
- return !gpio_is_valid(gpio);
+ struct bcm2835_gpios *gpios = dev_get_priv(dev);
+ struct gpio_dev_priv *uc_priv = dev->uclass_priv;
+
+ if (!gpio_is_requested(gpios, offset)) {
+ printf("omap_gpio: %s: error: gpio %s%d not requested\n",
+ func, uc_priv->bank_name, offset);
+ return -EPERM;
+ }
+
+ return 0;
}
-int gpio_free(unsigned gpio)
+static int bcm2835_gpio_request(struct udevice *dev, unsigned offset,
+ const char *label)
{
+ struct bcm2835_gpios *gpios = dev_get_priv(dev);
+
+ if (gpio_is_requested(gpios, offset))
+ return -EBUSY;
+
+ strncpy(gpios->label[offset], label, GPIO_NAME_SIZE);
+ gpios->label[offset][GPIO_NAME_SIZE - 1] = '\0';
+
return 0;
}
-int gpio_direction_input(unsigned gpio)
+static int bcm2835_gpio_free(struct udevice *dev, unsigned offset)
{
- struct bcm2835_gpio_regs *reg =
- (struct bcm2835_gpio_regs *)BCM2835_GPIO_BASE;
+ struct bcm2835_gpios *gpios = dev_get_priv(dev);
+ int ret;
+
+ ret = check_requested(dev, offset, __func__);
+ if (ret)
+ return ret;
+ gpios->label[offset][0] = '\0';
+
+ return 0;
+}
+
+static int bcm2835_gpio_direction_input(struct udevice *dev, unsigned gpio)
+{
+ struct bcm2835_gpios *gpios = dev_get_priv(dev);
unsigned val;
- val = readl(®->gpfsel[BCM2835_GPIO_FSEL_BANK(gpio)]);
+ val = readl(&gpios->reg->gpfsel[BCM2835_GPIO_FSEL_BANK(gpio)]);
val &= ~(BCM2835_GPIO_FSEL_MASK << BCM2835_GPIO_FSEL_SHIFT(gpio));
val |= (BCM2835_GPIO_INPUT << BCM2835_GPIO_FSEL_SHIFT(gpio));
- writel(val, ®->gpfsel[BCM2835_GPIO_FSEL_BANK(gpio)]);
+ writel(val, &gpios->reg->gpfsel[BCM2835_GPIO_FSEL_BANK(gpio)]);
return 0;
}
-int gpio_direction_output(unsigned gpio, int value)
+static int bcm2835_gpio_direction_output(struct udevice *dev, unsigned gpio,
+int value)
{
- struct bcm2835_gpio_regs *reg =
- (struct bcm2835_gpio_regs *)BCM2835_GPIO_BASE;
+ struct bcm2835_gpios *gpios = dev_get_priv(dev);
unsigned val;
gpio_set_value(gpio, value);
- val = readl(®->gpfsel[BCM2835_GPIO_FSEL_BANK(gpio)
[U-Boot] [PATCH 3/4] dm: serial: Support driver model in pl01x driver
Add driver model support in this driver, using platform data provided by
the board.
Signed-off-by: Simon Glass
---
drivers/serial/serial_pl01x.c | 73 +++
1 file changed, 73 insertions(+)
diff --git a/drivers/serial/serial_pl01x.c b/drivers/serial/serial_pl01x.c
index 665a0e4..e6313ad 100644
--- a/drivers/serial/serial_pl01x.c
+++ b/drivers/serial/serial_pl01x.c
@@ -12,6 +12,7 @@
/* Simple U-Boot driver for the PrimeCell PL010/PL011 UARTs */
#include
+#include
#include
#include
#include
@@ -20,12 +21,15 @@
#include
#include "serial_pl01x_internal.h"
+#ifndef CONFIG_DM_SERIAL
+
static volatile unsigned char *const port[] = CONFIG_PL01x_PORTS;
static enum pl01x_type pl01x_type __attribute__ ((section(".data")));
static struct pl01x_regs *base_regs __attribute__ ((section(".data")));
#define NUM_PORTS (sizeof(port)/sizeof(port[0]))
DECLARE_GLOBAL_DATA_PTR;
+#endif
static int pl01x_putc(struct pl01x_regs *regs, char c)
{
@@ -274,3 +278,72 @@ __weak struct serial_device *default_serial_console(void)
}
#endif /* nCONFIG_DM_SERIAL */
+
+#ifdef CONFIG_DM_SERIAL
+
+struct pl01x_priv {
+ struct pl01x_regs *regs;
+ enum pl01x_type type;
+};
+
+static int pl01x_serial_setbrg(struct udevice *dev, int baudrate)
+{
+ struct pl01x_serial_platdata *plat = dev_get_platdata(dev);
+ struct pl01x_priv *priv = dev_get_priv(dev);
+
+ pl01x_generic_setbrg(priv->regs, priv->type, plat->clock, baudrate);
+
+ return 0;
+}
+
+static int pl01x_serial_probe(struct udevice *dev)
+{
+ struct pl01x_serial_platdata *plat = dev_get_platdata(dev);
+ struct pl01x_priv *priv = dev_get_priv(dev);
+
+ priv->regs = (struct pl01x_regs *)plat->base;
+ priv->type = plat->type;
+ return pl01x_generic_serial_init(priv->regs, priv->type);
+}
+
+static int pl01x_serial_getc(struct udevice *dev)
+{
+ struct pl01x_priv *priv = dev_get_priv(dev);
+
+ return pl01x_getc(priv->regs);
+}
+
+static int pl01x_serial_putc(struct udevice *dev, const char ch)
+{
+ struct pl01x_priv *priv = dev_get_priv(dev);
+
+ return pl01x_putc(priv->regs, ch);
+}
+
+static int pl01x_serial_pending(struct udevice *dev, bool input)
+{
+ struct pl01x_priv *priv = dev_get_priv(dev);
+ unsigned int fr = readl(&priv->regs->fr);
+
+ if (input)
+ return pl01x_tstc(priv->regs);
+ else
+ return fr & UART_PL01x_FR_TXFF ? 0 : 1;
+}
+
+static const struct dm_serial_ops pl01x_serial_ops = {
+ .putc = pl01x_serial_putc,
+ .pending = pl01x_serial_pending,
+ .getc = pl01x_serial_getc,
+ .setbrg = pl01x_serial_setbrg,
+};
+
+U_BOOT_DRIVER(serial_pl01x) = {
+ .name = "serial_pl01x",
+ .id = UCLASS_SERIAL,
+ .probe = pl01x_serial_probe,
+ .ops= &pl01x_serial_ops,
+ .flags = DM_FLAG_PRE_RELOC,
+};
+
+#endif
--
2.1.0.rc2.206.gedb03e5
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[U-Boot] [PATCH 0/4] dm: rpi: Move Raspberry Pi to use driver model
This series adds driver model support to the GPIO and serial drivers used
by Raspberry Pi, and moves Raspberry Pi over to driver model.
This requires adding driver model support to the pl01x serial driver, and
replacing the bcm2835 GPIO driver with a driver model version (since there
are no longer clients that don't use driver model).
See u-boot-dm.git branch rpi-working for the tree this is based on.
Simon Glass (4):
dm: rpi: Convert GPIO driver to driver model
dm: serial: Tidy up the pl01x driver
dm: serial: Support driver model in pl01x driver
dm: rpi: Move serial to driver model
arch/arm/include/asm/arch-bcm2835/gpio.h | 9 +
board/raspberrypi/rpi_b/rpi_b.c| 23 ++
drivers/gpio/bcm2835_gpio.c| 180 --
drivers/serial/Makefile| 5 +-
drivers/serial/serial_pl01x.c | 373 +
.../{serial_pl01x.h => serial_pl01x_internal.h}| 0
include/configs/rpi_b.h| 11 +-
include/serial_pl01x.h | 27 ++
8 files changed, 462 insertions(+), 166 deletions(-)
rename drivers/serial/{serial_pl01x.h => serial_pl01x_internal.h} (100%)
create mode 100644 include/serial_pl01x.h
--
2.1.0.rc2.206.gedb03e5
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[U-Boot] [PATCH v1] fastboot: handle flash write to GPT partition
Implement a feature to allow fastboot to write the downloaded image
to the space reserved for the Protective MBR and the Primary GUID
Partition Table.
Signed-off-by: Steve Rae
---
This series depends on:
http://patchwork.ozlabs.org/patch/383184/ (to 388186)
README | 7 +++
common/fb_mmc.c | 19 ---
2 files changed, 23 insertions(+), 3 deletions(-)
diff --git a/README b/README
index e8341b7..2e4e0c4 100644
--- a/README
+++ b/README
@@ -1639,6 +1639,13 @@ The following options need to be configured:
regarding the non-volatile storage device. Define this to
the eMMC device that fastboot should use to store the image.
+ CONFIG_FASTBOOT_GPT_NAME
+ The fastboot "flash" command supports writing the downloaded
+ image to the Protective MBR and the Primary GUID Partition
+ Table. This occurs when the specified "partition name" on the
+ "fastboot flash" command line matches this value.
+ Default is GPT_ENTRY_NAME (currently "gpt") if undefined.
+
- Journaling Flash filesystem support:
CONFIG_JFFS2_NAND, CONFIG_JFFS2_NAND_OFF,
CONFIG_JFFS2_NAND_SIZE,
CONFIG_JFFS2_NAND_DEV
diff --git a/common/fb_mmc.c b/common/fb_mmc.c
index fb06d8a..89fbf23 100644
--- a/common/fb_mmc.c
+++ b/common/fb_mmc.c
@@ -4,12 +4,17 @@
* SPDX-License-Identifier:GPL-2.0+
*/
+#include
#include
#include
#include
#include
#include
+#ifndef CONFIG_FASTBOOT_GPT_NAME
+#define CONFIG_FASTBOOT_GPT_NAME GPT_ENTRY_NAME
+#endif
+
/* The 64 defined bytes plus the '\0' */
#define RESPONSE_LEN (64 + 1)
@@ -62,9 +67,9 @@ static void write_raw_image(block_dev_desc_t *dev_desc,
disk_partition_t *info,
void fb_mmc_flash_write(const char *cmd, void *download_buffer,
unsigned int download_bytes, char *response)
{
- int ret;
block_dev_desc_t *dev_desc;
disk_partition_t info;
+ lbaint_t blksz;
/* initialize the response buffer */
response_str = response;
@@ -76,8 +81,16 @@ void fb_mmc_flash_write(const char *cmd, void
*download_buffer,
return;
}
- ret = get_partition_info_efi_by_name(dev_desc, cmd, &info);
- if (ret) {
+ if (strcmp(cmd, CONFIG_FASTBOOT_GPT_NAME) == 0) {
+ printf("%s: updating GUID Partition Table (including MBR)\n",
+ __func__);
+ /* start at Protective MBR */
+ info.start = (GPT_PRIMARY_PARTITION_TABLE_LBA - 1);
+ blksz = dev_desc->blksz;
+ info.blksz = blksz;
+ /* assume that the Partition Entry Array starts in LBA 2 */
+ info.size = (2 + (GPT_ENTRY_NUMBERS * GPT_ENTRY_SIZE) / blksz);
+ } else if (get_partition_info_efi_by_name(dev_desc, cmd, &info)) {
error("cannot find partition: '%s'\n", cmd);
fastboot_fail("cannot find partition");
return;
--
1.8.5
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Re: [U-Boot] [PATCH v6 0/4] Implement "fastboot flash" for eMMC
Hi Tom,
On 14-08-26 11:47 AM, Steve Rae wrote:
This series implements the "fastboot flash" command for eMMC devices.
It supports both raw and sparse images.
NOTES:
- the support for the "fastboot flash" command is enabled with
CONFIG_FASTBOOT_FLASH
- the support for eMMC is enabled with CONFIG_FASTBOOT_FLASH_MMC_DEV
- (future) the support for NAND would be enabled with
CONFIG_FASTBOOT_FLASH_NAND(???)
This has been tested on ARMv7.
This series depends on:
http://patchwork.ozlabs.org/patch/382443/ (to 382446)
(which is now accepted)
Changes in v6:
- printf() to error()
- fix spelling
- remove excess braces
Changes in v5:
- use the common/aboot.c for the "sparse format" handling
Changes in v4:
- rearranged this patchset so that "sparse_format.h" can be dropped (if we
cannot
resolve the copyright/licensing issues)
- update mmc_get_dev(...) to get_dev("mmc",)
- update printf() to puts() where applicable
- update debug string as per feedback
- rearranged "sparse format" support in this patchset, in order to isolate...
Changes in v3:
- remove most references to 'mmc',
which leaves only one mmc specific function: mmc_get_dev()
Changes in v2:
- split large function into three
- improved handling of response messages
- additional partition size checking when writing sparse image
- update README.android-fastboot file
- new in v2
Steve Rae (4):
usb/gadget: fastboot: add eMMC support for flash command
usb/gadget: fastboot: add support for flash command
usb/gadget: fastboot: minor cleanup
usb/gadget: fastboot: implement sparse format
README | 10 +
common/Makefile | 6 +++
common/cmd_fastboot.c | 7 ++--
common/fb_mmc.c | 92 +
doc/README.android-fastboot | 5 ++-
drivers/usb/gadget/f_fastboot.c | 44 ++--
include/fb_mmc.h| 8
7 files changed, 163 insertions(+), 9 deletions(-)
create mode 100644 common/fb_mmc.c
create mode 100644 include/fb_mmc.h
I assume that because of all the churn with the "Android sparse image"
(BTW - thanks for accepting it...) it seems that this patchset got
incorrectly marked as superseded in "Patchwork". I have corrected its
status (to NEW).
Can this please be pulled ASAP! ?!?!?
Thanks in advance, Steve
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Re: [U-Boot] [PATCH 0/3] arm: add interrupt support
Le 22/09/2014 03:35, Masahiro Yamada a écrit : On Sun, 21 Sep 2014 23:33:47 +0200 Georges Savoundararadj wrote: Hi folks, I wanted to use interrupt on U-Boot on my Raspberry Pi but I have found that it did not work properly. My patches intend to make interrupt work. I am not sure if interrupt feature is necessary for a boot loader. Of course, It is not necessary. But for U-boot, I think it is still important to handle exception correctly even if interrupts are not used. Don't you? For instance, without these patches an undefined instruction or any other exception causes an unexpected behavior. It is better to handle properly these cases (dump registers and reset CPU, see functions do_* in arch/arm/lib/interrupts.c). My patches should better be considered as *bugfixes*. I should have explained better what these patches do: * [PATCH 1/3] arm: make .vectors section allocatable: This patch makes the symbols in the section .vectors relocatable. If the symbols address of undefined_instruction, for instance, is not fixed up after relocation, this could lead to an unexpected behavior. It fixes a regression introduced in commit 41623c91. * [PATCH 2/3] arm1176: move exception vectors after relocation: Without this patch, an exception will jump to the before relocation base address which is clearly a bug. * [PATCH 3/3] arm: enable_interrupts: set sp in IRQ/FIQ modes: The init_interrupt function is not complete because it does not configure the computed stack pointers. So, why should we compute IRQ_STACK_START and FIQ_STACK_START without using them? I hope I am clear. Regards, Georges ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] Please pull u-boot-x86.git branch misc
Hi Masahiro, On 22 September 2014 11:13, Masahiro YAMADA wrote: > 2014-09-23 0:33 GMT+09:00 Simon Glass : > >> >> Jagannadha Sutradharudu Teki (1): >> sandbox: Update minor documentation changes > > > As I commented in > http://patchwork.ozlabs.org/patch/384547/ > the second hunk does not make sense at all > and not fixed yet. I did read your comment but thought it was addressed. Are you wanting to change this line also? > The chosen vendor and board names are also 'sandbox', so there is a single Let me know what you'd like it to say, and I'll prepare a patch. Regards, Simon ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] enabling ecc on P2041 and QoreIQ familly not valid for memory >= 4GB
Benoit, Since you should and you have used the suggested method to initialize ECC, I am going to close this patch as N/A. I will find some time to clean up the size variable. I will follow up with you on the other thread regarding dcache issue. York On 08/25/2014 05:35 AM, Benoit Sansoni wrote: > Hi York, > > Sorry for the delay. I was in holidays. I am back at work today. > Yes I have tried the other method that you proposed. > It works perfectly and It seems that this method initialized the ECC in > a faster manner. > > I faced a stability issue during ddr initialization. To resolve it I > deactivate the autocalibration as recommended in the erratum num A-003474. > So for me the u-boot release that I am currently using is u-boot-2012.10 > and in the file u-boot-2012.10/arch/powerpc/cpu/mpc85xx/ddr-gen3.c I > modified it > depending my ddr ram timing : > > out_be32(&ddr->timing_cfg_3, regs->timing_cfg_3); > out_be32(&ddr->timing_cfg_0, regs->timing_cfg_0); > out_be32(&ddr->timing_cfg_1, regs->timing_cfg_1); > /*dataT = fsl_dbg_timing();*/ > dataT = 0x9; > out_be32(&ddr->timing_cfg_2, (regs->timing_cfg_2 & 0xf07f) | > (dataT<<23)); > out_be32(&ddr->sdram_mode, regs->ddr_sdram_mode); > out_be32(&ddr->sdram_mode_2, regs->ddr_sdram_mode_2); > out_be32(&ddr->sdram_mode_3, regs->ddr_sdram_mode_3); > out_be32(&ddr->sdram_mode_4, regs->ddr_sdram_mode_4); > out_be32(&ddr->sdram_mode_5, regs->ddr_sdram_mode_5); > out_be32(&ddr->sdram_mode_6, regs->ddr_sdram_mode_6); > out_be32(&ddr->sdram_mode_7, regs->ddr_sdram_mode_7); > out_be32(&ddr->sdram_mode_8, regs->ddr_sdram_mode_8); > out_be32(&ddr->sdram_md_cntl, regs->ddr_sdram_md_cntl); > out_be32(&ddr->sdram_interval, regs->ddr_sdram_interval); > out_be32(&ddr->sdram_data_init, regs->ddr_data_init); > out_be32(&ddr->sdram_clk_cntl, regs->ddr_sdram_clk_cntl); > out_be32(&ddr->init_addr, regs->ddr_init_addr); > out_be32(&ddr->init_ext_addr, regs->ddr_init_ext_addr); > > So for me the timing_cfg_2 must be set at a deterministic value to avoid > stability issue when the CONFIG_SYS_FSL_ERRATUM_DDR_A003474 flag is set. > > Many thanks > Benoit > > > On 08/12/2014 08:07 PM, York Sun wrote: >> On 07/23/2014 11:56 PM, Benoit Sansoni wrote: >>> York, >>> >>> I am going to check out the method that you talk about. >>> For now the fix allow me to boot our board with 8GB it is a good step >>> for me. >>> >>> Thanks >>> Benoit >>> >>> On 07/23/2014 06:32 PM, York Sun wrote: Benoit, If your interest is in initializing DDR for ECC, you don't have use dma_meminit(). There is a better and faster way to do so. All Freescale modern DDR controllers support this feature. All you have to do is to define these macros CONFIG_DDR_ECC CONFIG_ECC_INIT_VIA_DDRCONTROLLER CONFIG_MEM_INIT_VALUE There are plenty of example for you to follow. But again, we should fix the DMA function anyway. >> Benoit, >> >> Have you tried my suggestion? >> >> York >> >> >> > > ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] Please pull u-boot-x86.git branch misc
2014-09-23 0:33 GMT+09:00 Simon Glass : > > Jagannadha Sutradharudu Teki (1): > sandbox: Update minor documentation changes As I commented in http://patchwork.ozlabs.org/patch/384547/ the second hunk does not make sense at all and not fixed yet. -- Best Regards Masahiro Yamada ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 2/2] mx6sabre_common: Add HDMI config to common code
HDMI config options can be placed into the common mx6sabre_common.h file to avoid duplication. Signed-off-by: Fabio Estevam --- include/configs/mx6qsabreauto.h | 17 - include/configs/mx6sabre_common.h | 17 + include/configs/mx6sabresd.h | 17 - 3 files changed, 17 insertions(+), 34 deletions(-) diff --git a/include/configs/mx6qsabreauto.h b/include/configs/mx6qsabreauto.h index 48fec6f..0ab3127 100644 --- a/include/configs/mx6qsabreauto.h +++ b/include/configs/mx6qsabreauto.h @@ -45,21 +45,4 @@ #define CONFIG_SYS_I2C_MXC #define CONFIG_SYS_I2C_SPEED 10 -/* Framebuffer */ -#define CONFIG_VIDEO -#define CONFIG_VIDEO_IPUV3 -#define CONFIG_CFB_CONSOLE -#define CONFIG_VGA_AS_SINGLE_DEVICE -#define CONFIG_SYS_CONSOLE_IS_IN_ENV -#define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE -#define CONFIG_VIDEO_BMP_RLE8 -#define CONFIG_SPLASH_SCREEN -#define CONFIG_SPLASH_SCREEN_ALIGN -#define CONFIG_BMP_16BPP -#define CONFIG_VIDEO_LOGO -#define CONFIG_VIDEO_BMP_LOGO -#define CONFIG_IPUV3_CLK 26000 -#define CONFIG_IMX_HDMI -#define CONFIG_IMX_VIDEO_SKIP - #endif /* __MX6QSABREAUTO_CONFIG_H */ diff --git a/include/configs/mx6sabre_common.h b/include/configs/mx6sabre_common.h index e59a3b4..4e80237 100644 --- a/include/configs/mx6sabre_common.h +++ b/include/configs/mx6sabre_common.h @@ -260,4 +260,21 @@ #define CONFIG_CMD_CACHE #endif +/* Framebuffer */ +#define CONFIG_VIDEO +#define CONFIG_VIDEO_IPUV3 +#define CONFIG_CFB_CONSOLE +#define CONFIG_VGA_AS_SINGLE_DEVICE +#define CONFIG_SYS_CONSOLE_IS_IN_ENV +#define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE +#define CONFIG_VIDEO_BMP_RLE8 +#define CONFIG_SPLASH_SCREEN +#define CONFIG_SPLASH_SCREEN_ALIGN +#define CONFIG_BMP_16BPP +#define CONFIG_VIDEO_LOGO +#define CONFIG_VIDEO_BMP_LOGO +#define CONFIG_IPUV3_CLK 26000 +#define CONFIG_IMX_HDMI +#define CONFIG_IMX_VIDEO_SKIP + #endif /* __MX6QSABRE_COMMON_CONFIG_H */ diff --git a/include/configs/mx6sabresd.h b/include/configs/mx6sabresd.h index e666ebb..938030d 100644 --- a/include/configs/mx6sabresd.h +++ b/include/configs/mx6sabresd.h @@ -32,23 +32,6 @@ #define CONFIG_SYS_MMC_ENV_DEV 1 /* SDHC3 */ #endif -/* Framebuffer */ -#define CONFIG_VIDEO -#define CONFIG_VIDEO_IPUV3 -#define CONFIG_CFB_CONSOLE -#define CONFIG_VGA_AS_SINGLE_DEVICE -#define CONFIG_SYS_CONSOLE_IS_IN_ENV -#define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE -#define CONFIG_VIDEO_BMP_RLE8 -#define CONFIG_SPLASH_SCREEN -#define CONFIG_SPLASH_SCREEN_ALIGN -#define CONFIG_BMP_16BPP -#define CONFIG_VIDEO_LOGO -#define CONFIG_VIDEO_BMP_LOGO -#define CONFIG_IPUV3_CLK 26000 -#define CONFIG_IMX_HDMI -#define CONFIG_IMX_VIDEO_SKIP - #define CONFIG_CMD_PCI #ifdef CONFIG_CMD_PCI #define CONFIG_PCI -- 1.9.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 1/2] mx6qsabreauto: Add HDMI support
Let HDMI splash screen support work by default.
Signed-off-by: Fabio Estevam
---
board/freescale/mx6qsabreauto/mx6qsabreauto.c | 60 ++-
include/configs/mx6qsabreauto.h | 17
2 files changed, 76 insertions(+), 1 deletion(-)
diff --git a/board/freescale/mx6qsabreauto/mx6qsabreauto.c
b/board/freescale/mx6qsabreauto/mx6qsabreauto.c
index dd6d2a6..6e9b4d8 100644
--- a/board/freescale/mx6qsabreauto/mx6qsabreauto.c
+++ b/board/freescale/mx6qsabreauto/mx6qsabreauto.c
@@ -23,6 +23,9 @@
#include
#include
#include
+#include
+#include
+#include
DECLARE_GLOBAL_DATA_PTR;
@@ -234,10 +237,65 @@ u32 get_board_rev(void)
return (get_cpu_rev() & ~(0xF << 8)) | rev;
}
+#if defined(CONFIG_VIDEO_IPUV3)
+static void do_enable_hdmi(struct display_info_t const *dev)
+{
+ imx_enable_hdmi_phy();
+}
+
+struct display_info_t const displays[] = {{
+ .bus= -1,
+ .addr = 0,
+ .pixfmt = IPU_PIX_FMT_RGB24,
+ .detect = detect_hdmi,
+ .enable = do_enable_hdmi,
+ .mode = {
+ .name = "HDMI",
+ .refresh= 60,
+ .xres = 1024,
+ .yres = 768,
+ .pixclock = 15385,
+ .left_margin= 220,
+ .right_margin = 40,
+ .upper_margin = 21,
+ .lower_margin = 7,
+ .hsync_len = 60,
+ .vsync_len = 10,
+ .sync = FB_SYNC_EXT,
+ .vmode = FB_VMODE_NONINTERLACED,
+} } };
+size_t display_count = ARRAY_SIZE(displays);
+
+static void setup_display(void)
+{
+ struct mxc_ccm_reg *mxc_ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR;
+ int reg;
+
+ enable_ipu_clock();
+ imx_setup_hdmi();
+
+ reg = readl(&mxc_ccm->chsccdr);
+ reg |= (CHSCCDR_CLK_SEL_LDB_DI0
+ << MXC_CCM_CHSCCDR_IPU1_DI0_CLK_SEL_OFFSET);
+ writel(reg, &mxc_ccm->chsccdr);
+}
+#endif /* CONFIG_VIDEO_IPUV3 */
+
+/*
+ * Do not overwrite the console
+ * Use always serial for U-Boot console
+ */
+int overwrite_console(void)
+{
+ return 1;
+}
+
int board_early_init_f(void)
{
setup_iomux_uart();
-
+#ifdef CONFIG_VIDEO_IPUV3
+ setup_display();
+#endif
return 0;
}
diff --git a/include/configs/mx6qsabreauto.h b/include/configs/mx6qsabreauto.h
index 0ab3127..48fec6f 100644
--- a/include/configs/mx6qsabreauto.h
+++ b/include/configs/mx6qsabreauto.h
@@ -45,4 +45,21 @@
#define CONFIG_SYS_I2C_MXC
#define CONFIG_SYS_I2C_SPEED 10
+/* Framebuffer */
+#define CONFIG_VIDEO
+#define CONFIG_VIDEO_IPUV3
+#define CONFIG_CFB_CONSOLE
+#define CONFIG_VGA_AS_SINGLE_DEVICE
+#define CONFIG_SYS_CONSOLE_IS_IN_ENV
+#define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE
+#define CONFIG_VIDEO_BMP_RLE8
+#define CONFIG_SPLASH_SCREEN
+#define CONFIG_SPLASH_SCREEN_ALIGN
+#define CONFIG_BMP_16BPP
+#define CONFIG_VIDEO_LOGO
+#define CONFIG_VIDEO_BMP_LOGO
+#define CONFIG_IPUV3_CLK 26000
+#define CONFIG_IMX_HDMI
+#define CONFIG_IMX_VIDEO_SKIP
+
#endif /* __MX6QSABREAUTO_CONFIG_H */
--
1.9.1
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Re: [U-Boot] [PATCH] usb: f_mass_storage: set removable flag in do_inquiry based on LUN
On 09/22/2014 09:00 AM, Lukasz Majewski wrote: > Hi Marek, > >> On Saturday, September 20, 2014 at 02:06:46 AM, Eric Nelson wrote: >>> Without this flag, tools like Alex Page's USB Image Tool >>> won't see drives exposed over USB Gadget as removable, >>> and won't allow access to them. >>> http://www.alexpage.de/usb-image-tool/ >>> >>> The code was pulled from the main-line kernel: >>> drivers/usb/gadget/function/f_mass_storage.c >>> >>> Signed-off-by: Eric Nelson >> >> I'm OK with this. This should go to current release too. Lukasz, do >> you agree ? Do you want to pick it + send me PR or shall I apply >> directly ? > > Eric thanks for your patch. > > Acked-by: Lukasz Majewski > > Tested-by: Lukasz Majewski > Test HW (Trats - Exynos 4210) > > I've applied this patch to u-boot-dfu branch. > > I will send PR to Marek in a few days time. > Thanks Lukasz and Marek. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] usb: f_mass_storage: set removable flag in do_inquiry based on LUN
Hi Marek, > On Saturday, September 20, 2014 at 02:06:46 AM, Eric Nelson wrote: > > Without this flag, tools like Alex Page's USB Image Tool > > won't see drives exposed over USB Gadget as removable, > > and won't allow access to them. > > http://www.alexpage.de/usb-image-tool/ > > > > The code was pulled from the main-line kernel: > > drivers/usb/gadget/function/f_mass_storage.c > > > > Signed-off-by: Eric Nelson > > I'm OK with this. This should go to current release too. Lukasz, do > you agree ? Do you want to pick it + send me PR or shall I apply > directly ? Eric thanks for your patch. Acked-by: Lukasz Majewski Tested-by: Lukasz Majewski Test HW (Trats - Exynos 4210) I've applied this patch to u-boot-dfu branch. I will send PR to Marek in a few days time. > > Eric, please CC Lukasz on the gadget patches, he's the gadget guru. > > Best regards, > Marek Vasut -- Best regards, Lukasz Majewski Samsung R&D Institute Poland (SRPOL) | Linux Platform Group ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 13/14] dm: am335x: Remove serial options from CONFIG_SYS_EXTRA_OPTIONS
With these options in place it is not possible to change the serial port using 'make menuconfig' or similar. It seems to result in duplicate defines. For example: In file included from include/linux/kconfig.h:4:0, from :0: include/generated/autoconf.h:20:0: note: this is the location of the previous definition #define CONFIG_CONS_INDEX 2 ^ The default option seems to be 1 anyway, in board/ti/am335x/Kconfig. Remove the options so that we can adjust the serial port if required. Signed-off-by: Simon Glass --- configs/am335x_boneblack_defconfig | 2 +- configs/am335x_boneblack_vboot_defconfig | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/configs/am335x_boneblack_defconfig b/configs/am335x_boneblack_defconfig index 38450c0..b631c41 100644 --- a/configs/am335x_boneblack_defconfig +++ b/configs/am335x_boneblack_defconfig @@ -1,4 +1,4 @@ CONFIG_SPL=y -CONFIG_SYS_EXTRA_OPTIONS="SERIAL1,CONS_INDEX=1,EMMC_BOOT" +CONFIG_SYS_EXTRA_OPTIONS="EMMC_BOOT" +S:CONFIG_ARM=y +S:CONFIG_TARGET_AM335X_EVM=y diff --git a/configs/am335x_boneblack_vboot_defconfig b/configs/am335x_boneblack_vboot_defconfig index 00317c4..e6c5ee3 100644 --- a/configs/am335x_boneblack_vboot_defconfig +++ b/configs/am335x_boneblack_vboot_defconfig @@ -1,4 +1,4 @@ CONFIG_SPL=y -CONFIG_SYS_EXTRA_OPTIONS="SERIAL1,CONS_INDEX=1,EMMC_BOOT,ENABLE_VBOOT" +CONFIG_SYS_EXTRA_OPTIONS="EMMC_BOOT,ENABLE_VBOOT" +S:CONFIG_ARM=y +S:CONFIG_TARGET_AM335X_EVM=y -- 2.1.0.rc2.206.gedb03e5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 14/14] dm: am33xx: Move to driver model for GPIO and serial
Adjust the configuration for the am33xx boards, including beaglebone black to use driver model. This can be extended to other OMAP boards once platform data is provided for them. Signed-off-by: Simon Glass --- include/configs/ti_am335x_common.h | 11 +++ 1 file changed, 11 insertions(+) diff --git a/include/configs/ti_am335x_common.h b/include/configs/ti_am335x_common.h index 80976e7..5ed86d9 100644 --- a/include/configs/ti_am335x_common.h +++ b/include/configs/ti_am335x_common.h @@ -19,12 +19,23 @@ #define CONFIG_SYS_TIMERBASE 0x4804 /* Use Timer2 */ #define CONFIG_SPL_AM33XX_ENABLE_RTC32K_OSC +#ifndef CONFIG_SPL_BUILD +# define CONFIG_DM +# define CONFIG_CMD_DM +# define CONFIG_DM_GPIO +# define CONFIG_DM_SERIAL +# define CONFIG_OMAP_SERIAL +# define CONFIG_SYS_MALLOC_F_LEN (1 << 10) +#endif + #include /* NS16550 Configuration */ #define CONFIG_SYS_NS16550 +#ifdef CONFIG_SPL_BUILD #define CONFIG_SYS_NS16550_SERIAL #define CONFIG_SYS_NS16550_REG_SIZE(-4) +#endif #define CONFIG_SYS_NS16550_CLK 4800 /* Network defines. */ -- 2.1.0.rc2.206.gedb03e5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 11/14] dm: am33xx: Provide platform data for serial
Provide suitable platform data for am33xx boards, so that these boards can
use driver model for serial.
Signed-off-by: Simon Glass
---
arch/arm/cpu/armv7/am33xx/board.c | 33 +
1 file changed, 33 insertions(+)
diff --git a/arch/arm/cpu/armv7/am33xx/board.c
b/arch/arm/cpu/armv7/am33xx/board.c
index 7aa8198..29b1d73 100644
--- a/arch/arm/cpu/armv7/am33xx/board.c
+++ b/arch/arm/cpu/armv7/am33xx/board.c
@@ -11,6 +11,7 @@
#include
#include
#include
+#include
#include
#include
#include
@@ -60,6 +61,38 @@ U_BOOT_DEVICES(am33xx_gpios) = {
#endif
};
+# ifndef CONFIG_OF_CONTROL
+/*
+ * TODO(s...@chromium.org): When we can move SPL serial to DM, we can remove
+ * the CONFIGs. At the same time, we should move this to the board files.
+ */
+static const struct ns16550_platdata am33xx_serial[] = {
+ { CONFIG_SYS_NS16550_COM1, 2, CONFIG_SYS_NS16550_CLK },
+# ifdef CONFIG_SYS_NS16550_COM2
+ { CONFIG_SYS_NS16550_COM2, 2, CONFIG_SYS_NS16550_CLK },
+# ifdef CONFIG_SYS_NS16550_COM3
+ { CONFIG_SYS_NS16550_COM3, 2, CONFIG_SYS_NS16550_CLK },
+ { CONFIG_SYS_NS16550_COM4, 2, CONFIG_SYS_NS16550_CLK },
+ { CONFIG_SYS_NS16550_COM5, 2, CONFIG_SYS_NS16550_CLK },
+ { CONFIG_SYS_NS16550_COM6, 2, CONFIG_SYS_NS16550_CLK },
+# endif
+# endif
+};
+
+U_BOOT_DEVICES(am33xx_uarts) = {
+ { "serial_omap", &am33xx_serial[0] },
+# ifdef CONFIG_SYS_NS16550_COM2
+ { "serial_omap", &am33xx_serial[1] },
+# ifdef CONFIG_SYS_NS16550_COM3
+ { "serial_omap", &am33xx_serial[2] },
+ { "serial_omap", &am33xx_serial[3] },
+ { "serial_omap", &am33xx_serial[4] },
+ { "serial_omap", &am33xx_serial[5] },
+# endif
+# endif
+};
+# endif
+
#else
static const struct gpio_bank gpio_bank_am33xx[] = {
--
2.1.0.rc2.206.gedb03e5
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[U-Boot] [PATCH 08/14] dm: omap: gpio: Put _get_gpio_value() logic into its own function
Add a separate internal helper function to get a GPIO value, so that we
will be able to call it with the driver model version and avoid code
duplication.
Also move gpio_get_bank() and check_gpio() down below the helper functions
as these won't be needed with driver model.
Signed-off-by: Simon Glass
---
drivers/gpio/omap_gpio.c | 78 ++--
1 file changed, 42 insertions(+), 36 deletions(-)
diff --git a/drivers/gpio/omap_gpio.c b/drivers/gpio/omap_gpio.c
index 13dcf79..d2d2640 100644
--- a/drivers/gpio/omap_gpio.c
+++ b/drivers/gpio/omap_gpio.c
@@ -26,11 +26,6 @@
#define OMAP_GPIO_DIR_OUT 0
#define OMAP_GPIO_DIR_IN 1
-static inline const struct gpio_bank *get_gpio_bank(int gpio)
-{
- return &omap_gpio_bank[gpio >> 5];
-}
-
static inline int get_gpio_index(int gpio)
{
return gpio & 0x1f;
@@ -41,15 +36,6 @@ int gpio_is_valid(int gpio)
return (gpio >= 0) && (gpio < OMAP_MAX_GPIO);
}
-static int check_gpio(int gpio)
-{
- if (!gpio_is_valid(gpio)) {
- printf("ERROR : check_gpio: invalid GPIO %d\n", gpio);
- return -1;
- }
- return 0;
-}
-
static void _set_gpio_direction(const struct gpio_bank *bank, int gpio,
int is_input)
{
@@ -118,6 +104,46 @@ static void _set_gpio_dataout(const struct gpio_bank
*bank, int gpio,
__raw_writel(l, reg);
}
+static int _get_gpio_value(const struct gpio_bank *bank, int gpio)
+{
+ void *reg = bank->base;
+ int input;
+
+ switch (bank->method) {
+ case METHOD_GPIO_24XX:
+ input = _get_gpio_direction(bank, gpio);
+ switch (input) {
+ case OMAP_GPIO_DIR_IN:
+ reg += OMAP_GPIO_DATAIN;
+ break;
+ case OMAP_GPIO_DIR_OUT:
+ reg += OMAP_GPIO_DATAOUT;
+ break;
+ default:
+ return -1;
+ }
+ break;
+ default:
+ return -1;
+ }
+
+ return (__raw_readl(reg) & (1 << gpio)) != 0;
+}
+
+static inline const struct gpio_bank *get_gpio_bank(int gpio)
+{
+ return &omap_gpio_bank[gpio >> 5];
+}
+
+static int check_gpio(int gpio)
+{
+ if (!gpio_is_valid(gpio)) {
+ printf("ERROR : check_gpio: invalid GPIO %d\n", gpio);
+ return -1;
+ }
+ return 0;
+}
+
/**
* Set value of the specified gpio
*/
@@ -139,32 +165,12 @@ int gpio_set_value(unsigned gpio, int value)
int gpio_get_value(unsigned gpio)
{
const struct gpio_bank *bank;
- void *reg;
- int input;
if (check_gpio(gpio) < 0)
return -1;
bank = get_gpio_bank(gpio);
- reg = bank->base;
- switch (bank->method) {
- case METHOD_GPIO_24XX:
- input = _get_gpio_direction(bank, get_gpio_index(gpio));
- switch (input) {
- case OMAP_GPIO_DIR_IN:
- reg += OMAP_GPIO_DATAIN;
- break;
- case OMAP_GPIO_DIR_OUT:
- reg += OMAP_GPIO_DATAOUT;
- break;
- default:
- return -1;
- }
- break;
- default:
- return -1;
- }
- return (__raw_readl(reg)
- & (1 << get_gpio_index(gpio))) != 0;
+
+ return _get_gpio_value(bank, get_gpio_index(gpio));
}
/**
--
2.1.0.rc2.206.gedb03e5
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[U-Boot] [PATCH 12/14] dm: omap: serial: Add driver model support
Add driver model support to this driver, while retaining support for the
legacy system. Driver model serial support is enabled with CONFIG_DM_SERIAL
as usual.
Signed-off-by: Simon Glass
---
drivers/serial/Makefile | 1 +
drivers/serial/serial_omap.c | 49
2 files changed, 50 insertions(+)
create mode 100644 drivers/serial/serial_omap.c
diff --git a/drivers/serial/Makefile b/drivers/serial/Makefile
index 853a8c6..9ac3496 100644
--- a/drivers/serial/Makefile
+++ b/drivers/serial/Makefile
@@ -39,6 +39,7 @@ obj-$(CONFIG_FSL_LPUART) += serial_lpuart.o
obj-$(CONFIG_MXS_AUART) += mxs_auart.o
obj-$(CONFIG_ARC_SERIAL) += serial_arc.o
obj-$(CONFIG_TEGRA_SERIAL) += serial_tegra.o
+obj-$(CONFIG_OMAP_SERIAL) += serial_omap.o
ifndef CONFIG_SPL_BUILD
obj-$(CONFIG_USB_TTY) += usbtty.o
diff --git a/drivers/serial/serial_omap.c b/drivers/serial/serial_omap.c
new file mode 100644
index 000..6866b21
--- /dev/null
+++ b/drivers/serial/serial_omap.c
@@ -0,0 +1,49 @@
+/*
+ * Copyright (c) 2014 Google, Inc
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include
+#include
+#include
+#include
+#include
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#ifdef CONFIG_OF_CONTROL
+static const struct udevice_id omap_serial_ids[] = {
+ { .compatible = "ti,omap3-uart" },
+ { }
+};
+
+static int omap_serial_ofdata_to_platdata(struct udevice *dev)
+{
+ struct ns16550_platdata *plat = dev_get_platdata(dev);
+ int ret;
+
+ ret = ns16550_serial_ofdata_to_platdata(dev);
+ if (ret)
+ return ret;
+ plat->clock = fdtdec_get_int(gd->fdt_blob, dev->of_offset,
+"clock-frequency", -1);
+ plat->reg_shift = 2;
+
+ return 0;
+}
+#endif
+
+U_BOOT_DRIVER(serial_omap_ns16550) = {
+ .name = "serial_omap",
+ .id = UCLASS_SERIAL,
+#ifdef CONFIG_OF_CONTROL
+ .of_match = omap_serial_ids,
+ .ofdata_to_platdata = omap_serial_ofdata_to_platdata,
+#endif
+ .platdata_auto_alloc_size = sizeof(struct ns16550_platdata),
+ .priv_auto_alloc_size = sizeof(struct NS16550),
+ .probe = ns16550_serial_probe,
+ .ops= &ns16550_serial_ops,
+ .flags = DM_FLAG_PRE_RELOC,
+};
--
2.1.0.rc2.206.gedb03e5
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[U-Boot] [PATCH 09/14] dm: omap: gpio: Support driver model
Add driver model support to this driver, while retaining support for the
legacy system. Driver model GPIO support is enabled with CONFIG_DM_GPIO
as usual.
Since gpio_is_valid() no longer exists, we can use the -EINVAL error
returned from gpio_request().
Signed-off-by: Simon Glass
---
arch/arm/include/asm/omap_gpio.h | 19 +++-
drivers/gpio/omap_gpio.c | 221 +++
drivers/mmc/omap_hsmmc.c | 15 ++-
3 files changed, 248 insertions(+), 7 deletions(-)
diff --git a/arch/arm/include/asm/omap_gpio.h b/arch/arm/include/asm/omap_gpio.h
index 5d25d04..839af54 100644
--- a/arch/arm/include/asm/omap_gpio.h
+++ b/arch/arm/include/asm/omap_gpio.h
@@ -23,6 +23,21 @@
#include
+enum gpio_method {
+ METHOD_GPIO_24XX= 4,
+};
+
+#ifdef CONFIG_DM_GPIO
+
+/* Information about a GPIO bank */
+struct omap_gpio_platdata {
+ int bank_index;
+ ulong base; /* address of registers in physical memory */
+ enum gpio_method method;
+};
+
+#else
+
struct gpio_bank {
void *base;
int method;
@@ -30,8 +45,6 @@ struct gpio_bank {
extern const struct gpio_bank *const omap_gpio_bank;
-#define METHOD_GPIO_24XX 4
-
/**
* Check if gpio is valid.
*
@@ -39,4 +52,6 @@ extern const struct gpio_bank *const omap_gpio_bank;
* @return 1 if ok, 0 on error
*/
int gpio_is_valid(int gpio);
+#endif
+
#endif /* _GPIO_H_ */
diff --git a/drivers/gpio/omap_gpio.c b/drivers/gpio/omap_gpio.c
index d2d2640..a4651bc 100644
--- a/drivers/gpio/omap_gpio.c
+++ b/drivers/gpio/omap_gpio.c
@@ -19,6 +19,7 @@
* Written by Juha Yrjölä
*/
#include
+#include
#include
#include
#include
@@ -26,6 +27,20 @@
#define OMAP_GPIO_DIR_OUT 0
#define OMAP_GPIO_DIR_IN 1
+#ifdef CONFIG_DM_GPIO
+
+#define GPIO_NAME_SIZE 20
+#define GPIO_PER_BANK 32
+
+struct gpio_bank {
+ char label[GPIO_PER_BANK][GPIO_NAME_SIZE];
+ /* TODO(s...@chromium.org): Can we use a struct here? */
+ void *base; /* address of registers in physical memory */
+ enum gpio_method method;
+};
+
+#endif
+
static inline int get_gpio_index(int gpio)
{
return gpio & 0x1f;
@@ -130,6 +145,8 @@ static int _get_gpio_value(const struct gpio_bank *bank,
int gpio)
return (__raw_readl(reg) & (1 << gpio)) != 0;
}
+#ifndef CONFIG_DM_GPIO
+
static inline const struct gpio_bank *get_gpio_bank(int gpio)
{
return &omap_gpio_bank[gpio >> 5];
@@ -226,3 +243,207 @@ int gpio_free(unsigned gpio)
{
return 0;
}
+
+#else /* new driver model interface CONFIG_DM_GPIO */
+
+/**
+ * gpio_is_requested() - check if a GPIO has been requested
+ *
+ * @bank: Bank to check
+ * @offset:GPIO offset within bank to check
+ * @return true if marked as requested, false if not
+ */
+static inline bool gpio_is_requested(struct gpio_bank *bank, int offset)
+{
+ return *bank->label[offset] != '\0';
+}
+
+static int omap_gpio_is_output(struct gpio_bank *bank, int offset)
+{
+ return _get_gpio_direction(bank, offset) == OMAP_GPIO_DIR_OUT;
+}
+
+static int check_requested(struct udevice *dev, unsigned offset,
+ const char *func)
+{
+ struct gpio_bank *bank = dev_get_priv(dev);
+ struct gpio_dev_priv *uc_priv = dev->uclass_priv;
+
+ if (!gpio_is_requested(bank, offset)) {
+ printf("omap_gpio: %s: error: gpio %s%d not requested\n",
+ func, uc_priv->bank_name, offset);
+ return -EPERM;
+ }
+
+ return 0;
+}
+
+/* set GPIO pin 'gpio' as an input */
+static int omap_gpio_direction_input(struct udevice *dev, unsigned offset)
+{
+ struct gpio_bank *bank = dev_get_priv(dev);
+ int ret;
+
+ ret = check_requested(dev, offset, __func__);
+ if (ret)
+ return ret;
+
+ /* Configure GPIO direction as input. */
+ _set_gpio_direction(bank, offset, 1);
+
+ return 0;
+}
+
+/* set GPIO pin 'gpio' as an output, with polarity 'value' */
+static int omap_gpio_direction_output(struct udevice *dev, unsigned offset,
+ int value)
+{
+ struct gpio_bank *bank = dev_get_priv(dev);
+ int ret;
+
+ ret = check_requested(dev, offset, __func__);
+ if (ret)
+ return ret;
+
+ _set_gpio_dataout(bank, offset, value);
+ _set_gpio_direction(bank, offset, 0);
+
+ return 0;
+}
+
+/* read GPIO IN value of pin 'gpio' */
+static int omap_gpio_get_value(struct udevice *dev, unsigned offset)
+{
+ struct gpio_bank *bank = dev_get_priv(dev);
+ int ret;
+
+ ret = check_requested(dev, offset, __func__);
+ if (ret)
+ return ret;
+
+ return _get_gpio_value(bank, offset);
+}
+
+/* write GPIO OUT value to pin 'gpio' */
+static int omap_gpio_set_value(struct udevice *dev, unsigned offset,
+int value)
+{
+ struct g
[U-Boot] [PATCH 07/14] dm: dts: omap: Select correct console for beaglebone
Select serial0 as the console.
Signed-off-by: Simon Glass
---
arch/arm/dts/am335x-bone-common.dtsi | 4
1 file changed, 4 insertions(+)
diff --git a/arch/arm/dts/am335x-bone-common.dtsi
b/arch/arm/dts/am335x-bone-common.dtsi
index 2f66ded..e70b4d1 100644
--- a/arch/arm/dts/am335x-bone-common.dtsi
+++ b/arch/arm/dts/am335x-bone-common.dtsi
@@ -10,6 +10,10 @@
model = "TI AM335x BeagleBone";
compatible = "ti,am335x-bone", "ti,am33xx";
+ chosen {
+ stdout-path = &uart0;
+ };
+
cpus {
cpu@0 {
cpu0-supply = <&dcdc2_reg>;
--
2.1.0.rc2.206.gedb03e5
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[U-Boot] [PATCH 05/14] dm: ns16550: Correct the probe logic for platform data
The probe logic sets up the pointer to the platform data in the device
tree decode method. It should be done in the probe() method, and anyway
the device tree decode method can't be used when CONFIG_OF_CONTROL is
not enabled.
Fix these two problems.
Signed-off-by: Simon Glass
---
drivers/serial/ns16550.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/serial/ns16550.c b/drivers/serial/ns16550.c
index 2301f0a..0799aa4 100644
--- a/drivers/serial/ns16550.c
+++ b/drivers/serial/ns16550.c
@@ -276,14 +276,15 @@ int ns16550_serial_probe(struct udevice *dev)
{
struct NS16550 *const com_port = dev_get_priv(dev);
+ com_port->plat = dev_get_platdata(dev);
NS16550_init(com_port, -1);
return 0;
}
+#ifdef CONFIG_OF_CONTROL
int ns16550_serial_ofdata_to_platdata(struct udevice *dev)
{
- struct NS16550 *const com_port = dev_get_priv(dev);
struct ns16550_platdata *plat = dev->platdata;
fdt_addr_t addr;
@@ -294,10 +295,10 @@ int ns16550_serial_ofdata_to_platdata(struct udevice *dev)
plat->base = addr;
plat->reg_shift = fdtdec_get_int(gd->fdt_blob, dev->of_offset,
"reg-shift", 1);
- com_port->plat = plat;
return 0;
}
+#endif
const struct dm_serial_ops ns16550_serial_ops = {
.putc = ns16550_serial_putc,
--
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[U-Boot] [PATCH 02/14] dm: serial: Reset the watchdog while waiting in getc()
We have moved the busy-wait loop out of drivers and into the uclass. This
means that we must reset the watchdog when busy-waiting.
Note: some drivers may still have a busy-wait even with driver model, as
a transition mechanism. Driver model will tolerate this, and is can be
cleaned up when all users of the driver use driver model. An example is
ns16550.
Signed-off-by: Simon Glass
---
drivers/serial/serial-uclass.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/drivers/serial/serial-uclass.c b/drivers/serial/serial-uclass.c
index e93c624..aeaf2d2 100644
--- a/drivers/serial/serial-uclass.c
+++ b/drivers/serial/serial-uclass.c
@@ -11,9 +11,12 @@
#include
#include
#include
+#include
#include
#include
+#include
+
DECLARE_GLOBAL_DATA_PTR;
/* The currently-selected console serial device */
@@ -119,6 +122,8 @@ static int serial_getc_dev(struct udevice *dev)
do {
err = ops->getc(dev);
+ if (err == -EAGAIN)
+ WATCHDOG_RESET();
} while (err == -EAGAIN);
return err >= 0 ? err : 0;
--
2.1.0.rc2.206.gedb03e5
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[U-Boot] [PATCH 03/14] dm: serial: ns16550: Correct logic for checking for character
There is a bug in the logic which checks for an available character. This
can cause invalid characters to be received - this was noticed on
beaglebone. Fix it.
Signed-off-by: Simon Glass
---
drivers/serial/ns16550.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/serial/ns16550.c b/drivers/serial/ns16550.c
index 63a9ef6..fe6cc26 100644
--- a/drivers/serial/ns16550.c
+++ b/drivers/serial/ns16550.c
@@ -253,7 +253,7 @@ static int ns16550_serial_getc(struct udevice *dev)
{
struct NS16550 *const com_port = dev_get_priv(dev);
- if (!serial_in(&com_port->lsr) & UART_LSR_DR)
+ if (!(serial_in(&com_port->lsr) & UART_LSR_DR))
return -EAGAIN;
return serial_in(&com_port->rbr);
--
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[U-Boot] [PATCH 06/14] dm: serial: Support CONFIG_CONS_INDEX if available
Try to use this option to select the correct uart for the console. This
mimics the behaviour of drivers/serial.c.
Signed-off-by: Simon Glass
---
drivers/serial/serial-uclass.c | 11 ++-
1 file changed, 10 insertions(+), 1 deletion(-)
diff --git a/drivers/serial/serial-uclass.c b/drivers/serial/serial-uclass.c
index aeaf2d2..522e551 100644
--- a/drivers/serial/serial-uclass.c
+++ b/drivers/serial/serial-uclass.c
@@ -50,13 +50,22 @@ static void serial_find_console_or_panic(void)
}
#endif
/*
+* Try to use CONFIG_CONS_INDEX is available (it is numbered from 1!).
+*
* Failing that, get the device with sequence number 0, or in extremis
* just the first serial device we can find. But we insist on having
* a console (even if it is silent).
*/
- if (uclass_get_device_by_seq(UCLASS_SERIAL, 0, &cur_dev) &&
+#ifdef CONFIG_CONS_INDEX
+#define INDEX (CONFIG_CONS_INDEX - 1)
+#else
+#define INDEX 0
+#endif
+ if (uclass_get_device_by_seq(UCLASS_SERIAL, INDEX, &cur_dev) &&
+ uclass_get_device(UCLASS_SERIAL, INDEX, &cur_dev) &&
(uclass_first_device(UCLASS_SERIAL, &cur_dev) || !cur_dev))
panic("No serial driver found");
+#undef INDEX
}
/* Called prior to relocation */
--
2.1.0.rc2.206.gedb03e5
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[U-Boot] [PATCH 04/14] dm: ns16550: Use an address instead of a pointer for the uart base
It is inconvenient to have to use casts when specifying platform data. Also
it is not strictly correct, since we should use map_sysmem() to convert an
address to a pointer.
Adjust the platform data to use an address.
Signed-off-by: Simon Glass
---
drivers/serial/ns16550.c | 6 +++---
include/ns16550.h| 2 +-
2 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/serial/ns16550.c b/drivers/serial/ns16550.c
index fe6cc26..2301f0a 100644
--- a/drivers/serial/ns16550.c
+++ b/drivers/serial/ns16550.c
@@ -61,7 +61,7 @@ static void ns16550_writeb(NS16550_t port, int offset, int
value)
unsigned char *addr;
offset *= 1 << plat->reg_shift;
- addr = plat->base + offset;
+ addr = map_sysmem(plat->base, 0) + offset;
/*
* As far as we know it doesn't make sense to support selection of
* these options at run-time, so use the existing CONFIG options.
@@ -85,7 +85,7 @@ static int ns16550_readb(NS16550_t port, int offset)
unsigned char *addr;
offset *= 1 << plat->reg_shift;
- addr = plat->base + offset;
+ addr = map_sysmem(plat->base, 0) + offset;
#ifdef CONFIG_SYS_NS16550_PORT_MAPPED
return inb(addr);
#elif defined(CONFIG_SYS_NS16550_MEM32) && !defined(CONFIG_SYS_BIG_ENDIAN)
@@ -291,7 +291,7 @@ int ns16550_serial_ofdata_to_platdata(struct udevice *dev)
if (addr == FDT_ADDR_T_NONE)
return -EINVAL;
- plat->base = (unsigned char *)addr;
+ plat->base = addr;
plat->reg_shift = fdtdec_get_int(gd->fdt_blob, dev->of_offset,
"reg-shift", 1);
com_port->plat = plat;
diff --git a/include/ns16550.h b/include/ns16550.h
index 5784cfd..0607379 100644
--- a/include/ns16550.h
+++ b/include/ns16550.h
@@ -53,7 +53,7 @@
* @clock: UART base clock speed in Hz
*/
struct ns16550_platdata {
- unsigned char *base;
+ unsigned long base;
int reg_shift;
int clock;
};
--
2.1.0.rc2.206.gedb03e5
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[U-Boot] [PATCH 01/14] dm: gpio: Support numbered GPIOs
At present banks must be named and it is not possible to refer to GPIOs by
number in driver model. Some boards use numbering - e.g. OMAP. It is fairly
easy to support by detecting the absense of a bank name (which starts with
a letter).
Add support for numbered GPIOs in addition to the existing bank support.
Signed-off-by: Simon Glass
---
drivers/gpio/gpio-uclass.c | 37 +
1 file changed, 25 insertions(+), 12 deletions(-)
diff --git a/drivers/gpio/gpio-uclass.c b/drivers/gpio/gpio-uclass.c
index f1bbc58..a5ffd85 100644
--- a/drivers/gpio/gpio-uclass.c
+++ b/drivers/gpio/gpio-uclass.c
@@ -8,6 +8,7 @@
#include
#include
#include
+#include
/**
* gpio_to_device() - Convert global GPIO number to device, number
@@ -43,35 +44,47 @@ static int gpio_to_device(unsigned int gpio, struct udevice
**devp,
int gpio_lookup_name(const char *name, struct udevice **devp,
unsigned int *offsetp, unsigned int *gpiop)
{
- struct gpio_dev_priv *uc_priv;
+ struct gpio_dev_priv *uc_priv = NULL;
struct udevice *dev;
+ ulong offset;
+ int numeric;
int ret;
if (devp)
*devp = NULL;
+ numeric = isdigit(*name) ? simple_strtoul(name, NULL, 10) : -1;
for (ret = uclass_first_device(UCLASS_GPIO, &dev);
dev;
ret = uclass_next_device(&dev)) {
- ulong offset;
int len;
uc_priv = dev->uclass_priv;
+ if (numeric != -1) {
+ offset = numeric - uc_priv->gpio_base;
+ /* Allow GPIOs to be numbered from 0 */
+ if (offset >= 0 && offset < uc_priv->gpio_count)
+ break;
+ }
+
len = uc_priv->bank_name ? strlen(uc_priv->bank_name) : 0;
if (!strncasecmp(name, uc_priv->bank_name, len)) {
- if (strict_strtoul(name + len, 10, &offset))
- continue;
- if (devp)
- *devp = dev;
- if (offsetp)
- *offsetp = offset;
- if (gpiop)
- *gpiop = uc_priv->gpio_base + offset;
- return 0;
+ if (!strict_strtoul(name + len, 10, &offset))
+ break;
}
}
- return ret ? ret : -EINVAL;
+ if (!dev)
+ return ret ? ret : -EINVAL;
+
+ if (devp)
+ *devp = dev;
+ if (offsetp)
+ *offsetp = offset;
+ if (gpiop)
+ *gpiop = uc_priv->gpio_base + offset;
+
+ return 0;
}
/**
--
2.1.0.rc2.206.gedb03e5
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[U-Boot] [PATCH 10/14] dm: am33xx: Provide platform data for GPIOs
Provide suitable platform data for am33xx boards, so that these boards can
use driver model for GPIO access.
Signed-off-by: Simon Glass
---
arch/arm/cpu/armv7/am33xx/board.c | 28
1 file changed, 28 insertions(+)
diff --git a/arch/arm/cpu/armv7/am33xx/board.c
b/arch/arm/cpu/armv7/am33xx/board.c
index 828d10b..7aa8198 100644
--- a/arch/arm/cpu/armv7/am33xx/board.c
+++ b/arch/arm/cpu/armv7/am33xx/board.c
@@ -9,6 +9,7 @@
*/
#include
+#include
#include
#include
#include
@@ -36,6 +37,31 @@
DECLARE_GLOBAL_DATA_PTR;
+#ifdef CONFIG_DM_GPIO
+static const struct omap_gpio_platdata am33xx_gpio[] = {
+ { 0, AM33XX_GPIO0_BASE, METHOD_GPIO_24XX },
+ { 1, AM33XX_GPIO1_BASE, METHOD_GPIO_24XX },
+ { 2, AM33XX_GPIO2_BASE, METHOD_GPIO_24XX },
+ { 3, AM33XX_GPIO3_BASE, METHOD_GPIO_24XX },
+#ifdef CONFIG_AM43XX
+ { 4, AM33XX_GPIO4_BASE, METHOD_GPIO_24XX },
+ { 5, AM33XX_GPIO5_BASE, METHOD_GPIO_24XX },
+#endif
+};
+
+U_BOOT_DEVICES(am33xx_gpios) = {
+ { "gpio_omap", &am33xx_gpio[0] },
+ { "gpio_omap", &am33xx_gpio[1] },
+ { "gpio_omap", &am33xx_gpio[2] },
+ { "gpio_omap", &am33xx_gpio[3] },
+#ifdef CONFIG_AM43XX
+ { "gpio_omap", &am33xx_gpio[4] },
+ { "gpio_omap", &am33xx_gpio[5] },
+#endif
+};
+
+#else
+
static const struct gpio_bank gpio_bank_am33xx[] = {
{ (void *)AM33XX_GPIO0_BASE, METHOD_GPIO_24XX },
{ (void *)AM33XX_GPIO1_BASE, METHOD_GPIO_24XX },
@@ -49,6 +75,8 @@ static const struct gpio_bank gpio_bank_am33xx[] = {
const struct gpio_bank *const omap_gpio_bank = gpio_bank_am33xx;
+#endif
+
#if defined(CONFIG_OMAP_HSMMC) && !defined(CONFIG_SPL_BUILD)
int cpu_mmc_init(bd_t *bis)
{
--
2.1.0.rc2.206.gedb03e5
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Re: [U-Boot] [PATCH 1/7] spl: pbl: Add new SPL image for pblimage tool
On 09/21/2014 11:17 PM, Wang Huan-B18965 wrote: > > [Alison Wang] Let me explain the sequence. > > 1. u-boot-spl.bin is produced. The size of it is not a fixed value. > > 2. u-boot-spl-pbl-pad.bin is produced. The size of it is defined by > CONFIG_SPL_MAX_SIZE. For detail, u-boot-spl-pbl-pad.bin is generated > by padding u-boot-spl.bin to the size of CONFIG_SPL_MAX_SIZE. > > The following is the reason for using u-boot-spl-pbl-pad.bin. > > First of all, the SPL part need to be reorganized for the recognition > of PBL through the pblimage tool. > > For the pblimage tool, the SPL image is splitted into 64 byte chunks, > and PBL needs a command for each piece. In current pblimage tool, > the size of the SPL image(u-boot-spl.bin) should be a fixed value > like PowerPC. Well, for LS102xA and some other ARM platforms, the size > of the SPL image (u-boot-spl.bin) is changeable. So a new image > spl/u-boot-spl-pbl-pad.bin is produced, and the size of it is a fixed > value "CONFIG_SPL_MAX_SIZE". Then use u-boot-spl-pbl-pad.bin instead > of spl/u-boot-spl.bin to generate spl/u-boot-spl.pbl. > > 3. spl/u-boot-spl.pbl is produced through pblimage tool. As > CONFIG_SPL_PBL_PAD is enabled, spl/u-boot-spl-pbl-pad.bin is used as > the source file instead of spl/u-boot-spl.bin. > > 4. u-boot-with-spl-pbl.bin is produced. For detail, u-boot-with-spl-pbl.bin > is generated by padding spl/u-boot-spl.pbl to the offset of CONFIG_SPL_PAD_TO > and adding u-boot.img. > > As the size of spl/u-boot-spl.pbl is not a fixed value, we pad it to > the offset of CONFIG_SPL_PAD_TO. So it is convenient for us to determine > the location of u-boot.img in SD card. > Sorry for the late respond. I was away for an urgent project. If I understand you correctly, you define a CONFIG_SPL_MAX_SIZE and pad the final binary file to this size. How do you determine the size? I understand PBL loading mechanism. Would it be possible to pad to 64 byte boundary (or any practical size since it is adjustable) and avoid the definition of CONFIG_SPL_MAX_SIZE? York ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 0/14] dm: omap: Provide access to driver model for am335x, and move boards
This series adjusts the serial and GPIO drivers, used by Beaglebone for example, to work with driver model. Since there are still boards using these drivers but not driver model, this adds new functionality rather than replacing what exists. Several patches tweak and fix the existing driver model serial and GPIO implementation. There are two Beaglebone Black configurations: - Device tree control with verified boot - No device tree control The first uses device tree to select the serial console and provide information needed by the serial driver (similar to how things work on Tegra). The second uses platform data provided by a common board file. Both are converted, so this is a good example of how to support both device tree and platform data if needed. Simon Glass (14): dm: gpio: Support numbered GPIOs dm: serial: Reset the watchdog while waiting in getc() dm: serial: ns16550: Correct logic for checking for character dm: ns16550: Use an address instead of a pointer for the uart base dm: ns16550: Correct the probe logic for platform data dm: serial: Support CONFIG_CONS_INDEX if available dm: dts: omap: Select correct console for beaglebone dm: omap: gpio: Put _get_gpio_value() logic into its own function dm: omap: gpio: Support driver model dm: am33xx: Provide platform data for GPIOs dm: am33xx: Provide platform data for serial dm: omap: serial: Add driver model support dm: am335x: Remove serial options from CONFIG_SYS_EXTRA_OPTIONS dm: am33xx: Move to driver model for GPIO and serial arch/arm/cpu/armv7/am33xx/board.c| 61 +++ arch/arm/dts/am335x-bone-common.dtsi | 4 + arch/arm/include/asm/omap_gpio.h | 19 +- configs/am335x_boneblack_defconfig | 2 +- configs/am335x_boneblack_vboot_defconfig | 2 +- drivers/gpio/gpio-uclass.c | 37 ++-- drivers/gpio/omap_gpio.c | 297 +++ drivers/mmc/omap_hsmmc.c | 15 +- drivers/serial/Makefile | 1 + drivers/serial/ns16550.c | 13 +- drivers/serial/serial-uclass.c | 16 +- drivers/serial/serial_omap.c | 49 + include/configs/ti_am335x_common.h | 11 ++ include/ns16550.h| 2 +- 14 files changed, 465 insertions(+), 64 deletions(-) create mode 100644 drivers/serial/serial_omap.c -- 2.1.0.rc2.206.gedb03e5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] Please pull u-boot-x86.git branch misc
Hi Tom, Here are some minor fixes for sandbox, buildman and patman. The following changes since commit 9170818a4e004af7893fa0113f6e5b4afafded55: kconfiglib: change SPDX-License-Identifier to ISC (2014-09-17 21:03:18 -0400) are available in the git repository at: git://git.denx.de/u-boot-x86.git misc for you to fetch changes up to 983a2749e2fdc459b2f44e82241a5c314ddbcdf6: patman: Add a -m option to avoid copying the maintainers (2014-09-21 12:03:07 -0600) Jagannadha Sutradharudu Teki (1): sandbox: Update minor documentation changes Simon Glass (2): buildman: Fix the logic for the bloat command patman: Add a -m option to avoid copying the maintainers README | 2 +- board/sandbox/README.sandbox | 6 +++--- tools/buildman/control.py| 6 +++--- tools/patman/README | 4 ++-- tools/patman/patman.py | 6 +- tools/patman/series.py | 7 +-- 6 files changed, 19 insertions(+), 12 deletions(-) Regards, Simon ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] powerpc/BSC9132qds: Add mtdparts suppport
Sorry, please ignore this patch. Since version info is missing. Regards Ashish -Original Message- From: Ashish Kumar [mailto:ashish.ku...@freescale.com] Sent: Monday, September 22, 2014 8:06 PM To: u-boot@lists.denx.de Cc: Wood Scott-B07421; Sun York-R58495; Kumar Ashish-B37399 Subject: [PATCH] powerpc/BSC9132qds: Add mtdparts suppport * Use mtdparts to create partitions dynamically rather than using static partitions in device tree Signed-off-by: Ashish Kumar --- include/configs/BSC9132QDS.h | 16 1 files changed, 16 insertions(+), 0 deletions(-) diff --git a/include/configs/BSC9132QDS.h b/include/configs/BSC9132QDS.h index aeded6d..380c9b8 100644 --- a/include/configs/BSC9132QDS.h +++ b/include/configs/BSC9132QDS.h @@ -630,6 +630,22 @@ combinations. this should be removed later #endif /* + * Dynamic MTD Partition support with mtdparts */ #ifndef +CONFIG_SYS_NO_FLASH #define CONFIG_MTD_DEVICE #define +CONFIG_MTD_PARTITIONS #define CONFIG_CMD_MTDPARTS #define +CONFIG_FLASH_CFI_MTD #define MTDIDS_DEFAULT +"nor0=8800.nor,nand0=ff80.flash," \ + "spi0=spiff707000.0" +#define MTDPARTS_DEFAULT "mtdparts=8800.nor:256k(dtb),7m(kernel)," \ + "55m(fs),1m(uboot);ff80.flash:1m(uboot)," \ + "8m(kernel),512k(dtb),-(fs);spiff707000.0:" \ + "1m(uboot),4m(kernel),512k(dtb),8m(fs)" +#endif + +/* * Environment Configuration */ -- 1.7.6.GIT ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] powerpc/BSC9131RDB: Add mtdparts suppport
Sorry Please ignore this patch, since version info is incorrect Regards Ashish -Original Message- From: Ashish Kumar [mailto:ashish.ku...@freescale.com] Sent: Monday, September 22, 2014 8:06 PM To: u-boot@lists.denx.de Cc: Wood Scott-B07421; Sun York-R58495; Kumar Ashish-B37399 Subject: [PATCH] powerpc/BSC9131RDB: Add mtdparts suppport * Use mtdparts to create partitions dynamically rather than using static partitions in device tree Signed-off-by: Ashish Kumar --- include/configs/BSC9131RDB.h | 15 +++ 1 files changed, 15 insertions(+), 0 deletions(-) V2: - Reduce uboot and dtb size in NAND - Remove user partition from NAND and NAND diff --git a/include/configs/BSC9131RDB.h b/include/configs/BSC9131RDB.h index 56a3e94..7cc3fe0 100644 --- a/include/configs/BSC9131RDB.h +++ b/include/configs/BSC9131RDB.h @@ -393,6 +393,21 @@ extern unsigned long get_sdram_size(void); #endif /* + * Dynamic MTD Partition support with mtdparts */ #ifndef +CONFIG_SYS_NO_FLASH #define CONFIG_MTD_DEVICE #define +CONFIG_MTD_PARTITIONS #define CONFIG_CMD_MTDPARTS #define +CONFIG_FLASH_CFI_MTD #define MTDIDS_DEFAULT "nand0=ff80.flash," \ + "spi0=spiff707000.0" +#define MTDPARTS_DEFAULT "mtdparts=ff80.flash:1m(uboot)," \ + "8m(kernel),512k(dtb),-(fs);spiff707000.0:" \ + "1m(uboot),4m(kernel),512k(dtb),11m(fs)" +#endif + +/* * Environment Configuration */ -- 1.7.6.GIT ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] powerpc/BSC9132qds: Add mtdparts suppport
* Use mtdparts to create partitions dynamically rather than using static partitions in device tree Signed-off-by: Ashish Kumar --- include/configs/BSC9132QDS.h | 16 1 files changed, 16 insertions(+), 0 deletions(-) diff --git a/include/configs/BSC9132QDS.h b/include/configs/BSC9132QDS.h index aeded6d..380c9b8 100644 --- a/include/configs/BSC9132QDS.h +++ b/include/configs/BSC9132QDS.h @@ -630,6 +630,22 @@ combinations. this should be removed later #endif /* + * Dynamic MTD Partition support with mtdparts + */ +#ifndef CONFIG_SYS_NO_FLASH +#define CONFIG_MTD_DEVICE +#define CONFIG_MTD_PARTITIONS +#define CONFIG_CMD_MTDPARTS +#define CONFIG_FLASH_CFI_MTD +#define MTDIDS_DEFAULT "nor0=8800.nor,nand0=ff80.flash," \ + "spi0=spiff707000.0" +#define MTDPARTS_DEFAULT "mtdparts=8800.nor:256k(dtb),7m(kernel)," \ + "55m(fs),1m(uboot);ff80.flash:1m(uboot)," \ + "8m(kernel),512k(dtb),-(fs);spiff707000.0:" \ + "1m(uboot),4m(kernel),512k(dtb),8m(fs)" +#endif + +/* * Environment Configuration */ -- 1.7.6.GIT ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] powerpc/BSC9132qds: Add mtdparts suppport
* Use mtdparts to create partitions dynamically rather than using static partitions in device tree Signed-off-by: Ashish Kumar --- include/configs/BSC9132QDS.h | 16 1 files changed, 16 insertions(+), 0 deletions(-) V2: - Reduce uboot and dtb size in NAND - Remove user partition from NAND and SPI - u-boot partition is moved to end incase of NOR diff --git a/include/configs/BSC9132QDS.h b/include/configs/BSC9132QDS.h index aeded6d..380c9b8 100644 --- a/include/configs/BSC9132QDS.h +++ b/include/configs/BSC9132QDS.h @@ -630,6 +630,22 @@ combinations. this should be removed later #endif /* + * Dynamic MTD Partition support with mtdparts + */ +#ifndef CONFIG_SYS_NO_FLASH +#define CONFIG_MTD_DEVICE +#define CONFIG_MTD_PARTITIONS +#define CONFIG_CMD_MTDPARTS +#define CONFIG_FLASH_CFI_MTD +#define MTDIDS_DEFAULT "nor0=8800.nor,nand0=ff80.flash," \ + "spi0=spiff707000.0" +#define MTDPARTS_DEFAULT "mtdparts=8800.nor:256k(dtb),7m(kernel)," \ + "55m(fs),1m(uboot);ff80.flash:1m(uboot)," \ + "8m(kernel),512k(dtb),-(fs);spiff707000.0:" \ + "1m(uboot),4m(kernel),512k(dtb),8m(fs)" +#endif + +/* * Environment Configuration */ -- 1.7.6.GIT ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] powerpc/BSC9131RDB: Add mtdparts suppport
* Use mtdparts to create partitions dynamically rather than using static partitions in device tree Signed-off-by: Ashish Kumar --- include/configs/BSC9131RDB.h | 15 +++ 1 files changed, 15 insertions(+), 0 deletions(-) V2: - Reduce uboot and dtb size in NAND - Remove user partition from NAND and NAND diff --git a/include/configs/BSC9131RDB.h b/include/configs/BSC9131RDB.h index 56a3e94..7cc3fe0 100644 --- a/include/configs/BSC9131RDB.h +++ b/include/configs/BSC9131RDB.h @@ -393,6 +393,21 @@ extern unsigned long get_sdram_size(void); #endif /* + * Dynamic MTD Partition support with mtdparts + */ +#ifndef CONFIG_SYS_NO_FLASH +#define CONFIG_MTD_DEVICE +#define CONFIG_MTD_PARTITIONS +#define CONFIG_CMD_MTDPARTS +#define CONFIG_FLASH_CFI_MTD +#define MTDIDS_DEFAULT "nand0=ff80.flash," \ + "spi0=spiff707000.0" +#define MTDPARTS_DEFAULT "mtdparts=ff80.flash:1m(uboot)," \ + "8m(kernel),512k(dtb),-(fs);spiff707000.0:" \ + "1m(uboot),4m(kernel),512k(dtb),11m(fs)" +#endif + +/* * Environment Configuration */ -- 1.7.6.GIT ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] powerpc/BSC9131RDB: Add mtdparts suppport
* Use mtdparts to create partitions dynamically rather than using static partitions in device tree Signed-off-by: Ashish Kumar --- include/configs/BSC9131RDB.h | 15 +++ 1 files changed, 15 insertions(+), 0 deletions(-) V2: - Reduce uboot and dtb size in NAND - Remove user partition from NAND and SPI diff --git a/include/configs/BSC9131RDB.h b/include/configs/BSC9131RDB.h index 56a3e94..7cc3fe0 100644 --- a/include/configs/BSC9131RDB.h +++ b/include/configs/BSC9131RDB.h @@ -393,6 +393,21 @@ extern unsigned long get_sdram_size(void); #endif /* + * Dynamic MTD Partition support with mtdparts + */ +#ifndef CONFIG_SYS_NO_FLASH +#define CONFIG_MTD_DEVICE +#define CONFIG_MTD_PARTITIONS +#define CONFIG_CMD_MTDPARTS +#define CONFIG_FLASH_CFI_MTD +#define MTDIDS_DEFAULT "nand0=ff80.flash," \ + "spi0=spiff707000.0" +#define MTDPARTS_DEFAULT "mtdparts=ff80.flash:1m(uboot)," \ + "8m(kernel),512k(dtb),-(fs);spiff707000.0:" \ + "1m(uboot),4m(kernel),512k(dtb),11m(fs)" +#endif + +/* * Environment Configuration */ -- 1.7.6.GIT ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [WIP PATCH 1/2] spi: Add Cadence QSPI driver used by SoCFPGA
This driver is copied directly from the Altera Rockerboard.org U-Boot
repository. I used this git tag: ACDS14.0.1_REL_GSRD_RC2. With minimal
changes to enable compilation in mainline U-Boot.
Signed-off-by: Stefan Roese
Cc: Chin Liang See
Cc: Dinh Nguyen
Cc: Vince Bridgers
Cc: Marek Vasut
Cc: Pavel Machek
---
drivers/spi/Makefile | 1 +
drivers/spi/cadence_qspi.c | 355
drivers/spi/cadence_qspi.h | 73
drivers/spi/cadence_qspi_apb.c | 900 +
4 files changed, 1329 insertions(+)
create mode 100644 drivers/spi/cadence_qspi.c
create mode 100644 drivers/spi/cadence_qspi.h
create mode 100644 drivers/spi/cadence_qspi_apb.c
diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile
index f02c35a..4b7b566 100644
--- a/drivers/spi/Makefile
+++ b/drivers/spi/Makefile
@@ -16,6 +16,7 @@ obj-$(CONFIG_ATMEL_DATAFLASH_SPI) += atmel_dataflash_spi.o
obj-$(CONFIG_ATMEL_SPI) += atmel_spi.o
obj-$(CONFIG_BFIN_SPI) += bfin_spi.o
obj-$(CONFIG_BFIN_SPI6XX) += bfin_spi6xx.o
+obj-$(CONFIG_CADENCE_QSPI) += cadence_qspi.o cadence_qspi_apb.o
obj-$(CONFIG_CF_SPI) += cf_spi.o
obj-$(CONFIG_CF_QSPI) += cf_qspi.o
obj-$(CONFIG_DAVINCI_SPI) += davinci_spi.o
diff --git a/drivers/spi/cadence_qspi.c b/drivers/spi/cadence_qspi.c
new file mode 100644
index 000..3228cbe
--- /dev/null
+++ b/drivers/spi/cadence_qspi.c
@@ -0,0 +1,355 @@
+/*
+ * Copyright (C) 2012
+ * Altera Corporation
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include
+#include
+#include
+#include "cadence_qspi.h"
+
+#define CQSPI_STIG_READ0
+#define CQSPI_STIG_WRITE 1
+#define CQSPI_INDIRECT_READ2
+#define CQSPI_INDIRECT_WRITE 3
+
+static int qspi_is_init;
+static unsigned int qspi_calibrated_hz;
+static unsigned int qspi_calibrated_cs;
+
+struct cadence_qspi_slave {
+ struct spi_slave slave;
+ unsigned intmode;
+ unsigned intmax_hz;
+ void*regbase;
+ void*ahbbase;
+ size_t cmd_len;
+ u8 cmd_buf[32];
+ size_t data_len;
+};
+
+#define to_cadence_qspi_slave(s) \
+ container_of(s, struct cadence_qspi_slave, slave)
+
+void spi_set_speed(struct spi_slave *slave, uint hz)
+{
+ struct cadence_qspi_slave *cadence_qspi = to_cadence_qspi_slave(slave);
+ void *base = cadence_qspi->regbase;
+
+ cadence_qspi_apb_config_baudrate_div(base, CONFIG_CQSPI_REF_CLK, hz);
+
+ /* Reconfigure delay timing if speed is changed. */
+ cadence_qspi_apb_delay(base, CONFIG_CQSPI_REF_CLK, hz,
+ CONFIG_CQSPI_TSHSL_NS, CONFIG_CQSPI_TSD2D_NS,
+ CONFIG_CQSPI_TCHSH_NS, CONFIG_CQSPI_TSLCH_NS);
+ return;
+}
+
+struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,
+ unsigned int max_hz, unsigned int mode)
+{
+ struct cadence_qspi_slave *cadence_qspi;
+
+ debug("%s: bus %d cs %d max_hz %dMHz mode %d\n", __func__,
+ bus, cs, max_hz/100, mode);
+
+ if (!spi_cs_is_valid(bus, cs))
+ return NULL;
+
+ cadence_qspi = calloc(sizeof(struct cadence_qspi_slave), 1);
+ if (!cadence_qspi) {
+ printf("QSPI: Can't allocate struct cadence_qspi_slave. "
+ "Bus %d cs %d\n", bus, cs);
+ return NULL;
+ }
+
+ cadence_qspi->slave.bus = bus;
+ cadence_qspi->slave.cs = cs;
+ cadence_qspi->mode = mode;
+ cadence_qspi->max_hz = max_hz;
+ cadence_qspi->regbase = (void *)QSPI_BASE;
+ cadence_qspi->ahbbase = (void *)QSPI_AHB_BASE;
+
+ if (!qspi_is_init)
+ spi_init();
+
+ return &cadence_qspi->slave;
+}
+
+void spi_free_slave(struct spi_slave *slave)
+{
+ struct cadence_qspi_slave *cadence_qspi = to_cadence_qspi_slave(slave);
+ free(cadence_qspi);
+ return;
+}
+
+void spi_init(void)
+{
+ cadence_qspi_apb_controller_init((void *)QSPI_BASE);
+ qspi_is_init = 1;
+ return;
+}
+
+/* calibration sequence to determine the read data capture delay register */
+int spi_calibration(struct spi_s
[U-Boot] [WIP PATCH 0/2] arm: socfpga: Add Cadence QSPI support
Hi SoCFPGA-developers! I'm currently using Marek's latest SoCFPGA port. This works really great so far. Thank you all for this effort. What I need additionally is SPI NOR flash support. So I talked a bit with Marek and tried to port the Cadence QSPI driver to mainline U-Boot (on-top of Marek's patch set of course). This version in these patches now compiles clean. And detecting of the SPI flash also works good. Reading also seems to be okay. Only easing and writing have some problems. Perhaps somebody from Altera with deeper Cadence SPI controller knowledge can take a quick look at this. Could be a pretty obvious mistake that I made while copying / porting the code. Or something else thats simply missing. Any hints are really appretiated! BTW: I'm currently testing this on the EBV SoCrates board. Thanks, Stefan Cc: Chin Liang See Cc: Dinh Nguyen Cc: Vince Bridgers Cc: Marek Vasut Cc: Pavel Machek ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [WIP PATCH 2/2] arm: socfpga: Add Cadence QSPI support to config header
Signed-off-by: Stefan Roese Cc: Chin Liang See Cc: Dinh Nguyen Cc: Vince Bridgers Cc: Marek Vasut Cc: Pavel Machek --- include/configs/socfpga_cyclone5_common.h | 31 +++ 1 file changed, 31 insertions(+) diff --git a/include/configs/socfpga_cyclone5_common.h b/include/configs/socfpga_cyclone5_common.h index 3f8f91f..d183510 100644 --- a/include/configs/socfpga_cyclone5_common.h +++ b/include/configs/socfpga_cyclone5_common.h @@ -142,6 +142,37 @@ #endif /* + * QSPI support + */ +#ifdef CONFIG_CMD_SF +#define CONFIG_CADENCE_QSPI +#define CONFIG_CQSPI_BASE (SOCFPGA_QSPI_ADDRESS) +#define CONFIG_CQSPI_AHB_BASE (SOCFPGA_QSPIDATA_ADDRESS) +#define CONFIG_SPI_FLASH /* SPI flash subsystem */ +#define CONFIG_SPI_FLASH_STMICRO /* Micron/Numonyx flash */ +#define CONFIG_SPI_FLASH_SPANSION /* Spansion flash */ +#define CONFIG_SPI_FLASH_MTD +/* Flash device info */ +#define CONFIG_SF_DEFAULT_SPEED(5000) +#define CONFIG_SF_DEFAULT_MODE SPI_MODE_3 +#define CONFIG_SPI_FLASH_QUAD (1) +/* QSPI reference clock */ +#ifndef __ASSEMBLY__ +unsigned int cm_get_qspi_controller_clk_hz(void); +#define CONFIG_CQSPI_REF_CLK cm_get_qspi_controller_clk_hz() +#endif +/* QSPI page size and block size */ +#define CONFIG_CQSPI_PAGE_SIZE (256) +#define CONFIG_CQSPI_BLOCK_SIZE(16) +/* QSPI Delay timing */ +#define CONFIG_CQSPI_TSHSL_NS (200) +#define CONFIG_CQSPI_TSD2D_NS (255) +#define CONFIG_CQSPI_TCHSH_NS (20) +#define CONFIG_CQSPI_TSLCH_NS (20) +#define CONFIG_CQSPI_DECODER (0) +#endif /* CONFIG_CMD_SF */ + +/* * Serial Driver */ #define CONFIG_SYS_NS16550 -- 2.1.0 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v4] imx: Support i.MX6 High Assurance Boot authentication
Hi Nitin, On 16/09/2014 20:33, Nitin Garg wrote: > When CONFIG_SECURE_BOOT is enabled, the signed images > like kernel and dtb can be authenticated using iMX6 CAAM. > The added command hab_auth_img can be used for HAB > authentication of images. The command takes the image > DDR location, IVT (Image Vector Table) offset inside > image as parameters. Detailed info about signing images > can be found in Freescale AppNote AN4581. > > Signed-off-by: Nitin Garg > > --- > Applied to u-boot-imx, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 2/2] mx25pdk: Add generic board support
On 16/09/2014 16:13, Fabio Estevam wrote: > Let's enable CONFIG_SYS_GENERIC_BOARD in order to get rid of warnings related > to generic board support is not in place. > > Signed-off-by: Fabio Estevam > --- Applied to u-boot-imx, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 1/2] mx25pdk: Fix CONFIG_SYS_FSL_ESDHC_ADDR
On 16/09/2014 16:13, Fabio Estevam wrote: > We should pass the MMC1 base address into CONFIG_SYS_FSL_ESDHC_ADDR. > > Signed-off-by: Fabio Estevam > --- Applied to u-boot-imx, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v4] imx: Support i.MX6 High Assurance Boot authentication
Hi Stefano, On 09/22/2014 09:07 AM, Stefano Babic wrote: > Hi Nitin, > > On 16/09/2014 20:33, Nitin Garg wrote: >> When CONFIG_SECURE_BOOT is enabled, the signed images >> like kernel and dtb can be authenticated using iMX6 CAAM. >> The added command hab_auth_img can be used for HAB >> authentication of images. The command takes the image >> DDR location, IVT (Image Vector Table) offset inside >> image as parameters. Detailed info about signing images >> can be found in Freescale AppNote AN4581. >> >> Signed-off-by: Nitin Garg >> >> --- >> > > I wanted to apply it on current tree, but it seems it depends on > "mx6: clock: Add api to enable pll3". Or better, it seems in your tree > on top the the patch for pll3. It is not an issue and I solve it myself, > but can you confim that or do you prefer that I apply this one only > after the thermal series will be merged ? > > Best regards, > Stefano Babic > > Yes you are correct, in my tree I did HAB patch on top of temperature sensor patch. Pls resolve it or I can help if needed. I do not have any preference with ordering of HAB and temperature patch. Thanks, Nitin Garg ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v3] imx: ddr: Move mx6q_4x_mt41j128.cfg to mx6sabresd board
On 15/09/2014 15:56, nitin.g...@freescale.com wrote: > From: Nitin Garg > > Provide cgtqmx6eval board its own variant of ddr > setup config file. Move board/freescale/imx/ddr/ > mx6q_4x_mt41j128.cfg to board/freescale/mx6sabresd/ > as this is was designed for the mx6sabresd board. > > Signed-off-by: Nitin Garg > > --- Applied to u-boot-imx, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v4] imx: Support i.MX6 High Assurance Boot authentication
Hi Nitin, On 16/09/2014 20:33, Nitin Garg wrote: > When CONFIG_SECURE_BOOT is enabled, the signed images > like kernel and dtb can be authenticated using iMX6 CAAM. > The added command hab_auth_img can be used for HAB > authentication of images. The command takes the image > DDR location, IVT (Image Vector Table) offset inside > image as parameters. Detailed info about signing images > can be found in Freescale AppNote AN4581. > > Signed-off-by: Nitin Garg > > --- > I wanted to apply it on current tree, but it seems it depends on "mx6: clock: Add api to enable pll3". Or better, it seems in your tree on top the the patch for pll3. It is not an issue and I solve it myself, but can you confim that or do you prefer that I apply this one only after the thermal series will be merged ? Best regards, Stefano Babic -- = DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] imx: nitrogen6x: Make use of both uSD and SD slots to load script or kernel on Sabrelite board
On 11/09/2014 11:59, Guillaume GARDET wrote: > Sabrelite board has two solts: 0 is SD3 (bottom) slot and 1 is uSD4 (top) > slot. > This patch makes use of both slots instead of only one. > > Signed-off-by: Guillaume GARDET > Cc: Stefano Babic > Cc: Eric Nelson > > --- Applied to u-boot-imx, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 2/2] mx51evk: Add generic board support
On 17/09/2014 01:03, Fabio Estevam wrote: > From: Fabio Estevam > > Let's enable CONFIG_SYS_GENERIC_BOARD in order to get rid of warnings related > to generic board not being supported. > > Signed-off-by: Fabio Estevam Applied to u-boot-imx, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 1/2] mx51evk: Fix CONFIG_SYS_FSL_ESDHC_ADDR
On 17/09/2014 01:03, Fabio Estevam wrote: > From: Fabio Estevam > > We should pass the SDHC1 base address into CONFIG_SYS_FSL_ESDHC_ADDR. > > Signed-off-by: Fabio Estevam > --- > include/configs/mx51evk.h | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/include/configs/mx51evk.h b/include/configs/mx51evk.h > index b389475..b0d401c 100644 > --- a/include/configs/mx51evk.h > +++ b/include/configs/mx51evk.h > @@ -69,7 +69,7 @@ > * MMC Configs > * */ > #define CONFIG_FSL_ESDHC > -#define CONFIG_SYS_FSL_ESDHC_ADDR0 > +#define CONFIG_SYS_FSL_ESDHC_ADDRMMC_SDHC1_BASE_ADDR > #define CONFIG_SYS_FSL_ESDHC_NUM 2 > > #define CONFIG_MMC > Applied to u-boot-imx, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH V3] ARM: mx6: Add support for Kosagi Novena
Hi Marek,
On 21/09/2014 15:44, Marek Vasut wrote:
> Add support for the Kosagi Novena board. Currently supported are:
> - I2C busses
> - FEC Ethernet
> - MMC0, MMC1, Booting from MMC
> - SATA
> - USB ports
> - USB Ethernet
>
> Signed-off-by: Marek Vasut
> ---
I am getting a lot of warnings from checkpatch. Maybe I am doing
something wrohg here today, can you please check on your side ? Thanks !
For example:
WARNING: please, no spaces at the start of a line
#368: FILE: board/kosagi/novena/novena.c:248:
+ gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;$
WARNING: please, no spaces at the start of a line
#379: FILE: board/kosagi/novena/novena.c:259:
+ puts("Board: Novena 4x\n");$
I get this several times.
I think you can ignore this, better one line that splitting the link on two:
WARNING: line over 80 characters
#1165: FILE: include/configs/novena.h:80:
+ *
http://homepage.ntlworld.com./jonathan.deboynepollard/FGA/disc-partition-alignment.html
Best regards,
Stefano Babic
> arch/arm/Kconfig | 4 +
> board/kosagi/novena/Kconfig | 23 ++
> board/kosagi/novena/Makefile | 11 +
> board/kosagi/novena/novena.c | 348 +
> board/kosagi/novena/novena_spl.c | 529
> +++
> board/kosagi/novena/setup.cfg| 47
> configs/novena_defconfig | 4 +
> include/configs/imx6_spl.h | 2 +-
> include/configs/novena.h | 302 ++
> 9 files changed, 1270 insertions(+), 2 deletions(-)
> create mode 100644 board/kosagi/novena/Kconfig
> create mode 100644 board/kosagi/novena/Makefile
> create mode 100644 board/kosagi/novena/novena.c
> create mode 100644 board/kosagi/novena/novena_spl.c
> create mode 100644 board/kosagi/novena/setup.cfg
> create mode 100644 configs/novena_defconfig
> create mode 100644 include/configs/novena.h
>
> V2: - Drop the tegra_keyboard_init() comment altogether
> - Immediatelly return from the SD controller probe function on failure
> - Rename PFUZE100_PMIC to just PFUZE100
> - Fix the IMX OTP support with CMD_FUSE
> V3: - Zap rootpath builtin env variable
>
> diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
> index 106aed9..4da1923 100644
> --- a/arch/arm/Kconfig
> +++ b/arch/arm/Kconfig
> @@ -411,6 +411,9 @@ config TARGET_GW_VENTANA
> config TARGET_HUMMINGBOARD
> bool "Support hummingboard"
>
> +config TARGET_KOSAGI_NOVENA
> + bool "Support Kosagi Novena"
> +
> config TARGET_TQMA6
> bool "TQ Systems TQMa6 board"
>
> @@ -637,6 +640,7 @@ source "board/imx31_phycore/Kconfig"
> source "board/isee/igep0033/Kconfig"
> source "board/jornada/Kconfig"
> source "board/karo/tx25/Kconfig"
> +source "board/kosagi/novena/Kconfig"
> source "board/logicpd/imx27lite/Kconfig"
> source "board/logicpd/imx31_litekit/Kconfig"
> source "board/mpl/vcma9/Kconfig"
> diff --git a/board/kosagi/novena/Kconfig b/board/kosagi/novena/Kconfig
> new file mode 100644
> index 000..4e52be9
> --- /dev/null
> +++ b/board/kosagi/novena/Kconfig
> @@ -0,0 +1,23 @@
> +if TARGET_KOSAGI_NOVENA
> +
> +config SYS_CPU
> + string
> + default "armv7"
> +
> +config SYS_BOARD
> + string
> + default "novena"
> +
> +config SYS_VENDOR
> + string
> + default "kosagi"
> +
> +config SYS_SOC
> + string
> + default "mx6"
> +
> +config SYS_CONFIG_NAME
> + string
> + default "novena"
> +
> +endif
> diff --git a/board/kosagi/novena/Makefile b/board/kosagi/novena/Makefile
> new file mode 100644
> index 000..f67bbc9
> --- /dev/null
> +++ b/board/kosagi/novena/Makefile
> @@ -0,0 +1,11 @@
> +#
> +# Copyright (C) 2014 Marek Vasut
> +#
> +# SPDX-License-Identifier: GPL-2.0+
> +#
> +
> +ifndef CONFIG_SPL_BUILD
> +obj-y:= novena.o
> +else
> +obj-y:= novena_spl.o
> +endif
> diff --git a/board/kosagi/novena/novena.c b/board/kosagi/novena/novena.c
> new file mode 100644
> index 000..49f5428
> --- /dev/null
> +++ b/board/kosagi/novena/novena.c
> @@ -0,0 +1,348 @@
> +/*
> + * Novena board support
> + *
> + * Copyright (C) 2014 Marek Vasut
> + *
> + * SPDX-License-Identifier: GPL-2.0+
> + */
> +
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +
> +DECLARE_GLOBAL_DATA_PTR;
> +
> +#define NOVENA_BUTTON_GPIO IMX_GPIO_NR(4, 14)
> +#define NOVENA_SD_CD IMX_GPIO_NR(1, 4)
> +#define NOVENA_USB_HUB_RESET IMX_GPIO_NR(7, 12)
> +
> +/*
> + * GPIO button
> + */
> +#ifdef CONFIG_KEYBOARD
> +static struct input_config button_input;
> +
> +static int novena_gpio_button_read_keys(struct input_config *input)
> +{
> + int key = KEY_ENTER;
> + if (gpio_get_value(NOVENA_BUTTON_GPI
Re: [U-Boot] [PATCH] cm_fx6: Remove CONFIG_NETMASK
On 21/09/2014 01:05, Fabio Estevam wrote: > From: Fabio Estevam > > We should not hardcode CONFIG_NETMASK in the config file. > > Signed-off-by: Fabio Estevam > --- Applied to u-boot-imx, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 7/7] ARM: sunxi: Add basic A31 support
On Mon, Sep 22, 2014 at 3:01 AM, Maxime Ripard wrote: > Hi Ian, > > On Sun, Sep 21, 2014 at 07:51:17PM +0100, Ian Campbell wrote: >> On Mon, 2014-09-08 at 21:28 +0800, Chen-Yu Tsai wrote: >> > From: Maxime Ripard >> > >> > Add a new sun6i machine that doesn't do much for now. >> >> Can you briefly outline here what it _does_ do, please. > > When I contributed this patch, it was only having the UART support, > but judging from the rest of the patches Chen-Yu sent, I guess it does > a bit more than that now, especially MMC. Yeah. I'll rewrite the commit message. >> The actual code looks ok to me. There is some possibility we might >> consolidate some of these Kconfig options, or at least move them to the >> sunxi Kconfig. We can cross the bridge when we come to it though. >> >> Any links to some info about the Colombus? Is it the WITS development >> kit which google found for me? > > It is. I'll split out the Colombus defconfig into a separate patch, like we split machine support and board files for the kernel. ChenYu ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 6/7] ARM: sun6i: Setup the A31 UART0 muxing
On Mon, Sep 22, 2014 at 2:10 PM, Michael Trimarchi wrote: > Hi > > Il 08/set/2014 15:36 "Chen-Yu Tsai" ha scritto: > > >> >> From: Maxime Ripard >> >> Signed-off-by: Maxime Ripard >> Signed-off-by: Hans de Goede >> [w...@csie.org: commit message was "ARM: sunxi: Setup the A31 UART0 >> muxing"] >> Signed-off-by: Chen-Yu Tsai >> --- >> arch/arm/cpu/armv7/sunxi/board.c | 4 >> 1 file changed, 4 insertions(+) >> >> diff --git a/arch/arm/cpu/armv7/sunxi/board.c >> b/arch/arm/cpu/armv7/sunxi/board.c >> index f2cedbb..fc6aa4b 100644 >> --- a/arch/arm/cpu/armv7/sunxi/board.c >> +++ b/arch/arm/cpu/armv7/sunxi/board.c >> @@ -54,6 +54,10 @@ int gpio_init(void) >> sunxi_gpio_set_cfgpin(SUNXI_GPB(22), SUN4I_GPB22_UART0_TX); >> sunxi_gpio_set_cfgpin(SUNXI_GPB(23), SUN4I_GPB23_UART0_RX); >> sunxi_gpio_set_pull(SUNXI_GPB(23), 1); >> +#elif CONFIG_CONS_INDEX == 1 && defined(CONFIG_SUN6I) >> + sunxi_gpio_set_cfgpin(SUNXI_GPH(20), 2); >> + sunxi_gpio_set_cfgpin(SUNXI_GPH(21), 2); >> + sunxi_gpio_set_pull(SUNXI_GPH(21), 1); >> #elif CONFIG_CONS_INDEX == 1 && defined(CONFIG_SUN5I) >> sunxi_gpio_set_cfgpin(SUNXI_GPB(19), SUN5I_GPB19_UART0_TX); >> sunxi_gpio_set_cfgpin(SUNXI_GPB(20), SUN5I_GPB20_UART0_RX); >> -- >> 2.1.0 >> > > I don't know if it is correct that every architecture has a specific > function to MUX, but can we define what is 2 2 and 1? Yes they do. I will add them in a patch before this one in v2, and also a separate patch to clean up the existing sunxi_gpio_set_pull calls. ChenYu ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 4/7] ARM: sun6i: Add clock support
On Mon, Sep 22, 2014 at 9:15 PM, Ian Campbell wrote: > On Mon, 2014-09-22 at 20:47 +0800, Chen-Yu Tsai wrote: >> On Mon, Sep 22, 2014 at 2:35 AM, Ian Campbell wrote: >> > On Mon, 2014-09-08 at 21:28 +0800, Chen-Yu Tsai wrote: >> >> + /* Set PLL ldo voltage without this PLL6 does not work properly */ >> > >> > Is "this" here the doing it 3 times bit? If that's deliberate then >> > please say so explicitly. e.g. "Set PLL LDO voltage 3 times, without ... >> > etc"), if it's not deliberate then please fix ;-) >> >> Hans, if you could enlighten us? :) >> >> > I'm assuming this is one of those "no docs, allwinner code did it but >> > nobody knows why it works" scenarios. Of course if the reason is >> > known/doc'd then please add a reference. >> >> I looked at the boot1 sources we recently got. >> >> First it sets PRCM_PLL_CTRL_LDO_KEY to enable write access to the other >> values. >> >> Then it sets PRCM_PLL_CTRL_IN_PWR_HIGH (which is the default) and >> PRCM_PLL_CTRL_LDO_OUT_L(1140) in one call. >> >> Then it busy loops for some time to wait for it to stabilize. > > My guess would be that 3 writes happens to cause enough time to pass > that things have (often!) stabilised, which is certainly not as good as > an explicit waiting busy loop. But as you say lets see what Hans says. FYI I'm dropping this part from the patch, so this discussion is for future reference. :) >> >> + writel(PRCM_PLL_CTRL_LDO_DIGITAL_EN | PRCM_PLL_CTRL_LDO_ANALOG_EN | >> >> + PRCM_PLL_CTRL_EXT_OSC_EN | PRCM_PLL_CTRL_LDO_OUT_L(1140) | >> >> + PRCM_PLL_CTRL_LDO_KEY, &prcm->pll_ctrl1); >> >> + writel(PRCM_PLL_CTRL_LDO_DIGITAL_EN | PRCM_PLL_CTRL_LDO_ANALOG_EN | >> >> + PRCM_PLL_CTRL_EXT_OSC_EN | PRCM_PLL_CTRL_LDO_OUT_L(1140) | >> >> + PRCM_PLL_CTRL_LDO_KEY, &prcm->pll_ctrl1); >> >> + writel(PRCM_PLL_CTRL_LDO_DIGITAL_EN | PRCM_PLL_CTRL_LDO_ANALOG_EN | >> >> + PRCM_PLL_CTRL_EXT_OSC_EN | PRCM_PLL_CTRL_LDO_OUT_L(1140), >> >> + &prcm->pll_ctrl1); >> > [...] ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 4/7] ARM: sun6i: Add clock support
On Mon, 2014-09-22 at 20:47 +0800, Chen-Yu Tsai wrote: > On Mon, Sep 22, 2014 at 2:35 AM, Ian Campbell wrote: > > On Mon, 2014-09-08 at 21:28 +0800, Chen-Yu Tsai wrote: > >> + /* Set PLL ldo voltage without this PLL6 does not work properly */ > > > > Is "this" here the doing it 3 times bit? If that's deliberate then > > please say so explicitly. e.g. "Set PLL LDO voltage 3 times, without ... > > etc"), if it's not deliberate then please fix ;-) > > Hans, if you could enlighten us? :) > > > I'm assuming this is one of those "no docs, allwinner code did it but > > nobody knows why it works" scenarios. Of course if the reason is > > known/doc'd then please add a reference. > > I looked at the boot1 sources we recently got. > > First it sets PRCM_PLL_CTRL_LDO_KEY to enable write access to the other > values. > > Then it sets PRCM_PLL_CTRL_IN_PWR_HIGH (which is the default) and > PRCM_PLL_CTRL_LDO_OUT_L(1140) in one call. > > Then it busy loops for some time to wait for it to stabilize. My guess would be that 3 writes happens to cause enough time to pass that things have (often!) stabilised, which is certainly not as good as an explicit waiting busy loop. But as you say lets see what Hans says. > > >> + writel(PRCM_PLL_CTRL_LDO_DIGITAL_EN | PRCM_PLL_CTRL_LDO_ANALOG_EN | > >> + PRCM_PLL_CTRL_EXT_OSC_EN | PRCM_PLL_CTRL_LDO_OUT_L(1140) | > >> + PRCM_PLL_CTRL_LDO_KEY, &prcm->pll_ctrl1); > >> + writel(PRCM_PLL_CTRL_LDO_DIGITAL_EN | PRCM_PLL_CTRL_LDO_ANALOG_EN | > >> + PRCM_PLL_CTRL_EXT_OSC_EN | PRCM_PLL_CTRL_LDO_OUT_L(1140) | > >> + PRCM_PLL_CTRL_LDO_KEY, &prcm->pll_ctrl1); > >> + writel(PRCM_PLL_CTRL_LDO_DIGITAL_EN | PRCM_PLL_CTRL_LDO_ANALOG_EN | > >> + PRCM_PLL_CTRL_EXT_OSC_EN | PRCM_PLL_CTRL_LDO_OUT_L(1140), > >> + &prcm->pll_ctrl1); > > [...] > > ChenYu > ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] Add support for Congatec Conga-QEVAl board
On Mon, Sep 22, 2014 at 9:08 AM, Hänel-Baas, Alexander < alexander.haenel-b...@sieb-meyer.de> wrote: > Hi, > > my test with u-boot-imx for the congatec board was not successful. > > The congatec u-boot.imx works fine, your u-boot-imx doesn't start or print > anything. > > I've clone the congatec u-boot2013.git, compile it, put it on the sd-card > and modify the boot register(?) with > > > mw.l 0x20d8040 0x3850 > > mw.l 0x020d8044 0x1000 > > reset > > and the board boots the new compiled congatec boot loader, yippee! > > But your u-boot.imx don't start. > > The compile output was: > > ~/u-boot-imx$ ./MAKEALL cgtqmx6qeval > Generating boards.cfg ... (jobs: 4) > 989/1191 [=> ] > WARNING: no status info for 'vf610twr_nand' > WARNING: no maintainers for 'vf610twr_nand' > 1191/1191 [===>] > Building cgtqmx6qeval board... >text databss dechexfilename > 1943578150 218672 421179 66d3b ./u-boot > > - SUMMARY > Boards compiled: 1 > -- > > So it looks good to me, but booting was also good... > > I hope we find a guy to by interested in that and helps me. I have the > board here an can make some test for you. > I added Alex from Congatec in Cc; he might be able to help you. -- Otavio Salvador O.S. Systems http://www.ossystems.com.brhttp://code.ossystems.com.br Mobile: +55 (53) 9981-7854Mobile: +1 (347) 903-9750 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] kconfiglib: change SPDX-License-Identifier to ISC
2014-09-22 13:57 GMT+02:00 Christian Gmeiner : > From: Masahiro Yamada > > Commit f219e01311b2 (tools: Import Kconfiglib) > added SPDX GPL-2.0+ to this library by mistake. > It should be ISC. > > Signed-off-by: Masahiro Yamada > Cc: Ulf Magnusson > Signed-off-by: Christian Gmeiner > --- > > tools/buildman/kconfiglib.py | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/tools/buildman/kconfiglib.py b/tools/buildman/kconfiglib.py > index 31fd3c9..655cf44 100644 > --- a/tools/buildman/kconfiglib.py > +++ b/tools/buildman/kconfiglib.py > @@ -1,5 +1,5 @@ > # > -# SPDX-License-Identifier: GPL-2.0+ > +# SPDX-License-Identifier: ISC > # > # Author: Ulf Magnusson > # https://github.com/ulfalizer/Kconfiglib > -- > 1.9.3 > wooops - ignore this -- Christian Gmeiner, MSc https://soundcloud.com/christian-gmeiner ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 4/7] ARM: sun6i: Add clock support
On Mon, Sep 22, 2014 at 2:35 AM, Ian Campbell wrote: > On Mon, 2014-09-08 at 21:28 +0800, Chen-Yu Tsai wrote: > >> +#ifdef CONFIG_SPL_BUILD > > Since there is no SPL support this is dead code right now, correct? This was part of Hans' attempt to support SPL. It was not finished. > I'm wondering whether we should leave it out of mainline until the SPL > stuff is done, so SPL will be upstreamed all at once. What do others > think? Sounds reasonable. >> + /* Set PLL ldo voltage without this PLL6 does not work properly */ > > Is "this" here the doing it 3 times bit? If that's deliberate then > please say so explicitly. e.g. "Set PLL LDO voltage 3 times, without ... > etc"), if it's not deliberate then please fix ;-) Hans, if you could enlighten us? :) > I'm assuming this is one of those "no docs, allwinner code did it but > nobody knows why it works" scenarios. Of course if the reason is > known/doc'd then please add a reference. I looked at the boot1 sources we recently got. First it sets PRCM_PLL_CTRL_LDO_KEY to enable write access to the other values. Then it sets PRCM_PLL_CTRL_IN_PWR_HIGH (which is the default) and PRCM_PLL_CTRL_LDO_OUT_L(1140) in one call. Then it busy loops for some time to wait for it to stabilize. >> + writel(PRCM_PLL_CTRL_LDO_DIGITAL_EN | PRCM_PLL_CTRL_LDO_ANALOG_EN | >> + PRCM_PLL_CTRL_EXT_OSC_EN | PRCM_PLL_CTRL_LDO_OUT_L(1140) | >> + PRCM_PLL_CTRL_LDO_KEY, &prcm->pll_ctrl1); >> + writel(PRCM_PLL_CTRL_LDO_DIGITAL_EN | PRCM_PLL_CTRL_LDO_ANALOG_EN | >> + PRCM_PLL_CTRL_EXT_OSC_EN | PRCM_PLL_CTRL_LDO_OUT_L(1140) | >> + PRCM_PLL_CTRL_LDO_KEY, &prcm->pll_ctrl1); >> + writel(PRCM_PLL_CTRL_LDO_DIGITAL_EN | PRCM_PLL_CTRL_LDO_ANALOG_EN | >> + PRCM_PLL_CTRL_EXT_OSC_EN | PRCM_PLL_CTRL_LDO_OUT_L(1140), >> + &prcm->pll_ctrl1); > [...] ChenYu ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [U-boot] [Patch 1/5] net: keystone_net: remove SoC specific emac_regs structure
From: Hao Zhang
This patch removes K2HK SOC specifc emac_regs structure, it uses
soc specific register offset to keep the network driver common across
all the Keystone II EVMs.
Signed-off-by: Hao Zhang
Signed-off-by: Ivan Khoronzhuk
---
arch/arm/include/asm/arch-keystone/emac_defs.h | 15 ---
drivers/net/keystone_net.c | 8 +++-
2 files changed, 3 insertions(+), 20 deletions(-)
diff --git a/arch/arm/include/asm/arch-keystone/emac_defs.h
b/arch/arm/include/asm/arch-keystone/emac_defs.h
index 9cd8925..47e0ada 100644
--- a/arch/arm/include/asm/arch-keystone/emac_defs.h
+++ b/arch/arm/include/asm/arch-keystone/emac_defs.h
@@ -202,21 +202,6 @@ struct mdio_regs {
dv_reg userphysel1;
};
-/* Ethernet MAC Registers Structure */
-struct emac_regs {
- dv_reg idver;
- dv_reg maccontrol;
- dv_reg macstatus;
- dv_reg soft_reset;
- dv_reg rx_maxlen;
- u32 rsvd0;
- dv_reg rx_pause;
- dv_reg tx_pause;
- dv_reg emcontrol;
- dv_reg pri_map;
- u32 rsvd1[6];
-};
-
#define SGMII_ACCESS(port, reg) \
*((volatile unsigned int *)(sgmiis[port] + reg))
diff --git a/drivers/net/keystone_net.c b/drivers/net/keystone_net.c
index 66532ee..4abde57 100644
--- a/drivers/net/keystone_net.c
+++ b/drivers/net/keystone_net.c
@@ -45,8 +45,6 @@ static void keystone2_eth_mdio_enable(void);
static int gen_get_link_speed(int phy_addr);
/* EMAC Addresses */
-static volatile struct emac_regs *adap_emac =
- (struct emac_regs *)EMAC_EMACSL_BASE_ADDR;
static volatile struct mdio_regs *adap_mdio =
(struct mdio_regs *)EMAC_MDIO_BASE_ADDR;
@@ -169,10 +167,10 @@ static void __attribute__((unused))
* Check if link detected is giga-bit
* If Gigabit mode detected, enable gigbit in MAC
*/
- writel(readl(&(adap_emac[eth_priv->slave_port - 1].maccontrol)) |
+ writel(readl(DEVICE_EMACSL_BASE(eth_priv->slave_port - 1) +
+CPGMACSL_REG_CTL) |
EMAC_MACCONTROL_GIGFORCE | EMAC_MACCONTROL_GIGABIT_ENABLE,
- &(adap_emac[eth_priv->slave_port - 1].maccontrol))
- ;
+ DEVICE_EMACSL_BASE(eth_priv->slave_port - 1) + CPGMACSL_REG_CTL);
}
int keystone_sgmii_link_status(int port)
--
1.8.3.2
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[U-Boot] [U-boot] [Patch 3/5] net: keystone_net: move header file from arch to ti-common
The header file for the driver should be in correct place.
So move it to "arch/arm/include/asm/ti-common/keystone_net.h"
and correct driver's external dependencies. At the same time
align and correct some definitions.
Signed-off-by: Ivan Khoronzhuk
---
arch/arm/include/asm/arch-keystone/emac_defs.h | 254 -
arch/arm/include/asm/arch-keystone/hardware-k2hk.h | 4 +-
arch/arm/include/asm/arch-keystone/hardware.h | 2 +
arch/arm/include/asm/ti-common/keystone_net.h | 248
board/ti/ks2_evm/board.c | 2 +-
board/ti/ks2_evm/board.h | 2 +-
board/ti/ks2_evm/board_k2hk.c | 2 +-
drivers/net/keystone_net.c | 2 +-
include/configs/k2hk_evm.h | 1 +
include/configs/ks2_evm.h | 4 +
10 files changed, 261 insertions(+), 260 deletions(-)
delete mode 100644 arch/arm/include/asm/arch-keystone/emac_defs.h
create mode 100644 arch/arm/include/asm/ti-common/keystone_net.h
diff --git a/arch/arm/include/asm/arch-keystone/emac_defs.h
b/arch/arm/include/asm/arch-keystone/emac_defs.h
deleted file mode 100644
index 3450246..000
--- a/arch/arm/include/asm/arch-keystone/emac_defs.h
+++ /dev/null
@@ -1,254 +0,0 @@
-/*
- * emac definitions for keystone2 devices
- *
- * (C) Copyright 2012-2014
- * Texas Instruments Incorporated,
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#ifndef _EMAC_DEFS_H_
-#define _EMAC_DEFS_H_
-
-#include
-#include
-
-/* EMAC */
-#ifdef KS2_NETCP_V1_0
-
-#define EMAC_EMACSL_BASE_ADDR (KS2_PASS_BASE + 0x00090900)
-#define EMAC_MDIO_BASE_ADDR (KS2_PASS_BASE + 0x00090300)
-#define EMAC_SGMII_BASE_ADDR(KS2_PASS_BASE + 0x00090100)
-#define DEVICE_EMACSL_BASE(x) (EMAC_EMACSL_BASE_ADDR + (x)*0x040)
-
-/* Register offsets */
-#define CPGMACSL_REG_CTL 0x04
-#define CPGMACSL_REG_STATUS0x08
-#define CPGMACSL_REG_RESET 0x0c
-#define CPGMACSL_REG_MAXLEN0x10
-
-#elif defined KS2_NETCP_V1_5
-
-#define CPGMACSL_REG_RX_PRI_MAP0x020
-#define EMAC_EMACSL_BASE_ADDR (KS2_PASS_BASE + 0x00222000)
-#define EMAC_MDIO_BASE_ADDR (KS2_PASS_BASE + 0x00200f00)
-#define EMAC_SGMII_BASE_ADDR(KS2_PASS_BASE + 0x00200100)
-#define DEVICE_EMACSL_BASE(x) (EMAC_EMACSL_BASE_ADDR + (x) * 0x1000)
-
-/* Register offsets */
-#define CPGMACSL_REG_CTL 0x330
-#define CPGMACSL_REG_STATUS0x334
-#define CPGMACSL_REG_RESET 0x338
-#define CPGMACSL_REG_MAXLEN0x024
-
-#endif
-
-#define KEYSTONE2_EMAC_GIG_ENABLE
-
-#define MAC_ID_BASE_ADDR(KS2_DEVICE_STATE_CTRL_BASE + 0x110)
-
-/* MDIO module input frequency */
-#define EMAC_MDIO_BUS_FREQ (clk_get_rate(pass_pll_clk))
-/* MDIO clock output frequency */
-#define EMAC_MDIO_CLOCK_FREQ100/* 1.0 MHz */
-
-/* MII Status Register */
-#define MII_STATUS_REG 1
-#define MII_STATUS_LINK_MASK(0x4)
-
-/* Marvell 88E PHY ID */
-#define PHY_MARVELL_88E (0x01410cc0)
-
-#define MDIO_CONTROL_IDLE (0x8000)
-#define MDIO_CONTROL_ENABLE (0x4000)
-#define MDIO_CONTROL_FAULT_ENABLE (0x4)
-#define MDIO_CONTROL_FAULT (0x8)
-#define MDIO_USERACCESS0_GO (0x8000)
-#define MDIO_USERACCESS0_WRITE_READ (0x0)
-#define MDIO_USERACCESS0_WRITE_WRITE(0x4000)
-#define MDIO_USERACCESS0_ACK(0x2000)
-
-#define EMAC_MACCONTROL_MIIEN_ENABLE (0x20)
-#define EMAC_MACCONTROL_FULLDUPLEX_ENABLE (0x1)
-#define EMAC_MACCONTROL_GIGABIT_ENABLE (1 << 7)
-#define EMAC_MACCONTROL_GIGFORCE (1 << 17)
-#define EMAC_MACCONTROL_RMIISPEED_100 (1 << 15)
-
-#define EMAC_MIN_ETHERNET_PKT_SIZE 60
-
-struct mac_sl_cfg {
- u_int32_t max_rx_len; /* Maximum receive packet length. */
- u_int32_t ctl; /* Control bitfield */
-};
-
-/*
- * Definition: Control bitfields used in the ctl field of hwGmacSlCfg_t
- */
-#define GMACSL_RX_ENABLE_RCV_CONTROL_FRAMES (1 << 24)
-#define GMACSL_RX_ENABLE_RCV_SHORT_FRAMES (1 << 23)
-#define GMACSL_RX_ENABLE_RCV_ERROR_FRAMES (1 << 22)
-#define GMACSL_RX_ENABLE_EXT_CTL (1 << 18)
-#define GMACSL_RX_ENABLE_GIG_FORCE(1 << 17)
-#define GMACSL_RX_ENABLE_IFCTL_B (1 << 16)
-#define GMACSL_RX_ENABLE_IFCTL_A (1 << 15)
-#define GMACSL_RX_ENABLE_CMD_IDLE (1 << 11)
-#define GMACSL_TX_ENABLE_SHORT_GAP(1 << 10)
-#define GMACSL_ENABLE_GIG_MODE(1 << 7)
-#define GMACSL_TX_ENABLE_PACE (1 << 6)
-#define GMACSL_ENABLE (1 << 5)
-#define GMACSL_TX_ENABLE_FLOW_CTL (1
[U-Boot] [U-boot] [Patch 2/5] net: keystone_net: add support for NETCP v1.5
Currently the network driver is used only by k2hk evm board.
The k2hk SoC contains NETCP v1.0, but Keystone2 SoCs, like k2e can
contain NETCP v1.5. So driver should be able to work with such kind
of NETCP. This commit adds this opportunity. The main difference in
masks and some registers, the logic is the same, so only definitions
should be changed. To differentiate between versions add KS2_NETCP_V1_0
and KS2_NETCP_V1_5. Also remove unused and no more needed defines.
The port number is specific for each board so move this parameter to
configuration.
Signed-off-by: Hao Zhang
Signed-off-by: Ivan Khoronzhuk
---
arch/arm/include/asm/arch-keystone/emac_defs.h | 156 +
arch/arm/include/asm/arch-keystone/hardware-k2hk.h | 3 +
include/configs/k2hk_evm.h | 1 +
3 files changed, 98 insertions(+), 62 deletions(-)
diff --git a/arch/arm/include/asm/arch-keystone/emac_defs.h
b/arch/arm/include/asm/arch-keystone/emac_defs.h
index 47e0ada..3450246 100644
--- a/arch/arm/include/asm/arch-keystone/emac_defs.h
+++ b/arch/arm/include/asm/arch-keystone/emac_defs.h
@@ -13,20 +13,44 @@
#include
#include
+/* EMAC */
+#ifdef KS2_NETCP_V1_0
+
#define EMAC_EMACSL_BASE_ADDR (KS2_PASS_BASE + 0x00090900)
#define EMAC_MDIO_BASE_ADDR (KS2_PASS_BASE + 0x00090300)
#define EMAC_SGMII_BASE_ADDR(KS2_PASS_BASE + 0x00090100)
+#define DEVICE_EMACSL_BASE(x) (EMAC_EMACSL_BASE_ADDR + (x)*0x040)
+
+/* Register offsets */
+#define CPGMACSL_REG_CTL 0x04
+#define CPGMACSL_REG_STATUS0x08
+#define CPGMACSL_REG_RESET 0x0c
+#define CPGMACSL_REG_MAXLEN0x10
+
+#elif defined KS2_NETCP_V1_5
+
+#define CPGMACSL_REG_RX_PRI_MAP0x020
+#define EMAC_EMACSL_BASE_ADDR (KS2_PASS_BASE + 0x00222000)
+#define EMAC_MDIO_BASE_ADDR (KS2_PASS_BASE + 0x00200f00)
+#define EMAC_SGMII_BASE_ADDR(KS2_PASS_BASE + 0x00200100)
+#define DEVICE_EMACSL_BASE(x) (EMAC_EMACSL_BASE_ADDR + (x) * 0x1000)
+
+/* Register offsets */
+#define CPGMACSL_REG_CTL 0x330
+#define CPGMACSL_REG_STATUS0x334
+#define CPGMACSL_REG_RESET 0x338
+#define CPGMACSL_REG_MAXLEN0x024
+
+#endif
#define KEYSTONE2_EMAC_GIG_ENABLE
#define MAC_ID_BASE_ADDR(KS2_DEVICE_STATE_CTRL_BASE + 0x110)
-#ifdef CONFIG_SOC_K2HK
/* MDIO module input frequency */
#define EMAC_MDIO_BUS_FREQ (clk_get_rate(pass_pll_clk))
/* MDIO clock output frequency */
#define EMAC_MDIO_CLOCK_FREQ100/* 1.0 MHz */
-#endif
/* MII Status Register */
#define MII_STATUS_REG 1
@@ -86,17 +110,8 @@ struct mac_sl_cfg {
#define GMACSL_RET_WARN_MAXLEN_TOO_BIG -3
#define GMACSL_RET_CONFIG_FAIL_RESET_ACTIVE -4
-/* Register offsets */
-#define CPGMACSL_REG_ID 0x00
-#define CPGMACSL_REG_CTL0x04
-#define CPGMACSL_REG_STATUS 0x08
-#define CPGMACSL_REG_RESET 0x0c
-#define CPGMACSL_REG_MAXLEN 0x10
-#define CPGMACSL_REG_BOFF 0x14
-#define CPGMACSL_REG_RX_PAUSE 0x18
-#define CPGMACSL_REG_TX_PAURSE 0x1c
-#define CPGMACSL_REG_EM_CTL 0x20
-#define CPGMACSL_REG_PRI0x24
+/* EMAC SL register definitions */
+#define DEVICE_EMACSL_RESET_POLL_COUNT 100
/* Soft reset register values */
#define CPGMAC_REG_RESET_VAL_RESET_MASK (1 << 0)
@@ -105,6 +120,7 @@ struct mac_sl_cfg {
/* Maxlen register values */
#define CPGMAC_REG_MAXLEN_LEN0x3fff
+/* CPSW */
/* Control bitfields */
#define CPSW_CTL_P2_PASS_PRI_TAGGED (1 << 5)
#define CPSW_CTL_P1_PASS_PRI_TAGGED (1 << 4)
@@ -113,24 +129,39 @@ struct mac_sl_cfg {
#define CPSW_CTL_VLAN_AWARE (1 << 1)
#define CPSW_CTL_FIFO_LOOPBACK (1 << 0)
-#define DEVICE_CPSW_NUM_PORTS 5/* 5 switch ports */
-#define DEVICE_CPSW_BASE(0x02090800)
-#define target_get_switch_ctl() CPSW_CTL_P0_ENABLE /* Enable port 0 */
-#define SWITCH_MAX_PKT_SIZE 9000
+#define DEVICE_CPSW_NUM_PORTS CONFIG_KSNET_CPSW_NUM_PORTS
+#define DEVICE_N_GMACSL_PORTS (DEVICE_CPSW_NUM_PORTS - 1)
+
+#ifdef KS2_NETCP_V1_0
+
+#define DEVICE_CPSW_BASE (KS2_PASS_BASE + 0x00090800)
+#define CPSW_REG_CTL 0x004
+#define CPSW_REG_STAT_PORT_EN 0x00c
+#define CPSW_REG_MAXLEN0x040
+#define CPSW_REG_ALE_CONTROL 0x608
+#define CPSW_REG_ALE_PORTCTL(x)(0x640 + (x)*4)
+#define CPSW_REG_VAL_STAT_ENABLE_ALL 0xf
+
+#elif defined KS2_NETCP_V1_5
+
+#define DEVICE_CPSW_BASE(KS2_PASS_BASE + 0x0022)
+#define CPSW_REG_CTL0x4
+#define CPSW_REG_STAT_PORT_EN 0x00014
+#define CPSW_REG_MAXLEN 0x01024
+#define CPSW_REG_ALE_CONTROL0x1e008
+#define CPSW_REG_ALE_PORTCTL(x)
[U-Boot] [U-boot] [Patch 0/5] keystone2: generalize keystone_net driver usage
This series generalize keystone_net driver usage in order to add keystone2 K2E/K2L SoCs support. Based on "[U-boot] [Patch v2] keystone: usb: add support of usb xhci" https://patchwork.ozlabs.org/patch/386506/ Hao Zhang (1): net: keystone_net: remove SoC specific emac_regs structure Ivan Khoronzhuk (3): net: keystone_net: add support for NETCP v1.5 net: keystone_net: move header file from arch to ti-common net: keystone_net: remove redundant code from keystone_net.c Vitaly Andrianov (1): net: keystone_net: increase MDIO clock frequency arch/arm/include/asm/arch-keystone/emac_defs.h | 237 arch/arm/include/asm/arch-keystone/hardware-k2hk.h | 3 + arch/arm/include/asm/arch-keystone/hardware.h | 2 + arch/arm/include/asm/ti-common/keystone_net.h | 248 + board/ti/ks2_evm/board.c | 11 +- board/ti/ks2_evm/board.h | 2 +- board/ti/ks2_evm/board_k2hk.c | 2 +- drivers/net/keystone_net.c | 29 +-- include/configs/k2hk_evm.h | 2 + include/configs/ks2_evm.h | 4 + 10 files changed, 276 insertions(+), 264 deletions(-) delete mode 100644 arch/arm/include/asm/arch-keystone/emac_defs.h create mode 100644 arch/arm/include/asm/ti-common/keystone_net.h -- 1.8.3.2 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [U-boot] [Patch 5/5] net: keystone_net: remove redundant code from keystone_net.c
Remove unused tx_send_loop variable.
Removes duplicated get_link_status() call from the
keystone2_eth_send_packet().
The emac_gigabit_enable() is called at opening Ethernet and there is no
need to enable it on sending each packet. So remove that call
from keystone2_eth_send_packet() as well.
The calling of power/clock up functions are mostly the responsibility
of SoC/board code, so move these functions to appropriate place.
Signed-off-by: Ivan Khoronzhuk
---
board/ti/ks2_evm/board.c | 9 +
drivers/net/keystone_net.c | 19 +--
2 files changed, 10 insertions(+), 18 deletions(-)
diff --git a/board/ti/ks2_evm/board.c b/board/ti/ks2_evm/board.c
index f9d5f90..cdfca23 100644
--- a/board/ti/ks2_evm/board.c
+++ b/board/ti/ks2_evm/board.c
@@ -12,6 +12,7 @@
#include
#include
#include
+#include
#include
#include
@@ -68,6 +69,14 @@ int board_eth_init(bd_t *bis)
int port_num;
char link_type_name[32];
+ /* By default, select PA PLL clock as PA clock source */
+ if (psc_enable_module(KS2_LPSC_PA))
+ return -1;
+ if (psc_enable_module(KS2_LPSC_CPGMAC))
+ return -1;
+ if (psc_enable_module(KS2_LPSC_CRYPTO))
+ return -1;
+
port_num = get_num_eth_ports();
for (j = 0; j < port_num; j++) {
diff --git a/drivers/net/keystone_net.c b/drivers/net/keystone_net.c
index edd2bb0..730a721 100644
--- a/drivers/net/keystone_net.c
+++ b/drivers/net/keystone_net.c
@@ -12,12 +12,9 @@
#include
#include
#include
-#include
#include
#include
-unsigned int emac_dbg;
-
unsigned int emac_open;
static unsigned int sys_has_mdio = 1;
@@ -409,10 +406,7 @@ static int keystone2_eth_open(struct eth_device *dev, bd_t
*bis)
sys_has_mdio =
(eth_priv->sgmii_link_type == SGMII_LINK_MAC_PHY) ? 1 : 0;
- psc_enable_module(KS2_LPSC_PA);
- psc_enable_module(KS2_LPSC_CPGMAC);
-
- sgmii_serdes_setup_156p25mhz();
+ keystone2_net_serdes_sgmii_setup();
if (sys_has_mdio)
keystone2_eth_mdio_enable();
@@ -490,8 +484,6 @@ void keystone2_eth_close(struct eth_device *dev)
debug("- emac_close\n");
}
-static int tx_send_loop;
-
/*
* This function sends a single packet on the network and returns
* positive number (number of bytes transmitted) or negative for error
@@ -502,21 +494,12 @@ static int keystone2_eth_send_packet(struct eth_device
*dev,
int ret_status = -1;
struct eth_priv_t *eth_priv = (struct eth_priv_t *)dev->priv;
- tx_send_loop = 0;
-
if (keystone_get_link_status(dev) == 0)
return -1;
- emac_gigabit_enable(dev);
-
if (cpmac_drv_send((u32 *)packet, length, eth_priv->slave_port) != 0)
return ret_status;
- if (keystone_get_link_status(dev) == 0)
- return -1;
-
- emac_gigabit_enable(dev);
-
return length;
}
--
1.8.3.2
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[U-Boot] [U-boot] [Patch 4/5] net: keystone_net: increase MDIO clock frequency
From: Vitaly Andrianov With MAC_PHY sgmii configuration, u-boot checks PHY link status before sending each packet. Increasing MDIO frequency increases overall tftp speed. We set it to maximum 2.5MHz. Signed-off-by: Vitaly Andrianov Signed-off-by: Ivan Khoronzhuk --- arch/arm/include/asm/ti-common/keystone_net.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/include/asm/ti-common/keystone_net.h b/arch/arm/include/asm/ti-common/keystone_net.h index 7769d7b..e56759d 100644 --- a/arch/arm/include/asm/ti-common/keystone_net.h +++ b/arch/arm/include/asm/ti-common/keystone_net.h @@ -51,7 +51,7 @@ /* MDIO module input frequency */ #define EMAC_MDIO_BUS_FREQ (clk_get_rate(pass_pll_clk)) /* MDIO clock output frequency */ -#define EMAC_MDIO_CLOCK_FREQ 100/* 1.0 MHz */ +#define EMAC_MDIO_CLOCK_FREQ 250 /* 2.5 MHz */ /* MII Status Register */ #define MII_STATUS_REG 1 -- 1.8.3.2 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] Add support for Congatec Conga-QEVAl board
Hi, my test with u-boot-imx for the congatec board was not successful. The congatec u-boot.imx works fine, your u-boot-imx doesn't start or print anything. I've clone the congatec u-boot2013.git, compile it, put it on the sd-card and modify the boot register(?) with > mw.l 0x20d8040 0x3850 > mw.l 0x020d8044 0x1000 > reset and the board boots the new compiled congatec boot loader, yippee! But your u-boot.imx don't start. The compile output was: ~/u-boot-imx$ ./MAKEALL cgtqmx6qeval Generating boards.cfg ... (jobs: 4) 989/1191 [=> ] WARNING: no status info for 'vf610twr_nand' WARNING: no maintainers for 'vf610twr_nand' 1191/1191 [===>] Building cgtqmx6qeval board... text databss dechexfilename 1943578150 218672 421179 66d3b ./u-boot - SUMMARY Boards compiled: 1 -- So it looks good to me, but booting was also good... I hope we find a guy to by interested in that and helps me. I have the board here an can make some test for you. With best regards, Alexander Hänel-Baas ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 31/51] fpga: altera: Make altera_validate return normal values
On Monday, September 22, 2014 at 11:16:04 AM, Pavel Machek wrote:
> On Sun 2014-09-21 15:12:12, Marek Vasut wrote:
> > Make the function return either 0 or -EINVAL, that is, normal
> > expected error codes and success codes instead of true/false
> > nonsense.
> >
> > Signed-off-by: Marek Vasut
> > Cc: Chin Liang See
> > Cc: Dinh Nguyen
> > Cc: Albert Aribaud
> > Cc: Tom Rini
> > Cc: Wolfgang Denk
>
> Acked-by: Pavel Machek
>
> > @@ -133,7 +133,7 @@ int altera_info(Altera_desc *desc)
> >
> > {
> >
> > int ret_val = FPGA_FAIL;
> >
> > - if (!altera_validate (desc, (char *)__func__)) {
> > + if (altera_validate (desc, (char *)__func__)) {
>
> + if (altera_validate(desc, (char *)__func__)) {
>
> You have extra space there, checkpatch would be angry.
I'm sure it will, but this was resolved somewhere down the patch stack. The
final result doesn't have this warning.
Best regards,
Marek Vasut
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Re: [U-Boot] [PATCH fix for v2014.10 2/5] usb: kbd: On a "usb reset" call usb_kbd_deregister() before calling usb_stop()
On Saturday, September 20, 2014 at 04:54:35 PM, Hans de Goede wrote:
> We need to call usb_kbd_deregister() before calling usb_stop().
>
> usbkbd's stdio_dev->priv points to the usb_device, and usb_kbd_testc
> dereferences usb_device->privptr.
>
> usb_stop zeros usb_device, leaving usb_device->privptr NULL, causing
> bad things (tm) to happen once control returns to the main loop and
> usb_kbd_testc gets called.
>
> Calling usb_kbd_deregister() avoids this. Note that we do not allow
> the "usb reset" to continue when the deregister fails. This will be fixed
> in a later patch.
>
> For the same reasons always fail "usb stop" if the usb_kbd_deregister()
> fails, even in the force path. This can happen when
> CONFIG_SYS_STDIO_DEREGISTER is not set.
>
> Signed-off-by: Hans de Goede
> ---
> common/cmd_usb.c | 27 +++
> 1 file changed, 15 insertions(+), 12 deletions(-)
>
> diff --git a/common/cmd_usb.c b/common/cmd_usb.c
> index 2519497..b2aa44c 100644
> --- a/common/cmd_usb.c
> +++ b/common/cmd_usb.c
> @@ -430,6 +430,16 @@ static int do_usbboot(cmd_tbl_t *cmdtp, int flag, int
> argc, char * const argv[]) }
> #endif /* CONFIG_USB_STORAGE */
>
> +static int do_usb_stop_keyboard(void)
> +{
> +#ifdef CONFIG_USB_KEYBOARD
> + if (usb_kbd_deregister() != 0) {
> + printf("USB not stopped: usbkbd still using USB\n");
I tried this set of patches with the DWC2 driver on RPI just now and i get this
message and 'usb start' fails and doesn't scan bus. I suspect we have a problem
here, can you check and post a fix ?
Best regards,
Marek Vasut
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Re: [U-Boot] [PATCH 1/3] usb: dwc2: Add driver for Synopsis DWC2 USB IP block
On Monday, September 22, 2014 at 11:40:36 AM, Pavel Machek wrote:
[...]
> > index c4f5157..c9d2ed5 100644
> > --- a/drivers/usb/host/Makefile
> > +++ b/drivers/usb/host/Makefile
> > @@ -45,3 +45,6 @@ obj-$(CONFIG_USB_EHCI_ZYNQ) += ehci-zynq.o
> >
> > obj-$(CONFIG_USB_XHCI) += xhci.o xhci-mem.o xhci-ring.o
> > obj-$(CONFIG_USB_XHCI_EXYNOS) += xhci-exynos5.o
> > obj-$(CONFIG_USB_XHCI_OMAP) += xhci-omap.o
> >
> > +
> > +# designware
> > +obj-$(CONFIG_USB_DWC2) += dwc2.o
>
> Should this be sorted somehow?
It kind-of is . I don't want exotic goop like this among the standard
interfaces
(*HCI) , so this goes at the bottom.
> > +/**
> > + * Initializes the FSLSPClkSel field of the HCFG register
> > + * depending on the PHY type.
> > + */
> > +static void init_fslspclksel(struct dwc2_core_regs *regs)
> > +{
> > + uint32_t phyclk;
> > +#ifdef CONFIG_DWC2_ULPI_FS_LS
>
> Having more readable names for config options would be nice.
It means your ULPI PHY is FL/LS only, how would you make it more readable?
Also,
it should match the option name of original DWC2 driver so it's easier to look
up the details. On the other hand, noone should ever need to dive into toggling
these config options here, all of the implementations of the DWC2 core known to
me (I think I own all of the available devices with DWC2 core) work with the
default settings.
> > + uint32_t hwcfg2 = readl(®s->ghwcfg2);
> > + uint32_t hval = (ghwcfg2 & DWC2_HWCFG2_HS_PHY_TYPE_MASK) >>
> > + DWC2_HWCFG2_HS_PHY_TYPE_OFFSET;
> > + uint32_t fval = (ghwcfg2 & DWC2_HWCFG2_FS_PHY_TYPE_MASK) >>
> > + DWC2_HWCFG2_FS_PHY_TYPE_OFFSET;
> > +
> > + if ((hval == 2) && (fval == 1))
> > + phyclk = DWC2_HCFG_FSLSPCLKSEL_48_MHZ; /* Full speed PHY */
> > + else
> > +#endif
>
> Ifdef ending in "else" is evil.
OK, I guess I can "swap" those two ifdefs and drop the else. The logic of the
code won't change and the else would disappear.
> > + /* Wait for 3 PHY Clocks */
> > + udelay(1);
>
> Note this.
What about it ?
> > +/**
> > + * Do core a soft reset of the core. Be careful with this because it
> > + * resets all the internal state machines of the core.
> > + */
>
> This is not valid kerneldoc -> should not use /** style.
>
> > + /* Wait for 3 PHY Clocks */
> > + mdelay(100);
>
> Recall it. There's big difference between 1usec and 100msec, which is
> it?
Comment re-aligned with docs.
[...]
> > + case (USB_REQ_SET_FEATURE << 8) | USB_DIR_OUT | USB_RECIP_OTHER |
> > USB_TYPE_CLASS: + switch (wValue) {
> > + case USB_PORT_FEAT_SUSPEND:
> > + break;
> > +
> > + case USB_PORT_FEAT_RESET:
> > + clrsetbits_le32(®s->hprt0, DWC2_HPRT0_PRTENA |
> > + DWC2_HPRT0_PRTCONNDET |
> > + DWC2_HPRT0_PRTENCHNG |
> > + DWC2_HPRT0_PRTOVRCURRCHNG,
> > + DWC2_HPRT0_PRTRST);
> > + mdelay(50);
> > + clrbits_le32(®s->hprt0, DWC2_HPRT0_PRTRST);
> > + break;
> > +
> > + case USB_PORT_FEAT_POWER:
> > + clrsetbits_le32(®s->hprt0, DWC2_HPRT0_PRTENA |
> > + DWC2_HPRT0_PRTCONNDET |
> > + DWC2_HPRT0_PRTENCHNG |
> > + DWC2_HPRT0_PRTOVRCURRCHNG,
> > + DWC2_HPRT0_PRTRST);
> > + break;
> > +
> > + case USB_PORT_FEAT_ENABLE:
> > + break;
> > + }
> > + break;
>
> This is getting bit. Would it be feasible to split it into functions?
Yeah.
> > + case (USB_REQ_GET_DESCRIPTOR << 8) | USB_DIR_IN | USB_TYPE_CLASS:
> > + {
> > + __u32 temp = 0x0001;
>
> temp is never writtenn to. Can you just write 1 instead of it?
I added a comment. This is the root port config, so it should be tweakable
in case there is some mutated DWC2 core.
> > + data[0] = 9;/* min length; */
> > + data[1] = 0x29;
> > + data[2] = temp & RH_A_NDP;
> > + data[3] = 0;
> > + if (temp & RH_A_PSM)
> > + data[3] |= 0x1;
> > + if (temp & RH_A_NOCP)
> > + data[3] |= 0x10;
> > + else if (temp & RH_A_OCPM)
> > + data[3] |= 0x8;
> > +
> > + /* corresponds to data[4-7] */
> > + data[5] = (temp & RH_A_POTPGT) >> 24;
> > + data[7] = temp & RH_B_DR;
> > + if (data[2] < 7) {
> > + data[8] = 0xff;
> > + } else {
>
> Thus data[2] is always <2. What is going on here?
It is assembling the data packet ? data[2] is < 2 always only on currently
known hardware. And I will _not_ be hunting down every single such bit once
the new hardware with more root ports comes out.
>
[U-Boot] [PATCH] imx6: add Bachmann OT1200 board v2
This patch adds support for the OT1200 series of devices. Following components are used in u-boot: + ethernet + i2c + emmc + gpio For more details see README. Changes v1 > v2 - make use of enable_cspi_clock(..) - fix usage of OUTPUT_40OHM define - added README Signed-off-by: Christian Gmeiner --- arch/arm/Kconfig | 4 + board/bachmann/ot1200/Kconfig | 23 board/bachmann/ot1200/MAINTAINERS | 6 + board/bachmann/ot1200/Makefile| 9 ++ board/bachmann/ot1200/README | 20 +++ board/bachmann/ot1200/ot1200.c| 251 ++ configs/ot1200_defconfig | 3 + include/configs/ot1200.h | 196 + 8 files changed, 512 insertions(+) create mode 100644 board/bachmann/ot1200/Kconfig create mode 100644 board/bachmann/ot1200/MAINTAINERS create mode 100644 board/bachmann/ot1200/Makefile create mode 100644 board/bachmann/ot1200/README create mode 100644 board/bachmann/ot1200/ot1200.c create mode 100644 configs/ot1200_defconfig create mode 100644 include/configs/ot1200.h diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 106aed9..8face21 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -414,6 +414,9 @@ config TARGET_HUMMINGBOARD config TARGET_TQMA6 bool "TQ Systems TQMa6 board" +config TARGET_OT1200 + bool "Bachmann OT1200" + config OMAP34XX bool "OMAP34XX SoC" @@ -577,6 +580,7 @@ source "board/atmel/at91sam9rlek/Kconfig" source "board/atmel/at91sam9x5ek/Kconfig" source "board/atmel/sama5d3_xplained/Kconfig" source "board/atmel/sama5d3xek/Kconfig" +source "board/bachmann/ot1200/Kconfig" source "board/balloon3/Kconfig" source "board/barco/titanium/Kconfig" source "board/bluegiga/apx4devkit/Kconfig" diff --git a/board/bachmann/ot1200/Kconfig b/board/bachmann/ot1200/Kconfig new file mode 100644 index 000..55a825d --- /dev/null +++ b/board/bachmann/ot1200/Kconfig @@ -0,0 +1,23 @@ +if TARGET_OT1200 + +config SYS_CPU + string + default "armv7" + +config SYS_BOARD + string + default "ot1200" + +config SYS_VENDOR + string + default "bachmann" + +config SYS_SOC + string + default "mx6" + +config SYS_CONFIG_NAME + string + default "ot1200" + +endif diff --git a/board/bachmann/ot1200/MAINTAINERS b/board/bachmann/ot1200/MAINTAINERS new file mode 100644 index 000..ad75c24 --- /dev/null +++ b/board/bachmann/ot1200/MAINTAINERS @@ -0,0 +1,6 @@ +BACHMANN ELECTRONIC OT1200 BOARD +M: Christian Gmeiner +S: Maintained +F: board/bachmann/ot1200 +F: include/configs/ot1200.h +F: configs/ot1200*_defconfig diff --git a/board/bachmann/ot1200/Makefile b/board/bachmann/ot1200/Makefile new file mode 100644 index 000..1bd42e8 --- /dev/null +++ b/board/bachmann/ot1200/Makefile @@ -0,0 +1,9 @@ +# +# Copyright (C) 2012-2013, Guennadi Liakhovetski +# (C) Copyright 2012-2013 Freescale Semiconductor, Inc. +# Copyright (C) 2013, Boundary Devices +# +# SPDX-License-Identifier: GPL-2.0+ +# + +obj-y := ot1200.o diff --git a/board/bachmann/ot1200/README b/board/bachmann/ot1200/README new file mode 100644 index 000..efcff11 --- /dev/null +++ b/board/bachmann/ot1200/README @@ -0,0 +1,20 @@ +U-Boot for the Bachmann electronic GmbH OT1200 devices + +There are two different versions of the base print, which differ +in the way ethernet is done. The variant detection is done during +runtime based on the address of the found phy. + +- "mr" variant +FEC is connected directly to an ethernet switch (KSZ8895). The ethernet +port is always up and auto-negotiation is not possible. + +- normal variant +FEC is connected to a normal phy and auto-negotiation is possible. + + +The variant name is part of the dtb file name loaded by u-boot. This +make is possible to boot the linux kernel and make use variant specific +devicetree (fixed-phy link). + +In order to support different display resoltuions/sizes the OT1200 devices +are making use of EDID data stored in an i2c EEPROM. \ No newline at end of file diff --git a/board/bachmann/ot1200/ot1200.c b/board/bachmann/ot1200/ot1200.c new file mode 100644 index 000..0d5ede5 --- /dev/null +++ b/board/bachmann/ot1200/ot1200.c @@ -0,0 +1,251 @@ +/* + * Copyright (C) 2010-2013 Freescale Semiconductor, Inc. + * Copyright (C) 2014, Bachmann electronic GmbH + * + * SPDX-License-Identifier:GPL-2.0+ + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +DECLARE_GLOBAL_DATA_PTR; + +#define OUTPUT_40OHM (PAD_CTL_SPEED_MED|PAD_CTL_DSE_40ohm) + +#define UART_PAD_CTRL (PAD_CTL_PUS_100K_UP | \ + OUTPUT_40OHM | PAD_CTL_SRE_FAST | PAD_CTL_HYS) + +#define USDHC_PAD_CTRL (PAD_CTL_PUS_47K_UP | \ + PAD_CTL_SPEED_LOW | PAD_CTL_DSE_80ohm | \ + PAD_CTL_SRE_FAST |
[U-Boot] [PATCH] kconfiglib: change SPDX-License-Identifier to ISC
From: Masahiro Yamada Commit f219e01311b2 (tools: Import Kconfiglib) added SPDX GPL-2.0+ to this library by mistake. It should be ISC. Signed-off-by: Masahiro Yamada Cc: Ulf Magnusson Signed-off-by: Christian Gmeiner --- tools/buildman/kconfiglib.py | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/tools/buildman/kconfiglib.py b/tools/buildman/kconfiglib.py index 31fd3c9..655cf44 100644 --- a/tools/buildman/kconfiglib.py +++ b/tools/buildman/kconfiglib.py @@ -1,5 +1,5 @@ # -# SPDX-License-Identifier: GPL-2.0+ +# SPDX-License-Identifier: ISC # # Author: Ulf Magnusson # https://github.com/ulfalizer/Kconfiglib -- 1.9.3 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [u-boot] [PATCH V1 1/1] mmc: sunxi: add SDHC support for sun6i/sun7i/sun8i
Allwinner A20/A23/A31's SD/MMC host support SDHC High Capacity feature. Signed-off-by: Wills Wang --- drivers/mmc/sunxi_mmc.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/mmc/sunxi_mmc.c b/drivers/mmc/sunxi_mmc.c index 459e476..0f3ee67 100644 --- a/drivers/mmc/sunxi_mmc.c +++ b/drivers/mmc/sunxi_mmc.c @@ -376,6 +376,9 @@ int sunxi_mmc_init(int sdc_no) cfg->voltages = MMC_VDD_32_33 | MMC_VDD_33_34; cfg->host_caps = MMC_MODE_4BIT; cfg->host_caps |= MMC_MODE_HS_52MHz | MMC_MODE_HS; +#if defined(CONFIG_SUN6I) || defined(CONFIG_SUN7I) || defined(CONFIG_SUN8I) + cfg->host_caps |= MMC_MODE_HC; +#endif cfg->b_max = CONFIG_SYS_MMC_MAX_BLK_COUNT; cfg->f_min = 40; -- 1.8.3.2 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] U-Boot Test Routine
Dear All, Hi I am beginner in U-Boot, please help me, I want to add my test routine script in my u-boot and test my board in initializing time. but i dont know how can i write my script and compile u-boot containing my test script. Would you please help me? Best Regards -- ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 6/7] arm: ls102xa: Add SD boot support for LS1021AQDS board
Hi Huan,
On Mon, 22 Sep 2014 06:46:20 +, Huan Wang
wrote:
> Hi, Albert,
>
> > > On Thu, 18 Sep 2014 13:47:18 +0800, Alison Wang
> > > wrote:
> > >
> > > > +
> > > > + . = ALIGN(4);
> > > > + .u_boot_list : {
> > > > + KEEP(*(SORT(.u_boot_list*_i2c_*)));
> > > > + }
> > >
> > > IS this required? And if it is, could it not be added to the
> > > arch/arm/cpu/u-boot-spl.lds file? This way you would not need an .lds
> > > file at all.
> > >
> > > [Alison Wang] Yes, it is required.
> >
> > Ok -- what for? :)
> [Alison Wang] In SPL part, DDR is initialized by reading SPD through I2C
> interface.
> For I2C, ll_entry_count() is called, and it returns the number of elements of
> a
> linker-generated array placed into subsection of .u_boot_list section
> specified
> by _list argument. So I need to add this to make I2C work in SPL.
Understood. So your SPL code uses I2C, and for I2C, you need a linker
list. But then:
> > > I would like to add it in arch/arm/cpu/u-boot-spl.lds. I was not sure
> > > adding it in arch/arm/cpu/u-boot-spl.lds is acceptable or not.
> >
> > (assuming the reason why it is needed is valid) If it causes no change
> > to boards which do not use it right now (and I mean 'no change' ad
> > 'binary identical') then this is acceptable. Make sure you check the
> > binary invariance and that you mention it in the commit.
> >
> [Alison Wang] It will cause the binary is not identical for other board.
Is this a prediction or an actual observation of compared builds with
and without the I2C linker liste addition to the generic SPL .lds?
> I think
> it may be not good to add in arch/arm/cpu/u-boot-spl.lds. What's your opinion
> about it?
If there are SPLs which use I2C linker lists *and* the generic .lds and
build without an error, then this should be fixed, because it means the
build process should complain when an input section is not mapped to an
output section.
(and that should be fixed even though in this case, adding the I2C
linker lists in the .lds would 'fix' the build, but they would actually
paper over the real issue of sections being mapped without control)
> Best Regards,
> Alison Wang
Amicalement,
--
Albert.
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[U-Boot] [PATCH v3 10/10] kconfig: move CONFIG_DEFAULT_DEVICE_TREE to kconfig
This option specifies the default Device Tree used for the run-time configuration of U-Boot. Signed-off-by: Masahiro Yamada Cc: Simon Glass Cc: Stephen Warren Cc: Minkyu Kang Cc: Michal Simek --- Changes in v3: None Changes in v2: - Fix the commit subject - Rephrase the help comment of DEFAULT_DEVICE_TREE - Do not touch mx6qsabreauto board (This will be covered by commit 19a895cbe9430 in u-boot-imx. Fabio has already sent a pull-req.) configs/am335x_boneblack_vboot_defconfig | 1 + configs/arndale_defconfig| 1 + configs/beaver_defconfig | 1 + configs/cardhu_defconfig | 1 + configs/colibri_t20_iris_defconfig | 1 + configs/colibri_t30_defconfig| 1 + configs/coreboot-x86_defconfig | 1 + configs/dalmore_defconfig| 1 + configs/harmony_defconfig| 1 + configs/jetson-tk1_defconfig | 1 + configs/medcom-wide_defconfig| 1 + configs/microblaze-generic_defconfig | 1 + configs/odroid_defconfig | 1 + configs/origen_defconfig | 1 + configs/paz00_defconfig | 1 + configs/peach-pit_defconfig | 1 + configs/plutux_defconfig | 1 + configs/s5pc210_universal_defconfig | 1 + configs/sandbox_defconfig| 1 + configs/seaboard_defconfig | 1 + configs/smdk5250_defconfig | 1 + configs/smdk5420_defconfig | 1 + configs/snow_defconfig | 1 + configs/tec-ng_defconfig | 1 + configs/tec_defconfig| 1 + configs/trats2_defconfig | 1 + configs/trats_defconfig | 1 + configs/trimslice_defconfig | 1 + configs/venice2_defconfig| 1 + configs/ventana_defconfig| 1 + configs/vexpress_aemv8a_defconfig| 1 + configs/vexpress_aemv8a_semi_defconfig | 1 + configs/whistler_defconfig | 1 + configs/zynq_microzed_defconfig | 1 + configs/zynq_zc70x_defconfig | 1 + configs/zynq_zc770_xm010_defconfig | 1 + configs/zynq_zc770_xm012_defconfig | 1 + configs/zynq_zc770_xm013_defconfig | 1 + configs/zynq_zed_defconfig | 1 + dts/Kconfig | 7 +++ include/configs/am335x_evm.h | 1 - include/configs/arndale.h| 1 - include/configs/beaver.h | 3 --- include/configs/cardhu.h | 3 --- include/configs/colibri_t20_iris.h | 3 --- include/configs/colibri_t30.h| 1 - include/configs/coreboot.h | 1 - include/configs/dalmore.h| 3 --- include/configs/harmony.h| 3 --- include/configs/jetson-tk1.h | 3 --- include/configs/medcom-wide.h| 3 --- include/configs/microblaze-generic.h | 3 --- include/configs/odroid.h | 2 -- include/configs/origen.h | 2 -- include/configs/paz00.h | 3 --- include/configs/peach-pit.h | 2 -- include/configs/plutux.h | 3 --- include/configs/s5pc210_universal.h | 2 -- include/configs/sandbox.h| 1 - include/configs/seaboard.h | 3 --- include/configs/smdk5250.h | 2 -- include/configs/smdk5420.h | 2 -- include/configs/snow.h | 2 -- include/configs/tec-ng.h | 3 --- include/configs/tec.h| 3 --- include/configs/trats.h | 2 -- include/configs/trats2.h | 2 -- include/configs/trimslice.h | 3 --- include/configs/venice2.h| 3 --- include/configs/ventana.h| 3 --- include/configs/vexpress_aemv8a.h| 1 - include/configs/whistler.h | 3 --- include/configs/zynq_microzed.h | 1 - include/configs/zynq_zc70x.h | 1 - include/configs/zynq_zc770.h | 3 --- include/configs/zynq_zed.h | 1 - 76 files changed, 46 insertions(+), 81 deletions(-) diff --git a/configs/am335x_boneblack_vboot_defconfig b/configs/am335x_boneblack_vboot_defconfig index af7ceca..e257143 100644 --- a/configs/am335x_boneblack_vboot_defconfig +++ b/configs/am335x_boneblack_vboot_defconfig @@ -3,3 +3,4 @@ CONFIG_SYS_EXTRA_OPTIONS="SERIAL1,CONS_INDEX=1,EMMC_BOOT,ENABLE_VBOOT" +S:CONFIG_ARM=y +S:CONFIG_TARGET_AM335X_EVM=y CONFIG_OF_CONTROL=y +CONFIG_DEFAULT_DEVICE_TREE="am335x-boneblack" diff --git a/configs/arndale_defconfig b/configs/arndale_defconfig index 7ea5c0d..fc30508 100644 --- a/configs/arndale_defconfig +++ b/configs/arndale_defconfig @@ -2,3 +2,4 @@ CONFIG_SPL=y +S:CONFIG_ARM=y +S:CONFIG_ARCH_EXYNOS=y +S:CONFIG_TARGET_ARNDALE=y +CONFIG_DEFAULT_DEVICE_TREE="exynos5250-arndale" diff --git a/configs/beaver_defconfig b/configs/b
[U-Boot] [PATCH v3 09/10] kconfig: move CONFIG_OF_* to Kconfig
This commit moves: CONFIG_OF_CONTROL CONFIG_OF_SEPARATE CONFIG_OF_EMBED CONFIG_OF_HOSTFILE Because these options are currently not supported for SPL, the "Device Tree Control" menu does not appear in the SPL configuration. Note: zynq-common.h should be adjusted so as not to change the default value of CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME. Signed-off-by: Masahiro Yamada Cc: Simon Glass Cc: Stephen Warren Cc: Minkyu Kang Cc: Michal Simek --- Changes in v3: - Rename HAVE_OF_CONTROL_SUPPORT to SUPPORT_OF_CONTROL because HAVE_OF_CONTRO_SUPPORT sounds too long - Do not specify the default of choice "Provider of DTB for DT control" - Fix the default value of Sandbox Changes in v2: - Add "select OF_CONTROL" to TEGRA and Exynos5 boards because they always need a device tree to boot U-Boot - Add HAVE_OF_CONTROL_SUPPORT - Do not touch mx6qsabreauto board (This will be coverd by commit 19a895cbe9430 in u-boot-imx. Fabio has already sent a pull-req.) - cleanup left-over comments in include/configs/exynos-*.h Kconfig | 2 ++ arch/Kconfig | 4 +++ arch/arm/Kconfig | 1 + arch/arm/cpu/armv7/exynos/Kconfig| 5 configs/am335x_boneblack_vboot_defconfig | 1 + configs/coreboot-x86_defconfig | 1 + configs/microblaze-generic_defconfig | 2 ++ configs/odroid_defconfig | 1 + configs/origen_defconfig | 1 + configs/s5pc210_universal_defconfig | 1 + configs/sandbox_defconfig| 2 ++ configs/trats2_defconfig | 1 + configs/trats_defconfig | 1 + configs/zynq_microzed_defconfig | 1 + configs/zynq_zc70x_defconfig | 1 + configs/zynq_zc770_xm010_defconfig | 1 + configs/zynq_zc770_xm012_defconfig | 1 + configs/zynq_zc770_xm013_defconfig | 1 + configs/zynq_zed_defconfig | 1 + dts/Kconfig | 48 include/configs/am335x_evm.h | 2 -- include/configs/arndale.h| 2 -- include/configs/beaver.h | 2 -- include/configs/cardhu.h | 2 -- include/configs/colibri_t20_iris.h | 2 -- include/configs/colibri_t30.h| 2 -- include/configs/coreboot.h | 2 -- include/configs/dalmore.h| 2 -- include/configs/exynos4-dt.h | 4 --- include/configs/exynos5-dt.h | 4 --- include/configs/harmony.h| 2 -- include/configs/jetson-tk1.h | 2 -- include/configs/medcom-wide.h| 2 -- include/configs/microblaze-generic.h | 2 -- include/configs/paz00.h | 2 -- include/configs/plutux.h | 2 -- include/configs/sandbox.h| 2 -- include/configs/seaboard.h | 2 -- include/configs/tec-ng.h | 2 -- include/configs/tec.h| 2 -- include/configs/tegra-common-post.h | 1 - include/configs/trimslice.h | 2 -- include/configs/venice2.h| 2 -- include/configs/ventana.h| 2 -- include/configs/whistler.h | 2 -- include/configs/zynq-common.h| 9 +- 46 files changed, 78 insertions(+), 61 deletions(-) create mode 100644 dts/Kconfig diff --git a/Kconfig b/Kconfig index fc5e7cd..e0c8992 100644 --- a/Kconfig +++ b/Kconfig @@ -106,6 +106,8 @@ source "arch/Kconfig" source "common/Kconfig" +source "dts/Kconfig" + source "net/Kconfig" source "drivers/Kconfig" diff --git a/arch/Kconfig b/arch/Kconfig index c9ccb7d..bf26764 100644 --- a/arch/Kconfig +++ b/arch/Kconfig @@ -7,6 +7,7 @@ config ARC config ARM bool "ARM architecture" + select SUPPORT_OF_CONTROL config AVR32 bool "AVR32 architecture" @@ -19,6 +20,7 @@ config M68K config MICROBLAZE bool "MicroBlaze architecture" + select SUPPORT_OF_CONTROL config MIPS bool "MIPS architecture" @@ -37,6 +39,7 @@ config PPC config SANDBOX bool "Sandbox" + select SUPPORT_OF_CONTROL config SH bool "SuperH architecture" @@ -46,6 +49,7 @@ config SPARC config X86 bool "x86 architecture" + select SUPPORT_OF_CONTROL endchoice diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 1d8b402..16cbb5e 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -462,6 +462,7 @@ config ZYNQ config TEGRA bool "NVIDIA Tegra" select SPL + select OF_CONTROL if !SPL_BUILD config TARGET_VEXPRESS_AEMV8A bool "Support vexpress_aemv8a" diff --git a/arch/arm/cpu/armv7/exynos/Kconfig b/arch/arm/cpu/armv7/exynos/Kconfig index d132f03..e7c93d8 100644 --- a/arch/arm/cpu/armv7/exynos/Kconfig +++ b/arch/arm/cpu/armv7/exynos/Kconfig @@ -23,18 +23,23 @@ config TARGET_ODROID config TARGET
Re: [U-Boot] [PATCH 1/3] usb: dwc2: Add driver for Synopsis DWC2 USB IP block
Hi!
> This is the USB host controller used on the Altera SoCFPGA and Raspbery Pi.
>
> This code has three checkpatch warnings, but to make sure it stays at least
> readable and clear, these are not fixed. These bugs are in the USB request
> handling combinatorial logic, so any abstracting of those is out of question.
Not too bad. Minor comments below.
> index c4f5157..c9d2ed5 100644
> --- a/drivers/usb/host/Makefile
> +++ b/drivers/usb/host/Makefile
> @@ -45,3 +45,6 @@ obj-$(CONFIG_USB_EHCI_ZYNQ) += ehci-zynq.o
> obj-$(CONFIG_USB_XHCI) += xhci.o xhci-mem.o xhci-ring.o
> obj-$(CONFIG_USB_XHCI_EXYNOS) += xhci-exynos5.o
> obj-$(CONFIG_USB_XHCI_OMAP) += xhci-omap.o
> +
> +# designware
> +obj-$(CONFIG_USB_DWC2) += dwc2.o
Should this be sorted somehow?
> +/**
> + * Initializes the FSLSPClkSel field of the HCFG register
> + * depending on the PHY type.
> + */
> +static void init_fslspclksel(struct dwc2_core_regs *regs)
> +{
> + uint32_t phyclk;
> +#ifdef CONFIG_DWC2_ULPI_FS_LS
Having more readable names for config options would be nice.
> + uint32_t hwcfg2 = readl(®s->ghwcfg2);
> + uint32_t hval = (ghwcfg2 & DWC2_HWCFG2_HS_PHY_TYPE_MASK) >>
> + DWC2_HWCFG2_HS_PHY_TYPE_OFFSET;
> + uint32_t fval = (ghwcfg2 & DWC2_HWCFG2_FS_PHY_TYPE_MASK) >>
> + DWC2_HWCFG2_FS_PHY_TYPE_OFFSET;
> +
> + if ((hval == 2) && (fval == 1))
> + phyclk = DWC2_HCFG_FSLSPCLKSEL_48_MHZ; /* Full speed PHY */
> + else
> +#endif
Ifdef ending in "else" is evil.
> + /* Wait for 3 PHY Clocks */
> + udelay(1);
Note this.
> +/**
> + * Do core a soft reset of the core. Be careful with this because it
> + * resets all the internal state machines of the core.
> + */
This is not valid kerneldoc -> should not use /** style.
> + /* Wait for 3 PHY Clocks */
> + mdelay(100);
Recall it. There's big difference between 1usec and 100msec, which is
it?
> + /* Program the HCSPLIT register for SPLITs */
> + writel(0, &hc_regs->hcsplt);
> +}
> +
> +
> +
> +
> +
> +
> +
> +
> +
> +
> +
> +
> +
> +
> +
> +
> +
> +
This is little un-conventional :-).
> + if (usb_pipeint(pipe)) {
> + puts("Root-Hub submit IRQ: NOT implemented");
Missing \n?
> + wValue= cpu_to_le16 (cmd->value);
> + wLength = cpu_to_le16 (cmd->length);
Extra space.
> +
> + switch (bmRType_bReq) {
> + case (USB_REQ_GET_STATUS << 8) | USB_DIR_IN:
> + *(__u16 *)buffer = cpu_to_le16(1);
Can we use u16 (not __u16) here?
> + case (USB_REQ_SET_FEATURE << 8) | USB_DIR_OUT | USB_RECIP_OTHER |
> USB_TYPE_CLASS:
> + switch (wValue) {
> + case USB_PORT_FEAT_SUSPEND:
> + break;
> +
> + case USB_PORT_FEAT_RESET:
> + clrsetbits_le32(®s->hprt0, DWC2_HPRT0_PRTENA |
> + DWC2_HPRT0_PRTCONNDET |
> + DWC2_HPRT0_PRTENCHNG |
> + DWC2_HPRT0_PRTOVRCURRCHNG,
> + DWC2_HPRT0_PRTRST);
> + mdelay(50);
> + clrbits_le32(®s->hprt0, DWC2_HPRT0_PRTRST);
> + break;
> +
> + case USB_PORT_FEAT_POWER:
> + clrsetbits_le32(®s->hprt0, DWC2_HPRT0_PRTENA |
> + DWC2_HPRT0_PRTCONNDET |
> + DWC2_HPRT0_PRTENCHNG |
> + DWC2_HPRT0_PRTOVRCURRCHNG,
> + DWC2_HPRT0_PRTRST);
> + break;
> +
> + case USB_PORT_FEAT_ENABLE:
> + break;
> + }
> + break;
This is getting bit. Would it be feasible to split it into functions?
> + case (USB_REQ_GET_DESCRIPTOR << 8) | USB_DIR_IN | USB_TYPE_CLASS:
> + {
> + __u32 temp = 0x0001;
temp is never writtenn to. Can you just write 1 instead of it?
> + data[0] = 9;/* min length; */
> + data[1] = 0x29;
> + data[2] = temp & RH_A_NDP;
> + data[3] = 0;
> + if (temp & RH_A_PSM)
> + data[3] |= 0x1;
> + if (temp & RH_A_NOCP)
> + data[3] |= 0x10;
> + else if (temp & RH_A_OCPM)
> + data[3] |= 0x8;
> +
> + /* corresponds to data[4-7] */
> + data[5] = (temp & RH_A_POTPGT) >> 24;
> + data[7] = temp & RH_B_DR;
> + if (data[2] < 7) {
> + data[8] = 0xff;
> + } else {
Thus data[2] is always <2. What is going on here?
> + default:
> + puts("unsupported root hub command");
\n?
> + /* TODO: no endless loop */
> + while (1) {
> + hcint_new = readl(&hc_regs->hcint);
> + if (hcint != hcint_new)
> +
Re: [U-Boot] [PATCH 31/51] fpga: altera: Make altera_validate return normal values
On Sun 2014-09-21 15:12:12, Marek Vasut wrote:
> Make the function return either 0 or -EINVAL, that is, normal
> expected error codes and success codes instead of true/false
> nonsense.
>
> Signed-off-by: Marek Vasut
> Cc: Chin Liang See
> Cc: Dinh Nguyen
> Cc: Albert Aribaud
> Cc: Tom Rini
> Cc: Wolfgang Denk
Acked-by: Pavel Machek
> @@ -133,7 +133,7 @@ int altera_info(Altera_desc *desc)
> {
> int ret_val = FPGA_FAIL;
>
> - if (!altera_validate (desc, (char *)__func__)) {
> + if (altera_validate (desc, (char *)__func__)) {
+ if (altera_validate(desc, (char *)__func__)) {
You have extra space there, checkpatch would be angry.
Pavel
--
(english) http://www.livejournal.com/~pavelmachek
(cesky, pictures)
http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html
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Re: [U-Boot] [PATCH 28/51] fpga: altera: Clean up altera_validate function
On Sun 2014-09-21 15:12:09, Marek Vasut wrote: > Boldly go, where no programmer has gone before and just clean up > the indentation mayhem. No functional change. > > Signed-off-by: Marek Vasut > Cc: Chin Liang See > Cc: Dinh Nguyen > Cc: Albert Aribaud > Cc: Tom Rini > Cc: Wolfgang Denk Nice! Acked-by: Pavel Machek -- (english) http://www.livejournal.com/~pavelmachek (cesky, pictures) http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] uart test
On 22 September 2014 09:39, Wolfgang Denk wrote: > Dear shobin b, > > In message you wrote: >> >> Hi,I am using toradex carrier board with colibri t30 module.In that >> X13 and X14 are uart.first uart X13 is default serial console.In that >> i need to check the second uart X14. How can i use second uart or how >> can i check second uart X14.please help me.Regards,shobin.b > > Testing peripherals in U-Boot is part of the POST subsystem. > > You probably remember that from our discussions from January through > April this year. > > So far, there is no specific UART test available in POST, so you would > have to add one. > > Alternatively, you could just enable the port in question as > alternative console device, and switch the console to that port and > try if it works. Note that it might be difficult to switch back if it > doesn't work - if that should be a problem, you might consider to also > enable netconsole. > FWIW there was an issue with incorrectly set uart on some sunxi devices. When you set uart to non-connected pins, set u-boot console to that uart, and do not set up termination for the pins u-boot will receive noise on the uart and stop booting thinking that the user typed something. That said if the hardware is present and you have 2pin uart (rx/tx) only and do not use any particular protocol (like, say, ppp which has some structure) you cannot tell if the uart is usable or not. On 4pin uarts you can use the additional pins to sense if a device is attached or not - that's what the pins were for. Thanks Michal ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] uart test
Dear shobin b, In message you wrote: > > Hi,I am using toradex carrier board with colibri t30 module.In that > X13 and X14 are uart.first uart X13 is default serial console.In that > i need to check the second uart X14. How can i use second uart or how > can i check second uart X14.please help me.Regards,shobin.b Testing peripherals in U-Boot is part of the POST subsystem. You probably remember that from our discussions from January through April this year. So far, there is no specific UART test available in POST, so you would have to add one. Alternatively, you could just enable the port in question as alternative console device, and switch the console to that port and try if it works. Note that it might be difficult to switch back if it doesn't work - if that should be a problem, you might consider to also enable netconsole. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de My brother sent me a postcard the other day with this big sattelite photo of the entire earth on it. On the back it said: "Wish you were here".- Steven Wright ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
