[U-Boot] [PATCH 1/1] ARMv7 TLB: Fixed TTBR0 and Table Descriptors to allow caching

[Bryan Brinsko]

The TTBR0 register and Table Descriptors of the ARMv7 TLB weren't being
properly set to allow for the configuration specified caching modes to
be active over DRAM. This commit fixes those issues.

Signed-off-by: Bryan Brinsko bryan.brin...@rockwellcollins.com
---
 arch/arm/include/asm/system.h | 37 +
 arch/arm/lib/cache-cp15.c | 14 ++
 2 files changed, 51 insertions(+)

diff --git a/arch/arm/include/asm/system.h b/arch/arm/include/asm/system.h
index 2a5bed2..9cd2f1e 100644
--- a/arch/arm/include/asm/system.h
+++ b/arch/arm/include/asm/system.h
@@ -196,6 +196,28 @@ static inline void set_dacr(unsigned int val)
isb();
 }
 
+#ifdef CONFIG_ARMV7
+/* Short-Descriptor Translation Table Level 1 Bits */
+#define TTB_SECT_NS_MASK   (1  19)
+#define TTB_SECT_NG_MASK   (1  17)
+#define TTB_SECT_S_MASK(1  16)
+/* Note: TTB AP bits are set elsewhere */
+#define TTB_SECT_TEX(x)((x  0x7)  12)
+#define TTB_SECT_DOMAIN(x) ((x  0xf)  5)
+#define TTB_SECT_XN_MASK   (1  4)
+#define TTB_SECT_C_MASK(1  3)
+#define TTB_SECT_B_MASK(1  2)
+#define TTB_SECT   (2  0)
+
+/* options available for data cache on each page */
+enum dcache_option {
+   DCACHE_OFF = TTB_SECT_S_MASK | TTB_SECT_DOMAIN(0) |
+   TTB_SECT_XN_MASK | TTB_SECT,
+   DCACHE_WRITETHROUGH = DCACHE_OFF | TTB_SECT_C_MASK,
+   DCACHE_WRITEBACK = DCACHE_WRITETHROUGH | TTB_SECT_B_MASK,
+   DCACHE_WRITEALLOC = DCACHE_WRITEBACK | TTB_SECT_TEX(1),
+};
+#else
 /* options available for data cache on each page */
 enum dcache_option {
DCACHE_OFF = 0x12,
@@ -203,6 +225,7 @@ enum dcache_option {
DCACHE_WRITEBACK = 0x1e,
DCACHE_WRITEALLOC = 0x16,
 };
+#endif
 
 /* Size of an MMU section */
 enum {
@@ -210,6 +233,20 @@ enum {
MMU_SECTION_SIZE= 1  MMU_SECTION_SHIFT,
 };
 
+#ifdef CONFIG_ARMV7
+/* TTBR0 bits */
+#define TTBR0_BASE_ADDR_MASK   0xC000
+#define TTBR0_RGN_NC   (0  3)
+#define TTBR0_RGN_WBWA (1  3)
+#define TTBR0_RGN_WT   (2  3)
+#define TTBR0_RGN_WB   (3  3)
+/* TTBR0[6] is IRGN[0] and TTBR[0] is IRGN[1] */
+#define TTBR0_IRGN_NC  (0  0 | 0  6)
+#define TTBR0_IRGN_WBWA(0  0 | 1  6)
+#define TTBR0_IRGN_WT  (1  0 | 0  6)
+#define TTBR0_IRGN_WB  (1  0 | 1  6)
+#endif
+
 /**
  * Change the cache settings for a region.
  *
diff --git a/arch/arm/lib/cache-cp15.c b/arch/arm/lib/cache-cp15.c
index 0291afa..c65e068 100644
--- a/arch/arm/lib/cache-cp15.c
+++ b/arch/arm/lib/cache-cp15.c
@@ -96,9 +96,23 @@ static inline void mmu_setup(void)
dram_bank_mmu_setup(i);
}
 
+#ifdef CONFIG_ARMV7
+   /* Set TTBR0 */
+   reg = gd-arch.tlb_addr  TTBR0_BASE_ADDR_MASK;
+#if defined(CONFIG_SYS_ARM_CACHE_WRITETHROUGH)
+   reg |= TTBR0_RGN_WT | TTBR0_IRGN_WT;
+#elif defined(CONFIG_SYS_ARM_CACHE_WRITEALLOC)
+   reg |= TTBR0_RGN_WBWA | TTBR0_IRGN_WBWA;
+#else
+   reg |= TTBR0_RGN_WB | TTBR0_IRGN_WB;
+#endif
+   asm volatile(mcr p15, 0, %0, c2, c0, 0
+: : r (reg) : memory);
+#else
/* Copy the page table address to cp15 */
asm volatile(mcr p15, 0, %0, c2, c0, 0
 : : r (gd-arch.tlb_addr) : memory);
+#endif
/* Set the access control to all-supervisor */
asm volatile(mcr p15, 0, %0, c3, c0, 0
 : : r (~0));
-- 
1.9.1

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Re: [U-Boot] [PATCH 14/28] drivers/fsl-mc: Changed MC firmware loading for new boot architecture

[Jose Rivera]

 -Original Message-
 From: Kim Phillips [mailto:kim.phill...@freescale.com]
 Sent: Monday, March 23, 2015 5:06 PM
 To: Rivera Jose-B46482
 Cc: Sun York-R58495; u-boot@lists.denx.de
 Subject: Re: [U-Boot] [PATCH 14/28] drivers/fsl-mc: Changed MC firmware
 loading for new boot architecture
 
 On Mon, 23 Mar 2015 16:15:56 -0500
 Rivera Jose-B46482 german.riv...@freescale.com wrote:
 
   -Original Message-
   From: Kim Phillips [mailto:kim.phill...@freescale.com]
   Sent: Monday, March 23, 2015 3:34 PM
   To: Rivera Jose-B46482
   Cc: Sun York-R58495; u-boot@lists.denx.de
   Subject: Re: [U-Boot] [PATCH 14/28] drivers/fsl-mc: Changed MC
   firmware loading for new boot architecture
  
   On Mon, 23 Mar 2015 15:06:11 -0500
   Rivera Jose-B46482 german.riv...@freescale.com wrote:
  
 From: Kim Phillips [mailto:kim.phill...@freescale.com]
 Sent: Thursday, March 19, 2015 12:53 PM

 On Thu, 19 Mar 2015 09:45:45 -0700 York Sun
 york...@freescale.com wrote:

  From: J. German Rivera german.riv...@freescale.com
 
  Changed MC firmware loading to comply with the new MC boot
 architecture.
  Flush D-cache hierarchy after loading MC images. Add
  environment variables mcboottimeout for MC boot timeout in
  milliseconds, mcmemsize for MC DRAM block size. Check MC
  boot status before calling flib functions.

 Can we just assign actual and/or optimal values for
 'mcboottimeout'
 and 'mcmemsize' instead of making them environment variables?

Having environment variables gives us the flexibility if these
values need to be changed for a given customer configuration. The
actual
  
   what defines a 'customer configuration,' and how does that manifest
   itself at u-boot boot time?
  A DPL (data path layout - a device-tree-like structure describing The
  DPAA2 objects created at boot time and their connections)
 
Is it the amount of time it takes to load (and execute?) firmare?
  Yes, bigger DPLs take longer to process by the MC.
 
   Why isn't customer-specific firmware being loaded via linux?  All
   u-boot needs is basic networking, pretty static
   setup: fixed numbers for both memsize  timeout.
  This is not customer-specific firmware. What is customer-specific is
 just the DPL.
  In order to have networking in u-boot, we need to load the MC firmware
  in u-boot, For cases in which the target system has only DPAA2-based
 network interfaces.
 
 ok, for that case, when time comes for u-boot to do some DPAA2 networking
 arrives (i.e., we shouldn't have to be loading firmware at board boot-
 time), then we should load a minimal DPL for the number of singular, non-
 virtual/switch, etc., interfaces for that board just to tftp: this
 shouldn't be a big DPL at all, and its time complexity is fixed.
 
It is up to the customer to decide what kind of DPL they want to have.

boot time of the MC and the amount of memory needed by the MC is
dependent on how big/complex is the DPL used. Also, the memory
needed by the MC needs to account for how much memory is needed
for AIOP programs, which may depend on how big/complex they are.
  
   ok, that helps (modulo not knowing what 'DPL' is), but still, the
   massive customer configurations should be being loaded via linux'
   firmware loading infrastructure: u-boot should be using a static
   image for u-boot's needs.
  
  +static int wait_for_mc(bool booting_mc, u32 *final_reg_gsr) {
  +   u32 reg_gsr;
  +   u32 mc_fw_boot_status;
  +   unsigned long timeout_ms = get_mc_boot_timeout_ms();
  +   struct mc_ccsr_registers __iomem *mc_ccsr_regs =
  +MC_CCSR_BASE_ADDR;
  +
  +   dmb();
  +   debug(Polling mc_ccsr_regs-reg_gsr ...\n);
  +   assert(timeout_ms  0);
  +   for (;;) {
  +   udelay(1000);   /* throttle polling */

 does this really need to be a whole 1ms?
   
It is unlikely that the MC fw will boot in less than 1 ms.
  
   is wait_for_mc() only called for the boot command, or all commands?
 
 I see: there's a udelay(500) in mc_send_command(), which is too high,
 too, IMO, but I'm not that familiar with the h/w:  How long does the
 shortest command take?
 
So, checking more frequently than 1 ms is not necessary.
  
   yes it is, because e.g., if it takes 1.1ms we will have wasted 0.9ms
   on this.
  
  How significant is to save 0.9ms of the whole boot time?
 
 Why waste 0.9ms of boot time when there's no need?  It already takes the
 boards *way* too long to boot, and now I'm understanding
 mc_send_command's delay should probably be adjusted, too.

I have not heard any complain about RDB/QDS boards taking too long to boot
Due to this wasteds 0.9ms.

Can you support your statement about LS2 RDB/QDS boards taking too long to boot
with actual numbers? Otherwise, I will not make any change.
 
  As the comment in the code says, the intent was to throttle down the
  polling, to reduce traffic on the 

Re: [U-Boot] [PATCH] watchdog/imx_watchdog: do not set WCR_WDW

[Stefano Babic]

Hi Sebastian,

(sorry for late answer)

On 03/03/2015 17:45, Sebastian Andrzej Siewior wrote:
 with WCR_WDW set, the watchdog won't trigger if we bootet linux and idle
 around while the watchdog is not triggered. It seems the timer makes
 progress very slowly if at all. I managed to remain 20minutes alive
 while the timeout was set to 60secs. It reboots within 60secs if I start
 a busyloop in userland (something like while (1) { }).

Just some questions. The described behavior is coherent with the
description in the manual. When WDW is set, the watchdog is stopped
while the processor is in wait mode.
Current imx2_wdt.c driver in kernel does not care about this bit, but it
looks like that only the kernel and/or the application can decide if the
watchdog should run when the system is in WAIT or not. The bootloader
cannot decide, and it should set the bit for its own usage.

Should this setup be done by the kernel driver instead of by the
bootloader ?

 
 While I don't see a reason why the WDT should not be running while the
 CPU is in idle, I'm dropping this bit.

I can agree or disagree. This depends on the application.

Differently as the WDZST, that can be set only once, and it is set by
*both* U-Boot and kernel (setting in kernel has then no influence), the
WDW can be even disabled in kernel.

 
 Signed-off-by: Sebastian Andrzej Siewior bige...@linutronix.de
 ---
  drivers/watchdog/imx_watchdog.c | 3 +--
  1 file changed, 1 insertion(+), 2 deletions(-)
 
 diff --git a/drivers/watchdog/imx_watchdog.c b/drivers/watchdog/imx_watchdog.c
 index d5993b4d26d6..1d18d4b269f8 100644
 --- a/drivers/watchdog/imx_watchdog.c
 +++ b/drivers/watchdog/imx_watchdog.c
 @@ -20,7 +20,6 @@ struct watchdog_regs {
  #define WCR_WDE  0x04/* WDOG enable */
  #define WCR_WDT  0x08
  #define WCR_SRS  0x10
 -#define WCR_WDW  0x80
  #define SET_WCR_WT(x)(x  8)
  
  #ifdef CONFIG_IMX_WATCHDOG
 @@ -47,7 +46,7 @@ void hw_watchdog_init(void)
  #endif
   timeout = (CONFIG_WATCHDOG_TIMEOUT_MSECS / 500) - 1;
   writew(WCR_WDZST | WCR_WDBG | WCR_WDE | WCR_WDT | WCR_SRS |
 - WCR_WDW | SET_WCR_WT(timeout), wdog-wcr);
 + SET_WCR_WT(timeout), wdog-wcr);
   hw_watchdog_reset();
  }
  #endif
 

Best regards,
Stefano Babic

-- 
=
DENX Software Engineering GmbH,  Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de
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Re: [U-Boot] [PATCH] config: peach: Correct memory layout environment settings

[Sjoerd Simons]

On Wed, 2015-03-25 at 01:11 -0400, Tom Rini wrote:
 On Mon, Mar 23, 2015 at 03:04:48PM -0600, Simon Glass wrote:
  Hi Sjoerd,
  
  On 12 March 2015 at 15:33, Sjoerd Simons sjoerd.sim...@collabora.co.uk 
  wrote:
   The peach boards have their SDRAM start address at 0x2000 instead of
   0x4000 which seems common for all other exynos5 based boards. This
   means the layout set in exynos5-common.h causes the kernel be loaded
   more then 128MB (at 0x4200) away from memory start which breaks
   booting kernels with CONFIG_AUTO_ZRELADDR
  
   Define a custom MEM_LAYOUT_ENV_SETTINGS for both peach boards which uses
   the same offsets from start of memory as the common exynos5 settings.
  
   This fixes booting via bootz and PXE
  
   Signed-off-by: Sjoerd Simons sjoerd.sim...@collabora.co.uk
   ---
include/configs/peach-pi.h  | 8 
include/configs/peach-pit.h | 8 
2 files changed, 16 insertions(+)
  
   diff --git a/include/configs/peach-pi.h b/include/configs/peach-pi.h
   index f04f061..e3cb09e 100644
   --- a/include/configs/peach-pi.h
   +++ b/include/configs/peach-pi.h
   @@ -16,6 +16,14 @@
#define CONFIG_ENV_OFFSET  (FLASH_SIZE - CONFIG_BL2_SIZE)
#define CONFIG_SPI_BOOTING
  
   +#define MEM_LAYOUT_ENV_SETTINGS \
   +   bootm_size=0x1000\0 \
   +   kernel_addr_r=0x2200\0 \
   +   fdt_addr_r=0x2300\0 \
   +   ramdisk_addr_r=0x2330\0 \
   +   scriptaddr=0x3000\0 \
   +   pxefile_addr_r=0x3100\0
   +
#include configs/exynos5420-common.h
#include configs/exynos5-dt-common.h
  
   diff --git a/include/configs/peach-pit.h b/include/configs/peach-pit.h
   index b5efbdc..3ee42ef 100644
   --- a/include/configs/peach-pit.h
   +++ b/include/configs/peach-pit.h
   @@ -16,6 +16,14 @@
#define CONFIG_ENV_OFFSET  (FLASH_SIZE - CONFIG_BL2_SIZE)
#define CONFIG_SPI_BOOTING
  
   +#define MEM_LAYOUT_ENV_SETTINGS \
   +   bootm_size=0x1000\0 \
   +   kernel_addr_r=0x2200\0 \
   +   fdt_addr_r=0x2300\0 \
   +   ramdisk_addr_r=0x2330\0 \
   +   scriptaddr=0x3000\0 \
   +   pxefile_addr_r=0x3100\0
   +
#include configs/exynos5420-common.h
#include configs/exynos5-dt-common.h
  
  It would be great if we could have this in the device tree.
 
 I understand what you're thinking but this is environment.  And really
 this is not board specific, this is SoC family specific which is why the
 similar part for TI stuff is in ti_armv7_common.h :)

Exynos 5 has the same in exynos5-common.h, however for whatever reason
the peach pi/pit boards are different then other exynos board supported
by u-boot thusfar. So in this case, this information _is_ board specific
not platform specific.

But even in case of including it in device tree, a default/common
setting could go into the platforms dtsi with board-specific overrides
as needed.

One thing i have wondered though, looking at the various boards
specifying the various memory layour addresses. They all end up being
relatively similar offset to the base memory address, which makes me
think it may be possible to calculate these values in the initialisation
code rather then having to hardcode it in the environment. However, even
if that's a sensible thing, something for later :)

-- 
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Collabora Ltd.
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Re: [U-Boot] [PATCH v3] arm: mx5: Add support for USB armory board

[Stefano Babic]

Hi Andrej,

On 24/03/2015 14:26, and...@inversepath.com wrote:
 From: Andrej Rosano and...@inversepath.com
 
 Add support for Inverse Path USB armory board, an open source
 flash-drive sized computer based on Freescale i.MX53 SoC.
 
 http://inversepath.com/usbarmory
 
 Signed-off-by: Andrej Rosano and...@inversepath.com
 Cc: Stefano Babic sba...@denx.de
 Cc: Chris Kuethe chris.kue...@gmail.com
 Cc: Fabio Estevam feste...@gmail.com
 Cc: Vagrant Cascadian vagr...@debian.org
 ---
 Changes for v3:
  - Add config_distro support
 
 Changes for v2:
  - Fix double print_cpuinfo() call
  - Fix CONFIG_BOOTCOMMAND typo
  - Fix CONFIG_SYS_FSL_ESDHC_NUM to 1
 
  arch/arm/Kconfig |5 +
  board/inversepath/usbarmory/Kconfig  |   15 +
  board/inversepath/usbarmory/MAINTAINERS  |6 +
  board/inversepath/usbarmory/Makefile |   10 +
  board/inversepath/usbarmory/imximage.cfg |   82 ++
  board/inversepath/usbarmory/usbarmory.c  |  439 
 ++
  configs/usbarmory_defconfig  |3 +
  include/configs/usbarmory.h  |  127 +
  8 files changed, 687 insertions(+)
  create mode 100644 board/inversepath/usbarmory/Kconfig
  create mode 100644 board/inversepath/usbarmory/MAINTAINERS
  create mode 100644 board/inversepath/usbarmory/Makefile
  create mode 100644 board/inversepath/usbarmory/imximage.cfg
  create mode 100644 board/inversepath/usbarmory/usbarmory.c
  create mode 100644 configs/usbarmory_defconfig
  create mode 100644 include/configs/usbarmory.h
 
 diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
 index b9ebee1..a490084 100644
 --- a/arch/arm/Kconfig
 +++ b/arch/arm/Kconfig
 @@ -462,6 +462,10 @@ config TARGET_MX53SMD
   bool Support mx53smd
   select CPU_V7
  
 +config TARGET_USBARMORY
 + bool Support USB armory
 + select CPU_V7
 +

I recently merged Boris Brezillon's patches to move new boards outside
arm/Kconfig. Patches were related to MX6, but the same mechanism can be
reused for MX5/MX53. It should be better to have the same and bew boards
should not change arm/Kconfig. That generates conflicts by merging
different architecture.

Can you take a look at it and move USB armory to that approach ?


  config TARGET_MX51_EFIKAMX
   bool Support mx51_efikamx
   select CPU_V7
 @@ -819,6 +823,7 @@ source board/h2200/Kconfig
  source board/hale/tt01/Kconfig
  source board/icpdas/lp8x4x/Kconfig
  source board/imx31_phycore/Kconfig
 +source board/inversepath/usbarmory/Kconfig
  source board/isee/igep0033/Kconfig
  source board/jornada/Kconfig
  source board/karo/tx25/Kconfig
 diff --git a/board/inversepath/usbarmory/Kconfig 
 b/board/inversepath/usbarmory/Kconfig
 new file mode 100644
 index 000..254b6c9
 --- /dev/null
 +++ b/board/inversepath/usbarmory/Kconfig
 @@ -0,0 +1,15 @@
 +if TARGET_USBARMORY
 +
 +config SYS_BOARD
 + default usbarmory
 +
 +config SYS_VENDOR
 + default inversepath
 +
 +config SYS_SOC
 + default mx5
 +
 +config SYS_CONFIG_NAME
 + default usbarmory
 +
 +endif
 diff --git a/board/inversepath/usbarmory/MAINTAINERS 
 b/board/inversepath/usbarmory/MAINTAINERS
 new file mode 100644
 index 000..71a3dd4
 --- /dev/null
 +++ b/board/inversepath/usbarmory/MAINTAINERS
 @@ -0,0 +1,6 @@
 +USBARMORY BOARD
 +M:   Andrej Rosano and...@inversepath.com
 +S:   Maintained
 +F:   board/inversepath/usbarmory/
 +F:   include/configs/usbarmory.h
 +F:   configs/usbarmory_defconfig
 diff --git a/board/inversepath/usbarmory/Makefile 
 b/board/inversepath/usbarmory/Makefile
 new file mode 100644
 index 000..9b8bd80
 --- /dev/null
 +++ b/board/inversepath/usbarmory/Makefile
 @@ -0,0 +1,10 @@
 +#
 +# USB armory MkI board Makefile
 +# http://inversepath.com/usbarmory
 +#
 +# Copyright (C) 2015, Inverse Path
 +# Andrej Rosano and...@inversepath.com
 +#
 +# SPDX-License-Identifier:|GPL-2.0+
 +
 +obj-y:= usbarmory.o
 diff --git a/board/inversepath/usbarmory/imximage.cfg 
 b/board/inversepath/usbarmory/imximage.cfg
 new file mode 100644
 index 000..392d2f9
 --- /dev/null
 +++ b/board/inversepath/usbarmory/imximage.cfg
 @@ -0,0 +1,82 @@
 +/*
 + * USB armory MkI board imximage configuration
 + * http://inversepath.com/usbarmory
 + *
 + * Copyright (C) 2015, Inverse Path
 + * Andrej Rosano and...@inversepath.com
 + *
 + * SPDX-License-Identifier:|GPL-2.0+
 + */
 +
 +IMAGE_VERSION 2
 +BOOT_FROM sd
 +
 +
 +/* IOMUX */
 +
 +DATA 4 0x53fa86f4 0x /* GRP_DDRMODE_CTL */
 +DATA 4 0x53fa8714 0x /* GRP_DDRMODE */
 +DATA 4 0x53fa86fc 0x /* GRP_DDRPKE  */
 +DATA 4 0x53fa8724 0x0400 /* GRP_DDR_TYPE*/
 +
 +DATA 4 0x53fa872c 0x0030 /* GRP_B3DS   */
 +DATA 4 0x53fa8554 0x0030 /* DRAM_DQM3  */
 +DATA 4 0x53fa8558 0x00300040 /* DRAM_SDQS3 */
 +
 +DATA 4 0x53fa8728 0x0030 /* GRP_B2DS   */
 +DATA 4 0x53fa8560 0x0030 /* DRAM_DQM2  */
 +DATA 4 0x53fa8568 0x00300040 /* DRAM_SDQS2 */
 +
 +DATA 4 0x53fa871c 0x0030 /* GRP_B1DS   */
 +DATA 4 

Re: [U-Boot] [PATCH] tegra: pinmux: fix FUNCMUX_NDFLASH_KBC_8_BIT

[Marcel Ziswiler]

On 24 March 2015 16:21:02 CET, Stephen Warren swar...@wwwdotorg.org wrote:
 diff --git a/arch/arm/mach-tegra/tegra20/funcmux.c
b/arch/arm/mach-tegra/tegra20/funcmux.c

Note that this will conflict with:

09f455dca749 ARM: tegra: collect SoC sources into mach-tegra

... which moved that file.

OK, sorry. Haven't seen that one yet. Will rebase accordingly.

What if ATC is actually used for some purpose other than GMI? This will

corrupt the pinmux for that pingroup, and prevent the other peripheral 
from working. For example, PERIPH_ID_SDMMC4/FUNCMUX_SDMMC4_ATC_ATD_8BIT

actively uses ATC, and this change might break it if both are used 
together on one board.

Yes, agreed.

The best approach is to simply not use funcmux at all, but rather 
program the entire pinmux from a table. That guarantees no conflicts. 
Boards using later SoCs take this approach.

Yes, that one I knew but nobody does on T20 (yet) plus T20 is kind of special 
due to its pin groups spanning multiple pins and such.

Alternatively, have the board code (rather than funcmux) select some 
other value for ATC. This allows the board code to select the exact 
correct value for that pingroup once (thus avoiding multiple changes to

the pinmux for that pingroup, which could cause glitches), and 
guarantees that the common code will never corrupt that setting.

That one for sure would work if above table approach proves to be too 
cumbersome to do.

Thanks Stephen
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Re: [U-Boot] [PATCH v3 00/17] Power(full) framework based on Driver Model

[Przemyslaw Marczak]

Hello,

On 03/24/2015 09:30 PM, Przemyslaw Marczak wrote:

Hello,
Here is the third RFC version of the new PMIC framework.Big thanks to
Simon Glass, your comments were really helpful, and I think, that this
version is much more better to discuss, than the previous. The changes
made in this version are described below each commit. Sorry that I didn't
reply to each patch, I agreed with most and just started the work.

Best regards

Przemyslaw Marczak (17):
   exynos5: fix build break by adding CONFIG_POWER
   fdt_ro.c: add new function: fdt_node_check_prop_compatible()
   dm: core: lists.c: add new function lists_bind_fdt_by_prop()
   lib: Kconfig: add entry for errno_str() function
   dm: pmic: add implementation of driver model pmic uclass
   dm: regulator: add implementation of driver model regulator uclass
   dm: pmic: add pmic command
   dm: regulator: add regulator command
   pmic: max77686 set the same compatible as in the kernel
   dm: pmic: add max77686 pmic driver
   dm: regulator: add max77686 regulator driver
   dm: regulator: add fixed voltage regulator driver
   doc: driver-model: pmic and regulator uclass documentation
   dm: board:samsung: power_init_board: add requirement of CONFIG_DM_PMIC
   odroid: board: add support to dm pmic api
   odroid: dts: add 'voltage-regulators' description to max77686 node
   odroid: config: enable dm pmic, dm regulator and max77686 driver

  Makefile |   1 +
  arch/arm/dts/exynos4412-odroid.dts   | 249 +-
  arch/arm/dts/exynos4412-trats2.dts   |   2 +-
  arch/arm/dts/exynos5250-smdk5250.dts |   2 +-
  arch/arm/dts/exynos5250-snow.dts |   2 +-
  board/samsung/common/board.c |   4 +-
  board/samsung/common/misc.c  |   1 +
  board/samsung/odroid/odroid.c| 113 -
  common/Kconfig   |  36 ++
  common/Makefile  |   4 +
  common/cmd_pmic.c| 210 +
  common/cmd_regulator.c   | 385 +++
  configs/odroid_defconfig |   8 +-
  doc/driver-model/pmic-framework.txt  | 350 ++
  drivers/core/lists.c |  28 +-
  drivers/power/Kconfig| 124 -
  drivers/power/Makefile   |   3 +-
  drivers/power/pmic-uclass.c  | 130 ++
  drivers/power/pmic/Makefile  |   1 +
  drivers/power/pmic/max77686.c|  76 +++
  drivers/power/pmic/pmic_max77686.c   |   2 +-
  drivers/power/regulator-uclass.c | 219 +
  drivers/power/regulator/Makefile |   9 +
  drivers/power/regulator/fixed.c  | 124 +
  drivers/power/regulator/max77686.c   | 876 +++
  include/configs/exynos5-common.h |   4 +
  include/configs/odroid.h |   5 -
  include/dm/lists.h   |  18 +
  include/dm/uclass-id.h   |   4 +
  include/libfdt.h |  27 ++
  include/power/max77686_pmic.h|  26 +-
  include/power/pmic.h | 210 +
  include/power/regulator.h| 259 +++
  lib/Kconfig  |   8 +
  lib/fdtdec.c |   2 +-
  lib/libfdt/fdt_ro.c  |  14 +-
  36 files changed, 3481 insertions(+), 55 deletions(-)
  create mode 100644 common/cmd_pmic.c
  create mode 100644 common/cmd_regulator.c
  create mode 100644 doc/driver-model/pmic-framework.txt
  create mode 100644 drivers/power/pmic-uclass.c
  create mode 100644 drivers/power/pmic/max77686.c
  create mode 100644 drivers/power/regulator-uclass.c
  create mode 100644 drivers/power/regulator/Makefile
  create mode 100644 drivers/power/regulator/fixed.c
  create mode 100644 drivers/power/regulator/max77686.c
  create mode 100644 include/power/regulator.h



This patchset is available at:
https://github.com/bobenstein/u-boot
branch: dm-pmic-v3

Best regards,
--
Przemyslaw Marczak
Samsung RD Institute Poland
Samsung Electronics
p.marc...@samsung.com
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Re: [U-Boot] [PATCH] ARM: cpu: Add ARMv7 barrier operations support

[Nobuhiro Iwamatsu]

Hi,

2015-03-21 0:16 GMT+09:00 Vladimir Barinov
vladimir.bari...@cogentembedded.com:
 From: Valentine Barshak valentine.bars...@cogentembedded.com

 This enables ARMv7 barrier operations support when
 march=armv7-a is enabled.

 Using CP15 barriers causes U-Boot bootm command crash when
 transferring control to the loaded image on Renesas R8A7794 Cortex A7 CPU.
 Using ARMv7 barrier operations instead of the deprecated CP15 barriers
 helps to avoid these issues.

 Signed-off-by: Valentine Barshak 
 valentine.barshak+rene...@cogentembedded.com
 Signed-off-by: Vladimir Barinov vladimir.barinov+rene...@cogentembedded.com
 Reviewed-by: Tom Rini tr...@konsulko.com

Reviewed-by: Nobuhiro Iwamatsu nobuhiro.iwamatsu...@renesas.com

Best regards,
  Nobuhiro

 ---
  arch/arm/cpu/armv7/cache_v7.c | 14 +++---
  arch/arm/include/asm/armv7.h  | 10 ++
  2 files changed, 17 insertions(+), 7 deletions(-)

 diff --git a/arch/arm/cpu/armv7/cache_v7.c b/arch/arm/cpu/armv7/cache_v7.c
 index 0f9d837..e8ee875 100644
 --- a/arch/arm/cpu/armv7/cache_v7.c
 +++ b/arch/arm/cpu/armv7/cache_v7.c
 @@ -68,7 +68,7 @@ static void v7_inval_dcache_level_setway(u32 level, u32 
 num_sets,
 }
 }
 /* DSB to make sure the operation is complete */
 -   CP15DSB;
 +   DSB;
  }

  static void v7_clean_inval_dcache_level_setway(u32 level, u32 num_sets,
 @@ -96,7 +96,7 @@ static void v7_clean_inval_dcache_level_setway(u32 level, 
 u32 num_sets,
 }
 }
 /* DSB to make sure the operation is complete */
 -   CP15DSB;
 +   DSB;
  }

  static void v7_maint_dcache_level_setway(u32 level, u32 operation)
 @@ -215,7 +215,7 @@ static void v7_dcache_maint_range(u32 start, u32 stop, 
 u32 range_op)
 }

 /* DSB to make sure the operation is complete */
 -   CP15DSB;
 +   DSB;
  }

  /* Invalidate TLB */
 @@ -228,9 +228,9 @@ static void v7_inval_tlb(void)
 /* Invalidate entire instruction TLB */
 asm volatile (mcr p15, 0, %0, c8, c5, 0 : : r (0));
 /* Full system DSB - make sure that the invalidation is complete */
 -   CP15DSB;
 +   DSB;
 /* Full system ISB - make sure the instruction stream sees it */
 -   CP15ISB;
 +   ISB;
  }

  void invalidate_dcache_all(void)
 @@ -343,10 +343,10 @@ void invalidate_icache_all(void)
 asm volatile (mcr p15, 0, %0, c7, c5, 6 : : r (0));

 /* Full system DSB - make sure that the invalidation is complete */
 -   CP15DSB;
 +   DSB;

 /* ISB - make sure the instruction stream sees it */
 -   CP15ISB;
 +   ISB;
  }
  #else
  void invalidate_icache_all(void)
 diff --git a/arch/arm/include/asm/armv7.h b/arch/arm/include/asm/armv7.h
 index a13da23..189f3f0 100644
 --- a/arch/arm/include/asm/armv7.h
 +++ b/arch/arm/include/asm/armv7.h
 @@ -70,6 +70,16 @@
  #define CP15DSBasm volatile (mcr p15, 0, %0, c7, c10, 4 : : 
 r (0))
  #define CP15DMBasm volatile (mcr p15, 0, %0, c7, c10, 5 : : 
 r (0))

 +#ifdef __ARM_ARCH_7A__
 +#define ISBasm volatile (isb : : : memory)
 +#define DSBasm volatile (dsb : : : memory)
 +#define DMBasm volatile (dmb : : : memory)
 +#else
 +#define ISBCP15ISB
 +#define DSBCP15DSB
 +#define DMBCP15DMB
 +#endif
 +
  /*
   * Workaround for ARM errata # 798870
   * Set L2ACTLR[7] to reissue any memory transaction in the L2 that has been
 --
 1.9.3

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-- 
Nobuhiro Iwamatsu
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Re: [U-Boot] [PATCH v2 0/3] Boot from the bootable paritions

[Sjoerd Simons]

+ Corrected Tom Rini's e-mail address

On Wed, 2015-03-18 at 08:45 +0100, Sjoerd Simons wrote:
 The release of -rc4 reminded me that i never got around to pinging about
 this set:
 
 On Wed, 2015-02-25 at 23:23 +0100, Sjoerd Simons wrote:
  In the discussion after the submission of the Let the distro boot command 
  scan
  all partitions patchset it became clear the general consensus was that
  u-boot should not simply scan all partitions but instead only partitions 
  with
  the bootable flag set, falling back to parition 1 as was previously done.
 
 As Hans de Goede already remarked for the first revision of this set,
 this patchset should probably be included in final v2015.04 to prevent
 the boot behaviour of the distro boot commands changing again post
 release.
 
 For reference, v2015.1 just tried from the first partition on the
 various devices, current master tries to boot from all partitions (due
 to one of my earlier patchsets) and with this patchset we again change
 to just booting from partitions with the boot flag set, falling back to
 the first partition (as was the consensus from the mailinglist
 discussion).
 
  This set of patches implements that
  
  Changes since v1:
* Make updated part list command more precise about what arguments 
  ordering
  it accepts.
  
  Sjoerd Simons (3):
part: Add support for list filtering on bootable partitions
config_cmd_default.h: Add 'env exists' command
config_distro_bootcmd.h: Prefer booting from bootable paritions
  
   common/cmd_part.c   | 53 
  +++--
   include/config_cmd_default.h|  1 +
   include/config_distro_bootcmd.h |  3 ++-
   3 files changed, 44 insertions(+), 13 deletions(-)
  
 
 


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[U-Boot] [PATCH] QE/DeepSleep: add QE deepsleep support for mpc85xx

[Zhao Qiang]

Muram will power off during deepsleep, and the microcode of qe
in muram will be lost, it should be reload when resume.

Signed-off-by: Zhao Qiang b45...@freescale.com
---
 arch/arm/include/asm/arch-ls102xa/config.h |  4 --
 board/freescale/common/mpc85xx_sleep.c |  8 +++
 drivers/qe/qe.c| 82 ++
 drivers/qe/qe.h|  6 +++
 include/linux/immap_qe.h   | 12 +
 5 files changed, 108 insertions(+), 4 deletions(-)

diff --git a/arch/arm/include/asm/arch-ls102xa/config.h 
b/arch/arm/include/asm/arch-ls102xa/config.h
index 25cc862..4f686e3 100644
--- a/arch/arm/include/asm/arch-ls102xa/config.h
+++ b/arch/arm/include/asm/arch-ls102xa/config.h
@@ -105,10 +105,6 @@
 
 #define DCU_LAYER_MAX_NUM  16
 
-#define QE_MURAM_SIZE  0x6000UL
-#define MAX_QE_RISC1
-#define QE_NUM_OF_SNUM 28
-
 #define CONFIG_SYS_FSL_SRDS_1
 
 #ifdef CONFIG_LS102XA
diff --git a/board/freescale/common/mpc85xx_sleep.c 
b/board/freescale/common/mpc85xx_sleep.c
index f924e7f..9e4132c 100644
--- a/board/freescale/common/mpc85xx_sleep.c
+++ b/board/freescale/common/mpc85xx_sleep.c
@@ -7,6 +7,9 @@
 #include common.h
 #include asm/immap_85xx.h
 #include sleep.h
+#ifdef CONFIG_U_QE
+#include ../../../drivers/qe/qe.h
+#endif
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -65,6 +68,11 @@ static void dp_resume_prepare(void)
disable_cpc_sram();
 #endif
enable_cpc();
+
+#ifdef CONFIG_U_QE
+   u_qe_resume();
+#endif
+
 }
 
 int fsl_dp_resume(void)
diff --git a/drivers/qe/qe.c b/drivers/qe/qe.c
index d24651b..84e1433 100644
--- a/drivers/qe/qe.c
+++ b/drivers/qe/qe.c
@@ -196,6 +196,18 @@ void u_qe_init(void)
 }
 #endif
 
+#ifdef CONFIG_U_QE
+void u_qe_resume(void)
+{
+   qe_map_t *qe_immrr;
+   uint qe_base = CONFIG_SYS_IMMR + QE_IMMR_OFFSET; /* QE immr base */
+   qe_immrr = (qe_map_t *)qe_base;
+
+   u_qe_firmware_resume((const void *)CONFIG_SYS_QE_FW_ADDR, qe_immrr);
+   out_be32(qe_immrr-iram.iready, QE_IRAM_READY);
+}
+#endif
+
 void qe_reset(void)
 {
qe_issue_cmd(QE_RESET, QE_CR_SUBBLOCK_INVALID,
@@ -580,6 +592,76 @@ int u_qe_upload_firmware(const struct qe_firmware 
*firmware)
 }
 #endif
 
+#ifdef CONFIG_U_QE
+int u_qe_firmware_resume(const struct qe_firmware *firmware, qe_map_t 
*qe_immrr)
+{
+   unsigned int i;
+   unsigned int j;
+   const struct qe_header *hdr;
+   const u32 *code;
+#ifdef CONFIG_DEEP_SLEEP
+#ifdef CONFIG_PPC
+   ccsr_gur_t __iomem *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
+#else
+   struct ccsr_gur __iomem *gur = (void *)CONFIG_SYS_FSL_GUTS_ADDR;
+#endif
+#endif
+
+   if (!firmware)
+   return -EINVAL;
+
+   hdr = firmware-header;
+
+   /* Check the magic */
+   if ((hdr-magic[0] != 'Q') || (hdr-magic[1] != 'E') ||
+   (hdr-magic[2] != 'F')) {
+#ifdef CONFIG_DEEP_SLEEP
+   setbits_be32(gur-devdisr, MPC85xx_DEVDISR_QE_DISABLE);
+#endif
+   return -EPERM;
+   }
+
+   /*
+* If the microcode calls for it, split the I-RAM.
+*/
+   if (!firmware-split) {
+   out_be16(qe_immrr-cp.cercr,
+in_be16(qe_immrr-cp.cercr) | QE_CP_CERCR_CIR);
+   }
+
+   /* Loop through each microcode. */
+   for (i = 0; i  firmware-count; i++) {
+   const struct qe_microcode *ucode = firmware-microcode[i];
+
+   /* Upload a microcode if it's present */
+   if (!ucode-code_offset)
+   return 0;
+
+   code = (const void *)firmware + be32_to_cpu(ucode-code_offset);
+
+   /* Use auto-increment */
+   out_be32(qe_immrr-iram.iadd, be32_to_cpu(ucode-iram_offset) |
+   QE_IRAM_IADD_AIE | QE_IRAM_IADD_BADDR);
+
+   for (i = 0; i  be32_to_cpu(ucode-count); i++)
+   out_be32(qe_immrr-iram.idata, be32_to_cpu(code[i]));
+
+   /* Program the traps for this processor */
+   for (j = 0; j  16; j++) {
+   u32 trap = be32_to_cpu(ucode-traps[j]);
+
+   if (trap)
+   out_be32(qe_immrr-rsp[i].tibcr[j], trap);
+   }
+
+   /* Enable traps */
+   out_be32(qe_immrr-rsp[i].eccr, be32_to_cpu(ucode-eccr));
+   }
+
+   return 0;
+}
+#endif
+
 struct qe_firmware_info *qe_get_firmware_info(void)
 {
return qe_firmware_uploaded ? qe_firmware_info : NULL;
diff --git a/drivers/qe/qe.h b/drivers/qe/qe.h
index 33878f8..77b18e9 100644
--- a/drivers/qe/qe.h
+++ b/drivers/qe/qe.h
@@ -11,6 +11,9 @@
 #define __QE_H__
 
 #include common.h
+#ifdef CONFIG_U_QE
+#include linux/immap_qe.h
+#endif
 
 #define QE_NUM_OF_BRGS 16
 #define UCC_MAX_NUM8
@@ -288,6 +291,9 @@ void qe_reset(void);
 #ifdef CONFIG_U_QE
 void u_qe_init(void);
 int u_qe_upload_firmware(const struct 

[U-Boot] [PATCH] mpc85xx/T104xD4RDB: Add T104xD4RDB boards support

[Vijay Rai]

T1040D4RDB is a Freescale reference board that hosts the T1040 SoC.
T1040D4RDB is re-designed T1040RDB board with following changes :
- Support of DDR4 memory
- Support of 0x66 serdes protocol which can support following interfaces
- 2 RGMII's on DTSEC4, DTSEC5
- 1 SGMII on DTSEC3
- Support of QE-TDM

Similarily T1042D4RDB is a Freescale reference board that hosts the T1040
SoC. T1042D4RDB is re-designed T1042RDB board with following changes :
- Support of DDR4 memory
- Support for 0x86 serdes protocol which can support following interfaces
- 2 RGMII's on DTSEC4, DTSEC5
- 3 SGMII on DTSEC1, DTSEC2  DTSEC3
- Support of DIU

Signed-off-by: Vijay Rai vijay@freescale.com
Signed-off-by: Priyanka Jain priyanka.j...@freescale.com
---
changes from v2:
 - adds SGMII suport using CPLD
 - removes extra endif
changes from v3:
 - removes checkpatch error
changes from v4:
 - wrong use of defined MACRO in eth.c file, adds macro properly
changes from v5:
 - updates README files, t1040d4_rcw.cfg and t1042d4_rcw.cfg 
 - update DDR settings
 
board/freescale/t104xrdb/MAINTAINERS |8 
 board/freescale/t104xrdb/README  |   75 --
 board/freescale/t104xrdb/cpld.h  |2 +
 board/freescale/t104xrdb/ddr.c   |6 +++
 board/freescale/t104xrdb/ddr.h   |9 +++-
 board/freescale/t104xrdb/eth.c   |   20 +++-
 board/freescale/t104xrdb/t1040d4_rcw.cfg |7 +++
 board/freescale/t104xrdb/t1042d4_rcw.cfg |7 +++
 board/freescale/t104xrdb/t104xrdb.c  |   21 +
 configs/T1040D4RDB_NAND_defconfig|5 ++
 configs/T1040D4RDB_SDCARD_defconfig  |5 ++
 configs/T1040D4RDB_SPIFLASH_defconfig|5 ++
 configs/T1040D4RDB_defconfig |4 ++
 configs/T1042D4RDB_NAND_defconfig|5 ++
 configs/T1042D4RDB_SDCARD_defconfig  |5 ++
 configs/T1042D4RDB_SPIFLASH_defconfig|5 ++
 configs/T1042D4RDB_defconfig |4 ++
 include/configs/T104xRDB.h   |   42 +
 18 files changed, 220 insertions(+), 15 deletions(-)
 create mode 100644 board/freescale/t104xrdb/t1040d4_rcw.cfg
 create mode 100644 board/freescale/t104xrdb/t1042d4_rcw.cfg
 create mode 100644 configs/T1040D4RDB_NAND_defconfig
 create mode 100644 configs/T1040D4RDB_SDCARD_defconfig
 create mode 100644 configs/T1040D4RDB_SPIFLASH_defconfig
 create mode 100644 configs/T1040D4RDB_defconfig
 create mode 100644 configs/T1042D4RDB_NAND_defconfig
 create mode 100644 configs/T1042D4RDB_SDCARD_defconfig
 create mode 100644 configs/T1042D4RDB_SPIFLASH_defconfig
 create mode 100644 configs/T1042D4RDB_defconfig

diff --git a/board/freescale/t104xrdb/MAINTAINERS 
b/board/freescale/t104xrdb/MAINTAINERS
index 13d9be9..32e044f 100644
--- a/board/freescale/t104xrdb/MAINTAINERS
+++ b/board/freescale/t104xrdb/MAINTAINERS
@@ -6,7 +6,13 @@ F: include/configs/T104xRDB.h
 F: configs/T1040RDB_defconfig
 F: configs/T1040RDB_NAND_defconfig
 F: configs/T1040RDB_SPIFLASH_defconfig
+F: configs/T1040D4RDB_defconfig
+F: configs/T1040D4RDB_NAND_defconfig
+F: configs/T1040D4RDB_SPIFLASH_defconfig
 F: configs/T1042RDB_defconfig
+F: configs/T1042D4RDB_defconfig
+F: configs/T1042D4RDB_NAND_defconfig
+F: configs/T1042D4RDB_SPIFLASH_defconfig
 F: configs/T1042RDB_PI_defconfig
 F: configs/T1042RDB_PI_NAND_defconfig
 F: configs/T1042RDB_PI_SPIFLASH_defconfig
@@ -15,6 +21,8 @@ T1040RDB_SDCARD BOARD
 #M:-
 S: Maintained
 F: configs/T1040RDB_SDCARD_defconfig
+F: configs/T1040D4RDB_SDCARD_defconfig
+F: configs/T1042D4RDB_SDCARD_defconfig
 F: configs/T1042RDB_PI_SDCARD_defconfig
 
 T1040RDB_SECURE_BOOT BOARD
diff --git a/board/freescale/t104xrdb/README b/board/freescale/t104xrdb/README
index ac95b5e..66538e2 100644
--- a/board/freescale/t104xrdb/README
+++ b/board/freescale/t104xrdb/README
@@ -12,6 +12,17 @@ The T1042RDB_PI is a Freescale reference board that hosts 
the T1042 SoC.
 (a personality of T1040 SoC). The board is similar to T1040RDB but is
 designed specially with low power features targeted for Printing Image Market.
 
+The T1040D4RDB is a Freescale reference board that hosts the T1040 SoC.
+The board is re-designed T1040RDB board with following changes :
+- Support of DDR4 memory and some enhancements
+
+The T1042D4RDB is a Freescale reference board that hosts the T1042 SoC.
+The board is re-designed T1040RDB board with following changes :
+- Support of DDR4 memory
+- Support for 0x86 serdes protocol which can support following interfaces
+- 2 RGMII's on DTSEC4, DTSEC5
+- 3 SGMII on DTSEC1, DTSEC2  DTSEC3
+
 Basic difference's among T1040RDB, T1042RDB_PI, T1042RDB
 -
 Board  Si  ProtocolTargeted Market
@@ -19,6 +30,8 @@ Board Si  

Re: [U-Boot] [PATCH v3] powerpc/t1023rdb: Add T1023 RDB board support

[prabha...@freescale.com]

 -Original Message-
 From: U-Boot [mailto:u-boot-boun...@lists.denx.de] On Behalf Of Shengzhou Liu
 Sent: Monday, March 16, 2015 3:07 PM
 To: u-boot@lists.denx.de; Sun York-R58495
 Subject: [U-Boot] [PATCH v3] powerpc/t1023rdb: Add T1023 RDB board support
 
 T1023RDB is a Freescale Reference Design Board that hosts the T1023 SoC.
 
 T1023RDB board Overview
 ---
 - T1023 SoC integrating two 64-bit e5500 cores up to 1.4GHz
 - CoreNet fabric supporting coherent and noncoherent transactions with
   prioritization and bandwidth allocation
 - SDRAM memory: 2GB Micron MT40A512M8HX unbuffered 32-bit DDR4 without
 ECC
 - Accelerator: DPAA components consist of FMan, BMan, QMan, DCE and SEC
 - Ethernet interfaces:
   - one 1G RGMII port on-board(RTL8211F PHY)
   - one 1G SGMII port on-board(RTL8211F PHY)
   - one 2.5G SGMII port on-board(AQR105 PHY)
 - PCIe: Two Mini-PCIe connectors on-board.
 - SerDes: 4 lanes up to 10.3125GHz
 - NOR:  128MB S29GL01GS110TFIV10 Spansion NOR Flash
 - NAND: 512MB S34MS04G200BFI000 Spansion NAND Flash
 - eSPI: 64MB S25FL512SAGMFI010 Spansion SPI flash.
 - USB: one Type-A USB 2.0 port with internal PHY
 - eSDHC: support SD/MMC and eMMC card
 - 256Kbit M24256 I2C EEPROM
 - RTC: Real-time clock DS1339 on I2C bus
 - UART: one serial port on-board with RJ45 connector
 - Debugging: JTAG/COP for T1023 debugging
 
 As well updated T1024RDB to add T1023RDB.

 
 Signed-off-by: Shengzhou Liu shengzhou@freescale.com
 ---
 v3: updated readme.
 v2: updated the printout of serdes refclk.
 
  board/freescale/t102xrdb/Makefile   |  2 +-
  board/freescale/t102xrdb/README | 96 ++
 ---
  board/freescale/t102xrdb/eth_t102xrdb.c | 23 ++--
 board/freescale/t102xrdb/t1023_rcw.cfg  |  8 +++
  board/freescale/t102xrdb/t102xrdb.c | 93
 ++--
  board/freescale/t102xrdb/t102xrdb.h |  4 +-
  include/configs/T102xRDB.h  | 73 +
  7 files changed, 262 insertions(+), 37 deletions(-)  create mode 100644
 board/freescale/t102xrdb/t1023_rcw.cfg
 
 diff --git a/board/freescale/t102xrdb/Makefile
 b/board/freescale/t102xrdb/Makefile
 index a0cf8f6..0520066 100644
 --- a/board/freescale/t102xrdb/Makefile
 +++ b/board/freescale/t102xrdb/Makefile
 @@ -8,7 +8,7 @@ ifdef CONFIG_SPL_BUILD
  obj-y += spl.o
  else
  obj-y   += t102xrdb.o
 -obj-y   += cpld.o
 +obj-$(CONFIG_T1024RDB)   += cpld.o
  obj-y   += eth_t102xrdb.o
  obj-$(CONFIG_PCI)   += pci.o
  endif
 diff --git a/board/freescale/t102xrdb/README
 b/board/freescale/t102xrdb/README index 2b17f50..35edfbd 100644
 --- a/board/freescale/t102xrdb/README
 +++ b/board/freescale/t102xrdb/README
 @@ -98,6 +98,29 @@ T1024RDB board Overview
   - Four I2C ports
 
 
 +T1023RDB board Overview
 +---
 +- T1023 SoC integrating two 64-bit e5500 cores up to 1.4GHz
 +- CoreNet fabric supporting coherent and noncoherent transactions with
 +  prioritization and bandwidth allocation
 +- SDRAM memory: 2GB Micron MT40A512M8HX unbuffered 32-bit DDR4 w/o
 ECC
 +- Accelerator: DPAA components consist of FMan, BMan, QMan, DCE and SEC
 +- Ethernet interfaces:
 +  - one 1G RGMII port on-board(RTL8211FS PHY)
 +  - one 1G SGMII port on-board(RTL8211FS PHY)
 +  - one 2.5G SGMII port on-board(AQR105 PHY)
 +- PCIe: Two Mini-PCIe connectors on-board.
 +- SerDes: 4 lanes up to 10.3125GHz
 +- NOR:  128MB S29GL01GS110TFIV10 Spansion NOR Flash
 +- NAND: 512MB S34MS04G200BFI000 Spansion NAND Flash
 +- eSPI: 64MB S25FL512SAGMFI010 Spansion SPI flash.
 +- USB: one Type-A USB 2.0 port with internal PHY
 +- eSDHC: support SD/MMC and eMMC card
 +- 256Kbit M24256 I2C EEPROM
 +- RTC: Real-time clock DS1339U on I2C bus
 +- UART: one serial port on-board with RJ45 connector
 +- Debugging: JTAG/COP for T1023 debugging
 +
  Memory map on T1024RDB
  --
  Start Address  End Address  Description  Size
 @@ -124,22 +147,32 @@ Start Address   End Address Definition
   Max size
  0xEFF2  0xEFF3  u-boot env (current bank)128KB
  0xEFF0  0xEFF1  FMAN Ucode (current bank)128KB
  0xEFE0  0xEFE3  QE firmware (current bank)   256KB
 -0xED30  0xEFEF  rootfs (alt bank)44MB
 +0xED30  0xEFDF  rootfs (alt bank)44MB
 +0xED00  0xED2F  Guest image #3 (alternate bank) 3MB
 +0xECD0  0xECFF  Guest image #2 (alternate bank) 3MB
 +0xECA0   0xECCF  Guest image #1 (alternate bank) 3MB
 +0xEC90   0xEC9F  HV config device tree(alt bank) 1MB
  0xEC80  0xEC8F  Hardware device tree (alt bank) 1MB
 -0xEC02  0xEC7F  Linux.uImage (alt bank)  7MB + 
 875KB
 +0xEC70   0xEC7F  HV.uImage (alternate bank)  1MB
 +0xEC02  0xEC6F  Linux.uImage (alt bank)  ~7MB
  0xEC00  0xEC01  RCW 

Re: [U-Boot] [PATCH] usb: ci_udc: fix warnings on 64-bit builds

[Marek Vasut]

On Tuesday, March 17, 2015 at 09:46:35 PM, Rob Herring wrote:
 Change addresses to unsigned long to be compatible with 64-bit builds.
 Regardless of fixing warnings, the device is still only 32-bit capable.
 
 Signed-off-by: Rob Herring r...@kernel.org
 Cc: Łukasz Majewski l.majew...@samsung.com
 Cc: Marek Vasut ma...@denx.de

Applied, thanks!

Best regards,
Marek Vasut
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Re: [U-Boot] [PATCH 11/13] usb: ehci-hcd: Build warning fixes for 64-bit

[Marek Vasut]

On Friday, March 20, 2015 at 12:41:26 PM, Thierry Reding wrote:
 From: Thierry Reding tred...@nvidia.com
 
 Fix a slew of pointer to integer cast size mismatch warnings caused by
 this driver explicitly casting pointers to 32-bit integers. While it is
 true that the hardware can only deal with 32-bit addresses, truncating
 using a cast isn't the right solution because the pointer could still be
 outside of the space addressable using 32-bit addresses.
 
 Cc: Marek Vasut ma...@denx.de
 Signed-off-by: Thierry Reding tred...@nvidia.com

I'll be picking the one from Rob here instead.

Best regards,
Marek Vasut
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[U-Boot] [PATCH] sunxi: set GMAC TX delay = 0x1 on Cubietruck.

[Ian Campbell]

Of 4 boards in our automated test system 2 do not have reliable
networking with the default TX delay of 0x0. Increasing to 0x1 seems
to make things reliable on all 4 boards.

Some previous ad-hpoc tests with tx delay set to 0, 1, 2 and 3 on one
of the problematic boards showed:

0: mw.l 0x1c20164 0x006 1 -- t/o in 4/5 tftp runs
1: mw.l 0x1c20164 0x406 1 -- t/o in 1/5 tftp runs
2: mw.l 0x1c20164 0x806 1 -- t/o in 1/5 tftp runs
3: mw.l 0x1c20164 0xc06 1 -- t/o many times in first tftp run

For 0, 1 and 2 t/o means one or two T glitches in the download,
but it did complete. For 3 those were basically continuous and it
couldn't complete.

tftp was of a 16M initrd.

Signed-off-by: Ian Campbell ian.campb...@citrix.com
---
NB, Unlike the normal typo I actually mean to use my citrix address
here, since this was done for/at work.

Actual testing was done on v2014.10 with the same direct write hack as
BananaPi had in that release (but with value == 1), I can't easily
upgrade the remove machines to something newer. The affect of this
patch is the same and has been tested on a local board, which didn't
have problems to start with however.
---
 configs/Cubietruck_defconfig | 1 +
 1 file changed, 1 insertion(+)

diff --git a/configs/Cubietruck_defconfig b/configs/Cubietruck_defconfig
index 5c23bc7..fa48331 100644
--- a/configs/Cubietruck_defconfig
+++ b/configs/Cubietruck_defconfig
@@ -1,6 +1,7 @@
 CONFIG_SPL=y
 
CONFIG_SYS_EXTRA_OPTIONS=AXP209_POWER,SUNXI_GMAC,RGMII,AHCI,SATAPWR=SUNXI_GPH(12),USB_EHCI
 CONFIG_FDTFILE=sun7i-a20-cubietruck.dtb
+CONFIG_GMAC_TX_DELAY=1
 CONFIG_VIDEO_VGA=y
 CONFIG_ARM=y
 CONFIG_ARCH_SUNXI=y
-- 
2.1.4

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Re: [U-Boot] [PATCH 1/2 v1] sf: probe: Add support Atmel AT45DB series devices special commands

[Peng Fan]

Hi Haikun,

On 3/25/2015 8:35 PM, Haikun Wang wrote:

From: Haikun Wang haikun.w...@freescale.com

Atmel AT45DB series devices commands is different from common spi flash
commands. This patch add support for AT45DB special commands.
Add a flag AT45DB_CMD to control whether use those commands.

Signed-off-by: Haikun Wang haikun.w...@freescale.com
---

Changes in v1: None

  drivers/mtd/spi/sf_internal.h |  7 +++
  drivers/mtd/spi/sf_ops.c  |  2 +-
  drivers/mtd/spi/sf_probe.c| 10 ++
  3 files changed, 18 insertions(+), 1 deletion(-)

diff --git a/drivers/mtd/spi/sf_internal.h b/drivers/mtd/spi/sf_internal.h
index 785f7a9..234af21 100644
--- a/drivers/mtd/spi/sf_internal.h
+++ b/drivers/mtd/spi/sf_internal.h
@@ -43,6 +43,7 @@ enum {
SST_BP  = 1  3,
SST_WP  = 1  4,
WR_QPP  = 1  5,
+   AT45DB_CMD  = 1  6,
  };
  
  #define SST_WR		(SST_BP | SST_WP)

@@ -106,6 +107,12 @@ enum {
  #define SPI_FLASH_PAGE_ERASE_TIMEOUT  (5 * CONFIG_SYS_HZ)
  #define SPI_FLASH_SECTOR_ERASE_TIMEOUT(10 * CONFIG_SYS_HZ)
  
+/* Atmel AT45DB specific */

+#define CMD_ATMEL_PAGE_PROGRAM 0x82

Why not use 0x2 to align with current mtd/spi framework?

+#define CMD_ATMEL_READ_STATUS  0xd7
+#define CMD_ATMEL_FLAG_STATUS  0xd7
+#define CMD_ATMEL_BLK_ERASE0x50
+
  /* SST specific */
  #ifdef CONFIG_SPI_FLASH_SST
  # define CMD_SST_BP   0x02/* Byte Program */
diff --git a/drivers/mtd/spi/sf_ops.c b/drivers/mtd/spi/sf_ops.c
index 34bc54e..27ce5f9 100644
--- a/drivers/mtd/spi/sf_ops.c
+++ b/drivers/mtd/spi/sf_ops.c
@@ -165,7 +165,7 @@ int spi_flash_cmd_wait_ready(struct spi_flash *flash, 
unsigned long timeout)
u8 poll_bit = STATUS_WIP;
u8 cmd = flash-poll_cmd;
  
-	if (cmd == CMD_FLAG_STATUS) {

+   if (cmd == CMD_FLAG_STATUS || cmd == CMD_ATMEL_FLAG_STATUS) {
poll_bit = STATUS_PEC;
check_status = poll_bit;
}
diff --git a/drivers/mtd/spi/sf_probe.c b/drivers/mtd/spi/sf_probe.c
index 4103723..2ccddf2 100644
--- a/drivers/mtd/spi/sf_probe.c
+++ b/drivers/mtd/spi/sf_probe.c
@@ -226,6 +226,16 @@ static int spi_flash_validate_params(struct spi_slave 
*spi, u8 *idcode,
flash-poll_cmd = CMD_FLAG_STATUS;
  #endif
  
+#ifdef CONFIG_SPI_FLASH_ATMEL

+   if (params-flags  AT45DB_CMD) {
+   flash-poll_cmd = CMD_ATMEL_READ_STATUS;
+   flash-write_cmd = CMD_ATMEL_PAGE_PROGRAM;
+   /* use block-erase command, eight pages */
+   flash-erase_cmd = CMD_ATMEL_BLK_ERASE;
+   flash-erase_size = flash-page_size * 8;
+   }
+#endif
+
The SPI Flash's default page size is 264 bytes, but mtd/spi framework 
supports 256 and 512 bytes for one page. In your patch, you does not 
handle such case, can your driver works as expected?

/* Configure the BAR - discover bank cmds and read current bank */
  #ifdef CONFIG_SPI_FLASH_BAR
u8 curr_bank = 0;

Regards,
Peng.
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Re: [U-Boot] [PATCH 08/13] usb: eth: asix: Build warning fixes for 64-bit

[Marek Vasut]

On Friday, March 20, 2015 at 12:41:23 PM, Thierry Reding wrote:
 From: Thierry Reding tred...@nvidia.com
 
 Fix a type mismatch in a printf format string.
 
 Cc: Marek Vasut ma...@denx.de
 Signed-off-by: Thierry Reding tred...@nvidia.com
 ---
  drivers/usb/eth/asix.c | 2 +-
  1 file changed, 1 insertion(+), 1 deletion(-)
 
 diff --git a/drivers/usb/eth/asix.c b/drivers/usb/eth/asix.c
 index 11811094ede8..1cd179baaea7 100644
 --- a/drivers/usb/eth/asix.c
 +++ b/drivers/usb/eth/asix.c
 @@ -475,7 +475,7 @@ static int asix_send(struct eth_device *eth, void
 *packet, int length) length + sizeof(packet_len),
   actual_len,
   USB_BULK_SEND_TIMEOUT);
 - debug(Tx: len = %u, actual = %u, err = %d\n,
 + debug(Tx: len = %zu, actual = %u, err = %d\n,
   length + sizeof(packet_len), actual_len, err);
 
   return err;

Applied, thanks!

Best regards,
Marek Vasut
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Re: [U-Boot] [PATCH] ehci-hcd: fix warnings on 64-bit builds

[Marek Vasut]

On Tuesday, March 17, 2015 at 09:46:37 PM, Rob Herring wrote:
 Change addresses to unsigned long to be compatible with 64-bit builds.
 Regardless of fixing warnings, the device is still only 32-bit capable.
 
 Signed-off-by: Rob Herring r...@kernel.org
 Cc: Marek Vasut ma...@denx.de

Applied, thanks!

Best regards,
Marek Vasut
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[U-Boot] [PATCH 2/5 v2] dm: ls1021a: Bring in ls1021a dts files from linux kernel

[Haikun Wang]

From: haikun haikun.w...@freescale.com

Bring in required device tree files for ls1021a from Linux.
These are initially unchanged and have a number of pieces not needed by U-Boot.

Signed-off-by: Haikun Wang haikun.w...@freescale.com
---

Changes in v2:
- Use CONFIG_LS102XA in arch/arm/dts/Makefile

Changes in v1: None

 arch/arm/dts/Makefile|   3 +
 arch/arm/dts/ls1021a-qds.dts | 201 +++
 arch/arm/dts/ls1021a-twr.dts |  88 ++
 arch/arm/dts/ls1021a.dtsi| 370 +++
 4 files changed, 662 insertions(+)
 create mode 100644 arch/arm/dts/ls1021a-qds.dts
 create mode 100644 arch/arm/dts/ls1021a-twr.dts
 create mode 100644 arch/arm/dts/ls1021a.dtsi

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index cbe5b86..c326707 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -54,6 +54,9 @@ dtb-$(CONFIG_SOCFPGA) +=  \
socfpga_cyclone5_socdk.dtb  \
socfpga_cyclone5_socrates.dtb
 
+dtb-$(CONFIG_LS102XA) += ls1021a-qds.dtb \
+   ls1021a-twr.dtb
+
 targets += $(dtb-y)
 
 DTC_FLAGS += -R 4 -p 0x1000
diff --git a/arch/arm/dts/ls1021a-qds.dts b/arch/arm/dts/ls1021a-qds.dts
new file mode 100644
index 000..c89f85e
--- /dev/null
+++ b/arch/arm/dts/ls1021a-qds.dts
@@ -0,0 +1,201 @@
+/*
+ * Freescale ls1021a QDS board device tree source
+ *
+ * Copyright 2013-2015 Freescale Semiconductor, Inc.
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+/dts-v1/;
+#include ls1021a.dtsi
+
+/ {
+   model = LS1021A QDS Board;
+
+   aliases {
+   enet0_rgmii_phy = rgmii_phy1;
+   enet1_rgmii_phy = rgmii_phy2;
+   enet2_rgmii_phy = rgmii_phy3;
+   enet0_sgmii_phy = sgmii_phy1c;
+   enet1_sgmii_phy = sgmii_phy1d;
+   };
+};
+
+dspi0 {
+   bus-num = 0;
+   status = okay;
+
+   dspiflash: at45db021d@0 {
+   #address-cells = 1;
+   #size-cells = 1;
+   compatible = atmel,at45db021d, atmel,at45, 
atmel,dataflash;
+   spi-max-frequency = 1600;
+   spi-cpol;
+   spi-cpha;
+   reg = 0;
+   };
+};
+
+i2c0 {
+   status = okay;
+
+   pca9547: mux@77 {
+   reg = 0x77;
+   #address-cells = 1;
+   #size-cells = 0;
+
+   i2c@0 {
+   #address-cells = 1;
+   #size-cells = 0;
+   reg = 0x0;
+
+   ds3232: rtc@68 {
+   compatible = dallas,ds3232;
+   reg = 0x68;
+   interrupts = GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH;
+   };
+   };
+
+   i2c@2 {
+   #address-cells = 1;
+   #size-cells = 0;
+   reg = 0x2;
+
+   ina220@40 {
+   compatible = ti,ina220;
+   reg = 0x40;
+   shunt-resistor = 1000;
+   };
+
+   ina220@41 {
+   compatible = ti,ina220;
+   reg = 0x41;
+   shunt-resistor = 1000;
+   };
+   };
+
+   i2c@3 {
+   #address-cells = 1;
+   #size-cells = 0;
+   reg = 0x3;
+
+   eeprom@56 {
+   compatible = atmel,24c512;
+   reg = 0x56;
+   };
+
+   eeprom@57 {
+   compatible = atmel,24c512;
+   reg = 0x57;
+   };
+
+   adt7461a@4c {
+   compatible = adi,adt7461a;
+   reg = 0x4c;
+   };
+   };
+   };
+};
+
+ifc {
+   #address-cells = 2;
+   #size-cells = 1;
+   /* NOR, NAND Flashes and FPGA on board */
+   ranges = 0x0 0x0 0x0 0x6000 0x0800
+ 0x2 0x0 0x0 0x7e80 0x0001
+ 0x3 0x0 0x0 0x7fb0 0x0100;
+   status = okay;
+
+   nor@0,0 {
+   #address-cells = 1;
+   #size-cells = 1;
+   compatible = cfi-flash;
+   reg = 0x0 0x0 0x800;
+   bank-width = 2;
+   device-width = 1;
+   };
+
+   fpga: board-control@3,0 {
+   #address-cells = 1;
+   #size-cells = 1;
+   compatible = simple-bus;
+   reg = 0x3 0x0 0x100;
+   bank-width = 1;
+   device-width = 1;
+   ranges = 0 3 0 0x100;
+
+   mdio-mux-emi1 {
+   compatible 

[U-Boot] [PATCH 6/6] ARM: vf610: Initial integration for Colibri VF50/VF61

[Sanchayan Maity]

This adds initial support for Colibri VF50/VF61 based on Freescale
Vybrid SoC.

- CPU clocked at 396/500 MHz
- DDR3 at 396MHz
  - for VF50, use PLL2 as memory clock (synchronous mode)
  - for VF61, use PLL1 as memory clock (asynchronous mode)
- Console on UART0 (Colibri UART_A)
- Ethernet on FEC1
- PLL5 based RMII clocking (E.g. No external crystal)
- UART_A and UART_C I/O muxing
- Boot from NAND by default
- USB host and client support

Tested on Colibri VF50/VF61 booting using serial loader over UART.

Signed-off-by: Stefan Agner ste...@agner.ch
Signed-off-by: Sanchayan Maity maitysancha...@gmail.com
---
 arch/arm/Kconfig   |   5 +
 arch/arm/include/asm/arch-vf610/imx-regs.h |   5 +
 board/toradex/colibri_vf/Kconfig   |  18 ++
 board/toradex/colibri_vf/MAINTAINERS   |   6 +
 board/toradex/colibri_vf/Makefile  |   7 +
 board/toradex/colibri_vf/colibri_vf.c  | 389 +
 board/toradex/colibri_vf/imximage.cfg  |  17 ++
 configs/colibri_vf_defconfig   |   3 +
 include/configs/colibri_vf.h   | 266 
 9 files changed, 716 insertions(+)
 create mode 100644 board/toradex/colibri_vf/Kconfig
 create mode 100644 board/toradex/colibri_vf/MAINTAINERS
 create mode 100644 board/toradex/colibri_vf/Makefile
 create mode 100644 board/toradex/colibri_vf/colibri_vf.c
 create mode 100644 board/toradex/colibri_vf/imximage.cfg
 create mode 100644 configs/colibri_vf_defconfig
 create mode 100644 include/configs/colibri_vf.h

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index b9ebee1..96316d0 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -609,6 +609,10 @@ config TARGET_VF610TWR
bool Support vf610twr
select CPU_V7
 
+config TARGET_COLIBRI_VF
+   bool Support Colibri VF50/61
+   select CPU_V7
+
 config ZYNQ
bool Xilinx Zynq Platform
select CPU_V7
@@ -863,6 +867,7 @@ source board/ti/ti814x/Kconfig
 source board/ti/ti816x/Kconfig
 source board/timll/devkit3250/Kconfig
 source board/toradex/colibri_pxa270/Kconfig
+source board/toradex/colibri_vf/Kconfig
 source board/tqc/tqma6/Kconfig
 source board/trizepsiv/Kconfig
 source board/ttcontrol/vision2/Kconfig
diff --git a/arch/arm/include/asm/arch-vf610/imx-regs.h 
b/arch/arm/include/asm/arch-vf610/imx-regs.h
index 26057fe..a7d765a 100644
--- a/arch/arm/include/asm/arch-vf610/imx-regs.h
+++ b/arch/arm/include/asm/arch-vf610/imx-regs.h
@@ -267,6 +267,11 @@
 #define SRC_SRSR_WDOG_M4   (0x1  4)
 #define SRC_SRSR_WDOG_A5   (0x1  3)
 #define SRC_SRSR_POR_RST   (0x1  0)
+#define SRC_SBMR2_BMOD_MASK (0x3  24)
+#define SRC_SBMR2_BMOD_SHIFT24
+#define SRC_SBMR2_BMOD_FUSES0x0
+#define SRC_SBMR2_BMOD_SERIAL   0x1
+#define SRC_SBMR2_BMOD_RCON 0x2
 
 /* Slow Clock Source Controller Module (SCSC) */
 #define SCSC_SOSC_CTR_SOSC_EN0x1
diff --git a/board/toradex/colibri_vf/Kconfig b/board/toradex/colibri_vf/Kconfig
new file mode 100644
index 000..2c3cb30
--- /dev/null
+++ b/board/toradex/colibri_vf/Kconfig
@@ -0,0 +1,18 @@
+if TARGET_COLIBRI_VF
+
+config SYS_CPU
+   default armv7
+
+config SYS_BOARD
+   default colibri_vf
+
+config SYS_VENDOR
+   default toradex
+
+config SYS_SOC
+   default vf610
+
+config SYS_CONFIG_NAME
+   default colibri_vf
+
+endif
diff --git a/board/toradex/colibri_vf/MAINTAINERS 
b/board/toradex/colibri_vf/MAINTAINERS
new file mode 100644
index 000..551c575
--- /dev/null
+++ b/board/toradex/colibri_vf/MAINTAINERS
@@ -0,0 +1,6 @@
+Colibri VFxx
+M: Stefan Agner stefan.ag...@toradex.com
+S: Maintained
+F: board/toradex/colibri_vf/
+F: include/configs/colibri_vf.h
+F: configs/colibri_vf_defconfig
diff --git a/board/toradex/colibri_vf/Makefile 
b/board/toradex/colibri_vf/Makefile
new file mode 100644
index 000..c7e5134
--- /dev/null
+++ b/board/toradex/colibri_vf/Makefile
@@ -0,0 +1,7 @@
+#
+# Copyright 2013 Freescale Semiconductor, Inc.
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+obj-y  := colibri_vf.o
diff --git a/board/toradex/colibri_vf/colibri_vf.c 
b/board/toradex/colibri_vf/colibri_vf.c
new file mode 100644
index 000..62f3013
--- /dev/null
+++ b/board/toradex/colibri_vf/colibri_vf.c
@@ -0,0 +1,389 @@
+/*
+ * Copyright 2015 Toradex, Inc.
+ *
+ * Based on vf610twr.c:
+ * Copyright 2013 Freescale Semiconductor, Inc.
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include common.h
+#include asm/io.h
+#include asm/arch/imx-regs.h
+#include asm/arch/iomux-vf610.h
+#include asm/arch/ddrmc-vf610.h
+#include asm/arch/crm_regs.h
+#include asm/arch/clock.h
+#include mmc.h
+#include fsl_esdhc.h
+#include miiphy.h
+#include netdev.h
+#include i2c.h
+#include g_dnl.h
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#define UART_PAD_CTRL  (PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \
+   PAD_CTL_DSE_25ohm 

[U-Boot] [PATCH 2/6] ARM: vf610: Enable external 32KHz oscillator

[Sanchayan Maity]

From: Stefan Agner ste...@agner.ch

Enable the SCSC (Slow Clock Source Controller) and select the external
32KHz oscillator. This improves the accuracy of the RTC.

Signed-off-by: Stefan Agner ste...@agner.ch
Signed-off-by: Sanchayan Maity maitysancha...@gmail.com
---
 arch/arm/include/asm/arch-vf610/crm_regs.h |  1 +
 arch/arm/include/asm/arch-vf610/imx-regs.h | 11 ++-
 board/freescale/vf610twr/vf610twr.c| 13 -
 3 files changed, 23 insertions(+), 2 deletions(-)

diff --git a/arch/arm/include/asm/arch-vf610/crm_regs.h 
b/arch/arm/include/asm/arch-vf610/crm_regs.h
index 724682c..78708e2 100644
--- a/arch/arm/include/asm/arch-vf610/crm_regs.h
+++ b/arch/arm/include/asm/arch-vf610/crm_regs.h
@@ -199,6 +199,7 @@ struct anadig_reg {
 #define CCM_CCGR2_PORTD_CTRL_MASK  (0x3  24)
 #define CCM_CCGR2_PORTE_CTRL_MASK  (0x3  26)
 #define CCM_CCGR3_ANADIG_CTRL_MASK 0x3
+#define CCM_CCGR3_SCSC_CTRL_MASK(0x3  4)
 #define CCM_CCGR4_WKUP_CTRL_MASK   (0x3  20)
 #define CCM_CCGR4_CCM_CTRL_MASK(0x3  22)
 #define CCM_CCGR4_GPC_CTRL_MASK(0x3  24)
diff --git a/arch/arm/include/asm/arch-vf610/imx-regs.h 
b/arch/arm/include/asm/arch-vf610/imx-regs.h
index 866b303..aa60031 100644
--- a/arch/arm/include/asm/arch-vf610/imx-regs.h
+++ b/arch/arm/include/asm/arch-vf610/imx-regs.h
@@ -65,7 +65,7 @@
 #define QSPI0_BASE_ADDR(AIPS0_BASE_ADDR + 0x00044000)
 #define IOMUXC_BASE_ADDR   (AIPS0_BASE_ADDR + 0x00048000)
 #define ANADIG_BASE_ADDR   (AIPS0_BASE_ADDR + 0x0005)
-#define SCSCM_BASE_ADDR(AIPS0_BASE_ADDR + 0x00052000)
+#define SCSC_BASE_ADDR (AIPS0_BASE_ADDR + 0x00052000)
 #define ASRC_BASE_ADDR (AIPS0_BASE_ADDR + 0x0006)
 #define SPDIF_BASE_ADDR(AIPS0_BASE_ADDR + 0x00061000)
 #define ESAI_BASE_ADDR (AIPS0_BASE_ADDR + 0x00062000)
@@ -264,6 +264,9 @@
 #define SRC_SRSR_WDOG_A5   (0x1  3)
 #define SRC_SRSR_POR_RST   (0x1  0)
 
+/* Slow Clock Source Controller Module (SCSC) */
+#define SCSC_SOSC_CTR_SOSC_EN0x1
+
 #if !(defined(__KERNEL_STRICT_NAMES) || defined(__ASSEMBLY__))
 #include asm/types.h
 
@@ -448,6 +451,12 @@ struct mscm_ir {
u16 rsvd3[848];
 };
 
+/* SCSC */
+struct scsc_reg {
+   u32 sirc_ctr;
+   u32 sosc_ctr;
+};
+
 #endif /* __ASSEMBLER__*/
 
 #endif /* __ASM_ARCH_IMX_REGS_H__ */
diff --git a/board/freescale/vf610twr/vf610twr.c 
b/board/freescale/vf610twr/vf610twr.c
index eb27542..4160acd 100644
--- a/board/freescale/vf610twr/vf610twr.c
+++ b/board/freescale/vf610twr/vf610twr.c
@@ -227,7 +227,7 @@ static void clock_init(void)
CCM_CCGR2_PORTD_CTRL_MASK | CCM_CCGR2_PORTE_CTRL_MASK |
CCM_CCGR2_QSPI0_CTRL_MASK);
clrsetbits_le32(ccm-ccgr3, CCM_REG_CTRL_MASK,
-   CCM_CCGR3_ANADIG_CTRL_MASK);
+   CCM_CCGR3_ANADIG_CTRL_MASK | CCM_CCGR3_SCSC_CTRL_MASK);
clrsetbits_le32(ccm-ccgr4, CCM_REG_CTRL_MASK,
CCM_CCGR4_WKUP_CTRL_MASK | CCM_CCGR4_CCM_CTRL_MASK |
CCM_CCGR4_GPC_CTRL_MASK | CCM_CCGR4_I2C0_CTRL_MASK);
@@ -308,9 +308,20 @@ int board_early_init_f(void)
 
 int board_init(void)
 {
+   struct scsc_reg *scsc = (struct scsc_reg *)SCSC_BASE_ADDR;
+
/* address of boot parameters */
gd-bd-bi_boot_params = PHYS_SDRAM + 0x100;
 
+   /*
+* Enable external 32K Oscillator
+*
+* The internal clock experiences significant drift
+* so we must use the external oscillator in order
+* to maintain correct time in the hwclock
+*/
+   setbits_le32(scsc-sosc_ctr, SCSC_SOSC_CTR_SOSC_EN);
+
return 0;
 }
 
-- 
2.3.3

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[U-Boot] [PATCH 1/6] ARM: vf610: Move DDR3 initialization to imx-common

[Sanchayan Maity]

In order to avoid code duplication, move the DDR3 initialization to the
common place under imx-common. Currently ROW_DIFF and COL_DIFF can be
chosen from the board file. The JEDEC timings are specified using a
common ddr3_jedec_timings structure.

Signed-off-by: Stefan Agner ste...@agner.ch
Signed-off-by: Sanchayan Maity maitysancha...@gmail.com
---
 arch/arm/imx-common/Makefile  |   3 +
 arch/arm/imx-common/ddrmc-vf610.c | 278 +
 arch/arm/include/asm/arch-vf610/ddrmc-vf610.h |  72 +++
 arch/arm/include/asm/arch-vf610/imx-regs.h|   4 +-
 board/freescale/vf610twr/vf610twr.c   | 282 +-
 5 files changed, 408 insertions(+), 231 deletions(-)
 create mode 100644 arch/arm/imx-common/ddrmc-vf610.c
 create mode 100644 arch/arm/include/asm/arch-vf610/ddrmc-vf610.h

diff --git a/arch/arm/imx-common/Makefile b/arch/arm/imx-common/Makefile
index 606482f..b9f1ca4 100644
--- a/arch/arm/imx-common/Makefile
+++ b/arch/arm/imx-common/Makefile
@@ -22,6 +22,9 @@ ifeq ($(SOC),$(filter $(SOC),mx6))
 obj-$(CONFIG_CMD_SATA) += sata.o
 obj-$(CONFIG_IMX_VIDEO_SKIP) += video.o
 endif
+ifeq ($(SOC),$(filter $(SOC),vf610))
+obj-y += ddrmc-vf610.o
+endif
 obj-$(CONFIG_CMD_BMODE) += cmd_bmode.o
 obj-$(CONFIG_CMD_HDMIDETECT) += cmd_hdmidet.o
 obj-$(CONFIG_CMD_DEKBLOB) += cmd_dek.o
diff --git a/arch/arm/imx-common/ddrmc-vf610.c 
b/arch/arm/imx-common/ddrmc-vf610.c
new file mode 100644
index 000..e462631
--- /dev/null
+++ b/arch/arm/imx-common/ddrmc-vf610.c
@@ -0,0 +1,278 @@
+/*
+ * Copyright 2015 Toradex, Inc.
+ *
+ * Based on vf610twr:
+ * Copyright 2013 Freescale Semiconductor, Inc.
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include asm/io.h
+#include asm/arch/imx-regs.h
+#include asm/arch/iomux-vf610.h
+#include asm/arch/ddrmc-vf610.h
+
+void ddrmc_setup_iomux(void)
+{
+   static const iomux_v3_cfg_t ddr_pads[] = {
+   VF610_PAD_DDR_A15__DDR_A_15,
+   VF610_PAD_DDR_A14__DDR_A_14,
+   VF610_PAD_DDR_A13__DDR_A_13,
+   VF610_PAD_DDR_A12__DDR_A_12,
+   VF610_PAD_DDR_A11__DDR_A_11,
+   VF610_PAD_DDR_A10__DDR_A_10,
+   VF610_PAD_DDR_A9__DDR_A_9,
+   VF610_PAD_DDR_A8__DDR_A_8,
+   VF610_PAD_DDR_A7__DDR_A_7,
+   VF610_PAD_DDR_A6__DDR_A_6,
+   VF610_PAD_DDR_A5__DDR_A_5,
+   VF610_PAD_DDR_A4__DDR_A_4,
+   VF610_PAD_DDR_A3__DDR_A_3,
+   VF610_PAD_DDR_A2__DDR_A_2,
+   VF610_PAD_DDR_A1__DDR_A_1,
+   VF610_PAD_DDR_A0__DDR_A_0,
+   VF610_PAD_DDR_BA2__DDR_BA_2,
+   VF610_PAD_DDR_BA1__DDR_BA_1,
+   VF610_PAD_DDR_BA0__DDR_BA_0,
+   VF610_PAD_DDR_CAS__DDR_CAS_B,
+   VF610_PAD_DDR_CKE__DDR_CKE_0,
+   VF610_PAD_DDR_CLK__DDR_CLK_0,
+   VF610_PAD_DDR_CS__DDR_CS_B_0,
+   VF610_PAD_DDR_D15__DDR_D_15,
+   VF610_PAD_DDR_D14__DDR_D_14,
+   VF610_PAD_DDR_D13__DDR_D_13,
+   VF610_PAD_DDR_D12__DDR_D_12,
+   VF610_PAD_DDR_D11__DDR_D_11,
+   VF610_PAD_DDR_D10__DDR_D_10,
+   VF610_PAD_DDR_D9__DDR_D_9,
+   VF610_PAD_DDR_D8__DDR_D_8,
+   VF610_PAD_DDR_D7__DDR_D_7,
+   VF610_PAD_DDR_D6__DDR_D_6,
+   VF610_PAD_DDR_D5__DDR_D_5,
+   VF610_PAD_DDR_D4__DDR_D_4,
+   VF610_PAD_DDR_D3__DDR_D_3,
+   VF610_PAD_DDR_D2__DDR_D_2,
+   VF610_PAD_DDR_D1__DDR_D_1,
+   VF610_PAD_DDR_D0__DDR_D_0,
+   VF610_PAD_DDR_DQM1__DDR_DQM_1,
+   VF610_PAD_DDR_DQM0__DDR_DQM_0,
+   VF610_PAD_DDR_DQS1__DDR_DQS_1,
+   VF610_PAD_DDR_DQS0__DDR_DQS_0,
+   VF610_PAD_DDR_RAS__DDR_RAS_B,
+   VF610_PAD_DDR_WE__DDR_WE_B,
+   VF610_PAD_DDR_ODT1__DDR_ODT_0,
+   VF610_PAD_DDR_ODT0__DDR_ODT_1,
+   VF610_PAD_DDR_RESETB,
+   };
+
+   imx_iomux_v3_setup_multiple_pads(ddr_pads, ARRAY_SIZE(ddr_pads));
+}
+
+void ddrmc_phy_init(void)
+{
+   struct ddrmr_regs *ddrmr = (struct ddrmr_regs *)DDR_BASE_ADDR;
+
+   writel(DDRMC_PHY_DQ_TIMING, ddrmr-phy[0]);
+   writel(DDRMC_PHY_DQ_TIMING, ddrmr-phy[16]);
+   writel(DDRMC_PHY_DQ_TIMING, ddrmr-phy[32]);
+
+   writel(DDRMC_PHY_DQS_TIMING, ddrmr-phy[1]);
+   writel(DDRMC_PHY_DQS_TIMING, ddrmr-phy[17]);
+
+   writel(DDRMC_PHY_CTRL, ddrmr-phy[2]);
+   writel(DDRMC_PHY_CTRL, ddrmr-phy[18]);
+   writel(DDRMC_PHY_CTRL, ddrmr-phy[34]);
+
+   writel(DDRMC_PHY_MASTER_CTRL, ddrmr-phy[3]);
+   writel(DDRMC_PHY_MASTER_CTRL, ddrmr-phy[19]);
+   writel(DDRMC_PHY_MASTER_CTRL, ddrmr-phy[35]);
+
+   writel(DDRMC_PHY_SLAVE_CTRL, ddrmr-phy[4]);
+   writel(DDRMC_PHY_SLAVE_CTRL, ddrmr-phy[20]);
+   writel(DDRMC_PHY_SLAVE_CTRL, ddrmr-phy[36]);
+
+   /* LPDDR2 

Re: [U-Boot] [PATCH 1/3] Create API to map between CPU physical and bus addresses

[Marek Vasut]

On Wednesday, March 25, 2015 at 03:07:33 AM, Stephen Warren wrote:
 On some SoCs, DMA-capable peripherals see a different address space to
 the CPU's physical address space. Create an API to allow platform-agnostic
 drivers to convert between the two address spaces when programming DMA
 operations.
 
 This API will exist on all platforms, but will have a dummy implementation
 when this feature is not required. Other platforms will enable
 CONFIG_PHYS_TO_BUS and provide the required implementation.
 
 Signed-off-by: Stephen Warren swar...@wwwdotorg.org

Applied to -next, thanks!

btw. can't you use __weak here instead of a new ifdef macro (which is not 
documented btw)?

Best regards,
Marek Vasut
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Re: [U-Boot] [PATCH] usb: dwc2: fix bulk transfers

[Marek Vasut]

On Tuesday, March 24, 2015 at 06:01:01 AM, Stephen Warren wrote:
 When I created wait_for_chhltd(), I noticed that some instances of the
 code it replaced expected the ACK bit to be set and others didn't. I
 assumed this was an accidental inconsistency in the code, so wrote
 wait_for_chhltd() to always expect ACK to be set. This code appeared to
 work correctly for both enumeration of USB keyboards and operation of
 USB Ethernet devices. However, this change broke USB Mass Storage (at
 least my USB SD card reader). This change reverts to exactly the
 original behaviour. I'm not sure why the ACK bit isn't always set
 (perhaps a quirk in the USB HW or DWC2 controller), but the code works
 this way!
 
 Fixes: 5be4ca7d6ac8 (usb: dwc2: unify waiting for transfer completion)
 Signed-off-by: Stephen Warren swar...@wwwdotorg.org

Applied to topic/dwc2 , which will go to -next. Thanks!

Best regards,
Marek Vasut
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[U-Boot] [PATCH 2/2 v1] sf: Update AT45DB021D flash chip parameters

[Haikun Wang]

From: Haikun Wang haikun.w...@freescale.com

AT45DB021D flash size is 1024*page_size, page_size is 256bytes or 264bytes.
In current params_table its size is 64*1024*8, recorrect it.
Add AT45DB_CMD flag for AT45DB021D.

Signed-off-by: Haikun Wang haikun.w...@freescale.com
---

Changes in v1: None

 drivers/mtd/spi/sf_params.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/mtd/spi/sf_params.c b/drivers/mtd/spi/sf_params.c
index c12e8c6..c6b68f8 100644
--- a/drivers/mtd/spi/sf_params.c
+++ b/drivers/mtd/spi/sf_params.c
@@ -16,7 +16,8 @@
 const struct spi_flash_params spi_flash_params_table[] = {
 #ifdef CONFIG_SPI_FLASH_ATMEL  /* ATMEL */
{AT45DB011D, 0x1f2200, 0x0,   64 * 1024, 4, RD_NORM,  
SECT_4K},
-   {AT45DB021D, 0x1f2300, 0x0,   64 * 1024, 8, RD_NORM,  
SECT_4K},
+   {AT45DB021D, 0x1f2300, 0x0,   64 * 1024, 4,
+RD_NORM,   AT45DB_CMD},
{AT45DB041D, 0x1f2400, 0x0,   64 * 1024, 8, RD_NORM,  
SECT_4K},
{AT45DB081D, 0x1f2500, 0x0,   64 * 1024,16, RD_NORM,  
SECT_4K},
{AT45DB161D, 0x1f2600, 0x0,   64 * 1024,32, RD_NORM,  
SECT_4K},
-- 
1.9.1

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[U-Boot] [PATCH 1/2 v1] sf: probe: Add support Atmel AT45DB series devices special commands

[Haikun Wang]

From: Haikun Wang haikun.w...@freescale.com

Atmel AT45DB series devices commands is different from common spi flash
commands. This patch add support for AT45DB special commands.
Add a flag AT45DB_CMD to control whether use those commands.

Signed-off-by: Haikun Wang haikun.w...@freescale.com
---

Changes in v1: None

 drivers/mtd/spi/sf_internal.h |  7 +++
 drivers/mtd/spi/sf_ops.c  |  2 +-
 drivers/mtd/spi/sf_probe.c| 10 ++
 3 files changed, 18 insertions(+), 1 deletion(-)

diff --git a/drivers/mtd/spi/sf_internal.h b/drivers/mtd/spi/sf_internal.h
index 785f7a9..234af21 100644
--- a/drivers/mtd/spi/sf_internal.h
+++ b/drivers/mtd/spi/sf_internal.h
@@ -43,6 +43,7 @@ enum {
SST_BP  = 1  3,
SST_WP  = 1  4,
WR_QPP  = 1  5,
+   AT45DB_CMD  = 1  6,
 };
 
 #define SST_WR (SST_BP | SST_WP)
@@ -106,6 +107,12 @@ enum {
 #define SPI_FLASH_PAGE_ERASE_TIMEOUT   (5 * CONFIG_SYS_HZ)
 #define SPI_FLASH_SECTOR_ERASE_TIMEOUT (10 * CONFIG_SYS_HZ)
 
+/* Atmel AT45DB specific */
+#define CMD_ATMEL_PAGE_PROGRAM 0x82
+#define CMD_ATMEL_READ_STATUS  0xd7
+#define CMD_ATMEL_FLAG_STATUS  0xd7
+#define CMD_ATMEL_BLK_ERASE0x50
+
 /* SST specific */
 #ifdef CONFIG_SPI_FLASH_SST
 # define CMD_SST_BP0x02/* Byte Program */
diff --git a/drivers/mtd/spi/sf_ops.c b/drivers/mtd/spi/sf_ops.c
index 34bc54e..27ce5f9 100644
--- a/drivers/mtd/spi/sf_ops.c
+++ b/drivers/mtd/spi/sf_ops.c
@@ -165,7 +165,7 @@ int spi_flash_cmd_wait_ready(struct spi_flash *flash, 
unsigned long timeout)
u8 poll_bit = STATUS_WIP;
u8 cmd = flash-poll_cmd;
 
-   if (cmd == CMD_FLAG_STATUS) {
+   if (cmd == CMD_FLAG_STATUS || cmd == CMD_ATMEL_FLAG_STATUS) {
poll_bit = STATUS_PEC;
check_status = poll_bit;
}
diff --git a/drivers/mtd/spi/sf_probe.c b/drivers/mtd/spi/sf_probe.c
index 4103723..2ccddf2 100644
--- a/drivers/mtd/spi/sf_probe.c
+++ b/drivers/mtd/spi/sf_probe.c
@@ -226,6 +226,16 @@ static int spi_flash_validate_params(struct spi_slave 
*spi, u8 *idcode,
flash-poll_cmd = CMD_FLAG_STATUS;
 #endif
 
+#ifdef CONFIG_SPI_FLASH_ATMEL
+   if (params-flags  AT45DB_CMD) {
+   flash-poll_cmd = CMD_ATMEL_READ_STATUS;
+   flash-write_cmd = CMD_ATMEL_PAGE_PROGRAM;
+   /* use block-erase command, eight pages */
+   flash-erase_cmd = CMD_ATMEL_BLK_ERASE;
+   flash-erase_size = flash-page_size * 8;
+   }
+#endif
+
/* Configure the BAR - discover bank cmds and read current bank */
 #ifdef CONFIG_SPI_FLASH_BAR
u8 curr_bank = 0;
-- 
1.9.1

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Re: [U-Boot] [PATCH] watchdog/imx_watchdog: do not set WCR_WDW

[Stefano Babic]

Hi Sebastian,

On 25/03/2015 13:15, Sebastian Andrzej Siewior wrote:


 Just some questions. The described behavior is coherent with the
 description in the manual. When WDW is set, the watchdog is stopped
 while the processor is in wait mode.
 
 I fail to notice how it could make any sense.

Well, I have not said it makes sense - only that the behavior is
expected ;-)

 
 Current imx2_wdt.c driver in kernel does not care about this bit, but it
 looks like that only the kernel and/or the application can decide if the
 watchdog should run when the system is in WAIT or not. The bootloader
 cannot decide, and it should set the bit for its own usage.

 Should this setup be done by the kernel driver instead of by the
 bootloader ?
 
 It is a one-time-bit. Once it is set (or not) it can not be changed
 later. It makes no difference for the bootloader.

mmhhh..Sorry, it looks like I read the wrong line in the manual. This is
a write once bit exactly as WDZST. My assumption were wrong. We cannot
disable in kernel if the bootloader has already activated it.

 And the kernel may
 remain idle for longer than one jiffy with NO_HZ but it will still wake
 up within a second if I remember correctly. Eitherway the user will
 usually trigger the WD in timeout/2 so atleast that timer will wake up
 the kernel from idle.
 Having the WDT not account the idle time makes it hard for the user to
 figure out how much time has been accounted by the WDT so far.

I have no objections here - I start from the wrong assumption that the
bit could be cleared by the kernel, but it is not.

 

 While I don't see a reason why the WDT should not be running while the
 CPU is in idle, I'm dropping this bit.

 I can agree or disagree. This depends on the application.

 Differently as the WDZST, that can be set only once, and it is set by
 *both* U-Boot and kernel (setting in kernel has then no influence), the
 WDW can be even disabled in kernel.
 
 I patched the kernel as well. Once I get through here I would also push
 patches there. The thing I don't like is that the kernel pings the WDT
 on its own. While it may make sense for some people I would like to
 atleast configure it :)

Agree, patch put in my merge queue.

Acked-by: Stefano Babic sba...@denx.de

Best regards,
Stefano

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Re: [U-Boot] [PATCH 2/3] ARM: bcm2835: implement phys_to_bus/bus_to_phys

[Marek Vasut]

On Wednesday, March 25, 2015 at 03:07:34 AM, Stephen Warren wrote:
 The BCM283[56] contain both a L1 and L2 cache between the GPU (a/k/a
 VideoCore CPU?) and DRAM. DMA-capable peripherals can also optionally
 access DRAM via this same  L2 cache (although they always bypass the L1
 cache). Peripherals select whether to use or bypass the cache via the
 top two bits of the bus address.
 
 An IOMMU exists between the ARM CPU and the rest of the system. This
 controls whether the ARM CPU's accesses use or bypass the L1 and/or L2
 cache. This IOMMU is configured/controlled exclusively by the VideoCore
 CPU.
 
 In order for DRAM accesses made by the ARM core to be coherent with
 accesses made by other DMA peripherals, we must program a bus address
 into those peripherals that causes the peripheral's accesses to use the
 same set of caches that the ARM core's accesses will use.
 
 On the RPi1, the VideoCore firmware sets up the IOMMU to enable use of
 the L2 cache. This corresponds to addresses based at 0x4000.
 
 On the RPi2, the VideoCore firmware sets up the IOMMU to disable use of
 the L2 cache. This corresponds to addresses based at 0xc000.
 
 This patch implements U-Boot's phys_to_bus/bus_to_phys APIs according
 to those rules.
 
 For full details of this setup, please see Dom Cobley's description at:
 http://lists.denx.de/pipermail/u-boot/2015-March/208201.html
 http://permalink.gmane.org/gmane.comp.boot-loaders.u-boot/215038
 https://www.mail-archive.com/u-boot@lists.denx.de/msg166568.html
 
 Signed-off-by: Stephen Warren swar...@wwwdotorg.org

Applied to -next, thanks!

Best regards,
Marek Vasut
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Re: [U-Boot] [PATCH] ehci-hcd: fix warnings on 64-bit builds

[Marek Vasut]

On Wednesday, March 25, 2015 at 01:29:02 PM, Thierry Reding wrote:
 On Tue, Mar 24, 2015 at 04:42:04PM +0100, Marek Vasut wrote:
  On Tuesday, March 24, 2015 at 12:36:55 AM, Rob Herring wrote:
   On Fri, Mar 20, 2015 at 8:19 AM, Marek Vasut ma...@denx.de wrote:
On Tuesday, March 17, 2015 at 09:46:37 PM, Rob Herring wrote:
Change addresses to unsigned long to be compatible with 64-bit
builds. Regardless of fixing warnings, the device is still only
32-bit capable.

Signed-off-by: Rob Herring r...@kernel.org
Cc: Marek Vasut ma...@denx.de
---

 drivers/usb/host/ehci-hcd.c | 82

++--- 1 file changed, 41
insertions(+), 41 deletions(-)

Hi,

I will handle those patches in a couple of days. I got similar fix
from Thierry today in a patchset, this is the subject:
[PATCH 11/13] usb: ehci-hcd: Build warning fixes for 64-bit

I would obviously like to pick Rob's one, since it came first, but
I will need to check if they're really the same. Moreover, shall I
pick this for the current release or is it OK to apply for the next
one ?
   
   For me, after the release is fine. Thierry may feel otherwise.
  
  I'm fine either way, so Thierry, what is your feeling please ?
 
 This is preliminary work for board support that's not going to make it
 in time for the release, so there's no hurry.

I picked the stuff from Rob into -next, so this will appear in the next
version of U-Boot. Please let me know if I did the wrong call here, and
possible even send me a patch which fixes the deficiencies.

Thanks again!

Best regards,
Marek Vasut
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Re: [U-Boot] [PATCH 12/13] usb: ehci-tegra: Build warning fixes for 64-bit

[Marek Vasut]

On Friday, March 20, 2015 at 12:41:27 PM, Thierry Reding wrote:
 From: Thierry Reding tred...@nvidia.com
 
 Cast pointers to unsigned long instead of a sized 32-bit type to avoid
 pointer to integer cast size mismatch warnings.
 
 Cc: Tom Warren twar...@nvidia.com
 Cc: Marek Vasut ma...@denx.de
 Signed-off-by: Thierry Reding tred...@nvidia.com

Applied, thanks!

Best regards,
Marek Vasut
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Re: [U-Boot] [PATCH] ehci-hcd: fix warnings on 64-bit builds

[Thierry Reding]

On Tue, Mar 24, 2015 at 04:42:04PM +0100, Marek Vasut wrote:
 On Tuesday, March 24, 2015 at 12:36:55 AM, Rob Herring wrote:
  On Fri, Mar 20, 2015 at 8:19 AM, Marek Vasut ma...@denx.de wrote:
   On Tuesday, March 17, 2015 at 09:46:37 PM, Rob Herring wrote:
   Change addresses to unsigned long to be compatible with 64-bit builds.
   Regardless of fixing warnings, the device is still only 32-bit capable.
   
   Signed-off-by: Rob Herring r...@kernel.org
   Cc: Marek Vasut ma...@denx.de
   ---
   
drivers/usb/host/ehci-hcd.c | 82
   
   ++--- 1 file changed, 41
   insertions(+), 41 deletions(-)
   
   Hi,
   
   I will handle those patches in a couple of days. I got similar fix
   from Thierry today in a patchset, this is the subject:
   [PATCH 11/13] usb: ehci-hcd: Build warning fixes for 64-bit
   
   I would obviously like to pick Rob's one, since it came first, but
   I will need to check if they're really the same. Moreover, shall I
   pick this for the current release or is it OK to apply for the next
   one ?
  
  For me, after the release is fine. Thierry may feel otherwise.
 
 I'm fine either way, so Thierry, what is your feeling please ?

This is preliminary work for board support that's not going to make it
in time for the release, so there's no hurry.

Thierry


pgpyg6ZMTRrCd.pgp
Description: PGP signature
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[U-Boot] [PATCH 0/6] Add support for Colibri Vybrid Modules

[Sanchayan Maity]

Hello,

This patchset adds support for the Toradex Colibri Vybrid VF50 and VF61 
modules. Boot up has been tested using the serial loader over UART.

First patch in the series refactors the DDR related code for use by both 
the tower board and colibri modules. It also introduces a DDR3 based 
JEDEC timing structure.

Second third and fourth patch in this series are improvement patches 
related to RTC, SoC/CPU detection and caches.

Fifth patch introduces USB support for Vybrid modules. Much of the code 
is similar to the ehci-mx6 driver. One open question here would be is 
there a better way to take care of this similarity and perhaps share the 
code base among the two drivers? Both host and client modes are working 
and DFU has also been tested. Currently, we restrict the ports to be in 
one of host and client mode.

Sixth patch adds the actual support for the Colibri modules.

Comments and feedback are most welcome.

The patchset has been based and tested on the latest master branch as of 
this writing.

- Sanchayan.

Sanchayan Maity (4):
  ARM: vf610: Move DDR3 initialization to imx-common
  ARM: vf610: Add SoC and CPU type detection
  usb: host: Add ehci-vf USB driver for ARM Vybrid SoC's
  ARM: vf610: Initial integration for Colibri VF50/VF61

Stefan Agner (2):
  ARM: vf610: Enable external 32KHz oscillator
  ARM: vf610: Enable caches

 arch/arm/Kconfig  |   5 +
 arch/arm/cpu/armv7/vf610/generic.c|  45 ++-
 arch/arm/imx-common/Makefile  |   3 +
 arch/arm/imx-common/ddrmc-vf610.c | 278 ++
 arch/arm/include/asm/arch-vf610/crm_regs.h|  15 +
 arch/arm/include/asm/arch-vf610/ddrmc-vf610.h |  72 +
 arch/arm/include/asm/arch-vf610/imx-regs.h|  36 ++-
 board/freescale/vf610twr/vf610twr.c   | 295 +--
 board/toradex/colibri_vf/Kconfig  |  18 ++
 board/toradex/colibri_vf/MAINTAINERS  |   6 +
 board/toradex/colibri_vf/Makefile |   7 +
 board/toradex/colibri_vf/colibri_vf.c | 389 ++
 board/toradex/colibri_vf/imximage.cfg |  17 ++
 configs/colibri_vf_defconfig  |   3 +
 drivers/usb/host/Makefile |   1 +
 drivers/usb/host/ehci-vf.c| 204 ++
 include/configs/colibri_vf.h  | 266 ++
 17 files changed, 1425 insertions(+), 235 deletions(-)
 create mode 100644 arch/arm/imx-common/ddrmc-vf610.c
 create mode 100644 arch/arm/include/asm/arch-vf610/ddrmc-vf610.h
 create mode 100644 board/toradex/colibri_vf/Kconfig
 create mode 100644 board/toradex/colibri_vf/MAINTAINERS
 create mode 100644 board/toradex/colibri_vf/Makefile
 create mode 100644 board/toradex/colibri_vf/colibri_vf.c
 create mode 100644 board/toradex/colibri_vf/imximage.cfg
 create mode 100644 configs/colibri_vf_defconfig
 create mode 100644 drivers/usb/host/ehci-vf.c
 create mode 100644 include/configs/colibri_vf.h

-- 
2.3.3

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[U-Boot] [PATCH 5/6] usb: host: Add ehci-vf USB driver for ARM Vybrid SoC's

[Sanchayan Maity]

Signed-off-by: Sanchayan Maity maitysancha...@gmail.com
---
 arch/arm/include/asm/arch-vf610/crm_regs.h |  14 ++
 arch/arm/include/asm/arch-vf610/imx-regs.h |   4 +
 drivers/usb/host/Makefile  |   1 +
 drivers/usb/host/ehci-vf.c | 204 +
 4 files changed, 223 insertions(+)
 create mode 100644 drivers/usb/host/ehci-vf.c

diff --git a/arch/arm/include/asm/arch-vf610/crm_regs.h 
b/arch/arm/include/asm/arch-vf610/crm_regs.h
index 78708e2..851c3b9 100644
--- a/arch/arm/include/asm/arch-vf610/crm_regs.h
+++ b/arch/arm/include/asm/arch-vf610/crm_regs.h
@@ -124,6 +124,10 @@ struct anadig_reg {
 #define CCM_CCSR_PLL1_PFD_CLK_SEL_MASK (0x7  16)
 #define CCM_CCSR_PLL1_PFD_CLK_SEL(v)   (((v)  0x7)  16)
 
+#define CCM_CCSR_PLL3_PFD4_EN   (1  31)
+#define CCM_CCSR_PLL3_PFD3_EN   (1  30)
+#define CCM_CCSR_PLL3_PFD2_EN   (1  29)
+#define CCM_CCSR_PLL3_PFD1_EN   (1  28)
 #define CCM_CCSR_PLL2_PFD4_EN  (1  15)
 #define CCM_CCSR_PLL2_PFD3_EN  (1  14)
 #define CCM_CCSR_PLL2_PFD2_EN  (1  13)
@@ -189,6 +193,7 @@ struct anadig_reg {
 #define CCM_REG_CTRL_MASK  0x
 #define CCM_CCGR0_UART0_CTRL_MASK   (0x3  14)
 #define CCM_CCGR0_UART1_CTRL_MASK  (0x3  16)
+#define CCM_CCGR1_USBC0_CTRL_MASK   (0x3  8)
 #define CCM_CCGR1_PIT_CTRL_MASK(0x3  14)
 #define CCM_CCGR1_WDOGA5_CTRL_MASK (0x3  28)
 #define CCM_CCGR2_QSPI0_CTRL_MASK  (0x3  8)
@@ -207,14 +212,23 @@ struct anadig_reg {
 #define CCM_CCGR6_OCOTP_CTRL_MASK  (0x3  10)
 #define CCM_CCGR6_DDRMC_CTRL_MASK  (0x3  28)
 #define CCM_CCGR7_SDHC1_CTRL_MASK  (0x3  4)
+#define CCM_CCGR7_USBC1_CTRL_MASK   (0x3  8)
 #define CCM_CCGR9_FEC0_CTRL_MASK   0x3
 #define CCM_CCGR9_FEC1_CTRL_MASK   (0x3  2)
 #define CCM_CCGR10_NFC_CTRL_MASK   0x3
 
+#define ANADIG_PLL7_CTRL_BYPASS (1  16)
+#define ANADIG_PLL7_CTRL_ENABLE (1  13)
+#define ANADIG_PLL7_CTRL_POWERDOWN  (1  12)
+#define ANADIG_PLL7_CTRL_DIV_SELECT (1  1)
 #define ANADIG_PLL5_CTRL_BYPASS (1  16)
 #define ANADIG_PLL5_CTRL_ENABLE (1  13)
 #define ANADIG_PLL5_CTRL_POWERDOWN  (1  12)
 #define ANADIG_PLL5_CTRL_DIV_SELECT1
+#define ANADIG_PLL3_CTRL_BYPASS (1  16)
+#define ANADIG_PLL3_CTRL_ENABLE (1  13)
+#define ANADIG_PLL3_CTRL_POWERDOWN  (1  12)
+#define ANADIG_PLL3_CTRL_DIV_SELECT (1  1)
 #define ANADIG_PLL2_CTRL_ENABLE(1  13)
 #define ANADIG_PLL2_CTRL_POWERDOWN (1  12)
 #define ANADIG_PLL2_CTRL_DIV_SELECT1
diff --git a/arch/arm/include/asm/arch-vf610/imx-regs.h 
b/arch/arm/include/asm/arch-vf610/imx-regs.h
index a5908ca..26057fe 100644
--- a/arch/arm/include/asm/arch-vf610/imx-regs.h
+++ b/arch/arm/include/asm/arch-vf610/imx-regs.h
@@ -52,6 +52,7 @@
 #define SAI2_BASE_ADDR (AIPS0_BASE_ADDR + 0x00031000)
 #define SAI3_BASE_ADDR (AIPS0_BASE_ADDR + 0x00032000)
 #define CRC_BASE_ADDR  (AIPS0_BASE_ADDR + 0x00033000)
+#define USBC0_BASE_ADDR (AIPS0_BASE_ADDR + 0x00034000)
 #define PDB_BASE_ADDR  (AIPS0_BASE_ADDR + 0x00036000)
 #define PIT_BASE_ADDR  (AIPS0_BASE_ADDR + 0x00037000)
 #define FTM0_BASE_ADDR (AIPS0_BASE_ADDR + 0x00038000)
@@ -65,6 +66,8 @@
 #define QSPI0_BASE_ADDR(AIPS0_BASE_ADDR + 0x00044000)
 #define IOMUXC_BASE_ADDR   (AIPS0_BASE_ADDR + 0x00048000)
 #define ANADIG_BASE_ADDR   (AIPS0_BASE_ADDR + 0x0005)
+#define USB_PHY0_BASE_ADDR  (AIPS0_BASE_ADDR + 0x00050800)
+#define USB_PHY1_BASE_ADDR  (AIPS0_BASE_ADDR + 0x00050C00)
 #define SCSC_BASE_ADDR (AIPS0_BASE_ADDR + 0x00052000)
 #define ASRC_BASE_ADDR (AIPS0_BASE_ADDR + 0x0006)
 #define SPDIF_BASE_ADDR(AIPS0_BASE_ADDR + 0x00061000)
@@ -84,6 +87,7 @@
 #define DDR_BASE_ADDR  (AIPS1_BASE_ADDR + 0x0002E000)
 #define ESDHC0_BASE_ADDR   (AIPS1_BASE_ADDR + 0x00031000)
 #define ESDHC1_BASE_ADDR   (AIPS1_BASE_ADDR + 0x00032000)
+#define USBC1_BASE_ADDR (AIPS1_BASE_ADDR + 0x00034000)
 #define ENET_BASE_ADDR (AIPS1_BASE_ADDR + 0x0005)
 #define ENET1_BASE_ADDR(AIPS1_BASE_ADDR + 0x00051000)
 #define NFC_BASE_ADDR  (AIPS1_BASE_ADDR + 0x0006)
diff --git a/drivers/usb/host/Makefile b/drivers/usb/host/Makefile
index eb6f34b..4bd9321 100644
--- a/drivers/usb/host/Makefile
+++ b/drivers/usb/host/Makefile
@@ -39,6 +39,7 @@ obj-$(CONFIG_USB_EHCI_SUNXI) += ehci-sunxi.o
 obj-$(CONFIG_USB_EHCI_TEGRA) += ehci-tegra.o
 obj-$(CONFIG_USB_EHCI_UNIPHIER) += ehci-uniphier.o
 obj-$(CONFIG_USB_EHCI_VCT) += ehci-vct.o
+obj-$(CONFIG_USB_EHCI_VF) += ehci-vf.o
 obj-$(CONFIG_USB_EHCI_RMOBILE) += ehci-rmobile.o
 obj-$(CONFIG_USB_EHCI_ZYNQ) += ehci-zynq.o
 
diff --git 

[U-Boot] [PATCH 3/6] ARM: vf610: Add SoC and CPU type detection

[Sanchayan Maity]

Vybrid product family consists of several rather similar SoC which
can be determined by softare during boot time. This allows use of
variable ${soc} for Linux device tree files. Detect VF5xx CPU's by
reading the CPU count register. We can determine the second number
of the CPU type (VF6x0) which indicates the presence of a L2 cache.

Signed-off-by: Stefan Agner ste...@agner.ch
Signed-off-by: Sanchayan Maity maitysancha...@gmail.com
---
 arch/arm/cpu/armv7/vf610/generic.c | 29 +++--
 arch/arm/include/asm/arch-vf610/imx-regs.h | 12 
 2 files changed, 39 insertions(+), 2 deletions(-)

diff --git a/arch/arm/cpu/armv7/vf610/generic.c 
b/arch/arm/cpu/armv7/vf610/generic.c
index 92aaad9..3bdc221 100644
--- a/arch/arm/cpu/armv7/vf610/generic.c
+++ b/arch/arm/cpu/armv7/vf610/generic.c
@@ -18,6 +18,8 @@
 DECLARE_GLOBAL_DATA_PTR;
 #endif
 
+static char soc_type[] = xx0;
+
 #ifdef CONFIG_MXC_OCOTP
 void enable_ocotp_clk(unsigned char enable)
 {
@@ -284,14 +286,37 @@ static char *get_reset_cause(void)
 
 int print_cpuinfo(void)
 {
-   printf(CPU:   Freescale Vybrid VF610 at %d MHz\n,
-   mxc_get_clock(MXC_ARM_CLK) / 100);
+   printf(CPU: Freescale Vybrid VF%s at %d MHz\n,
+  soc_type, mxc_get_clock(MXC_ARM_CLK) / 100);
printf(Reset cause: %s\n, get_reset_cause());
 
return 0;
 }
 #endif
 
+int arch_cpu_init(void)
+{
+   struct mscm *mscm = (struct mscm *)MSCM_BASE_ADDR;
+
+   soc_type[0] = mscm-cpxcount ? '6' : '5'; /*Dual Core = VF6x0 */
+   soc_type[1] = mscm-cpxcfg1 ? '1' : '0'; /* L2 Cache = VFx10 */
+
+   return 0;
+}
+
+#ifdef CONFIG_ARCH_MISC_INIT
+int arch_misc_init(void)
+{
+   char soc[6];
+
+   strcat(soc, vf);
+   strcat(soc, soc_type);
+   setenv(soc, soc);
+
+   return 0;
+}
+#endif
+
 int cpu_eth_init(bd_t *bis)
 {
int rc = -ENODEV;
diff --git a/arch/arm/include/asm/arch-vf610/imx-regs.h 
b/arch/arm/include/asm/arch-vf610/imx-regs.h
index aa60031..a5908ca 100644
--- a/arch/arm/include/asm/arch-vf610/imx-regs.h
+++ b/arch/arm/include/asm/arch-vf610/imx-regs.h
@@ -457,6 +457,18 @@ struct scsc_reg {
u32 sosc_ctr;
 };
 
+/* MSCM */
+struct mscm {
+   u32 cpxtype;
+   u32 cpxnum;
+   u32 cpxmaster;
+   u32 cpxcount;
+   u32 cpxcfg0;
+   u32 cpxcfg1;
+   u32 cpxcfg2;
+   u32 cpxcfg3;
+};
+
 #endif /* __ASSEMBLER__*/
 
 #endif /* __ASM_ARCH_IMX_REGS_H__ */
-- 
2.3.3

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[U-Boot] [PATCH 4/6] ARM: vf610: Enable caches

[Sanchayan Maity]

From: Stefan Agner ste...@agner.ch

Enables caches which provides a rather huge speedup of the boot loader.
Also mark the on-chip RAM as cachable since this is the area U-Boot runs
from.

Signed-off-by: Stefan Agner ste...@agner.ch
Signed-off-by: Sanchayan Maity maitysancha...@gmail.com
---
 arch/arm/cpu/armv7/vf610/generic.c | 16 
 1 file changed, 16 insertions(+)

diff --git a/arch/arm/cpu/armv7/vf610/generic.c 
b/arch/arm/cpu/armv7/vf610/generic.c
index 3bdc221..1bb9b8e 100644
--- a/arch/arm/cpu/armv7/vf610/generic.c
+++ b/arch/arm/cpu/armv7/vf610/generic.c
@@ -342,3 +342,19 @@ int get_clocks(void)
 #endif
return 0;
 }
+
+#ifndef CONFIG_SYS_DCACHE_OFF
+void enable_caches(void)
+{
+#if defined(CONFIG_SYS_ARM_CACHE_WRITETHROUGH)
+   enum dcache_option option = DCACHE_WRITETHROUGH;
+#else
+   enum dcache_option option = DCACHE_WRITEBACK;
+#endif
+   dcache_enable();
+   icache_enable();
+
+/* Enable caching on OCRAM */
+   mmu_set_region_dcache_behaviour(IRAM_BASE_ADDR, IRAM_SIZE, option);
+}
+#endif
-- 
2.3.3

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Re: [U-Boot] [PATCH 3/3] usb: dwc2: use phys_to_bus/bus_to_phys

[Marek Vasut]

On Wednesday, March 25, 2015 at 03:07:35 AM, Stephen Warren wrote:
 Use of these APIs is required on the Raspberry Pi. With this change, USB
 on RPi1 should be more reliable, and USB on the RPi2 will start working.
 
 Signed-off-by: Stephen Warren swar...@wwwdotorg.org

Applied to -next, thanks!

Best regards,
Marek Vasut
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Re: [U-Boot] [PATCH 10/13] usb: mass-storage: Build warning fixes for 64-bit

[Marek Vasut]

On Friday, March 20, 2015 at 12:41:25 PM, Thierry Reding wrote:
 From: Thierry Reding tred...@nvidia.com
 
 Fix a printf format mismatch warning seen on 64-bit builds.
 
 Cc: Łukasz Majewski l.majew...@samsung.com
 Cc: Marek Vasut ma...@denx.de
 Signed-off-by: Thierry Reding tred...@nvidia.com

Applied, thanks!

Best regards,
Marek Vasut
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Re: [U-Boot] [PATCH 09/13] usb: ci_udc: Build warning fixes for 64-bit

[Marek Vasut]

On Friday, March 20, 2015 at 12:41:24 PM, Thierry Reding wrote:
 From: Thierry Reding tred...@nvidia.com
 
 Fix a slew of pointer to integer cast size mismatch warnings caused by
 this driver explicitly casting pointers to 32-bit integers. While it is
 true that the hardware can only deal with 32-bit addresses, truncating
 using a cast isn't the right solution because the pointer could still be
 outside of the space addressable using 32-bit addresses.
 
 Cc: Łukasz Majewski l.majew...@samsung.com
 Cc: Marek Vasut ma...@denx.de
 Signed-off-by: Thierry Reding tred...@nvidia.com

I'll be picking the one from Rob here.

Best regards,
Marek Vasut
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Re: [U-Boot] [PATCH] watchdog/imx_watchdog: do not set WCR_WDW

[Sebastian Andrzej Siewior]

* Stefano Babic | 2015-03-25 09:03:06 [+0100]:

Hi Sebastian,
Hi Stefano,

(sorry for late answer)
no worries.

On 03/03/2015 17:45, Sebastian Andrzej Siewior wrote:
 with WCR_WDW set, the watchdog won't trigger if we bootet linux and idle
 around while the watchdog is not triggered. It seems the timer makes
 progress very slowly if at all. I managed to remain 20minutes alive
 while the timeout was set to 60secs. It reboots within 60secs if I start
 a busyloop in userland (something like while (1) { }).

Just some questions. The described behavior is coherent with the
description in the manual. When WDW is set, the watchdog is stopped
while the processor is in wait mode.

I fail to notice how it could make any sense.

Current imx2_wdt.c driver in kernel does not care about this bit, but it
looks like that only the kernel and/or the application can decide if the
watchdog should run when the system is in WAIT or not. The bootloader
cannot decide, and it should set the bit for its own usage.

Should this setup be done by the kernel driver instead of by the
bootloader ?

It is a one-time-bit. Once it is set (or not) it can not be changed
later. It makes no difference for the bootloader. And the kernel may
remain idle for longer than one jiffy with NO_HZ but it will still wake
up within a second if I remember correctly. Eitherway the user will
usually trigger the WD in timeout/2 so atleast that timer will wake up
the kernel from idle.
Having the WDT not account the idle time makes it hard for the user to
figure out how much time has been accounted by the WDT so far.

 
 While I don't see a reason why the WDT should not be running while the
 CPU is in idle, I'm dropping this bit.

I can agree or disagree. This depends on the application.

Differently as the WDZST, that can be set only once, and it is set by
*both* U-Boot and kernel (setting in kernel has then no influence), the
WDW can be even disabled in kernel.

I patched the kernel as well. Once I get through here I would also push
patches there. The thing I don't like is that the kernel pings the WDT
on its own. While it may make sense for some people I would like to
atleast configure it :)

Sebastian
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Re: [U-Boot] [PATCH] gpio: add Xilinx Zynq PS GPIO driver

[Michal Simek]

On 03/20/2015 04:00 PM, r...@dave-tech.it wrote:
 From: Andrea Scian andrea.sc...@dave.eu
 
 Most of the code is taken (and adapted) from Linux kernel driver.
 
 Just add CONFIG_ZYNQ_GPIO to you config to enable it
 
 Signed-off-by: Andrea Scian andrea.sc...@dave.eu
 ---
  arch/arm/include/asm/arch-zynq/gpio.h |   66 ++
  drivers/gpio/Makefile |1 +
  drivers/gpio/zynq_gpio.c  |  220 
 +
  3 files changed, 287 insertions(+)
  create mode 100644 drivers/gpio/zynq_gpio.c
 
 diff --git a/arch/arm/include/asm/arch-zynq/gpio.h 
 b/arch/arm/include/asm/arch-zynq/gpio.h
 index a26ae87..9e1e7da 100644
 --- a/arch/arm/include/asm/arch-zynq/gpio.h
 +++ b/arch/arm/include/asm/arch-zynq/gpio.h
 @@ -1,5 +1,6 @@
  /*
   * Copyright (c) 2013 Xilinx, Inc.
 + * Copyright (c) 2015 DAVE Embedded Systems
   *
   * SPDX-License-Identifier:  GPL-2.0+
   */
 @@ -7,4 +8,69 @@
  #ifndef _ZYNQ_GPIO_H
  #define _ZYNQ_GPIO_H
  
 +#define ZYNQ_GPIO_BASE_ADDRESS 0xE000A000
 +
 +/* Maximum banks */
 +#define ZYNQ_GPIO_MAX_BANK   4
 +
 +#define ZYNQ_GPIO_BANK0_NGPIO32
 +#define ZYNQ_GPIO_BANK1_NGPIO22
 +#define ZYNQ_GPIO_BANK2_NGPIO32
 +#define ZYNQ_GPIO_BANK3_NGPIO32
 +
 +#define ZYNQ_GPIO_NR_GPIOS   (ZYNQ_GPIO_BANK0_NGPIO + \
 +  ZYNQ_GPIO_BANK1_NGPIO + \
 +  ZYNQ_GPIO_BANK2_NGPIO + \
 +  ZYNQ_GPIO_BANK3_NGPIO)
 +
 +#define ZYNQ_GPIO_BANK0_PIN_MIN  0
 +#define ZYNQ_GPIO_BANK0_PIN_MAX  (ZYNQ_GPIO_BANK0_PIN_MIN + \
 + ZYNQ_GPIO_BANK0_NGPIO - 1)
 +#define ZYNQ_GPIO_BANK1_PIN_MIN  (ZYNQ_GPIO_BANK0_PIN_MAX + 1)
 +#define ZYNQ_GPIO_BANK1_PIN_MAX  (ZYNQ_GPIO_BANK1_PIN_MIN + \
 + ZYNQ_GPIO_BANK1_NGPIO - 1)
 +#define ZYNQ_GPIO_BANK2_PIN_MIN  (ZYNQ_GPIO_BANK1_PIN_MAX + 1)
 +#define ZYNQ_GPIO_BANK2_PIN_MAX  (ZYNQ_GPIO_BANK2_PIN_MIN + \
 + ZYNQ_GPIO_BANK2_NGPIO - 1)
 +#define ZYNQ_GPIO_BANK3_PIN_MIN  (ZYNQ_GPIO_BANK2_PIN_MAX + 1)
 +#define ZYNQ_GPIO_BANK3_PIN_MAX  (ZYNQ_GPIO_BANK3_PIN_MIN + \
 + ZYNQ_GPIO_BANK3_NGPIO - 1)
 +
 +/* Register offsets for the GPIO device */
 +/* LSW Mask  Data -WO */
 +#define ZYNQ_GPIO_DATA_LSW_OFFSET(BANK)  (0x000 + (8 * BANK))
 +/* MSW Mask  Data -WO */
 +#define ZYNQ_GPIO_DATA_MSW_OFFSET(BANK)  (0x004 + (8 * BANK))
 +/* Data Register-RW */
 +#define ZYNQ_GPIO_DATA_RO_OFFSET(BANK)   (0x060 + (4 * BANK))
 +/* Direction mode reg-RW */
 +#define ZYNQ_GPIO_DIRM_OFFSET(BANK)  (0x204 + (0x40 * BANK))
 +/* Output enable reg-RW */
 +#define ZYNQ_GPIO_OUTEN_OFFSET(BANK) (0x208 + (0x40 * BANK))
 +/* Interrupt mask reg-RO */
 +#define ZYNQ_GPIO_INTMASK_OFFSET(BANK)   (0x20C + (0x40 * BANK))
 +/* Interrupt enable reg-WO */
 +#define ZYNQ_GPIO_INTEN_OFFSET(BANK) (0x210 + (0x40 * BANK))
 +/* Interrupt disable reg-WO */
 +#define ZYNQ_GPIO_INTDIS_OFFSET(BANK)(0x214 + (0x40 * BANK))
 +/* Interrupt status reg-RO */
 +#define ZYNQ_GPIO_INTSTS_OFFSET(BANK)(0x218 + (0x40 * BANK))
 +/* Interrupt type reg-RW */
 +#define ZYNQ_GPIO_INTTYPE_OFFSET(BANK)   (0x21C + (0x40 * BANK))
 +/* Interrupt polarity reg-RW */
 +#define ZYNQ_GPIO_INTPOL_OFFSET(BANK)(0x220 + (0x40 * BANK))
 +/* Interrupt on any, reg-RW */
 +#define ZYNQ_GPIO_INTANY_OFFSET(BANK)(0x224 + (0x40 * BANK))
 +
 +/* Disable all interrupts mask */
 +#define ZYNQ_GPIO_IXR_DISABLE_ALL0x
 +
 +/* Mid pin number of a bank */
 +#define ZYNQ_GPIO_MID_PIN_NUM 16
 +
 +/* GPIO upper 16 bit mask */
 +#define ZYNQ_GPIO_UPPER_MASK 0x
 +
 +#define BIT(x) (1x)
 +
  #endif /* _ZYNQ_GPIO_H */
 diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile
 index fe9a3b2..916ecb5 100644
 --- a/drivers/gpio/Makefile
 +++ b/drivers/gpio/Makefile
 @@ -41,3 +41,4 @@ obj-$(CONFIG_ADI_GPIO2) += adi_gpio2.o
  obj-$(CONFIG_TCA642X)+= tca642x.o
  oby-$(CONFIG_SX151X) += sx151x.o
  obj-$(CONFIG_SUNXI_GPIO) += sunxi_gpio.o
 +obj-$(CONFIG_ZYNQ_GPIO)  += zynq_gpio.o
 diff --git a/drivers/gpio/zynq_gpio.c b/drivers/gpio/zynq_gpio.c
 new file mode 100644
 index 000..83a2c46
 --- /dev/null
 +++ b/drivers/gpio/zynq_gpio.c
 @@ -0,0 +1,220 @@
 +/*
 + * Xilinx Zynq GPIO device driver
 + *
 + * Copyright (C) 2015 DAVE Embedded Systems de...@dave.eu
 + *
 + * Most of code taken from linux kernel driver 
 (linux/drivers/gpio/gpio-zynq.c)
 + * Copyright (C) 2009 - 2014 Xilinx, Inc.
 + *
 + * SPDX-License-Identifier:  GPL-2.0+
 + */
 +
 +#include common.h
 +#include asm/gpio.h
 +#include asm/io.h
 +#include asm/errno.h
 +
 +/**
 + * zynq_gpio_get_bank_pin - Get the bank number and pin number within that 
 bank
 + * for a given pin in the GPIO device
 + * @pin_num: gpio pin number within the device
 + * @bank_num:an output parameter used to 

[U-Boot] [PATCH v2] mii: add read-modify-write option to mii command

[Tim James]

When accessing PHY registers it is often desirable to only update
selected bits, so it is necessary to first read the current value
before writing back an modified value with the relevant bits
updated.

To simplify this and to allow such operations to be incorporated
into simple shell scripts propose adding a 'modify' option to the
existing mii command, which takes a mask indicating the bits to
be updated in addition to a data value containing the new bits,
ie, updated = (data  mask) | (current  ~mask).

Signed-off-by: Tim tim.ja...@macltd.com
Cc: Nobuhiro Iwamatsu iwama...@nigauri.org
Cc: Joe Hershberger joe.hershber...@gmail.com
Cc: Jeroen Hofstee jer...@myspectrum.nl
Cc: Tom Rini tr...@konsulko.com
Cc: Tim tim.ja...@macltd.com
---
Changes for v2:
 - Addressed checkpatch.pl messages.
 - No functional changes.

 common/cmd_mii.c | 47 ++-
 1 file changed, 38 insertions(+), 9 deletions(-)

diff --git a/common/cmd_mii.c b/common/cmd_mii.c
index 7c4a57a..d9d7f7b 100644
--- a/common/cmd_mii.c
+++ b/common/cmd_mii.c
@@ -249,6 +249,7 @@ static uint last_addr_lo;
 static uint last_addr_hi;
 static uint last_reg_lo;
 static uint last_reg_hi;
+static uint last_mask;
 
 static void extract_range(
char * input,
@@ -272,7 +273,7 @@ static int do_mii(cmd_tbl_t *cmdtp, int flag, int argc, 
char * const argv[])
charop[2];
unsigned char   addrlo, addrhi, reglo, reghi;
unsigned char   addr, reg;
-   unsigned short  data;
+   unsigned short  data, mask;
int rcode = 0;
const char  *devname;
 
@@ -294,6 +295,7 @@ static int do_mii(cmd_tbl_t *cmdtp, int flag, int argc, 
char * const argv[])
reglo  = last_reg_lo;
reghi  = last_reg_hi;
data   = last_data;
+   mask   = last_mask;
 
if ((flag  CMD_FLAG_REPEAT) == 0) {
op[0] = argv[1][0];
@@ -307,7 +309,9 @@ static int do_mii(cmd_tbl_t *cmdtp, int flag, int argc, 
char * const argv[])
if (argc = 4)
extract_range(argv[3], reglo, reghi);
if (argc = 5)
-   data = simple_strtoul (argv[4], NULL, 16);
+   data = simple_strtoul(argv[4], NULL, 16);
+   if (argc = 6)
+   mask = simple_strtoul(argv[5], NULL, 16);
}
 
/* use current device */
@@ -375,6 +379,28 @@ static int do_mii(cmd_tbl_t *cmdtp, int flag, int argc, 
char * const argv[])
}
}
}
+   } else if (op[0] == 'm') {
+   for (addr = addrlo; addr = addrhi; addr++) {
+   for (reg = reglo; reg = reghi; reg++) {
+   unsigned short val = 0;
+   if (miiphy_read(devname, addr,
+   reg, val)) {
+   printf(Error reading from the PHY);
+   printf( addr=%02x, addr);
+   printf( reg=%02x\n, reg);
+   rcode = 1;
+   } else {
+   val = (val  ~mask) | (data  mask);
+   if (miiphy_write(devname, addr,
+reg, val)) {
+   printf(Error writing to the 
PHY);
+   printf( addr=%02x, addr);
+   printf( reg=%02x\n, reg);
+   rcode = 1;
+   }
+   }
+   }
+   }
} else if (strncmp(op, du, 2) == 0) {
ushort regs[6];
int ok = 1;
@@ -417,6 +443,7 @@ static int do_mii(cmd_tbl_t *cmdtp, int flag, int argc, 
char * const argv[])
last_reg_lo  = reglo;
last_reg_hi  = reghi;
last_data= data;
+   last_mask= mask;
 
return rcode;
 }
@@ -424,13 +451,15 @@ static int do_mii(cmd_tbl_t *cmdtp, int flag, int argc, 
char * const argv[])
 /***/
 
 U_BOOT_CMD(
-   mii,5,  1,  do_mii,
+   mii, 6, 1, do_mii,
MII utility commands,
-   device - list available devices\n
-   mii device devname   - set current device\n
-   mii info   addr  - display MII PHY info\n
-   mii read   addr reg- read  MII PHY addr register reg\n
-   mii write  addr reg data - write MII PHY addr register reg\n
-   mii dump   addr reg- pretty-print addr reg (0-5 
only)\n
+   device- list available devices\n
+   mii device devname  - set 

Re: [U-Boot] [PATCH v2 3/7] m68k: remove arch/m68k/lib/board.c

[Angelo Dureghello]

Hi Masahiro,

On 25/03/2015 04:20, Masahiro Yamada wrote:

Hi Angelo,


2015-03-17 15:55 GMT+09:00 Angelo Dureghello ang...@sysam.it:

On 17/03/2015 04:35, Masahiro Yamada wrote:


All the M68000 boards have switched to Generic Board.
This file is no longer necessary.



Hi Masahiro,

thanks.

Afaik, me and Alison converted and tested actually only 2 boards
(adding #define CONFIG_SYS_GENERIC_BOARD inside /include/configs/...)

Is this a problem ?  Afaik, the user going to build the board
will get a warning that he needs to switch to generic board.
So the same user will be the tester that all works. Correct ?


As a rule of generic board, people are supposed to do run-test
and then send a patch.


BTW, M68K is the last architecture that adopts per-board linker script.

M68K should switch to per-soc linker scripts like the other architecures.
It means all the followings should be merged into the single linker script
arch/m68k/cpu/u-boot.lds.

board/freescale/m52277evb/u-boot.lds
board/freescale/m5235evb/u-boot.lds
board/cobra5272/u-boot.lds
board/BuS/eb_cpu5282/u-boot.lds
board/freescale/m5208evbe/u-boot.lds
board/freescale/m5249evb/u-boot.lds
board/freescale/m5253demo/u-boot.lds
board/freescale/m5272c3/u-boot.lds
board/freescale/m5275evb/u-boot.lds
board/freescale/m5282evb/u-boot.lds
board/sysam/amcore/u-boot.lds
board/astro/mcf5373l/u-boot.lds
board/freescale/m53017evb/u-boot.lds
board/freescale/m5329evb/u-boot.lds
board/freescale/m5373evb/u-boot.lds
board/freescale/m54418twr/u-boot.lds
board/freescale/m54451evb/u-boot.lds
board/freescale/m54455evb/u-boot.lds
board/freescale/m547xevb/u-boot.lds
board/freescale/m548xevb/u-boot.lds






Is this possible for you?  (or for someone else?)


Sure, i look into this.
I start from checking what are the differences.




If there is no volunteer, it would be much easier to remove all the M68K boards
except the two you and Alison can maintain.

Maintain or Remove!



Best regards
Angelo

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Re: [U-Boot] [PATCH 2/2 v1] sf: Update AT45DB021D flash chip parameters

[Peng Fan]

Hi Haikun,

On 3/25/2015 8:36 PM, Haikun Wang wrote:

From: Haikun Wang haikun.w...@freescale.com

AT45DB021D flash size is 1024*page_size, page_size is 256bytes or 264bytes.
In current params_table its size is 64*1024*8, recorrect it.
Add AT45DB_CMD flag for AT45DB021D.

Signed-off-by: Haikun Wang haikun.w...@freescale.com
---

Changes in v1: None

  drivers/mtd/spi/sf_params.c | 3 ++-
  1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/mtd/spi/sf_params.c b/drivers/mtd/spi/sf_params.c
index c12e8c6..c6b68f8 100644
--- a/drivers/mtd/spi/sf_params.c
+++ b/drivers/mtd/spi/sf_params.c
@@ -16,7 +16,8 @@
  const struct spi_flash_params spi_flash_params_table[] = {
  #ifdef CONFIG_SPI_FLASH_ATMEL /* ATMEL */
{AT45DB011D,   0x1f2200, 0x0,   64 * 1024, 4, 
RD_NORM,  SECT_4K},
-   {AT45DB021D,   0x1f2300, 0x0,   64 * 1024, 8, 
RD_NORM,  SECT_4K},
+   {AT45DB021D,   0x1f2300, 0x0,   64 * 1024, 4,
+RD_NORM,   AT45DB_CMD},

It's sector size is 32K, count is 8, right?

{AT45DB041D,   0x1f2400, 0x0,   64 * 1024, 8, 
RD_NORM,  SECT_4K},
{AT45DB081D,   0x1f2500, 0x0,   64 * 1024,16, 
RD_NORM,  SECT_4K},
{AT45DB161D,   0x1f2600, 0x0,   64 * 1024,32, 
RD_NORM,  SECT_4K},

Regards,
Peng.
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Re: [U-Boot] [PATCH v2 03/12] dm: pmic: add implementation of driver model pmic uclass

[Przemyslaw Marczak]

Hello Simon,

On 03/06/2015 03:11 PM, Simon Glass wrote:

Hi Przemyslaw,

On 3 March 2015 at 09:24, Przemyslaw Marczak p.marc...@samsung.com wrote:

This is an introduction to driver-model multi uclass PMIC support.
It starts with UCLASS_PMIC - a common PMIC devices uclass type
to provide device read/write operations only.

Beside two basic operations the pmic platform data is introduced,
which provides basic informations about the pmic device I/O interface
and is shared with all childs (and should also for childs new uclass
types in the future).

Usually PMIC devices provides various functionalities with single
or multiple I/O interfaces.
Using this new framework and new uclass types introduced in the future,
it can be handle like this:

_ root device
|
|_ BUS 0 device (e.g. I2C0)- UCLASS_I2C/SPI/...
| |_ PMIC device 1 (read/write ops)- UCLASS_PMIC
|   |_ REGULATOR device (ldo/buck/... ops) - UCLASS_REGULATOR
|   |_ CHARGER device (charger ops)- UCLASS_CHARGER (in the future)
|   |_ MUIC device (microUSB con ops)  - UCLASS_MUIC(in the future)
|   |_ ...
|
|_ BUS 1 device (e.g. I2C1)- UCLASS_I2C/SPI/...
   |_ PMIC device 2 (read/write ops)- UCLASS_PMIC
 |_ RTC device (rtc ops)- UCLASS_MUIC (in the future)

For each PMIC device interface, new UCLASS_PMIC device is bind with proper
pmic driver, and it's child devices provides some specified operations.

All new definitions can be found in file:
- 'include/power/pmic.h'

Uclass file:
- pmic-uclass.c - provides a common code for UCLASS_PMIC device drivers

The old pmic framework is still kept and is independent.

Changes:
- new uclass-id: UCLASS_PMIC
- new config: CONFIG_DM_PMIC

New pmic api is documented in: doc/README.power-framework-dm

Signed-off-by: Przemyslaw Marczak p.marc...@samsung.com
---
Changes V2:
- pmic uclass: adjust uclass code to the mainline changes
- pmic uclass: remove pmic_i2c and pmic_spi
- pmic uclass: modify pmic_platdata
- pmic uclass: add pmic_if_* functions
- pmic uclass: remove pmic_init_dm()
- pmic uclass: cleanup
- pmic.h: define pmic ops structure (read/write operations)
- pmic.h: add comments to functions
---
  drivers/power/Makefile  |   1 +
  drivers/power/pmic-uclass.c | 191 +++
  include/dm/uclass-id.h  |   3 +
  include/power/pmic.h| 265 
  4 files changed, 460 insertions(+)
  create mode 100644 drivers/power/pmic-uclass.c


This should have a Kconfig file.



diff --git a/drivers/power/Makefile b/drivers/power/Makefile
index 2145652..5c9a189 100644
--- a/drivers/power/Makefile
+++ b/drivers/power/Makefile
@@ -21,3 +21,4 @@ obj-$(CONFIG_DIALOG_POWER) += power_dialog.o
  obj-$(CONFIG_POWER_FSL) += power_fsl.o
  obj-$(CONFIG_POWER_I2C) += power_i2c.o
  obj-$(CONFIG_POWER_SPI) += power_spi.o
+obj-$(CONFIG_DM_PMIC) += pmic-uclass.o
diff --git a/drivers/power/pmic-uclass.c b/drivers/power/pmic-uclass.c
new file mode 100644
index 000..309463e
--- /dev/null
+++ b/drivers/power/pmic-uclass.c
@@ -0,0 +1,191 @@
+/*
+ * Copyright (C) 2014-2015 Samsung Electronics
+ * Przemyslaw Marczak p.marc...@samsung.com
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+#include common.h
+#include linux/types.h
+#include fdtdec.h
+#include dm.h
+#include power/pmic.h
+#include dm/device-internal.h
+#include dm/uclass-internal.h
+#include dm/root.h
+#include dm/lists.h
+#include compiler.h
+#include errno.h
+
+DECLARE_GLOBAL_DATA_PTR;
+
+static char * const pmic_interfaces[] = {
+   I2C,
+   SPI,
+   --,
+};
+
+const char *pmic_if_str(struct udevice *pmic)
+{
+   int if_types = ARRAY_SIZE(pmic_interfaces);
+   int if_type;
+
+   if_type = pmic_if_type(pmic);
+   if (if_type  0 || if_type = if_types)
+   return pmic_interfaces[if_types - 1];
+
+   return pmic_interfaces[if_type];
+}
+
+int pmic_if_type(struct udevice *pmic)
+{
+   struct pmic_platdata *pl = pmic-platdata;
+
+   return pl-if_type;
+}
+
+int pmic_if_bus_num(struct udevice *pmic)
+{
+   struct pmic_platdata *pl = pmic-platdata;
+
+   return pl-if_bus_num;
+}
+
+int pmic_if_addr_cs(struct udevice *pmic)
+{
+   struct pmic_platdata *pl = pmic-platdata;
+
+   return pl-if_addr_cs;
+}
+
+int pmic_if_max_offset(struct udevice *pmic)
+{
+   struct pmic_platdata *pl = pmic-platdata;
+
+   return pl-if_max_offset;
+}
+
+int pmic_read(struct udevice *pmic, unsigned reg, unsigned char *val)
+{
+   const struct dm_pmic_ops *ops;
+
+   ops = pmic_get_uclass_ops(pmic, UCLASS_PMIC);
+   if (!ops)
+   return -ENODEV;
+
+   if (!ops-read)
+   return -EPERM;
+
+   if (ops-read(pmic, reg, val))
+   return -EIO;
+
+   return 0;
+}
+
+int pmic_write(struct udevice *pmic, unsigned reg, unsigned char val)
+{
+   const struct dm_pmic_ops *ops;
+
+   ops = pmic_get_uclass_ops(pmic, 

Re: [U-Boot] [PATCH v2 02/12] dm: device: add function device_get_first_child_by_uclass_id()

[Przemyslaw Marczak]

Hello Simon,

On 03/06/2015 03:11 PM, Simon Glass wrote:

Hi Przemyslaw,

On 3 March 2015 at 09:24, Przemyslaw Marczak p.marc...@samsung.com wrote:


To implement functionality for devices connected by some external
interface, sometimes there is need to implement more then one,
and different uclass type drivers.

But only one i2c/spi dm chip can exists, per each bus i2c address
or spi select. Then, it seems to be useful, to get the child device
by uclass type, for the parent with known chip address.

So, this change will be useful for the pmic case:
|- i2c bus
   '- pmic i2c chip (parent)
 '- uclass regulator (child 1)
 '- uclass charger (child 2)

This will allow to get the regulator or charger device if knows only parent
i2c/spi address.

Signed-off-by: Przemyslaw Marczak p.marc...@samsung.com
---
Changes V2:
- new commit
---
  drivers/core/device.c | 15 +++
  include/dm/device.h   | 16 
  2 files changed, 31 insertions(+)

diff --git a/drivers/core/device.c b/drivers/core/device.c
index 73c3e07..76b22cf 100644
--- a/drivers/core/device.c
+++ b/drivers/core/device.c
@@ -397,6 +397,21 @@ int device_find_child_by_of_offset(struct udevice *parent, 
int of_offset,
 return -ENODEV;
  }

+int device_get_first_child_by_uclass_id(struct udevice *parent, int uclass_id,


Can you please use the enum here instead of int?



+   struct udevice **devp)
+{
+   struct udevice *dev;
+
+   *devp = NULL;
+
+   list_for_each_entry(dev, parent-child_head, sibling_node) {
+   if (dev-driver-id == uclass_id)
+   return device_get_device_tail(dev, 0, devp);
+   }
+
+   return -ENODEV;
+}
+
  int device_get_child_by_of_offset(struct udevice *parent, int seq,
   struct udevice **devp)
  {
diff --git a/include/dm/device.h b/include/dm/device.h
index 7a48eb8..9f0d6ce 100644
--- a/include/dm/device.h
+++ b/include/dm/device.h
@@ -335,6 +335,22 @@ int device_get_child_by_of_offset(struct udevice *parent, 
int seq,
   struct udevice **devp);

  /**
+ * device_get_first_child_by_uclass_id() - Get the first child device based
+ * on UCLASS_ID
+ *
+ * Locates a child device by its uclass id.
+ *
+ * The device is probed to activate it ready for use.
+ *
+ * @parent: Parent device
+ * @uclass_id: child uclass id
+ * @devp: Returns pointer to device if found, otherwise this is set to NULL
+ * @return 0 if OK, -ve on error
+ */
+int device_get_first_child_by_uclass_id(struct udevice *parent, int uclass_id,
+   struct udevice **devp);
+
+/**
   * device_find_first_child() - Find the first child of a device
   *
   * @parent: Parent device to search
--
1.9.1



Regards,
Simon



This function is discarded in the V3.

Best regards,
--
Przemyslaw Marczak
Samsung RD Institute Poland
Samsung Electronics
p.marc...@samsung.com
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Re: [U-Boot] [PATCH v2 04/12] dm: pmic: add implementation of driver model regulator uclass

[Przemyslaw Marczak]

Hello Simon,

On 03/06/2015 03:12 PM, Simon Glass wrote:

Hi Przemyslaw,

On 3 March 2015 at 09:24, Przemyslaw Marczak p.marc...@samsung.com wrote:

This is the implementation of driver model regulator uclass api.
To use it, the CONFIG_DM_PMIC is required with driver implementation,
since it provides pmic devices basic I/O API.

The regulator framework is based on a 'struct dm_regulator_ops'.
It provides a common function calls, for it's basic features:
- regulator_get_cnt()- number of outputs each type
- regulator_get_value_desc() - describe output value limits
- regulator_get_mode_desc()  - describe output operation modes
- regulator_get/set_value()  - output value (uV)
- regulator_get/set_state()  - output on/off state


Would get/set_enable() be better?


- regulator_get/set_mode()   - output operation mode

To get the regulator device:
- regulator_get() - by name only
- regulator_i2c_get() - by i2c bus address (of pmic parent)
- regulator_spi_get() - by spi bus address (of pmic parent)


For the last two, why are we using bus address? This should be by a
phandle reference or nane.



An optional and useful regulator framework features are two descriptors:
- struct regulator_desc - describes the regulator name and output value limits
   should be defined by device driver for each regulator output.

- struct regulator_mode_desc - (array) describes a number of operation modes
   supported by each regulator output.

The regulator framework features are described in file:
- include/power/regulator.h

Main files:
- drivers/power/regulator-uclass.c - provides regulator common functions api
- include/power/regulator.h - define all structures required by the regulator

Changes:
- new uclass-id: UCLASS_PMIC_REGULATOR
- new config: CONFIG_DM_REGULATOR

Signed-off-by: Przemyslaw Marczak p.marc...@samsung.com
---
Changes V2:
- new operations for regulator uclass:
-- get/set output state - for output on/off setting
--- add enum: REGULATOR_OFF, REGULATOR_ON

- regulator uclass code rework and cleanup:
-- change name of:
--- enum 'regulator_desc_type' to 'regulator_type'
--- add type DVS
--- struct 'regulator_desc' to 'regulator_value_desc'

-- regulator ops function calls:
--- remove 'ldo/buck' from naming
--- add new argument 'type' for define regulator type

-- regulator.h - update comments
---
  drivers/power/Makefile   |   1 +
  drivers/power/regulator-uclass.c | 227 
  include/dm/uclass-id.h   |   1 +
  include/power/regulator.h| 310 +++
  4 files changed, 539 insertions(+)
  create mode 100644 drivers/power/regulator-uclass.c
  create mode 100644 include/power/regulator.h

diff --git a/drivers/power/Makefile b/drivers/power/Makefile
index 5c9a189..a6b7012 100644
--- a/drivers/power/Makefile
+++ b/drivers/power/Makefile
@@ -22,3 +22,4 @@ obj-$(CONFIG_POWER_FSL) += power_fsl.o
  obj-$(CONFIG_POWER_I2C) += power_i2c.o
  obj-$(CONFIG_POWER_SPI) += power_spi.o
  obj-$(CONFIG_DM_PMIC) += pmic-uclass.o
+obj-$(CONFIG_DM_REGULATOR) += regulator-uclass.o
diff --git a/drivers/power/regulator-uclass.c b/drivers/power/regulator-uclass.c
new file mode 100644
index 000..6b5c678
--- /dev/null
+++ b/drivers/power/regulator-uclass.c
@@ -0,0 +1,227 @@
+/*
+ * Copyright (C) 2014-2015 Samsung Electronics
+ * Przemyslaw Marczak p.marc...@samsung.com
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+#include common.h
+#include linux/types.h
+#include fdtdec.h
+#include dm.h
+#include power/pmic.h
+#include power/regulator.h
+#include compiler.h
+#include dm/device.h
+#include dm/lists.h
+#include dm/device-internal.h
+#include errno.h
+
+DECLARE_GLOBAL_DATA_PTR;
+
+int regulator_get_cnt(struct udevice *dev, int type, int *cnt)
+{
+   const struct dm_regulator_ops *ops;
+
+   ops = pmic_get_uclass_ops(dev, UCLASS_PMIC_REGULATOR);
+   if (!ops)
+   return -ENODEV;


This is an error so you should be able to just assert(). Failing that
let's use -ENXIO as you do below.


+
+   if (!ops-get_cnt)
+   return -EPERM;


-ENOSYS for these.



Ah, I missed this one, will fix in V4.


+
+   return ops-get_cnt(dev, type, cnt);
+}
+
+int regulator_get_value_desc(struct udevice *dev, int type, int number,
+struct regulator_value_desc **desc)
+{
+   const struct dm_regulator_ops *ops;
+
+   ops = pmic_get_uclass_ops(dev, UCLASS_PMIC_REGULATOR);
+   if (!ops)
+   return -ENXIO;
+
+   if (!ops-get_value_desc)
+   return -EPERM;
+
+   return ops-get_value_desc(dev, type, number, desc);
+}
+
+int regulator_get_mode_desc(struct udevice *dev, int type, int number,
+   int *mode_cnt, struct regulator_mode_desc **desc)
+{
+   const struct dm_regulator_ops *ops;
+
+   ops = pmic_get_uclass_ops(dev, UCLASS_PMIC_REGULATOR);
+   if (!ops)
+   return -ENXIO;
+
+   if 

Re: [U-Boot] [PATCH 1/3] Create API to map between CPU physical and bus addresses

[Stephen Warren]

On 03/25/2015 05:55 AM, Marek Vasut wrote:

On Wednesday, March 25, 2015 at 03:07:33 AM, Stephen Warren wrote:

On some SoCs, DMA-capable peripherals see a different address space to
the CPU's physical address space. Create an API to allow platform-agnostic
drivers to convert between the two address spaces when programming DMA
operations.

This API will exist on all platforms, but will have a dummy implementation
when this feature is not required. Other platforms will enable
CONFIG_PHYS_TO_BUS and provide the required implementation.

Signed-off-by: Stephen Warren swar...@wwwdotorg.org


Applied to -next, thanks!

btw. can't you use __weak here instead of a new ifdef macro (which is not
documented btw)?


__weak wont' work with inlines, which I used to ensure zero code 
overhead in the case the functions aren't needed. If we were OK with 
calling a no-op function in all cases, we could indeed provide a weak 
default implementation and get rid of the ifdef.


The new option is documented in the Kconfig file. I assume we don't need 
to document options in multiple places (both Kconfig and README), since 
if we do, the documentation is bound to become inconsistent in those two 
places. Hopefully README goes away once everything is in Kconfig.

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Re: [U-Boot] [PATCH v2 05/12] dm: pmic: new commands: pmic and regulator

[Przemyslaw Marczak]

Hello Simon,

On 03/06/2015 03:13 PM, Simon Glass wrote:

Hi Przemyslaw,

On 3 March 2015 at 09:24, Przemyslaw Marczak p.marc...@samsung.com wrote:

This introduces new commands:
- pmic (new) - CONFIG_DM_PMIC_CMD
- regulator - CONFIG_DM_REGULATOR_CMD
Both uses a common code and dm pmic api.

To avoid code mess the old pmic command is kept without changes.

Command pmic
The new pmic command uses driver model pmic api. The previous pmic
I/O functionality is keept. And now read/write is the main pmic command
feature. This command can be used only for UCLASS_PMIC devices,
since this uclass is designed for pmic I/O operations only and provides
pmic platform data.

Command options (pmic [option]):
- list - list available PMICs
- dev id - set id to current pmic device
- pmic dump- dump registers
- pmic read reg  - read register
- pmic write reg value - write register

The user interface is changed. Before any operation, first the device
should be chosen.

Command regulator
It uses the same code, but provides user interface for regulator devices.

This was designed to access the regulator device without it's documentation.
It is possible, if driver implements uclass features, e.g. output descriptors.

Available commands:
- list - list UCLASS regulator devices
- dev [id] - show or set current regulator device
- dump - dump registers of current regulator device
- [ldo/buck/dvs][N] [name/state/desc]- print regulator(s) info
- [ldoN/buckN/dvsN] [setval/setmode] [mV/modeN] [-f] - set val (mV)
or mode - only if descriptor exists

The regulator descriptor 'min' and 'max' limits prevents setting
unsafe value. But sometimes it is useful to change the regulator
value for some test - so the force option (-f) is available.
This option is not available for change the mode, since this depends
on pmic device design.


This help could go in Kconfig.



Signed-off-by: Przemyslaw Marczak p.marc...@samsung.com
---
Changes v2:
- remove errno_str() call
- pmic command: move some code to pmic uclass
- pmic command: code cleanup
- fix data types
- add command line, regulator on/off setting feature
- adjust to new pmic api
- cleanup
---
  drivers/power/Makefile   |   2 +
  drivers/power/cmd_pmic.c | 820 +++
  2 files changed, 822 insertions(+)
  create mode 100644 drivers/power/cmd_pmic.c

diff --git a/drivers/power/Makefile b/drivers/power/Makefile
index a6b7012..943b38f 100644
--- a/drivers/power/Makefile
+++ b/drivers/power/Makefile
@@ -22,4 +22,6 @@ obj-$(CONFIG_POWER_FSL) += power_fsl.o
  obj-$(CONFIG_POWER_I2C) += power_i2c.o
  obj-$(CONFIG_POWER_SPI) += power_spi.o
  obj-$(CONFIG_DM_PMIC) += pmic-uclass.o
+obj-$(CONFIG_DM_PMIC_CMD) += cmd_pmic.o
  obj-$(CONFIG_DM_REGULATOR) += regulator-uclass.o
+obj-$(CONFIG_DM_REGULATOR_CMD) += cmd_pmic.o


Can we put this in its own file? Also perhaps it should go in common?
Not sure about that though.


diff --git a/drivers/power/cmd_pmic.c b/drivers/power/cmd_pmic.c
new file mode 100644
index 000..996bfe7
--- /dev/null
+++ b/drivers/power/cmd_pmic.c
@@ -0,0 +1,820 @@
+/*
+ * Copyright (C) 2014-2015 Samsung Electronics
+ * Przemyslaw Marczak p.marc...@samsung.com
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+#include common.h
+#include linux/types.h
+#include linux/ctype.h
+#include fdtdec.h
+#include dm.h
+#include power/pmic.h
+#include power/regulator.h
+#include dm/device-internal.h
+#include dm/uclass-internal.h
+#include dm/root.h
+#include dm/lists.h


Please sort includes:

common.h
others in order
asm/...
dm/...
linux/...
local includes


+#include i2c.h
+#include compiler.h
+#include errno.h
+
+#define LINE_BUF_LIMIT 80
+#define STR_BUF_LEN26
+#define ID_STR_LIMIT   4
+#define UC_STR_LIMIT   16
+#define DRV_STR_LIMIT  26
+#define IF_STR_LIMIT   12
+
+static struct udevice *pmic_curr;
+static struct udevice *reg_curr;
+
+#ifdef CONFIG_DM_REGULATOR_CMD
+#define TYPE_INFO(_id, _name) { \
+   .id = _id, \
+   .len = ARRAY_SIZE(_name) - 1, \
+   .name = _name, \
+}
+
+enum display_info {
+   INFO_NAME,
+   INFO_STATE,
+   INFO_DESC,
+   INFO_DESC_MODE,
+   INFO_DESC_VAL,
+};
+
+struct regulator_type_info {
+   int id;
+   int len;
+   char *name;
+};
+
+static struct regulator_type_info type_info[] = {
+   TYPE_INFO(REGULATOR_TYPE_LDO, ldo),
+   TYPE_INFO(REGULATOR_TYPE_BUCK, buck),
+   TYPE_INFO(REGULATOR_TYPE_DVS, dvs),
+};
+
+char *regulator_type_str(int regulator_type)
+{
+   switch (regulator_type) {
+   case REGULATOR_TYPE_LDO:
+   case REGULATOR_TYPE_BUCK:
+   case REGULATOR_TYPE_DVS:
+   return type_info[regulator_type].name;
+   default:
+   return NULL;
+   }
+}
+#endif /* CONFIG_DM_REGULATOR_CMD */
+
+static int set_curr_dev(struct udevice *dev)
+{
+   if (!dev)
+   return -EINVAL;
+
+   if (!dev-driver)
+   return 

Re: [U-Boot] [PATCH v2 00/12] Power(full) framework based on Driver Model

[Przemyslaw Marczak]

Hello Simon,

On 03/10/2015 03:12 AM, Simon Glass wrote:

Hi Przemyslaw,

On 6 March 2015 at 07:10, Simon Glass s...@chromium.org wrote:

Hi Przemyslaw,

On 3 March 2015 at 09:24, Przemyslaw Marczak p.marc...@samsung.com wrote:

Hello,
Here is the second RFC version of the new PMIC framework.
The changes made in this version are described below each commit.

So again, a quick summary of:
Framework:
- Add new uclass types:
  -- UCLASS_PMIC(for device I/O)
  -- UCLASS_PMIC_REGULATOR (for common regulator ops)
- Two uclass drivers for the above types
- A common regulator operations - will easy cover the real devices design
- V2: pmic: add read/write ops
- V2: regulator: use regulator type as an argument - not as function name


Drivers:
- Introduce new PMIC API for drivers - now everything base on struct udevice
- Introduce Regulator Voltage descriptors and Operation Mode descriptors
   which are usually taken from the device tree (board dependent data)
- Two uclass device drivers for MAX77686(PMIC+REGULATOR)
- V2: don't use the 'hw union' from old pmic
- V2: remove the files: pmic_i2c.c/pmic_spi.c - now using bus drivers
- V2: cleanup the pmic_get() functions
- V2: add pmic_io_dev() function for getting the proper I/O dev for devices
- V2: add function calls for getting pmic devices platdata
- V2: remove regulator type from regulator operations function calls,
   use type as an argument

User Interface:
- command pmic, unchanged functionality and ported to the driver model
- command regulator(NEW) for safe regulator setup from commandline,
   - now can check output Voltage and operation mode of the regulators,
   - also can check the board Voltage limits and driver available modes
- V2: simplify the code after remove the regulator type from function naming
- V2: add on/off command

Supported boards:
- Odroid U3
- V2: drop the commits for Trats2 - wait for charger and muic uclass types

The assumptions of this work is:
- Add new code to independent files
- Keep two Frameworks as independent and without conflicts
- Don't mix OLD/NEW Framework code - for the readability

The future plans:
- Add additional uclass types: MUIC, CHARGER, BATTERY, MFD and maybe more.
- Port all U-Boot drivers to the new Framework
- Remove the old drivers and the old PMIC Framework code

Need help:
- After merge this, it is welcome to help with driver porting
- Every new driver should be tested on real hardware

Best regards

Przemyslaw Marczak (12):
   exynos5: fix build break by adding CONFIG_POWER
   dm: device: add function device_get_first_child_by_uclass_id()
   dm: pmic: add implementation of driver model pmic uclass
   dm: pmic: add implementation of driver model regulator uclass
   dm: pmic: new commands: pmic and regulator
   dm: pmic: add max77686 pmic driver
   dm: regulator: add max77686 regulator driver
   doc: driver-model: pmic and regulator uclass documentation
   dm: board:samsung: power_init_board: add requirement of CONFIG_DM_PMIC
   odroid: board: add support to dm pmic api
   odroid: dts: add 'voltage-regulators' description to max77686 node
   odroid: config: enable dm pmic, dm regulator and max77686 driver

  Makefile   |   1 +
  arch/arm/dts/exynos4412-odroid.dts | 249 -
  board/samsung/common/board.c   |   4 +-
  board/samsung/common/misc.c|   1 +
  board/samsung/odroid/odroid.c  |  52 +-
  configs/odroid_defconfig   |   1 -
  doc/driver-model/dm-pmic-framework.txt | 367 +
  drivers/core/device.c  |  15 +
  drivers/power/Makefile |   5 +-
  drivers/power/cmd_pmic.c   | 820 +
  drivers/power/pmic-uclass.c| 191 +++
  drivers/power/pmic/Makefile|   1 +
  drivers/power/pmic/max77686.c  | 102 
  drivers/power/pmic/pmic_max77686.c |   2 +-
  drivers/power/regulator-uclass.c   | 227 
  drivers/power/regulator/Makefile   |   8 +
  drivers/power/regulator/max77686.c | 926 +
  include/configs/exynos5-common.h   |   4 +
  include/configs/odroid.h   |   9 +-
  include/dm/device.h|  16 +
  include/dm/uclass-id.h |   4 +
  include/power/max77686_pmic.h  |  26 +-
  include/power/pmic.h   | 265 ++
  include/power/regulator.h  | 310 +++
  24 files changed, 3573 insertions(+), 33 deletions(-)
  create mode 100644 doc/driver-model/dm-pmic-framework.txt
  create mode 100644 drivers/power/cmd_pmic.c
  create mode 100644 drivers/power/pmic-uclass.c
  create mode 100644 drivers/power/pmic/max77686.c
  create mode 100644 drivers/power/regulator-uclass.c
  create mode 100644 drivers/power/regulator/Makefile
  create mode 100644 drivers/power/regulator/max77686.c
  create mode 100644 include/power/regulator.h


This is an impressive pieces of work! It will be great to 

Re: [U-Boot] [PATCH] watchdog/imx_watchdog: do not set WCR_WDW

[Stefano Babic]

On 03/03/2015 17:45, Sebastian Andrzej Siewior wrote:
 with WCR_WDW set, the watchdog won't trigger if we bootet linux and idle
 around while the watchdog is not triggered. It seems the timer makes
 progress very slowly if at all. I managed to remain 20minutes alive
 while the timeout was set to 60secs. It reboots within 60secs if I start
 a busyloop in userland (something like while (1) { }).
 
 While I don't see a reason why the WDT should not be running while the
 CPU is in idle, I'm dropping this bit.
 
 Signed-off-by: Sebastian Andrzej Siewior bige...@linutronix.de
 ---

Applied to u-boot-imx, thanks !

Best regards,
Stefano Babic


-- 
=
DENX Software Engineering GmbH,  Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de
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Re: [U-Boot] [PATCH v2 08/12] doc: driver-model: pmic and regulator uclass documentation

[Przemyslaw Marczak]

Hello,

On 03/06/2015 03:14 PM, Simon Glass wrote:

[...]



This is a good and thorough overview. Can we drop the 'dm-' prefix on
the filename and word-wrap it a bit more consistently towards the end
(lots of short lines at present). Some of the phrasing is a bit hard
to parse, but we can figure out that later.

Regards,
Simon



The V3 version of this file, is updated with the new framework changes, 
I will compress the lines in the next patch version.


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Samsung RD Institute Poland
Samsung Electronics
p.marc...@samsung.com
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Re: [U-Boot] [PATCH 1/3] Create API to map between CPU physical and bus addresses

[Marek Vasut]

On Wednesday, March 25, 2015 at 03:40:28 PM, Stephen Warren wrote:
 On 03/25/2015 05:55 AM, Marek Vasut wrote:
  On Wednesday, March 25, 2015 at 03:07:33 AM, Stephen Warren wrote:
  On some SoCs, DMA-capable peripherals see a different address space to
  the CPU's physical address space. Create an API to allow
  platform-agnostic drivers to convert between the two address spaces
  when programming DMA operations.
  
  This API will exist on all platforms, but will have a dummy
  implementation when this feature is not required. Other platforms will
  enable
  CONFIG_PHYS_TO_BUS and provide the required implementation.
  
  Signed-off-by: Stephen Warren swar...@wwwdotorg.org
  
  Applied to -next, thanks!
  
  btw. can't you use __weak here instead of a new ifdef macro (which is not
  documented btw)?
 
 __weak wont' work with inlines, which I used to ensure zero code
 overhead in the case the functions aren't needed. If we were OK with
 calling a no-op function in all cases, we could indeed provide a weak
 default implementation and get rid of the ifdef.

OK, makes sense.

 The new option is documented in the Kconfig file. I assume we don't need
 to document options in multiple places (both Kconfig and README), since
 if we do, the documentation is bound to become inconsistent in those two
 places. Hopefully README goes away once everything is in Kconfig.

Yup, agreed.

Thanks for clearing this up :)

Best regards,
Marek Vasut
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[U-Boot] [PATCH] sunxi: axp209: fix incorrect limits on ldo3

[Iain Paton]

board/sunxi/board.c tries to set ldo3 to 2.8v however drivers/power/axp209.c
contains an incorrect limit on ldo3 of 2.275v

The origin of the incorrect limit seems likely due to some inconsistencies
in the axp209 datasheet. ldo3 is described with different limits in 
different sections. register 0x29 uses 7 bits for voltage configuration
while the 2.275v limit would apply if only 6 bits were used.
Probably this is a cutpaste error from register 0x23

The linux kernel driver has the correct limit and operation up to the 2.8v
required by my board has been physically verified with a multimeter.

Signed-off-by: Iain Paton ipat...@gmail.com
---
 drivers/power/axp209.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/power/axp209.c b/drivers/power/axp209.c
index 4565398..f8c9b77 100644
--- a/drivers/power/axp209.c
+++ b/drivers/power/axp209.c
@@ -119,7 +119,7 @@ int axp209_set_ldo3(int mvolt)
if (mvolt == -1)
cfg = 0x80; /* determined by LDO3IN pin */
else
-   cfg = axp209_mvolt_to_cfg(mvolt, 700, 2275, 25);
+   cfg = axp209_mvolt_to_cfg(mvolt, 700, 3500, 25);
 
return axp209_write(AXP209_LDO3_VOLTAGE, cfg);
 }
-- 
2.1.3

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Re: [U-Boot] [PATCH v2 10/12] odroid: board: add support to dm pmic api

[Przemyslaw Marczak]

Hello,

On 03/06/2015 03:14 PM, Simon Glass wrote:

Hi Przemyslaw,

On 3 March 2015 at 09:24, Przemyslaw Marczak p.marc...@samsung.com wrote:

This commit change the old pmic framework calls with the new ones.

Signed-off-by: Przemyslaw Marczak p.marc...@samsung.com
---
Changes v2:
- remove board_init_i2c() call
- update regulator calls
- update headers
- samsung/misc.c: include required header
---
  board/samsung/common/misc.c   |  1 +
  board/samsung/odroid/odroid.c | 52 ++-
  2 files changed, 33 insertions(+), 20 deletions(-)

diff --git a/board/samsung/common/misc.c b/board/samsung/common/misc.c
index 4538ac7..18d71e8 100644
--- a/board/samsung/common/misc.c
+++ b/board/samsung/common/misc.c
@@ -16,6 +16,7 @@
  #include asm/arch/cpu.h
  #include asm/gpio.h
  #include linux/input.h
+#include dm.h
  #include power/pmic.h
  #include mmc.h

diff --git a/board/samsung/odroid/odroid.c b/board/samsung/odroid/odroid.c
index bff6ac9..2448cde 100644
--- a/board/samsung/odroid/odroid.c
+++ b/board/samsung/odroid/odroid.c
@@ -12,7 +12,9 @@
  #include asm/arch/gpio.h
  #include asm/gpio.h
  #include asm/arch/cpu.h
+#include dm.h
  #include power/pmic.h
+#include power/regulator.h
  #include power/max77686_pmic.h
  #include errno.h
  #include usb.h
@@ -402,15 +404,23 @@ static void board_gpio_init(void)

  static int pmic_init_max77686(void)
  {
-   struct pmic *p = pmic_get(MAX77686_PMIC);
+   struct udevice *reg;
+   int type;

-   if (pmic_probe(p))
+   if (regulator_get(max77686, reg)) {
+   error(Regulator get error\n);
 return -ENODEV;
+   }

 /* Set LDO Voltage */
-   max77686_set_ldo_voltage(p, 20, 180);   /* LDO20 eMMC */
-   max77686_set_ldo_voltage(p, 21, 280);   /* LDO21 SD */
-   max77686_set_ldo_voltage(p, 22, 280);   /* LDO22 eMMC */
+   type = REGULATOR_TYPE_LDO;
+   regulator_set_value(reg, type, 20, 180);/* LDO20 eMMC */
+   regulator_set_value(reg, type, 21, 280);/* LDO21 SD */
+   regulator_set_value(reg, type, 22, 280);/* LDO22 eMMC */
+
+   regulator_set_mode(reg, type, 20, OPMODE_ON);
+   regulator_set_mode(reg, type, 21, OPMODE_ON);
+   regulator_set_mode(reg, type, 22, OPMODE_ON);


These 20, 21, 22 values seem bad to me. Do we not have names? Also I
see in the device tree that these regulators have the same min and max
voltage, so perhaps you can use that voltage automatically?

I think when you change the LDOs to devices you might end up with:

struct udevice *ldo;

ret = regulator_get(VCCQ_MMC2_2.8V, ldo);   // use the regulator
device name which comes from regulator-name property.
if (ret) {
debug(...)
goto err;
}
ret = regulator_set_voltage(ldo, 180);
...error check
ret = regulator_set_mode(ldo, OPMODE_ON);
...error check



The above suggestion is implemented in V3.



 return 0;
  }
@@ -435,7 +445,6 @@ int exynos_init(void)

  int exynos_power_init(void)
  {
-   pmic_init(0);
 pmic_init_max77686();

 return 0;
@@ -444,19 +453,21 @@ int exynos_power_init(void)
  #ifdef CONFIG_USB_GADGET
  static int s5pc210_phy_control(int on)
  {
-   struct pmic *p_pmic;
+   struct udevice *reg;
+   int type;

-   p_pmic = pmic_get(MAX77686_PMIC);
-   if (!p_pmic)
+   if (regulator_get(max77686, reg)) {
+   error(Regulator get error\n);
 return -ENODEV;
+   }

-   if (pmic_probe(p_pmic))
-   return -1;
+   type = REGULATOR_TYPE_LDO;

 if (on)
-   return max77686_set_ldo_mode(p_pmic, 12, OPMODE_ON);
+   return regulator_set_mode(reg, type, 12, OPMODE_ON);
 else
-   return max77686_set_ldo_mode(p_pmic, 12, OPMODE_LPM);
+   return regulator_set_mode(reg, type, 12, OPMODE_LPM);
+
  }

  struct s3c_plat_otg_data s5pc210_otg_data = {
@@ -473,7 +484,8 @@ struct s3c_plat_otg_data s5pc210_otg_data = {
  int board_usb_init(int index, enum usb_init_type init)
  {
  #ifdef CONFIG_CMD_USB
-   struct pmic *p_pmic;
+   struct udevice *reg;
+   int type, ret;

 /* Set Ref freq 0 = 24MHz, 1 = 26MHz*/
 /* Odroid Us have it at 24MHz, Odroid Xs at 26MHz */
@@ -491,14 +503,14 @@ int board_usb_init(int index, enum usb_init_type init)
 /* Power off and on BUCK8 for LAN9730 */
 debug(LAN9730 - Turning power buck 8 OFF and ON.\n);

-   p_pmic = pmic_get(MAX77686_PMIC);
-   if (p_pmic  !pmic_probe(p_pmic)) {
-   max77686_set_buck_voltage(p_pmic, 8, 75);
-   max77686_set_buck_voltage(p_pmic, 8, 330);
+   if (regulator_get(max77686, reg)) {
+   type = REGULATOR_TYPE_BUCK;
+   ret = regulator_set_value(reg, type, 8, 75);
+   ret |= regulator_set_value(reg, type, 8, 330);
+   if (ret)
+   error(Can't set 

Re: [U-Boot] [PATCH v2 07/12] dm: regulator: add max77686 regulator driver

[Przemyslaw Marczak]

Hello Simon,

On 03/06/2015 03:14 PM, Simon Glass wrote:

Hi Przemyslaw,

On 3 March 2015 at 09:24, Przemyslaw Marczak p.marc...@samsung.com wrote:

This commit adds support to max77686 regulator driver
based on a uclass regulator driver-model api, which
provides implementation of all uclass regulator api
function calls.

New file: drivers/power/regulator/max77686.c
New config: CONFIG_DM_REGULATOR_MAX77686

Signed-off-by: Przemyslaw Marczak p.marc...@samsung.com
---
Changes V2:
- change debug() to error()
- code cleanup
- fix data types
- ldo/buck state implementation
- adjust to new uclass api
---
  Makefile   |   1 +
  drivers/power/Makefile |   1 -
  drivers/power/regulator/Makefile   |   8 +
  drivers/power/regulator/max77686.c | 926 +
  include/power/max77686_pmic.h  |  24 +-
  5 files changed, 956 insertions(+), 4 deletions(-)
  create mode 100644 drivers/power/regulator/Makefile
  create mode 100644 drivers/power/regulator/max77686.c

diff --git a/Makefile b/Makefile
index 6da4215..fcb37ae 100644
--- a/Makefile
+++ b/Makefile
@@ -627,6 +627,7 @@ libs-y += drivers/power/ \
 drivers/power/fuel_gauge/ \
 drivers/power/mfd/ \
 drivers/power/pmic/ \
+   drivers/power/regulator/ \
 drivers/power/battery/
  libs-y += drivers/spi/
  libs-$(CONFIG_FMAN_ENET) += drivers/net/fm/
diff --git a/drivers/power/Makefile b/drivers/power/Makefile
index 943b38f..7ff1baa 100644
--- a/drivers/power/Makefile
+++ b/drivers/power/Makefile
@@ -15,7 +15,6 @@ obj-$(CONFIG_TPS6586X_POWER)  += tps6586x.o
  obj-$(CONFIG_TWL4030_POWER)+= twl4030.o
  obj-$(CONFIG_TWL6030_POWER)+= twl6030.o
  obj-$(CONFIG_PALMAS_POWER) += palmas.o
-
  obj-$(CONFIG_POWER) += power_core.o
  obj-$(CONFIG_DIALOG_POWER) += power_dialog.o
  obj-$(CONFIG_POWER_FSL) += power_fsl.o
diff --git a/drivers/power/regulator/Makefile b/drivers/power/regulator/Makefile
new file mode 100644
index 000..9d282e3
--- /dev/null
+++ b/drivers/power/regulator/Makefile
@@ -0,0 +1,8 @@
+#
+# Copyright (C) 2014 Samsung Electronics
+# Przemyslaw Marczak p.marc...@samsung.com
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+obj-$(CONFIG_DM_REGULATOR_MAX77686) += max77686.o
diff --git a/drivers/power/regulator/max77686.c 
b/drivers/power/regulator/max77686.c
new file mode 100644
index 000..711c19c
--- /dev/null
+++ b/drivers/power/regulator/max77686.c
@@ -0,0 +1,926 @@
+/*
+ *  Copyright (C) 2012-2015 Samsung Electronics
+ *
+ *  Rajeshwari Shinde rajeshwar...@samsung.com
+ *  Przemyslaw Marczak p.marc...@samsung.com
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include common.h
+#include fdtdec.h
+#include i2c.h
+#include dm.h
+#include power/pmic.h
+#include power/regulator.h
+#include power/max77686_pmic.h
+#include errno.h
+#include dm.h
+
+DECLARE_GLOBAL_DATA_PTR;
+
+struct max77686_regulator_info {
+   int ldo_cnt;
+   int buck_cnt;
+   struct regulator_value_desc ldo_desc[MAX77686_LDO_NUM + 1];


Why +1? Then let's use MAX77686_LDO_COUNT for the number of LDOs.


+   struct regulator_value_desc buck_desc[MAX77686_BUCK_NUM + 1];
+};
+
+#define MODE(_mode, _val, _name) { \
+   .mode = _mode, \
+   .register_value = _val, \
+   .name = _name, \
+}
+
+/* LDO: 1,3,4,5,9,17,18,19,20,21,22,23,24,26,26,27 */
+static struct regulator_mode_desc max77686_ldo_mode_standby1[] = {
+   MODE(OPMODE_OFF, MAX77686_LDO_MODE_OFF, OFF),
+   MODE(OPMODE_LPM, MAX77686_LDO_MODE_LPM, LPM),
+   MODE(OPMODE_STANDBY_LPM, MAX77686_LDO_MODE_STANDBY_LPM, ON/LPM),
+   MODE(OPMODE_ON, MAX77686_LDO_MODE_ON, ON),
+};
+
+/* LDO: 2,6,7,8,10,11,12,14,15,16 */
+static struct regulator_mode_desc max77686_ldo_mode_standby2[] = {
+   MODE(OPMODE_OFF, MAX77686_LDO_MODE_OFF, OFF),
+   MODE(OPMODE_STANDBY, MAX77686_LDO_MODE_STANDBY, ON/OFF),
+   MODE(OPMODE_STANDBY_LPM, MAX77686_LDO_MODE_STANDBY_LPM, ON/LPM),
+   MODE(OPMODE_ON, MAX77686_LDO_MODE_ON, ON),
+};
+
+/* Buck: 1 */
+static struct regulator_mode_desc max77686_buck_mode_standby[] = {
+   MODE(OPMODE_OFF, MAX77686_BUCK_MODE_OFF, OFF),
+   MODE(OPMODE_STANDBY, MAX77686_BUCK_MODE_STANDBY, ON/OFF),
+   MODE(OPMODE_ON, MAX77686_BUCK_MODE_ON, ON),
+};
+
+/* Buck: 2,3,4 */
+static struct regulator_mode_desc max77686_buck_mode_lpm[] = {
+   MODE(OPMODE_OFF, MAX77686_BUCK_MODE_OFF, OFF),
+   MODE(OPMODE_STANDBY, MAX77686_BUCK_MODE_STANDBY, ON/OFF),
+   MODE(OPMODE_LPM, MAX77686_BUCK_MODE_LPM, LPM),
+   MODE(OPMODE_ON, MAX77686_BUCK_MODE_ON, ON),
+};
+
+/* Buck: 5,6,7,8,9 */
+static struct regulator_mode_desc max77686_buck_mode_onoff[] = {
+   MODE(OPMODE_OFF, MAX77686_BUCK_MODE_OFF, OFF),
+   MODE(OPMODE_ON, MAX77686_BUCK_MODE_ON, ON),
+};
+
+static const char max77686_buck_addr[] = {
+   0xff, 0x10, 0x12, 0x1c, 0x26, 0x30, 0x32, 0x34, 0x36, 0x38
+};
+
+static int max77686_buck_volt2hex(int buck, int uV)
+{
+   unsigned int 

Re: [U-Boot] [PATCH v2 04/12] dm: pmic: add implementation of driver model regulator uclass

[Przemyslaw Marczak]

Hello Robert,

On 03/10/2015 12:41 PM, Robert Baldyga wrote:

Hi,

On 03/03/2015 05:24 PM, Przemyslaw Marczak wrote:

This is the implementation of driver model regulator uclass api.
To use it, the CONFIG_DM_PMIC is required with driver implementation,
since it provides pmic devices basic I/O API.

The regulator framework is based on a 'struct dm_regulator_ops'.
It provides a common function calls, for it's basic features:
- regulator_get_cnt()- number of outputs each type
- regulator_get_value_desc() - describe output value limits
- regulator_get_mode_desc()  - describe output operation modes
- regulator_get/set_value()  - output value (uV)
- regulator_get/set_state()  - output on/off state
- regulator_get/set_mode()   - output operation mode

To get the regulator device:
- regulator_get() - by name only
- regulator_i2c_get() - by i2c bus address (of pmic parent)
- regulator_spi_get() - by spi bus address (of pmic parent)

An optional and useful regulator framework features are two descriptors:
- struct regulator_desc - describes the regulator name and output value limits
   should be defined by device driver for each regulator output.

- struct regulator_mode_desc - (array) describes a number of operation modes
   supported by each regulator output.

The regulator framework features are described in file:
- include/power/regulator.h

Main files:
- drivers/power/regulator-uclass.c - provides regulator common functions api
- include/power/regulator.h - define all structures required by the regulator

Changes:
- new uclass-id: UCLASS_PMIC_REGULATOR
- new config: CONFIG_DM_REGULATOR

Signed-off-by: Przemyslaw Marczak p.marc...@samsung.com
---
Changes V2:
- new operations for regulator uclass:
-- get/set output state - for output on/off setting
--- add enum: REGULATOR_OFF, REGULATOR_ON

- regulator uclass code rework and cleanup:
-- change name of:
--- enum 'regulator_desc_type' to 'regulator_type'
--- add type DVS
--- struct 'regulator_desc' to 'regulator_value_desc'

-- regulator ops function calls:
--- remove 'ldo/buck' from naming
--- add new argument 'type' for define regulator type

-- regulator.h - update comments
---
  drivers/power/Makefile   |   1 +
  drivers/power/regulator-uclass.c | 227 
  include/dm/uclass-id.h   |   1 +
  include/power/regulator.h| 310 +++
  4 files changed, 539 insertions(+)
  create mode 100644 drivers/power/regulator-uclass.c
  create mode 100644 include/power/regulator.h

diff --git a/drivers/power/Makefile b/drivers/power/Makefile
index 5c9a189..a6b7012 100644
--- a/drivers/power/Makefile
+++ b/drivers/power/Makefile
@@ -22,3 +22,4 @@ obj-$(CONFIG_POWER_FSL) += power_fsl.o
  obj-$(CONFIG_POWER_I2C) += power_i2c.o
  obj-$(CONFIG_POWER_SPI) += power_spi.o
  obj-$(CONFIG_DM_PMIC) += pmic-uclass.o
+obj-$(CONFIG_DM_REGULATOR) += regulator-uclass.o
diff --git a/drivers/power/regulator-uclass.c b/drivers/power/regulator-uclass.c
new file mode 100644
index 000..6b5c678
--- /dev/null
+++ b/drivers/power/regulator-uclass.c
@@ -0,0 +1,227 @@
+/*
+ * Copyright (C) 2014-2015 Samsung Electronics
+ * Przemyslaw Marczak p.marc...@samsung.com
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+#include common.h
+#include linux/types.h
+#include fdtdec.h
+#include dm.h
+#include power/pmic.h
+#include power/regulator.h
+#include compiler.h
+#include dm/device.h
+#include dm/lists.h
+#include dm/device-internal.h
+#include errno.h
+
+DECLARE_GLOBAL_DATA_PTR;
+
+int regulator_get_cnt(struct udevice *dev, int type, int *cnt)
+{
+   const struct dm_regulator_ops *ops;
+
+   ops = pmic_get_uclass_ops(dev, UCLASS_PMIC_REGULATOR);
+   if (!ops)
+   return -ENODEV;
+
+   if (!ops-get_cnt)
+   return -EPERM;
+
+   return ops-get_cnt(dev, type, cnt);
+}
+
+int regulator_get_value_desc(struct udevice *dev, int type, int number,
+struct regulator_value_desc **desc)
+{
+   const struct dm_regulator_ops *ops;
+
+   ops = pmic_get_uclass_ops(dev, UCLASS_PMIC_REGULATOR);
+   if (!ops)
+   return -ENXIO;
+
+   if (!ops-get_value_desc)
+   return -EPERM;
+
+   return ops-get_value_desc(dev, type, number, desc);
+}
+
+int regulator_get_mode_desc(struct udevice *dev, int type, int number,
+   int *mode_cnt, struct regulator_mode_desc **desc)
+{
+   const struct dm_regulator_ops *ops;
+
+   ops = pmic_get_uclass_ops(dev, UCLASS_PMIC_REGULATOR);
+   if (!ops)
+   return -ENXIO;
+
+   if (!ops-get_mode_desc_array)
+   return -EPERM;
+
+   return ops-get_mode_desc_array(dev, type, number, mode_cnt, desc);
+}
+
+int regulator_get_value(struct udevice *dev, int type, int number, int *value)
+{
+   const struct dm_regulator_ops *ops;
+
+   ops = pmic_get_uclass_ops(dev, UCLASS_PMIC_REGULATOR);
+   if (!ops)
+  

[U-Boot] [PATCH 3/4] ARM: tegra: pinctrl: add support for MIPI PAD control groups

[Stephen Warren]

From: Stephen Warren swar...@nvidia.com

Some pinmux controls are in a different register set. Add support for
manipulating those in a similar way to existing pins/groups.

Signed-off-by: Stephen Warren swar...@nvidia.com
---
 arch/arm/include/asm/arch-tegra/pinmux.h | 16 +
 arch/arm/mach-tegra/pinmux-common.c  | 57 
 2 files changed, 73 insertions(+)

diff --git a/arch/arm/include/asm/arch-tegra/pinmux.h 
b/arch/arm/include/asm/arch-tegra/pinmux.h
index e3eb706fcb8f..3cc52dd7731a 100644
--- a/arch/arm/include/asm/arch-tegra/pinmux.h
+++ b/arch/arm/include/asm/arch-tegra/pinmux.h
@@ -229,4 +229,20 @@ void pinmux_config_drvgrp_table(const struct 
pmux_drvgrp_config *config,
 
 #endif /* TEGRA_PMX_SOC_HAS_DRVGRPS */
 
+#ifdef TEGRA_PMX_SOC_HAS_MIPI_PAD_CTRL_GRPS
+struct pmux_mipipadctrlgrp_config {
+   u32 grp:16; /* pin group PMUX_MIPIPADCTRLGRP_x   */
+   u32 func:8; /* function to assign PMUX_FUNC_... */
+};
+
+void pinmux_config_mipipadctrlgrp_table(
+   const struct pmux_mipipadctrlgrp_config *config, int len);
+
+struct pmux_mipipadctrlgrp_desc {
+   u8 funcs[2];
+};
+
+extern const struct pmux_mipipadctrlgrp_desc *tegra_soc_mipipadctrl_groups;
+#endif /* TEGRA_PMX_SOC_HAS_MIPI_PAD_CTRL_GRPS */
+
 #endif /* _TEGRA_PINMUX_H_ */
diff --git a/arch/arm/mach-tegra/pinmux-common.c 
b/arch/arm/mach-tegra/pinmux-common.c
index 96dbb5e89b7d..b4a1432afcb1 100644
--- a/arch/arm/mach-tegra/pinmux-common.c
+++ b/arch/arm/mach-tegra/pinmux-common.c
@@ -108,6 +108,8 @@
 
 #define DRV_REG(group) _R(TEGRA_PMX_SOC_DRV_GROUP_BASE_REG + ((group) * 4))
 
+#define MIPIPADCTRL_REG(group) _R(TEGRA_PMX_SOC_MIPIPADCTRL_BASE_REG + 
((group) * 4))
+
 /*
  * We could force arch-tegraNN/pinmux.h to define all of these. However,
  * that's a lot of defines, and for now it's manageable to just put a
@@ -696,3 +698,58 @@ void pinmux_config_drvgrp_table(const struct 
pmux_drvgrp_config *config,
pinmux_config_drvgrp(config[i]);
 }
 #endif /* TEGRA_PMX_SOC_HAS_DRVGRPS */
+
+#ifdef TEGRA_PMX_SOC_HAS_MIPI_PAD_CTRL_GRPS
+
+#define pmux_mipipadctrlgrp_isvalid(pd) (((pd) = 0)  ((pd)  
PMUX_MIPIPADCTRLGRP_COUNT))
+
+static void pinmux_mipipadctrl_set_func(enum pmux_mipipadctrlgrp grp,
+   enum pmux_func func)
+{
+   u32 *reg = MIPIPADCTRL_REG(grp);
+   int i, mux = -1;
+   u32 val;
+
+   if (func == PMUX_FUNC_DEFAULT)
+   return;
+
+   /* Error check grp and func */
+   assert(pmux_mipipadctrlgrp_isvalid(grp));
+   assert(pmux_func_isvalid(func));
+
+   if (func = PMUX_FUNC_RSVD1) {
+   mux = (func - PMUX_FUNC_RSVD1)  1;
+   } else {
+   /* Search for the appropriate function */
+   for (i = 0; i  2; i++) {
+   if (tegra_soc_mipipadctrl_groups[grp].funcs[i]
+   == func) {
+   mux = i;
+   break;
+   }
+   }
+   }
+   assert(mux != -1);
+
+   val = readl(reg);
+   val = ~(1  1);
+   val |= (mux  1);
+   writel(val, reg);
+}
+
+static void pinmux_config_mipipadctrlgrp(const struct 
pmux_mipipadctrlgrp_config *config)
+{
+   enum pmux_mipipadctrlgrp grp = config-grp;
+
+   pinmux_mipipadctrl_set_func(grp, config-func);
+}
+
+void pinmux_config_mipipadctrlgrp_table(
+   const struct pmux_mipipadctrlgrp_config *config, int len)
+{
+   int i;
+
+   for (i = 0; i  len; i++)
+   pinmux_config_mipipadctrlgrp(config[i]);
+}
+#endif /* TEGRA_PMX_SOC_HAS_MIPI_PAD_CTRL_GRPS */
-- 
1.9.1

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[U-Boot] [PATCH 2/4] ARM: tegra: pinctrl: minor cleanup

[Stephen Warren]

From: Stephen Warren swar...@nvidia.com

Move struct pmux_pingrp_desc type and tegra_soc_pingroups variable
declaration together with other pin/mux level definitions. Now the whole
file is grouped/ordered pin/mux-related then drvgrp-related definitions.

Fix typo in ifdef comment.

Signed-off-by: Stephen Warren swar...@nvidia.com
---
 arch/arm/include/asm/arch-tegra/pinmux.h | 20 ++--
 arch/arm/mach-tegra/pinmux-common.c  |  2 +-
 2 files changed, 11 insertions(+), 11 deletions(-)

diff --git a/arch/arm/include/asm/arch-tegra/pinmux.h 
b/arch/arm/include/asm/arch-tegra/pinmux.h
index 4212e5769930..e3eb706fcb8f 100644
--- a/arch/arm/include/asm/arch-tegra/pinmux.h
+++ b/arch/arm/include/asm/arch-tegra/pinmux.h
@@ -170,6 +170,16 @@ void pinmux_set_io(enum pmux_pingrp pin, enum pmux_pin_io 
io);
 void pinmux_config_pingrp_table(const struct pmux_pingrp_config *config,
int len);
 
+struct pmux_pingrp_desc {
+   u8 funcs[4];
+#if defined(CONFIG_TEGRA20)
+   u8 ctl_id;
+   u8 pull_id;
+#endif /* CONFIG_TEGRA20 */
+};
+
+extern const struct pmux_pingrp_desc *tegra_soc_pingroups;
+
 #ifdef TEGRA_PMX_SOC_HAS_DRVGRPS
 
 #define PMUX_SLWF_MIN  0
@@ -219,14 +229,4 @@ void pinmux_config_drvgrp_table(const struct 
pmux_drvgrp_config *config,
 
 #endif /* TEGRA_PMX_SOC_HAS_DRVGRPS */
 
-struct pmux_pingrp_desc {
-   u8 funcs[4];
-#if defined(CONFIG_TEGRA20)
-   u8 ctl_id;
-   u8 pull_id;
-#endif /* CONFIG_TEGRA20 */
-};
-
-extern const struct pmux_pingrp_desc *tegra_soc_pingroups;
-
 #endif /* _TEGRA_PINMUX_H_ */
diff --git a/arch/arm/mach-tegra/pinmux-common.c 
b/arch/arm/mach-tegra/pinmux-common.c
index 912f65e98b06..96dbb5e89b7d 100644
--- a/arch/arm/mach-tegra/pinmux-common.c
+++ b/arch/arm/mach-tegra/pinmux-common.c
@@ -695,4 +695,4 @@ void pinmux_config_drvgrp_table(const struct 
pmux_drvgrp_config *config,
for (i = 0; i  len; i++)
pinmux_config_drvgrp(config[i]);
 }
-#endif /* TEGRA_PMX_HAS_DRVGRPS */
+#endif /* TEGRA_PMX_SOC_HAS_DRVGRPS */
-- 
1.9.1

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Re: [U-Boot] [PATCH] config: peach: Correct memory layout environment settings

[Tom Rini]

On Wed, Mar 25, 2015 at 09:32:45AM +0100, Sjoerd Simons wrote:
 On Wed, 2015-03-25 at 01:11 -0400, Tom Rini wrote:
  On Mon, Mar 23, 2015 at 03:04:48PM -0600, Simon Glass wrote:
   Hi Sjoerd,
   
   On 12 March 2015 at 15:33, Sjoerd Simons sjoerd.sim...@collabora.co.uk 
   wrote:
The peach boards have their SDRAM start address at 0x2000 instead of
0x4000 which seems common for all other exynos5 based boards. This
means the layout set in exynos5-common.h causes the kernel be loaded
more then 128MB (at 0x4200) away from memory start which breaks
booting kernels with CONFIG_AUTO_ZRELADDR
   
Define a custom MEM_LAYOUT_ENV_SETTINGS for both peach boards which uses
the same offsets from start of memory as the common exynos5 settings.
   
This fixes booting via bootz and PXE
   
Signed-off-by: Sjoerd Simons sjoerd.sim...@collabora.co.uk
---
 include/configs/peach-pi.h  | 8 
 include/configs/peach-pit.h | 8 
 2 files changed, 16 insertions(+)
   
diff --git a/include/configs/peach-pi.h b/include/configs/peach-pi.h
index f04f061..e3cb09e 100644
--- a/include/configs/peach-pi.h
+++ b/include/configs/peach-pi.h
@@ -16,6 +16,14 @@
 #define CONFIG_ENV_OFFSET  (FLASH_SIZE - CONFIG_BL2_SIZE)
 #define CONFIG_SPI_BOOTING
   
+#define MEM_LAYOUT_ENV_SETTINGS \
+   bootm_size=0x1000\0 \
+   kernel_addr_r=0x2200\0 \
+   fdt_addr_r=0x2300\0 \
+   ramdisk_addr_r=0x2330\0 \
+   scriptaddr=0x3000\0 \
+   pxefile_addr_r=0x3100\0
+
 #include configs/exynos5420-common.h
 #include configs/exynos5-dt-common.h
   
diff --git a/include/configs/peach-pit.h b/include/configs/peach-pit.h
index b5efbdc..3ee42ef 100644
--- a/include/configs/peach-pit.h
+++ b/include/configs/peach-pit.h
@@ -16,6 +16,14 @@
 #define CONFIG_ENV_OFFSET  (FLASH_SIZE - CONFIG_BL2_SIZE)
 #define CONFIG_SPI_BOOTING
   
+#define MEM_LAYOUT_ENV_SETTINGS \
+   bootm_size=0x1000\0 \
+   kernel_addr_r=0x2200\0 \
+   fdt_addr_r=0x2300\0 \
+   ramdisk_addr_r=0x2330\0 \
+   scriptaddr=0x3000\0 \
+   pxefile_addr_r=0x3100\0
+
 #include configs/exynos5420-common.h
 #include configs/exynos5-dt-common.h
   
   It would be great if we could have this in the device tree.
  
  I understand what you're thinking but this is environment.  And really
  this is not board specific, this is SoC family specific which is why the
  similar part for TI stuff is in ti_armv7_common.h :)
 
 Exynos 5 has the same in exynos5-common.h, however for whatever reason
 the peach pi/pit boards are different then other exynos board supported
 by u-boot thusfar. So in this case, this information _is_ board specific
 not platform specific.

Oh I missed that early on, sorry.  But...

Why not change things around a bit to enable CONFIG_CMD_SETEXPR and then
have MEM_LAYOUT_ENV_SETTINGS just set the exynos5_ddr_base and then
setexpr kernel_addr_r $exynos5_ddr_base + 0x200
and similar in the generic part.

 But even in case of including it in device tree, a default/common
 setting could go into the platforms dtsi with board-specific overrides
 as needed.
 
 One thing i have wondered though, looking at the various boards
 specifying the various memory layour addresses. They all end up being
 relatively similar offset to the base memory address, which makes me
 think it may be possible to calculate these values in the initialisation
 code rather then having to hardcode it in the environment. However, even
 if that's a sensible thing, something for later :)

... Yes, we should then take what I just did above and make it even
further wide-spread among boards where we have more than ~512MB DDR or
so :)

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Re: [U-Boot] [PATCH] config: Define BOOTP client architecture and VCI for ARMv8

[Tom Rini]

On Mon, Mar 23, 2015 at 02:07:42PM -0600, Stephen Warren wrote:
 On 03/20/2015 11:08 AM, Tom Rini wrote:
 On Fri, Mar 20, 2015 at 10:22:59AM -0600, Stephen Warren wrote:
 On 03/20/2015 06:11 AM, Thierry Reding wrote:
 From: Thierry Reding tred...@nvidia.com
 
 Reuse the 32-bit ARM client architecture and identify ARMv8 specifically
 by setting the BOOTP VCI string.
 
 Is there a newer version of
 https://www.rfc-editor.org/rfc/rfc4578.txt that says what this value
 should be? Even 32-bit ARM isn't in that document, so I'm not sure
 where 0x100 came from.
 
 I wonder if 0x100 is treated by the PXE implementations as set but
 invalid, don't use.  Digging into some PXE servers would shed some
 light here.
 
 I can't actually find any use of this in ISC DHCPd. At most, it
 might be a value that user config files can match against if they
 want. I guess it's not worth worrying about?

Yeah, sounds like it to me.

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Re: [U-Boot] [PATCH 0/4] Add support for stm32f429-discovery board

[Tom Rini]

On Wed, Mar 25, 2015 at 01:07:47PM +0900, Chanwoo Choi wrote:
 Hi Kamil,
 
 I tested this patch-set in STM32 Discovery board. After applied this
 patch-set on latest u-boot, I could not see the normal u-boot log. I
 saw broken console log. I used the USART1 port (pa9, pa10 gpio pin).
 
 Could you give me a tip to resolve this issue?

I bet this needs changes similar to b81bdf6 as that was a similar
problem I believe.  In short, DM needs to be enabled now.

 
 Best Regards,
 Chanwoo Choi
 
 2015년 3월 1일 일요일, Kamil Lulkore...@wp.pl님이 작성한 메시지:
 
  The following patches implement basic support for the ARMv7-M
  microcontroller
  architecture.
  Additionally, stm32f429-discovery board support is added with tested
  ability
  to boot uClinux from the embedded Flash memory.
 
  Kamil Lulko (4):
ARM: Add ARMv7-M support
ARMv7M: Add STM32F4 support
stm32f4: Add serial driver
stm32f4: Add support for stm32f429-discovery board
 
   arch/arm/Kconfig   |   9 +
   arch/arm/cpu/armv7m/Makefile   |  11 +
   arch/arm/cpu/armv7m/config.mk  |   8 +
   arch/arm/cpu/armv7m/cpu.c  |  35 +++
   arch/arm/cpu/armv7m/start.S|  15 ++
   arch/arm/cpu/armv7m/stm32f4/Makefile   |  11 +
   arch/arm/cpu/armv7m/stm32f4/clock.c| 209 +++
   arch/arm/cpu/armv7m/stm32f4/flash.c| 143 ++
   arch/arm/cpu/armv7m/stm32f4/soc.c  |  37 +++
   arch/arm/cpu/armv7m/stm32f4/timer.c| 118 +
   arch/arm/include/asm/arch-stm32f4/fmc.h|  75 ++
   arch/arm/include/asm/arch-stm32f4/gpio.h   | 116 +
   arch/arm/include/asm/arch-stm32f4/stm32.h  | 108 
   arch/arm/include/asm/armv7m.h  |  60 +
   arch/arm/lib/Makefile  |   8 +-
   arch/arm/lib/crt0.S|  30 +++
   arch/arm/lib/interrupts_m.c|  95 +++
   arch/arm/lib/relocate.S|  13 +
   arch/arm/lib/vectors_m.S   |  57 
   board/st/stm32f429-discovery/Kconfig   |  19 ++
   board/st/stm32f429-discovery/MAINTAINERS   |   6 +
   board/st/stm32f429-discovery/Makefile  |  12 +
   board/st/stm32f429-discovery/led.c |  35 +++
   board/st/stm32f429-discovery/stm32f429-discovery.c | 288
  +
   configs/stm32f429-discovery_defconfig  |   2 +
   drivers/gpio/Makefile  |   1 +
   drivers/gpio/stm32_gpio.c  | 199 ++
   drivers/serial/Makefile|   1 +
   drivers/serial/serial.c|   2 +
   drivers/serial/serial_stm32.c  | 117 +
   include/configs/stm32f429-discovery.h  | 106 
   include/flash.h|   2 +
   32 files changed, 1946 insertions(+), 2 deletions(-)
   create mode 100644 arch/arm/cpu/armv7m/Makefile
   create mode 100644 arch/arm/cpu/armv7m/config.mk
   create mode 100644 arch/arm/cpu/armv7m/cpu.c
   create mode 100644 arch/arm/cpu/armv7m/start.S
   create mode 100644 arch/arm/cpu/armv7m/stm32f4/Makefile
   create mode 100644 arch/arm/cpu/armv7m/stm32f4/clock.c
   create mode 100644 arch/arm/cpu/armv7m/stm32f4/flash.c
   create mode 100644 arch/arm/cpu/armv7m/stm32f4/soc.c
   create mode 100644 arch/arm/cpu/armv7m/stm32f4/timer.c
   create mode 100644 arch/arm/include/asm/arch-stm32f4/fmc.h
   create mode 100644 arch/arm/include/asm/arch-stm32f4/gpio.h
   create mode 100644 arch/arm/include/asm/arch-stm32f4/stm32.h
   create mode 100644 arch/arm/include/asm/armv7m.h
   create mode 100644 arch/arm/lib/interrupts_m.c
   create mode 100644 arch/arm/lib/vectors_m.S
   create mode 100644 board/st/stm32f429-discovery/Kconfig
   create mode 100644 board/st/stm32f429-discovery/MAINTAINERS
   create mode 100644 board/st/stm32f429-discovery/Makefile
   create mode 100644 board/st/stm32f429-discovery/led.c
   create mode 100644 board/st/stm32f429-discovery/stm32f429-discovery.c
   create mode 100644 configs/stm32f429-discovery_defconfig
   create mode 100644 drivers/gpio/stm32_gpio.c
   create mode 100644 drivers/serial/serial_stm32.c
   create mode 100644 include/configs/stm32f429-discovery.h
 
  --
  1.9.1
 
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Re: [U-Boot] [PATCH] tegra: pinmux: fix FUNCMUX_NDFLASH_KBC_8_BIT

[Marcel Ziswiler]

On Tue, 2015-03-24 at 09:21 -0600, Stephen Warren wrote:
  diff --git a/arch/arm/mach-tegra/tegra20/funcmux.c 
  b/arch/arm/mach-tegra/tegra20/funcmux.c
 
 Note that this will conflict with:
 
 09f455dca749 ARM: tegra: collect SoC sources into mach-tegra
 
 ... which moved that file.

I had another look but believe above mentioned commit actually did the
following:

 arch/arm/cpu/tegra20-common/*   - arch/arm/mach-tegra/tegra20/*

And my commit was already rebased to latest master and therefore already
took that into account or am I missing something here?

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Re: [U-Boot] [PATCH v3 4/4] common/lcd_console: introduce display/framebuffer rotation

[Nikita Kiryanov]

Hi Hannes,

This is almost an Acked-By from me, just a few final comments:

On 03/19/2015 10:37 AM, Hannes Petermaier wrote:

From: Hannes Petermaier hannes.peterma...@br-automation.com

Sometimes, for example if the display is mounted in portrait mode or even if it
mounted landscape but rotated by 180 degrees, we need to rotate our content of
the display respectively the framebuffer, so that user can read the messages
who are printed out.

For this we introduce the feature called CONFIG_LCD_ROTATION, this may be
defined in the board-configuration if needed. After this the lcd_console will
be initialized with a given rotation from vl_rot out of vidinfo_t which is
provided by the board specific code.

If CONFIG_LCD_ROTATION is not defined, the console will be initialized with
0 degrees rotation.

Signed-off-by: Hannes Petermaier hannes.peterma...@br-automation.com
Signed-off-by: Hannes Petermaier oe5...@oevsv.at
---

Changes in v3:
- rename lcd_address to fbbase for better readability.
- remove empty line lcd_console.c
- use printf instead puts to inform about invalid-fb rotation.
- avoid code-duplication (move define of fbptr_t into lcd.h)

Changes in v2:
- cleanup README text for feature
- don't make code cleanups (lcd_console.c) within this patch
- remove (unnary) comment in lcd_console.h
- update year to 2015 within copyright in lcd_console.c
- move rotation related code into separate file lcd_console_rotation.c
- rework rotation code
- change meaning of vl_rot to match fbcon=rotate:n from the linux-kernel

  README|   22 +
  common/Makefile   |1 +
  common/lcd.c  |   15 ++-
  common/lcd_console.c  |  161 +--
  common/lcd_console_rotation.c |  208 +
  include/lcd.h |9 ++
  include/lcd_console.h |   18 +++-
  7 files changed, 349 insertions(+), 85 deletions(-)
  create mode 100644 common/lcd_console_rotation.c

diff --git a/README b/README
index b0124d6..c649de1 100644
--- a/README
+++ b/README
@@ -1947,6 +1947,28 @@ CBFS (Coreboot Filesystem) support
the console jump but can help speed up operation when scrolling
is slow.

+   CONFIG_LCD_ROTATION
+
+   Sometimes, for example if the display is mounted in portrait
+   mode or even if it mounted landscape but rotated by 180degree,


s/if it/if it's/


+   we need to rotate our content of the display respectively the


s/respectively the/relative to the/


+   framebuffer, so that user can read the messages who are printed


s/who are printed/which are printed/


+   out.
+   For this we introduce the feature called CONFIG_LCD_ROTATION,
+   this may be defined in the board-configuration if needed.  After
+   this the lcd_console will be initialized with a given rotation


this may be defined in the board-configuration if needed
This is true for all config options in general, no need to mention this.
Also, For this we introduce is good for a commit message, but doesn't look 
good
once committed.
How about just Once CONFIG_LCD_ROTATION is defined, the lcd_console will be...


+   from vl_rot out of vidinfo_t which is provided by the board
+   specific code.
+   The value for vl_rot is coded as following (matching to
+   fbcon=rotate:n linux-kernel commandline):
+   0 = no rotation respectively 0 degree
+   1 = 90 degree rotation
+   2 = 180 degree rotation
+   3 = 270 degree rotation
+
+   If CONFIG_LCD_ROTATION is not defined, the console will be
+   initialized with 0degree rotation.
+
CONFIG_LCD_BMP_RLE8

Support drawing of RLE8-compressed bitmaps on the LCD.


[...]


+static void console_calc_rowcol(struct console_t *pcons)
+{
+   pcons-cols = pcons-lcdsizex / VIDEO_FONT_WIDTH;
+#if defined(CONFIG_LCD_LOGO)  !defined(CONFIG_LCD_INFO_BELOW_LOGO)
+   pcons-rows = (pcons-lcdsizey - BMP_LOGO_HEIGHT);
+   pcons-rows /= VIDEO_FONT_HEIGHT;
+#else
+   pcons-rows = pcons-lcdsizey / VIDEO_FONT_HEIGHT;
+#endif
+}


[...]


@@ -235,4 +253,3 @@ U_BOOT_CMD(
print string on lcd-framebuffer,
string
  );
-


Looks like part of the cleanup from the previous series slipped through...


diff --git a/common/lcd_console_rotation.c b/common/lcd_console_rotation.c
new file mode 100644
index 000..dd9dadf
--- /dev/null
+++ b/common/lcd_console_rotation.c


[...]


+static void console_calc_rowcol_rot(struct console_t *pcons)
+{
+   u32 cols, rows;
+
+   if (pcons-lcdrot == 1 || pcons-lcdrot == 3) {
+   cols = pcons-lcdsizey;
+   rows = pcons-lcdsizex;
+   } else {
+   cols = pcons-lcdsizex;
+   rows = pcons-lcdsizey;
+   }
+
+   

Re: [U-Boot] [PATCH] tegra: pinmux: fix FUNCMUX_NDFLASH_KBC_8_BIT

[Stephen Warren]

On 03/25/2015 11:46 AM, Marcel Ziswiler wrote:

On Tue, 2015-03-24 at 09:21 -0600, Stephen Warren wrote:

diff --git a/arch/arm/mach-tegra/tegra20/funcmux.c 
b/arch/arm/mach-tegra/tegra20/funcmux.c


Note that this will conflict with:

09f455dca749 ARM: tegra: collect SoC sources into mach-tegra

... which moved that file.


I had another look but believe above mentioned commit actually did the
following:

  arch/arm/cpu/tegra20-common/*   - arch/arm/mach-tegra/tegra20/*

And my commit was already rebased to latest master and therefore already
took that into account or am I missing something here?


Yes, I think I got it backwards; I was confused by the Tegra210 file 
having been added in the old location after the move, or something.

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[U-Boot] [PATCH 1/4] ARM: tegra: pinctrl: move Tegra210 code to the correct dir

[Stephen Warren]

From: Stephen Warren swar...@nvidia.com

Patches that added the Tegra210 pinctrl driver and renamed directories
arch/arm/cpu/tegra{$soc}-common - arch/arm/mach-tegra/tegra-${soc}
crossed. Move the Tegra210 pinctrl driver to the correct location. This
wasn't detected since Tegra210 support is in the process of being added,
and isn't buildable yet.

Signed-off-by: Stephen Warren swar...@nvidia.com
---
This series mainly adds support for configuring the MIPI pad control
registers, along with a few fixes/cleanups first. I'll enhance the
Jetson TK1 pinmux header to actually include MIPI pad control settings
as soon as I've cleared up one other change in the latest spreadsheet.
---
 arch/arm/{cpu/tegra210-common = mach-tegra/tegra210}/pinmux.c | 0
 1 file changed, 0 insertions(+), 0 deletions(-)
 rename arch/arm/{cpu/tegra210-common = mach-tegra/tegra210}/pinmux.c (100%)

diff --git a/arch/arm/cpu/tegra210-common/pinmux.c 
b/arch/arm/mach-tegra/tegra210/pinmux.c
similarity index 100%
rename from arch/arm/cpu/tegra210-common/pinmux.c
rename to arch/arm/mach-tegra/tegra210/pinmux.c
-- 
1.9.1

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[U-Boot] [PATCH 4/4] ARM: tegra: enable MIPI PAD CTRL support for Tegra124

[Stephen Warren]

From: Stephen Warren swar...@nvidia.com

This allows selection between CSI and DSI_B on the MIPI pads.

Signed-off-by: Stephen Warren swar...@nvidia.com
---
 arch/arm/include/asm/arch-tegra124/pinmux.h |  9 +
 arch/arm/mach-tegra/tegra124/pinmux.c   | 17 +
 2 files changed, 26 insertions(+)

diff --git a/arch/arm/include/asm/arch-tegra124/pinmux.h 
b/arch/arm/include/asm/arch-tegra124/pinmux.h
index 78bc9e6f178b..9fcbb0f80b4b 100644
--- a/arch/arm/include/asm/arch-tegra124/pinmux.h
+++ b/arch/arm/include/asm/arch-tegra124/pinmux.h
@@ -246,6 +246,11 @@ enum pmux_drvgrp {
PMUX_DRVGRP_COUNT,
 };
 
+enum pmux_mipipadctrlgrp {
+   PMUX_MIPIPADCTRLGRP_DSI_B,
+   PMUX_MIPIPADCTRLGRP_COUNT,
+};
+
 enum pmux_func {
PMUX_FUNC_DEFAULT,
PMUX_FUNC_BLINK,
@@ -255,6 +260,7 @@ enum pmux_func {
PMUX_FUNC_CLK,
PMUX_FUNC_CLK12,
PMUX_FUNC_CPU,
+   PMUX_FUNC_CSI,
PMUX_FUNC_DAP,
PMUX_FUNC_DAP1,
PMUX_FUNC_DAP2,
@@ -263,6 +269,7 @@ enum pmux_func {
PMUX_FUNC_DISPLAYA_ALT,
PMUX_FUNC_DISPLAYB,
PMUX_FUNC_DP,
+   PMUX_FUNC_DSI_B,
PMUX_FUNC_DTV,
PMUX_FUNC_EXTPERIPH1,
PMUX_FUNC_EXTPERIPH2,
@@ -336,8 +343,10 @@ enum pmux_func {
 };
 
 #define TEGRA_PMX_SOC_DRV_GROUP_BASE_REG 0x868
+#define TEGRA_PMX_SOC_MIPIPADCTRL_BASE_REG 0x820
 #define TEGRA_PMX_SOC_HAS_IO_CLAMPING
 #define TEGRA_PMX_SOC_HAS_DRVGRPS
+#define TEGRA_PMX_SOC_HAS_MIPI_PAD_CTRL_GRPS
 #define TEGRA_PMX_GRPS_HAVE_LPMD
 #define TEGRA_PMX_GRPS_HAVE_SCHMT
 #define TEGRA_PMX_GRPS_HAVE_HSM
diff --git a/arch/arm/mach-tegra/tegra124/pinmux.c 
b/arch/arm/mach-tegra/tegra124/pinmux.c
index c6685eaae1e9..4629b4676c4a 100644
--- a/arch/arm/mach-tegra/tegra124/pinmux.c
+++ b/arch/arm/mach-tegra/tegra124/pinmux.c
@@ -304,3 +304,20 @@ static const struct pmux_pingrp_desc tegra124_pingroups[] 
= {
PIN(DP_HPD_PFF0,DP, RSVD2,RSVD3,RSVD4),
 };
 const struct pmux_pingrp_desc *tegra_soc_pingroups = tegra124_pingroups;
+
+#define MIPIPADCTRL_GRP(grp, f0, f1)   \
+   {   \
+   .funcs = {  \
+   PMUX_FUNC_##f0, \
+   PMUX_FUNC_##f1, \
+   },  \
+   }
+
+#define MIPIPADCTRL_RESERVED {}
+
+static const struct pmux_mipipadctrlgrp_desc tegra124_mipipadctrl_groups[] = {
+   /*  pin,   f0,  f1 */
+   /* Offset 0x820 */
+   MIPIPADCTRL_GRP(DSI_B, CSI, DSI_B),
+};
+const struct pmux_mipipadctrlgrp_desc *tegra_soc_mipipadctrl_groups = 
tegra124_mipipadctrl_groups;
-- 
1.9.1

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[U-Boot] [PATCH v2 0/80] dm: Add USB support

[Simon Glass]

This series adds driver model support to USB. The intent is to permit the
various subsystems (OHCI, EHCI, XHCI) to co-exist and allow any number of USB
ports of different types.

With the RFC series, only USB controllers had a real driver model device.
USB devices (including the hub in the controller) were not modelled as driver
model devices.

While this was expedient, and produced much fewer patches, it is not a
long-term solution. Also, since then, driver model Ethernet support (which
USB can use) has been merged to u-boot-dm/next. It seems better to bite the
bullet and do a full conversion.

Unfortunately this results in a very large series. It includes:

- USB uclass
- USB hub uclass
- Adjustments to make USB keyboard, Ethernet and storage continue to work
- Sandbox USB emulation support
- Sandbox USB emulations for flash and hub devices
- A reasonable set of tests
- EHCI and XHCI support (not OHCI)
- Conversion of Tegra and Exynos drivers to driver model
- Adjustments to make the 'usb' command operate as expected
- README describing how USB works with driver model

Both EHCI and XHCI needed a little bit of refactoring before they are
converted to driver model - e.g. removal of weak fuctions and splitting up
the init code.

This series includes patches to remove the non-driver-model code for Exynos
and Tegra, to be applied once everything is stable. For now it is convenient
to be able to compare the two options.

This series does not change how USB is started up. The 'usb start' command
scans the buses as before, and takes just as long. Once it has started you
can use 'dm tree' to see the tree structure of the USB bus, although 'usb
tree' provides a better view. It is unclear how we could implement lazy init
for USB given the long time it takes to probe the bus.

A README is provided to describe how USB works under driver model.

This series is available at u-boot-dm/usb-working.

Changes in v2:
- Rewrite and expand series to support driver model fully

Simon Glass (80):
  linker_lists: Add a function to access a linker list entry
  sandbox: Fix comment for os_open()
  dm: test: bus: Use a local variable to simplify code
  dm: exynos: snow: Move the keyboard to I2C
  dm: core: Support allocating driver-private data for DMA
  dm: core: Convert driver_bind() to use const
  dm: core: Rename driver data function to dev_get_driver_data()
  dm: core: Mark device as active before calling uclass probe() methods
  dm: core: Add device children and sibling functions
  dm: gpio: Add an implementation for gpio_get_number()
  dm: usb: Add a uclass for USB controllers
  dm: usb: Adjust usb command to prepare for driver model
  dm: usb: Adjust usb_alloc_new_device() to return an error
  dm: usb: Convert 'usb' command to support driver model
  dm: usb: Drop the legacy USB init sequence
  dm: usb: Refactor port resets
  dm: usb: Move descriptor setup code into its own function
  dm: usb: Split out more code from usb_new_device()
  dm: usb: Complete the splitting up of usb_new_device()
  dm: usb: Convert core usb.c file to support driver model
  dm: usb: Split hub detection into its own function
  dm: usb: Add driver model support for hubs
  dm: usb: Move USB storage definitions to usb_defs.h
  dm: usb: Fix type problems in usb_stor_get_info()
  dm: usb: Simply device finding code in usb_storage
  dm: usb: Adjust usb_storage to work with sandbox
  dm: usb: Move storage device scanning into its own function
  dm: usb: Convert usb_storage to driver model
  dm: usb: Move all the EHCI weak functions together and declare them
  dm: usb: Pass EHCI controller pointer to ehci_get_port_speed()
  dm: usb: Allow ECHI to hold private data for the controller
  dm: usb: tegra: Store the controller type explicitly
  dm: usb: Pass EHCI controller pointer to ehci_powerup_fixup()
  dm: usb: tegra: Drop use of global controller variable
  dm: usb: Pass EHCI controller pointer to ehci_set_usbmode()
  dm: usb: Pass EHCI controller pointer to ehci_get_portsc_register()
  dm: usb: ehci: Use a function to find the controller from struct
udevice
  dm: usb: Refactor EHCI init
  dm: usb: Drop the EHCI weak functions
  dm: usb: Change ehci_reset() to use a pointer
  dm: usb: Add driver model support to EHCI
  dm: usb: Allow USB drivers to be declared and auto-probed
  dm: usb: Bind generic USB devices when there is no driver
  dm: usb: Allow setting up a USB controller as a device/gadget
  dm: usb: Split out the keyboard probe into its own function
  dm: usb: Support driver model with USB keyboards
  dm: usb: tegra: Add vbus GPIOs for nyan
  dm: usb: Move struct usb_string to a common place
  dm: usb: sandbox: Add a uclass for USB device emulation
  dm: usb: sandbox: Reset emulation devices in usb stop()
  dm: usb: sandbox: Add an emulator for USB flash devices
  dm: usb: sandbox: Add an emulator for USB hub emulation
  dm: usb: sandbox: Add a driver for sandbox
  dm: usb: dts: sandbox: Add some sample USB devices to sandbox
  dm: usb: Add 

[U-Boot] [PATCH v2 41/80] dm: usb: Add driver model support to EHCI

[Simon Glass]

Add a way for EHCI controller drivers to support driver model. Drivers can
call ehci_register() to register themselves in their probe() methods.

Signed-off-by: Simon Glass s...@chromium.org
---

Changes in v2: None

 drivers/usb/host/ehci-hcd.c | 125 ++--
 drivers/usb/host/ehci.h |   6 +++
 2 files changed, 127 insertions(+), 4 deletions(-)

diff --git a/drivers/usb/host/ehci-hcd.c b/drivers/usb/host/ehci-hcd.c
index 86082a9..227aa83 100644
--- a/drivers/usb/host/ehci-hcd.c
+++ b/drivers/usb/host/ehci-hcd.c
@@ -21,6 +21,7 @@
  * MA 02111-1307 USA
  */
 #include common.h
+#include dm.h
 #include errno.h
 #include asm/byteorder.h
 #include asm/unaligned.h
@@ -42,7 +43,9 @@
  */
 #define HCHALT_TIMEOUT (8 * 1000)
 
+#ifndef CONFIG_DM_USB
 static struct ehci_ctrl ehcic[CONFIG_USB_MAX_CONTROLLER_COUNT];
+#endif
 
 #define ALIGN_END_ADDR(type, ptr, size)\
((uint32_t)(ptr) + roundup((size) * sizeof(type), USB_DMA_MINALIGN))
@@ -121,7 +124,18 @@ static struct descriptor {
 
 static struct ehci_ctrl *ehci_get_ctrl(struct usb_device *udev)
 {
+#ifdef CONFIG_DM_USB
+   struct udevice *dev;
+
+   /* Find the USB controller */
+   for (dev = udev-dev;
+device_get_uclass_id(dev) != UCLASS_USB;
+dev = dev-parent)
+   ;
+   return dev_get_priv(dev);
+#else
return udev-controller;
+#endif
 }
 
 static int ehci_get_port_speed(struct ehci_ctrl *ctrl, uint32_t reg)
@@ -281,12 +295,13 @@ static inline u8 ehci_encode_speed(enum usb_device_speed 
speed)
return QH_FULL_SPEED;
 }
 
-static void ehci_update_endpt2_dev_n_port(struct usb_device *dev,
+static void ehci_update_endpt2_dev_n_port(struct usb_device *udev,
  struct QH *qh)
 {
struct usb_device *ttdev;
+   int parent_devnum;
 
-   if (dev-speed != USB_SPEED_LOW  dev-speed != USB_SPEED_FULL)
+   if (udev-speed != USB_SPEED_LOW  udev-speed != USB_SPEED_FULL)
return;
 
/*
@@ -294,14 +309,35 @@ static void ehci_update_endpt2_dev_n_port(struct 
usb_device *dev,
 * the tt, so of the first upstream usb-2 hub, there may be usb-1 hubs
 * in the tree before that one!
 */
-   ttdev = dev;
+#ifdef CONFIG_DM_USB
+   struct udevice *parent;
+
+   for (ttdev = udev; ; ) {
+   struct udevice *dev = ttdev-dev;
+
+   if (dev-parent 
+   device_get_uclass_id(dev-parent) == UCLASS_USB_HUB)
+   parent = dev-parent;
+   else
+   parent = NULL;
+   if (!parent)
+   return;
+   ttdev = dev_get_parentdata(parent);
+   if (!ttdev-speed != USB_SPEED_HIGH)
+   break;
+   }
+   parent_devnum = ttdev-devnum;
+#else
+   ttdev = udev;
while (ttdev-parent  ttdev-parent-speed != USB_SPEED_HIGH)
ttdev = ttdev-parent;
if (!ttdev-parent)
return;
+   parent_devnum = ttdev-parent-devnum;
+#endif
 
qh-qh_endpt2 |= cpu_to_hc32(QH_ENDPT2_PORTNUM(ttdev-portnr) |
-QH_ENDPT2_HUBADDR(ttdev-parent-devnum));
+QH_ENDPT2_HUBADDR(parent_devnum));
 }
 
 static int
@@ -960,6 +996,7 @@ static void ehci_setup_ops(struct ehci_ctrl *ctrl, const 
struct ehci_ops *ops)
}
 }
 
+#ifndef CONFIG_DM_USB
 void ehci_set_controller_priv(int index, void *priv, const struct ehci_ops 
*ops)
 {
struct ehci_ctrl *ctrl = ehcic[index];
@@ -972,6 +1009,7 @@ void *ehci_get_controller_priv(int index)
 {
return ehcic[index].priv;
 }
+#endif
 
 static int ehci_common_init(struct ehci_ctrl *ctrl, uint tweaks)
 {
@@ -1082,6 +1120,7 @@ static int ehci_common_init(struct ehci_ctrl *ctrl, uint 
tweaks)
return 0;
 }
 
+#ifndef CONFIG_DM_USB
 int usb_lowlevel_stop(int index)
 {
ehci_shutdown(ehcic[index]);
@@ -1121,6 +1160,7 @@ done:
*controller = ehcic[index];
return 0;
 }
+#endif
 
 static int _ehci_submit_bulk_msg(struct usb_device *dev, unsigned long pipe,
 void *buffer, int length)
@@ -1480,6 +1520,7 @@ static int _ehci_submit_int_msg(struct usb_device *dev, 
unsigned long pipe,
return result;
 }
 
+#ifndef CONFIG_DM_USB
 int submit_bulk_msg(struct usb_device *dev, unsigned long pipe,
void *buffer, int length)
 {
@@ -1497,3 +1538,79 @@ int submit_int_msg(struct usb_device *dev, unsigned long 
pipe,
 {
return _ehci_submit_int_msg(dev, pipe, buffer, length, interval);
 }
+#endif
+
+#ifdef CONFIG_DM_USB
+static int ehci_submit_control_msg(struct udevice *dev, struct usb_device 
*udev,
+  unsigned long pipe, void *buffer, int length,
+  struct devrequest *setup)
+{
+   debug(%s: dev='%s', 

[U-Boot] [PATCH v2 40/80] dm: usb: Change ehci_reset() to use a pointer

[Simon Glass]

The index cannot be used with driver model, and isn't needed anyway. Change
the parameter to a pointer.

Signed-off-by: Simon Glass s...@chromium.org
---

Changes in v2: None

 drivers/usb/host/ehci-hcd.c | 17 -
 1 file changed, 8 insertions(+), 9 deletions(-)

diff --git a/drivers/usb/host/ehci-hcd.c b/drivers/usb/host/ehci-hcd.c
index 82f7318..86082a9 100644
--- a/drivers/usb/host/ehci-hcd.c
+++ b/drivers/usb/host/ehci-hcd.c
@@ -176,16 +176,15 @@ static int handshake(uint32_t *ptr, uint32_t mask, 
uint32_t done, int usec)
return -1;
 }
 
-static int ehci_reset(int index)
+static int ehci_reset(struct ehci_ctrl *ctrl)
 {
-   struct ehci_ctrl *ctrl = ehcic[index];
uint32_t cmd;
int ret = 0;
 
-   cmd = ehci_readl(ehcic[index].hcor-or_usbcmd);
+   cmd = ehci_readl(ctrl-hcor-or_usbcmd);
cmd = (cmd  ~CMD_RUN) | CMD_RESET;
-   ehci_writel(ehcic[index].hcor-or_usbcmd, cmd);
-   ret = handshake((uint32_t *)ehcic[index].hcor-or_usbcmd,
+   ehci_writel(ctrl-hcor-or_usbcmd, cmd);
+   ret = handshake((uint32_t *)ctrl-hcor-or_usbcmd,
CMD_RESET, 0, 250 * 1000);
if (ret  0) {
printf(EHCI fail to reset\n);
@@ -193,13 +192,13 @@ static int ehci_reset(int index)
}
 
if (ehci_is_TDI())
-   ctrl-ops.set_usb_mode(ehcic[index]);
+   ctrl-ops.set_usb_mode(ctrl);
 
 #ifdef CONFIG_USB_EHCI_TXFIFO_THRESH
-   cmd = ehci_readl(ehcic[index].hcor-or_txfilltuning);
+   cmd = ehci_readl(ctrl-hcor-or_txfilltuning);
cmd = ~TXFIFO_THRESH_MASK;
cmd |= TXFIFO_THRESH(CONFIG_USB_EHCI_TXFIFO_THRESH);
-   ehci_writel(ehcic[index].hcor-or_txfilltuning, cmd);
+   ehci_writel(ctrl-hcor-or_txfilltuning, cmd);
 #endif
 out:
return ret;
@@ -1102,7 +1101,7 @@ int usb_lowlevel_init(int index, enum usb_init_type init, 
void **controller)
goto done;
 
/* EHCI spec section 4.1 */
-   if (ehci_reset(index))
+   if (ehci_reset(ctrl))
return -1;
 
 #if defined(CONFIG_EHCI_HCD_INIT_AFTER_RESET)
-- 
2.2.0.rc0.207.ga3a616c

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[U-Boot] [PATCH v2 20/80] dm: usb: Convert core usb.c file to support driver model

[Simon Glass]

Add the required #ifdefs and remove unwanted data structures so that the
USB uclass will be able to use this file.

Signed-off-by: Simon Glass s...@chromium.org
---

Changes in v2: None

 common/usb.c | 31 +--
 1 file changed, 25 insertions(+), 6 deletions(-)

diff --git a/common/usb.c b/common/usb.c
index 5e14d7c..06c1c43 100644
--- a/common/usb.c
+++ b/common/usb.c
@@ -28,6 +28,7 @@
  */
 #include common.h
 #include command.h
+#include dm.h
 #include asm/processor.h
 #include linux/compiler.h
 #include linux/ctype.h
@@ -41,12 +42,13 @@
 
 #define USB_BUFSIZ 512
 
-static struct usb_device usb_dev[USB_MAX_DEVICE];
-static int dev_index;
 static int asynch_allowed;
-
 char usb_started; /* flag for the started/stopped USB status */
 
+#ifndef CONFIG_DM_USB
+static struct usb_device usb_dev[USB_MAX_DEVICE];
+static int dev_index;
+
 #ifndef CONFIG_USB_MAX_CONTROLLER_COUNT
 #define CONFIG_USB_MAX_CONTROLLER_COUNT 1
 #endif
@@ -152,6 +154,7 @@ int usb_disable_asynch(int disable)
asynch_allowed = !disable;
return old_value;
 }
+#endif /* !CONFIG_DM_USB */
 
 
 /*---
@@ -815,6 +818,7 @@ int usb_string(struct usb_device *dev, int index, char 
*buf, size_t size)
  * the USB device are static allocated [USB_MAX_DEVICE].
  */
 
+#ifndef CONFIG_DM_USB
 
 /* returns a pointer to the device with the index [index].
  * if the device is not assigned (dev-devnum==-1) returns NULL
@@ -871,7 +875,9 @@ __weak int usb_alloc_device(struct usb_device *udev)
 {
return 0;
 }
+#endif /* !CONFIG_DM_USB */
 
+#ifndef CONFIG_DM_USB
 int usb_legacy_port_reset(struct usb_device *hub, int portnr)
 {
if (hub) {
@@ -890,6 +896,7 @@ int usb_legacy_port_reset(struct usb_device *hub, int 
portnr)
 
return 0;
 }
+#endif
 
 static int usb_setup_descriptor(struct usb_device *dev, bool do_read)
 {
@@ -994,7 +1001,7 @@ static int usb_prepare_device(struct usb_device *dev, int 
addr, bool do_read,
return 0;
 }
 
-static int usb_select_config(struct usb_device *dev)
+int usb_select_config(struct usb_device *dev)
 {
ALLOC_CACHE_ALIGN_BUFFER(unsigned char, tmpbuf, USB_BUFSIZ);
int err;
@@ -1051,8 +1058,8 @@ static int usb_select_config(struct usb_device *dev)
return 0;
 }
 
-static int usb_setup_device(struct usb_device *dev, bool do_read,
-   struct usb_device *parent, int portnr)
+int usb_setup_device(struct usb_device *dev, bool do_read,
+struct usb_device *parent, int portnr)
 {
int addr;
int ret;
@@ -1069,6 +1076,7 @@ static int usb_setup_device(struct usb_device *dev, bool 
do_read,
return ret;
 }
 
+#ifndef CONFIG_DM_USB
 /*
  * By the time we get here, the device has gotten a new device ID
  * and is in the default state. We need to identify the thing and
@@ -1104,10 +1112,21 @@ int usb_new_device(struct usb_device *dev)
 
return count;
 }
+#endif
 
 __weak
 int board_usb_init(int index, enum usb_init_type init)
 {
return 0;
 }
+
+bool usb_device_has_child_on_port(struct usb_device *parent, int port)
+{
+#ifdef CONFIG_DM_USB
+   return false;
+#else
+   return parent-children[port] != NULL;
+#endif
+}
+
 /* EOF */
-- 
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[U-Boot] [PATCH v2 46/80] dm: usb: Support driver model with USB keyboards

[Simon Glass]

Allow USB keyboards to work with driver model. The main difference is that
we can have multiple buses (each with its own device numbering) and each
bus must be scanned.

Signed-off-by: Simon Glass s...@chromium.org
---

Changes in v2: None

 common/usb_kbd.c | 34 +-
 1 file changed, 33 insertions(+), 1 deletion(-)

diff --git a/common/usb_kbd.c b/common/usb_kbd.c
index e02529f..24a1a56 100644
--- a/common/usb_kbd.c
+++ b/common/usb_kbd.c
@@ -8,6 +8,7 @@
  * SPDX-License-Identifier:GPL-2.0+
  */
 #include common.h
+#include dm.h
 #include errno.h
 #include malloc.h
 #include stdio_dev.h
@@ -520,7 +521,37 @@ int drv_usb_kbd_init(void)
 {
int error, i;
 
-   debug(%s: Probing for keyboard\n, __func__);/* Scan all USB Devices */
+   debug(%s: Probing for keyboard\n, __func__);
+#ifdef CONFIG_DM_USB
+   /*
+* TODO: We should add USB_DEVICE() declarations to each USB ethernet
+* driver and then most of this file can be removed.
+*/
+   struct udevice *bus;
+   struct uclass *uc;
+   int ret;
+
+   ret = uclass_get(UCLASS_USB, uc);
+   if (ret)
+   return ret;
+   uclass_foreach_dev(bus, uc) {
+   for (i = 0; i  USB_MAX_DEVICE; i++) {
+   struct usb_device *dev;
+
+   dev = usb_get_dev_index(bus, i); /* get device */
+   debug(i=%d, %p\n, i, dev);
+   if (!dev)
+   break; /* no more devices available */
+
+   error = probe_usb_keyboard(dev);
+   if (!error)
+   return 1;
+   if (error  error != -ENOENT)
+   return error;
+   } /* for */
+   }
+#else
+   /* Scan all USB Devices */
for (i = 0; i  USB_MAX_DEVICE; i++) {
struct usb_device *dev;
 
@@ -538,6 +569,7 @@ int drv_usb_kbd_init(void)
if (error  error != -ENOENT)
return error;
}
+#endif
 
/* No USB Keyboard found */
return -1;
-- 
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[U-Boot] [PATCH v2 19/80] dm: usb: Complete the splitting up of usb_new_device()

[Simon Glass]

This function now calls usb_setup_device() to set up the device and
usb_hub_probe() to check if it is a hub. The XHCI special case is now a
parameter to usb_setup_device(). The latter will be used by the USB uclass
when it is added, since it does not rely on any CONFIGs or legacy data
structures.

Signed-off-by: Simon Glass s...@chromium.org
---

Changes in v2: None

 common/usb.c | 114 +++
 1 file changed, 68 insertions(+), 46 deletions(-)

diff --git a/common/usb.c b/common/usb.c
index c3f805d..5e14d7c 100644
--- a/common/usb.c
+++ b/common/usb.c
@@ -994,71 +994,40 @@ static int usb_prepare_device(struct usb_device *dev, int 
addr, bool do_read,
return 0;
 }
 
-/*
- * By the time we get here, the device has gotten a new device ID
- * and is in the default state. We need to identify the thing and
- * get the ball rolling..
- *
- * Returns 0 for success, != 0 for error.
- */
-int usb_new_device(struct usb_device *dev)
+static int usb_select_config(struct usb_device *dev)
 {
-   bool do_read = true;
-   int addr, err;
-   int tmp, ret;
ALLOC_CACHE_ALIGN_BUFFER(unsigned char, tmpbuf, USB_BUFSIZ);
+   int err;
 
-   /* We still haven't set the Address yet */
-   addr = dev-devnum;
-   dev-devnum = 0;
-
-   /*
-* XHCI needs to issue a Address device command to setup
-* proper device context structures, before it can interact
-* with the device. So a get_descriptor will fail before any
-* of that is done for XHCI unlike EHCI.
-*/
-#ifndef CONFIG_USB_XHCI
-   do_read = false;
-#endif
-   ret = usb_prepare_device(dev, addr, do_read, dev-parent, dev-portnr);
-   if (ret)
-   return ret;
-
-   tmp = sizeof(dev-descriptor);
+   err = usb_setup_descriptor(dev, true);
+   if (err)
+   return err;
 
-   err = usb_get_descriptor(dev, USB_DT_DEVICE, 0,
-tmpbuf, sizeof(dev-descriptor));
-   if (err  tmp) {
-   if (err  0)
-   printf(unable to get device descriptor (error=%d)\n,
-  err);
-   else
-   printf(USB device descriptor short read  \
-   (expected %i, got %i)\n, tmp, err);
-   return 1;
-   }
-   memcpy(dev-descriptor, tmpbuf, sizeof(dev-descriptor));
/* correct le values */
le16_to_cpus(dev-descriptor.bcdUSB);
le16_to_cpus(dev-descriptor.idVendor);
le16_to_cpus(dev-descriptor.idProduct);
le16_to_cpus(dev-descriptor.bcdDevice);
+
/* only support for one config for now */
err = usb_get_configuration_no(dev, tmpbuf, 0);
if (err  0) {
printf(usb_new_device: Cannot read configuration,  \
   skipping device %04x:%04x\n,
   dev-descriptor.idVendor, dev-descriptor.idProduct);
-   return -1;
+   return -err;
}
usb_parse_config(dev, tmpbuf, 0);
usb_set_maxpacket(dev);
-   /* we set the default configuration here */
+   /*
+* we set the default configuration here
+* This seems premature. If the driver wants a different configuration
+* it will need to select itself.
+*/
if (usb_set_configuration(dev, dev-config.desc.bConfigurationValue)) {
printf(failed to set default configuration  \
len %d, status %lX\n, dev-act_len, dev-status);
-   return -1;
+   return -err;
}
debug(new device strings: Mfr=%d, Product=%d, SerialNumber=%d\n,
  dev-descriptor.iManufacturer, dev-descriptor.iProduct,
@@ -1078,11 +1047,64 @@ int usb_new_device(struct usb_device *dev)
debug(Manufacturer %s\n, dev-mf);
debug(Product  %s\n, dev-prod);
debug(SerialNumber %s\n, dev-serial);
-   /* now prode if the device is a hub */
-   usb_hub_probe(dev, 0);
+
return 0;
 }
 
+static int usb_setup_device(struct usb_device *dev, bool do_read,
+   struct usb_device *parent, int portnr)
+{
+   int addr;
+   int ret;
+
+   /* We still haven't set the Address yet */
+   addr = dev-devnum;
+   dev-devnum = 0;
+
+   ret = usb_prepare_device(dev, addr, do_read, parent, portnr);
+   if (ret)
+   return ret;
+   ret = usb_select_config(dev);
+
+   return ret;
+}
+
+/*
+ * By the time we get here, the device has gotten a new device ID
+ * and is in the default state. We need to identify the thing and
+ * get the ball rolling..
+ *
+ * Returns 0 for success, != 0 for error.
+ */
+int usb_new_device(struct usb_device *dev)
+{
+   bool do_read = true;
+   int count;
+   int err;
+
+   /*
+* XHCI needs to issue a Address device command to setup
+* proper device 

[U-Boot] [PATCH v2 18/80] dm: usb: Split out more code from usb_new_device()

[Simon Glass]

Move the code that sets up the device with a new address into its own
function, usb_prepare_device().

Signed-off-by: Simon Glass s...@chromium.org
---

Changes in v2: None

 common/usb.c | 72 +++-
 1 file changed, 42 insertions(+), 30 deletions(-)

diff --git a/common/usb.c b/common/usb.c
index d0debbc..c3f805d 100644
--- a/common/usb.c
+++ b/common/usb.c
@@ -956,19 +956,10 @@ static int usb_setup_descriptor(struct usb_device *dev, 
bool do_read)
return 0;
 }
 
-/*
- * By the time we get here, the device has gotten a new device ID
- * and is in the default state. We need to identify the thing and
- * get the ball rolling..
- *
- * Returns 0 for success, != 0 for error.
- */
-int usb_new_device(struct usb_device *dev)
+static int usb_prepare_device(struct usb_device *dev, int addr, bool do_read,
+ struct usb_device *parent, int portnr)
 {
-   bool do_read = true;
-   int addr, err;
-   int tmp;
-   ALLOC_CACHE_ALIGN_BUFFER(unsigned char, tmpbuf, USB_BUFSIZ);
+   int err;
 
/*
 * Allocate usb 3.0 device context.
@@ -976,28 +967,15 @@ int usb_new_device(struct usb_device *dev)
 * and related data structures first. This call does that.
 * Refer to sec 4.3.2 in xHCI spec rev1.0
 */
-   if (usb_alloc_device(dev)) {
+   err = usb_alloc_device(dev);
+   if (err) {
printf(Cannot allocate device context to get SLOT_ID\n);
-   return -1;
+   return err;
}
-
-   /* We still haven't set the Address yet */
-   addr = dev-devnum;
-   dev-devnum = 0;
-
-   /*
-* XHCI needs to issue a Address device command to setup
-* proper device context structures, before it can interact
-* with the device. So a get_descriptor will fail before any
-* of that is done for XHCI unlike EHCI.
-*/
-#ifndef CONFIG_USB_XHCI
-   do_read = false;
-#endif
err = usb_setup_descriptor(dev, do_read);
if (err)
return err;
-   err = usb_legacy_port_reset(dev-parent, dev-portnr);
+   err = usb_legacy_port_reset(parent, portnr);
if (err)
return err;
 
@@ -1008,11 +986,45 @@ int usb_new_device(struct usb_device *dev)
if (err  0) {
printf(\n  USB device not accepting new address  \
(error=%lX)\n, dev-status);
-   return 1;
+   return err;
}
 
mdelay(10); /* Let the SET_ADDRESS settle */
 
+   return 0;
+}
+
+/*
+ * By the time we get here, the device has gotten a new device ID
+ * and is in the default state. We need to identify the thing and
+ * get the ball rolling..
+ *
+ * Returns 0 for success, != 0 for error.
+ */
+int usb_new_device(struct usb_device *dev)
+{
+   bool do_read = true;
+   int addr, err;
+   int tmp, ret;
+   ALLOC_CACHE_ALIGN_BUFFER(unsigned char, tmpbuf, USB_BUFSIZ);
+
+   /* We still haven't set the Address yet */
+   addr = dev-devnum;
+   dev-devnum = 0;
+
+   /*
+* XHCI needs to issue a Address device command to setup
+* proper device context structures, before it can interact
+* with the device. So a get_descriptor will fail before any
+* of that is done for XHCI unlike EHCI.
+*/
+#ifndef CONFIG_USB_XHCI
+   do_read = false;
+#endif
+   ret = usb_prepare_device(dev, addr, do_read, dev-parent, dev-portnr);
+   if (ret)
+   return ret;
+
tmp = sizeof(dev-descriptor);
 
err = usb_get_descriptor(dev, USB_DT_DEVICE, 0,
-- 
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[U-Boot] [PATCH v2 05/80] dm: core: Support allocating driver-private data for DMA

[Simon Glass]

Some driver want to put DMA buffers in their private data. Add a flag
to tell driver model to align driver-private data to a cache boundary so
that DMA will work correctly in this case.

Signed-off-by: Simon Glass s...@chromium.org
---

Changes in v2: None

 drivers/core/device.c | 19 +--
 include/dm/device.h   |  3 +++
 2 files changed, 20 insertions(+), 2 deletions(-)

diff --git a/drivers/core/device.c b/drivers/core/device.c
index 7483405..1ca5d1c 100644
--- a/drivers/core/device.c
+++ b/drivers/core/device.c
@@ -164,6 +164,21 @@ int device_bind_by_name(struct udevice *parent, bool 
pre_reloc_only,
   -1, devp);
 }
 
+static void *alloc_priv(int size, uint flags)
+{
+   void *priv;
+
+   if (flags  DM_FLAG_ALLOC_PRIV_DMA) {
+   priv = memalign(ARCH_DMA_MINALIGN, size);
+   if (priv)
+   memset(priv, '\0', size);
+   } else {
+   priv = calloc(1, size);
+   }
+
+   return priv;
+}
+
 int device_probe_child(struct udevice *dev, void *parent_priv)
 {
struct driver *drv;
@@ -182,7 +197,7 @@ int device_probe_child(struct udevice *dev, void 
*parent_priv)
 
/* Allocate private data if requested */
if (drv-priv_auto_alloc_size) {
-   dev-priv = calloc(1, drv-priv_auto_alloc_size);
+   dev-priv = alloc_priv(drv-priv_auto_alloc_size, drv-flags);
if (!dev-priv) {
ret = -ENOMEM;
goto fail;
@@ -206,7 +221,7 @@ int device_probe_child(struct udevice *dev, void 
*parent_priv)
per_child_auto_alloc_size;
}
if (size) {
-   dev-parent_priv = calloc(1, size);
+   dev-parent_priv = alloc_priv(size, drv-flags);
if (!dev-parent_priv) {
ret = -ENOMEM;
goto fail;
diff --git a/include/dm/device.h b/include/dm/device.h
index 6980954..f27b34b 100644
--- a/include/dm/device.h
+++ b/include/dm/device.h
@@ -30,6 +30,9 @@ struct driver_info;
 /* DM is responsible for allocating and freeing parent_platdata */
 #define DM_FLAG_ALLOC_PARENT_PDATA (1  3)
 
+/* Allocate driver private data on a DMA boundary */
+#define DM_FLAG_ALLOC_PRIV_DMA (1  4)
+
 /**
  * struct udevice - An instance of a driver
  *
-- 
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[U-Boot] [PATCH v2 26/80] dm: usb: Adjust usb_storage to work with sandbox

[Simon Glass]

With a few tweaks we can compile this code with sandbox and enable testing
of the USB storage layer.

Signed-off-by: Simon Glass s...@chromium.org
---

Changes in v2: None

 common/usb_storage.c | 8 +---
 1 file changed, 5 insertions(+), 3 deletions(-)

diff --git a/common/usb_storage.c b/common/usb_storage.c
index 64d01ea..acea5ae 100644
--- a/common/usb_storage.c
+++ b/common/usb_storage.c
@@ -34,6 +34,7 @@
 #include common.h
 #include command.h
 #include inttypes.h
+#include mapmem.h
 #include asm/byteorder.h
 #include asm/processor.h
 
@@ -295,8 +296,9 @@ static int us_one_transfer(struct us_data *us, int pipe, 
char *buf, int length)
/* set up the transfer loop */
do {
/* transfer the data */
-   debug(Bulk xfer 0x%x(%d) try #%d\n,
- (unsigned int)buf, this_xfer, 11 - maxtry);
+   debug(Bulk xfer 0x%lx(%d) try #%d\n,
+ (ulong)map_to_sysmem(buf), this_xfer,
+ 11 - maxtry);
result = usb_bulk_msg(us-pusb_dev, pipe, buf,
  this_xfer, partial,
  USB_CNTL_TIMEOUT * 5);
@@ -562,7 +564,7 @@ static int usb_stor_CBI_get_status(ccb *srb, struct us_data 
*us)
(void *) us-ip_data, us-irqmaxp, us-irqinterval);
timeout = 1000;
while (timeout--) {
-   if ((volatile int *) us-ip_wanted == NULL)
+   if (*(volatile int *)us-ip_wanted == 0)
break;
mdelay(10);
}
-- 
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[U-Boot] [PATCH v2 31/80] dm: usb: Allow ECHI to hold private data for the controller

[Simon Glass]

Add a private data pointer that clients of EHCI can use to access their
private information. This establishes a link between struct ehci_ctrl and
its associated controller data structure.

Signed-off-by: Simon Glass s...@chromium.org
---

Changes in v2: None

 drivers/usb/host/ehci-hcd.c | 10 ++
 drivers/usb/host/ehci.h | 21 +
 2 files changed, 31 insertions(+)

diff --git a/drivers/usb/host/ehci-hcd.c b/drivers/usb/host/ehci-hcd.c
index fed3942..d85308f 100644
--- a/drivers/usb/host/ehci-hcd.c
+++ b/drivers/usb/host/ehci-hcd.c
@@ -930,6 +930,16 @@ unknown:
return -1;
 }
 
+void ehci_set_controller_priv(int index, void *priv)
+{
+   ehcic[index].priv = priv;
+}
+
+void *ehci_get_controller_priv(int index)
+{
+   return ehcic[index].priv;
+}
+
 int usb_lowlevel_stop(int index)
 {
ehci_shutdown(ehcic[index]);
diff --git a/drivers/usb/host/ehci.h b/drivers/usb/host/ehci.h
index ec4d6b0..d538bb6 100644
--- a/drivers/usb/host/ehci.h
+++ b/drivers/usb/host/ehci.h
@@ -248,6 +248,7 @@ struct ehci_ctrl {
uint32_t *periodic_list;
int periodic_schedules;
int ntds;
+   void *priv; /* client's private data */
 };
 
 /* Weak functions that drivers can override */
@@ -256,6 +257,26 @@ void ehci_set_usbmode(int index);
 void ehci_powerup_fixup(uint32_t *status_reg, uint32_t *reg);
 uint32_t *ehci_get_portsc_register(struct ehci_hcor *hcor, int port);
 
+/**
+ * ehci_set_controller_priv() - Set up private data for the controller
+ *
+ * This function can be called in ehci_hcd_init() to tell the EHCI layer
+ * about the controller's private data pointer. Then in the above functions
+ * this can be accessed given the struct ehci_ctrl pointer.
+ *
+ * @index: Controller number to set
+ * @priv:  Controller pointer
+ */
+void ehci_set_controller_priv(int index, void *priv);
+
+/**
+ * ehci_get_controller_priv() - Get controller private data
+ *
+ * @index  Controller number to get
+ * @return controller pointer for this index
+ */
+void *ehci_get_controller_priv(int index);
+
 /* Low level init functions */
 int ehci_hcd_init(int index, enum usb_init_type init,
struct ehci_hccr **hccr, struct ehci_hcor **hcor);
-- 
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[U-Boot] [PATCH v2 66/80] dm: usb: Rename the XHCI HCD to U-Boot

[Simon Glass]

This should be U-Boot, not u-boot.

Signed-off-by: Simon Glass s...@chromium.org
---

Changes in v2: None

 drivers/usb/host/xhci.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/usb/host/xhci.c b/drivers/usb/host/xhci.c
index 6d9d4a6..7396c2d 100644
--- a/drivers/usb/host/xhci.c
+++ b/drivers/usb/host/xhci.c
@@ -704,7 +704,7 @@ static int xhci_submit_root(struct usb_device *udev, 
unsigned long pipe,
srclen = 4;
break;
case 1: /* Vendor String  */
-   srcptr = \16\3u\0-\0b\0o\0o\0t\0;
+   srcptr = \16\3U\0-\0B\0o\0o\0t\0;
srclen = 14;
break;
case 2: /* Product Name */
-- 
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[U-Boot] [PATCH v2 68/80] dm: usb: exynos: Use driver model for USB

[Simon Glass]

Convert Exynos boards over to use driver model for USB. This does not remove
any unnecessary code so far.

Signed-off-by: Simon Glass s...@chromium.org
---

Changes in v2: None

 arch/arm/cpu/armv7/exynos/Kconfig | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/arch/arm/cpu/armv7/exynos/Kconfig 
b/arch/arm/cpu/armv7/exynos/Kconfig
index eb86a7f..b042fba 100644
--- a/arch/arm/cpu/armv7/exynos/Kconfig
+++ b/arch/arm/cpu/armv7/exynos/Kconfig
@@ -86,6 +86,9 @@ config SYS_MALLOC_F
 config SYS_MALLOC_F_LEN
default 0x400
 
+config DM_USB
+   default y
+
 source board/samsung/smdkv310/Kconfig
 source board/samsung/trats/Kconfig
 source board/samsung/universal_c210/Kconfig
-- 
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[U-Boot] [PATCH v2 53/80] dm: usb: sandbox: Add a driver for sandbox

[Simon Glass]

This driver supports using emulation devices to provide a USB bus within
sandbox.

Signed-off-by: Simon Glass s...@chromium.org
---

Changes in v2: None

 drivers/usb/host/Makefile  |   1 +
 drivers/usb/host/usb-sandbox.c | 117 +
 2 files changed, 118 insertions(+)
 create mode 100644 drivers/usb/host/usb-sandbox.c

diff --git a/drivers/usb/host/Makefile b/drivers/usb/host/Makefile
index 9419295..7658f87 100644
--- a/drivers/usb/host/Makefile
+++ b/drivers/usb/host/Makefile
@@ -7,6 +7,7 @@
 
 ifdef CONFIG_DM_USB
 obj-$(CONFIG_CMD_USB) += usb-uclass.o
+obj-$(CONFIG_SANDBOX) += usb-sandbox.o
 endif
 
 # ohci
diff --git a/drivers/usb/host/usb-sandbox.c b/drivers/usb/host/usb-sandbox.c
new file mode 100644
index 000..c5f9822
--- /dev/null
+++ b/drivers/usb/host/usb-sandbox.c
@@ -0,0 +1,117 @@
+/*
+ * (C) Copyright 2015 Google, Inc
+ * Written by Simon Glass s...@chromium.org
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include common.h
+#include dm.h
+#include usb.h
+#include dm/root.h
+
+DECLARE_GLOBAL_DATA_PTR;
+
+static void usbmon_trace(struct udevice *bus, ulong pipe,
+struct devrequest *setup, struct udevice *emul)
+{
+   static const char types[] = ZICB;
+   int type;
+
+   type = (pipe  USB_PIPE_TYPE_MASK)  USB_PIPE_TYPE_SHIFT;
+   debug(0 0 S %c%c:%d:%03ld:%ld, types[type],
+ pipe  USB_DIR_IN ? 'i' : 'o',
+ bus-seq,
+ (pipe  USB_PIPE_DEV_MASK)  USB_PIPE_DEV_SHIFT,
+ (pipe  USB_PIPE_EP_MASK)  USB_PIPE_EP_SHIFT);
+   if (setup) {
+   debug( s %02x %02x %04x %04x %04x, setup-requesttype,
+ setup-request, setup-value, setup-index,
+ setup-length);
+   }
+   debug( %s, emul ? emul-name : (no emul found));
+
+   debug(\n);
+}
+
+static int sandbox_submit_control(struct udevice *bus,
+ struct usb_device *udev,
+ unsigned long pipe,
+ void *buffer, int length,
+ struct devrequest *setup)
+{
+   struct udevice *emul;
+   int ret;
+
+   /* Just use child of dev as emulator? */
+   debug(%s: bus=%s\n, __func__, bus-name);
+   ret = usb_emul_find(bus, pipe, emul);
+   usbmon_trace(bus, pipe, setup, emul);
+   if (ret)
+   return ret;
+   ret = usb_emul_control(emul, udev, pipe, buffer, length, setup);
+   if (ret  0) {
+   debug(ret=%d\n, ret);
+   udev-status = ret;
+   udev-act_len = 0;
+   } else {
+   udev-status = 0;
+   udev-act_len = ret;
+   }
+
+   return ret;
+}
+
+static int sandbox_submit_bulk(struct udevice *bus, struct usb_device *udev,
+  unsigned long pipe, void *buffer, int length)
+{
+   struct udevice *emul;
+   int ret;
+
+   /* Just use child of dev as emulator? */
+   debug(%s: bus=%s\n, __func__, bus-name);
+   ret = usb_emul_find(bus, pipe, emul);
+   usbmon_trace(bus, pipe, NULL, emul);
+   if (ret)
+   return ret;
+   ret = usb_emul_bulk(emul, udev, pipe, buffer, length);
+   if (ret  0) {
+   debug(ret=%d\n, ret);
+   udev-status = ret;
+   udev-act_len = 0;
+   } else {
+   udev-status = 0;
+   udev-act_len = ret;
+   }
+
+   return ret;
+}
+
+static int sandbox_alloc_device(struct udevice *dev, struct usb_device *udev)
+{
+   return 0;
+}
+
+static int sandbox_usb_probe(struct udevice *dev)
+{
+   return 0;
+}
+
+static const struct dm_usb_ops sandbox_usb_ops = {
+   .control= sandbox_submit_control,
+   .bulk   = sandbox_submit_bulk,
+   .alloc_device   = sandbox_alloc_device,
+};
+
+static const struct udevice_id sandbox_usb_ids[] = {
+   { .compatible = sandbox,usb },
+   { }
+};
+
+U_BOOT_DRIVER(usb_sandbox) = {
+   .name   = usb_sandbox,
+   .id = UCLASS_USB,
+   .of_match = sandbox_usb_ids,
+   .probe = sandbox_usb_probe,
+   .ops= sandbox_usb_ops,
+};
-- 
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[U-Boot] [PATCH v2 48/80] dm: usb: Move struct usb_string to a common place

[Simon Glass]

This is needed for sandbox USB device emulation, so move it to a place
where it can be found by things other than gadgets.

Signed-off-by: Simon Glass s...@chromium.org
---

Changes in v2: None

 include/linux/usb/ch9.h| 13 +
 include/linux/usb/gadget.h | 13 -
 2 files changed, 13 insertions(+), 13 deletions(-)

diff --git a/include/linux/usb/ch9.h b/include/linux/usb/ch9.h
index bd48704..10675b4 100644
--- a/include/linux/usb/ch9.h
+++ b/include/linux/usb/ch9.h
@@ -1002,4 +1002,17 @@ struct usb_set_sel_req {
  */
 #define USB_SELF_POWER_VBUS_MAX_DRAW   100
 
+/**
+ * struct usb_string - wraps a C string and its USB id
+ * @id:the (nonzero) ID for this string
+ * @s:the string, in UTF-8 encoding
+ *
+ * If you're using usb_gadget_get_string(), use this to wrap a string
+ * together with its ID.
+ */
+struct usb_string {
+   u8 id;
+   const char *s;
+};
+
 #endif /* __LINUX_USB_CH9_H */
diff --git a/include/linux/usb/gadget.h b/include/linux/usb/gadget.h
index 9bccd45..bd409bc 100644
--- a/include/linux/usb/gadget.h
+++ b/include/linux/usb/gadget.h
@@ -806,19 +806,6 @@ int usb_gadget_unregister_driver(struct usb_gadget_driver 
*driver);
 /* utility to simplify dealing with string descriptors */
 
 /**
- * struct usb_string - wraps a C string and its USB id
- * @id:the (nonzero) ID for this string
- * @s:the string, in UTF-8 encoding
- *
- * If you're using usb_gadget_get_string(), use this to wrap a string
- * together with its ID.
- */
-struct usb_string {
-   u8  id;
-   const char  *s;
-};
-
-/**
  * struct usb_gadget_strings - a set of USB strings in a given language
  * @language:identifies the strings' language (0x0409 for en-us)
  * @strings:array of strings with their ids
-- 
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[U-Boot] [PATCH v2 51/80] dm: usb: sandbox: Add an emulator for USB flash devices

[Simon Glass]

This emulator supports USB enumeration and allows a local file to be provided
as the contents of the emulated flash stick. U-Boot can then use the file as
it would a normal device, with all access passing through the usb_stor layer
and the USB stack.

Signed-off-by: Simon Glass s...@chromium.org
---

Changes in v2: None

 drivers/usb/emul/Makefile|   1 +
 drivers/usb/emul/sandbox_flash.c | 423 +++
 include/dm/uclass-id.h   |   1 +
 3 files changed, 425 insertions(+)
 create mode 100644 drivers/usb/emul/sandbox_flash.c

diff --git a/drivers/usb/emul/Makefile b/drivers/usb/emul/Makefile
index f75bbd8..1d5acce 100644
--- a/drivers/usb/emul/Makefile
+++ b/drivers/usb/emul/Makefile
@@ -5,4 +5,5 @@
 # SPDX-License-Identifier: GPL-2.0+
 #
 
+obj-$(CONFIG_USB_EMUL) += sandbox_flash.o
 obj-$(CONFIG_USB_EMUL) += usb-emul-uclass.o
diff --git a/drivers/usb/emul/sandbox_flash.c b/drivers/usb/emul/sandbox_flash.c
new file mode 100644
index 000..6e0808d
--- /dev/null
+++ b/drivers/usb/emul/sandbox_flash.c
@@ -0,0 +1,423 @@
+/*
+ * (C) Copyright 2015 Google, Inc
+ * Written by Simon Glass s...@chromium.org
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include common.h
+#include dm.h
+#include os.h
+#include scsi.h
+#include usb.h
+
+DECLARE_GLOBAL_DATA_PTR;
+
+/*
+ * This driver emulates a flash stick using the UFI command specification and
+ * the BBB (bulk/bulk/bulk) protocol. It supports only a single logical unit
+ * number (LUN 0).
+ */
+
+enum {
+   SANDBOX_FLASH_EP_OUT= 1,/* endpoints */
+   SANDBOX_FLASH_EP_IN = 2,
+   SANDBOX_FLASH_BLOCK_LEN = 512,
+};
+
+enum cmd_phase {
+   PHASE_START,
+   PHASE_DATA,
+   PHASE_STATUS,
+};
+
+/**
+ * struct sandbox_flash_priv - private state for this driver
+ *
+ * @error: true if there is an error condition
+ * @alloc_len: Allocation length from the last incoming command
+ * @transfer_len: Transfer length from CBW header
+ * @read_len:  Number of blocks of data left in the current read command
+ * @tag:   Tag value from last command
+ * @fd:File descriptor of backing file
+ * @file_size: Size of file in bytes
+ * @status_buff:   Data buffer for outgoing status
+ * @buff_used: Number of bytes ready to transfer back to host
+ * @buff:  Data buffer for outgoing data
+ */
+struct sandbox_flash_priv {
+   bool error;
+   int alloc_len;
+   int transfer_len;
+   int read_len;
+   enum cmd_phase phase;
+   u32 tag;
+   int fd;
+   loff_t file_size;
+   struct umass_bbb_csw status;
+   int buff_used;
+   u8 buff[512];
+};
+
+struct sandbox_flash_plat {
+   const char *pathname;
+};
+
+struct scsi_inquiry_resp {
+   u8 type;
+   u8 flags;
+   u8 version;
+   u8 data_format;
+   u8 additional_len;
+   u8 spare[3];
+   char vendor[8];
+   char product[16];
+   char revision[4];
+};
+
+struct scsi_read_capacity_resp {
+   u32 last_block_addr;
+   u32 block_len;
+};
+
+struct __packed scsi_read10_req {
+   u8 cmd;
+   u8 lun_flags;
+   u32 lba;
+   u8 spare;
+   u16 transfer_len;
+   u8 spare2[3];
+};
+
+enum {
+   STRINGID_MANUFACTURER = 1,
+   STRINGID_PRODUCT,
+   STRINGID_SERIAL,
+
+   STRINGID_COUNT,
+};
+
+static struct usb_string flash_strings[] = {
+   {STRINGID_MANUFACTURER, sandbox},
+   {STRINGID_PRODUCT,  flash},
+   {STRINGID_SERIAL,   2345},
+   {},
+};
+
+static struct usb_device_descriptor flash_device_desc = {
+   .bLength =  sizeof(flash_device_desc),
+   .bDescriptorType =  USB_DT_DEVICE,
+
+   .bcdUSB =   __constant_cpu_to_le16(0x0200),
+
+   .bDeviceClass = 0,
+   .bDeviceSubClass =  0,
+   .bDeviceProtocol =  0,
+
+   .idVendor = __constant_cpu_to_le16(0x1234),
+   .idProduct =__constant_cpu_to_le16(0x5678),
+   .iManufacturer =STRINGID_MANUFACTURER,
+   .iProduct = STRINGID_PRODUCT,
+   .iSerialNumber =STRINGID_SERIAL,
+   .bNumConfigurations =   1,
+};
+
+static struct usb_config_descriptor flash_config0 = {
+   .bLength= sizeof(flash_config0),
+   .bDescriptorType= USB_DT_CONFIG,
+
+   /* wTotalLength is set up by usb-emul-uclass */
+   .bNumInterfaces = 1,
+   .bConfigurationValue= 0,
+   .iConfiguration = 0,
+   .bmAttributes   = 1  7,
+   .bMaxPower  = 50,
+};
+
+static struct usb_interface_descriptor flash_interface0 = {
+   .bLength= sizeof(flash_interface0),
+   .bDescriptorType= USB_DT_INTERFACE,
+
+   .bInterfaceNumber   = 0,
+   .bAlternateSetting  = 0,
+   .bNumEndpoints  = 2,
+   .bInterfaceClass= USB_CLASS_MASS_STORAGE,
+   

[U-Boot] [PATCH v2 74/80] dm: usb: sandbox: Enable USB

[Simon Glass]

Enable USB emulation and associated features so that USB can be used in
sandbox.

Signed-off-by: Simon Glass s...@chromium.org
---

Changes in v2: None

 configs/sandbox_defconfig | 4 
 include/configs/sandbox.h | 2 ++
 2 files changed, 6 insertions(+)

diff --git a/configs/sandbox_defconfig b/configs/sandbox_defconfig
index e23b959..3f4812c 100644
--- a/configs/sandbox_defconfig
+++ b/configs/sandbox_defconfig
@@ -15,3 +15,7 @@ CONFIG_CMD_CROS_EC=y
 CONFIG_PCI=y
 CONFIG_DM_PCI=y
 CONFIG_PCI_SANDBOX=y
+CONFIG_USB=y
+CONFIG_DM_USB=y
+CONFIG_USB_EMUL=y
+CONFIG_USB_STORAGE=y
diff --git a/include/configs/sandbox.h b/include/configs/sandbox.h
index 558ea2c..95cfce6 100644
--- a/include/configs/sandbox.h
+++ b/include/configs/sandbox.h
@@ -60,6 +60,7 @@
 #define CONFIG_CMD_GPT
 #define CONFIG_PARTITION_UUIDS
 #define CONFIG_EFI_PARTITION
+#define CONFIG_DOS_PARTITION
 
 /*
  * Size of malloc() pool, before and after relocation
@@ -200,5 +201,6 @@
 #define CONFIG_TPM_TIS_SANDBOX
 
 #define CONFIG_CMD_LZMADEC
+#define CONFIG_CMD_USB
 
 #endif
-- 
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[U-Boot] [PATCH v2 76/80] dm: test: Allow 'dm test' to select a particular test to run

[Simon Glass]

As well as running all tests, it is useful to be able to run a selected test.

Signed-off-by: Simon Glass s...@chromium.org
---

Changes in v2: None

 include/dm/test.h   |  7 ---
 test/dm/cmd_dm.c| 11 ---
 test/dm/test-main.c |  7 +--
 3 files changed, 17 insertions(+), 8 deletions(-)

diff --git a/include/dm/test.h b/include/dm/test.h
index b310e5f..9c4b8d3 100644
--- a/include/dm/test.h
+++ b/include/dm/test.h
@@ -205,12 +205,13 @@ void dm_leak_check_start(struct dm_test_state *dms);
 
 
 /**
- * dm_test_main() - Run all the tests
+ * dm_test_main() - Run all or one of the tests
  *
- * This runs all available driver model tests
+ * This runs all available driver model tests, or a selected one
  *
+ * @test_name: Name of test to run, or NULL for all
  * @return 0 if OK, -ve on error
  */
-int dm_test_main(void);
+int dm_test_main(const char *test_name);
 
 #endif
diff --git a/test/dm/cmd_dm.c b/test/dm/cmd_dm.c
index 62e065c..2f527e9 100644
--- a/test/dm/cmd_dm.c
+++ b/test/dm/cmd_dm.c
@@ -113,7 +113,12 @@ static int do_dm_dump_uclass(cmd_tbl_t *cmdtp, int flag, 
int argc,
 static int do_dm_test(cmd_tbl_t *cmdtp, int flag, int argc,
  char * const argv[])
 {
-   return dm_test_main();
+   const char *test_name = NULL;
+
+   if (argc  0)
+   test_name = argv[0];
+
+   return dm_test_main(test_name);
 }
 #define TEST_HELP \ndm test Run tests
 #else
@@ -133,7 +138,7 @@ static int do_dm(cmd_tbl_t *cmdtp, int flag, int argc, char 
* const argv[])
cmd_tbl_t *test_cmd;
int ret;
 
-   if (argc != 2)
+   if (argc  2)
return CMD_RET_USAGE;
test_cmd = find_cmd_tbl(argv[1], test_commands,
ARRAY_SIZE(test_commands));
@@ -148,7 +153,7 @@ static int do_dm(cmd_tbl_t *cmdtp, int flag, int argc, char 
* const argv[])
 }
 
 U_BOOT_CMD(
-   dm, 2,  1,  do_dm,
+   dm, 3,  1,  do_dm,
Driver model low level access,
tree Dump driver model tree ('*' = activated)\n
dm uclassDump list of instances for each uclass
diff --git a/test/dm/test-main.c b/test/dm/test-main.c
index 90ca810..a47bb37 100644
--- a/test/dm/test-main.c
+++ b/test/dm/test-main.c
@@ -65,7 +65,7 @@ static int dm_test_destroy(struct dm_test_state *dms)
return 0;
 }
 
-int dm_test_main(void)
+int dm_test_main(const char *test_name)
 {
struct dm_test *tests = ll_entry_start(struct dm_test, dm_test);
const int n_ents = ll_entry_count(struct dm_test, dm_test);
@@ -83,9 +83,12 @@ int dm_test_main(void)
ut_assert(gd-fdt_blob);
}
 
-   printf(Running %d driver model tests\n, n_ents);
+   if (!test_name)
+   printf(Running %d driver model tests\n, n_ents);
 
for (test = tests; test  tests + n_ents; test++) {
+   if (test_name  strcmp(test_name, test-name))
+   continue;
printf(Test: %s\n, test-name);
ut_assertok(dm_test_init(dms));
 
-- 
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[U-Boot] [PATCH v2 75/80] dm: test: Correct printf() output nit in 'dm uclass'

[Simon Glass]

Neither the hyphen nor the equals sign is needed.

Signed-off-by: Simon Glass s...@chromium.org
---

Changes in v2: None

 test/dm/cmd_dm.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/test/dm/cmd_dm.c b/test/dm/cmd_dm.c
index 8d531fd..62e065c 100644
--- a/test/dm/cmd_dm.c
+++ b/test/dm/cmd_dm.c
@@ -79,7 +79,7 @@ static void dm_display_line(struct udevice *dev)
   dev-flags  DM_FLAG_ACTIVATED ? '*' : ' ',
   dev-name, (ulong)map_to_sysmem(dev));
if (dev-seq != -1 || dev-req_seq != -1)
-   printf(, seq-%d, (req=%d), dev-seq, dev-req_seq);
+   printf(, seq %d, (req %d), dev-seq, dev-req_seq);
puts(\n);
 }
 
-- 
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[U-Boot] [PATCH v2 58/80] dm: usb: tegra: Tidy up error handling and a static function

[Simon Glass]

Try to return useful error numbers where possible. Also avoid swallowing
an error number when it is returned by a called function.

Signed-off-by: Simon Glass s...@chromium.org
---

Changes in v2: None

 drivers/usb/host/ehci-tegra.c | 19 +++
 1 file changed, 11 insertions(+), 8 deletions(-)

diff --git a/drivers/usb/host/ehci-tegra.c b/drivers/usb/host/ehci-tegra.c
index 464f55d..04653e4 100644
--- a/drivers/usb/host/ehci-tegra.c
+++ b/drivers/usb/host/ehci-tegra.c
@@ -266,7 +266,8 @@ static void set_up_vbus(struct fdt_usb *config, enum 
usb_init_type init)
}
 }
 
-void usbf_reset_controller(struct fdt_usb *config, struct usb_ctlr *usbctlr)
+static void usbf_reset_controller(struct fdt_usb *config,
+ struct usb_ctlr *usbctlr)
 {
/* Reset the USB controller with 2us delay */
reset_periph(config-periph_id, 2);
@@ -524,7 +525,7 @@ static int init_utmi_usb_controller(struct fdt_usb *config,
udelay(1);
}
if (!loop_count)
-   return -1;
+   return -ETIMEDOUT;
 
/* Disable ICUSB FS/LS transceiver */
clrbits_le32(usbctlr-icusb_ctrl, IC_ENB1);
@@ -567,6 +568,7 @@ static int init_ulpi_usb_controller(struct fdt_usb *config,
int loop_count;
struct ulpi_viewport ulpi_vp;
struct usb_ctlr *usbctlr = config-reg;
+   int ret;
 
/* set up ULPI reference clock on pllp_out4 */
clock_enable(PERIPH_ID_DEV2_OUT);
@@ -612,9 +614,10 @@ static int init_ulpi_usb_controller(struct fdt_usb *config,
ulpi_vp.port_num = 0;
ulpi_vp.viewport_addr = (u32)usbctlr-ulpi_viewport;
 
-   if (ulpi_init(ulpi_vp)) {
+   ret = ulpi_init(ulpi_vp);
+   if (ret) {
printf(Tegra ULPI viewport init failed\n);
-   return -1;
+   return ret;
}
 
ulpi_set_vbus(ulpi_vp, 1, 1);
@@ -631,7 +634,7 @@ static int init_ulpi_usb_controller(struct fdt_usb *config,
udelay(1);
}
if (!loop_count)
-   return -1;
+   return -ETIMEDOUT;
clrbits_le32(usbctlr-susp_ctrl, USB_SUSP_CLR);
 
return 0;
@@ -642,7 +645,7 @@ static int init_ulpi_usb_controller(struct fdt_usb *config,
 {
printf(No code to set up ULPI controller, please enable
CONFIG_USB_ULPI and CONFIG_USB_ULPI_VIEWPORT);
-   return -1;
+   return -ENOSYS;
 }
 #endif
 
@@ -669,7 +672,7 @@ static int fdt_decode_usb(const void *blob, int node, 
struct fdt_usb *config)
else {
debug(%s: Cannot decode dr_mode '%s'\n, __func__,
  mode);
-   return -FDT_ERR_NOTFOUND;
+   return -EINVAL;
}
} else {
config-dr_mode = DR_MODE_HOST;
@@ -684,7 +687,7 @@ static int fdt_decode_usb(const void *blob, int node, 
struct fdt_usb *config)
config-periph_id = clock_decode_periph_id(blob, node);
if (config-periph_id == PERIPH_ID_NONE) {
debug(%s: Missing/invalid peripheral ID\n, __func__);
-   return -FDT_ERR_NOTFOUND;
+   return -EINVAL;
}
gpio_request_by_name_nodev(blob, node, nvidia,vbus-gpio, 0,
   config-vbus_gpio, GPIOD_IS_OUT);
-- 
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[U-Boot] [PATCH v2 73/80] dm: usb: Tidy up pipe value decoding

[Simon Glass]

Add a few more shifts/masks to make it easier to decode a pipe value (rather
than just building it). We need this for USB device emulation.

Signed-off-by: Simon Glass s...@chromium.org
---

Changes in v2: None

 include/usb_defs.h | 23 +--
 1 file changed, 17 insertions(+), 6 deletions(-)

diff --git a/include/usb_defs.h b/include/usb_defs.h
index 27ddc47..8214ba9 100644
--- a/include/usb_defs.h
+++ b/include/usb_defs.h
@@ -165,12 +165,14 @@
 #define USB_TEST_MODE_FORCE_ENABLE  0x05
 
 
-/* pipe definitions */
-
-#define PIPE_ISOCHRONOUS0
-#define PIPE_INTERRUPT  1
-#define PIPE_CONTROL2
-#define PIPE_BULK   3
+/*
+ * pipe definitions, use unsigned so we can compare reliably, since this
+ * value is shifted up to bits 30/31.
+ */
+#define PIPE_ISOCHRONOUS0U
+#define PIPE_INTERRUPT  1U
+#define PIPE_CONTROL2U
+#define PIPE_BULK   3U
 #define PIPE_DEVEP_MASK 0x0007ff00
 
 #define USB_ISOCHRONOUS0
@@ -178,6 +180,15 @@
 #define USB_CONTROL2
 #define USB_BULK   3
 
+#define USB_PIPE_TYPE_SHIFT30
+#define USB_PIPE_TYPE_MASK (3  USB_PIPE_TYPE_SHIFT)
+
+#define USB_PIPE_DEV_SHIFT 8
+#define USB_PIPE_DEV_MASK  (0x7f  USB_PIPE_DEV_SHIFT)
+
+#define USB_PIPE_EP_SHIFT  15
+#define USB_PIPE_EP_MASK   (0xf  USB_PIPE_EP_SHIFT)
+
 /* USB-status codes: */
 #define USB_ST_ACTIVE   0x1/* TD is active */
 #define USB_ST_STALLED  0x2/* TD is stalled */
-- 
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[U-Boot] [PATCH v2 50/80] dm: usb: sandbox: Reset emulation devices in usb stop()

[Simon Glass]

These devices must have their addresses removed ready for the next USB
bus enumeration. Add this logic to usb_stop().

Signed-off-by: Simon Glass s...@chromium.org
---

Changes in v2: None

 drivers/usb/host/usb-uclass.c | 11 +++
 1 file changed, 11 insertions(+)

diff --git a/drivers/usb/host/usb-uclass.c b/drivers/usb/host/usb-uclass.c
index 29ef5d9..714bc0e 100644
--- a/drivers/usb/host/usb-uclass.c
+++ b/drivers/usb/host/usb-uclass.c
@@ -93,6 +93,17 @@ int usb_stop(void)
err = ret;
}
 
+#ifdef CONFIG_SANDBOX
+   struct udevice *dev;
+
+   /* Reset all enulation devices */
+   ret = uclass_get(UCLASS_USB_EMUL, uc);
+   if (ret)
+   return ret;
+
+   uclass_foreach_dev(dev, uc)
+   usb_emul_reset(dev);
+#endif
usb_stor_reset();
usb_hub_reset();
usb_started = 0;
-- 
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[U-Boot] [PATCH v2 69/80] dm: usb: exynos: Enable both USB ports on snow

[Simon Glass]

Switch snow over to use both EHCI and XHCI at the same time.

Signed-off-by: Simon Glass s...@chromium.org
---

Changes in v2: None

 include/configs/snow.h | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/include/configs/snow.h b/include/configs/snow.h
index fe802f2..e024955 100644
--- a/include/configs/snow.h
+++ b/include/configs/snow.h
@@ -26,7 +26,9 @@
 #define CONFIG_ARCH_EARLY_INIT_R
 
 #define CONFIG_USB_XHCI
+#define CONFIG_USB_EHCI
 #define CONFIG_USB_XHCI_EXYNOS
+#define CONFIG_USB_EHCI_EXYNOS
 
 #define CONFIG_SYS_PROMPT  snow # 
 #define CONFIG_IDENT_STRING for snow
-- 
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[U-Boot] [PATCH v2 72/80] dm: usb: Add a generic descriptor struct

[Simon Glass]

This is useful for creating lists of descriptors, and is better than using
void * for this purpose.

Signed-off-by: Simon Glass s...@chromium.org
---

Changes in v2: None

 include/linux/usb/ch9.h | 5 +
 1 file changed, 5 insertions(+)

diff --git a/include/linux/usb/ch9.h b/include/linux/usb/ch9.h
index 10675b4..822fca0 100644
--- a/include/linux/usb/ch9.h
+++ b/include/linux/usb/ch9.h
@@ -379,6 +379,11 @@ struct usb_endpoint_descriptor {
 #define USB_DT_ENDPOINT_SIZE   7
 #define USB_DT_ENDPOINT_AUDIO_SIZE 9   /* Audio extension */
 
+/* Used to access common fields */
+struct usb_generic_descriptor {
+   __u8  bLength;
+   __u8  bDescriptorType;
+};
 
 /*
  * Endpoints
-- 
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[U-Boot] [PATCH v2 13/80] dm: usb: Adjust usb_alloc_new_device() to return an error

[Simon Glass]

This function returns NULL on error at present. Adjust it so that we can
return a real error, as is needed with driver model. Also improve the
error handling in its caller, usb_hub_port_connect_change(), and adjust
the code order to prepare for driver model.

Signed-off-by: Simon Glass s...@chromium.org
---

Changes in v2: None

 common/usb.c | 17 -
 common/usb_hub.c | 41 ++---
 include/usb.h| 20 ++--
 3 files changed, 52 insertions(+), 26 deletions(-)

diff --git a/common/usb.c b/common/usb.c
index 32e15cd..f87c6a5 100644
--- a/common/usb.c
+++ b/common/usb.c
@@ -94,12 +94,12 @@ int usb_init(void)
controllers_initialized++;
start_index = dev_index;
printf(scanning bus %d for devices... , i);
-   dev = usb_alloc_new_device(ctrl);
+   ret = usb_alloc_new_device(ctrl, dev);
/*
 * device 0 is always present
 * (root hub, so let it analyze)
 */
-   if (dev)
+   if (!ret)
usb_new_device(dev);
 
if (start_index == dev_index)
@@ -827,16 +827,13 @@ struct usb_device *usb_get_dev_index(int index)
return usb_dev[index];
 }
 
-/* returns a pointer of a new device structure or NULL, if
- * no device struct is available
- */
-struct usb_device *usb_alloc_new_device(void *controller)
+int usb_alloc_new_device(struct udevice *controller, struct usb_device **devp)
 {
int i;
debug(New Device %d\n, dev_index);
if (dev_index == USB_MAX_DEVICE) {
printf(ERROR, too many USB Devices, max=%d\n, USB_MAX_DEVICE);
-   return NULL;
+   return -ENOSPC;
}
/* default Address is 0, real addresses start with 1 */
usb_dev[dev_index].devnum = dev_index + 1;
@@ -846,7 +843,9 @@ struct usb_device *usb_alloc_new_device(void *controller)
usb_dev[dev_index].parent = NULL;
usb_dev[dev_index].controller = controller;
dev_index++;
-   return usb_dev[dev_index - 1];
+   *devp = usb_dev[dev_index - 1];
+
+   return 0;
 }
 
 /*
@@ -854,7 +853,7 @@ struct usb_device *usb_alloc_new_device(void *controller)
  * Called in error cases where configuring a newly attached
  * device fails for some reason.
  */
-void usb_free_device(void)
+void usb_free_device(struct udevice *controller)
 {
dev_index--;
debug(Freeing device node: %d\n, dev_index);
diff --git a/common/usb_hub.c b/common/usb_hub.c
index 66b4a72..7199e25 100644
--- a/common/usb_hub.c
+++ b/common/usb_hub.c
@@ -24,6 +24,7 @@
 
 #include common.h
 #include command.h
+#include errno.h
 #include asm/processor.h
 #include asm/unaligned.h
 #include linux/ctype.h
@@ -206,16 +207,18 @@ int hub_port_reset(struct usb_device *dev, int port,
 }
 
 
-void usb_hub_port_connect_change(struct usb_device *dev, int port)
+int usb_hub_port_connect_change(struct usb_device *dev, int port)
 {
struct usb_device *usb;
ALLOC_CACHE_ALIGN_BUFFER(struct usb_port_status, portsts, 1);
unsigned short portstatus;
+   int ret, speed;
 
/* Check status */
-   if (usb_get_port_status(dev, port + 1, portsts)  0) {
+   ret = usb_get_port_status(dev, port + 1, portsts);
+   if (ret  0) {
debug(get_port_status failed\n);
-   return;
+   return ret;
}
 
portstatus = le16_to_cpu(portsts-wPortStatus);
@@ -233,47 +236,55 @@ void usb_hub_port_connect_change(struct usb_device *dev, 
int port)
debug(usb_disconnect(hub-children[port]);\n);
/* Return now if nothing is connected */
if (!(portstatus  USB_PORT_STAT_CONNECTION))
-   return;
+   return -ENOTCONN;
}
mdelay(200);
 
/* Reset the port */
-   if (hub_port_reset(dev, port, portstatus)  0) {
+   ret = hub_port_reset(dev, port, portstatus);
+   if (ret  0) {
printf(cannot reset port %i!?\n, port + 1);
-   return;
+   return ret;
}
 
mdelay(200);
 
-   /* Allocate a new device struct for it */
-   usb = usb_alloc_new_device(dev-controller);
-
switch (portstatus  USB_PORT_STAT_SPEED_MASK) {
case USB_PORT_STAT_SUPER_SPEED:
-   usb-speed = USB_SPEED_SUPER;
+   speed = USB_SPEED_SUPER;
break;
case USB_PORT_STAT_HIGH_SPEED:
-   usb-speed = USB_SPEED_HIGH;
+   speed = USB_SPEED_HIGH;
break;
case USB_PORT_STAT_LOW_SPEED:
-   usb-speed = USB_SPEED_LOW;
+   speed = USB_SPEED_LOW;
break;
default:
-   usb-speed = USB_SPEED_FULL;
+   speed = USB_SPEED_FULL;
break;
}
 
+   ret = 

[U-Boot] [PATCH v2 30/80] dm: usb: Pass EHCI controller pointer to ehci_get_port_speed()

[Simon Glass]

Adjust this function so that it is passed an EHCI controller pointer so that
implementations can look up their controller.

Signed-off-by: Simon Glass s...@chromium.org
---

Changes in v2: None

 drivers/usb/host/ehci-faraday.c | 5 +++--
 drivers/usb/host/ehci-hcd.c | 4 ++--
 drivers/usb/host/ehci-tegra.c   | 5 +++--
 drivers/usb/host/ehci.h | 2 +-
 4 files changed, 9 insertions(+), 7 deletions(-)

diff --git a/drivers/usb/host/ehci-faraday.c b/drivers/usb/host/ehci-faraday.c
index 3b761bc..e386813 100644
--- a/drivers/usb/host/ehci-faraday.c
+++ b/drivers/usb/host/ehci-faraday.c
@@ -101,11 +101,12 @@ void ehci_set_usbmode(int index)
  * This ehci_get_port_speed() overrides the weak function
  * in ehci-hcd.c.
  */
-int ehci_get_port_speed(struct ehci_hcor *hcor, uint32_t reg)
+int ehci_get_port_speed(struct ehci_ctrl *ctrl, uint32_t reg)
 {
int spd, ret = PORTSC_PSPD_HS;
-   union ehci_faraday_regs *regs = (void __iomem *)((ulong)hcor - 0x10);
+   union ehci_faraday_regs *regs;
 
+   ret = (void __iomem *)((ulong)ctrl-hcor - 0x10);
if (ehci_is_fotg2xx(regs))
spd = OTGCSR_SPD(readl(regs-otg.otgcsr));
else
diff --git a/drivers/usb/host/ehci-hcd.c b/drivers/usb/host/ehci-hcd.c
index 10a0671..fed3942 100644
--- a/drivers/usb/host/ehci-hcd.c
+++ b/drivers/usb/host/ehci-hcd.c
@@ -119,7 +119,7 @@ static struct descriptor {
 #define ehci_is_TDI()  (0)
 #endif
 
-__weak int ehci_get_port_speed(struct ehci_hcor *hcor, uint32_t reg)
+__weak int ehci_get_port_speed(struct ehci_ctrl *ctrl, uint32_t reg)
 {
return PORTSC_PSPD(reg);
 }
@@ -781,7 +781,7 @@ ehci_submit_root(struct usb_device *dev, unsigned long 
pipe, void *buffer,
tmpbuf[1] |= USB_PORT_STAT_POWER  8;
 
if (ehci_is_TDI()) {
-   switch (ehci_get_port_speed(ctrl-hcor, reg)) {
+   switch (ehci_get_port_speed(ctrl, reg)) {
case PORTSC_PSPD_FS:
break;
case PORTSC_PSPD_LS:
diff --git a/drivers/usb/host/ehci-tegra.c b/drivers/usb/host/ehci-tegra.c
index b5ad1e3..0831fe9 100644
--- a/drivers/usb/host/ehci-tegra.c
+++ b/drivers/usb/host/ehci-tegra.c
@@ -225,13 +225,14 @@ void ehci_set_usbmode(int index)
  * This ehci_get_port_speed overrides the weak function ehci_get_port_speed
  * in ehci-hcd.c.
  */
-int ehci_get_port_speed(struct ehci_hcor *hcor, uint32_t reg)
+int ehci_get_port_speed(struct ehci_ctrl *ctrl, uint32_t reg)
 {
uint32_t tmp;
uint32_t *reg_ptr;
 
if (controller-has_hostpc) {
-   reg_ptr = (uint32_t *)((u8 *)hcor-or_usbcmd + HOSTPC1_DEVLC);
+   reg_ptr = (uint32_t *)((u8 *)ctrl-hcor-or_usbcmd +
+   HOSTPC1_DEVLC);
tmp = ehci_readl(reg_ptr);
return HOSTPC1_PSPD(tmp);
} else
diff --git a/drivers/usb/host/ehci.h b/drivers/usb/host/ehci.h
index 3e5427a..ec4d6b0 100644
--- a/drivers/usb/host/ehci.h
+++ b/drivers/usb/host/ehci.h
@@ -251,7 +251,7 @@ struct ehci_ctrl {
 };
 
 /* Weak functions that drivers can override */
-int ehci_get_port_speed(struct ehci_hcor *hcor, uint32_t reg);
+int ehci_get_port_speed(struct ehci_ctrl *ctrl, uint32_t reg);
 void ehci_set_usbmode(int index);
 void ehci_powerup_fixup(uint32_t *status_reg, uint32_t *reg);
 uint32_t *ehci_get_portsc_register(struct ehci_hcor *hcor, int port);
-- 
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[U-Boot] [PATCH v2 10/80] dm: gpio: Add an implementation for gpio_get_number()

[Simon Glass]

This has a prototype but no implementation. It returns the global GPIO number
given a gpio_desc. It is useful for debugging in some cases.

Signed-off-by: Simon Glass s...@chromium.org
---

Changes in v2: None

 drivers/gpio/gpio-uclass.c | 12 
 1 file changed, 12 insertions(+)

diff --git a/drivers/gpio/gpio-uclass.c b/drivers/gpio/gpio-uclass.c
index b6e1058..380366f 100644
--- a/drivers/gpio/gpio-uclass.c
+++ b/drivers/gpio/gpio-uclass.c
@@ -689,6 +689,18 @@ static int gpio_renumber(struct udevice *removed_dev)
return 0;
 }
 
+int gpio_get_number(struct gpio_desc *desc)
+{
+   struct udevice *dev = desc-dev;
+   struct gpio_dev_priv *uc_priv;
+
+   if (!dev)
+   return -1;
+   uc_priv = dev-uclass_priv;
+
+   return uc_priv-gpio_base + desc-offset;
+}
+
 static int gpio_post_probe(struct udevice *dev)
 {
struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev);
-- 
2.2.0.rc0.207.ga3a616c

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[U-Boot] [PATCH v2 16/80] dm: usb: Refactor port resets

[Simon Glass]

Move the port reset code into its own function. Rename usb_hub_reset() to
indicate that is is now a legacy function.

Signed-off-by: Simon Glass s...@chromium.org
---

Changes in v2: None

 common/usb.c | 40 ++--
 common/usb_hub.c |  4 ++--
 include/usb.h| 18 +-
 3 files changed, 45 insertions(+), 17 deletions(-)

diff --git a/common/usb.c b/common/usb.c
index 330e6a2..4ab2213 100644
--- a/common/usb.c
+++ b/common/usb.c
@@ -871,6 +871,26 @@ __weak int usb_alloc_device(struct usb_device *udev)
 {
return 0;
 }
+
+int usb_legacy_port_reset(struct usb_device *hub, int portnr)
+{
+   if (hub) {
+   unsigned short portstatus;
+   int err;
+
+   /* reset the port for the second time */
+   err = legacy_hub_port_reset(hub, portnr - 1, portstatus);
+   if (err  0) {
+   printf(\n Couldn't reset port %i\n, portnr);
+   return err;
+   }
+   } else {
+   usb_reset_root_port();
+   }
+
+   return 0;
+}
+
 /*
  * By the time we get here, the device has gotten a new device ID
  * and is in the default state. We need to identify the thing and
@@ -907,9 +927,6 @@ int usb_new_device(struct usb_device *dev)
 * http://sourceforge.net/mailarchive/forum.php?
 * thread_id=5729457forum_id=5398
 */
-   __maybe_unused struct usb_device_descriptor *desc;
-   struct usb_device *parent = dev-parent;
-   unsigned short portstatus;
 
/*
 * send 64-byte GET-DEVICE-DESCRIPTOR request.  Since the descriptor is
@@ -917,7 +934,6 @@ int usb_new_device(struct usb_device *dev)
 * the maxpacket size is 8 or 16 the device may be waiting to transmit
 * some more, or keeps on retransmitting the 8 byte header. */
 
-   desc = (struct usb_device_descriptor *)tmpbuf;
dev-descriptor.bMaxPacketSize0 = 64;   /* Start off at 64 bytes  */
/* Default to 64 byte max packet size */
dev-maxpacketsize = PACKET_SIZE_64;
@@ -931,6 +947,9 @@ int usb_new_device(struct usb_device *dev)
 * of that is done for XHCI unlike EHCI.
 */
 #ifndef CONFIG_USB_XHCI
+   struct usb_device_descriptor *desc;
+
+   desc = (struct usb_device_descriptor *)tmpbuf;
err = usb_get_descriptor(dev, USB_DT_DEVICE, 0, desc, 64);
if (err  0) {
debug(usb_new_device: usb_get_descriptor() failed\n);
@@ -945,16 +964,9 @@ int usb_new_device(struct usb_device *dev)
dev-descriptor.bDeviceClass = desc-bDeviceClass;
 #endif
 
-   if (parent) {
-   /* reset the port for the second time */
-   err = hub_port_reset(dev-parent, dev-portnr - 1, portstatus);
-   if (err  0) {
-   printf(\n Couldn't reset port %i\n, dev-portnr);
-   return 1;
-   }
-   } else {
-   usb_reset_root_port();
-   }
+   err = usb_legacy_port_reset(dev-parent, dev-portnr);
+   if (err)
+   return err;
 
dev-epmaxpacketin[0] = dev-descriptor.bMaxPacketSize0;
dev-epmaxpacketout[0] = dev-descriptor.bMaxPacketSize0;
diff --git a/common/usb_hub.c b/common/usb_hub.c
index 7199e25..49fa5a6 100644
--- a/common/usb_hub.c
+++ b/common/usb_hub.c
@@ -141,7 +141,7 @@ static inline char *portspeed(int portstatus)
return speed_str;
 }
 
-int hub_port_reset(struct usb_device *dev, int port,
+int legacy_hub_port_reset(struct usb_device *dev, int port,
unsigned short *portstat)
 {
int tries;
@@ -241,7 +241,7 @@ int usb_hub_port_connect_change(struct usb_device *dev, int 
port)
mdelay(200);
 
/* Reset the port */
-   ret = hub_port_reset(dev, port, portstatus);
+   ret = legacy_hub_port_reset(dev, port, portstatus);
if (ret  0) {
printf(cannot reset port %i!?\n, port + 1);
return ret;
diff --git a/include/usb.h b/include/usb.h
index 11ff5ab..badb287 100644
--- a/include/usb.h
+++ b/include/usb.h
@@ -700,9 +700,25 @@ bool usb_device_has_child_on_port(struct usb_device 
*parent, int port);
 
 int usb_hub_probe(struct usb_device *dev, int ifnum);
 void usb_hub_reset(void);
-int hub_port_reset(struct usb_device *dev, int port,
+
+/**
+ * legacy_hub_port_reset() - reset a port given its usb_device pointer
+ *
+ * Reset a hub port and see if a device is present on that port, providing
+ * sufficient time for it to show itself. The port status is returned.
+ *
+ * With driver model this moves to hub_port_reset() and is passed a struct
+ * udevice.
+ *
+ * @dev:   USB device to reset
+ * @port:  Port number to reset (note ports are numbered from 0 here)
+ * @portstat:  Returns port status
+ */
+int legacy_hub_port_reset(struct usb_device *dev, int port,
  unsigned short *portstat);
 
+int 

[U-Boot] [PATCH v2 35/80] dm: usb: Pass EHCI controller pointer to ehci_set_usbmode()

[Simon Glass]

Adjust this function so that it is passed an EHCI controller pointer so that
implementations can look up their controller. This makes the weak functions
use a consistent API.

Signed-off-by: Simon Glass s...@chromium.org
---

Changes in v2: None

 drivers/usb/host/ehci-faraday.c | 2 +-
 drivers/usb/host/ehci-hcd.c | 6 +++---
 drivers/usb/host/ehci-tegra.c   | 5 ++---
 drivers/usb/host/ehci.h | 2 +-
 4 files changed, 7 insertions(+), 8 deletions(-)

diff --git a/drivers/usb/host/ehci-faraday.c b/drivers/usb/host/ehci-faraday.c
index e386813..c64672b 100644
--- a/drivers/usb/host/ehci-faraday.c
+++ b/drivers/usb/host/ehci-faraday.c
@@ -92,7 +92,7 @@ int ehci_hcd_stop(int index)
  * This ehci_set_usbmode() overrides the weak function
  * in ehci-hcd.c.
  */
-void ehci_set_usbmode(int index)
+void ehci_set_usbmode(struct ehci_ctrl *ctrl)
 {
/* nothing needs to be done */
 }
diff --git a/drivers/usb/host/ehci-hcd.c b/drivers/usb/host/ehci-hcd.c
index e9f58e3..196e23a 100644
--- a/drivers/usb/host/ehci-hcd.c
+++ b/drivers/usb/host/ehci-hcd.c
@@ -124,12 +124,12 @@ __weak int ehci_get_port_speed(struct ehci_ctrl *ctrl, 
uint32_t reg)
return PORTSC_PSPD(reg);
 }
 
-__weak void ehci_set_usbmode(int index)
+__weak void ehci_set_usbmode(struct ehci_ctrl *ctrl)
 {
uint32_t tmp;
uint32_t *reg_ptr;
 
-   reg_ptr = (uint32_t *)((u8 *)ehcic[index].hcor-or_usbcmd + USBMODE);
+   reg_ptr = (uint32_t *)((u8 *)ctrl-hcor-or_usbcmd + USBMODE);
tmp = ehci_readl(reg_ptr);
tmp |= USBMODE_CM_HC;
 #if defined(CONFIG_EHCI_MMIO_BIG_ENDIAN)
@@ -187,7 +187,7 @@ static int ehci_reset(int index)
}
 
if (ehci_is_TDI())
-   ehci_set_usbmode(index);
+   ehci_set_usbmode(ehcic[index]);
 
 #ifdef CONFIG_USB_EHCI_TXFIFO_THRESH
cmd = ehci_readl(ehcic[index].hcor-or_txfilltuning);
diff --git a/drivers/usb/host/ehci-tegra.c b/drivers/usb/host/ehci-tegra.c
index 5060dd1..6054b2b 100644
--- a/drivers/usb/host/ehci-tegra.c
+++ b/drivers/usb/host/ehci-tegra.c
@@ -219,13 +219,12 @@ void ehci_powerup_fixup(struct ehci_ctrl *ctrl, uint32_t 
*status_reg,
  * This ehci_set_usbmode overrides the weak function ehci_set_usbmode
  * in ehci-hcd.c.
  */
-void ehci_set_usbmode(int index)
+void ehci_set_usbmode(struct ehci_ctrl *ctrl)
 {
-   struct fdt_usb *config;
+   struct fdt_usb *config = ctrl-priv;
struct usb_ctlr *usbctlr;
uint32_t tmp;
 
-   config = port[index];
usbctlr = config-reg;
 
tmp = ehci_readl(usbctlr-usb_mode);
diff --git a/drivers/usb/host/ehci.h b/drivers/usb/host/ehci.h
index a00c7e7..164b3cb 100644
--- a/drivers/usb/host/ehci.h
+++ b/drivers/usb/host/ehci.h
@@ -253,7 +253,7 @@ struct ehci_ctrl {
 
 /* Weak functions that drivers can override */
 int ehci_get_port_speed(struct ehci_ctrl *ctrl, uint32_t reg);
-void ehci_set_usbmode(int index);
+void ehci_set_usbmode(struct ehci_ctrl *ctrl);
 void ehci_powerup_fixup(struct ehci_ctrl *ctrl, uint32_t *status_reg,
uint32_t *reg);
 uint32_t *ehci_get_portsc_register(struct ehci_hcor *hcor, int port);
-- 
2.2.0.rc0.207.ga3a616c

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[U-Boot] [PATCH v2 03/80] dm: test: bus: Use a local variable to simplify code

[Simon Glass]

Adjust this test to avoid repeating the same code too often.

Signed-off-by: Simon Glass s...@chromium.org
---

Changes in v2: None

 test/dm/bus.c | 16 ++--
 1 file changed, 10 insertions(+), 6 deletions(-)

diff --git a/test/dm/bus.c b/test/dm/bus.c
index faffe6a..116a52d 100644
--- a/test/dm/bus.c
+++ b/test/dm/bus.c
@@ -273,20 +273,22 @@ DM_TEST(dm_test_bus_parent_data, DM_TESTF_SCAN_PDATA | 
DM_TESTF_SCAN_FDT);
 /* As above but the size is controlled by the uclass */
 static int dm_test_bus_parent_data_uclass(struct dm_test_state *dms)
 {
+   struct driver *drv;
struct udevice *bus;
int size;
int ret;
 
/* Set the driver size to 0 so that the uclass size is used */
ut_assertok(uclass_find_device(UCLASS_TEST_BUS, 0, bus));
-   size = bus-driver-per_child_auto_alloc_size;
+   drv = (struct driver *)bus-driver;
+   size = drv-per_child_auto_alloc_size;
bus-uclass-uc_drv-per_child_auto_alloc_size = size;
-   bus-driver-per_child_auto_alloc_size = 0;
+   drv-per_child_auto_alloc_size = 0;
ret = test_bus_parent_data(dms);
if (ret)
return ret;
bus-uclass-uc_drv-per_child_auto_alloc_size = 0;
-   bus-driver-per_child_auto_alloc_size = size;
+   drv-per_child_auto_alloc_size = size;
 
return 0;
 }
@@ -414,19 +416,21 @@ DM_TEST(dm_test_bus_parent_platdata, DM_TESTF_SCAN_PDATA 
| DM_TESTF_SCAN_FDT);
 static int dm_test_bus_parent_platdata_uclass(struct dm_test_state *dms)
 {
struct udevice *bus;
+   struct driver *drv;
int size;
int ret;
 
/* Set the driver size to 0 so that the uclass size is used */
ut_assertok(uclass_find_device(UCLASS_TEST_BUS, 0, bus));
-   size = bus-driver-per_child_platdata_auto_alloc_size;
+   drv = (struct driver *)bus-driver;
+   size = drv-per_child_platdata_auto_alloc_size;
bus-uclass-uc_drv-per_child_platdata_auto_alloc_size = size;
-   bus-driver-per_child_platdata_auto_alloc_size = 0;
+   drv-per_child_platdata_auto_alloc_size = 0;
ret = test_bus_parent_platdata(dms);
if (ret)
return ret;
bus-uclass-uc_drv-per_child_platdata_auto_alloc_size = 0;
-   bus-driver-per_child_platdata_auto_alloc_size = size;
+   drv-per_child_platdata_auto_alloc_size = size;
 
return 0;
 }
-- 
2.2.0.rc0.207.ga3a616c

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[U-Boot] [PATCH v2 04/80] dm: exynos: snow: Move the keyboard to I2C

[Simon Glass]

The snow keyboard on shipping devices is actually on I2C not SPI. Move the
label to indicate this.

Signed-off-by: Simon Glass s...@chromium.org
---

Changes in v2: None

 arch/arm/dts/exynos5250-snow.dts | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm/dts/exynos5250-snow.dts b/arch/arm/dts/exynos5250-snow.dts
index 7d8be69..d6777ee 100644
--- a/arch/arm/dts/exynos5250-snow.dts
+++ b/arch/arm/dts/exynos5250-snow.dts
@@ -40,7 +40,7 @@
};
 
i2c4: i2c@12ca {
-   cros-ec@1e {
+   cros_ec: cros-ec@1e {
reg = 0x1e;
compatible = google,cros-ec;
i2c-max-frequency = 10;
@@ -65,7 +65,7 @@
spi@131b {
spi-max-frequency = 100;
spi-deactivate-delay = 100;
-   cros_ec: cros-ec@0 {
+   cros-ec@0 {
reg = 0;
compatible = google,cros-ec;
spi-max-frequency = 500;
-- 
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[U-Boot] [PATCH v2 27/80] dm: usb: Move storage device scanning into its own function

[Simon Glass]

The usb_stor_scan() function is quite long, so split out the code that scans
each device into its own function. Also, rather than setting up the block
device list once at the start, set it up as each device is scanned. This
makes it possible to use this code from driver model.

Signed-off-by: Simon Glass s...@chromium.org
---

Changes in v2: None

 common/usb_storage.c | 97 
 1 file changed, 59 insertions(+), 38 deletions(-)

diff --git a/common/usb_storage.c b/common/usb_storage.c
index acea5ae..67494b7 100644
--- a/common/usb_storage.c
+++ b/common/usb_storage.c
@@ -33,6 +33,7 @@
 
 #include common.h
 #include command.h
+#include errno.h
 #include inttypes.h
 #include mapmem.h
 #include asm/byteorder.h
@@ -168,6 +169,60 @@ static unsigned int usb_get_max_lun(struct us_data *us)
return (len  0) ? *result : 0;
 }
 
+static int usb_stor_probe_device(struct usb_device *dev)
+{
+   if (dev == NULL)
+   return -ENOENT; /* no more devices available */
+
+   debug(\n\nProbing for storage\n);
+   if (usb_storage_probe(dev, 0, usb_stor[usb_max_devs])) {
+   /* OK, it's a storage device.  Iterate over its LUNs
+   * and populate `usb_dev_desc'.
+   */
+   int lun, max_lun, start = usb_max_devs;
+
+   max_lun = usb_get_max_lun(usb_stor[usb_max_devs]);
+   for (lun = 0;
+   lun = max_lun  usb_max_devs  USB_MAX_STOR_DEV;
+   lun++) {
+   struct block_dev_desc *blkdev;
+
+   blkdev = usb_dev_desc[usb_max_devs];
+   memset(blkdev, '\0', sizeof(block_dev_desc_t));
+   blkdev-if_type = IF_TYPE_USB;
+   blkdev-dev = usb_max_devs;
+   blkdev-part_type = PART_TYPE_UNKNOWN;
+   blkdev-target = 0xff;
+   blkdev-type = DEV_TYPE_UNKNOWN;
+   blkdev-block_read = usb_stor_read;
+   blkdev-block_write = usb_stor_write;
+   blkdev-lun = lun;
+   blkdev-priv = dev;
+
+   if (usb_stor_get_info(dev, usb_stor[start],
+ usb_dev_desc[usb_max_devs]) ==
+ 1) {
+   usb_max_devs++;
+   debug(%s: Found device %p\n, __func__, dev);
+   }
+   }
+   }
+
+   /* if storage device */
+   if (usb_max_devs == USB_MAX_STOR_DEV) {
+   printf(max USB Storage Device reached: %d stopping\n,
+  usb_max_devs);
+   return -ENOSPC;
+   }
+
+   return 0;
+}
+
+void usb_stor_reset(void)
+{
+   usb_max_devs = 0;
+}
+
 
/***
  * scan the usb and reports device info
  * to the user if mode = 1
@@ -176,54 +231,20 @@ static unsigned int usb_get_max_lun(struct us_data *us)
 int usb_stor_scan(int mode)
 {
unsigned char i;
-   struct usb_device *dev;
 
if (mode == 1)
printf(   scanning usb for storage devices... );
 
usb_disable_asynch(1); /* asynch transfer not allowed */
 
-   for (i = 0; i  USB_MAX_STOR_DEV; i++) {
-   memset(usb_dev_desc[i], 0, sizeof(block_dev_desc_t));
-   usb_dev_desc[i].if_type = IF_TYPE_USB;
-   usb_dev_desc[i].dev = i;
-   usb_dev_desc[i].part_type = PART_TYPE_UNKNOWN;
-   usb_dev_desc[i].target = 0xff;
-   usb_dev_desc[i].type = DEV_TYPE_UNKNOWN;
-   usb_dev_desc[i].block_read = usb_stor_read;
-   usb_dev_desc[i].block_write = usb_stor_write;
-   }
-
-   usb_max_devs = 0;
+   usb_stor_reset();
for (i = 0; i  USB_MAX_DEVICE; i++) {
+   struct usb_device *dev;
+
dev = usb_get_dev_index(i); /* get device */
debug(i=%d\n, i);
-   if (dev == NULL)
-   break; /* no more devices available */
-
-   if (usb_storage_probe(dev, 0, usb_stor[usb_max_devs])) {
-   /* OK, it's a storage device.  Iterate over its LUNs
-* and populate `usb_dev_desc'.
-*/
-   int lun, max_lun, start = usb_max_devs;
-
-   max_lun = usb_get_max_lun(usb_stor[usb_max_devs]);
-   for (lun = 0;
-lun = max_lun  usb_max_devs  USB_MAX_STOR_DEV;
-lun++) {
-   usb_dev_desc[usb_max_devs].lun = lun;
-   if (usb_stor_get_info(dev, usb_stor[start],
-   usb_dev_desc[usb_max_devs]) == 1) {
-

[U-Boot] [PATCH v2 43/80] dm: usb: Bind generic USB devices when there is no driver

[Simon Glass]

At present USB devices with no driver model driver cannot be seen in the
device list, and we fail to set them up correctly. This means they cannot
be used.

While having real drivers that support driver model for all USB devices
is the eventual goal, we are not there yet.

As a stop-gap, add a generic USB driver which is bound when we do not have
a real driver. This allows the device to be set up and shown on the bus.
It also allows ad-hoc code (such as usb_ether) to find these devices and
set them up.

Signed-off-by: Simon Glass s...@chromium.org
---

Changes in v2: None

 drivers/usb/host/usb-uclass.c | 18 +-
 include/dm/uclass-id.h|  1 +
 2 files changed, 18 insertions(+), 1 deletion(-)

diff --git a/drivers/usb/host/usb-uclass.c b/drivers/usb/host/usb-uclass.c
index a86e905..fa5f14e 100644
--- a/drivers/usb/host/usb-uclass.c
+++ b/drivers/usb/host/usb-uclass.c
@@ -384,7 +384,13 @@ static int usb_find_and_bind_driver(struct udevice *parent,
}
}
 
-   ret = -ENOENT;
+   /* Bind a generic driver so that the device can be used */
+   snprintf(name, sizeof(name), generic_bus_%x_dev_%x, bus_seq, devnum);
+   str = strdup(name);
+   if (!str)
+   return -ENOMEM;
+   ret = device_bind_driver(parent, usb_dev_generic_drv, str, devp);
+
 error:
debug(%s: No match found: %d\n, __func__, ret);
return ret;
@@ -592,3 +598,13 @@ UCLASS_DRIVER(usb) = {
.child_pre_probe = usb_child_pre_probe,
.per_child_platdata_auto_alloc_size = sizeof(struct usb_dev_platdata),
 };
+
+UCLASS_DRIVER(usb_dev_generic) = {
+   .id = UCLASS_USB_DEV_GENERIC,
+   .name   = usb_dev_generic,
+};
+
+U_BOOT_DRIVER(usb_dev_generic_drv) = {
+   .id = UCLASS_USB_DEV_GENERIC,
+   .name   = usb_dev_generic_drv,
+};
diff --git a/include/dm/uclass-id.h b/include/dm/uclass-id.h
index acec938..42a6f1f 100644
--- a/include/dm/uclass-id.h
+++ b/include/dm/uclass-id.h
@@ -41,6 +41,7 @@ enum uclass_id {
UCLASS_ETH, /* Ethernet device */
UCLASS_USB, /* USB bus */
UCLASS_USB_HUB, /* USB hub */
+   UCLASS_USB_DEV_GENERIC, /* USB generic device */
 
UCLASS_COUNT,
UCLASS_INVALID = -1,
-- 
2.2.0.rc0.207.ga3a616c

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[U-Boot] [PATCH v2 15/80] dm: usb: Drop the legacy USB init sequence

[Simon Glass]

This CONFIG is not used anywhere in U-Boot, so drop it.

Signed-off-by: Simon Glass s...@chromium.org
---

Changes in v2: None

 common/usb.c | 26 --
 1 file changed, 4 insertions(+), 22 deletions(-)

diff --git a/common/usb.c b/common/usb.c
index f87c6a5..330e6a2 100644
--- a/common/usb.c
+++ b/common/usb.c
@@ -899,26 +899,8 @@ int usb_new_device(struct usb_device *dev)
addr = dev-devnum;
dev-devnum = 0;
 
-#ifdef CONFIG_LEGACY_USB_INIT_SEQ
-   /* this is the old and known way of initializing devices, it is
-* different than what Windows and Linux are doing. Windows and Linux
-* both retrieve 64 bytes while reading the device descriptor
-* Several USB stick devices report ERR: CTL_TIMEOUT, caused by an
-* invalid header while reading 8 bytes as device descriptor. */
-   dev-descriptor.bMaxPacketSize0 = 8;/* Start off at 8 bytes  */
-   dev-maxpacketsize = PACKET_SIZE_8;
-   dev-epmaxpacketin[0] = 8;
-   dev-epmaxpacketout[0] = 8;
-
-   err = usb_get_descriptor(dev, USB_DT_DEVICE, 0, tmpbuf, 8);
-   if (err  8) {
-   printf(\n  USB device not responding,  \
-  giving up (status=%lX)\n, dev-status);
-   return 1;
-   }
-   memcpy(dev-descriptor, tmpbuf, 8);
-#else
-   /* This is a Windows scheme of initialization sequence, with double
+   /*
+* This is a Windows scheme of initialization sequence, with double
 * reset of the device (Linux uses the same sequence)
 * Some equipment is said to work only with such init sequence; this
 * patch is based on the work by Alan Stern:
@@ -929,7 +911,8 @@ int usb_new_device(struct usb_device *dev)
struct usb_device *parent = dev-parent;
unsigned short portstatus;
 
-   /* send 64-byte GET-DEVICE-DESCRIPTOR request.  Since the descriptor is
+   /*
+* send 64-byte GET-DEVICE-DESCRIPTOR request.  Since the descriptor is
 * only 18 bytes long, this will terminate with a short packet.  But if
 * the maxpacket size is 8 or 16 the device may be waiting to transmit
 * some more, or keeps on retransmitting the 8 byte header. */
@@ -972,7 +955,6 @@ int usb_new_device(struct usb_device *dev)
} else {
usb_reset_root_port();
}
-#endif
 
dev-epmaxpacketin[0] = dev-descriptor.bMaxPacketSize0;
dev-epmaxpacketout[0] = dev-descriptor.bMaxPacketSize0;
-- 
2.2.0.rc0.207.ga3a616c

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[U-Boot] [PATCH v2 22/80] dm: usb: Add driver model support for hubs

[Simon Glass]

Adjust the existing hub code to support driver model, and add a USB driver
for hubs.

Signed-off-by: Simon Glass s...@chromium.org
---

Changes in v2: None

 common/usb_hub.c   | 94 +++---
 include/dm/uclass-id.h |  1 +
 2 files changed, 91 insertions(+), 4 deletions(-)

diff --git a/common/usb_hub.c b/common/usb_hub.c
index cc22f4b..6933015 100644
--- a/common/usb_hub.c
+++ b/common/usb_hub.c
@@ -24,12 +24,16 @@
 
 #include common.h
 #include command.h
+#include dm.h
 #include errno.h
 #include asm/processor.h
 #include asm/unaligned.h
 #include linux/ctype.h
 #include asm/byteorder.h
 #include asm/unaligned.h
+#include dm/root.h
+
+DECLARE_GLOBAL_DATA_PTR;
 
 #include usb.h
 #ifdef CONFIG_4xx
@@ -38,6 +42,7 @@
 
 #define USB_BUFSIZ 512
 
+/* TODO(s...@chromium.org): Remove this when CONFIG_DM_USB is defined */
 static struct usb_hub_device hub_dev[USB_MAX_HUB];
 static int usb_hub_index;
 
@@ -148,7 +153,12 @@ int legacy_hub_port_reset(struct usb_device *dev, int port,
ALLOC_CACHE_ALIGN_BUFFER(struct usb_port_status, portsts, 1);
unsigned short portstatus, portchange;
 
-   debug(hub_port_reset: resetting port %d...\n, port);
+#ifdef CONFIG_DM_USB
+   debug(%s: resetting '%s' port %d...\n, __func__, dev-dev-name,
+ port + 1);
+#else
+   debug(%s: resetting port %d...\n, __func__, port + 1);
+#endif
for (tries = 0; tries  MAX_TRIES; tries++) {
 
usb_set_port_feature(dev, port + 1, USB_PORT_FEAT_RESET);
@@ -206,10 +216,17 @@ int legacy_hub_port_reset(struct usb_device *dev, int 
port,
return 0;
 }
 
+#ifdef CONFIG_DM_USB
+int hub_port_reset(struct udevice *dev, int port, unsigned short *portstat)
+{
+   struct usb_device *udev = dev_get_parentdata(dev);
+
+   return legacy_hub_port_reset(udev, port, portstat);
+}
+#endif
 
 int usb_hub_port_connect_change(struct usb_device *dev, int port)
 {
-   struct usb_device *usb;
ALLOC_CACHE_ALIGN_BUFFER(struct usb_port_status, portsts, 1);
unsigned short portstatus;
int ret, speed;
@@ -232,7 +249,8 @@ int usb_hub_port_connect_change(struct usb_device *dev, int 
port)
 
/* Disconnect any existing devices under this port */
if (((!(portstatus  USB_PORT_STAT_CONNECTION)) 
-(!(portstatus  USB_PORT_STAT_ENABLE))) || (dev-children[port])) {
+(!(portstatus  USB_PORT_STAT_ENABLE))) ||
+   usb_device_has_child_on_port(dev, port)) {
debug(usb_disconnect(hub-children[port]);\n);
/* Return now if nothing is connected */
if (!(portstatus  USB_PORT_STAT_CONNECTION))
@@ -264,6 +282,13 @@ int usb_hub_port_connect_change(struct usb_device *dev, 
int port)
break;
}
 
+#ifdef CONFIG_DM_USB
+   struct udevice *child;
+
+   ret = usb_scan_device(dev-dev, port + 1, speed, child);
+#else
+   struct usb_device *usb;
+
ret = usb_alloc_new_device(dev-controller, usb);
if (ret) {
printf(cannot create new device: ret=%d, ret);
@@ -280,6 +305,9 @@ int usb_hub_port_connect_change(struct usb_device *dev, int 
port)
/* Woops, disable the port */
usb_free_device(dev-controller);
dev-children[port] = NULL;
+   }
+#endif
+   if (ret  0) {
debug(hub: disabling port %d\n, port + 1);
usb_clear_port_feature(dev, port + 1, USB_PORT_FEAT_ENABLE);
}
@@ -427,7 +455,11 @@ static int usb_hub_configure(struct usb_device *dev)
int ret;
ulong start = get_timer(0);
 
+#ifdef CONFIG_DM_USB
+   debug(\n\nScanning '%s' port %d\n, dev-dev-name, i + 1);
+#else
debug(\n\nScanning port %d\n, i + 1);
+#endif
/*
 * Wait for (whichever finishes first)
 *  - A maximum of 10 seconds
@@ -477,7 +509,7 @@ static int usb_hub_configure(struct usb_device *dev)
 * them again. Works at least with mouse driver */
if (!(portstatus  USB_PORT_STAT_ENABLE) 
 (portstatus  USB_PORT_STAT_CONNECTION) 
-((dev-children[i]))) {
+usb_device_has_child_on_port(dev, i)) {
debug(already running port %i   \
  disabled by hub (EMI?),  \
  re-enabling...\n, i + 1);
@@ -558,3 +590,57 @@ int usb_hub_probe(struct usb_device *dev, int ifnum)
ret = usb_hub_configure(dev);
return ret;
 }
+
+#ifdef CONFIG_DM_USB
+int usb_hub_scan(struct udevice *hub)
+{
+   struct usb_device *udev = dev_get_parentdata(hub);
+
+   return usb_hub_configure(udev);
+}
+
+static int usb_hub_post_bind(struct udevice *dev)
+{
+   /* Scan the bus for devices */
+   return dm_scan_fdt_node(dev,