Re: [U-Boot] [PATCH 2/4] usb: dwc2-otg: redefine fifo-size for rk3288

[Ziyuan Xu]

hi simon,

On 2016年06月30日 23:23, Simon Glass wrote:

Hi Ziyuan,

On 30 June 2016 at 00:21, Ziyuan Xu  wrote:

Redefine RX FIFO size & TX FIFO size for rk3288.

Signed-off-by: Ziyuan Xu 
---

  drivers/usb/gadget/dwc2_udc_otg_regs.h | 6 ++
  1 file changed, 6 insertions(+)

diff --git a/drivers/usb/gadget/dwc2_udc_otg_regs.h 
b/drivers/usb/gadget/dwc2_udc_otg_regs.h
index 78ec90e..a0617c8 100644
--- a/drivers/usb/gadget/dwc2_udc_otg_regs.h
+++ b/drivers/usb/gadget/dwc2_udc_otg_regs.h
@@ -130,8 +130,14 @@ struct dwc2_usbotg_reg {
  #define HIGH_SPEED_CONTROL_PKT_SIZE64
  #define HIGH_SPEED_BULK_PKT_SIZE   512

+#ifdef CONFIG_ROCKCHIP_RK3288
+#define RX_FIFO_SIZE   (275*4)
+#define NPTX_FIFO_SIZE (16*4)
+#else
  #define RX_FIFO_SIZE   (1024*4)
  #define NPTX_FIFO_SIZE (1024*4)
+#endif

I cannot see where this is used. Can you explain? Also can you add a
reason for the change in your commit message?
Both RX_FIFO_SIZE and NPTX_FIFO_SIZE are used in 
dwc2_udc_otg.c::reconfig_usbd() for fifo configuration.

We need to redefine properly for rk3288 soc.



+
  #define PTX_FIFO_SIZE  (1536*1)

  #define DEPCTL_TXFNUM_0(0x0<<22)
--
1.9.1



Regards,
Simon






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Re: [U-Boot] [PATCH 3/4] rockchip: rk3288: add fastboot support[Involving remittance information, please pay attention to the safety of property]

[Ziyuan Xu]

On 2016年06月30日 23:23, Simon Glass wrote:

Hi Ziyuan,

On 30 June 2016 at 00:22, Ziyuan Xu  wrote:

Enable fastboot feature on rk3288.

This path doesn't support the fastboot flash function command entirely.
We will hit "cannot find partition" assertion without specified
partition environment. Define gpt partition layout in specified board
such as firefly-rk3288, then enjoy it!

Signed-off-by: Ziyuan Xu 
---

  arch/arm/mach-rockchip/board.c  | 20 
  include/configs/rk3288_common.h | 25 +
  2 files changed, 45 insertions(+)

diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index 816540e..9766ba0 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -52,6 +52,26 @@ void lowlevel_init(void)
  {
  }

+#if defined(CONFIG_USB_GADGET) && defined(CONFIG_USB_GADGET_DWC2_OTG)
+#include 
+#include 
+
+static struct dwc2_plat_otg_data rk3288_otg_data = {
+   .regs_phy   = 0xff77,
+   .regs_otg   = 0xff58,

Shouldn't these come from the device tree?

Done, fix in v2.



+};
+
+int board_usb_init(int index, enum usb_init_type init)
+{
+   return dwc2_udc_probe(_otg_data);
+}
+
+int board_usb_cleanup(int index, enum usb_init_type init)
+{
+   return 0;
+}
+#endif
+
  static int do_clock(cmd_tbl_t *cmdtp, int flag, int argc,
char * const argv[])
  {
diff --git a/include/configs/rk3288_common.h b/include/configs/rk3288_common.h
index 9d50d83..f8a6c98 100644
--- a/include/configs/rk3288_common.h
+++ b/include/configs/rk3288_common.h
@@ -80,6 +80,31 @@
  #define CONFIG_SPI
  #define CONFIG_SF_DEFAULT_SPEED 2000

+/* usb otg */
+#define CONFIG_USB_GADGET
+#define CONFIG_USB_GADGET_DUALSPEED
+#define CONFIG_USB_GADGET_DWC2_OTG
+#define CONFIG_RK3288_USB_PHY
+#define CONFIG_USB_GADGET_VBUS_DRAW0
+
+/* fastboot  */
+#define CONFIG_CMD_FASTBOOT
+#define CONFIG_USB_FUNCTION_FASTBOOT
+#define CONFIG_FASTBOOT_FLASH
+#define CONFIG_FASTBOOT_FLASH_MMC_DEV  1   /* eMMC */
+#define CONFIG_FASTBOOT_BUF_ADDR   (CONFIG_SYS_SDRAM_BASE \
+   + SDRAM_BANK_SIZE)

Can you add a comment as to why the buffer is placed here?

okay, fix in v2.



+#define CONFIG_FASTBOOT_BUF_SIZE   0x0800
+
+#define CONFIG_USB_GADGET_DOWNLOAD
+#define CONFIG_G_DNL_MANUFACTURER  "Rockchip"
+#define CONFIG_G_DNL_VENDOR_NUM0x2207
+#define CONFIG_G_DNL_PRODUCT_NUM   0x320a
+
+/* Enable gpt partition table */
+#define CONFIG_CMD_GPT
+#define CONFIG_EFI_PARTITION
+
  #ifndef CONFIG_SPL_BUILD
  #include 

--
1.9.1



Regards,
Simon






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Re: [U-Boot] [PATCH v2] powerpc: MPC8544DS: revert typo in I2C offset value

[Joe Hershberger]

On Wed, Jun 29, 2016 at 6:44 PM, York Sun  wrote:
> From: Benjamin Kamath 
>
> I2C offset was changed by commit 00f792e0 (added multibus support)
> from 0x3100 to 0x3000. This typo leads to error when reading SPD
> from DDR DIMMs.
>
> Signed-off-by: Benjamin Kamath 
> Signed-off-by: York Sun 

Reviewed-by: Joe Hershberger 
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Re: [U-Boot] [PATCH v2] net: usb: r8152: Add DM support

[Joe Hershberger]

On Wed, Jun 29, 2016 at 12:58 AM, Stefan Roese  wrote:
> Add support for driver model, so that CONFIG_DM_ETH can be defined and
> used with this driver.
>
> This patch also adds the read_rom_hwaddr() callback so that the ROM MAC
> address will be used to the DM part of this driver.
>
> Signed-off-by: Stefan Roese 
> Cc: Stephen Warren 
> Cc: Ted Chen 
> Reviewed-by: Simon Glass 
> Cc: Joe Hershberger 

Acked-by: Joe Hershberger 
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Re: [U-Boot] [PATCH] MMC: Do not write to mmc_uclass_priv if it was not allocated

[Matt Corallo]

Sorry, this was related to https://patchwork.ozlabs.org/patch/624614/,
not dragonboard, and yes, is the same issue that was addressed by the
patch you linked.

With this patch the MMC worked fine, but, indeed, as with dragonboard,
its better to assign mmc instead of removing this (this seems to be the
only place where mmc is actually used during boot for me, so maybe not?).

Matt

On 06/30/16 19:28, Simon Glass wrote:
> Hi Meteusz,
> 
> On 30 June 2016 at 12:18, Mateusz Kulikowski
>  wrote:
>> On 29.06.2016 05:27, Simon Glass wrote:
>>> Hi Matt,
>>>
>>> On 25 June 2016 at 14:57, Matt Corallo  wrote:
 Signed-off-by: Matt Corallo 
 ---
  drivers/mmc/mmc.c | 3 ++-
  1 file changed, 2 insertions(+), 1 deletion(-)

 diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c
 index aabfc71..eba20f0 100644
 --- a/drivers/mmc/mmc.c
 +++ b/drivers/mmc/mmc.c
 @@ -1734,7 +1734,8 @@ int mmc_init(struct mmc *mmc)
  #ifdef CONFIG_DM_MMC
 struct mmc_uclass_priv *upriv = dev_get_uclass_priv(mmc->dev);

 -   upriv->mmc = mmc;
 +   if (upriv)
 +   upriv->mmc = mmc;
  #endif
 if (mmc->has_init)
 return 0;
 --
 2.1.4
>>>
>>> Can you please add a commit message explaining why this is needed and
>>> what it fixes?  How can mmc_init() be called before the MMC device is
>>> there? Is this related to this patch?
>>>
>>> http://patchwork.ozlabs.org/patch/640735/
>>
>> It's related in a way that it fixed crash of dragonboard before I submitted 
>> my patch :)
>>
>> Not sure if it meant to fix dragonboard or some other board.
>>
>> Although - imho - it's nice to make check like that.. or at least some kind 
>> of assert.
> 
> An assert() would be fine with me.
> 
> Regards,
> Simon
> 
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Re: [U-Boot] [PATCH 3/4] rockchip: rk3288: add fastboot support

[Steve Rae]

Hi Ziyuan,

On Thu, Jun 30, 2016 at 8:23 AM, Simon Glass  wrote:
> Hi Ziyuan,
>
> On 30 June 2016 at 00:22, Ziyuan Xu  wrote:
>> Enable fastboot feature on rk3288.
>>
>> This path doesn't support the fastboot flash function command entirely.
>> We will hit "cannot find partition" assertion without specified
>> partition environment. Define gpt partition layout in specified board
>> such as firefly-rk3288, then enjoy it!

s/path/patch/
Are you trying to resolve this in this patch or in a subsequent patch?
Thanks, Steve

>>
>> Signed-off-by: Ziyuan Xu 
>> ---
>>
>>  arch/arm/mach-rockchip/board.c  | 20 
>>  include/configs/rk3288_common.h | 25 +
>>  2 files changed, 45 insertions(+)
>>
>> diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
>> index 816540e..9766ba0 100644
>> --- a/arch/arm/mach-rockchip/board.c
>> +++ b/arch/arm/mach-rockchip/board.c
>> @@ -52,6 +52,26 @@ void lowlevel_init(void)
>>  {
>>  }
>>
>> +#if defined(CONFIG_USB_GADGET) && defined(CONFIG_USB_GADGET_DWC2_OTG)
>> +#include 
>> +#include 
>> +
>> +static struct dwc2_plat_otg_data rk3288_otg_data = {
>> +   .regs_phy   = 0xff77,
>> +   .regs_otg   = 0xff58,
>
> Shouldn't these come from the device tree?
>
>> +};
>> +
>> +int board_usb_init(int index, enum usb_init_type init)
>> +{
>> +   return dwc2_udc_probe(_otg_data);
>> +}
>> +
>> +int board_usb_cleanup(int index, enum usb_init_type init)
>> +{
>> +   return 0;
>> +}
>> +#endif
>> +
>>  static int do_clock(cmd_tbl_t *cmdtp, int flag, int argc,
>>char * const argv[])
>>  {
>> diff --git a/include/configs/rk3288_common.h 
>> b/include/configs/rk3288_common.h
>> index 9d50d83..f8a6c98 100644
>> --- a/include/configs/rk3288_common.h
>> +++ b/include/configs/rk3288_common.h
>> @@ -80,6 +80,31 @@
>>  #define CONFIG_SPI
>>  #define CONFIG_SF_DEFAULT_SPEED 2000
>>
>> +/* usb otg */
>> +#define CONFIG_USB_GADGET
>> +#define CONFIG_USB_GADGET_DUALSPEED
>> +#define CONFIG_USB_GADGET_DWC2_OTG
>> +#define CONFIG_RK3288_USB_PHY
>> +#define CONFIG_USB_GADGET_VBUS_DRAW0
>> +
>> +/* fastboot  */
>> +#define CONFIG_CMD_FASTBOOT
>> +#define CONFIG_USB_FUNCTION_FASTBOOT
>> +#define CONFIG_FASTBOOT_FLASH
>> +#define CONFIG_FASTBOOT_FLASH_MMC_DEV  1   /* eMMC */
>> +#define CONFIG_FASTBOOT_BUF_ADDR   (CONFIG_SYS_SDRAM_BASE \
>> +   + SDRAM_BANK_SIZE)
>
> Can you add a comment as to why the buffer is placed here?
>
>> +#define CONFIG_FASTBOOT_BUF_SIZE   0x0800
>> +
>> +#define CONFIG_USB_GADGET_DOWNLOAD
>> +#define CONFIG_G_DNL_MANUFACTURER  "Rockchip"
>> +#define CONFIG_G_DNL_VENDOR_NUM0x2207
>> +#define CONFIG_G_DNL_PRODUCT_NUM   0x320a
>> +
>> +/* Enable gpt partition table */
>> +#define CONFIG_CMD_GPT
>> +#define CONFIG_EFI_PARTITION
>> +
>>  #ifndef CONFIG_SPL_BUILD
>>  #include 
>>
>> --
>> 1.9.1
>>
>>
>
> Regards,
> Simon
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Re: [U-Boot] [PATCH] SPL: sunxi: don't force .BSS into DRAM

[Marek Vasut]

On 06/30/2016 07:40 PM, Peter Korsgaard wrote:
>> "Andre" == Andre Przywara  writes:
> 
> Hi,
> 
>  > I really don't know. This simple bug has cost me at least two hours
>  > yesterday, since it was the rather innocent access to a variable that
>  > caused the issue. And if it wouldn't have been for Siarhei to point me
>  > in the right direction I'd have spend even more time to find a fix.
> 
> Agreed. The toolchain will complain loudly about an overflow of SRAM
> space, but not about BSS access before DRAM is available.
> 
I see two problems:
- this fixes sunxi and possibly leaves other platforms unfixed
- when the spl on sunxi grows some more, the bss won't fit and you'll
  have a problem again, except much bigger this time

I'd rather have this fixed on tiny-printf level with a bit of
documentation on why that's done the way it's done.

-- 
Best regards,
Marek Vasut
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Re: [U-Boot] Bug in cbfs

[Simon Glass]

+Bin

Hi,

It's a good idea to cc people who have touched the code.

I believe the implementation is out of date, so may well be incorrect.
Please send a patch if you like.

Regards,
Simon

On 26 June 2016 at 22:35, Yaroslav K.  wrote:
> Hello.
>
> Current implementation of cbfs prints incorrect file names. In the
> file fs/cbfs/cbfs.c
> there are lines
>
> swap_file_header(, fileHeader);
> if (header.offset < sizeof(const struct cbfs_cachenode *) ||
> header.offset > header.len) {
> file_cbfs_result = CBFS_BAD_FILE;
> return -1;
> }
> newNode->next = NULL;
> newNode->type = header.type;
> newNode->data = start + header.offset;
> newNode->data_length = header.len;
> name_len = header.offset - sizeof(struct cbfs_cachenode *);
> newNode->name = (char *)fileHeader +
> sizeof(struct cbfs_cachenode *);
> newNode->name_length = name_len;
> newNode->checksum = header.checksum;
>
> Shouldn't sizeof(const struct cbfs_cachenode *) and sizeof(struct
> cbfs_cachenode *)
> be replaced with sizeof(struct cbfs_fileheader)?
>
> --
> Yaroslav
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Re: [U-Boot] [PATCH 2/2] dm: mmc: dwmmc: use the callback functions as static

[Simon Glass]

Hi Jaehoon,

On 28 June 2016 at 20:47, Jaehoon Chung  wrote:
> Hi Simon,
>
> On 06/29/2016 12:28 PM, Simon Glass wrote:
>> Hi Jaehoon,
>>
>> On 27 June 2016 at 23:52, Jaehoon Chung  wrote:
>>> There are no places to call these functions.
>>> It should be used the callback function.
>>> Then it can be used as static functions.
>>>
>>> Signed-off-by: Jaehoon Chung 
>>> ---
>>>  drivers/mmc/dw_mmc.c | 4 ++--
>>>  include/dwmmc.h  | 3 ---
>>>  2 files changed, 2 insertions(+), 5 deletions(-)
>>>
>>> diff --git a/drivers/mmc/dw_mmc.c b/drivers/mmc/dw_mmc.c
>>> index 3411f95..f83a6bc 100644
>>> --- a/drivers/mmc/dw_mmc.c
>>> +++ b/drivers/mmc/dw_mmc.c
>>> @@ -182,7 +182,7 @@ static int dwmci_set_transfer_mode(struct dwmci_host 
>>> *host,
>>>  }
>>>
>>>  #ifdef CONFIG_DM_MMC_OPS
>>> -int dwmci_send_cmd(struct udevice *dev, struct mmc_cmd *cmd,
>>
>>>From what I can see this is already static. Which commit are you basing off?
>
> I'm checking with your 'blk-working' branch. I'm not sure what's correct.
>
> commit dee390a1250c17a4e71e359d6e461319a7cdea54
> Author: Simon Glass 
> Date:   Sat Jun 11 19:01:49 2016 -0600
>
> dm: blk: Enable CONFIG_BLK if DM_MMC is enabled
>
> If i need to work with other branch, let me know,plz.
> I have tested the DM with dw_mmc_exynos.c. (It's working fine.)
>
> I will send the patch-set for exynos dwmmc and sdhci controller.
> So i need to know which repository and branch are correct. :)
>
> Then it's helpful to me for working dm. I think that i can help you for 
> checking on mmc side with DM.

OK I see, thanks.

Reviewed-by: Simon Glass 

[snip

Regards,
Simon
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Re: [U-Boot] [PATCH] MMC: Do not write to mmc_uclass_priv if it was not allocated

[Simon Glass]

Hi Meteusz,

On 30 June 2016 at 12:18, Mateusz Kulikowski
 wrote:
> On 29.06.2016 05:27, Simon Glass wrote:
>> Hi Matt,
>>
>> On 25 June 2016 at 14:57, Matt Corallo  wrote:
>>> Signed-off-by: Matt Corallo 
>>> ---
>>>  drivers/mmc/mmc.c | 3 ++-
>>>  1 file changed, 2 insertions(+), 1 deletion(-)
>>>
>>> diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c
>>> index aabfc71..eba20f0 100644
>>> --- a/drivers/mmc/mmc.c
>>> +++ b/drivers/mmc/mmc.c
>>> @@ -1734,7 +1734,8 @@ int mmc_init(struct mmc *mmc)
>>>  #ifdef CONFIG_DM_MMC
>>> struct mmc_uclass_priv *upriv = dev_get_uclass_priv(mmc->dev);
>>>
>>> -   upriv->mmc = mmc;
>>> +   if (upriv)
>>> +   upriv->mmc = mmc;
>>>  #endif
>>> if (mmc->has_init)
>>> return 0;
>>> --
>>> 2.1.4
>>
>> Can you please add a commit message explaining why this is needed and
>> what it fixes?  How can mmc_init() be called before the MMC device is
>> there? Is this related to this patch?
>>
>> http://patchwork.ozlabs.org/patch/640735/
>
> It's related in a way that it fixed crash of dragonboard before I submitted 
> my patch :)
>
> Not sure if it meant to fix dragonboard or some other board.
>
> Although - imho - it's nice to make check like that.. or at least some kind 
> of assert.

An assert() would be fine with me.

Regards,
Simon
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Re: [U-Boot] [PATCH] MMC: Do not write to mmc_uclass_priv if it was not allocated

[Mateusz Kulikowski]

On 29.06.2016 05:27, Simon Glass wrote:
> Hi Matt,
> 
> On 25 June 2016 at 14:57, Matt Corallo  wrote:
>> Signed-off-by: Matt Corallo 
>> ---
>>  drivers/mmc/mmc.c | 3 ++-
>>  1 file changed, 2 insertions(+), 1 deletion(-)
>>
>> diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c
>> index aabfc71..eba20f0 100644
>> --- a/drivers/mmc/mmc.c
>> +++ b/drivers/mmc/mmc.c
>> @@ -1734,7 +1734,8 @@ int mmc_init(struct mmc *mmc)
>>  #ifdef CONFIG_DM_MMC
>> struct mmc_uclass_priv *upriv = dev_get_uclass_priv(mmc->dev);
>>
>> -   upriv->mmc = mmc;
>> +   if (upriv)
>> +   upriv->mmc = mmc;
>>  #endif
>> if (mmc->has_init)
>> return 0;
>> --
>> 2.1.4
> 
> Can you please add a commit message explaining why this is needed and
> what it fixes?  How can mmc_init() be called before the MMC device is
> there? Is this related to this patch?
> 
> http://patchwork.ozlabs.org/patch/640735/

It's related in a way that it fixed crash of dragonboard before I submitted my 
patch :)

Not sure if it meant to fix dragonboard or some other board.

Although - imho - it's nice to make check like that.. or at least some kind of 
assert. 


Mateusz


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[U-Boot] [PATCH 00/14] mkimage: Tidy up error handling

[Simon Glass]

There are a few problems when mkimage is provided with invalid arguments.
In one case it crashes. When an invalid image type it is provided it lists
the valid types, but this is not implemented for compression, architecture
or OS.

This series tidies this up a little, to make mkimage more friendly.


Simon Glass (14):
  mkimage: Honour the default image type with auto-fit
  mkimage: Explain the auto-fit imagefile special case
  mkimage: Require a data file when auto-fit is used
  mkimage: Drop premature setting of params.fit_image_type
  mkimage: Drop blank line before main()
  image: Correct auto-fit architecture property name
  image: Convert the IH_... values to enums
  image: Create a table of information for each category
  image: Add a name for invalid types
  image: Add functions to obtain category information
  mkimage: Allow display of a list of any image header category
  mkimage: Use generic code for showing an 'image type' error
  mkimage: Show item lists for all categories
  tools: Allow building with debug enabled

 Kconfig   |   9 +++
 Makefile  |   3 +-
 common/image.c|  87 -
 include/image.h   | 230 ++
 tools/fit_image.c |   3 +-
 tools/mkimage.c   |  69 +---
 6 files changed, 280 insertions(+), 121 deletions(-)

-- 
2.8.0.rc3.226.g39d4020

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Re: [U-Boot] MPC8347 Initial Boot problems

[Gardner, Austin (GE Transportation)]

Still hoping for a response. I have not had any luck trying to get this up and 
running. Any advice would be very helpful.

Thanks,
Austin

From: Gardner, Austin (GE Transportation)
Sent: Friday, June 17, 2016 8:57 AM
To: 'u-boot@lists.denx.de' 
Subject: MPC8347 Initial Boot problems

Hello,

I am currently trying to get my MPC8347EA board up and running by porting the 
MPC8349EMDS configuration that is currently available. This is my first time 
working with uboot, so naturally I am having some issues. My issue is that I 
can't get any response from the board after we flash it with the binary image. 
I don't know if I am flashing it in the wrong location, or if it is because the 
configurations in the header files that I changed are wrong. I have tried 
flashing it in various locations such as start of memory, CONFIG_SYS_TEXT_BASE 
location (changed to our needs of 0xFF800), etc. I also have changed a lot 
of the memory configurations from the MPC8349EMDS such as the timing configs, 
ddrlawbar and ddrlawar, sdram configs and modes, etc.

After getting the uboot to actually launch to a command line, the next step 
will be to have it launch to our QNX os.

Any help with this would be greatly appreciated. I apologize if I use the wrong 
terminology at any point, I am still very new to this.

Thanks,
Austin
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Re: [U-Boot] [PATCH] armv8: Enable CPUECTLR.SMPEN for data coherency

[Mark Rutland]

On Thu, Jun 30, 2016 at 04:51:48PM +0800, Gong Qianyu wrote:
> From: Mingkai Hu 
> 
> Data coherency is enabled only when the CPUECTLR.SMPEN bit is
> set. The SMPEN bit should be set before enabling the data cache.
> If not enabled, the cache is not coherent with other cores and
> data corruption could occur.
> 
> Signed-off-by: Mingkai Hu 
> Signed-off-by: Gong Qianyu 
> 
> diff --git a/arch/arm/cpu/armv8/start.S b/arch/arm/cpu/armv8/start.S
> index 670e323..735dd67 100644
> --- a/arch/arm/cpu/armv8/start.S
> +++ b/arch/arm/cpu/armv8/start.S
> @@ -81,6 +81,11 @@ reset:
>   msr cpacr_el1, x0   /* Enable FP/SIMD */
>  0:
>  
> + /* Enalbe SMPEN bit */
> + mrs x0, S3_1_c15_c2_1   /* cpuactlr_el1 */
> + orr x0, x0, #0x40
> + msr S3_1_c15_c2_1, x0

Please note that this register is IMPLEMENTATION DEFINED, and not
architectural, even though it happens to be common among ARM Ltd
implementations.

This is also not something that one can usually set on the Non-secure
side, and I'd expect Secure FW such as the ARM Trusted Firmware to
handle this.

If this is necessary within U-Boot, it should be guarded such that it
only runs on the relevant CPUs.

Thanks,
Mark.
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Re: [U-Boot] [PATCH] SPL: sunxi: don't force .BSS into DRAM

[Peter Korsgaard]

> "Andre" == Andre Przywara  writes:

Hi,

 > I really don't know. This simple bug has cost me at least two hours
 > yesterday, since it was the rather innocent access to a variable that
 > caused the issue. And if it wouldn't have been for Siarhei to point me
 > in the right direction I'd have spend even more time to find a fix.

Agreed. The toolchain will complain loudly about an overflow of SRAM
space, but not about BSS access before DRAM is available.

-- 
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Re: [U-Boot] [PATCH] armv8: Enable CPUECTLR.SMPEN for data coherency

[york sun]

On 06/30/2016 02:03 AM, Gong Qianyu wrote:
> From: Mingkai Hu 
>
> Data coherency is enabled only when the CPUECTLR.SMPEN bit is
> set. The SMPEN bit should be set before enabling the data cache.
> If not enabled, the cache is not coherent with other cores and
> data corruption could occur.
>
> Signed-off-by: Mingkai Hu 
> Signed-off-by: Gong Qianyu 
>
> diff --git a/arch/arm/cpu/armv8/start.S b/arch/arm/cpu/armv8/start.S
> index 670e323..735dd67 100644
> --- a/arch/arm/cpu/armv8/start.S
> +++ b/arch/arm/cpu/armv8/start.S
> @@ -81,6 +81,11 @@ reset:
>   msr cpacr_el1, x0   /* Enable FP/SIMD */
>   0:
>
> + /* Enalbe SMPEN bit */
> + mrs x0, S3_1_c15_c2_1   /* cpuactlr_el1 */
> + orr x0, x0, #0x40
> + msr S3_1_c15_c2_1, x0
> +
>   /* Apply ARM core specific erratas */
>   bl  apply_core_errata
>
>

Qianyu,

I wonder what impact this patch has. Did you find it effective on A53 
core? According to ARM documents, A57 and A72 seem don't care this bit. 
Quote

"
Note

 Any processor instruction cache and TLB maintenance operations can 
execute the request, regardless of the value of the SMPEN bit.
 This bit has no impact on data cache maintenance operations.
 In the Cortex-A57 processor, the L1 data cache and L2 cache are 
always coherent, for shared or non-shared data, regardless of the value 
of the SMPEN bit.
"

York
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Re: [U-Boot] Problem loading boot script from ext4 mmc on sunxi H3

[Robert Nelson]

On Wed, Jun 29, 2016 at 5:30 AM, Michal Suchanek  wrote:
> Hello,
>
> On 29 June 2016 at 10:45, Karsten Merker  wrote:
>> On Wed, Jun 29, 2016 at 09:30:33AM +0200, Michal Suchanek wrote:
>>
>>> I tried loading system with recent u-boot but it does not work.
>>>
>>> Trying some ext4ls shows there is some problem accessing the filesystem.
>>>
>>> Not sure if this should be attributed to the ext driver or to the mmc
>>> driver or something else entirely.
>>
>> I haven't tested that myself, but I have seen reports on other
>> platforms that the u-boot ext4 driver has problems with ext4
>> filesystems which use the "flex_bg" filesystem feature, as that
>> causes certain changes to the on-disk layout compared to ext4
>> without this feature.  From what people have reported, it appears
>> that "flex_bg" is enabled by default on ext4 filesystems created
>> with a recent mkfs.ext4 version.
>>
>
> Reformatting without flex_bg does not seem to have any effect.
>
> However, ls seems to give some random stuff for directories other than
> / so some similar remapping feature could cause this.

it's csum/64bit, disable it:

mkfs.ext4 -O ^metadata_csum,^64bit

Regards,

-- 
Robert Nelson
https://rcn-ee.com/
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[U-Boot] [PATCH 12/14] mkimage: Use generic code for showing an 'image type' error

[Simon Glass]

The existing error code only displays image types which are claimed by a
particular U_BOOT_IMAGE_TYPE() driver. But this does not seem correct. The
mkimage tool should support all image types, so it makes sense to allow
creation of images of any type with the tool.

When an incorrect image type is provided, use generic code to display the
error.

Signed-off-by: Simon Glass 
---

 tools/mkimage.c | 45 ++---
 1 file changed, 2 insertions(+), 43 deletions(-)

diff --git a/tools/mkimage.c b/tools/mkimage.c
index d375c2a..3cdbb2c 100644
--- a/tools/mkimage.c
+++ b/tools/mkimage.c
@@ -37,7 +37,7 @@ static int h_compare_category_name(const void *vtype1, const 
void *vtype2)
return strcmp(name1, name2);
 }
 
-int show_valid_options(enum ih_category category)
+static int show_valid_options(enum ih_category category)
 {
int *order;
int count;
@@ -68,47 +68,6 @@ int show_valid_options(enum ih_category category)
return 0;
 }
 
-static int h_compare_image_name(const void *vtype1, const void *vtype2)
-{
-   const int *type1 = vtype1;
-   const int *type2 = vtype2;
-   const char *name1 = genimg_get_type_short_name(*type1);
-   const char *name2 = genimg_get_type_short_name(*type2);
-
-   return strcmp(name1, name2);
-}
-
-/* Show all image types supported by mkimage */
-static void show_image_types(void)
-{
-   struct image_type_params *tparams;
-   int order[IH_TYPE_COUNT];
-   int count;
-   int type;
-   int i;
-
-   /* Sort the names in order of short name for easier reading */
-   memset(order, '\0', sizeof(order));
-   for (count = 0, type = 0; type < IH_TYPE_COUNT; type++) {
-   tparams = imagetool_get_type(type);
-   if (tparams)
-   order[count++] = type;
-   }
-   qsort(order, count, sizeof(int), h_compare_image_name);
-
-   fprintf(stderr, "\nInvalid image type. Supported image types:\n");
-   for (i = 0; i < count; i++) {
-   type = order[i];
-   tparams = imagetool_get_type(type);
-   if (tparams) {
-   fprintf(stderr, "\t%-15s  %s\n",
-   genimg_get_type_short_name(type),
-   genimg_get_type_name(type));
-   }
-   }
-   fprintf(stderr, "\n");
-}
-
 static void usage(const char *msg)
 {
fprintf(stderr, "Error: %s\n", msg);
@@ -286,7 +245,7 @@ static void process_args(int argc, char **argv)
case 'T':
type = genimg_get_type_id(optarg);
if (type < 0) {
-   show_image_types();
+   show_valid_options(IH_TYPE);
usage("Invalid image type");
}
break;
-- 
2.8.0.rc3.226.g39d4020

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[U-Boot] [PATCH 11/14] mkimage: Allow display of a list of any image header category

[Simon Glass]

Add a generic function which can display a list of items in any category.
This will allow displaying of images for the -A, -C, -O and -T flags. At
present only -T is supported.

Signed-off-by: Simon Glass 
---

 tools/mkimage.c | 43 +++
 1 file changed, 43 insertions(+)

diff --git a/tools/mkimage.c b/tools/mkimage.c
index 920d3be..d375c2a 100644
--- a/tools/mkimage.c
+++ b/tools/mkimage.c
@@ -25,6 +25,49 @@ static struct image_tool_params params = {
.imagename2 = "",
 };
 
+static enum ih_category cur_category;
+
+static int h_compare_category_name(const void *vtype1, const void *vtype2)
+{
+   const int *type1 = vtype1;
+   const int *type2 = vtype2;
+   const char *name1 = genimg_get_cat_short_name(cur_category, *type1);
+   const char *name2 = genimg_get_cat_short_name(cur_category, *type2);
+
+   return strcmp(name1, name2);
+}
+
+int show_valid_options(enum ih_category category)
+{
+   int *order;
+   int count;
+   int item;
+   int i;
+
+   count = genimg_get_cat_count(category);
+   order = calloc(count, sizeof(*order));
+   if (!order)
+   return -ENOMEM;
+
+   /* Sort the names in order of short name for easier reading */
+   for (item = 0; item < count; item++)
+   order[item] = item;
+   cur_category = category;
+   qsort(order, count, sizeof(int), h_compare_category_name);
+
+   fprintf(stderr, "\nInvalid %s, supported are:\n",
+   genimg_get_cat_desc(category));
+   for (i = 0; i < count; i++) {
+   item = order[i];
+   fprintf(stderr, "\t%-15s  %s\n",
+   genimg_get_cat_short_name(category, item),
+   genimg_get_cat_name(category, item));
+   }
+   fprintf(stderr, "\n");
+
+   return 0;
+}
+
 static int h_compare_image_name(const void *vtype1, const void *vtype2)
 {
const int *type1 = vtype1;
-- 
2.8.0.rc3.226.g39d4020

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[U-Boot] [PATCH 14/14] tools: Allow building with debug enabled

[Simon Glass]

Sometimes it is useful to build tools with debugging information included so
that line-number information is available when run under gdb. Add a Kconfig
option to support this.

Signed-off-by: Simon Glass 
---

 Kconfig  | 9 +
 Makefile | 3 ++-
 2 files changed, 11 insertions(+), 1 deletion(-)

diff --git a/Kconfig b/Kconfig
index 3ceff25..c06be59 100644
--- a/Kconfig
+++ b/Kconfig
@@ -114,6 +114,15 @@ if EXPERT
  Warning:
  When disabling this, please check if malloc calls, maybe
  should be replaced by calloc - if one expects zeroed memory.
+
+config TOOLS_DEBUG
+   bool "Enable debug information for tools"
+   help
+ Enable generation of debug information for tools such as mkimage.
+ This can be used for debugging purposes. With debug information
+ it is possible to set breakpoints on particular lines, single-step
+ debug through the source code, etc.
+
 endif
 endmenu# General setup
 
diff --git a/Makefile b/Makefile
index 0c47bb6..e8e2bb2 100644
--- a/Makefile
+++ b/Makefile
@@ -256,7 +256,8 @@ CONFIG_SHELL := $(shell if [ -x "$$BASH" ]; then echo 
$$BASH; \
 
 HOSTCC   = cc
 HOSTCXX  = c++
-HOSTCFLAGS   = -Wall -Wstrict-prototypes -O2 -fomit-frame-pointer
+HOSTCFLAGS   = -Wall -Wstrict-prototypes -O2 -fomit-frame-pointer \
+   $(if $(CONFIG_TOOLS_DEBUG),-g)
 HOSTCXXFLAGS = -O2
 
 ifeq ($(HOSTOS),cygwin)
-- 
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[U-Boot] [PATCH 03/14] mkimage: Require a data file when auto-fit is used

[Simon Glass]

When auto-fit is used, it is not valid to create a FIT without an image
file. Add a check for this to avoid a very confusing error message later
("Can't open (null): Bad address").

Signed-off-by: Simon Glass 
---

 tools/mkimage.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/tools/mkimage.c b/tools/mkimage.c
index 66d29ab..a36c031 100644
--- a/tools/mkimage.c
+++ b/tools/mkimage.c
@@ -276,6 +276,8 @@ static void process_args(int argc, char **argv)
/* For auto_its, datafile is always 'auto' */
if (!params.auto_its)
params.datafile = datafile;
+   else if (!params.datafile)
+   usage("Missing data file for auto-FIT (use -d)");
} else if (type != IH_TYPE_INVALID) {
params.type = type;
}
-- 
2.8.0.rc3.226.g39d4020

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[U-Boot] [PATCH 07/14] image: Convert the IH_... values to enums

[Simon Glass]

We need to know the number of values of each category (architecture,
compression, OS and image type). To make this value easier to maintain,
convert all values to enums. The count is then automatic.

Signed-off-by: Simon Glass 
---

 include/image.h | 187 ++--
 1 file changed, 101 insertions(+), 86 deletions(-)

diff --git a/include/image.h b/include/image.h
index d788c26..7717b3d 100644
--- a/include/image.h
+++ b/include/image.h
@@ -126,59 +126,67 @@ struct lmb;
 /*
  * Operating System Codes
  */
-#define IH_OS_INVALID  0   /* Invalid OS   */
-#define IH_OS_OPENBSD  1   /* OpenBSD  */
-#define IH_OS_NETBSD   2   /* NetBSD   */
-#define IH_OS_FREEBSD  3   /* FreeBSD  */
-#define IH_OS_4_4BSD   4   /* 4.4BSD   */
-#define IH_OS_LINUX5   /* Linux*/
-#define IH_OS_SVR4 6   /* SVR4 */
-#define IH_OS_ESIX 7   /* Esix */
-#define IH_OS_SOLARIS  8   /* Solaris  */
-#define IH_OS_IRIX 9   /* Irix */
-#define IH_OS_SCO  10  /* SCO  */
-#define IH_OS_DELL 11  /* Dell */
-#define IH_OS_NCR  12  /* NCR  */
-#define IH_OS_LYNXOS   13  /* LynxOS   */
-#define IH_OS_VXWORKS  14  /* VxWorks  */
-#define IH_OS_PSOS 15  /* pSOS */
-#define IH_OS_QNX  16  /* QNX  */
-#define IH_OS_U_BOOT   17  /* Firmware */
-#define IH_OS_RTEMS18  /* RTEMS*/
-#define IH_OS_ARTOS19  /* ARTOS*/
-#define IH_OS_UNITY20  /* Unity OS */
-#define IH_OS_INTEGRITY21  /* INTEGRITY*/
-#define IH_OS_OSE  22  /* OSE  */
-#define IH_OS_PLAN923  /* Plan 9   */
-#define IH_OS_OPENRTOS 24  /* OpenRTOS */
+enum {
+   IH_OS_INVALID   = 0,/* Invalid OS   */
+   IH_OS_OPENBSD,  /* OpenBSD  */
+   IH_OS_NETBSD,   /* NetBSD   */
+   IH_OS_FREEBSD,  /* FreeBSD  */
+   IH_OS_4_4BSD,   /* 4.4BSD   */
+   IH_OS_LINUX,/* Linux*/
+   IH_OS_SVR4, /* SVR4 */
+   IH_OS_ESIX, /* Esix */
+   IH_OS_SOLARIS,  /* Solaris  */
+   IH_OS_IRIX, /* Irix */
+   IH_OS_SCO,  /* SCO  */
+   IH_OS_DELL, /* Dell */
+   IH_OS_NCR,  /* NCR  */
+   IH_OS_LYNXOS,   /* LynxOS   */
+   IH_OS_VXWORKS,  /* VxWorks  */
+   IH_OS_PSOS, /* pSOS */
+   IH_OS_QNX,  /* QNX  */
+   IH_OS_U_BOOT,   /* Firmware */
+   IH_OS_RTEMS,/* RTEMS*/
+   IH_OS_ARTOS,/* ARTOS*/
+   IH_OS_UNITY,/* Unity OS */
+   IH_OS_INTEGRITY,/* INTEGRITY*/
+   IH_OS_OSE,  /* OSE  */
+   IH_OS_PLAN9,/* Plan 9   */
+   IH_OS_OPENRTOS, /* OpenRTOS */
+
+   IH_OS_COUNT,
+};
 
 /*
  * CPU Architecture Codes (supported by Linux)
  */
-#define IH_ARCH_INVALID0   /* Invalid CPU  */
-#define IH_ARCH_ALPHA  1   /* Alpha*/
-#define IH_ARCH_ARM2   /* ARM  */
-#define IH_ARCH_I386   3   /* Intel x86*/
-#define IH_ARCH_IA64   4   /* IA64 */
-#define IH_ARCH_MIPS   5   /* MIPS */
-#define IH_ARCH_MIPS64 6   /* MIPS  64 Bit */
-#define IH_ARCH_PPC7   /* PowerPC  */
-#define IH_ARCH_S390   8   /* IBM S390 */
-#define IH_ARCH_SH 9   /* SuperH   */
-#define IH_ARCH_SPARC  10  /* Sparc*/
-#define IH_ARCH_SPARC6411  /* Sparc 64 Bit */
-#define IH_ARCH_M68K   12  /* M68K */
-#define IH_ARCH_MICROBLAZE 14  /* MicroBlaze   */
-#define IH_ARCH_NIOS2  15  /* Nios-II  */
-#define IH_ARCH_BLACKFIN   16  /* Blackfin */
-#define IH_ARCH_AVR32  17  /* AVR32*/
-#define IH_ARCH_ST200  18  /* STMicroelectronics ST200  */
-#define IH_ARCH_SANDBOX19  /* Sandbox architecture (test 
only) */
-#define IH_ARCH_NDS32  20  /* ANDES Technology - NDS32  */
-#define IH_ARCH_OPENRISC21 /* OpenRISC 1000  */
-#define IH_ARCH_ARM64  22  /* ARM64*/

[U-Boot] [PATCH 13/14] mkimage: Show item lists for all categories

[Simon Glass]

Update the error-handling code for -A, -C and -O to show a list of valid
options when an invalid one is provided.

Signed-off-by: Simon Glass 
Reported-by: Vinoth Eswaran 
---

 tools/mkimage.c | 12 +---
 1 file changed, 9 insertions(+), 3 deletions(-)

diff --git a/tools/mkimage.c b/tools/mkimage.c
index 3cdbb2c..f589a41 100644
--- a/tools/mkimage.c
+++ b/tools/mkimage.c
@@ -152,8 +152,10 @@ static void process_args(int argc, char **argv)
break;
case 'A':
params.arch = genimg_get_arch_id(optarg);
-   if (params.arch < 0)
+   if (params.arch < 0) {
+   show_valid_options(IH_ARCH);
usage("Invalid architecture");
+   }
break;
case 'b':
if (add_content(IH_TYPE_FLATDT, optarg)) {
@@ -168,8 +170,10 @@ static void process_args(int argc, char **argv)
break;
case 'C':
params.comp = genimg_get_comp_id(optarg);
-   if (params.comp < 0)
+   if (params.comp < 0) {
+   show_valid_options(IH_COMP);
usage("Invalid compression type");
+   }
break;
case 'd':
params.datafile = optarg;
@@ -216,8 +220,10 @@ static void process_args(int argc, char **argv)
break;
case 'O':
params.os = genimg_get_os_id(optarg);
-   if (params.os < 0)
+   if (params.os < 0) {
+   show_valid_options(IH_OS);
usage("Invalid operating system");
+   }
break;
case 'p':
params.external_offset = strtoull(optarg, , 16);
-- 
2.8.0.rc3.226.g39d4020

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[U-Boot] [PATCH 09/14] image: Add a name for invalid types

[Simon Glass]

At present the name is NULL, which prevents qsort() fromp being used. Use
the name "invalid" instead.

Signed-off-by: Simon Glass 
---

 common/image.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/common/image.c b/common/image.c
index 4e503b3..e9095f4 100644
--- a/common/image.c
+++ b/common/image.c
@@ -69,7 +69,7 @@ static const image_header_t *image_get_ramdisk(ulong rd_addr, 
uint8_t arch,
 #endif
 
 static const table_entry_t uimage_arch[] = {
-   {   IH_ARCH_INVALID,NULL,   "Invalid ARCH", },
+   {   IH_ARCH_INVALID,"invalid",  "Invalid ARCH", },
{   IH_ARCH_ALPHA,  "alpha","Alpha",},
{   IH_ARCH_ARM,"arm",  "ARM",  },
{   IH_ARCH_I386,   "x86",  "Intel x86",},
@@ -97,7 +97,7 @@ static const table_entry_t uimage_arch[] = {
 };
 
 static const table_entry_t uimage_os[] = {
-   {   IH_OS_INVALID,  NULL,   "Invalid OS",   },
+   {   IH_OS_INVALID,  "invalid",  "Invalid OS",   },
{   IH_OS_LINUX,"linux","Linux",},
 #if defined(CONFIG_LYNXKDI) || defined(USE_HOSTCC)
{   IH_OS_LYNXOS,   "lynxos",   "LynxOS",   },
@@ -144,7 +144,7 @@ static const table_entry_t uimage_type[] = {
{   IH_TYPE_KERNEL_NOLOAD, "kernel_noload",  "Kernel Image (no 
loading done)", },
{   IH_TYPE_KWBIMAGE,   "kwbimage",   "Kirkwood Boot Image",},
{   IH_TYPE_IMXIMAGE,   "imximage",   "Freescale i.MX Boot Image",},
-   {   IH_TYPE_INVALID,NULL, "Invalid Image",  },
+   {   IH_TYPE_INVALID,"invalid","Invalid Image",  },
{   IH_TYPE_MULTI,  "multi",  "Multi-File Image",   },
{   IH_TYPE_OMAPIMAGE,  "omapimage",  "TI OMAP SPL With GP CH",},
{   IH_TYPE_PBLIMAGE,   "pblimage",   "Freescale PBL Boot Image",},
-- 
2.8.0.rc3.226.g39d4020

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[U-Boot] [PATCH 05/14] mkimage: Drop blank line before main()

[Simon Glass]

This is not needed. Drop it.

Signed-off-by: Simon Glass 
---

 tools/mkimage.c | 1 -
 1 file changed, 1 deletion(-)

diff --git a/tools/mkimage.c b/tools/mkimage.c
index 76ae09e..920d3be 100644
--- a/tools/mkimage.c
+++ b/tools/mkimage.c
@@ -285,7 +285,6 @@ static void process_args(int argc, char **argv)
usage("Missing output filename");
 }
 
-
 int main(int argc, char **argv)
 {
int ifd = -1;
-- 
2.8.0.rc3.226.g39d4020

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[U-Boot] [PATCH 06/14] image: Correct auto-fit architecture property name

[Simon Glass]

The fit_write_images() function incorrectly uses the long name for the
architecture. This cannot be parsed with the FIT is read. Fix this by using
the short name instead.

Signed-off-by: Simon Glass 
---

 tools/fit_image.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/tools/fit_image.c b/tools/fit_image.c
index 58aa8e2..94229b8 100644
--- a/tools/fit_image.c
+++ b/tools/fit_image.c
@@ -195,7 +195,8 @@ static int fit_write_images(struct image_tool_params 
*params, char *fdt)
fdt_begin_node(fdt, str);
fdt_property_string(fdt, "description", params->imagename);
fdt_property_string(fdt, "type", typename);
-   fdt_property_string(fdt, "arch", genimg_get_arch_name(params->arch));
+   fdt_property_string(fdt, "arch",
+   genimg_get_arch_short_name(params->arch));
fdt_property_string(fdt, "os", genimg_get_os_short_name(params->os));
fdt_property_string(fdt, "compression",
genimg_get_comp_short_name(params->comp));
-- 
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[U-Boot] [PATCH 04/14] mkimage: Drop premature setting of params.fit_image_type

[Simon Glass]

There is no need to set params.fit_image_type while parsing the arguments.
It is set up later anyway.

Signed-off-by: Simon Glass 
---

 tools/mkimage.c | 1 -
 1 file changed, 1 deletion(-)

diff --git a/tools/mkimage.c b/tools/mkimage.c
index a36c031..76ae09e 100644
--- a/tools/mkimage.c
+++ b/tools/mkimage.c
@@ -197,7 +197,6 @@ static void process_args(int argc, char **argv)
 * The flattened image tree (FIT) format
 * requires a flattened device tree image type
 */
-   params.fit_image_type = params.type;
params.type = IH_TYPE_FLATDT;
params.fflag = 1;
break;
-- 
2.8.0.rc3.226.g39d4020

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[U-Boot] [PATCH 08/14] image: Create a table of information for each category

[Simon Glass]

Add a table that contains the category name, the number of items in each
category and a pointer to the table of items. This will allow us to use
generic code to deal with the categories.

Signed-off-by: Simon Glass 
---

 common/image.c  | 13 +
 include/image.h |  9 +
 2 files changed, 22 insertions(+)

diff --git a/common/image.c b/common/image.c
index 0be09e5..4e503b3 100644
--- a/common/image.c
+++ b/common/image.c
@@ -176,6 +176,19 @@ static const table_entry_t uimage_comp[] = {
{   -1, "", "", },
 };
 
+struct table_info {
+   const char *desc;
+   int count;
+   const table_entry_t *table;
+};
+
+static const struct table_info table_info[IH_COUNT] = {
+   { "architecture", IH_ARCH_COUNT, uimage_arch },
+   { "compression", IH_COMP_COUNT, uimage_comp },
+   { "operating system", IH_OS_COUNT, uimage_os },
+   { "image type", IH_TYPE_COUNT, uimage_type },
+};
+
 /*/
 /* Legacy format routines */
 /*/
diff --git a/include/image.h b/include/image.h
index 7717b3d..c5b691a 100644
--- a/include/image.h
+++ b/include/image.h
@@ -123,6 +123,15 @@ struct lmb;
 # define IMAGE_OF_SYSTEM_SETUP 0
 #endif
 
+enum ih_category {
+   IH_ARCH,
+   IH_COMP,
+   IH_OS,
+   IH_TYPE,
+
+   IH_COUNT,
+};
+
 /*
  * Operating System Codes
  */
-- 
2.8.0.rc3.226.g39d4020

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[U-Boot] [PATCH 01/14] mkimage: Honour the default image type with auto-fit

[Simon Glass]

The default image type is supposed to be IH_TYPE_KERNEL, as set in the
'params' variable. Honour this with auto-fit also.

Signed-off-by: Simon Glass 
---

 tools/mkimage.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/tools/mkimage.c b/tools/mkimage.c
index ff3024a..53fa8bb 100644
--- a/tools/mkimage.c
+++ b/tools/mkimage.c
@@ -272,7 +272,7 @@ static void process_args(int argc, char **argv)
 * will always be IH_TYPE_FLATDT in this case).
 */
if (params.type == IH_TYPE_FLATDT) {
-   params.fit_image_type = type;
+   params.fit_image_type = type ? type : IH_TYPE_KERNEL;
if (!params.auto_its)
params.datafile = datafile;
} else if (type != IH_TYPE_INVALID) {
-- 
2.8.0.rc3.226.g39d4020

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[U-Boot] [PATCH 02/14] mkimage: Explain the auto-fit imagefile special case

[Simon Glass]

There is a special case in the code when auto-fit is used. Add a comment to
make it easier to understand why this is needed.

Signed-off-by: Simon Glass 
---

 tools/mkimage.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/tools/mkimage.c b/tools/mkimage.c
index 53fa8bb..66d29ab 100644
--- a/tools/mkimage.c
+++ b/tools/mkimage.c
@@ -273,6 +273,7 @@ static void process_args(int argc, char **argv)
 */
if (params.type == IH_TYPE_FLATDT) {
params.fit_image_type = type ? type : IH_TYPE_KERNEL;
+   /* For auto_its, datafile is always 'auto' */
if (!params.auto_its)
params.datafile = datafile;
} else if (type != IH_TYPE_INVALID) {
-- 
2.8.0.rc3.226.g39d4020

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[U-Boot] [PATCH 10/14] image: Add functions to obtain category information

[Simon Glass]

Add generic functions which can look up information about a category:

- the number of items in the category
- the category description
- an item long time
- an item short time

Signed-off-by: Simon Glass 
---

 common/image.c  | 68 +
 include/image.h | 34 +
 2 files changed, 102 insertions(+)

diff --git a/common/image.c b/common/image.c
index e9095f4..af155b2 100644
--- a/common/image.c
+++ b/common/image.c
@@ -583,6 +583,74 @@ const table_entry_t *get_table_entry(const table_entry_t 
*table, int id)
return NULL;
 }
 
+static const char *unknown_msg(enum ih_category category)
+{
+   static char msg[30];
+
+   strcpy(msg, "Unknown ");
+   strcat(msg, table_info[category].desc);
+
+   return msg;
+}
+
+/**
+ * get_cat_table_entry_name - translate entry id to long name
+ * @category: category to look up (enum ih_category)
+ * @id: entry id to be translated
+ *
+ * This will scan the translation table trying to find the entry that matches
+ * the given id.
+ *
+ * @retur long entry name if translation succeeds; error string on failure
+ */
+const char *genimg_get_cat_name(enum ih_category category, uint id)
+{
+   const table_entry_t *entry;
+
+   entry = get_table_entry(table_info[category].table, id);
+   if (!entry)
+   return unknown_msg(category);
+#if defined(USE_HOSTCC) || !defined(CONFIG_NEEDS_MANUAL_RELOC)
+   return entry->lname;
+#else
+   return entry->lname + gd->reloc_off;
+#endif
+}
+
+/**
+ * get_cat_table_entry_short_name - translate entry id to short name
+ * @category: category to look up (enum ih_category)
+ * @id: entry id to be translated
+ *
+ * This will scan the translation table trying to find the entry that matches
+ * the given id.
+ *
+ * @retur short entry name if translation succeeds; error string on failure
+ */
+const char *genimg_get_cat_short_name(enum ih_category category, uint id)
+{
+   const table_entry_t *entry;
+
+   entry = get_table_entry(table_info[category].table, id);
+   if (!entry)
+   return unknown_msg(category);
+#if defined(USE_HOSTCC) || !defined(CONFIG_NEEDS_MANUAL_RELOC)
+   return entry->sname;
+#else
+   return entry->sname + gd->reloc_off;
+#endif
+}
+
+int genimg_get_cat_count(enum ih_category category)
+{
+   return table_info[category].count;
+}
+
+const char *genimg_get_cat_desc(enum ih_category category)
+{
+   return table_info[category].desc;
+}
+
 /**
  * get_table_entry_name - translate entry id to long name
  * @table: pointer to a translation table for entries of a specific type
diff --git a/include/image.h b/include/image.h
index c5b691a..a116cb5 100644
--- a/include/image.h
+++ b/include/image.h
@@ -478,6 +478,40 @@ const char *genimg_get_comp_name(uint8_t comp);
  */
 const char *genimg_get_comp_short_name(uint8_t comp);
 
+/**
+ * genimg_get_cat_name() - Get the name of an item in a category
+ *
+ * @category:  Category of item
+ * @id:Item ID
+ * @return name of item, or "Unknown ..." if unknown
+ */
+const char *genimg_get_cat_name(enum ih_category category, uint id);
+
+/**
+ * genimg_get_cat_short_name() - Get the short name of an item in a category
+ *
+ * @category:  Category of item
+ * @id:Item ID
+ * @return short name of item, or "Unknown ..." if unknown
+ */
+const char *genimg_get_cat_short_name(enum ih_category category, uint id);
+
+/**
+ * genimg_get_cat_count() - Get the number of items in a category
+ *
+ * @category:  Category to check
+ * @return the number of items in the category (IH_xxx_COUNT)
+ */
+int genimg_get_cat_count(enum ih_category category);
+
+/**
+ * genimg_get_cat_desc() - Get the description of a category
+ *
+ * @return the description of a category, e.g. "architecture". This
+ * effectively converts the enum to a string.
+ */
+const char *genimg_get_cat_desc(enum ih_category category);
+
 int genimg_get_os_id(const char *name);
 int genimg_get_arch_id(const char *name);
 int genimg_get_type_id(const char *name);
-- 
2.8.0.rc3.226.g39d4020

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Re: [U-Boot] [PATCH] sunxi: Add support for eth1addr

[Ian Campbell]

On Thu, 2016-06-30 at 17:07 +0200, Hans de Goede wrote:
> Hi,
> 
> On 30-06-16 15:52, Ian Campbell wrote:
> > On Thu, 2016-06-30 at 13:15 +0200, Hans de Goede wrote:
> > > Hi,
> > > 
> > > On 30-06-16 12:50, Ian Campbell wrote:
> > > > On Sun, 2016-06-26 at 13:54 +0200, Hans de Goede wrote:
> > > > > Currently we will already fill ethaddr with a fixed unique
> > > > > address
> > > > > based on the SoCs serial (from the sid) to make sure that
> > > > > boards which
> > > > > use the integrated emac / gmac get a fixed mac rather then a
> > > > > random one.
> > > > > 
> > > > > On some boards (observed on 2 tablets using sdio rtl8703as
> > > > > wifi chips)
> > > > > the wifi does not come with a fixed mac either, so also set
> > > > > eth1addr,
> > > > > so that dts files can set an ethernet1 alias to get mac-
> > > > > address and
> > > > > local-mac-address filled for dt nodes describing the wifi
> > > > > controller.
> > > > 
> > > > This does it unconditionally, won't having eth1addr show up for
> > > > boards
> > > > which only have one network device (WIFI or otherwise) be
> > > > potentially
> > > > confusing for users? i.e. lacking it would be a sign that the
> > > > online
> > > > guide you are following might not exactly be relevant to your
> > > > board, or
> > > > people seeing it and then wasting time trying to figure out how
> > > > to use
> > > > the second device. Of secondary concern (since I think it is
> > > > far less
> > > > liklely) would be confusing some software somewhere.
> > > > 
> > [...]
> > > This just sets eth1addr in the u-boot env,
> > 
> > It's this which I worried might confuse people, people who notice
> > eth1addr (perhaps due to tab completion on "printenv eth"?) will
> > wonder
> > where the eth1 device is and/or why it is not working for them.
> 
> People who use the u-boot cmdline at all really are experienced users
> so TBH I'm not all that worried about this.

I know that I personally once wasted quite a bit of time (on arndale,
but still) being mislead/confused by different eth*addr variables
(arndale has another possible prefix too, usbaddr IIRC, which makes it
doubly confusing) and what applies to what and when. So IME having
irrelevant envvars like that floating around in the default env really
does lead to confusion even for people who (supposedly) know what they
are doing.

Even naive users will find random guides online which don't quite apply
to their particular board (especially likely with the vast number of
sunxi variants in existence) and get lead down the wrong path (which
should be "fail early since the envvar discussed doesn't exist)

Ian.
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Re: [U-Boot] mkimage can't read .tmp

[Simon Glass]

Hi Tom,

On 27 June 2016 at 23:50, Tom Van Deun  wrote:
> Hello all
>
> I have been trying to create a FIT image using mkimage using the command:
>
> mkimage -D "-I dts -O dtb -p 2000" -f name.its name.fit
>
> The output is:
>
> DTC: dts->dtb  on file "name.its"
> mkimage: Can't read name.fit.tmp: Invalid argument
> mkimage Can't add hashes to FIT blob
>
> No matter what I try, which arguments I add or remove or which modifications 
> I make to the its file, I keep getting this output. Unfortunately I can't 
> find much on Google for this exact issue. I found someone who solved the 
> issue by installing DTC, but that is not the issue in my case.
>
> Uboot development tools, DTC and mkimage are all at the latest version.
>
> Does anyone have any idea what other issues might be causing this behavior?

Not exactly, but I think this is failing on the mmap() call, probably
in mmap_fdt(). Is there anything special about your filesystem?

>
>
> Kind regards
> Tom

Regards,
Simon
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Re: [U-Boot] [PATCH] SPL: sunxi: don't force .BSS into DRAM

[Andre Przywara]

Hi Hans,

(CC:ing the list, which I accidentally forgot on this first post)

On 30/06/16 11:00, Hans de Goede wrote:
> Hi Andre,
> 
> On 30-06-16 02:25, Andre Przywara wrote:
>> Probably due to some (ill-founded) fear of a large BSS all sunxi boards
>> forced their SPL BSS section into DRAM.
>> This only works if there is no usage of a .BSS variable before the DRAM
>> is initialised.
>> The recent inclusion of tiny-printf breaks this assumption (it has two
>> variables in .BSS), so any early printf (printing a number) hangs a
>> board.
>> This in particular breaks the (WIP) Pine64 SPL, which at the moment links
>> Allwinner's libdram library, trying to print debug information:
>> DRAM:DRAM driver version: V1.0
>> DRAM Type = 
> 
> Hmm, although 256 bytes is not a lot I would prefer for BSS to stay in
> DRAM, esp. since the bss use may grow over time, and the SPL space is quite
> small.
> 
> Moreover, given that tiny-printf is specifically meant for use in SPL /
> restricted environments and having BSS in DRAM is not unheard of for
> other boards, it seems to me like this is something which should really
> be fixed in tinyprintf instead.

I really don't know. This simple bug has cost me at least two hours
yesterday, since it was the rather innocent access to a variable that
caused the issue. And if it wouldn't have been for Siarhei to point me
in the right direction I'd have spend even more time to find a fix.

This whole BSS in DRAM construct is very fragile and not obvious to
blame for any bug that you happen to see. For instance we were assuming
it to be due to unreliable SRAM C before.
Also we *do* a printf very early, which works because it doesn't involve
any numbers.
And really I think it's quite a stretch to ask the casual programmer to
keep in mind that some variables may end up in BSS and this must not
happen before DRAM is initialised.

So either we find a way to make this break if BSS variables are involved
in functions called before DRAM init (by somehow annotating files that
are used before or during DRAM init).
Or we find other spaces for the BSS in other SRAMs.
Like I described here:
http://lists.denx.de/pipermail/u-boot/2016-June/259392.html

Cheers,
Andre.

> Have you tried looking into fixing this at the tinyprintf level ?
> 
> Regards,
> 
> Hans
> 
>>
>> As it turns out the normal BSS size for sunxi is about 256 Bytes, so we
>> can happily remove the symbols and the linker script part that was
>> forcing the section into DRAM and let the linker naturally put it into
>> SRAM.
>> Tested on BananaPi M1 and Pine64(-SPL), also buildman sunxi was happy.
>>
>> Thanks to Siarhei for providing helpful hints!
>>
>> Signed-off-by: Andre Przywara 
>> ---
>>  arch/arm/cpu/armv7/sunxi/u-boot-spl.lds | 4 +---
>>  include/configs/sunxi-common.h  | 4 
>>  2 files changed, 1 insertion(+), 7 deletions(-)
>>
>> diff --git a/arch/arm/cpu/armv7/sunxi/u-boot-spl.lds
>> b/arch/arm/cpu/armv7/sunxi/u-boot-spl.lds
>> index 53f0cbd..a90404f 100644
>> --- a/arch/arm/cpu/armv7/sunxi/u-boot-spl.lds
>> +++ b/arch/arm/cpu/armv7/sunxi/u-boot-spl.lds
>> @@ -16,8 +16,6 @@
>>   */
>>  MEMORY { .sram : ORIGIN = CONFIG_SPL_TEXT_BASE,\
>>  LENGTH = CONFIG_SPL_MAX_SIZE }
>> -MEMORY { .sdram : ORIGIN = CONFIG_SPL_BSS_START_ADDR, \
>> -LENGTH = CONFIG_SPL_BSS_MAX_SIZE }
>>
>>  OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
>>  OUTPUT_ARCH(arm)
>> @@ -54,5 +52,5 @@ SECTIONS
>>  *(.bss*)
>>  . = ALIGN(4);
>>  __bss_end = .;
>> -} > .sdram
>> +} > .sram
>>  }
>> diff --git a/include/configs/sunxi-common.h
>> b/include/configs/sunxi-common.h
>> index 94275a7..e3fe965 100644
>> --- a/include/configs/sunxi-common.h
>> +++ b/include/configs/sunxi-common.h
>> @@ -75,7 +75,6 @@
>>   * since it needs to fit in with the other values. By also #defining it
>>   * we get warnings if the Kconfig value mismatches. */
>>  #define CONFIG_SPL_STACK_R_ADDR0x2fe0
>> -#define CONFIG_SPL_BSS_START_ADDR0x2ff8
>>  #else
>>  #define SDRAM_OFFSET(x) 0x4##x
>>  #define CONFIG_SYS_SDRAM_BASE0x4000
>> @@ -86,11 +85,8 @@
>>   * since it needs to fit in with the other values. By also #defining it
>>   * we get warnings if the Kconfig value mismatches. */
>>  #define CONFIG_SPL_STACK_R_ADDR0x4fe0
>> -#define CONFIG_SPL_BSS_START_ADDR0x4ff8
>>  #endif
>>
>> -#define CONFIG_SPL_BSS_MAX_SIZE0x0008 /* 512 KiB */
>> -
>>  #if defined(CONFIG_MACH_SUN9I) || defined(CONFIG_MACH_SUN50I)
>>  /*
>>   * The A80's A1 sram starts at 0x0001 rather then at 0x
>> and is
>>
> 
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[U-Boot] Missing maintainers

[Simon Glass]

Hi Eddie,

A few boards are missing maintainer files - can you please see if
someone can send a patch for this?

$ ./tools/genboardscfg.py
WARNING: no status info for 'evb-rk3036'
WARNING: no maintainers for 'evb-rk3036'
...
WARNING: no status info for 'kylin-rk3036'
WARNING: no maintainers for 'kylin-rk3036'

Regards,
Simon
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Re: [U-Boot] [PATCH 3/4] rockchip: rk3288: add fastboot support

[Simon Glass]

Hi Ziyuan,

On 30 June 2016 at 00:22, Ziyuan Xu  wrote:
> Enable fastboot feature on rk3288.
>
> This path doesn't support the fastboot flash function command entirely.
> We will hit "cannot find partition" assertion without specified
> partition environment. Define gpt partition layout in specified board
> such as firefly-rk3288, then enjoy it!
>
> Signed-off-by: Ziyuan Xu 
> ---
>
>  arch/arm/mach-rockchip/board.c  | 20 
>  include/configs/rk3288_common.h | 25 +
>  2 files changed, 45 insertions(+)
>
> diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
> index 816540e..9766ba0 100644
> --- a/arch/arm/mach-rockchip/board.c
> +++ b/arch/arm/mach-rockchip/board.c
> @@ -52,6 +52,26 @@ void lowlevel_init(void)
>  {
>  }
>
> +#if defined(CONFIG_USB_GADGET) && defined(CONFIG_USB_GADGET_DWC2_OTG)
> +#include 
> +#include 
> +
> +static struct dwc2_plat_otg_data rk3288_otg_data = {
> +   .regs_phy   = 0xff77,
> +   .regs_otg   = 0xff58,

Shouldn't these come from the device tree?

> +};
> +
> +int board_usb_init(int index, enum usb_init_type init)
> +{
> +   return dwc2_udc_probe(_otg_data);
> +}
> +
> +int board_usb_cleanup(int index, enum usb_init_type init)
> +{
> +   return 0;
> +}
> +#endif
> +
>  static int do_clock(cmd_tbl_t *cmdtp, int flag, int argc,
>char * const argv[])
>  {
> diff --git a/include/configs/rk3288_common.h b/include/configs/rk3288_common.h
> index 9d50d83..f8a6c98 100644
> --- a/include/configs/rk3288_common.h
> +++ b/include/configs/rk3288_common.h
> @@ -80,6 +80,31 @@
>  #define CONFIG_SPI
>  #define CONFIG_SF_DEFAULT_SPEED 2000
>
> +/* usb otg */
> +#define CONFIG_USB_GADGET
> +#define CONFIG_USB_GADGET_DUALSPEED
> +#define CONFIG_USB_GADGET_DWC2_OTG
> +#define CONFIG_RK3288_USB_PHY
> +#define CONFIG_USB_GADGET_VBUS_DRAW0
> +
> +/* fastboot  */
> +#define CONFIG_CMD_FASTBOOT
> +#define CONFIG_USB_FUNCTION_FASTBOOT
> +#define CONFIG_FASTBOOT_FLASH
> +#define CONFIG_FASTBOOT_FLASH_MMC_DEV  1   /* eMMC */
> +#define CONFIG_FASTBOOT_BUF_ADDR   (CONFIG_SYS_SDRAM_BASE \
> +   + SDRAM_BANK_SIZE)

Can you add a comment as to why the buffer is placed here?

> +#define CONFIG_FASTBOOT_BUF_SIZE   0x0800
> +
> +#define CONFIG_USB_GADGET_DOWNLOAD
> +#define CONFIG_G_DNL_MANUFACTURER  "Rockchip"
> +#define CONFIG_G_DNL_VENDOR_NUM0x2207
> +#define CONFIG_G_DNL_PRODUCT_NUM   0x320a
> +
> +/* Enable gpt partition table */
> +#define CONFIG_CMD_GPT
> +#define CONFIG_EFI_PARTITION
> +
>  #ifndef CONFIG_SPL_BUILD
>  #include 
>
> --
> 1.9.1
>
>

Regards,
Simon
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Re: [U-Boot] [PATCH] mmc: exynos_dw_mmc: support the Driver mode for Exynos

[Simon Glass]

On 30 June 2016 at 04:57, Jaehoon Chung  wrote:
> This patch support the driver mode for exynos dwmmc controller.
> To support the legacy model, maintained the existing code.
>
> Signed-off-by: Jaehoon Chung 
> ---
>  drivers/mmc/exynos_dw_mmc.c | 72 
> +
>  1 file changed, 72 insertions(+)

Reviewed-by: Simon Glass 
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Re: [U-Boot] [PATCH 2/4] usb: dwc2-otg: redefine fifo-size for rk3288

[Simon Glass]

Hi Ziyuan,

On 30 June 2016 at 00:21, Ziyuan Xu  wrote:
> Redefine RX FIFO size & TX FIFO size for rk3288.
>
> Signed-off-by: Ziyuan Xu 
> ---
>
>  drivers/usb/gadget/dwc2_udc_otg_regs.h | 6 ++
>  1 file changed, 6 insertions(+)
>
> diff --git a/drivers/usb/gadget/dwc2_udc_otg_regs.h 
> b/drivers/usb/gadget/dwc2_udc_otg_regs.h
> index 78ec90e..a0617c8 100644
> --- a/drivers/usb/gadget/dwc2_udc_otg_regs.h
> +++ b/drivers/usb/gadget/dwc2_udc_otg_regs.h
> @@ -130,8 +130,14 @@ struct dwc2_usbotg_reg {
>  #define HIGH_SPEED_CONTROL_PKT_SIZE64
>  #define HIGH_SPEED_BULK_PKT_SIZE   512
>
> +#ifdef CONFIG_ROCKCHIP_RK3288
> +#define RX_FIFO_SIZE   (275*4)
> +#define NPTX_FIFO_SIZE (16*4)
> +#else
>  #define RX_FIFO_SIZE   (1024*4)
>  #define NPTX_FIFO_SIZE (1024*4)
> +#endif

I cannot see where this is used. Can you explain? Also can you add a
reason for the change in your commit message?

> +
>  #define PTX_FIFO_SIZE  (1536*1)
>
>  #define DEPCTL_TXFNUM_0(0x0<<22)
> --
> 1.9.1
>
>

Regards,
Simon
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Re: [U-Boot] [PATCH] sunxi: Add support for eth1addr

[Hans de Goede]

Hi,

On 30-06-16 15:52, Ian Campbell wrote:

On Thu, 2016-06-30 at 13:15 +0200, Hans de Goede wrote:

Hi,

On 30-06-16 12:50, Ian Campbell wrote:

On Sun, 2016-06-26 at 13:54 +0200, Hans de Goede wrote:

Currently we will already fill ethaddr with a fixed unique address
based on the SoCs serial (from the sid) to make sure that boards which
use the integrated emac / gmac get a fixed mac rather then a random one.

On some boards (observed on 2 tablets using sdio rtl8703as wifi chips)
the wifi does not come with a fixed mac either, so also set eth1addr,
so that dts files can set an ethernet1 alias to get mac-address and
local-mac-address filled for dt nodes describing the wifi controller.


This does it unconditionally, won't having eth1addr show up for boards
which only have one network device (WIFI or otherwise) be potentially
confusing for users? i.e. lacking it would be a sign that the online
guide you are following might not exactly be relevant to your board, or
people seeing it and then wasting time trying to figure out how to use
the second device. Of secondary concern (since I think it is far less
liklely) would be confusing some software somewhere.


[...]

This just sets eth1addr in the u-boot env,


It's this which I worried might confuse people, people who notice
eth1addr (perhaps due to tab completion on "printenv eth"?) will wonder
where the eth1 device is and/or why it is not working for them.


People who use the u-boot cmdline at all really are experienced users
so TBH I'm not all that worried about this.


The rest of what you say regarding how this goes on to interact with
Linux makes sense to me, although even then having an eth1addr which
does't correspond to the MAC used by the device under Linux (because it
is burnt in and therefore eth1addr is ignored) still seems potentially
confusing to me.

I see at least some platforms use a CONFIG_HAS_ETH1 to control this. It
could also perhaps be gated on the DTB used by u-boot itself by looking
at the mac-address for the ethernet1 alias (and ethernet2 too I
suppose).


Adding a Kconfig option just to have a cleaner u-boot env seems a bit
like overkill to me, and parsing the dtb even more so.

Regards,

Hans
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Re: [U-Boot] [PATCH 1/4] usb: phy: implement usb-otg phy control for rk3288

[Simon Glass]

+Marek

On 30 June 2016 at 00:21, Ziyuan Xu  wrote:
> Apply dwc2 usb driver framework to implement phy_init and phy_off, and
> enable it with CONFIG_RK3288_USB_PHY.
>
> Signed-off-by: Ziyuan Xu 
> ---
>
>  drivers/usb/phy/Makefile |  1 +
>  drivers/usb/phy/rk3288_usb_phy.c | 29 +
>  2 files changed, 30 insertions(+)
>  create mode 100644 drivers/usb/phy/rk3288_usb_phy.c

Reviewed-by: Simon Glass 
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Re: [U-Boot] [PATCH] rockchip: disable CONFIG_EFI_LOADER

[Simon Glass]

Hi Ziyuan,

On 30 June 2016 at 00:28, Ziyuan Xu  wrote:
> Disable EFI applications feature for rockchip platform.
>
> Signed-off-by: Ziyuan Xu 
> ---
>  configs/chromebook_jerry_defconfig | 1 +
>  configs/evb-rk3036_defconfig   | 1 +
>  configs/kylin-rk3036_defconfig | 1 +
>  configs/rock2_defconfig| 1 +
>  4 files changed, 4 insertions(+)
>
> diff --git a/configs/chromebook_jerry_defconfig 
> b/configs/chromebook_jerry_defconfig
> index d5bc515..b020066 100644
> --- a/configs/chromebook_jerry_defconfig
> +++ b/configs/chromebook_jerry_defconfig
> @@ -10,6 +10,7 @@ CONFIG_DEFAULT_DEVICE_TREE="rk3288-jerry"
>  CONFIG_SPL_STACK_R=y
>  CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
>  CONFIG_HUSH_PARSER=y
> +CONFIG_EFI_LOADER=n

You should use the format:

# CONFIG_EFI_LOADER is not set

>  CONFIG_CMD_BOOTZ=y
>  # CONFIG_CMD_IMLS is not set
>  CONFIG_CMD_MMC=y
> diff --git a/configs/evb-rk3036_defconfig b/configs/evb-rk3036_defconfig
> index 9894fff..5f816ec 100644
> --- a/configs/evb-rk3036_defconfig
> +++ b/configs/evb-rk3036_defconfig
> @@ -6,6 +6,7 @@ CONFIG_SPL_STACK_R_ADDR=0x8
>  CONFIG_DEFAULT_DEVICE_TREE="rk3036-sdk"
>  CONFIG_SPL_STACK_R=y
>  CONFIG_HUSH_PARSER=y
> +CONFIG_EFI_LOADER=n
>  CONFIG_CMD_BOOTZ=y
>  # CONFIG_CMD_IMLS is not set
>  CONFIG_CMD_MMC=y
> diff --git a/configs/kylin-rk3036_defconfig b/configs/kylin-rk3036_defconfig
> index 0ff6c6b..4a043af 100644
> --- a/configs/kylin-rk3036_defconfig
> +++ b/configs/kylin-rk3036_defconfig
> @@ -7,6 +7,7 @@ CONFIG_DEFAULT_DEVICE_TREE="rk3036-sdk"
>  CONFIG_SPL_STACK_R=y
>  CONFIG_HUSH_PARSER=y
>  CONFIG_CMD_BOOTZ=y
> +CONFIG_EFI_LOADER=n
>  # CONFIG_CMD_IMLS is not set
>  CONFIG_CMD_MMC=y
>  CONFIG_CMD_SF=y
> diff --git a/configs/rock2_defconfig b/configs/rock2_defconfig
> index 3e16b80..e07100e 100644
> --- a/configs/rock2_defconfig
> +++ b/configs/rock2_defconfig
> @@ -8,6 +8,7 @@ CONFIG_DEFAULT_DEVICE_TREE="rk3288-rock2-square"
>  CONFIG_SPL_STACK_R=y
>  CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
>  CONFIG_HUSH_PARSER=y
> +CONFIG_EFI_LOADER=n
>  CONFIG_CMD_BOOTZ=y
>  # CONFIG_CMD_IMLS is not set
>  CONFIG_CMD_MMC=y
> --
> 1.9.1
>
>

Regards,
Simon
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Re: [U-Boot] [PATCH 00/11] ARM: uniphier: pinctrl and DT fixes/updates

[Masahiro Yamada]

2016-06-29 19:38 GMT+09:00 Masahiro Yamada :
> Masahiro Yamada (11):
>   pinctrl: uniphier: remove wrong pin-mux functions for ProXstream2
>   pinctrl: uniphier: fix NAND pin-mux setting for PH1-LD11/LD20
>   pinctrl: uniphier: remove unneeded pin group nand_cs1
>   ARM: dts: uniphier: sync Device Trees with upstream Linux
>   pinctrl: uniphier: allow to have pinctrl node under syscon node
>   pinctrl: uniphier: split pinctrl driver for PH1-LD11 and PH1-LD20
>   pinctrl: uniphier: support pin configuration for dedicated pins
>   pinctrl: uniphier: avoid building unneeded pin-mux tables for SPL
>   pinctrl: uniphier: add ethernet pin-mux settings
>   ARM: dts: uniphier: add AIDET nodes
>   ARM: uniphier: add external IRQ settings

Applied to u-boot-uniphier/master.


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Re: [U-Boot] [PATCH] ARM: uniphier: fix typo "talbe"

[Masahiro Yamada]

2016-06-24 11:51 GMT+09:00 Masahiro Yamada :
> Signed-off-by: Masahiro Yamada 



Applied to u-boot-uniphier/master.



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[U-Boot] pull request: u-boot-uniphier/master

[Masahiro Yamada]

Hi Tom,

Here are some bug fixes + DT, pinctrl updates.
It includes a little more than fixes, but it is
self-contained for Uniphier SoCs and I tested this series on all of my
boards.  So, I hope it should be OK.   (And another reason is just
personal; I will travel from July 10th, at which the MW will open.  I
may have poor access to my PC for a while during the MW.  So, I'd like
to flush out my patches now.)


The following changes since commit ff6e1569663eccaf9e582c57cc44568915c2f54b:

  x86: coreboot: Remove the dummy pch driver (2016-06-29 10:08:15 +0800)

are available in the git repository at:

  git://git.denx.de/u-boot-uniphier.git master

for you to fetch changes up to 0b2ecf4dd903bdafdc9a87ba2faf2bc05a9655db:

  ARM: uniphier: add external IRQ setup code (2016-06-30 23:49:26 +0900)


Masahiro Yamada (12):
  ARM: uniphier: fix typo "talbe"
  pinctrl: uniphier: remove wrong pin-mux functions for ProXstream2
  pinctrl: uniphier: fix NAND pin-mux setting for PH1-LD11/LD20
  pinctrl: uniphier: remove unneeded pin group nand_cs1
  ARM: dts: uniphier: sync Device Trees with upstream Linux
  pinctrl: uniphier: allow to have pinctrl node under syscon node
  pinctrl: uniphier: split pinctrl driver for PH1-LD11 and PH1-LD20
  pinctrl: uniphier: support pin configuration for dedicated pins
  pinctrl: uniphier: avoid building unneeded pin-mux tables for SPL
  pinctrl: uniphier: add Ethernet pin-mux settings
  ARM: dts: uniphier: add AIDET nodes
  ARM: uniphier: add external IRQ setup code

 arch/arm/dts/uniphier-common32.dtsi  |  22 +++-
 arch/arm/dts/uniphier-ph1-ld11-ref.dts   |  13 +--
 arch/arm/dts/uniphier-ph1-ld11.dtsi  |  50 +++--
 arch/arm/dts/uniphier-ph1-ld20-ref.dts   |  10 --
 arch/arm/dts/uniphier-ph1-ld20.dtsi  |  35 +--
 arch/arm/dts/uniphier-ph1-ld4-ref.dts|  10 --
 arch/arm/dts/uniphier-ph1-ld4.dtsi   |   7 +-
 arch/arm/dts/uniphier-ph1-ld6b-ref.dts   |  10 --
 arch/arm/dts/uniphier-ph1-ld6b.dtsi  |   4 +-
 arch/arm/dts/uniphier-ph1-pro4-ace.dts   |  10 --
 arch/arm/dts/uniphier-ph1-pro4-ref.dts   |  10 --
 arch/arm/dts/uniphier-ph1-pro4-sanji.dts |  10 --
 arch/arm/dts/uniphier-ph1-pro4.dtsi  |   7 +-
 arch/arm/dts/uniphier-ph1-pro5-4kbox.dts |  10 --
 arch/arm/dts/uniphier-ph1-pro5.dtsi  |   7 +-
 arch/arm/dts/uniphier-ph1-sld3.dtsi  |   5 +
 arch/arm/dts/uniphier-ph1-sld8-ref.dts   |  10 --
 arch/arm/dts/uniphier-ph1-sld8.dtsi  |   7 +-
 arch/arm/dts/uniphier-pinctrl.dtsi   |  10 ++
 arch/arm/dts/uniphier-proxstream2-gentil.dts |  10 --
 arch/arm/dts/uniphier-proxstream2-vodka.dts  |  10 --
 arch/arm/dts/uniphier-proxstream2.dtsi   |   7 +-
 arch/arm/dts/uniphier-ref-daughter.dtsi  |   2 +-
 arch/arm/mach-uniphier/arm32/lowlevel_init.S |   2 +-
 arch/arm/mach-uniphier/board_early_init_f.c  |  39 +++
 arch/arm/mach-uniphier/pinctrl/pinctrl-ld20.c|   5 +
 drivers/pinctrl/uniphier/Kconfig |  10 +-
 drivers/pinctrl/uniphier/Makefile|   1 +
 drivers/pinctrl/uniphier/pinctrl-uniphier-core.c |  15 ++-
 drivers/pinctrl/uniphier/pinctrl-uniphier-ld11.c | 107 +++
 drivers/pinctrl/uniphier/pinctrl-uniphier-ld20.c |  95 +
 drivers/pinctrl/uniphier/pinctrl-uniphier-ld4.c  |  93 +
 drivers/pinctrl/uniphier/pinctrl-uniphier-ld6b.c |  97 +
 drivers/pinctrl/uniphier/pinctrl-uniphier-pro4.c | 110 +++
 drivers/pinctrl/uniphier/pinctrl-uniphier-pro5.c |  91 
 drivers/pinctrl/uniphier/pinctrl-uniphier-pxs2.c | 116 -
 drivers/pinctrl/uniphier/pinctrl-uniphier-sld8.c |  87 +---
 drivers/pinctrl/uniphier/pinctrl-uniphier.h  |  23 +++-
 38 files changed, 713 insertions(+), 454 deletions(-)
 create mode 100644 drivers/pinctrl/uniphier/pinctrl-uniphier-ld11.c


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Re: [U-Boot] [PATCH v5 6/8] ARMv7: PSCI: ls102xa: check ALREADY_ON or ON_PENDING for CPU_ON

[Chen-Yu Tsai]

On Thu, Jun 30, 2016 at 12:24 PM, Hongbo Zhang  wrote:
> On Tue, Jun 28, 2016 at 12:30 PM, Chen-Yu Tsai  wrote:
>> On Tue, Jun 14, 2016 at 3:01 PM,   wrote:
>>> From: Hongbo Zhang 
>>>
>>> For the robustness of codes, while powering on a CPU, it is better to check
>>> if the target CPU is already on or in the process of power on, if yes the
>>> power on routine shouldn't be executed further and should return with the
>>> corresponding status immediately.
>>>
>>> Signed-off-by: Hongbo Zhang 
>>> ---
>>>  arch/arm/cpu/armv7/ls102xa/psci.S | 29 +
>>>  arch/arm/include/asm/psci.h   |  5 +
>>>  2 files changed, 34 insertions(+)
>>>
>>> diff --git a/arch/arm/cpu/armv7/ls102xa/psci.S 
>>> b/arch/arm/cpu/armv7/ls102xa/psci.S
>>> index a4482e4..0188ade 100644
>>> --- a/arch/arm/cpu/armv7/ls102xa/psci.S
>>> +++ b/arch/arm/cpu/armv7/ls102xa/psci.S
>>> @@ -66,6 +66,22 @@ psci_cpu_on:
>>> beq out_psci_cpu_on
>>> mov r1, r0
>>>
>>> +   bl  psci_get_cpu_stack_top
>>> +   sub r0, r0, #PSCI_CPU_STATUS_OFFSET
>>> +   ldr r5, [r0]
>>> +
>>> +   cmp r5, #PSCI_CPU_STATUS_ON
>>> +   moveq   r0, #ARM_PSCI_RET_ALREADY_ON
>>> +   beq out_psci_cpu_on
>>> +
>>> +   cmp r5, #PSCI_CPU_STATUS_ON_PENDING
>>> +   moveq   r0, #ARM_PSCI_RET_ON_PENDING
>>> +   beq out_psci_cpu_on
>>> +
>>> +   mov r5, #PSCI_CPU_STATUS_ON_PENDING
>>> +   str r5, [r0]
>>> +   dsb
>>> +
>>> bl  psci_cpu_on_common
>>>
>>> @ Get DCFG base address
>>> @@ -123,6 +139,12 @@ holdoff_release:
>>> rev r6, r6
>>> str r6, [r4, #DCFG_CCSR_SCRATCHRW1]
>>>
>>> +   mov r0, r1
>>> +   bl  psci_get_cpu_stack_top
>>> +   sub r0, r0, #PSCI_CPU_STATUS_OFFSET
>>> +   mov r5, #PSCI_CPU_STATUS_ON
>>> +   str r5, [r0]
>>> +
>>> isb
>>> dsb
>>>
>>> @@ -137,6 +159,13 @@ out_psci_cpu_on:
>>>  psci_cpu_off:
>>> bl  psci_cpu_off_common
>>>
>>> +   bl  psci_get_cpu_id
>>> +   bl  psci_get_cpu_stack_top
>>> +   sub r0, r0, #PSCI_CPU_STATUS_OFFSET
>>> +   mov r5, #PSCI_CPU_STATUS_OFF
>>> +   str r5, [r0]
>>> +   dsb
>>
>> psci_cpu_off_common flushes and disables caches, and turns off SMP.
>> So the code you're adding might not work as expected? ARM folks
>> might know more.
>>
> Moving this code ahead of psci_cpu_off_common seems better?
> I just though such a code should be placed as later as it can.

I agree it should be as late as possible. I'm just not sure about
the cache and AMP/SMP settings. Best to have someone more familiar
with this comment on it.

ChenYu

>> The rest looks good, though I expect them to be pulled out into
>> common helpers and rewritten in C. :)
>>
>> Regards
>> ChenYu
>>
>>> +
>>>  1: wfi
>>> b   1b
>>>
>>> diff --git a/arch/arm/include/asm/psci.h b/arch/arm/include/asm/psci.h
>>> index bedcd30..89a1ba5 100644
>>> --- a/arch/arm/include/asm/psci.h
>>> +++ b/arch/arm/include/asm/psci.h
>>> @@ -67,6 +67,11 @@
>>>  #define PSCI_PERCPU_STACK_SIZE 0x400
>>>  #define PSCI_TARGET_PC_OFFSET  (PSCI_PERCPU_STACK_SIZE - 4)
>>>  #define PSCI_CONTEXT_ID_OFFSET (PSCI_PERCPU_STACK_SIZE - 8)
>>> +#define PSCI_CPU_STATUS_OFFSET (PSCI_PERCPU_STACK_SIZE - 12)
>>> +
>>> +#define PSCI_CPU_STATUS_OFF0
>>> +#define PSCI_CPU_STATUS_ON 1
>>> +#define PSCI_CPU_STATUS_ON_PENDING 2
>>>
>>>  #ifndef __ASSEMBLY__
>>>  int psci_update_dt(void *fdt);
>>> --
>>> 2.1.4
>>>
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Re: [U-Boot] [PATCH v5 7/8] ARMv7: PSCI: ls102xa: add more PSCI v1.0 functions implemention

[Chen-Yu Tsai]

On Tue, Jun 14, 2016 at 3:01 PM,   wrote:
> From: Hongbo Zhang 
>
> This patch implements PSCI functions for ls102xa SoC following PSCI v1.0,
> they are as the list:
> psci_version,
> psci_features,
> psci_cpu_suspend,
> psci_affinity_info,
> psci_system_reset,
> psci_system_off.
>
> Tested on LS1021aQDS, LS1021aTWR.
>
> Signed-off-by: Wang Dongsheng 
> Signed-off-by: Hongbo Zhang 
> ---
>  arch/arm/cpu/armv7/ls102xa/psci.S  | 105 
> +++--
>  arch/arm/include/asm/arch-ls102xa/config.h |   1 +
>  arch/arm/include/asm/psci.h|   5 ++
>  board/freescale/ls1021aqds/Makefile|   1 +
>  board/freescale/ls1021aqds/psci.S  |  36 ++
>  board/freescale/ls1021atwr/Makefile|   1 +
>  board/freescale/ls1021atwr/psci.S  |  28 
>  include/configs/ls1021aqds.h   |   3 +
>  include/configs/ls1021atwr.h   |   1 +
>  9 files changed, 177 insertions(+), 4 deletions(-)
>  create mode 100644 board/freescale/ls1021aqds/psci.S
>  create mode 100644 board/freescale/ls1021atwr/psci.S
>
> diff --git a/arch/arm/cpu/armv7/ls102xa/psci.S 
> b/arch/arm/cpu/armv7/ls102xa/psci.S
> index 0188ade..084f914 100644
> --- a/arch/arm/cpu/armv7/ls102xa/psci.S
> +++ b/arch/arm/cpu/armv7/ls102xa/psci.S
> @@ -12,19 +12,72 @@
>  #include 
>  #include 
>
> +#define RCPM_TWAITSR   0x04C
> +
>  #define SCFG_CORE0_SFT_RST  0x130
>  #define SCFG_CORESRENCR 0x204
>
> -#define DCFG_CCSR_BRR   0x0E4
> -#define DCFG_CCSR_SCRATCHRW10x200
> +#define DCFG_CCSR_RSTCR0x0B0
> +#define DCFG_CCSR_RSTCR_RESET_REQ  0x2
> +#define DCFG_CCSR_BRR  0x0E4
> +#define DCFG_CCSR_SCRATCHRW1   0x200
> +
> +#define PSCI_FN_PSCI_VERSION_FEATURE_MASK  0x0
> +#define PSCI_FN_CPU_SUSPEND_FEATURE_MASK   0x0
> +#define PSCI_FN_CPU_OFF_FEATURE_MASK   0x0
> +#define PSCI_FN_CPU_ON_FEATURE_MASK0x0
> +#define PSCI_FN_AFFINITY_INFO_FEATURE_MASK 0x0
> +#define PSCI_FN_SYSTEM_OFF_FEATURE_MASK0x0
> +#define PSCI_FN_SYSTEM_RESET_FEATURE_MASK  0x0
>
> .pushsection ._secure.text, "ax"
>
> .arch_extension sec
>
> +   .align  5
> +
>  #defineONE_MS  (GENERIC_TIMER_CLK / 1000)
>  #defineRESET_WAIT  (30 * ONE_MS)
>
> +.globl psci_version
> +psci_version:
> +   movwr0, #0
> +   movtr0, #1
> +
> +   bx  lr
> +
> +_ls102x_psci_supported_table:
> +   .word   ARM_PSCI_0_2_FN_PSCI_VERSION
> +   .word   PSCI_FN_PSCI_VERSION_FEATURE_MASK
> +   .word   ARM_PSCI_0_2_FN_CPU_SUSPEND
> +   .word   PSCI_FN_CPU_SUSPEND_FEATURE_MASK
> +   .word   ARM_PSCI_0_2_FN_CPU_OFF
> +   .word   PSCI_FN_CPU_OFF_FEATURE_MASK
> +   .word   ARM_PSCI_0_2_FN_CPU_ON
> +   .word   PSCI_FN_CPU_ON_FEATURE_MASK
> +   .word   ARM_PSCI_0_2_FN_AFFINITY_INFO
> +   .word   PSCI_FN_AFFINITY_INFO_FEATURE_MASK
> +   .word   ARM_PSCI_0_2_FN_SYSTEM_OFF
> +   .word   PSCI_FN_SYSTEM_OFF_FEATURE_MASK
> +   .word   ARM_PSCI_0_2_FN_SYSTEM_RESET
> +   .word   PSCI_FN_SYSTEM_RESET_FEATURE_MASK
> +   .word   0
> +   .word   ARM_PSCI_RET_NI
> +
> +.globl psci_features
> +psci_features:
> +   adr r2, _ls102x_psci_supported_table
> +1: ldr r3, [r2]
> +   cmp r3, #0
> +   beq out_psci_features
> +   cmp r1, r3
> +   addne   r2, r2, #8
> +   bne 1b
> +
> +out_psci_features:
> +   ldr r0, [r2, #4]
> +   bx  lr
> +
>  .globl psci_check_target_cpu_id
>  psci_check_target_cpu_id:
> @ Get the real CPU number
> @@ -169,6 +222,52 @@ psci_cpu_off:
>  1: wfi
> b   1b
>
> +.globl psci_affinity_info
> +psci_affinity_info:
> +   push{lr}
> +
> +   mov r0, #ARM_PSCI_RET_INVAL
> +
> +   @ Verify Affinity level
> +   cmp r2, #0
> +   bne out_affinity_info
> +
> +   bl  psci_check_target_cpu_id
> +   cmp r0, #ARM_PSCI_RET_INVAL
> +   beq out_affinity_info
> +   mov r1, r0
> +
> +   @ Get RCPM base address
> +   movwr4, #(CONFIG_SYS_FSL_RCPM_ADDR & 0x)
> +   movtr4, #(CONFIG_SYS_FSL_RCPM_ADDR >> 16)
> +
> +   mov r0, #PSCI_AFFINITY_LEVEL_ON
> +
> +   @ Detect target CPU state
> +   ldr r2, [r4, #RCPM_TWAITSR]
> +   rev r2, r2
> +   lsr r2, r2, r1
> +   andsr2, r2, #1

tst should suffice.

> +   beq out_affinity_info
> +
> +   mov r0, #PSCI_AFFINITY_LEVEL_OFF
> +
> +out_affinity_info:
> +   pop {pc}
> +
> +.globl psci_system_reset
> +psci_system_reset:
> +   @ Get DCFG base address
> +   movwr1, #(CONFIG_SYS_FSL_GUTS_ADDR & 0x)
> +   movtr1, #(CONFIG_SYS_FSL_GUTS_ADDR >> 16)
> +
> +   mov r2, 

Re: [U-Boot] [PATCH] sunxi: Add support for eth1addr

[Ian Campbell]

On Thu, 2016-06-30 at 13:15 +0200, Hans de Goede wrote:
> Hi,
> 
> On 30-06-16 12:50, Ian Campbell wrote:
> > On Sun, 2016-06-26 at 13:54 +0200, Hans de Goede wrote:
> > > Currently we will already fill ethaddr with a fixed unique address
> > > based on the SoCs serial (from the sid) to make sure that boards which
> > > use the integrated emac / gmac get a fixed mac rather then a random one.
> > > 
> > > On some boards (observed on 2 tablets using sdio rtl8703as wifi chips)
> > > the wifi does not come with a fixed mac either, so also set eth1addr,
> > > so that dts files can set an ethernet1 alias to get mac-address and
> > > local-mac-address filled for dt nodes describing the wifi controller.
> > 
> > This does it unconditionally, won't having eth1addr show up for boards
> > which only have one network device (WIFI or otherwise) be potentially
> > confusing for users? i.e. lacking it would be a sign that the online
> > guide you are following might not exactly be relevant to your board, or
> > people seeing it and then wasting time trying to figure out how to use
> > the second device. Of secondary concern (since I think it is far less
> > liklely) would be confusing some software somewhere.
> > 
[...]
> This just sets eth1addr in the u-boot env,

It's this which I worried might confuse people, people who notice
eth1addr (perhaps due to tab completion on "printenv eth"?) will wonder
where the eth1 device is and/or why it is not working for them.

The rest of what you say regarding how this goes on to interact with
Linux makes sense to me, although even then having an eth1addr which
does't correspond to the MAC used by the device under Linux (because it
is burnt in and therefore eth1addr is ignored) still seems potentially
confusing to me.

I see at least some platforms use a CONFIG_HAS_ETH1 to control this. It
could also perhaps be gated on the DTB used by u-boot itself by looking
at the mac-address for the ethernet1 alias (and ethernet2 too I
suppose).

Ian.
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[U-Boot] [PATCH] imx6: clock: typo fix

[Peng Fan]

Typo fix, "PPL2 -> PLL2"

Signed-off-by: Peng Fan 
Cc: Stefano Babic 
---
 arch/arm/cpu/armv7/mx6/clock.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/cpu/armv7/mx6/clock.c b/arch/arm/cpu/armv7/mx6/clock.c
index ff932aa..9b4b69c 100644
--- a/arch/arm/cpu/armv7/mx6/clock.c
+++ b/arch/arm/cpu/armv7/mx6/clock.c
@@ -281,7 +281,7 @@ static u32 mxc_get_pll_pfd(enum pll_clocks pll, int pfd_num)
case PLL_BUS:
if (!is_mx6ul()) {
if (pfd_num == 3) {
-   /* No PFD3 on PPL2 */
+   /* No PFD3 on PLL2 */
return 0;
}
}
-- 
2.6.2

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[U-Boot] [PATCH] mmc: exynos_dw_mmc: support the Driver mode for Exynos

[Jaehoon Chung]

This patch support the driver mode for exynos dwmmc controller.
To support the legacy model, maintained the existing code.

Signed-off-by: Jaehoon Chung 
---
 drivers/mmc/exynos_dw_mmc.c | 72 +
 1 file changed, 72 insertions(+)

diff --git a/drivers/mmc/exynos_dw_mmc.c b/drivers/mmc/exynos_dw_mmc.c
index ab0df46..283befc 100644
--- a/drivers/mmc/exynos_dw_mmc.c
+++ b/drivers/mmc/exynos_dw_mmc.c
@@ -23,8 +23,21 @@
 #defineDWMMC_MMC0_SDR_TIMING_VAL   0x03030001
 #defineDWMMC_MMC2_SDR_TIMING_VAL   0x03020001
 
+#ifdef CONFIG_DM_MMC
+#include 
+DECLARE_GLOBAL_DATA_PTR;
+
+struct exynos_mmc_plat {
+   struct mmc_config cfg;
+   struct mmc mmc;
+};
+#endif
+
 /* Exynos implmentation specific drver private data */
 struct dwmci_exynos_priv_data {
+#ifdef CONFIG_DM_MMC
+   struct dwmci_host host;
+#endif
u32 sdr_timing;
 };
 
@@ -105,11 +118,15 @@ static int exynos_dwmci_core_init(struct dwmci_host *host)
host->caps = MMC_MODE_DDR_52MHz;
host->clksel = exynos_dwmci_clksel;
host->get_mmc_clk = exynos_dwmci_get_clk;
+
+#ifndef CONFIG_DM_MMC
/* Add the mmc channel to be registered with mmc core */
if (add_dwmci(host, DWMMC_MAX_FREQ, DWMMC_MIN_FREQ)) {
printf("DWMMC%d registration failed\n", host->dev_index);
return -1;
}
+#endif
+
return 0;
 }
 
@@ -237,3 +254,58 @@ int exynos_dwmmc_init(const void *blob)
 
return err;
 }
+
+#ifdef CONFIG_DM_MMC
+static int exynos_dwmmc_probe(struct udevice *dev)
+{
+   struct exynos_mmc_plat *plat = dev_get_platdata(dev);
+   struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev);
+   struct dwmci_exynos_priv_data *priv = dev_get_priv(dev);
+   struct dwmci_host *host = >host;
+   int err;
+
+   err = exynos_dwmci_get_config(gd->fdt_blob, dev->of_offset, host);
+   if (err)
+   return err;
+   err = do_dwmci_init(host);
+   if (err)
+   return err;
+
+   dwmci_setup_cfg(>cfg, host->name, host->buswidth, host->caps,
+   DWMMC_MAX_FREQ, DWMMC_MIN_FREQ);
+   host->mmc = >mmc;
+   host->mmc->priv = >host;
+   host->priv = dev;
+   upriv->mmc = host->mmc;
+
+   return dwmci_probe(dev);
+}
+
+static int exynos_dwmmc_bind(struct udevice *dev)
+{
+   struct exynos_mmc_plat *plat = dev_get_platdata(dev);
+   int ret;
+
+   ret = dwmci_bind(dev, >mmc, >cfg);
+   if (ret)
+   return ret;
+
+   return 0;
+}
+
+static const struct udevice_id exynos_dwmmc_ids[] = {
+   { .compatible = "samsung,exynos4412-dw-mshc" },
+   { }
+};
+
+U_BOOT_DRIVER(exynos_dwmmc_drv) = {
+   .name   = "exynos_dwmmc",
+   .id = UCLASS_MMC,
+   .of_match   = exynos_dwmmc_ids,
+   .bind   = exynos_dwmmc_bind,
+   .ops= _dwmci_ops,
+   .probe  = exynos_dwmmc_probe,
+   .priv_auto_alloc_size   = sizeof(struct dwmci_exynos_priv_data),
+   .platdata_auto_alloc_size = sizeof(struct exynos_mmc_plat),
+};
+#endif
-- 
1.9.1

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Re: [U-Boot] [PATCH] sunxi: Add support for eth1addr

[Hans de Goede]

Hi,

On 30-06-16 12:50, Ian Campbell wrote:

On Sun, 2016-06-26 at 13:54 +0200, Hans de Goede wrote:

Currently we will already fill ethaddr with a fixed unique address
based on the SoCs serial (from the sid) to make sure that boards which
use the integrated emac / gmac get a fixed mac rather then a random one.

On some boards (observed on 2 tablets using sdio rtl8703as wifi chips)
the wifi does not come with a fixed mac either, so also set eth1addr,
so that dts files can set an ethernet1 alias to get mac-address and
local-mac-address filled for dt nodes describing the wifi controller.


This does it unconditionally, won't having eth1addr show up for boards
which only have one network device (WIFI or otherwise) be potentially
confusing for users? i.e. lacking it would be a sign that the online
guide you are following might not exactly be relevant to your board, or
people seeing it and then wasting time trying to figure out how to use
the second device. Of secondary concern (since I think it is far less
liklely) would be confusing some software somewhere.

Also what is the impact on boards which have a second network device
which does have a proper MAC address, either one which is part of the
board or e.g. on a USB dongle? I think we don't want to override any
burnt in MAC addresses.


This just sets eth1addr in the u-boot env, it will only actually
do something to the devicetree if there is an ethernet1 alias in
there (which there should not be for e.g an usb dongle).

So this can only cause any issues if people add a ethernet1 alias
when they should not.

As for overriding a burnt-in mac-address, if the ethernet1
alias is present then u-boot will only modify a pre-existing
"mac-address" dt property, if none is present it will not
touch it. It will unconditional modify / add a "local-mac-address"
property. Drivers should only honor "local-mac-address" if
there is no burnt-in mac-address, see e.g. :

https://github.com/jwrdegoede/rtl8723bs/commit/be5e87ea71677120ede457213208902ed9942653

Now if users have a driver which honors mac-address to
override the burnt-in mac, and the add an alias ethernet1
and they add an "mac-address" property to the dt node
the ethernet1 alias points to, then they get exactly
what they ask for.

Regards,

Hans







Ian.



Signed-off-by: Hans de Goede 
---
 board/sunxi/board.c | 12 
 1 file changed, 12 insertions(+)

diff --git a/board/sunxi/board.c b/board/sunxi/board.c
index b5a50f4..41d796c 100644
--- a/board/sunxi/board.c
+++ b/board/sunxi/board.c
@@ -641,6 +641,18 @@ int misc_init_r(void)
eth_setenv_enetaddr("ethaddr", mac_addr);
}

+   if (!getenv("eth1addr")) {
+   /* Non OUI / registered MAC address */
+   mac_addr[0] = 0x12;
+   mac_addr[1] = (sid[0] >>  0) & 0xff;
+   mac_addr[2] = (sid[3] >> 24) & 0xff;
+   mac_addr[3] = (sid[3] >> 16) & 0xff;
+   mac_addr[4] = (sid[3] >>  8) & 0xff;
+   mac_addr[5] = (sid[3] >>  0) & 0xff;
+
+   eth_setenv_enetaddr("eth1addr", mac_addr);
+   }
+
if (!getenv("serial#")) {
snprintf(serial_string,
sizeof(serial_string),
"%08x%08x", sid[0], sid[3]);

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Re: [U-Boot] [PATCH] sunxi: Add support for eth1addr

[Ian Campbell]

On Sun, 2016-06-26 at 13:54 +0200, Hans de Goede wrote:
> Currently we will already fill ethaddr with a fixed unique address
> based on the SoCs serial (from the sid) to make sure that boards which
> use the integrated emac / gmac get a fixed mac rather then a random one.
> 
> On some boards (observed on 2 tablets using sdio rtl8703as wifi chips)
> the wifi does not come with a fixed mac either, so also set eth1addr,
> so that dts files can set an ethernet1 alias to get mac-address and
> local-mac-address filled for dt nodes describing the wifi controller.

This does it unconditionally, won't having eth1addr show up for boards
which only have one network device (WIFI or otherwise) be potentially
confusing for users? i.e. lacking it would be a sign that the online
guide you are following might not exactly be relevant to your board, or
people seeing it and then wasting time trying to figure out how to use
the second device. Of secondary concern (since I think it is far less
liklely) would be confusing some software somewhere.

Also what is the impact on boards which have a second network device
which does have a proper MAC address, either one which is part of the
board or e.g. on a USB dongle? I think we don't want to override any
burnt in MAC addresses.

Ian.

> 
> Signed-off-by: Hans de Goede 
> ---
>  board/sunxi/board.c | 12 
>  1 file changed, 12 insertions(+)
> 
> diff --git a/board/sunxi/board.c b/board/sunxi/board.c
> index b5a50f4..41d796c 100644
> --- a/board/sunxi/board.c
> +++ b/board/sunxi/board.c
> @@ -641,6 +641,18 @@ int misc_init_r(void)
>   eth_setenv_enetaddr("ethaddr", mac_addr);
>   }
>  
> + if (!getenv("eth1addr")) {
> + /* Non OUI / registered MAC address */
> + mac_addr[0] = 0x12;
> + mac_addr[1] = (sid[0] >>  0) & 0xff;
> + mac_addr[2] = (sid[3] >> 24) & 0xff;
> + mac_addr[3] = (sid[3] >> 16) & 0xff;
> + mac_addr[4] = (sid[3] >>  8) & 0xff;
> + mac_addr[5] = (sid[3] >>  0) & 0xff;
> +
> + eth_setenv_enetaddr("eth1addr", mac_addr);
> + }
> +
>   if (!getenv("serial#")) {
>   snprintf(serial_string,
> sizeof(serial_string),
>   "%08x%08x", sid[0], sid[3]);
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Re: [U-Boot] [PATCH 1/3] armv8: fsl-layerscape: Add A72 core detection

[Prabhakar Kushwaha]

> -Original Message-
> From: U-Boot [mailto:u-boot-boun...@lists.denx.de] On Behalf Of Gong
> Qianyu
> Sent: Thursday, June 30, 2016 3:31 PM
> To: york sun ; u-boot@lists.denx.de
> Cc: Zhiqiang Hou ; Huan Wang
> ; Wenbin Song ; Mingkai
> Hu 
> Subject: [U-Boot] [PATCH 1/3] armv8: fsl-layerscape: Add A72 core detection
> 

Please avoid patches without any description.


-prabhakar
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Re: [U-Boot] [PATCH] sunxi: spl: Fix DRAM info printing

[Ian Campbell]

On Sun, 2016-06-26 at 13:57 +0200, Hans de Goede wrote:
> The switch to simple_printf was causing the SPL dram info to show as:
> 
> DRAM: u MiB
> 
> This fixes this by switching from %lu to %d for printing the DRAM size.
> 
> Signed-off-by: Hans de Goede 

Acked-by: Ian Campbell 

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Re: [U-Boot] [PATCH 3/3] armv8/ls1046a: Add Fman support

[Prabhakar Kushwaha]

> -Original Message-
> From: U-Boot [mailto:u-boot-boun...@lists.denx.de] On Behalf Of Gong
> Qianyu
> Sent: Thursday, June 30, 2016 3:31 PM
> To: york sun ; u-boot@lists.denx.de
> Cc: Zhiqiang Hou ; Wenbin Song
> ; Mingkai Hu 
> Subject: [U-Boot] [PATCH 3/3] armv8/ls1046a: Add Fman support
> 

Missing description.

This patch should be merged with previous patch.

--prabhakar
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Re: [U-Boot] [PATCH 2/3] armv8/fsl_lsch2: Add LS1046A SoC support

[Prabhakar Kushwaha]

> -Original Message-
> From: U-Boot [mailto:u-boot-boun...@lists.denx.de] On Behalf Of Gong
> Qianyu
> Sent: Thursday, June 30, 2016 3:31 PM
> To: york sun ; u-boot@lists.denx.de
> Cc: Mihai Bantea ; Zhiqiang Hou
> ; Wenbin Song ; Mingkai
> Hu 
> Subject: [U-Boot] [PATCH 2/3] armv8/fsl_lsch2: Add LS1046A SoC support
> 
> From: Mingkai Hu 
> 
> The LS1046A processor is built on the QorIQ LS series architecture combining
> four ARM A72 processor cores with DPAA 1.0 support.
> 

Please add SoC details in arch/arm/cpu/armv8/fsl-layerscape/doc/README.soc

> Signed-off-by: Hou Zhiqiang 
> Signed-off-by: Mihai Bantea 
> Signed-off-by: Mingkai Hu 
> Signed-off-by: Gong Qianyu 
> 

Strange missing list of file modified :)


> diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Makefile
> b/arch/arm/cpu/armv8/fsl-layerscape/Makefile
> index eb2cbc3..4df467d 100644
> --- a/arch/arm/cpu/armv8/fsl-layerscape/Makefile
> +++ b/arch/arm/cpu/armv8/fsl-layerscape/Makefile
> @@ -32,3 +32,7 @@ endif
>  ifneq ($(CONFIG_LS1012A),)
>  obj-$(CONFIG_SYS_HAS_SERDES) += ls1012a_serdes.o  endif
> +
> +ifneq ($(CONFIG_LS1046A),)
> +obj-$(CONFIG_SYS_HAS_SERDES) += ls1046a_serdes.o endif
> diff --git a/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_serdes.c
> b/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_serdes.c
> index fe3444a..f73092a 100644
> --- a/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_serdes.c
> +++ b/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_serdes.c
> @@ -13,6 +13,9 @@
>  #ifdef CONFIG_SYS_FSL_SRDS_1
>  static u8 serdes1_prtcl_map[SERDES_PRCTL_COUNT];
>  #endif
> +#ifdef CONFIG_SYS_FSL_SRDS_2
> +static u8 serdes2_prtcl_map[SERDES_PRCTL_COUNT];
> +#endif
> 
>  int is_serdes_configured(enum srds_prtcl device)  { @@ -21,6 +24,9 @@ int
> is_serdes_configured(enum srds_prtcl device)  #ifdef
> CONFIG_SYS_FSL_SRDS_1
>   ret |= serdes1_prtcl_map[device];
>  #endif
> +#ifdef CONFIG_SYS_FSL_SRDS_2
> + ret |= serdes2_prtcl_map[device];
> +#endif
> 
>   return !!ret;
>  }
> @@ -38,6 +44,12 @@ int serdes_get_first_lane(u32 sd, enum srds_prtcl
> device)
>   cfg >>= FSL_CHASSIS2_RCWSR4_SRDS1_PRTCL_SHIFT;
>   break;
>  #endif
> +#ifdef CONFIG_SYS_FSL_SRDS_2
> + case FSL_SRDS_2:
> + cfg &= FSL_CHASSIS2_RCWSR4_SRDS2_PRTCL_MASK;
> + cfg >>= FSL_CHASSIS2_RCWSR4_SRDS2_PRTCL_SHIFT;
> + break;
> +#endif
>   default:
>   printf("invalid SerDes%d\n", sd);
>   break;
> @@ -114,4 +126,11 @@ void fsl_serdes_init(void)
>   FSL_CHASSIS2_RCWSR4_SRDS1_PRTCL_SHIFT,
>   serdes1_prtcl_map);
>  #endif
> +#ifdef CONFIG_SYS_FSL_SRDS_2
> + serdes_init(FSL_SRDS_2,
> + CONFIG_SYS_FSL_SERDES_ADDR,
> + FSL_CHASSIS2_RCWSR4_SRDS2_PRTCL_MASK,
> + FSL_CHASSIS2_RCWSR4_SRDS2_PRTCL_SHIFT,
> + serdes2_prtcl_map);
> +#endif
>  }

Ideally this should be separate patch. Like Adding support of SerDes2 


> diff --git a/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_speed.c
> b/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_speed.c
> index d0dc58d..8922197 100644
> --- a/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_speed.c
> +++ b/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_speed.c
> @@ -107,6 +107,12 @@ void get_sys_info(struct sys_info *sys_info)
>   case 3:
>   sys_info->freq_fman[0] = freq_c_pll[0] / 3;
>   break;
> + case 4:
> + sys_info->freq_fman[0] = freq_c_pll[0] / 4;
> + break;
> + case 5:
> + sys_info->freq_fman[0] = sys_info->freq_systembus;
> + break;
>   case 6:
>   sys_info->freq_fman[0] = freq_c_pll[1] / 2;
>   break;
> @@ -124,8 +130,23 @@ void get_sys_info(struct sys_info *sys_info)  #ifdef
> CONFIG_FSL_ESDHC  #ifdef CONFIG_FSL_ESDHC_USE_PERIPHERAL_CLK
>   rcw_tmp = in_be32(>rcwsr[15]);
> - rcw_tmp = (rcw_tmp & HWA_CGA_M2_CLK_SEL) >>
> HWA_CGA_M2_CLK_SHIFT;
> - sys_info->freq_sdhc = freq_c_pll[1] / rcw_tmp;
> + switch ((rcw_tmp & HWA_CGA_M2_CLK_SEL) >>
> HWA_CGA_M2_CLK_SHIFT) {
> + case 1:
> + sys_info->freq_sdhc = freq_c_pll[1];
> + break;
> + case 2:
> + sys_info->freq_sdhc = freq_c_pll[1] / 2;
> + break;
> + case 3:
> + sys_info->freq_sdhc = freq_c_pll[1] / 3;
> + break;
> + case 6:
> + sys_info->freq_sdhc = freq_c_pll[0] / 2;
> + break;
> + default:
> + printf("Error: Unknown ESDHC clock select!\n");
> + break;
> + }
>  #else
>   sys_info->freq_sdhc = sys_info->freq_systembus;  #endif diff --git
> a/arch/arm/cpu/armv8/fsl-layerscape/ls1046a_serdes.c
> 

[U-Boot] [PATCH 2/3] armv8/fsl_lsch2: Add LS1046A SoC support

[Gong Qianyu]

From: Mingkai Hu 

The LS1046A processor is built on the QorIQ LS series architecture
combining four ARM A72 processor cores with DPAA 1.0 support.

Signed-off-by: Hou Zhiqiang 
Signed-off-by: Mihai Bantea 
Signed-off-by: Mingkai Hu 
Signed-off-by: Gong Qianyu 

diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Makefile 
b/arch/arm/cpu/armv8/fsl-layerscape/Makefile
index eb2cbc3..4df467d 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/Makefile
+++ b/arch/arm/cpu/armv8/fsl-layerscape/Makefile
@@ -32,3 +32,7 @@ endif
 ifneq ($(CONFIG_LS1012A),)
 obj-$(CONFIG_SYS_HAS_SERDES) += ls1012a_serdes.o
 endif
+
+ifneq ($(CONFIG_LS1046A),)
+obj-$(CONFIG_SYS_HAS_SERDES) += ls1046a_serdes.o
+endif
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_serdes.c 
b/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_serdes.c
index fe3444a..f73092a 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_serdes.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_serdes.c
@@ -13,6 +13,9 @@
 #ifdef CONFIG_SYS_FSL_SRDS_1
 static u8 serdes1_prtcl_map[SERDES_PRCTL_COUNT];
 #endif
+#ifdef CONFIG_SYS_FSL_SRDS_2
+static u8 serdes2_prtcl_map[SERDES_PRCTL_COUNT];
+#endif
 
 int is_serdes_configured(enum srds_prtcl device)
 {
@@ -21,6 +24,9 @@ int is_serdes_configured(enum srds_prtcl device)
 #ifdef CONFIG_SYS_FSL_SRDS_1
ret |= serdes1_prtcl_map[device];
 #endif
+#ifdef CONFIG_SYS_FSL_SRDS_2
+   ret |= serdes2_prtcl_map[device];
+#endif
 
return !!ret;
 }
@@ -38,6 +44,12 @@ int serdes_get_first_lane(u32 sd, enum srds_prtcl device)
cfg >>= FSL_CHASSIS2_RCWSR4_SRDS1_PRTCL_SHIFT;
break;
 #endif
+#ifdef CONFIG_SYS_FSL_SRDS_2
+   case FSL_SRDS_2:
+   cfg &= FSL_CHASSIS2_RCWSR4_SRDS2_PRTCL_MASK;
+   cfg >>= FSL_CHASSIS2_RCWSR4_SRDS2_PRTCL_SHIFT;
+   break;
+#endif
default:
printf("invalid SerDes%d\n", sd);
break;
@@ -114,4 +126,11 @@ void fsl_serdes_init(void)
FSL_CHASSIS2_RCWSR4_SRDS1_PRTCL_SHIFT,
serdes1_prtcl_map);
 #endif
+#ifdef CONFIG_SYS_FSL_SRDS_2
+   serdes_init(FSL_SRDS_2,
+   CONFIG_SYS_FSL_SERDES_ADDR,
+   FSL_CHASSIS2_RCWSR4_SRDS2_PRTCL_MASK,
+   FSL_CHASSIS2_RCWSR4_SRDS2_PRTCL_SHIFT,
+   serdes2_prtcl_map);
+#endif
 }
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_speed.c 
b/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_speed.c
index d0dc58d..8922197 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_speed.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_speed.c
@@ -107,6 +107,12 @@ void get_sys_info(struct sys_info *sys_info)
case 3:
sys_info->freq_fman[0] = freq_c_pll[0] / 3;
break;
+   case 4:
+   sys_info->freq_fman[0] = freq_c_pll[0] / 4;
+   break;
+   case 5:
+   sys_info->freq_fman[0] = sys_info->freq_systembus;
+   break;
case 6:
sys_info->freq_fman[0] = freq_c_pll[1] / 2;
break;
@@ -124,8 +130,23 @@ void get_sys_info(struct sys_info *sys_info)
 #ifdef CONFIG_FSL_ESDHC
 #ifdef CONFIG_FSL_ESDHC_USE_PERIPHERAL_CLK
rcw_tmp = in_be32(>rcwsr[15]);
-   rcw_tmp = (rcw_tmp & HWA_CGA_M2_CLK_SEL) >> HWA_CGA_M2_CLK_SHIFT;
-   sys_info->freq_sdhc = freq_c_pll[1] / rcw_tmp;
+   switch ((rcw_tmp & HWA_CGA_M2_CLK_SEL) >> HWA_CGA_M2_CLK_SHIFT) {
+   case 1:
+   sys_info->freq_sdhc = freq_c_pll[1];
+   break;
+   case 2:
+   sys_info->freq_sdhc = freq_c_pll[1] / 2;
+   break;
+   case 3:
+   sys_info->freq_sdhc = freq_c_pll[1] / 3;
+   break;
+   case 6:
+   sys_info->freq_sdhc = freq_c_pll[0] / 2;
+   break;
+   default:
+   printf("Error: Unknown ESDHC clock select!\n");
+   break;
+   }
 #else
sys_info->freq_sdhc = sys_info->freq_systembus;
 #endif
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/ls1046a_serdes.c 
b/arch/arm/cpu/armv8/fsl-layerscape/ls1046a_serdes.c
new file mode 100644
index 000..1da6b71
--- /dev/null
+++ b/arch/arm/cpu/armv8/fsl-layerscape/ls1046a_serdes.c
@@ -0,0 +1,99 @@
+/*
+ * Copyright 2016 Freescale Semiconductor, Inc.
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include 
+#include 
+#include 
+
+struct serdes_config {
+   u32 protocol;
+   u8 lanes[SRDS_MAX_LANES];
+};
+
+static struct serdes_config serdes1_cfg_tbl[] = {
+   /* SerDes 1 */
+   {0x, {SGMII_FM1_DTSEC9, SGMII_FM1_DTSEC10, SGMII_FM1_DTSEC5,
+ SGMII_FM1_DTSEC6} },
+   {0x1133, {XFI_FM1_MAC9, XFI_FM1_MAC10, SGMII_FM1_DTSEC5,
+ SGMII_FM1_DTSEC6} },
+   {0x1333, {XFI_FM1_MAC9, SGMII_FM1_DTSEC10, SGMII_FM1_DTSEC5,
+ 

[U-Boot] [PATCH 1/3] armv8: fsl-layerscape: Add A72 core detection

[Gong Qianyu]

From: Alison Wang 

Signed-off-by: Alison Wang 
Signed-off-by: Mingkai Hu 
Signed-off-by: Gong Qianyu 

diff --git a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c 
b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
index 8062106..b810d01 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
@@ -558,7 +558,8 @@ int print_cpuinfo(void)
printf("CPU%d(%s):%-4s MHz  ", core,
   type == TY_ITYP_VER_A7 ? "A7 " :
   (type == TY_ITYP_VER_A53 ? "A53" :
-   (type == TY_ITYP_VER_A57 ? "A57" : "   ")),
+  (type == TY_ITYP_VER_A57 ? "A57" :
+  (type == TY_ITYP_VER_A72 ? "A72" : "   "))),
   strmhz(buf, sysinfo.freq_processor[core]));
}
printf("\n   Bus:  %-4s MHz  ",
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h 
b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h
index 8b8a7c1..cbb252c 100644
--- a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h
@@ -94,6 +94,7 @@
 #define TY_ITYP_VER_A7  0x1
 #define TY_ITYP_VER_A53 0x2
 #define TY_ITYP_VER_A57 0x3
+#define TY_ITYP_VER_A720x4
 
 #define TP_CLUSTER_EOC 0xc000  /* end of clusters */
 #define TP_CLUSTER_INIT_MASK0x003f  /* initiator mask */
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h 
b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h
index 3ad46eb..4d54ab2 100644
--- a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h
@@ -156,6 +156,7 @@
 #define TY_ITYP_VER_A7 0x1
 #define TY_ITYP_VER_A530x2
 #define TY_ITYP_VER_A570x3
+#define TY_ITYP_VER_A720x4
 
 #define TP_CLUSTER_EOC 0x8000  /* end of clusters */
 #define TP_CLUSTER_INIT_MASK   0x003f  /* initiator mask */
-- 
2.1.0.27.g96db324

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[U-Boot] [PATCH 3/3] armv8/ls1046a: Add Fman support

[Gong Qianyu]

From: Mingkai Hu 

Signed-off-by: Shaohui Xie 
Signed-off-by: Mingkai Hu 
Signed-off-by: Gong Qianyu 

diff --git a/drivers/net/fm/Makefile b/drivers/net/fm/Makefile
index 493cdc6..344fbe2 100644
--- a/drivers/net/fm/Makefile
+++ b/drivers/net/fm/Makefile
@@ -39,3 +39,4 @@ obj-$(CONFIG_PPC_T4080) += t4240.o
 obj-$(CONFIG_PPC_B4420) += b4860.o
 obj-$(CONFIG_PPC_B4860) += b4860.o
 obj-$(CONFIG_LS1043A)  += ls1043.o
+obj-$(CONFIG_LS1046A)  += ls1046.o
diff --git a/drivers/net/fm/ls1046.c b/drivers/net/fm/ls1046.c
new file mode 100644
index 000..bf4
--- /dev/null
+++ b/drivers/net/fm/ls1046.c
@@ -0,0 +1,123 @@
+/*
+ * Copyright 2016 Freescale Semiconductor, Inc.
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#define FSL_CHASSIS2_RCWSR13_EC1   0xe000 /* bits 416..418 */
+#define FSL_CHASSIS2_RCWSR13_EC1_DTSEC3_RGMII  0x
+#define FSL_CHASSIS2_RCWSR13_EC1_GPIO  0x2000
+#define FSL_CHASSIS2_RCWSR13_EC1_FTM   0xa000
+#define FSL_CHASSIS2_RCWSR13_EC2   0x1c00 /* bits 419..421 */
+#define FSL_CHASSIS2_RCWSR13_EC2_DTSEC4_RGMII  0x
+#define FSL_CHASSIS2_RCWSR13_EC2_GPIO  0x0400
+#define FSL_CHASSIS2_RCWSR13_EC2_1588  0x0800
+#define FSL_CHASSIS2_RCWSR13_EC2_FTM   0x1400
+
+u32 port_to_devdisr[] = {
+   [FM1_DTSEC1] = FSL_CHASSIS2_DEVDISR2_DTSEC1_1,
+   [FM1_DTSEC2] = FSL_CHASSIS2_DEVDISR2_DTSEC1_2,
+   [FM1_DTSEC3] = FSL_CHASSIS2_DEVDISR2_DTSEC1_3,
+   [FM1_DTSEC4] = FSL_CHASSIS2_DEVDISR2_DTSEC1_4,
+   [FM1_DTSEC5] = FSL_CHASSIS2_DEVDISR2_DTSEC1_5,
+   [FM1_DTSEC6] = FSL_CHASSIS2_DEVDISR2_DTSEC1_6,
+   [FM1_DTSEC9] = FSL_CHASSIS2_DEVDISR2_DTSEC1_9,
+   [FM1_DTSEC10] = FSL_CHASSIS2_DEVDISR2_DTSEC1_10,
+   [FM1_10GEC1] = FSL_CHASSIS2_DEVDISR2_10GEC1_1,
+   [FM1_10GEC2] = FSL_CHASSIS2_DEVDISR2_10GEC1_2,
+   [FM1_10GEC3] = FSL_CHASSIS2_DEVDISR2_10GEC1_3,
+   [FM1_10GEC4] = FSL_CHASSIS2_DEVDISR2_10GEC1_4,
+};
+
+static int is_device_disabled(enum fm_port port)
+{
+   struct ccsr_gur *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR);
+   u32 devdisr2 = in_be32(>devdisr2);
+
+   return port_to_devdisr[port] & devdisr2;
+}
+
+void fman_disable_port(enum fm_port port)
+{
+   struct ccsr_gur *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR);
+
+   setbits_be32(>devdisr2, port_to_devdisr[port]);
+}
+
+phy_interface_t fman_port_enet_if(enum fm_port port)
+{
+   struct ccsr_gur *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR);
+   u32 rcwsr13 = in_be32(>rcwsr[13]);
+
+   if (is_device_disabled(port))
+   return PHY_INTERFACE_MODE_NONE;
+
+   if ((port == FM1_10GEC1) && (is_serdes_configured(XFI_FM1_MAC9)))
+   return PHY_INTERFACE_MODE_XGMII;
+
+   if ((port == FM1_DTSEC9) && (is_serdes_configured(XFI_FM1_MAC9)))
+   return PHY_INTERFACE_MODE_NONE;
+
+   if ((port == FM1_10GEC2) && (is_serdes_configured(XFI_FM1_MAC10)))
+   return PHY_INTERFACE_MODE_XGMII;
+
+   if ((port == FM1_DTSEC10) && (is_serdes_configured(XFI_FM1_MAC10)))
+   return PHY_INTERFACE_MODE_NONE;
+
+   if (port == FM1_DTSEC3)
+   if ((rcwsr13 & FSL_CHASSIS2_RCWSR13_EC1) ==
+   FSL_CHASSIS2_RCWSR13_EC1_DTSEC3_RGMII)
+   return PHY_INTERFACE_MODE_RGMII;
+
+   if (port == FM1_DTSEC4)
+   if ((rcwsr13 & FSL_CHASSIS2_RCWSR13_EC2) ==
+   FSL_CHASSIS2_RCWSR13_EC2_DTSEC4_RGMII)
+   return PHY_INTERFACE_MODE_RGMII;
+
+   /* handle SGMII, only MAC 2/5/6/9/10 available */
+   switch (port) {
+   case FM1_DTSEC2:
+   case FM1_DTSEC5:
+   case FM1_DTSEC6:
+   case FM1_DTSEC9:
+   case FM1_DTSEC10:
+   if (is_serdes_configured(SGMII_FM1_DTSEC2 + port - FM1_DTSEC2))
+   return PHY_INTERFACE_MODE_SGMII;
+   break;
+   default:
+   break;
+   }
+
+   /* handle 2.5G SGMII, only MAC 5/9/10 available */
+   switch (port) {
+   case FM1_DTSEC5:
+   case FM1_DTSEC9:
+   case FM1_DTSEC10:
+   if (is_serdes_configured(SGMII_2500_FM1_DTSEC5 +
+port - FM1_DTSEC5))
+   return PHY_INTERFACE_MODE_SGMII_2500;
+   break;
+   default:
+   break;
+   }
+
+   /* handle QSGMII, only MAC 1/5/6/10 available */
+   switch (port) {
+   case FM1_DTSEC1:
+   case FM1_DTSEC5:
+   case FM1_DTSEC6:
+   case FM1_DTSEC10:
+   if (is_serdes_configured(QSGMII_FM1_A))
+   return PHY_INTERFACE_MODE_QSGMII;
+   break;
+   default:
+   break;
+   }
+
+   return PHY_INTERFACE_MODE_NONE;
+}
-- 

[U-Boot] [PATCH 0/3] armv8: fsl-layerscape: Add LS1046A SoC support

[Gong Qianyu]

The LS1046A processor is built on the QorIQ LS series architecture
combining four ARM A72 processor cores with DPAA 1.0 support.


[PATCH 1/3] armv8: fsl-layerscape: Add A72 core detection
[PATCH 2/3] armv8/fsl_lsch2: Add LS1046A SoC support
[PATCH 3/3] armv8/ls1046a: Add Fman support


Regards,
Qianyu
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Re: [U-Boot] [PATCH 00/15] ARM: PSCI: Add secure stack and data sections

[Hongbo Zhang]

I like the idea of secure stack and secure data section.
I'd like to test this patch set, but only the psci common part and
freescale platform's changes will be covered.


On Sun, Jun 19, 2016 at 12:38 PM, Chen-Yu Tsai  wrote:
> Hi everyone,
>
> This is ARM PSCI improvements part 2. This series cleans up PSCI stack
> allocation and target PC storage by introducing a secure stack section
> and a secure data section.
>
> The series got larger than I planned. Some patches are just moving or
> consolidating code, and a few are adding missing macros. It's based on
> v3 of my "sunxi: PSCI implementation rewrite in C" series from earlier.
>
>
> Patch 1 consolidates the stack setup code from all the PSCI-enabled
> platforms (which likely originated from the initial sunxi version) into
> a common function, and moves it into a seperate common function that
> is called before psci_arch_init. A weak stub psci_arch_init is added
> for platforms that no longer need a custom version.
>
> Patch 2 converts the remaining sunxi PSCI assembly code into C.
>
> Patch 3 adds the missing CONFIG_ARMV7_PSCI_NR_CPUS=2 for sun7i/A20.
>
> Patch 4 makes the linker page align PSCI text only when it is directly
> executed, i.e. not copied to CONFIG_ARMV7_SECURE_BASE.
>
> Patch 5 adds a fallback value for CONFIG_ARMV7_PSCI_NR_CPUS. The value
> is 4, which was the fixed maximum number of stacks allocated.
>
> Patch 6 adds an empty stack section for the secure monitor.
>
> Patch 7 has PSCI allocate its stack in the new secure stack section.
>
> Patch 8 removes the now unused psci_text_end symbol. This was previously
> used to find where to allocate the stack.
>
> Patch 9 adds a config variable for specifying the maximum size of the
> secure section (text, data, stack, etc.) and checks if the binary
> exceeds it.
>
> Patch 10 defines CONFIG_ARMV7_SECURE_MAX_SIZE for sun6i/sun7i (A31/A20),
> Allwinner SoCs that have a block of secure SRAM.
>
> Patch 11 moves the __secure macro to asm/secure.h. Previously sunxi and
> i.MX7 were defining it themselves.
>
> Patch 12 adds a secure data section, and a __secure_data macro.
>
> Patch 13 adds helper functions to save and get per-CPU target PC addresses
> for use in PSCI.
>
> Patch 14 converts all PSCI-enabled platforms to the new helper functions
> to save/get target PC addresses.
>
> Patch 15 makes the psci_get_cpu_stack_top function local/static. This
> function should only be used by the stack setup routine.
>
>
> Regards
> ChenYu
>
>
> Chen-Yu Tsai (15):
>   ARM: PSCI: Split out common stack setup code from psci_arch_init
>   sunxi: Move remaining PSCI assembly code to C
>   sunxi: Add missing CONFIG_ARMV7_PSCI_NR_CPUS for sun7i
>   ARM: Page align secure section only when it is executed in situ
>   ARM: PSCI: Add fallback value for CONFIG_ARMV7_PSCI_NR_CPUS
>   ARM: Add an empty secure stack section
>   ARM: PSCI: Allocate PSCI stack in secure stack section
>   ARM: PSCI: Remove unused psci_text_end symbol
>   ARM: Add CONFIG_ARMV7_SECURE_MAX_SIZE and check size of secure section
>   sunxi: Define CONFIG_ARMV7_SECURE_MAX_SIZE for sun6i/sun7i
>   ARM: Move __secure definition to common asm/secure.h
>   ARM: Add secure section for initialized data
>   ARM: PSCI: Add helper functions to access per-CPU target PC storage
>   ARM: PSCI: Switch to per-CPU target PC storage in secure data section
>   ARM: PSCI: Make psci_get_cpu_stack_top local to armv7/psci.S
>
>  arch/arm/cpu/armv7/Makefile  |  1 +
>  arch/arm/cpu/armv7/ls102xa/psci.S| 26 --
>  arch/arm/cpu/armv7/mx7/psci-mx7.c|  2 +-
>  arch/arm/cpu/armv7/mx7/psci.S| 31 +
>  arch/arm/cpu/armv7/nonsec_virt.S |  7 +++-
>  arch/arm/cpu/armv7/psci-common.c | 39 +
>  arch/arm/cpu/armv7/psci.S| 55 ++
>  arch/arm/cpu/armv7/sunxi/Makefile|  1 -
>  arch/arm/cpu/armv7/sunxi/psci.c  |  9 +++--
>  arch/arm/cpu/armv7/sunxi/psci_head.S | 66 
> 
>  arch/arm/cpu/u-boot.lds  | 60 +---
>  arch/arm/include/asm/armv7.h |  2 ++
>  arch/arm/include/asm/config.h|  5 +++
>  arch/arm/include/asm/psci.h  |  9 -
>  arch/arm/include/asm/secure.h|  3 ++
>  arch/arm/lib/sections.c  |  2 ++
>  arch/arm/mach-tegra/psci.S   | 16 -
>  include/configs/sun6i.h  |  1 +
>  include/configs/sun7i.h  |  2 ++
>  19 files changed, 183 insertions(+), 154 deletions(-)
>  create mode 100644 arch/arm/cpu/armv7/psci-common.c
>  delete mode 100644 arch/arm/cpu/armv7/sunxi/psci_head.S
>
> --
> 2.8.1
>
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Re: [U-Boot] [PATCH] armv8: Enable CPUECTLR.SMPEN for data coherency

[Masahiro Yamada]

Hi.



2016-06-30 17:51 GMT+09:00 Gong Qianyu :
> From: Mingkai Hu 
>
> Data coherency is enabled only when the CPUECTLR.SMPEN bit is
> set. The SMPEN bit should be set before enabling the data cache.
> If not enabled, the cache is not coherent with other cores and
> data corruption could occur.
>
> Signed-off-by: Mingkai Hu 
> Signed-off-by: Gong Qianyu 
>
> diff --git a/arch/arm/cpu/armv8/start.S b/arch/arm/cpu/armv8/start.S
> index 670e323..735dd67 100644
> --- a/arch/arm/cpu/armv8/start.S
> +++ b/arch/arm/cpu/armv8/start.S
> @@ -81,6 +81,11 @@ reset:
> msr cpacr_el1, x0   /* Enable FP/SIMD */
>  0:
>
> +   /* Enalbe SMPEN bit */
> +   mrs x0, S3_1_c15_c2_1   /* cpuactlr_el1 */
> +   orr x0, x0, #0x40
> +   msr S3_1_c15_c2_1, x0
> +
> /* Apply ARM core specific erratas */
> bl  apply_core_errata
>


I guess this code is necessary in U-Boot
if we want to boot the system without ARM Trusted Firmware.


I can see equivalent code only in
arch/arm/mach-uniphier/arm64/smp.S   (my SoC)

So, I guess all of the other SoCs use ATF
and setup this register there.


One more thing, I could find the description about this register
only in each Cortex-A* TRM, but not in v8 ARM ARM.

However, I assume this register exists in all of ARMv8 variants.
(but I am not 100% sure because I am not an expert in this area.)

Otherwise, this patch looks good to me
(and if it is accepted, I can remove equivalent code from my local file)

Reviewed-by: Masahiro Yamada 



-- 
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Masahiro Yamada
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[U-Boot] [PATCH] armv8: Enable CPUECTLR.SMPEN for data coherency

[Gong Qianyu]

From: Mingkai Hu 

Data coherency is enabled only when the CPUECTLR.SMPEN bit is
set. The SMPEN bit should be set before enabling the data cache.
If not enabled, the cache is not coherent with other cores and
data corruption could occur.

Signed-off-by: Mingkai Hu 
Signed-off-by: Gong Qianyu 

diff --git a/arch/arm/cpu/armv8/start.S b/arch/arm/cpu/armv8/start.S
index 670e323..735dd67 100644
--- a/arch/arm/cpu/armv8/start.S
+++ b/arch/arm/cpu/armv8/start.S
@@ -81,6 +81,11 @@ reset:
msr cpacr_el1, x0   /* Enable FP/SIMD */
 0:
 
+   /* Enalbe SMPEN bit */
+   mrs x0, S3_1_c15_c2_1   /* cpuactlr_el1 */
+   orr x0, x0, #0x40
+   msr S3_1_c15_c2_1, x0
+
/* Apply ARM core specific erratas */
bl  apply_core_errata
 
-- 
2.1.0.27.g96db324

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Re: [U-Boot] [PATCH] sf: set the Uniform Sector to CR3NV instead of CR3V

[Mingkai Hu]

From: Michael Trimarchi [mailto:mich...@amarulasolutions.com]
Sent: Thursday, June 30, 2016 2:50 PM
To: Qianyu Gong
Cc: Mingkai Hu; u-boot@lists.denx.de; Yunhui Cui; jt...@openedev.com
Subject: Re: [U-Boot] [PATCH] sf: set the Uniform Sector to CR3NV instead of 
CR3V


Hi

On Jun 30, 2016 08:47, "Gong Qianyu" 
> wrote:
>
> From: Mingkai Hu >
>
> Set the flash to Uniform Sector Architecture in the non-volatile
> register. After the power cycle, it's also Uniform Sector Architecture.
>
> Signed-off-by: Mingkai Hu >
> Signed-off-by: Gong Qianyu >
>
> diff --git a/drivers/mtd/spi/spi_flash.c b/drivers/mtd/spi/spi_flash.c
> index 64d4e0f..366c362 100644
> --- a/drivers/mtd/spi/spi_flash.c
> +++ b/drivers/mtd/spi/spi_flash.c
> @@ -975,7 +975,7 @@ int spi_flash_decode_fdt(const void *blob, struct 
> spi_flash *flash)
>  static int spansion_s25fss_disable_4KB_erase(struct spi_slave *spi)
>  {
> u8 cmd[4];
> -   u32 offset = 0x84; /* CR3V register offset */
> +   u32 offset = 0x4; /* CR3NV register offset */
> u8 cr3v;
> int ret;
>

I have already tested it and I have in my tree.

What does this mean?

I don't think that should be mandatory in general

The general code doesn’t handle different sector operation, so need to set it 
as uniform sector architecture.

Michael

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>
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Re: [U-Boot] [PATCH] SPL: sunxi: don't force .BSS into DRAM

[Andre Przywara]

Hi Marek,

On 30/06/16 02:54, Marek Vasut wrote:
> On 06/30/2016 02:29 AM, Andre Przywara wrote:
>> Probably due to some (ill-founded) fear of a large BSS all sunxi boards
>> forced their SPL BSS section into DRAM.
>> This only works if there is no usage of a .BSS variable before the DRAM
>> is initialised.
>> The recent inclusion of tiny-printf breaks this assumption (it has two
>> variables in .BSS), so any early printf (printing a number) hangs a board.
> 
> I believe you should fix tiny-printf instead, try this patch:

Mmmh, that looks like a hack to paper over another hack for me. I don't
think we should start to annotate seemingly random variables (at least
in the code) just to cover up for some linker hack.
And frankly, having bss in initially inaccessible memory without
documenting this or enforcing sanity checks to catch those cases like
tiny-printf seems quite hacky to me.
Also if I am not mistaken we don't actually clear BSS for the SPL?

I could live with some compiler switch or linker script snippet to avoid
using BSS variables for the SPL (or parts of it, at least).

Or we provide a per SoC BSS offset to utilise other SRAM locations and
use that for BSS.

> diff --git a/lib/tiny-printf.c b/lib/tiny-printf.c
> index 451f4f7..5b9b0dc 100644
> --- a/lib/tiny-printf.c
> +++ b/lib/tiny-printf.c
> @@ -17,7 +17,7 @@ static char *bf;
>  static char zs;
> 
>  /* Current position in sprintf() output string */
> -static char *outstr;
> +static char *outstr __section(".data");

To prove my debugging theory I initialised _both_ those variables to 1,
that also worked. But definitely you need to cover "zs" as well.

> 
>  static void out(char c)
>  {
> 
>> This in particular breaks the (WIP) Pine64 SPL, which at the moment links
>> Allwinner's libdram library, trying to print debug information:
>> DRAM:DRAM driver version: V1.0
>> DRAM Type = 
>>
>> As it turns out the normal BSS size for sunxi is about 256 Bytes, so we
>> can happily remove the symbols and the linker script part that was
>> forcing the section into DRAM and let the linker naturally put it into
>> SRAM.
> 
> Except SRAM is limited, which is why bss was in DRAM.

Except that DRAM is not available initially ;-)

Cheers,
Andre.

> 
>> Tested on BananaPi M1 and Pine64(-SPL), also buildman sunxi was happy.
>>
>> Thanks to Siarhei for providing helpful hints!
>>
>> Signed-off-by: Andre Przywara 
>> ---
>>
>> (and now with the list in CC: as well) ...
>>
>>  arch/arm/cpu/armv7/sunxi/u-boot-spl.lds | 4 +---
>>  include/configs/sunxi-common.h  | 4 
>>  2 files changed, 1 insertion(+), 7 deletions(-)
>>
>> diff --git a/arch/arm/cpu/armv7/sunxi/u-boot-spl.lds 
>> b/arch/arm/cpu/armv7/sunxi/u-boot-spl.lds
>> index 53f0cbd..a90404f 100644
>> --- a/arch/arm/cpu/armv7/sunxi/u-boot-spl.lds
>> +++ b/arch/arm/cpu/armv7/sunxi/u-boot-spl.lds
>> @@ -16,8 +16,6 @@
>>   */
>>  MEMORY { .sram : ORIGIN = CONFIG_SPL_TEXT_BASE,\
>>  LENGTH = CONFIG_SPL_MAX_SIZE }
>> -MEMORY { .sdram : ORIGIN = CONFIG_SPL_BSS_START_ADDR, \
>> -LENGTH = CONFIG_SPL_BSS_MAX_SIZE }
>>  
>>  OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
>>  OUTPUT_ARCH(arm)
>> @@ -54,5 +52,5 @@ SECTIONS
>>  *(.bss*)
>>  . = ALIGN(4);
>>  __bss_end = .;
>> -} > .sdram
>> +} > .sram
>>  }
>> diff --git a/include/configs/sunxi-common.h b/include/configs/sunxi-common.h
>> index 94275a7..e3fe965 100644
>> --- a/include/configs/sunxi-common.h
>> +++ b/include/configs/sunxi-common.h
>> @@ -75,7 +75,6 @@
>>   * since it needs to fit in with the other values. By also #defining it
>>   * we get warnings if the Kconfig value mismatches. */
>>  #define CONFIG_SPL_STACK_R_ADDR 0x2fe0
>> -#define CONFIG_SPL_BSS_START_ADDR   0x2ff8
>>  #else
>>  #define SDRAM_OFFSET(x) 0x4##x
>>  #define CONFIG_SYS_SDRAM_BASE   0x4000
>> @@ -86,11 +85,8 @@
>>   * since it needs to fit in with the other values. By also #defining it
>>   * we get warnings if the Kconfig value mismatches. */
>>  #define CONFIG_SPL_STACK_R_ADDR 0x4fe0
>> -#define CONFIG_SPL_BSS_START_ADDR   0x4ff8
>>  #endif
>>  
>> -#define CONFIG_SPL_BSS_MAX_SIZE 0x0008 /* 512 KiB */
>> -
>>  #if defined(CONFIG_MACH_SUN9I) || defined(CONFIG_MACH_SUN50I)
>>  /*
>>   * The A80's A1 sram starts at 0x0001 rather then at 0x and is
>>
> 
> 
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Re: [U-Boot] [PATCH v4 1/2] armv8: Support loading 32-bit OS in AArch32 execution state

[Alexander Graf]

On 30.06.16 09:16, Huan Wang wrote:
> Hi, Alex,
> 
>>> Am 15.06.2016 um 05:04 schrieb Huan Wang :
>>>
>>> Hi, Alex,
>>>
> On 06/08/2016 07:14 AM, Alison Wang wrote:
> To support loading a 32-bit OS, the execution state will change from
> AArch64 to AArch32 when jumping to kernel.
>
> The architecture information will be got through checking FIT image,
> then U-Boot will load 32-bit OS or 64-bit OS automatically.
>
> Signed-off-by: Ebony Zhu 
> Signed-off-by: Alison Wang 
> Signed-off-by: Chenhui Zhao 
> ---
> Changes in v4:
> - Correct config ARM64_SUPPORT_AARCH32.
> - Omit arch and ftaddr arguments.
> - Rename "xreg5" to "tmp".
> - Use xxx_RES1 to combine all RES1 fields in xxx register.
> - Use an immediate cmp directly.
> - Use #ifdef for CONFIG_ARM64_SUPPORT_AARCH32.
>
> Changes in v3:
> - Comments the functions and the arguments.
> - Rename the real parameters.
> - Use the macros instead of the magic values.
> - Remove the redundant codes.
> - Clean up all of the mess in boot_jump_linux().
> - Add CONFIG_ARM64_SUPPORT_AARCH32 to detect for some ARM64 system
 doesn't support AArch32 state.
>
> Changes in v2:
> - armv8_switch_to_el2_aarch32() is removed. armv8_switch_to_el2_m is
 used
>   to switch to AArch64 EL2 or AArch32 Hyp.
> - armv8_switch_to_el1_aarch32() is removed. armv8_switch_to_el1_m is
 used
>   to switch to AArch64 EL1 or AArch32 SVC.
>
>  arch/arm/Kconfig|   6 ++
>  arch/arm/cpu/armv8/start.S  |   1 +
>  arch/arm/cpu/armv8/transition.S |   8 +-
>  arch/arm/include/asm/macro.h| 172
 ++--
>  arch/arm/include/asm/system.h   | 111 +-
>  arch/arm/lib/bootm.c|  19 -
>  common/image-fit.c  |  19 -
>  7 files changed, 284 insertions(+), 52 deletions(-)
>
> diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index
> 77eab66..9cf4acd 100644
> --- a/arch/arm/Kconfig
> +++ b/arch/arm/Kconfig
> @@ -91,6 +91,12 @@ config SYS_L2CACHE_OFF
>If SoC does not support L2CACHE or one do not want to enable
>L2CACHE, choose this option.
>
> +config ARM64_SUPPORT_AARCH32
> +bool "ARM64 system support AArch32 execution state"
> +default y if ARM64 && !TARGET_THUNDERX_88XX
> +help
> +  This ARM64 system supports AArch32 execution state.
> +
>  choice
>  prompt "Target select"
>  default TARGET_HIKEY
> diff --git a/arch/arm/cpu/armv8/start.S b/arch/arm/cpu/armv8/start.S
> index e933021..dd69501 100644
> --- a/arch/arm/cpu/armv8/start.S
> +++ b/arch/arm/cpu/armv8/start.S
> @@ -234,6 +234,7 @@ WEAK(lowlevel_init)
>  /*
>   * All slaves will enter EL2 and optionally EL1.
>   */
> +ldrx3, =ES_TO_AARCH64
>  blarmv8_switch_to_el2
>  #ifdef CONFIG_ARMV8_SWITCH_TO_EL1
>  blarmv8_switch_to_el1
> diff --git a/arch/arm/cpu/armv8/transition.S
 b/arch/arm/cpu/armv8/transition.S
> index 253a39b..e61b6ae 100644
> --- a/arch/arm/cpu/armv8/transition.S
> +++ b/arch/arm/cpu/armv8/transition.S
> @@ -11,13 +11,13 @@
>  #include 
>
>  ENTRY(armv8_switch_to_el2)
> -switch_el x0, 1f, 0f, 0f
> +switch_el x4, 1f, 0f, 0f
>  0:ret
> -1:armv8_switch_to_el2_m x0
> +1:armv8_switch_to_el2_m x0, x3, x4
>  ENDPROC(armv8_switch_to_el2)
>
>  ENTRY(armv8_switch_to_el1)
> -switch_el x0, 0f, 1f, 0f
> +switch_el x4, 0f, 1f, 0f
>  0:ret
> -1:armv8_switch_to_el1_m x0, x1
> +1:armv8_switch_to_el1_m x0, x3, x4
>  ENDPROC(armv8_switch_to_el1)
> diff --git a/arch/arm/include/asm/macro.h
 b/arch/arm/include/asm/macro.h
> index 9bb0efa..109724f 100644
> --- a/arch/arm/include/asm/macro.h
> +++ b/arch/arm/include/asm/macro.h
> @@ -8,6 +8,9 @@
>
>  #ifndef __ASM_ARM_MACRO_H__
>  #define __ASM_ARM_MACRO_H__
> +
> +#include 
> +
>  #ifdef __ASSEMBLY__
>
>  /*
> @@ -135,13 +138,20 @@ lr.reqx30
>  #endif
>  .endm
>
> -.macro armv8_switch_to_el2_m, xreg1
> -/* 64bit EL2 | HCE | SMD | RES1 (Bits[5:4]) | Non-secure
>> EL0/EL1
 */
> -mov\xreg1, #0x5b1
> -msrscr_el3, \xreg1
> +/*
> + * Switch from EL3 to EL2 for ARMv8
> + * @ep: kernel entry point
> + * @flag:   The execution state flag for lower exception
> + *  level, ES_TO_AARCH64 or ES_TO_AARCH32
> + * @tmp:temporary register
> + *
> + * x1 is machine nr and x2 is ftaddr, they will be passed
> + * to the guest.
> + */
> +.macro 

Re: [U-Boot] [PATCH 0/4] rockchip: rk3288: add fastboot support

[Alexander Graf]

On 30.06.16 09:21, Ziyuan Xu wrote:
> Hi,
> 
> This short series add the fastboot support for rk3288, and I have tested
> on firefly-rk3288 board.
> 
> I encounter an odd issue while debugging usb-otg ep2out-bulk data
> transfer. The buffer was always zero which mapped to DMA buffer, even
> though driver call invalidate_dcache_range() to make sure the cpu read
> memroy data directly. IMHO, dcache was abnormal after something
> initialization code.
> Everything work fine without CONFIG_EFI_LOADER. Moreover,
> invalidate_icache_all cause the issue. I'm not able to figure out why
> and explain it. But I think there is no need to enable EFI applications
> on rk3288 platform.

I disagree. Rk3288 (and especially the firefly) is actually a very
interesting platform for EFI applications like grub2.

If a full icache invalidate causes breakage, maybe in the non-efi case
you're just getting lucky because you code that got overwritten is still
in the cache.

Please keep debugging to figure out what is causing the invalid data to
go into your icache. Maybe just disable icache altogether for
verification and run checksums on the text section after every dma?


Alex
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Re: [U-Boot] [PATCH] sf: set the Uniform Sector to CR3NV instead of CR3V

[Mingkai Hu]

> -Original Message-
> From: Michael Trimarchi [mailto:mich...@amarulasolutions.com]
> Sent: Thursday, June 30, 2016 3:47 PM
> To: Mingkai Hu
> Cc: Qianyu Gong; u-boot@lists.denx.de; Yunhui Cui; jt...@openedev.com
> Subject: Re: [U-Boot] [PATCH] sf: set the Uniform Sector to CR3NV instead of
> CR3V
> 
> Hi
> 
> On Thu, Jun 30, 2016 at 9:40 AM, Mingkai Hu  wrote:
> >
> >
> >> -Original Message-
> >> From: Michael Trimarchi [mailto:mich...@amarulasolutions.com]
> >> Sent: Thursday, June 30, 2016 3:33 PM
> >> To: Mingkai Hu
> >> Cc: Qianyu Gong; u-boot@lists.denx.de; Yunhui Cui; jt...@openedev.com
> >> Subject: Re: [U-Boot] [PATCH] sf: set the Uniform Sector to CR3NV
> >> instead of CR3V
> >>
> >> Hi
> >>
> >>
> >> On Thu, Jun 30, 2016 at 9:29 AM, Mingkai Hu  wrote:
> >> >
> >> >
> >> >
> >> >
> >> > From: Michael Trimarchi [mailto:mich...@amarulasolutions.com]
> >> > Sent: Thursday, June 30, 2016 2:50 PM
> >> > To: Qianyu Gong
> >> > Cc: Mingkai Hu; u-boot@lists.denx.de; Yunhui Cui;
> >> > jt...@openedev.com
> >> > Subject: Re: [U-Boot] [PATCH] sf: set the Uniform Sector to CR3NV
> >> > instead of CR3V
> >> >
> >> >
> >> >
> >> > Hi
> >> >
> >> > On Jun 30, 2016 08:47, "Gong Qianyu"  wrote:
> >> >>
> >> >> From: Mingkai Hu 
> >> >>
> >> >> Set the flash to Uniform Sector Architecture in the non-volatile
> >> >> register. After the power cycle, it's also Uniform Sector Architecture.
> >> >>
> >> >> Signed-off-by: Mingkai Hu 
> >> >> Signed-off-by: Gong Qianyu 
> >> >>
> >> >> diff --git a/drivers/mtd/spi/spi_flash.c
> >> >> b/drivers/mtd/spi/spi_flash.c index 64d4e0f..366c362 100644
> >> >> --- a/drivers/mtd/spi/spi_flash.c
> >> >> +++ b/drivers/mtd/spi/spi_flash.c
> >> >> @@ -975,7 +975,7 @@ int spi_flash_decode_fdt(const void *blob,
> >> >> struct spi_flash *flash)  static int
> >> >> spansion_s25fss_disable_4KB_erase(struct spi_slave *spi)  {
> >> >> u8 cmd[4];
> >> >> -   u32 offset = 0x84; /* CR3V register offset */
> >> >> +   u32 offset = 0x4; /* CR3NV register offset */
> >> >> u8 cr3v;
> >> >> int ret;
> >> >>
> >> >
> >> > I have already tested it and I have in my tree.
> >> >
> >> > What does this mean?
> >> >
> >> > I don't think that should be mandatory in general
> >> >
> >> > The general code doesn’t handle different sector operation, so need
> >> > to set it as uniform sector architecture.
> >> >
> >>
> >> And what about board that does not use the flash in uboot but manage
> >> in some other way. I'm not saying that is wrong but I don't know if
> >> this setting must be no-volatile. Is it something connected from booting on
> QSPI?
> >>
> >
> > If it was not used as uniform sector architecture, the
> > spansion_s25fss_disable_4KB_erase should not be called, correct?
> >
> 
> Ok, understand what you mean. You should just probe one time during 
> development
> and if you probe means that you want it configured.
> 

Yes, and if probed but not using the uniform sector, need to add the code to 
handle
different sectors operation and do not call the function 
on_s25fss_disable_4KB_erase.

> Anyway as I said I have it in my tree. So I was just asking about permanent
> setting
> 
> 
> Michael
> 
> > Thanks,
> > Mingkai
> >
> >> >
> >> >> --
> >> >> 2.1.0.27.g96db324
> >> >>
> >> >> ___
> >> >> U-Boot mailing list
> >> >> U-Boot@lists.denx.de
> >> >> http://lists.denx.de/mailman/listinfo/u-boot
> >>
> >>
> >>
> >> --
> >> | Michael Nazzareno Trimarchi Amarula Solutions BV |
> >> | COO  -  Founder  Cruquiuskade 47 |
> >> | +31(0)851119172 Amsterdam 1018 AM NL |
> >> |  [`as] http://www.amarulasolutions.com   |
> 
> 
> 
> --
> | Michael Nazzareno Trimarchi Amarula Solutions BV |
> | COO  -  Founder  Cruquiuskade 47 |
> | +31(0)851119172 Amsterdam 1018 AM NL |
> |  [`as] http://www.amarulasolutions.com   |
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Re: [U-Boot] [PATCH] sf: set the Uniform Sector to CR3NV instead of CR3V

[Mingkai Hu]

> -Original Message-
> From: Michael Trimarchi [mailto:mich...@amarulasolutions.com]
> Sent: Thursday, June 30, 2016 3:33 PM
> To: Mingkai Hu
> Cc: Qianyu Gong; u-boot@lists.denx.de; Yunhui Cui; jt...@openedev.com
> Subject: Re: [U-Boot] [PATCH] sf: set the Uniform Sector to CR3NV instead of
> CR3V
> 
> Hi
> 
> 
> On Thu, Jun 30, 2016 at 9:29 AM, Mingkai Hu  wrote:
> >
> >
> >
> >
> > From: Michael Trimarchi [mailto:mich...@amarulasolutions.com]
> > Sent: Thursday, June 30, 2016 2:50 PM
> > To: Qianyu Gong
> > Cc: Mingkai Hu; u-boot@lists.denx.de; Yunhui Cui; jt...@openedev.com
> > Subject: Re: [U-Boot] [PATCH] sf: set the Uniform Sector to CR3NV
> > instead of CR3V
> >
> >
> >
> > Hi
> >
> > On Jun 30, 2016 08:47, "Gong Qianyu"  wrote:
> >>
> >> From: Mingkai Hu 
> >>
> >> Set the flash to Uniform Sector Architecture in the non-volatile
> >> register. After the power cycle, it's also Uniform Sector Architecture.
> >>
> >> Signed-off-by: Mingkai Hu 
> >> Signed-off-by: Gong Qianyu 
> >>
> >> diff --git a/drivers/mtd/spi/spi_flash.c
> >> b/drivers/mtd/spi/spi_flash.c index 64d4e0f..366c362 100644
> >> --- a/drivers/mtd/spi/spi_flash.c
> >> +++ b/drivers/mtd/spi/spi_flash.c
> >> @@ -975,7 +975,7 @@ int spi_flash_decode_fdt(const void *blob, struct
> >> spi_flash *flash)  static int
> >> spansion_s25fss_disable_4KB_erase(struct spi_slave *spi)  {
> >> u8 cmd[4];
> >> -   u32 offset = 0x84; /* CR3V register offset */
> >> +   u32 offset = 0x4; /* CR3NV register offset */
> >> u8 cr3v;
> >> int ret;
> >>
> >
> > I have already tested it and I have in my tree.
> >
> > What does this mean?
> >
> > I don't think that should be mandatory in general
> >
> > The general code doesn’t handle different sector operation, so need to
> > set it as uniform sector architecture.
> >
> 
> And what about board that does not use the flash in uboot but manage in some
> other way. I'm not saying that is wrong but I don't know if this setting must 
> be
> no-volatile. Is it something connected from booting on QSPI?
> 

If it was not used as uniform sector architecture, the 
spansion_s25fss_disable_4KB_erase
should not be called, correct?

Thanks,
Mingkai

> >
> >> --
> >> 2.1.0.27.g96db324
> >>
> >> ___
> >> U-Boot mailing list
> >> U-Boot@lists.denx.de
> >> http://lists.denx.de/mailman/listinfo/u-boot
> 
> 
> 
> --
> | Michael Nazzareno Trimarchi Amarula Solutions BV |
> | COO  -  Founder  Cruquiuskade 47 |
> | +31(0)851119172 Amsterdam 1018 AM NL |
> |  [`as] http://www.amarulasolutions.com   |
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Re: [U-Boot] [PATCH] sf: set the Uniform Sector to CR3NV instead of CR3V

[Michael Trimarchi]

Hi

On Thu, Jun 30, 2016 at 9:40 AM, Mingkai Hu  wrote:
>
>
>> -Original Message-
>> From: Michael Trimarchi [mailto:mich...@amarulasolutions.com]
>> Sent: Thursday, June 30, 2016 3:33 PM
>> To: Mingkai Hu
>> Cc: Qianyu Gong; u-boot@lists.denx.de; Yunhui Cui; jt...@openedev.com
>> Subject: Re: [U-Boot] [PATCH] sf: set the Uniform Sector to CR3NV instead of
>> CR3V
>>
>> Hi
>>
>>
>> On Thu, Jun 30, 2016 at 9:29 AM, Mingkai Hu  wrote:
>> >
>> >
>> >
>> >
>> > From: Michael Trimarchi [mailto:mich...@amarulasolutions.com]
>> > Sent: Thursday, June 30, 2016 2:50 PM
>> > To: Qianyu Gong
>> > Cc: Mingkai Hu; u-boot@lists.denx.de; Yunhui Cui; jt...@openedev.com
>> > Subject: Re: [U-Boot] [PATCH] sf: set the Uniform Sector to CR3NV
>> > instead of CR3V
>> >
>> >
>> >
>> > Hi
>> >
>> > On Jun 30, 2016 08:47, "Gong Qianyu"  wrote:
>> >>
>> >> From: Mingkai Hu 
>> >>
>> >> Set the flash to Uniform Sector Architecture in the non-volatile
>> >> register. After the power cycle, it's also Uniform Sector Architecture.
>> >>
>> >> Signed-off-by: Mingkai Hu 
>> >> Signed-off-by: Gong Qianyu 
>> >>
>> >> diff --git a/drivers/mtd/spi/spi_flash.c
>> >> b/drivers/mtd/spi/spi_flash.c index 64d4e0f..366c362 100644
>> >> --- a/drivers/mtd/spi/spi_flash.c
>> >> +++ b/drivers/mtd/spi/spi_flash.c
>> >> @@ -975,7 +975,7 @@ int spi_flash_decode_fdt(const void *blob, struct
>> >> spi_flash *flash)  static int
>> >> spansion_s25fss_disable_4KB_erase(struct spi_slave *spi)  {
>> >> u8 cmd[4];
>> >> -   u32 offset = 0x84; /* CR3V register offset */
>> >> +   u32 offset = 0x4; /* CR3NV register offset */
>> >> u8 cr3v;
>> >> int ret;
>> >>
>> >
>> > I have already tested it and I have in my tree.
>> >
>> > What does this mean?
>> >
>> > I don't think that should be mandatory in general
>> >
>> > The general code doesn’t handle different sector operation, so need to
>> > set it as uniform sector architecture.
>> >
>>
>> And what about board that does not use the flash in uboot but manage in some
>> other way. I'm not saying that is wrong but I don't know if this setting 
>> must be
>> no-volatile. Is it something connected from booting on QSPI?
>>
>
> If it was not used as uniform sector architecture, the 
> spansion_s25fss_disable_4KB_erase
> should not be called, correct?
>

Ok, understand what you mean. You should just probe one time during
development and if you probe means that you want it configured.

Anyway as I said I have it in my tree. So I was just asking about
permanent setting


Michael

> Thanks,
> Mingkai
>
>> >
>> >> --
>> >> 2.1.0.27.g96db324
>> >>
>> >> ___
>> >> U-Boot mailing list
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>> >> http://lists.denx.de/mailman/listinfo/u-boot
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>>
>>
>> --
>> | Michael Nazzareno Trimarchi Amarula Solutions BV |
>> | COO  -  Founder  Cruquiuskade 47 |
>> | +31(0)851119172 Amsterdam 1018 AM NL |
>> |  [`as] http://www.amarulasolutions.com   |



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| COO  -  Founder  Cruquiuskade 47 |
| +31(0)851119172 Amsterdam 1018 AM NL |
|  [`as] http://www.amarulasolutions.com   |
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Re: [U-Boot] [PATCH] sf: set the Uniform Sector to CR3NV instead of CR3V

[Michael Trimarchi]

Hi


On Thu, Jun 30, 2016 at 9:29 AM, Mingkai Hu  wrote:
>
>
>
>
> From: Michael Trimarchi [mailto:mich...@amarulasolutions.com]
> Sent: Thursday, June 30, 2016 2:50 PM
> To: Qianyu Gong
> Cc: Mingkai Hu; u-boot@lists.denx.de; Yunhui Cui; jt...@openedev.com
> Subject: Re: [U-Boot] [PATCH] sf: set the Uniform Sector to CR3NV instead of
> CR3V
>
>
>
> Hi
>
> On Jun 30, 2016 08:47, "Gong Qianyu"  wrote:
>>
>> From: Mingkai Hu 
>>
>> Set the flash to Uniform Sector Architecture in the non-volatile
>> register. After the power cycle, it's also Uniform Sector Architecture.
>>
>> Signed-off-by: Mingkai Hu 
>> Signed-off-by: Gong Qianyu 
>>
>> diff --git a/drivers/mtd/spi/spi_flash.c b/drivers/mtd/spi/spi_flash.c
>> index 64d4e0f..366c362 100644
>> --- a/drivers/mtd/spi/spi_flash.c
>> +++ b/drivers/mtd/spi/spi_flash.c
>> @@ -975,7 +975,7 @@ int spi_flash_decode_fdt(const void *blob, struct
>> spi_flash *flash)
>>  static int spansion_s25fss_disable_4KB_erase(struct spi_slave *spi)
>>  {
>> u8 cmd[4];
>> -   u32 offset = 0x84; /* CR3V register offset */
>> +   u32 offset = 0x4; /* CR3NV register offset */
>> u8 cr3v;
>> int ret;
>>
>
> I have already tested it and I have in my tree.
>
> What does this mean?
>
> I don't think that should be mandatory in general
>
> The general code doesn’t handle different sector operation, so need to set
> it as uniform sector architecture.
>

And what about board that does not use the flash in uboot but manage
in some other way. I'm not saying that
is wrong but I don't know if this setting must be no-volatile. Is it
something connected from booting on QSPI?

Michael

> Michael
>
>> --
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[U-Boot] [PATCH] rockchip: disable CONFIG_EFI_LOADER

[Ziyuan Xu]

Disable EFI applications feature for rockchip platform.

Signed-off-by: Ziyuan Xu 
---
 configs/chromebook_jerry_defconfig | 1 +
 configs/evb-rk3036_defconfig   | 1 +
 configs/kylin-rk3036_defconfig | 1 +
 configs/rock2_defconfig| 1 +
 4 files changed, 4 insertions(+)

diff --git a/configs/chromebook_jerry_defconfig 
b/configs/chromebook_jerry_defconfig
index d5bc515..b020066 100644
--- a/configs/chromebook_jerry_defconfig
+++ b/configs/chromebook_jerry_defconfig
@@ -10,6 +10,7 @@ CONFIG_DEFAULT_DEVICE_TREE="rk3288-jerry"
 CONFIG_SPL_STACK_R=y
 CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
 CONFIG_HUSH_PARSER=y
+CONFIG_EFI_LOADER=n
 CONFIG_CMD_BOOTZ=y
 # CONFIG_CMD_IMLS is not set
 CONFIG_CMD_MMC=y
diff --git a/configs/evb-rk3036_defconfig b/configs/evb-rk3036_defconfig
index 9894fff..5f816ec 100644
--- a/configs/evb-rk3036_defconfig
+++ b/configs/evb-rk3036_defconfig
@@ -6,6 +6,7 @@ CONFIG_SPL_STACK_R_ADDR=0x8
 CONFIG_DEFAULT_DEVICE_TREE="rk3036-sdk"
 CONFIG_SPL_STACK_R=y
 CONFIG_HUSH_PARSER=y
+CONFIG_EFI_LOADER=n
 CONFIG_CMD_BOOTZ=y
 # CONFIG_CMD_IMLS is not set
 CONFIG_CMD_MMC=y
diff --git a/configs/kylin-rk3036_defconfig b/configs/kylin-rk3036_defconfig
index 0ff6c6b..4a043af 100644
--- a/configs/kylin-rk3036_defconfig
+++ b/configs/kylin-rk3036_defconfig
@@ -7,6 +7,7 @@ CONFIG_DEFAULT_DEVICE_TREE="rk3036-sdk"
 CONFIG_SPL_STACK_R=y
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_BOOTZ=y
+CONFIG_EFI_LOADER=n
 # CONFIG_CMD_IMLS is not set
 CONFIG_CMD_MMC=y
 CONFIG_CMD_SF=y
diff --git a/configs/rock2_defconfig b/configs/rock2_defconfig
index 3e16b80..e07100e 100644
--- a/configs/rock2_defconfig
+++ b/configs/rock2_defconfig
@@ -8,6 +8,7 @@ CONFIG_DEFAULT_DEVICE_TREE="rk3288-rock2-square"
 CONFIG_SPL_STACK_R=y
 CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
 CONFIG_HUSH_PARSER=y
+CONFIG_EFI_LOADER=n
 CONFIG_CMD_BOOTZ=y
 # CONFIG_CMD_IMLS is not set
 CONFIG_CMD_MMC=y
-- 
1.9.1


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[U-Boot] [PATCH 3/4] rockchip: rk3288: add fastboot support

[Ziyuan Xu]

Enable fastboot feature on rk3288.

This path doesn't support the fastboot flash function command entirely.
We will hit "cannot find partition" assertion without specified
partition environment. Define gpt partition layout in specified board
such as firefly-rk3288, then enjoy it!

Signed-off-by: Ziyuan Xu 
---

 arch/arm/mach-rockchip/board.c  | 20 
 include/configs/rk3288_common.h | 25 +
 2 files changed, 45 insertions(+)

diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index 816540e..9766ba0 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -52,6 +52,26 @@ void lowlevel_init(void)
 {
 }
 
+#if defined(CONFIG_USB_GADGET) && defined(CONFIG_USB_GADGET_DWC2_OTG)
+#include 
+#include 
+
+static struct dwc2_plat_otg_data rk3288_otg_data = {
+   .regs_phy   = 0xff77,
+   .regs_otg   = 0xff58,
+};
+
+int board_usb_init(int index, enum usb_init_type init)
+{
+   return dwc2_udc_probe(_otg_data);
+}
+
+int board_usb_cleanup(int index, enum usb_init_type init)
+{
+   return 0;
+}
+#endif
+
 static int do_clock(cmd_tbl_t *cmdtp, int flag, int argc,
   char * const argv[])
 {
diff --git a/include/configs/rk3288_common.h b/include/configs/rk3288_common.h
index 9d50d83..f8a6c98 100644
--- a/include/configs/rk3288_common.h
+++ b/include/configs/rk3288_common.h
@@ -80,6 +80,31 @@
 #define CONFIG_SPI
 #define CONFIG_SF_DEFAULT_SPEED 2000
 
+/* usb otg */
+#define CONFIG_USB_GADGET
+#define CONFIG_USB_GADGET_DUALSPEED
+#define CONFIG_USB_GADGET_DWC2_OTG
+#define CONFIG_RK3288_USB_PHY
+#define CONFIG_USB_GADGET_VBUS_DRAW0
+
+/* fastboot  */
+#define CONFIG_CMD_FASTBOOT
+#define CONFIG_USB_FUNCTION_FASTBOOT
+#define CONFIG_FASTBOOT_FLASH
+#define CONFIG_FASTBOOT_FLASH_MMC_DEV  1   /* eMMC */
+#define CONFIG_FASTBOOT_BUF_ADDR   (CONFIG_SYS_SDRAM_BASE \
+   + SDRAM_BANK_SIZE)
+#define CONFIG_FASTBOOT_BUF_SIZE   0x0800
+
+#define CONFIG_USB_GADGET_DOWNLOAD
+#define CONFIG_G_DNL_MANUFACTURER  "Rockchip"
+#define CONFIG_G_DNL_VENDOR_NUM0x2207
+#define CONFIG_G_DNL_PRODUCT_NUM   0x320a
+
+/* Enable gpt partition table */
+#define CONFIG_CMD_GPT
+#define CONFIG_EFI_PARTITION
+
 #ifndef CONFIG_SPL_BUILD
 #include 
 
-- 
1.9.1


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[U-Boot] [PATCH 4/4] rockchip: firefly-rk3288: undef CONFIG_EFI_LOADER

[Ziyuan Xu]

Disable EFI applications feature.

Signed-off-by: Ziyuan Xu 
---

 configs/firefly-rk3288_defconfig | 1 +
 1 file changed, 1 insertion(+)

diff --git a/configs/firefly-rk3288_defconfig b/configs/firefly-rk3288_defconfig
index 4af9120..8855409 100644
--- a/configs/firefly-rk3288_defconfig
+++ b/configs/firefly-rk3288_defconfig
@@ -9,6 +9,7 @@ CONFIG_SPL_STACK_R=y
 CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_BOOTZ=y
+CONFIG_EFI_LOADER=n
 # CONFIG_CMD_IMLS is not set
 CONFIG_CMD_MMC=y
 CONFIG_CMD_SF=y
-- 
1.9.1


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[U-Boot] [PATCH 1/4] usb: phy: implement usb-otg phy control for rk3288

[Ziyuan Xu]

Apply dwc2 usb driver framework to implement phy_init and phy_off, and
enable it with CONFIG_RK3288_USB_PHY.

Signed-off-by: Ziyuan Xu 
---

 drivers/usb/phy/Makefile |  1 +
 drivers/usb/phy/rk3288_usb_phy.c | 29 +
 2 files changed, 30 insertions(+)
 create mode 100644 drivers/usb/phy/rk3288_usb_phy.c

diff --git a/drivers/usb/phy/Makefile b/drivers/usb/phy/Makefile
index 93d147e..d52c42a 100644
--- a/drivers/usb/phy/Makefile
+++ b/drivers/usb/phy/Makefile
@@ -7,3 +7,4 @@
 
 obj-$(CONFIG_TWL4030_USB) += twl4030.o
 obj-$(CONFIG_OMAP_USB_PHY) += omap_usb_phy.o
+obj-$(CONFIG_RK3288_USB_PHY) += rk3288_usb_phy.o
diff --git a/drivers/usb/phy/rk3288_usb_phy.c b/drivers/usb/phy/rk3288_usb_phy.c
new file mode 100644
index 000..de05d4e
--- /dev/null
+++ b/drivers/usb/phy/rk3288_usb_phy.c
@@ -0,0 +1,29 @@
+/*
+ * Copyright 2016 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include 
+#include 
+
+#include "../gadget/dwc2_udc_otg_priv.h"
+
+#define GRF_UOC0_CON0  0x320
+#define SIDDQ_WRITE_ENABIT(29)
+#define SIDDQ_ON   BIT(13)
+#define SIDDQ_OFF  (0 << 13)
+
+void otg_phy_init(struct dwc2_udc *dev)
+{
+   /* power up usb phy analog blocks by set siddq 0 */
+   writel(SIDDQ_WRITE_ENA | SIDDQ_OFF,
+  dev->pdata->regs_phy + GRF_UOC0_CON0);
+}
+
+void otg_phy_off(struct dwc2_udc *dev)
+{
+   /* power down usb phy analog blocks by set siddq 1 */
+   writel(SIDDQ_WRITE_ENA | SIDDQ_ON,
+  dev->pdata->regs_phy + GRF_UOC0_CON0);
+}
-- 
1.9.1


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[U-Boot] [PATCH 0/4] rockchip: rk3288: add fastboot support

[Ziyuan Xu]

Hi,

This short series add the fastboot support for rk3288, and I have tested
on firefly-rk3288 board.

I encounter an odd issue while debugging usb-otg ep2out-bulk data
transfer. The buffer was always zero which mapped to DMA buffer, even
though driver call invalidate_dcache_range() to make sure the cpu read
memroy data directly. IMHO, dcache was abnormal after something
initialization code.
Everything work fine without CONFIG_EFI_LOADER. Moreover,
invalidate_icache_all cause the issue. I'm not able to figure out why
and explain it. But I think there is no need to enable EFI applications
on rk3288 platform.


Ziyuan Xu (4):
  usb: phy: implement usb-otg phy control for rk3288
  usb: dwc2-otg: redefine fifo-size for rk3288
  rockchip: rk3288: add fastboot support
  rockchip: firefly-rk3288: undef CONFIG_EFI_LOADER

 arch/arm/mach-rockchip/board.c | 20 
 configs/firefly-rk3288_defconfig   |  1 +
 drivers/usb/gadget/dwc2_udc_otg_regs.h |  6 ++
 drivers/usb/phy/Makefile   |  1 +
 drivers/usb/phy/rk3288_usb_phy.c   | 29 +
 include/configs/rk3288_common.h| 25 +
 6 files changed, 82 insertions(+)
 create mode 100644 drivers/usb/phy/rk3288_usb_phy.c

-- 
1.9.1


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[U-Boot] [PATCH 2/4] usb: dwc2-otg: redefine fifo-size for rk3288

[Ziyuan Xu]

Redefine RX FIFO size & TX FIFO size for rk3288.

Signed-off-by: Ziyuan Xu 
---

 drivers/usb/gadget/dwc2_udc_otg_regs.h | 6 ++
 1 file changed, 6 insertions(+)

diff --git a/drivers/usb/gadget/dwc2_udc_otg_regs.h 
b/drivers/usb/gadget/dwc2_udc_otg_regs.h
index 78ec90e..a0617c8 100644
--- a/drivers/usb/gadget/dwc2_udc_otg_regs.h
+++ b/drivers/usb/gadget/dwc2_udc_otg_regs.h
@@ -130,8 +130,14 @@ struct dwc2_usbotg_reg {
 #define HIGH_SPEED_CONTROL_PKT_SIZE64
 #define HIGH_SPEED_BULK_PKT_SIZE   512
 
+#ifdef CONFIG_ROCKCHIP_RK3288
+#define RX_FIFO_SIZE   (275*4)
+#define NPTX_FIFO_SIZE (16*4)
+#else
 #define RX_FIFO_SIZE   (1024*4)
 #define NPTX_FIFO_SIZE (1024*4)
+#endif
+
 #define PTX_FIFO_SIZE  (1536*1)
 
 #define DEPCTL_TXFNUM_0(0x0<<22)
-- 
1.9.1


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Re: [U-Boot] [PATCH v4 1/2] armv8: Support loading 32-bit OS in AArch32 execution state

[Huan Wang]

Hi, Alex,

> > Am 15.06.2016 um 05:04 schrieb Huan Wang :
> >
> > Hi, Alex,
> >
> >>> On 06/08/2016 07:14 AM, Alison Wang wrote:
> >>> To support loading a 32-bit OS, the execution state will change from
> >>> AArch64 to AArch32 when jumping to kernel.
> >>>
> >>> The architecture information will be got through checking FIT image,
> >>> then U-Boot will load 32-bit OS or 64-bit OS automatically.
> >>>
> >>> Signed-off-by: Ebony Zhu 
> >>> Signed-off-by: Alison Wang 
> >>> Signed-off-by: Chenhui Zhao 
> >>> ---
> >>> Changes in v4:
> >>> - Correct config ARM64_SUPPORT_AARCH32.
> >>> - Omit arch and ftaddr arguments.
> >>> - Rename "xreg5" to "tmp".
> >>> - Use xxx_RES1 to combine all RES1 fields in xxx register.
> >>> - Use an immediate cmp directly.
> >>> - Use #ifdef for CONFIG_ARM64_SUPPORT_AARCH32.
> >>>
> >>> Changes in v3:
> >>> - Comments the functions and the arguments.
> >>> - Rename the real parameters.
> >>> - Use the macros instead of the magic values.
> >>> - Remove the redundant codes.
> >>> - Clean up all of the mess in boot_jump_linux().
> >>> - Add CONFIG_ARM64_SUPPORT_AARCH32 to detect for some ARM64 system
> >> doesn't support AArch32 state.
> >>>
> >>> Changes in v2:
> >>> - armv8_switch_to_el2_aarch32() is removed. armv8_switch_to_el2_m is
> >> used
> >>>   to switch to AArch64 EL2 or AArch32 Hyp.
> >>> - armv8_switch_to_el1_aarch32() is removed. armv8_switch_to_el1_m is
> >> used
> >>>   to switch to AArch64 EL1 or AArch32 SVC.
> >>>
> >>>  arch/arm/Kconfig|   6 ++
> >>>  arch/arm/cpu/armv8/start.S  |   1 +
> >>>  arch/arm/cpu/armv8/transition.S |   8 +-
> >>>  arch/arm/include/asm/macro.h| 172
> >> ++--
> >>>  arch/arm/include/asm/system.h   | 111 +-
> >>>  arch/arm/lib/bootm.c|  19 -
> >>>  common/image-fit.c  |  19 -
> >>>  7 files changed, 284 insertions(+), 52 deletions(-)
> >>>
> >>> diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index
> >>> 77eab66..9cf4acd 100644
> >>> --- a/arch/arm/Kconfig
> >>> +++ b/arch/arm/Kconfig
> >>> @@ -91,6 +91,12 @@ config SYS_L2CACHE_OFF
> >>>If SoC does not support L2CACHE or one do not want to enable
> >>>L2CACHE, choose this option.
> >>>
> >>> +config ARM64_SUPPORT_AARCH32
> >>> +bool "ARM64 system support AArch32 execution state"
> >>> +default y if ARM64 && !TARGET_THUNDERX_88XX
> >>> +help
> >>> +  This ARM64 system supports AArch32 execution state.
> >>> +
> >>>  choice
> >>>  prompt "Target select"
> >>>  default TARGET_HIKEY
> >>> diff --git a/arch/arm/cpu/armv8/start.S b/arch/arm/cpu/armv8/start.S
> >>> index e933021..dd69501 100644
> >>> --- a/arch/arm/cpu/armv8/start.S
> >>> +++ b/arch/arm/cpu/armv8/start.S
> >>> @@ -234,6 +234,7 @@ WEAK(lowlevel_init)
> >>>  /*
> >>>   * All slaves will enter EL2 and optionally EL1.
> >>>   */
> >>> +ldrx3, =ES_TO_AARCH64
> >>>  blarmv8_switch_to_el2
> >>>  #ifdef CONFIG_ARMV8_SWITCH_TO_EL1
> >>>  blarmv8_switch_to_el1
> >>> diff --git a/arch/arm/cpu/armv8/transition.S
> >> b/arch/arm/cpu/armv8/transition.S
> >>> index 253a39b..e61b6ae 100644
> >>> --- a/arch/arm/cpu/armv8/transition.S
> >>> +++ b/arch/arm/cpu/armv8/transition.S
> >>> @@ -11,13 +11,13 @@
> >>>  #include 
> >>>
> >>>  ENTRY(armv8_switch_to_el2)
> >>> -switch_el x0, 1f, 0f, 0f
> >>> +switch_el x4, 1f, 0f, 0f
> >>>  0:ret
> >>> -1:armv8_switch_to_el2_m x0
> >>> +1:armv8_switch_to_el2_m x0, x3, x4
> >>>  ENDPROC(armv8_switch_to_el2)
> >>>
> >>>  ENTRY(armv8_switch_to_el1)
> >>> -switch_el x0, 0f, 1f, 0f
> >>> +switch_el x4, 0f, 1f, 0f
> >>>  0:ret
> >>> -1:armv8_switch_to_el1_m x0, x1
> >>> +1:armv8_switch_to_el1_m x0, x3, x4
> >>>  ENDPROC(armv8_switch_to_el1)
> >>> diff --git a/arch/arm/include/asm/macro.h
> >> b/arch/arm/include/asm/macro.h
> >>> index 9bb0efa..109724f 100644
> >>> --- a/arch/arm/include/asm/macro.h
> >>> +++ b/arch/arm/include/asm/macro.h
> >>> @@ -8,6 +8,9 @@
> >>>
> >>>  #ifndef __ASM_ARM_MACRO_H__
> >>>  #define __ASM_ARM_MACRO_H__
> >>> +
> >>> +#include 
> >>> +
> >>>  #ifdef __ASSEMBLY__
> >>>
> >>>  /*
> >>> @@ -135,13 +138,20 @@ lr.reqx30
> >>>  #endif
> >>>  .endm
> >>>
> >>> -.macro armv8_switch_to_el2_m, xreg1
> >>> -/* 64bit EL2 | HCE | SMD | RES1 (Bits[5:4]) | Non-secure
> EL0/EL1
> >> */
> >>> -mov\xreg1, #0x5b1
> >>> -msrscr_el3, \xreg1
> >>> +/*
> >>> + * Switch from EL3 to EL2 for ARMv8
> >>> + * @ep: kernel entry point
> >>> + * @flag:   The execution state flag for lower exception
> >>> + *  level, ES_TO_AARCH64 or ES_TO_AARCH32
> >>> + * @tmp:temporary register
> >>> + *
> >>> + * x1 is machine nr and x2 is ftaddr, they will be passed
> >>> + * to the guest.
> >>> + */
> >>> +.macro armv8_switch_to_el2_m, ep, flag, tmp
> >>>  msr

Re: [U-Boot] [PATCH] sf: set the Uniform Sector to CR3NV instead of CR3V

[Michael Trimarchi]

Hi

On Jun 30, 2016 08:47, "Gong Qianyu"  wrote:
>
> From: Mingkai Hu 
>
> Set the flash to Uniform Sector Architecture in the non-volatile
> register. After the power cycle, it's also Uniform Sector Architecture.
>
> Signed-off-by: Mingkai Hu 
> Signed-off-by: Gong Qianyu 
>
> diff --git a/drivers/mtd/spi/spi_flash.c b/drivers/mtd/spi/spi_flash.c
> index 64d4e0f..366c362 100644
> --- a/drivers/mtd/spi/spi_flash.c
> +++ b/drivers/mtd/spi/spi_flash.c
> @@ -975,7 +975,7 @@ int spi_flash_decode_fdt(const void *blob, struct
spi_flash *flash)
>  static int spansion_s25fss_disable_4KB_erase(struct spi_slave *spi)
>  {
> u8 cmd[4];
> -   u32 offset = 0x84; /* CR3V register offset */
> +   u32 offset = 0x4; /* CR3NV register offset */
> u8 cr3v;
> int ret;
>

I have already tested it and I have in my tree. I don't think that should
be mandatory in general

Michael

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[U-Boot] [PATCH] sf: set the Uniform Sector to CR3NV instead of CR3V

[Gong Qianyu]

From: Mingkai Hu 

Set the flash to Uniform Sector Architecture in the non-volatile
register. After the power cycle, it's also Uniform Sector Architecture.

Signed-off-by: Mingkai Hu 
Signed-off-by: Gong Qianyu 

diff --git a/drivers/mtd/spi/spi_flash.c b/drivers/mtd/spi/spi_flash.c
index 64d4e0f..366c362 100644
--- a/drivers/mtd/spi/spi_flash.c
+++ b/drivers/mtd/spi/spi_flash.c
@@ -975,7 +975,7 @@ int spi_flash_decode_fdt(const void *blob, struct spi_flash 
*flash)
 static int spansion_s25fss_disable_4KB_erase(struct spi_slave *spi)
 {
u8 cmd[4];
-   u32 offset = 0x84; /* CR3V register offset */
+   u32 offset = 0x4; /* CR3NV register offset */
u8 cr3v;
int ret;
 
-- 
2.1.0.27.g96db324

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[U-Boot] [PATCH] phylib: add support for aquantia AQR106/107 PHY

[Gong Qianyu]

From: Mingkai Hu 

Signed-off-by: Mingkai Hu 
Signed-off-by: Gong Qianyu 

diff --git a/drivers/net/phy/aquantia.c b/drivers/net/phy/aquantia.c
index f90c2ae..ad12f6d 100644
--- a/drivers/net/phy/aquantia.c
+++ b/drivers/net/phy/aquantia.c
@@ -147,6 +147,32 @@ struct phy_driver aqr105_driver = {
.shutdown = _shutdown,
 };
 
+struct phy_driver aqr106_driver = {
+   .name = "Aquantia AQR106",
+   .uid = 0x3a1b4d0,
+   .mask = 0xfff0,
+   .features = PHY_10G_FEATURES,
+   .mmds = (MDIO_MMD_PMAPMD | MDIO_MMD_PCS|
+   MDIO_MMD_PHYXS | MDIO_MMD_AN |
+   MDIO_MMD_VEND1),
+   .config = _config,
+   .startup = _startup,
+   .shutdown = _shutdown,
+};
+
+struct phy_driver aqr107_driver = {
+   .name = "Aquantia AQR107",
+   .uid = 0x3a1b4e0,
+   .mask = 0xfff0,
+   .features = PHY_10G_FEATURES,
+   .mmds = (MDIO_MMD_PMAPMD | MDIO_MMD_PCS|
+   MDIO_MMD_PHYXS | MDIO_MMD_AN |
+   MDIO_MMD_VEND1),
+   .config = _config,
+   .startup = _startup,
+   .shutdown = _shutdown,
+};
+
 struct phy_driver aqr405_driver = {
.name = "Aquantia AQR405",
.uid = 0x3a1b4b2,
@@ -165,6 +191,8 @@ int phy_aquantia_init(void)
phy_register(_driver);
phy_register(_driver);
phy_register(_driver);
+   phy_register(_driver);
+   phy_register(_driver);
phy_register(_driver);
 
return 0;
-- 
2.1.0.27.g96db324

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