Re: [U-Boot] [PATCH v2 1/8] x86: Add implementations of setjmp() and longjmp()

[Bin Meng]

Hi Simon,

On Mon, Sep 26, 2016 at 5:27 AM, Simon Glass  wrote:
> Bring in these functions from Linux v4.4. They will be needed for EFI loader
> support.
>
> Signed-off-by: Simon Glass 
> ---
>
> Changes in v2:
> - Drop irrelevant comment
> - Add a comment about .size
> - Drop unnecessary .text directive
> - Make longjmp() always cause setjmp() to return 1
>
>  arch/x86/cpu/Makefile |  2 +-
>  arch/x86/cpu/setjmp.S | 66 
> +++
>  arch/x86/include/asm/setjmp.h | 24 
>  3 files changed, 91 insertions(+), 1 deletion(-)
>  create mode 100644 arch/x86/cpu/setjmp.S
>  create mode 100644 arch/x86/include/asm/setjmp.h
>
> diff --git a/arch/x86/cpu/Makefile b/arch/x86/cpu/Makefile
> index 2667e0b..f5b8c9e 100644
> --- a/arch/x86/cpu/Makefile
> +++ b/arch/x86/cpu/Makefile
> @@ -10,7 +10,7 @@
>
>  extra-y= start.o
>  obj-$(CONFIG_X86_RESET_VECTOR) += resetvec.o start16.o
> -obj-y  += interrupts.o cpu.o cpu_x86.o call64.o
> +obj-y  += interrupts.o cpu.o cpu_x86.o call64.o setjmp.o
>
>  AFLAGS_REMOVE_call32.o := -mregparm=3 \
> $(if $(CONFIG_EFI_STUB_64BIT),-march=i386 -m32)
> diff --git a/arch/x86/cpu/setjmp.S b/arch/x86/cpu/setjmp.S
> new file mode 100644
> index 000..7443274
> --- /dev/null
> +++ b/arch/x86/cpu/setjmp.S
> @@ -0,0 +1,66 @@
> +/*
> + * Written by H. Peter Anvin 
> + * Brought in from Linux v4.4 and modified for U-Boot
> + * From Linux arch/um/sys-i386/setjmp.S
> + *
> + * SPDX-License-Identifier:GPL-2.0
> + */
> +
> +#include 
> +#include 
> +#include 
> +

I believe the above 3 includes are not needed.

> +#define _REGPARM
> +
> +/*
> + * The jmp_buf is assumed to contain the following, in order:
> + * %ebx
> + * %esp
> + * %ebp
> + * %esi
> + * %edi
> + * 
> + */
> +
> +   .text
> +   .align 4
> +   .globl setjmp
> +   .type setjmp, @function
> +setjmp:
> +#ifdef _REGPARM
> +   movl %eax, %edx
> +#else
> +   movl 4(%esp), %edx
> +#endif
> +   popl %ecx   /* Return address, and adjust the stack */
> +   xorl %eax, %eax /* Return value */
> +   movl %ebx, (%edx)
> +   movl %esp, 4(%edx)  /* Post-return %esp! */
> +   pushl %ecx  /* Make the call/return stack happy */
> +   movl %ebp, 8(%edx)
> +   movl %esi, 12(%edx)
> +   movl %edi, 16(%edx)
> +   movl %ecx, 20(%edx) /* Return address */
> +   ret
> +
> +   /* Provide function size if needed */
> +   .size setjmp, .-setjmp
> +
> +   .align 4
> +   .globl longjmp
> +   .type longjmp, @function
> +longjmp:
> +#ifdef _REGPARM
> +   xchgl %eax, %edx
> +#else
> +   movl 4(%esp), %edx  /* jmp_ptr address */
> +#endif
> +   movl 1, %eax

This should be $1.

But I still think the setjmp/longjump codes in efi_loader is wrong. We
should have longjump() to pass the return value to setjmp().

> +   movl (%edx), %ebx
> +   movl 4(%edx), %esp
> +   movl 8(%edx), %ebp
> +   movl 12(%edx), %esi
> +   movl 16(%edx), %edi
> +   jmp *20(%edx)
> +
> +   .size longjmp, .-longjmp
> diff --git a/arch/x86/include/asm/setjmp.h b/arch/x86/include/asm/setjmp.h
> new file mode 100644
> index 000..deef67e
> --- /dev/null
> +++ b/arch/x86/include/asm/setjmp.h
> @@ -0,0 +1,24 @@
> +/*
> + * Written by H. Peter Anvin 
> + * Brought in from Linux v4.4 and modified for U-Boot
> + * From Linux arch/um/sys-i386/setjmp.S
> + *
> + * SPDX-License-Identifier:GPL-2.0
> + */
> +
> +#ifndef __setjmp_h
> +#define __setjmp_h
> +
> +struct jmp_buf_data {
> +   unsigned int __ebx;
> +   unsigned int __esp;
> +   unsigned int __ebp;
> +   unsigned int __esi;
> +   unsigned int __edi;
> +   unsigned int __eip;
> +};
> +
> +int setjmp(struct jmp_buf_data *jmp_buf);
> +void longjmp(struct jmp_buf_data *jmp_buf);
> +
> +#endif
> --

Regards,
Bin
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Re: [U-Boot] [PATCH v2 1/8] x86: Add implementations of setjmp() and longjmp()

[Alexander Graf]

On 26.09.16 09:00, Bin Meng wrote:
> Hi Simon,
> 
> On Mon, Sep 26, 2016 at 5:27 AM, Simon Glass  wrote:
>> Bring in these functions from Linux v4.4. They will be needed for EFI loader
>> support.
>>
>> Signed-off-by: Simon Glass 
>> ---
>>
>> Changes in v2:
>> - Drop irrelevant comment
>> - Add a comment about .size
>> - Drop unnecessary .text directive
>> - Make longjmp() always cause setjmp() to return 1
>>
>>  arch/x86/cpu/Makefile |  2 +-
>>  arch/x86/cpu/setjmp.S | 66 
>> +++
>>  arch/x86/include/asm/setjmp.h | 24 
>>  3 files changed, 91 insertions(+), 1 deletion(-)
>>  create mode 100644 arch/x86/cpu/setjmp.S
>>  create mode 100644 arch/x86/include/asm/setjmp.h
>>
>> diff --git a/arch/x86/cpu/Makefile b/arch/x86/cpu/Makefile
>> index 2667e0b..f5b8c9e 100644
>> --- a/arch/x86/cpu/Makefile
>> +++ b/arch/x86/cpu/Makefile
>> @@ -10,7 +10,7 @@
>>
>>  extra-y= start.o
>>  obj-$(CONFIG_X86_RESET_VECTOR) += resetvec.o start16.o
>> -obj-y  += interrupts.o cpu.o cpu_x86.o call64.o
>> +obj-y  += interrupts.o cpu.o cpu_x86.o call64.o setjmp.o
>>
>>  AFLAGS_REMOVE_call32.o := -mregparm=3 \
>> $(if $(CONFIG_EFI_STUB_64BIT),-march=i386 -m32)
>> diff --git a/arch/x86/cpu/setjmp.S b/arch/x86/cpu/setjmp.S
>> new file mode 100644
>> index 000..7443274
>> --- /dev/null
>> +++ b/arch/x86/cpu/setjmp.S
>> @@ -0,0 +1,66 @@
>> +/*
>> + * Written by H. Peter Anvin 
>> + * Brought in from Linux v4.4 and modified for U-Boot
>> + * From Linux arch/um/sys-i386/setjmp.S
>> + *
>> + * SPDX-License-Identifier:GPL-2.0
>> + */
>> +
>> +#include 
>> +#include 
>> +#include 
>> +
> 
> I believe the above 3 includes are not needed.
> 
>> +#define _REGPARM
>> +
>> +/*
>> + * The jmp_buf is assumed to contain the following, in order:
>> + * %ebx
>> + * %esp
>> + * %ebp
>> + * %esi
>> + * %edi
>> + * 
>> + */
>> +
>> +   .text
>> +   .align 4
>> +   .globl setjmp
>> +   .type setjmp, @function
>> +setjmp:
>> +#ifdef _REGPARM
>> +   movl %eax, %edx
>> +#else
>> +   movl 4(%esp), %edx
>> +#endif
>> +   popl %ecx   /* Return address, and adjust the stack */
>> +   xorl %eax, %eax /* Return value */
>> +   movl %ebx, (%edx)
>> +   movl %esp, 4(%edx)  /* Post-return %esp! */
>> +   pushl %ecx  /* Make the call/return stack happy */
>> +   movl %ebp, 8(%edx)
>> +   movl %esi, 12(%edx)
>> +   movl %edi, 16(%edx)
>> +   movl %ecx, 20(%edx) /* Return address */
>> +   ret
>> +
>> +   /* Provide function size if needed */
>> +   .size setjmp, .-setjmp
>> +
>> +   .align 4
>> +   .globl longjmp
>> +   .type longjmp, @function
>> +longjmp:
>> +#ifdef _REGPARM
>> +   xchgl %eax, %edx
>> +#else
>> +   movl 4(%esp), %edx  /* jmp_ptr address */
>> +#endif
>> +   movl 1, %eax
> 
> This should be $1.
> 
> But I still think the setjmp/longjump codes in efi_loader is wrong. We
> should have longjump() to pass the return value to setjmp().

Why? Where's the difference?


Alex
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[U-Boot] [PATCH 1/6] pcm052: fix MTD partitioning

[Albert ARIBAUD (3ADEV)]

Merge 'spare' into 'bootloader' partition
Use same partition for ramdisk and rootfs boot scenarios.
Remove 'ramdisk' partition, use 'rootfs' for ramdisk
(ramdisk and nand boot scenarios are mutually exclusive).
Expand last partition to end of actual NAND size.
Adjust UBIFS rootfs boot kernel arguments.

Signed-off-by: Albert ARIBAUD (3ADEV) 
---

 include/configs/pcm052.h | 14 ++
 1 file changed, 6 insertions(+), 8 deletions(-)

diff --git a/include/configs/pcm052.h b/include/configs/pcm052.h
index 57a7630..302c7dd 100644
--- a/include/configs/pcm052.h
+++ b/include/configs/pcm052.h
@@ -54,14 +54,12 @@
 #define CONFIG_MTD_PARTITIONS
 #define CONFIG_MTD_DEVICE
 #define MTDIDS_DEFAULT "nand0=NAND"
-#define MTDPARTS_DEFAULT   "mtdparts=NAND:256k(spare)"\
-   ",384k(bootloader)"\
+#define MTDPARTS_DEFAULT   "mtdparts=NAND:640k(bootloader)"\
",128k(env1)"\
",128k(env2)"\
",128k(dtb)"\
",6144k(kernel)"\
-   ",65536k(ramdisk)"\
-   ",450944k(root)"
+   ",-(root)"
 #endif
 
 #define CONFIG_MMC
@@ -145,7 +143,7 @@
"bootargs_net=setenv bootargs ${bootargs} root=/dev/nfs ip=dhcp " \
"nfsroot=${serverip}:${nfs_root},v3,tcp\0" \
"bootargs_nand=setenv bootargs ${bootargs} " \
-   "ubi.mtd=6 rootfstype=ubifs root=ubi0:rootfs\0" \
+   "ubi.mtd=5 rootfstype=ubifs root=ubi0:rootfs\0" \
"bootargs_ram=setenv bootargs ${bootargs} " \
"root=/dev/ram rw initrd=${ram_addr}\0" \
"bootargs_mtd=setenv bootargs ${bootargs} ${mtdparts}\0" \
@@ -164,7 +162,7 @@
"bootcmd_ram=run bootargs_base bootargs_ram bootargs_mtd; " \
"nand read ${fdt_addr} dtb; " \
"nand read ${kernel_addr} kernel; " \
-   "nand read ${ram_addr} ramdisk; " \
+   "nand read ${ram_addr} root; " \
"bootz ${kernel_addr} ${ram_addr} ${fdt_addr}\0" \
"update_bootloader_from_tftp=mtdparts default; " \
"nand read ${blsec_addr} bootloader; " \
@@ -196,8 +194,8 @@
"ubi write ${sys_addr} rootfs ${filesize}; fi\0" \
"update_ramdisk_from_tftp=if tftp ${ram_addr} ${tftpdir}${ram_file}; " \
"then mtdparts default; " \
-   "nand erase.part ramdisk; " \
-   "nand write ${ram_addr} ramdisk ${filesize}; fi\0"
+   "nand erase.part root; " \
+   "nand write ${ram_addr} root ${filesize}; fi\0"
 
 /* Miscellaneous configurable options */
 #define CONFIG_SYS_LONGHELP/* undef to save memory */
-- 
2.9.3

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[U-Boot] [PATCH 3/6] pcm052: add 'm4go' command

[Albert ARIBAUD (3ADEV)]

Add the 'm4go' command to pcm052-based targets.
It loads scatter file images.

Signed-off-by: Albert ARIBAUD (3ADEV) 
---

 board/phytec/pcm052/pcm052.c | 38 ++
 1 file changed, 38 insertions(+)

diff --git a/board/phytec/pcm052/pcm052.c b/board/phytec/pcm052/pcm052.c
index e4f61e1..7341899 100644
--- a/board/phytec/pcm052/pcm052.c
+++ b/board/phytec/pcm052/pcm052.c
@@ -513,3 +513,41 @@ int checkboard(void)
 
return 0;
 }
+
+static int do_m4go(cmd_tbl_t *cmdtp, int flag, int argc,
+  char * const argv[])
+{
+   ulong addr;
+
+   /* Consume 'm4go' */
+   argc--; argv++;
+
+   /*
+* Parse provided address - default to load_addr in case not provided.
+*/
+
+   if (argc)
+   addr = simple_strtoul(argv[0], NULL, 16);
+   else
+   addr = load_addr;
+
+   /*
+* Write boot address in PERSISTENT_ENTRY1[31:0] aka SRC_GPR2[31:0]
+*/
+   writel(addr + 0x401, 0x4006E028);
+
+   /*
+* Start secondary processor by enabling its clock
+*/
+   writel(0x15a5a, 0x4006B08C);
+
+   return 1;
+}
+
+U_BOOT_CMD(
+   m4go, 2 /* one arg max */, 1 /* repeatable */, do_m4go,
+   "start the secondary Cortex-M4 from scatter file image",
+   "[]\n"
+   "- start secondary Cortex-M4 core using a scatter file image\n"
+   "The argument needs to be a scatter file\n"
+);
-- 
2.9.3

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[U-Boot] [PATCH 2/6] pcm052: remove target-specific dtb name from env

[Albert ARIBAUD (3ADEV)]

Signed-off-by: Albert ARIBAUD (3ADEV) 
---

 include/configs/pcm052.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/include/configs/pcm052.h b/include/configs/pcm052.h
index 302c7dd..1858662 100644
--- a/include/configs/pcm052.h
+++ b/include/configs/pcm052.h
@@ -125,7 +125,7 @@
"blimg_addr=0x81000400\0" \
"kernel_file=zImage\0" \
"kernel_addr=0x8200\0" \
-   "fdt_file=vf610-pcm052.dtb\0" \
+   "fdt_file=zImage.dtb\0" \
"fdt_addr=0x8100\0" \
"ram_file=uRamdisk\0" \
"ram_addr=0x8300\0" \
-- 
2.9.3

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[U-Boot] [PATCH 4/6] tools: mkimage: add support for Vybrid image format

[Albert ARIBAUD (3ADEV)]

This format can be flashed directly at address 0 of
the NAND FLASH, as it contains all necessary headers.

Signed-off-by: Albert ARIBAUD (3ADEV) 
---

 Makefile  |   6 ++
 arch/arm/config.mk|   3 +
 arch/arm/cpu/armv7/vf610/Makefile |   5 ++
 common/image.c|   1 +
 include/configs/pcm052.h  |  14 ++--
 include/image.h   |   1 +
 tools/Makefile|   1 +
 tools/vybridimage.c   | 164 ++
 8 files changed, 187 insertions(+), 8 deletions(-)
 create mode 100644 tools/vybridimage.c

diff --git a/Makefile b/Makefile
index c30f90a..75c74d5 100644
--- a/Makefile
+++ b/Makefile
@@ -844,6 +844,12 @@ endif
 %.imx: %.bin
$(Q)$(MAKE) $(build)=arch/arm/imx-common $@
 
+%.vyb: %.imx
+   $(Q)$(MAKE) $(build)=arch/arm/cpu/armv7/vf610 $@
+
+quiet_cmd_copy = COPY$@
+  cmd_copy = cp $< $@
+
 u-boot.dtb: dts/dt.dtb
$(call cmd,copy)
 
diff --git a/arch/arm/config.mk b/arch/arm/config.mk
index 8f85862..542b897 100644
--- a/arch/arm/config.mk
+++ b/arch/arm/config.mk
@@ -144,4 +144,7 @@ else
 ALL-y += u-boot.imx
 endif
 endif
+ifneq ($(CONFIG_VF610),)
+ALL-y += u-boot.vyb
+endif
 endif
diff --git a/arch/arm/cpu/armv7/vf610/Makefile 
b/arch/arm/cpu/armv7/vf610/Makefile
index 68cb756..2945377 100644
--- a/arch/arm/cpu/armv7/vf610/Makefile
+++ b/arch/arm/cpu/armv7/vf610/Makefile
@@ -6,3 +6,8 @@
 
 obj-y  += generic.o
 obj-y  += timer.o
+
+MKIMAGEFLAGS_u-boot.vyb = -T vybridimage
+
+u-boot.vyb: u-boot.imx
+   $(call if_changed,mkimage)
diff --git a/common/image.c b/common/image.c
index a5d19ab..c0ad36a 100644
--- a/common/image.c
+++ b/common/image.c
@@ -161,6 +161,7 @@ static const table_entry_t uimage_type[] = {
{   IH_TYPE_RKIMAGE,"rkimage","Rockchip Boot Image" },
{   IH_TYPE_RKSD,   "rksd",   "Rockchip SD Boot Image" },
{   IH_TYPE_RKSPI,  "rkspi",  "Rockchip SPI Boot Image" },
+   {   IH_TYPE_VYBRIDIMAGE, "vybridimage",  "Vybrid Boot Image", },
{   IH_TYPE_ZYNQIMAGE,  "zynqimage",  "Xilinx Zynq Boot Image" },
{   IH_TYPE_ZYNQMPIMAGE, "zynqmpimage", "Xilinx ZynqMP Boot Image" 
},
{   IH_TYPE_FPGA,   "fpga",   "FPGA Image" },
diff --git a/include/configs/pcm052.h b/include/configs/pcm052.h
index 1858662..cd235cc 100644
--- a/include/configs/pcm052.h
+++ b/include/configs/pcm052.h
@@ -120,9 +120,8 @@
 #define CONFIG_EXTRA_ENV_SETTINGS \
"fdt_high=0x\0" \
"initrd_high=0x\0" \
-   "blimg_file=u-boot.imx\0" \
-   "blsec_addr=0x8100\0" \
-   "blimg_addr=0x81000400\0" \
+   "blimg_file=u-boot.vyb\0" \
+   "blimg_addr=0x8100\0" \
"kernel_file=zImage\0" \
"kernel_addr=0x8200\0" \
"fdt_file=zImage.dtb\0" \
@@ -164,12 +163,11 @@
"nand read ${kernel_addr} kernel; " \
"nand read ${ram_addr} root; " \
"bootz ${kernel_addr} ${ram_addr} ${fdt_addr}\0" \
-   "update_bootloader_from_tftp=mtdparts default; " \
-   "nand read ${blsec_addr} bootloader; " \
-   "mw.b ${blimg_addr} 0xff 0x5FC00; " \
-   "if tftp ${blimg_addr} ${tftpdir}${blimg_file}; then " \
+   "update_bootloader_from_tftp=if tftp ${blimg_addr} "\
+   "${tftpdir}${blimg_file}; then " \
+   "mtdparts default; " \
"nand erase.part bootloader; " \
-   "nand write ${blsec_addr} bootloader ${filesize}; fi\0" \
+   "nand write ${blimg_addr} bootloader ${filesize}; fi\0" \
"update_kernel_from_sd=if fatload mmc 0:2 ${kernel_addr} " \
"${kernel_file}; " \
"then mtdparts default; " \
diff --git a/include/image.h b/include/image.h
index 64da722..2b1296c 100644
--- a/include/image.h
+++ b/include/image.h
@@ -278,6 +278,7 @@ enum {
IH_TYPE_ZYNQIMAGE,  /* Xilinx Zynq Boot Image */
IH_TYPE_ZYNQMPIMAGE,/* Xilinx ZynqMP Boot Image */
IH_TYPE_FPGA,   /* FPGA Image */
+   IH_TYPE_VYBRIDIMAGE,/* VYBRID .vyb Image */
 
IH_TYPE_COUNT,  /* Number of image types */
 };
diff --git a/tools/Makefile b/tools/Makefile
index 421414b..e6f7993 100644
--- a/tools/Makefile
+++ b/tools/Makefile
@@ -89,6 +89,7 @@ dumpimage-mkimage-objs := aisimage.o \
os_support.o \
pblimage.o \
pbl_crc32.o \
+   vybridimage.o \
$(ROCKCHIP_OBS) \
socfpgaimage.o \
lib/sha1.o \
diff --git a/tools/vybridimage.c b/tools/vybridimage.c
new file mode 100644
index 000..a31fc10
--- /dev/null
+++ b/tools/vybridimage.c
@@ -0,0 +1,164 @@
+/*
+ * Image manipulator for Vybrid SoCs
+ *
+ * Derived from vybridimage.c
+ *
+ * (C

[U-Boot] [PATCH 5/6] pcm052: allow specifying onboard DDR size in configs

[Albert ARIBAUD (3ADEV)]

PCM052 SoMs may be equipped with various sizes of DDR.
Keep default of 256MB; new PCM052-based targets will
specify their actual DDR size.

Linux command line is auto-adjusted to DDR size.

Signed-off-by: Albert ARIBAUD (3ADEV) 
---

 board/phytec/pcm052/Kconfig | 4 
 include/configs/pcm052.h| 5 +++--
 2 files changed, 7 insertions(+), 2 deletions(-)

diff --git a/board/phytec/pcm052/Kconfig b/board/phytec/pcm052/Kconfig
index d67a69a..88524a3 100644
--- a/board/phytec/pcm052/Kconfig
+++ b/board/phytec/pcm052/Kconfig
@@ -12,4 +12,8 @@ config SYS_SOC
 config SYS_CONFIG_NAME
default "pcm052"
 
+config PCM052_DDR_SIZE
+   int
+   default 256
+
 endif
diff --git a/include/configs/pcm052.h b/include/configs/pcm052.h
index cd235cc..b3e5054 100644
--- a/include/configs/pcm052.h
+++ b/include/configs/pcm052.h
@@ -135,7 +135,8 @@
"tftptimeout=1000\0" \
"tftptimeoutcountmax=100\0" \
"mtdparts=" MTDPARTS_DEFAULT "\0" \
-   "bootargs_base=setenv bootargs rw mem=256M " \
+   "bootargs_base=setenv bootargs rw " \
+   " mem=" __stringify(CONFIG_PCM052_DDR_SIZE) "M " \
"console=ttyLP1,115200n8\0" \
"bootargs_sd=setenv bootargs ${bootargs} " \
"root=/dev/mmcblk0p2 rootwait\0" \
@@ -219,7 +220,7 @@
 /* Physical memory map */
 #define CONFIG_NR_DRAM_BANKS   1
 #define PHYS_SDRAM (0x8000)
-#define PHYS_SDRAM_SIZE(256 * 1024 * 1024)
+#define PHYS_SDRAM_SIZE(CONFIG_PCM052_DDR_SIZE * 1024 
* 1024)
 
 #define CONFIG_SYS_SDRAM_BASE  PHYS_SDRAM
 #define CONFIG_SYS_INIT_RAM_ADDR   IRAM_BASE_ADDR
-- 
2.9.3

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[U-Boot] [PATCH 6/6] pcm052: add new BK4r1 target based on PCM052 SoM

[Albert ARIBAUD (3ADEV)]

Signed-off-by: Albert ARIBAUD (3ADEV) 
---

 arch/arm/Kconfig |   4 ++
 arch/arm/dts/Makefile|   3 +-
 arch/arm/dts/bk4r1.dts   |  48 +
 arch/arm/dts/vf.dtsi |   4 +-
 board/phytec/pcm052/Kconfig  |  20 ++
 board/phytec/pcm052/pcm052.c | 168 +--
 configs/bk4r1_defconfig  |  32 +
 include/configs/bk4r1.h  |  33 +
 include/configs/pcm052.h |  45 ++--
 9 files changed, 297 insertions(+), 60 deletions(-)
 create mode 100644 arch/arm/dts/bk4r1.dts
 create mode 100644 configs/bk4r1_defconfig
 create mode 100644 include/configs/bk4r1.h

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 0083bf9..3c2d33a 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -678,6 +678,10 @@ config TARGET_PCM052
bool "Support pcm-052"
select CPU_V7
 
+config TARGET_BK4R1
+   bool "Support BK4r1"
+   select CPU_V7
+
 config ARCH_ZYNQ
bool "Xilinx Zynq Platform"
select CPU_V7
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index df57288..3e3b5c3 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -274,7 +274,8 @@ dtb-$(CONFIG_MACH_SUN9I) += \
 dtb-$(CONFIG_VF610) += vf500-colibri.dtb \
vf610-colibri.dtb \
vf610-twr.dtb \
-   pcm052.dtb
+   pcm052.dtb \
+   bk4r1.dtb
 
 dtb-$(CONFIG_SOC_KEYSTONE) += k2hk-evm.dtb \
k2l-evm.dtb \
diff --git a/arch/arm/dts/bk4r1.dts b/arch/arm/dts/bk4r1.dts
new file mode 100644
index 000..197e5ab
--- /dev/null
+++ b/arch/arm/dts/bk4r1.dts
@@ -0,0 +1,48 @@
+/*
+ * Copyright 2016 Toradex AG
+ *
+ * SPDX-License-Identifier: GPL-2.0+ or X11
+ */
+
+/dts-v1/;
+#include "vf.dtsi"
+
+/ {
+   model = "Phytec phyCORE-Vybrid";
+   compatible = "phytec,pcm052", "fsl,vf610";
+
+   chosen {
+   stdout-path = &uart1;
+   };
+
+   aliases {
+   spi0 = &qspi0;
+   };
+
+};
+
+&uart1 {
+   status = "okay";
+};
+
+&qspi0 {
+   bus-num = <0>;
+   num-cs = <2>;
+   status = "okay";
+
+   qflash0: spi_flash@0 {
+   #address-cells = <1>;
+   #size-cells = <1>;
+   compatible = "spi-flash";
+   spi-max-frequency = <10800>;
+   reg = <0>;
+   };
+
+   qflash1: spi_flash@1 {
+   #address-cells = <1>;
+   #size-cells = <1>;
+   compatible = "spi-flash";
+   spi-max-frequency = <6600>;
+   reg = <1>;
+   };
+};
diff --git a/arch/arm/dts/vf.dtsi b/arch/arm/dts/vf.dtsi
index 1530d2f..404dfe9 100644
--- a/arch/arm/dts/vf.dtsi
+++ b/arch/arm/dts/vf.dtsi
@@ -80,7 +80,9 @@
#address-cells = <1>;
#size-cells = <0>;
compatible = "fsl,vf610-qspi";
-   reg = <0x40044000 0x1000>;
+   reg = <0x40044000 0x1000>,
+ <0x2000 0x1000>;
+   reg-names = "QuadSPI", "QuadSPI-memory";
status = "disabled";
};
 
diff --git a/board/phytec/pcm052/Kconfig b/board/phytec/pcm052/Kconfig
index 88524a3..212f994 100644
--- a/board/phytec/pcm052/Kconfig
+++ b/board/phytec/pcm052/Kconfig
@@ -17,3 +17,23 @@ config PCM052_DDR_SIZE
default 256
 
 endif
+
+if TARGET_BK4R1
+
+config SYS_BOARD
+   default "pcm052"
+
+config SYS_VENDOR
+   default "phytec"
+
+config SYS_SOC
+   default "vf610"
+
+config SYS_CONFIG_NAME
+   default "bk4r1"
+
+config PCM052_DDR_SIZE
+   int
+   default 512
+
+endif
diff --git a/board/phytec/pcm052/pcm052.c b/board/phytec/pcm052/pcm052.c
index 7341899..e75ff4f 100644
--- a/board/phytec/pcm052/pcm052.c
+++ b/board/phytec/pcm052/pcm052.c
@@ -152,57 +152,6 @@ static struct ddrmc_phy_setting pcm052_phy_settings[] = {
 
 int dram_init(void)
 {
-   static const struct ddr3_jedec_timings pcm052_ddr_timings = {
-   .tinit = 5,
-   .trst_pwron= 8,
-   .cke_inactive  = 20,
-   .wrlat = 5,
-   .caslat_lin= 12,
-   .trc   = 6,
-   .trrd  = 4,
-   .tccd  = 4,
-   .tbst_int_interval = 4,
-   .tfaw  = 18,
-   .trp   = 6,
-   .twtr  = 4,
-   .tras_min  = 15,
-   .tmrd  = 4,
-   .trtp  = 4,
-   .tras_max  = 14040,
-   .tmod  = 12,
-   .tckesr= 4,
-   .tcke  = 3,
-   .trcd_int  = 6,
-   .tras_lockout  = 1,
-   .tdal  = 10,
-

Re: [U-Boot] [PATCH v2 1/2] mtd: nand : zynq_nand: Add nand driver support for zynq

[Siva Durga Prasad Paladugu]

Hi Michal,

> -Original Message-
> From: Michal Simek [mailto:michal.si...@xilinx.com]
> Sent: Monday, September 26, 2016 12:12 PM
> To: Siva Durga Prasad Paladugu ; u-boot@lists.denx.de
> Cc: o...@buserror.net; Siva Durga Prasad Paladugu 
> Subject: Re: [PATCH v2 1/2] mtd: nand : zynq_nand: Add nand driver support
> for zynq
> 
> On 23.9.2016 14:50, Siva Durga Prasad Paladugu wrote:
> > Add nand flash controller driver support for zynq SoC.
> >
> > Signed-off-by: Siva Durga Prasad Paladugu 
> > ---
> > Changes for v2:
> > - corrected the from address
> > ---
> >  drivers/mtd/nand/Kconfig |7 +
> >  drivers/mtd/nand/Makefile|1 +
> >  drivers/mtd/nand/zynq_nand.c | 1186
> > ++
> >  3 files changed, 1194 insertions(+)
> >  create mode 100644 drivers/mtd/nand/zynq_nand.c
> >
> > diff --git a/drivers/mtd/nand/Kconfig b/drivers/mtd/nand/Kconfig index
> > 5ce7d6d..7e5c436 100644
> > --- a/drivers/mtd/nand/Kconfig
> > +++ b/drivers/mtd/nand/Kconfig
> > @@ -80,6 +80,13 @@ config NAND_ARASAN
> >   controller. This uses the hardware ECC for read and
> >   write operations.
> >
> > +config NAND_ZYNQ
> > +   bool "Support for Zynq Nand controller"
> > +   select SYS_NAND_SELF_INIT
> > +   help
> > + This enables Nand driver support for Nand flash controller
> > + found on Zynq SoC.
> > +
> >  comment "Generic NAND options"
> >
> >  # Enhance depends when converting drivers to Kconfig which use this
> > config diff --git a/drivers/mtd/nand/Makefile
> > b/drivers/mtd/nand/Makefile index 1df9273..fd4bb66 100644
> > --- a/drivers/mtd/nand/Makefile
> > +++ b/drivers/mtd/nand/Makefile
> > @@ -67,6 +67,7 @@ obj-$(CONFIG_NAND_OMAP_GPMC) += omap_gpmc.o
> >  obj-$(CONFIG_NAND_OMAP_ELM) += omap_elm.o
> >  obj-$(CONFIG_NAND_PLAT) += nand_plat.o
> >  obj-$(CONFIG_NAND_SUNXI) += sunxi_nand.o
> > +obj-$(CONFIG_NAND_ZYNQ) += zynq_nand.o
> >
> >  else  # minimal SPL drivers
> >
> > diff --git a/drivers/mtd/nand/zynq_nand.c
> > b/drivers/mtd/nand/zynq_nand.c new file mode 100644 index
> > 000..a0003a4
> > --- /dev/null
> > +++ b/drivers/mtd/nand/zynq_nand.c
> > @@ -0,0 +1,1186 @@
> > +/*
> > + * (C) Copyright 2013 Xilinx, Inc.
> > + *
> > + * Xilinx Zynq NAND Flash Controller Driver
> > + * This driver is based on plat_nand.c and mxc_nand.c drivers
> > + *
> > + * SPDX-License-Identifier:GPL-2.0+
> > + */
> > +
> > +#include 
> > +#include 
> > +#include 
> > +#include 
> 
> drivers/mtd/nand/zynq_nand.c:13:23: fatal error: asm/errno.h: No such file
> or directory  #include 
>^
> compilation terminated.
> 
> Remove this header.

It might be due to latest changes on errno by Masahiro. 
I made this series on top of commit on friday
"201c9d884dcadb4e76981c30e9915f73de2d09b5"
Will anyway rebase it on top of latest master and send v3.

Thanks,
Siva
> 
> 
> > +#include 
> > +#include 
> > +#include 
> > +#include 
> > +#include 
> > +#include 
> > +
> > +/* The NAND flash driver defines */
> > +#define ZYNQ_NAND_CMD_PHASE1
> > +#define ZYNQ_NAND_DATA_PHASE   2
> > +#define ZYNQ_NAND_ECC_SIZE 512
> > +#define ZYNQ_NAND_SET_OPMODE_8BIT  (0 << 0)
> > +#define ZYNQ_NAND_SET_OPMODE_16BIT (1 << 0)
> > +#define ZYNQ_NAND_ECC_STATUS   (1 << 6)
> > +#define ZYNQ_MEMC_CLRCR_INT_CLR1   (1 << 4)
> > +#define ZYNQ_MEMC_SR_RAW_INT_ST1   (1 << 6)
> > +#define ZYNQ_MEMC_SR_INT_ST1   (1 << 4)
> > +#define ZYNQ_MEMC_NAND_ECC_MODE_MASK   0xC
> > +
> > +/* Flash memory controller operating parameters */
> > +#define ZYNQ_NAND_CLR_CONFIG   ((0x1 << 1)  |  /* Disable interrupt
> */ \
> > +   (0x1 << 4)   |  /* Clear interrupt */ \
> > +   (0x1 << 6)) /* Disable ECC interrupt */
> > +
> > +/* Assuming 50MHz clock (20ns cycle time) and 3V operation */
> > +#define ZYNQ_NAND_SET_CYCLES   ((0x2 << 20) |  /* t_rr from
> nand_cycles */ \
> > +   (0x2 << 17)  |  /* t_ar from nand_cycles */ \
> > +   (0x1 << 14)  |  /* t_clr from nand_cycles */ \
> > +   (0x3 << 11)  |  /* t_wp from nand_cycles */
> \
> > +   (0x2 << 8)   |  /* t_rea from nand_cycles */
> \
> > +   (0x5 << 4)   |  /* t_wc from nand_cycles */ \
> > +   (0x5 << 0)) /* t_rc from nand_cycles */
> > +
> > +
> > +#define ZYNQ_NAND_DIRECT_CMD   ((0x4 << 23) |  /* Chip 0 from
> interface 1 */ \
> > +   (0x2 << 21))/* UpdateRegs operation */
> > +
> > +#define ZYNQ_NAND_ECC_CONFIG   ((0x1 << 2)  |  /* ECC available on
> APB */ \
> > +   (0x1 << 4)   |  /* ECC read at end of page */
> \
> > +   (0x0 << 5)) /* No Jumping */
> > +
> > +#define ZYNQ_NAND_ECC_CMD1 ((0x80)  |  /* Write command */
> \
> > +   (0x00 << 8)  |  /*

Re: [U-Boot] [PATCH v2 1/2] mtd: nand : zynq_nand: Add nand driver support for zynq

[Michal Simek]

On 23.9.2016 14:50, Siva Durga Prasad Paladugu wrote:
> Add nand flash controller driver support for zynq SoC.
> 
> Signed-off-by: Siva Durga Prasad Paladugu 
> ---
> Changes for v2:
> - corrected the from address
> ---
>  drivers/mtd/nand/Kconfig |7 +
>  drivers/mtd/nand/Makefile|1 +
>  drivers/mtd/nand/zynq_nand.c | 1186 
> ++
>  3 files changed, 1194 insertions(+)
>  create mode 100644 drivers/mtd/nand/zynq_nand.c
> 
> diff --git a/drivers/mtd/nand/Kconfig b/drivers/mtd/nand/Kconfig
> index 5ce7d6d..7e5c436 100644
> --- a/drivers/mtd/nand/Kconfig
> +++ b/drivers/mtd/nand/Kconfig
> @@ -80,6 +80,13 @@ config NAND_ARASAN
> controller. This uses the hardware ECC for read and
> write operations.
>  
> +config NAND_ZYNQ
> + bool "Support for Zynq Nand controller"
> + select SYS_NAND_SELF_INIT
> + help
> +   This enables Nand driver support for Nand flash controller
> +   found on Zynq SoC.
> +
>  comment "Generic NAND options"
>  
>  # Enhance depends when converting drivers to Kconfig which use this config
> diff --git a/drivers/mtd/nand/Makefile b/drivers/mtd/nand/Makefile
> index 1df9273..fd4bb66 100644
> --- a/drivers/mtd/nand/Makefile
> +++ b/drivers/mtd/nand/Makefile
> @@ -67,6 +67,7 @@ obj-$(CONFIG_NAND_OMAP_GPMC) += omap_gpmc.o
>  obj-$(CONFIG_NAND_OMAP_ELM) += omap_elm.o
>  obj-$(CONFIG_NAND_PLAT) += nand_plat.o
>  obj-$(CONFIG_NAND_SUNXI) += sunxi_nand.o
> +obj-$(CONFIG_NAND_ZYNQ) += zynq_nand.o
>  
>  else  # minimal SPL drivers
>  
> diff --git a/drivers/mtd/nand/zynq_nand.c b/drivers/mtd/nand/zynq_nand.c
> new file mode 100644
> index 000..a0003a4
> --- /dev/null
> +++ b/drivers/mtd/nand/zynq_nand.c
> @@ -0,0 +1,1186 @@
> +/*
> + * (C) Copyright 2013 Xilinx, Inc.
> + *
> + * Xilinx Zynq NAND Flash Controller Driver
> + * This driver is based on plat_nand.c and mxc_nand.c drivers
> + *
> + * SPDX-License-Identifier:  GPL-2.0+
> + */
> +
> +#include 
> +#include 
> +#include 
> +#include 

drivers/mtd/nand/zynq_nand.c:13:23: fatal error: asm/errno.h: No such
file or directory
 #include 
   ^
compilation terminated.

Remove this header.


> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +
> +/* The NAND flash driver defines */
> +#define ZYNQ_NAND_CMD_PHASE  1
> +#define ZYNQ_NAND_DATA_PHASE 2
> +#define ZYNQ_NAND_ECC_SIZE   512
> +#define ZYNQ_NAND_SET_OPMODE_8BIT(0 << 0)
> +#define ZYNQ_NAND_SET_OPMODE_16BIT   (1 << 0)
> +#define ZYNQ_NAND_ECC_STATUS (1 << 6)
> +#define ZYNQ_MEMC_CLRCR_INT_CLR1 (1 << 4)
> +#define ZYNQ_MEMC_SR_RAW_INT_ST1 (1 << 6)
> +#define ZYNQ_MEMC_SR_INT_ST1 (1 << 4)
> +#define ZYNQ_MEMC_NAND_ECC_MODE_MASK 0xC
> +
> +/* Flash memory controller operating parameters */
> +#define ZYNQ_NAND_CLR_CONFIG ((0x1 << 1)  |  /* Disable interrupt */ \
> + (0x1 << 4)   |  /* Clear interrupt */ \
> + (0x1 << 6)) /* Disable ECC interrupt */
> +
> +/* Assuming 50MHz clock (20ns cycle time) and 3V operation */
> +#define ZYNQ_NAND_SET_CYCLES ((0x2 << 20) |  /* t_rr from nand_cycles */ \
> + (0x2 << 17)  |  /* t_ar from nand_cycles */ \
> + (0x1 << 14)  |  /* t_clr from nand_cycles */ \
> + (0x3 << 11)  |  /* t_wp from nand_cycles */ \
> + (0x2 << 8)   |  /* t_rea from nand_cycles */ \
> + (0x5 << 4)   |  /* t_wc from nand_cycles */ \
> + (0x5 << 0)) /* t_rc from nand_cycles */
> +
> +
> +#define ZYNQ_NAND_DIRECT_CMD ((0x4 << 23) |  /* Chip 0 from interface 1 */ \
> + (0x2 << 21))/* UpdateRegs operation */
> +
> +#define ZYNQ_NAND_ECC_CONFIG ((0x1 << 2)  |  /* ECC available on APB */ \
> + (0x1 << 4)   |  /* ECC read at end of page */ \
> + (0x0 << 5)) /* No Jumping */
> +
> +#define ZYNQ_NAND_ECC_CMD1   ((0x80)  |  /* Write command */ \
> + (0x00 << 8)  |  /* Read command */ \
> + (0x30 << 16) |  /* Read End command */ \
> + (0x1 << 24))/* Read End command calid */
> +
> +#define ZYNQ_NAND_ECC_CMD2   ((0x85)  |  /* Write col change cmd */ \
> + (0x05 << 8)  |  /* Read col change cmd */ \
> + (0xE0 << 16) |  /* Read col change end cmd */ \
> + (0x1 << 24))/* Read col change
> + end cmd valid */
> +/* AXI Address definitions */
> +#define START_CMD_SHIFT  3
> +#define END_CMD_SHIFT11
> +#define END_CMD_VALID_SHIFT  20
> +#define ADDR_CYCLES_SHIFT21
> +#define CLEAR_CS_SHIFT   

Re: [U-Boot] [PATCH v2 1/3] arm: mvebu: create generic 88F6820 config option

[Chris Packham]

Hi Stefan,

On Sat, Sep 24, 2016 at 8:09 PM, Stefan Roese  wrote:
> On 22.09.2016 02:56, Chris Packham wrote:
>>
>> 88F6820 is a specific Armada-38x chip that is used on the DB-88F6820-GP
>> board. Rather than having DB_88F6820_GP and TARGET_DB_88F6820_GP which
>> selects the former. Rename DB_88F6820_GP to 88F6820 so that other boards
>> using the 88F6820 can be added.
>>
>> Signed-off-by: Chris Packham 
>> ---
>>
>> Changes in v2: None
>
>
> Changed for clearfog here as well while applying.
>

I didn't notice clearfog when I was looking. One potential side-effect
of my change for the clearfog board is that mv_board_id_get() will now
return 0 instead of DB_68XX_ID (0x11). I'm not sure what the
consequences of this are. The AMC board works fine with 0 and
DB_68XX_ID is probably wrong for a board that is not the
db-88f6820-gp. On the other hand the AMC board isn't using a number of
peripherals so I may not have noticed a breakage.

If this does turn out to be a problem the following should be
equivalent to the way things were before (sorry can't send a proper
patch having remote access issues).

--- 8< ---
diff --git a/arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.c
b/arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.c
index 49d704a..cc3e5e2 100644 (file)
--- a/arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.c
+++ b/arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.c
@@ -45,7 +45,7 @@ u32 g_dev_id = -1;

 u32 mv_board_id_get(void)
 {
-#if defined(CONFIG_TARGET_DB_88F6820_GP)
+#if defined(CONFIG_88F6820)
   return DB_GP_68XX_ID;
 #else
___
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Re: [U-Boot] [PATCH v2 1/8] x86: Add implementations of setjmp() and longjmp()

[Bin Meng]

Hi Alex,

On Mon, Sep 26, 2016 at 3:05 PM, Alexander Graf  wrote:
>
>
> On 26.09.16 09:00, Bin Meng wrote:
>> Hi Simon,
>>
>> On Mon, Sep 26, 2016 at 5:27 AM, Simon Glass  wrote:
>>> Bring in these functions from Linux v4.4. They will be needed for EFI loader
>>> support.
>>>
>>> Signed-off-by: Simon Glass 
>>> ---
>>>
>>> Changes in v2:
>>> - Drop irrelevant comment
>>> - Add a comment about .size
>>> - Drop unnecessary .text directive
>>> - Make longjmp() always cause setjmp() to return 1
>>>
>>>  arch/x86/cpu/Makefile |  2 +-
>>>  arch/x86/cpu/setjmp.S | 66 
>>> +++
>>>  arch/x86/include/asm/setjmp.h | 24 
>>>  3 files changed, 91 insertions(+), 1 deletion(-)
>>>  create mode 100644 arch/x86/cpu/setjmp.S
>>>  create mode 100644 arch/x86/include/asm/setjmp.h
>>>
>>> diff --git a/arch/x86/cpu/Makefile b/arch/x86/cpu/Makefile
>>> index 2667e0b..f5b8c9e 100644
>>> --- a/arch/x86/cpu/Makefile
>>> +++ b/arch/x86/cpu/Makefile
>>> @@ -10,7 +10,7 @@
>>>
>>>  extra-y= start.o
>>>  obj-$(CONFIG_X86_RESET_VECTOR) += resetvec.o start16.o
>>> -obj-y  += interrupts.o cpu.o cpu_x86.o call64.o
>>> +obj-y  += interrupts.o cpu.o cpu_x86.o call64.o setjmp.o
>>>
>>>  AFLAGS_REMOVE_call32.o := -mregparm=3 \
>>> $(if $(CONFIG_EFI_STUB_64BIT),-march=i386 -m32)
>>> diff --git a/arch/x86/cpu/setjmp.S b/arch/x86/cpu/setjmp.S
>>> new file mode 100644
>>> index 000..7443274
>>> --- /dev/null
>>> +++ b/arch/x86/cpu/setjmp.S
>>> @@ -0,0 +1,66 @@
>>> +/*
>>> + * Written by H. Peter Anvin 
>>> + * Brought in from Linux v4.4 and modified for U-Boot
>>> + * From Linux arch/um/sys-i386/setjmp.S
>>> + *
>>> + * SPDX-License-Identifier:GPL-2.0
>>> + */
>>> +
>>> +#include 
>>> +#include 
>>> +#include 
>>> +
>>
>> I believe the above 3 includes are not needed.
>>
>>> +#define _REGPARM
>>> +
>>> +/*
>>> + * The jmp_buf is assumed to contain the following, in order:
>>> + * %ebx
>>> + * %esp
>>> + * %ebp
>>> + * %esi
>>> + * %edi
>>> + * 
>>> + */
>>> +
>>> +   .text
>>> +   .align 4
>>> +   .globl setjmp
>>> +   .type setjmp, @function
>>> +setjmp:
>>> +#ifdef _REGPARM
>>> +   movl %eax, %edx
>>> +#else
>>> +   movl 4(%esp), %edx
>>> +#endif
>>> +   popl %ecx   /* Return address, and adjust the stack */
>>> +   xorl %eax, %eax /* Return value */
>>> +   movl %ebx, (%edx)
>>> +   movl %esp, 4(%edx)  /* Post-return %esp! */
>>> +   pushl %ecx  /* Make the call/return stack happy */
>>> +   movl %ebp, 8(%edx)
>>> +   movl %esi, 12(%edx)
>>> +   movl %edi, 16(%edx)
>>> +   movl %ecx, 20(%edx) /* Return address */
>>> +   ret
>>> +
>>> +   /* Provide function size if needed */
>>> +   .size setjmp, .-setjmp
>>> +
>>> +   .align 4
>>> +   .globl longjmp
>>> +   .type longjmp, @function
>>> +longjmp:
>>> +#ifdef _REGPARM
>>> +   xchgl %eax, %edx
>>> +#else
>>> +   movl 4(%esp), %edx  /* jmp_ptr address */
>>> +#endif
>>> +   movl 1, %eax
>>
>> This should be $1.
>>
>> But I still think the setjmp/longjump codes in efi_loader is wrong. We
>> should have longjump() to pass the return value to setjmp().
>
> Why? Where's the difference?
>

longjump() does not have the setjmp() return value as the parameter,
which concerns me as it does not conform to the standard longjump()
implementation. This v2 hardcoded the return value to 1, which makes
the following logic work in efi_loader.

if (setjmp(&info->exit_jmp)) {
/* We returned from the child image */
return EFI_EXIT(info->exit_status);
}

If we want such a simplified implementation in efi_loader, we should
probably rename these functions to efi_setjmp() and efi_longjump().

Regards,
Bin
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[U-Boot] [PATCH] Cash flash correction of do_load()

[yoko]

Signed-off-by: yoko 
---
 fs/fs.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

 For a program execution abnormal measure by the fatload command, cash flash 
processing is added to do_load().

diff --git a/fs/fs.c b/fs/fs.c
index 595ff1f..7607230 100644
--- a/fs/fs.c
+++ b/fs/fs.c
@@ -417,6 +417,8 @@ int do_load(cmd_tbl_t *cmdtp, int flag, int argc, char * 
const argv[],
}
puts("\n");
 
+   flush_cache(addr, len_read);
+
setenv_hex("fileaddr", addr);
setenv_hex("filesize", len_read);
 
@@ -535,4 +537,3 @@ int do_fs_type(cmd_tbl_t *cmdtp, int flag, int argc, char * 
const argv[])
 
return CMD_RET_SUCCESS;
 }
-
-- 
2.8.4 (Apple Git-73)

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Re: [U-Boot] [PATCH] tools: mkimage: Add support for initialization table for Zynq and ZynqMP

[Mike Looijmans]

On 22-09-16 11:25, Michal Simek wrote:

From: Mike Looijmans 

The Zynq/ZynqMP boot.bin file contains a region for register initialization
data. Filling in proper values in this table can reduce boot time
(e.g. about 50ms faster on QSPI boot) and also reduce the size of
the SPL binary.

The table is a simple text file with register+data on each line. Other
lines are simply skipped. The file can be passed to mkimage using the
"-R" parameter.

It is recommended to add reg init file to board folder.
For example:
CONFIG_BOOT_INIT_FILE="board/xilinx/zynqmp/xilinx_zynqmp_zcu102/reg.int

Signed-off-by: Mike Looijmans 
Signed-off-by: Michal Simek 
---

  arch/arm/cpu/armv8/zynqmp/Kconfig |  7 +++
  arch/arm/mach-zynq/Kconfig|  7 +++
  scripts/Makefile.spl  |  4 ++--
  tools/zynqimage.c | 28 
  tools/zynqmpimage.c   | 28 
  5 files changed, 72 insertions(+), 2 deletions(-)

diff --git a/arch/arm/cpu/armv8/zynqmp/Kconfig 
b/arch/arm/cpu/armv8/zynqmp/Kconfig
index 1eedb39aa5a8..a3baae4f740c 100644
--- a/arch/arm/cpu/armv8/zynqmp/Kconfig
+++ b/arch/arm/cpu/armv8/zynqmp/Kconfig
@@ -41,6 +41,13 @@ config SYS_CONFIG_NAME
  Based on this option include/configs/.h header
  will be used for board configuration.

+config BOOT_INIT_FILE
+   string "boot.bin init register filename"
+   default ""
+   help
+ Add register writes to boot.bin format (max 256 pairs).
+ Expect a table of register-value pairs, e.g. "0x12345678 0x4321"
+
  config ZYNQMP_USB
bool "Configure ZynqMP USB"

diff --git a/arch/arm/mach-zynq/Kconfig b/arch/arm/mach-zynq/Kconfig
index a1175eea6ebb..44e16af863d7 100644
--- a/arch/arm/mach-zynq/Kconfig
+++ b/arch/arm/mach-zynq/Kconfig
@@ -44,4 +44,11 @@ config SYS_CONFIG_NAME
  config SYS_MALLOC_F_LEN
default 0x600

+config BOOT_INIT_FILE
+   string "boot.bin init register filename"
+   default ""
+   help
+ Add register writes to boot.bin format (max 256 pairs).
+ Expect a table of register-value pairs, e.g. "0x12345678 0x4321"
+
  endif
diff --git a/scripts/Makefile.spl b/scripts/Makefile.spl
index 4994fa887ba3..b12b0c27dfe9 100644
--- a/scripts/Makefile.spl
+++ b/scripts/Makefile.spl
@@ -142,10 +142,10 @@ boot.bin: $(obj)/u-boot-spl.bin FORCE
$(call if_changed,mkimage)
  else
  ifdef CONFIG_ARCH_ZYNQ
-MKIMAGEFLAGS_boot.bin = -T zynqimage
+MKIMAGEFLAGS_boot.bin = -T zynqimage -R $(CONFIG_BOOT_INIT_FILE)


This should be:

MKIMAGEFLAGS_boot.bin = -T zynqimage -R $(srctree)/$(CONFIG_BOOT_INIT_FILE)

Without the "$(srctree)", out-of-tree builds will fail.


  endif
  ifdef CONFIG_ARCH_ZYNQMP
-MKIMAGEFLAGS_boot.bin = -T zynqmpimage
+MKIMAGEFLAGS_boot.bin = -T zynqmpimage -R $(CONFIG_BOOT_INIT_FILE)


Same here:
MKIMAGEFLAGS_boot.bin = -T zynqmpimage -R $(srctree)/$(CONFIG_BOOT_INIT_FILE)


  endif

  spl/boot.bin: $(obj)/u-boot-spl.bin FORCE
diff --git a/tools/zynqimage.c b/tools/zynqimage.c
index c43bd5d48820..43876e7a3024 100644
--- a/tools/zynqimage.c
+++ b/tools/zynqimage.c
@@ -222,6 +222,30 @@ static int zynqimage_check_image_types(uint8_t type)
return EXIT_FAILURE;
  }

+static void zynqimage_parse_initparams(struct zynq_header *zynqhdr,
+   const char *filename)
+{
+   /* Expect a table of register-value pairs, e.g. "0x12345678 0x4321" */
+   FILE *fp = fopen(filename, "r");
+   struct zynq_reginit reginit;
+   unsigned int reg_count = 0;
+   int r;
+
+   if (!fp) {
+   fprintf(stderr, "Cannot open initparams file: %s\n", filename);
+   exit(1);
+   }
+   do {
+   r = fscanf(fp, "%x %x", ®init.address, ®init.data);
+   if (r == 2) {
+   zynqhdr->register_init[reg_count] = reginit;
+   ++reg_count;
+   }
+   r = fscanf(fp, "%*[^\n]\n"); /* Skip to next line */
+   } while ((r != EOF) && (reg_count < HEADER_REGINITS));
+   fclose(fp);
+}
+
  static void zynqimage_set_header(void *ptr, struct stat *sbuf, int ifd,
struct image_tool_params *params)
  {
@@ -237,6 +261,10 @@ static void zynqimage_set_header(void *ptr, struct stat 
*sbuf, int ifd,
if (params->eflag)
zynqhdr->image_load = cpu_to_le32((uint32_t)params->ep);

+   /* User can pass in text file with init list */
+   if (strlen(params->imagename2))
+   zynqimage_parse_initparams(zynqhdr, params->imagename2);
+
zynqhdr->checksum = zynqimage_checksum(zynqhdr);
  }

diff --git a/tools/zynqmpimage.c b/tools/zynqmpimage.c
index 3f28eb401d9b..d08144c2bdfd 100644
--- a/tools/zynqmpimage.c
+++ b/tools/zynqmpimage.c
@@ -234,6 +234,30 @@ static int zynqmpimage_check_image_types(uint8_t type)
return EXIT_FAILURE;
  }

+static void zynqmpimage_parse_initparams(struct zynqmp_header *zynqhdr,
+   const char *filename)
+{
+

[U-Boot] [PATCH v2] at91: video: Support driver-model for the HLCD driver

[Songjun Wu]

Add driver-model support to this driver.

Signed-off-by: Songjun Wu 
---

Changes in v2:
- Due to the peripheral clock driver improvement, remove
  the unneccessary clock calling.

 drivers/video/Kconfig|   7 +
 drivers/video/Makefile   |   2 +-
 drivers/video/atmel_hlcdfb.c | 314 ++-
 3 files changed, 319 insertions(+), 4 deletions(-)

diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig
index 8361a71..c40b2cf 100644
--- a/drivers/video/Kconfig
+++ b/drivers/video/Kconfig
@@ -362,6 +362,13 @@ config DISPLAY
   The devices provide a simple interface to start up the display,
   read display information and enable it.
 
+config VIDEO_ATMEL_HLCD
+   bool "Enable ATMEL video support using HLCDC"
+   depends on DM_VIDEO
+   help
+  Only the LCD is supported in U-Boot. This option enables this support
+  which can be used on devices which have an LCD display connected.
+
 config VIDEO_BROADWELL_IGD
bool "Enable Intel Broadwell integrated graphics device"
depends on X86
diff --git a/drivers/video/Makefile b/drivers/video/Makefile
index 3f045fe..3d54cf9 100644
--- a/drivers/video/Makefile
+++ b/drivers/video/Makefile
@@ -22,7 +22,6 @@ endif
 obj-$(CONFIG_VIDEO_BROADWELL_IGD) += broadwell_igd.o
 
 obj-$(CONFIG_ATI_RADEON_FB) += ati_radeon_fb.o videomodes.o
-obj-$(CONFIG_ATMEL_HLCD) += atmel_hlcdfb.o
 obj-$(CONFIG_ATMEL_LCD) += atmel_lcdfb.o
 obj-$(CONFIG_CFB_CONSOLE) += cfb_console.o
 obj-$(CONFIG_FSL_DIU_FB) += fsl_diu_fb.o videomodes.o
@@ -35,6 +34,7 @@ obj-$(CONFIG_S6E8AX0) += s6e8ax0.o
 obj-$(CONFIG_S6E63D6) += s6e63d6.o
 obj-$(CONFIG_LD9040) += ld9040.o
 obj-$(CONFIG_SED156X) += sed156x.o
+obj-$(CONFIG_VIDEO_ATMEL_HLCD) += atmel_hlcdfb.o
 obj-$(CONFIG_VIDEO_BCM2835) += bcm2835.o
 obj-$(CONFIG_VIDEO_COREBOOT) += coreboot_fb.o
 obj-$(CONFIG_VIDEO_CT69000) += ct69000.o videomodes.o
diff --git a/drivers/video/atmel_hlcdfb.c b/drivers/video/atmel_hlcdfb.c
index 960b474..0bcb92b 100644
--- a/drivers/video/atmel_hlcdfb.c
+++ b/drivers/video/atmel_hlcdfb.c
@@ -10,13 +10,24 @@
 #include 
 #include 
 #include 
+#include 
+#include 
+#include 
 #include 
+#include 
 #include 
 
 #if defined(CONFIG_LCD_LOGO)
 #include 
 #endif
 
+DECLARE_GLOBAL_DATA_PTR;
+
+#define lcdc_readl(reg)__raw_readl((reg))
+#define lcdc_writel(reg, val)  __raw_writel((val), (reg))
+
+#ifndef CONFIG_DM_VIDEO
+
 /* configurable parameters */
 #define ATMEL_LCDC_CVAL_DEFAULT0xc8
 #define ATMEL_LCDC_DMA_BURST_LEN   8
@@ -26,9 +37,6 @@
 
 #define ATMEL_LCDC_FIFO_SIZE   512
 
-#define lcdc_readl(reg)__raw_readl((reg))
-#define lcdc_writel(reg, val)  __raw_writel((val), (reg))
-
 /*
  * the CLUT register map as following
  * RCLUT(24 ~ 16), GCLUT(15 ~ 8), BCLUT(7 ~ 0)
@@ -218,3 +226,303 @@ void lcd_ctrl_init(void *lcdbase)
/* Enable flushing if we enabled dcache */
lcd_set_flush_dcache(1);
 }
+
+#else
+
+enum {
+   LCD_MAX_WIDTH   = 1024,
+   LCD_MAX_HEIGHT  = 768,
+   LCD_MAX_LOG2_BPP= VIDEO_BPP16,
+};
+
+struct atmel_hlcdc_priv {
+   struct atmel_hlcd_regs *regs;
+   struct display_timing timing;
+   unsigned int vl_bpix;
+   unsigned int guard_time;
+   ulong clk_rate;
+};
+
+static int at91_hlcdc_enable_clk(struct udevice *dev)
+{
+   struct atmel_hlcdc_priv *priv = dev_get_priv(dev);
+   struct clk clk;
+   ulong clk_rate;
+   int ret;
+
+   ret = clk_get_by_index(dev, 0, &clk);
+   if (ret)
+   return -EINVAL;
+
+   ret = clk_enable(&clk);
+   if (ret)
+   return ret;
+
+   clk_rate = clk_get_rate(&clk);
+   if (!clk_rate)
+   return -ENODEV;
+
+   priv->clk_rate = clk_rate;
+
+   clk_free(&clk);
+
+   return 0;
+}
+
+static void atmel_hlcdc_init(struct udevice *dev)
+{
+   struct video_uc_platdata *uc_plat = dev_get_uclass_platdata(dev);
+   struct atmel_hlcdc_priv *priv = dev_get_priv(dev);
+   struct atmel_hlcd_regs *regs = priv->regs;
+   struct display_timing *timing = &priv->timing;
+   struct lcd_dma_desc *desc;
+   unsigned long value, vl_clk_pol;
+
+   /* Disable DISP signal */
+   lcdc_writel(®s->lcdc_lcddis, LCDC_LCDDIS_DISPDIS);
+   while ((lcdc_readl(®s->lcdc_lcdsr) & LCDC_LCDSR_DISPSTS))
+   udelay(1);
+   /* Disable synchronization */
+   lcdc_writel(®s->lcdc_lcddis, LCDC_LCDDIS_SYNCDIS);
+   while ((lcdc_readl(®s->lcdc_lcdsr) & LCDC_LCDSR_LCDSTS))
+   udelay(1);
+   /* Disable pixel clock */
+   lcdc_writel(®s->lcdc_lcddis, LCDC_LCDDIS_CLKDIS);
+   while ((lcdc_readl(®s->lcdc_lcdsr) & LCDC_LCDSR_CLKSTS))
+   udelay(1);
+   /* Disable PWM */
+   lcdc_writel(®s->lcdc_lcddis, LCDC_LCDDIS_PWMDIS);
+   while ((lcdc_readl(®s->lcdc_lcdsr) & LCDC_LCDSR_PWMSTS))
+   udelay(1);
+
+   /* S

Re: [U-Boot] [PATCH] getting ubifs to run

[Travis Waters]

Thanks for the response. I went ahead and used the current patch as-is,
which allowed me to build.  I haven't yet verified whether the result  is
functional, though.  (We are probably a couple weeks out from having our
FLASH driver in place).  I'll let you know what we find.
-Travis

On Sep 25, 2016 10:38 PM, "Heiko Schocher"  wrote:

> Hello Travis,
>
> Am 21.09.2016 um 22:05 schrieb Travis Waters:
>
>> Hello,
>>
>> I am working to enable UBIFS for use on the sparc platform and I am
>> running
>> into the same linking trouble flagged in this thread:
>>
>> uboot/fs/ubifs/lpt_commit.c:1232: undefined reference to
>> `dbg_chk_lpt_free_spc'
>> uboot/fs/ubifs/lpt_commit.c:1235: undefined reference to `dbg_check_ltab'
>> fs/built-in.o: In function `layout_cnodes':
>> uboot/fs/ubifs/lpt_commit.c:195: undefined reference to `dbg_chk_lpt_sz'
>> uboot/fs/ubifs/lpt_commit.c:211: undefined reference to `dbg_chk_lpt_sz'
>> uboot/fs/ubifs/lpt_commit.c:219: undefined reference to `dbg_chk_lpt_sz'
>> uboot/fs/ubifs/lpt_commit.c:233: undefined reference to `dbg_chk_lpt_sz'
>> uboot/fs/ubifs/lpt_commit.c:246: undefined reference to `dbg_chk_lpt_sz'
>> fs/built-in.o:uboot/fs/ubifs/lpt_commit.c:254: more undefined references
>> to
>> `dbg_chk_lpt_sz' follow
>> fs/built-in.o: In function `layout_cnodes':
>> uboot/fs/ubifs/lpt_commit.c:322: undefined reference to
>> `ubifs_dump_lpt_lebs'
>> fs/built-in.o: In function `ubifs_add_bud_to_log':
>> uboot/fs/ubifs/log.c:194: undefined reference to `ubifs_commit_required'
>> uboot/fs/ubifs/log.c:225: undefined reference to `ubifs_request_bg_commit'
>> uboot/fs/ubifs/log.c:265: undefined reference to `ubifs_write_node'
>> fs/built-in.o: In function `ubifs_log_end_commit':
>> uboot/fs/ubifs/log.c:479: undefined reference to `ubifs_write_master'
>> fs/built-in.o: In function `do_write_orph_node':
>> uboot/fs/ubifs/orphan.c:248: undefined reference to `ubifs_write_node'
>>
>>
>> What is the status of the patch that was addressing this?
>>
>
> Hmm... my last message to Marco (added to Cc) was, to split the patch
> into 2 pieces (one for the sparc fixes and one for the ubifs fixes)
>
> IIRC I saw a fix for the sparc errors, but none for ubifs ...
>
> bye,
> Heiko
> --
> DENX Software Engineering GmbH,  Managing Director: Wolfgang Denk
> HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
>
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[U-Boot] [PATCH 0/6] Add support for the BK4R1 variant of PCM052

[Albert ARIBAUD (3ADEV)]

BK4R1 is basically PCM052 with the following differences
or quirks:

  1) it has 512MB of DDR using MT41K256M16HA_125IT,
 while the PCM052 has 256MB using MT41J128M16HA_15EIT;

  2) it has 1GB of NAND. The size increase is supported
 by the env directly;

  3) its Ethernet ports are physicaly tied together until
 GPIO 122 is raised. As this is a safety feature U-Boot
 does not untie the ports except if it needs networking,
 for instance when doing NAND updates via TFTP;

  4) it has a USB hub which may remain in reset if GPIO 130
 is not raised. This is done unconditionally at boot;

  5) It has two NOR SPI flash chips on QSPI.

This series has been run through checkpatch and has no errors
or warning except the following one:

warning: arch/arm/Kconfig,681: please write a
paragraph that describes the config symbol fully

Which I believe does not apply, as target configs in this file
never have descriptions.


Albert ARIBAUD (3ADEV) (6):
  pcm052: fix MTD partitioning
  pcm052: remove target-specific dtb name from env
  pcm052: add 'm4go' command
  tools: mkimage: add support for Vybrid image format
  pcm052: allow specifying onboard DDR size in configs
  pcm052: add new BK4r1 target based on PCM052 SoM

 Makefile  |   6 ++
 arch/arm/Kconfig  |   4 +
 arch/arm/config.mk|   3 +
 arch/arm/cpu/armv7/vf610/Makefile |   5 +
 arch/arm/dts/Makefile |   3 +-
 arch/arm/dts/bk4r1.dts|  48 +
 arch/arm/dts/vf.dtsi  |   4 +-
 board/phytec/pcm052/Kconfig   |  24 +
 board/phytec/pcm052/pcm052.c  | 206 --
 common/image.c|   1 +
 configs/bk4r1_defconfig   |  32 ++
 include/configs/bk4r1.h   |  33 ++
 include/configs/pcm052.h  |  78 ++-
 include/image.h   |   1 +
 tools/Makefile|   1 +
 tools/vybridimage.c   | 164 ++
 16 files changed, 535 insertions(+), 78 deletions(-)
 create mode 100644 arch/arm/dts/bk4r1.dts
 create mode 100644 configs/bk4r1_defconfig
 create mode 100644 include/configs/bk4r1.h
 create mode 100644 tools/vybridimage.c

-- 
2.9.3

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Re: [U-Boot] [PATCH v2 1/8] x86: Add implementations of setjmp() and longjmp()

[Alexander Graf]

On 26.09.16 09:21, Bin Meng wrote:
> Hi Alex,
> 
> On Mon, Sep 26, 2016 at 3:05 PM, Alexander Graf  wrote:
>>
>>
>> On 26.09.16 09:00, Bin Meng wrote:
>>> Hi Simon,
>>>
>>> On Mon, Sep 26, 2016 at 5:27 AM, Simon Glass  wrote:
 Bring in these functions from Linux v4.4. They will be needed for EFI 
 loader
 support.

 Signed-off-by: Simon Glass 
 ---

 Changes in v2:
 - Drop irrelevant comment
 - Add a comment about .size
 - Drop unnecessary .text directive
 - Make longjmp() always cause setjmp() to return 1

  arch/x86/cpu/Makefile |  2 +-
  arch/x86/cpu/setjmp.S | 66 
 +++
  arch/x86/include/asm/setjmp.h | 24 
  3 files changed, 91 insertions(+), 1 deletion(-)
  create mode 100644 arch/x86/cpu/setjmp.S
  create mode 100644 arch/x86/include/asm/setjmp.h

 diff --git a/arch/x86/cpu/Makefile b/arch/x86/cpu/Makefile
 index 2667e0b..f5b8c9e 100644
 --- a/arch/x86/cpu/Makefile
 +++ b/arch/x86/cpu/Makefile
 @@ -10,7 +10,7 @@

  extra-y= start.o
  obj-$(CONFIG_X86_RESET_VECTOR) += resetvec.o start16.o
 -obj-y  += interrupts.o cpu.o cpu_x86.o call64.o
 +obj-y  += interrupts.o cpu.o cpu_x86.o call64.o setjmp.o

  AFLAGS_REMOVE_call32.o := -mregparm=3 \
 $(if $(CONFIG_EFI_STUB_64BIT),-march=i386 -m32)
 diff --git a/arch/x86/cpu/setjmp.S b/arch/x86/cpu/setjmp.S
 new file mode 100644
 index 000..7443274
 --- /dev/null
 +++ b/arch/x86/cpu/setjmp.S
 @@ -0,0 +1,66 @@
 +/*
 + * Written by H. Peter Anvin 
 + * Brought in from Linux v4.4 and modified for U-Boot
 + * From Linux arch/um/sys-i386/setjmp.S
 + *
 + * SPDX-License-Identifier:GPL-2.0
 + */
 +
 +#include 
 +#include 
 +#include 
 +
>>>
>>> I believe the above 3 includes are not needed.
>>>
 +#define _REGPARM
 +
 +/*
 + * The jmp_buf is assumed to contain the following, in order:
 + * %ebx
 + * %esp
 + * %ebp
 + * %esi
 + * %edi
 + * 
 + */
 +
 +   .text
 +   .align 4
 +   .globl setjmp
 +   .type setjmp, @function
 +setjmp:
 +#ifdef _REGPARM
 +   movl %eax, %edx
 +#else
 +   movl 4(%esp), %edx
 +#endif
 +   popl %ecx   /* Return address, and adjust the stack */
 +   xorl %eax, %eax /* Return value */
 +   movl %ebx, (%edx)
 +   movl %esp, 4(%edx)  /* Post-return %esp! */
 +   pushl %ecx  /* Make the call/return stack happy */
 +   movl %ebp, 8(%edx)
 +   movl %esi, 12(%edx)
 +   movl %edi, 16(%edx)
 +   movl %ecx, 20(%edx) /* Return address */
 +   ret
 +
 +   /* Provide function size if needed */
 +   .size setjmp, .-setjmp
 +
 +   .align 4
 +   .globl longjmp
 +   .type longjmp, @function
 +longjmp:
 +#ifdef _REGPARM
 +   xchgl %eax, %edx
 +#else
 +   movl 4(%esp), %edx  /* jmp_ptr address */
 +#endif
 +   movl 1, %eax
>>>
>>> This should be $1.
>>>
>>> But I still think the setjmp/longjump codes in efi_loader is wrong. We
>>> should have longjump() to pass the return value to setjmp().
>>
>> Why? Where's the difference?
>>
> 
> longjump() does not have the setjmp() return value as the parameter,
> which concerns me as it does not conform to the standard longjump()
> implementation. This v2 hardcoded the return value to 1, which makes
> the following logic work in efi_loader.
> 
> if (setjmp(&info->exit_jmp)) {
> /* We returned from the child image */
> return EFI_EXIT(info->exit_status);
> }
> 
> If we want such a simplified implementation in efi_loader, we should
> probably rename these functions to efi_setjmp() and efi_longjump().

Ah, I see. The second parameter to longjmp() should be the the return
value after the jump - which the code above actually implements. And
then it clobbers it with a 1.

I guess that's my fault, because I skipped the second argument bit in my
longjmp header definition. Please just add it to the longjmp prototype
and explicitly pass "1" as return value in (don't forget to adapt the
prototypes in arch/arm/include/asm/setjmp.h). I can fix up the arm code
later to actually pass the argument.


Alex
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Re: [U-Boot] [PATCH v2 5/8] arm: efi: Add a hello world test program

[Alexander Graf]

On 25.09.16 23:27, Simon Glass wrote:
> It is useful to have a basic sanity check for EFI loader support. Add a
> 'bootefi hello' command which loads HelloWord.efi and runs it under U-Boot.
> 
> Signed-off-by: Simon Glass 
> ---
> 
> Changes in v2: None
> 
>  arch/arm/lib/HelloWorld32.efi  | Bin 0 -> 11712 bytes

IIRC U-Boot as a whole is GPL licensed, which means that any binaries
shipped inside would also need to be GPL compatibly licensed which again
means that the source code (and build instructions?) for this .efi file
would need to be part of the tree, no?


Alex
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Re: [U-Boot] [PATCH 2/9] MIPS: fix ROM exception vectors

[Matthew Fortune]

Daniel Schwierzeck  writes:
> When booting from ROM, early exceptions can't be handled
> properly. Instead of busy-looping give the developer the
> possibilty to examine the situation. Thus issue a SDBBP
> instruction to transfer control to hardware debugger if one
> is attached.

You could make the SDBBP into a UHI operation that can be read by
a debugger as an unhandled exception rather than an unexpected
breakpoint (assuming said debugger knows about UHI). The fragment
I use in lightweight boot code is:

move  k0, t9# Preserve t9
move  k1, a0# Preserve a0
li$25, 15   # UHI exception operation
li$4, 0 # Use hard register context
sdbbp 1 # Invoke UHI operation

You lose k0/k1 in this which may be undesirable but it might
be a reasonable trade off. This shouldn't go in the debug vector
of course!

Matthew
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Re: [U-Boot] [PATCH 0/9] MIPS: improve start.S and add exception support

[Matthew Fortune]

Daniel Schwierzeck  writes:
> will be simply exited. The SDBBP handler currently only
> prints the content of registers c0_depc and c0_debug. This
> could be extended in the future to handle semi-hosting
> according to the MIPS UHI specification.

Thanks for considering UHI in this.  I worked on a prototype
implementation of UHI with Paul that is yet to be submitted
which hooks the syscall exception in U-Boot.  There is a way
to avoid going all the way down to debug mode to process a
UHI operation on-target so we can support cores that don't
have ejtag or simply to stay out of debug mode wherever
possible. The basic principle is that either an application
doesn't install its own exception vector and hence uses
U-boot's or it does install its own but remembers where U-boot's
EBASE was and unwinds a SYSCALL exception and forwards it to
U-boot's general-exception handler. It seems to work pretty
well but there is certainly no harm in hooking the debug
vector too.

Matthew
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[U-Boot] [PATCH v2] x86: baytrail: Add 2nd eMMC controller to the PCI probe list

[Stefan Roese]

With this addition, the eMMC device available on the congatec and DFI
BayTrail SoM is detected correctly.

Signed-off-by: Stefan Roese 
Cc: Simon Glass 
Cc: Bin Meng 
---
v2:
- Change VALLEYVIEW macros to also use BYT names, to match the
  naming of the Linux SHDCI device driver

 arch/x86/cpu/baytrail/valleyview.c | 5 +++--
 include/pci_ids.h  | 5 +++--
 2 files changed, 6 insertions(+), 4 deletions(-)

diff --git a/arch/x86/cpu/baytrail/valleyview.c 
b/arch/x86/cpu/baytrail/valleyview.c
index b31f24e..4799de1 100644
--- a/arch/x86/cpu/baytrail/valleyview.c
+++ b/arch/x86/cpu/baytrail/valleyview.c
@@ -12,8 +12,9 @@
 #include 
 
 static struct pci_device_id mmc_supported[] = {
-   { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_VALLEYVIEW_SDIO },
-   { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_VALLEYVIEW_SDCARD },
+   { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_BYT_SDIO },
+   { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_BYT_SD },
+   { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_BYT_EMMC2 },
{},
 };
 
diff --git a/include/pci_ids.h b/include/pci_ids.h
index 17a01a0..ab6aa58 100644
--- a/include/pci_ids.h
+++ b/include/pci_ids.h
@@ -2599,13 +2599,14 @@
 #define PCI_DEVICE_ID_INTEL_I960   0x0960
 #define PCI_DEVICE_ID_INTEL_I960RM 0x0962
 #define PCI_DEVICE_ID_INTEL_CENTERTON_ILB  0x0c60
-#define PCI_DEVICE_ID_INTEL_VALLEYVIEW_SDIO0x0f15
-#define PCI_DEVICE_ID_INTEL_VALLEYVIEW_SDCARD  0x0f16
+#define PCI_DEVICE_ID_INTEL_BYT_SDIO   0x0f15
+#define PCI_DEVICE_ID_INTEL_BYT_SD 0x0f16
 #define PCI_DEVICE_ID_INTEL_VALLEYVIEW_LPC 0x0f1c
 #define PCI_DEVICE_ID_INTEL_VALLEYVIEW_IDE 0x0f20
 #define PCI_DEVICE_ID_INTEL_VALLEYVIEW_IDE_ALT 0x0f21
 #define PCI_DEVICE_ID_INTEL_VALLEYVIEW_SATA0x0f22
 #define PCI_DEVICE_ID_INTEL_VALLEYVIEW_SATA_ALT0x0f23
+#define PCI_DEVICE_ID_INTEL_BYT_EMMC2  0x0f50
 #define PCI_DEVICE_ID_INTEL_82541ER0x1078
 #define PCI_DEVICE_ID_INTEL_82541GI_LF 0x107c
 #define PCI_DEVICE_ID_INTEL_82542  0x1000
-- 
2.9.3

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Re: [U-Boot] [PATCH 1/2] fastboot: more support for reboot-bootloader command

[Paul Kocialkowski]

Hi,

Le samedi 24 septembre 2016 à 18:01 -0700, Steve Rae a écrit :
> On Aug 25, 2016 01:30, "Paul Kocialkowski"  wrote:
> > Le mercredi 24 août 2016 à 16:52 -0700, Steve Rae a écrit :
> > > So, I wanted to:
> > > (1) simplify this to not depend on any env variable, and not depend on
> > > the CONFIG_BOOTCOMMAND (can this be accidentally wiped out in the
> > > environment?)
> >
> > I'm not sure it really simplifies much. fastboot is a boot command, so I
> think
> > it's a good fit for CONFIG_BOOTCOMMAND. This is where I expect it to be
> called.
> >
> > I don't think that the possibility of accidentally wiping it out is a very
> > legitimate concern (most boards expect a specific CONFIG_BOOTCOMMAND, I
> don't
> > see any problem with that). It's up to users to deal with env breakage.
> >
> > Also, I'm a bit worried about where the logic should be, because there are
> cases
> > where we want to trigger fastboot from e.g. a button press. Using an env
> > variable makes it easy to have button handling (which may also trigger other
> > modes, not only fastboot) in one place to just set env variables
> accordingly.
> >
> > I don't think such button handling should be in the function you're
> introducing.
> > Thus, it means that boards will need a second place from where to call
> fastboot,
> > which makes it less intuitive and much messier.
> >
> > With a clear separation between detection (the first half of what the
> function
> > you're introducing is doing) and fastboot execution, we can easily manage
> > different sources that trigger fastboot mode.
> >
> > Finally, some boards only rely on persistent env storage to set fastboot
> mode
> > (and otherwise don't have a specific bit preserved at reset that can be set
> for
> > it), so the way you're suggesting won't be a good fit for these boards at
> all,
> > which creates disparity between boards and makes the whole thing less
> intuitive
> > and more confusing.
> >
> > > (2) also allow for the "fastboot continue" command (although I think
> > > that the CONFIG_BOOTCOMMAND also handles this properly!)
> >
> > Yes, this is already handled properly.
> >
> > > IMO - this series seems to be a much more straightforward approach
> > > perhaps if I changed the function name to:
> > >   fb_handle_reboot_bootloader_flag()  or
> > >   handle_fastboot_reboot_bootloader_flag()
> > > because it is not trying to handle all possible reboot modes, only the
> > > "fastboot reboot-bootloader"
> > > Would that help?
> >
> > That's not really my concern, and I like to keep functions names consistent.
> The
> > original name you suggested is a good match with fb_set_reboot_flag.
> >
> > Thanks
> >
> > > On Wed, Aug 24, 2016 at 3:07 AM, Paul Kocialkowski 
> wrote:
> > > >
> > > > Hi,
> > > >
> > > > Le mardi 23 août 2016 à 16:38 -0700, Steve Rae a écrit :
> > > > >
> > > > > The "fastboot reboot-bootloader" command is defined to
> > > > > re-enter into fastboot mode after rebooting into the
> > > > > bootloader.
> > > > >
> > > > > There is current support for setting the reset flag
> > > > > via the __weak fb_set_reboot_flag() function.
> > > > >
> > > > > This commit adds a generic handler to implement code
> > > > > which could launch fastboot during the boot sequence
> > > > > via this __weak fb_handle_reboot_flag() function.
> > > > > The actual handling this reset flag should be implemented
> > > > > by board/SoC specific code.
> > > >
> > > > So far, we've been calling the fastboot command from CONFIG_BOOTCOMMAND
> > > > (more or
> > > > less directly) by setting an env variable (reboot-mode, dofastboot,
> etc),
> > > > which
> > > > I think is a good fit. Since fastboot is a standalone command, I think
> it
> > > > makes
> > > > sense to call it from the bootcommand instead of calling it from the
> > > > function
> > > > you introduce.
> > > >
> > > > IMO the fb_handle_reboot_flag function you're introducing should only
> detect
> > > > that fastboot mode is requested and set an env variable (like it's done
> > > > in misc_init_r in sniper and kc1) so that the bootcommand can pick it up
> and
> > > > act
> > > > accordingly. This clearly separates the logic and puts each side of it
> where
> > > > it
> > > > belongs.
> > > >
> > > > >
> > > > > Signed-off-by: Steve Rae 
> > > > > cc: Alexey Firago 
> > > > > cc: Paul Kocialkowski 
> > > > > cc: Tom Rini 
> > > > > cc: Angela Stegmaier 
> > > > > cc: Dileep Katta 
> > > > > ---
> > > > >
> > > > >  common/main.c | 8 
> > > > >  1 file changed, 8 insertions(+)
> > > > >
> > > > > diff --git a/common/main.c b/common/main.c
> > > > > index 2116a9e..ea3fe42 100644
> > > > > --- a/common/main.c
> > > > > +++ b/common/main.c
> > > > > @@ -20,6 +20,12 @@ DECLARE_GLOBAL_DATA_PTR;
> > > > >   */
> > > > >  __weak void show_boot_progress(int val) {}
> > > > >
> > > > > +/*
> > > > > + * Board-specific Platform code must implement
> fb_handle_reboot_flag(),
> > > > > if
> > > > > + * this feature is desired
> 

[U-Boot] [PATCHv2 1/2] armv8/fsl-lsch2: refactor the clock system initialization

[Zhiqiang Hou]

From: Hou Zhiqiang 

Up to now, there are 3 kinds of SoC under Layerscape Chassis 2,
such as LS1043A, LS1046A and LS1012A. But the clocks tree has a
lot of difference, for instance the IP modules have different
divisors to get clock from Platform PLL. And the core cluster
and platform PLL maybe have different reference clock, such as
LS1012A. Another problem is which clock/PLL should be described
by sys_info->freq_systembus, it is confused in Chissis 2.

This patch is to map the sys_info->freq_systembus to the Platform
PLL, and handle the different divisor of IP modules separately
between different SoCs. And separate cluster and platform PLL
reference clock.

Signed-off-by: Hou Zhiqiang 
---
V2:
 - Generate the patch set base on the latest 
git://git.denx.de/u-boot-fsl-qoriq.git.
 - Show Platform clock as Bus frequency.
 - Add Platform clock and IPs' input clock divisors.

 arch/arm/cpu/armv8/fsl-layerscape/cpu.c|  3 +-
 .../arm/cpu/armv8/fsl-layerscape/fsl_lsch2_speed.c | 71 --
 arch/arm/include/asm/arch-fsl-layerscape/config.h  | 26 
 .../include/asm/arch-fsl-layerscape/immap_lsch2.h  |  1 +
 include/configs/ls1012a_common.h   |  6 +-
 include/configs/ls1043a_common.h   |  2 +-
 include/configs/ls1046a_common.h   |  2 +-
 7 files changed, 87 insertions(+), 24 deletions(-)

diff --git a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c 
b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
index 5fbd848..4811f1f 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
@@ -315,8 +315,9 @@ int print_cpuinfo(void)
   (type == TY_ITYP_VER_A72 ? "A72" : "   "))),
   strmhz(buf, sysinfo.freq_processor[core]));
}
+   /* Display platform clock as Bus frequency. */
printf("\n   Bus:  %-4s MHz  ",
-  strmhz(buf, sysinfo.freq_systembus));
+  strmhz(buf, sysinfo.freq_systembus / CONFIG_SYS_FSL_PCLK_DIV));
printf("DDR:  %-4s MT/s", strmhz(buf, sysinfo.freq_ddrbus));
 #ifdef CONFIG_SYS_DPAA_FMAN
printf("  FMAN: %-4s MHz", strmhz(buf, sysinfo.freq_fman[0]));
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_speed.c 
b/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_speed.c
index 8922197..4b6863d 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_speed.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_speed.c
@@ -52,22 +52,28 @@ void get_sys_info(struct sys_info *sys_info)
uint freq_c_pll[CONFIG_SYS_FSL_NUM_CC_PLLS];
uint ratio[CONFIG_SYS_FSL_NUM_CC_PLLS];
unsigned long sysclk = CONFIG_SYS_CLK_FREQ;
+   unsigned long cluster_clk;
 
sys_info->freq_systembus = sysclk;
+#ifndef CONFIG_CLUSTER_CLK_FREQ
+#define CONFIG_CLUSTER_CLK_FREQCONFIG_SYS_CLK_FREQ
+#endif
+   cluster_clk = CONFIG_CLUSTER_CLK_FREQ;
+
 #ifdef CONFIG_DDR_CLK_FREQ
sys_info->freq_ddrbus = CONFIG_DDR_CLK_FREQ;
 #else
sys_info->freq_ddrbus = sysclk;
 #endif
 
-#ifdef CONFIG_LS1012A
-   sys_info->freq_ddrbus *= (gur_in32(&gur->rcwsr[0]) >>
-   FSL_CHASSIS2_RCWSR0_SYS_PLL_RAT_SHIFT) &
-   FSL_CHASSIS2_RCWSR0_SYS_PLL_RAT_MASK;
-#else
+   /* The freq_systembus is used to record frequency of platform PLL */
sys_info->freq_systembus *= (gur_in32(&gur->rcwsr[0]) >>
FSL_CHASSIS2_RCWSR0_SYS_PLL_RAT_SHIFT) &
FSL_CHASSIS2_RCWSR0_SYS_PLL_RAT_MASK;
+
+#ifdef CONFIG_LS1012A
+   sys_info->freq_ddrbus = 2 * sys_info->freq_systembus;
+#else
sys_info->freq_ddrbus *= (gur_in32(&gur->rcwsr[0]) >>
FSL_CHASSIS2_RCWSR0_MEM_PLL_RAT_SHIFT) &
FSL_CHASSIS2_RCWSR0_MEM_PLL_RAT_MASK;
@@ -76,7 +82,7 @@ void get_sys_info(struct sys_info *sys_info)
for (i = 0; i < CONFIG_SYS_FSL_NUM_CC_PLLS; i++) {
ratio[i] = (in_be32(&clk->pllcgsr[i].pllcngsr) >> 1) & 0xff;
if (ratio[i] > 4)
-   freq_c_pll[i] = sysclk * ratio[i];
+   freq_c_pll[i] = cluster_clk * ratio[i];
else
freq_c_pll[i] = sys_info->freq_systembus * ratio[i];
}
@@ -91,11 +97,6 @@ void get_sys_info(struct sys_info *sys_info)
freq_c_pll[cplx_pll] / core_cplx_pll_div[c_pll_sel];
}
 
-#ifdef CONFIG_LS1012A
-   sys_info->freq_systembus = sys_info->freq_ddrbus / 2;
-   sys_info->freq_ddrbus *= 2;
-#endif
-
 #define HWA_CGA_M1_CLK_SEL 0xe000
 #define HWA_CGA_M1_CLK_SHIFT   29
 #ifdef CONFIG_SYS_DPAA_FMAN
@@ -148,7 +149,8 @@ void get_sys_info(struct sys_info *sys_info)
break;
}
 #else
-   sys_info->freq_sdhc = sys_info->freq_systembus;
+   sys_info->freq_sdhc = sys_info->freq_systembus /
+   CONFIG_SYS_FSL_SDHC_CLK_DIV;
 #endif
 #endif
 
@@ -156,7 +15

[U-Boot] [PATCHv2 2/2] armv8/fsl-lsch3: consolidate the clock system initialization

[Zhiqiang Hou]

From: Hou Zhiqiang 

This patch map the sys_info->freq_systembus to Platform PLL, and
implement the IPs' clock function individually.

Signed-off-by: Hou Zhiqiang 
---
V2:
 - Generate the patch set base on the latest 
git://git.denx.de/u-boot-fsl-qoriq.git.
 - Add Platform clock and IPs' input clock divisors.

 .../arm/cpu/armv8/fsl-layerscape/fsl_lsch3_speed.c | 31 --
 arch/arm/include/asm/arch-fsl-layerscape/config.h  |  8 ++
 .../include/asm/arch-fsl-layerscape/immap_lsch3.h  |  1 +
 include/configs/ls2080a_common.h   |  2 +-
 4 files changed, 33 insertions(+), 9 deletions(-)

diff --git a/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_speed.c 
b/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_speed.c
index a9b12a4..afc8a31 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_speed.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_speed.c
@@ -88,11 +88,10 @@ void get_sys_info(struct sys_info *sys_info)
 #endif
 #endif
 
+   /* The freq_systembus is used to record frequency of platform PLL */
sys_info->freq_systembus *= (gur_in32(&gur->rcwsr[0]) >>
FSL_CHASSIS3_RCWSR0_SYS_PLL_RAT_SHIFT) &
FSL_CHASSIS3_RCWSR0_SYS_PLL_RAT_MASK;
-   /* Platform clock is half of platform PLL */
-   sys_info->freq_systembus /= 2;
sys_info->freq_ddrbus *= (gur_in32(&gur->rcwsr[0]) >>
FSL_CHASSIS3_RCWSR0_MEM_PLL_RAT_SHIFT) &
FSL_CHASSIS3_RCWSR0_MEM_PLL_RAT_MASK;
@@ -132,7 +131,8 @@ void get_sys_info(struct sys_info *sys_info)
ccr = ifc_in32(&ifc_regs.gregs->ifc_ccr);
ccr = ((ccr & IFC_CCR_CLK_DIV_MASK) >> IFC_CCR_CLK_DIV_SHIFT) + 1;
 
-   sys_info->freq_localbus = sys_info->freq_systembus / ccr;
+   sys_info->freq_localbus = sys_info->freq_systembus /
+   CONFIG_SYS_FSL_PCLK_DIV / ccr;
 #endif
 }
 
@@ -142,13 +142,13 @@ int get_clocks(void)
struct sys_info sys_info;
get_sys_info(&sys_info);
gd->cpu_clk = sys_info.freq_processor[0];
-   gd->bus_clk = sys_info.freq_systembus;
+   gd->bus_clk = sys_info.freq_systembus / CONFIG_SYS_FSL_PCLK_DIV;
gd->mem_clk = sys_info.freq_ddrbus;
 #ifdef CONFIG_SYS_FSL_HAS_DP_DDR
gd->arch.mem2_clk = sys_info.freq_ddrbus2;
 #endif
 #if defined(CONFIG_FSL_ESDHC)
-   gd->arch.sdhc_clk = gd->bus_clk / 2;
+   gd->arch.sdhc_clk = gd->bus_clk / CONFIG_SYS_FSL_SDHC_CLK_DIV;
 #endif /* defined(CONFIG_FSL_ESDHC) */
 
if (gd->cpu_clk != 0)
@@ -159,7 +159,7 @@ int get_clocks(void)
 
 /
  * get_bus_freq
- * return system bus freq in Hz
+ * return platform clock in Hz
  */
 ulong get_bus_freq(ulong dummy)
 {
@@ -190,13 +190,28 @@ ulong get_ddr_freq(ulong ctrl_num)
return gd->mem_clk;
 }
 
+int get_i2c_freq(ulong dummy)
+{
+   return get_bus_freq(0) / CONFIG_SYS_FSL_I2C_CLK_DIV;
+}
+
+int get_dspi_freq(ulong dummy)
+{
+   return get_bus_freq(0) / CONFIG_SYS_FSL_DSPI_CLK_DIV;
+}
+
+int get_serial_clock(void)
+{
+   return get_bus_freq(0) / CONFIG_SYS_FSL_DUART_CLK_DIV;
+}
+
 unsigned int mxc_get_clock(enum mxc_clock clk)
 {
switch (clk) {
case MXC_I2C_CLK:
-   return get_bus_freq(0) / 2;
+   return get_i2c_freq(0);
case MXC_DSPI_CLK:
-   return get_bus_freq(0) / 2;
+   return get_dspi_freq(0);
default:
printf("Unsupported clock\n");
}
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/config.h 
b/arch/arm/include/asm/arch-fsl-layerscape/config.h
index bc0af99..cc1b77e 100644
--- a/arch/arm/include/asm/arch-fsl-layerscape/config.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/config.h
@@ -133,6 +133,14 @@
 #define EPU_EPCTR5 0x700060a14ULL
 #define EPU_EPGCR  0x70006ULL
 
+/* Platform PLL frequency divisor for platform clock */
+#define CONFIG_SYS_FSL_PCLK_DIV2
+/* Platform clock divisor for IPs' input clock */
+#define CONFIG_SYS_FSL_DUART_CLK_DIV   2
+#define CONFIG_SYS_FSL_I2C_CLK_DIV 2
+#define CONFIG_SYS_FSL_DSPI_CLK_DIV2
+#define CONFIG_SYS_FSL_SDHC_CLK_DIV2
+
 #define CONFIG_SYS_FSL_ERRATUM_A008336
 #define CONFIG_SYS_FSL_ERRATUM_A008511
 #define CONFIG_SYS_FSL_ERRATUM_A008514
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h 
b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h
index 7acba27..0f40479 100644
--- a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h
@@ -156,6 +156,7 @@
 
 struct sys_info {
unsigned long freq_processor[CONFIG_MAX_CPUS];
+   /* frequency of platform PLL */
unsigned long freq_systembus;
unsigned long freq_ddrbus;
 #ifdef CONFIG_SYS_FSL_HAS_DP_DDR
diff --git a/include/configs/ls2

Re: [U-Boot] [PATCH v2 5/8] arm: efi: Add a hello world test program

[Bin Meng]

Hi Simon,

On Mon, Sep 26, 2016 at 5:27 AM, Simon Glass  wrote:
> It is useful to have a basic sanity check for EFI loader support. Add a
> 'bootefi hello' command which loads HelloWord.efi and runs it under U-Boot.
>
> Signed-off-by: Simon Glass 
> ---
>
> Changes in v2: None
>
>  arch/arm/lib/HelloWorld32.efi  | Bin 0 -> 11712 bytes
>  arch/arm/lib/Makefile  |   7 +++
>  cmd/Kconfig|  10 ++
>  cmd/bootefi.c  |  26 --
>  include/asm-generic/sections.h |   2 ++
>  scripts/Makefile.lib   |  19 +++
>  6 files changed, 58 insertions(+), 6 deletions(-)
>  create mode 100644 arch/arm/lib/HelloWorld32.efi
>

[snip]

> diff --git a/arch/arm/lib/Makefile b/arch/arm/lib/Makefile
> index caa62c6..64378e1 100644
> --- a/arch/arm/lib/Makefile
> +++ b/arch/arm/lib/Makefile
> @@ -30,6 +30,13 @@ obj-$(CONFIG_CMD_BOOTI) += bootm.o
>  obj-$(CONFIG_CMD_BOOTM) += bootm.o
>  obj-$(CONFIG_CMD_BOOTZ) += bootm.o zimage.o
>  obj-$(CONFIG_SYS_L2_PL310) += cache-pl310.o
> +ifdef CONFIG_ARM64
> +# This option does not work for arm64, as there is no binary.
> +# TODO(s...@chromium.org): Add this once it is possible to build one
> +obj-$(CONFIG_CMD_BOOTEFI_HELLO) += HelloWorld64.o
> +else
> +obj-$(CONFIG_CMD_BOOTEFI_HELLO) += HelloWorld32.o
> +endif
>  obj-$(CONFIG_USE_ARCH_MEMSET) += memset.o
>  obj-$(CONFIG_USE_ARCH_MEMCPY) += memcpy.o
>  else
> diff --git a/cmd/Kconfig b/cmd/Kconfig
> index d28da54..f12fcb8 100644
> --- a/cmd/Kconfig
> +++ b/cmd/Kconfig
> @@ -181,6 +181,16 @@ config CMD_BOOTEFI
> help
>   Boot an EFI image from memory.
>
> +config CMD_BOOTEFI_HELLO
> +   bool "Allow booting a standard EFI hello word for testing"

typo: world

Please fix all other typos which were pointed out in the v1 comment:
http://patchwork.ozlabs.org/patch/656430/

> +   depends on CMD_BOOTEFI
> +   default y if CMD_BOOTEFI && !ARM64
> +   help
> + This adds a standard EFI hello world application to U-Boot so that
> + it can be used with the 'bootefi hello' command. This is useful
> + for testing that EFI is woring at a basic level, and for brining
> + up EFI support on a new architecture.
> +

[snip]

Regards,
Bin
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Re: [U-Boot] [PATCH v2 2/8] efi: Use asmlinkage for EFIAPI

[Bin Meng]

On Mon, Sep 26, 2016 at 5:27 AM, Simon Glass  wrote:
> This is required for x86 and is also correct for ARM (since it is empty).
>
> Signed-off-by: Simon Glass 
> ---
>
> Changes in v2:
> - Move efi.h changes to a new patch
>
>  arch/avr32/include/asm/linkage.h  | 0
>  arch/m68k/include/asm/linkage.h   | 0
>  arch/microblaze/include/asm/linkage.h | 0
>  arch/mips/include/asm/linkage.h   | 0
>  arch/nios2/include/asm/linkage.h  | 0
>  arch/openrisc/include/asm/linkage.h   | 0
>  arch/sandbox/include/asm/linkage.h| 0
>  arch/sh/include/asm/linkage.h | 0
>  arch/sparc/include/asm/linkage.h  | 0
>  include/efi.h | 3 ++-
>  10 files changed, 2 insertions(+), 1 deletion(-)
>  create mode 100644 arch/avr32/include/asm/linkage.h
>  create mode 100644 arch/m68k/include/asm/linkage.h
>  create mode 100644 arch/microblaze/include/asm/linkage.h
>  create mode 100644 arch/mips/include/asm/linkage.h
>  create mode 100644 arch/nios2/include/asm/linkage.h
>  create mode 100644 arch/openrisc/include/asm/linkage.h
>  create mode 100644 arch/sandbox/include/asm/linkage.h
>  create mode 100644 arch/sh/include/asm/linkage.h
>  create mode 100644 arch/sparc/include/asm/linkage.h
>

Reviewed-by: Bin Meng 
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Re: [U-Boot] [PATCH v2 4/8] x86: Tidy up selection of building the EFI stub

[Bin Meng]

Hi Simon,

On Mon, Sep 26, 2016 at 5:27 AM, Simon Glass  wrote:
> At present we use a CONFIG option in efi.h to determine whether we are
> building the EFI stub or not. This means that the same header cannot be
> used for EFI_LOADER support. The CONFIG option will be enabled for the
> whole build, even when not building the stub.
>
> Use a different define instead, set up just for the files that make up the
> stub.
>
> Signed-off-by: Simon Glass 
> ---
>
> Changes in v2:
> - Add new patch to tidy up selection of building the EFI stub
>
>  include/efi.h| 7 +--
>  lib/efi/Makefile | 4 ++--
>  2 files changed, 7 insertions(+), 4 deletions(-)
>
> diff --git a/include/efi.h b/include/efi.h
> index d07187c..3d58780 100644
> --- a/include/efi.h
> +++ b/include/efi.h
> @@ -30,8 +30,11 @@ struct efi_device_path;
>
>  #define EFI_BITS_PER_LONG  BITS_PER_LONG
>
> -/* With 64-bit EFI stub, EFI_BITS_PER_LONG has to be 64 */
> -#ifdef CONFIG_EFI_STUB_64BIT
> +/*
> + * With 64-bit EFI stub, EFI_BITS_PER_LONG has to be 64. EFI_STUB is set
> + * in lib/efi/Makefile, when building the stub.
> + */
> +#if defined(CONFIG_EFI_STUB_64BIT) && defined(EFI_STUB)

I don't understand why this is needed?

>  #undef EFI_BITS_PER_LONG
>  #define EFI_BITS_PER_LONG  64
>  #endif
> diff --git a/lib/efi/Makefile b/lib/efi/Makefile
> index e32dc14..9449600 100644
> --- a/lib/efi/Makefile
> +++ b/lib/efi/Makefile
> @@ -9,9 +9,9 @@ obj-$(CONFIG_EFI_STUB) += efi_info.o
>
>  CFLAGS_REMOVE_efi_stub.o := -mregparm=3 \
> $(if $(CONFIG_EFI_STUB_64BIT),-march=i386 -m32)
> -CFLAGS_efi_stub.o := -fpic -fshort-wchar
> +CFLAGS_efi_stub.o := -fpic -fshort-wchar -DEFI_STUB
>  CFLAGS_REMOVE_efi.o := -mregparm=3 \
> $(if $(CONFIG_EFI_STUB_64BIT),-march=i386 -m32)
> -CFLAGS_efi.o := -fpic -fshort-wchar
> +CFLAGS_efi.o := -fpic -fshort-wchar -DEFI_STUB
>
>  extra-$(CONFIG_EFI_STUB) += efi_stub.o efi.o
> --

Regards,
Bin
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Re: [U-Boot] [PATCH v2] x86: baytrail: Add 2nd eMMC controller to the PCI probe list

[Bin Meng]

On Mon, Sep 26, 2016 at 4:18 PM, Stefan Roese  wrote:
> With this addition, the eMMC device available on the congatec and DFI
> BayTrail SoM is detected correctly.
>
> Signed-off-by: Stefan Roese 
> Cc: Simon Glass 
> Cc: Bin Meng 
> ---
> v2:
> - Change VALLEYVIEW macros to also use BYT names, to match the
>   naming of the Linux SHDCI device driver
>
>  arch/x86/cpu/baytrail/valleyview.c | 5 +++--
>  include/pci_ids.h  | 5 +++--
>  2 files changed, 6 insertions(+), 4 deletions(-)
>

Reviewed-by: Bin Meng 
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[U-Boot] [PATCH] mach-zynq/Kconfig: Make SYS_VENDOR configurable

[Mike Looijmans]

Add a string description for SYS_VENDOR to allow configuring boards from
other vendors than just "xilinx".

Signed-off-by: Mike Looijmans 
---
 arch/arm/mach-zynq/Kconfig | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm/mach-zynq/Kconfig b/arch/arm/mach-zynq/Kconfig
index a1175ee..4934fc8 100644
--- a/arch/arm/mach-zynq/Kconfig
+++ b/arch/arm/mach-zynq/Kconfig
@@ -28,6 +28,7 @@ config SYS_BOARD
default "zynq"
 
 config SYS_VENDOR
+   string "Vendor name"
default "xilinx"
 
 config SYS_SOC
-- 
1.9.1

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Re: [U-Boot] [PATCH v2 1/3] arm: mvebu: create generic 88F6820 config option

[Stefan Roese]

Hi Chris,

On 26.09.2016 09:21, Chris Packham wrote:

On Sat, Sep 24, 2016 at 8:09 PM, Stefan Roese  wrote:

On 22.09.2016 02:56, Chris Packham wrote:


88F6820 is a specific Armada-38x chip that is used on the DB-88F6820-GP
board. Rather than having DB_88F6820_GP and TARGET_DB_88F6820_GP which
selects the former. Rename DB_88F6820_GP to 88F6820 so that other boards
using the 88F6820 can be added.

Signed-off-by: Chris Packham 
---

Changes in v2: None



Changed for clearfog here as well while applying.



I didn't notice clearfog when I was looking. One potential side-effect
of my change for the clearfog board is that mv_board_id_get() will now
return 0 instead of DB_68XX_ID (0x11). I'm not sure what the
consequences of this are. The AMC board works fine with 0 and
DB_68XX_ID is probably wrong for a board that is not the
db-88f6820-gp.


Correct, using the value for the DB- board for clearfog was wrong.


On the other hand the AMC board isn't using a number of
peripherals so I may not have noticed a breakage.

If this does turn out to be a problem the following should be
equivalent to the way things were before (sorry can't send a proper
patch having remote access issues).


I suggest to leave it as is for now as it should be correct now.

Thanks for looking into it though. Perhaps this needs to be
revisited at some time.

Thanks,
Stefan
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Re: [U-Boot] [PATCH 8/9] MIPS: add handling for generic and EJTAG exceptions

[Paul Burton]

On Sunday, 25 September 2016 20:05:31 BST Daniel Schwierzeck wrote:
> Add exception handlers for generic and EJTAG exceptions. Most of
> the assembly code is imported from Linux kernel and adapted to U-Boot.
> The exception vector table will be reserved above the stack before
> U-Boot is relocated. The exception handlers will be installed and
> activated after relocation in the initr_traps hook function.

Hi Daniel,

This series looks good :) Just a couple of comments below.

> 
> Generic exceptions are handled by showing a CPU register dump similar
> to Linux kernel. For example:
> 
> malta # md 1
> 0001:
> Ooops:
> $ 0   :   0009 0004
> $ 4   : 8ff7e108  003a 
> $ 8   : 0008 0001 8ff7cd18 0004
> $12   : 0002  0005 003a
> $16   : 0004 0040 0001 0001
> $20   :  8fff53c0 0008 0004
> $24   :  8ffdea44
> $28   : 90001650 8ff7cd00 0004 8ffe6818
> Hi: 
> Lo: 0004
> epc   : 8ffe6848 (text bfc28848)
> ra: 8ffe6818 (text bfc28818)
> Status: 0006
> Cause : 0410 (ExcCode 04)
> BadVA : 8ff9e928
> PrId  : 00019300
>  ### ERROR ### Please RESET the board ###

Something I've had in the U-Boot source we use on Boston, Malta & SEAD-3 boards 
internally for a while is the ability to longjmp back to the shell after an 
exception. It seems 
to work pretty well & generally means exceptions are non-fatal. I'll submit 
that once this 
goes in.

> 
> EJTAG exceptions are checked for SDBBP and delegated to the SDBBP handler
> if necessary. Otherwise the debug mode will simply be exited. The SDBBP
> handler currently prints the contents of registers c0_depc and c0_debug.
> This could be extended in the future to handle semi-hosting according to
> the MIPS UHI specification.
> 
> Signed-off-by: Daniel Schwierzeck 
> ---
> 
>  arch/mips/include/asm/u-boot-mips.h |   4 +
>  arch/mips/lib/Makefile  |   2 +
>  arch/mips/lib/genex.S   | 214
>  arch/mips/lib/traps.c   |
> 104 ++
>  4 files changed, 324 insertions(+)
>  create mode 100644 arch/mips/lib/genex.S
>  create mode 100644 arch/mips/lib/traps.c
> 
> diff --git a/arch/mips/include/asm/u-boot-mips.h
> b/arch/mips/include/asm/u-boot-mips.h index 1f527bb..71ff41d 100644
> --- a/arch/mips/include/asm/u-boot-mips.h
> +++ b/arch/mips/include/asm/u-boot-mips.h
> @@ -5,4 +5,8 @@
>  #ifndef _U_BOOT_MIPS_H_
>  #define _U_BOOT_MIPS_H_
> 
> +void exc_handler(void);
> +void except_vec3_generic(void);
> +void except_vec_ejtag_debug(void);
> +
>  #endif /* _U_BOOT_MIPS_H_ */
> diff --git a/arch/mips/lib/Makefile b/arch/mips/lib/Makefile
> index 02607f7..659c6ad 100644
> --- a/arch/mips/lib/Makefile
> +++ b/arch/mips/lib/Makefile
> @@ -7,7 +7,9 @@
> 
>  obj-y+= cache.o
>  obj-y+= cache_init.o
> +obj-y+= genex.o
>  obj-y+= stack.o
> +obj-y+= traps.o
> 
>  obj-$(CONFIG_CMD_BOOTM) += bootm.o
> 
> diff --git a/arch/mips/lib/genex.S b/arch/mips/lib/genex.S
> new file mode 100644
> index 000..f72545d
> --- /dev/null
> +++ b/arch/mips/lib/genex.S
> @@ -0,0 +1,214 @@
> +/*
> + * Copyright (C) 1994 - 2000, 2001, 2003 Ralf Baechle
> + * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
> + * Copyright (C) 2002, 2007  Maciej W. Rozycki
> + * Copyright (C) 2001, 2012 MIPS Technologies, Inc.  All rights reserved.
> + *
> + * SPDX-License-Identifier:  GPL-2.0+
> + */
> +
> +#include 
> +#include 
> +#include 
> +#include 
> +
> + .setnoreorder
> +
> + /*
> +  * Macros copied and adapted from Linux MIPS
> +  */
> + .macro  SAVE_AT
> + .setpush
> + .setnoat
> + LONG_S  $1, PT_R1(sp)
> + .setpop
> + .endm
> +
> + .macro  RESTORE_AT
> + .setpush
> + .setnoat
> + LONG_L  $1,  PT_R1(sp)
> + .setpop
> + .endm
> +
> + .macro  SAVE_TEMP
> + mfhiv1
> +#ifdef CONFIG_32BIT
> + LONG_S  $8, PT_R8(sp)
> + LONG_S  $9, PT_R9(sp)
> +#endif
> + LONG_S  $10, PT_R10(sp)
> + LONG_S  $11, PT_R11(sp)

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Re: [U-Boot] [PATCH v4 00/17] imx6: Add Engicam i.CoreM6 QDL support

[Jagan Teki]

Hi Stefano,

Please let me know if you have any comments, if OK please pick this.

On Mon, Sep 26, 2016 at 1:11 AM, Jagan Teki  wrote:
> This series supports Engicam i.CoreM6 QDL modules on top of 
> u-boot-imx.git/next
> and test on the respective starter kits as well.
>
> Changes for v4:
> - Add 'net: Kconfig: Add FEC_MXC entry' patch
> - Updated ENV configs along with comments
> - Restructured configs for more readability
> - Add CONFIG_ENV_OVERWRITE
> - Rename icorem6qdl_defconfig with icorem6qdl_mmc_defconfig
>
> Changes for v3:
> - Remove "v2 01/17 imx: iomux-v3: Fix build error with snvs base" 
> patch
> - Remove 'default n' on Kconfig DEFAULT_FDT_FILE patch
> - Add minimal devicetree support for Engicam i.CoreM6 QDL
> - Add is_mx6dl()
> - Add is_mx6solo()
> - Use is_mx6dq()
> - Add last commit sha1 and header in pull devicetree files from Linux
>
> Changes for v2:
> - Make static to local iomux structure in board file
> - Corrected rowaddr in mx6_ddr3_cfg
> - Used imx_ddr_size
> - Add FEC support and tested the same
> - Add DM_GPIO, DM_MMC support
> - Add pinctrl support
> - Add devicetree support
>
> Jagan Teki (17):
>   serial: Kconfig: Add MXC_UART entry
>   thermal: Kconfig: Add IMX_THERMAL entry
>   Kconfig: Add DEFAULT_FDT_FILE entry
>   arm: imx: Add Engicam i.CoreM6 QDL Starter Kit initial support
>   net: Kconfig: Add FEC_MXC entry
>   imx6: icorem6: Add ENET support
>   imx: s/docs\/README.imximage/doc\/README.imximage/g
>   arm: dts: Add devicetree for i.MX6DL
>   arm: dts: Add devicetree for i.MX6DQL
>   arm: dts: imx6dl: Add pinctrl defines
>   dt-bindings: clock: imx6qdl: Add clock defines
>   arm: imx6q: Add devicetree support for Engicam i.CoreM6 DualLite/Solo
>   imx6q: icorem6: Enable pinctrl driver
>   engicam: icorem6: Add DM_GPIO, DM_MMC support
>   arm: dts: Add devicetree for i.MX6Q
>   arm: dts: imx6q: Add pinctrl defines
>   arm: imx6q: Add devicetree support for Engicam i.CoreM6 Quad/Dual
>
>  arch/arm/cpu/armv7/mx6/Kconfig  |   11 +
>  arch/arm/dts/Makefile   |4 +-
>  arch/arm/dts/imx6dl-icore.dts   |   59 ++
>  arch/arm/dts/imx6dl-pinfunc.h   | 1091 +++
>  arch/arm/dts/imx6dl.dtsi|  133 +++
>  arch/arm/dts/imx6q-icore.dts|   59 ++
>  arch/arm/dts/imx6q-pinfunc.h| 1047 ++
>  arch/arm/dts/imx6q.dtsi |  300 +++
>  arch/arm/dts/imx6qdl-icore.dtsi |  196 
>  arch/arm/dts/imx6qdl.dtsi   | 1281 
> +++
>  arch/arm/include/asm/imx-common/sys_proto.h |2 +
>  board/barco/titanium/imximage.cfg   |2 +-
>  board/ccv/xpress/imximage.cfg   |2 +-
>  board/denx/m53evk/imximage.cfg  |2 +-
>  board/engicam/icorem6/Kconfig   |   12 +
>  board/engicam/icorem6/MAINTAINERS   |6 +
>  board/engicam/icorem6/Makefile  |6 +
>  board/engicam/icorem6/README|   38 +
>  board/engicam/icorem6/icorem6.c |  474 ++
>  board/freescale/mx6sabresd/mx6dlsabresd.cfg |2 +-
>  board/freescale/mx6slevk/imximage.cfg   |2 +-
>  board/freescale/mx6ullevk/imximage.cfg  |2 +-
>  board/freescale/mx7dsabresd/imximage.cfg|2 +-
>  board/freescale/s32v234evb/s32v234evb.cfg   |2 +-
>  board/freescale/vf610twr/imximage.cfg   |2 +-
>  board/phytec/pcm052/imximage.cfg|2 +-
>  board/technexion/pico-imx6ul/imximage.cfg   |2 +-
>  board/toradex/colibri_imx7/imximage.cfg |2 +-
>  board/toradex/colibri_vf/imximage.cfg   |2 +-
>  board/warp/imximage.cfg |2 +-
>  board/warp7/imximage.cfg|2 +-
>  common/Kconfig  |5 +
>  configs/imx6qdl_icore_mmc_defconfig |   34 +
>  drivers/net/Kconfig |7 +
>  drivers/serial/Kconfig  |7 +
>  drivers/thermal/Kconfig |   13 +
>  include/configs/imx6qdl_icore.h |  142 +++
>  include/dt-bindings/clock/imx6qdl-clock.h   |  274 ++
>  38 files changed, 5215 insertions(+), 16 deletions(-)
>  create mode 100644 arch/arm/dts/imx6dl-icore.dts
>  create mode 100644 arch/arm/dts/imx6dl-pinfunc.h
>  create mode 100644 arch/arm/dts/imx6dl.dtsi
>  create mode 100644 arch/arm/dts/imx6q-icore.dts
>  create mode 100644 arch/arm/dts/imx6q-pinfunc.h
>  create mode 100644 arch/arm/dts/imx6q.dtsi
>  create mode 100644 arch/arm/dts/imx6qdl-icore.dtsi
>  create mode 100644 arch/arm/dts/imx6qdl.dtsi
>  create mode 100644 board/engicam/icorem6/Kconfig
>  create mode 100644 board/engicam/icorem6/MAINTAINERS
>  create mode 100644 board/engicam/icorem6/Makefile
>  create mode 100644 boa

Re: [U-Boot] [RFC PATCH 1/2] dm: Add support for scsi/sata based devices

[Michal Simek]

On 24.9.2016 19:26, Simon Glass wrote:
> Hi Michal,
> 
> On 8 September 2016 at 07:57, Michal Simek  wrote:
>> All sata based drivers are bind and corresponding block
>> device is created. Based on this find_scsi_device() is able
>> to get back block device based on scsi_curr_dev pointer.
>>
>> intr_scsi() is commented now but it can be replaced by calling
>> find_scsi_device() and scsi_scan().
>>
>> scsi_dev_desc[] is commented out but common/scsi.c heavily depends on
>> it. That's why CONFIG_SYS_SCSI_MAX_DEVICE is hardcoded to 1 and symbol
>> is reassigned to a block description allocated by uclass.
>> There is only one block description by device now but it doesn't need to
>> be correct when more devices are present.
>>
>> scsi_bind() ensures corresponding block device creation.
>> uclass post_probe (scsi_post_probe()) is doing low level init.
>>
>> SCSI/SATA DM based drivers requires to have 64bit base address as
>> the first entry in platform data structure to setup mmio_base.
>>
>> Signed-off-by: Michal Simek 
>> ---
>>
>>  cmd/scsi.c  | 38 ++
>>  common/board_r.c|  4 ++--
>>  common/scsi.c   | 17 -
>>  drivers/block/ahci-uclass.c | 38 ++
>>  drivers/block/ahci.c| 30 ++
>>  include/ahci.h  |  2 +-
>>  include/sata.h  |  3 +++
>>  include/scsi.h  | 15 ++-
>>  8 files changed, 134 insertions(+), 13 deletions(-)
> 
> Thanks for looking at this. I've taken a look and have a few comments.
> 
> It's confusing that you are changing both scsi and sata. Do you need
> to add a DM_SCSI also? As far as I can see, they are separate
> subsystems.

TBH I am confused with that too. This is ceva sata driver
but we use scsi subsystem to work with it.
>From my look sata is mostly copied from scsi but I don't know history of
it.
I will look at using just one interface - sata or scsi to see how this
will look like.


> I think you need a uclass which implements the scsi_scan() function.
> The existing code could be refactored so that the common parts are
> called from both scsi.c and your scsi-uclass.c. It should look for
> devices, and then create a block device for each. Since you don't know
> how many block devices to create, I don't think you can avoid creating
> them 'on the fly' in scsi_scan(). For an example, see
> usb_stor_probe_device().

Will look.

> 
> Also we will need a sandbox device at some point so we can run tests.

This can be added later.

> 
> Minor point - please put #idef CONFIG_DM_SATA first and the legacy
> path in the #else cause. Mostly you do this but in a few cases it is
> not consistent.

ok. Will look at it.

> 
> A few more notes below.
> 
>>
>> diff --git a/cmd/scsi.c b/cmd/scsi.c
>> index 387ca1a262ab..dc1176610672 100644
>> --- a/cmd/scsi.c
>> +++ b/cmd/scsi.c
>> @@ -10,6 +10,7 @@
>>   */
>>  #include 
>>  #include 
>> +#include 
>>  #include 
>>
>>  static int scsi_curr_dev; /* current device */
>> @@ -25,6 +26,23 @@ int do_scsiboot(cmd_tbl_t *cmdtp, int flag, int argc, 
>> char *const argv[])
>>  /*
>>   * scsi command intepreter
>>   */
>> +#ifdef CONFIG_DM_SATA
>> +struct udevice *find_scsi_device(int dev_num)
>> +{
>> +   struct udevice *bdev;
>> +   int ret;
>> +
>> +   ret = blk_get_device(IF_TYPE_SCSI, dev_num, &bdev);
>> +
>> +   if (ret) {
>> +   printf("SCSI Device %d not found\n", dev_num);
>> +   return NULL;
>> +   }
>> +
>> +   return bdev;
>> +}
>> +#endif
>> +
>>  int do_scsi(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
>>  {
>> switch (argc) {
>> @@ -35,7 +53,18 @@ int do_scsi(cmd_tbl_t *cmdtp, int flag, int argc, char 
>> *const argv[])
>> if (strncmp(argv[1], "res", 3) == 0) {
>> printf("\nReset SCSI\n");
>> scsi_bus_reset();
>> +
>> +#if defined(CONFIG_DM_SATA)
>> +   struct udevice *bdev;
>> +
>> +   bdev = find_scsi_device(scsi_curr_dev);
>> +   if (!bdev)
>> +   return CMD_RET_FAILURE;
>> +
>> +   scsi_scan(1, bdev);
>> +#else
>> scsi_scan(1);
>> +#endif
>> return 0;
>> }
>> if (strncmp(argv[1], "inf", 3) == 0) {
>> @@ -51,7 +80,16 @@ int do_scsi(cmd_tbl_t *cmdtp, int flag, int argc, char 
>> *const argv[])
>> return 0;
>> }
>> if (strncmp(argv[1], "scan", 4) == 0) {
>> +#if defined(CONFIG_DM_SATA)
>> +   struct udevice *bdev;
>> +
>> +   bdev = find_scsi_device(scsi_curr_dev);
>> +   if (!bdev)
>> +   return CMD_RET_FAILURE;
>> +   scsi_scan(1, bdev);
>> +#else
>>   

[U-Boot] Please pull from u-boot-i2c

[Heiko Schocher]

Hello Tom,

please pull from u-boot-i2c.git master

The following changes since commit 42f75050667bf1a0a3fbe7d8dd6d2ec5fc127935:

  arm: mvebu: NAND support for DB-88F6820-AMC (2016-09-24 10:07:48 +0200)

are available in the git repository at:

  git://git.denx.de/u-boot-i2c.git master

for you to fetch changes up to 87de0eb31ca86a7a675c000f48f5f24bf92b872d:

  i2c: mvtwsi.c: Add support for Marvell Armada 7K/8K (2016-09-26 10:43:10 
+0200)


Stefan Roese (6):
  i2c: mv_i2c.c: cosmetic: Coding style cleanups
  i2c: mv_i2c.c: Remove CONFIG_HARD_I2C
  i2c: mv_i2c.c: Prepare driver for DM conversion
  i2c: mv_i2c.c: Add DM support
  i2c: mv_i2c.c: Enable runtime speed selection (standard vs fast mode)
  i2c: mvtwsi.c: Add support for Marvell Armada 7K/8K

jinghua (1):
  i2c: mv_i2c.c: Validate read length in I2C command

 drivers/i2c/mv_i2c.c | 512 
+++---

 drivers/i2c/mv_i2c.h |  15 +++--
 drivers/i2c/mvtwsi.c |   1 +
 3 files changed, 333 insertions(+), 195 deletions(-)

bye,
Heiko
--
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HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
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[U-Boot] [PATCH v2] net: fec_mxc: Convert into driver model

[Jagan Teki]

From: Jagan Teki 

This patch add driver model support for fec_mxc driver.

Cc: Simon Glass 
Cc: Joe Hershberger 
Cc: Peng Fan 
Cc: Stefano Babic 
Cc: Michael Trimarchi 
Signed-off-by: Jagan Teki 
---
Note: Tested both dm and non-dm varients.
Changes for v2:
- Add TODO comment

 drivers/net/fec_mxc.c | 273 +-
 drivers/net/fec_mxc.h |  11 ++
 2 files changed, 258 insertions(+), 26 deletions(-)

diff --git a/drivers/net/fec_mxc.c b/drivers/net/fec_mxc.c
index e871b3e..d4f6a08 100644
--- a/drivers/net/fec_mxc.c
+++ b/drivers/net/fec_mxc.c
@@ -9,6 +9,7 @@
  */
 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -362,17 +363,32 @@ static void fec_rbd_clean(int last, struct fec_bd *pRbd)
writew(0, &pRbd->data_length);
 }
 
+#ifdef CONFIG_DM_ETH
+static int fec_get_hwaddr(struct udevice *dev, int dev_id,
+   unsigned char *mac)
+#else
 static int fec_get_hwaddr(struct eth_device *dev, int dev_id,
unsigned char *mac)
+#endif
 {
imx_get_mac_from_fuse(dev_id, mac);
return !is_valid_ethaddr(mac);
 }
 
+#ifdef CONFIG_DM_ETH
+static int fecmxc_set_hwaddr(struct udevice *dev)
+#else
 static int fec_set_hwaddr(struct eth_device *dev)
+#endif
 {
+#ifdef CONFIG_DM_ETH
+   struct fec_priv *fec = dev_get_priv(dev);
+   struct eth_pdata *pdata = dev_get_platdata(dev);
+   uchar *mac = pdata->enetaddr;
+#else
uchar *mac = dev->enetaddr;
struct fec_priv *fec = (struct fec_priv *)dev->priv;
+#endif
 
writel(0, &fec->eth->iaddr1);
writel(0, &fec->eth->iaddr2);
@@ -427,9 +443,17 @@ static void fec_reg_setup(struct fec_priv *fec)
  * Start the FEC engine
  * @param[in] dev Our device to handle
  */
+#ifdef CONFIG_DM_ETH
+static int fec_open(struct udevice *dev)
+#else
 static int fec_open(struct eth_device *edev)
+#endif
 {
+#ifdef CONFIG_DM_ETH
+   struct fec_priv *fec = dev_get_priv(dev);
+#else
struct fec_priv *fec = (struct fec_priv *)edev->priv;
+#endif
int speed;
uint32_t addr, size;
int i;
@@ -535,14 +559,26 @@ static int fec_open(struct eth_device *edev)
return 0;
 }
 
+#ifdef CONFIG_DM_ETH
+static int fecmxc_init(struct udevice *dev)
+#else
 static int fec_init(struct eth_device *dev, bd_t* bd)
+#endif
 {
+#ifdef CONFIG_DM_ETH
+   struct fec_priv *fec = dev_get_priv(dev);
+#else
struct fec_priv *fec = (struct fec_priv *)dev->priv;
+#endif
uint32_t mib_ptr = (uint32_t)&fec->eth->rmon_t_drop;
int i;
 
/* Initialize MAC address */
+#ifdef CONFIG_DM_ETH
+   fecmxc_set_hwaddr(dev);
+#else
fec_set_hwaddr(dev);
+#endif
 
/*
 * Setup transmit descriptors, there are two in total.
@@ -596,9 +632,17 @@ static int fec_init(struct eth_device *dev, bd_t* bd)
  * Halt the FEC engine
  * @param[in] dev Our device to handle
  */
+#ifdef CONFIG_DM_ETH
+static void fecmxc_halt(struct udevice *dev)
+#else
 static void fec_halt(struct eth_device *dev)
+#endif
 {
+#ifdef CONFIG_DM_ETH
+   struct fec_priv *fec = dev_get_priv(dev);
+#else
struct fec_priv *fec = (struct fec_priv *)dev->priv;
+#endif
int counter = 0x;
 
/*
@@ -638,7 +682,11 @@ static void fec_halt(struct eth_device *dev)
  * @param[in] length Data count in bytes
  * @return 0 on success
  */
+#ifdef CONFIG_DM_ETH
+static int fecmxc_send(struct udevice *dev, void *packet, int length)
+#else
 static int fec_send(struct eth_device *dev, void *packet, int length)
+#endif
 {
unsigned int status;
uint32_t size, end;
@@ -650,7 +698,11 @@ static int fec_send(struct eth_device *dev, void *packet, 
int length)
 * This routine transmits one frame.  This routine only accepts
 * 6-byte Ethernet addresses.
 */
+#ifdef CONFIG_DM_ETH
+   struct fec_priv *fec = dev_get_priv(dev);
+#else
struct fec_priv *fec = (struct fec_priv *)dev->priv;
+#endif
 
/*
 * Check for valid length of data.
@@ -783,9 +835,17 @@ out:
  * @param[in] dev Our ethernet device to handle
  * @return Length of packet read
  */
+#ifdef CONFIG_DM_ETH
+static int fecmxc_recv(struct udevice *dev, int flags, uchar **packetp)
+#else
 static int fec_recv(struct eth_device *dev)
+#endif
 {
+#ifdef CONFIG_DM_ETH
+   struct fec_priv *fec = dev_get_priv(dev);
+#else
struct fec_priv *fec = (struct fec_priv *)dev->priv;
+#endif
struct fec_bd *rbd = &fec->rbd_base[fec->rbd_index];
unsigned long ievent;
int frame_length, len = 0;
@@ -801,8 +861,13 @@ static int fec_recv(struct eth_device *dev)
writel(ievent, &fec->eth->ievent);
debug("fec_recv: ievent 0x%lx\n", ievent);
if (ievent & FEC_IEVENT_BABR) {
+#ifdef CONFIG_DM_ETH
+   fecmxc_halt(dev);
+   fecmxc_init(dev);
+#else
fec_halt(dev);
fec_init(dev, fec

Re: [U-Boot] [PATCH v2] vexpress: disable cci ace slave ports when booting in non-sec/hyp mode

[Jon Medhurst (Tixy)]

On Fri, 2016-09-23 at 17:38 +0100, Sudeep Holla wrote:
> Commit f225d39d3093 ("vexpress: Check TC2 firmware support before defaulting
> to nonsec booting") added support to check if the firmware on TC2  is
> configured appropriately before booting in nonsec/hyp mode.
> 
> However when booting in non-secure/hyp mode, CCI control must be done in
> secure firmware and can't  be done in non-secure/hyp mode. In order to
> ensure that, this patch disables the cci slave port inteface so that it
> is not accessed at all.
> 
> Cc: Jon Medhurst 
> Acked-by: Marc Zyngier 
> Signed-off-by: Sudeep Holla 
> ---

This works for me (unsurprisingly) when booting in secure mode. What
kernel and firmware config do I need to use for non-sec mode? I tried
vexpress_defconfig, with bits 12 and 13 cleared in SCC: 0x700
but I get nothing out the console after "Starting kernel ..."

-- 
Tixy

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Re: [U-Boot] [PATCH v2] vexpress: disable cci ace slave ports when booting in non-sec/hyp mode

[Sudeep Holla]

On 26/09/16 12:30, Jon Medhurst (Tixy) wrote:

On Fri, 2016-09-23 at 17:38 +0100, Sudeep Holla wrote:

Commit f225d39d3093 ("vexpress: Check TC2 firmware support before defaulting
to nonsec booting") added support to check if the firmware on TC2  is
configured appropriately before booting in nonsec/hyp mode.

However when booting in non-secure/hyp mode, CCI control must be done in
secure firmware and can't  be done in non-secure/hyp mode. In order to
ensure that, this patch disables the cci slave port inteface so that it
is not accessed at all.

Cc: Jon Medhurst 
Acked-by: Marc Zyngier 
Signed-off-by: Sudeep Holla 
---


This works for me (unsurprisingly) when booting in secure mode. What
kernel and firmware config do I need to use for non-sec mode? I tried
vexpress_defconfig, with bits 12 and 13 cleared in SCC: 0x700
but I get nothing out the console after "Starting kernel ..."



I just flipped bit 12 and 13 in SCC: 0x700 to switch between MCPM/secure
and HYP/non-secure mode. All other images/settings remain the same.

So IIUC, with vexpress_defconfig + above SCC change you are seeing a
hand, I will check that. I am using multi_v7_defconfig.

--
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Re: [U-Boot] [PATCH v2] vexpress: disable cci ace slave ports when booting in non-sec/hyp mode

[Sudeep Holla]

On 26/09/16 12:35, Sudeep Holla wrote:



On 26/09/16 12:30, Jon Medhurst (Tixy) wrote:

On Fri, 2016-09-23 at 17:38 +0100, Sudeep Holla wrote:

Commit f225d39d3093 ("vexpress: Check TC2 firmware support before
defaulting
to nonsec booting") added support to check if the firmware on TC2  is
configured appropriately before booting in nonsec/hyp mode.

However when booting in non-secure/hyp mode, CCI control must be done in
secure firmware and can't  be done in non-secure/hyp mode. In order to
ensure that, this patch disables the cci slave port inteface so that it
is not accessed at all.

Cc: Jon Medhurst 
Acked-by: Marc Zyngier 
Signed-off-by: Sudeep Holla 
---


This works for me (unsurprisingly) when booting in secure mode. What
kernel and firmware config do I need to use for non-sec mode? I tried
vexpress_defconfig, with bits 12 and 13 cleared in SCC: 0x700
but I get nothing out the console after "Starting kernel ..."



I just flipped bit 12 and 13 in SCC: 0x700 to switch between MCPM/secure
and HYP/non-secure mode. All other images/settings remain the same.

So IIUC, with vexpress_defconfig + above SCC change you are seeing a
hand, I will check that. I am using multi_v7_defconfig.



+ the patches from Lorenzo fixing MCPM code in the kernel [1] as
mentioned first email carrying this patch.

--
Regards,
Sudeep

[1] http://www.spinics.net/lists/arm-kernel/msg533715.html
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[U-Boot] [PATCH 2/3] ARM: keystone: rename clk_get_rate() to ks_clk_get_rate()

[Masahiro Yamada]

The KeyStone platform has its own clk_get_rate() but its prototype
is different from that of the common-clk (clk-uclass) framework.

Prefix the KeyStone specific implementation with _ks in order to
avoid name-space conflict.

Signed-off-by: Masahiro Yamada 
---

 arch/arm/include/asm/ti-common/keystone_net.h |  4 ++--
 arch/arm/mach-keystone/clock.c| 24 
 arch/arm/mach-keystone/cmd_clock.c|  2 +-
 arch/arm/mach-keystone/include/mach/clock.h   |  2 +-
 include/configs/ti_armv7_keystone2.h  |  8 
 5 files changed, 20 insertions(+), 20 deletions(-)

diff --git a/arch/arm/include/asm/ti-common/keystone_net.h 
b/arch/arm/include/asm/ti-common/keystone_net.h
index a0d0d9b..0627728 100644
--- a/arch/arm/include/asm/ti-common/keystone_net.h
+++ b/arch/arm/include/asm/ti-common/keystone_net.h
@@ -51,9 +51,9 @@
 
 /* MDIO module input frequency */
 #ifdef CONFIG_SOC_K2G
-#define EMAC_MDIO_BUS_FREQ (clk_get_rate(sys_clk0_3_clk))
+#define EMAC_MDIO_BUS_FREQ (ks_clk_get_rate(sys_clk0_3_clk))
 #else
-#define EMAC_MDIO_BUS_FREQ (clk_get_rate(pass_pll_clk))
+#define EMAC_MDIO_BUS_FREQ (ks_clk_get_rate(pass_pll_clk))
 #endif
 /* MDIO clock output frequency */
 #define EMAC_MDIO_CLOCK_FREQ   250 /* 2.5 MHz */
diff --git a/arch/arm/mach-keystone/clock.c b/arch/arm/mach-keystone/clock.c
index b25db1e..d8804724 100644
--- a/arch/arm/mach-keystone/clock.c
+++ b/arch/arm/mach-keystone/clock.c
@@ -341,7 +341,7 @@ static unsigned long pll_freq_get(int pll)
return ret;
 }
 
-unsigned long clk_get_rate(unsigned int clk)
+unsigned long ks_clk_get_rate(unsigned int clk)
 {
unsigned long freq = 0;
 
@@ -381,37 +381,37 @@ unsigned long clk_get_rate(unsigned int clk)
freq = pll_freq_get(CORE_PLL) / pll0div_read(4);
break;
case sys_clk0_2_clk:
-   freq = clk_get_rate(sys_clk0_clk) / 2;
+   freq = ks_clk_get_rate(sys_clk0_clk) / 2;
break;
case sys_clk0_3_clk:
-   freq = clk_get_rate(sys_clk0_clk) / 3;
+   freq = ks_clk_get_rate(sys_clk0_clk) / 3;
break;
case sys_clk0_4_clk:
-   freq = clk_get_rate(sys_clk0_clk) / 4;
+   freq = ks_clk_get_rate(sys_clk0_clk) / 4;
break;
case sys_clk0_6_clk:
-   freq = clk_get_rate(sys_clk0_clk) / 6;
+   freq = ks_clk_get_rate(sys_clk0_clk) / 6;
break;
case sys_clk0_8_clk:
-   freq = clk_get_rate(sys_clk0_clk) / 8;
+   freq = ks_clk_get_rate(sys_clk0_clk) / 8;
break;
case sys_clk0_12_clk:
-   freq = clk_get_rate(sys_clk0_clk) / 12;
+   freq = ks_clk_get_rate(sys_clk0_clk) / 12;
break;
case sys_clk0_24_clk:
-   freq = clk_get_rate(sys_clk0_clk) / 24;
+   freq = ks_clk_get_rate(sys_clk0_clk) / 24;
break;
case sys_clk1_3_clk:
-   freq = clk_get_rate(sys_clk1_clk) / 3;
+   freq = ks_clk_get_rate(sys_clk1_clk) / 3;
break;
case sys_clk1_4_clk:
-   freq = clk_get_rate(sys_clk1_clk) / 4;
+   freq = ks_clk_get_rate(sys_clk1_clk) / 4;
break;
case sys_clk1_6_clk:
-   freq = clk_get_rate(sys_clk1_clk) / 6;
+   freq = ks_clk_get_rate(sys_clk1_clk) / 6;
break;
case sys_clk1_12_clk:
-   freq = clk_get_rate(sys_clk1_clk) / 12;
+   freq = ks_clk_get_rate(sys_clk1_clk) / 12;
break;
default:
break;
diff --git a/arch/arm/mach-keystone/cmd_clock.c 
b/arch/arm/mach-keystone/cmd_clock.c
index 3d5cf3f..06afa72 100644
--- a/arch/arm/mach-keystone/cmd_clock.c
+++ b/arch/arm/mach-keystone/cmd_clock.c
@@ -74,7 +74,7 @@ int do_getclk_cmd(cmd_tbl_t *cmdtp, int flag, int argc, char 
* const argv[])
 
clk = simple_strtoul(argv[1], NULL, 10);
 
-   freq = clk_get_rate(clk);
+   freq = ks_clk_get_rate(clk);
if (freq)
printf("clock index [%d] - frequency %lu\n", clk, freq);
else
diff --git a/arch/arm/mach-keystone/include/mach/clock.h 
b/arch/arm/mach-keystone/include/mach/clock.h
index e2bdec1..0d8a944 100644
--- a/arch/arm/mach-keystone/include/mach/clock.h
+++ b/arch/arm/mach-keystone/include/mach/clock.h
@@ -125,7 +125,7 @@ extern int speeds[];
 void init_plls(void);
 void init_pll(const struct pll_init_data *data);
 struct pll_init_data *get_pll_init_data(int pll);
-unsigned long clk_get_rate(unsigned int clk);
+unsigned long ks_clk_get_rate(unsigned int clk);
 int get_max_dev_speed(int *spds);
 int get_max_arm_speed(int *spds);
 void pll_pa_clk_sel(void);
diff --git a/include/configs/ti_armv7_keystone2.h 
b/include/configs/ti_armv7_keystone2.h
index d8f0847..d7bfacc 100644
---

[U-Boot] [PATCH 1/3] ARM: keystone: remove declaration of unused functions

[Masahiro Yamada]

These two functions are neither defined nor referenced.

Signed-off-by: Masahiro Yamada 
---

 arch/arm/mach-keystone/include/mach/clock.h | 2 --
 1 file changed, 2 deletions(-)

diff --git a/arch/arm/mach-keystone/include/mach/clock.h 
b/arch/arm/mach-keystone/include/mach/clock.h
index 72724aa..e2bdec1 100644
--- a/arch/arm/mach-keystone/include/mach/clock.h
+++ b/arch/arm/mach-keystone/include/mach/clock.h
@@ -126,8 +126,6 @@ void init_plls(void);
 void init_pll(const struct pll_init_data *data);
 struct pll_init_data *get_pll_init_data(int pll);
 unsigned long clk_get_rate(unsigned int clk);
-unsigned long clk_round_rate(unsigned int clk, unsigned long hz);
-int clk_set_rate(unsigned int clk, unsigned long hz);
 int get_max_dev_speed(int *spds);
 int get_max_arm_speed(int *spds);
 void pll_pa_clk_sel(void);
-- 
1.9.1

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[U-Boot] [PATCH 0/3] keystone, clk: revert ugly work-around by #ifdef CONFIG_CLK

[Masahiro Yamada]

Commit 82f5279b0cd99a9163d34cfe926d0316d9dc0d37 chose
a very bad way to suppress the KeyStone boards failure.

The root cause was that KeyStone is using the same function name clk_get_rate
as the clk-uclass one, but the probotype is completely different.
So, if both  and  are included from a single file
(drivers/serial/ns16550.c does so), it fails to build.

The function is only used for KeyStone specific files,
so we can rename it to avoid name space conflict.



Masahiro Yamada (3):
  ARM: keystone: remove declaration of unused functions
  ARM: keystone: rename clk_get_rate() to ks_clk_get_rate()
  Revert "ns16650: Make sure we have CONFIG_CLK set before using
infrastructure"

 arch/arm/include/asm/ti-common/keystone_net.h |  4 ++--
 arch/arm/mach-keystone/clock.c| 24 
 arch/arm/mach-keystone/cmd_clock.c|  2 +-
 arch/arm/mach-keystone/include/mach/clock.h   |  4 +---
 drivers/serial/ns16550.c  |  7 ++-
 include/clk.h | 25 +
 include/configs/ti_armv7_keystone2.h  |  8 
 7 files changed, 35 insertions(+), 39 deletions(-)

-- 
1.9.1

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[U-Boot] [PATCH 3/3] Revert "ns16650: Make sure we have CONFIG_CLK set before using infrastructure"

[Masahiro Yamada]

This reverts commit 82f5279b0cd99a9163d34cfe926d0316d9dc0d37.

The build failure of k2*evm boards was fixed in a different way by
the previous commit.  It is nasty to patch generic drivers around
with #ifdef CONFIG_CLK just for the KeyStone's matter.

Signed-off-by: Masahiro Yamada 
---

 drivers/serial/ns16550.c |  7 ++-
 include/clk.h| 25 +
 2 files changed, 15 insertions(+), 17 deletions(-)

diff --git a/drivers/serial/ns16550.c b/drivers/serial/ns16550.c
index 765499d..3f6ea4d 100644
--- a/drivers/serial/ns16550.c
+++ b/drivers/serial/ns16550.c
@@ -13,7 +13,6 @@
 #include 
 #include 
 #include 
-#include 
 #include 
 
 DECLARE_GLOBAL_DATA_PTR;
@@ -354,8 +353,8 @@ int ns16550_serial_ofdata_to_platdata(struct udevice *dev)
 {
struct ns16550_platdata *plat = dev->platdata;
fdt_addr_t addr;
-   __maybe_unused struct clk clk;
-   __maybe_unused int err;
+   struct clk clk;
+   int err;
 
/* try Processor Local Bus device first */
addr = dev_get_addr(dev);
@@ -402,7 +401,6 @@ int ns16550_serial_ofdata_to_platdata(struct udevice *dev)
plat->reg_shift = fdtdec_get_int(gd->fdt_blob, dev->of_offset,
 "reg-shift", 0);
 
-#ifdef CONFIG_CLK
err = clk_get_by_index(dev, 0, &clk);
if (!err) {
err = clk_get_rate(&clk);
@@ -412,7 +410,6 @@ int ns16550_serial_ofdata_to_platdata(struct udevice *dev)
debug("ns16550 failed to get clock\n");
return err;
}
-#endif
 
if (!plat->clock)
plat->clock = fdtdec_get_int(gd->fdt_blob, dev->of_offset,
diff --git a/include/clk.h b/include/clk.h
index fe1f892..5a5c2ff 100644
--- a/include/clk.h
+++ b/include/clk.h
@@ -98,6 +98,19 @@ int clk_get_by_index(struct udevice *dev, int index, struct 
clk *clk);
  * @return 0 if OK, or a negative error code.
  */
 int clk_get_by_name(struct udevice *dev, const char *name, struct clk *clk);
+#else
+static inline int clk_get_by_index(struct udevice *dev, int index,
+  struct clk *clk)
+{
+   return -ENOSYS;
+}
+
+static inline int clk_get_by_name(struct udevice *dev, const char *name,
+  struct clk *clk)
+{
+   return -ENOSYS;
+}
+#endif
 
 /**
  * clk_request - Request a clock by provider-specific ID.
@@ -162,17 +175,5 @@ int clk_enable(struct clk *clk);
 int clk_disable(struct clk *clk);
 
 int soc_clk_dump(void);
-#else
-static inline int clk_get_by_index(struct udevice *dev, int index,
-  struct clk *clk)
-{
-   return -ENOSYS;
-}
 
-static inline int clk_get_by_name(struct udevice *dev, const char *name,
-  struct clk *clk)
-{
-   return -ENOSYS;
-}
-#endif
 #endif
-- 
1.9.1

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[U-Boot] [PATCH v3 1/2] mx6sabresd: Make SPL DDR configuration to match the DCD table

[Fabio Estevam]

From: Fabio Estevam 

When using SPL on i.mx6 we frequently notice some DDR initialization
mismatches between the SPL code and the non-SPL code.

This causes stability issues like the ones reported at 7dbda25ecd6d7c
("mx6ul_14x14_evk: Pass refsel and refr fields to avoid hang") and also:
http://lists.denx.de/pipermail/u-boot/2016-September/266355.html .

As the non-SPL code have been tested for long time and proves to be reliable,
let's configure the DDR in the exact same way as the non-SPL case.

The idea is simple: just use the DCD table and write directly to the DDR
registers.

Retrieved the DCD tables from:
board/freescale/mx6sabresd/mx6q_4x_mt41j128.cfg
and
board/freescale/mx6sabresd/mx6qp.cfg
(NXP U-Boot branch imx_v2015.04_4.1.15_1.0.0_ga)

This method makes it easier for people converting from non-SPL to SPL code.

Other benefit is that the SPL binary size is reduced from 44 kB to 39.9 kB.

Signed-off-by: Fabio Estevam 
---
Changes since v1:
- Use the correct mx6qp dcd table
- Create ddr_init() to write the DCD values
- Specify where the DCD tables come from

 board/freescale/mx6sabresd/mx6sabresd.c | 351 ++--
 1 file changed, 197 insertions(+), 154 deletions(-)

diff --git a/board/freescale/mx6sabresd/mx6sabresd.c 
b/board/freescale/mx6sabresd/mx6sabresd.c
index f836ecb..3c36395 100644
--- a/board/freescale/mx6sabresd/mx6sabresd.c
+++ b/board/freescale/mx6sabresd/mx6sabresd.c
@@ -682,125 +682,6 @@ int checkboard(void)
 #include 
 #include 
 
-const struct mx6dq_iomux_ddr_regs mx6_ddr_ioregs = {
-   .dram_sdclk_0 =  0x00020030,
-   .dram_sdclk_1 =  0x00020030,
-   .dram_cas =  0x00020030,
-   .dram_ras =  0x00020030,
-   .dram_reset =  0x00020030,
-   .dram_sdcke0 =  0x3000,
-   .dram_sdcke1 =  0x3000,
-   .dram_sdba2 =  0x,
-   .dram_sdodt0 =  0x3030,
-   .dram_sdodt1 =  0x3030,
-   .dram_sdqs0 =  0x0030,
-   .dram_sdqs1 =  0x0030,
-   .dram_sdqs2 =  0x0030,
-   .dram_sdqs3 =  0x0030,
-   .dram_sdqs4 =  0x0030,
-   .dram_sdqs5 =  0x0030,
-   .dram_sdqs6 =  0x0030,
-   .dram_sdqs7 =  0x0030,
-   .dram_dqm0 =  0x00020030,
-   .dram_dqm1 =  0x00020030,
-   .dram_dqm2 =  0x00020030,
-   .dram_dqm3 =  0x00020030,
-   .dram_dqm4 =  0x00020030,
-   .dram_dqm5 =  0x00020030,
-   .dram_dqm6 =  0x00020030,
-   .dram_dqm7 =  0x00020030,
-};
-
-const struct mx6dq_iomux_ddr_regs mx6dqp_ddr_ioregs = {
-   .dram_sdclk_0 =  0x0030,
-   .dram_sdclk_1 =  0x0030,
-   .dram_cas =  0x0030,
-   .dram_ras =  0x0030,
-   .dram_reset =  0x0030,
-   .dram_sdcke0 =  0x3000,
-   .dram_sdcke1 =  0x3000,
-   .dram_sdba2 =  0x,
-   .dram_sdodt0 =  0x3030,
-   .dram_sdodt1 =  0x3030,
-   .dram_sdqs0 =  0x0030,
-   .dram_sdqs1 =  0x0030,
-   .dram_sdqs2 =  0x0030,
-   .dram_sdqs3 =  0x0030,
-   .dram_sdqs4 =  0x0030,
-   .dram_sdqs5 =  0x0030,
-   .dram_sdqs6 =  0x0030,
-   .dram_sdqs7 =  0x0030,
-   .dram_dqm0 =  0x0030,
-   .dram_dqm1 =  0x0030,
-   .dram_dqm2 =  0x0030,
-   .dram_dqm3 =  0x0030,
-   .dram_dqm4 =  0x0030,
-   .dram_dqm5 =  0x0030,
-   .dram_dqm6 =  0x0030,
-   .dram_dqm7 =  0x0030,
-};
-
-const struct mx6dq_iomux_grp_regs mx6_grp_ioregs = {
-   .grp_ddr_type =  0x000C,
-   .grp_ddrmode_ctl =  0x0002,
-   .grp_ddrpke =  0x,
-   .grp_addds =  0x0030,
-   .grp_ctlds =  0x0030,
-   .grp_ddrmode =  0x0002,
-   .grp_b0ds =  0x0030,
-   .grp_b1ds =  0x0030,
-   .grp_b2ds =  0x0030,
-   .grp_b3ds =  0x0030,
-   .grp_b4ds =  0x0030,
-   .grp_b5ds =  0x0030,
-   .grp_b6ds =  0x0030,
-   .grp_b7ds =  0x0030,
-};
-
-const struct mx6_mmdc_calibration mx6_mmcd_calib = {
-   .p0_mpwldectrl0 =  0x001F001F,
-   .p0_mpwldectrl1 =  0x001F001F,
-   .p1_mpwldectrl0 =  0x00440044,
-   .p1_mpwldectrl1 =  0x00440044,
-   .p0_mpdgctrl0 =  0x434B0350,
-   .p0_mpdgctrl1 =  0x034C0359,
-   .p1_mpdgctrl0 =  0x434B0350,
-   .p1_mpdgctrl1 =  0x03650348,
-   .p0_mprddlctl =  0x4436383B,
-   .p1_mprddlctl =  0x39393341,
-   .p0_mpwrdlctl =  0x35373933,
-   .p1_mpwrdlctl =  0x48254A36,
-};
-
-const struct mx6_mmdc_calibration mx6dqp_mmcd_calib = {
-   .p0_mpwldectrl0 =  0x001B001E,
-   .p0_mpwldectrl1 =  0x002E0029,
-   .p1_mpwldectrl0 =  0x001B002A,
-   .p1_mpwldectrl1 =  0x0019002C,
-   .p0_mpdgctrl0 =  0x43240334,
-   .p0_mpdgctrl1 =  0x0324031A,
-   .p1_mpdgctrl0 =  0x43340344,
-   .p1_mpdgctrl1 =  0x03280276,
-   .p0_mprddlctl =  0x44383A3E,
-   .p1_mprddlctl =  0x3C3C3846,
-   .p0_mpwrdlctl =  0x2E303230,
-   .p1_mpwrdlctl =  0x38283E34,

[U-Boot] [PATCH v3 2/2] mx6sabresd: Add SPL support for the mx6dl variant

[Fabio Estevam]

From: Fabio Estevam 

Add support for the mx6dlsabresd board in SPL.

Retrieved the DCD table from:
board/freescale/mx6sabresd/mx6dlsabresd.cfg
(NXP U-Boot branch imx_v2015.04_4.1.15_1.0.0_ga)

Signed-off-by: Fabio Estevam 
---
Changes since v2:
- Newly introduced in this series

 board/freescale/mx6sabresd/mx6sabresd.c | 88 +
 1 file changed, 88 insertions(+)

diff --git a/board/freescale/mx6sabresd/mx6sabresd.c 
b/board/freescale/mx6sabresd/mx6sabresd.c
index 3c36395..986a82b 100644
--- a/board/freescale/mx6sabresd/mx6sabresd.c
+++ b/board/freescale/mx6sabresd/mx6sabresd.c
@@ -894,6 +894,92 @@ static int mx6qp_dcd_table[] = {
0x021b001c, 0x,
 };
 
+static int mx6dl_dcd_table[] = {
+   0x020e0774, 0x000C,
+   0x020e0754, 0x,
+   0x020e04ac, 0x0030,
+   0x020e04b0, 0x0030,
+   0x020e0464, 0x0030,
+   0x020e0490, 0x0030,
+   0x020e074c, 0x0030,
+   0x020e0494, 0x0030,
+   0x020e04a0, 0x,
+   0x020e04b4, 0x0030,
+   0x020e04b8, 0x0030,
+   0x020e076c, 0x0030,
+   0x020e0750, 0x0002,
+   0x020e04bc, 0x0030,
+   0x020e04c0, 0x0030,
+   0x020e04c4, 0x0030,
+   0x020e04c8, 0x0030,
+   0x020e04cc, 0x0030,
+   0x020e04d0, 0x0030,
+   0x020e04d4, 0x0030,
+   0x020e04d8, 0x0030,
+   0x020e0760, 0x0002,
+   0x020e0764, 0x0030,
+   0x020e0770, 0x0030,
+   0x020e0778, 0x0030,
+   0x020e077c, 0x0030,
+   0x020e0780, 0x0030,
+   0x020e0784, 0x0030,
+   0x020e078c, 0x0030,
+   0x020e0748, 0x0030,
+   0x020e0470, 0x0030,
+   0x020e0474, 0x0030,
+   0x020e0478, 0x0030,
+   0x020e047c, 0x0030,
+   0x020e0480, 0x0030,
+   0x020e0484, 0x0030,
+   0x020e0488, 0x0030,
+   0x020e048c, 0x0030,
+   0x021b0800, 0xa1390003,
+   0x021b080c, 0x001F001F,
+   0x021b0810, 0x001F001F,
+   0x021b480c, 0x001F001F,
+   0x021b4810, 0x001F001F,
+   0x021b083c, 0x4220021F,
+   0x021b0840, 0x0207017E,
+   0x021b483c, 0x4201020C,
+   0x021b4840, 0x01660172,
+   0x021b0848, 0x4A4D4E4D,
+   0x021b4848, 0x4A4F5049,
+   0x021b0850, 0x3F3C3D31,
+   0x021b4850, 0x3238372B,
+   0x021b081c, 0x,
+   0x021b0820, 0x,
+   0x021b0824, 0x,
+   0x021b0828, 0x,
+   0x021b481c, 0x,
+   0x021b4820, 0x,
+   0x021b4824, 0x,
+   0x021b4828, 0x,
+   0x021b08b8, 0x0800,
+   0x021b48b8, 0x0800,
+   0x021b0004, 0x0002002D,
+   0x021b0008, 0x00333030,
+   0x021b000c, 0x3F435313,
+   0x021b0010, 0xB66E8B63,
+   0x021b0014, 0x01FF00DB,
+   0x021b0018, 0x1740,
+   0x021b001c, 0x8000,
+   0x021b002c, 0x26d2,
+   0x021b0030, 0x00431023,
+   0x021b0040, 0x0027,
+   0x021b, 0x831A,
+   0x021b001c, 0x04008032,
+   0x021b001c, 0x8033,
+   0x021b001c, 0x00048031,
+   0x021b001c, 0x05208030,
+   0x021b001c, 0x04008040,
+   0x021b0020, 0x5800,
+   0x021b0818, 0x0007,
+   0x021b4818, 0x0007,
+   0x021b0004, 0x0002556D,
+   0x021b0404, 0x00011006,
+   0x021b001c, 0x,
+
+};
 static void ddr_init(int *table, int size)
 {
int i;
@@ -908,6 +994,8 @@ static void spl_dram_init(void)
ddr_init(mx6q_dcd_table, ARRAY_SIZE(mx6q_dcd_table));
else if (is_mx6dqp())
ddr_init(mx6qp_dcd_table, ARRAY_SIZE(mx6qp_dcd_table));
+   else if (is_mx6sdl())
+   ddr_init(mx6dl_dcd_table, ARRAY_SIZE(mx6dl_dcd_table));
 }
 
 void board_init_f(ulong dummy)
-- 
2.7.4

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Re: [U-Boot] [PATCH v2] vexpress: disable cci ace slave ports when booting in non-sec/hyp mode

[Jon Medhurst (Tixy)]

On Fri, 2016-09-23 at 17:38 +0100, Sudeep Holla wrote:
> Commit f225d39d3093 ("vexpress: Check TC2 firmware support before defaulting
> to nonsec booting") added support to check if the firmware on TC2  is
> configured appropriately before booting in nonsec/hyp mode.
> 
> However when booting in non-secure/hyp mode, CCI control must be done in
> secure firmware and can't  be done in non-secure/hyp mode. In order to
> ensure that, this patch disables the cci slave port inteface so that it
> is not accessed at all.
> 
> Cc: Jon Medhurst 
> Acked-by: Marc Zyngier 
> Signed-off-by: Sudeep Holla 
> ---

Acked-by: Jon Medhurst 
Tested-by: Jon Medhurst 

>  board/armltd/vexpress/vexpress_tc2.c | 52 
> 
>  configs/vexpress_ca15_tc2_defconfig  |  1 +
>  2 files changed, 53 insertions(+)
> 
> Hi,
> 
> This change is needed to avoid the kernel panic while attempting to access
> CCI ports when booting in non-sec/HYP mode. The kernel patches to fix
> this are available @[1]
> 
> Regards,
> Sudeep
> 
> v1->v2:
>   - Fix compilation with !CONFIG_ARMV7_NONSEC(Thanks to Tixy)
> 
> [1] http://www.spinics.net/lists/arm-kernel/msg533715.html
> 
> diff --git a/board/armltd/vexpress/vexpress_tc2.c 
> b/board/armltd/vexpress/vexpress_tc2.c
> index ebb41a8833ab..c7adf950f579 100644
> --- a/board/armltd/vexpress/vexpress_tc2.c
> +++ b/board/armltd/vexpress/vexpress_tc2.c
> @@ -7,7 +7,11 @@
>   * SPDX-License-Identifier:  GPL-2.0+
>   */
> 
> +#include 
>  #include 
> +#include 
> +#include 
> +#include 
> 
>  #define SCC_BASE 0x7fff
> 
> @@ -31,3 +35,51 @@ bool armv7_boot_nonsec_default(void)
>   return (readl((u32 *)(SCC_BASE + 0x700)) & ((1 << 12) | (1 << 13))) == 
> 0;
>  #endif
>  }
> +
> +#ifdef CONFIG_OF_BOARD_SETUP
> +int ft_board_setup(void *fdt, bd_t *bd)
> +{
> + int offset, tmp, len;
> + const struct fdt_property *prop;
> + const char *cci_compatible = "arm,cci-400-ctrl-if";
> +
> +#ifdef CONFIG_ARMV7_NONSEC
> + if (!armv7_boot_nonsec())
> + return 0;
> +#else
> + return 0;
> +#endif
> + /* Booting in nonsec mode, disable CCI access */
> + offset = fdt_path_offset(fdt, "/cpus");
> + if (offset < 0) {
> + printf("couldn't find /cpus\n");
> + return offset;
> + }
> +
> + /* delete cci-control-port in each cpu node */
> + for (tmp = fdt_first_subnode(fdt, offset); tmp >= 0;
> +  tmp = fdt_next_subnode(fdt, tmp))
> + fdt_delprop(fdt, tmp, "cci-control-port");
> +
> + /* disable all ace cci slave ports */
> + offset = fdt_node_offset_by_prop_value(fdt, offset, "compatible",
> +cci_compatible, 20);
> + while (offset > 0) {
> + prop = fdt_get_property(fdt, offset, "interface-type",
> + &len);
> + if (!prop)
> + continue;
> + if (len < 4)
> + continue;
> + if (strcmp(prop->data, "ace"))
> + continue;
> +
> + fdt_setprop_string(fdt, offset, "status", "disabled");
> +
> + offset = fdt_node_offset_by_prop_value(fdt, offset, 
> "compatible",
> +cci_compatible, 20);
> + }
> +
> + return 0;
> +}
> +#endif /* CONFIG_OF_BOARD_SETUP */
> diff --git a/configs/vexpress_ca15_tc2_defconfig 
> b/configs/vexpress_ca15_tc2_defconfig
> index 2f141dda06c6..5154803b7c65 100644
> --- a/configs/vexpress_ca15_tc2_defconfig
> +++ b/configs/vexpress_ca15_tc2_defconfig
> @@ -1,5 +1,6 @@
>  CONFIG_ARM=y
>  CONFIG_TARGET_VEXPRESS_CA15_TC2=y
> +CONFIG_OF_BOARD_SETUP=y
>  CONFIG_HUSH_PARSER=y
>  # CONFIG_CMD_CONSOLE is not set
>  # CONFIG_CMD_BOOTD is not set
> --
> 2.7.4
> 


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Re: [U-Boot] [PATCH v2] vexpress: disable cci ace slave ports when booting in non-sec/hyp mode

[Sudeep Holla]

On 26/09/16 13:30, Jon Medhurst (Tixy) wrote:

On Fri, 2016-09-23 at 17:38 +0100, Sudeep Holla wrote:

Commit f225d39d3093 ("vexpress: Check TC2 firmware support before defaulting
to nonsec booting") added support to check if the firmware on TC2  is
configured appropriately before booting in nonsec/hyp mode.

However when booting in non-secure/hyp mode, CCI control must be done in
secure firmware and can't  be done in non-secure/hyp mode. In order to
ensure that, this patch disables the cci slave port inteface so that it
is not accessed at all.

Cc: Jon Medhurst 
Acked-by: Marc Zyngier 
Signed-off-by: Sudeep Holla 
---


Acked-by: Jon Medhurst 
Tested-by: Jon Medhurst 


So, can I assume the missing kernel patches to be reason for boot hang ?
Just wanted to know if I need to investigate that any further ?

--
Regards,
Sudeep
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[U-Boot] [PATCH] dra7xx: config: cleanup: moved to kconfig for CONFIG_SPL_ENV_SUPPORT

[Ravi Babu]

removing CONFIG_SPL_ENV_SUPPORT defined in header files
due to moved to kconfig option for CONFIG_SPL_ENV_SUPPORT

Signed-off-by: Ravi Babu 
---
 include/configs/dra7xx_evm.h | 1 -
 1 file changed, 1 deletion(-)

diff --git a/include/configs/dra7xx_evm.h b/include/configs/dra7xx_evm.h
index 0726875..72daddf 100644
--- a/include/configs/dra7xx_evm.h
+++ b/include/configs/dra7xx_evm.h
@@ -136,7 +136,6 @@
 #undef CONFIG_CMD_BOOTD
 #ifdef CONFIG_SPL_DFU_SUPPORT
 #define CONFIG_SPL_LOAD_FIT_ADDRESS 0x8020
-#define CONFIG_SPL_ENV_SUPPORT
 #define CONFIG_SPL_HASH_SUPPORT
 #define DFU_ALT_INFO_RAM \
"dfu_alt_info_ram=" \
-- 
1.9.1

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[U-Boot] [PATCH] dra7x: dfu: qspi: increase the qspi spl partition to 256K

[Ravi Babu]

The SPL size for dra7x platform increased beyond 64K,
increasing the size to 256K to cater for future enhancement.

Signed-off-by: Ravi Babu 
---
 include/configs/dra7xx_evm.h | 10 ++
 1 file changed, 2 insertions(+), 8 deletions(-)

diff --git a/include/configs/dra7xx_evm.h b/include/configs/dra7xx_evm.h
index 72daddf..827c1df 100644
--- a/include/configs/dra7xx_evm.h
+++ b/include/configs/dra7xx_evm.h
@@ -105,10 +105,7 @@
 
 #define DFU_ALT_INFO_QSPI \
"dfu_alt_info_qspi=" \
-   "MLO raw 0x0 0x01;" \
-   "MLO.backup1 raw 0x01 0x01;" \
-   "MLO.backup2 raw 0x02 0x01;" \
-   "MLO.backup3 raw 0x03 0x01;" \
+   "MLO raw 0x0 0x04;" \
"u-boot.img raw 0x04 0x010;" \
"u-boot-spl-os raw 0x14 0x08;" \
"u-boot-env raw 0x1C 0x01;" \
@@ -183,10 +180,7 @@
 
 /*
  * Default to using SPI for environment, etc.
- * 0x00 - 0x01 : QSPI.SPL (64KiB)
- * 0x01 - 0x02 : QSPI.SPL.backup1 (64KiB)
- * 0x02 - 0x03 : QSPI.SPL.backup2 (64KiB)
- * 0x03 - 0x04 : QSPI.SPL.backup3 (64KiB)
+ * 0x00 - 0x04 : QSPI.SPL (256KiB)
  * 0x04 - 0x14 : QSPI.u-boot (1MiB)
  * 0x14 - 0x1C : QSPI.u-boot-spl-os (512KiB)
  * 0x1C - 0x1D : QSPI.u-boot-env (64KiB)
-- 
1.9.1

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[U-Boot] [PATCH] dra7x: dfu: qspi: increase the qspi spl partition to 256K

[Ravi Babu]

The SPL size for dra7x platform increased beyond 64K,
increasing the size to 256K to cater for future enhancement.

Signed-off-by: Ravi Babu 
---
 include/configs/dra7xx_evm.h | 10 ++
 1 file changed, 2 insertions(+), 8 deletions(-)

diff --git a/include/configs/dra7xx_evm.h b/include/configs/dra7xx_evm.h
index 72daddf..827c1df 100644
--- a/include/configs/dra7xx_evm.h
+++ b/include/configs/dra7xx_evm.h
@@ -105,10 +105,7 @@
 
 #define DFU_ALT_INFO_QSPI \
"dfu_alt_info_qspi=" \
-   "MLO raw 0x0 0x01;" \
-   "MLO.backup1 raw 0x01 0x01;" \
-   "MLO.backup2 raw 0x02 0x01;" \
-   "MLO.backup3 raw 0x03 0x01;" \
+   "MLO raw 0x0 0x04;" \
"u-boot.img raw 0x04 0x010;" \
"u-boot-spl-os raw 0x14 0x08;" \
"u-boot-env raw 0x1C 0x01;" \
@@ -183,10 +180,7 @@
 
 /*
  * Default to using SPI for environment, etc.
- * 0x00 - 0x01 : QSPI.SPL (64KiB)
- * 0x01 - 0x02 : QSPI.SPL.backup1 (64KiB)
- * 0x02 - 0x03 : QSPI.SPL.backup2 (64KiB)
- * 0x03 - 0x04 : QSPI.SPL.backup3 (64KiB)
+ * 0x00 - 0x04 : QSPI.SPL (256KiB)
  * 0x04 - 0x14 : QSPI.u-boot (1MiB)
  * 0x14 - 0x1C : QSPI.u-boot-spl-os (512KiB)
  * 0x1C - 0x1D : QSPI.u-boot-env (64KiB)
-- 
1.9.1

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[U-Boot] [PATCH] env: tool: add command line option to input lockfile path

[Ravi Babu]

The default lockname is set to /var/lock. This limits the
usage of this application where OS uses different lockfile
location parameter.
For example, In case of android, the default lock
path location is /data.
Hence by providing the command line option to input lockfile
path will be useful to reuse the tool across multiple
operating system.

usage: ./fw_printenv -l 

Signed-off-by: Ravi Babu 
---
 tools/env/fw_env.h  |  1 +
 tools/env/fw_env_main.c | 35 +--
 2 files changed, 30 insertions(+), 6 deletions(-)

diff --git a/tools/env/fw_env.h b/tools/env/fw_env.h
index 436eca9..05588ab 100644
--- a/tools/env/fw_env.h
+++ b/tools/env/fw_env.h
@@ -63,6 +63,7 @@ struct env_opts {
 #endif
int aes_flag; /* Is AES encryption used? */
uint8_t aes_key[AES_KEY_LENGTH];
+   char *lockname;
 };
 
 int parse_aes_key(char *key, uint8_t *bin_key);
diff --git a/tools/env/fw_env_main.c b/tools/env/fw_env_main.c
index 7a17b28..443de36 100644
--- a/tools/env/fw_env_main.c
+++ b/tools/env/fw_env_main.c
@@ -46,6 +46,7 @@ static struct option long_options[] = {
{"help", no_argument, NULL, 'h'},
{"script", required_argument, NULL, 's'},
{"noheader", required_argument, NULL, 'n'},
+   {"lock", required_argument, NULL, 'l'},
{NULL, 0, NULL, 0}
 };
 
@@ -72,6 +73,7 @@ void usage_printenv(void)
" -c, --config configuration file, default:" 
CONFIG_FILE "\n"
 #endif
" -n, --noheader   do not repeat variable name in output\n"
+   " -l, --lock   lock node, default:/var/lock\n"
"\n");
 }
 
@@ -88,6 +90,7 @@ void usage_setenv(void)
 #ifdef CONFIG_FILE
" -c, --config configuration file, default:" 
CONFIG_FILE "\n"
 #endif
+   " -l, --lock   lock node, default:/var/lock\n"
" -s, --script batch mode to minimize writes\n"
"\n"
"Examples:\n"
@@ -119,7 +122,7 @@ static void parse_common_args(int argc, char *argv[])
env_opts.config_file = CONFIG_FILE;
 #endif
 
-   while ((c = getopt_long(argc, argv, ":a:c:h", long_options, NULL)) !=
+   while ((c = getopt_long(argc, argv, ":a:c:l:h", long_options, NULL)) !=
   EOF) {
switch (c) {
case 'a':
@@ -134,6 +137,9 @@ static void parse_common_args(int argc, char *argv[])
env_opts.config_file = optarg;
break;
 #endif
+   case 'l':
+   env_opts.lockname = optarg;
+   break;
case 'h':
do_printenv ? usage_printenv() : usage_setenv();
exit(EXIT_SUCCESS);
@@ -155,8 +161,8 @@ int parse_printenv_args(int argc, char *argv[])
 
parse_common_args(argc, argv);
 
-   while ((c = getopt_long(argc, argv, "a:c:ns:h", long_options, NULL)) !=
-  EOF) {
+   while ((c = getopt_long(argc, argv, "a:c:ns:l:h", long_options, NULL))
+   != EOF) {
switch (c) {
case 'n':
noheader = 1;
@@ -164,6 +170,7 @@ int parse_printenv_args(int argc, char *argv[])
case 'a':
case 'c':
case 'h':
+   case 'l':
/* ignore common options */
break;
default: /* '?' */
@@ -181,8 +188,8 @@ int parse_setenv_args(int argc, char *argv[])
 
parse_common_args(argc, argv);
 
-   while ((c = getopt_long(argc, argv, "a:c:ns:h", long_options, NULL)) !=
-  EOF) {
+   while ((c = getopt_long(argc, argv, "a:c:ns:l:h", long_options, NULL))
+   != EOF) {
switch (c) {
case 's':
script_file = optarg;
@@ -190,6 +197,7 @@ int parse_setenv_args(int argc, char *argv[])
case 'a':
case 'c':
case 'h':
+   case 'l':
/* ignore common options */
break;
default: /* '?' */
@@ -203,7 +211,7 @@ int parse_setenv_args(int argc, char *argv[])
 
 int main(int argc, char *argv[])
 {
-   const char *lockname = "/var/lock/" CMD_PRINTENV ".lock";
+   char *lockname = "/var/lock/" CMD_PRINTENV ".lock";
int lockfd = -1;
int retval = EXIT_SUCCESS;
char *_cmdname;
@@ -235,6 +243,18 @@ int main(int argc, char *argv[])
argc -= optind;
argv += optind;
 
+   if (env_opts.lockname) {
+   lockname = malloc(sizeof(env_opts.lockname) +
+   sizeof(CMD_PRINTENV) + 10);
+   if (!lockname) {
+   fprintf(stderr, "Unable allocate memory");
+   exit(EXIT_FAILURE);
+   }
+
+   sprintf(lockname, "%s/%s.lock",
+  

[U-Boot] [PATCH] spl: saveenv: adding saveenv support in SPL

[Ravi Babu]

By default saveenv option is not supported for SPL. This patch
enable the support for save environment variable for SPL build.

Enable save environment support in SPL after setenv. By default
the saveenv option is not provided in SPL, but some boards need
this support in 'Falcon' boot, where SPL need to boot from
different images based on environment variable set by OS. For
example OS may set "reboot_image" environment variable to
"recovery" inorder to boot recovery image by SPL. The SPL read
"reboot_image" and act accordingly and change the reboot_image
to default mode using setenv and save the environemnt.

Signed-off-by: Ravi Babu 
---
 common/spl/Kconfig| 13 +
 drivers/mmc/Makefile  |  1 +
 drivers/mmc/mmc_private.h |  3 +--
 lib/Makefile  |  1 +
 lib/hashtable.c   |  2 +-
 5 files changed, 17 insertions(+), 3 deletions(-)

diff --git a/common/spl/Kconfig b/common/spl/Kconfig
index 2a8ddbc..0daa835 100644
--- a/common/spl/Kconfig
+++ b/common/spl/Kconfig
@@ -163,6 +163,19 @@ config SPL_ENV_SUPPORT
  starting U-Boot first. Enabling this option will make getenv()
  and setenv() available in SPL.
 
+config SPL_SAVEENV_SUPPORT
+   bool "Support save environment"
+   depends on SPL && SPL_ENV_SUPPORT
+   help
+ Enable save environment support in SPL after setenv. By default
+ the saveenv option is not provided in SPL, but some boards need
+ this support in 'Falcon' boot, where SPL need to boot from
+ different images based on environment variable set by OS. For
+ example OS may set "reboot_image" environment variable to
+ "recovery" inorder to boot recovery image by SPL. The SPL read
+ "reboot_image" and act accordingly and change the reboot_image
+ to default mode using setenv and save the environemnt.
+
 config SPL_ETH_SUPPORT
bool "Support Ethernet"
depends on SPL_ENV_SUPPORT
diff --git a/drivers/mmc/Makefile b/drivers/mmc/Makefile
index 18351fb..cedce0a 100644
--- a/drivers/mmc/Makefile
+++ b/drivers/mmc/Makefile
@@ -60,6 +60,7 @@ obj-$(CONFIG_ROCKCHIP_SDHCI) += rockchip_sdhci.o
 
 ifdef CONFIG_SPL_BUILD
 obj-$(CONFIG_SPL_MMC_BOOT) += fsl_esdhc_spl.o
+obj-$(CONFIG_SPL_SAVEENV_SUPPORT) += mmc_write.o
 else
 obj-$(CONFIG_GENERIC_MMC) += mmc_write.o
 endif
diff --git a/drivers/mmc/mmc_private.h b/drivers/mmc/mmc_private.h
index 49ec022..1a881ad 100644
--- a/drivers/mmc/mmc_private.h
+++ b/drivers/mmc/mmc_private.h
@@ -28,8 +28,7 @@ ulong mmc_bread(struct blk_desc *block_dev, lbaint_t start, 
lbaint_t blkcnt,
void *dst);
 #endif
 
-#ifndef CONFIG_SPL_BUILD
-
+#if !(defined(CONFIG_SPL_BUILD) && !defined(CONFIG_SPL_SAVEENV_SUPPORT))
 unsigned long mmc_berase(struct blk_desc *block_dev, lbaint_t start,
 lbaint_t blkcnt);
 
diff --git a/lib/Makefile b/lib/Makefile
index c81bfeb..1590704 100644
--- a/lib/Makefile
+++ b/lib/Makefile
@@ -47,6 +47,7 @@ obj-$(CONFIG_$(SPL_)RSA) += rsa/
 obj-$(CONFIG_$(SPL_)SHA1) += sha1.o
 obj-$(CONFIG_$(SPL_)SHA256) += sha256.o
 
+obj-$(CONFIG_SPL_SAVEENV_SUPPORT) += qsort.o
 obj-$(CONFIG_$(SPL_)OF_LIBFDT) += libfdt/
 ifneq ($(CONFIG_SPL_BUILD)$(CONFIG_SPL_OF_PLATDATA),yy)
 obj-$(CONFIG_$(SPL_)OF_CONTROL) += fdtdec_common.o
diff --git a/lib/hashtable.c b/lib/hashtable.c
index 4e52b36..bdb54ca 100644
--- a/lib/hashtable.c
+++ b/lib/hashtable.c
@@ -477,11 +477,11 @@ int hdelete_r(const char *key, struct hsearch_data *htab, 
int flag)
return 1;
 }
 
+#if !(defined(CONFIG_SPL_BUILD) && !defined(CONFIG_SPL_SAVEENV_SUPPORT))
 /*
  * hexport()
  */
 
-#ifndef CONFIG_SPL_BUILD
 /*
  * Export the data stored in the hash table in linearized form.
  *
-- 
1.9.1

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Re: [U-Boot] [PATCH] dra7x: dfu: qspi: increase the qspi spl partition to 256K

[Tom Rini]

On Mon, Sep 26, 2016 at 06:21:13PM +0530, Ravi Babu wrote:

> The SPL size for dra7x platform increased beyond 64K,
> increasing the size to 256K to cater for future enhancement.
> 
> Signed-off-by: Ravi Babu 

Have you tested this with a larger SPL to confirm that the ROM will read
more than one sector?

-- 
Tom


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[U-Boot] [PATCH] tools: imximage: use 'new style' header length for imximage v1

[Martin Kaiser]

From: Martin Kaiser 

We can use the same mechanism for the imximage v1 header length
calculations that we're using for v2. Doing so, we can share more code
between v1 and v2.

Additionally, *header_size_ptr in imximage_set_header() will then have
the correct value for both v1 and v2.

Signed-off-by: Martin Kaiser 
---

I discovered the problem when I tried to use csf_ptr with imximage v1
(as part of a private modification).

*csf_ptr = params->ep + *header_size_ptr - imximage_init_loadsize;
 = params->ep + sbuf->st_size +
 imximage_ivt_offset - imximage_init_loadsize;
 = params->ep + padded data file size + alloc_len -
 (imximage_init_loadsize - imximage_ivt_offset);

This works only if
alloc_len == imximage_init_loadsize - imximage_ivt_offset,
not if alloc_len is always 4096.

 tools/imximage.c |   43 ---
 1 file changed, 20 insertions(+), 23 deletions(-)

diff --git a/tools/imximage.c b/tools/imximage.c
index 092d550..e280da6 100644
--- a/tools/imximage.c
+++ b/tools/imximage.c
@@ -291,8 +291,7 @@ static void set_imx_hdr_v1(struct imx_header *imxhdr, 
uint32_t dcd_len,
/* Set magic number */
fhdr_v1->app_code_barker = APP_CODE_BARKER;
 
-   /* TODO: check i.MX image V1 handling, for now use 'old' style */
-   hdr_base = entry_point - 4096;
+   hdr_base = entry_point - imximage_init_loadsize + flash_offset;
fhdr_v1->app_dest_ptr = hdr_base - flash_offset;
fhdr_v1->app_code_jump_vector = entry_point;
 
@@ -649,6 +648,7 @@ static void imximage_set_header(void *ptr, struct stat 
*sbuf, int ifd,
 {
struct imx_header *imxhdr = (struct imx_header *)ptr;
uint32_t dcd_len;
+   uint32_t imx_hdr_size;
 
/*
 * In order to not change the old imx cfg file
@@ -664,12 +664,13 @@ static void imximage_set_header(void *ptr, struct stat 
*sbuf, int ifd,
/* Parse dcd configuration file */
dcd_len = parse_cfg_file(imxhdr, params->imagename);
 
-   if (imximage_version == IMXIMAGE_V2) {
-   if (imximage_init_loadsize < imximage_ivt_offset +
-   sizeof(imx_header_v2_t))
-   imximage_init_loadsize = imximage_ivt_offset +
-   sizeof(imx_header_v2_t);
-   }
+   if (imximage_version == IMXIMAGE_V1)
+   imx_hdr_size = sizeof(imx_header_v1_t);
+   else
+   imx_hdr_size = sizeof(imx_header_v2_t);
+
+   if (imximage_init_loadsize < imximage_ivt_offset + imx_hdr_size)
+   imximage_init_loadsize = imximage_ivt_offset + imx_hdr_size;
 
/* Set the imx header */
(*set_imx_hdr)(imxhdr, dcd_len, params->ep, imximage_ivt_offset);
@@ -722,6 +723,7 @@ static int imximage_generate(struct image_tool_params 
*params,
struct stat sbuf;
char *datafile = params->datafile;
uint32_t pad_len;
+   uint32_t imx_hdr_size;
 
memset(&imximage_header, 0, sizeof(imximage_header));
 
@@ -739,16 +741,15 @@ static int imximage_generate(struct image_tool_params 
*params,
/* Parse dcd configuration file */
parse_cfg_file(&imximage_header, params->imagename);
 
-   /* TODO: check i.MX image V1 handling, for now use 'old' style */
-   if (imximage_version == IMXIMAGE_V1) {
-   alloc_len = 4096;
-   } else {
-   if (imximage_init_loadsize < imximage_ivt_offset +
-   sizeof(imx_header_v2_t))
-   imximage_init_loadsize = imximage_ivt_offset +
-   sizeof(imx_header_v2_t);
-   alloc_len = imximage_init_loadsize - imximage_ivt_offset;
-   }
+   if (imximage_version == IMXIMAGE_V1)
+   imx_hdr_size = sizeof(imx_header_v1_t);
+   else
+   imx_hdr_size = sizeof(imx_header_v2_t);
+
+   if (imximage_init_loadsize < imximage_ivt_offset + imx_hdr_size)
+   imximage_init_loadsize = imximage_ivt_offset + imx_hdr_size;
+
+   alloc_len = imximage_init_loadsize - imximage_ivt_offset;
 
if (alloc_len < sizeof(struct imx_header)) {
fprintf(stderr, "%s: header error\n",
@@ -779,11 +780,7 @@ static int imximage_generate(struct image_tool_params 
*params,
 
pad_len = ROUND(sbuf.st_size, 4096) - sbuf.st_size;
 
-   /* TODO: check i.MX image V1 handling, for now use 'old' style */
-   if (imximage_version == IMXIMAGE_V1)
-   return 0;
-   else
-   return pad_len;
+   return pad_len;
 }
 
 
-- 
1.7.10.4

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[U-Boot] [PATCH 0/9] Switch bcm283x platform to use OF_CONTROL

[Fabian Vogt]

This patch series modifies the used drivers to work with OF_CONTROL
and switches the board code and configs to use it.
The added device trees are directly from the linux kernel tree
and can thus be used for booting the (upstream) kernel.

Fabian Vogt (9):
  gpio: bcm2835: add device tree support
  serial: bcm283x_mu: add device tree support
  serial: pl01x: expose skip_init platdata option in DT
  fdt: add dt-bindings for bcm2835
  fdt: import bcm283x device tree sources from the linux kernel tree
  fdt: adjust bcm283x device tree for u-boot
  serial: bcm283x_mu: support disabling after initialization
  board: rpi: move uart deactivation to board_init
  ARM: bcm283x: use OF_CONTROL for bcm283x

 arch/arm/Kconfig   |   1 +
 arch/arm/dts/Makefile  |   9 +
 arch/arm/dts/bcm2835-rpi-a-plus.dts|  35 +++
 arch/arm/dts/bcm2835-rpi-a.dts |  28 ++
 arch/arm/dts/bcm2835-rpi-b-plus.dts|  36 +++
 arch/arm/dts/bcm2835-rpi-b-rev2.dts|  29 ++
 arch/arm/dts/bcm2835-rpi-b.dts |  23 ++
 arch/arm/dts/bcm2835-rpi.dtsi  |  86 ++
 arch/arm/dts/bcm2835.dtsi  |  25 ++
 arch/arm/dts/bcm2836-rpi-2-b.dts   |  40 +++
 arch/arm/dts/bcm2836.dtsi  |  78 +
 arch/arm/dts/bcm2837-rpi-3-b.dts   |  30 ++
 arch/arm/dts/bcm2837.dtsi  |  76 +
 arch/arm/dts/bcm283x-rpi-smsc9512.dtsi |  19 ++
 arch/arm/dts/bcm283x-rpi-smsc9514.dtsi |  19 ++
 arch/arm/dts/bcm283x-uboot.dtsi|  22 ++
 arch/arm/dts/bcm283x.dtsi  | 323 +
 board/raspberrypi/rpi/rpi.c|  77 ++---
 configs/rpi_2_defconfig|   2 +
 configs/rpi_3_32b_defconfig|   2 +
 configs/rpi_3_defconfig|   2 +
 configs/rpi_defconfig  |   2 +
 doc/device-tree-bindings/gpio/bcm2835-gpio.txt |   5 +
 .../serial/bcm2835-aux-uart.txt|  10 +
 doc/device-tree-bindings/serial/pl01x.txt  |   3 +
 drivers/gpio/bcm2835_gpio.c|  24 ++
 drivers/serial/serial_bcm283x_mu.c |  46 ++-
 drivers/serial/serial_pl01x.c  |   2 +
 include/configs/rpi.h  |   1 -
 include/dt-bindings/clock/bcm2835-aux.h|  17 ++
 include/dt-bindings/clock/bcm2835.h|  66 +
 include/dt-bindings/pinctrl/bcm2835.h  |  27 ++
 include/dt-bindings/power/raspberrypi-power.h  |  41 +++
 33 files changed, 1152 insertions(+), 54 deletions(-)
 create mode 100644 arch/arm/dts/bcm2835-rpi-a-plus.dts
 create mode 100644 arch/arm/dts/bcm2835-rpi-a.dts
 create mode 100644 arch/arm/dts/bcm2835-rpi-b-plus.dts
 create mode 100644 arch/arm/dts/bcm2835-rpi-b-rev2.dts
 create mode 100644 arch/arm/dts/bcm2835-rpi-b.dts
 create mode 100644 arch/arm/dts/bcm2835-rpi.dtsi
 create mode 100644 arch/arm/dts/bcm2835.dtsi
 create mode 100644 arch/arm/dts/bcm2836-rpi-2-b.dts
 create mode 100644 arch/arm/dts/bcm2836.dtsi
 create mode 100644 arch/arm/dts/bcm2837-rpi-3-b.dts
 create mode 100644 arch/arm/dts/bcm2837.dtsi
 create mode 100644 arch/arm/dts/bcm283x-rpi-smsc9512.dtsi
 create mode 100644 arch/arm/dts/bcm283x-rpi-smsc9514.dtsi
 create mode 100644 arch/arm/dts/bcm283x-uboot.dtsi
 create mode 100644 arch/arm/dts/bcm283x.dtsi
 create mode 100644 doc/device-tree-bindings/gpio/bcm2835-gpio.txt
 create mode 100644 doc/device-tree-bindings/serial/bcm2835-aux-uart.txt
 create mode 100644 include/dt-bindings/clock/bcm2835-aux.h
 create mode 100644 include/dt-bindings/clock/bcm2835.h
 create mode 100644 include/dt-bindings/pinctrl/bcm2835.h
 create mode 100644 include/dt-bindings/power/raspberrypi-power.h

-- 
2.6.2

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[U-Boot] [PATCH 3/9] serial: pl01x: expose skip_init platdata option in DT

[Fabian Vogt]

To be able to represent the skip-init platdata element with OF_CONTROL,
it needs to be read from the device tree as well and put into the platform data.

Cc: Eric Anholt 
Signed-off-by: Fabian Vogt 
---
 doc/device-tree-bindings/serial/pl01x.txt | 3 +++
 drivers/serial/serial_pl01x.c | 2 ++
 2 files changed, 5 insertions(+)

diff --git a/doc/device-tree-bindings/serial/pl01x.txt 
b/doc/device-tree-bindings/serial/pl01x.txt
index 61c27d1..017b1e2 100644
--- a/doc/device-tree-bindings/serial/pl01x.txt
+++ b/doc/device-tree-bindings/serial/pl01x.txt
@@ -5,3 +5,6 @@ Required properties:
 - reg: exactly one register range with length 0x1000
 - clock: input clock frequency for the UART (used to calculate the baud
   rate divisor)
+
+Optional properties:
+- skip-init: if present, the baud rate divisor is not changed
diff --git a/drivers/serial/serial_pl01x.c b/drivers/serial/serial_pl01x.c
index 6f83835..a8d3d67 100644
--- a/drivers/serial/serial_pl01x.c
+++ b/drivers/serial/serial_pl01x.c
@@ -356,6 +356,8 @@ static int pl01x_serial_ofdata_to_platdata(struct udevice 
*dev)
plat->base = addr;
plat->clock = fdtdec_get_int(gd->fdt_blob, dev->of_offset, "clock", 1);
plat->type = dev_get_driver_data(dev);
+   plat->skip_init = fdtdec_get_bool(gd->fdt_blob, dev->of_offset,
+ "skip-init");
return 0;
 }
 #endif
-- 
2.6.2

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[U-Boot] [PATCH 2/9] serial: bcm283x_mu: add device tree support

[Fabian Vogt]

This patch adds device tree support for the bcm283x mini-uart driver.

Signed-off-by: Fabian Vogt 
---
 .../serial/bcm2835-aux-uart.txt| 10 
 drivers/serial/serial_bcm283x_mu.c | 28 ++
 2 files changed, 38 insertions(+)
 create mode 100644 doc/device-tree-bindings/serial/bcm2835-aux-uart.txt

diff --git a/doc/device-tree-bindings/serial/bcm2835-aux-uart.txt 
b/doc/device-tree-bindings/serial/bcm2835-aux-uart.txt
new file mode 100644
index 000..75886e5
--- /dev/null
+++ b/doc/device-tree-bindings/serial/bcm2835-aux-uart.txt
@@ -0,0 +1,10 @@
+* BCM283x mini UART
+
+Required properties:
+- compatible: must be "brcm,bcm2835-aux-uart"
+- reg: exactly one register range with length 0x1000
+- clock: input clock frequency for the UART (used to calculate the baud
+  rate divisor)
+
+Optional properties:
+- skip-init: if present, the baud rate divisor is not changed
diff --git a/drivers/serial/serial_bcm283x_mu.c 
b/drivers/serial/serial_bcm283x_mu.c
index f4e062f..e361909 100644
--- a/drivers/serial/serial_bcm283x_mu.c
+++ b/drivers/serial/serial_bcm283x_mu.c
@@ -25,6 +25,8 @@
 #include 
 #include 
 
+DECLARE_GLOBAL_DATA_PTR;
+
 struct bcm283x_mu_regs {
u32 io;
u32 iir;
@@ -132,9 +134,35 @@ static const struct dm_serial_ops bcm283x_mu_serial_ops = {
.setbrg = bcm283x_mu_serial_setbrg,
 };
 
+#if CONFIG_IS_ENABLED(OF_CONTROL)
+static const struct udevice_id bcm283x_mu_serial_id[] = {
+   {.compatible = "brcm,bcm2835-aux-uart"},
+   {}
+};
+
+static int bcm283x_mu_serial_ofdata_to_platdata(struct udevice *dev)
+{
+   struct bcm283x_mu_serial_platdata *plat = dev_get_platdata(dev);
+   fdt_addr_t addr;
+
+   addr = dev_get_addr(dev);
+   if (addr == FDT_ADDR_T_NONE)
+   return -EINVAL;
+
+   plat->base = addr;
+   plat->clock = fdtdec_get_int(gd->fdt_blob, dev->of_offset, "clock", 1);
+   plat->skip_init = fdtdec_get_bool(gd->fdt_blob, dev->of_offset,
+ "skip-init");
+   plat->disabled = false;
+   return 0;
+}
+#endif
+
 U_BOOT_DRIVER(serial_bcm283x_mu) = {
.name = "serial_bcm283x_mu",
.id = UCLASS_SERIAL,
+   .of_match = of_match_ptr(bcm283x_mu_serial_id),
+   .ofdata_to_platdata = 
of_match_ptr(bcm283x_mu_serial_ofdata_to_platdata),
.platdata_auto_alloc_size = sizeof(struct bcm283x_mu_serial_platdata),
.probe = bcm283x_mu_serial_probe,
.ops = &bcm283x_mu_serial_ops,
-- 
2.6.2

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[U-Boot] [PATCH 4/9] fdt: add dt-bindings for bcm2835

[Fabian Vogt]

This patch adds dt-bindings as used by the linux kernel device trees
for the bcm283x family.

Albert Aribaud 
Signed-off-by: Fabian Vogt 
---
 include/dt-bindings/clock/bcm2835-aux.h   | 17 +++
 include/dt-bindings/clock/bcm2835.h   | 66 +++
 include/dt-bindings/pinctrl/bcm2835.h | 27 +++
 include/dt-bindings/power/raspberrypi-power.h | 41 +
 4 files changed, 151 insertions(+)
 create mode 100644 include/dt-bindings/clock/bcm2835-aux.h
 create mode 100644 include/dt-bindings/clock/bcm2835.h
 create mode 100644 include/dt-bindings/pinctrl/bcm2835.h
 create mode 100644 include/dt-bindings/power/raspberrypi-power.h

diff --git a/include/dt-bindings/clock/bcm2835-aux.h 
b/include/dt-bindings/clock/bcm2835-aux.h
new file mode 100644
index 000..d91156e
--- /dev/null
+++ b/include/dt-bindings/clock/bcm2835-aux.h
@@ -0,0 +1,17 @@
+/*
+ * Copyright (C) 2015 Broadcom Corporation
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation version 2.
+ *
+ * This program is distributed "as is" WITHOUT ANY WARRANTY of any
+ * kind, whether express or implied; without even the implied warranty
+ * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#define BCM2835_AUX_CLOCK_UART 0
+#define BCM2835_AUX_CLOCK_SPI1 1
+#define BCM2835_AUX_CLOCK_SPI2 2
+#define BCM2835_AUX_CLOCK_COUNT3
diff --git a/include/dt-bindings/clock/bcm2835.h 
b/include/dt-bindings/clock/bcm2835.h
new file mode 100644
index 000..360e00c
--- /dev/null
+++ b/include/dt-bindings/clock/bcm2835.h
@@ -0,0 +1,66 @@
+/*
+ * Copyright (C) 2015 Broadcom Corporation
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation version 2.
+ *
+ * This program is distributed "as is" WITHOUT ANY WARRANTY of any
+ * kind, whether express or implied; without even the implied warranty
+ * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#define BCM2835_PLLA   0
+#define BCM2835_PLLB   1
+#define BCM2835_PLLC   2
+#define BCM2835_PLLD   3
+#define BCM2835_PLLH   4
+
+#define BCM2835_PLLA_CORE  5
+#define BCM2835_PLLA_PER   6
+#define BCM2835_PLLB_ARM   7
+#define BCM2835_PLLC_CORE0 8
+#define BCM2835_PLLC_CORE1 9
+#define BCM2835_PLLC_CORE2 10
+#define BCM2835_PLLC_PER   11
+#define BCM2835_PLLD_CORE  12
+#define BCM2835_PLLD_PER   13
+#define BCM2835_PLLH_RCAL  14
+#define BCM2835_PLLH_AUX   15
+#define BCM2835_PLLH_PIX   16
+
+#define BCM2835_CLOCK_TIMER17
+#define BCM2835_CLOCK_OTP  18
+#define BCM2835_CLOCK_UART 19
+#define BCM2835_CLOCK_VPU  20
+#define BCM2835_CLOCK_V3D  21
+#define BCM2835_CLOCK_ISP  22
+#define BCM2835_CLOCK_H264 23
+#define BCM2835_CLOCK_VEC  24
+#define BCM2835_CLOCK_HSM  25
+#define BCM2835_CLOCK_SDRAM26
+#define BCM2835_CLOCK_TSENS27
+#define BCM2835_CLOCK_EMMC 28
+#define BCM2835_CLOCK_PERI_IMAGE   29
+#define BCM2835_CLOCK_PWM  30
+#define BCM2835_CLOCK_PCM  31
+
+#define BCM2835_PLLA_DSI0  32
+#define BCM2835_PLLA_CCP2  33
+#define BCM2835_PLLD_DSI0  34
+#define BCM2835_PLLD_DSI1  35
+
+#define BCM2835_CLOCK_AVEO 36
+#define BCM2835_CLOCK_DFT  37
+#define BCM2835_CLOCK_GP0  38
+#define BCM2835_CLOCK_GP1  39
+#define BCM2835_CLOCK_GP2  40
+#define BCM2835_CLOCK_SLIM 41
+#define BCM2835_CLOCK_SMI  42
+#define BCM2835_CLOCK_TEC  43
+#define BCM2835_CLOCK_DPI  44
+#define BCM2835_CLOCK_CAM0 45
+#define BCM2835_CLOCK_CAM1 46
+#define BCM2835_CLOCK_DSI0E47
+#define BCM2835_CLOCK_DSI1E48
diff --git a/include/dt-bindings/pinctrl/bcm2835.h 
b/include/dt-bindings/pinctrl/bcm2835.h
new file mode 100644
index 000..6f0bc37
--- /dev/null
+++ b/include/dt-bindings/pinctrl/bcm2835.h
@@ -0,0 +1,27 @@
+/*
+ * Header providing constants for bcm2835 pinctrl bindings.
+ *
+ * Copyright (C) 2015 Stefan Wahren 
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gn

[U-Boot] [PATCH 6/9] fdt: adjust bcm283x device tree for u-boot

[Fabian Vogt]

The information currently set via platdata has to be represented in the
device tree now. bcm283x-uboot.dtsi adds the u-boot specific "skip-init"
property to the serial nodes and enables initialization in the pre-reloc phase.

Cc: Albert Aribaud 
Signed-off-by: Fabian Vogt 
---
 arch/arm/dts/bcm283x-uboot.dtsi | 22 ++
 arch/arm/dts/bcm283x.dtsi   |  4 +++-
 2 files changed, 25 insertions(+), 1 deletion(-)
 create mode 100644 arch/arm/dts/bcm283x-uboot.dtsi

diff --git a/arch/arm/dts/bcm283x-uboot.dtsi b/arch/arm/dts/bcm283x-uboot.dtsi
new file mode 100644
index 000..8e4231a
--- /dev/null
+++ b/arch/arm/dts/bcm283x-uboot.dtsi
@@ -0,0 +1,22 @@
+/*
+ * U-Boot addition to keep baudrate set by firmware
+ * and also initialize before relocation.
+ *
+ * (C) Copyright 2016 Fabian Vogt 
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+&soc {
+   u-boot,dm-pre-reloc;
+};
+
+&uart0 {
+   skip-init;
+   u-boot,dm-pre-reloc;
+};
+
+&uart1 {
+   skip-init;
+   u-boot,dm-pre-reloc;
+};
diff --git a/arch/arm/dts/bcm283x.dtsi b/arch/arm/dts/bcm283x.dtsi
index 445624a..e5b4f20 100644
--- a/arch/arm/dts/bcm283x.dtsi
+++ b/arch/arm/dts/bcm283x.dtsi
@@ -19,7 +19,7 @@
bootargs = "earlyprintk console=ttyAMA0";
};
 
-   soc {
+   soc: soc {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
@@ -319,3 +319,5 @@
 
};
 };
+
+#include "bcm283x-uboot.dtsi"
-- 
2.6.2

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[U-Boot] [PATCH 8/9] board: rpi: move uart deactivation to board_init

[Fabian Vogt]

When using OF_CONTROL, the disabled value of the mini UART platdata
gets reset after board_early_init_f. So move detection and disabling
to board_init and remove board_early_init_f.
This uses the first device using the mini uart driver, as this method
works reliably with different device trees or even no device tree at all.

Signed-off-by: Fabian Vogt 
---
 board/raspberrypi/rpi/rpi.c | 40 ++--
 include/configs/rpi.h   |  1 -
 2 files changed, 26 insertions(+), 15 deletions(-)

diff --git a/board/raspberrypi/rpi/rpi.c b/board/raspberrypi/rpi/rpi.c
index 6245b36..09bfcc6 100644
--- a/board/raspberrypi/rpi/rpi.c
+++ b/board/raspberrypi/rpi/rpi.c
@@ -443,15 +443,6 @@ static void get_board_rev(void)
printf("RPI %s (0x%x)\n", model->name, revision);
 }
 
-int board_init(void)
-{
-   get_board_rev();
-
-   gd->bd->bi_boot_params = 0x100;
-
-   return power_on_module(BCM2835_MBOX_POWER_DEVID_USB_HCD);
-}
-
 #ifndef CONFIG_PL01X_SERIAL
 static bool rpi_is_serial_active(void)
 {
@@ -471,17 +462,38 @@ static bool rpi_is_serial_active(void)
 
return true;
 }
+
+/* Disable mini-UART I/O if it's not pinmuxed to our pins.
+ * The firmware only enables it if explicitly done in config.txt: enable_uart=1
+ */
+static void rpi_disable_inactive_uart(void)
+{
+   struct udevice *dev;
+   struct bcm283x_mu_serial_platdata *plat;
+
+   if (uclass_get_device_by_driver(UCLASS_SERIAL,
+   DM_GET_DRIVER(serial_bcm283x_mu),
+   &dev) || !dev)
+   return;
+
+   if (!rpi_is_serial_active()) {
+   plat = dev_get_platdata(dev);
+   plat->disabled = true;
+   }
+}
 #endif
 
-int board_early_init_f(void)
+int board_init(void)
 {
 #ifndef CONFIG_PL01X_SERIAL
-   /* Disable mini-UART I/O if it's not pinmuxed to our pins */
-   if (!rpi_is_serial_active())
-   serial_platdata.disabled = true;
+   rpi_disable_inactive_uart();
 #endif
 
-   return 0;
+   get_board_rev();
+
+   gd->bd->bi_boot_params = 0x100;
+
+   return power_on_module(BCM2835_MBOX_POWER_DEVID_USB_HCD);
 }
 
 int board_mmc_init(bd_t *bis)
diff --git a/include/configs/rpi.h b/include/configs/rpi.h
index 8d4ad5d..e9c0417 100644
--- a/include/configs/rpi.h
+++ b/include/configs/rpi.h
@@ -16,7 +16,6 @@
 
 /* Architecture, CPU, etc.*/
 #define CONFIG_ARCH_CPU_INIT
-#define CONFIG_BOARD_EARLY_INIT_F
 
 /* Use SoC timer for AArch32, but architected timer for AArch64 */
 #ifndef CONFIG_ARM64
-- 
2.6.2

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[U-Boot] [PATCH 7/9] serial: bcm283x_mu: support disabling after initialization

[Fabian Vogt]

For the Raspberry Pi 3 it needs to be possible to disable the serial
device after initialization happens, as only after the GPIO device is available
it is known whether the mini uart is usable.

Signed-off-by: Fabian Vogt 
---
 drivers/serial/serial_bcm283x_mu.c | 18 --
 1 file changed, 16 insertions(+), 2 deletions(-)

diff --git a/drivers/serial/serial_bcm283x_mu.c 
b/drivers/serial/serial_bcm283x_mu.c
index e361909..3884f74 100644
--- a/drivers/serial/serial_bcm283x_mu.c
+++ b/drivers/serial/serial_bcm283x_mu.c
@@ -59,7 +59,7 @@ static int bcm283x_mu_serial_setbrg(struct udevice *dev, int 
baudrate)
struct bcm283x_mu_regs *regs = priv->regs;
u32 divider;
 
-   if (plat->skip_init)
+   if (plat->disabled || plat->skip_init)
return 0;
 
divider = plat->clock / (baudrate * 8);
@@ -85,10 +85,14 @@ static int bcm283x_mu_serial_probe(struct udevice *dev)
 
 static int bcm283x_mu_serial_getc(struct udevice *dev)
 {
+   struct bcm283x_mu_serial_platdata *plat = dev_get_platdata(dev);
struct bcm283x_mu_priv *priv = dev_get_priv(dev);
struct bcm283x_mu_regs *regs = priv->regs;
u32 data;
 
+   if (plat->disabled)
+   return -EAGAIN;
+
/* Wait until there is data in the FIFO */
if (!(readl(®s->lsr) & BCM283X_MU_LSR_RX_READY))
return -EAGAIN;
@@ -100,9 +104,13 @@ static int bcm283x_mu_serial_getc(struct udevice *dev)
 
 static int bcm283x_mu_serial_putc(struct udevice *dev, const char data)
 {
+   struct bcm283x_mu_serial_platdata *plat = dev_get_platdata(dev);
struct bcm283x_mu_priv *priv = dev_get_priv(dev);
struct bcm283x_mu_regs *regs = priv->regs;
 
+   if (plat->disabled)
+   return 0;
+
/* Wait until there is space in the FIFO */
if (!(readl(®s->lsr) & BCM283X_MU_LSR_TX_EMPTY))
return -EAGAIN;
@@ -115,9 +123,15 @@ static int bcm283x_mu_serial_putc(struct udevice *dev, 
const char data)
 
 static int bcm283x_mu_serial_pending(struct udevice *dev, bool input)
 {
+   struct bcm283x_mu_serial_platdata *plat = dev_get_platdata(dev);
struct bcm283x_mu_priv *priv = dev_get_priv(dev);
struct bcm283x_mu_regs *regs = priv->regs;
-   unsigned int lsr = readl(®s->lsr);
+   unsigned int lsr;
+
+   if (plat->disabled)
+   return 0;
+
+   lsr = readl(®s->lsr);
 
if (input) {
WATCHDOG_RESET();
-- 
2.6.2

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[U-Boot] [PATCH 1/9] gpio: bcm2835: add device tree support

[Fabian Vogt]

This patch adds device tree support for the bcm2835 GPIO driver.

Signed-off-by: Fabian Vogt 
---
 doc/device-tree-bindings/gpio/bcm2835-gpio.txt |  5 +
 drivers/gpio/bcm2835_gpio.c| 24 
 2 files changed, 29 insertions(+)
 create mode 100644 doc/device-tree-bindings/gpio/bcm2835-gpio.txt

diff --git a/doc/device-tree-bindings/gpio/bcm2835-gpio.txt 
b/doc/device-tree-bindings/gpio/bcm2835-gpio.txt
new file mode 100644
index 000..21e0610
--- /dev/null
+++ b/doc/device-tree-bindings/gpio/bcm2835-gpio.txt
@@ -0,0 +1,5 @@
+* Broadcom BCM283x GPIO controller
+
+Required properties:
+- compatible: must be "brcm,bcm2835-gpio"
+- reg: exactly one register range with length 0xb4
diff --git a/drivers/gpio/bcm2835_gpio.c b/drivers/gpio/bcm2835_gpio.c
index 8dd7a28..cd5480e 100644
--- a/drivers/gpio/bcm2835_gpio.c
+++ b/drivers/gpio/bcm2835_gpio.c
@@ -10,6 +10,7 @@
 #include 
 #include 
 #include 
+#include 
 
 struct bcm2835_gpios {
struct bcm2835_gpio_regs *reg;
@@ -118,9 +119,32 @@ static int bcm2835_gpio_probe(struct udevice *dev)
return 0;
 }
 
+#if CONFIG_IS_ENABLED(OF_CONTROL)
+static const struct udevice_id bcm2835_gpio_id[] = {
+   {.compatible = "brcm,bcm2835-gpio"},
+   {}
+};
+
+static int bcm2835_gpio_ofdata_to_platdata(struct udevice *dev)
+{
+   struct bcm2835_gpio_platdata *plat = dev_get_platdata(dev);
+   fdt_addr_t addr;
+
+   addr = dev_get_addr(dev);
+   if (addr == FDT_ADDR_T_NONE)
+   return -EINVAL;
+
+   plat->base = addr;
+   return 0;
+}
+#endif
+
 U_BOOT_DRIVER(gpio_bcm2835) = {
.name   = "gpio_bcm2835",
.id = UCLASS_GPIO,
+   .of_match = of_match_ptr(bcm2835_gpio_id),
+   .ofdata_to_platdata = of_match_ptr(bcm2835_gpio_ofdata_to_platdata),
+   .platdata_auto_alloc_size = sizeof(struct bcm2835_gpio_platdata),
.ops= &gpio_bcm2835_ops,
.probe  = bcm2835_gpio_probe,
.flags  = DM_FLAG_PRE_RELOC,
-- 
2.6.2

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[U-Boot] [PATCH 9/9] ARM: bcm283x: use OF_CONTROL for bcm283x

[Fabian Vogt]

This patch removes use of U_BOOT_DEVICE in board/raspberrypi/rpi/rpi.c,
enables OF_CONTROL in the config and adjusts the rpi_*defconfig configs.

Signed-off-by: Fabian Vogt 
---
 arch/arm/Kconfig|  1 +
 board/raspberrypi/rpi/rpi.c | 37 -
 configs/rpi_2_defconfig |  2 ++
 configs/rpi_3_32b_defconfig |  2 ++
 configs/rpi_3_defconfig |  2 ++
 configs/rpi_defconfig   |  2 ++
 6 files changed, 9 insertions(+), 37 deletions(-)

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index a311215..cca6933 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -316,6 +316,7 @@ config ARCH_BCM283X
select DM
select DM_SERIAL
select DM_GPIO
+   select OF_CONTROL
 
 config TARGET_VEXPRESS_CA15_TC2
bool "Support vexpress_ca15_tc2"
diff --git a/board/raspberrypi/rpi/rpi.c b/board/raspberrypi/rpi/rpi.c
index 09bfcc6..389e056 100644
--- a/board/raspberrypi/rpi/rpi.c
+++ b/board/raspberrypi/rpi/rpi.c
@@ -17,7 +17,6 @@
 #include 
 #include 
 #include 
-#include 
 #include 
 #ifdef CONFIG_ARM64
 #include 
@@ -25,42 +24,6 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
-static const struct bcm2835_gpio_platdata gpio_platdata = {
-   .base = BCM2835_GPIO_BASE,
-};
-
-U_BOOT_DEVICE(bcm2835_gpios) = {
-   .name = "gpio_bcm2835",
-   .platdata = &gpio_platdata,
-};
-
-#ifdef CONFIG_PL01X_SERIAL
-static const struct pl01x_serial_platdata serial_platdata = {
-#ifndef CONFIG_BCM2835
-   .base = 0x3f201000,
-#else
-   .base = 0x20201000,
-#endif
-   .type = TYPE_PL011,
-   .skip_init = true,
-};
-
-U_BOOT_DEVICE(bcm2835_serials) = {
-   .name = "serial_pl01x",
-   .platdata = &serial_platdata,
-};
-#else
-static struct bcm283x_mu_serial_platdata serial_platdata = {
-   .base = 0x3f215040,
-   .clock = 25000,
-   .skip_init = true,
-};
-
-U_BOOT_DEVICE(bcm2837_serials) = {
-   .name = "serial_bcm283x_mu",
-   .platdata = &serial_platdata,
-};
-#endif
 
 struct msg_get_arm_mem {
struct bcm2835_mbox_hdr hdr;
diff --git a/configs/rpi_2_defconfig b/configs/rpi_2_defconfig
index bda4e95..3db6ff1 100644
--- a/configs/rpi_2_defconfig
+++ b/configs/rpi_2_defconfig
@@ -1,6 +1,8 @@
 CONFIG_ARM=y
 CONFIG_ARCH_BCM283X=y
 CONFIG_TARGET_RPI_2=y
+CONFIG_DEFAULT_DEVICE_TREE="bcm2836-rpi-2-b"
+CONFIG_OF_EMBED=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="U-Boot> "
diff --git a/configs/rpi_3_32b_defconfig b/configs/rpi_3_32b_defconfig
index 8e2c410..8111077 100644
--- a/configs/rpi_3_32b_defconfig
+++ b/configs/rpi_3_32b_defconfig
@@ -2,6 +2,8 @@ CONFIG_ARM=y
 CONFIG_ARCH_BCM283X=y
 CONFIG_TARGET_RPI_3_32B=y
 CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_DEFAULT_DEVICE_TREE="bcm2837-rpi-3-b"
+CONFIG_OF_EMBED=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="U-Boot> "
diff --git a/configs/rpi_3_defconfig b/configs/rpi_3_defconfig
index b7354eb..9636bf5 100644
--- a/configs/rpi_3_defconfig
+++ b/configs/rpi_3_defconfig
@@ -2,6 +2,8 @@ CONFIG_ARM=y
 CONFIG_ARCH_BCM283X=y
 CONFIG_TARGET_RPI_3=y
 CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_DEFAULT_DEVICE_TREE="bcm2837-rpi-3-b"
+CONFIG_OF_EMBED=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="U-Boot> "
diff --git a/configs/rpi_defconfig b/configs/rpi_defconfig
index ea39231..878e73c 100644
--- a/configs/rpi_defconfig
+++ b/configs/rpi_defconfig
@@ -1,6 +1,8 @@
 CONFIG_ARM=y
 CONFIG_ARCH_BCM283X=y
 CONFIG_TARGET_RPI=y
+CONFIG_DEFAULT_DEVICE_TREE="bcm2835-rpi-b"
+CONFIG_OF_EMBED=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="U-Boot> "
-- 
2.6.2

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[U-Boot] [PATCH 5/9] fdt: import bcm283x device tree sources from the linux kernel tree

[Fabian Vogt]

This patch adds device trees for the bcm283x platform to be used with
OF_CONTROL. The version 4.8-rc7 of the linux kernel was used as source.

Cc: Albert Aribaud 
Signed-off-by: Fabian Vogt 
---
 arch/arm/dts/Makefile  |   9 +
 arch/arm/dts/bcm2835-rpi-a-plus.dts|  35 
 arch/arm/dts/bcm2835-rpi-a.dts |  28 +++
 arch/arm/dts/bcm2835-rpi-b-plus.dts|  36 
 arch/arm/dts/bcm2835-rpi-b-rev2.dts|  29 +++
 arch/arm/dts/bcm2835-rpi-b.dts |  23 +++
 arch/arm/dts/bcm2835-rpi.dtsi  |  86 +
 arch/arm/dts/bcm2835.dtsi  |  25 +++
 arch/arm/dts/bcm2836-rpi-2-b.dts   |  40 
 arch/arm/dts/bcm2836.dtsi  |  78 
 arch/arm/dts/bcm2837-rpi-3-b.dts   |  30 +++
 arch/arm/dts/bcm2837.dtsi  |  76 
 arch/arm/dts/bcm283x-rpi-smsc9512.dtsi |  19 ++
 arch/arm/dts/bcm283x-rpi-smsc9514.dtsi |  19 ++
 arch/arm/dts/bcm283x.dtsi  | 321 +
 15 files changed, 854 insertions(+)
 create mode 100644 arch/arm/dts/bcm2835-rpi-a-plus.dts
 create mode 100644 arch/arm/dts/bcm2835-rpi-a.dts
 create mode 100644 arch/arm/dts/bcm2835-rpi-b-plus.dts
 create mode 100644 arch/arm/dts/bcm2835-rpi-b-rev2.dts
 create mode 100644 arch/arm/dts/bcm2835-rpi-b.dts
 create mode 100644 arch/arm/dts/bcm2835-rpi.dtsi
 create mode 100644 arch/arm/dts/bcm2835.dtsi
 create mode 100644 arch/arm/dts/bcm2836-rpi-2-b.dts
 create mode 100644 arch/arm/dts/bcm2836.dtsi
 create mode 100644 arch/arm/dts/bcm2837-rpi-3-b.dts
 create mode 100644 arch/arm/dts/bcm2837.dtsi
 create mode 100644 arch/arm/dts/bcm283x-rpi-smsc9512.dtsi
 create mode 100644 arch/arm/dts/bcm283x-rpi-smsc9514.dtsi
 create mode 100644 arch/arm/dts/bcm283x.dtsi

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 1d41d48..eafcfd4 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -283,6 +283,15 @@ dtb-$(CONFIG_SOC_KEYSTONE) += k2hk-evm.dtb \
 dtb-$(CONFIG_TARGET_SAMA5D2_XPLAINED) += \
at91-sama5d2_xplained.dtb
 
+dtb-$(CONFIG_ARCH_BCM283X) += \
+   bcm2835-rpi-a-plus.dtb \
+   bcm2835-rpi-a.dtb \
+   bcm2835-rpi-b-plus.dtb \
+   bcm2835-rpi-b-rev2.dtb \
+   bcm2835-rpi-b.dtb \
+   bcm2836-rpi-2-b.dtb \
+   bcm2837-rpi-3-b.dtb
+
 targets += $(dtb-y)
 
 # Add any required device tree compiler flags here
diff --git a/arch/arm/dts/bcm2835-rpi-a-plus.dts 
b/arch/arm/dts/bcm2835-rpi-a-plus.dts
new file mode 100644
index 000..35ff4e7
--- /dev/null
+++ b/arch/arm/dts/bcm2835-rpi-a-plus.dts
@@ -0,0 +1,35 @@
+/dts-v1/;
+#include "bcm2835.dtsi"
+#include "bcm2835-rpi.dtsi"
+
+/ {
+   compatible = "raspberrypi,model-a-plus", "brcm,bcm2835";
+   model = "Raspberry Pi Model A+";
+
+   leds {
+   act {
+   gpios = <&gpio 47 0>;
+   };
+
+   pwr {
+   label = "PWR";
+   gpios = <&gpio 35 0>;
+   default-state = "keep";
+   linux,default-trigger = "default-on";
+   };
+   };
+};
+
+&gpio {
+   pinctrl-0 = <&gpioout &alt0 &i2s_alt0 &alt3>;
+
+   /* I2S interface */
+   i2s_alt0: i2s_alt0 {
+   brcm,pins = <18 19 20 21>;
+   brcm,function = ;
+   };
+};
+
+&hdmi {
+   hpd-gpios = <&gpio 46 GPIO_ACTIVE_LOW>;
+};
diff --git a/arch/arm/dts/bcm2835-rpi-a.dts b/arch/arm/dts/bcm2835-rpi-a.dts
new file mode 100644
index 000..306a84e
--- /dev/null
+++ b/arch/arm/dts/bcm2835-rpi-a.dts
@@ -0,0 +1,28 @@
+/dts-v1/;
+#include "bcm2835.dtsi"
+#include "bcm2835-rpi.dtsi"
+
+/ {
+   compatible = "raspberrypi,model-a", "brcm,bcm2835";
+   model = "Raspberry Pi Model A";
+
+   leds {
+   act {
+   gpios = <&gpio 16 1>;
+   };
+   };
+};
+
+&gpio {
+   pinctrl-0 = <&gpioout &alt0 &i2s_alt2 &alt3>;
+
+   /* I2S interface */
+   i2s_alt2: i2s_alt2 {
+   brcm,pins = <28 29 30 31>;
+   brcm,function = ;
+   };
+};
+
+&hdmi {
+   hpd-gpios = <&gpio 46 GPIO_ACTIVE_HIGH>;
+};
diff --git a/arch/arm/dts/bcm2835-rpi-b-plus.dts 
b/arch/arm/dts/bcm2835-rpi-b-plus.dts
new file mode 100644
index 000..d5fdb8e
--- /dev/null
+++ b/arch/arm/dts/bcm2835-rpi-b-plus.dts
@@ -0,0 +1,36 @@
+/dts-v1/;
+#include "bcm2835.dtsi"
+#include "bcm2835-rpi.dtsi"
+#include "bcm283x-rpi-smsc9514.dtsi"
+
+/ {
+   compatible = "raspberrypi,model-b-plus", "brcm,bcm2835";
+   model = "Raspberry Pi Model B+";
+
+   leds {
+   act {
+   gpios = <&gpio 47 0>;
+   };
+
+   pwr {
+   label = "PWR";
+   gpios = <&gpio 35 0>;
+   default-state = "keep";
+   linux,default-trigger = "default-on";
+   };
+   };
+};
+
+&gpio {
+   pinctrl-0 = <&gpioout &alt0 &i2s_alt0 &alt3>;
+
+

Re: [U-Boot] [PATCH] dra7x: dfu: qspi: increase the qspi spl partition to 256K

[B, Ravi]

Tom

>> The SPL size for dra7x platform increased beyond 64K, increasing the 
>> size to 256K to cater for future enhancement.
>> 
>> Signed-off-by: Ravi Babu 

>Have you tested this with a larger SPL to confirm that the ROM will read more 
>than one sector?

Yes, I have tested SPL size upto 160KB, ROM is able to load to on-chip memory 
and execute.

Regards
Ravi
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Re: [U-Boot] [PATCH v2] vexpress: disable cci ace slave ports when booting in non-sec/hyp mode

[Jon Medhurst (Tixy)]

On Mon, 2016-09-26 at 13:38 +0100, Sudeep Holla wrote:
> 
> On 26/09/16 13:30, Jon Medhurst (Tixy) wrote:
> > On Fri, 2016-09-23 at 17:38 +0100, Sudeep Holla wrote:
> >> Commit f225d39d3093 ("vexpress: Check TC2 firmware support before 
> >> defaulting
> >> to nonsec booting") added support to check if the firmware on TC2  is
> >> configured appropriately before booting in nonsec/hyp mode.
> >>
> >> However when booting in non-secure/hyp mode, CCI control must be done in
> >> secure firmware and can't  be done in non-secure/hyp mode. In order to
> >> ensure that, this patch disables the cci slave port inteface so that it
> >> is not accessed at all.
> >>
> >> Cc: Jon Medhurst 
> >> Acked-by: Marc Zyngier 
> >> Signed-off-by: Sudeep Holla 
> >> ---
> >
> > Acked-by: Jon Medhurst 
> > Tested-by: Jon Medhurst 
> 
> So, can I assume the missing kernel patches to be reason for boot hang ?
> Just wanted to know if I need to investigate that any further ?

Sorry, yes they were the reason and no further investigation needed. I
remembered getting nonsec mode working some month's ago without such
patches, but I remember now that was by disabling MCPM in the kernel.

This morning I tried these U-Boot patches successfully with:
- Upstream vexpress_defconfig kernel booting with 'sec' mode
- That kernel with Lorenzo's patches in both 'sec' and 'nonsec'
- As above with CONFIG_BL_SWITCHER enabled

When booting in nonsec I also verified the device-tree modifications
made by this patch by seeing the following files existed and contained
the word 'disabled'...

/proc/device-tree/cci@2c09/slave-if@4000/status
/proc/device-tree/cci@2c09/slave-if@5000/status

-- 
Tixy

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Re: [U-Boot] [PATCH v2] vexpress: disable cci ace slave ports when booting in non-sec/hyp mode

[Sudeep Holla]

On 26/09/16 14:19, Jon Medhurst (Tixy) wrote:

On Mon, 2016-09-26 at 13:38 +0100, Sudeep Holla wrote:


On 26/09/16 13:30, Jon Medhurst (Tixy) wrote:

On Fri, 2016-09-23 at 17:38 +0100, Sudeep Holla wrote:

Commit f225d39d3093 ("vexpress: Check TC2 firmware support before defaulting
to nonsec booting") added support to check if the firmware on TC2  is
configured appropriately before booting in nonsec/hyp mode.

However when booting in non-secure/hyp mode, CCI control must be done in
secure firmware and can't  be done in non-secure/hyp mode. In order to
ensure that, this patch disables the cci slave port inteface so that it
is not accessed at all.

Cc: Jon Medhurst 
Acked-by: Marc Zyngier 
Signed-off-by: Sudeep Holla 
---


Acked-by: Jon Medhurst 
Tested-by: Jon Medhurst 


So, can I assume the missing kernel patches to be reason for boot hang ?
Just wanted to know if I need to investigate that any further ?


Sorry, yes they were the reason and no further investigation needed. I
remembered getting nonsec mode working some month's ago without such
patches, but I remember now that was by disabling MCPM in the kernel.

This morning I tried these U-Boot patches successfully with:
- Upstream vexpress_defconfig kernel booting with 'sec' mode
- That kernel with Lorenzo's patches in both 'sec' and 'nonsec'
- As above with CONFIG_BL_SWITCHER enabled

When booting in nonsec I also verified the device-tree modifications
made by this patch by seeing the following files existed and contained
the word 'disabled'...

/proc/device-tree/cci@2c09/slave-if@4000/status
/proc/device-tree/cci@2c09/slave-if@5000/status



That was very detailed :), thanks for testing and confirming. I too did
similar examination and didn't find anything odd so far.

--
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Sudeep
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Re: [U-Boot] Curses from u-boot

[Daniel.]

Hi Heiko,

This was exacly what I was searching for. I'll take a look!

Thank you for the reply and best regards,

2016-09-26 1:51 GMT-03:00 Heiko Schocher :
> Hello Daniel,
>
> Am 21.09.2016 um 15:25 schrieb Daniel.:
>>
>> Hi everybody, I was wondering what would be the difficult to run some
>> curses based menu from u-boot.
>>
>> I've been search for curses porting and found this:
>> http://frank.harvard.edu/~coldwell/ncurses/hackguide.html. The big
>> problem here is that u-boot is not a operating system.
>>
>> The motivation is simple. Would be nice to have boot options presented
>> to user as a curses menu, like grub does, wouldn't?
>>
>> The easy work arround I found here is booting to some initrd with
>> curses installed. Then use the user input to configure u-boots
>> enviroment so that the next reboot takes that configuration in
>> account. What you think? I'm not using anything like this right know
>> but I would like to do it in future...
>
>
> maybe its worth that you look into u-boot:/doc/README.menu and
> u-boot:/doc/README.bootmenu
>
> bye,
> Heiko
> --
> DENX Software Engineering GmbH,  Managing Director: Wolfgang Denk
> HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany



-- 
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  Yoda Master
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Re: [U-Boot] [PATCH] getting ubifs to run

[Hoefle Marco]

Hello Heiko and Travis,
our IT blocked the SMTP Server for relaying internally -> git send-email is not 
working anymore.
We have to use Outlook and mails get often rejected by mailing lists due to 
additional stuff Outlook appends.
So currently I can not send patches via git send-email.

Sorry,
Marco






Von: Heiko Schocher 
Gesendet: Montag, 26. September 2016 06:52
An: Travis Waters
Cc: Hoefle Marco; u-boot@lists.denx.de
Betreff: Re: [U-Boot] [PATCH] getting ubifs to run

Hello Travis,

Am 26.09.2016 um 06:43 schrieb Travis Waters:
> Thanks for the response. I went ahead and used the current patch as-is, which 
> allowed me to build.
> I haven't yet verified whether the result  is functional, though.  (We are 
> probably a couple weeks
> out from having our FLASH driver in place).  I'll let you know what we find.

Ok, thanks! A patch would be nice ;-)

bye,
Heiko
> -Travis
>
>
> On Sep 25, 2016 10:38 PM, "Heiko Schocher"  > wrote:
>
> Hello Travis,
>
> Am 21.09.2016 um 22:05 schrieb Travis Waters:
>
> Hello,
>
> I am working to enable UBIFS for use on the sparc platform and I am 
> running
> into the same linking trouble flagged in this thread:
>
> uboot/fs/ubifs/lpt_commit.c:1232: undefined reference to
> `dbg_chk_lpt_free_spc'
> uboot/fs/ubifs/lpt_commit.c:1235: undefined reference to 
> `dbg_check_ltab'
> fs/built-in.o: In function `layout_cnodes':
> uboot/fs/ubifs/lpt_commit.c:195: undefined reference to 
> `dbg_chk_lpt_sz'
> uboot/fs/ubifs/lpt_commit.c:211: undefined reference to 
> `dbg_chk_lpt_sz'
> uboot/fs/ubifs/lpt_commit.c:219: undefined reference to 
> `dbg_chk_lpt_sz'
> uboot/fs/ubifs/lpt_commit.c:233: undefined reference to 
> `dbg_chk_lpt_sz'
> uboot/fs/ubifs/lpt_commit.c:246: undefined reference to 
> `dbg_chk_lpt_sz'
> fs/built-in.o:uboot/fs/ubifs/lpt_commit.c:254: more undefined 
> references to
> `dbg_chk_lpt_sz' follow
> fs/built-in.o: In function `layout_cnodes':
> uboot/fs/ubifs/lpt_commit.c:322: undefined reference to
> `ubifs_dump_lpt_lebs'
> fs/built-in.o: In function `ubifs_add_bud_to_log':
> uboot/fs/ubifs/log.c:194: undefined reference to 
> `ubifs_commit_required'
> uboot/fs/ubifs/log.c:225: undefined reference to 
> `ubifs_request_bg_commit'
> uboot/fs/ubifs/log.c:265: undefined reference to `ubifs_write_node'
> fs/built-in.o: In function `ubifs_log_end_commit':
> uboot/fs/ubifs/log.c:479: undefined reference to `ubifs_write_master'
> fs/built-in.o: In function `do_write_orph_node':
> uboot/fs/ubifs/orphan.c:248: undefined reference to `ubifs_write_node'
>
>
> What is the status of the patch that was addressing this?
>
>
> Hmm... my last message to Marco (added to Cc) was, to split the patch
> into 2 pieces (one for the sparc fixes and one for the ubifs fixes)
>
> IIRC I saw a fix for the sparc errors, but none for ubifs ...
>
> bye,
> Heiko
> --
> DENX Software Engineering GmbH,  Managing Director: Wolfgang Denk
> HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
>

--
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HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany


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Re: [U-Boot] [PATCH] Kconfig: update FASTBOOT_FLASH_MMC_DEV

[Simon Glass]

Hi Steve,

On 27 August 2016 at 16:15, Steve Rae  wrote:
> handle FASTBOOT_FLASH_MMC_DEV default properly
>
> Signed-off-by: Steve Rae 
> ---
> I was hoping that the FASTBOOT_FLASH_MMC_DEV Kconfig option could be
> an integer (eg. 0, 1, or 2 etc.) or undefined (to signify that it
> is not being used). However, it seems that (Kconfig experts please!)
> this is not correct within Kconfig.
> Therefore, I have implemented "-1" to signify that it is not used.
> Is this the "best practice" for handling this scenario?

I think it might be better to have a bool option which
enables/disables the feature, as well as what you have here. Then you
don't need the -1 value.
>
>  cmd/fastboot/Kconfig|  4 +++-
>  common/Makefile |  4 +++-
>  drivers/usb/gadget/f_fastboot.c | 12 
>  3 files changed, 14 insertions(+), 6 deletions(-)
>
> diff --git a/cmd/fastboot/Kconfig b/cmd/fastboot/Kconfig
> index a93d1c0..fdd5475 100644
> --- a/cmd/fastboot/Kconfig
> +++ b/cmd/fastboot/Kconfig
> @@ -50,10 +50,12 @@ config FASTBOOT_FLASH
>

Regards,
Simon
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Re: [U-Boot] [PATCH 3/6] arm: efi: Add a hello world test program

[Simon Glass]

Hi Leif,

On 15 August 2016 at 06:23, Leif Lindholm  wrote:
> On Tue, Aug 09, 2016 at 10:55:31PM +0200, Alexander Graf wrote:
>>
>>
>> > Am 09.08.2016 um 20:16 schrieb Simon Glass :
>> >
>> > Hi Bin,
>> >
>> >> On 9 August 2016 at 00:50, Bin Meng  wrote:
>> >> Hi Simon,
>> >>
>> >>> On Sun, Aug 7, 2016 at 7:23 AM, Simon Glass  wrote:
>> >>> It is useful to have a basic sanity check for EFI loader support. Add a
>> >>> 'bootefi hello' command which loads HelloWord.efi and runs it under 
>> >>> U-Boot.
>> >>>
>> >>> Signed-off-by: Simon Glass 
>> >>> ---
>> >>>
>> >>> arch/arm/lib/HelloWorld32.efi  | Bin 0 -> 11712 bytes
>> >>> arch/arm/lib/Makefile  |   6 ++
>> >>> cmd/Kconfig|  10 ++
>> >>> cmd/bootefi.c  |  26 --
>> >>> include/asm-generic/sections.h |   2 ++
>> >>> scripts/Makefile.lib   |  19 +++
>> >>> 6 files changed, 57 insertions(+), 6 deletions(-)
>> >>> create mode 100644 arch/arm/lib/HelloWorld32.efi
>> >>
>> >> [snip]
>> >>
>> >>> diff --git a/arch/arm/lib/Makefile b/arch/arm/lib/Makefile
>> >>> index a8d1557..0f3ea0c 100644
>> >>> --- a/arch/arm/lib/Makefile
>> >>> +++ b/arch/arm/lib/Makefile
>> >>> @@ -29,6 +29,12 @@ obj-$(CONFIG_OF_LIBFDT) += bootm-fdt.o
>> >>> obj-$(CONFIG_CMD_BOOTM) += bootm.o
>> >>> obj-$(CONFIG_CMD_BOOTM) += zimage.o
>> >>> obj-$(CONFIG_SYS_L2_PL310) += cache-pl310.o
>> >>> +ifdef CONFIG_ARM64
>> >>> +# This option does not work for arm64, as there is no binary.
>> >>
>> >> If so, can we just remove this for arm64?
>> >
>> > Actually I was hoping that Alexander might have a suitable arm64
>> > HelloWorld.efi lying around. When I tried building UEFI for arm64, for
>> > some reason it did not create it.
>>
>> Is it part of edk2? If so, Leif (CC'ed) might have one :). I usually
>> use grub as my hello world application.
>
> There is a hello world application in EDK2, but it does not get built
> as part of a normal platform build.
> Currently it also fails to build for ARM* on its own :|
> See
> http://patchew.org/EDK2/1471021908-3509-1-git-send-email-leif.lindholm%40linaro.org/
> for a hack of how to build one before upstream is resolved.
>
> If cross compiling, prepend GCC5_AARCH64_PREFIX=aarch64-linux-gnu- to
> build command line.

Thanks for the pointer. Unfortunately that patch appears to make no
differences for me. Are you able to build and send me a 64-bit
HelloWorld.efi please?

>
> /
> Leif

Regards,
Simon
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[U-Boot] [PATCH 1/9] patman: Replace tabs with spaces

[Paul Burton]

In preparation for running on python 3.x, which will refuse to run
scripts which mix tabs & spaces for indentation, replace 2 tab
characters present in series.py with spaces.

Signed-off-by: Paul Burton 
---

 tools/patman/series.py | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/tools/patman/series.py b/tools/patman/series.py
index cc6f80b..1ce30c6 100644
--- a/tools/patman/series.py
+++ b/tools/patman/series.py
@@ -225,7 +225,7 @@ class Series(dict):
raise_on_error=raise_on_error)
 list += gitutil.BuildEmailList(commit.cc_list,
raise_on_error=raise_on_error)
-   if add_maintainers:
+if add_maintainers:
 list += get_maintainer.GetMaintainer(commit.patch)
 all_ccs += list
 print >>fd, commit.patch, ', '.join(set(list))
@@ -259,7 +259,7 @@ class Series(dict):
 """
 git_prefix = gitutil.GetDefaultSubjectPrefix()
 if git_prefix:
-   git_prefix = '%s][' % git_prefix
+git_prefix = '%s][' % git_prefix
 else:
 git_prefix = ''
 
-- 
2.10.0

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[U-Boot] [PATCH 3/9] patman: Make exception handling python 3.x safe

[Paul Burton]

Syntax for exception handling is a little more strict in python 3.x.
Convert all uses to a form accepted by both python 2.x & python 3.x.

Signed-off-by: Paul Burton 
---

 tools/patman/command.py |  2 +-
 tools/patman/cros_subprocess.py |  2 +-
 tools/patman/gitutil.py | 12 ++--
 3 files changed, 8 insertions(+), 8 deletions(-)

diff --git a/tools/patman/command.py b/tools/patman/command.py
index d1f0ca5..bebc495 100644
--- a/tools/patman/command.py
+++ b/tools/patman/command.py
@@ -85,7 +85,7 @@ def RunPipe(pipe_list, infile=None, outfile=None,
 
 try:
 last_pipe = cros_subprocess.Popen(cmd, cwd=cwd, **kwargs)
-except Exception, err:
+except Exception as err:
 result.exception = err
 if raise_on_error:
 raise Exception("Error running '%s': %s" % (user_pipestr, str))
diff --git a/tools/patman/cros_subprocess.py b/tools/patman/cros_subprocess.py
index 0fc4a06..ebd4300 100644
--- a/tools/patman/cros_subprocess.py
+++ b/tools/patman/cros_subprocess.py
@@ -166,7 +166,7 @@ class Popen(subprocess.Popen):
 while read_set or write_set:
 try:
 rlist, wlist, _ = select.select(read_set, write_set, [], 0.2)
-except select.error, e:
+except select.error as e:
 if e.args[0] == errno.EINTR:
 continue
 raise
diff --git a/tools/patman/gitutil.py b/tools/patman/gitutil.py
index c0fe093..0d23079 100644
--- a/tools/patman/gitutil.py
+++ b/tools/patman/gitutil.py
@@ -139,7 +139,7 @@ def GetUpstream(git_dir, branch):
 leaf = merge.split('/')[-1]
 return '%s/%s' % (remote, leaf), None
 else:
-raise ValueError, ("Cannot determine upstream branch for branch "
+raise ValueError("Cannot determine upstream branch for branch "
 "'%s' remote='%s', merge='%s'" % (branch, remote, merge))
 
 
@@ -224,7 +224,7 @@ def Checkout(commit_hash, git_dir=None, work_tree=None, 
force=False):
 result = command.RunPipe([pipe], capture=True, raise_on_error=False,
  capture_stderr=True)
 if result.return_code != 0:
-raise OSError, 'git checkout (%s): %s' % (pipe, result.stderr)
+raise OSError('git checkout (%s): %s' % (pipe, result.stderr))
 
 def Clone(git_dir, output_dir):
 """Checkout the selected commit for this build
@@ -236,7 +236,7 @@ def Clone(git_dir, output_dir):
 result = command.RunPipe([pipe], capture=True, cwd=output_dir,
  capture_stderr=True)
 if result.return_code != 0:
-raise OSError, 'git clone: %s' % result.stderr
+raise OSError('git clone: %s' % result.stderr)
 
 def Fetch(git_dir=None, work_tree=None):
 """Fetch from the origin repo
@@ -252,7 +252,7 @@ def Fetch(git_dir=None, work_tree=None):
 pipe.append('fetch')
 result = command.RunPipe([pipe], capture=True, capture_stderr=True)
 if result.return_code != 0:
-raise OSError, 'git fetch: %s' % result.stderr
+raise OSError('git fetch: %s' % result.stderr)
 
 def CreatePatches(start, count, series):
 """Create a series of patches from the top of the current branch.
@@ -489,7 +489,7 @@ def LookupEmail(lookup_name, alias=None, 
raise_on_error=True, level=0):
 if level > 10:
 msg = "Recursive email alias at '%s'" % lookup_name
 if raise_on_error:
-raise OSError, msg
+raise OSError(msg)
 else:
 print(col.Color(col.RED, msg))
 return out_list
@@ -498,7 +498,7 @@ def LookupEmail(lookup_name, alias=None, 
raise_on_error=True, level=0):
 if not lookup_name in alias:
 msg = "Alias '%s' not found" % lookup_name
 if raise_on_error:
-raise ValueError, msg
+raise ValueError(msg)
 else:
 print(col.Color(col.RED, msg))
 return out_list
-- 
2.10.0

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[U-Boot] [PATCH 4/9] patman: Import 'configparser' lower case to be python 3.x safe

[Paul Burton]

In python 3.x module names used in import statements are case sensitive,
and the configparser module is named in all lower-case. Import it as such
in order to avoid errors when running with python 3.x.

Signed-off-by: Paul Burton 
---

 tools/patman/settings.py | 6 +-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/tools/patman/settings.py b/tools/patman/settings.py
index 01f6c38..3caf379 100644
--- a/tools/patman/settings.py
+++ b/tools/patman/settings.py
@@ -5,7 +5,11 @@
 
 from __future__ import print_function
 
-import ConfigParser
+try:
+import configparser as ConfigParser
+except:
+import ConfigParser
+
 import os
 import re
 
-- 
2.10.0

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[U-Boot] [PATCH 5/9] patman: Decode stdout/stderr as utf8, be python 3.x safe

[Paul Burton]

In python 3.x reading stdout or stdin will produce a bytestring rather
than a string. Decode it in CommunicateFilter such that the rest of the
code can continue to deal with strings. This works fine with python 2.x
too.

Signed-off-by: Paul Burton 
---

 tools/patman/cros_subprocess.py | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/tools/patman/cros_subprocess.py b/tools/patman/cros_subprocess.py
index ebd4300..922e560 100644
--- a/tools/patman/cros_subprocess.py
+++ b/tools/patman/cros_subprocess.py
@@ -189,7 +189,7 @@ class Popen(subprocess.Popen):
 data = ""
 # We will get an error on read if the pty is closed
 try:
-data = os.read(self.stdout.fileno(), 1024)
+data = os.read(self.stdout.fileno(), 1024).decode('utf8')
 except OSError:
 pass
 if data == "":
@@ -204,7 +204,7 @@ class Popen(subprocess.Popen):
 data = ""
 # We will get an error on read if the pty is closed
 try:
-data = os.read(self.stderr.fileno(), 1024)
+data = os.read(self.stderr.fileno(), 1024).decode('utf8')
 except OSError:
 pass
 if data == "":
-- 
2.10.0

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[U-Boot] [PATCH 6/9] patman: Use items() to iterate over dictionaries in python 3.x

[Paul Burton]

In python 3.x the iteritems() method has been removed from dictionaries,
and the items() method does effectively the same thing. Convert the code
to attempt to use iteritems() to be efficient on python 2.x, but use
items() when that fails on python 3.x.

Signed-off-by: Paul Burton 
---

 tools/patman/settings.py | 6 +-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/tools/patman/settings.py b/tools/patman/settings.py
index 3caf379..8b10630 100644
--- a/tools/patman/settings.py
+++ b/tools/patman/settings.py
@@ -94,7 +94,11 @@ class _ProjectConfigParser(ConfigParser.SafeConfigParser):
 if not self.has_section(project_settings):
 self.add_section(project_settings)
 project_defaults = _default_settings.get(project_name, {})
-for setting_name, setting_value in project_defaults.iteritems():
+try:
+iterator = project_defaults.iteritems()
+except:
+iterator = project_defaults.items()
+for setting_name, setting_value in iterator:
 self.set(project_settings, setting_name, setting_value)
 
 def get(self, section, option, *args, **kwargs):
-- 
2.10.0

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[U-Boot] [PATCH 7/9] dtoc: Use items() to iterate over dictionaries in python 3.x

[Paul Burton]

In python 3.x the iteritems() method has been removed from dictionaries,
and the items() method does effectively the same thing. Convert the code
to attempt to use iteritems() to be efficient on python 2.x, but use
items() when that fails on python 3.x.

Signed-off-by: Paul Burton 
---

 tools/dtoc/dtoc.py | 24 
 tools/dtoc/fdt_fallback.py |  8 +++-
 2 files changed, 27 insertions(+), 5 deletions(-)

diff --git a/tools/dtoc/dtoc.py b/tools/dtoc/dtoc.py
index 518aa51..4ba8604 100755
--- a/tools/dtoc/dtoc.py
+++ b/tools/dtoc/dtoc.py
@@ -224,14 +224,22 @@ class DtbPlatdata:
 fields = {}
 
 # Get a list of all the valid properties in this node.
-for name, prop in node.props.iteritems():
+try:
+iterator = node.props.iteritems()
+except:
+iterator = node.props.items()
+for name, prop in iterator:
 if name not in PROP_IGNORE_LIST and name[0] != '#':
 fields[name] = copy.deepcopy(prop)
 
 # If we've seen this node_name before, update the existing struct.
 if node_name in structs:
 struct = structs[node_name]
-for name, prop in fields.iteritems():
+try:
+iterator = fields.iteritems()
+except:
+iterator = fields.items()
+for name, prop in iterator:
 oldprop = struct.get(name)
 if oldprop:
 oldprop.Widen(prop)
@@ -246,7 +254,11 @@ class DtbPlatdata:
 for node in self._valid_nodes:
 node_name = self.GetCompatName(node)
 struct = structs[node_name]
-for name, prop in node.props.iteritems():
+try:
+iterator = node.props.iteritems()
+except:
+iterator = node.props.items()
+for name, prop in iterator:
 if name not in PROP_IGNORE_LIST and name[0] != '#':
 prop.Widen(struct[name])
 upto += 1
@@ -298,7 +310,11 @@ class DtbPlatdata:
 var_name = Conv_name_to_c(node.name)
 self.Buf('static struct %s%s %s%s = {\n' %
 (STRUCT_PREFIX, struct_name, VAL_PREFIX, var_name))
-for pname, prop in node.props.iteritems():
+try:
+iterator = node.props.iteritems()
+except:
+iterator = node.props.items()
+for pname, prop in iterator:
 if pname in PROP_IGNORE_LIST or pname[0] == '#':
 continue
 ptype = TYPE_NAMES[prop.type]
diff --git a/tools/dtoc/fdt_fallback.py b/tools/dtoc/fdt_fallback.py
index 0c0ebbc..498cb66 100644
--- a/tools/dtoc/fdt_fallback.py
+++ b/tools/dtoc/fdt_fallback.py
@@ -58,7 +58,13 @@ class Node(NodeBase):
 This fills in the props and subnodes properties, recursively
 searching into subnodes so that the entire tree is built.
 """
-for name, byte_list_str in self._fdt.GetProps(self.path).iteritems():
+props = self._fdt.GetProps(self.path)
+try:
+iterator = props.iteritems()
+except:
+iterator = props.items()
+
+for name, byte_list_str in iterator:
 prop = Prop(self, name, byte_list_str)
 self.props[name] = prop
 
-- 
2.10.0

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[U-Boot] [PATCH 8/9] dtoc: Decode strings for struct.unpack on python 3.x

[Paul Burton]

On python 3.x struct.unpack will complain if we provide it with a
string since it expects to operate on a bytes object. In order to
satisfy this requirement, encode the string to a bytes object when
running on python 3.x.

Signed-off-by: Paul Burton 
---

 tools/dtoc/fdt_util.py | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/tools/dtoc/fdt_util.py b/tools/dtoc/fdt_util.py
index 3a10838..e6d523b 100644
--- a/tools/dtoc/fdt_util.py
+++ b/tools/dtoc/fdt_util.py
@@ -8,6 +8,7 @@
 
 import os
 import struct
+import sys
 import tempfile
 
 import command
@@ -22,6 +23,8 @@ def fdt32_to_cpu(val):
 Return:
 A native-endian integer value
 """
+if sys.version_info > (3, 0):
+val = val.encode('raw_unicode_escape')
 return struct.unpack('>I', val)[0]
 
 def EnsureCompiled(fname):
-- 
2.10.0

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[U-Boot] [PATCH 9/9] dtoc: Make integer division python 3.x safe

[Paul Burton]

If we use the '/' operator then python 3.x will produce a float, and
refuse to multiply the string sequence in Conv_name_to_c by it with:

TypeError: can't multiply sequence by non-int of type 'float'

Use the '//' operator instead to enforce that we want integer rather
than floating point division.

Signed-off-by: Paul Burton 

---

 tools/dtoc/dtoc.py | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/tools/dtoc/dtoc.py b/tools/dtoc/dtoc.py
index 4ba8604..ac7ba6c 100755
--- a/tools/dtoc/dtoc.py
+++ b/tools/dtoc/dtoc.py
@@ -60,7 +60,7 @@ def Conv_name_to_c(name):
 def TabTo(num_tabs, str):
 if len(str) >= num_tabs * 8:
 return str + ' '
-return str + '\t' * (num_tabs - len(str) / 8)
+return str + '\t' * (num_tabs - len(str) // 8)
 
 class DtbPlatdata:
 """Provide a means to convert device tree binary data to platform data
-- 
2.10.0

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[U-Boot] [PATCH 0/9] Python 3.x support for patman & dtoc

[Paul Burton]

This series makes patman & dtoc run on python 3.x, which allows them to
work without hacks on distributions where the python binary is python
3.x. All changes are made in a way that continue to work on python 2.x,
so both tools should work on either major version of python.


Paul Burton (9):
  patman: Replace tabs with spaces
  patman: Make print statements python 3.x safe
  patman: Make exception handling python 3.x safe
  patman: Import 'configparser' lower case to be  python 3.x safe
  patman: Decode stdout/stderr as utf8, be python 3.x safe
  patman: Use items() to iterate over dictionaries in python 3.x
  dtoc: Use items() to iterate over dictionaries in python 3.x
  dtoc: Decode strings for struct.unpack on python 3.x
  dtoc: Make integer division python 3.x safe

 tools/dtoc/dtoc.py  | 26 -
 tools/dtoc/fdt_fallback.py  |  8 +++-
 tools/dtoc/fdt_util.py  |  3 +++
 tools/patman/checkpatch.py  | 16 
 tools/patman/command.py |  2 +-
 tools/patman/cros_subprocess.py |  6 +++---
 tools/patman/get_maintainer.py  |  2 +-
 tools/patman/gitutil.py | 18 +-
 tools/patman/patchstream.py |  6 +++---
 tools/patman/patman.py  | 12 ++--
 tools/patman/series.py  | 42 +
 tools/patman/settings.py| 28 ++-
 tools/patman/terminal.py| 12 +++-
 tools/patman/test.py|  2 +-
 14 files changed, 111 insertions(+), 72 deletions(-)

-- 
2.10.0

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[U-Boot] [PATCH 2/9] patman: Make print statements python 3.x safe

[Paul Burton]

In python 3.x, print must be used as a function call. Convert all print
statements to the function call style, importing from __future__ where
we print with no trailing newline or print to a file object.

Signed-off-by: Paul Burton 
---

 tools/patman/checkpatch.py | 16 
 tools/patman/get_maintainer.py |  2 +-
 tools/patman/gitutil.py|  6 +++---
 tools/patman/patchstream.py|  6 +++---
 tools/patman/patman.py | 12 ++--
 tools/patman/series.py | 38 --
 tools/patman/settings.py   | 16 +---
 tools/patman/terminal.py   | 12 +++-
 tools/patman/test.py   |  2 +-
 9 files changed, 58 insertions(+), 52 deletions(-)

diff --git a/tools/patman/checkpatch.py b/tools/patman/checkpatch.py
index 3eef6de..be78fc5 100644
--- a/tools/patman/checkpatch.py
+++ b/tools/patman/checkpatch.py
@@ -83,7 +83,7 @@ def CheckPatch(fname, verbose=False):
 
 for line in result.stdout.splitlines():
 if verbose:
-print line
+print(line)
 
 # A blank line indicates the end of a message
 if not line and item:
@@ -151,17 +151,17 @@ def CheckPatches(verbose, args):
 error_count += result.errors
 warning_count += result.warnings
 check_count += result.checks
-print '%d errors, %d warnings, %d checks for %s:' % (result.errors,
-result.warnings, result.checks, col.Color(col.BLUE, fname))
+print('%d errors, %d warnings, %d checks for %s:' % (result.errors,
+result.warnings, result.checks, col.Color(col.BLUE, 
fname)))
 if (len(result.problems) != result.errors + result.warnings +
 result.checks):
-print "Internal error: some problems lost"
+print("Internal error: some problems lost")
 for item in result.problems:
-print GetWarningMsg(col, item.get('type', ''),
+print(GetWarningMsg(col, item.get('type', ''),
 item.get('file', ''),
-item.get('line', 0), item.get('msg', 'message'))
+item.get('line', 0), item.get('msg', 'message')))
 print
-#print stdout
+#print(stdout)
 if error_count or warning_count or check_count:
 str = 'checkpatch.pl found %d error(s), %d warning(s), %d checks(s)'
 color = col.GREEN
@@ -169,6 +169,6 @@ def CheckPatches(verbose, args):
 color = col.YELLOW
 if error_count:
 color = col.RED
-print col.Color(color, str % (error_count, warning_count, check_count))
+print(col.Color(color, str % (error_count, warning_count, 
check_count)))
 return False
 return True
diff --git a/tools/patman/get_maintainer.py b/tools/patman/get_maintainer.py
index 00b4939..2deb5db 100644
--- a/tools/patman/get_maintainer.py
+++ b/tools/patman/get_maintainer.py
@@ -40,7 +40,7 @@ def GetMaintainer(fname, verbose=False):
 get_maintainer = FindGetMaintainer()
 if not get_maintainer:
 if verbose:
-print "WARNING: Couldn't find get_maintainer.pl"
+print("WARNING: Couldn't find get_maintainer.pl")
 return []
 
 stdout = command.Output(get_maintainer, '--norolestats', fname)
diff --git a/tools/patman/gitutil.py b/tools/patman/gitutil.py
index bb7c9e0..c0fe093 100644
--- a/tools/patman/gitutil.py
+++ b/tools/patman/gitutil.py
@@ -491,7 +491,7 @@ def LookupEmail(lookup_name, alias=None, 
raise_on_error=True, level=0):
 if raise_on_error:
 raise OSError, msg
 else:
-print col.Color(col.RED, msg)
+print(col.Color(col.RED, msg))
 return out_list
 
 if lookup_name:
@@ -500,7 +500,7 @@ def LookupEmail(lookup_name, alias=None, 
raise_on_error=True, level=0):
 if raise_on_error:
 raise ValueError, msg
 else:
-print col.Color(col.RED, msg)
+print(col.Color(col.RED, msg))
 return out_list
 for item in alias[lookup_name]:
 todo = LookupEmail(item, alias, raise_on_error, level + 1)
@@ -508,7 +508,7 @@ def LookupEmail(lookup_name, alias=None, 
raise_on_error=True, level=0):
 if not new_item in out_list:
 out_list.append(new_item)
 
-#print "No match for alias '%s'" % lookup_name
+#print("No match for alias '%s'" % lookup_name)
 return out_list
 
 def GetTopLevel():
diff --git a/tools/patman/patchstream.py b/tools/patman/patchstream.py
index 69d5cfb..cd4667f 100644
--- a/tools/patman/patchstream.py
+++ b/tools/patman/patchstream.py
@@ -480,12 +480,12 @@ def FixPatches(series, fnames):
 commit.patch = fname
 result = FixPatch(backup_dir, fname, series, commit)
 if result:
-print '%d warnings for %s:' % (l

[U-Boot] [PATCH 5/7] armv8: ls1046ardb_emmc: Fix a typo in defconfig

[York Sun]

It should be EMMC_BOOT instead of CONFIG_EMMC_BOOT.

Signed-off-by: York Sun 
CC: Gong Qianyu 
Reviewed-by: Tom Rini 
---

Changes in v2: None

 configs/ls1046ardb_emmc_defconfig | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/configs/ls1046ardb_emmc_defconfig 
b/configs/ls1046ardb_emmc_defconfig
index 2daddf4..a1ee1ab 100644
--- a/configs/ls1046ardb_emmc_defconfig
+++ b/configs/ls1046ardb_emmc_defconfig
@@ -6,7 +6,7 @@ CONFIG_SPL=y
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
-CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,SYS_FSL_DDR4,CONFIG_EMMC_BOOT"
+CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,SYS_FSL_DDR4,EMMC_BOOT"
 CONFIG_SD_BOOT=y
 CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
-- 
2.7.4

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[U-Boot] [Patch 0/7] Resolve conflict for merging

[York Sun]

This is v2 patch to resolve merge conflict. Once merged, the ad-hoc
config error should not appear. Since v1, another 3 macros are
fixed.

[PATCH 1/7] armv8: ls1046a: Convert CONFIG_LS1046A to Kconfig option
[PATCH 2/7] driver: ddr: fsl_mmdc: Pass board parameters through data
[PATCH 3/7] armv8: ls1012a: Convert CONFIG_LS1012A to Kconfig option
[PATCH 4/7] Convert CONFIG_SYS_FSL_ERRATUM_A010315 to Kconfig option
[PATCH 5/7] armv8: ls1046ardb_emmc: Fix a typo in defconfig
[PATCH 6/7] armv7: ls1021a: Convert CONFIG_LS1_DEEP_SLEEP to Kconfig
[PATCH 7/7] armv7: ls102xa: Rename GIC_ADDR and DCSR_RCPM_ADDR
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[U-Boot] [PATCH 2/7] driver: ddr: fsl_mmdc: Pass board parameters through data structure

[York Sun]

Instead of using multiple macros, a data structure is used to pass
board-specific parameters to MMDC DDR driver.

Signed-off-by: York Sun 
CC: Shengzhou Liu 
Reviewed-by: Tom Rini 
---

Changes in v2: None

 board/freescale/ls1012afrdm/ls1012afrdm.c | 18 ++-
 board/freescale/ls1012aqds/ls1012aqds.c   | 18 ++-
 board/freescale/ls1012ardb/ls1012ardb.c   | 18 ++-
 drivers/ddr/fsl/fsl_mmdc.c| 38 +++
 include/configs/ls1012afrdm.h | 16 -
 include/configs/ls1012aqds.h  | 16 -
 include/configs/ls1012ardb.h  | 15 
 include/fsl_mmdc.h| 21 +
 8 files changed, 87 insertions(+), 73 deletions(-)

diff --git a/board/freescale/ls1012afrdm/ls1012afrdm.c 
b/board/freescale/ls1012afrdm/ls1012afrdm.c
index d644e94..b03bdb8 100644
--- a/board/freescale/ls1012afrdm/ls1012afrdm.c
+++ b/board/freescale/ls1012afrdm/ls1012afrdm.c
@@ -26,7 +26,23 @@ int checkboard(void)
 
 int dram_init(void)
 {
-   mmdc_init();
+   static const struct fsl_mmdc_info mparam = {
+   0x0418, /* mdctl */
+   0x00030035, /* mdpdc */
+   0x12554000, /* mdotc */
+   0xbabf7954, /* mdcfg0 */
+   0xdb328f64, /* mdcfg1 */
+   0x01ff00db, /* mdcfg2 */
+   0x1680, /* mdmisc */
+   0x0f3c8000, /* mdref */
+   0x2000, /* mdrwd */
+   0x00bf1023, /* mdor */
+   0x003f, /* mdasp */
+   0x022a, /* mpodtctrl */
+   0xa1390003, /* mpzqhwctrl */
+   };
+
+   mmdc_init(&mparam);
 
gd->ram_size = CONFIG_SYS_SDRAM_SIZE;
 
diff --git a/board/freescale/ls1012aqds/ls1012aqds.c 
b/board/freescale/ls1012aqds/ls1012aqds.c
index 188b6bc..94440b3 100644
--- a/board/freescale/ls1012aqds/ls1012aqds.c
+++ b/board/freescale/ls1012aqds/ls1012aqds.c
@@ -54,7 +54,23 @@ int checkboard(void)
 
 int dram_init(void)
 {
-   mmdc_init();
+   static const struct fsl_mmdc_info mparam = {
+   0x0518, /* mdctl */
+   0x00030035, /* mdpdc */
+   0x12554000, /* mdotc */
+   0xbabf7954, /* mdcfg0 */
+   0xdb328f64, /* mdcfg1 */
+   0x01ff00db, /* mdcfg2 */
+   0x1680, /* mdmisc */
+   0x0f3c8000, /* mdref */
+   0x2000, /* mdrwd */
+   0x00bf1023, /* mdor */
+   0x003f, /* mdasp */
+   0x022a, /* mpodtctrl */
+   0xa1390003, /* mpzqhwctrl */
+   };
+
+   mmdc_init(&mparam);
 
gd->ram_size = CONFIG_SYS_SDRAM_SIZE;
 
diff --git a/board/freescale/ls1012ardb/ls1012ardb.c 
b/board/freescale/ls1012ardb/ls1012ardb.c
index 50f9187..778434d 100644
--- a/board/freescale/ls1012ardb/ls1012ardb.c
+++ b/board/freescale/ls1012ardb/ls1012ardb.c
@@ -58,7 +58,23 @@ int checkboard(void)
 
 int dram_init(void)
 {
-   mmdc_init();
+   static const struct fsl_mmdc_info mparam = {
+   0x0518, /* mdctl */
+   0x00030035, /* mdpdc */
+   0x12554000, /* mdotc */
+   0xbabf7954, /* mdcfg0 */
+   0xdb328f64, /* mdcfg1 */
+   0x01ff00db, /* mdcfg2 */
+   0x1680, /* mdmisc */
+   0x0f3c8000, /* mdref */
+   0x2000, /* mdrwd */
+   0x00bf1023, /* mdor */
+   0x003f, /* mdasp */
+   0x022a, /* mpodtctrl */
+   0xa1390003, /* mpzqhwctrl */
+   };
+
+   mmdc_init(&mparam);
 
gd->ram_size = CONFIG_SYS_SDRAM_SIZE;
 
diff --git a/drivers/ddr/fsl/fsl_mmdc.c b/drivers/ddr/fsl/fsl_mmdc.c
index 1e35967..52eec0f 100644
--- a/drivers/ddr/fsl/fsl_mmdc.c
+++ b/drivers/ddr/fsl/fsl_mmdc.c
@@ -26,7 +26,7 @@ static void set_wait_for_bits_clear(void *ptr, u32 value, u32 
bits)
printf("Error: %p wait for clear timeout.\n", ptr);
 }
 
-void mmdc_init(void)
+void mmdc_init(const struct fsl_mmdc_info *priv)
 {
struct mmdc_regs *mmdc = (struct mmdc_regs *)CONFIG_SYS_FSL_DDR_ADDR;
unsigned int tmp;
@@ -35,26 +35,26 @@ void mmdc_init(void)
out_be32(&mmdc->mdscr, MDSCR_ENABLE_CON_REQ);
 
/* 2. configure the desired timing parameters */
-   out_be32(&mmdc->mdotc,  CONFIG_MMDC_MDOTC);
-   out_be32(&mmdc->mdcfg0, CONFIG_MMDC_MDCFG0);
-   out_be32(&mmdc->mdcfg1, CONFIG_MMDC_MDCFG1);
-   out_be32(&mmdc->mdcfg2, CONFIG_MMDC_MDCFG2);
+   out_be32(&mmdc->mdotc, priv->mdotc);
+   out_be32(&mmdc->mdcfg0, priv->mdcfg0);
+   out_be32(&mmdc->mdcfg1, priv->mdcfg1);
+   out_be32(&mmdc->mdcfg2, priv->mdcfg2);
 
/* 3. configure DDR type and other miscellan

[U-Boot] [PATCH 7/7] armv7: ls102xa: Rename GIC_ADDR and DCSR_RCPM_ADDR

[York Sun]

Instead of using CONFIG_* name space, rename these two macros to
SYS_FSL_* space.

Signed-off-by: York Sun 
CC: Hongbo Zhang 
---

Changes in v2: New patch

 arch/arm/cpu/armv7/ls102xa/ls102xa_psci.c  | 4 ++--
 arch/arm/include/asm/arch-ls102xa/config.h | 4 ++--
 2 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/arch/arm/cpu/armv7/ls102xa/ls102xa_psci.c 
b/arch/arm/cpu/armv7/ls102xa/ls102xa_psci.c
index 2ac2e6c..1cbe93c 100644
--- a/arch/arm/cpu/armv7/ls102xa/ls102xa_psci.c
+++ b/arch/arm/cpu/armv7/ls102xa/ls102xa_psci.c
@@ -43,7 +43,7 @@ static void __secure ls1_save_ddr_head(void)
 static void __secure ls1_fsm_setup(void)
 {
void *dcsr_epu_base = (void *)(CONFIG_SYS_DCSRBAR + EPU_BLOCK_OFFSET);
-   void *dcsr_rcpm_base = (void *)CONFIG_SYS_DCSR_RCPM_ADDR;
+   void *dcsr_rcpm_base = (void *)SYS_FSL_DCSR_RCPM_ADDR;
 
out_be32(dcsr_rcpm_base + DCSR_RCPM_CSTTACR0, 0x1001);
out_be32(dcsr_rcpm_base + DCSR_RCPM_CG1CR0, 0x0001);
@@ -112,7 +112,7 @@ static void __secure ls1_delay(unsigned int loop)
 static void __secure ls1_start_fsm(void)
 {
void *dcsr_epu_base = (void *)(CONFIG_SYS_DCSRBAR + EPU_BLOCK_OFFSET);
-   void *ccsr_gic_base = (void *)CONFIG_SYS_GIC_ADDR;
+   void *ccsr_gic_base = (void *)SYS_FSL_GIC_ADDR;
struct ccsr_scfg __iomem *scfg = (void *)CONFIG_SYS_FSL_SCFG_ADDR;
struct ccsr_ddr __iomem *ddr = (void *)CONFIG_SYS_FSL_DDR_ADDR;
 
diff --git a/arch/arm/include/asm/arch-ls102xa/config.h 
b/arch/arm/include/asm/arch-ls102xa/config.h
index 46de784..fab8774 100644
--- a/arch/arm/include/asm/arch-ls102xa/config.h
+++ b/arch/arm/include/asm/arch-ls102xa/config.h
@@ -16,9 +16,9 @@
 #define CONFIG_SYS_DCSRBAR 0x2000
 
 #define CONFIG_SYS_DCSR_DCFG_ADDR  (CONFIG_SYS_DCSRBAR + 0x0022)
-#define CONFIG_SYS_DCSR_RCPM_ADDR  (CONFIG_SYS_DCSRBAR + 0x00222000)
+#define SYS_FSL_DCSR_RCPM_ADDR (CONFIG_SYS_DCSRBAR + 0x00222000)
 
-#define CONFIG_SYS_GIC_ADDR(CONFIG_SYS_IMMR + 0x0040)
+#define SYS_FSL_GIC_ADDR   (CONFIG_SYS_IMMR + 0x0040)
 #define CONFIG_SYS_FSL_DDR_ADDR(CONFIG_SYS_IMMR + 
0x0008)
 #define CONFIG_SYS_CCI400_ADDR (CONFIG_SYS_IMMR + 0x0018)
 #define CONFIG_SYS_FSL_CSU_ADDR (CONFIG_SYS_IMMR + 0x0051)
-- 
2.7.4

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[U-Boot] [PATCH 3/7] armv8: ls1012a: Convert CONFIG_LS1012A to Kconfig option ARCH_LS1021A

[York Sun]

Move this config to Kconfig option and clean up existing uses.

Signed-off-by: York Sun 
CC: Calvin Johnson 
CC: Prabhakar Kushwaha 
Reviewed-by: Tom Rini 
---

Changes in v2: None

 arch/arm/Kconfig   | 3 +++
 arch/arm/cpu/armv8/fsl-layerscape/Kconfig  | 7 +++
 arch/arm/cpu/armv8/fsl-layerscape/Makefile | 2 +-
 arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_speed.c| 4 ++--
 arch/arm/include/asm/arch-fsl-layerscape/config.h  | 6 ++
 arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h | 2 +-
 include/configs/ls1012a_common.h   | 1 -
 include/linux/usb/xhci-fsl.h   | 2 +-
 8 files changed, 17 insertions(+), 10 deletions(-)

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index aed89c9..c974db4 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -788,6 +788,7 @@ config TARGET_HIKEY
 
 config TARGET_LS1012AQDS
bool "Support ls1012aqds"
+   select ARCH_LS1012A
select ARM64
help
  Support for Freescale LS1012AQDS platform.
@@ -797,6 +798,7 @@ config TARGET_LS1012AQDS
 
 config TARGET_LS1012ARDB
bool "Support ls1012ardb"
+   select ARCH_LS1012A
select ARM64
help
  Support for Freescale LS1012ARDB platform.
@@ -806,6 +808,7 @@ config TARGET_LS1012ARDB
 
 config TARGET_LS1012AFRDM
bool "Support ls1012afrdm"
+   select ARCH_LS1012A
select ARM64
help
  Support for Freescale LS1012AFRDM platform.
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig 
b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
index c234eff..a823d39 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
+++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
@@ -1,2 +1,9 @@
+config ARCH_LS1012A
+   bool "Freescale Layerscape LS1012A SoC"
+   select SYS_FSL_MMDC
+
 config ARCH_LS1046A
bool "Freescale Layerscape LS1046A SoC"
+
+config SYS_FSL_MMDC
+   bool "Freescale Multi Mode DDR Controller"
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Makefile 
b/arch/arm/cpu/armv8/fsl-layerscape/Makefile
index f9590af..51c1cee 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/Makefile
+++ b/arch/arm/cpu/armv8/fsl-layerscape/Makefile
@@ -30,7 +30,7 @@ ifneq ($(CONFIG_LS1043A),)
 obj-$(CONFIG_SYS_HAS_SERDES) += ls1043a_serdes.o
 endif
 
-ifneq ($(CONFIG_LS1012A),)
+ifneq ($(CONFIG_ARCH_LS1012A),)
 obj-$(CONFIG_SYS_HAS_SERDES) += ls1012a_serdes.o
 endif
 
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_speed.c 
b/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_speed.c
index 8922197..55005f0 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_speed.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_speed.c
@@ -60,7 +60,7 @@ void get_sys_info(struct sys_info *sys_info)
sys_info->freq_ddrbus = sysclk;
 #endif
 
-#ifdef CONFIG_LS1012A
+#ifdef CONFIG_ARCH_LS1012A
sys_info->freq_ddrbus *= (gur_in32(&gur->rcwsr[0]) >>
FSL_CHASSIS2_RCWSR0_SYS_PLL_RAT_SHIFT) &
FSL_CHASSIS2_RCWSR0_SYS_PLL_RAT_MASK;
@@ -91,7 +91,7 @@ void get_sys_info(struct sys_info *sys_info)
freq_c_pll[cplx_pll] / core_cplx_pll_div[c_pll_sel];
}
 
-#ifdef CONFIG_LS1012A
+#ifdef CONFIG_ARCH_LS1012A
sys_info->freq_systembus = sys_info->freq_ddrbus / 2;
sys_info->freq_ddrbus *= 2;
 #endif
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/config.h 
b/arch/arm/include/asm/arch-fsl-layerscape/config.h
index e7c7d98..a7fda18 100644
--- a/arch/arm/include/asm/arch-fsl-layerscape/config.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/config.h
@@ -18,9 +18,7 @@
 #define CONFIG_SYS_FSL_DDRC_ARM_GEN3   /* Enable Freescale ARM DDR3 driver */
 #endif
 
-#ifdef CONFIG_LS1012A
-#define CONFIG_SYS_FSL_MMDC/* Freescale MMDC driver */
-#else
+#ifndef CONFIG_ARCH_LS1012A
 #define CONFIG_SYS_FSL_DDR /* Freescale DDR driver */
 #define CONFIG_SYS_FSL_DDR_VER FSL_DDR_VER_5_0
 #endif
@@ -208,7 +206,7 @@
 #define CONFIG_SYS_FSL_ERRATUM_A009942
 #define CONFIG_SYS_FSL_ERRATUM_A009660
 #define CONFIG_SYS_FSL_MAX_NUM_OF_SEC  1
-#elif defined(CONFIG_LS1012A)
+#elif defined(CONFIG_ARCH_LS1012A)
 #define CONFIG_MAX_CPUS 1
 #undef CONFIG_SYS_FSL_DDRC_ARM_GEN3
 
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h 
b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h
index 95a4293..df51871 100644
--- a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h
@@ -60,7 +60,7 @@
 #define CONFIG_SYS_PCIE2_PHYS_ADDR 0x48ULL
 #define CONFIG_SYS_PCIE3_PHYS_ADDR 0x50ULL
 /* LUT registers */
-#ifdef CONFIG_LS1012A
+#ifdef CONFIG_ARCH_LS1012A
 #define PCIE_LUT_BASE  0xC
 #else
 #define PCIE_LUT_BASE  0x1
diff --git a/include/configs/ls1012a_common.h b/i

[U-Boot] [PATCH 6/7] armv7: ls1021a: Convert CONFIG_LS1_DEEP_SLEEP to Kconfig option

[York Sun]

Move this option to Kconfig and clean up existing uses.

Signed-off-by: York Sun 
CC: Hongbo Zhang 
---

Changes in v2: New patch

 arch/arm/Kconfig   | 2 ++
 arch/arm/cpu/armv7/ls102xa/Kconfig | 3 +++
 include/configs/ls1021aqds.h   | 1 -
 include/configs/ls1021atwr.h   | 1 -
 4 files changed, 5 insertions(+), 2 deletions(-)

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 1bc45ed..5073930 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -822,6 +822,7 @@ config TARGET_LS1021AQDS
select SUPPORT_SPL
select ARCH_LS1021A
select ARCH_SUPPORT_PSCI
+   select LS1_DEEP_SLEEP
 
 config TARGET_LS1021ATWR
bool "Support ls1021atwr"
@@ -829,6 +830,7 @@ config TARGET_LS1021ATWR
select SUPPORT_SPL
select ARCH_LS1021A
select ARCH_SUPPORT_PSCI
+   select LS1_DEEP_SLEEP
 
 config TARGET_LS1043AQDS
bool "Support ls1043aqds"
diff --git a/arch/arm/cpu/armv7/ls102xa/Kconfig 
b/arch/arm/cpu/armv7/ls102xa/Kconfig
index e88a05e..920eb4a 100644
--- a/arch/arm/cpu/armv7/ls102xa/Kconfig
+++ b/arch/arm/cpu/armv7/ls102xa/Kconfig
@@ -1,3 +1,6 @@
 config ARCH_LS1021A
bool "Freescale Layerscape LS1021A SoC"
select SYS_FSL_ERRATUM_A010315
+
+config LS1_DEEP_SLEEP
+   bool "Freescale Layerscape 1 deep sleep"
diff --git a/include/configs/ls1021aqds.h b/include/configs/ls1021aqds.h
index 5aaecc7..7a256da 100644
--- a/include/configs/ls1021aqds.h
+++ b/include/configs/ls1021aqds.h
@@ -10,7 +10,6 @@
 #define CONFIG_LS102XA
 
 #define CONFIG_ARMV7_PSCI_1_0
-#define CONFIG_LS1_DEEP_SLEEP
 
 #define CONFIG_ARMV7_SECURE_BASE   OCRAM_BASE_S_ADDR
 
diff --git a/include/configs/ls1021atwr.h b/include/configs/ls1021atwr.h
index ef238a4..90ae770 100644
--- a/include/configs/ls1021atwr.h
+++ b/include/configs/ls1021atwr.h
@@ -10,7 +10,6 @@
 #define CONFIG_LS102XA
 
 #define CONFIG_ARMV7_PSCI_1_0
-#define CONFIG_LS1_DEEP_SLEEP
 
 #define CONFIG_ARMV7_SECURE_BASE   OCRAM_BASE_S_ADDR
 
-- 
2.7.4

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[U-Boot] [PATCH 4/7] Convert CONFIG_SYS_FSL_ERRATUM_A010315 to Kconfig option

[York Sun]

Move this option to Kconfig and clean up existing uses.

Signed-off-by: York Sun 
CC: Hou Zhiqiang 

---

Changes in v2:
  Add select ARCH_LS1021A and ARCH_LS1043A respectively to enable
  SYS_FSL_ERRATUM_A010315 for affected platforms.

 arch/arm/Kconfig  | 6 ++
 arch/arm/cpu/armv7/ls102xa/Kconfig| 3 +++
 arch/arm/cpu/armv8/fsl-layerscape/Kconfig | 8 
 arch/arm/include/asm/arch-fsl-layerscape/config.h | 1 -
 arch/arm/include/asm/arch-ls102xa/config.h| 1 -
 5 files changed, 17 insertions(+), 2 deletions(-)
 create mode 100644 arch/arm/cpu/armv7/ls102xa/Kconfig

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index c974db4..1bc45ed 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -820,16 +820,19 @@ config TARGET_LS1021AQDS
bool "Support ls1021aqds"
select CPU_V7
select SUPPORT_SPL
+   select ARCH_LS1021A
select ARCH_SUPPORT_PSCI
 
 config TARGET_LS1021ATWR
bool "Support ls1021atwr"
select CPU_V7
select SUPPORT_SPL
+   select ARCH_LS1021A
select ARCH_SUPPORT_PSCI
 
 config TARGET_LS1043AQDS
bool "Support ls1043aqds"
+   select ARCH_LS1043A
select ARM64
select ARMV8_MULTIENTRY
select SUPPORT_SPL
@@ -838,6 +841,7 @@ config TARGET_LS1043AQDS
 
 config TARGET_LS1043ARDB
bool "Support ls1043ardb"
+   select ARCH_LS1043A
select ARM64
select ARMV8_MULTIENTRY
select SUPPORT_SPL
@@ -948,6 +952,8 @@ source "arch/arm/mach-kirkwood/Kconfig"
 
 source "arch/arm/mach-mvebu/Kconfig"
 
+source "arch/arm/cpu/armv7/ls102xa/Kconfig"
+
 source "arch/arm/cpu/armv7/mx7/Kconfig"
 
 source "arch/arm/cpu/armv7/mx6/Kconfig"
diff --git a/arch/arm/cpu/armv7/ls102xa/Kconfig 
b/arch/arm/cpu/armv7/ls102xa/Kconfig
new file mode 100644
index 000..e88a05e
--- /dev/null
+++ b/arch/arm/cpu/armv7/ls102xa/Kconfig
@@ -0,0 +1,3 @@
+config ARCH_LS1021A
+   bool "Freescale Layerscape LS1021A SoC"
+   select SYS_FSL_ERRATUM_A010315
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig 
b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
index a823d39..f8057ba 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
+++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
@@ -1,9 +1,17 @@
 config ARCH_LS1012A
bool "Freescale Layerscape LS1012A SoC"
select SYS_FSL_MMDC
+   select SYS_FSL_ERRATUM_A010315
+
+config ARCH_LS1043A
+   bool "Freescale Layerscape LS1043A SoC"
+   select SYS_FSL_ERRATUM_A010315
 
 config ARCH_LS1046A
bool "Freescale Layerscape LS1046A SoC"
 
 config SYS_FSL_MMDC
bool "Freescale Multi Mode DDR Controller"
+
+config SYS_FSL_ERRATUM_A010315
+   bool "Workaround for PCIe erratum A010315"
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/config.h 
b/arch/arm/include/asm/arch-fsl-layerscape/config.h
index a7fda18..a5c6c4c 100644
--- a/arch/arm/include/asm/arch-fsl-layerscape/config.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/config.h
@@ -169,7 +169,6 @@
 
 #define CONFIG_SYS_FSL_SRDS_1
 
-#define CONFIG_SYS_FSL_ERRATUM_A010315
 /* SoC related */
 #ifdef CONFIG_LS1043A
 #define CONFIG_MAX_CPUS4
diff --git a/arch/arm/include/asm/arch-ls102xa/config.h 
b/arch/arm/include/asm/arch-ls102xa/config.h
index f2ce793..46de784 100644
--- a/arch/arm/include/asm/arch-ls102xa/config.h
+++ b/arch/arm/include/asm/arch-ls102xa/config.h
@@ -132,7 +132,6 @@
 #define CONFIG_SYS_FSL_ERRATUM_A008378
 #define CONFIG_SYS_FSL_ERRATUM_A009663
 #define CONFIG_SYS_FSL_ERRATUM_A009942
-#define CONFIG_SYS_FSL_ERRATUM_A010315
 #define CONFIG_SYS_FSL_MAX_NUM_OF_SEC  1
 #else
 #error SoC not defined
-- 
2.7.4

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Re: [U-Boot] [PATCH 6/7] armv7: ls1021a: Convert CONFIG_LS1_DEEP_SLEEP to Kconfig option

[Tom Rini]

On Mon, Sep 26, 2016 at 08:09:29AM -0700, York Sun wrote:

> Move this option to Kconfig and clean up existing uses.
> 
> Signed-off-by: York Sun 
> CC: Hongbo Zhang 

Reviewed-by: Tom Rini 

-- 
Tom


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Re: [U-Boot] [PATCH 7/7] armv7: ls102xa: Rename GIC_ADDR and DCSR_RCPM_ADDR

[Tom Rini]

On Mon, Sep 26, 2016 at 08:09:30AM -0700, York Sun wrote:

> Instead of using CONFIG_* name space, rename these two macros to
> SYS_FSL_* space.
> 
> Signed-off-by: York Sun 
> CC: Hongbo Zhang 

Reviewed-by: Tom Rini 

Long term however, it should move out of arch-.../config.h and in to a
more appropriately named header file.

-- 
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[U-Boot] i.MX6: NAND boot with SPL

[Jagan Teki]

Hi Fabio/Peng/Stefano/Any,

Did anyone tried or used nand boot with SPL and
u-boot.img(u-boot-dtb.img)? was it supported by imx6?

So booted with MMC and trying to write the images from 1MB since I
read 0x0 on the flash shows FCB.

Code:
--
diff --git a/arch/arm/imx-common/spl.c b/arch/arm/imx-common/spl.c
index bdcda7d..72f870e 100644
--- a/arch/arm/imx-common/spl.c
+++ b/arch/arm/imx-common/spl.c
@@ -84,6 +84,8 @@ u32 spl_boot_mode(const u32 boot_device)
return MMCSD_MODE_RAW;
 #endif
break;
+   case BOOT_DEVICE_NAND:
+   break;
default:
puts("spl: ERROR:  unsupported device\n");
hang();
diff --git a/arch/arm/imx-common/spl_nand.cfg b/arch/arm/imx-common/spl_nand.cfg
new file mode 100644
index 000..e918c0d
--- /dev/null
+++ b/arch/arm/imx-common/spl_nand.cfg
@@ -0,0 +1,2 @@
+IMAGE_VERSION  2
+BOOT_FROM  nand

NAND write:

U-Boot >  tftpboot ${loadaddr} SPL
Using FEC device
TFTP from server 192.168.2.68; our IP address is 192.168.2.67
Filename 'SPL'.
Load address: 0x1200
Loading: ###
 1.4 MiB/s
done
Bytes transferred = 31744 (7c00 hex)
U-Boot > nand erase 0x10 0x10

NAND erase: device 0 offset 0x10, size 0x10
Erasing at 0x1c -- 100% complete.
OK
U-Boot > nand write ${loadaddr} 0x10 0x7c00

NAND write: device 0 offset 0x10, size 0x10
 1048576 bytes written: OK

U-Boot > tftpboot ${loadaddr} u-boot-dtb.img
Using FEC device
TFTP from server 192.168.2.68; our IP address is 192.168.2.67
Filename 'u-boot-dtb.img'.
Load address: 0x1200
Loading: 
 1.7 MiB/s
done
Bytes transferred = 282470 (44f66 hex)
U-Boot > nand erase 0x20 0x10

NAND erase: device 0 offset 0x20, size 0x10
Erasing at 0x2c -- 100% complete.
OK
U-Boot > nand write ${loadaddr} 0x20 0x44f66

NAND write: device 0 offset 0x20, size 0x10
 1048576 bytes written: OK

Boot Log:
---
U-Boot SPL 2016.07-ge1e54c7-dirty (Sep 26 2016 - 16:07:01)
Trying to boot from unknown boot device
SPL: Unsupported Boot Device!
SPL: failed to boot from all boot devices
### ERROR ### Please RESET the board ###

When I add prints on SPL to find whether it is nand bootmode or not?
and then did a same nand operations I ended up getting the same SPL
log always.

Any help?

thanks!
-- 
Jagan Teki
Free Software Engineer | www.openedev.com
U-Boot, Linux | Upstream Maintainer
Hyderabad, India.
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Re: [U-Boot] [RFC PATCH] ARM: create .secure_stack section only for PSCI

[Chen-Yu Tsai]

On Mon, Sep 26, 2016 at 1:21 PM, Masahiro Yamada
 wrote:
> Jon Master reports that QEMU refuses to load a U-Boot image built
> with CONFIG_ARMV7_NONSEC, but without CONFIG_ARMV7_PSCI since
> commit 5a3aae68c74e ("ARM: armv7: guard memory reserve for PSCI
> with #ifdef CONFIG_ARMV7_PSCI").
>
> It looks like only PSCI that needs the Secure stack, so move
> the #ifdef to guard the whole of .secure_stack allocation in order
> not to create the empty section.
>
> Signed-off-by: Masahiro Yamada 
> Reported-by: Jon Masters 
> Link: http://patchwork.ozlabs.org/patch/664025/
> ---
>
> With this commit, the SECURE_MAX_SIZE check will go inside
> the #ifdef CONFIG_ARMV7_PSCI, so this patch is probably wrong.

I wonder if you could move the SECURE_MAX_SIZE check outside of
the secure_stack section. I might have put it where it is because
of some issues, but I can't remember.

> I am CCing Chen-Yu Tsai.  He mostly expanded this linker script
> for PSCI work, so I hope he can suggest the correct way
> for fixing this problem.

The patch looks good. Though I wonder if you need to guard the
__secure_stack_start and __secure_stack_end symbols in
arch/arm/lib/sections.c as well. Otherwise they might end up
in the data section?


Regards
ChenYu

>
>  arch/arm/cpu/u-boot.lds | 7 +--
>  1 file changed, 5 insertions(+), 2 deletions(-)
>
> diff --git a/arch/arm/cpu/u-boot.lds b/arch/arm/cpu/u-boot.lds
> index 0a5fae6..37d4c60 100644
> --- a/arch/arm/cpu/u-boot.lds
> +++ b/arch/arm/cpu/u-boot.lds
> @@ -74,6 +74,7 @@ SECTIONS
> *(._secure.data)
> }
>
> +#ifdef CONFIG_ARMV7_PSCI
> .secure_stack ALIGN(ADDR(.secure_data) + SIZEOF(.secure_data),
> CONSTANT(COMMONPAGESIZE)) (NOLOAD) :
>  #ifdef __ARMV7_PSCI_STACK_IN_RAM
> @@ -83,10 +84,10 @@ SECTIONS
>  #endif
> {
> KEEP(*(.__secure_stack_start))
> -#ifdef CONFIG_ARMV7_PSCI
> +
> /* Skip addreses for stack */
> . = . + CONFIG_ARMV7_PSCI_NR_CPUS * ARM_PSCI_STACK_SIZE;
> -#endif
> +
> /* Align end of stack section to page boundary */
> . = ALIGN(CONSTANT(COMMONPAGESIZE));
>
> @@ -109,6 +110,8 @@ SECTIONS
> . = LOADADDR(.secure_stack);
>  #endif
>
> +#endif
> +
> .__secure_end : AT(ADDR(.__secure_end)) {
> *(.__secure_end)
> LONG(0x1d1071c);/* Must output something to reset LMA 
> */
> --
> 1.9.1
>
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[U-Boot] [PATCH 1/7] armv8: ls1046a: Convert CONFIG_LS1046A to Kconfig option ARCH_LS1046A

[York Sun]

Move this option to Kconfig and clean up existing uses.

Signed-off-by: York Sun 
CC: Mingkai Hu 
CC: Gong Qianyu 
Reviewed-by: Tom Rini 
---

Changes in v2: None

 arch/arm/Kconfig  | 4 
 arch/arm/cpu/armv8/fsl-layerscape/Kconfig | 2 ++
 arch/arm/cpu/armv8/fsl-layerscape/Makefile| 2 +-
 arch/arm/cpu/armv8/fsl-layerscape/lowlevel.S  | 2 +-
 arch/arm/cpu/armv8/fsl-layerscape/soc.c   | 2 +-
 arch/arm/include/asm/arch-fsl-layerscape/config.h | 3 ++-
 drivers/net/fm/Makefile   | 2 +-
 include/configs/ls1046a_common.h  | 1 -
 8 files changed, 12 insertions(+), 6 deletions(-)
 create mode 100644 arch/arm/cpu/armv8/fsl-layerscape/Kconfig

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 1560bcc..aed89c9 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -843,6 +843,7 @@ config TARGET_LS1043ARDB
 
 config TARGET_LS1046AQDS
bool "Support ls1046aqds"
+   select ARCH_LS1046A
select ARM64
select ARMV8_MULTIENTRY
select SUPPORT_SPL
@@ -855,6 +856,7 @@ config TARGET_LS1046AQDS
 
 config TARGET_LS1046ARDB
bool "Support ls1046ardb"
+   select ARCH_LS1046A
select ARM64
select ARMV8_MULTIENTRY
select SUPPORT_SPL
@@ -951,6 +953,8 @@ source "arch/arm/cpu/armv7/mx5/Kconfig"
 
 source "arch/arm/cpu/armv7/omap-common/Kconfig"
 
+source "arch/arm/cpu/armv8/fsl-layerscape/Kconfig"
+
 source "arch/arm/mach-orion5x/Kconfig"
 
 source "arch/arm/mach-rmobile/Kconfig"
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig 
b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
new file mode 100644
index 000..c234eff
--- /dev/null
+++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
@@ -0,0 +1,2 @@
+config ARCH_LS1046A
+   bool "Freescale Layerscape LS1046A SoC"
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Makefile 
b/arch/arm/cpu/armv8/fsl-layerscape/Makefile
index 8c1317f..f9590af 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/Makefile
+++ b/arch/arm/cpu/armv8/fsl-layerscape/Makefile
@@ -34,6 +34,6 @@ ifneq ($(CONFIG_LS1012A),)
 obj-$(CONFIG_SYS_HAS_SERDES) += ls1012a_serdes.o
 endif
 
-ifneq ($(CONFIG_LS1046A),)
+ifneq ($(CONFIG_ARCH_LS1046A),)
 obj-$(CONFIG_SYS_HAS_SERDES) += ls1046a_serdes.o
 endif
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/lowlevel.S 
b/arch/arm/cpu/armv8/fsl-layerscape/lowlevel.S
index 6451a36..5d0b7a4 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/lowlevel.S
+++ b/arch/arm/cpu/armv8/fsl-layerscape/lowlevel.S
@@ -180,7 +180,7 @@ ENTRY(lowlevel_init)
dsb sy
 #endif
 
-#ifdef CONFIG_LS1046A
+#ifdef CONFIG_ARCH_LS1046A
/* Initialize the L2 RAM latency */
mrs   x1, S3_1_c11_c0_2
mov   x0, #0x1C7
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/soc.c 
b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
index 5ca721d..463d1e3 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/soc.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
@@ -228,7 +228,7 @@ int sata_init(void)
 {
struct ccsr_ahci __iomem *ccsr_ahci = (void *)CONFIG_SYS_SATA;
 
-#ifdef CONFIG_LS1046A
+#ifdef CONFIG_ARCH_LS1046A
/* Disable SATA ECC */
out_le32((void *)CONFIG_SYS_DCSR_DCFG_ADDR + 0x520, 0x8000);
 #endif
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/config.h 
b/arch/arm/include/asm/arch-fsl-layerscape/config.h
index 81a5e7c..e7c7d98 100644
--- a/arch/arm/include/asm/arch-fsl-layerscape/config.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/config.h
@@ -7,6 +7,7 @@
 #ifndef _ASM_ARMV8_FSL_LAYERSCAPE_CONFIG_H_
 #define _ASM_ARMV8_FSL_LAYERSCAPE_CONFIG_H_
 
+#include 
 #include 
 
 #define CONFIG_STANDALONE_LOAD_ADDR0x8030
@@ -213,7 +214,7 @@
 
 #define GICD_BASE  0x01401000
 #define GICC_BASE  0x01402000
-#elif defined(CONFIG_LS1046A)
+#elif defined(CONFIG_ARCH_LS1046A)
 #define CONFIG_MAX_CPUS4
 #define CONFIG_SYS_FMAN_V3
 #define CONFIG_SYS_NUM_FMAN1
diff --git a/drivers/net/fm/Makefile b/drivers/net/fm/Makefile
index 344fbe2..316fef4 100644
--- a/drivers/net/fm/Makefile
+++ b/drivers/net/fm/Makefile
@@ -39,4 +39,4 @@ obj-$(CONFIG_PPC_T4080) += t4240.o
 obj-$(CONFIG_PPC_B4420) += b4860.o
 obj-$(CONFIG_PPC_B4860) += b4860.o
 obj-$(CONFIG_LS1043A)  += ls1043.o
-obj-$(CONFIG_LS1046A)  += ls1046.o
+obj-$(CONFIG_ARCH_LS1046A) += ls1046.o
diff --git a/include/configs/ls1046a_common.h b/include/configs/ls1046a_common.h
index 5856de8..7c5e635 100644
--- a/include/configs/ls1046a_common.h
+++ b/include/configs/ls1046a_common.h
@@ -10,7 +10,6 @@
 #define CONFIG_REMAKE_ELF
 #define CONFIG_FSL_LAYERSCAPE
 #define CONFIG_FSL_LSCH2
-#define CONFIG_LS1046A
 #define CONFIG_MP
 #define CONFIG_SYS_FSL_CLK
 #define CONFIG_GICV2
-- 
2.7.4

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Re: [U-Boot] Pull request: u-boot-coldfire/master

[Tom Rini]

On Sun, Sep 25, 2016 at 02:56:15PM +0200, Angelo Dureghello wrote:

> The following changes since commit 42f75050667bf1a0a3fbe7d8dd6d2ec5fc127935:
> 
>   arm: mvebu: NAND support for DB-88F6820-AMC (2016-09-24 10:07:48 +0200)
> 
> are available in the git repository at:
> 
>   git://git.denx.de/u-boot-coldfire.git master
> 
> for you to fetch changes up to 18c9b10ce76ea0f99e6c68ce6ab75c373eedb4c4:
> 
>   board: amcore: update to use dm serial driver (2016-09-25 14:26:22 +0200)
> 

Applied to u-boot/master, thanks!

-- 
Tom


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Re: [U-Boot] Please pull from u-boot-i2c

[Tom Rini]

On Mon, Sep 26, 2016 at 01:17:56PM +0200, Heiko Schocher wrote:

> Hello Tom,
> 
> please pull from u-boot-i2c.git master
> 
> The following changes since commit 42f75050667bf1a0a3fbe7d8dd6d2ec5fc127935:
> 
>   arm: mvebu: NAND support for DB-88F6820-AMC (2016-09-24 10:07:48 +0200)
> 
> are available in the git repository at:
> 
>   git://git.denx.de/u-boot-i2c.git master
> 
> for you to fetch changes up to 87de0eb31ca86a7a675c000f48f5f24bf92b872d:
> 
>   i2c: mvtwsi.c: Add support for Marvell Armada 7K/8K (2016-09-26 10:43:10 
> +0200)
> 

Applied to u-boot/master, thanks!

-- 
Tom


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Re: [U-Boot] i.MX6: NAND boot with SPL

[Fabio Estevam]

Hi Jagan,

On Mon, Sep 26, 2016 at 12:35 PM, Jagan Teki  wrote:
> Hi Fabio/Peng/Stefano/Any,
>
> Did anyone tried or used nand boot with SPL and
> u-boot.img(u-boot-dtb.img)? was it supported by imx6?

I haven't tried it myself, but board/gateworks/gw_ventana/README says
it is supported.
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[U-Boot] Please pull fsl-qoriq master

[york sun]

Tom,

Let's try again.

The following changes since commit 8cbb389bb3da80cbf8911f8386cbff92c6a78afe:

   Prepare v2016.09 (2016-09-12 10:05:51 -0400)

are available in the git repository at:

   git://git.denx.de/u-boot-fsl-qoriq.git

for you to fetch changes up to 295a24b3d6a751b79373e7ff2199d91765cae8a9:

   armv7: ls102xa: Rename GIC_ADDR and DCSR_RCPM_ADDR (2016-09-26 
08:53:07 -0700)


Hongbo Zhang (4):
   armv7: psci: make v7_flush_dcache_all public for all psci code
   nxp: ls102xa: add registers definition for system sleep
   nxp: ls102xa: add EPU Finite State Machine
   nxp: ls102xa: add LS1 PSCI system suspend

Hou Zhiqiang (5):
   fsl: serdes: ensure accessing the initialized maps of serdes protocol
   arm: fsl-layerscape: move forward the non-secure access 
permission setup
   fsl: csu: add an API to set individual device access permission
   fsl: csu: add an API to set R/W permission to PCIe
   fsl-layerscape: Add workaround for PCIe erratum A010315

Mingkai Hu (2):
   armv8: fsl-layerscape: Increase L2 Data RAM latency and L2 Tag 
RAM latency
   armv8: ls1046ardb: Add LS1046ARDB board support

Qianyu Gong (2):
   net: fm: fix spi flash probe for using driver model
   armv8: fsl-layerscape: spl: remove BSS clearing and board_init_r

Shaohui Xie (5):
   ddr: fsl: fix a compile issue
   Export memset for standalone AQ FW load apps
   armv8: fsl-layerscape: add define CONFIG_STANDALONE_LOAD_ADDR for 
standalone app
   armv8: ls1046a: disable SATA ECC in DCSR
   armv8: ls1046aqds: Add LS1046AQDS board support

Shengzhou Liu (4):
   armv8: fsl-layerscape: Update ddr erratum a008336
   armv7:ls1021a: Enable workaround for DDR erratum A-009942
   driver/ddr/fsl: Add general MMDC driver and reuse common MMDC 
driver for ls1012a
   armv8: ls1046a: Enable DDR erratum for ls1046a

Sumit Garg (2):
   board: ls1043ardb: move sec_init to board_init
   ls1043ardb: PPA: add PPA validation in case of secure boot

York Sun (10):
   driver/ddr/fsl: Add more debug registers
   driver/ddr/fsl: Revise workaround A008511 for A009803
   armv8: ls2080a: Remove debug server support
   armv8: ls1046a: Convert CONFIG_LS1046A to Kconfig option ARCH_LS1046A
   driver: ddr: fsl_mmdc: Pass board parameters through data structure
   armv8: ls1012a: Convert CONFIG_LS1012A to Kconfig option ARCH_LS1021A
   Convert CONFIG_SYS_FSL_ERRATUM_A010315 to Kconfig option
   armv8: ls1046ardb_emmc: Fix a typo in defconfig
   armv7: ls1021a: Convert CONFIG_LS1_DEEP_SLEEP to Kconfig option
   armv7: ls102xa: Rename GIC_ADDR and DCSR_RCPM_ADDR

  Makefile   |   1 +
  README |   6 -
  arch/arm/Kconfig   |  41 ++
  arch/arm/cpu/armv7/ls102xa/Kconfig |   6 +
  arch/arm/cpu/armv7/ls102xa/Makefile|   2 +-
  arch/arm/cpu/armv7/ls102xa/fsl_epu.c   | 157 +++
  arch/arm/cpu/armv7/ls102xa/fsl_epu.h   |   8 +
  arch/arm/cpu/armv7/ls102xa/fsl_ls1_serdes.c|  15 +-
  arch/arm/cpu/armv7/ls102xa/ls102xa_psci.c  | 236 ++
  arch/arm/cpu/armv7/ls102xa/psci.S  |  11 +
  arch/arm/cpu/armv7/ls102xa/soc.c   |  19 +
  arch/arm/cpu/armv7/psci.S  |   6 +-
  arch/arm/cpu/armv8/fsl-layerscape/Kconfig  |  17 +
  arch/arm/cpu/armv8/fsl-layerscape/Makefile |   4 +-
  arch/arm/cpu/armv8/fsl-layerscape/cpu.c|   5 -
  .../cpu/armv8/fsl-layerscape/fsl_lsch2_serdes.c|  12 +
  .../arm/cpu/armv8/fsl-layerscape/fsl_lsch2_speed.c |   4 +-
  .../cpu/armv8/fsl-layerscape/fsl_lsch3_serdes.c|  12 +
  arch/arm/cpu/armv8/fsl-layerscape/lowlevel.S   |  15 +
  arch/arm/cpu/armv8/fsl-layerscape/ppa.c|  21 +
  arch/arm/cpu/armv8/fsl-layerscape/soc.c|  31 +-
  arch/arm/cpu/armv8/fsl-layerscape/spl.c|   9 -
  arch/arm/dts/Makefile  |   2 +
  arch/arm/dts/fsl-ls1046a-qds-duart.dts |  16 +
  arch/arm/dts/fsl-ls1046a-qds.dtsi  |  77 
  arch/arm/dts/fsl-ls1046a-rdb.dts   |  44 ++
  arch/arm/dts/fsl-ls1046a.dtsi  | 166 +++
  arch/arm/include/asm/arch-fsl-layerscape/config.h  |  16 +-
  .../include/asm/arch-fsl-layerscape/fsl_serdes.h   |   8 +
  .../include/asm/arch-fsl-layerscape/immap_lsch2.h  |   2 +-
  .../include/asm/arch-fsl-layerscape/immap_lsch3.h  |   9 -
  .../include/asm/arch-fsl-layerscape/ns_access.h|   1 +
  arch/arm/include/asm/arch-fsl-layerscape/soc.h |   4 +
  arch/arm/include/asm/arch-ls102xa/config.h |   3 +
  arch/arm/include/asm/arch-ls102xa/fsl_serdes.h |   4 +
  arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h  |  52 ++-
  arch/arm/

Re: [U-Boot] [PATCH 8/9] MIPS: add handling for generic and EJTAG exceptions

[Daniel Schwierzeck]

2016-09-26 12:29 GMT+02:00 Paul Burton :
>
>
> Something I've had in the U-Boot source we use on Boston, Malta & SEAD-3
> boards internally for a while is the ability to longjmp back to the shell
> after an exception. It seems to work pretty well & generally means
> exceptions are non-fatal. I'll submit that once this goes in.

But this only works for commands issues at the U-Boot prompt? If the
init code crashes,
then you have no valid code to jump to.

>
>> +
>
>> + .macro RESTORE_TEMP
>
>> + LONG_L $24, PT_LO(sp)
>
>> + mtlo $24
>
>> + LONG_L $24, PT_HI(sp)
>
>> + mthi $24
>
>
>
> The hi & lo bits here & in the save code above need to be wrapped in "#if
> __mips_isa_rev < 6", since the hi & lo registers were removed in MIPSr6.
>

ok, I'll do a resync with Linux's arch/mips/include/asm/stackframe.h.


>
>> +void trap_init(ulong reloc_addr)
>
>> +{
>
>> + unsigned long ebase = gd->irq_sp;
>
>> +
>
>> + set_handler(0x180, &except_vec3_generic, 0x80);
>
>> + set_handler(0x280, &except_vec_ejtag_debug, 0x80);
>
>> +
>
>> + write_c0_ebase(ebase);
>
>> + clear_c0_status(ST0_BEV);
>
>
>
> I think strictly speaking we should probably have an ehb instruction at the
> end of trap_init so that we know the new ebase takes effect straight away.

Sounds plausible. Shall I import arch/mips/include/asm/hazards.h from Linux?

>
>
>
> With the R6 change mentioned above this works fine on a 64r6el (I6400)
> Boston board, so feel free to add:
>
>
>
> Reviewed-by: Paul Burton 
>
> Tested-by: Paul Burton 
>

thanks for testing and reviewing

-- 
- Daniel
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Re: [U-Boot] [PATCH 2/9] MIPS: fix ROM exception vectors

[Daniel Schwierzeck]

2016-09-26 9:58 GMT+02:00 Matthew Fortune :
> Daniel Schwierzeck  writes:
>> When booting from ROM, early exceptions can't be handled
>> properly. Instead of busy-looping give the developer the
>> possibilty to examine the situation. Thus issue a SDBBP
>> instruction to transfer control to hardware debugger if one
>> is attached.
>
> You could make the SDBBP into a UHI operation that can be read by
> a debugger as an unhandled exception rather than an unexpected
> breakpoint (assuming said debugger knows about UHI). The fragment
> I use in lightweight boot code is:
>
> move  k0, t9# Preserve t9
> move  k1, a0# Preserve a0
> li$25, 15   # UHI exception operation
> li$4, 0 # Use hard register context
> sdbbp 1 # Invoke UHI operation
>
> You lose k0/k1 in this which may be undesirable but it might
> be a reasonable trade off. This shouldn't go in the debug vector
> of course!
>

sounds interesting. I'll have a look into that. Can I test this with
OpenOCD and GDB?


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Re: [U-Boot] [PATCH 8/9] MIPS: add handling for generic and EJTAG exceptions

[Paul Burton]

On Monday, 26 September 2016 19:41:22 BST Daniel Schwierzeck wrote:
> 2016-09-26 12:29 GMT+02:00 Paul Burton :
> > Something I've had in the U-Boot source we use on Boston, Malta & SEAD-3
> > boards internally for a while is the ability to longjmp back to the shell
> > after an exception. It seems to work pretty well & generally means
> > exceptions are non-fatal. I'll submit that once this goes in.
> 
> But this only works for commands issues at the U-Boot prompt? If the
> init code crashes,
> then you have no valid code to jump to.

Hi Daniel,

Yes, that's true. To end users though that's the typical case - when an 
exception occurs it's generally because an address was typed incorrectly or 
because the wrong size of access was used. Allowing the user to recover from 
that by returning them to the prompt where they can simply push the up key & 
modify the command they typed makes use much nicer.

> 
> >> +
> >> 
> >> + .macro RESTORE_TEMP
> >> 
> >> + LONG_L $24, PT_LO(sp)
> >> 
> >> + mtlo $24
> >> 
> >> + LONG_L $24, PT_HI(sp)
> >> 
> >> + mthi $24
> > 
> > The hi & lo bits here & in the save code above need to be wrapped in "#if
> > __mips_isa_rev < 6", since the hi & lo registers were removed in MIPSr6.
> 
> ok, I'll do a resync with Linux's arch/mips/include/asm/stackframe.h.

Sounds good :)

> 
> >> +void trap_init(ulong reloc_addr)
> >> 
> >> +{
> >> 
> >> + unsigned long ebase = gd->irq_sp;
> >> 
> >> +
> >> 
> >> + set_handler(0x180, &except_vec3_generic, 0x80);
> >> 
> >> + set_handler(0x280, &except_vec_ejtag_debug, 0x80);
> >> 
> >> +
> >> 
> >> + write_c0_ebase(ebase);
> >> 
> >> + clear_c0_status(ST0_BEV);
> > 
> > I think strictly speaking we should probably have an ehb instruction at
> > the
> > end of trap_init so that we know the new ebase takes effect straight away.
> 
> Sounds plausible. Shall I import arch/mips/include/asm/hazards.h from Linux?

Could be good. I have a patch lying around which adds hazards.h to clear the 
instruction hazard at the end of flush_cache, but it doesn't reuse the 
instruction_hazard function from Linux because that caused problems when run 
during relocation. I expect since my change to relocate_code that ought not to 
be a problem anymore though & the Linux version will probably work fine, but I 
haven't yet tested it.

> > With the R6 change mentioned above this works fine on a 64r6el (I6400)
> > Boston board, so feel free to add:
> > 
> > 
> > 
> > Reviewed-by: Paul Burton 
> > 
> > Tested-by: Paul Burton 
> 
> thanks for testing and reviewing

No problem.

Thanks,
Paul

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