Re: [U-Boot] [RFC PATCH 03/11] SPL: FIT: factor out spl_load_fit_image()
Hi Andre,
On 01/20/2017 09:53 AM, Andre Przywara wrote:
At the moment we load two images from a FIT image: the actual U-Boot
image and the DTB. Both times we have very similar code to deal with
alignment requirement the media we load from imposes upon us.
Factor out this code into a new function, which we just call twice.
Signed-off-by: Andre Przywara
---
common/spl/spl_fit.c | 122 +--
1 file changed, 51 insertions(+), 71 deletions(-)
diff --git a/common/spl/spl_fit.c b/common/spl/spl_fit.c
index 381ed1f..d4149c5 100644
--- a/common/spl/spl_fit.c
+++ b/common/spl/spl_fit.c
@@ -138,19 +138,58 @@ static int get_aligned_image_size(struct spl_load_info
*info, int data_size,
return (data_size + info->bl_len - 1) / info->bl_len;
}
+static int spl_load_fit_image(struct spl_load_info *info, ulong sector,
+ void *fit, ulong base_offset, int node,
+ struct spl_image_info *image_info)
+{
+ ulong offset;
+ size_t length;
+ ulong load, entry;
+ void *src;
+ ulong overhead;
+ int nr_sectors;
+
+ offset = fdt_getprop_u32(fit, node, "data-offset") + base_offset;
+ length = fdt_getprop_u32(fit, node, "data-size");
+ load = fdt_getprop_u32(fit, node, "load");
+ if (load == -1U && image_info)
+ load = image_info->load_addr;
+ entry = fdt_getprop_u32(fit, node, "entry");
+
+ overhead = get_aligned_image_overhead(info, offset);
+ nr_sectors = get_aligned_image_size(info, overhead + length, offset);
+
+ if (info->read(info, sector + get_aligned_image_offset(info, offset),
+ nr_sectors, (void*)load) != nr_sectors)
+ return -EIO;
+ debug("image: dst=%lx, offset=%lx, size=%lx\n", load, offset,
+ (unsigned long)length);
+
+ src = (void *)load + overhead;
+#ifdef CONFIG_SPL_FIT_IMAGE_POST_PROCESS
+ board_fit_image_post_process(&src, &length);
+#endif
+
+ memcpy((void*)load, src, length);
For FIT image, we read the first block for header, and then we know the
offset
and size for images, is it possible to have an option that we can read
the image
data to load address directly without memcpy(), this helps speed up the
boot time.
Thanks,
- Kever
+
+ if (image_info) {
+ image_info->load_addr = load;
+ image_info->size = length;
+ image_info->entry_point = entry;
+ }
+
+ return 0;
+}
+
int spl_load_simple_fit(struct spl_image_info *spl_image,
struct spl_load_info *info, ulong sector, void *fit)
{
int sectors;
- ulong size, load;
+ ulong size;
unsigned long count;
+ struct spl_image_info image_info;
int node, images;
- void *load_ptr;
- int fdt_offset, fdt_len;
- int data_offset, data_size;
int base_offset, align_len = ARCH_DMA_MINALIGN - 1;
- int src_sector;
- void *dst, *src;
/*
* Figure out where the external images start. This is the base for the
@@ -202,82 +241,23 @@ int spl_load_simple_fit(struct spl_image_info *spl_image,
return -1;
}
- /* Get its information and set up the spl_image structure */
- data_offset = fdt_getprop_u32(fit, node, "data-offset");
- data_size = fdt_getprop_u32(fit, node, "data-size");
- load = fdt_getprop_u32(fit, node, "load");
- debug("data_offset=%x, data_size=%x\n", data_offset, data_size);
- spl_image->load_addr = load;
- spl_image->entry_point = load;
+ /* Load the image and set up the spl_image structure */
+ spl_load_fit_image(info, sector, fit, base_offset, node, spl_image);
spl_image->os = IH_OS_U_BOOT;
- /*
-* Work out where to place the image. We read it so that the first
-* byte will be at 'load'. This may mean we need to load it starting
-* before then, since we can only read whole blocks.
-*/
- data_offset += base_offset;
- sectors = get_aligned_image_size(info, data_size, data_offset);
- load_ptr = (void *)load;
- debug("U-Boot size %x, data %p\n", data_size, load_ptr);
- dst = load_ptr;
-
- /* Read the image */
- src_sector = sector + get_aligned_image_offset(info, data_offset);
- debug("Aligned image read: dst=%p, src_sector=%x, sectors=%x\n",
- dst, src_sector, sectors);
- count = info->read(info, src_sector, sectors, dst);
- if (count != sectors)
- return -EIO;
- debug("image: dst=%p, data_offset=%x, size=%x\n", dst, data_offset,
- data_size);
- src = dst + get_aligned_image_overhead(info, data_offset);
-
-#ifdef CONFIG_SPL_FIT_IMAGE_POST_PROCESS
- board_fit_image_post_process((void **)&src, (size_t *)&data_size);
-#endif
-
- memcpy(dst, src, data_size);
-
/* Figu
Re: [U-Boot] [RFC PATCH 04/11] SPL: FIT: allow loading multiple images
Hi Andre,
Thanks for your patches, this is great help for enable ATF on
U-Boot SPL.
For ATF use case, we would like to identify which one is bl31 for we need to
get entry point for it while we only need load address for other image.
Any idea on get this information from different "loadables"?
Thanks,
- Kever
On 01/20/2017 09:53 AM, Andre Przywara wrote:
So far we were not using the FIT image format to its full potential:
The SPL FIT loader was just loading the first image from the /images
node plus one of the listed DTBs.
Now with the refactored loader code it's easy to load an arbitrary
number of images in addition to the two mentioned above.
As described in the FIT image source file format description, iterate
over all images listed at the "loadables" property in the configuration
node and load every image at its desired location.
This allows to load any kind of images:
- firmware images to execute before U-Boot proper (for instance
ARM Trusted Firmware (ATF))
- firmware images for management processors (SCP, arisc, ...)
- firmware images for devices like WiFi controllers
- bit files for FPGAs
- additional configuration data
- kernels and/or ramdisks
The actual usage of this feature would be platform and/or board specific.
Signed-off-by: Andre Przywara
---
common/spl/spl_fit.c | 27 +++
1 file changed, 27 insertions(+)
diff --git a/common/spl/spl_fit.c b/common/spl/spl_fit.c
index d4149c5..18269f7 100644
--- a/common/spl/spl_fit.c
+++ b/common/spl/spl_fit.c
@@ -190,6 +190,7 @@ int spl_load_simple_fit(struct spl_image_info *spl_image,
struct spl_image_info image_info;
int node, images;
int base_offset, align_len = ARCH_DMA_MINALIGN - 1;
+ int index = 0;
/*
* Figure out where the external images start. This is the base for the
@@ -234,6 +235,11 @@ int spl_load_simple_fit(struct spl_image_info *spl_image,
if (node < 0) {
debug("could not find firmware image, trying loadables...\n");
node = spl_fit_get_image_node(fit, images, "loadables", 0);
+ /*
+* If we pick the U-Boot image from "loadables", start at
+* the second image when later loading additional images.
+*/
+ index = 1;
}
if (node < 0) {
debug("%s: Cannot find u-boot image node: %d\n",
@@ -259,5 +265,26 @@ int spl_load_simple_fit(struct spl_image_info *spl_image,
image_info.load_addr = spl_image->load_addr + spl_image->size;
spl_load_fit_image(info, sector, fit, base_offset, node, &image_info);
+ /* Now check if there are more images for us to load */
+ for (; ; index++) {
+ node = spl_fit_get_image_node(fit, images, "loadables", index);
+ if (node < 0)
+ break;
+
+ spl_load_fit_image(info, sector, fit, base_offset, node,
+ &image_info);
+
+ /*
+* If the "firmware" image did not provide an entry point,
+* use the first valid entry point from the loadables.
+*/
+ if (spl_image->entry_point == -1U &&
+ image_info.entry_point != -1U)
+ spl_image->entry_point = image_info.entry_point;
+ }
+
+ if (spl_image->entry_point == -1U || spl_image->entry_point == 0)
+ spl_image->entry_point = spl_image->load_addr;
+
return 0;
}
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Re: [U-Boot] Rockchip RK3288 boot trouble
Hi Rick, On 01/20/2017 02:29 AM, Rick Bronson wrote: Hi Kever and Simon, Thanks very much for the help. Really appreciate it. I didn't see your detail steps for getting u-boot-dtb.bin, does it include SPL here? I'm using this method: 2. with "CONFIG_ROCKCHIP_SPL_BACK_TO_BROM", which is default setting ... I'm confusing with this incorrect DRAM size, could you share the console output during you flash the image, there should have correct DRAM size info. I'm not sure if the DRAM on your board is symmetric or not, or any else special. See below for the output. I noticed that I only have "Channel b" and not "Channel a". On my other board that boots, I have both a and b. I wonder if one bank of DDR3 went bad on this board. What do you think? Looks like there is something wrong on channel a DDR, and upstream source code does not support this kind of solution, but if you are using rockchip DRAM init code, you board should be still work only with one channel DRAM. Thanks, - Kever Thanks again. Rick DDR Version 1.00 20160217 In Channel b: DDR3 200MHz Bus Width=32 Col=10 Bank=8 Row=15 CS=1 Die Bus-Width=8 Size=1024MB Memory OK OUT usb boot ver:20160218 ChipType = 8 ...FlashInit enter... FtlMallocOffset = 8040 8000 FtlMallocOffset = 10040 8000 FtlMallocOffset = 11040 1000 FtlMallocOffset = 19040 8000 FtlMallocOffset = 1a040 1000 1:0 0 7f7f05 22 ...NandcInit enter... 0:1200 0 7f7f05 22 FtlMallocOffset = 23040 9000 gNandcVer = 6 SDC_BusRequest: CMD=8 SDC_RESP_TIMEOUT 1815 SDC_BusRequest: CMD=8 SDC_RESP_TIMEOUT 1815 SDC_BusRequest: CMD=8 SDC_RESP_TIMEOUT 1815 SDC_BusRequest: CMD=5 SDC_RESP_TIMEOUT 1815 SDC_BusRequest: CMD=5 SDC_RESP_TIMEOUT 1815 SDC_BusRequest: CMD=5 SDC_RESP_TIMEOUT 1815 SDC_BusRequest: CMD=55 SDC_RESP_TIMEOUT 1815 SDC_BusRequest: CMD=55 SDC_RESP_TIMEOUT 1815 SDC_BusRequest: CMD=55 SDC_RESP_TIMEOUT 1815 mmc Ext_csd, ret=0 , Ext[226]=20, bootSize=2000, Ext[215]=1, Ext[214]=d5, Ext[213]=a0, Ext[212]=0,cap =1d5a000 R EL=1f SdmmcInit=2 0 BootCapSize=2000 UserCapSize=1d5a000 FwPartOffset=2000 , 2000 UsbHook 622396 powerOn 623080 DDR Version 1.00 20160217 In SRX Channel b: DDR3 200MHz Bus Width=32 Col=10 Bank=8 Row=15 CS=1 Die Bus-Width=8 Size=1024MB ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 2/2] config: Move CONFIG_BOARD_LATE_INIT to defconfigs
On Sun, Jan 22, 2017 at 12:45:44PM +0900, Masahiro Yamada wrote: > Hi. > > > 2017-01-22 8:02 GMT+09:00 Tom Rini : > > On Sat, Jan 21, 2017 at 11:48:33AM +0100, Jagan Teki wrote: > > > >> Cc: Tom Rini > >> Signed-off-by: Jagan Teki > > > > Note: theadorable_debug grows by ~161 bytes in SPL as it had been > > enabling BOARD_LATE_INIT only for non-SPL which is now not allowed. > > > > Applied to u-boot/master, thanks! > > Now, CONFIG_BOARD_LATE_INIT can be enabled/disabled > from menuconfig, but generally this is not user-configurable > because disabling it will skip needed init procedure. > > I thought the right thing to do was > [1] Make each board "select BOARD_LATE_INIT" > > or > > [2] Change board_late_init() into a weak function so that >each board file can overrides it, then deprecate >CONFIG_BOARD_LATE_INIT. In the fullness of time this should become a select, I agree. However, it's more than a bit difficult to figure out where to, and then automatically whack in, a 'select' line. I have something almost working locally (that I'll just need to fixup the Kconfig files in, after adding lines close to where they go) but like things that we can clean up once 'imply' is a valid word, we really need to get things converted, and then cleaned up. Thanks! -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 2/2] config: Move CONFIG_BOARD_LATE_INIT to defconfigs
Hi. 2017-01-22 8:02 GMT+09:00 Tom Rini : > On Sat, Jan 21, 2017 at 11:48:33AM +0100, Jagan Teki wrote: > >> Cc: Tom Rini >> Signed-off-by: Jagan Teki > > Note: theadorable_debug grows by ~161 bytes in SPL as it had been > enabling BOARD_LATE_INIT only for non-SPL which is now not allowed. > > Applied to u-boot/master, thanks! > > -- Now, CONFIG_BOARD_LATE_INIT can be enabled/disabled from menuconfig, but generally this is not user-configurable because disabling it will skip needed init procedure. I thought the right thing to do was [1] Make each board "select BOARD_LATE_INIT" or [2] Change board_late_init() into a weak function so that each board file can overrides it, then deprecate CONFIG_BOARD_LATE_INIT. -- Best Regards Masahiro Yamada ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 08/12] sunxi: prepare for sharing MACH_SUN8I_H3 config symbol
On 16/01/17 07:59, Maxime Ripard wrote:
> On Fri, Jan 13, 2017 at 01:30:00AM +, Andre Przywara wrote:
>> The Allwinner H5 is very close to the H3 SoC, but has ARMv8 cores.
>> To allow sharing the clocks, GPIO and driver code easily, create an
>> architecture agnostic MACH_SUN8I_H3_H5 Kconfig symbol.
>> Rename the existing symbol to MACH_SUN8I_H3_H5 where code is shared and
>> let it be selected by a new shared Kconfig option.
>
> This isn't really related to sun8i anymore, how about
> MACH_SUNXI_H3_H5?
Even better, I renamed it.
>
> [...]
>
>>
>> +__weak void tzpc_init(void)
>> +{
>> +}
>> +
>> void s_init(void)
>> {
>> /*
>> @@ -188,10 +192,9 @@ void s_init(void)
>> "mcr p15, 0, r0, c1, c0, 1\n"
>> ::: "r0");
>> #endif
>> -#if defined CONFIG_MACH_SUN6I || defined CONFIG_MACH_SUN8I_H3
>> -/* Enable non-secure access to some peripherals */
>> +
>> +/* Enable non-secure access to some peripherals (only if needed) */
>> tzpc_init();
>> -#endif
>
> This looks unrelated to your patch.
Ah, thanks for spotting this. It was an attempt to get rid of some
#ifdef's at all (by using a weak function), but I think I can just drop
it in this patch to keep the patch smaller and confined to one purpose.
Cheers,
Andre.
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Re: [U-Boot] [linux-sunxi] Re: [PATCH 02/12] sunxi: simplify ACTLR.SMP bit set #ifdef
Hi, On 16/01/17 07:44, Maxime Ripard wrote: > On Fri, Jan 13, 2017 at 08:28:07AM +, André Przywara wrote: >> On 13/01/17 08:09, Vishnu Patekar wrote: >> Hi Vishnu, >> >>> Even for the single core cortex-a7, SMP bit should be set before >>> enabling MMU and cache. >>> >>> Reference: Cortex A7 r0p5 TRM. section 4.3.31. >> >> Ah, good point, thanks for the heads up. I was misled by the SMP name >> when answering Icenowy. >> So it's about coherency in general and we need the bit for TLBs and >> caches to work as well. >> Let me check what that means for the other SoCs and whether we need to >> rename the config symbol then. So I checked the other ARMv7 Cortex TRMs, in contrast to the A7 TRM they explicitly speak of cache and TLB requests from other _processors_. So it should not be needed to use caches and the MMU on a uni-core implementation (which seem to be pretty rare with Cortex-A7s). But: my understanding is that it actually controls handling coherency request from outside of the processor core, which could be from a coherent agent on the bus as well, if I get this correctly. So I think it does not hurt to enable the bit on the V3s as well and could avoid potential problems. As this lines up with what the TRM says, we should turn it on as in the other cores. Icenowy: did you see problems with setting this bit and turned it off for a reason or was that just because the bit is named "SMP"? > If we still needs it, First: we definitely need this symbol, since it guards an implementation defined register and the Cortex-A53 does not define it. So we have to confine its use to the ARMv7 Cortex CPUs. > x86 has a CONFIG_SMP symbol, that would be > better to just leverage that. Sounds tempting, but this seems to be a generic symbol that enables SMP support _within_ U-Boot, so it allows multiple cores to execute U-Boot code. This is clearly not what we want. Defining it seems to enable architecture specific and generic code paths in U-Boot. I can rename this symbol if that helps to avoid confusion, for instance to read CONFIG_SUNXI_NO_ACTLR_SMP or to CONFIG_CPU_IS_NOT_SMP or CONFIG_CPU_IS_UP. Cheers, Andre. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 09/12] sunxi: H5: add COUNTER_FREQUENCY
Hi, On 16/01/17 08:01, Maxime Ripard wrote: > On Fri, Jan 13, 2017 at 01:30:01AM +, Andre Przywara wrote: >> For the arch timer to work properly, we need to setup the CNTFRQ >> register, which is only possible in EL3. >> Define the arch timer frequency in sun8i.h as well, so that ARMv8's >> start.S can program the register correctly. >> >> Signed-off-by: Andre Przywara >> --- >> include/configs/sun8i.h | 2 ++ >> 1 file changed, 2 insertions(+) >> >> diff --git a/include/configs/sun8i.h b/include/configs/sun8i.h >> index a4c3fb6..cbb7239 100644 >> --- a/include/configs/sun8i.h >> +++ b/include/configs/sun8i.h >> @@ -13,6 +13,8 @@ >> * A23 specific configuration >> */ >> >> +#define COUNTER_FREQUENCY CONFIG_TIMER_CLK_FREQ >> + > > Why not convert the armv8 code to use CONFIG_TIMER_CLK_FREQ, or armv7 > to use COUNTER_FREQUENCY? > > The both options seem redundant. Good point, they indeed are. So I will drop this patch here and instead have a new one to rename the v7 users over to use COUNTER_FREQUENCY. I chose COUNTER_FREQUENCY because the other symbol has less users. Thanks for the idea! Cheers, Andre. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 3/7] arm: socfpga: update arria5 socdk default environment
On 01/22/2017 12:04 AM, Westergreen, Dalon wrote: > On Sat, 2017-01-21 at 20:29 +0100, Marek Vasut wrote: >> On 01/21/2017 06:31 PM, Dalon Westergreen wrote: >>> >>> From: Dalon Westergreen >>> >>> The default values for CONFIG_SYS_MMCSD_FS_BOOT_PARTITION >>> and CONFIG_SYS_MMCSD_FS_OS_PARTITION have changed and as >>> as result the default uboot environment for this board >>> needs updating. This sets the default envirnment to >>> use the CONFIG_SYS_MMCSD_FS_BOOT_PARTITION and >>> CONFIG_SYS_MMCSD_FS_OS_PARTITION configs for the boot >>> and os partitions. >>> >>> Also set the default fdtimage value to match the >>> devicetree name in the linux kernel for this board. >>> >>> Signed-off-by: Dalon Westergreen >> >> Acked-by: Marek Vasut >> >> but please see my comment on 1/7 >> >> btw I think this is repeating too much, why don't we pull the env into >> socfpga_common.h first ? > > I'd prefer to keep the boards separate and look at > moving to disto boot. If you create common env in socfpga_common.h first and then update it, the update will be in a single patch changing a single file. So will then be the switch to distro bootcmd. I would prefer such course of action over many patches doing the same thing in many files. Given how similar (and broken) the envs are for those boards, pulling the common env should be easy and very beneficial. -- Best regards, Marek Vasut ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 2/2] config: Move CONFIG_BOARD_LATE_INIT to defconfigs
On Sat, Jan 21, 2017 at 11:48:33AM +0100, Jagan Teki wrote: > Cc: Tom Rini > Signed-off-by: Jagan Teki Note: theadorable_debug grows by ~161 bytes in SPL as it had been enabling BOARD_LATE_INIT only for non-SPL which is now not allowed. Applied to u-boot/master, thanks! -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 2/2] status_led: Kconfig migration
On Thu, Jan 19, 2017 at 10:51:45AM +0200, Uri Mashiach wrote: > Move all of the status LED feature to drivers/led/Kconfig. > The LED status definitions were moved from the board configuration > files to the defconfig files. > > TBD: Move all of the definitions in the include/status_led.h to the > relevant board's defconfig files. > > Tested boards: CL-SOM-AM57x, CM-T335 > > Signed-off-by: Uri Mashiach Note: This exposes and fixes a problem on 'motionpro' where code was being discarded that was needed for LEDs to be fully functional. So the platform grows by ~237 bytes, but that's a bugfix. Applied to u-boot/master, thanks! -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 1/2] common: Kconfig: Add BOARD_LATE_INIT entry
On Sat, Jan 21, 2017 at 11:48:32AM +0100, Jagan Teki wrote: > This patch add Kconfig entry for CONFIG_BOARD_LATE_INIT > > Cc: Tom Rini > Signed-off-by: Jagan Teki Applied to u-boot/master, thanks! -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 1/2] status_led: Kconfig migration - introduction
On Thu, Jan 19, 2017 at 10:51:05AM +0200, Uri Mashiach wrote: > Move all of the status LED feature to drivers/led/Kconfig. > doc/README.LED updated to reflect the Kconfig implementation. > > Tested boards: CL-SOM-AM57x, CM-T335 > > Signed-off-by: Uri Mashiach Applied to u-boot/master, thanks! -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] travis-ci: Split p1_p2_rdb_pc and p1010rdb into separate jobs
On occasion the job that does these two build types will hit the time limit so split this in two. Signed-off-by: Tom Rini --- .travis.yml | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/.travis.yml b/.travis.yml index 6c4ea59c3c7f..8024765c3ae3 100644 --- a/.travis.yml +++ b/.travis.yml @@ -190,7 +190,9 @@ matrix: - env: - BUILDMAN="t208xrdb t4qds t102*" - env: -- BUILDMAN="p1_p2_rdb_pc p1010rdb" +- BUILDMAN="p1_p2_rdb_pc" +- env: +- BUILDMAN="p1010rdb" - env: - BUILDMAN="corenet_ds b4860qds sbc8548 bsc91*" - env: -- 1.9.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 1/7] arm: socfpga: update de0 nano default environment
On Sat, 2017-01-21 at 20:28 +0100, Marek Vasut wrote:
On 01/21/2017 06:31 PM, Dalon Westergreen wrote:
From: Dalon Westergreen
mailto:dalon.westergr...@intel.com>>
The default values for CONFIG_SYS_MMCSD_FS_BOOT_PARTITION
and CONFIG_SYS_MMCSD_FS_OS_PARTITION have changed and as
as result the default uboot environment for this board
needs updating. This sets the default envirnment to
use the CONFIG_SYS_MMCSD_FS_BOOT_PARTITION and
CONFIG_SYS_MMCSD_FS_OS_PARTITION configs for the boot
and os partitions.
Also set the default fdtimage value to match the
devicetree name in the linux kernel for this board.
Signed-off-by: Dalon Westergreen
mailto:dalon.westergr...@intel.com>>
While I'm fine with the patch, wouldn't it make more sense to move
toward distro bootcmd (git grep for DISTRO_BOOTCMD, ie RPi is using
it). Major distros agreed on how to handle the U-Boot env, so it'd
be nice to have Altera SoCs follow.
What do you think ?
I like the idea, I think moving in that direction makes sense. For now i
suggest just cleaning
up the current environment so it boots with the current default sdcard image.
Agreed?
de0 fix spaces
This is probably not supposed to be part of the description ? :)
---
include/configs/socfpga_de0_nano_soc.h | 10 ++
1 file changed, 6 insertions(+), 4 deletions(-)
diff --git a/include/configs/socfpga_de0_nano_soc.h
b/include/configs/socfpga_de0_nano_soc.h
index 6b9546e..205b859 100644
--- a/include/configs/socfpga_de0_nano_soc.h
+++ b/include/configs/socfpga_de0_nano_soc.h
@@ -39,15 +39,17 @@
"bootm ${loadaddr} - ${fdt_addr}\0" \
"bootimage=zImage\0" \
"fdt_addr=100\0" \
- "fdtimage=socfpga.dtb\0" \
+ "fdtimage=socfpga_cyclone5_de0_sockit.dtb\0" \
"bootm ${loadaddr} - ${fdt_addr}\0" \
- "mmcroot=/dev/mmcblk0p2\0" \
+ "mmc_boot=" __stringify(CONFIG_SYS_MMCSD_FS_BOOT_PARTITION) "\0" \
+ "mmc_os=" __stringify(CONFIG_SYS_MMCSD_FS_OS_PARTITION) "\0" \
+ "mmcroot=/dev/mmcblk0p${mmc_os}\0" \
"mmcboot=setenv bootargs " CONFIG_BOOTARGS \
" root=${mmcroot} rw rootwait;" \
"bootz ${loadaddr} - ${fdt_addr}\0" \
"mmcload=mmc rescan;" \
- "load mmc 0:1 ${loadaddr} ${bootimage};" \
- "load mmc 0:1 ${fdt_addr} ${fdtimage}\0" \
+ "load mmc 0:${mmc_boot} ${loadaddr} ${bootimage};" \
+ "load mmc 0:${mmc_boot} ${fdt_addr} ${fdtimage}\0" \
/* The rest of the configuration is shared */
#include
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Re: [U-Boot] [PATCH 1/7] arm: socfpga: update de0 nano default environment
On 01/21/2017 10:55 PM, Westergreen, Dalon wrote:
>
> On Sat, 2017-01-21 at 20:28 +0100, Marek Vasut wrote:
>
> On 01/21/2017 06:31 PM, Dalon Westergreen wrote:
>
>
> From: Dalon Westergreen
> mailto:dalon.westergr...@intel.com>>
>
> The default values for CONFIG_SYS_MMCSD_FS_BOOT_PARTITION
> and CONFIG_SYS_MMCSD_FS_OS_PARTITION have changed and as
> as result the default uboot environment for this board
> needs updating. This sets the default envirnment to
> use the CONFIG_SYS_MMCSD_FS_BOOT_PARTITION and
> CONFIG_SYS_MMCSD_FS_OS_PARTITION configs for the boot
> and os partitions.
>
> Also set the default fdtimage value to match the
> devicetree name in the linux kernel for this board.
>
> Signed-off-by: Dalon Westergreen
> mailto:dalon.westergr...@intel.com>>
>
>
>
> While I'm fine with the patch, wouldn't it make more sense to move
> toward distro bootcmd (git grep for DISTRO_BOOTCMD, ie RPi is using
> it). Major distros agreed on how to handle the U-Boot env, so it'd
> be nice to have Altera SoCs follow.
>
> What do you think ?
>
>
>
> I like the idea, I think moving in that direction makes sense. For now i
> suggest just cleaning
> up the current environment so it boots with the current default sdcard image.
> Agreed?
That's fine.
btw please fix your mailer and stop top-posting.
> de0 fix spaces
>
>
>
> This is probably not supposed to be part of the description ? :)
>
>
>
> ---
> include/configs/socfpga_de0_nano_soc.h | 10 ++
> 1 file changed, 6 insertions(+), 4 deletions(-)
>
> diff --git a/include/configs/socfpga_de0_nano_soc.h
> b/include/configs/socfpga_de0_nano_soc.h
> index 6b9546e..205b859 100644
> --- a/include/configs/socfpga_de0_nano_soc.h
> +++ b/include/configs/socfpga_de0_nano_soc.h
> @@ -39,15 +39,17 @@
> "bootm ${loadaddr} - ${fdt_addr}\0" \
> "bootimage=zImage\0" \
> "fdt_addr=100\0" \
> - "fdtimage=socfpga.dtb\0" \
> + "fdtimage=socfpga_cyclone5_de0_sockit.dtb\0" \
> "bootm ${loadaddr} - ${fdt_addr}\0" \
> - "mmcroot=/dev/mmcblk0p2\0" \
> + "mmc_boot=" __stringify(CONFIG_SYS_MMCSD_FS_BOOT_PARTITION) "\0" \
> + "mmc_os=" __stringify(CONFIG_SYS_MMCSD_FS_OS_PARTITION) "\0" \
> + "mmcroot=/dev/mmcblk0p${mmc_os}\0" \
> "mmcboot=setenv bootargs " CONFIG_BOOTARGS \
> " root=${mmcroot} rw rootwait;" \
> "bootz ${loadaddr} - ${fdt_addr}\0" \
> "mmcload=mmc rescan;" \
> - "load mmc 0:1 ${loadaddr} ${bootimage};" \
> - "load mmc 0:1 ${fdt_addr} ${fdtimage}\0" \
> + "load mmc 0:${mmc_boot} ${loadaddr} ${bootimage};" \
> + "load mmc 0:${mmc_boot} ${fdt_addr} ${fdtimage}\0" \
>
> /* The rest of the configuration is shared */
> #include
>
>
>
>
>
>
--
Best regards,
Marek Vasut
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[U-Boot] [PATCH v1] x86: make LOAD_FROM_32_BIT visible for platforms
This option useful not only for development, but for the platforms where U-Boot is run from custom ROM bootloader. For example, Intel Edison is that board. Make this option visible that platforms can select it if needed. Signed-off-by: Andy Shevchenko --- arch/x86/Kconfig | 4 arch/x86/cpu/start.S | 3 +-- 2 files changed, 5 insertions(+), 2 deletions(-) diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig index 0884af22a7..d75ad61d99 100644 --- a/arch/x86/Kconfig +++ b/arch/x86/Kconfig @@ -89,6 +89,10 @@ config X86_RESET_VECTOR bool default n +config X86_LOAD_FROM_32_BIT + bool + default n + config RESET_SEG_START hex depends on X86_RESET_VECTOR diff --git a/arch/x86/cpu/start.S b/arch/x86/cpu/start.S index a5cba1cf2a..eb4ade6f8c 100644 --- a/arch/x86/cpu/start.S +++ b/arch/x86/cpu/start.S @@ -22,9 +22,8 @@ * Define this to boot U-Boot from a 32-bit program which sets the GDT * differently. This can be used to boot directly from any stage of coreboot, * for example, bypassing the normal payload-loading feature. - * This is only useful for development. */ -#undef LOAD_FROM_32_BIT +#define LOAD_FROM_32_BIT CONFIG_X86_LOAD_FROM_32_BIT .section .text .code32 -- 2.11.0 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] twister fails to start u-boot from NAND
Hi,
I am facing some issues when booting u-boot (755b06d1c0f) from
_NAND_ on a twister board. It works fine when booting from mmc.
u-boot v2016.09 works fine from NAND as well.
The first issue is that it hangs after DRAM initialization /
before NAND is found. Git bisect points to 085be482f6
(ARM: revive CONFIG_USE_ARCH_MEMCPY/MEMSET for UniPhier and Tegra)
and while reverting that patch makes the issue go away, it doesn't
seem to me like the root cause.
With the patch reverted, the board hangs after getting the first
ethernet address from the i2c EEPROM.
Disabling reading from the EEPROM, it reaches the prompt but every
issued command cause a data abort.
So clearly something is wrong, but I have no clue what at the moment.
I guess the most likely area which could cause such an issue would be
the spl NAND driver corrupting memory or something, since it is the
main difference between booting from mmc vs NAND. However almost
nothing has changed in that area since v2016.09...
Perhaps stack usage is significantly higher in the NAND boot..?
If someone has idea what could be wrong here, let me know.
With kind regards,
Jeroen
to reproduce:
---
arm-linux-gnueabi-gcc (Ubuntu/Linaro 5.4.0-6ubuntu1~16.04.4) 5.4.0 20160609
# from sd-card
env default -f -a
fatload mmc 0 ${loadaddr} u-boot.img && run update
fatload mmc 0 ${loadaddr} mlo && run updatemlo
# remove sd-card / reboot
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Re: [U-Boot] [PATCH 6/7] arm: socfpga: Update sr1500 environment
On 01/21/2017 06:31 PM, Dalon Westergreen wrote:
> From: Dalon Westergreen
>
> The default values for CONFIG_SYS_MMCSD_FS_BOOT_PARTITION
> and CONFIG_SYS_MMCSD_FS_OS_PARTITION have changed and as
> as result the default uboot environment for this board
> needs updating. This sets the default envirnment to
> use the CONFIG_SYS_MMCSD_FS_BOOT_PARTITION and
> CONFIG_SYS_MMCSD_FS_OS_PARTITION configs for the boot
> and os partitions.
>
> Signed-off-by: Dalon Westergreen
Please CC Stefan on this patch next time, I want his ACK on this patch too.
> ---
> include/configs/socfpga_sr1500.h | 8 +---
> 1 file changed, 5 insertions(+), 3 deletions(-)
>
> diff --git a/include/configs/socfpga_sr1500.h
> b/include/configs/socfpga_sr1500.h
> index 0407f03..6f7baad 100644
> --- a/include/configs/socfpga_sr1500.h
> +++ b/include/configs/socfpga_sr1500.h
> @@ -42,13 +42,15 @@
> "fdtimage=socfpga.dtb\0" \
> "fsloadcmd=ext2load\0" \
> "bootm ${loadaddr} - ${fdt_addr}\0" \
> - "mmcroot=/dev/mmcblk0p2\0" \
> + "mmc_boot=" __stringify(CONFIG_SYS_MMCSD_FS_BOOT_PARTITION) "\0" \
> + "mmc_os=" __stringify(CONFIG_SYS_MMCSD_FS_OS_PARTITION) "\0" \
> + "mmcroot=/dev/mmcblk0p${mmc_os}\0" \
> "mmcboot=setenv bootargs " CONFIG_BOOTARGS \
> " root=${mmcroot} rw rootwait;" \
> "bootz ${loadaddr} - ${fdt_addr}\0" \
> "mmcload=mmc rescan;" \
> - "load mmc 0:1 ${loadaddr} ${bootimage};" \
> - "load mmc 0:1 ${fdt_addr} ${fdtimage}\0" \
> + "load mmc 0:${mmc_boot} ${loadaddr} ${bootimage};" \
> + "load mmc 0:${mmc_boot} ${fdt_addr} ${fdtimage}\0" \
> "qspiload=sf probe && mtdparts default && run ubiload\0" \
> "qspiboot=setenv bootargs " CONFIG_BOOTARGS \
> " ubi.mtd=1,64 root=ubi0:rootfs rw rootfstype=ubifs;"\
>
--
Best regards,
Marek Vasut
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Re: [U-Boot] [PATCH 2/7] arm: socfpga: update cyclone5 socdk default environment
On 01/21/2017 06:31 PM, Dalon Westergreen wrote:
> From: Dalon Westergreen
>
> The default values for CONFIG_SYS_MMCSD_FS_BOOT_PARTITION
> and CONFIG_SYS_MMCSD_FS_OS_PARTITION have changed and as
> as result the default uboot environment for this board
> needs updating. This sets the default envirnment to
> use the CONFIG_SYS_MMCSD_FS_BOOT_PARTITION and
> CONFIG_SYS_MMCSD_FS_OS_PARTITION configs for the boot
> and os partitions.
>
> Also set the default fdtimage value to match the
> devicetree name in the linux kernel for this board.
>
> Signed-off-by: Dalon Westergreen
Acked-by: Marek Vasut
but please see my comment on 1/7
> ---
> include/configs/socfpga_cyclone5_socdk.h | 10 ++
> 1 file changed, 6 insertions(+), 4 deletions(-)
>
> diff --git a/include/configs/socfpga_cyclone5_socdk.h
> b/include/configs/socfpga_cyclone5_socdk.h
> index 7ced6a6..94355ce 100644
> --- a/include/configs/socfpga_cyclone5_socdk.h
> +++ b/include/configs/socfpga_cyclone5_socdk.h
> @@ -44,15 +44,17 @@
> "bootm ${loadaddr} - ${fdt_addr}\0" \
> "bootimage=zImage\0" \
> "fdt_addr=100\0" \
> - "fdtimage=socfpga.dtb\0" \
> + "fdtimage=socfpga_cyclone5_socdk.dtb\0" \
> "bootm ${loadaddr} - ${fdt_addr}\0" \
> - "mmcroot=/dev/mmcblk0p2\0" \
> + "mmc_boot=" __stringify(CONFIG_SYS_MMCSD_FS_BOOT_PARTITION) "\0" \
> + "mmc_os=" __stringify(CONFIG_SYS_MMCSD_FS_OS_PARTITION) "\0" \
> + "mmcroot=/dev/mmcblk0p${mmc_os}\0" \
> "mmcboot=setenv bootargs " CONFIG_BOOTARGS \
> " root=${mmcroot} rw rootwait;" \
> "bootz ${loadaddr} - ${fdt_addr}\0" \
> "mmcload=mmc rescan;" \
> - "load mmc 0:1 ${loadaddr} ${bootimage};" \
> - "load mmc 0:1 ${fdt_addr} ${fdtimage}\0" \
> + "load mmc 0:${mmc_boot} ${loadaddr} ${bootimage};" \
> + "load mmc 0:${mmc_boot} ${fdt_addr} ${fdtimage}\0" \
> "qspiload=sf probe && mtdparts default && run ubiload\0" \
> "qspiboot=setenv bootargs " CONFIG_BOOTARGS \
> " ubi.mtd=1,64 root=ubi0:rootfs rw rootfstype=ubifs;"\
>
--
Best regards,
Marek Vasut
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Re: [U-Boot] [PATCH 3/7] arm: socfpga: update arria5 socdk default environment
On 01/21/2017 06:31 PM, Dalon Westergreen wrote:
> From: Dalon Westergreen
>
> The default values for CONFIG_SYS_MMCSD_FS_BOOT_PARTITION
> and CONFIG_SYS_MMCSD_FS_OS_PARTITION have changed and as
> as result the default uboot environment for this board
> needs updating. This sets the default envirnment to
> use the CONFIG_SYS_MMCSD_FS_BOOT_PARTITION and
> CONFIG_SYS_MMCSD_FS_OS_PARTITION configs for the boot
> and os partitions.
>
> Also set the default fdtimage value to match the
> devicetree name in the linux kernel for this board.
>
> Signed-off-by: Dalon Westergreen
Acked-by: Marek Vasut
but please see my comment on 1/7
btw I think this is repeating too much, why don't we pull the env into
socfpga_common.h first ?
> ---
> include/configs/socfpga_arria5_socdk.h | 10 ++
> 1 file changed, 6 insertions(+), 4 deletions(-)
>
> diff --git a/include/configs/socfpga_arria5_socdk.h
> b/include/configs/socfpga_arria5_socdk.h
> index 3b0b416..0a7fcd2 100644
> --- a/include/configs/socfpga_arria5_socdk.h
> +++ b/include/configs/socfpga_arria5_socdk.h
> @@ -44,15 +44,17 @@
> "bootm ${loadaddr} - ${fdt_addr}\0" \
> "bootimage=zImage\0" \
> "fdt_addr=100\0" \
> - "fdtimage=socfpga.dtb\0" \
> + "fdtimage=socfpga_arria5_socdk.dtb\0" \
> "bootm ${loadaddr} - ${fdt_addr}\0" \
> - "mmcroot=/dev/mmcblk0p2\0" \
> + "mmc_boot=" __stringify(CONFIG_SYS_MMCSD_FS_BOOT_PARTITION) "\0" \
> + "mmc_os=" __stringify(CONFIG_SYS_MMCSD_FS_OS_PARTITION) "\0" \
> + "mmcroot=/dev/mmcblk0p${mmc_os}\0" \
> "mmcboot=setenv bootargs " CONFIG_BOOTARGS \
> " root=${mmcroot} rw rootwait;" \
> "bootz ${loadaddr} - ${fdt_addr}\0" \
> "mmcload=mmc rescan;" \
> - "load mmc 0:1 ${loadaddr} ${bootimage};" \
> - "load mmc 0:1 ${fdt_addr} ${fdtimage}\0" \
> + "load mmc 0:${mmc_boot} ${loadaddr} ${bootimage};" \
> + "load mmc 0:${mmc_boot} ${fdt_addr} ${fdtimage}\0" \
> "qspiload=sf probe && mtdparts default && run ubiload\0" \
> "qspiboot=setenv bootargs " CONFIG_BOOTARGS \
> " ubi.mtd=1,64 root=ubi0:rootfs rw rootfstype=ubifs;"\
>
--
Best regards,
Marek Vasut
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Re: [U-Boot] [PATCH 1/7] arm: socfpga: update de0 nano default environment
On 01/21/2017 06:31 PM, Dalon Westergreen wrote:
> From: Dalon Westergreen
>
> The default values for CONFIG_SYS_MMCSD_FS_BOOT_PARTITION
> and CONFIG_SYS_MMCSD_FS_OS_PARTITION have changed and as
> as result the default uboot environment for this board
> needs updating. This sets the default envirnment to
> use the CONFIG_SYS_MMCSD_FS_BOOT_PARTITION and
> CONFIG_SYS_MMCSD_FS_OS_PARTITION configs for the boot
> and os partitions.
>
> Also set the default fdtimage value to match the
> devicetree name in the linux kernel for this board.
>
> Signed-off-by: Dalon Westergreen
While I'm fine with the patch, wouldn't it make more sense to move
toward distro bootcmd (git grep for DISTRO_BOOTCMD, ie RPi is using
it). Major distros agreed on how to handle the U-Boot env, so it'd
be nice to have Altera SoCs follow.
What do you think ?
>
> de0 fix spaces
This is probably not supposed to be part of the description ? :)
> ---
> include/configs/socfpga_de0_nano_soc.h | 10 ++
> 1 file changed, 6 insertions(+), 4 deletions(-)
>
> diff --git a/include/configs/socfpga_de0_nano_soc.h
> b/include/configs/socfpga_de0_nano_soc.h
> index 6b9546e..205b859 100644
> --- a/include/configs/socfpga_de0_nano_soc.h
> +++ b/include/configs/socfpga_de0_nano_soc.h
> @@ -39,15 +39,17 @@
> "bootm ${loadaddr} - ${fdt_addr}\0" \
> "bootimage=zImage\0" \
> "fdt_addr=100\0" \
> - "fdtimage=socfpga.dtb\0" \
> + "fdtimage=socfpga_cyclone5_de0_sockit.dtb\0" \
> "bootm ${loadaddr} - ${fdt_addr}\0" \
> - "mmcroot=/dev/mmcblk0p2\0" \
> + "mmc_boot=" __stringify(CONFIG_SYS_MMCSD_FS_BOOT_PARTITION) "\0" \
> + "mmc_os=" __stringify(CONFIG_SYS_MMCSD_FS_OS_PARTITION) "\0" \
> + "mmcroot=/dev/mmcblk0p${mmc_os}\0" \
> "mmcboot=setenv bootargs " CONFIG_BOOTARGS \
> " root=${mmcroot} rw rootwait;" \
> "bootz ${loadaddr} - ${fdt_addr}\0" \
> "mmcload=mmc rescan;" \
> - "load mmc 0:1 ${loadaddr} ${bootimage};" \
> - "load mmc 0:1 ${fdt_addr} ${fdtimage}\0" \
> + "load mmc 0:${mmc_boot} ${loadaddr} ${bootimage};" \
> + "load mmc 0:${mmc_boot} ${fdt_addr} ${fdtimage}\0" \
>
> /* The rest of the configuration is shared */
> #include
>
--
Best regards,
Marek Vasut
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Re: [U-Boot] [PATCH 7/7] arm: socfpga: add support for Terasic DE10-Nano board
On 01/21/2017 06:31 PM, Dalon Westergreen wrote: > Add CycloneV based Terasic DE10 Nano board. The > board is based on the DE0 Nano but has a larger > fpga. > > Signed-off-by: Dalon Westergreen This should be sent as a separate patch from the env update patchset. Please send this again, but add my Acked-by: Marek Vasut I'd still like Dinh's review though. Thanks! > --- > arch/arm/dts/Makefile | 1 + > arch/arm/dts/socfpga_cyclone5_de10_nano.dts | 68 +++ > arch/arm/mach-socfpga/Kconfig | 7 + > board/terasic/de10-nano/MAINTAINERS | 5 + > board/terasic/de10-nano/Makefile| 9 + > board/terasic/de10-nano/qts/iocsr_config.h | 660 > > board/terasic/de10-nano/qts/pinmux_config.h | 219 + > board/terasic/de10-nano/qts/pll_config.h| 85 > board/terasic/de10-nano/qts/sdram_config.h | 344 +++ > board/terasic/de10-nano/socfpga.c | 6 + > configs/socfpga_de10_nano_defconfig | 60 +++ > include/configs/socfpga_de10_nano.h | 57 +++ > 12 files changed, 1521 insertions(+) > create mode 100644 arch/arm/dts/socfpga_cyclone5_de10_nano.dts > create mode 100644 board/terasic/de10-nano/MAINTAINERS > create mode 100644 board/terasic/de10-nano/Makefile > create mode 100644 board/terasic/de10-nano/qts/iocsr_config.h > create mode 100644 board/terasic/de10-nano/qts/pinmux_config.h > create mode 100644 board/terasic/de10-nano/qts/pll_config.h > create mode 100644 board/terasic/de10-nano/qts/sdram_config.h > create mode 100644 board/terasic/de10-nano/socfpga.c > create mode 100644 configs/socfpga_de10_nano_defconfig > create mode 100644 include/configs/socfpga_de10_nano.h [...] -- Best regards, Marek Vasut ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 7/7] arm: socfpga: add support for Terasic DE10-Nano board
Add CycloneV based Terasic DE10 Nano board. The
board is based on the DE0 Nano but has a larger
fpga.
Signed-off-by: Dalon Westergreen
---
arch/arm/dts/Makefile | 1 +
arch/arm/dts/socfpga_cyclone5_de10_nano.dts | 68 +++
arch/arm/mach-socfpga/Kconfig | 7 +
board/terasic/de10-nano/MAINTAINERS | 5 +
board/terasic/de10-nano/Makefile| 9 +
board/terasic/de10-nano/qts/iocsr_config.h | 660
board/terasic/de10-nano/qts/pinmux_config.h | 219 +
board/terasic/de10-nano/qts/pll_config.h| 85
board/terasic/de10-nano/qts/sdram_config.h | 344 +++
board/terasic/de10-nano/socfpga.c | 6 +
configs/socfpga_de10_nano_defconfig | 60 +++
include/configs/socfpga_de10_nano.h | 57 +++
12 files changed, 1521 insertions(+)
create mode 100644 arch/arm/dts/socfpga_cyclone5_de10_nano.dts
create mode 100644 board/terasic/de10-nano/MAINTAINERS
create mode 100644 board/terasic/de10-nano/Makefile
create mode 100644 board/terasic/de10-nano/qts/iocsr_config.h
create mode 100644 board/terasic/de10-nano/qts/pinmux_config.h
create mode 100644 board/terasic/de10-nano/qts/pll_config.h
create mode 100644 board/terasic/de10-nano/qts/sdram_config.h
create mode 100644 board/terasic/de10-nano/socfpga.c
create mode 100644 configs/socfpga_de10_nano_defconfig
create mode 100644 include/configs/socfpga_de10_nano.h
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 66ea0b3..1b92e47 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -134,6 +134,7 @@ dtb-$(CONFIG_ARCH_SOCFPGA) +=
\
socfpga_cyclone5_socdk.dtb \
socfpga_cyclone5_de0_nano_soc.dtb \
socfpga_cyclone5_de1_soc.dtb\
+ socfpga_cyclone5_de10_nano.dtb \
socfpga_cyclone5_sockit.dtb \
socfpga_cyclone5_socrates.dtb \
socfpga_cyclone5_sr1500.dtb \
diff --git a/arch/arm/dts/socfpga_cyclone5_de10_nano.dts
b/arch/arm/dts/socfpga_cyclone5_de10_nano.dts
new file mode 100644
index 000..ee62a50
--- /dev/null
+++ b/arch/arm/dts/socfpga_cyclone5_de10_nano.dts
@@ -0,0 +1,68 @@
+/*
+ * Copyright (C) 2017, Intel Corporation
+ *
+ * based on socfpga_cyclone5_de0_nano_soc.dts
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include "socfpga_cyclone5.dtsi"
+
+/ {
+ model = "Terasic DE10-Nano";
+ compatible = "altr,socfpga-cyclone5", "altr,socfpga";
+
+ chosen {
+ bootargs = "console=ttyS0,115200";
+ };
+
+ aliases {
+ ethernet0 = &gmac1;
+ udc0 = &usb1;
+ };
+
+ memory {
+ name = "memory";
+ device_type = "memory";
+ reg = <0x0 0x4000>; /* 1GB */
+ };
+
+ soc {
+ u-boot,dm-pre-reloc;
+ };
+};
+
+&gmac1 {
+ status = "okay";
+ phy-mode = "rgmii";
+
+ rxd0-skew-ps = <420>;
+ rxd1-skew-ps = <420>;
+ rxd2-skew-ps = <420>;
+ rxd3-skew-ps = <420>;
+ txen-skew-ps = <0>;
+ txc-skew-ps = <1860>;
+ rxdv-skew-ps = <420>;
+ rxc-skew-ps = <1680>;
+};
+
+&gpio0 {
+ status = "okay";
+};
+
+&gpio1 {
+ status = "okay";
+};
+
+&gpio2 {
+ status = "okay";
+};
+
+&mmc0 {
+ status = "okay";
+ u-boot,dm-pre-reloc;
+};
+
+&usb1 {
+ status = "okay";
+};
diff --git a/arch/arm/mach-socfpga/Kconfig b/arch/arm/mach-socfpga/Kconfig
index 6991af8..5da2acd 100644
--- a/arch/arm/mach-socfpga/Kconfig
+++ b/arch/arm/mach-socfpga/Kconfig
@@ -78,6 +78,10 @@ config TARGET_SOCFPGA_TERASIC_DE1_SOC
bool "Terasic DE1-SoC (Cyclone V)"
select TARGET_SOCFPGA_CYCLONE5
+config TARGET_SOCFPGA_TERASIC_DE10_NANO
+ bool "Terasic DE10-Nano (Cyclone V)"
+ select TARGET_SOCFPGA_CYCLONE5
+
config TARGET_SOCFPGA_TERASIC_SOCKIT
bool "Terasic SoCkit (Cyclone V)"
select TARGET_SOCFPGA_CYCLONE5
@@ -89,6 +93,7 @@ config SYS_BOARD
default "cyclone5-socdk" if TARGET_SOCFPGA_CYCLONE5_SOCDK
default "de0-nano-soc" if TARGET_SOCFPGA_TERASIC_DE0_NANO
default "de1-soc" if TARGET_SOCFPGA_TERASIC_DE1_SOC
+ default "de10-nano" if TARGET_SOCFPGA_TERASIC_DE10_NANO
default "is1" if TARGET_SOCFPGA_IS1
default "mcvevk" if TARGET_SOCFPGA_DENX_MCVEVK
default "sockit" if TARGET_SOCFPGA_TERASIC_SOCKIT
@@ -105,6 +110,7 @@ config SYS_VENDOR
default "terasic" if TARGET_SOCFPGA_TERASIC_DE0_NANO
default "terasic" if TARGET_SOCFPGA_TERASIC_DE1_SOC
default "terasic" if TARGET_SOCFPGA_TERASIC_SOCKIT
+ default "terasic" if TARGET_SOCFPGA_TERASIC_DE10_NANO
config SYS_SOC
default "socfpga"
@@ -114,6 +120,7 @@ config SYS_CONFIG_NAME
default "socfpga_cyclone5_socdk" if TARGET_SOCFP
[U-Boot] [PATCH 2/7] arm: socfpga: update cyclone5 socdk default environment
From: Dalon Westergreen
The default values for CONFIG_SYS_MMCSD_FS_BOOT_PARTITION
and CONFIG_SYS_MMCSD_FS_OS_PARTITION have changed and as
as result the default uboot environment for this board
needs updating. This sets the default envirnment to
use the CONFIG_SYS_MMCSD_FS_BOOT_PARTITION and
CONFIG_SYS_MMCSD_FS_OS_PARTITION configs for the boot
and os partitions.
Also set the default fdtimage value to match the
devicetree name in the linux kernel for this board.
Signed-off-by: Dalon Westergreen
---
include/configs/socfpga_cyclone5_socdk.h | 10 ++
1 file changed, 6 insertions(+), 4 deletions(-)
diff --git a/include/configs/socfpga_cyclone5_socdk.h
b/include/configs/socfpga_cyclone5_socdk.h
index 7ced6a6..94355ce 100644
--- a/include/configs/socfpga_cyclone5_socdk.h
+++ b/include/configs/socfpga_cyclone5_socdk.h
@@ -44,15 +44,17 @@
"bootm ${loadaddr} - ${fdt_addr}\0" \
"bootimage=zImage\0" \
"fdt_addr=100\0" \
- "fdtimage=socfpga.dtb\0" \
+ "fdtimage=socfpga_cyclone5_socdk.dtb\0" \
"bootm ${loadaddr} - ${fdt_addr}\0" \
- "mmcroot=/dev/mmcblk0p2\0" \
+ "mmc_boot=" __stringify(CONFIG_SYS_MMCSD_FS_BOOT_PARTITION) "\0" \
+ "mmc_os=" __stringify(CONFIG_SYS_MMCSD_FS_OS_PARTITION) "\0" \
+ "mmcroot=/dev/mmcblk0p${mmc_os}\0" \
"mmcboot=setenv bootargs " CONFIG_BOOTARGS \
" root=${mmcroot} rw rootwait;" \
"bootz ${loadaddr} - ${fdt_addr}\0" \
"mmcload=mmc rescan;" \
- "load mmc 0:1 ${loadaddr} ${bootimage};" \
- "load mmc 0:1 ${fdt_addr} ${fdtimage}\0" \
+ "load mmc 0:${mmc_boot} ${loadaddr} ${bootimage};" \
+ "load mmc 0:${mmc_boot} ${fdt_addr} ${fdtimage}\0" \
"qspiload=sf probe && mtdparts default && run ubiload\0" \
"qspiboot=setenv bootargs " CONFIG_BOOTARGS \
" ubi.mtd=1,64 root=ubi0:rootfs rw rootfstype=ubifs;"\
--
2.7.4
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[U-Boot] [PATCH 6/7] arm: socfpga: Update sr1500 environment
From: Dalon Westergreen
The default values for CONFIG_SYS_MMCSD_FS_BOOT_PARTITION
and CONFIG_SYS_MMCSD_FS_OS_PARTITION have changed and as
as result the default uboot environment for this board
needs updating. This sets the default envirnment to
use the CONFIG_SYS_MMCSD_FS_BOOT_PARTITION and
CONFIG_SYS_MMCSD_FS_OS_PARTITION configs for the boot
and os partitions.
Signed-off-by: Dalon Westergreen
---
include/configs/socfpga_sr1500.h | 8 +---
1 file changed, 5 insertions(+), 3 deletions(-)
diff --git a/include/configs/socfpga_sr1500.h b/include/configs/socfpga_sr1500.h
index 0407f03..6f7baad 100644
--- a/include/configs/socfpga_sr1500.h
+++ b/include/configs/socfpga_sr1500.h
@@ -42,13 +42,15 @@
"fdtimage=socfpga.dtb\0" \
"fsloadcmd=ext2load\0" \
"bootm ${loadaddr} - ${fdt_addr}\0" \
- "mmcroot=/dev/mmcblk0p2\0" \
+ "mmc_boot=" __stringify(CONFIG_SYS_MMCSD_FS_BOOT_PARTITION) "\0" \
+ "mmc_os=" __stringify(CONFIG_SYS_MMCSD_FS_OS_PARTITION) "\0" \
+ "mmcroot=/dev/mmcblk0p${mmc_os}\0" \
"mmcboot=setenv bootargs " CONFIG_BOOTARGS \
" root=${mmcroot} rw rootwait;" \
"bootz ${loadaddr} - ${fdt_addr}\0" \
"mmcload=mmc rescan;" \
- "load mmc 0:1 ${loadaddr} ${bootimage};" \
- "load mmc 0:1 ${fdt_addr} ${fdtimage}\0" \
+ "load mmc 0:${mmc_boot} ${loadaddr} ${bootimage};" \
+ "load mmc 0:${mmc_boot} ${fdt_addr} ${fdtimage}\0" \
"qspiload=sf probe && mtdparts default && run ubiload\0" \
"qspiboot=setenv bootargs " CONFIG_BOOTARGS \
" ubi.mtd=1,64 root=ubi0:rootfs rw rootfstype=ubifs;"\
--
2.7.4
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[U-Boot] [PATCH 4/7] arm: socfpga: Update DE1 environment
From: Dalon Westergreen
The default values for CONFIG_SYS_MMCSD_FS_BOOT_PARTITION
and CONFIG_SYS_MMCSD_FS_OS_PARTITION have changed and as
as result the default uboot environment for this board
needs updating. This sets the default envirnment to
use the CONFIG_SYS_MMCSD_FS_BOOT_PARTITION and
CONFIG_SYS_MMCSD_FS_OS_PARTITION configs for the boot
and os partitions.
Signed-off-by: Dalon Westergreen
---
include/configs/socfpga_de1_soc.h | 8 +---
1 file changed, 5 insertions(+), 3 deletions(-)
diff --git a/include/configs/socfpga_de1_soc.h
b/include/configs/socfpga_de1_soc.h
index deec647..3abd28c 100644
--- a/include/configs/socfpga_de1_soc.h
+++ b/include/configs/socfpga_de1_soc.h
@@ -41,13 +41,15 @@
"fdtaddr=100\0" \
"fdtimage=socfpga.dtb\0" \
"bootm ${loadaddr} - ${fdtaddr}\0" \
- "mmcroot=/dev/mmcblk0p2\0" \
+ "mmc_boot=" __stringify(CONFIG_SYS_MMCSD_FS_BOOT_PARTITION) "\0" \
+ "mmc_os=" __stringify(CONFIG_SYS_MMCSD_FS_OS_PARTITION) "\0" \
+ "mmcroot=/dev/mmcblk0p${mmc_os}\0" \
"mmcboot=setenv bootargs " CONFIG_BOOTARGS \
" root=${mmcroot} rw rootwait;" \
"bootz ${loadaddr} - ${fdtaddr}\0" \
"mmcload=mmc rescan;" \
- "load mmc 0:1 ${loadaddr} ${bootimage};" \
- "load mmc 0:1 ${fdtaddr} ${fdtimage}\0" \
+ "load mmc 0:${mmc_boot} ${loadaddr} ${bootimage};" \
+ "load mmc 0:${mmc_boot} ${fdtaddr} ${fdtimage}\0" \
/* The rest of the configuration is shared */
#include
--
2.7.4
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[U-Boot] [PATCH 3/7] arm: socfpga: update arria5 socdk default environment
From: Dalon Westergreen
The default values for CONFIG_SYS_MMCSD_FS_BOOT_PARTITION
and CONFIG_SYS_MMCSD_FS_OS_PARTITION have changed and as
as result the default uboot environment for this board
needs updating. This sets the default envirnment to
use the CONFIG_SYS_MMCSD_FS_BOOT_PARTITION and
CONFIG_SYS_MMCSD_FS_OS_PARTITION configs for the boot
and os partitions.
Also set the default fdtimage value to match the
devicetree name in the linux kernel for this board.
Signed-off-by: Dalon Westergreen
---
include/configs/socfpga_arria5_socdk.h | 10 ++
1 file changed, 6 insertions(+), 4 deletions(-)
diff --git a/include/configs/socfpga_arria5_socdk.h
b/include/configs/socfpga_arria5_socdk.h
index 3b0b416..0a7fcd2 100644
--- a/include/configs/socfpga_arria5_socdk.h
+++ b/include/configs/socfpga_arria5_socdk.h
@@ -44,15 +44,17 @@
"bootm ${loadaddr} - ${fdt_addr}\0" \
"bootimage=zImage\0" \
"fdt_addr=100\0" \
- "fdtimage=socfpga.dtb\0" \
+ "fdtimage=socfpga_arria5_socdk.dtb\0" \
"bootm ${loadaddr} - ${fdt_addr}\0" \
- "mmcroot=/dev/mmcblk0p2\0" \
+ "mmc_boot=" __stringify(CONFIG_SYS_MMCSD_FS_BOOT_PARTITION) "\0" \
+ "mmc_os=" __stringify(CONFIG_SYS_MMCSD_FS_OS_PARTITION) "\0" \
+ "mmcroot=/dev/mmcblk0p${mmc_os}\0" \
"mmcboot=setenv bootargs " CONFIG_BOOTARGS \
" root=${mmcroot} rw rootwait;" \
"bootz ${loadaddr} - ${fdt_addr}\0" \
"mmcload=mmc rescan;" \
- "load mmc 0:1 ${loadaddr} ${bootimage};" \
- "load mmc 0:1 ${fdt_addr} ${fdtimage}\0" \
+ "load mmc 0:${mmc_boot} ${loadaddr} ${bootimage};" \
+ "load mmc 0:${mmc_boot} ${fdt_addr} ${fdtimage}\0" \
"qspiload=sf probe && mtdparts default && run ubiload\0" \
"qspiboot=setenv bootargs " CONFIG_BOOTARGS \
" ubi.mtd=1,64 root=ubi0:rootfs rw rootfstype=ubifs;"\
--
2.7.4
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[U-Boot] [PATCH 5/7] arm: socfpga: Update SoCKit environment
From: Dalon Westergreen
The default values for CONFIG_SYS_MMCSD_FS_BOOT_PARTITION
and CONFIG_SYS_MMCSD_FS_OS_PARTITION have changed and as
as result the default uboot environment for this board
needs updating. This sets the default envirnment to
use the CONFIG_SYS_MMCSD_FS_BOOT_PARTITION and
CONFIG_SYS_MMCSD_FS_OS_PARTITION configs for the boot
and os partitions.
Signed-off-by: Dalon Westergreen
---
include/configs/socfpga_sockit.h | 8 +---
1 file changed, 5 insertions(+), 3 deletions(-)
diff --git a/include/configs/socfpga_sockit.h b/include/configs/socfpga_sockit.h
index 3fceb31..de609ba 100644
--- a/include/configs/socfpga_sockit.h
+++ b/include/configs/socfpga_sockit.h
@@ -42,13 +42,15 @@
"fdt_addr=100\0" \
"fdtimage=socfpga.dtb\0" \
"bootm ${loadaddr} - ${fdt_addr}\0" \
- "mmcroot=/dev/mmcblk0p2\0" \
+ "mmc_boot=" __stringify(CONFIG_SYS_MMCSD_FS_BOOT_PARTITION) "\0" \
+ "mmc_os=" __stringify(CONFIG_SYS_MMCSD_FS_OS_PARTITION) "\0" \
+ "mmcroot=/dev/mmcblk0p${mmc_os}\0" \
"mmcboot=setenv bootargs " CONFIG_BOOTARGS \
" root=${mmcroot} rw rootwait;" \
"bootz ${loadaddr} - ${fdt_addr}\0" \
"mmcload=mmc rescan;" \
- "load mmc 0:1 ${loadaddr} ${bootimage};" \
- "load mmc 0:1 ${fdt_addr} ${fdtimage}\0" \
+ "load mmc 0:${mmc_boot} ${loadaddr} ${bootimage};" \
+ "load mmc 0:${mmc_boot} ${fdt_addr} ${fdtimage}\0" \
"qspiload=sf probe && mtdparts default && run ubiload\0" \
"qspiboot=setenv bootargs " CONFIG_BOOTARGS \
" ubi.mtd=1,64 root=ubi0:rootfs rw rootfstype=ubifs;"\
--
2.7.4
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[U-Boot] [PATCH 1/7] arm: socfpga: update de0 nano default environment
From: Dalon Westergreen
The default values for CONFIG_SYS_MMCSD_FS_BOOT_PARTITION
and CONFIG_SYS_MMCSD_FS_OS_PARTITION have changed and as
as result the default uboot environment for this board
needs updating. This sets the default envirnment to
use the CONFIG_SYS_MMCSD_FS_BOOT_PARTITION and
CONFIG_SYS_MMCSD_FS_OS_PARTITION configs for the boot
and os partitions.
Also set the default fdtimage value to match the
devicetree name in the linux kernel for this board.
Signed-off-by: Dalon Westergreen
de0 fix spaces
---
include/configs/socfpga_de0_nano_soc.h | 10 ++
1 file changed, 6 insertions(+), 4 deletions(-)
diff --git a/include/configs/socfpga_de0_nano_soc.h
b/include/configs/socfpga_de0_nano_soc.h
index 6b9546e..205b859 100644
--- a/include/configs/socfpga_de0_nano_soc.h
+++ b/include/configs/socfpga_de0_nano_soc.h
@@ -39,15 +39,17 @@
"bootm ${loadaddr} - ${fdt_addr}\0" \
"bootimage=zImage\0" \
"fdt_addr=100\0" \
- "fdtimage=socfpga.dtb\0" \
+ "fdtimage=socfpga_cyclone5_de0_sockit.dtb\0" \
"bootm ${loadaddr} - ${fdt_addr}\0" \
- "mmcroot=/dev/mmcblk0p2\0" \
+ "mmc_boot=" __stringify(CONFIG_SYS_MMCSD_FS_BOOT_PARTITION) "\0" \
+ "mmc_os=" __stringify(CONFIG_SYS_MMCSD_FS_OS_PARTITION) "\0" \
+ "mmcroot=/dev/mmcblk0p${mmc_os}\0" \
"mmcboot=setenv bootargs " CONFIG_BOOTARGS \
" root=${mmcroot} rw rootwait;" \
"bootz ${loadaddr} - ${fdt_addr}\0" \
"mmcload=mmc rescan;" \
- "load mmc 0:1 ${loadaddr} ${bootimage};" \
- "load mmc 0:1 ${fdt_addr} ${fdtimage}\0" \
+ "load mmc 0:${mmc_boot} ${loadaddr} ${bootimage};" \
+ "load mmc 0:${mmc_boot} ${fdt_addr} ${fdtimage}\0" \
/* The rest of the configuration is shared */
#include
--
2.7.4
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[U-Boot] [PATCH 1/7] arm: socfpga: update de0 nano default environment
From: Dalon Westergreen
The default values for CONFIG_SYS_MMCSD_FS_BOOT_PARTITION
and CONFIG_SYS_MMCSD_FS_OS_PARTITION have changed and as
as result the default uboot environment for this board
needs updating. This sets the default envirnment to
use the CONFIG_SYS_MMCSD_FS_BOOT_PARTITION and
CONFIG_SYS_MMCSD_FS_OS_PARTITION configs for the boot
and os partitions.
Also set the default fdtimage value to match the
devicetree name in the linux kernel for this board.
Signed-off-by: Dalon Westergreen
de0 fix spaces
---
include/configs/socfpga_de0_nano_soc.h | 10 ++
1 file changed, 6 insertions(+), 4 deletions(-)
diff --git a/include/configs/socfpga_de0_nano_soc.h
b/include/configs/socfpga_de0_nano_soc.h
index 6b9546e..205b859 100644
--- a/include/configs/socfpga_de0_nano_soc.h
+++ b/include/configs/socfpga_de0_nano_soc.h
@@ -39,15 +39,17 @@
"bootm ${loadaddr} - ${fdt_addr}\0" \
"bootimage=zImage\0" \
"fdt_addr=100\0" \
- "fdtimage=socfpga.dtb\0" \
+ "fdtimage=socfpga_cyclone5_de0_sockit.dtb\0" \
"bootm ${loadaddr} - ${fdt_addr}\0" \
- "mmcroot=/dev/mmcblk0p2\0" \
+ "mmc_boot=" __stringify(CONFIG_SYS_MMCSD_FS_BOOT_PARTITION) "\0" \
+ "mmc_os=" __stringify(CONFIG_SYS_MMCSD_FS_OS_PARTITION) "\0" \
+ "mmcroot=/dev/mmcblk0p${mmc_os}\0" \
"mmcboot=setenv bootargs " CONFIG_BOOTARGS \
" root=${mmcroot} rw rootwait;" \
"bootz ${loadaddr} - ${fdt_addr}\0" \
"mmcload=mmc rescan;" \
- "load mmc 0:1 ${loadaddr} ${bootimage};" \
- "load mmc 0:1 ${fdt_addr} ${fdtimage}\0" \
+ "load mmc 0:${mmc_boot} ${loadaddr} ${bootimage};" \
+ "load mmc 0:${mmc_boot} ${fdt_addr} ${fdtimage}\0" \
/* The rest of the configuration is shared */
#include
--
2.7.4
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[U-Boot] [PATCH 2/7] arm: socfpga: update cyclone5 socdk default environment
From: Dalon Westergreen
The default values for CONFIG_SYS_MMCSD_FS_BOOT_PARTITION
and CONFIG_SYS_MMCSD_FS_OS_PARTITION have changed and as
as result the default uboot environment for this board
needs updating. This sets the default envirnment to
use the CONFIG_SYS_MMCSD_FS_BOOT_PARTITION and
CONFIG_SYS_MMCSD_FS_OS_PARTITION configs for the boot
and os partitions.
Also set the default fdtimage value to match the
devicetree name in the linux kernel for this board.
Signed-off-by: Dalon Westergreen
---
include/configs/socfpga_cyclone5_socdk.h | 10 ++
1 file changed, 6 insertions(+), 4 deletions(-)
diff --git a/include/configs/socfpga_cyclone5_socdk.h
b/include/configs/socfpga_cyclone5_socdk.h
index 7ced6a6..94355ce 100644
--- a/include/configs/socfpga_cyclone5_socdk.h
+++ b/include/configs/socfpga_cyclone5_socdk.h
@@ -44,15 +44,17 @@
"bootm ${loadaddr} - ${fdt_addr}\0" \
"bootimage=zImage\0" \
"fdt_addr=100\0" \
- "fdtimage=socfpga.dtb\0" \
+ "fdtimage=socfpga_cyclone5_socdk.dtb\0" \
"bootm ${loadaddr} - ${fdt_addr}\0" \
- "mmcroot=/dev/mmcblk0p2\0" \
+ "mmc_boot=" __stringify(CONFIG_SYS_MMCSD_FS_BOOT_PARTITION) "\0" \
+ "mmc_os=" __stringify(CONFIG_SYS_MMCSD_FS_OS_PARTITION) "\0" \
+ "mmcroot=/dev/mmcblk0p${mmc_os}\0" \
"mmcboot=setenv bootargs " CONFIG_BOOTARGS \
" root=${mmcroot} rw rootwait;" \
"bootz ${loadaddr} - ${fdt_addr}\0" \
"mmcload=mmc rescan;" \
- "load mmc 0:1 ${loadaddr} ${bootimage};" \
- "load mmc 0:1 ${fdt_addr} ${fdtimage}\0" \
+ "load mmc 0:${mmc_boot} ${loadaddr} ${bootimage};" \
+ "load mmc 0:${mmc_boot} ${fdt_addr} ${fdtimage}\0" \
"qspiload=sf probe && mtdparts default && run ubiload\0" \
"qspiboot=setenv bootargs " CONFIG_BOOTARGS \
" ubi.mtd=1,64 root=ubi0:rootfs rw rootfstype=ubifs;"\
--
2.7.4
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Re: [U-Boot] [RFC PATCH 08/11] sunxi: SPL: add FIT config selector for Pine64 boards
On 21/01/17 04:05, Siarhei Siamashka wrote:
Hi Siarhei,
thanks for your comments!
> On Fri, 20 Jan 2017 21:55:53 +
> André Przywara wrote:
>
>> On 20/01/17 21:35, Maxime Ripard wrote:
>>
>> Hi Maxime,
>>
>> thanks for having a look!
>>
>>> On Fri, Jan 20, 2017 at 01:53:28AM +, Andre Przywara wrote:
For a board or platform to support FIT loading in the SPL, it has to
provide a board_fit_config_name_match() routine, which helps to select
one of possibly multiple DTBs contained in a FIT image.
Provide a simple function to cover the two different Pine64 models,
which can be easily told apart by looking at the amount of installed
RAM.
Signed-off-by: Andre Przywara
---
board/sunxi/board.c | 13 +
1 file changed, 13 insertions(+)
diff --git a/board/sunxi/board.c b/board/sunxi/board.c
index 5365638..826 100644
--- a/board/sunxi/board.c
+++ b/board/sunxi/board.c
@@ -726,3 +726,16 @@ int ft_board_setup(void *blob, bd_t *bd)
#endif
return 0;
}
+
+#ifdef CONFIG_SPL_LOAD_FIT
+int board_fit_config_name_match(const char *name)
+{
+#ifdef CONFIG_MACH_SUN50I
+ if ((gd->ram_size > 512 * 1024 * 1024))
+ return !strcmp(name, "sun50i-a64-pine64-plus");
+ else
+ return !strcmp(name, "sun50i-a64-pine64");
+#endif
+ return -1;
+}
>>>
>>> That looks fishy. It means that any A64 board with CONFIG_SPL_LOAD_FIT
>>> enabled will be considered a pine64 board?
>>
>> Yes, at least for now, because that's the only A64 board we officially
>> support so far.
>> And yes again, it is fishy. It is more a demo or a placeholder for now,
>> because you _need_ an implementation of board_fit_config_name_match()
>> once you enable CONFIG_SPL_LOAD_FIT.
>>
>> One solution would be to have only one DTB supported per build, so
>> board_fit_config_name_match() always returns 0.
>>
>> Another (better) solution would be to store the board name in the SPL
>> header, which could be done later when flashing the image. Then this
>> function would just return strcmp(name, spl_header_name) or 0 if no name
>> is found for whatever reason.
>
> Yes, this is a good solution in the case if we have some non-removable
> storage on the board (SPI NOR flash, NAND, EEPROM or something else).
> We can discuss it separately.
I totally agree. I rebased your patch to latest mainline already and
will send out something later.
> But the current generation of Pine64 boards don't have any
> non-removable storage yet. My understanding is that you tried to
> provide the DTB selection, which is based on circumstantial evidences,
> such as the RAM size. IMHO this is also a valid selection method,
> because it can reduce the number of required OS image variants.
Yes, the point is that for U-Boot's purposes the only difference between
the Pine64 and Pine64+ (apart from DRAM size, which is autodetected) is
using MII vs. RGMII for the Ethernet PHY. The sun8i_emac driver gets
this information from the DT only, so there is no point at all for
different defconfigs. And the DRAM size is a safe indicator for that
difference, at least if we confine our view to Pine64 boards.
Now how other boards fit in here is a separate discussion IMO, so let's
solve one problem after the other.
I just thought that we could use:
#ifdef CONFIG_SPL_LOAD_FIT
int board_fit_config_name_match(const char *name)
{
return strcmp(name, CONFIG_DEFAULT_DEVICE_TREE);
}
#endif
for any general case.
> Yes, this is not urgent and we can indeed temporarily use separate
> defconfigs for different Pine64 board variants.
I agree it's not a showstopper and we can work out a solution later.
But in the long run I'd really like to have one firmware build suitable
for the two Pine64 models, so we just need to figure out how to fit the
DRAM size comparison code in here, maybe via some board specific #define
to use the routine from this patch vs. the generic routine above?
Btw: I think I tested a non-plus Pine64 some time ago and (Fast)
Ethernet didn't work out of the box back then, so I guess at the moment
we support the Pine64+ only anyway.
>> Ideas welcome. To be honest, this .dtb selection is nice, but I am not
>> married to it. It usefulness maybe limited at the moment.
>
> The board specific information is normally stored either in the
> defconfig file or in the device tree, rather than gets hardcoded in
> the sources. We can probably add some extra constraints information
> to the device tree. And these extra constraints can be passed to the
> board_fit_config_name_match() function in some way.
>
> Then the sun50i-a64-pine64 device tree file can specify that this board
> is expected to have exactly 512 MiB of RAM. Having this information,
> the board_fit_config_name_match() function will fail to match it if
> the actual RAM size is wrong.
The problem is that at the moment this function ge
[U-Boot] Reset emmc samsung
Buoansera in che modo è possibile resettare completamente una emmc e eventualmente di quali modelli samsung stiamo parlando Grazie in anticipo ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [RFC PATCH 05/11] tools: mksunxiboot: allow larger SPL binaries
On 21/01/17 04:24, Siarhei Siamashka wrote:
Hi Siarhei,
> On Fri, 20 Jan 2017 01:53:25 +
> Andre Przywara wrote:
>
>> mksunxiboot limits the size of the resulting SPL binaries to pretty
>> conservative values to cover all SoCs and all boot media (NAND).
>> In preparation for supporting modern SoCs without NAND, which may
>> require a really large SPL, introduce comamnd line parameters to
>> push the possible SPL size to the limits.
>>
>> Signed-off-by: Andre Przywara
>
> Thanks for trying to improve mksunxiboot.
>
> The proposed "--mmc", "--nand" and "--max" options seem to be completely
> redundant and serve no real purpose. The 8K alignment is perfectly
> fine for any needs and allows to increase the SPL size to 32K (which
> is presumably your intention).
Mmmh, interesting, I think my first observation was that adjusting the
limit wasn't good enough, but there was some side effect of the
alignment connected to the limit not being exactly 32K, but slightly
below. So the easiest solution was to just follow the comment, but make
this configurable to not break NAND flash.
But as I can't reproduce this anymore, I am all too happy to drop this part.
> The only Allwinner SoC that may potentially benefit from the 512 bytes
> alignment is A13:
> https://linux-sunxi.org/BROM#U-Boot_SPL_limitations
> But for the sake of simplicity, we can pretend that A13 has the
> same 24K SPL size limit as A10 and A20.
Fair enough.
> That said, I agree that we should fix the mksunxiboot tool and allow
> it to create 32K SPL files. Exceeding the SPL size limit is already
> checked elsewhere (via the linker script). So mksunxiboot does not
> need to enforce the 24K limit even for A10/A20 boards.
But what about the 0x7600 limit for the older SoCs?:
#define SUN4I_SRAM_SIZE 0x7600 /* 0x7748+ is used by BROM */
Or is this snake oil as we limit earlier to 24K already anyway?
So do you hint that this whole patch can eventually be reduced to:
-#define SUN4I_SRAM_SIZE 0x7600 /* 0x7748+ is used by BROM */
+#define SUN4I_SRAM_SIZE 0x8000
Cheers,
Andre.
>> ---
>> tools/mksunxiboot.c | 51 ++-
>> 1 file changed, 38 insertions(+), 13 deletions(-)
>>
>> diff --git a/tools/mksunxiboot.c b/tools/mksunxiboot.c
>> index 0f0b003..fa54bce 100644
>> --- a/tools/mksunxiboot.c
>> +++ b/tools/mksunxiboot.c
>> @@ -48,37 +48,58 @@ int gen_check_sum(struct boot_file_head *head_p)
>> #define ALIGN(x, a) __ALIGN_MASK((x), (typeof(x))(a)-1)
>> #define __ALIGN_MASK(x, mask) (((x)+(mask))&~(mask))
>>
>> -#define SUN4I_SRAM_SIZE 0x7600 /* 0x7748+ is used by BROM */
>> -#define SRAM_LOAD_MAX_SIZE (SUN4I_SRAM_SIZE - sizeof(struct boot_file_head))
>> +#define SUN4I_SRAM_SIZE 0x7600 /* 0x7748+ is used by BROM */
>> +#define SUNXI_MAX_SRAM_SIZE 0x8000
>> +#define SRAM_LOAD_MAX_SIZE (SUNXI_MAX_SRAM_SIZE - sizeof(struct
>> boot_file_head))
>>
>> /*
>> * BROM (at least on A10 and A20) requires NAND-images to be explicitly
>> aligned
>> * to a multiple of 8K, and rejects the image otherwise. MMC-images are fine
>> - * with 512B blocks. To cater for both, align to the largest of the two.
>> + * with 512B blocks.
>> */
>> -#define BLOCK_SIZE 0x2000
>> +#define BLOCK_SIZE_NAND 0x2000
>> +#define BLOCK_SIZE_MMC 0x0200
>> +#define MAX_BLOCK_SIZE BLOCK_SIZE_NAND
>>
>> struct boot_img {
>> struct boot_file_head header;
>> char code[SRAM_LOAD_MAX_SIZE];
>> -char pad[BLOCK_SIZE];
>> +char pad[MAX_BLOCK_SIZE];
>> };
>>
>> int main(int argc, char *argv[])
>> {
>> int fd_in, fd_out;
>> +int ac = 1;
>> struct boot_img img;
>> unsigned file_size;
>> +unsigned size_limit = SUN4I_SRAM_SIZE - sizeof(struct boot_file_head);
>> +unsigned block_size = BLOCK_SIZE_NAND;
>> int count;
>>
>> if (argc < 2) {
>> printf("\tThis program makes an input bin file to sun4i " \
>> "bootable image.\n" \
>> - "\tUsage: %s input_file out_putfile\n", argv[0]);
>> + "\tUsage: %s input_file [out_putfile]\n", argv[0]);
>> return EXIT_FAILURE;
>> }
>>
>> -fd_in = open(argv[1], O_RDONLY);
>> +if (!strcmp(argv[ac], "--mmc")) {
>> +block_size = BLOCK_SIZE_MMC;
>> +ac++;
>> +}
>> +if (!strcmp(argv[ac], "--nand")) {
>> +block_size = BLOCK_SIZE_NAND;
>> +ac++;
>> +}
>> +if (!strcmp(argv[ac], "--max")) {
>> +size_limit = SUNXI_MAX_SRAM_SIZE - sizeof(struct
>> boot_file_head);
>> +ac++;
>> +}
>> +if (ac >= argc)
>> +return EXIT_FAILURE;
>> +
>> +fd_in = open(argv[ac++], O_RDONLY);
>> if (fd_in < 0) {
>> perror("Open input file");
>> return EXIT_FAILURE;
>> @@ -89,15 +110,19 @@ int main(int argc, char *argv[])
>> /* get input file size */
>> file_size = lseek(fd_in, 0, SEEK_END);
>>
>> -if (
[U-Boot] [PATCH 1/2] common: Kconfig: Add BOARD_LATE_INIT entry
This patch add Kconfig entry for CONFIG_BOARD_LATE_INIT Cc: Tom Rini Signed-off-by: Jagan Teki --- common/Kconfig | 10 ++ 1 file changed, 10 insertions(+) diff --git a/common/Kconfig b/common/Kconfig index a04ee10..bb47ee4 100644 --- a/common/Kconfig +++ b/common/Kconfig @@ -373,6 +373,16 @@ config VERSION_VARIABLE Any change to this variable will be reverted at the next reset. +config BOARD_LATE_INIT + bool "Enable Board late init code" + help + Sometimes board require some initialization code that might + require once the actual init done, example saving board specific env, + boot-modes etc. which eventually done at late. + + So this config enable the late init code with the help of board_late_init + function which should defined on respective boards. + config DISPLAY_CPUINFO bool "Display information about the CPU during start up" default y if ARM || BLACKFIN || NIOS2 || X86 || XTENSA -- 1.9.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2 2/4] kconfig: Add a FREEBSD option
Hello Simon, On 21-01-17 04:51, Simon Glass wrote: Hi, On 17 January 2017 at 08:50, Emmanuel Vadot wrote: Add a FreeBSD option that enable the API and enable the data cache command as it is needed to boot the FreeBSD loader. Signed-off-by: Emmanuel Vadot --- common/Kconfig | 9 + 1 file changed, 9 insertions(+) diff --git a/common/Kconfig b/common/Kconfig index a04ee1084f..b719ccd888 100644 --- a/common/Kconfig +++ b/common/Kconfig @@ -389,4 +389,13 @@ config DISPLAY_BOARDINFO when U-Boot starts up. The board function checkboard() is called to do this. +config FREEBSD + bool "Enable FreeBSD boot" + select API + select CMD_CACHE + default n + help + This option adds boot configuration that can run the FreeBSD + loader. What is the FreeBSD loader? see https://www.freebsd.org/cgi/man.cgi?loader(8). Which is rather nice, FreeBSD uses the same loader independent of arch, so booting the previous kernel / kernel module stuff and rescue things are roughly the same on i386, amd64 and arm. The loader communicates with u-boot by its api. Do you mean that U-Boot can boot FreeBSD? Hence he meant what he wrote. Be able to run the FreeBSD _loader_. The FreeBSD loader will take care of booting FreeBSD. Regards, Jeroen ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 3/9 v2] mmc: Add Marvell Xenon SDHCI controller driver
This driver implementes platform specific code for the Xenon SDHCI controller which is integrated in the Marvell MVEBU Armada 37xx and Armada 7k / 8K SoCs. History: This driver is ported from the Marvell U-Boot version 2015.01 which is written by Victor Gu with minor changes ported from the Linux driver which is written by Ziji Hu . Signed-off-by: Stefan Roese Cc: Jaehoon Chung Cc: Masahiro Yamada --- v2: - Renamed MMC_XENON_SDHCI to MMC_SDHCI_XENON as requested by Masahiro for the new consistant MMC naming drivers/mmc/Kconfig | 11 + drivers/mmc/Makefile | 1 + drivers/mmc/xenon_sdhci.c | 589 ++ 3 files changed, 601 insertions(+) create mode 100644 drivers/mmc/xenon_sdhci.c diff --git a/drivers/mmc/Kconfig b/drivers/mmc/Kconfig index 9ed8da39ef..147e52d332 100644 --- a/drivers/mmc/Kconfig +++ b/drivers/mmc/Kconfig @@ -287,6 +287,17 @@ config MMC_SDHCI_SPEAR If unsure, say N. +config MMC_SDHCI_XENON + bool "SDHCI support for the Xenon SDHCI controller" + depends on MMC_SDHCI && DM_MMC && OF_CONTROL + help + Support for Xenon SDHCI host controller on Marvell Armada 3700 + 7k/8k ARM SoCs platforms + + If you have a controller with this interface, say Y here. + + If unsure, say N. + config MMC_SDHCI_TEGRA bool "SDHCI platform support for the Tegra SD/MMC Controller" depends on TEGRA diff --git a/drivers/mmc/Makefile b/drivers/mmc/Makefile index 4dca09c955..6af7f79ff8 100644 --- a/drivers/mmc/Makefile +++ b/drivers/mmc/Makefile @@ -68,6 +68,7 @@ obj-$(CONFIG_MMC_SDHCI_MV)+= mv_sdhci.o obj-$(CONFIG_MMC_SDHCI_S5P)+= s5p_sdhci.o obj-$(CONFIG_MMC_SDHCI_SPEAR) += spear_sdhci.o obj-$(CONFIG_MMC_SDHCI_TEGRA) += tegra_mmc.o +obj-$(CONFIG_MMC_SDHCI_XENON) += xenon_sdhci.o obj-$(CONFIG_MMC_SUNXI)+= sunxi_mmc.o obj-$(CONFIG_MMC_UNIPHIER) += uniphier-sd.o diff --git a/drivers/mmc/xenon_sdhci.c b/drivers/mmc/xenon_sdhci.c new file mode 100644 index 00..f36b482288 --- /dev/null +++ b/drivers/mmc/xenon_sdhci.c @@ -0,0 +1,589 @@ +/* + * Driver for Marvell SOC Platform Group Xenon SDHC as a platform device + * + * Copyright (C) 2016 Marvell, All Rights Reserved. + * + * Author: Victor Gu + * Date: 2016-8-24 + * + * Included parts of the Linux driver version which was written by: + * Hu Ziji + * + * Ported to from Marvell 2015.01 to mainline U-Boot 2017.01: + * Stefan Roese + * + * SPDX-License-Identifier:GPL-2.0 + */ + +#include +#include +#include +#include +#include +#include + +DECLARE_GLOBAL_DATA_PTR; + +/* Register Offset of SD Host Controller SOCP self-defined register */ +#define SDHC_SYS_CFG_INFO 0x0104 +#define SLOT_TYPE_SDIO_SHIFT 24 +#define SLOT_TYPE_EMMC_MASK0xFF +#define SLOT_TYPE_EMMC_SHIFT 16 +#define SLOT_TYPE_SD_SDIO_MMC_MASK 0xFF +#define SLOT_TYPE_SD_SDIO_MMC_SHIFT8 +#define NR_SUPPORTED_SLOT_MASK 0x7 + +#define SDHC_SYS_OP_CTRL 0x0108 +#define AUTO_CLKGATE_DISABLE_MASK BIT(20) +#define SDCLK_IDLEOFF_ENABLE_SHIFT 8 +#define SLOT_ENABLE_SHIFT 0 + +#define SDHC_SYS_EXT_OP_CTRL 0x010C +#define MASK_CMD_CONFLICT_ERRORBIT(8) + +#define SDHC_SLOT_OP_STATUS_CTRL 0x0128 +#define DELAY_90_DEGREE_MASK_EMMC5 BIT(7) +#define DELAY_90_DEGREE_SHIFT_EMMC57 +#define EMMC_5_0_PHY_FIXED_DELAY_MASK 0x7F +#define EMMC_PHY_FIXED_DELAY_MASK 0xFF +#define EMMC_PHY_FIXED_DELAY_WINDOW_MIN (EMMC_PHY_FIXED_DELAY_MASK >> 3) +#define SDH_PHY_FIXED_DELAY_MASK 0x1FF +#define SDH_PHY_FIXED_DELAY_WINDOW_MIN (SDH_PHY_FIXED_DELAY_MASK >> 4) + +#define TUN_CONSECUTIVE_TIMES_SHIFT16 +#define TUN_CONSECUTIVE_TIMES_MASK 0x7 +#define TUN_CONSECUTIVE_TIMES 0x4 +#define TUNING_STEP_SHIFT 12 +#define TUNING_STEP_MASK 0xF +#define TUNING_STEP_DIVIDERBIT(6) + +#define FORCE_SEL_INVERSE_CLK_SHIFT11 + +#define SDHC_SLOT_FIFO_CTRL0x012c + +#define SDHC_SLOT_EMMC_CTRL0x0130 +#define ENABLE_DATA_STROBE BIT(24) +#define SET_EMMC_RSTN BIT(16) +#define DISABLE_RD_DATA_CRCBIT(14) +#define DISABLE_CRC_STAT_TOKEN BIT(13) +#define EMMC_VCCQ_MASK 0x3 +#define EMMC_VCCQ_1_8V 0x1 +#define EMMC_VCCQ_3_3V 0x3 + +#define SDHC_SLOT_RETUNING_REQ_CTRL0x0144 +/* retuning compatible */ +#define RETUNING_COMPATIBLE0x1 + +#define SDHC_SLOT_EXT_PRESENT
[U-Boot] [PATCH 07/11] ARM: uniphier: add macro to generate SoC data look-up function
There are similar functions that look up SoC data by the SoC ID.
The new macro UNIPHIER_DEFINE_SOCDATA_FUNC will be helpful to
avoid the code duplication.
Signed-off-by: Masahiro Yamada
---
arch/arm/mach-uniphier/board_init.c | 20 +++-
arch/arm/mach-uniphier/soc-info.h | 18 ++
arch/arm/mach-uniphier/spl_board_init.c | 18 ++
3 files changed, 23 insertions(+), 33 deletions(-)
diff --git a/arch/arm/mach-uniphier/board_init.c
b/arch/arm/mach-uniphier/board_init.c
index 413b338..ac7e3a6 100644
--- a/arch/arm/mach-uniphier/board_init.c
+++ b/arch/arm/mach-uniphier/board_init.c
@@ -169,32 +169,18 @@ static const struct uniphier_initdata uniphier_initdata[]
= {
},
#endif
};
-
-static const struct uniphier_initdata *uniphier_get_initdata(
- unsigned int soc_id)
-{
- int i;
-
- for (i = 0; i < ARRAY_SIZE(uniphier_initdata); i++) {
- if (uniphier_initdata[i].soc_id == soc_id)
- return &uniphier_initdata[i];
- }
-
- return NULL;
-}
+UNIPHIER_DEFINE_SOCDATA_FUNC(uniphier_get_initdata, uniphier_initdata)
int board_init(void)
{
const struct uniphier_initdata *initdata;
- unsigned int soc_id;
int ret;
led_puts("U0");
- soc_id = uniphier_get_soc_id();
- initdata = uniphier_get_initdata(soc_id);
+ initdata = uniphier_get_initdata();
if (!initdata) {
- pr_err("unsupported board\n");
+ pr_err("unsupported SoC\n");
return -EINVAL;
}
diff --git a/arch/arm/mach-uniphier/soc-info.h
b/arch/arm/mach-uniphier/soc-info.h
index aeaaf83..a85df23 100644
--- a/arch/arm/mach-uniphier/soc-info.h
+++ b/arch/arm/mach-uniphier/soc-info.h
@@ -7,6 +7,9 @@
#ifndef __UNIPHIER_SOC_INFO_H__
#define __UNIPHIER_SOC_INFO_H__
+#include
+#include
+
#define UNIPHIER_SLD3_ID 0x25
#define UNIPHIER_LD4_ID0x26
#define UNIPHIER_PRO4_ID 0x28
@@ -21,4 +24,19 @@ unsigned int uniphier_get_soc_id(void);
unsigned int uniphier_get_soc_model(void);
unsigned int uniphier_get_soc_revision(void);
+#define UNIPHIER_DEFINE_SOCDATA_FUNC(__func_name, __table) \
+static typeof(&__table[0]) __func_name(void) \
+{ \
+ unsigned int soc_id;\
+ int i; \
+ \
+ soc_id = uniphier_get_soc_id(); \
+ for (i = 0; i < ARRAY_SIZE(__table); i++) { \
+ if (__table[i].soc_id == soc_id)\
+ return &__table[i]; \
+ } \
+ \
+ return NULL;\
+}
+
#endif /* __UNIPHIER_SOC_INFO_H__ */
diff --git a/arch/arm/mach-uniphier/spl_board_init.c
b/arch/arm/mach-uniphier/spl_board_init.c
index 83851ef..da749a3 100644
--- a/arch/arm/mach-uniphier/spl_board_init.c
+++ b/arch/arm/mach-uniphier/spl_board_init.c
@@ -118,25 +118,12 @@ static const struct uniphier_spl_initdata
uniphier_spl_initdata[] = {
},
#endif
};
-
-static const struct uniphier_spl_initdata *uniphier_get_spl_initdata(
- unsigned int soc_id)
-{
- int i;
-
- for (i = 0; i < ARRAY_SIZE(uniphier_spl_initdata); i++) {
- if (uniphier_spl_initdata[i].soc_id == soc_id)
- return &uniphier_spl_initdata[i];
- }
-
- return NULL;
-}
+UNIPHIER_DEFINE_SOCDATA_FUNC(uniphier_get_spl_initdata, uniphier_spl_initdata)
void spl_board_init(void)
{
const struct uniphier_board_data *bd;
const struct uniphier_spl_initdata *initdata;
- unsigned int soc_id;
int ret;
#ifdef CONFIG_DEBUG_UART
@@ -147,8 +134,7 @@ void spl_board_init(void)
if (!bd)
hang();
- soc_id = uniphier_get_soc_id();
- initdata = uniphier_get_spl_initdata(soc_id);
+ initdata = uniphier_get_spl_initdata();
if (!initdata)
hang();
--
2.7.4
___
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[U-Boot] [PATCH 09/11] pinctrl: uniphier: support UniPhier PXs3 pinctrl driver
Add pin configuration and pinmux support for UniPhier PXs3 SoC.
Signed-off-by: Masahiro Yamada
---
drivers/pinctrl/uniphier/Kconfig | 24 ++--
drivers/pinctrl/uniphier/Makefile| 1 +
drivers/pinctrl/uniphier/pinctrl-uniphier-pxs3.c | 140 +++
3 files changed, 156 insertions(+), 9 deletions(-)
create mode 100644 drivers/pinctrl/uniphier/pinctrl-uniphier-pxs3.c
diff --git a/drivers/pinctrl/uniphier/Kconfig b/drivers/pinctrl/uniphier/Kconfig
index 689e576..a6e51ca 100644
--- a/drivers/pinctrl/uniphier/Kconfig
+++ b/drivers/pinctrl/uniphier/Kconfig
@@ -4,57 +4,63 @@ config PINCTRL_UNIPHIER
bool
config PINCTRL_UNIPHIER_SLD3
- bool "UniPhier PH1-sLD3 SoC pinctrl driver"
+ bool "UniPhier sLD3 SoC pinctrl driver"
depends on ARCH_UNIPHIER_SLD3
default y
select PINCTRL_UNIPHIER
config PINCTRL_UNIPHIER_LD4
- bool "UniPhier PH1-LD4 SoC pinctrl driver"
+ bool "UniPhier LD4 SoC pinctrl driver"
depends on ARCH_UNIPHIER_LD4
default y
select PINCTRL_UNIPHIER
config PINCTRL_UNIPHIER_PRO4
- bool "UniPhier PH1-Pro4 SoC pinctrl driver"
+ bool "UniPhier Pro4 SoC pinctrl driver"
depends on ARCH_UNIPHIER_PRO4
default y
select PINCTRL_UNIPHIER
config PINCTRL_UNIPHIER_SLD8
- bool "UniPhier PH1-sLD8 SoC pinctrl driver"
+ bool "UniPhier sLD8 SoC pinctrl driver"
depends on ARCH_UNIPHIER_SLD8
default y
select PINCTRL_UNIPHIER
config PINCTRL_UNIPHIER_PRO5
- bool "UniPhier PH1-Pro5 SoC pinctrl driver"
+ bool "UniPhier Pro5 SoC pinctrl driver"
depends on ARCH_UNIPHIER_PRO5
default y
select PINCTRL_UNIPHIER
config PINCTRL_UNIPHIER_PXS2
- bool "UniPhier ProXstream2 SoC pinctrl driver"
+ bool "UniPhier PXs2 SoC pinctrl driver"
depends on ARCH_UNIPHIER_PXS2
default y
select PINCTRL_UNIPHIER
config PINCTRL_UNIPHIER_LD6B
- bool "UniPhier PH1-LD6b SoC pinctrl driver"
+ bool "UniPhier LD6b SoC pinctrl driver"
depends on ARCH_UNIPHIER_LD6B
default y
select PINCTRL_UNIPHIER
config PINCTRL_UNIPHIER_LD11
- bool "UniPhier PH1-LD11 SoC pinctrl driver"
+ bool "UniPhier LD11 SoC pinctrl driver"
depends on ARCH_UNIPHIER_LD11
default y
select PINCTRL_UNIPHIER
config PINCTRL_UNIPHIER_LD20
- bool "UniPhier PH1-LD20 SoC pinctrl driver"
+ bool "UniPhier LD20 SoC pinctrl driver"
depends on ARCH_UNIPHIER_LD20
default y
select PINCTRL_UNIPHIER
+config PINCTRL_UNIPHIER_PXS3
+ bool "UniPhier PXs3 SoC pinctrl driver"
+ depends on ARCH_UNIPHIER_PXS3
+ default y
+ select PINCTRL_UNIPHIER
+
endif
diff --git a/drivers/pinctrl/uniphier/Makefile
b/drivers/pinctrl/uniphier/Makefile
index fd003ad..b805765 100644
--- a/drivers/pinctrl/uniphier/Makefile
+++ b/drivers/pinctrl/uniphier/Makefile
@@ -13,3 +13,4 @@ obj-$(CONFIG_PINCTRL_UNIPHIER_PXS2) +=
pinctrl-uniphier-pxs2.o
obj-$(CONFIG_PINCTRL_UNIPHIER_LD6B)+= pinctrl-uniphier-ld6b.o
obj-$(CONFIG_PINCTRL_UNIPHIER_LD11)+= pinctrl-uniphier-ld11.o
obj-$(CONFIG_PINCTRL_UNIPHIER_LD20)+= pinctrl-uniphier-ld20.o
+obj-$(CONFIG_PINCTRL_UNIPHIER_PXS3)+= pinctrl-uniphier-pxs3.o
diff --git a/drivers/pinctrl/uniphier/pinctrl-uniphier-pxs3.c
b/drivers/pinctrl/uniphier/pinctrl-uniphier-pxs3.c
new file mode 100644
index 000..65b56da
--- /dev/null
+++ b/drivers/pinctrl/uniphier/pinctrl-uniphier-pxs3.c
@@ -0,0 +1,140 @@
+/*
+ * Copyright (C) 2017 Socionext Inc.
+ * Author: Masahiro Yamada
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include
+#include
+
+#include "pinctrl-uniphier.h"
+
+static const unsigned emmc_pins[] = {31, 32, 33, 34, 35, 36, 37, 38};
+static const int emmc_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0};
+static const unsigned emmc_dat8_pins[] = {39, 40, 41, 42};
+static const int emmc_dat8_muxvals[] = {0, 0, 0, 0};
+static const unsigned ether_rgmii_pins[] = {52, 53, 54, 55, 56, 57, 58, 59, 60,
+ 61, 62, 63, 64, 65, 66, 67};
+static const int ether_rgmii_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0};
+static const unsigned ether_rmii_pins[] = {52, 53, 54, 55, 56, 57, 58, 59, 61,
+ 63, 64, 67};
+static const int ether_rmii_muxvals[] = {0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1};
+static const unsigned ether1_rgmii_pins[] = {68, 69, 70, 71, 72, 73, 74, 75,
76,
+77, 78, 79, 80, 81, 82, 83};
+static const int ether1_rgmii_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0};
+static const unsigned ether1_rmii_pins[] = {68, 69, 70, 71, 72, 73, 74, 75, 77,
+ 79, 80, 83};
+static const int ether
[U-Boot] [PATCH 08/11] ARM: dts: uniphier: compile only DT files that make sense
All the UniPhier DT files are compiled if CONFIG_ARCH_UNIPHIER is enabled, but not all of them actually work. For example, when U-Boot is compiled for ARM 32 bit, 64 bit DT files are also built, and vice versa. Compile only the combination that makes sense. Signed-off-by: Masahiro Yamada --- arch/arm/dts/Makefile | 27 ++- 1 file changed, 18 insertions(+), 9 deletions(-) diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 66ea0b3..3dbbaa7 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -81,19 +81,28 @@ dtb-$(CONFIG_ARCH_MVEBU) += \ armada-xp-synology-ds414.dtb\ armada-xp-theadorable.dtb -dtb-$(CONFIG_ARCH_UNIPHIER) += \ - uniphier-ld11-ref.dtb \ - uniphier-ld20-ref.dtb \ - uniphier-ld4-ref.dtb \ - uniphier-ld6b-ref.dtb \ +dtb-$(CONFIG_ARCH_UNIPHIER_LD11) += \ + uniphier-ld11-ref.dtb +dtb-$(CONFIG_ARCH_UNIPHIER_LD20) += \ + uniphier-ld20-ref.dtb +dtb-$(CONFIG_ARCH_UNIPHIER_LD4) += \ + uniphier-ld4-ref.dtb +dtb-$(CONFIG_ARCH_UNIPHIER_LD6B) += \ + uniphier-ld6b-ref.dtb +dtb-$(CONFIG_ARCH_UNIPHIER_PRO4) += \ uniphier-pro4-ace.dtb \ uniphier-pro4-ref.dtb \ - uniphier-pro4-sanji.dtb \ - uniphier-pro5-4kbox.dtb \ + uniphier-pro4-sanji.dtb +dtb-$(CONFIG_ARCH_UNIPHIER_PRO5) += \ + uniphier-pro5-4kbox.dtb +dtb-$(CONFIG_ARCH_UNIPHIER_PXS2) += \ uniphier-pxs2-gentil.dtb \ - uniphier-pxs2-vodka.dtb \ - uniphier-sld3-ref.dtb \ + uniphier-pxs2-vodka.dtb +dtb-$(CONFIG_ARCH_UNIPHIER_SLD3) += \ + uniphier-sld3-ref.dtb +dtb-$(CONFIG_ARCH_UNIPHIER_SLD8) += \ uniphier-sld8-ref.dtb + dtb-$(CONFIG_ARCH_ZYNQ) += zynq-zc702.dtb \ zynq-zc706.dtb \ zynq-zed.dtb \ -- 2.7.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 10/11] ARM: dts: uniphier: add PXs3 SoC/board support
Initial commit for the PXs3 SoC DT.
Signed-off-by: Masahiro Yamada
---
arch/arm/dts/Makefile | 2 +
arch/arm/dts/uniphier-pxs3-ref.dts | 51 ++
arch/arm/dts/uniphier-pxs3.dtsi| 328 +
3 files changed, 381 insertions(+)
create mode 100644 arch/arm/dts/uniphier-pxs3-ref.dts
create mode 100644 arch/arm/dts/uniphier-pxs3.dtsi
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 3dbbaa7..6a7924e 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -98,6 +98,8 @@ dtb-$(CONFIG_ARCH_UNIPHIER_PRO5) += \
dtb-$(CONFIG_ARCH_UNIPHIER_PXS2) += \
uniphier-pxs2-gentil.dtb \
uniphier-pxs2-vodka.dtb
+dtb-$(CONFIG_ARCH_UNIPHIER_PXS3) += \
+ uniphier-pxs3-ref.dtb
dtb-$(CONFIG_ARCH_UNIPHIER_SLD3) += \
uniphier-sld3-ref.dtb
dtb-$(CONFIG_ARCH_UNIPHIER_SLD8) += \
diff --git a/arch/arm/dts/uniphier-pxs3-ref.dts
b/arch/arm/dts/uniphier-pxs3-ref.dts
new file mode 100644
index 000..27f0cb0
--- /dev/null
+++ b/arch/arm/dts/uniphier-pxs3-ref.dts
@@ -0,0 +1,51 @@
+/*
+ * Device Tree Source for UniPhier PXs3 Reference Board
+ *
+ * Copyright (C) 2017 Socionext Inc.
+ * Author: Masahiro Yamada
+ *
+ * SPDX-License-Identifier:GPL-2.0+X11
+ */
+
+/dts-v1/;
+/include/ "uniphier-pxs3.dtsi"
+/include/ "uniphier-ref-daughter.dtsi"
+/include/ "uniphier-support-card.dtsi"
+
+/ {
+ model = "UniPhier PXs3 Reference Board";
+ compatible = "socionext,uniphier-pxs3-ref", "socionext,uniphier-pxs3";
+
+ aliases {
+ serial0 = &serial0;
+ serial1 = &serial1;
+ serial2 = &serial2;
+ serial3 = &serial3;
+ i2c0 = &i2c0;
+ i2c1 = &i2c1;
+ i2c2 = &i2c2;
+ i2c3 = &i2c3;
+ i2c6 = &i2c6;
+ };
+
+ memory {
+ device_type = "memory";
+ reg = <0 0x8000 0 0xa000>;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+};
+
+ðsc {
+ interrupts = <0 48 4>;
+};
+
+&serial0 {
+ status = "okay";
+};
+
+&i2c0 {
+ status = "okay";
+};
diff --git a/arch/arm/dts/uniphier-pxs3.dtsi b/arch/arm/dts/uniphier-pxs3.dtsi
new file mode 100644
index 000..3b30eef
--- /dev/null
+++ b/arch/arm/dts/uniphier-pxs3.dtsi
@@ -0,0 +1,328 @@
+/*
+ * Device Tree Source for UniPhier PXs3 SoC
+ *
+ * Copyright (C) 2017 Socionext Inc.
+ * Author: Masahiro Yamada
+ *
+ * SPDX-License-Identifier:GPL-2.0+X11
+ */
+
+/memreserve/ 0x8000 0x0008;
+
+/ {
+ compatible = "socionext,uniphier-pxs3";
+ #address-cells = <2>;
+ #size-cells = <2>;
+ interrupt-parent = <&gic>;
+
+ cpus {
+ #address-cells = <2>;
+ #size-cells = <0>;
+
+ cpu-map {
+ cluster0 {
+ core0 {
+ cpu = <&cpu0>;
+ };
+ core1 {
+ cpu = <&cpu1>;
+ };
+ core2 {
+ cpu = <&cpu2>;
+ };
+ core3 {
+ cpu = <&cpu3>;
+ };
+ };
+ };
+
+ cpu0: cpu@0 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a53", "arm,armv8";
+ reg = <0 0x000>;
+ enable-method = "psci";
+ };
+
+ cpu1: cpu@1 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a53", "arm,armv8";
+ reg = <0 0x001>;
+ enable-method = "psci";
+ };
+
+ cpu2: cpu@2 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a53", "arm,armv8";
+ reg = <0 0x002>;
+ enable-method = "psci";
+ };
+
+ cpu3: cpu@3 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a53", "arm,armv8";
+ reg = <0 0x003>;
+ enable-method = "psci";
+ };
+ };
+
+ psci {
+ compatible = "arm,psci-1.0";
+ method = "smc";
+ };
+
+ clocks {
+ refclk: ref {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <2500>;
+ };
+ };
+
+ timer {
+ compatible = "arm,armv8-timer";
+ interrupts = <1 13 4>,
+<1 14 4>,
+
[U-Boot] [PATCH 11/11] ARM: uniphier: add PXs3 SoC support
Initial support for PXs3 SoC.
Signed-off-by: Masahiro Yamada
---
arch/arm/mach-uniphier/Kconfig| 5 +
arch/arm/mach-uniphier/board_init.c | 8
arch/arm/mach-uniphier/clk/Makefile | 1 +
arch/arm/mach-uniphier/clk/pll-pxs3.c | 7 +++
arch/arm/mach-uniphier/cpu-info.c | 3 +++
arch/arm/mach-uniphier/init.h | 1 +
arch/arm/mach-uniphier/sbc/Makefile | 1 +
arch/arm/mach-uniphier/soc-info.h | 1 +
doc/README.uniphier | 4
9 files changed, 31 insertions(+)
create mode 100644 arch/arm/mach-uniphier/clk/pll-pxs3.c
diff --git a/arch/arm/mach-uniphier/Kconfig b/arch/arm/mach-uniphier/Kconfig
index e732ac1..cd9ba6b 100644
--- a/arch/arm/mach-uniphier/Kconfig
+++ b/arch/arm/mach-uniphier/Kconfig
@@ -88,6 +88,11 @@ config ARCH_UNIPHIER_LD20
select OF_BOARD_SETUP
default y
+config ARCH_UNIPHIER_PXS3
+ bool "Enable UniPhier PXs3 SoC support"
+ depends on ARCH_UNIPHIER_V8_MULTI
+ default y
+
config CACHE_UNIPHIER
bool "Enable the UniPhier L2 cache controller"
depends on ARCH_UNIPHIER_32BIT
diff --git a/arch/arm/mach-uniphier/board_init.c
b/arch/arm/mach-uniphier/board_init.c
index ac7e3a6..e89a4c5 100644
--- a/arch/arm/mach-uniphier/board_init.c
+++ b/arch/arm/mach-uniphier/board_init.c
@@ -168,6 +168,14 @@ static const struct uniphier_initdata uniphier_initdata[]
= {
.misc_init = uniphier_ld20_misc_init,
},
#endif
+#if defined(CONFIG_ARCH_UNIPHIER_PXS3)
+ {
+ .soc_id = UNIPHIER_PXS3_ID,
+ .nand_2cs = false,
+ .sbc_init = uniphier_pxs2_sbc_init,
+ .pll_init = uniphier_pxs3_pll_init,
+ },
+#endif
};
UNIPHIER_DEFINE_SOCDATA_FUNC(uniphier_get_initdata, uniphier_initdata)
diff --git a/arch/arm/mach-uniphier/clk/Makefile
b/arch/arm/mach-uniphier/clk/Makefile
index 37df04b..43df670 100644
--- a/arch/arm/mach-uniphier/clk/Makefile
+++ b/arch/arm/mach-uniphier/clk/Makefile
@@ -25,6 +25,7 @@ obj-$(CONFIG_ARCH_UNIPHIER_PXS2) += clk-pxs2.o
obj-$(CONFIG_ARCH_UNIPHIER_LD6B) += clk-pxs2.o
obj-$(CONFIG_ARCH_UNIPHIER_LD11) += clk-ld11.o pll-ld11.o
obj-$(CONFIG_ARCH_UNIPHIER_LD20) += pll-ld20.o
+obj-$(CONFIG_ARCH_UNIPHIER_PXS3) += pll-pxs3.o
endif
diff --git a/arch/arm/mach-uniphier/clk/pll-pxs3.c
b/arch/arm/mach-uniphier/clk/pll-pxs3.c
new file mode 100644
index 000..e29d9d0
--- /dev/null
+++ b/arch/arm/mach-uniphier/clk/pll-pxs3.c
@@ -0,0 +1,7 @@
+/*
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+void uniphier_pxs3_pll_init(void)
+{
+}
diff --git a/arch/arm/mach-uniphier/cpu-info.c
b/arch/arm/mach-uniphier/cpu-info.c
index 94bd98e..75586a3 100644
--- a/arch/arm/mach-uniphier/cpu-info.c
+++ b/arch/arm/mach-uniphier/cpu-info.c
@@ -50,6 +50,9 @@ int print_cpuinfo(void)
case UNIPHIER_LD20_ID:
puts("LD20 (SC1401AJ1)");
break;
+ case UNIPHIER_PXS3_ID:
+ puts("PXs3");
+ break;
default:
printf("Unknown Processor ID (0x%x)\n", id);
return -1;
diff --git a/arch/arm/mach-uniphier/init.h b/arch/arm/mach-uniphier/init.h
index d207806..3aeb5b1 100644
--- a/arch/arm/mach-uniphier/init.h
+++ b/arch/arm/mach-uniphier/init.h
@@ -112,6 +112,7 @@ void uniphier_ld4_pll_init(void);
void uniphier_pro4_pll_init(void);
void uniphier_ld11_pll_init(void);
void uniphier_ld20_pll_init(void);
+void uniphier_pxs3_pll_init(void);
void uniphier_ld4_clk_init(void);
void uniphier_pro4_clk_init(void);
diff --git a/arch/arm/mach-uniphier/sbc/Makefile
b/arch/arm/mach-uniphier/sbc/Makefile
index b85b1fe..fe9d85a 100644
--- a/arch/arm/mach-uniphier/sbc/Makefile
+++ b/arch/arm/mach-uniphier/sbc/Makefile
@@ -10,3 +10,4 @@ obj-$(CONFIG_ARCH_UNIPHIER_PXS2) += sbc-pxs2.o
obj-$(CONFIG_ARCH_UNIPHIER_LD6B) += sbc-pxs2.o
obj-$(CONFIG_ARCH_UNIPHIER_LD11) += sbc-ld11.o
obj-$(CONFIG_ARCH_UNIPHIER_LD20) += sbc-ld11.o
+obj-$(CONFIG_ARCH_UNIPHIER_PXS3) += sbc-pxs2.o
diff --git a/arch/arm/mach-uniphier/soc-info.h
b/arch/arm/mach-uniphier/soc-info.h
index a85df23..e87ff9c 100644
--- a/arch/arm/mach-uniphier/soc-info.h
+++ b/arch/arm/mach-uniphier/soc-info.h
@@ -19,6 +19,7 @@
#define UNIPHIER_LD6B_ID 0x2f
#define UNIPHIER_LD11_ID 0x31
#define UNIPHIER_LD20_ID 0x32
+#define UNIPHIER_PXS3_ID 0x35
unsigned int uniphier_get_soc_id(void);
unsigned int uniphier_get_soc_model(void);
diff --git a/doc/README.uniphier b/doc/README.uniphier
index a42eaa9..539b1f2 100644
--- a/doc/README.uniphier
+++ b/doc/README.uniphier
@@ -62,6 +62,10 @@ LD20 reference board:
$ make uniphier_ld20_defconfig
$ make CROSS_COMPILE=aarch64-linux-gnu-
+PXs3 reference board:
+$ make uniphier_v8_defconfig
+$ make CROSS_COMPILE=aarch64-linux-gnu- DEVICE_TREE=uniphier-pxs3-ref
+
You may wish to change the "CROSS_COMPILE=..." to use your favorite compiler.
[U-Boot] [PATCH 05/11] ARM: uniphier: replace with where possible
The includes too many headers. Actually, these files
needed to include it for udelay() declaration. Now we can replace
it with thanks to commit 5bc516ed661a ("delay:
collect {m, n, u}delay declarations to include/linux/delay.h").
Signed-off-by: Masahiro Yamada
---
arch/arm/mach-uniphier/clk/dpll-sld8.c | 2 +-
arch/arm/mach-uniphier/clk/pll-base-ld20.c | 3 ++-
arch/arm/mach-uniphier/clk/pll-ld4.c | 2 +-
arch/arm/mach-uniphier/clk/pll-pro4.c | 2 +-
4 files changed, 5 insertions(+), 4 deletions(-)
diff --git a/arch/arm/mach-uniphier/clk/dpll-sld8.c
b/arch/arm/mach-uniphier/clk/dpll-sld8.c
index 7faa5e8..4a0010b 100644
--- a/arch/arm/mach-uniphier/clk/dpll-sld8.c
+++ b/arch/arm/mach-uniphier/clk/dpll-sld8.c
@@ -5,7 +5,7 @@
* SPDX-License-Identifier:GPL-2.0+
*/
-#include
+#include
#include
#include "../init.h"
diff --git a/arch/arm/mach-uniphier/clk/pll-base-ld20.c
b/arch/arm/mach-uniphier/clk/pll-base-ld20.c
index caa631d..c66f083 100644
--- a/arch/arm/mach-uniphier/clk/pll-base-ld20.c
+++ b/arch/arm/mach-uniphier/clk/pll-base-ld20.c
@@ -5,8 +5,9 @@
* SPDX-License-Identifier:GPL-2.0+
*/
-#include
#include
+#include
+#include
#include
#include
diff --git a/arch/arm/mach-uniphier/clk/pll-ld4.c
b/arch/arm/mach-uniphier/clk/pll-ld4.c
index 13257e4..55ac0ae 100644
--- a/arch/arm/mach-uniphier/clk/pll-ld4.c
+++ b/arch/arm/mach-uniphier/clk/pll-ld4.c
@@ -5,7 +5,7 @@
* SPDX-License-Identifier:GPL-2.0+
*/
-#include
+#include
#include
#include "../init.h"
diff --git a/arch/arm/mach-uniphier/clk/pll-pro4.c
b/arch/arm/mach-uniphier/clk/pll-pro4.c
index cdd1fd4..e4d1f72 100644
--- a/arch/arm/mach-uniphier/clk/pll-pro4.c
+++ b/arch/arm/mach-uniphier/clk/pll-pro4.c
@@ -5,7 +5,7 @@
* SPDX-License-Identifier:GPL-2.0+
*/
-#include
+#include
#include
#include "../init.h"
--
2.7.4
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[U-Boot] [PATCH 01/11] ARM: uniphier: add missing static and const qualifier
These are file-internal and constant.
Signed-off-by: Masahiro Yamada
---
arch/arm/mach-uniphier/board_init.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/arm/mach-uniphier/board_init.c
b/arch/arm/mach-uniphier/board_init.c
index 93330b0..8233a52 100644
--- a/arch/arm/mach-uniphier/board_init.c
+++ b/arch/arm/mach-uniphier/board_init.c
@@ -87,7 +87,7 @@ struct uniphier_initdata {
void (*misc_init)(void);
};
-struct uniphier_initdata uniphier_initdata[] = {
+static const struct uniphier_initdata uniphier_initdata[] = {
#if defined(CONFIG_ARCH_UNIPHIER_SLD3)
{
.soc_id = SOC_UNIPHIER_SLD3,
@@ -169,7 +169,7 @@ struct uniphier_initdata uniphier_initdata[] = {
#endif
};
-static struct uniphier_initdata *uniphier_get_initdata(
+static const struct uniphier_initdata *uniphier_get_initdata(
enum uniphier_soc_id soc_id)
{
int i;
@@ -184,7 +184,7 @@ static struct uniphier_initdata *uniphier_get_initdata(
int board_init(void)
{
- struct uniphier_initdata *initdata;
+ const struct uniphier_initdata *initdata;
enum uniphier_soc_id soc_id;
int ret;
--
2.7.4
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[U-Boot] [PATCH 03/11] ARM: uniphier: add uniphier_v8_defconfig
This defconfig does not support SPL. If you use this, the basic SoC initialization must be done in firmware that runs before U-Boot. (Generally, ARM Trusted Firmware is expected to do this job). Signed-off-by: Masahiro Yamada --- configs/uniphier_v8_defconfig | 34 ++ 1 file changed, 34 insertions(+) create mode 100644 configs/uniphier_v8_defconfig diff --git a/configs/uniphier_v8_defconfig b/configs/uniphier_v8_defconfig new file mode 100644 index 000..d02b84e --- /dev/null +++ b/configs/uniphier_v8_defconfig @@ -0,0 +1,34 @@ +CONFIG_ARM=y +CONFIG_ARCH_UNIPHIER=y +CONFIG_SYS_MALLOC_F_LEN=0x2000 +CONFIG_ARCH_UNIPHIER_V8_MULTI=y +CONFIG_MICRO_SUPPORT_CARD=y +CONFIG_SYS_TEXT_BASE=0x8400 +CONFIG_DEFAULT_DEVICE_TREE="uniphier-ld20-ref" +# CONFIG_ARCH_FIXUP_FDT_MEMORY is not set +CONFIG_HUSH_PARSER=y +# CONFIG_CMD_XIMG is not set +# CONFIG_CMD_ENV_EXISTS is not set +CONFIG_CMD_MMC=y +CONFIG_CMD_I2C=y +CONFIG_CMD_USB=y +# CONFIG_CMD_FPGA is not set +CONFIG_CMD_GPIO=y +CONFIG_CMD_TFTPPUT=y +CONFIG_CMD_PING=y +CONFIG_CMD_CACHE=y +CONFIG_CMD_TIME=y +# CONFIG_CMD_MISC is not set +CONFIG_CMD_FAT=y +CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_GPIO_UNIPHIER=y +CONFIG_MISC=y +CONFIG_I2C_EEPROM=y +CONFIG_MMC_UNIPHIER=y +CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI_CADENCE=y +CONFIG_USB=y +CONFIG_USB_XHCI_HCD=y +CONFIG_USB_XHCI_DWC3=y +CONFIG_USB_DWC3_UNIPHIER=y +CONFIG_USB_STORAGE=y -- 2.7.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 02/11] ARM: uniphier: make SPL optional for ARVv8 SoCs
We may want to run different firmware before running U-Boot. For example, ARM Trusted Firmware runs before U-Boot, making U-Boot a non-secure world boot loader. In this case, the SoC might be initialized there, which enables us to skip SPL entirely. This commit removes "select SPL" to make it configurable. This also enables the Multi SoC support for the UniPhier ARMv8 SoCs. (CONFIG_ARCH_UNIPHIER_V8_MULTI) Thanks to the driver model and Device Tree, the U-Boot proper part is now written in a generic way. The board/SoC parameters reside in DT. The Multi SoC support increases the memory footprint a bit, but the U-Boot proper does not have strict memory constraint. This will mitigate the per-SoC (sometimes per-board) defconfig burden. Signed-off-by: Masahiro Yamada --- arch/arm/Kconfig | 11 arch/arm/mach-uniphier/Kconfig| 49 +++ arch/arm/mach-uniphier/arm64/Makefile | 5 +++- arch/arm/mach-uniphier/board_init.c | 5 ++-- configs/uniphier_ld11_defconfig | 3 ++- configs/uniphier_ld20_defconfig | 3 ++- configs/uniphier_ld4_sld8_defconfig | 1 + configs/uniphier_pro4_defconfig | 1 + configs/uniphier_pxs2_ld6b_defconfig | 1 + configs/uniphier_sld3_defconfig | 1 + include/configs/uniphier.h| 6 +++-- 11 files changed, 56 insertions(+), 30 deletions(-) diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 855871c..2554a2c 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -894,12 +894,11 @@ config ARCH_UNIPHIER select OF_CONTROL select OF_LIBFDT select PINCTRL - select SPL - select SPL_DM - select SPL_LIBCOMMON_SUPPORT - select SPL_LIBGENERIC_SUPPORT - select SPL_OF_CONTROL - select SPL_PINCTRL + select SPL_DM if SPL + select SPL_LIBCOMMON_SUPPORT if SPL + select SPL_LIBGENERIC_SUPPORT if SPL + select SPL_OF_CONTROL if SPL + select SPL_PINCTRL if SPL select SUPPORT_SPL help Support for UniPhier SoC family developed by Socionext Inc. diff --git a/arch/arm/mach-uniphier/Kconfig b/arch/arm/mach-uniphier/Kconfig index aa3909a..e732ac1 100644 --- a/arch/arm/mach-uniphier/Kconfig +++ b/arch/arm/mach-uniphier/Kconfig @@ -13,66 +13,81 @@ config ARCH_UNIPHIER_32BIT config ARCH_UNIPHIER_64BIT bool select ARM64 - select SPL_SEPARATE_BSS - select ARMV8_MULTIENTRY - select ARMV8_SPIN_TABLE + select SPL_SEPARATE_BSS if SPL + select ARMV8_MULTIENTRY if SPL + select ARMV8_SPIN_TABLE if SPL choice prompt "UniPhier SoC select" default ARCH_UNIPHIER_PRO4 config ARCH_UNIPHIER_SLD3 - bool "UniPhier PH1-sLD3 SoC" + bool "UniPhier sLD3 SoC" select ARCH_UNIPHIER_32BIT config ARCH_UNIPHIER_LD4_SLD8 - bool "UniPhier PH1-LD4/PH1-sLD8 SoC" + bool "UniPhier LD4/sLD8 SoCs" select ARCH_UNIPHIER_32BIT config ARCH_UNIPHIER_PRO4 - bool "UniPhier PH1-Pro4 SoC" + bool "UniPhier Pro4 SoC" select ARCH_UNIPHIER_32BIT config ARCH_UNIPHIER_PRO5_PXS2_LD6B - bool "UniPhier PH1-Pro5/ProXstream2/PH1-LD6b SoC" + bool "UniPhier Pro5/PXs2/LD6b SoCs" select ARCH_UNIPHIER_32BIT -config ARCH_UNIPHIER_LD11 - bool "UniPhier PH1-LD11 SoC" +config ARCH_UNIPHIER_LD11_SINGLE + bool "UniPhier LD11 SoC" select ARCH_UNIPHIER_64BIT -config ARCH_UNIPHIER_LD20 - bool "UniPhier PH1-LD20 SoC" +config ARCH_UNIPHIER_LD20_SINGLE + bool "UniPhier LD20 SoC" + select ARCH_UNIPHIER_64BIT + +config ARCH_UNIPHIER_V8_MULTI + bool "UniPhier V8 SoCs" + depends on !SPL select ARCH_UNIPHIER_64BIT - select OF_BOARD_SETUP endchoice config ARCH_UNIPHIER_LD4 - bool "Enable UniPhier PH1-LD4 SoC support" + bool "Enable UniPhier LD4 SoC support" depends on ARCH_UNIPHIER_LD4_SLD8 default y config ARCH_UNIPHIER_SLD8 - bool "Enable UniPhier PH1-sLD8 SoC support" + bool "Enable UniPhier sLD8 SoC support" depends on ARCH_UNIPHIER_LD4_SLD8 default y config ARCH_UNIPHIER_PRO5 - bool "Enable UniPhier PH1-Pro5 SoC support" + bool "Enable UniPhier Pro5 SoC support" depends on ARCH_UNIPHIER_PRO5_PXS2_LD6B default y config ARCH_UNIPHIER_PXS2 - bool "Enable UniPhier ProXstream2 SoC support" + bool "Enable UniPhier Pxs2 SoC support" depends on ARCH_UNIPHIER_PRO5_PXS2_LD6B default y config ARCH_UNIPHIER_LD6B - bool "Enable UniPhier PH1-LD6b SoC support" + bool "Enable UniPhier LD6b SoC support" depends on ARCH_UNIPHIER_PRO5_PXS2_LD6B default y +config ARCH_UNIPHIER_LD11 + bool "Enable UniPhier LD11 SoC support" if ARCH_UNIPHIER_V8_MULTI + depends on ARCH_UNIPHIER_LD11_SINGLE || ARCH_UNIPHIER_V8_MULTI + default y + +config ARCH_UNIPHIER_LD20 + bool "E
[U-Boot] [PATCH 00/11] ARM: uniphier: recond round of UniPhier updates for v2017.03
- Make SPL optional for ARMv8 SoCs (main motivation is to use ATF) - Refactor SoC init code - Add PXs3 SoC support (DT, pinctrl driver, SoC code) Masahiro Yamada (11): ARM: uniphier: add missing static and const qualifier ARM: uniphier: make SPL optional for ARVv8 SoCs ARM: uniphier: add uniphier_v8_defconfig ARM: uniphier: replace with ARM: uniphier: replace with where possible ARM: uniphier: simplify SoC ID get function ARM: uniphier: add macro to generate SoC data look-up function ARM: dts: uniphier: compile only DT files that make sense pinctrl: uniphier: support UniPhier PXs3 pinctrl driver ARM: dts: uniphier: add PXs3 SoC/board support ARM: uniphier: add PXs3 SoC support arch/arm/Kconfig | 11 +- arch/arm/dts/Makefile | 29 +- arch/arm/dts/uniphier-pxs3-ref.dts| 51 arch/arm/dts/uniphier-pxs3.dtsi | 328 ++ arch/arm/mach-uniphier/Kconfig| 54 ++-- arch/arm/mach-uniphier/Makefile | 4 +- arch/arm/mach-uniphier/arm32/psci.c | 12 +- arch/arm/mach-uniphier/arm64/Makefile | 5 +- arch/arm/mach-uniphier/board_init.c | 57 ++-- arch/arm/mach-uniphier/boot-mode/boot-mode-ld20.c | 6 +- arch/arm/mach-uniphier/boot-mode/boot-mode.c | 32 +-- arch/arm/mach-uniphier/boot-mode/cmd_pinmon.c | 20 +- arch/arm/mach-uniphier/boot-mode/spl_board.c | 6 +- arch/arm/mach-uniphier/clk/Makefile | 1 + arch/arm/mach-uniphier/clk/dpll-ld4.c | 2 +- arch/arm/mach-uniphier/clk/dpll-pro4.c| 2 +- arch/arm/mach-uniphier/clk/dpll-sld8.c| 2 +- arch/arm/mach-uniphier/clk/pll-base-ld20.c| 3 +- arch/arm/mach-uniphier/clk/pll-ld4.c | 2 +- arch/arm/mach-uniphier/clk/pll-pro4.c | 2 +- arch/arm/mach-uniphier/clk/pll-pxs3.c | 7 + arch/arm/mach-uniphier/cpu-info.c | 76 + arch/arm/mach-uniphier/cpu_info.c | 73 - arch/arm/mach-uniphier/debug-uart/debug-uart.c| 20 +- arch/arm/mach-uniphier/dram/cmd_ddrphy.c | 10 +- arch/arm/mach-uniphier/dram/ddrphy-ld4.c | 2 +- arch/arm/mach-uniphier/dram/ddrphy-training.c | 2 +- arch/arm/mach-uniphier/dram/umc-ld20.c| 3 +- arch/arm/mach-uniphier/dram/umc-ld4.c | 2 +- arch/arm/mach-uniphier/dram/umc-pro4.c| 2 +- arch/arm/mach-uniphier/dram/umc-pxs2.c| 2 +- arch/arm/mach-uniphier/dram/umc-sld8.c| 2 +- arch/arm/mach-uniphier/dram_init.c| 4 +- arch/arm/mach-uniphier/init.h | 1 + arch/arm/mach-uniphier/memconf.c | 2 +- arch/arm/mach-uniphier/pinctrl-glue.c | 2 +- arch/arm/mach-uniphier/sbc/Makefile | 1 + arch/arm/mach-uniphier/sg-regs.h | 6 - arch/arm/mach-uniphier/soc-info.c | 34 +++ arch/arm/mach-uniphier/soc-info.h | 103 +++ arch/arm/mach-uniphier/soc_info.c | 84 -- arch/arm/mach-uniphier/spl_board_init.c | 38 +-- configs/uniphier_ld11_defconfig | 3 +- configs/uniphier_ld20_defconfig | 3 +- configs/uniphier_ld4_sld8_defconfig | 1 + configs/uniphier_pro4_defconfig | 1 + configs/uniphier_pxs2_ld6b_defconfig | 1 + configs/uniphier_sld3_defconfig | 1 + configs/uniphier_v8_defconfig | 34 +++ doc/README.uniphier | 4 + drivers/pinctrl/uniphier/Kconfig | 24 +- drivers/pinctrl/uniphier/Makefile | 1 + drivers/pinctrl/uniphier/pinctrl-uniphier-pxs3.c | 140 + include/configs/uniphier.h| 6 +- 54 files changed, 918 insertions(+), 406 deletions(-) create mode 100644 arch/arm/dts/uniphier-pxs3-ref.dts create mode 100644 arch/arm/dts/uniphier-pxs3.dtsi create mode 100644 arch/arm/mach-uniphier/clk/pll-pxs3.c create mode 100644 arch/arm/mach-uniphier/cpu-info.c delete mode 100644 arch/arm/mach-uniphier/cpu_info.c create mode 100644 arch/arm/mach-uniphier/soc-info.c delete mode 100644 arch/arm/mach-uniphier/soc_info.c create mode 100644 configs/uniphier_v8_defconfig create mode 100644 drivers/pinctrl/uniphier/pinctrl-uniphier-pxs3.c -- 2.7.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 04/11] ARM: uniphier: replace with
These files only need error number macros. Actually, IS_ERR(), PTR_ERR(), ERR_PTR(), etc. are not useful for U-Boot. Avoid unnecessary header includes. Signed-off-by: Masahiro Yamada --- arch/arm/mach-uniphier/boot-mode/boot-mode.c | 2 +- arch/arm/mach-uniphier/clk/dpll-ld4.c | 2 +- arch/arm/mach-uniphier/clk/dpll-pro4.c| 2 +- arch/arm/mach-uniphier/dram/ddrphy-ld4.c | 2 +- arch/arm/mach-uniphier/dram/ddrphy-training.c | 2 +- arch/arm/mach-uniphier/dram/umc-ld20.c| 3 ++- arch/arm/mach-uniphier/dram/umc-ld4.c | 2 +- arch/arm/mach-uniphier/dram/umc-pro4.c| 2 +- arch/arm/mach-uniphier/dram/umc-pxs2.c| 2 +- arch/arm/mach-uniphier/dram/umc-sld8.c| 2 +- arch/arm/mach-uniphier/dram_init.c| 2 +- arch/arm/mach-uniphier/memconf.c | 2 +- arch/arm/mach-uniphier/pinctrl-glue.c | 2 +- 13 files changed, 14 insertions(+), 13 deletions(-) diff --git a/arch/arm/mach-uniphier/boot-mode/boot-mode.c b/arch/arm/mach-uniphier/boot-mode/boot-mode.c index 1d53140..ebe0578 100644 --- a/arch/arm/mach-uniphier/boot-mode/boot-mode.c +++ b/arch/arm/mach-uniphier/boot-mode/boot-mode.c @@ -7,7 +7,7 @@ #include #include #include -#include +#include #include "../sbc/sbc-regs.h" #include "../soc-info.h" diff --git a/arch/arm/mach-uniphier/clk/dpll-ld4.c b/arch/arm/mach-uniphier/clk/dpll-ld4.c index a40b30d..56361ff 100644 --- a/arch/arm/mach-uniphier/clk/dpll-ld4.c +++ b/arch/arm/mach-uniphier/clk/dpll-ld4.c @@ -6,7 +6,7 @@ */ #include -#include +#include #include #include "../init.h" diff --git a/arch/arm/mach-uniphier/clk/dpll-pro4.c b/arch/arm/mach-uniphier/clk/dpll-pro4.c index 3ac48d6..d6b6262 100644 --- a/arch/arm/mach-uniphier/clk/dpll-pro4.c +++ b/arch/arm/mach-uniphier/clk/dpll-pro4.c @@ -6,7 +6,7 @@ */ #include -#include +#include #include #include "../init.h" diff --git a/arch/arm/mach-uniphier/dram/ddrphy-ld4.c b/arch/arm/mach-uniphier/dram/ddrphy-ld4.c index 620668e..c20730d 100644 --- a/arch/arm/mach-uniphier/dram/ddrphy-ld4.c +++ b/arch/arm/mach-uniphier/dram/ddrphy-ld4.c @@ -6,7 +6,7 @@ */ #include -#include +#include #include #include "ddrphy-init.h" diff --git a/arch/arm/mach-uniphier/dram/ddrphy-training.c b/arch/arm/mach-uniphier/dram/ddrphy-training.c index 005ca18..fa29a43 100644 --- a/arch/arm/mach-uniphier/dram/ddrphy-training.c +++ b/arch/arm/mach-uniphier/dram/ddrphy-training.c @@ -6,7 +6,7 @@ */ #include -#include +#include #include #include "ddrphy-init.h" diff --git a/arch/arm/mach-uniphier/dram/umc-ld20.c b/arch/arm/mach-uniphier/dram/umc-ld20.c index df6cc01..61f62ae 100644 --- a/arch/arm/mach-uniphier/dram/umc-ld20.c +++ b/arch/arm/mach-uniphier/dram/umc-ld20.c @@ -8,7 +8,8 @@ #include #include -#include +#include +#include #include #include #include diff --git a/arch/arm/mach-uniphier/dram/umc-ld4.c b/arch/arm/mach-uniphier/dram/umc-ld4.c index 90e7f2d..06aa054 100644 --- a/arch/arm/mach-uniphier/dram/umc-ld4.c +++ b/arch/arm/mach-uniphier/dram/umc-ld4.c @@ -7,7 +7,7 @@ */ #include -#include +#include #include #include #include diff --git a/arch/arm/mach-uniphier/dram/umc-pro4.c b/arch/arm/mach-uniphier/dram/umc-pro4.c index 5447fa9..740247a 100644 --- a/arch/arm/mach-uniphier/dram/umc-pro4.c +++ b/arch/arm/mach-uniphier/dram/umc-pro4.c @@ -7,7 +7,7 @@ */ #include -#include +#include #include #include #include diff --git a/arch/arm/mach-uniphier/dram/umc-pxs2.c b/arch/arm/mach-uniphier/dram/umc-pxs2.c index b4da3d2..90465dd 100644 --- a/arch/arm/mach-uniphier/dram/umc-pxs2.c +++ b/arch/arm/mach-uniphier/dram/umc-pxs2.c @@ -8,7 +8,7 @@ */ #include -#include +#include #include #include #include diff --git a/arch/arm/mach-uniphier/dram/umc-sld8.c b/arch/arm/mach-uniphier/dram/umc-sld8.c index 61369f1..a0c2871 100644 --- a/arch/arm/mach-uniphier/dram/umc-sld8.c +++ b/arch/arm/mach-uniphier/dram/umc-sld8.c @@ -7,7 +7,7 @@ */ #include -#include +#include #include #include #include diff --git a/arch/arm/mach-uniphier/dram_init.c b/arch/arm/mach-uniphier/dram_init.c index 489366c..87418f4 100644 --- a/arch/arm/mach-uniphier/dram_init.c +++ b/arch/arm/mach-uniphier/dram_init.c @@ -7,7 +7,7 @@ #include #include #include -#include +#include #include "init.h" #include "soc-info.h" diff --git a/arch/arm/mach-uniphier/memconf.c b/arch/arm/mach-uniphier/memconf.c index 205ccf1..dcfc645 100644 --- a/arch/arm/mach-uniphier/memconf.c +++ b/arch/arm/mach-uniphier/memconf.c @@ -7,7 +7,7 @@ */ #include -#include +#include #include #include diff --git a/arch/arm/mach-uniphier/pinctrl-glue.c b/arch/arm/mach-uniphier/pinctrl-glue.c index 48549e3..c52c6a6 100644 --- a/arch/arm/mach-uniphier/pinctrl-glue.c +++ b/arch/arm/mach-uniphier/pinctrl-glue.c @@ -5,7 +5,7 @@ * SPDX-License-Identifier:GPL-2.0+ */ -#include +#include #include #incl
[U-Boot] [PATCH 06/11] ARM: uniphier: simplify SoC ID get function
Currently, uniphier_get_soc_type() converts the SoC ID (this is
read from the revision register) to an enum symbol to use it for SoC
identification. Come to think of it, there is no need for the
conversion in the first place. Using the SoC ID from the register
as-is a straightforward way.
Signed-off-by: Masahiro Yamada
---
arch/arm/mach-uniphier/Makefile | 4 +-
arch/arm/mach-uniphier/arm32/psci.c | 12 ++--
arch/arm/mach-uniphier/board_init.c | 26 +++
arch/arm/mach-uniphier/boot-mode/boot-mode-ld20.c | 6 +-
arch/arm/mach-uniphier/boot-mode/boot-mode.c | 30
arch/arm/mach-uniphier/boot-mode/cmd_pinmon.c | 20 +++---
arch/arm/mach-uniphier/boot-mode/spl_board.c | 6 +-
arch/arm/mach-uniphier/cpu-info.c | 73 +++
arch/arm/mach-uniphier/cpu_info.c | 73 ---
arch/arm/mach-uniphier/debug-uart/debug-uart.c| 20 +++---
arch/arm/mach-uniphier/dram/cmd_ddrphy.c | 10 +--
arch/arm/mach-uniphier/dram_init.c| 2 +-
arch/arm/mach-uniphier/sg-regs.h | 6 --
arch/arm/mach-uniphier/soc-info.c | 34 +
arch/arm/mach-uniphier/soc-info.h | 88 +--
arch/arm/mach-uniphier/soc_info.c | 84 --
arch/arm/mach-uniphier/spl_board_init.c | 26 +++
17 files changed, 206 insertions(+), 314 deletions(-)
create mode 100644 arch/arm/mach-uniphier/cpu-info.c
delete mode 100644 arch/arm/mach-uniphier/cpu_info.c
create mode 100644 arch/arm/mach-uniphier/soc-info.c
delete mode 100644 arch/arm/mach-uniphier/soc_info.c
diff --git a/arch/arm/mach-uniphier/Makefile b/arch/arm/mach-uniphier/Makefile
index ab2c6dc..abfdccc 100644
--- a/arch/arm/mach-uniphier/Makefile
+++ b/arch/arm/mach-uniphier/Makefile
@@ -10,7 +10,7 @@ obj-y += bcu/
else
-obj-$(CONFIG_DISPLAY_CPUINFO) += cpu_info.o
+obj-$(CONFIG_DISPLAY_CPUINFO) += cpu-info.o
obj-y += dram_init.o
obj-y += board_init.o
obj-$(CONFIG_BOARD_LATE_INIT) += board_late_init.o
@@ -22,7 +22,7 @@ obj-y += pinctrl-glue.o
endif
obj-y += boards.o
-obj-y += soc_info.o
+obj-y += soc-info.o
obj-y += boot-mode/
obj-y += clk/
obj-y += dram/
diff --git a/arch/arm/mach-uniphier/arm32/psci.c
b/arch/arm/mach-uniphier/arm32/psci.c
index e668265..65a468d 100644
--- a/arch/arm/mach-uniphier/arm32/psci.c
+++ b/arch/arm/mach-uniphier/arm32/psci.c
@@ -28,13 +28,13 @@ u32 uniphier_smp_booted[CONFIG_ARMV7_PSCI_NR_CPUS];
static int uniphier_get_nr_cpus(void)
{
- switch (uniphier_get_soc_type()) {
- case SOC_UNIPHIER_SLD3:
- case SOC_UNIPHIER_PRO4:
- case SOC_UNIPHIER_PRO5:
+ switch (uniphier_get_soc_id()) {
+ case UNIPHIER_SLD3_ID:
+ case UNIPHIER_PRO4_ID:
+ case UNIPHIER_PRO5_ID:
return 2;
- case SOC_UNIPHIER_PXS2:
- case SOC_UNIPHIER_LD6B:
+ case UNIPHIER_PXS2_ID:
+ case UNIPHIER_LD6B_ID:
return 4;
default:
return 1;
diff --git a/arch/arm/mach-uniphier/board_init.c
b/arch/arm/mach-uniphier/board_init.c
index 2269291..413b338 100644
--- a/arch/arm/mach-uniphier/board_init.c
+++ b/arch/arm/mach-uniphier/board_init.c
@@ -80,7 +80,7 @@ static void uniphier_ld20_misc_init(void)
#endif
struct uniphier_initdata {
- enum uniphier_soc_id soc_id;
+ unsigned int soc_id;
bool nand_2cs;
void (*sbc_init)(void);
void (*pll_init)(void);
@@ -91,7 +91,7 @@ struct uniphier_initdata {
static const struct uniphier_initdata uniphier_initdata[] = {
#if defined(CONFIG_ARCH_UNIPHIER_SLD3)
{
- .soc_id = SOC_UNIPHIER_SLD3,
+ .soc_id = UNIPHIER_SLD3_ID,
.nand_2cs = true,
.sbc_init = uniphier_sbc_init_admulti,
.pll_init = uniphier_sld3_pll_init,
@@ -100,7 +100,7 @@ static const struct uniphier_initdata uniphier_initdata[] =
{
#endif
#if defined(CONFIG_ARCH_UNIPHIER_LD4)
{
- .soc_id = SOC_UNIPHIER_LD4,
+ .soc_id = UNIPHIER_LD4_ID,
.nand_2cs = true,
.sbc_init = uniphier_ld4_sbc_init,
.pll_init = uniphier_ld4_pll_init,
@@ -109,7 +109,7 @@ static const struct uniphier_initdata uniphier_initdata[] =
{
#endif
#if defined(CONFIG_ARCH_UNIPHIER_PRO4)
{
- .soc_id = SOC_UNIPHIER_PRO4,
+ .soc_id = UNIPHIER_PRO4_ID,
.nand_2cs = false,
.sbc_init = uniphier_sbc_init_savepin,
.pll_init = uniphier_pro4_pll_init,
@@ -118,7 +118,7 @@ static const struct uniphier_initdata uniphier_initdata[] =
{
#endif
#if defined(CONFIG_ARCH_UNIPHIER_SLD8)
{
- .soc_id = SOC_UNIPHIER_SLD8,
+ .soc_id = UNIPHIER_SLD8_ID,
.nand_2cs = true,
.sbc_init = uniphier_ld4_sbc_init,
