Re: [U-Boot] [PATCH v5 0/3] sunxi: fix eMMC stability issues on A64
On Tue, Jun 05, 2018 at 09:56:26PM -0700, Vasily Khoruzhick wrote: > eMMC seems to require new clocking mode and calibration on A64, > otherwise it is pretty unstable on some boards (e.g. Pinebook) > with some eMMCs. > > v2: - improve comment about calibration for eMMC on A64 > - simplify ifdef-s around configuring delays > v3: - fix fallout due to ifdef simplification in v2 > v4: - really fix ifdefs this time > v5: - add new option for SoCs without new mode switch in CCM Acked-by: Maxime Ripard Thanks! Maxime -- Maxime Ripard, Bootlin (formerly Free Electrons) Embedded Linux and Kernel engineering https://bootlin.com signature.asc Description: PGP signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH] if_changed: fix error handling
Hi Chris, On 06/06/2018 05:23, Chris Packham wrote: > Hi, > > On Tue, Jun 5, 2018 at 2:08 AM Luca Ceresoli wrote: >> >> The commands in if_changed and if_changed_dep are concatenated with a >> ';', thus any error in any command except the last one will be >> silently ignored. This is particularly relevant for the actual >> payload, cmd_$(1), whose errors should not be unnoticed. >> >> Fix by replacing the ';' with '&&'. >> >> Signed-off-by: Luca Ceresoli >> >> --- >> >> Note: I'm not aware of any situation in which this bug has any visible >> effect. I noticed the problem while working on a different topic, but >> later I did that job in a different way, not involving if_changed >> usages. But this is a bug anyway, so let's fix it. >> --- >> scripts/Kbuild.include | 12 ++-- >> 1 file changed, 6 insertions(+), 6 deletions(-) >> >> diff --git a/scripts/Kbuild.include b/scripts/Kbuild.include >> index 2c7918ad3721..f722f75611df 100644 >> --- a/scripts/Kbuild.include >> +++ b/scripts/Kbuild.include >> @@ -255,16 +255,16 @@ any-pThis is tricky, arereq = $(filter-out >> $(PHONY),$?) $(filter-out $(PHONY) $(wildcard $^),$^) >> # Execute command if command has changed or prerequisite(s) are updated. >> # >> if_changed = $(if $(strip $(any-prereq) $(arg-check)), >> \ >> - @set -e; >> \ >> - $(echo-cmd) $(cmd_$(1)); >> \ >> + @set -e; >> \ >> + $(echo-cmd) $(cmd_$(1)) && >> \ >> printf '%s\n' 'cmd_$@ := $(make-cmd)' > $(dot-target).cmd) >> >> # Execute the command and also postprocess generated .d dependencies file. >> if_changed_dep = $(if $(strip $(any-prereq) $(arg-check) ), >> \ >> - @set -e; >> \ >> - $(echo-cmd) $(cmd_$(1)); >> \ >> - scripts/basic/fixdep $(depfile) $@ '$(make-cmd)' > >> $(dot-target).tmp;\ >> - rm -f $(depfile); >> \ >> + @set -e; >> \ >> + $(echo-cmd) $(cmd_$(1)) && >> \ >> + scripts/basic/fixdep $(depfile) $@ '$(make-cmd)' > $(dot-target).tmp >> && \ >> + rm -f $(depfile) && >> \ >> mv -f $(dot-target).tmp $(dot-target).cmd) >> >> # Usage: $(call if_changed_rule,foo) > > The 'set -e' should cause the sub-shell to exit immediately if any of > the commands fail, regardless of the ';' vs '&&'. Thanks for your comment, it triggered me to go deeper in understanding the issue. Apologies for not having clarified it all in the first place. Actually ';' and '&&' are not treated the same way. The bash manpage states about 'set -e': > The shell does not exit if the command that fails is [...] part of > any command executed in a && or || list except the command following > the final && or || The issue I had initially happened when I wrote something like this: cmd_mkimage = test -r /no/such/file && \ $(objtree)/tools/mkimage $(MKIMAGEFLAGS_$(@F)) -d $< $@ \ >$(MKIMAGEOUTPUT) $(if $(KBUILD_VERBOSE:0=), && cat $(MKIMAGEOUTPUT)) If the 'test' command fails, set -e won't stop the build. But replacing '&&' with ';' makes the build stop immediately as expected. So I guess cmd_mkimage is just meant to be used with ';'. > Assuming I'm wrong above, this patch should probably go to the kbuild > mailing list http://vger.kernel.org/vger-lists.html#linux-kbuild -- Luca ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH 0/2] Add MDIO driver model support
From: Ken Ma Ken Ma (2): dm: mdio: add a uclass for MDIO mdio: add marvell MDIO driver MAINTAINERS| 2 + arch/arm/Kconfig | 1 + doc/device-tree-bindings/mdio/marvell-mdio.txt | 18 ++ doc/device-tree-bindings/mdio/mdio-bus.txt | 54 ++ drivers/Kconfig| 2 + drivers/Makefile | 1 + drivers/mdio/Kconfig | 28 +++ drivers/mdio/Makefile | 7 + drivers/mdio/mdio-uclass.c | 119 + drivers/mdio/mvmdio.c | 237 + include/dm/uclass-id.h | 1 + include/mdio.h | 62 +++ 12 files changed, 532 insertions(+) create mode 100644 doc/device-tree-bindings/mdio/marvell-mdio.txt create mode 100644 doc/device-tree-bindings/mdio/mdio-bus.txt create mode 100644 drivers/mdio/Kconfig create mode 100644 drivers/mdio/Makefile create mode 100644 drivers/mdio/mdio-uclass.c create mode 100644 drivers/mdio/mvmdio.c create mode 100644 include/mdio.h -- 1.9.1 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH 2/2] mdio: add marvell MDIO driver
From: Ken Ma This patch adds a separate driver for the MDIO interface of the Marvell Ethernet controllers based on driver model. There are two reasons to have a separate driver rather than including it inside the MAC driver itself: *) The MDIO interface is shared by all Ethernet ports, so a driver must guarantee non-concurrent accesses to this MDIO interface. The most logical way is to have a separate driver that handles this single MDIO interface, used by all Ethernet ports. *) The MDIO interface is the same between the existing mv643xx_eth driver and the new mvneta/mvpp2 driver. Even though it is for now only used by the mvneta/mvpp2 driver, it will in the future be used by the mv643xx_eth driver as well. This driver supports SMI IEEE for 802.3 Clause 22 and XSMI for IEEE 802.3 Clause 45. This patch also adds device tree binding for marvell MDIO driver. Signed-off-by: Ken Ma --- MAINTAINERS| 1 + arch/arm/Kconfig | 1 + doc/device-tree-bindings/mdio/marvell-mdio.txt | 18 ++ drivers/mdio/Kconfig | 10 ++ drivers/mdio/Makefile | 1 + drivers/mdio/mvmdio.c | 237 + 6 files changed, 268 insertions(+) create mode 100644 doc/device-tree-bindings/mdio/marvell-mdio.txt create mode 100644 drivers/mdio/mvmdio.c diff --git a/MAINTAINERS b/MAINTAINERS index f66a904..fb58f17 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -137,6 +137,7 @@ T: git git://git.denx.de/u-boot-marvell.git F: arch/arm/mach-kirkwood/ F: arch/arm/mach-mvebu/ F: drivers/ata/ahci_mvebu.c +F: drivers/mdio/mvmdio.c ARM MARVELL PXA M: Marek Vasut diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index dde422b..aae4570 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -432,6 +432,7 @@ config ARCH_MVEBU select DM_SPI select DM_SPI_FLASH select SPI + select DM_MDIO config TARGET_DEVKIT3250 bool "Support devkit3250" diff --git a/doc/device-tree-bindings/mdio/marvell-mdio.txt b/doc/device-tree-bindings/mdio/marvell-mdio.txt new file mode 100644 index 000..55db435 --- /dev/null +++ b/doc/device-tree-bindings/mdio/marvell-mdio.txt @@ -0,0 +1,18 @@ +* Marvell MDIO Ethernet Controller interface + +The Ethernet controllers of the Marvel Armada 3700 and Armada 7k/8k +have an identical unit that provides an interface with the MDIO bus. +This driver handles this MDIO interface. + +Mandatory properties: +SoC specific: + - #address-cells: Must be <1>. + - #size-cells: Must be <0>. + - compatible: Should be "marvell,orion-mdio" (for SMI) + "marvell,xmdio" (for XSMI) + - reg: Base address and size SMI/XMSI bus. + +Optional properties: + - mdio-name - MDIO bus name + +For example, please refer to "mdio-bus.txt". diff --git a/drivers/mdio/Kconfig b/drivers/mdio/Kconfig index 76e3758..ce251c5 100644 --- a/drivers/mdio/Kconfig +++ b/drivers/mdio/Kconfig @@ -15,4 +15,14 @@ config DM_MDIO udevice or mii bus from its child phy node or an ethernet udevice which the phy belongs to. +config MVMDIO + bool "Marvell MDIO interface support" + depends on DM_MDIO + select PHYLIB + help + This driver supports the MDIO interface found in the network + interface units of the Marvell EBU SoCs (Kirkwood, Orion5x, + Dove, Armada 370, Armada XP, Armada 37xx and Armada7K/8K/8KP). + + This driver is used by the MVPP2 and MVNETA drivers. endmenu diff --git a/drivers/mdio/Makefile b/drivers/mdio/Makefile index 9b290c0..9f571aa 100644 --- a/drivers/mdio/Makefile +++ b/drivers/mdio/Makefile @@ -4,3 +4,4 @@ # Author: Ken Ma obj-$(CONFIG_DM_MDIO) += mdio-uclass.o +obj-$(CONFIG_MVMDIO) += mvmdio.o diff --git a/drivers/mdio/mvmdio.c b/drivers/mdio/mvmdio.c new file mode 100644 index 000..b2c6636 --- /dev/null +++ b/drivers/mdio/mvmdio.c @@ -0,0 +1,237 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2018 Marvell International Ltd. + * Author: Ken Ma + */ + +#include +#include +#include +#include +#include +#include +#include + +DECLARE_GLOBAL_DATA_PTR; + +#define MVMDIO_SMI_DATA_SHIFT 0 +#define MVMDIO_SMI_PHY_ADDR_SHIFT 16 +#define MVMDIO_SMI_PHY_REG_SHIFT 21 +#define MVMDIO_SMI_READ_OPERATION BIT(26) +#define MVMDIO_SMI_WRITE_OPERATION 0 +#define MVMDIO_SMI_READ_VALID BIT(27) +#define MVMDIO_SMI_BUSYBIT(28) + +#define MVMDIO_XSMI_MGNT_REG 0x0 +#define MVMDIO_XSMI_PHYADDR_SHIFT 16 +#define MVMDIO_XSMI_DEVADDR_SHIFT 21 +#define MVMDIO_XSMI_WRITE_OPERATION(0x5 << 26) +#define MVMDIO_XSMI_READ_OPERATION (0x7 << 26) +#define MVMDIO_XSMI_READ_VALID BIT(29) +#define MVMDIO_XSMI_BUSY BIT(30) +#define MVMDIO_XSMI_ADDR_REG
[U-Boot] [PATCH 1/2] dm: mdio: add a uclass for MDIO
From: Ken Ma
Add a uclass which provides access to MDIO busses and includes
operations required by MDIO.
The implementation is based on the existing mii/phy/mdio data
structures and APIs.
This patch also adds evice tree binding for MDIO bus.
Signed-off-by: Ken Ma
---
MAINTAINERS| 1 +
doc/device-tree-bindings/mdio/mdio-bus.txt | 54 +
drivers/Kconfig| 2 +
drivers/Makefile | 1 +
drivers/mdio/Kconfig | 18 +
drivers/mdio/Makefile | 6 ++
drivers/mdio/mdio-uclass.c | 119 +
include/dm/uclass-id.h | 1 +
include/mdio.h | 62 +++
9 files changed, 264 insertions(+)
create mode 100644 doc/device-tree-bindings/mdio/mdio-bus.txt
create mode 100644 drivers/mdio/Kconfig
create mode 100644 drivers/mdio/Makefile
create mode 100644 drivers/mdio/mdio-uclass.c
create mode 100644 include/mdio.h
diff --git a/MAINTAINERS b/MAINTAINERS
index 642c448..f66a904 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -335,6 +335,7 @@ M: Simon Glass
S: Maintained
T: git git://git.denx.de/u-boot-dm.git
F: drivers/core/
+F: drivers/mdio/
F: include/dm/
F: test/dm/
diff --git a/doc/device-tree-bindings/mdio/mdio-bus.txt
b/doc/device-tree-bindings/mdio/mdio-bus.txt
new file mode 100644
index 000..68d8b25
--- /dev/null
+++ b/doc/device-tree-bindings/mdio/mdio-bus.txt
@@ -0,0 +1,54 @@
+MDIO (Management Data Input/Output) busses
+
+MDIO busses can be described with a node for the MDIO master device
+and a set of child nodes for each phy on the bus.
+
+The MDIO node requires the following properties:
+- #address-cells - number of cells required to define phy address on
+the MDIO bus.
+- #size-cells - should be zero.
+- compatible - name of MDIO bus controller following generic names
+recommended practice.
+- reg- address and length of the MDIO register.
+
+Optional property:
+- mdio-name - MDIO bus name
+
+The child nodes of the MDIO driver are the individual PHY devices
+connected to this MDIO bus. They must have a "reg" property given the
+PHY address on the MDIO bus.
+- reg - (required) phy address in MDIO bus.
+
+Example for cp110 MDIO node at the SoC level:
+ cp0_mdio: mdio@12a200 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "marvell,orion-mdio";
+ reg = <0x12a200 0x10>;
+ mdio-name = "cp0-mdio";
+ };
+
+ cp0_xmdio: mdio@12a600 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "marvell,xmdio";
+ reg = <0x12a600 0x200>;
+ mdio-name = "cp0-xmdio";
+ };
+
+And at the board level, example for armada-8040-mcbin board:
+ &cp0_mdio {
+ ge_phy: ethernet-phy@0 {
+ reg = <0>;
+ };
+ };
+
+ &cp0_xmdio {
+ phy0: ethernet-phy@0 {
+ reg = <0>;
+ };
+
+ phy8: ethernet-phy@8 {
+ reg = <8>;
+ };
+ };
diff --git a/drivers/Kconfig b/drivers/Kconfig
index 9e21b28..3fc0a90 100644
--- a/drivers/Kconfig
+++ b/drivers/Kconfig
@@ -44,6 +44,8 @@ source "drivers/led/Kconfig"
source "drivers/mailbox/Kconfig"
+source "drivers/mdio/Kconfig"
+
source "drivers/memory/Kconfig"
source "drivers/misc/Kconfig"
diff --git a/drivers/Makefile b/drivers/Makefile
index a213ea9..041a7bf 100644
--- a/drivers/Makefile
+++ b/drivers/Makefile
@@ -82,6 +82,7 @@ obj-y += dfu/
obj-$(CONFIG_X86) += pch/
obj-y += phy/allwinner/
obj-y += phy/marvell/
+obj-y += mdio/
obj-y += rtc/
obj-y += scsi/
obj-y += sound/
diff --git a/drivers/mdio/Kconfig b/drivers/mdio/Kconfig
new file mode 100644
index 000..76e3758
--- /dev/null
+++ b/drivers/mdio/Kconfig
@@ -0,0 +1,18 @@
+#
+# MDIO infrastructure and drivers
+#
+
+menu "MDIO Support"
+
+config DM_MDIO
+ bool "Enable Driver Model for MDIO drivers"
+ depends on DM
+ help
+ Enable driver model for MDIO access.
+ Drivers provide methods to management data
+ Input/Output.
+ MDIO uclass provides interfaces to get mdio
+ udevice or mii bus from its child phy node or
+ an ethernet udevice which the phy belongs to.
+
+endmenu
diff --git a/drivers/mdio/Makefile b/drivers/mdio/Makefile
new file mode 100644
index 000..9b290c0
--- /dev/null
+++ b/drivers/mdio/Makefile
@@ -0,0 +1,6 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+# Copyright (C) 2018 Marvell International Ltd.
+# Author: Ken Ma
+
+obj-$(CONFIG_DM_MDIO) += mdio-uclass.o
diff --git a/drivers/mdio/mdio-uclass.c b/drivers/mdio/mdio-uclass.c
new file mode 100644
index 000..
Re: [U-Boot] [PATCH] x86: Add 64-bit setjmp/longjmp implementation
On 05.06.18 19:56, Ivan Gorinov wrote:
> On Sun, Jun 03, 2018 at 02:06:47PM +0200, Alexander Graf wrote:
>> On 02.06.18 20:44, Heinrich Schuchardt wrote:
>>> On 05/31/2018 12:50 AM, Ivan Gorinov wrote:
Add setjmp/longjmp functions for x86_64,
based on existing 32-bit implementation.
>>>
>>> Thank you for your patch. This addresses a gap that really should be closed.
>>>
>>> Please, add a line to the commit message indicating the calling
>>> conventions that are supported. This is important because we use
>>> different calling conventions in different places.
>>>
>>> One function where we need setjmp() is efi_start_image(). The function
>>> is defined as EFIAPI. So we need an implementation supporting the ms_abi
>>> calling convention.
>>
>> I don't quite follow. The calling convention is declared in the C header
>> (omitted means sysv, EFIAPI means ms). The compiler will adapt the call
>> to the respective convention automatically. So if you call a sysv
>> function from an EFIAPI function, gcc will push all registers that are
>> potentially getting clobbered on the stack.
>
> I can confirm that gcc does save %rsi and %rdi in EFIAPI functions before
> using those two registers for setjmp() parameters. The other callee-saved
> registers in ms_abi are also callee-saved in sysv and correctly handled by
> the proposed implementation.
>
> static efi_status_t EFIAPI efi_start_image(efi_handle_t image_handle,
> unsigned long *exit_data_size,
> s16 **exit_data)
> {
> 5f03ce56: 57 push %rdi
> 5f03ce57: 56 push %rsi
>
> ...
>
> /* call the image! */
> if (setjmp(&info->exit_jmp)) {
> 5f03cecd: 48 8b 84 24 f0 00 00mov0xf0(%rsp),%rax
> 5f03ced4: 00
> 5f03ced5: 48 8d 78 78 lea0x78(%rax),%rdi
> 5f03ced9: e8 82 32 fc ff callq 5f000160
> 5f03cede: 85 c0 test %eax,%eax
> 5f03cee0: 74 1b je 5f03cefd
>
> ...
>
>> So IIUC we really only need the sysv variant - which this patch
>> implements, right? This also shouldn't need any mentioning, as it's the
>> default throughout the code base, unless the function is annotated with
>> the EFIAPI tag.
>
>>> Another function where we use setjmp() is do_bootefi_exec() but this
>>> function is defined as sysv_abi.
>>>
>>> I guess the patch relates to the sysv_abi calling convention:
>>>
>>> "System V Application Binary Interface: AMD64 Architecture Processor
>>> Supplement (With LP64 and ILP32 Programming Models)"
>>> https://software.intel.com/sites/default/files/article/402129/mpx-linux64-abi.pdf
>>>
>>> This document contains the following sentence:
>>>
>>> The control bits of the MXCSR register are callee-saved (preserved
>>> across calls), while the status bits are caller-saved (not preserved).
>>> I cannot see that this is reflected in the patch.
>
> Thank you for the link! I will add MXCSR to the callee-saved register set.
>
>>> See also https://msdn.microsoft.com/en-us/library/36d3b75w.aspx
>>>
>>> Your setjmp implemantion is not usable for the ms_abi that we need in
>>> for efi_start_image(). Here you would have to save registers RBX, RBP,
>>> RDI, RSI, RSP, R12, R13, R14, and R15.
>>>
>>> As reference have a look at this implementation:
>>> https://github.com/freebsd/freebsd/blob/master/lib/libc/amd64/gen/setjmp.S
>>>
Signed-off-by: Ivan Gorinov
>>>
>>>
>>>
---
arch/x86/cpu/x86_64/setjmp.S | 56
+++
arch/x86/cpu/x86_64/setjmp.c | 19 ---
arch/x86/include/asm/setjmp.h | 17 +
3 files changed, 73 insertions(+), 19 deletions(-)
create mode 100644 arch/x86/cpu/x86_64/setjmp.S
delete mode 100644 arch/x86/cpu/x86_64/setjmp.c
diff --git a/arch/x86/cpu/x86_64/setjmp.S b/arch/x86/cpu/x86_64/setjmp.S
new file mode 100644
index 000..e10ee49
--- /dev/null
+++ b/arch/x86/cpu/x86_64/setjmp.S
@@ -0,0 +1,56 @@
+/*
+ * Based on arch/x86/cpu/i386/setjmp.S by H. Peter Anvin
+ *
+ * SPDX-License-Identifier: GPL-2.0
+ */
+
+/*
+ * The jmp_buf is assumed to contain the following, in order:
+ *
+ *%rsp
+ *%rbp
+ *%rbx
+ *%r12
+ *%r13
+ *%r14
+ *%r15
+ */
+
+.text
+.align 8
+.globlsetjmp
+.type setjmp, @function
+
+setjmp:
>>
>> We have macros for asm provided functions (see arch/arm/lib/setjmp.S) to
>> ensure that linker based section elimination works. Please make sure you
>> use those.
>
> OK. Shall I also add .pushsection/.popsection?
> Can't find any example in arch/x86/
The ENTRY/ENDPROC macros are architecture agnostic, so you should just
be able to use them exactly l
Re: [U-Boot] [RFC][PATCH] spl: vboot: Verify content before using load_addr
2018-06-06 9:08 GMT+08:00 Teddy Reed : > When using verified-boot in the SPL, the FIT content must be > verified before it can be used. > > Currently the load_addr FIT property is read and used as input to > memcpy before the property is verified. > > Signed-off-by: Teddy Reed > --- Reviewed-by: Jun Nie ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH 2/2] mdio: add marvell MDIO driver
Hi Ken, On Wed, Jun 6, 2018 at 8:06 PM wrote: > > From: Ken Ma aside, awesome email address for someone in embedded development :) Some minor comments below Reviewed-by: Chris Packham > This patch adds a separate driver for the MDIO interface of the > Marvell Ethernet controllers based on driver model. There are two > reasons to have a separate driver rather than including it inside > the MAC driver itself: > *) The MDIO interface is shared by all Ethernet ports, so a driver > must guarantee non-concurrent accesses to this MDIO interface. The > most logical way is to have a separate driver that handles this > single MDIO interface, used by all Ethernet ports. > *) The MDIO interface is the same between the existing mv643xx_eth > driver and the new mvneta/mvpp2 driver. Even though it is for now > only used by the mvneta/mvpp2 driver, it will in the future be > used by the mv643xx_eth driver as well. Yay. In u-boot mv643xx_eth is mvgbe.c. I've been looking at converting it to DM but the first problem I hit was the MDIO interface so this is very much welcome. Were you planning on adding an actual mv643xx_eth driver or is that just a copy/paste from Linux? > > This driver supports SMI IEEE for 802.3 Clause 22 and XSMI for IEEE > 802.3 Clause 45. > > This patch also adds device tree binding for marvell MDIO driver. > > Signed-off-by: Ken Ma > --- > > MAINTAINERS| 1 + > arch/arm/Kconfig | 1 + > doc/device-tree-bindings/mdio/marvell-mdio.txt | 18 ++ > drivers/mdio/Kconfig | 10 ++ > drivers/mdio/Makefile | 1 + > drivers/mdio/mvmdio.c | 237 > + > 6 files changed, 268 insertions(+) > create mode 100644 doc/device-tree-bindings/mdio/marvell-mdio.txt > create mode 100644 drivers/mdio/mvmdio.c > > diff --git a/MAINTAINERS b/MAINTAINERS > index f66a904..fb58f17 100644 > --- a/MAINTAINERS > +++ b/MAINTAINERS > @@ -137,6 +137,7 @@ T: git git://git.denx.de/u-boot-marvell.git > F: arch/arm/mach-kirkwood/ > F: arch/arm/mach-mvebu/ > F: drivers/ata/ahci_mvebu.c > +F: drivers/mdio/mvmdio.c > > ARM MARVELL PXA > M: Marek Vasut > diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig > index dde422b..aae4570 100644 > --- a/arch/arm/Kconfig > +++ b/arch/arm/Kconfig > @@ -432,6 +432,7 @@ config ARCH_MVEBU > select DM_SPI > select DM_SPI_FLASH > select SPI > + select DM_MDIO > > config TARGET_DEVKIT3250 > bool "Support devkit3250" > diff --git a/doc/device-tree-bindings/mdio/marvell-mdio.txt > b/doc/device-tree-bindings/mdio/marvell-mdio.txt > new file mode 100644 > index 000..55db435 > --- /dev/null > +++ b/doc/device-tree-bindings/mdio/marvell-mdio.txt > @@ -0,0 +1,18 @@ > +* Marvell MDIO Ethernet Controller interface > + > +The Ethernet controllers of the Marvel Armada 3700 and Armada 7k/8k > +have an identical unit that provides an interface with the MDIO bus. > +This driver handles this MDIO interface. > + > +Mandatory properties: > +SoC specific: > + - #address-cells: Must be <1>. > + - #size-cells: Must be <0>. > + - compatible: Should be "marvell,orion-mdio" (for SMI) > + "marvell,xmdio" (for XSMI) > + - reg: Base address and size SMI/XMSI bus. > + > +Optional properties: > + - mdio-name - MDIO bus name > + > +For example, please refer to "mdio-bus.txt". > diff --git a/drivers/mdio/Kconfig b/drivers/mdio/Kconfig > index 76e3758..ce251c5 100644 > --- a/drivers/mdio/Kconfig > +++ b/drivers/mdio/Kconfig > @@ -15,4 +15,14 @@ config DM_MDIO > udevice or mii bus from its child phy node or > an ethernet udevice which the phy belongs to. > > +config MVMDIO > + bool "Marvell MDIO interface support" > + depends on DM_MDIO > + select PHYLIB > + help > + This driver supports the MDIO interface found in the network > + interface units of the Marvell EBU SoCs (Kirkwood, Orion5x, > + Dove, Armada 370, Armada XP, Armada 37xx and Armada7K/8K/8KP). > + > + This driver is used by the MVPP2 and MVNETA drivers. > endmenu > diff --git a/drivers/mdio/Makefile b/drivers/mdio/Makefile > index 9b290c0..9f571aa 100644 > --- a/drivers/mdio/Makefile > +++ b/drivers/mdio/Makefile > @@ -4,3 +4,4 @@ > # Author: Ken Ma > > obj-$(CONFIG_DM_MDIO) += mdio-uclass.o > +obj-$(CONFIG_MVMDIO) += mvmdio.o > diff --git a/drivers/mdio/mvmdio.c b/drivers/mdio/mvmdio.c > new file mode 100644 > index 000..b2c6636 > --- /dev/null > +++ b/drivers/mdio/mvmdio.c > @@ -0,0 +1,237 @@ > +// SPDX-License-Identifier: GPL-2.0+ > +/* > + * Copyright (C) 2018 Marvell International Ltd. > + * Author: Ken Ma > + */ > + > +#include > +#include > +#include > +#include > +#include > +#include > +#include > + > +DECLARE_GLOBAL_DATA_PTR; >
Re: [U-Boot] [PATCH] riscv: Add support for HI20 PE relocations
> -Original Message-
> From: Alexander Graf [mailto:ag...@suse.de]
> Sent: Wednesday, June 06, 2018 1:21 AM
> To: u-boot@lists.denx.de
> Cc: Rick Jian-Zhi Chen(陳建志)
> Subject: [PATCH] riscv: Add support for HI20 PE relocations
>
> The PE standard allows for HI20/LOW12 relocations. Within the efi_loader
> target
> we always know that our relocation target is 4k aligned, so we don't need to
> worry about the LOW12 part.
>
> This patch adds support for the respective relocations. With this and a few
> grub
> patches I have cooking in parallel I'm able to run grub on RISC-V.
>
> Signed-off-by: Alexander Graf
> ---
> include/pe.h | 3 +++
> lib/efi_loader/efi_image_loader.c | 14 ++
> 2 files changed, 17 insertions(+)
>
> diff --git a/include/pe.h b/include/pe.h index d73eb142cb..36e1908b7e 100644
> --- a/include/pe.h
> +++ b/include/pe.h
> @@ -201,10 +201,13 @@ typedef struct _IMAGE_RELOCATION
> #define IMAGE_REL_BASED_MIPS_JMPADDR5
> #define IMAGE_REL_BASED_ARM_MOV32A 5 /* yes, 5 too */
> #define IMAGE_REL_BASED_ARM_MOV32 5 /* yes, 5 too */
> +#define IMAGE_REL_BASED_RISCV_HI20 5 /* yes, 5 too */
> #define IMAGE_REL_BASED_SECTION 6
> #define IMAGE_REL_BASED_REL 7
> #define IMAGE_REL_BASED_ARM_MOV32T 7 /* yes, 7 too */
> #define IMAGE_REL_BASED_THUMB_MOV32 7 /* yes, 7 too */
> +#define IMAGE_REL_BASED_RISCV_LOW12I 7 /* yes, 7 too */
> +#define IMAGE_REL_BASED_RISCV_LOW12S 8
> #define IMAGE_REL_BASED_MIPS_JMPADDR16 9
> #define IMAGE_REL_BASED_IA64_IMM64 9 /* yes, 9 too */
> #define IMAGE_REL_BASED_DIR64 10
> diff --git a/lib/efi_loader/efi_image_loader.c
> b/lib/efi_loader/efi_image_loader.c
> index 3cffe9ef46..6892171ccd 100644
> --- a/lib/efi_loader/efi_image_loader.c
> +++ b/lib/efi_loader/efi_image_loader.c
> @@ -126,6 +126,20 @@ static efi_status_t efi_loader_relocate(const
> IMAGE_BASE_RELOCATION *rel,
> case IMAGE_REL_BASED_DIR64:
> *x64 += (uint64_t)delta;
> break;
> +#ifdef __riscv
> + case IMAGE_REL_BASED_RISCV_HI20:
> + *x32 = ((*x32 & 0xf000) + (uint32_t)delta) |
> + (*x32 & 0x0fff);
> + break;
> + case IMAGE_REL_BASED_RISCV_LOW12I:
> + case IMAGE_REL_BASED_RISCV_LOW12S:
> + /* We know that we're 4k aligned */
> + if (delta & 0xfff) {
> + printf("Unsupported reloc offset\n");
> + return EFI_LOAD_ERROR;
> + }
> + break;
> +#endif
> default:
> printf("Unknown Relocation off %x type %x\n",
> offset, type);
> --
> 2.12.3
Hi Alex
The title of this patch seems to be as" efi_loader: Add support for
HI20 PE relocations for RISC-V "
And I am not sure if it shall belong to efi tree.
Rick
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Re: [U-Boot] [PATCH] riscv: Add support for HI20 PE relocations
On 06.06.18 11:15, Rick Chen wrote:
>> -Original Message-
>> From: Alexander Graf [mailto:ag...@suse.de]
>> Sent: Wednesday, June 06, 2018 1:21 AM
>> To: u-boot@lists.denx.de
>> Cc: Rick Jian-Zhi Chen(陳建志)
>> Subject: [PATCH] riscv: Add support for HI20 PE relocations
>>
>> The PE standard allows for HI20/LOW12 relocations. Within the efi_loader
>> target
>> we always know that our relocation target is 4k aligned, so we don't need to
>> worry about the LOW12 part.
>>
>> This patch adds support for the respective relocations. With this and a few
>> grub
>> patches I have cooking in parallel I'm able to run grub on RISC-V.
>>
>> Signed-off-by: Alexander Graf
>> ---
>> include/pe.h | 3 +++
>> lib/efi_loader/efi_image_loader.c | 14 ++
>> 2 files changed, 17 insertions(+)
>>
>> diff --git a/include/pe.h b/include/pe.h index d73eb142cb..36e1908b7e 100644
>> --- a/include/pe.h
>> +++ b/include/pe.h
>> @@ -201,10 +201,13 @@ typedef struct _IMAGE_RELOCATION
>> #define IMAGE_REL_BASED_MIPS_JMPADDR5
>> #define IMAGE_REL_BASED_ARM_MOV32A 5 /* yes, 5 too */
>> #define IMAGE_REL_BASED_ARM_MOV32 5 /* yes, 5 too */
>> +#define IMAGE_REL_BASED_RISCV_HI20 5 /* yes, 5 too */
>> #define IMAGE_REL_BASED_SECTION 6
>> #define IMAGE_REL_BASED_REL 7
>> #define IMAGE_REL_BASED_ARM_MOV32T 7 /* yes, 7 too */
>> #define IMAGE_REL_BASED_THUMB_MOV32 7 /* yes, 7 too */
>> +#define IMAGE_REL_BASED_RISCV_LOW12I 7 /* yes, 7 too */
>> +#define IMAGE_REL_BASED_RISCV_LOW12S 8
>> #define IMAGE_REL_BASED_MIPS_JMPADDR16 9
>> #define IMAGE_REL_BASED_IA64_IMM64 9 /* yes, 9 too */
>> #define IMAGE_REL_BASED_DIR64 10
>> diff --git a/lib/efi_loader/efi_image_loader.c
>> b/lib/efi_loader/efi_image_loader.c
>> index 3cffe9ef46..6892171ccd 100644
>> --- a/lib/efi_loader/efi_image_loader.c
>> +++ b/lib/efi_loader/efi_image_loader.c
>> @@ -126,6 +126,20 @@ static efi_status_t efi_loader_relocate(const
>> IMAGE_BASE_RELOCATION *rel,
>> case IMAGE_REL_BASED_DIR64:
>> *x64 += (uint64_t)delta;
>> break;
>> +#ifdef __riscv
>> + case IMAGE_REL_BASED_RISCV_HI20:
>> + *x32 = ((*x32 & 0xf000) + (uint32_t)delta)
>> |
>> + (*x32 & 0x0fff);
>> + break;
>> + case IMAGE_REL_BASED_RISCV_LOW12I:
>> + case IMAGE_REL_BASED_RISCV_LOW12S:
>> + /* We know that we're 4k aligned */
>> + if (delta & 0xfff) {
>> + printf("Unsupported reloc offset\n");
>> + return EFI_LOAD_ERROR;
>> + }
>> + break;
>> +#endif
>> default:
>> printf("Unknown Relocation off %x type %x\n",
>> offset, type);
>> --
>> 2.12.3
>
> Hi Alex
>
> The title of this patch seems to be as" efi_loader: Add support for
> HI20 PE relocations for RISC-V "
> And I am not sure if it shall belong to efi tree.
I'll be happy to take it via the efi tree, yes. It only affects the efi
PE loader.
Alex
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Re: [U-Boot] [PATCH] riscv: Add support for HI20 PE relocations
2018-06-06 17:18 GMT+08:00 Alexander Graf :
>
>
> On 06.06.18 11:15, Rick Chen wrote:
>>> -Original Message-
>>> From: Alexander Graf [mailto:ag...@suse.de]
>>> Sent: Wednesday, June 06, 2018 1:21 AM
>>> To: u-boot@lists.denx.de
>>> Cc: Rick Jian-Zhi Chen(陳建志)
>>> Subject: [PATCH] riscv: Add support for HI20 PE relocations
>>>
>>> The PE standard allows for HI20/LOW12 relocations. Within the efi_loader
>>> target
>>> we always know that our relocation target is 4k aligned, so we don't need to
>>> worry about the LOW12 part.
>>>
>>> This patch adds support for the respective relocations. With this and a few
>>> grub
>>> patches I have cooking in parallel I'm able to run grub on RISC-V.
>>>
>>> Signed-off-by: Alexander Graf
>>> ---
>>> include/pe.h | 3 +++
>>> lib/efi_loader/efi_image_loader.c | 14 ++
>>> 2 files changed, 17 insertions(+)
>>>
>>> diff --git a/include/pe.h b/include/pe.h index d73eb142cb..36e1908b7e 100644
>>> --- a/include/pe.h
>>> +++ b/include/pe.h
>>> @@ -201,10 +201,13 @@ typedef struct _IMAGE_RELOCATION
>>> #define IMAGE_REL_BASED_MIPS_JMPADDR5
>>> #define IMAGE_REL_BASED_ARM_MOV32A 5 /* yes, 5 too */
>>> #define IMAGE_REL_BASED_ARM_MOV32 5 /* yes, 5 too */
>>> +#define IMAGE_REL_BASED_RISCV_HI20 5 /* yes, 5 too */
>>> #define IMAGE_REL_BASED_SECTION 6
>>> #define IMAGE_REL_BASED_REL 7
>>> #define IMAGE_REL_BASED_ARM_MOV32T 7 /* yes, 7 too */
>>> #define IMAGE_REL_BASED_THUMB_MOV32 7 /* yes, 7 too */
>>> +#define IMAGE_REL_BASED_RISCV_LOW12I 7 /* yes, 7 too */
>>> +#define IMAGE_REL_BASED_RISCV_LOW12S 8
>>> #define IMAGE_REL_BASED_MIPS_JMPADDR16 9
>>> #define IMAGE_REL_BASED_IA64_IMM64 9 /* yes, 9 too */
>>> #define IMAGE_REL_BASED_DIR64 10
>>> diff --git a/lib/efi_loader/efi_image_loader.c
>>> b/lib/efi_loader/efi_image_loader.c
>>> index 3cffe9ef46..6892171ccd 100644
>>> --- a/lib/efi_loader/efi_image_loader.c
>>> +++ b/lib/efi_loader/efi_image_loader.c
>>> @@ -126,6 +126,20 @@ static efi_status_t efi_loader_relocate(const
>>> IMAGE_BASE_RELOCATION *rel,
>>> case IMAGE_REL_BASED_DIR64:
>>> *x64 += (uint64_t)delta;
>>> break;
>>> +#ifdef __riscv
>>> + case IMAGE_REL_BASED_RISCV_HI20:
>>> + *x32 = ((*x32 & 0xf000) +
>>> (uint32_t)delta) |
>>> + (*x32 & 0x0fff);
>>> + break;
>>> + case IMAGE_REL_BASED_RISCV_LOW12I:
>>> + case IMAGE_REL_BASED_RISCV_LOW12S:
>>> + /* We know that we're 4k aligned */
>>> + if (delta & 0xfff) {
>>> + printf("Unsupported reloc offset\n");
>>> + return EFI_LOAD_ERROR;
>>> + }
>>> + break;
>>> +#endif
>>> default:
>>> printf("Unknown Relocation off %x type %x\n",
>>> offset, type);
>>> --
>>> 2.12.3
>>
>> Hi Alex
>>
>> The title of this patch seems to be as" efi_loader: Add support for
>> HI20 PE relocations for RISC-V "
>> And I am not sure if it shall belong to efi tree.
>
> I'll be happy to take it via the efi tree, yes. It only affects the efi
> PE loader.
>
>
Hi Alex
Thanks a lot. :)
Rick
> Alex
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Re: [U-Boot] [PATCH] ax25: Remove CONFIG_BOOTP_SERVERIP
> From: Alexander Graf [mailto:ag...@suse.de] > Sent: Wednesday, June 06, 2018 1:21 AM > To: u-boot@lists.denx.de > Cc: Rick Jian-Zhi Chen(陳建志) > Subject: [PATCH] ax25: Remove CONFIG_BOOTP_SERVERIP > > The config variable CONFIG_BOOTP_SERVERIP indicates on DHCP-TFTP fetches > that the serverip variable is supposed to be used rather than the IP of the > DHCP > server that replied. > > Given that in the default environment no serverip is provided, that option > does > not make a lot of sense and instead breaks the default dhcp boot flow. > > Let's just remove it. > > Signed-off-by: Alexander Graf > --- > include/configs/ax25-ae350.h | 1 - > 1 file changed, 1 deletion(-) > > diff --git a/include/configs/ax25-ae350.h b/include/configs/ax25-ae350.h index > b1ca5ac11a..b230896734 100644 > --- a/include/configs/ax25-ae350.h > +++ b/include/configs/ax25-ae350.h > @@ -11,7 +11,6 @@ > * CPU and Board Configuration Options > */ > #define CONFIG_BOOTP_SEND_HOSTNAME > -#define CONFIG_BOOTP_SERVERIP > > /* > * Miscellaneous configurable options > -- > 2.12.3 Hi Alex I have try to remove CONFIG_BOOTP_SERVERIP and verify dhcp command. But it always fail in my test as below: RISC-V # env print baudrate=38400 bootdelay=3 ethact=mac@e010 fdtcontroladdr=3fedf290 fileaddr=60 filesize=1bb7d34 serverip=10.0.4.97 stderr=serial@f030 stdin=serial@f030 stdout=serial@f030 Environment size: 303/8188 bytes case 1 RISC-V # dhcp 0x60 boomimage-310y-ag101p.bin BOOTP broadcast 1 BOOTP broadcast 2 BOOTP broadcast 3 BOOTP broadcast 4 DHCP client bound to address 10.0.4.185 (4641 ms) Using mac@e010 device TFTP from server 255.255.255.255; our IP address is 10.0.4.185; sending through gateway 10.0.4.254 Filename 'pxelinux.0'. Load address: 0x60 Loading: * TFTP error: 'File not found' (1) Not retrying... TFTP error: 'File not found' (1) Not retrying... TFTP error: 'File not found' (1) Not retrying... case 2 RISC-V # dhcp 0x60 10.0.4.97:boomimage-310y-ag101p.bin BOOTP broadcast 1 BOOTP broadcast 2 BOOTP broadcast 3 BOOTP broadcast 4 DHCP client bound to address 10.0.4.185 (4591 ms) Using mac@e010 device TFTP from server 255.255.255.255; our IP address is 10.0.4.185; sending through gateway 10.0.4.254 Filename 'pxelinux.0'. Load address: 0x60 Loading: * TFTP error: 'File not found' (1) Not retrying... TFTP error: 'File not found' (1) Not retrying... TFTP error: 'File not found' (1) Not retrying... RISC-V # But it pass with CONFIG_BOOTP_SERVERIP RISC-V # env print baudrate=38400 bootcmd=fatload mmc 0:1 0x2000 ae350_64.dtb;fatload mmc 0:1 0x0 bbl-ae350.bin;go 0x0 bootdelay=3 fdtcontroladdr=3fedf290 fileaddr=60 filesize=1bb7d34 stderr=serial@f030 stdin=serial@f030 stdout=serial@f030 Environment size: 260/8188 bytes RISC-V # dhcp 0x60 10.0.4.97:boomimage-310y-ag101p.bin BOOTP broadcast 1 BOOTP broadcast 2 BOOTP broadcast 3 BOOTP broadcast 4 DHCP client bound to address 10.0.4.180 (4592 ms) Using mac@e010 device TFTP from server 10.0.4.97; our IP address is 10.0.4.180 Filename 'boomimage-310y-ag101p.bin'. Load address: 0x60 Loading: ## Abort RISC-V # Rick ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH v2 3/3] common: Generic loader for file system
On 05/24/2018 07:04 AM, tien.fong.c...@intel.com wrote:
> From: Tien Fong Chee
>
> This is file system generic loader which can be used to load
> the file image from the storage into target such as memory.
> The consumer driver would then use this loader to program whatever,
> ie. the FPGA device.
>
> Signed-off-by: Tien Fong Chee
> ---
[...]
> +static int fs_loader_probe(struct udevice *dev)
> +{
> + return 0;
> +};
> +
> +static const struct udevice_id fs_loader_ids[] = {
> + { .compatible = "fs_loader"},
Why exactly is there a DT compatible for a firmware loader?
> + { }
> +};
> +
> +U_BOOT_DRIVER(fs_loader) = {
> + .name = "fs_loader",
> + .id = UCLASS_FS_FIRMWARE_LOADER,
> + .of_match = fs_loader_ids,
> + .probe = fs_loader_probe,
> + .ofdata_to_platdata = fs_loader_ofdata_to_platdata,
> + .platdata_auto_alloc_size = sizeof(struct device_platdata),
> +};
> +
> +UCLASS_DRIVER(fs_loader) = {
> + .id = UCLASS_FS_FIRMWARE_LOADER,
> + .name = "fs_loader",
> +};
[...]
--
Best regards,
Marek Vasut
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Re: [U-Boot] [PATCH 2/2] usb: sunxi: sun50i: enable OHCI0 clock when OHCI1 is in use
On 06/06/2018 05:38 AM, Vasily Khoruzhick wrote:
> On A64 OHCI1 clock source is OHCI0 clock, so we need to enable OHCI0
> clock when OHCI1 is in use.
>
> Fixes commit dd3228170ad7 ("usb: sunxi: Switch to use generic-phy")
>
> Signed-off-by: Vasily Khoruzhick
> ---
> drivers/usb/host/ohci-sunxi.c | 7 ++-
> 1 file changed, 6 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/usb/host/ohci-sunxi.c b/drivers/usb/host/ohci-sunxi.c
> index ce2b47a5c4..5661557a3d 100644
> --- a/drivers/usb/host/ohci-sunxi.c
> +++ b/drivers/usb/host/ohci-sunxi.c
> @@ -36,6 +36,7 @@ static int ohci_usb_probe(struct udevice *dev)
> struct ohci_sunxi_priv *priv = dev_get_priv(dev);
> struct ohci_regs *regs = (struct ohci_regs *)devfdt_get_addr(dev);
> int extra_ahb_gate_mask = 0;
> + int extra_usb_gate_mask = 0;
> int phys, ret;
>
> priv->ccm = (struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
> @@ -78,13 +79,17 @@ no_phy:
> extra_ahb_gate_mask = 1 << AHB_GATE_OFFSET_USB_EHCI0;
> #endif
> priv->usb_gate_mask = CCM_USB_CTRL_OHCI0_CLK;
> +#ifdef CONFIG_MACH_SUN50I
> + extra_usb_gate_mask = CCM_USB_CTRL_OHCI0_CLK;
> +#endif
> priv->ahb_gate_mask <<= phys * AHB_CLK_DIST;
> extra_ahb_gate_mask <<= phys * AHB_CLK_DIST;
> priv->usb_gate_mask <<= phys;
>
> setbits_le32(&priv->ccm->ahb_gate0,
>priv->ahb_gate_mask | extra_ahb_gate_mask);
> - setbits_le32(&priv->ccm->usb_clk_cfg, priv->usb_gate_mask);
> + setbits_le32(&priv->ccm->usb_clk_cfg,
> + priv->usb_gate_mask | extra_usb_gate_mask);
Why is the SoC / compatible information not coming from DT instead ? Why
is the driver polluted by more ifdefs ?
> #ifdef CONFIG_SUNXI_GEN_SUN6I
> setbits_le32(&priv->ccm->ahb_reset0_cfg,
>priv->ahb_gate_mask | extra_ahb_gate_mask);
>
--
Best regards,
Marek Vasut
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[U-Boot] [PATCH] rockchip: board: lion-rk3368: increase phy autonegotiation timeout
The first dhcp command consistently fails with a timeout when the lion-rk3368 board is connected to a Zyxel GS1100-24E Gigabit Ethernet switch: ethernet@ff29 Waiting for PHY auto negotiation to complete. TIMEOUT ! Increasing PHY_ANEG_TIMEOUT from the default 4000 to 8000 makes the first dhcp command work reliably. Signed-off-by: Jakob Unterwurzacher --- include/configs/lion_rk3368.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/include/configs/lion_rk3368.h b/include/configs/lion_rk3368.h index b9c6bf8954..cae0f1ed29 100644 --- a/include/configs/lion_rk3368.h +++ b/include/configs/lion_rk3368.h @@ -12,5 +12,7 @@ #define KERNEL_LOAD_ADDR 0x28 #define DTB_LOAD_ADDR 0x560 #define INITRD_LOAD_ADDR 0x5bf +/* PHY needs longer aneg time at 1G */ +#define PHY_ANEG_TIMEOUT 8000 #endif -- 2.17.0 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH 1/2] fit: allow fit to call hardware accelerated hash
On 25 May 2018 at 12:46, Tom Rini wrote:
> On Thu, May 24, 2018 at 02:43:24PM +0100, Ben Whitten wrote:
>
>> Move to calling the abstraction which allows for hardware acceleration.
>>
>> Signed-off-by: Ben Whitten
>> ---
>> common/image-fit.c | 26 --
>> 1 file changed, 16 insertions(+), 10 deletions(-)
>>
>> diff --git a/common/image-fit.c b/common/image-fit.c
>> index 8c15ed1..01ea864 100644
>> --- a/common/image-fit.c
>> +++ b/common/image-fit.c
>> @@ -1082,19 +1082,25 @@ int fit_set_timestamp(void *fit, int noffset, time_t
>> timestamp)
>> int calculate_hash(const void *data, int data_len, const char *algo,
>> uint8_t *value, int *value_len)
>> {
>> + struct hash_algo *hash_algo;
>> + int ret;
>> +
>> + ret = hash_lookup_algo(algo, &hash_algo);
>> + if (ret)
>> + return ret;
>> +
>> if (IMAGE_ENABLE_CRC32 && strcmp(algo, "crc32") == 0) {
>> - *((uint32_t *)value) = crc32_wd(0, data, data_len,
>> - CHUNKSZ_CRC32);
>> - *((uint32_t *)value) = cpu_to_uimage(*((uint32_t *)value));
>> - *value_len = 4;
>> + hash_algo->hash_func_ws((unsigned char *)data, data_len,
>> + (unsigned char *)value, hash_algo->chunk_size);
>> + *value_len = hash_algo->digest_size;
>> } else if (IMAGE_ENABLE_SHA1 && strcmp(algo, "sha1") == 0) {
>> - sha1_csum_wd((unsigned char *)data, data_len,
>> - (unsigned char *)value, CHUNKSZ_SHA1);
>> - *value_len = 20;
>> + hash_algo->hash_func_ws((unsigned char *)data, data_len,
>> + (unsigned char *)value, hash_algo->chunk_size);
>> + *value_len = hash_algo->digest_size;
>> } else if (IMAGE_ENABLE_SHA256 && strcmp(algo, "sha256") == 0) {
>> - sha256_csum_wd((unsigned char *)data, data_len,
>> -(unsigned char *)value, CHUNKSZ_SHA256);
>> - *value_len = SHA256_SUM_LEN;
>> + hash_algo->hash_func_ws((unsigned char *)data, data_len,
>> + (unsigned char *)value, hash_algo->chunk_size);
>> + *value_len = hash_algo->digest_size;
>> } else if (IMAGE_ENABLE_MD5 && strcmp(algo, "md5") == 0) {
>> md5_wd((unsigned char *)data, data_len, value, CHUNKSZ_MD5);
>> *value_len = 16;
>
> I think we can vastly simplify this function to just, roughly:
> + struct hash_algo *hash_algo;
> + int ret;
> +
> + ret = hash_lookup_algo(algo, &hash_algo);
> + if (ret)
> + return ret;
> +
> ret = hash_algo->hash_func_ws((unsigned char *)data, data_len,
> (unsigned char *)value, hash_algo->chunk_size);
> if (!ret)
> *value_len = hash_algo->digest_size;
>
> return ret;
>
> But I didn't confirm that md5 will be covered, but I assume it is.
It's not currently but I can add that and resend.
Do you need a resend of the series or this individually.
Thanks,
Ben
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Re: [U-Boot] [PATCH 1/5] drivers: dma: Enable DMA-330 driver support
On Fri, 2018-06-01 at 08:24 -0600, Simon Glass wrote:
> Hi Tien,
>
> On 31 May 2018 at 02:08, wrote:
> >
> > From: Tien Fong Chee
> >
> > Enable DMAC driver support for DMA-330 controller.
> > The driver is also compatible to PL330 product.
> >
> > Signed-off-by: Tien Fong Chee
> > ---
> > drivers/dma/Kconfig |9 +-
> > drivers/dma/Makefile |1 +
> > drivers/dma/dma330.c | 1514
> > ++
> > include/dma330.h | 136 +
> > 4 files changed, 1659 insertions(+), 1 deletion(-)
> > create mode 100644 drivers/dma/dma330.c
> > create mode 100644 include/dma330.h
> >
> > diff --git a/drivers/dma/Kconfig b/drivers/dma/Kconfig
> > index 4ee6afa..6e77e07 100644
> > --- a/drivers/dma/Kconfig
> > +++ b/drivers/dma/Kconfig
> > @@ -2,7 +2,7 @@ menu "DMA Support"
> >
> > config DMA
> > bool "Enable Driver Model for DMA drivers"
> > - depends on DM
> > + depends on DM || SPL_DM
> > help
> > Enable driver model for DMA. DMA engines can do
> > asynchronous data transfers without involving the host
> > @@ -34,4 +34,11 @@ config APBH_DMA_BURST8
> >
> > endif
> >
> > +config DMA330_DMA
> > + bool "PL330/DMA-330 DMA Controller(DMAC) driver"
> > + depends on DMA
> > + help
> > +Enable the DMA controller driver for both PL330 and
> > +DMA-330 products.
> > +
> > endmenu # menu "DMA Support"
> > diff --git a/drivers/dma/Makefile b/drivers/dma/Makefile
> > index 4eaef8a..bfad0dd 100644
> > --- a/drivers/dma/Makefile
> > +++ b/drivers/dma/Makefile
> > @@ -11,3 +11,4 @@ obj-$(CONFIG_FSL_DMA) += fsl_dma.o
> > obj-$(CONFIG_TI_KSNAV) += keystone_nav.o keystone_nav_cfg.o
> > obj-$(CONFIG_TI_EDMA3) += ti-edma3.o
> > obj-$(CONFIG_DMA_LPC32XX) += lpc32xx_dma.o
> > +obj-$(CONFIG_DMA330_DMA) += dma330.o
> > diff --git a/drivers/dma/dma330.c b/drivers/dma/dma330.c
> > new file mode 100644
> > index 000..66575d8
> > --- /dev/null
> > +++ b/drivers/dma/dma330.c
> > @@ -0,0 +1,1514 @@
> > +// SPDX-License-Identifier: GPL-2.0
> > +/*
> > + * Copyright (C) 2018 Intel Corporation
> > + */
> > +
> > +#include
> > +#include
> > +#include
> > +#include
> > +#include
> > +#include
> > +#include
> > +
> > +/* Register and Bit field Definitions */
> > +
> > +/* DMA Status */
> > +#define DS 0x0
> > +#define DS_ST_STOP 0x0
> > +#define DS_ST_EXEC 0x1
> > +#define DS_ST_CMISS0x2
> > +#define DS_ST_UPDTPC 0x3
> > +#define DS_ST_WFE 0x4
> > +#define DS_ST_ATBRR0x5
> > +#define DS_ST_QBUSY0x6
> > +#define DS_ST_WFP 0x7
> > +#define DS_ST_KILL 0x8
> > +#define DS_ST_CMPLT0x9
> > +#define DS_ST_FLTCMP 0xe
> > +#define DS_ST_FAULT0xf
> It is possible to use enum for some of these?
>
> enum {
> DS = 0,
> DS_ST_STOP,
> ...
> }
>
Okay.
> >
> > +
> > +/* DMA Program Count register */
> > +#define DPC0x4
> > +/* Interrupt Enable register */
> > +#define INTEN 0x20
> > +/* event-Interrupt Raw Status register */
> > +#define ES 0x24
> > +/* Interrupt Status register */
> > +#define INTSTATUS 0x28
> > +/* Interrupt Clear register */
> > +#define INTCLR 0x2c
> > +/* Fault Status DMA Manager register */
> > +#define FSM0x30
> > +/* Fault Status DMA Channel register */
> > +#define FSC0x34
> > +/* Fault Type DMA Manager register */
> > +#define FTM0x38
> > +
> > +/* Fault Type DMA Channel register */
> > +#define _FTC 0x40
> > +#define FTC(n) (_FTC + (n) * 0x4)
> > +
> > +/* Channel Status register */
> > +#define _CS0x100
> > +#define CS(n) (_CS + (n) * 0x8)
> > +#define CS_CNS BIT(21)
> > +
> > +/* Channel Program Counter register */
> > +#define _CPC 0x104
> > +#define CPC(n) (_CPC + (n) * 0x8)
> > +
> > +/* Source Address register */
> > +#define _SA0x400
> > +#define SA(n) (_SA + (n) * 0x20)
> > +
> > +/* Destination Address register */
> > +#define _DA0x404
> > +#define DA(n) (_DA + (n) * 0x20)
> > +
> > +/* Channel Control register */
> > +#define _CC0x408
> > +#define CC(n) (_CC + (n) * 0x20)
> > +
> > +/* Channel Control register (CCR) Setting */
> > +#define CC_SRCINC BIT(0)
> > +#define CC_DSTINC BIT(14)
> > +#define CC_SRCPRI BIT(8)
> > +#define CC_DSTPRI BIT(22)
> > +#define CC_SRCNS BIT(9)
> > +#define CC_DSTNS BIT(23)
> > +#define CC_SRCIA BIT(10)
> > +#define CC_DSTIA BIT(24)
> > +#define CC_SRCBRSTLEN_SHFT 4
> > +#define CC
[U-Boot] [PATCH v3] drivers/net/vsc9953: Initialize action RAM in VCAP complex
Hi Joe, As a reminder, is there anything else that should be done to push the patch forward? Thanks, Radu ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH] lsxl: Add documentation how to flash an unmodified board
Signed-off-by: Bastian Germann
---
board/buffalo/lsxl/README | 17 -
1 file changed, 16 insertions(+), 1 deletion(-)
diff --git a/board/buffalo/lsxl/README b/board/buffalo/lsxl/README
index ef5ed42880..3ede081776 100644
--- a/board/buffalo/lsxl/README
+++ b/board/buffalo/lsxl/README
@@ -111,7 +111,7 @@ rescue
See `Rescue Mode` for more information.
You can change the boot source by setting the 'bootsource' variable to the
-corresponding value. Please note, that the restore_env script will the the
+corresponding value. Please note, that the restore_env script will set the
bootsource back to 'legacy'.
@@ -137,3 +137,18 @@ you already have a bootloader CLI, you can use the
following commands:
bootp ${loadaddr} u-boot.kwb
sf erase 0 +${filelen}
sf write 0 ${fileaddr} ${filesize}
+
+As netconsole is unavailable in the Buffalo U-Boot version, you can only
+flash via bootloader CLI if you modify the board. If you do not want to do
+that, you can flash from GNU/Linux with the flashrom utility. You have to
+have the flash chip available as a spidev device, which you can get by
+enabling Linux configuration option CONFIG_SPI_SPIDEV and adding a spidev
+compatible device in the device tree available in the Linux source tree as
+arch/arm/boot/dts/kirkwood-lsxl.dtsi
+
+The flashing is then done with the following commands:
+
+ flashrom -r dump.bin -p linux_spi:dev=/dev/spidev0.0
+ truncate -s 384K u-boot.kwb
+ dd conv=notrunc if=u-boot.kwb of=dump.bin
+ flashrom -w dump.bin -p linux_spi:dev=/dev/spidev0.0
--
2.17.1
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Re: [U-Boot] [PATCH 1/2] i2c: mvtwsi: disable i2c slave on Armada 38x
Hello Baruch, Am 29.05.2018 um 06:45 schrieb Baruch Siach: Equivalent code that disables the hidden i2c0 slave already exists in the Turris Omnia platform specific code. But this hidden i2c0 slave that interferes the i2c bus is not board specific. Armada 38x SoCs and at least some Kirkwood variants are affected as well. Add code to disable this slave to the i2c bus driver to make it work on all affected hardware. Use the bind callback because we want this to always run at boot, regardless of whether U-Boot uses the i2c bus. Cc: Rabeeh Khoury Cc: Chris Packham Reviewed-by: Stefan Roese Reviewed-by: Heiko Schocher Signed-off-by: Baruch Siach --- v2: * Use clrbits_le32 (Stefan Roese) * Apply to Kirkwood (Chris Packham) * Add review tags from Stefan and Heiko --- drivers/i2c/mvtwsi.c | 23 ++- 1 file changed, 22 insertions(+), 1 deletion(-) Your patch breaks build for sun8i, see travis build: https://travis-ci.org/hsdenx/u-boot-i2c/jobs/388655845 Please fix this issue, and send a v3, thanks! bye, Heiko -- DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-52 Fax: +49-8142-66989-80 Email: h...@denx.de ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH] ax25: Remove CONFIG_BOOTP_SERVERIP
On 06/06/2018 11:37 AM, Rick Chen wrote: From: Alexander Graf [mailto:ag...@suse.de] Sent: Wednesday, June 06, 2018 1:21 AM To: u-boot@lists.denx.de Cc: Rick Jian-Zhi Chen(陳建志) Subject: [PATCH] ax25: Remove CONFIG_BOOTP_SERVERIP The config variable CONFIG_BOOTP_SERVERIP indicates on DHCP-TFTP fetches that the serverip variable is supposed to be used rather than the IP of the DHCP server that replied. Given that in the default environment no serverip is provided, that option does not make a lot of sense and instead breaks the default dhcp boot flow. Let's just remove it. Signed-off-by: Alexander Graf --- include/configs/ax25-ae350.h | 1 - 1 file changed, 1 deletion(-) diff --git a/include/configs/ax25-ae350.h b/include/configs/ax25-ae350.h index b1ca5ac11a..b230896734 100644 --- a/include/configs/ax25-ae350.h +++ b/include/configs/ax25-ae350.h @@ -11,7 +11,6 @@ * CPU and Board Configuration Options */ #define CONFIG_BOOTP_SEND_HOSTNAME -#define CONFIG_BOOTP_SERVERIP /* * Miscellaneous configurable options -- 2.12.3 Hi Alex I have try to remove CONFIG_BOOTP_SERVERIP and verify dhcp command. But it always fail in my test as below: RISC-V # env print baudrate=38400 bootdelay=3 ethact=mac@e010 fdtcontroladdr=3fedf290 fileaddr=60 filesize=1bb7d34 serverip=10.0.4.97 stderr=serial@f030 stdin=serial@f030 stdout=serial@f030 Environment size: 303/8188 bytes case 1 RISC-V # dhcp 0x60 boomimage-310y-ag101p.bin BOOTP broadcast 1 BOOTP broadcast 2 BOOTP broadcast 3 BOOTP broadcast 4 DHCP client bound to address 10.0.4.185 (4641 ms) Using mac@e010 device TFTP from server 255.255.255.255; our IP address is 10.0.4.185; sending through gateway 10.0.4.254 Filename 'pxelinux.0'. Load address: 0x60 Loading: * TFTP error: 'File not found' (1) Not retrying... TFTP error: 'File not found' (1) Not retrying... TFTP error: 'File not found' (1) Not retrying... case 2 RISC-V # dhcp 0x60 10.0.4.97:boomimage-310y-ag101p.bin BOOTP broadcast 1 BOOTP broadcast 2 BOOTP broadcast 3 BOOTP broadcast 4 DHCP client bound to address 10.0.4.185 (4591 ms) Using mac@e010 device TFTP from server 255.255.255.255; our IP address is 10.0.4.185; sending through gateway 10.0.4.254 Filename 'pxelinux.0'. Load address: 0x60 Loading: * TFTP error: 'File not found' (1) Not retrying... TFTP error: 'File not found' (1) Not retrying... TFTP error: 'File not found' (1) Not retrying... RISC-V # But it pass with CONFIG_BOOTP_SERVERIP RISC-V # env print baudrate=38400 bootcmd=fatload mmc 0:1 0x2000 ae350_64.dtb;fatload mmc 0:1 0x0 bbl-ae350.bin;go 0x0 bootdelay=3 fdtcontroladdr=3fedf290 fileaddr=60 filesize=1bb7d34 stderr=serial@f030 stdin=serial@f030 stdout=serial@f030 Environment size: 260/8188 bytes RISC-V # dhcp 0x60 10.0.4.97:boomimage-310y-ag101p.bin BOOTP broadcast 1 BOOTP broadcast 2 BOOTP broadcast 3 BOOTP broadcast 4 DHCP client bound to address 10.0.4.180 (4592 ms) Using mac@e010 device TFTP from server 10.0.4.97; our IP address is 10.0.4.180 I see. So this is the bug you're trying to work around ;). I agree that the dhcp reply should not automatically overwrite the TFTP destination address if it's already provided. That's just plain confusing. I can try to come up with a patch. Alex ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [U-Boot,1/5] ARM: legoev3: increase flash image sizes
On Sat, May 19, 2018 at 11:25:03PM -0500, David Lechner wrote: > This increases the kernel image to 4M and the rootfs image to 10M. > > It is getting hard to get a kernel image to fit in 3M. > > Signed-off-by: David Lechner Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [U-Boot, 2/5] ARM: legoev3: Move UART enable to early init
On Sat, May 19, 2018 at 11:25:04PM -0500, David Lechner wrote: > This moves the UART init for LEGO MINDSTORMS EV3 to board_early_init_f(). > Some console messages were not being printed because the UART was not > enabled until later in the init process. > > Signed-off-by: David Lechner Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [U-Boot, 4/5] ARM: legoev3: remove unused configuration options
On Sat, May 19, 2018 at 11:25:06PM -0500, David Lechner wrote: > This removes the unused clock and RAM config options that were cargo- > culted when this board was copied from the DA850 EVM. > > Signed-off-by: David Lechner Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [U-Boot, 5/5] ARM: legoev3: update boot script to load uEnv.txt and .dtb
On Sat, May 19, 2018 at 11:25:07PM -0500, David Lechner wrote: > This updates the LEGO MINDSTORMS EV3 boot script to try loading a > uEnv.txt file and a da850-lego-ev3.dtb device tree during boot. > > Signed-off-by: David Lechner Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [U-Boot,3/5] ARM: legoev3: disable networking
On Sat, May 19, 2018 at 11:25:05PM -0500, David Lechner wrote: > This disables networking related items in the config. The EV3 does not have > any networking hardware, so this is wasted space. > > Signed-off-by: David Lechner Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] board: STiH410-B2260: Add pxefile_addr_r variable
On Thu, May 24, 2018 at 05:15:26PM +0300, riku.voi...@linaro.org wrote: > From: Riku Voipio > > Reading doc/README.distro , we see platform needs to set > pxefile_addr_r to support distro boot. > > Signed-off-by: Riku Voipio Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [U-Boot,v2] menu: fix timeout duration
On Thu, May 24, 2018 at 05:04:57PM +0900, Masahiro Yamada wrote:
> For distro-boot, the TIMEOUT directive in the boot script specifies
> how long to pause in units of 1/10 sec. [1]
>
> Commit 8594753ba0a7 ("menu: only timeout when menu is displayed")
> corrected this by simply dividing the timeout value by 10 in
> menu_interactive_choice().
>
> I see two problems:
>
> - For example, "TIMEOUT 5" should wait for 0.5 sec, but the current
>implementation cannot handle the granularity of 1/10 sec.
>In fact, it never breaks because "m->timeout / 10" is zero,
>which means no timeout.
>
> - The menu API is used not only by cmd/pxe.c but also by
>common/autoboot.c . For the latter case, the unit of the
>timeout value is _second_ because its default is associated
>with CONFIG_BOOTDELAY.
>
> To fix the first issue, use DIV_ROUND_UP() so that the timeout value
> is rounded up to the closest integer.
>
> For the second issue, move the division to the boundary between
> cmd/pxe.c and common/menu.c . This is a more desirable place because
> the comment of struct pxe_menu says:
>
> * timeout - time in tenths of a second to wait for a user key-press before
> * booting the default label.
>
> Then, the comment of menu_create() says:
>
> * timeout - A delay in seconds to wait for user input. If 0, timeout is
> * disabled, and the default choice will be returned unless prompt is 1.
>
> [1] https://www.syslinux.org/wiki/index.php?title=SYSLINUX#TIMEOUT_timeout
>
> Signed-off-by: Masahiro Yamada
Applied to u-boot/master, thanks!
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Re: [U-Boot] mach-stm32: Enable SPL_RESET_SUPPORT flag
On Thu, May 31, 2018 at 09:00:43AM +0200, Patrice Chotard wrote:
> Since commit 0e373c0ade8c ("spl: add SPL_RESET_SUPPORT"),
> reset is supported in SPL, enable this flag for STM32F SoCs family.
>
> This allows to remove a specific case in RCC mfd driver.
>
> Signed-off-by: Patrice Chotard
Applied to u-boot/master, thanks!
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Re: [U-Boot] [U-Boot,2/2] drivers/rtc: convert mvrtc to DM
On Mon, May 28, 2018 at 11:39:58PM +1200, Chris Packham wrote: > Add DM support for the Marvell RTC driver. > > Signed-off-by: Chris Packham > Reviewed-by: Stefan Roese Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] disk: efi: Correct backing up the MBR boot code
On Tue, May 22, 2018 at 02:04:21AM +0300, Sam Protsenko wrote:
> In commit e163a931af34 ("cmd: gpt: backup boot code before writing MBR")
> there was added the procedure for storing old boot code when doing "gpt
> write". But instead of storing just backup code, the whole MBR was
> stored, and only specific fields were replaced further, keeping
> everything else intact. That's obviously not what we want.
>
> Fix the code to actually store only old boot code and zero out
> everything else. This fixes next testing case:
>
> => mmc write $loadaddr 0x0 0x7b
> => gpt write mmc 1 $partitions
>
> In case when $loadaddr address and further memory contains 0xff, the
> board was bricked (ROM-code probably didn't like partition entries that
> were clobbered with 0xff). With this patch applied, commands above don't
> brick the board.
>
> Signed-off-by: Sam Protsenko
> Cc: Alejandro Hernandez
> Tested-by: Andy Shevchenko
Applied to u-boot/master, thanks!
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Re: [U-Boot] [U-Boot, 1/2] drivers/rtc: prepare mvrtc for DM conversion
On Mon, May 28, 2018 at 11:39:57PM +1200, Chris Packham wrote:
> Split the rtc_{get,set,reset} functions so that the bodies can be used
> in a DM driver.
>
> Signed-off-by: Chris Packham
> Reviewed-by: Stefan Roese
Applied to u-boot/master, thanks!
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Re: [U-Boot] [U-Boot, v2, 1/1] board: arm: Add support for Broadcom BCM7445
On Wed, May 23, 2018 at 09:24:03PM -0400, Thomas Fitzsimmons wrote: > Add support for loading U-Boot on the Broadcom 7445 SoC. This port > assumes Broadcom's BOLT bootloader is acting as the second stage > bootloader, and U-Boot is acting as the third stage bootloader, loaded > as an ELF program by BOLT. > > Signed-off-by: Thomas Fitzsimmons > Cc: Stefan Roese > Cc: Tom Rini > Cc: Florian Fainelli Please rebase this to master. While I can fixup the SPDX tags (and some formatting issues from checkpatch.pl) I also run in to: +(bcm7445) In file included from ../arch/arm/include/asm/system.h:6:0, +(bcm7445) from ../arch/arm/include/asm/cache.h:11, +(bcm7445) from ../include/net.h:15, +(bcm7445) from ../include/common.h:519, +(bcm7445) from ../lib/asm-offsets.c:14: +(bcm7445) ../arch/arm/include/asm/barriers.h:32:24: error: operator '>=' has no left operand +(bcm7445) #if __LINUX_ARM_ARCH__ >= 7 +(bcm7445) ^~ +(bcm7445) ../arch/arm/include/asm/barriers.h:36:26: error: operator '==' has no left operand +(bcm7445) #elif __LINUX_ARM_ARCH__ == 6 +(bcm7445) ^~ +(bcm7445) make[2]: *** [.././Kbuild:44: lib/asm-offsets.s] Error 1 +(bcm7445) make[1]: *** [Makefile:1433: prepare0] Error 2 Please look into, thanks! -- Tom signature.asc Description: PGP signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [U-Boot, v2] board_f: Only reserve memory for U-Boot if we're going to relocate
On Fri, May 25, 2018 at 04:08:14PM +0300, Alexey Brodkin wrote: > In case of no relocation we'll just waste some space at the very end > of usable memory area. If target device has very limited amount of memory > (for example 256 kB) this loss will be pretty inconvenient. > > Signed-off-by: Alexey Brodkin > Reviewed-by: Simon Glass > Cc: Bin Meng > Cc: Heiko Schocher > Cc: York Sun > Cc: Stefan Roese > Reviewed-by: Simon Glass Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH 1/2] fit: allow fit to call hardware accelerated hash
On Wed, Jun 06, 2018 at 11:23:05AM +0100, Ben Whitten wrote:
> On 25 May 2018 at 12:46, Tom Rini wrote:
> > On Thu, May 24, 2018 at 02:43:24PM +0100, Ben Whitten wrote:
> >
> >> Move to calling the abstraction which allows for hardware acceleration.
> >>
> >> Signed-off-by: Ben Whitten
> >> ---
> >> common/image-fit.c | 26 --
> >> 1 file changed, 16 insertions(+), 10 deletions(-)
> >>
> >> diff --git a/common/image-fit.c b/common/image-fit.c
> >> index 8c15ed1..01ea864 100644
> >> --- a/common/image-fit.c
> >> +++ b/common/image-fit.c
> >> @@ -1082,19 +1082,25 @@ int fit_set_timestamp(void *fit, int noffset,
> >> time_t timestamp)
> >> int calculate_hash(const void *data, int data_len, const char *algo,
> >> uint8_t *value, int *value_len)
> >> {
> >> + struct hash_algo *hash_algo;
> >> + int ret;
> >> +
> >> + ret = hash_lookup_algo(algo, &hash_algo);
> >> + if (ret)
> >> + return ret;
> >> +
> >> if (IMAGE_ENABLE_CRC32 && strcmp(algo, "crc32") == 0) {
> >> - *((uint32_t *)value) = crc32_wd(0, data, data_len,
> >> - CHUNKSZ_CRC32);
> >> - *((uint32_t *)value) = cpu_to_uimage(*((uint32_t *)value));
> >> - *value_len = 4;
> >> + hash_algo->hash_func_ws((unsigned char *)data, data_len,
> >> + (unsigned char *)value,
> >> hash_algo->chunk_size);
> >> + *value_len = hash_algo->digest_size;
> >> } else if (IMAGE_ENABLE_SHA1 && strcmp(algo, "sha1") == 0) {
> >> - sha1_csum_wd((unsigned char *)data, data_len,
> >> - (unsigned char *)value, CHUNKSZ_SHA1);
> >> - *value_len = 20;
> >> + hash_algo->hash_func_ws((unsigned char *)data, data_len,
> >> + (unsigned char *)value,
> >> hash_algo->chunk_size);
> >> + *value_len = hash_algo->digest_size;
> >> } else if (IMAGE_ENABLE_SHA256 && strcmp(algo, "sha256") == 0) {
> >> - sha256_csum_wd((unsigned char *)data, data_len,
> >> -(unsigned char *)value, CHUNKSZ_SHA256);
> >> - *value_len = SHA256_SUM_LEN;
> >> + hash_algo->hash_func_ws((unsigned char *)data, data_len,
> >> + (unsigned char *)value,
> >> hash_algo->chunk_size);
> >> + *value_len = hash_algo->digest_size;
> >> } else if (IMAGE_ENABLE_MD5 && strcmp(algo, "md5") == 0) {
> >> md5_wd((unsigned char *)data, data_len, value, CHUNKSZ_MD5);
> >> *value_len = 16;
> >
> > I think we can vastly simplify this function to just, roughly:
> > + struct hash_algo *hash_algo;
> > + int ret;
> > +
> > + ret = hash_lookup_algo(algo, &hash_algo);
> > + if (ret)
> > + return ret;
> > +
> > ret = hash_algo->hash_func_ws((unsigned char *)data, data_len,
> > (unsigned char *)value, hash_algo->chunk_size);
> > if (!ret)
> > *value_len = hash_algo->digest_size;
> >
> > return ret;
> >
> > But I didn't confirm that md5 will be covered, but I assume it is.
>
> It's not currently but I can add that and resend.
> Do you need a resend of the series or this individually.
Please re-work the series, thanks!
--
Tom
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[U-Boot] [PATCH 2/2] ax25: Switch to CONFIG_BOOTP_PREFER_SERVERIP
The ax25-ae350 target currently uses CONFIG_BOOTP_SERVERIP which means we ignore the DHCP provided TFTP ip address. This breaks every case where we do now provide a serverip environment variable. Instead, let's use the new CONFIG_BOOT_PREFER_SERVERIP option to fall back to the DHCP provided TFTP IP if no serverip environment variable is set. Signed-off-by: Alexander Graf --- configs/ax25-ae350_defconfig | 1 + include/configs/ax25-ae350.h | 1 - 2 files changed, 1 insertion(+), 1 deletion(-) diff --git a/configs/ax25-ae350_defconfig b/configs/ax25-ae350_defconfig index 5a69eb50c5..9e0ca3452d 100644 --- a/configs/ax25-ae350_defconfig +++ b/configs/ax25-ae350_defconfig @@ -45,3 +45,4 @@ CONFIG_TIMER=y CONFIG_ATCPIT100_TIMER=y CONFIG_DISTRO_DEFAULTS=y CONFIG_CPU_RISCV_64=y +CONFIG_BOOTP_PREFER_SERVERIP=y diff --git a/include/configs/ax25-ae350.h b/include/configs/ax25-ae350.h index b1ca5ac11a..b230896734 100644 --- a/include/configs/ax25-ae350.h +++ b/include/configs/ax25-ae350.h @@ -11,7 +11,6 @@ * CPU and Board Configuration Options */ #define CONFIG_BOOTP_SEND_HOSTNAME -#define CONFIG_BOOTP_SERVERIP /* * Miscellaneous configurable options -- 2.12.3 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH 1/2] net: Add option to prefer bootp/dhcp serverip
Currently we can choose between 2 different types of behavior for the
serverip variable:
1) Always overwrite it with the DHCP server IP address (default)
2) Ignore what the DHCP server says (CONFIG_BOOTP_SERVERIP)
This patch adds a 3rd option:
3) Use serverip from DHCP if no serverip is given
(CONFIG_BOOTP_PREFER_SERVERIP)
With this new option, we can have the default case that a boot file gets
loaded from the DHCP provided TFTP server work while allowing users to
specify their own serverip variable to explicitly use a different tftp
server.
Signed-off-by: Alexander Graf
---
README | 5 +
cmd/Kconfig | 9 +
net/bootp.c | 7 ++-
3 files changed, 20 insertions(+), 1 deletion(-)
diff --git a/README b/README
index fb331f910d..d8a99281ca 100644
--- a/README
+++ b/README
@@ -1511,10 +1511,15 @@ The following options need to be configured:
CONFIG_BOOTP_TIMEOFFSET
CONFIG_BOOTP_VENDOREX
CONFIG_BOOTP_MAY_FAIL
+ CONFIG_BOOTP_PREFER_SERVERIP
CONFIG_BOOTP_SERVERIP - TFTP server will be the serverip
environment variable, not the BOOTP server.
+ CONFIG_BOOTP_PREFER_SERVERIP - TFTP server will be the
+ serverip environment variable if previously unset, otherwise
+ the DHCP provided serverip is used.
+
CONFIG_BOOTP_MAY_FAIL - If the DHCP server is not found
after the configured retry count, the call will fail
instead of starting over. This can be used to fail over
diff --git a/cmd/Kconfig b/cmd/Kconfig
index e283cb9a8a..e77a4131b3 100644
--- a/cmd/Kconfig
+++ b/cmd/Kconfig
@@ -1121,6 +1121,15 @@ config BOOTP_HOSTNAME
help
The name may or may not be qualified with the local domain name.
+config BOOTP_PREFER_SERVERIP
+ bool "Leave serverip variable in place if existing"
+ default n
+ depends on CMD_BOOTP
+ help
+ By default a BOOTP/DHCP reply will overwrite the tftp target ip
+ address. With this option enabled, it will leave it alone if
+ already specified, but populate it if no serverip is specified.
+
config BOOTP_SUBNETMASK
bool "Request & store 'netmask' from BOOTP/DHCP server"
default y
diff --git a/net/bootp.c b/net/bootp.c
index 9d7cb5d30c..91de4cd426 100644
--- a/net/bootp.c
+++ b/net/bootp.c
@@ -147,9 +147,14 @@ static void store_net_params(struct bootp_hdr *bp)
{
#if !defined(CONFIG_BOOTP_SERVERIP)
struct in_addr tmp_ip;
+ bool overwrite_serverip = true;
+
+#if defined(CONFIG_BOOTP_PREFER_SERVERIP)
+ overwrite_serverip = false;
+#endif
net_copy_ip(&tmp_ip, &bp->bp_siaddr);
- if (tmp_ip.s_addr != 0)
+ if (tmp_ip.s_addr != 0 && (overwrite_serverip || !net_server_ip.s_addr))
net_copy_ip(&net_server_ip, &bp->bp_siaddr);
memcpy(net_server_ethaddr,
((struct ethernet_hdr *)net_rx_packet)->et_src, 6);
--
2.12.3
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[U-Boot] please pull u-boot-samsung master
Dear Tom, The following changes since commit 0315d6959fdd9d2a4d89016c311e9c8c8d239a10: ARM: mvebu: a38x: Add missing SPDX license identfier (2018-05-15 09:08:00 -0400) are available in the git repository at: git://git.denx.de/u-boot-samsung.git master for you to fetch changes up to 105e3d84e5683c590b04f8677f80797a1d0dce36: ARM: dts: exynos5: add the interrupt-parent property (2018-05-16 11:25:12 +0900) Jaehoon Chung (2): ARM: dts: exynos5: remove the duplicated nodes ARM: dts: exynos5: add the interrupt-parent property arch/arm/dts/exynos5.dtsi | 29 ++--- 1 files changed, 2 insertions(+), 27 deletions(-) -- Thanks, Minkyu Kang. ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH 1/2] dm: pci: make ranges dt property optional
Hi Christian,
On Wed, May 23, 2018 at 9:39 PM, Christian Gmeiner
wrote:
> Hi Bin,
>
> Am Mi., 23. Mai 2018 um 15:10 Uhr schrieb Bin Meng :
>
>> Hi Christian,
>
>> On Wed, May 23, 2018 at 8:00 PM, Christian Gmeiner
>> wrote:
>> > If we use u-boot as coreboot payload with a generic dts without
>> > any ranges specified we fail in pci pre_probe and our pci bus
>> > is not usable.
>> >
>
>> What do you mean by "a generic dts"?
>
>
>> The coreboot payload needs to specify a dedicated dts for that board,
>> for example to build a coreboot payload for minnowmax, we need specify
>> minnowmax.dts in the Kconfig. README.x86 documents this.
>
>
> Yeah.. so in my eyes a "generic dts" contains only this part regarding pci:
>
> pci {
> compatible = "pci-x86";
> #address-cells = <0x3>;
> #size-cells = <0x2>;
> };
>
> The important part is that it does not contain any ranges. Coreboot is the
> one
> who does the pci bus setup (assigning memory windows for devices etc). So I
> do not want to know in u-boot at build time (ranges thing for pci) how the
> pci
> bus looks regarding addresses. My end goal is one generic u-boot payload
> that
> gets used for different FSP 2.0 based boards.
>
I see your point. Then they way we support coreboot might be changed.
We may create a generic U-Boot payload for coreboot targets.
Can you respin the patch to address these comments, like u-boot ->
U-Boot, adding detailed info to the commit message about this, and
update README.x86?
Regards,
Bin
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[U-Boot] [PATCH] arm: mvebu: Add Helios4 Armada 38x initial support
From: Dennis Gilmore
The helios4 is built on the SolidRun Armada 38x SOM.
The port os based on the ClearFog board, using information from
https://github.com/helios-4/u-boot-marvell as well as dtb input
from https://github.com/helios-4/linux-marvell
Signed-off-by: Dennis Gilmore
Signed-off-by: Dennis Gilmore
---
changes since RFC
add armada-38x-solidrun-microsom.dtsi minus buffer-memory nodes from linux
kernel
fix up maintainers file
use correct switch in README file
add SPDX header to kwbimage.cfg and dts file
Port to DM_I2C
Changes since V1
moved to kobol namespace at the request of the board supplier
remove gpio resets they are clearfog specific
set maintainer to myself and update copyrights
remove unused config options
---
arch/arm/dts/Makefile | 1 +
arch/arm/dts/armada-388-helios4.dts | 313 ++
.../arm/dts/armada-38x-solidrun-microsom.dtsi | 101 ++
arch/arm/mach-mvebu/Kconfig | 7 +
board/kobol/helios4/MAINTAINERS | 6 +
board/kobol/helios4/Makefile | 5 +
board/kobol/helios4/README| 46 +++
board/kobol/helios4/helios4.c | 162 +
board/kobol/helios4/kwbimage.cfg | 13 +
configs/helios4_defconfig | 58
include/configs/helios4.h | 172 ++
11 files changed, 884 insertions(+)
create mode 100644 arch/arm/dts/armada-388-helios4.dts
create mode 100644 arch/arm/dts/armada-38x-solidrun-microsom.dtsi
create mode 100644 board/kobol/helios4/MAINTAINERS
create mode 100644 board/kobol/helios4/Makefile
create mode 100644 board/kobol/helios4/README
create mode 100644 board/kobol/helios4/helios4.c
create mode 100644 board/kobol/helios4/kwbimage.cfg
create mode 100644 configs/helios4_defconfig
create mode 100644 include/configs/helios4.h
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index a0349a8975..a18f4bbf7b 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -91,6 +91,7 @@ dtb-$(CONFIG_ARCH_MVEBU) += \
armada-375-db.dtb \
armada-388-clearfog.dtb \
armada-388-gp.dtb \
+ armada-388-helios4.dtb \
armada-385-amc.dtb \
armada-7040-db.dtb \
armada-7040-db-nand.dtb \
diff --git a/arch/arm/dts/armada-388-helios4.dts
b/arch/arm/dts/armada-388-helios4.dts
new file mode 100644
index 00..705adfa8c6
--- /dev/null
+++ b/arch/arm/dts/armada-388-helios4.dts
@@ -0,0 +1,313 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+/*
+ * Device Tree file for Helios4
+ * based on SolidRun Clearfog revision A1 rev 2.0 (88F6828)
+ *
+ * Copyright (C) 2017 Aditya Prayoga
+ *
+ */
+
+/dts-v1/;
+#include "armada-388.dtsi"
+#include "armada-38x-solidrun-microsom.dtsi"
+
+/ {
+ model = "Helios4";
+ compatible = "kobol,helios4", "marvell,armada388",
+ "marvell,armada385", "marvell,armada380";
+
+ memory {
+ device_type = "memory";
+ reg = <0x 0x8000>; /* 2 GB */
+ };
+
+ aliases {
+ /* So that mvebu u-boot can update the MAC addresses */
+ ethernet1 = ð0;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ reg_12v: regulator-12v {
+ compatible = "regulator-fixed";
+ regulator-name = "power_brick_12V";
+ regulator-min-microvolt = <1200>;
+ regulator-max-microvolt = <1200>;
+ regulator-always-on;
+ };
+
+ reg_3p3v: regulator-3p3v {
+ compatible = "regulator-fixed";
+ regulator-name = "3P3V";
+ regulator-min-microvolt = <330>;
+ regulator-max-microvolt = <330>;
+ regulator-always-on;
+ vin-supply = <®_12v>;
+ };
+
+ reg_5p0v_hdd: regulator-5v-hdd {
+ compatible = "regulator-fixed";
+ regulator-name = "5V_HDD";
+ regulator-min-microvolt = <500>;
+ regulator-max-microvolt = <500>;
+ regulator-always-on;
+ vin-supply = <®_12v>;
+ };
+
+ reg_5p0v_usb: regulator-5v-usb {
+ compatible = "regulator-fixed";
+ regulator-name = "USB-PWR";
+ regulator-min-microvolt = <500>;
+ regulator-max-microvolt = <500>;
+ regulator-boot-on;
+ regulator-always-on;
+ enable-active-high;
+ gpio = <&expander0 6 GPIO_ACTIVE_HIGH>;
+ vin-supply = <®_12v>;
+ };
+
+ system-leds {
+ compatible = "gpio-leds";
+ status-led {
+ label = "helios4:green:status";
+
Re: [U-Boot] [PATCH 2/2] usb: sunxi: sun50i: enable OHCI0 clock when OHCI1 is in use
On Wed, Jun 6, 2018 at 9:08 AM, Vasily Khoruzhick wrote:
> On A64 OHCI1 clock source is OHCI0 clock, so we need to enable OHCI0
> clock when OHCI1 is in use.
>
> Fixes commit dd3228170ad7 ("usb: sunxi: Switch to use generic-phy")
>
> Signed-off-by: Vasily Khoruzhick
> ---
> drivers/usb/host/ohci-sunxi.c | 7 ++-
> 1 file changed, 6 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/usb/host/ohci-sunxi.c b/drivers/usb/host/ohci-sunxi.c
> index ce2b47a5c4..5661557a3d 100644
> --- a/drivers/usb/host/ohci-sunxi.c
> +++ b/drivers/usb/host/ohci-sunxi.c
> @@ -36,6 +36,7 @@ static int ohci_usb_probe(struct udevice *dev)
> struct ohci_sunxi_priv *priv = dev_get_priv(dev);
> struct ohci_regs *regs = (struct ohci_regs *)devfdt_get_addr(dev);
> int extra_ahb_gate_mask = 0;
> + int extra_usb_gate_mask = 0;
> int phys, ret;
>
> priv->ccm = (struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
> @@ -78,13 +79,17 @@ no_phy:
> extra_ahb_gate_mask = 1 << AHB_GATE_OFFSET_USB_EHCI0;
> #endif
> priv->usb_gate_mask = CCM_USB_CTRL_OHCI0_CLK;
> +#ifdef CONFIG_MACH_SUN50I
> + extra_usb_gate_mask = CCM_USB_CTRL_OHCI0_CLK;
This look reassigning same clock to twice?
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[U-Boot] [PATCH v3 1/2] i2c: mvtwsi: disable i2c slave on Armada 38x
Equivalent code that disables the hidden i2c0 slave already exists in
the Turris Omnia platform specific code. But this hidden i2c0 slave that
interferes the i2c bus is not board specific. Armada 38x SoCs and at
least some Kirkwood variants are affected as well. Add code to disable
this slave to the i2c bus driver to make it work on all affected
hardware.
Use the bind callback because we want this to always run at boot,
regardless of whether U-Boot uses the i2c bus.
Cc: Rabeeh Khoury
Cc: Chris Packham
Reviewed-by: Stefan Roese
Reviewed-by: Heiko Schocher
Signed-off-by: Baruch Siach
---
v3:
* Fix build for SUNXI (Heiko Schocher)
v2:
* Use clrbits_le32 (Stefan Roese)
* Apply to Kirkwood (Chris Packham)
* Add review tags from Stefan and Heiko
---
drivers/i2c/mvtwsi.c | 25 -
1 file changed, 24 insertions(+), 1 deletion(-)
diff --git a/drivers/i2c/mvtwsi.c b/drivers/i2c/mvtwsi.c
index f9822e56b894..c4f387992b5d 100644
--- a/drivers/i2c/mvtwsi.c
+++ b/drivers/i2c/mvtwsi.c
@@ -11,6 +11,7 @@
#include
#include
#include
+#include
#include
#ifdef CONFIG_DM_I2C
#include
@@ -70,8 +71,10 @@ struct mvtwsi_registers {
u32 baudrate; /* When writing */
};
u32 xtnd_slave_addr;
- u32 reserved[2];
+ u32 reserved0[2];
u32 soft_reset;
+ u32 reserved1[27];
+ u32 debug;
};
#endif
@@ -795,6 +798,25 @@ static int mvtwsi_i2c_ofdata_to_platdata(struct udevice
*bus)
return 0;
}
+static void twsi_disable_i2c_slave(struct mvtwsi_registers *twsi)
+{
+#if (defined(CONFIG_ARMADA_38X) || defined(CONFIG_KIRKWOOD))
+ clrbits_le32(&twsi->debug, BIT(18));
+#endif
+}
+
+static int mvtwsi_i2c_bind(struct udevice *bus)
+{
+ struct mvtwsi_registers *twsi = devfdt_get_addr_ptr(bus);
+
+ /* Disable the hidden slave in i2c0 of these platforms */
+ if ((IS_ENABLED(CONFIG_ARMADA_38X) || IS_ENABLED(CONFIG_KIRKWOOD))
+ && bus->req_seq == 0)
+ twsi_disable_i2c_slave(twsi);
+
+ return 0;
+}
+
static int mvtwsi_i2c_probe(struct udevice *bus)
{
struct mvtwsi_i2c_dev *dev = dev_get_priv(bus);
@@ -850,6 +872,7 @@ U_BOOT_DRIVER(i2c_mvtwsi) = {
.name = "i2c_mvtwsi",
.id = UCLASS_I2C,
.of_match = mvtwsi_i2c_ids,
+ .bind = mvtwsi_i2c_bind,
.probe = mvtwsi_i2c_probe,
.ofdata_to_platdata = mvtwsi_i2c_ofdata_to_platdata,
.priv_auto_alloc_size = sizeof(struct mvtwsi_i2c_dev),
--
2.17.1
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[U-Boot] [PATCH v3 2/2] mvebu: turris_omnia: add note about i2c slave disable
Code that disables the i2c slave is now in the mvtwsi i2c driver. Platform must enable DM_I2C to use that code. Add a comment in the code as a reminder for the planned DM_I2C migration of Turris Omnia. Reviewed-by: Heiko Schocher Signed-off-by: Baruch Siach --- v2: Add Reviewed-by from Heiko --- board/CZ.NIC/turris_omnia/turris_omnia.c | 6 +- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/board/CZ.NIC/turris_omnia/turris_omnia.c b/board/CZ.NIC/turris_omnia/turris_omnia.c index da663cf1bb0c..160d30cd795a 100644 --- a/board/CZ.NIC/turris_omnia/turris_omnia.c +++ b/board/CZ.NIC/turris_omnia/turris_omnia.c @@ -321,7 +321,11 @@ int board_early_init_f(void) writel(OMNIA_GPP_OUT_ENA_LOW, MVEBU_GPIO0_BASE + 0x04); writel(OMNIA_GPP_OUT_ENA_MID, MVEBU_GPIO1_BASE + 0x04); - /* Disable I2C debug mode blocking 0x64 I2C address */ + /* +* Disable I2C debug mode blocking 0x64 I2C address. +* Note: that would be redundant once Turris Omnia migrates to DM_I2C, +* because the mvtwsi driver includes equivalent code. +*/ i2c_debug_reg = readl(MVEBU_TWSI_BASE + MVTWSI_ARMADA_DEBUG_REG); i2c_debug_reg &= ~(1<<18); writel(i2c_debug_reg, MVEBU_TWSI_BASE + MVTWSI_ARMADA_DEBUG_REG); -- 2.17.1 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH v3 1/2] common: Add support for Android DT image
Android documentation recommends new image format for storing DTB/DTBO
files: [1]. To support that format, this patch adds helper functions for
Android DTB/DTBO format. In image-android-dt.* files you can find helper
functions to work with Android DT image format, such us routines for:
- printing the dump of image structure
- getting the address and size of desired dtb/dtbo file
This patch uses dt_table.h file, that was added in 643cefa4d848 ("Import
Android's dt_table.h for DT image format") by Alex Deymo.
[1] https://source.android.com/devices/architecture/dto/partitions
Signed-off-by: Sam Protsenko
---
Changes in v3:
- dropped include/dt_image.h (was sent in another patch by Alex Deymo)
- rebased on top of last master
common/image-android-dt.c | 157 +
include/image-android-dt.h | 21 +
2 files changed, 178 insertions(+)
create mode 100644 common/image-android-dt.c
create mode 100644 include/image-android-dt.h
diff --git a/common/image-android-dt.c b/common/image-android-dt.c
new file mode 100644
index 00..9b7683faab
--- /dev/null
+++ b/common/image-android-dt.c
@@ -0,0 +1,157 @@
+/*
+ * (C) Copyright 2018 Linaro Ltd.
+ * Sam Protsenko
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include
+#include
+#include
+#include
+#include
+
+/**
+ * Check if image header is correct.
+ *
+ * @param hdr_addr Start address of DT image
+ * @return true if header is correct or false if header is incorrect
+ */
+bool android_dt_check_header(ulong hdr_addr)
+{
+ const struct dt_table_header *hdr;
+ u32 magic;
+
+ hdr = map_sysmem(hdr_addr, sizeof(*hdr));
+ magic = fdt32_to_cpu(hdr->magic);
+ unmap_sysmem(hdr);
+
+ return magic == DT_TABLE_MAGIC;
+}
+
+/**
+ * Get the address of FDT (dtb or dtbo) in memory by its index in image.
+ *
+ * @param hdr_addr Start address of DT image
+ * @param index Index of desired FDT in image (starting from 0)
+ * @param[out] addr If not NULL, will contain address to specified FDT
+ * @param[out] size If not NULL, will contain size of specified FDT
+ *
+ * @return true on success or false on error
+ */
+bool android_dt_get_fdt_by_index(ulong hdr_addr, u32 index, ulong *addr,
+u32 *size)
+{
+ const struct dt_table_header *hdr;
+ const struct dt_table_entry *e;
+ u32 entry_count, entries_offset, entry_size;
+ ulong e_addr;
+ u32 dt_offset, dt_size;
+
+ hdr = map_sysmem(hdr_addr, sizeof(*hdr));
+ entry_count = fdt32_to_cpu(hdr->dt_entry_count);
+ entries_offset = fdt32_to_cpu(hdr->dt_entries_offset);
+ entry_size = fdt32_to_cpu(hdr->dt_entry_size);
+ unmap_sysmem(hdr);
+
+ if (index > entry_count) {
+ printf("Error: index > dt_entry_count (%u > %u)\n", index,
+ entry_count);
+ return false;
+ }
+
+ e_addr = hdr_addr + entries_offset + index * entry_size;
+ e = map_sysmem(e_addr, sizeof(*e));
+ dt_offset = fdt32_to_cpu(e->dt_offset);
+ dt_size = fdt32_to_cpu(e->dt_size);
+ unmap_sysmem(e);
+
+ if (addr)
+ *addr = hdr_addr + dt_offset;
+ if (size)
+ *size = dt_size;
+
+ return true;
+}
+
+#if !defined(CONFIG_SPL_BUILD)
+static void android_dt_print_fdt_info(const struct fdt_header *fdt)
+{
+ u32 fdt_size;
+ int root_node_off;
+ const char *compatible = NULL;
+
+ fdt_size = fdt_totalsize(fdt);
+ root_node_off = fdt_path_offset(fdt, "/");
+ if (root_node_off < 0) {
+ printf("Error: Root node not found\n");
+ } else {
+ compatible = fdt_getprop(fdt, root_node_off, "compatible",
+NULL);
+ }
+
+ printf(" (FDT)size = %d\n", fdt_size);
+ printf(" (FDT)compatible = %s\n",
+ compatible ? compatible : "(unknown)");
+}
+
+/**
+ * Print information about DT image structure.
+ *
+ * @param hdr_addr Start address of DT image
+ */
+void android_dt_print_contents(ulong hdr_addr)
+{
+ const struct dt_table_header *hdr;
+ u32 entry_count, entries_offset, entry_size;
+ u32 i;
+
+ hdr = map_sysmem(hdr_addr, sizeof(*hdr));
+ entry_count = fdt32_to_cpu(hdr->dt_entry_count);
+ entries_offset = fdt32_to_cpu(hdr->dt_entries_offset);
+ entry_size = fdt32_to_cpu(hdr->dt_entry_size);
+
+ /* Print image header info */
+ printf("dt_table_header:\n");
+ printf(" magic = %08x\n", fdt32_to_cpu(hdr->magic));
+ printf(" total_size = %d\n", fdt32_to_cpu(hdr->total_size));
+ printf(" header_size = %d\n", fdt32_to_cpu(hdr->header_size));
+ printf(" dt_entry_size = %d\n", entry_size);
+ printf(" dt_entry_count = %d\n", entry_count);
+ printf(" dt_entries_offset = %d\n", entries_offset);
+ printf("
[U-Boot] [PATCH v3 2/2] cmd: Add dtimg command
dtimg command allows user to work with Android DTB/DTBO image format.
Such as, getting the address of desired DTB/DTBO file, printing the dump
of the image in U-Boot shell, etc.
This command is needed to provide Android boot with new Android DT image
format further.
Signed-off-by: Sam Protsenko
---
cmd/Kconfig | 8 +++
cmd/Makefile| 1 +
cmd/dtimg.c | 142
common/Makefile | 4 ++
4 files changed, 155 insertions(+)
create mode 100644 cmd/dtimg.c
diff --git a/cmd/Kconfig b/cmd/Kconfig
index e283cb9a8a..5a4244dbac 100644
--- a/cmd/Kconfig
+++ b/cmd/Kconfig
@@ -254,6 +254,14 @@ config CMD_BOOTMENU
help
Add an ANSI terminal boot menu command.
+config CMD_DTIMG
+ bool "dtimg"
+ help
+ Android DTB/DTBO image manipulation commands. Read dtb/dtbo files from
+ image into RAM, dump image structure information, etc. Those dtb/dtbo
+ files should be merged in one dtb further, which needs to be passed to
+ the kernel, as part of a boot process.
+
config CMD_ELF
bool "bootelf, bootvx"
default y
diff --git a/cmd/Makefile b/cmd/Makefile
index e0088df33b..32c3e52491 100644
--- a/cmd/Makefile
+++ b/cmd/Makefile
@@ -43,6 +43,7 @@ ifdef CONFIG_POST
obj-$(CONFIG_CMD_DIAG) += diag.o
endif
obj-$(CONFIG_CMD_DISPLAY) += display.o
+obj-$(CONFIG_CMD_DTIMG) += dtimg.o
obj-$(CONFIG_CMD_ECHO) += echo.o
obj-$(CONFIG_ENV_IS_IN_EEPROM) += eeprom.o
obj-$(CONFIG_CMD_EEPROM) += eeprom.o
diff --git a/cmd/dtimg.c b/cmd/dtimg.c
new file mode 100644
index 00..5295a341ad
--- /dev/null
+++ b/cmd/dtimg.c
@@ -0,0 +1,142 @@
+/*
+ * (C) Copyright 2018 Linaro Ltd.
+ * Sam Protsenko
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include
+#include
+
+enum cmd_dtimg_info {
+ CMD_DTIMG_START = 0,
+ CMD_DTIMG_SIZE,
+};
+
+static int do_dtimg_dump(cmd_tbl_t *cmdtp, int flag, int argc,
+char * const argv[])
+{
+ char *endp;
+ ulong hdr_addr;
+
+ if (argc != 2)
+ return CMD_RET_USAGE;
+
+ hdr_addr = simple_strtoul(argv[1], &endp, 16);
+ if (*endp != '\0') {
+ printf("Error: Wrong image address\n");
+ return CMD_RET_FAILURE;
+ }
+
+ if (!android_dt_check_header(hdr_addr)) {
+ printf("Error: DT image header is incorrect\n");
+ return CMD_RET_FAILURE;
+ }
+
+ android_dt_print_contents(hdr_addr);
+
+ return CMD_RET_SUCCESS;
+}
+
+static int dtimg_get_fdt(int argc, char * const argv[], enum cmd_dtimg_info
cmd)
+{
+ ulong hdr_addr;
+ u32 index;
+ char *endp;
+ ulong fdt_addr;
+ u32 fdt_size;
+ char buf[65];
+
+ if (argc != 4)
+ return CMD_RET_USAGE;
+
+ hdr_addr = simple_strtoul(argv[1], &endp, 16);
+ if (*endp != '\0') {
+ printf("Error: Wrong image address\n");
+ return CMD_RET_FAILURE;
+ }
+
+ if (!android_dt_check_header(hdr_addr)) {
+ printf("Error: DT image header is incorrect\n");
+ return CMD_RET_FAILURE;
+ }
+
+ index = simple_strtoul(argv[2], &endp, 0);
+ if (*endp != '\0') {
+ printf("Error: Wrong index\n");
+ return CMD_RET_FAILURE;
+ }
+
+ if (!android_dt_get_fdt_by_index(hdr_addr, index, &fdt_addr, &fdt_size))
+ return CMD_RET_FAILURE;
+
+ switch (cmd) {
+ case CMD_DTIMG_START:
+ snprintf(buf, sizeof(buf), "%lx", fdt_addr);
+ break;
+ case CMD_DTIMG_SIZE:
+ snprintf(buf, sizeof(buf), "%x", fdt_size);
+ break;
+ default:
+ printf("Error: Unknown cmd_dtimg_info value: %d\n", cmd);
+ return CMD_RET_FAILURE;
+ }
+
+ env_set(argv[3], buf);
+
+ return CMD_RET_SUCCESS;
+}
+
+static int do_dtimg_start(cmd_tbl_t *cmdtp, int flag, int argc,
+ char * const argv[])
+{
+ return dtimg_get_fdt(argc, argv, CMD_DTIMG_START);
+}
+
+static int do_dtimg_size(cmd_tbl_t *cmdtp, int flag, int argc,
+char * const argv[])
+{
+ return dtimg_get_fdt(argc, argv, CMD_DTIMG_SIZE);
+}
+
+static cmd_tbl_t cmd_dtimg_sub[] = {
+ U_BOOT_CMD_MKENT(dump, 2, 0, do_dtimg_dump, "", ""),
+ U_BOOT_CMD_MKENT(start, 4, 0, do_dtimg_start, "", ""),
+ U_BOOT_CMD_MKENT(size, 4, 0, do_dtimg_size, "", ""),
+};
+
+static int do_dtimg(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+{
+ cmd_tbl_t *cp;
+
+ cp = find_cmd_tbl(argv[1], cmd_dtimg_sub, ARRAY_SIZE(cmd_dtimg_sub));
+
+ /* Strip off leading 'dtimg' command argument */
+ argc--;
+ argv++;
+
+ if (!cp || argc > cp->maxargs)
+ return CMD_RET_USAGE;
+ if (flag == CMD_FLAG_REPEAT && !cp->repeatable)
+ return CMD_RET_SUCCESS;
+
+
Re: [U-Boot] [EXT] Re: [PATCH 2/2] mdio: add marvell MDIO driver
Hi Chris Thanks a lot for your detailed review and kind advice! Please see my inline reply. Yours, Ken From: Chris Packham Sent: Wednesday, June 6, 2018 1:52 AM To: Ken Ma Cc: u-boot; Prafulla Wadaskar; Luka Perkov; xypron.g...@gmx.de; Michal Simek; Alexander Graf; Stefan Roese; eugeniy.palt...@synopsys.com Subject: [EXT] Re: [U-Boot] [PATCH 2/2] mdio: add marvell MDIO driver External Email -- Hi Ken, On Wed, Jun 6, 2018 at 8:06 PM wrote: > > From: Ken Ma aside, awesome email address for someone in embedded development :) Some minor comments below Reviewed-by: Chris Packham > This patch adds a separate driver for the MDIO interface of the > Marvell Ethernet controllers based on driver model. There are two > reasons to have a separate driver rather than including it inside > the MAC driver itself: > *) The MDIO interface is shared by all Ethernet ports, so a driver > must guarantee non-concurrent accesses to this MDIO interface. The > most logical way is to have a separate driver that handles this > single MDIO interface, used by all Ethernet ports. > *) The MDIO interface is the same between the existing mv643xx_eth > driver and the new mvneta/mvpp2 driver. Even though it is for now > only used by the mvneta/mvpp2 driver, it will in the future be > used by the mv643xx_eth driver as well. Yay. In u-boot mv643xx_eth is mvgbe.c. I've been looking at converting it to DM but the first problem I hit was the MDIO interface so this is very much welcome. Were you planning on adding an actual mv643xx_eth driver or is that just a copy/paste from Linux? [Ken] Sorry, currently we have no such a plan to add DM mv643xx_eth driver. By the way, with new mdio driver on uclass DM, we can support such a case that an ethernet device use a phy which is controlled by another chip's mdio(that's to say, ethernet device registers and the mdio register are not in a range) > > This driver supports SMI IEEE for 802.3 Clause 22 and XSMI for IEEE > 802.3 Clause 45. > > This patch also adds device tree binding for marvell MDIO driver. > > Signed-off-by: Ken Ma > --- > > MAINTAINERS| 1 + > arch/arm/Kconfig | 1 + > doc/device-tree-bindings/mdio/marvell-mdio.txt | 18 ++ > drivers/mdio/Kconfig | 10 ++ > drivers/mdio/Makefile | 1 + > drivers/mdio/mvmdio.c | 237 > + > 6 files changed, 268 insertions(+) > create mode 100644 doc/device-tree-bindings/mdio/marvell-mdio.txt > create mode 100644 drivers/mdio/mvmdio.c > > diff --git a/MAINTAINERS b/MAINTAINERS > index f66a904..fb58f17 100644 > --- a/MAINTAINERS > +++ b/MAINTAINERS > @@ -137,6 +137,7 @@ T: git git://git.denx.de/u-boot-marvell.git > F: arch/arm/mach-kirkwood/ > F: arch/arm/mach-mvebu/ > F: drivers/ata/ahci_mvebu.c > +F: drivers/mdio/mvmdio.c > > ARM MARVELL PXA > M: Marek Vasut > diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig > index dde422b..aae4570 100644 > --- a/arch/arm/Kconfig > +++ b/arch/arm/Kconfig > @@ -432,6 +432,7 @@ config ARCH_MVEBU > select DM_SPI > select DM_SPI_FLASH > select SPI > + select DM_MDIO > > config TARGET_DEVKIT3250 > bool "Support devkit3250" > diff --git a/doc/device-tree-bindings/mdio/marvell-mdio.txt > b/doc/device-tree-bindings/mdio/marvell-mdio.txt > new file mode 100644 > index 000..55db435 > --- /dev/null > +++ b/doc/device-tree-bindings/mdio/marvell-mdio.txt > @@ -0,0 +1,18 @@ > +* Marvell MDIO Ethernet Controller interface > + > +The Ethernet controllers of the Marvel Armada 3700 and Armada 7k/8k > +have an identical unit that provides an interface with the MDIO bus. > +This driver handles this MDIO interface. > + > +Mandatory properties: > +SoC specific: > + - #address-cells: Must be <1>. > + - #size-cells: Must be <0>. > + - compatible: Should be "marvell,orion-mdio" (for SMI) > + "marvell,xmdio" (for XSMI) > + - reg: Base address and size SMI/XMSI bus. > + > +Optional properties: > + - mdio-name - MDIO bus name > + > +For example, please refer to "mdio-bus.txt". > diff --git a/drivers/mdio/Kconfig b/drivers/mdio/Kconfig > index 76e3758..ce251c5 100644 > --- a/drivers/mdio/Kconfig > +++ b/drivers/mdio/Kconfig > @@ -15,4 +15,14 @@ config DM_MDIO > udevice or mii bus from its child phy node or > an ethernet udevice which the phy belongs to. > > +config MVMDIO > + bool "Marvell MDIO interface support" > + depends on DM_MDIO > + select PHYLIB > + help > + This driver supports the MDIO interface found in the network > + interface units of the Marvell EBU SoCs (Kirkwood, Orion5x, > + Dove, Armada 370, A
Re: [U-Boot] [PATCH] sunxi: use CONFIG_DEFAULT_FDT_FILE everywhere
On Mon, Jun 04, 2018 at 11:15:34AM -0700, Martin Kelly wrote: > [snip as the thread is getting long] > > On 06/04/2018 01:21 AM, Maxime Ripard wrote: > > On Fri, Jun 01, 2018 at 10:16:32AM -0700, Martin Kelly wrote: > > > On 06/01/2018 04:05 AM, Maxime Ripard wrote: > > > > > > I can see the issues with new defconfigs, but I'm not sure if it will > > > really > > > be that bad. If we apply this patch against sunxi master, then shouldn't > > > new > > > patches get tested and rebased against it? In that case, if they have not > > > set DEFAULT_FDT_FILE, it will default to "", the boards won't boot, and > > > the > > > mistake must be fixed prior to merging. > > > > Unless one has tested it with a version prior to your patch, and sends > > it. Not a lot of people are testing with the next branch in the > > various trees. > > > > > Alternatively if we add the Kconfig boolean, we need to worry about what > > > happens when people have DEFAULT_FDT_FILE set already. I guess we would > > > need > > > to default the new Kconfig boolean to be custom in order to keep those > > > configs from breaking. But if we do that, sunxi will break by default > > > (since > > > sunxi configs don't have the value set). > > > > > > What would you suggest the default value of the new boolean to be? > > > > config DEFAULT_FDT_FILE_USE_DEFAULT_DEVICE_TREE > > bool "whatever" > > default y if ARCH_ROCKCHIP > > default y if ARCH_SUNXI > > > > and in the headers > > > > #ifdef CONFIG_DEFAULT_FDT_FILE_USE_DEFAULT_DEVICE_TREE > > #define CONFIG_DEFAULT_FDT_FILE CONFIG_DEFAULT_DEVICE_TREE ".dtb" > > #endif > > > > And that's done. > > I didn't know Kconfig can set different default values for each > architecture like that; that does indeed solve the problem. However, > I don't think it's a good idea to have sunxi use an alternate > mechanism than the other boards. > > To be clear, are you proposing a general config option that would > apply to every board? In that case, the header logic would be in a > global header rather than a board-specific one. Yes, that's what I had in mind. Maxime -- Maxime Ripard, Bootlin (formerly Free Electrons) Embedded Linux and Kernel engineering https://bootlin.com signature.asc Description: PGP signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] Pull request: u-boot-spi/master
On Tue, Jun 05, 2018 at 11:58:34PM +0530, Jagan Teki wrote: > Hi Tom, > > Please pull this PR. > > thanks, > Jagan. > > The following changes since commit 809e0e398a91db7bf8b4d6259d9bfc6fbd6bce83: > > Merge branch 'master' of git://git.denx.de/u-boot-sunxi (2018-06-04 > 08:55:00 -0400) > > are available in the Git repository at: > > git://git.denx.de/u-boot-spi.git master > > for you to fetch changes up to b1f2b72e39465f2d4582bb4d8c426489ee94e2d9: > > sf: Add support for gd25q32b gigadevice flash (2018-06-04 23:40:04 +0530) > Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] please pull u-boot-samsung master
On Wed, Jun 06, 2018 at 09:55:18PM +0900, Minkyu Kang wrote: > Dear Tom, > > The following changes since commit 0315d6959fdd9d2a4d89016c311e9c8c8d239a10: > > ARM: mvebu: a38x: Add missing SPDX license identfier (2018-05-15 09:08:00 > -0400) > > are available in the git repository at: > > git://git.denx.de/u-boot-samsung.git master > > for you to fetch changes up to 105e3d84e5683c590b04f8677f80797a1d0dce36: > > ARM: dts: exynos5: add the interrupt-parent property (2018-05-16 11:25:12 > +0900) > Applied to u-boot/master. Do you have any comment on https://patchwork.ozlabs.org/project/uboot/list/?series=48701 ? Thanks! -- Tom signature.asc Description: PGP signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH 2/2] usb: sunxi: sun50i: enable OHCI0 clock when OHCI1 is in use
On Wed, Jun 6, 2018 at 2:02 AM, Marek Vasut wrote:
> On 06/06/2018 05:38 AM, Vasily Khoruzhick wrote:
>> On A64 OHCI1 clock source is OHCI0 clock, so we need to enable OHCI0
>> clock when OHCI1 is in use.
>>
>> Fixes commit dd3228170ad7 ("usb: sunxi: Switch to use generic-phy")
>>
>> Signed-off-by: Vasily Khoruzhick
>> ---
>> drivers/usb/host/ohci-sunxi.c | 7 ++-
>> 1 file changed, 6 insertions(+), 1 deletion(-)
>>
>> diff --git a/drivers/usb/host/ohci-sunxi.c b/drivers/usb/host/ohci-sunxi.c
>> index ce2b47a5c4..5661557a3d 100644
>> --- a/drivers/usb/host/ohci-sunxi.c
>> +++ b/drivers/usb/host/ohci-sunxi.c
>> @@ -36,6 +36,7 @@ static int ohci_usb_probe(struct udevice *dev)
>> struct ohci_sunxi_priv *priv = dev_get_priv(dev);
>> struct ohci_regs *regs = (struct ohci_regs *)devfdt_get_addr(dev);
>> int extra_ahb_gate_mask = 0;
>> + int extra_usb_gate_mask = 0;
>> int phys, ret;
>>
>> priv->ccm = (struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
>> @@ -78,13 +79,17 @@ no_phy:
>> extra_ahb_gate_mask = 1 << AHB_GATE_OFFSET_USB_EHCI0;
>> #endif
>> priv->usb_gate_mask = CCM_USB_CTRL_OHCI0_CLK;
>> +#ifdef CONFIG_MACH_SUN50I
>> + extra_usb_gate_mask = CCM_USB_CTRL_OHCI0_CLK;
>> +#endif
>> priv->ahb_gate_mask <<= phys * AHB_CLK_DIST;
>> extra_ahb_gate_mask <<= phys * AHB_CLK_DIST;
>> priv->usb_gate_mask <<= phys;
>>
>> setbits_le32(&priv->ccm->ahb_gate0,
>>priv->ahb_gate_mask | extra_ahb_gate_mask);
>> - setbits_le32(&priv->ccm->usb_clk_cfg, priv->usb_gate_mask);
>> + setbits_le32(&priv->ccm->usb_clk_cfg,
>> + priv->usb_gate_mask | extra_usb_gate_mask);
>
> Why is the SoC / compatible information not coming from DT instead ? Why
> is the driver polluted by more ifdefs ?
Because this platform doesn't have DM clock driver yet. This code will
be removed once this driver is implemented.
>> #ifdef CONFIG_SUNXI_GEN_SUN6I
>> setbits_le32(&priv->ccm->ahb_reset0_cfg,
>>priv->ahb_gate_mask | extra_ahb_gate_mask);
>>
>
>
> --
> Best regards,
> Marek Vasut
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Re: [U-Boot] [PATCH 2/2] usb: sunxi: sun50i: enable OHCI0 clock when OHCI1 is in use
On Wed, Jun 6, 2018 at 6:56 AM, Jagan Teki wrote:
> On Wed, Jun 6, 2018 at 9:08 AM, Vasily Khoruzhick wrote:
>> On A64 OHCI1 clock source is OHCI0 clock, so we need to enable OHCI0
>> clock when OHCI1 is in use.
>>
>> Fixes commit dd3228170ad7 ("usb: sunxi: Switch to use generic-phy")
>>
>> Signed-off-by: Vasily Khoruzhick
>> ---
>> drivers/usb/host/ohci-sunxi.c | 7 ++-
>> 1 file changed, 6 insertions(+), 1 deletion(-)
>>
>> diff --git a/drivers/usb/host/ohci-sunxi.c b/drivers/usb/host/ohci-sunxi.c
>> index ce2b47a5c4..5661557a3d 100644
>> --- a/drivers/usb/host/ohci-sunxi.c
>> +++ b/drivers/usb/host/ohci-sunxi.c
>> @@ -36,6 +36,7 @@ static int ohci_usb_probe(struct udevice *dev)
>> struct ohci_sunxi_priv *priv = dev_get_priv(dev);
>> struct ohci_regs *regs = (struct ohci_regs *)devfdt_get_addr(dev);
>> int extra_ahb_gate_mask = 0;
>> + int extra_usb_gate_mask = 0;
>> int phys, ret;
>>
>> priv->ccm = (struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
>> @@ -78,13 +79,17 @@ no_phy:
>> extra_ahb_gate_mask = 1 << AHB_GATE_OFFSET_USB_EHCI0;
>> #endif
>> priv->usb_gate_mask = CCM_USB_CTRL_OHCI0_CLK;
>> +#ifdef CONFIG_MACH_SUN50I
>> + extra_usb_gate_mask = CCM_USB_CTRL_OHCI0_CLK;
>
> This look reassigning same clock to twice?
extra_usb_gate_mask isn't shifted later and thus
CCM_USB_CTRL_OHCI0_CLK and CCM_USB_CTRL_OHCI1_CLK will be enabled for
phy 1 on A64.
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Re: [U-Boot] [PATCH 2/2] usb: sunxi: sun50i: enable OHCI0 clock when OHCI1 is in use
On 06/06/2018 05:12 PM, Vasily Khoruzhick wrote:
> On Wed, Jun 6, 2018 at 2:02 AM, Marek Vasut wrote:
>> On 06/06/2018 05:38 AM, Vasily Khoruzhick wrote:
>>> On A64 OHCI1 clock source is OHCI0 clock, so we need to enable OHCI0
>>> clock when OHCI1 is in use.
>>>
>>> Fixes commit dd3228170ad7 ("usb: sunxi: Switch to use generic-phy")
>>>
>>> Signed-off-by: Vasily Khoruzhick
>>> ---
>>> drivers/usb/host/ohci-sunxi.c | 7 ++-
>>> 1 file changed, 6 insertions(+), 1 deletion(-)
>>>
>>> diff --git a/drivers/usb/host/ohci-sunxi.c b/drivers/usb/host/ohci-sunxi.c
>>> index ce2b47a5c4..5661557a3d 100644
>>> --- a/drivers/usb/host/ohci-sunxi.c
>>> +++ b/drivers/usb/host/ohci-sunxi.c
>>> @@ -36,6 +36,7 @@ static int ohci_usb_probe(struct udevice *dev)
>>> struct ohci_sunxi_priv *priv = dev_get_priv(dev);
>>> struct ohci_regs *regs = (struct ohci_regs *)devfdt_get_addr(dev);
>>> int extra_ahb_gate_mask = 0;
>>> + int extra_usb_gate_mask = 0;
>>> int phys, ret;
>>>
>>> priv->ccm = (struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
>>> @@ -78,13 +79,17 @@ no_phy:
>>> extra_ahb_gate_mask = 1 << AHB_GATE_OFFSET_USB_EHCI0;
>>> #endif
>>> priv->usb_gate_mask = CCM_USB_CTRL_OHCI0_CLK;
>>> +#ifdef CONFIG_MACH_SUN50I
>>> + extra_usb_gate_mask = CCM_USB_CTRL_OHCI0_CLK;
>>> +#endif
>>> priv->ahb_gate_mask <<= phys * AHB_CLK_DIST;
>>> extra_ahb_gate_mask <<= phys * AHB_CLK_DIST;
>>> priv->usb_gate_mask <<= phys;
>>>
>>> setbits_le32(&priv->ccm->ahb_gate0,
>>>priv->ahb_gate_mask | extra_ahb_gate_mask);
>>> - setbits_le32(&priv->ccm->usb_clk_cfg, priv->usb_gate_mask);
>>> + setbits_le32(&priv->ccm->usb_clk_cfg,
>>> + priv->usb_gate_mask | extra_usb_gate_mask);
>>
>> Why is the SoC / compatible information not coming from DT instead ? Why
>> is the driver polluted by more ifdefs ?
>
> Because this platform doesn't have DM clock driver yet. This code will
> be removed once this driver is implemented.
You don't need DM clock driver, you can check the compatible string I
think ?
--
Best regards,
Marek Vasut
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[U-Boot] [RFC PATCH 00/20] SPI-NAND support
During the last months, Boris Brezillon shared his work to support
serial flashes within Linux. First, he delivered (and merged) a new
layer called spi-mem. He also initiated in Linux MTD subsystem the move
of all 'raw' NAND related code to a raw/ subdirectory, adding at the
same time a NAND core that would be shared with all NAND devices. Then,
he contributed a generic SPI-NAND driver, making use of this NAND core,
as well as some vendor code to drive a few chips.
On top of this work, I added an 'mtd' U-Boot command to handle all sort
of MTD devices. This should become the default command instead of having
one per flash flavor ('sf', 'nand', 'spi-nand' ?).
The series has been tested on an Ocelot board PCB123 (VSC7514),
featuring a Macronix SPI NAND chip.
TL;DR: the series contains:
- Various fixes and re-organization of the MTD subsystem.
- The introduction of the SPI-mem interface.
- The addition of the generic SPI-NAND driver (and its bindings).
- Several SPI NAND chip drivers (Macronix, Micron, Winbond).
- A new 'mtd' command.
- DT changes to make use of a SPI NAND on the Ocelot board.
Any comments on the code, the organization and the respect of U-Boot
driver model will be welcome.
Thanks,
Miquèl
Boris Brezillon (6):
mtd: Fallback to ->_read/write_oob() when ->_read/write() is missing
mtd: nand: Add core infrastructure to deal with NAND devices
mtd: nand: Pass mode information to nand_page_io_req
spi: Extend the core to ease integration of SPI memory controllers
mtd: spinand: Add initial support for the MX35LF1GE4AB chip
dt-bindings: Add bindings for SPI NAND devices
Brian Norris (1):
mtd: add get/set of_node/flash_node helpers
Frieder Schrempf (1):
mtd: spinand: Add initial support for Winbond W25M02GV
Miquel Raynal (10):
mtd: fix build issue with includes
mtd: move definitions to enlarge their range
mtd: move all flash categories inside MTD submenu
mtd: move NAND fiels into a raw/ subdirectory
mtd: rename nand into rawnand in Kconfig prompt
mtd: spinand: Add initial support for the MX35LF2GE4AB chip
mtd: uclass: add probe function
cmd: mtd: add 'mtd' command
mips: dts: ocelot: describe SPI CS pins
mips: dts: ocelot: add the SPI NAND node
Peter Pan (2):
mtd: nand: Add core infrastructure to support SPI NANDs
mtd: spinand: Add initial support for Micron MT29F2G01ABAGD
arch/mips/dts/mscc,ocelot.dtsi| 20 +
arch/mips/dts/mscc,ocelot_pcb.dtsi|9 +
cmd/Kconfig |5 +
cmd/Makefile |1 +
cmd/mtd.c | 280 ++
doc/device-tree-bindings/mtd/spi-nand.txt | 27 +
drivers/mtd/Kconfig |4 +-
drivers/mtd/Makefile |4 +-
drivers/mtd/mtd-uclass.c |9 +
drivers/mtd/mtdcore.c | 31 +-
drivers/mtd/mtdcore.h |6 -
drivers/mtd/mtdpart.c |6 +-
drivers/mtd/nand/Kconfig | 241 +
drivers/mtd/nand/Makefile | 81 +-
drivers/mtd/nand/bbt.c| 132 +++
drivers/mtd/nand/core.c | 243 +
drivers/mtd/nand/raw/Kconfig | 239 +
drivers/mtd/nand/raw/Makefile | 78 ++
drivers/mtd/nand/{ => raw}/am335x_spl_bch.c |0
drivers/mtd/nand/{ => raw}/arasan_nfc.c |0
drivers/mtd/nand/{ => raw}/atmel_nand.c |0
drivers/mtd/nand/{ => raw}/atmel_nand_ecc.h |0
drivers/mtd/nand/{ => raw}/davinci_nand.c |0
drivers/mtd/nand/{ => raw}/denali.c |0
drivers/mtd/nand/{ => raw}/denali.h |0
drivers/mtd/nand/{ => raw}/denali_dt.c|0
drivers/mtd/nand/{ => raw}/denali_spl.c |0
drivers/mtd/nand/{ => raw}/fsl_elbc_nand.c|0
drivers/mtd/nand/{ => raw}/fsl_elbc_spl.c |0
drivers/mtd/nand/{ => raw}/fsl_ifc_nand.c |0
drivers/mtd/nand/{ => raw}/fsl_ifc_spl.c |0
drivers/mtd/nand/{ => raw}/fsl_upm.c |0
drivers/mtd/nand/{ => raw}/fsmc_nand.c|0
drivers/mtd/nand/{ => raw}/kb9202_nand.c |0
drivers/mtd/nand/{ => raw}/kirkwood_nand.c|0
drivers/mtd/nand/{ => raw}/kmeter1_nand.c |0
drivers/mtd/nand/{ => raw}/lpc32xx_nand_mlc.c |0
drivers/mtd/nand/{ => raw}/lpc32xx_nand_slc.c |0
drivers/mtd/nand/{ => raw}/mxc_nand.c |0
drivers/mtd/nand/{ => raw}/mxc_nand.h |0
drivers/mtd/nand/{ => raw}/mxc_nand_spl.c |0
drivers/mtd/nand/{ => raw}/mxs_nand.c |0
drivers/mtd/nand/{ => raw}/mxs_nand_spl.c |0
drivers/mtd/nand/{ => raw}/nand.c |0
drivers/mtd/nand/{ => raw}/nand_base.c| 56 --
drivers/mtd/nand/{ => raw}/nand_bbt.c |0
drivers/mtd/nand/{ => raw}/nand_bch.c |0
drivers/mtd/nand/{ => raw}/nan
[U-Boot] [RFC PATCH 01/20] mtd: Fallback to ->_read/write_oob() when ->_read/write() is missing
From: Boris Brezillon
Some MTD sublayers/drivers are implementing ->_read/write_oob() and
provide dummy wrappers for their ->_read/write() implementations.
Let the core handle this case instead of duplicating the logic.
Signed-off-by: Boris Brezillon
Acked-by: Robert Jarzmik
Acked-by: Brian Norris
Reviewed-by: Miquel Raynal
Tested-by: Ladislav Michl
Signed-off-by: Miquel Raynal
---
drivers/mtd/mtdcore.c | 31 ++--
drivers/mtd/mtdpart.c | 6 ++--
drivers/mtd/nand/nand_base.c | 56 ---
drivers/mtd/onenand/onenand_base.c | 60 --
4 files changed, 33 insertions(+), 120 deletions(-)
diff --git a/drivers/mtd/mtdcore.c b/drivers/mtd/mtdcore.c
index 2cda0511e8..15e0ac2f3e 100644
--- a/drivers/mtd/mtdcore.c
+++ b/drivers/mtd/mtdcore.c
@@ -938,7 +938,20 @@ int mtd_read(struct mtd_info *mtd, loff_t from, size_t
len, size_t *retlen,
* representing the maximum number of bitflips that were corrected on
* any one ecc region (if applicable; zero otherwise).
*/
- ret_code = mtd->_read(mtd, from, len, retlen, buf);
+ if (mtd->_read) {
+ ret_code = mtd->_read(mtd, from, len, retlen, buf);
+ } else if (mtd->_read_oob) {
+ struct mtd_oob_ops ops = {
+ .len = len,
+ .datbuf = buf,
+ };
+
+ ret_code = mtd->_read_oob(mtd, from, &ops);
+ *retlen = ops.retlen;
+ } else {
+ return -ENOTSUPP;
+ }
+
if (unlikely(ret_code < 0))
return ret_code;
if (mtd->ecc_strength == 0)
@@ -953,10 +966,24 @@ int mtd_write(struct mtd_info *mtd, loff_t to, size_t
len, size_t *retlen,
*retlen = 0;
if (to < 0 || to > mtd->size || len > mtd->size - to)
return -EINVAL;
- if (!mtd->_write || !(mtd->flags & MTD_WRITEABLE))
+ if ((!mtd->_write && !mtd->_write_oob) ||
+ !(mtd->flags & MTD_WRITEABLE))
return -EROFS;
if (!len)
return 0;
+
+ if (!mtd->_write) {
+ struct mtd_oob_ops ops = {
+ .len = len,
+ .datbuf = (u8 *)buf,
+ };
+ int ret;
+
+ ret = mtd->_write_oob(mtd, to, &ops);
+ *retlen = ops.retlen;
+ return ret;
+ }
+
return mtd->_write(mtd, to, len, retlen, buf);
}
EXPORT_SYMBOL_GPL(mtd_write);
diff --git a/drivers/mtd/mtdpart.c b/drivers/mtd/mtdpart.c
index 5e42c4b833..3a3f2a1717 100644
--- a/drivers/mtd/mtdpart.c
+++ b/drivers/mtd/mtdpart.c
@@ -418,8 +418,10 @@ static struct mtd_part *allocate_partition(struct mtd_info
*master,
slave->mtd.dev.parent = master->dev.parent;
#endif
- slave->mtd._read = part_read;
- slave->mtd._write = part_write;
+ if (parent->_read)
+ slave->mtd._read = part_read;
+ if (parent->_write)
+ slave->mtd._write = part_write;
if (master->_panic_write)
slave->mtd._panic_write = part_panic_write;
diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c
index eb9f121f81..8ebe85057d 100644
--- a/drivers/mtd/nand/nand_base.c
+++ b/drivers/mtd/nand/nand_base.c
@@ -1863,33 +1863,6 @@ read_retry:
return max_bitflips;
}
-/**
- * nand_read - [MTD Interface] MTD compatibility function for nand_do_read_ecc
- * @mtd: MTD device structure
- * @from: offset to read from
- * @len: number of bytes to read
- * @retlen: pointer to variable to store the number of read bytes
- * @buf: the databuffer to put data
- *
- * Get hold of the chip and call nand_do_read.
- */
-static int nand_read(struct mtd_info *mtd, loff_t from, size_t len,
-size_t *retlen, uint8_t *buf)
-{
- struct mtd_oob_ops ops;
- int ret;
-
- nand_get_device(mtd, FL_READING);
- memset(&ops, 0, sizeof(ops));
- ops.len = len;
- ops.datbuf = buf;
- ops.mode = MTD_OPS_PLACE_OOB;
- ret = nand_do_read_ops(mtd, from, &ops);
- *retlen = ops.retlen;
- nand_release_device(mtd);
- return ret;
-}
-
/**
* nand_read_oob_std - [REPLACEABLE] the most common OOB data read function
* @mtd: mtd info structure
@@ -2674,33 +2647,6 @@ static int panic_nand_write(struct mtd_info *mtd, loff_t
to, size_t len,
return ret;
}
-/**
- * nand_write - [MTD Interface] NAND write with ECC
- * @mtd: MTD device structure
- * @to: offset to write to
- * @len: number of bytes to write
- * @retlen: pointer to variable to store the number of written bytes
- * @buf: the data to write
- *
- * NAND write with ECC.
- */
-static int nand_write(struct mtd_info *mtd, loff_t to, size_t len,
- size_t *retlen, const uint8_t *buf)
-{
- struct mtd_oob_ops ops;
- int ret;
-
- nand_get_device(mtd, FL
[U-Boot] [RFC PATCH 04/20] mtd: move definitions to enlarge their range
Some helpers might be useful in a future 'mtd' U-Boot command to parse MTD device list. Signed-off-by: Miquel Raynal --- drivers/mtd/mtdcore.h | 6 -- include/linux/mtd/mtd.h | 6 ++ 2 files changed, 6 insertions(+), 6 deletions(-) diff --git a/drivers/mtd/mtdcore.h b/drivers/mtd/mtdcore.h index 7b0353399a..1d181a1045 100644 --- a/drivers/mtd/mtdcore.h +++ b/drivers/mtd/mtdcore.h @@ -5,7 +5,6 @@ extern struct mutex mtd_table_mutex; -struct mtd_info *__mtd_next_device(int i); int add_mtd_device(struct mtd_info *mtd); int del_mtd_device(struct mtd_info *mtd); int add_mtd_partitions(struct mtd_info *, const struct mtd_partition *, int); @@ -16,8 +15,3 @@ int parse_mtd_partitions(struct mtd_info *master, const char * const *types, int __init init_mtdchar(void); void __exit cleanup_mtdchar(void); - -#define mtd_for_each_device(mtd) \ - for ((mtd) = __mtd_next_device(0); \ -(mtd) != NULL; \ -(mtd) = __mtd_next_device(mtd->index + 1)) diff --git a/include/linux/mtd/mtd.h b/include/linux/mtd/mtd.h index 52d1afb5b8..b5f9151a70 100644 --- a/include/linux/mtd/mtd.h +++ b/include/linux/mtd/mtd.h @@ -532,6 +532,12 @@ int del_mtd_device(struct mtd_info *mtd); int add_mtd_partitions(struct mtd_info *, const struct mtd_partition *, int); int del_mtd_partitions(struct mtd_info *); +struct mtd_info *__mtd_next_device(int i); +#define mtd_for_each_device(mtd) \ + for ((mtd) = __mtd_next_device(0); \ +(mtd) != NULL; \ +(mtd) = __mtd_next_device(mtd->index + 1)) + int mtd_arg_off(const char *arg, int *idx, loff_t *off, loff_t *size, loff_t *maxsize, int devtype, uint64_t chipsize); int mtd_arg_off_size(int argc, char *const argv[], int *idx, loff_t *off, -- 2.14.1 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [RFC PATCH 03/20] mtd: fix build issue with includes
Fix build errors produced by mtd.h and dm/device.h if not included in the right order. Signed-off-by: Miquel Raynal --- include/linux/mtd/mtd.h | 1 + 1 file changed, 1 insertion(+) diff --git a/include/linux/mtd/mtd.h b/include/linux/mtd/mtd.h index 777a926623..52d1afb5b8 100644 --- a/include/linux/mtd/mtd.h +++ b/include/linux/mtd/mtd.h @@ -22,6 +22,7 @@ #include #include #include +#include #define MAX_MTD_DEVICES 32 #endif -- 2.14.1 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [RFC PATCH 05/20] mtd: move all flash categories inside MTD submenu
There is no reason to have NAND, SPI flashes and UBI sections outside of the MTD submenu in Kconfig. Signed-off-by: Miquel Raynal --- drivers/mtd/Kconfig | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/mtd/Kconfig b/drivers/mtd/Kconfig index 19579801d2..d21b0920dc 100644 --- a/drivers/mtd/Kconfig +++ b/drivers/mtd/Kconfig @@ -40,10 +40,10 @@ config FLASH_PIC32 This enables access to Microchip PIC32 internal non-CFI flash chips through PIC32 Non-Volatile-Memory Controller. -endmenu - source "drivers/mtd/nand/Kconfig" source "drivers/mtd/spi/Kconfig" source "drivers/mtd/ubi/Kconfig" + +endmenu -- 2.14.1 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [RFC PATCH 02/20] mtd: add get/set of_node/flash_node helpers
From: Brian Norris
We are going to begin using the mtd->dev.of_node field for MTD device
nodes, so let's add helpers for it. Also, we'll be making some
conversions on spi_nor (and nand_chip eventually) too, so get that ready
with their own helpers.
Signed-off-by: Brian Norris
Reviewed-by: Boris Brezillon
Signed-off-by: Miquel Raynal
---
include/linux/mtd/mtd.h | 11 +++
1 file changed, 11 insertions(+)
diff --git a/include/linux/mtd/mtd.h b/include/linux/mtd/mtd.h
index ba4cbba949..777a926623 100644
--- a/include/linux/mtd/mtd.h
+++ b/include/linux/mtd/mtd.h
@@ -311,6 +311,17 @@ struct mtd_info {
int usecount;
};
+static inline void mtd_set_of_node(struct mtd_info *mtd,
+ const struct device_node *np)
+{
+ mtd->dev->node.np = np;
+}
+
+static inline const struct device_node *mtd_get_of_node(struct mtd_info *mtd)
+{
+ return mtd->dev->node.np;
+}
+
int mtd_ooblayout_ecc(struct mtd_info *mtd, int section,
struct mtd_oob_region *oobecc);
int mtd_ooblayout_find_eccregion(struct mtd_info *mtd, int eccbyte,
--
2.14.1
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[U-Boot] [RFC PATCH 06/20] mtd: move NAND fiels into a raw/ subdirectory
NAND flavors, like serial and parallel, have a lot in common and would
benefit to share code. Let's move raw (parallel) NAND specific code in a
raw/ subdirectory, to ease the addition of a core file in nand/ and the
introduction of a spi/ subdirectory specific to SPI NANDs.
Signed-off-by: Miquel Raynal
---
drivers/mtd/Makefile | 2 +
drivers/mtd/nand/Kconfig | 240 +-
drivers/mtd/nand/Makefile | 79 +
drivers/mtd/nand/raw/Kconfig | 239 +
drivers/mtd/nand/raw/Makefile | 78 +
drivers/mtd/nand/{ => raw}/am335x_spl_bch.c | 0
drivers/mtd/nand/{ => raw}/arasan_nfc.c | 0
drivers/mtd/nand/{ => raw}/atmel_nand.c | 0
drivers/mtd/nand/{ => raw}/atmel_nand_ecc.h | 0
drivers/mtd/nand/{ => raw}/davinci_nand.c | 0
drivers/mtd/nand/{ => raw}/denali.c | 0
drivers/mtd/nand/{ => raw}/denali.h | 0
drivers/mtd/nand/{ => raw}/denali_dt.c| 0
drivers/mtd/nand/{ => raw}/denali_spl.c | 0
drivers/mtd/nand/{ => raw}/fsl_elbc_nand.c| 0
drivers/mtd/nand/{ => raw}/fsl_elbc_spl.c | 0
drivers/mtd/nand/{ => raw}/fsl_ifc_nand.c | 0
drivers/mtd/nand/{ => raw}/fsl_ifc_spl.c | 0
drivers/mtd/nand/{ => raw}/fsl_upm.c | 0
drivers/mtd/nand/{ => raw}/fsmc_nand.c| 0
drivers/mtd/nand/{ => raw}/kb9202_nand.c | 0
drivers/mtd/nand/{ => raw}/kirkwood_nand.c| 0
drivers/mtd/nand/{ => raw}/kmeter1_nand.c | 0
drivers/mtd/nand/{ => raw}/lpc32xx_nand_mlc.c | 0
drivers/mtd/nand/{ => raw}/lpc32xx_nand_slc.c | 0
drivers/mtd/nand/{ => raw}/mxc_nand.c | 0
drivers/mtd/nand/{ => raw}/mxc_nand.h | 0
drivers/mtd/nand/{ => raw}/mxc_nand_spl.c | 0
drivers/mtd/nand/{ => raw}/mxs_nand.c | 0
drivers/mtd/nand/{ => raw}/mxs_nand_spl.c | 0
drivers/mtd/nand/{ => raw}/nand.c | 0
drivers/mtd/nand/{ => raw}/nand_base.c| 0
drivers/mtd/nand/{ => raw}/nand_bbt.c | 0
drivers/mtd/nand/{ => raw}/nand_bch.c | 0
drivers/mtd/nand/{ => raw}/nand_ecc.c | 0
drivers/mtd/nand/{ => raw}/nand_ids.c | 0
drivers/mtd/nand/{ => raw}/nand_plat.c| 0
drivers/mtd/nand/{ => raw}/nand_spl_load.c| 0
drivers/mtd/nand/{ => raw}/nand_spl_loaders.c | 0
drivers/mtd/nand/{ => raw}/nand_spl_simple.c | 0
drivers/mtd/nand/{ => raw}/nand_timings.c | 0
drivers/mtd/nand/{ => raw}/nand_util.c| 0
drivers/mtd/nand/{ => raw}/ndfc.c | 0
drivers/mtd/nand/{ => raw}/omap_elm.c | 0
drivers/mtd/nand/{ => raw}/omap_gpmc.c| 0
drivers/mtd/nand/{ => raw}/pxa3xx_nand.c | 0
drivers/mtd/nand/{ => raw}/pxa3xx_nand.h | 0
drivers/mtd/nand/{ => raw}/sunxi_nand.c | 0
drivers/mtd/nand/{ => raw}/sunxi_nand_spl.c | 0
drivers/mtd/nand/{ => raw}/tegra_nand.c | 0
drivers/mtd/nand/{ => raw}/tegra_nand.h | 0
drivers/mtd/nand/{ => raw}/vf610_nfc.c| 0
drivers/mtd/nand/{ => raw}/zynq_nand.c| 0
53 files changed, 322 insertions(+), 316 deletions(-)
create mode 100644 drivers/mtd/nand/raw/Kconfig
create mode 100644 drivers/mtd/nand/raw/Makefile
rename drivers/mtd/nand/{ => raw}/am335x_spl_bch.c (100%)
rename drivers/mtd/nand/{ => raw}/arasan_nfc.c (100%)
rename drivers/mtd/nand/{ => raw}/atmel_nand.c (100%)
rename drivers/mtd/nand/{ => raw}/atmel_nand_ecc.h (100%)
rename drivers/mtd/nand/{ => raw}/davinci_nand.c (100%)
rename drivers/mtd/nand/{ => raw}/denali.c (100%)
rename drivers/mtd/nand/{ => raw}/denali.h (100%)
rename drivers/mtd/nand/{ => raw}/denali_dt.c (100%)
rename drivers/mtd/nand/{ => raw}/denali_spl.c (100%)
rename drivers/mtd/nand/{ => raw}/fsl_elbc_nand.c (100%)
rename drivers/mtd/nand/{ => raw}/fsl_elbc_spl.c (100%)
rename drivers/mtd/nand/{ => raw}/fsl_ifc_nand.c (100%)
rename drivers/mtd/nand/{ => raw}/fsl_ifc_spl.c (100%)
rename drivers/mtd/nand/{ => raw}/fsl_upm.c (100%)
rename drivers/mtd/nand/{ => raw}/fsmc_nand.c (100%)
rename drivers/mtd/nand/{ => raw}/kb9202_nand.c (100%)
rename drivers/mtd/nand/{ => raw}/kirkwood_nand.c (100%)
rename drivers/mtd/nand/{ => raw}/kmeter1_nand.c (100%)
rename drivers/mtd/nand/{ => raw}/lpc32xx_nand_mlc.c (100%)
rename drivers/mtd/nand/{ => raw}/lpc32xx_nand_slc.c (100%)
rename drivers/mtd/nand/{ => raw}/mxc_nand.c (100%)
rename drivers/mtd/nand/{ => raw}/mxc_nand.h (100%)
rename drivers/mtd/nand/{ => raw}/mxc_nand_spl.c (100%)
rename drivers/mtd/nand/{ => raw}/mxs_nand.c (100%)
rename drivers/mtd/nand/{ => raw}/mxs_nand_spl.c (100%)
rename drivers/mtd/nand/{ => raw}/nand.c (100%)
rename drivers/mtd/nand/{ => raw}/nand_base.c (100%)
rename drivers/mtd/nand/{ => raw}/nand_bbt.c (100%)
rename drivers/mtd/nand/{ => raw}/nand_bch.c (100%)
rename drivers/mtd/nand/{ => raw}/nand_ecc.c
[U-Boot] [RFC PATCH 08/20] mtd: nand: Add core infrastructure to deal with NAND devices
From: Boris Brezillon
Add an intermediate layer to abstract NAND device interface so that
some logic can be shared between SPI NANDs, parallel/raw NANDs,
OneNANDs, ...
Signed-off-by: Boris Brezillon
Signed-off-by: Miquel Raynal
---
drivers/mtd/nand/Kconfig | 3 +
drivers/mtd/nand/Makefile | 3 +
drivers/mtd/nand/bbt.c| 132 +
drivers/mtd/nand/core.c | 243 +++
include/linux/mtd/nand.h | 731 ++
5 files changed, 1112 insertions(+)
create mode 100644 drivers/mtd/nand/bbt.c
create mode 100644 drivers/mtd/nand/core.c
create mode 100644 include/linux/mtd/nand.h
diff --git a/drivers/mtd/nand/Kconfig b/drivers/mtd/nand/Kconfig
index 6d53734718..1c1a1f487e 100644
--- a/drivers/mtd/nand/Kconfig
+++ b/drivers/mtd/nand/Kconfig
@@ -1 +1,4 @@
+config MTD_NAND_CORE
+ tristate
+
source "drivers/mtd/nand/raw/Kconfig"
diff --git a/drivers/mtd/nand/Makefile b/drivers/mtd/nand/Makefile
index d1c3f93047..69c80ea252 100644
--- a/drivers/mtd/nand/Makefile
+++ b/drivers/mtd/nand/Makefile
@@ -1,3 +1,6 @@
# SPDX-License-Identifier: GPL-2.0
+nandcore-objs := core.o bbt.o
+obj-$(CONFIG_MTD_NAND_CORE) += nandcore.o
+
obj-$(CONFIG_MTD_NAND) += raw/
diff --git a/drivers/mtd/nand/bbt.c b/drivers/mtd/nand/bbt.c
new file mode 100644
index 00..7e0ad3190c
--- /dev/null
+++ b/drivers/mtd/nand/bbt.c
@@ -0,0 +1,132 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2017 Free Electrons
+ *
+ * Authors:
+ * Boris Brezillon
+ * Peter Pan
+ */
+
+#define pr_fmt(fmt)"nand-bbt: " fmt
+
+#include
+#ifndef __UBOOT__
+#include
+#endif
+
+/**
+ * nanddev_bbt_init() - Initialize the BBT (Bad Block Table)
+ * @nand: NAND device
+ *
+ * Initialize the in-memory BBT.
+ *
+ * Return: 0 in case of success, a negative error code otherwise.
+ */
+int nanddev_bbt_init(struct nand_device *nand)
+{
+ unsigned int bits_per_block = fls(NAND_BBT_BLOCK_NUM_STATUS);
+ unsigned int nblocks = nanddev_neraseblocks(nand);
+ unsigned int nwords = DIV_ROUND_UP(nblocks * bits_per_block,
+ BITS_PER_LONG);
+
+ nand->bbt.cache = kzalloc(nwords, GFP_KERNEL);
+ if (!nand->bbt.cache)
+ return -ENOMEM;
+
+ return 0;
+}
+EXPORT_SYMBOL_GPL(nanddev_bbt_init);
+
+/**
+ * nanddev_bbt_cleanup() - Cleanup the BBT (Bad Block Table)
+ * @nand: NAND device
+ *
+ * Undoes what has been done in nanddev_bbt_init()
+ */
+void nanddev_bbt_cleanup(struct nand_device *nand)
+{
+ kfree(nand->bbt.cache);
+}
+EXPORT_SYMBOL_GPL(nanddev_bbt_cleanup);
+
+/**
+ * nanddev_bbt_update() - Update a BBT
+ * @nand: nand device
+ *
+ * Update the BBT. Currently a NOP function since on-flash bbt is not yet
+ * supported.
+ *
+ * Return: 0 in case of success, a negative error code otherwise.
+ */
+int nanddev_bbt_update(struct nand_device *nand)
+{
+ return 0;
+}
+EXPORT_SYMBOL_GPL(nanddev_bbt_update);
+
+/**
+ * nanddev_bbt_get_block_status() - Return the status of an eraseblock
+ * @nand: nand device
+ * @entry: the BBT entry
+ *
+ * Return: a positive number nand_bbt_block_status status or -%ERANGE if @entry
+ *is bigger than the BBT size.
+ */
+int nanddev_bbt_get_block_status(const struct nand_device *nand,
+unsigned int entry)
+{
+ unsigned int bits_per_block = fls(NAND_BBT_BLOCK_NUM_STATUS);
+ unsigned long *pos = nand->bbt.cache +
+((entry * bits_per_block) / BITS_PER_LONG);
+ unsigned int offs = (entry * bits_per_block) % BITS_PER_LONG;
+ unsigned long status;
+
+ if (entry >= nanddev_neraseblocks(nand))
+ return -ERANGE;
+
+ status = pos[0] >> offs;
+ if (bits_per_block + offs > BITS_PER_LONG)
+ status |= pos[1] << (BITS_PER_LONG - offs);
+
+ return status & GENMASK(bits_per_block - 1, 0);
+}
+EXPORT_SYMBOL_GPL(nanddev_bbt_get_block_status);
+
+/**
+ * nanddev_bbt_set_block_status() - Update the status of an eraseblock in the
+ * in-memory BBT
+ * @nand: nand device
+ * @entry: the BBT entry to update
+ * @status: the new status
+ *
+ * Update an entry of the in-memory BBT. If you want to push the updated BBT
+ * the NAND you should call nanddev_bbt_update().
+ *
+ * Return: 0 in case of success or -%ERANGE if @entry is bigger than the BBT
+ *size.
+ */
+int nanddev_bbt_set_block_status(struct nand_device *nand, unsigned int entry,
+enum nand_bbt_block_status status)
+{
+ unsigned int bits_per_block = fls(NAND_BBT_BLOCK_NUM_STATUS);
+ unsigned long *pos = nand->bbt.cache +
+((entry * bits_per_block) / BITS_PER_LONG);
+ unsigned int offs = (entry * bits_per_block) % BITS_PER_LONG;
+ unsigned long val = status & GENMASK(bits_per_block - 1, 0);
+
+ if (entry >= nanddev_neraseblocks(nand))
+ retu
[U-Boot] [RFC PATCH 07/20] mtd: rename nand into rawnand in Kconfig prompt
Sync the Kconfig raw NAND entry title with the code architecture. Signed-off-by: Miquel Raynal --- drivers/mtd/nand/raw/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/mtd/nand/raw/Kconfig b/drivers/mtd/nand/raw/Kconfig index a820af61ce..6ef82cab88 100644 --- a/drivers/mtd/nand/raw/Kconfig +++ b/drivers/mtd/nand/raw/Kconfig @@ -1,6 +1,6 @@ menuconfig NAND - bool "NAND Device Support" + bool "Raw NAND Device Support" if NAND config SYS_NAND_SELF_INIT -- 2.14.1 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [RFC PATCH 09/20] mtd: nand: Pass mode information to nand_page_io_req
From: Boris Brezillon
The NAND sub-layers are likely to need the MTD_OPS_XXX mode information
in order to decide if they should enable/disable ECC or how they should
place the OOB bytes in the provided OOB buffer.
Add a field to nand_page_io_req to pass this information.
Signed-off-by: Boris Brezillon
Signed-off-by: Miquel Raynal
---
include/linux/mtd/nand.h | 3 +++
1 file changed, 3 insertions(+)
diff --git a/include/linux/mtd/nand.h b/include/linux/mtd/nand.h
index ada7af4a41..13e8dd1103 100644
--- a/include/linux/mtd/nand.h
+++ b/include/linux/mtd/nand.h
@@ -86,6 +86,7 @@ struct nand_pos {
* @ooboffs: the OOB offset within the page
* @ooblen: the number of OOB bytes to read from/write to this page
* @oobbuf: buffer to store OOB data in or get OOB data from
+ * @mode: one of the %MTD_OPS_XXX mode
*
* This object is used to pass per-page I/O requests to NAND sub-layers. This
* way all useful information are already formatted in a useful way and
@@ -106,6 +107,7 @@ struct nand_page_io_req {
const void *out;
void *in;
} oobbuf;
+ int mode;
};
/**
@@ -599,6 +601,7 @@ static inline void nanddev_io_iter_init(struct nand_device
*nand,
{
struct mtd_info *mtd = nanddev_to_mtd(nand);
+ iter->req.mode = req->mode;
iter->req.dataoffs = nanddev_offs_to_pos(nand, offs, &iter->req.pos);
iter->req.ooboffs = req->ooboffs;
iter->oobbytes_per_page = mtd_oobavail(mtd, req);
--
2.14.1
___
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https://lists.denx.de/listinfo/u-boot
[U-Boot] [RFC PATCH 16/20] mtd: uclass: add probe function
The user might want to trigger the probe of any MTD device, export these
functions so they can be called from a command source file.
Signed-off-by: Miquel Raynal
---
drivers/mtd/mtd-uclass.c | 9 +
include/linux/mtd/mtd.h | 3 +++
2 files changed, 12 insertions(+)
diff --git a/drivers/mtd/mtd-uclass.c b/drivers/mtd/mtd-uclass.c
index 7b7c48ec5a..1b6533829c 100644
--- a/drivers/mtd/mtd-uclass.c
+++ b/drivers/mtd/mtd-uclass.c
@@ -6,6 +6,7 @@
#include
#include
+#include
#include
#include
@@ -14,6 +15,14 @@
* The uclass private is pointed to mtd_info.
*/
+int mtd_probe(struct udevice *dev)
+{
+ if (device_active(dev))
+ return 0;
+
+ return device_probe(dev);
+}
+
UCLASS_DRIVER(mtd) = {
.id = UCLASS_MTD,
.name = "mtd",
diff --git a/include/linux/mtd/mtd.h b/include/linux/mtd/mtd.h
index b5f9151a70..f89a32ae36 100644
--- a/include/linux/mtd/mtd.h
+++ b/include/linux/mtd/mtd.h
@@ -548,5 +548,8 @@ int mtd_arg_off_size(int argc, char *const argv[], int
*idx, loff_t *off,
void mtd_get_len_incl_bad(struct mtd_info *mtd, uint64_t offset,
const uint64_t length, uint64_t *len_incl_bad,
int *truncated);
+
+int mtd_probe(struct udevice *dev);
+
#endif
#endif /* __MTD_MTD_H__ */
--
2.14.1
___
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[U-Boot] [RFC PATCH 10/20] spi: Extend the core to ease integration of SPI memory controllers
From: Boris Brezillon
Some controllers are exposing high-level interfaces to access various
kind of SPI memories. Unfortunately they do not fit in the current
spi_controller model and usually have drivers placed in
drivers/mtd/spi-nor which are only supporting SPI NORs and not SPI
memories in general.
This is an attempt at defining a SPI memory interface which works for
all kinds of SPI memories (NORs, NANDs, SRAMs).
Signed-off-by: Boris Brezillon
Signed-off-by: Miquel Raynal
---
drivers/spi/Kconfig | 7 +
drivers/spi/Makefile | 1 +
drivers/spi/spi-mem.c | 500 ++
include/spi-mem.h | 258 ++
include/spi.h | 11 ++
5 files changed, 777 insertions(+)
create mode 100644 drivers/spi/spi-mem.c
create mode 100644 include/spi-mem.h
diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig
index 235a8c7d73..0ee371b2d9 100644
--- a/drivers/spi/Kconfig
+++ b/drivers/spi/Kconfig
@@ -15,6 +15,13 @@ config DM_SPI
if DM_SPI
+config SPI_MEM
+ bool "SPI memory extension"
+ help
+ Enable this option if you want to enable the SPI memory extension.
+ This extension is meant to simplify interaction with SPI memories
+ by providing an high-level interface to send memory-like commands.
+
config ALTERA_SPI
bool "Altera SPI driver"
help
diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile
index 4b6000fd9a..982529a0e6 100644
--- a/drivers/spi/Makefile
+++ b/drivers/spi/Makefile
@@ -10,6 +10,7 @@ ifdef CONFIG_DM_SPI
obj-y += spi-uclass.o
obj-$(CONFIG_SANDBOX) += spi-emul-uclass.o
obj-$(CONFIG_SOFT_SPI) += soft_spi.o
+obj-$(CONFIG_SPI_MEM) += spi-mem.o
else
obj-y += spi.o
obj-$(CONFIG_SOFT_SPI) += soft_spi_legacy.o
diff --git a/drivers/spi/spi-mem.c b/drivers/spi/spi-mem.c
new file mode 100644
index 00..1aabe56819
--- /dev/null
+++ b/drivers/spi/spi-mem.c
@@ -0,0 +1,500 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2018 Exceet Electronics GmbH
+ * Copyright (C) 2018 Bootlin
+ *
+ * Author: Boris Brezillon
+ */
+
+#ifndef __UBOOT__
+#include
+#include
+#include "internals.h"
+#else
+#include
+#include
+#endif
+
+#ifndef __UBOOT__
+/**
+ * spi_controller_dma_map_mem_op_data() - DMA-map the buffer attached to a
+ * memory operation
+ * @ctlr: the SPI controller requesting this dma_map()
+ * @op: the memory operation containing the buffer to map
+ * @sgt: a pointer to a non-initialized sg_table that will be filled by this
+ * function
+ *
+ * Some controllers might want to do DMA on the data buffer embedded in @op.
+ * This helper prepares everything for you and provides a ready-to-use
+ * sg_table. This function is not intended to be called from spi drivers.
+ * Only SPI controller drivers should use it.
+ * Note that the caller must ensure the memory region pointed by
+ * op->data.buf.{in,out} is DMA-able before calling this function.
+ *
+ * Return: 0 in case of success, a negative error code otherwise.
+ */
+int spi_controller_dma_map_mem_op_data(struct spi_controller *ctlr,
+ const struct spi_mem_op *op,
+ struct sg_table *sgt)
+{
+ struct device *dmadev;
+
+ if (!op->data.nbytes)
+ return -EINVAL;
+
+ if (op->data.dir == SPI_MEM_DATA_OUT && ctlr->dma_tx)
+ dmadev = ctlr->dma_tx->device->dev;
+ else if (op->data.dir == SPI_MEM_DATA_IN && ctlr->dma_rx)
+ dmadev = ctlr->dma_rx->device->dev;
+ else
+ dmadev = ctlr->dev.parent;
+
+ if (!dmadev)
+ return -EINVAL;
+
+ return spi_map_buf(ctlr, dmadev, sgt, op->data.buf.in, op->data.nbytes,
+ op->data.dir == SPI_MEM_DATA_IN ?
+ DMA_FROM_DEVICE : DMA_TO_DEVICE);
+}
+EXPORT_SYMBOL_GPL(spi_controller_dma_map_mem_op_data);
+
+/**
+ * spi_controller_dma_unmap_mem_op_data() - DMA-unmap the buffer attached to a
+ * memory operation
+ * @ctlr: the SPI controller requesting this dma_unmap()
+ * @op: the memory operation containing the buffer to unmap
+ * @sgt: a pointer to an sg_table previously initialized by
+ * spi_controller_dma_map_mem_op_data()
+ *
+ * Some controllers might want to do DMA on the data buffer embedded in @op.
+ * This helper prepares things so that the CPU can access the
+ * op->data.buf.{in,out} buffer again.
+ *
+ * This function is not intended to be called from SPI drivers. Only SPI
+ * controller drivers should use it.
+ *
+ * This function should be called after the DMA operation has finished and is
+ * only valid if the previous spi_controller_dma_map_mem_op_data() call
+ * returned 0.
+ *
+ * Return: 0 in case of success, a negative error code otherwise.
+ */
+void spi_controller_dma_unmap_mem_op_data(struct spi_controller *ctlr,
+
[U-Boot] [RFC PATCH 12/20] mtd: spinand: Add initial support for Micron MT29F2G01ABAGD
From: Peter Pan
Add a basic driver for Micron SPI NANDs. Only one device is supported
right now, but the driver will be extended to support more devices
afterwards.
Signed-off-by: Peter Pan
Signed-off-by: Boris Brezillon
Signed-off-by: Miquel Raynal
---
drivers/mtd/nand/spi/Makefile | 2 +-
drivers/mtd/nand/spi/core.c | 17 ++
drivers/mtd/nand/spi/micron.c | 135 ++
include/linux/mtd/spinand.h | 3 +
4 files changed, 156 insertions(+), 1 deletion(-)
create mode 100644 drivers/mtd/nand/spi/micron.c
diff --git a/drivers/mtd/nand/spi/Makefile b/drivers/mtd/nand/spi/Makefile
index f0c6e69d2e..4eb745abd4 100644
--- a/drivers/mtd/nand/spi/Makefile
+++ b/drivers/mtd/nand/spi/Makefile
@@ -1,4 +1,4 @@
# SPDX-License-Identifier: GPL-2.0
-spinand-objs := core.o
+spinand-objs := core.o micron.o
obj-$(CONFIG_MTD_SPI_NAND) += spinand.o
diff --git a/drivers/mtd/nand/spi/core.c b/drivers/mtd/nand/spi/core.c
index d2e912aeb5..8b01aeb7e7 100644
--- a/drivers/mtd/nand/spi/core.c
+++ b/drivers/mtd/nand/spi/core.c
@@ -829,8 +829,25 @@ static const struct nand_ops spinand_ops = {
.isbad = spinand_isbad,
};
+static const struct spinand_manufacturer *spinand_manufacturers[] = {
+ µn_spinand_manufacturer,
+};
+
static int spinand_manufacturer_detect(struct spinand_device *spinand)
{
+ unsigned int i;
+ int ret;
+
+ for (i = 0; i < ARRAY_SIZE(spinand_manufacturers); i++) {
+ ret = spinand_manufacturers[i]->ops->detect(spinand);
+ if (ret > 0) {
+ spinand->manufacturer = spinand_manufacturers[i];
+ return 0;
+ } else if (ret < 0) {
+ return ret;
+ }
+ }
+
return -ENOTSUPP;
}
diff --git a/drivers/mtd/nand/spi/micron.c b/drivers/mtd/nand/spi/micron.c
new file mode 100644
index 00..83951c5d0f
--- /dev/null
+++ b/drivers/mtd/nand/spi/micron.c
@@ -0,0 +1,135 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2016-2017 Micron Technology, Inc.
+ *
+ * Authors:
+ * Peter Pan
+ */
+
+#ifndef __UBOOT__
+#include
+#include
+#endif
+#include
+
+#define SPINAND_MFR_MICRON 0x2c
+
+#define MICRON_STATUS_ECC_MASK GENMASK(7, 4)
+#define MICRON_STATUS_ECC_NO_BITFLIPS (0 << 4)
+#define MICRON_STATUS_ECC_1TO3_BITFLIPS(1 << 4)
+#define MICRON_STATUS_ECC_4TO6_BITFLIPS(3 << 4)
+#define MICRON_STATUS_ECC_7TO8_BITFLIPS(5 << 4)
+
+static SPINAND_OP_VARIANTS(read_cache_variants,
+ SPINAND_PAGE_READ_FROM_CACHE_QUADIO_OP(0, 2, NULL, 0),
+ SPINAND_PAGE_READ_FROM_CACHE_X4_OP(0, 1, NULL, 0),
+ SPINAND_PAGE_READ_FROM_CACHE_DUALIO_OP(0, 1, NULL, 0),
+ SPINAND_PAGE_READ_FROM_CACHE_X2_OP(0, 1, NULL, 0),
+ SPINAND_PAGE_READ_FROM_CACHE_OP(true, 0, 1, NULL, 0),
+ SPINAND_PAGE_READ_FROM_CACHE_OP(false, 0, 1, NULL, 0));
+
+static SPINAND_OP_VARIANTS(write_cache_variants,
+ SPINAND_PROG_LOAD_X4(true, 0, NULL, 0),
+ SPINAND_PROG_LOAD(true, 0, NULL, 0));
+
+static SPINAND_OP_VARIANTS(update_cache_variants,
+ SPINAND_PROG_LOAD_X4(false, 0, NULL, 0),
+ SPINAND_PROG_LOAD(false, 0, NULL, 0));
+
+static int mt29f2g01abagd_ooblayout_ecc(struct mtd_info *mtd, int section,
+ struct mtd_oob_region *region)
+{
+ if (section)
+ return -ERANGE;
+
+ region->offset = 64;
+ region->length = 64;
+
+ return 0;
+}
+
+static int mt29f2g01abagd_ooblayout_free(struct mtd_info *mtd, int section,
+struct mtd_oob_region *region)
+{
+ if (section)
+ return -ERANGE;
+
+ /* Reserve 2 bytes for the BBM. */
+ region->offset = 2;
+ region->length = 62;
+
+ return 0;
+}
+
+static const struct mtd_ooblayout_ops mt29f2g01abagd_ooblayout = {
+ .ecc = mt29f2g01abagd_ooblayout_ecc,
+ .free = mt29f2g01abagd_ooblayout_free,
+};
+
+static int mt29f2g01abagd_ecc_get_status(struct spinand_device *spinand,
+u8 status)
+{
+ switch (status & MICRON_STATUS_ECC_MASK) {
+ case STATUS_ECC_NO_BITFLIPS:
+ return 0;
+
+ case STATUS_ECC_UNCOR_ERROR:
+ return -EBADMSG;
+
+ case MICRON_STATUS_ECC_1TO3_BITFLIPS:
+ return 3;
+
+ case MICRON_STATUS_ECC_4TO6_BITFLIPS:
+ return 6;
+
+ case MICRON_STATUS_ECC_7TO8_BITFLIPS:
+ return 8;
+
+ default:
+ break;
+ }
+
+ return -EINVAL;
+}
+
+static const struct spinand_info micron_spinand_table[] = {
+ SPINAND_INFO("MT29F2G01ABAGD", 0x24,
+NAND_MEMORG(1, 2048, 128, 64, 2048, 2, 1, 1),
+NAND_ECCREQ(8, 512),
+SPINAND_INFO_OP_VARIANTS(&read
[U-Boot] [RFC PATCH 19/20] mips: dts: ocelot: describe SPI CS pins
Describe all SPI CS pins that are not part of the SoC. CS0 can only be
used as SPI CS, while CS1, CS2 and CS3 defaults as GPIOs.
Signed-off-by: Miquel Raynal
---
arch/mips/dts/mscc,ocelot.dtsi | 20
1 file changed, 20 insertions(+)
diff --git a/arch/mips/dts/mscc,ocelot.dtsi b/arch/mips/dts/mscc,ocelot.dtsi
index d1b8868194..8b04f76ed4 100644
--- a/arch/mips/dts/mscc,ocelot.dtsi
+++ b/arch/mips/dts/mscc,ocelot.dtsi
@@ -135,6 +135,26 @@
pins = "GPIO_12", "GPIO_13";
function = "uart2";
};
+
+ spi_cs1_pin: spi-cs1-pin {
+ pins = "GPIO_8";
+ function = "si";
+ };
+
+ spi_cs2_pin: spi-cs2-pin {
+ pins = "GPIO_9";
+ function = "si";
+ };
+
+ spi_cs3_pin: spi-cs3-pin {
+ pins = "GPIO_16";
+ function = "si";
+ };
+
+ spi_cs4_pin: spi-cs4-pin {
+ pins = "GPIO_17";
+ function = "si";
+ };
};
};
};
--
2.14.1
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[U-Boot] [RFC PATCH 11/20] mtd: nand: Add core infrastructure to support SPI NANDs
From: Peter Pan
Add a SPI NAND framework based on the generic NAND framework and the
spi-mem infrastructure.
In its current state, this framework supports the following features:
- single/dual/quad IO modes
- on-die ECC
Signed-off-by: Peter Pan
Signed-off-by: Boris Brezillon
Signed-off-by: Miquel Raynal
---
drivers/mtd/nand/Kconfig |2 +
drivers/mtd/nand/Makefile |1 +
drivers/mtd/nand/spi/Kconfig |7 +
drivers/mtd/nand/spi/Makefile |4 +
drivers/mtd/nand/spi/core.c | 1233 +
include/linux/mtd/spinand.h | 427 ++
6 files changed, 1674 insertions(+)
create mode 100644 drivers/mtd/nand/spi/Kconfig
create mode 100644 drivers/mtd/nand/spi/Makefile
create mode 100644 drivers/mtd/nand/spi/core.c
create mode 100644 include/linux/mtd/spinand.h
diff --git a/drivers/mtd/nand/Kconfig b/drivers/mtd/nand/Kconfig
index 1c1a1f487e..78ae04bdcb 100644
--- a/drivers/mtd/nand/Kconfig
+++ b/drivers/mtd/nand/Kconfig
@@ -2,3 +2,5 @@ config MTD_NAND_CORE
tristate
source "drivers/mtd/nand/raw/Kconfig"
+
+source "drivers/mtd/nand/spi/Kconfig"
diff --git a/drivers/mtd/nand/Makefile b/drivers/mtd/nand/Makefile
index 69c80ea252..cbac19b38a 100644
--- a/drivers/mtd/nand/Makefile
+++ b/drivers/mtd/nand/Makefile
@@ -4,3 +4,4 @@ nandcore-objs := core.o bbt.o
obj-$(CONFIG_MTD_NAND_CORE) += nandcore.o
obj-$(CONFIG_MTD_NAND) += raw/
+obj-$(CONFIG_MTD_SPI_NAND) += spi/
diff --git a/drivers/mtd/nand/spi/Kconfig b/drivers/mtd/nand/spi/Kconfig
new file mode 100644
index 00..2197cb531f
--- /dev/null
+++ b/drivers/mtd/nand/spi/Kconfig
@@ -0,0 +1,7 @@
+menuconfig MTD_SPI_NAND
+ bool "SPI NAND device Support"
+ depends on MTD && DM_SPI
+ select MTD_NAND_CORE
+ select SPI_MEM
+ help
+ This is the framework for the SPI NAND device drivers.
diff --git a/drivers/mtd/nand/spi/Makefile b/drivers/mtd/nand/spi/Makefile
new file mode 100644
index 00..f0c6e69d2e
--- /dev/null
+++ b/drivers/mtd/nand/spi/Makefile
@@ -0,0 +1,4 @@
+# SPDX-License-Identifier: GPL-2.0
+
+spinand-objs := core.o
+obj-$(CONFIG_MTD_SPI_NAND) += spinand.o
diff --git a/drivers/mtd/nand/spi/core.c b/drivers/mtd/nand/spi/core.c
new file mode 100644
index 00..d2e912aeb5
--- /dev/null
+++ b/drivers/mtd/nand/spi/core.c
@@ -0,0 +1,1233 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2016-2017 Micron Technology, Inc.
+ *
+ * Authors:
+ * Peter Pan
+ * Boris Brezillon
+ */
+
+#define pr_fmt(fmt)"spi-nand: " fmt
+
+#ifndef __UBOOT__
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#else
+#include
+#include
+#include
+#include
+#include
+#endif
+
+/* SPI NAND index visible in MTD names */
+static int spi_nand_idx;
+
+static void spinand_cache_op_adjust_colum(struct spinand_device *spinand,
+ const struct nand_page_io_req *req,
+ u16 *column)
+{
+ struct nand_device *nand = spinand_to_nand(spinand);
+ unsigned int shift;
+
+ if (nand->memorg.planes_per_lun < 2)
+ return;
+
+ /* The plane number is passed in MSB just above the column address */
+ shift = fls(nand->memorg.pagesize);
+ *column |= req->pos.plane << shift;
+}
+
+static int spinand_read_reg_op(struct spinand_device *spinand, u8 reg, u8 *val)
+{
+ struct spi_mem_op op = SPINAND_GET_FEATURE_OP(reg,
+ spinand->scratchbuf);
+ int ret;
+
+ ret = spi_mem_exec_op(spinand->slave, &op);
+ if (ret)
+ return ret;
+
+ *val = *spinand->scratchbuf;
+ return 0;
+}
+
+static int spinand_write_reg_op(struct spinand_device *spinand, u8 reg, u8 val)
+{
+ struct spi_mem_op op = SPINAND_SET_FEATURE_OP(reg,
+ spinand->scratchbuf);
+
+ *spinand->scratchbuf = val;
+ return spi_mem_exec_op(spinand->slave, &op);
+}
+
+static int spinand_read_status(struct spinand_device *spinand, u8 *status)
+{
+ return spinand_read_reg_op(spinand, REG_STATUS, status);
+}
+
+static int spinand_get_cfg(struct spinand_device *spinand, u8 *cfg)
+{
+ struct nand_device *nand = spinand_to_nand(spinand);
+
+ if (WARN_ON(spinand->cur_target < 0 ||
+ spinand->cur_target >= nand->memorg.ntargets))
+ return -EINVAL;
+
+ *cfg = spinand->cfg_cache[spinand->cur_target];
+ return 0;
+}
+
+static int spinand_set_cfg(struct spinand_device *spinand, u8 cfg)
+{
+ struct nand_device *nand = spinand_to_nand(spinand);
+ int ret;
+
+ if (WARN_ON(spinand->cur_target < 0 ||
+ spinand->cur_target >= nand->memorg.ntargets))
+ return -EINVAL;
+
+ if (spinand->cfg_cache[spinand->cur_target] == cfg)
+ return 0;
+
+ ret = s
[U-Boot] [RFC PATCH 18/20] dt-bindings: Add bindings for SPI NAND devices
From: Boris Brezillon Add bindings for SPI NAND chips. Signed-off-by: Boris Brezillon Signed-off-by: Miquel Raynal --- doc/device-tree-bindings/mtd/spi-nand.txt | 27 +++ 1 file changed, 27 insertions(+) create mode 100644 doc/device-tree-bindings/mtd/spi-nand.txt diff --git a/doc/device-tree-bindings/mtd/spi-nand.txt b/doc/device-tree-bindings/mtd/spi-nand.txt new file mode 100644 index 00..d55f80196c --- /dev/null +++ b/doc/device-tree-bindings/mtd/spi-nand.txt @@ -0,0 +1,27 @@ +SPI NAND flash + +Required properties: +- compatible: should be "spi-nand" +- reg: should encode the chip-select line used to access the NAND chip + +Optional properties +- spi-max-frequency: maximum frequency of the SPI bus the chip can operate at. +This should encode board limitations (i.e. max freq can't +be achieved due to crosstalk on IO lines). +When unspecified, the driver assumes the chip can run at +the max frequency defined in the spec (information +extracted chip detection time). +- spi-tx-bus-width: The bus width (number of data wires) that is used for MOSI. + Only encodes the board constraints (i.e. when not all IO + signals are routed on the board). Device constraints are + extracted when detecting the chip, and controller + constraints are exposed by the SPI mem controller. If this + property is missing that means no constraint at the board + level. +- spi-rx-bus-width: The bus width (number of data wires) that is used for MISO. + Only encodes the board constraints (i.e. when not all IO + signals are routed on the board). Device constraints are + extracted when detecting the chip, and controller + constraints are exposed by the SPI mem controller. If this + property is missing that means no constraint at the board + level. -- 2.14.1 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [RFC PATCH 20/20] mips: dts: ocelot: add the SPI NAND node
Declare the SPI NAND device accessible on the SPI bus with CS1.
Signed-off-by: Miquel Raynal
---
arch/mips/dts/mscc,ocelot_pcb.dtsi | 9 +
1 file changed, 9 insertions(+)
diff --git a/arch/mips/dts/mscc,ocelot_pcb.dtsi
b/arch/mips/dts/mscc,ocelot_pcb.dtsi
index 4e532363c3..2f37ef92f9 100644
--- a/arch/mips/dts/mscc,ocelot_pcb.dtsi
+++ b/arch/mips/dts/mscc,ocelot_pcb.dtsi
@@ -25,11 +25,20 @@
&spi0 {
status = "okay";
+ pinctrl-0 = <&spi_cs1_pin>;
+ pinctrl-names = "default";
+
spi-flash@0 {
compatible = "spi-flash";
spi-max-frequency = <1800>; /* input clock */
reg = <0>; /* CS0 */
};
+
+ spi-nand@1 {
+ compatible = "spi-nand";
+ spi-max-frequency = <1800>; /* input clock */
+ reg = <1>; /* CS1 */
+ };
};
ðernet {
--
2.14.1
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[U-Boot] [RFC PATCH 13/20] mtd: spinand: Add initial support for Winbond W25M02GV
From: Frieder Schrempf
Add support for the W25M02GV chip.
Signed-off-by: Frieder Schrempf
Signed-off-by: Boris Brezillon
Signed-off-by: Miquel Raynal
---
drivers/mtd/nand/spi/Makefile | 2 +-
drivers/mtd/nand/spi/core.c| 1 +
drivers/mtd/nand/spi/winbond.c | 143 +
include/linux/mtd/spinand.h| 1 +
4 files changed, 146 insertions(+), 1 deletion(-)
create mode 100644 drivers/mtd/nand/spi/winbond.c
diff --git a/drivers/mtd/nand/spi/Makefile b/drivers/mtd/nand/spi/Makefile
index 4eb745abd4..11ba5de68b 100644
--- a/drivers/mtd/nand/spi/Makefile
+++ b/drivers/mtd/nand/spi/Makefile
@@ -1,4 +1,4 @@
# SPDX-License-Identifier: GPL-2.0
-spinand-objs := core.o micron.o
+spinand-objs := core.o micron.o winbond.o
obj-$(CONFIG_MTD_SPI_NAND) += spinand.o
diff --git a/drivers/mtd/nand/spi/core.c b/drivers/mtd/nand/spi/core.c
index 8b01aeb7e7..f151f671fa 100644
--- a/drivers/mtd/nand/spi/core.c
+++ b/drivers/mtd/nand/spi/core.c
@@ -831,6 +831,7 @@ static const struct nand_ops spinand_ops = {
static const struct spinand_manufacturer *spinand_manufacturers[] = {
µn_spinand_manufacturer,
+ &winbond_spinand_manufacturer,
};
static int spinand_manufacturer_detect(struct spinand_device *spinand)
diff --git a/drivers/mtd/nand/spi/winbond.c b/drivers/mtd/nand/spi/winbond.c
new file mode 100644
index 00..eac811d97c
--- /dev/null
+++ b/drivers/mtd/nand/spi/winbond.c
@@ -0,0 +1,143 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2017 exceet electronics GmbH
+ *
+ * Authors:
+ * Frieder Schrempf
+ * Boris Brezillon
+ */
+
+#ifndef __UBOOT__
+#include
+#include
+#endif
+#include
+
+#define SPINAND_MFR_WINBOND0xEF
+
+#define WINBOND_CFG_BUF_READ BIT(3)
+
+static SPINAND_OP_VARIANTS(read_cache_variants,
+ SPINAND_PAGE_READ_FROM_CACHE_QUADIO_OP(0, 2, NULL, 0),
+ SPINAND_PAGE_READ_FROM_CACHE_X4_OP(0, 1, NULL, 0),
+ SPINAND_PAGE_READ_FROM_CACHE_DUALIO_OP(0, 1, NULL, 0),
+ SPINAND_PAGE_READ_FROM_CACHE_X2_OP(0, 1, NULL, 0),
+ SPINAND_PAGE_READ_FROM_CACHE_OP(true, 0, 1, NULL, 0),
+ SPINAND_PAGE_READ_FROM_CACHE_OP(false, 0, 1, NULL, 0));
+
+static SPINAND_OP_VARIANTS(write_cache_variants,
+ SPINAND_PROG_LOAD_X4(true, 0, NULL, 0),
+ SPINAND_PROG_LOAD(true, 0, NULL, 0));
+
+static SPINAND_OP_VARIANTS(update_cache_variants,
+ SPINAND_PROG_LOAD_X4(false, 0, NULL, 0),
+ SPINAND_PROG_LOAD(false, 0, NULL, 0));
+
+static int w25m02gv_ooblayout_ecc(struct mtd_info *mtd, int section,
+ struct mtd_oob_region *region)
+{
+ if (section > 3)
+ return -ERANGE;
+
+ region->offset = (16 * section) + 8;
+ region->length = 8;
+
+ return 0;
+}
+
+static int w25m02gv_ooblayout_free(struct mtd_info *mtd, int section,
+ struct mtd_oob_region *region)
+{
+ if (section > 3)
+ return -ERANGE;
+
+ region->offset = (16 * section) + 2;
+ region->length = 6;
+
+ return 0;
+}
+
+static const struct mtd_ooblayout_ops w25m02gv_ooblayout = {
+ .ecc = w25m02gv_ooblayout_ecc,
+ .free = w25m02gv_ooblayout_free,
+};
+
+static int w25m02gv_select_target(struct spinand_device *spinand,
+ unsigned int target)
+{
+ struct spi_mem_op op = SPI_MEM_OP(SPI_MEM_OP_CMD(0xc2, 1),
+ SPI_MEM_OP_NO_ADDR,
+ SPI_MEM_OP_NO_DUMMY,
+ SPI_MEM_OP_DATA_OUT(1,
+ spinand->scratchbuf,
+ 1));
+
+ *spinand->scratchbuf = target;
+ return spi_mem_exec_op(spinand->slave, &op);
+}
+
+static const struct spinand_info winbond_spinand_table[] = {
+ SPINAND_INFO("W25M02GV", 0xAB,
+NAND_MEMORG(1, 2048, 64, 64, 1024, 1, 1, 2),
+NAND_ECCREQ(1, 512),
+SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+ &write_cache_variants,
+ &update_cache_variants),
+0,
+SPINAND_ECCINFO(&w25m02gv_ooblayout, NULL),
+SPINAND_SELECT_TARGET(w25m02gv_select_target)),
+};
+
+/**
+ * winbond_spinand_detect - initialize device related part in spinand_device
+ * struct if it is a Winbond device.
+ * @spinand: SPI NAND device structure
+ */
+static int winbond_spinand_detect(struct spinand_device *spinand)
+{
+ u8 *id = spinand->id.data;
+ int ret;
+
+ /*
+* Winbond SPI NAND read ID need a dummy byte,
+* so the first byte in raw_id is dummy.
+*/
+ if (id[1] != SPINAND_MFR_WINBOND)
+
[U-Boot] [RFC PATCH 14/20] mtd: spinand: Add initial support for the MX35LF1GE4AB chip
From: Boris Brezillon
Add minimal support for the MX35LF1GE4AB SPI NAND chip.
Signed-off-by: Boris Brezillon
---
drivers/mtd/nand/spi/Makefile | 2 +-
drivers/mtd/nand/spi/core.c | 1 +
drivers/mtd/nand/spi/macronix.c | 138
include/linux/mtd/spinand.h | 1 +
4 files changed, 141 insertions(+), 1 deletion(-)
create mode 100644 drivers/mtd/nand/spi/macronix.c
diff --git a/drivers/mtd/nand/spi/Makefile b/drivers/mtd/nand/spi/Makefile
index 11ba5de68b..a66edd9199 100644
--- a/drivers/mtd/nand/spi/Makefile
+++ b/drivers/mtd/nand/spi/Makefile
@@ -1,4 +1,4 @@
# SPDX-License-Identifier: GPL-2.0
-spinand-objs := core.o micron.o winbond.o
+spinand-objs := core.o macronix.o micron.o winbond.o
obj-$(CONFIG_MTD_SPI_NAND) += spinand.o
diff --git a/drivers/mtd/nand/spi/core.c b/drivers/mtd/nand/spi/core.c
index f151f671fa..6f383852d9 100644
--- a/drivers/mtd/nand/spi/core.c
+++ b/drivers/mtd/nand/spi/core.c
@@ -830,6 +830,7 @@ static const struct nand_ops spinand_ops = {
};
static const struct spinand_manufacturer *spinand_manufacturers[] = {
+ ¯onix_spinand_manufacturer,
µn_spinand_manufacturer,
&winbond_spinand_manufacturer,
};
diff --git a/drivers/mtd/nand/spi/macronix.c b/drivers/mtd/nand/spi/macronix.c
new file mode 100644
index 00..dd351dcb6c
--- /dev/null
+++ b/drivers/mtd/nand/spi/macronix.c
@@ -0,0 +1,138 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2018 Macronix
+ *
+ * Author: Boris Brezillon
+ */
+
+#ifndef __UBOOT__
+#include
+#include
+#endif
+#include
+
+#define SPINAND_MFR_MACRONIX 0xC2
+
+static SPINAND_OP_VARIANTS(read_cache_variants,
+ SPINAND_PAGE_READ_FROM_CACHE_X4_OP(0, 1, NULL, 0),
+ SPINAND_PAGE_READ_FROM_CACHE_X2_OP(0, 1, NULL, 0),
+ SPINAND_PAGE_READ_FROM_CACHE_OP(true, 0, 1, NULL, 0),
+ SPINAND_PAGE_READ_FROM_CACHE_OP(false, 0, 1, NULL, 0));
+
+static SPINAND_OP_VARIANTS(write_cache_variants,
+ SPINAND_PROG_LOAD_X4(true, 0, NULL, 0),
+ SPINAND_PROG_LOAD(true, 0, NULL, 0));
+
+static SPINAND_OP_VARIANTS(update_cache_variants,
+ SPINAND_PROG_LOAD_X4(false, 0, NULL, 0),
+ SPINAND_PROG_LOAD(false, 0, NULL, 0));
+
+static int mx35lf1ge4ab_ooblayout_ecc(struct mtd_info *mtd, int section,
+ struct mtd_oob_region *region)
+{
+ return -ERANGE;
+}
+
+static int mx35lf1ge4ab_ooblayout_free(struct mtd_info *mtd, int section,
+ struct mtd_oob_region *region)
+{
+ if (section)
+ return -ERANGE;
+
+ region->offset = 2;
+ region->length = mtd->oobsize - 2;
+
+ return 0;
+}
+
+static const struct mtd_ooblayout_ops mx35lf1ge4ab_ooblayout = {
+ .ecc = mx35lf1ge4ab_ooblayout_ecc,
+ .free = mx35lf1ge4ab_ooblayout_free,
+};
+
+static int mx35lf1ge4ab_get_eccsr(struct spinand_device *spinand, u8 *eccsr)
+{
+ struct spi_mem_op op = SPI_MEM_OP(SPI_MEM_OP_CMD(0x7c, 1),
+ SPI_MEM_OP_NO_ADDR,
+ SPI_MEM_OP_DUMMY(1, 1),
+ SPI_MEM_OP_DATA_IN(1, eccsr, 1));
+
+ return spi_mem_exec_op(spinand->slave, &op);
+}
+
+static int mx35lf1ge4ab_ecc_get_status(struct spinand_device *spinand,
+ u8 status)
+{
+ struct nand_device *nand = spinand_to_nand(spinand);
+ u8 eccsr;
+
+ switch (status & STATUS_ECC_MASK) {
+ case STATUS_ECC_NO_BITFLIPS:
+ return 0;
+
+ case STATUS_ECC_UNCOR_ERROR:
+ return -EBADMSG;
+
+ case STATUS_ECC_HAS_BITFLIPS:
+ /*
+* Let's try to retrieve the real maximum number of bitflips
+* in order to avoid forcing the wear-leveling layer to move
+* data around if it's not necessary.
+*/
+ if (mx35lf1ge4ab_get_eccsr(spinand, &eccsr))
+ return nand->eccreq.strength;
+
+ if (WARN_ON(eccsr > nand->eccreq.strength || !eccsr))
+ return nand->eccreq.strength;
+
+ return eccsr;
+
+ default:
+ break;
+ }
+
+ return -EINVAL;
+}
+
+static const struct spinand_info macronix_spinand_table[] = {
+ SPINAND_INFO("MX35LF1GE4AB", 0x12,
+NAND_MEMORG(1, 2048, 64, 64, 1024, 1, 1, 1),
+NAND_ECCREQ(4, 512),
+SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+ &write_cache_variants,
+ &update_cache_variants),
+SPINAND_HAS_QE_BIT,
+SPINAND_ECCINFO(&mx35lf1ge4ab_ooblayout,
+mx35lf1ge4ab_ecc_get_status)),
+};
+
+static int macronix_s
Re: [U-Boot] [RFC][PATCH] spl: vboot: Verify content before using load_addr
On Wed, Jun 6, 2018 at 4:35 AM, Jun Nie wrote: > 2018-06-06 9:08 GMT+08:00 Teddy Reed : >> When using verified-boot in the SPL, the FIT content must be >> verified before it can be used. >> >> Currently the load_addr FIT property is read and used as input to >> memcpy before the property is verified. >> >> Signed-off-by: Teddy Reed >> --- > > Reviewed-by: Jun Nie Thanks for taking a look Jun! I did not see any sandbox tests exercising the SPL/signature checking so I included 'RFC'. I know you are familiar with using the signature checking within the SPL, and you helped make it possible in the first place. The three minor concerns I had when moving the validation earlier are: (1) the signature was originally calculated on the potentially uncompressed version, but this seems unlikely; similarly (2) the post process board-specific methods can mutate the signed content; and (3) now using the src address means reading directly from storage / etc instead of potentially SRAM/DRAM. For (1) see that line 256 was uncompressing the data before signature checking. Then the signature check was applied to the uncompressed region. To be clear I think this patch is the correct approach, and the signature check should apply to the compressed content. For (2) see that line 248 is board-specific, I am assuming that can mutate the content. Thus the signature check should be placed before that call. Thanks again! -- Teddy Reed V ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [RFC PATCH 15/20] mtd: spinand: Add initial support for the MX35LF2GE4AB chip
Add support for the MX35LF2GE4AB chip, which is similar to its cousin
MX35LF1GE4AB, with two planes instead of one.
Signed-off-by: Miquel Raynal
---
drivers/mtd/nand/spi/macronix.c | 20 ++--
1 file changed, 14 insertions(+), 6 deletions(-)
diff --git a/drivers/mtd/nand/spi/macronix.c b/drivers/mtd/nand/spi/macronix.c
index dd351dcb6c..d761b99d26 100644
--- a/drivers/mtd/nand/spi/macronix.c
+++ b/drivers/mtd/nand/spi/macronix.c
@@ -27,13 +27,13 @@ static SPINAND_OP_VARIANTS(update_cache_variants,
SPINAND_PROG_LOAD_X4(false, 0, NULL, 0),
SPINAND_PROG_LOAD(false, 0, NULL, 0));
-static int mx35lf1ge4ab_ooblayout_ecc(struct mtd_info *mtd, int section,
+static int mx35lfxge4ab_ooblayout_ecc(struct mtd_info *mtd, int section,
struct mtd_oob_region *region)
{
return -ERANGE;
}
-static int mx35lf1ge4ab_ooblayout_free(struct mtd_info *mtd, int section,
+static int mx35lfxge4ab_ooblayout_free(struct mtd_info *mtd, int section,
struct mtd_oob_region *region)
{
if (section)
@@ -45,9 +45,9 @@ static int mx35lf1ge4ab_ooblayout_free(struct mtd_info *mtd,
int section,
return 0;
}
-static const struct mtd_ooblayout_ops mx35lf1ge4ab_ooblayout = {
- .ecc = mx35lf1ge4ab_ooblayout_ecc,
- .free = mx35lf1ge4ab_ooblayout_free,
+static const struct mtd_ooblayout_ops mx35lfxge4ab_ooblayout = {
+ .ecc = mx35lfxge4ab_ooblayout_ecc,
+ .free = mx35lfxge4ab_ooblayout_free,
};
static int mx35lf1ge4ab_get_eccsr(struct spinand_device *spinand, u8 *eccsr)
@@ -102,8 +102,16 @@ static const struct spinand_info macronix_spinand_table[]
= {
&write_cache_variants,
&update_cache_variants),
SPINAND_HAS_QE_BIT,
-SPINAND_ECCINFO(&mx35lf1ge4ab_ooblayout,
+SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout,
mx35lf1ge4ab_ecc_get_status)),
+ SPINAND_INFO("MX35LF2GE4AB", 0x22,
+NAND_MEMORG(1, 2048, 64, 64, 1024, 2, 1, 1),
+NAND_ECCREQ(4, 512),
+SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+ &write_cache_variants,
+ &update_cache_variants),
+SPINAND_HAS_QE_BIT,
+SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout, NULL)),
};
static int macronix_spinand_detect(struct spinand_device *spinand)
--
2.14.1
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[U-Boot] [RFC PATCH 17/20] cmd: mtd: add 'mtd' command
There should not be a 'nand' command, a 'sf' command and certainly not
another 'spi-nand'. Write a 'mtd' command instead to manage all MTD
devices at once. This should be the preferred way to access any MTD
device.
Signed-off-by: Miquel Raynal
---
cmd/Kconfig | 5 +
cmd/Makefile | 1 +
cmd/mtd.c| 280 +++
drivers/mtd/Makefile | 2 +-
4 files changed, 287 insertions(+), 1 deletion(-)
create mode 100644 cmd/mtd.c
diff --git a/cmd/Kconfig b/cmd/Kconfig
index 136836d146..6e9b629e1c 100644
--- a/cmd/Kconfig
+++ b/cmd/Kconfig
@@ -797,6 +797,11 @@ config CMD_MMC
help
MMC memory mapped support.
+config CMD_MTD
+ bool "mtd"
+ help
+ MTD commands support.
+
config CMD_NAND
bool "nand"
default y if NAND_SUNXI
diff --git a/cmd/Makefile b/cmd/Makefile
index 9a358e4801..e42db12e1d 100644
--- a/cmd/Makefile
+++ b/cmd/Makefile
@@ -88,6 +88,7 @@ obj-$(CONFIG_CMD_MISC) += misc.o
obj-$(CONFIG_CMD_MMC) += mmc.o
obj-$(CONFIG_CMD_MMC_SPI) += mmc_spi.o
obj-$(CONFIG_MP) += mp.o
+obj-$(CONFIG_CMD_MTD) += mtd.o
obj-$(CONFIG_CMD_MTDPARTS) += mtdparts.o
obj-$(CONFIG_CMD_NAND) += nand.o
obj-$(CONFIG_CMD_NET) += net.o
diff --git a/cmd/mtd.c b/cmd/mtd.c
new file mode 100644
index 00..fe48378bd0
--- /dev/null
+++ b/cmd/mtd.c
@@ -0,0 +1,280 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * mtd.c
+ *
+ * Generic command to handle basic operations on any memory device.
+ *
+ * Copyright: Bootlin, 2018
+ * Author: Miquèl Raynal
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+static void mtd_dump_buf(u8 *buf, uint len)
+{
+ int i, j;
+
+ for (i = 0; i < len; ) {
+ printf("0x%08x:\t", i);
+ for (j = 0; j < 8; j++)
+ printf("%02x ", buf[i + j]);
+ printf(" ");
+ i += 8;
+ for (j = 0; j < 8; j++)
+ printf("%02x ", buf[i + j]);
+ printf("\n");
+ i += 8;
+ }
+}
+
+static void mtd_show_device(struct mtd_info *mtd)
+{
+ printf("* %s", mtd->name);
+ if (mtd->dev)
+ printf(" [device: %s] [parent: %s] [driver: %s]",
+ mtd->dev->name, mtd->dev->parent->name,
+ mtd->dev->driver->name);
+
+ printf("\n");
+}
+
+static int do_mtd_list(void)
+{
+ struct mtd_info *mtd;
+ struct udevice *dev;
+ int dm_idx = 0, idx = 0;
+
+ /* Ensure all devices compliants with U-Boot driver model are probed */
+ while (!uclass_find_device(UCLASS_MTD, dm_idx, &dev) && dev) {
+ mtd_probe(dev);
+ dm_idx++;
+ }
+
+ printf("MTD devices list (%d DM compliant):\n", dm_idx);
+
+ mtd_for_each_device(mtd) {
+ mtd_show_device(mtd);
+ idx++;
+ }
+
+ if (!idx)
+ printf("No MTD device found\n");
+
+ return 0;
+}
+
+static int do_mtd_read_write(struct mtd_info *mtd, bool read, uint *waddr,
+bool raw, bool woob, u64 from, u64 len)
+{
+ u32 buf_len = woob ? mtd->writesize + mtd->oobsize :
+ROUND(len, mtd->writesize);
+ u8 *buf = malloc(buf_len);
+ struct mtd_oob_ops ops = {
+ .mode = raw ? MTD_OPS_RAW : 0,
+ .len = len,
+ .ooblen = woob ? mtd->oobsize : 0,
+ .datbuf = buf,
+ .oobbuf = woob ? &buf[mtd->writesize] : NULL,
+ };
+ int ret;
+
+ if (!buf)
+ return -ENOMEM;
+
+ memset(buf, 0xFF, buf_len);
+
+ if (read) {
+ ret = mtd_read_oob(mtd, from, &ops);
+ } else {
+ memcpy(buf, waddr, ops.len + ops.ooblen);
+ ret = mtd_write_oob(mtd, from, &ops);
+ }
+
+ if (ret) {
+ printf("Could not handle %lldB from 0x%08llx on %s, ret %d\n",
+ len, from, mtd->name, ret);
+ return ret;
+ }
+
+ if (read) {
+ printf("Dump %lld data bytes from 0x%08llx:\n", len, from);
+ mtd_dump_buf(buf, len);
+
+ if (woob) {
+ printf("\nDump %d OOB bytes from 0x%08llx:\n",
+ mtd->oobsize, from);
+ mtd_dump_buf(&buf[len], mtd->oobsize);
+ }
+ }
+
+ kfree(buf);
+
+ return 0;
+}
+
+static int do_mtd_erase(struct mtd_info *mtd, bool scrub, u64 from, u64 len)
+{
+ struct erase_info erase_infos = {
+ .mtd = mtd,
+ .addr = from,
+ .len = len,
+ .scrub = scrub,
+ };
+
+ return mtd_erase(mtd, &erase_infos);
+}
+
+static int do_mtd(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+{
+ struct mtd_info *mtd;
+ struct
[U-Boot] [PATCH v2 1/3] crypto: add md5 to common hash functions
The md5 function was missing from the common hash functions
Signed-off-by: Ben Whitten
---
common/hash.c| 8
include/image.h | 1 +
include/u-boot/md5.h | 7 ---
lib/Makefile | 1 +
lib/md5.c| 4 ++--
5 files changed, 16 insertions(+), 5 deletions(-)
diff --git a/common/hash.c b/common/hash.c
index ef14651..d2f4b3f 100644
--- a/common/hash.c
+++ b/common/hash.c
@@ -168,6 +168,14 @@ static struct hash_algo hash_algo[] = {
.hash_update= hash_update_crc32,
.hash_finish= hash_finish_crc32,
},
+#ifdef CONFIG_MD5
+ {
+ .name = "md5",
+ .digest_size= 16,
+ .chunk_size = CHUNKSZ_MD5,
+ .hash_func_ws = md5_wd,
+ },
+#endif
};
/* Try to minimize code size for boards that don't want much hashing */
diff --git a/include/image.h b/include/image.h
index 9522ee4..a5a5807 100644
--- a/include/image.h
+++ b/include/image.h
@@ -32,6 +32,7 @@ struct fdt_region;
#define CONFIG_FIT_ENABLE_SHA256_SUPPORT
#define CONFIG_SHA1
#define CONFIG_SHA256
+#define CONFIG_MD5
#define IMAGE_ENABLE_IGNORE0
#define IMAGE_INDENT_STRING""
diff --git a/include/u-boot/md5.h b/include/u-boot/md5.h
index e09c16a..365d125 100644
--- a/include/u-boot/md5.h
+++ b/include/u-boot/md5.h
@@ -21,14 +21,15 @@ struct MD5Context {
* Calculate and store in 'output' the MD5 digest of 'len' bytes at
* 'input'. 'output' must have enough space to hold 16 bytes.
*/
-void md5 (unsigned char *input, int len, unsigned char output[16]);
+
+void md5 (const unsigned char *input, unsigned int len, unsigned char *output);
/*
* Calculate and store in 'output' the MD5 digest of 'len' bytes at 'input'.
* 'output' must have enough space to hold 16 bytes. If 'chunk' Trigger the
* watchdog every 'chunk_sz' bytes of input processed.
*/
-void md5_wd (unsigned char *input, int len, unsigned char output[16],
- unsigned int chunk_sz);
+void md5_wd (const unsigned char *input, unsigned int len,
+ unsigned char *output, unsigned int chunk_sz);
#endif /* _MD5_H */
diff --git a/lib/Makefile b/lib/Makefile
index d531ea5..5c4aa73 100644
--- a/lib/Makefile
+++ b/lib/Makefile
@@ -78,6 +78,7 @@ obj-y += div64.o
obj-y += hang.o
obj-y += linux_compat.o
obj-y += linux_string.o
+obj-$(CONFIG_$(SPL_TPL_)MD5_SUPPORT) += md5.o
obj-y += membuff.o
obj-$(CONFIG_REGEX) += slre.o
obj-y += string.o
diff --git a/lib/md5.c b/lib/md5.c
index 2ae4a06..2278001 100644
--- a/lib/md5.c
+++ b/lib/md5.c
@@ -268,7 +268,7 @@ MD5Transform(__u32 buf[4], __u32 const in[16])
* 'input'. 'output' must have enough space to hold 16 bytes.
*/
void
-md5 (unsigned char *input, int len, unsigned char output[16])
+md5 (const unsigned char *input, unsigned int len, unsigned char *output)
{
struct MD5Context context;
@@ -284,7 +284,7 @@ md5 (unsigned char *input, int len, unsigned char
output[16])
* watchdog every 'chunk_sz' bytes of input processed.
*/
void
-md5_wd (unsigned char *input, int len, unsigned char output[16],
+md5_wd (const unsigned char *input, unsigned int len, unsigned char *output,
unsigned int chunk_sz)
{
struct MD5Context context;
--
2.7.4
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[U-Boot] [PATCH v2 2/3] fit: allow fit to call hardware accelerated hash
Move to calling the abstraction which allows for hardware acceleration.
We also remove unneeded defines and only include objects if required.
Signed-off-by: Ben Whitten
---
common/hash.c | 4
common/image-fit.c | 27 +--
include/image.h| 42 ++
lib/Makefile | 5 -
4 files changed, 39 insertions(+), 39 deletions(-)
diff --git a/common/hash.c b/common/hash.c
index d2f4b3f..ceee124 100644
--- a/common/hash.c
+++ b/common/hash.c
@@ -85,6 +85,7 @@ static int hash_finish_sha256(struct hash_algo *algo, void
*ctx, void
}
#endif
+#if defined(CONFIG_CRC32)
static int hash_init_crc32(struct hash_algo *algo, void **ctxp)
{
uint32_t *ctx = malloc(sizeof(uint32_t));
@@ -110,6 +111,7 @@ static int hash_finish_crc32(struct hash_algo *algo, void
*ctx, void *dest_buf,
free(ctx);
return 0;
}
+#endif
/*
* These are the hash algorithms we support. If we have hardware acceleration
@@ -159,6 +161,7 @@ static struct hash_algo hash_algo[] = {
#endif
},
#endif
+#ifdef CONFIG_CRC32
{
.name = "crc32",
.digest_size= 4,
@@ -168,6 +171,7 @@ static struct hash_algo hash_algo[] = {
.hash_update= hash_update_crc32,
.hash_finish= hash_finish_crc32,
},
+#endif
#ifdef CONFIG_MD5
{
.name = "md5",
diff --git a/common/image-fit.c b/common/image-fit.c
index 8c15ed1..7d8c961 100644
--- a/common/image-fit.c
+++ b/common/image-fit.c
@@ -1082,26 +1082,17 @@ int fit_set_timestamp(void *fit, int noffset, time_t
timestamp)
int calculate_hash(const void *data, int data_len, const char *algo,
uint8_t *value, int *value_len)
{
- if (IMAGE_ENABLE_CRC32 && strcmp(algo, "crc32") == 0) {
- *((uint32_t *)value) = crc32_wd(0, data, data_len,
- CHUNKSZ_CRC32);
- *((uint32_t *)value) = cpu_to_uimage(*((uint32_t *)value));
- *value_len = 4;
- } else if (IMAGE_ENABLE_SHA1 && strcmp(algo, "sha1") == 0) {
- sha1_csum_wd((unsigned char *)data, data_len,
-(unsigned char *)value, CHUNKSZ_SHA1);
- *value_len = 20;
- } else if (IMAGE_ENABLE_SHA256 && strcmp(algo, "sha256") == 0) {
- sha256_csum_wd((unsigned char *)data, data_len,
- (unsigned char *)value, CHUNKSZ_SHA256);
- *value_len = SHA256_SUM_LEN;
- } else if (IMAGE_ENABLE_MD5 && strcmp(algo, "md5") == 0) {
- md5_wd((unsigned char *)data, data_len, value, CHUNKSZ_MD5);
- *value_len = 16;
- } else {
+ struct hash_algo *hash_algo;
+ int ret;
+
+ ret = hash_lookup_algo(algo, &hash_algo);
+ if (ret) {
debug("Unsupported hash alogrithm\n");
- return -1;
}
+ hash_algo->hash_func_ws((unsigned char *)data, data_len,
+ (unsigned char *)value, hash_algo->chunk_size);
+ *value_len = hash_algo->digest_size;
+
return 0;
}
diff --git a/include/image.h b/include/image.h
index a5a5807..16bc097 100644
--- a/include/image.h
+++ b/include/image.h
@@ -32,6 +32,7 @@ struct fdt_region;
#define CONFIG_FIT_ENABLE_SHA256_SUPPORT
#define CONFIG_SHA1
#define CONFIG_SHA256
+#define CONFIG_CRC32
#define CONFIG_MD5
#define IMAGE_ENABLE_IGNORE0
@@ -58,38 +59,39 @@ struct fdt_region;
#include
# ifdef CONFIG_SPL_BUILD
# ifdef CONFIG_SPL_CRC32_SUPPORT
-# define IMAGE_ENABLE_CRC32 1
+# define CONFIG_CRC32
+# else
+# undef CONFIG_CRC32
# endif
# ifdef CONFIG_SPL_MD5_SUPPORT
-# define IMAGE_ENABLE_MD51
+# define CONFIG_MD5
+# else
+# undef CONFIG_MD5
# endif
# ifdef CONFIG_SPL_SHA1_SUPPORT
-# define IMAGE_ENABLE_SHA1 1
+# define CONFIG_SHA1
+# else
+# undef CONFIG_SHA1
# endif
# else
+# ifndef CONFIG_CRC32
# define CONFIG_CRC32 /* FIT images need CRC32 support */
-# define IMAGE_ENABLE_CRC32 1
-# define IMAGE_ENABLE_MD5 1
-# define IMAGE_ENABLE_SHA11
+# endif
+# ifndef CONFIG_MD5
+# define CONFIG_MD5
+# endif
+# ifndef CONFIG_SHA1
+# define CONFIG_SHA1
+# endif
# endif
-#ifndef IMAGE_ENABLE_CRC32
-#define IMAGE_ENABLE_CRC32 0
-#endif
-
-#ifndef IMAGE_ENABLE_MD5
-#define IMAGE_ENABLE_MD5 0
-#endif
-
-#ifndef IMAGE_ENABLE_SHA1
-#define IMAGE_ENABLE_SHA1 0
-#endif
-
#if defined(CONFIG_FIT_ENABLE_SHA256_SUPPORT) || \
defined(CONFIG_SPL_SHA256_SUPPORT)
-#define IMAGE_ENABLE_SHA2561
+#ifndef CONFIG_SHA256
+#define CONFIG_SHA256
+#endif
#else
-#define IMAGE_ENABLE_SHA2560
+#undef CONFIG_SHA256
#endif
#endif /* IMAGE_ENABLE_FIT */
diff --git a/lib/Makefile b/lib/Makefile
index 5c4aa73..5b40444 100644
--- a/lib/Makefile
+++ b/lib/Makefile
@@ -24,6 +24,7 @@ obj-$(CONFIG_US
[U-Boot] [PATCH v2 3/3] crypto: add Atmel hardware acceleration for SHA1 & 256
We can use the hardware hash block to reduce space, particularly useful
for verifying FIT signatures from SPL.
Signed-off-by: Ben Whitten
---
drivers/crypto/Kconfig | 5 +
drivers/crypto/Makefile| 1 +
drivers/crypto/atmel_sha.c | 289 +
drivers/crypto/atmel_sha.h | 52
lib/Makefile | 2 +
5 files changed, 349 insertions(+)
create mode 100644 drivers/crypto/atmel_sha.c
create mode 100644 drivers/crypto/atmel_sha.h
diff --git a/drivers/crypto/Kconfig b/drivers/crypto/Kconfig
index 1ea116b..7a20edb 100644
--- a/drivers/crypto/Kconfig
+++ b/drivers/crypto/Kconfig
@@ -2,4 +2,9 @@ menu "Hardware crypto devices"
source drivers/crypto/fsl/Kconfig
+config ATMEL_SHA
+ bool "Atmel SHA Driver support"
+ help
+ Enables the Atmel SHA accelerator.
+
endmenu
diff --git a/drivers/crypto/Makefile b/drivers/crypto/Makefile
index efbd1d3..07af449 100644
--- a/drivers/crypto/Makefile
+++ b/drivers/crypto/Makefile
@@ -4,5 +4,6 @@
# http://www.samsung.com
obj-$(CONFIG_EXYNOS_ACE_SHA) += ace_sha.o
+obj-$(CONFIG_ATMEL_SHA)+= atmel_sha.o
obj-y += rsa_mod_exp/
obj-y += fsl/
diff --git a/drivers/crypto/atmel_sha.c b/drivers/crypto/atmel_sha.c
new file mode 100644
index 000..ef969eb
--- /dev/null
+++ b/drivers/crypto/atmel_sha.c
@@ -0,0 +1,289 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Atmel SHA engine
+ * Copyright (c) 2018 Laird
+ */
+
+#include
+#include
+#include "atmel_sha.h"
+
+#ifdef CONFIG_SHA_HW_ACCEL
+#include
+#include
+#include
+
+#include
+#include
+#include
+
+enum atmel_hash_algos {
+ ATMEL_HASH_SHA1,
+ ATMEL_HASH_SHA256
+};
+
+struct sha_ctx {
+ enum atmel_hash_algos algo;
+ u32 length;
+ u8 buffer[64];
+};
+
+const u8 sha256_der_prefix[SHA256_DER_LEN] = {
+ 0x30, 0x31, 0x30, 0x0d, 0x06, 0x09, 0x60, 0x86,
+ 0x48, 0x01, 0x65, 0x03, 0x04, 0x02, 0x01, 0x05,
+ 0x00, 0x04, 0x20
+};
+
+const u8 sha1_der_prefix[SHA1_DER_LEN] = {
+ 0x30, 0x21, 0x30, 0x09, 0x06, 0x05, 0x2b, 0x0e,
+ 0x03, 0x02, 0x1a, 0x05, 0x00, 0x04, 0x14
+};
+
+static enum atmel_hash_algos get_hash_type(struct hash_algo *algo)
+{
+ if (!strcmp(algo->name, "sha1"))
+ return ATMEL_HASH_SHA1;
+ else
+ return ATMEL_HASH_SHA256;
+};
+
+static int atmel_sha_process(const u8 *in_addr, u8 buflen)
+{
+ struct atmel_sha *sha = (struct atmel_sha *)ATMEL_BASE_SHA;
+ int i;
+ u32 *addr_buf;
+
+ /* Copy data in */
+ addr_buf = (u32 *)in_addr;
+ for (i = 0; i < (buflen / 4); i++)
+ sha->idatarx[i] = addr_buf[i];
+ debug("Atmel sha, engine is loaded\n");
+
+ /* Wait for hash to complete */
+ while ((readl(&sha->isr) & ATMEL_HASH_ISR_MASK)
+ != ATMEL_HASH_ISR_DATRDY)
+ ;
+ debug("Atmel sha, engine signaled completion\n");
+
+ return 0;
+}
+
+static int atmel_sha_chunk(struct sha_ctx *ctx, const u8 *buf, unsigned int
size)
+{
+ u8 remaining, fill;
+
+ /* Chunk to 64 byte blocks */
+ remaining = ctx->length & 0x3F;
+ fill = 64 - remaining;
+
+ /* If we have things in the buffer transfer the remaining into it */
+ if (remaining && size >= fill) {
+ memcpy(ctx->buffer + remaining, buf, fill);
+
+ /* Process 64 byte chunk */
+ atmel_sha_process(ctx->buffer, 64);
+
+ size -= fill;
+ buf += fill;
+ ctx->length += fill;
+ remaining = 0;
+ }
+
+ /* We are aligned take from source for any additional */
+ while (size >= 64) {
+ /* Process 64 byte chunk */
+ atmel_sha_process(buf, 64);
+
+ size -= 64;
+ buf += 64;
+ ctx->length += 64;
+ }
+
+ if (size) {
+ memcpy(ctx->buffer + remaining, buf, size);
+ ctx->length += size;
+ }
+
+ return 0;
+}
+
+static int atmel_sha_fill_padding(struct sha_ctx *ctx)
+{
+ unsigned int index, padlen;
+ u64 size, bits;
+ u8 sha256_padding[64] = {
+ 0x80, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
+ };
+
+ size = ctx->length;
+
+ bits = cpu_to_be64(size << 3);
+
+ /* 64 byte, 512 bit block size */
+ index = ctx->length & 0x3F;
+ padlen = (index < 56) ? (56 - index) : ((64 + 56) - index);
+
+ /* set last entry to be 0x80 then 0's*/
+ atmel_sha_chunk(ctx, sha256_padding, padlen);
+ /* Bolt number of bits to the end */
+ atmel_sha_chunk(ctx, (u8 *)&bits, 8);
+
+ if (ctx->length & 0x3F)
+ debug("ERROR, Remainder after PADDING");
[U-Boot] Rewriting fw_{printenv,getenv} to not use fgets
The line length limit that fw_{printenv,setenv} impose (1024
characters) has tripped me up twice in as many days, so I figured I'd
rewrite it to use getline as we already have that in tools/.
But in looking how I structure that change, I've immediately run into
questions...
Right now I have a horrid hack that just pulls in ../getline.[ch], but
I'm thinking I should hoist the build of the environment tools, into
tools/Makefile from tools/env/Makefile, move getline.c into tools/lib
and then patch the trivial change in to swap from fgets to getline in
then.
I'm aware this also gets used as a library, so I'm guessing I need to
make linking of getline.c conditional somehow.
Does that make sense? Or should I be attempting it some other way.
--
Alex Kiernan
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Re: [U-Boot] [PATCH 2/2] usb: sunxi: sun50i: enable OHCI0 clock when OHCI1 is in use
On Wed, Jun 6, 2018 at 8:43 PM, Vasily Khoruzhick wrote:
> On Wed, Jun 6, 2018 at 6:56 AM, Jagan Teki wrote:
>> On Wed, Jun 6, 2018 at 9:08 AM, Vasily Khoruzhick wrote:
>>> On A64 OHCI1 clock source is OHCI0 clock, so we need to enable OHCI0
>>> clock when OHCI1 is in use.
>>>
>>> Fixes commit dd3228170ad7 ("usb: sunxi: Switch to use generic-phy")
>>>
>>> Signed-off-by: Vasily Khoruzhick
>>> ---
>>> drivers/usb/host/ohci-sunxi.c | 7 ++-
>>> 1 file changed, 6 insertions(+), 1 deletion(-)
>>>
>>> diff --git a/drivers/usb/host/ohci-sunxi.c b/drivers/usb/host/ohci-sunxi.c
>>> index ce2b47a5c4..5661557a3d 100644
>>> --- a/drivers/usb/host/ohci-sunxi.c
>>> +++ b/drivers/usb/host/ohci-sunxi.c
>>> @@ -36,6 +36,7 @@ static int ohci_usb_probe(struct udevice *dev)
>>> struct ohci_sunxi_priv *priv = dev_get_priv(dev);
>>> struct ohci_regs *regs = (struct ohci_regs *)devfdt_get_addr(dev);
>>> int extra_ahb_gate_mask = 0;
>>> + int extra_usb_gate_mask = 0;
>>> int phys, ret;
>>>
>>> priv->ccm = (struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
>>> @@ -78,13 +79,17 @@ no_phy:
>>> extra_ahb_gate_mask = 1 << AHB_GATE_OFFSET_USB_EHCI0;
>>> #endif
>>> priv->usb_gate_mask = CCM_USB_CTRL_OHCI0_CLK;
>>> +#ifdef CONFIG_MACH_SUN50I
>>> + extra_usb_gate_mask = CCM_USB_CTRL_OHCI0_CLK;
>>
>> This look reassigning same clock to twice?
>
> extra_usb_gate_mask isn't shifted later and thus
> CCM_USB_CTRL_OHCI0_CLK and CCM_USB_CTRL_OHCI1_CLK will be enabled for
> phy 1 on A64.
Where are you checking phy 1? and you still using
CCM_USB_CTRL_OHCI0_CLK not OHCI1_CLK
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Re: [U-Boot] [PATCH 2/2] usb: sunxi: sun50i: enable OHCI0 clock when OHCI1 is in use
On Wed, Jun 6, 2018 at 8:43 PM, Marek Vasut wrote:
> On 06/06/2018 05:12 PM, Vasily Khoruzhick wrote:
>> On Wed, Jun 6, 2018 at 2:02 AM, Marek Vasut wrote:
>>> On 06/06/2018 05:38 AM, Vasily Khoruzhick wrote:
On A64 OHCI1 clock source is OHCI0 clock, so we need to enable OHCI0
clock when OHCI1 is in use.
Fixes commit dd3228170ad7 ("usb: sunxi: Switch to use generic-phy")
Signed-off-by: Vasily Khoruzhick
---
drivers/usb/host/ohci-sunxi.c | 7 ++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/drivers/usb/host/ohci-sunxi.c b/drivers/usb/host/ohci-sunxi.c
index ce2b47a5c4..5661557a3d 100644
--- a/drivers/usb/host/ohci-sunxi.c
+++ b/drivers/usb/host/ohci-sunxi.c
@@ -36,6 +36,7 @@ static int ohci_usb_probe(struct udevice *dev)
struct ohci_sunxi_priv *priv = dev_get_priv(dev);
struct ohci_regs *regs = (struct ohci_regs *)devfdt_get_addr(dev);
int extra_ahb_gate_mask = 0;
+ int extra_usb_gate_mask = 0;
int phys, ret;
priv->ccm = (struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
@@ -78,13 +79,17 @@ no_phy:
extra_ahb_gate_mask = 1 << AHB_GATE_OFFSET_USB_EHCI0;
#endif
priv->usb_gate_mask = CCM_USB_CTRL_OHCI0_CLK;
+#ifdef CONFIG_MACH_SUN50I
+ extra_usb_gate_mask = CCM_USB_CTRL_OHCI0_CLK;
+#endif
priv->ahb_gate_mask <<= phys * AHB_CLK_DIST;
extra_ahb_gate_mask <<= phys * AHB_CLK_DIST;
priv->usb_gate_mask <<= phys;
setbits_le32(&priv->ccm->ahb_gate0,
priv->ahb_gate_mask | extra_ahb_gate_mask);
- setbits_le32(&priv->ccm->usb_clk_cfg, priv->usb_gate_mask);
+ setbits_le32(&priv->ccm->usb_clk_cfg,
+ priv->usb_gate_mask | extra_usb_gate_mask);
>>>
>>> Why is the SoC / compatible information not coming from DT instead ? Why
>>> is the driver polluted by more ifdefs ?
>>
>> Because this platform doesn't have DM clock driver yet. This code will
>> be removed once this driver is implemented.
>
> You don't need DM clock driver, you can check the compatible string I
> think ?
Yes or driver_data, if we wanted to get rid of other #Ifdef on the file
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Re: [U-Boot] [PATCH 2/2] usb: sunxi: sun50i: enable OHCI0 clock when OHCI1 is in use
On Wed, Jun 6, 2018 at 9:35 AM, Jagan Teki wrote: > On Wed, Jun 6, 2018 at 8:43 PM, Vasily Khoruzhick wrote: >> extra_usb_gate_mask isn't shifted later and thus >> CCM_USB_CTRL_OHCI0_CLK and CCM_USB_CTRL_OHCI1_CLK will be enabled for >> phy 1 on A64. > > Where are you checking phy 1? and you still using > CCM_USB_CTRL_OHCI0_CLK not OHCI1_CLK phys is PHY index, usb_gate_mask is shifted to PHY index later - thus it'll be CCM_USB_CTRL_OHCI1_CLK, extra_usb_gate_mask is not - it'll remain CCM_USB_CTRL_OHCI0_CLK. Since A64 has only 2 USB controllers that covers it. ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH] sunxi: use CONFIG_DEFAULT_FDT_FILE everywhere
On 06/06/2018 07:58 AM, Maxime Ripard wrote: On Mon, Jun 04, 2018 at 11:15:34AM -0700, Martin Kelly wrote: [snip as the thread is getting long] On 06/04/2018 01:21 AM, Maxime Ripard wrote: On Fri, Jun 01, 2018 at 10:16:32AM -0700, Martin Kelly wrote: On 06/01/2018 04:05 AM, Maxime Ripard wrote: I can see the issues with new defconfigs, but I'm not sure if it will really be that bad. If we apply this patch against sunxi master, then shouldn't new patches get tested and rebased against it? In that case, if they have not set DEFAULT_FDT_FILE, it will default to "", the boards won't boot, and the mistake must be fixed prior to merging. Unless one has tested it with a version prior to your patch, and sends it. Not a lot of people are testing with the next branch in the various trees. Alternatively if we add the Kconfig boolean, we need to worry about what happens when people have DEFAULT_FDT_FILE set already. I guess we would need to default the new Kconfig boolean to be custom in order to keep those configs from breaking. But if we do that, sunxi will break by default (since sunxi configs don't have the value set). What would you suggest the default value of the new boolean to be? config DEFAULT_FDT_FILE_USE_DEFAULT_DEVICE_TREE bool "whatever" default y if ARCH_ROCKCHIP default y if ARCH_SUNXI and in the headers #ifdef CONFIG_DEFAULT_FDT_FILE_USE_DEFAULT_DEVICE_TREE #define CONFIG_DEFAULT_FDT_FILE CONFIG_DEFAULT_DEVICE_TREE ".dtb" #endif And that's done. I didn't know Kconfig can set different default values for each architecture like that; that does indeed solve the problem. However, I don't think it's a good idea to have sunxi use an alternate mechanism than the other boards. To be clear, are you proposing a general config option that would apply to every board? In that case, the header logic would be in a global header rather than a board-specific one. Yes, that's what I had in mind. Maxime OK, I can see the merits of that, though I think there's tradeoffs both ways. Before I go ahead with a patch, Jagan: which approach would you prefer? ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH 1/1] rockchip: tinker-rk3288_defconfig: use natural order
On 06/02/2018 10:41 AM, Heinrich Schuchardt wrote:
> The lines of tinker-rk3288_defconfig should be ordered in the same
> sequence as the generated .config.
>
> Signed-off-by: Heinrich Schuchardt
> ---
> configs/tinker-rk3288_defconfig | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/configs/tinker-rk3288_defconfig b/configs/tinker-rk3288_defconfig
> index e1c99c3828..679d6e29ea 100644
> --- a/configs/tinker-rk3288_defconfig
> +++ b/configs/tinker-rk3288_defconfig
> @@ -5,6 +5,8 @@ CONFIG_SYS_MALLOC_F_LEN=0x2000
> CONFIG_ROCKCHIP_RK3288=y
> CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y
> CONFIG_TARGET_TINKER_RK3288=y
> +CONFIG_DEBUG_UART_BASE=0xff69
> +CONFIG_DEBUG_UART_CLOCK=2400
> CONFIG_SPL_STACK_R_ADDR=0x8
> CONFIG_DEFAULT_DEVICE_TREE="rk3288-tinker"
> CONFIG_DEBUG_UART=y
> @@ -64,8 +66,6 @@ CONFIG_REGULATOR_RK8XX=y
> CONFIG_PWM_ROCKCHIP=y
> CONFIG_RAM=y
> CONFIG_SPL_RAM=y
> -CONFIG_DEBUG_UART_BASE=0xff69
> -CONFIG_DEBUG_UART_CLOCK=2400
> CONFIG_DEBUG_UART_SHIFT=2
> CONFIG_SYSRESET=y
> CONFIG_USB=y
>
The patch is obsolete. The change is contained in
358b6a20e442 ("configs: Resync with savedefconfig")
Best regards
Heinrich
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[U-Boot] [PATCH v2] x86: Add 64-bit setjmp/longjmp implementation
Add setjmp/longjmp functions for x86_64. The FPU control word and MXCSR control bits are preserved across calls. v2: Added the FPU control word and MXCSR to jmp_buf; Using ENTRY/ENDPROC macros. Ivan Gorinov (1): x86: Add 64-bit setjmp/longjmp implementation arch/x86/cpu/x86_64/setjmp.S | 66 +++ arch/x86/cpu/x86_64/setjmp.c | 19 - arch/x86/include/asm/setjmp.h | 19 + 3 files changed, 85 insertions(+), 19 deletions(-) create mode 100644 arch/x86/cpu/x86_64/setjmp.S delete mode 100644 arch/x86/cpu/x86_64/setjmp.c -- 2.7.4 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH v2] x86: Add 64-bit setjmp/longjmp implementation
Add setjmp/longjmp functions for x86_64.
The FPU control word and MXCSR control bits are preserved across calls.
Signed-off-by: Ivan Gorinov
---
arch/x86/cpu/x86_64/setjmp.S | 66 +++
arch/x86/cpu/x86_64/setjmp.c | 19 -
arch/x86/include/asm/setjmp.h | 19 +
3 files changed, 85 insertions(+), 19 deletions(-)
create mode 100644 arch/x86/cpu/x86_64/setjmp.S
delete mode 100644 arch/x86/cpu/x86_64/setjmp.c
diff --git a/arch/x86/cpu/x86_64/setjmp.S b/arch/x86/cpu/x86_64/setjmp.S
new file mode 100644
index 000..ef61a4a
--- /dev/null
+++ b/arch/x86/cpu/x86_64/setjmp.S
@@ -0,0 +1,66 @@
+/*
+ * Copyright (C) 2018 Intel Corporation
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ *
+ * See arch/x86/include/asm/setjmp.h for jmp_buf format
+ */
+
+#include
+
+.text
+.align 8
+
+ENTRY(setjmp)
+
+ pop %rcx
+ movq%rcx, (%rdi)/* Return address */
+ movq%rsp, 8 (%rdi)
+ movq%rbp, 16 (%rdi)
+ movq%rbx, 24 (%rdi)
+ movq%r12, 32 (%rdi)
+ movq%r13, 40 (%rdi)
+ movq%r14, 48 (%rdi)
+ movq%r15, 56 (%rdi)
+ fnstcw 64 (%rdi)
+ stmxcsr 68 (%rdi)
+ xorq%rax, %rax /* Direct invocation returns 0 */
+ jmpq*%rcx
+
+ENDPROC(setjmp)
+
+.align 8
+
+ENTRY(longjmp)
+
+ subq$8, %rsp
+
+/* Restore the control bits of MXCSR */
+
+ stmxcsr (%rsp)
+ movl$0x3f, %eax
+ andl%eax, (%rsp)
+ notl%eax
+ andl68 (%rdi), %eax
+ orl %eax, (%rsp)
+ ldmxcsr (%rsp)
+
+ fldcw 64 (%rdi)
+
+ movq(%rdi), %rcx/* Return address */
+ movq8 (%rdi), %rsp
+ movq16 (%rdi), %rbp
+ movq24 (%rdi), %rbx
+ movq32 (%rdi), %r12
+ movq40 (%rdi), %r13
+ movq48 (%rdi), %r14
+ movq56 (%rdi), %r15
+
+ movq%rsi, %rax /* Value to be returned by setjmp() */
+ testq %rax, %rax /* cannot be 0 in this case */
+ jnz 1f
+ incq%rax/* Return 1 instead */
+1:
+ jmpq*%rcx
+
+ENDPROC(longjmp)
diff --git a/arch/x86/cpu/x86_64/setjmp.c b/arch/x86/cpu/x86_64/setjmp.c
deleted file mode 100644
index 5d4a74a..000
--- a/arch/x86/cpu/x86_64/setjmp.c
+++ /dev/null
@@ -1,19 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Copyright (c) 2016 Google, Inc
- */
-
-#include
-#include
-
-int setjmp(struct jmp_buf_data *jmp_buf)
-{
- printf("WARNING: setjmp() is not supported\n");
-
- return 0;
-}
-
-void longjmp(struct jmp_buf_data *jmp_buf, int val)
-{
- printf("WARNING: longjmp() is not supported\n");
-}
diff --git a/arch/x86/include/asm/setjmp.h b/arch/x86/include/asm/setjmp.h
index f25975f..eae33fb 100644
--- a/arch/x86/include/asm/setjmp.h
+++ b/arch/x86/include/asm/setjmp.h
@@ -8,6 +8,23 @@
#ifndef __setjmp_h
#define __setjmp_h
+#ifdef CONFIG_X86_64
+
+struct jmp_buf_data {
+ unsigned long __rip;
+ unsigned long __rsp;
+ unsigned long __rbp;
+ unsigned long __rbx;
+ unsigned long __r12;
+ unsigned long __r13;
+ unsigned long __r14;
+ unsigned long __r15;
+ unsigned int __fcw;
+ unsigned int __mxcsr;
+};
+
+#else
+
struct jmp_buf_data {
unsigned int __ebx;
unsigned int __esp;
@@ -17,6 +34,8 @@ struct jmp_buf_data {
unsigned int __eip;
};
+#endif
+
int setjmp(struct jmp_buf_data *jmp_buf);
void longjmp(struct jmp_buf_data *jmp_buf, int val);
--
2.7.4
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[U-Boot] [PATCH v3 0/1] board: arm: Add support for Broadcom BCM7445
Add support for Broadcom BCM7445 Changes for v3: - Rebase to master - Add "ARM BROADCOM BCMSTB" entry to top-level MAINTAINERS - Fix SPDX formatting - In Kconfig use CPU_V7A, not CPU_V7, per acf15001... Thomas Fitzsimmons (1): board: arm: Add support for Broadcom BCM7445 MAINTAINERS | 10 + arch/arm/Kconfig| 12 + arch/arm/Makefile | 1 + arch/arm/mach-bcmstb/Kconfig| 64 arch/arm/mach-bcmstb/Makefile | 8 + arch/arm/mach-bcmstb/include/mach/gpio.h| 11 + arch/arm/mach-bcmstb/include/mach/hardware.h| 11 + arch/arm/mach-bcmstb/include/mach/prior_stage.h | 30 ++ arch/arm/mach-bcmstb/include/mach/sdhci.h | 15 + arch/arm/mach-bcmstb/include/mach/timer.h | 13 + arch/arm/mach-bcmstb/lowlevel_init.S| 21 ++ board/broadcom/bcmstb/MAINTAINERS | 6 + board/broadcom/bcmstb/Makefile | 8 + board/broadcom/bcmstb/bcmstb.c | 191 +++ configs/bcm7445_defconfig | 27 ++ doc/README.bcm7xxx | 147 drivers/mmc/Kconfig | 11 + drivers/mmc/Makefile| 1 + drivers/mmc/bcmstb_sdhci.c | 67 drivers/spi/Kconfig | 7 + drivers/spi/Makefile| 1 + drivers/spi/bcmstb_spi.c| 439 drivers/spi/spi-uclass.c| 2 +- dts/Kconfig | 7 + include/configs/bcmstb.h| 188 ++ include/fdtdec.h| 4 + lib/fdtdec.c| 4 + 27 files changed, 1305 insertions(+), 1 deletion(-) create mode 100644 arch/arm/mach-bcmstb/Kconfig create mode 100644 arch/arm/mach-bcmstb/Makefile create mode 100644 arch/arm/mach-bcmstb/include/mach/gpio.h create mode 100644 arch/arm/mach-bcmstb/include/mach/hardware.h create mode 100644 arch/arm/mach-bcmstb/include/mach/prior_stage.h create mode 100644 arch/arm/mach-bcmstb/include/mach/sdhci.h create mode 100644 arch/arm/mach-bcmstb/include/mach/timer.h create mode 100644 arch/arm/mach-bcmstb/lowlevel_init.S create mode 100644 board/broadcom/bcmstb/MAINTAINERS create mode 100644 board/broadcom/bcmstb/Makefile create mode 100644 board/broadcom/bcmstb/bcmstb.c create mode 100644 configs/bcm7445_defconfig create mode 100644 doc/README.bcm7xxx create mode 100644 drivers/mmc/bcmstb_sdhci.c create mode 100644 drivers/spi/bcmstb_spi.c create mode 100644 include/configs/bcmstb.h -- 1.8.3.1 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH v3 1/1] board: arm: Add support for Broadcom BCM7445
Add support for loading U-Boot on the Broadcom 7445 SoC. This port assumes Broadcom's BOLT bootloader is acting as the second stage bootloader, and U-Boot is acting as the third stage bootloader, loaded as an ELF program by BOLT. Signed-off-by: Thomas Fitzsimmons Cc: Stefan Roese Cc: Tom Rini Cc: Florian Fainelli --- Changes for v3: - Rebase to master - Add "ARM BROADCOM BCMSTB" entry to top-level MAINTAINERS - Fix SPDX formatting - In Kconfig use CPU_V7A, not CPU_V7, per acf15001... MAINTAINERS | 10 + arch/arm/Kconfig| 12 + arch/arm/Makefile | 1 + arch/arm/mach-bcmstb/Kconfig| 64 arch/arm/mach-bcmstb/Makefile | 8 + arch/arm/mach-bcmstb/include/mach/gpio.h| 11 + arch/arm/mach-bcmstb/include/mach/hardware.h| 11 + arch/arm/mach-bcmstb/include/mach/prior_stage.h | 30 ++ arch/arm/mach-bcmstb/include/mach/sdhci.h | 15 + arch/arm/mach-bcmstb/include/mach/timer.h | 13 + arch/arm/mach-bcmstb/lowlevel_init.S| 21 ++ board/broadcom/bcmstb/MAINTAINERS | 6 + board/broadcom/bcmstb/Makefile | 8 + board/broadcom/bcmstb/bcmstb.c | 191 +++ configs/bcm7445_defconfig | 27 ++ doc/README.bcm7xxx | 147 drivers/mmc/Kconfig | 11 + drivers/mmc/Makefile| 1 + drivers/mmc/bcmstb_sdhci.c | 67 drivers/spi/Kconfig | 7 + drivers/spi/Makefile| 1 + drivers/spi/bcmstb_spi.c| 439 drivers/spi/spi-uclass.c| 2 +- dts/Kconfig | 7 + include/configs/bcmstb.h| 188 ++ include/fdtdec.h| 4 + lib/fdtdec.c| 4 + 27 files changed, 1305 insertions(+), 1 deletion(-) create mode 100644 arch/arm/mach-bcmstb/Kconfig create mode 100644 arch/arm/mach-bcmstb/Makefile create mode 100644 arch/arm/mach-bcmstb/include/mach/gpio.h create mode 100644 arch/arm/mach-bcmstb/include/mach/hardware.h create mode 100644 arch/arm/mach-bcmstb/include/mach/prior_stage.h create mode 100644 arch/arm/mach-bcmstb/include/mach/sdhci.h create mode 100644 arch/arm/mach-bcmstb/include/mach/timer.h create mode 100644 arch/arm/mach-bcmstb/lowlevel_init.S create mode 100644 board/broadcom/bcmstb/MAINTAINERS create mode 100644 board/broadcom/bcmstb/Makefile create mode 100644 board/broadcom/bcmstb/bcmstb.c create mode 100644 configs/bcm7445_defconfig create mode 100644 doc/README.bcm7xxx create mode 100644 drivers/mmc/bcmstb_sdhci.c create mode 100644 drivers/spi/bcmstb_spi.c create mode 100644 include/configs/bcmstb.h diff --git a/MAINTAINERS b/MAINTAINERS index 642c448..58634fc 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -107,6 +107,16 @@ F: drivers/video/bcm2835.c F: include/dm/platform_data/serial_bcm283x_mu.h F: drivers/pinctrl/broadcom/ +ARM BROADCOM BCMSTB +M: Thomas Fitzsimmons +S: Maintained +F: arch/arm/mach-bcmstb/ +F: board/broadcom/bcmstb/ +F: configs/bcm7445_defconfig +F: doc/README.bcm7xxx +F: drivers/mmc/bcmstb_sdhci.c +F: drivers/spi/bcmstb_spi.c + ARM FREESCALE IMX M: Stefano Babic M: Fabio Estevam diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index dde422b..fa2001b 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -533,6 +533,16 @@ config TARGET_VEXPRESS_CA15_TC2 select CPU_V7_HAS_VIRT select PL011_SERIAL +config ARCH_BCMSTB + bool "Broadcom BCM7XXX family" + select CPU_V7A + select DM + select OF_CONTROL + select OF_PRIOR_STAGE + help + This enables support for Broadcom ARM-based set-top box + chipsets, including the 7445 family of chips. + config TARGET_VEXPRESS_CA5X2 bool "Support vexpress_ca5x2" select CPU_V7A @@ -1297,6 +1307,8 @@ source "arch/arm/mach-at91/Kconfig" source "arch/arm/mach-bcm283x/Kconfig" +source "arch/arm/mach-bcmstb/Kconfig" + source "arch/arm/mach-davinci/Kconfig" source "arch/arm/mach-exynos/Kconfig" diff --git a/arch/arm/Makefile b/arch/arm/Makefile index 680c6e8..03252fe 100644 --- a/arch/arm/Makefile +++ b/arch/arm/Makefile @@ -54,6 +54,7 @@ PLATFORM_CPPFLAGS += $(arch-y) $(tune-y) machine-$(CONFIG_ARCH_ASPEED) += aspeed machine-$(CONFIG_ARCH_AT91)+= at91 machine-$(CONFIG_ARCH_BCM283X) += bcm283x +machine-$(CONFIG_ARCH_BCMSTB) += bcmstb machine-$(CONFIG_ARCH_DAVINCI) += davinci machine-$(CONFIG_ARCH_EXYNOS) += exynos machine-$(CONFIG_ARCH_HIGHBANK)+= highbank diff --git a/arch/arm/mac
Re: [U-Boot] [PATCH] sf: Enable FSR polling on N25Q256(A)
On 05/24/2018 09:58 PM, Marek Vasut wrote:
> The N25Q256(A) datasheet clearly states that this device does have
> a Flag Status Register and does update FSR PEC bit 7 during Program
> and Erase cycles to indicate the cycle is in progress. Enable the
> FSR PEC bit polling on this device to prevent data corruption.
>
> Signed-off-by: Marek Vasut
> Cc: Jagan Teki
> Cc: Tom Rini
> ---
> drivers/mtd/spi/spi_flash_ids.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/mtd/spi/spi_flash_ids.c b/drivers/mtd/spi/spi_flash_ids.c
> index 3b8f254ca2..fbc1bb6a5e 100644
> --- a/drivers/mtd/spi/spi_flash_ids.c
> +++ b/drivers/mtd/spi/spi_flash_ids.c
> @@ -130,8 +130,8 @@ const struct spi_flash_info spi_flash_ids[] = {
> {"n25q64a",INFO(0x20bb17, 0x0, 64 * 1024, 128, RD_FULL |
> WR_QPP | SECT_4K) },
> {"n25q128",INFO(0x20ba18, 0x0, 64 * 1024, 256, RD_FULL |
> WR_QPP) },
> {"n25q128a", INFO(0x20bb18, 0x0, 64 * 1024, 256, RD_FULL |
> WR_QPP) },
> - {"n25q256",INFO(0x20ba19, 0x0, 64 * 1024, 512, RD_FULL |
> WR_QPP | SECT_4K) },
> - {"n25q256a", INFO(0x20bb19, 0x0, 64 * 1024, 512, RD_FULL |
> WR_QPP | SECT_4K) },
> + {"n25q256",INFO(0x20ba19, 0x0, 64 * 1024, 512, RD_FULL |
> WR_QPP | E_FSR | SECT_4K) },
> + {"n25q256a", INFO(0x20bb19, 0x0, 64 * 1024, 512, RD_FULL |
> WR_QPP | E_FSR | SECT_4K) },
> {"n25q512",INFO(0x20ba20, 0x0, 64 * 1024, 1024, RD_FULL |
> WR_QPP | E_FSR | SECT_4K) },
> {"n25q512a", INFO(0x20bb20, 0x0, 64 * 1024, 1024, RD_FULL |
> WR_QPP | E_FSR | SECT_4K) },
> {"n25q1024", INFO(0x20ba21, 0x0, 64 * 1024, 2048, RD_FULL |
> WR_QPP | E_FSR | SECT_4K) },
>
So, where is this stuff, I don't see it in u-boot/master ?
--
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Marek Vasut
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Re: [U-Boot] [PATCH] ARM: socfpga: Assure correct ACTLR configuration
On 05/31/2018 12:00 PM, Marek Vasut wrote: > On 05/31/2018 11:52 AM, See, Chin Liang wrote: >> On Tue, 2018-05-29 at 18:39 +0200, Marek Vasut wrote: >>> Make sure the ARM ACTLR register has correct configuration, otherwise >>> the Linux kernel refuses to boot. In particular, the "Write Full Line >>> of Zeroes" bit must be cleared. >>> >>> Signed-off-by: Marek Vasut >>> Cc: Chin Liang See >>> Cc: Dinh Nguyen >>> --- >>> NOTE: This gem was well hidden in the Altera U-Boot fork and is >>> really needed. >>> What is not entirely clear to me is WHY ? So why is this needed >>> ? >> >> I vaguely recall it's related to HW constrain. And check back the >> downstream U-Boot, actually we need to set the bit instead clearing >> it. https://github.com/altera-opensource/u-boot-socfpga/blob/socfpga_v2 >> 014.10_arria10_bringup/arch/arm/cpu/armv7/socfpga_arria10/pl310.c > > You are clearing it here: > https://github.com/altera-opensource/u-boot-socfpga/blob/socfpga_v2014.10_arria10_bringup/arch/arm/cpu/armv7/socfpga_arria10/lowlevel_init.S#L35 > > The PL310 configuration is a different register. What HW constraint ? > I'd really like to understand this problem. Bump ? I had a report the register even has to be set to 0 , otherwise there are ethernet problems. What is going on with this register ? -- Best regards, Marek Vasut ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH] sf: Enable FSR polling on N25Q256(A)
On Thu, Jun 7, 2018 at 12:15 AM, Marek Vasut wrote:
> On 05/24/2018 09:58 PM, Marek Vasut wrote:
>> The N25Q256(A) datasheet clearly states that this device does have
>> a Flag Status Register and does update FSR PEC bit 7 during Program
>> and Erase cycles to indicate the cycle is in progress. Enable the
>> FSR PEC bit polling on this device to prevent data corruption.
>>
>> Signed-off-by: Marek Vasut
>> Cc: Jagan Teki
>> Cc: Tom Rini
>> ---
>> drivers/mtd/spi/spi_flash_ids.c | 4 ++--
>> 1 file changed, 2 insertions(+), 2 deletions(-)
>>
>> diff --git a/drivers/mtd/spi/spi_flash_ids.c
>> b/drivers/mtd/spi/spi_flash_ids.c
>> index 3b8f254ca2..fbc1bb6a5e 100644
>> --- a/drivers/mtd/spi/spi_flash_ids.c
>> +++ b/drivers/mtd/spi/spi_flash_ids.c
>> @@ -130,8 +130,8 @@ const struct spi_flash_info spi_flash_ids[] = {
>> {"n25q64a",INFO(0x20bb17, 0x0, 64 * 1024, 128, RD_FULL |
>> WR_QPP | SECT_4K) },
>> {"n25q128",INFO(0x20ba18, 0x0, 64 * 1024, 256, RD_FULL |
>> WR_QPP) },
>> {"n25q128a", INFO(0x20bb18, 0x0, 64 * 1024, 256, RD_FULL |
>> WR_QPP) },
>> - {"n25q256",INFO(0x20ba19, 0x0, 64 * 1024, 512, RD_FULL |
>> WR_QPP | SECT_4K) },
>> - {"n25q256a", INFO(0x20bb19, 0x0, 64 * 1024, 512, RD_FULL |
>> WR_QPP | SECT_4K) },
>> + {"n25q256",INFO(0x20ba19, 0x0, 64 * 1024, 512, RD_FULL |
>> WR_QPP | E_FSR | SECT_4K) },
>> + {"n25q256a", INFO(0x20bb19, 0x0, 64 * 1024, 512, RD_FULL |
>> WR_QPP | E_FSR | SECT_4K) },
>> {"n25q512",INFO(0x20ba20, 0x0, 64 * 1024, 1024, RD_FULL |
>> WR_QPP | E_FSR | SECT_4K) },
>> {"n25q512a", INFO(0x20bb20, 0x0, 64 * 1024, 1024, RD_FULL |
>> WR_QPP | E_FSR | SECT_4K) },
>> {"n25q1024", INFO(0x20ba21, 0x0, 64 * 1024, 2048, RD_FULL |
>> WR_QPP | E_FSR | SECT_4K) },
>>
>
> So, where is this stuff, I don't see it in u-boot/master ?
Why it should be in u-boot/master? it's neither in u-boot-spi/master
nor with PR. still under discussion.
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Re: [U-Boot] [U-Boot, v2, 1/1] board: arm: Add support for Broadcom BCM7445
Tom Rini writes: > On Wed, May 23, 2018 at 09:24:03PM -0400, Thomas Fitzsimmons wrote: > >> Add support for loading U-Boot on the Broadcom 7445 SoC. This port >> assumes Broadcom's BOLT bootloader is acting as the second stage >> bootloader, and U-Boot is acting as the third stage bootloader, loaded >> as an ELF program by BOLT. >> >> Signed-off-by: Thomas Fitzsimmons >> Cc: Stefan Roese >> Cc: Tom Rini >> Cc: Florian Fainelli > > Please rebase this to master. While I can fixup the SPDX tags (and some > formatting issues from checkpatch.pl) I think I fixed all of these in v3 (just posted), by adding an entry to top-level MAINTAINERS and using the new SPDX formatting rules. > I also run in to: +(bcm7445) In file included from > ../arch/arm/include/asm/system.h:6:0, +(bcm7445) from > ../arch/arm/include/asm/cache.h:11, +(bcm7445) from > ../include/net.h:15, +(bcm7445) from ../include/common.h:519, > +(bcm7445) from ../lib/asm-offsets.c:14: +(bcm7445) > ../arch/arm/include/asm/barriers.h:32:24: error: operator '>=' has no > left operand +(bcm7445) #if __LINUX_ARM_ARCH__ >= 7 +(bcm7445) ^~ > +(bcm7445) ../arch/arm/include/asm/barriers.h:36:26: error: operator > '==' has no left operand +(bcm7445) #elif __LINUX_ARM_ARCH__ == 6 > +(bcm7445) ^~ +(bcm7445) make[2]: *** [.././Kbuild:44: > lib/asm-offsets.s] Error 1 +(bcm7445) make[1]: *** [Makefile:1433: > prepare0] Error 2 > > Please look into, thanks! This was caused by a Kconfig option being renamed on master (CPU_V7 to CPU_V7A). Fixed in v3. Thanks, Thomas ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH] AM3517_EVM: Fix Environmental location
The am3517-evm boards stores the environment in NAND, but after merging various configs, the board was trying to load environment variables from FAT which would ultimately fail and cause some chatter. This patch removes the ENV_IS_IN_FAT flag to eliminate the noise. Signed-off-by: Adam Ford diff --git a/configs/am3517_evm_defconfig b/configs/am3517_evm_defconfig index 8a94fd3ce0..6643f93e33 100644 --- a/configs/am3517_evm_defconfig +++ b/configs/am3517_evm_defconfig @@ -30,6 +30,7 @@ CONFIG_MTDIDS_DEFAULT="nand0=omap2-nand.0" CONFIG_MTDPARTS_DEFAULT="mtdparts=omap2-nand.0:512k(MLO),1920k(u-boot),256k(u-boot-env),8m(kernel),512k(dtb),-(rootfs)" CONFIG_CMD_UBI=y CONFIG_OF_CONTROL=y +# CONFIG_ENV_IS_IN_FAT is not set CONFIG_ENV_IS_IN_NAND=y CONFIG_MMC_OMAP_HS=y CONFIG_NAND=y -- 2.17.1 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [RFC PATCH 17/20] cmd: mtd: add 'mtd' command
Hi Miquel,
On Wed, 6 Jun 2018 17:30:37 +0200
Miquel Raynal wrote:
> There should not be a 'nand' command, a 'sf' command and certainly not
> another 'spi-nand'. Write a 'mtd' command instead to manage all MTD
> devices at once. This should be the preferred way to access any MTD
> device.
Just a few comments below, but overall, I'm really happy with this new
set of commands and the fact that we'll soon be able to replace custom
MTD accessors (nand, onenand, sf, cp.b+erase, ...) by these ones.
>
> Signed-off-by: Miquel Raynal
> ---
> cmd/Kconfig | 5 +
> cmd/Makefile | 1 +
> cmd/mtd.c| 280
> +++
> drivers/mtd/Makefile | 2 +-
> 4 files changed, 287 insertions(+), 1 deletion(-)
> create mode 100644 cmd/mtd.c
>
> diff --git a/cmd/Kconfig b/cmd/Kconfig
> index 136836d146..6e9b629e1c 100644
> --- a/cmd/Kconfig
> +++ b/cmd/Kconfig
> @@ -797,6 +797,11 @@ config CMD_MMC
> help
> MMC memory mapped support.
>
> +config CMD_MTD
> + bool "mtd"
> + help
> + MTD commands support.
> +
> config CMD_NAND
> bool "nand"
> default y if NAND_SUNXI
> diff --git a/cmd/Makefile b/cmd/Makefile
> index 9a358e4801..e42db12e1d 100644
> --- a/cmd/Makefile
> +++ b/cmd/Makefile
> @@ -88,6 +88,7 @@ obj-$(CONFIG_CMD_MISC) += misc.o
> obj-$(CONFIG_CMD_MMC) += mmc.o
> obj-$(CONFIG_CMD_MMC_SPI) += mmc_spi.o
> obj-$(CONFIG_MP) += mp.o
> +obj-$(CONFIG_CMD_MTD) += mtd.o
> obj-$(CONFIG_CMD_MTDPARTS) += mtdparts.o
> obj-$(CONFIG_CMD_NAND) += nand.o
> obj-$(CONFIG_CMD_NET) += net.o
> diff --git a/cmd/mtd.c b/cmd/mtd.c
> new file mode 100644
> index 00..fe48378bd0
> --- /dev/null
> +++ b/cmd/mtd.c
> @@ -0,0 +1,280 @@
> +// SPDX-License-Identifier: GPL-2.0+
> +/*
> + * mtd.c
> + *
> + * Generic command to handle basic operations on any memory device.
> + *
> + * Copyright: Bootlin, 2018
> + * Author: Miquèl Raynal
> + */
> +
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +
> +static void mtd_dump_buf(u8 *buf, uint len)
> +{
> + int i, j;
> +
> + for (i = 0; i < len; ) {
> + printf("0x%08x:\t", i);
> + for (j = 0; j < 8; j++)
> + printf("%02x ", buf[i + j]);
> + printf(" ");
> + i += 8;
> + for (j = 0; j < 8; j++)
> + printf("%02x ", buf[i + j]);
> + printf("\n");
> + i += 8;
> + }
> +}
> +
> +static void mtd_show_device(struct mtd_info *mtd)
> +{
> + printf("* %s", mtd->name);
> + if (mtd->dev)
> + printf(" [device: %s] [parent: %s] [driver: %s]",
> +mtd->dev->name, mtd->dev->parent->name,
> +mtd->dev->driver->name);
> +
> + printf("\n");
> +}
> +
> +static int do_mtd_list(void)
> +{
> + struct mtd_info *mtd;
> + struct udevice *dev;
> + int dm_idx = 0, idx = 0;
> +
> + /* Ensure all devices compliants with U-Boot driver model are probed */
> + while (!uclass_find_device(UCLASS_MTD, dm_idx, &dev) && dev) {
> + mtd_probe(dev);
> + dm_idx++;
> + }
> +
> + printf("MTD devices list (%d DM compliant):\n", dm_idx);
Do we really want to say how many of them are exported by DM compliant
drivers? I mean, the user doesn't care about that. If you want to force
people to convert their drivers, we should probably complain at MTD
device registration time when the mtd_info struct is not backed by an
udevice.
> +
> + mtd_for_each_device(mtd) {
> + mtd_show_device(mtd);
> + idx++;
> + }
> +
> + if (!idx)
> + printf("No MTD device found\n");
> +
> + return 0;
> +}
> +
> +static int do_mtd_read_write(struct mtd_info *mtd, bool read, uint *waddr,
> + bool raw, bool woob, u64 from, u64 len)
s/do_mtd_read_write/do_mtd_io/ ? And why not passing an mtd_oob_ops
object directly? That would reduce the number of parameters you pass to
this function.
> +{
> + u32 buf_len = woob ? mtd->writesize + mtd->oobsize :
> + ROUND(len, mtd->writesize);
> + u8 *buf = malloc(buf_len);
It's probably worth a comment explaining why you allocate a bounce
buffer here (i.e. to make sure len not aligned on a page size are padded
with 0xff).
Maybe a simpler solution would be to simply refuse such unaligned
accesses.
> + struct mtd_oob_ops ops = {
> + .mode = raw ? MTD_OPS_RAW : 0,
> + .len = len,
> + .ooblen = woob ? mtd->oobsize : 0,
> + .datbuf = buf,
> + .oobbuf = woob ? &buf[mtd->writesize] : NULL,
> + };
> + int ret;
> +
> + if (!buf)
> + return -ENOMEM;
> +
> + memset(buf, 0xFF, buf_len);
> +
> + if (read) {
> + ret = mtd_read_oob(mtd, from, &ops);
> + } else {
> + memcpy(buf, waddr, o
Re: [U-Boot] [PATCH 1/1] board: arm: Add support for Broadcom BCM7445D0
Florian Fainelli writes: > On 05/10/2018 06:04 AM, Thomas Fitzsimmons wrote: >> Florian Fainelli writes: >> >>> On 05/06/2018 04:09 AM, Thomas Fitzsimmons wrote: [...] + +config BCMSTB_ACCOMMODATE_STBLINUX + bool "" + default y + help +This prevents U-Boot from adding memory reservations for the + lengths of initramfs and DTB. Without skipping these, + stblinux's "contiguous memory allocator" (CMA) Linux driver + (cma_driver) will allocate memory ranges smaller than what + are actually available, because it only checks reservation + sizes. It doesn't check if the reserved range overlaps the + range it allocates. stblinux also tries to move the DTB to + a lower memory location early in the Linux boot. If the FIT + image specifies a load address for the initramfs then + sometimes the DTB is moved into the range where the + initramfs image is loaded. Defining this will mean that + FIT-provided initramfs load addresses are ignored. >>> >>> What STB Linux kernel did you observe this with? I am afraid this is >>> still true about the ranges vs. allocation even in newer kernels, but >>> that is kind of intented to keep the logic KISS (because it's already >>> too complicated IMHO). >> >> I investigated the allocation discrepancy and wrote the workaround while >> we were still using stblinux-3.14. Since then we've updated to >> stblinux-4.1 and I've left the workaround enabled, but I haven't >> investigated its interactions with the newer bmem mechanism. I should >> probably revisit this though, with stblinux-4.1 and stblinux-4.9, just >> to make sure this macro is still useful. > > Sounds good, let me know if there is something that does not seem quite > right, we could fix it. [...] In the v3 patch, I keep the FIT's RFS and DTB in-place. This approach eliminates the bmem/cma allocation discrepancies. I compared bmem/cma dmesg output for stblinux 3.14, 4.1 and 4.9, zImage and ITB builds, on my eval board, and they're all the same for the same kernel version. The only thing I noticed is that in 3.14 and 4.1 (zImage and ITB), the first bmem region is: 768 MiB at 0x1000 whereas in 4.9 (zImage and ITB), it is: 760 MiB at 0x1080 This is booting with no kernel command line arguments, so I guess some default may have changed between stblinux 4.1 and 4.9? Thomas ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH 1/1] board: arm: Add support for Broadcom BCM7445D0
On 06/06/2018 01:39 PM, Thomas Fitzsimmons wrote:
> Florian Fainelli writes:
>
>> On 05/10/2018 06:04 AM, Thomas Fitzsimmons wrote:
>>> Florian Fainelli writes:
>>>
On 05/06/2018 04:09 AM, Thomas Fitzsimmons wrote:
>
> [...]
>
> +
> +config BCMSTB_ACCOMMODATE_STBLINUX
> + bool ""
> + default y
> + help
> + This prevents U-Boot from adding memory reservations for the
> + lengths of initramfs and DTB. Without skipping these,
> + stblinux's "contiguous memory allocator" (CMA) Linux driver
> + (cma_driver) will allocate memory ranges smaller than what
> + are actually available, because it only checks reservation
> + sizes. It doesn't check if the reserved range overlaps the
> + range it allocates. stblinux also tries to move the DTB to
> + a lower memory location early in the Linux boot. If the FIT
> + image specifies a load address for the initramfs then
> + sometimes the DTB is moved into the range where the
> + initramfs image is loaded. Defining this will mean that
> + FIT-provided initramfs load addresses are ignored.
What STB Linux kernel did you observe this with? I am afraid this is
still true about the ranges vs. allocation even in newer kernels, but
that is kind of intented to keep the logic KISS (because it's already
too complicated IMHO).
>>>
>>> I investigated the allocation discrepancy and wrote the workaround while
>>> we were still using stblinux-3.14. Since then we've updated to
>>> stblinux-4.1 and I've left the workaround enabled, but I haven't
>>> investigated its interactions with the newer bmem mechanism. I should
>>> probably revisit this though, with stblinux-4.1 and stblinux-4.9, just
>>> to make sure this macro is still useful.
>>
>> Sounds good, let me know if there is something that does not seem quite
>> right, we could fix it.
>
> [...]
>
> In the v3 patch, I keep the FIT's RFS and DTB in-place. This approach
> eliminates the bmem/cma allocation discrepancies. I compared bmem/cma
> dmesg output for stblinux 3.14, 4.1 and 4.9, zImage and ITB builds, on
> my eval board, and they're all the same for the same kernel version.
> The only thing I noticed is that in 3.14 and 4.1 (zImage and ITB), the
> first bmem region is:
>
>768 MiB at 0x1000
>
> whereas in 4.9 (zImage and ITB), it is:
>
>760 MiB at 0x1080
>
> This is booting with no kernel command line arguments, so I guess some
> default may have changed between stblinux 4.1 and 4.9?
This upstream commit is responsible for what you see:
6ff0966052c46efb53980b8a1add2e7b49c9f560 ("ARM: 8432/1: move VMALLOC_END
from 0xff00 to 0xff80") we've backported that change to our 3.14
and 4.1 kernels since then.
--
Florian
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Re: [U-Boot] [PATCH v3] drivers/net/vsc9953: Initialize action RAM in VCAP complex
On Mon, May 21, 2018 at 10:02 AM, wrote: > From: Radu Bulie > > VCAP tables must be initialized even if no advanced classification > is used. If no initialization is performed, then ECC error will > be observed by the user when the first packet enters the l2switch. > The error is marked in MPIC_EISR0 -bit 29 which means - Internal RAM > multi-bit ECC error. > This patch fixes the aforementioned ECC error by performing the > initialization of VCAP tables. > > Signed-off-by: Radu Bulie Acked-by: Joe Hershberger ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH] net: nfs: don't fail when nfs_read_reply returns -NFS_RPC_DROP
On Mon, Jun 4, 2018 at 9:53 PM, Vasily Khoruzhick wrote: > On Wed, May 16, 2018 at 3:26 PM Joe Hershberger > wrote: >> >> On Mon, May 14, 2018 at 10:34 AM, Vasily Khoruzhick >> wrote: >> > That can happen if duplicate UDP packet arrived, and that's not uncommon. >> > Anyway, we ignore packets with rpc_id lower than last we sent for other >> > requests, so it makes sense to do that for read request as well. >> > >> > Signed-off-by: Vasily Khoruzhick >> >> Acked-by: Joe Hershberger > > Hey, > > Can anyone pick this patch up? Will do. -Joe ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH 1/2] net: phy: mv88e61xx: Force CPU port link up
On Sat, Jun 2, 2018 at 11:21 PM, Chris Packham wrote: > When connecting to from a CPU direct to a 88e6097 typically RGMII is > used. In order for traffic to actually pass we need to force the link up > so the CPU MAC on the other end will see the link. > > Cc: Kevin Smith > Signed-off-by: Chris Packham Signed-off-by: Joe Hershberger ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH 1/2] net: phy: mv88e61xx: Force CPU port link up
On Wed, Jun 6, 2018 at 5:30 PM, Joe Hershberger wrote: > On Sat, Jun 2, 2018 at 11:21 PM, Chris Packham > wrote: >> When connecting to from a CPU direct to a 88e6097 typically RGMII is >> used. In order for traffic to actually pass we need to force the link up >> so the CPU MAC on the other end will see the link. >> >> Cc: Kevin Smith >> Signed-off-by: Chris Packham > > Signed-off-by: Joe Hershberger Make that, Acked-by: Joe Hershberger ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH 10/15] net: ravb: Add R8A77990 E3 compatible
On Fri, Jun 1, 2018 at 2:45 AM, Marek Vasut wrote: > Add new compatible to the Ethernet AVB driver for R8A77990 E3 SoC. > > Signed-off-by: Marek Vasut > Cc: Joe Hershberger > Cc: Nobuhiro Iwamatsu Acked-by: Joe Hershberger ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
